Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 03:59:11.005798 lava-dispatcher, installed at version: 2022.11
2 03:59:11.005985 start: 0 validate
3 03:59:11.006123 Start time: 2023-02-26 03:59:11.006114+00:00 (UTC)
4 03:59:11.006257 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:59:11.006386 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230217.0%2Famd64%2Finitrd.cpio.gz exists
6 03:59:11.299202 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:59:11.300006 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-938-gc773c630d0e4f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:59:11.591643 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:59:11.592316 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230217.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 03:59:11.887621 Using caching service: 'http://localhost/cache/?uri=%s'
11 03:59:11.888311 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-938-gc773c630d0e4f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 03:59:12.188672 validate duration: 1.18
14 03:59:12.190021 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 03:59:12.190544 start: 1.1 download-retry (timeout 00:10:00) [common]
16 03:59:12.191009 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 03:59:12.191490 Not decompressing ramdisk as can be used compressed.
18 03:59:12.192103 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230217.0/amd64/initrd.cpio.gz
19 03:59:12.192481 saving as /var/lib/lava/dispatcher/tmp/9338319/tftp-deploy-w21221ve/ramdisk/initrd.cpio.gz
20 03:59:12.192813 total size: 5432126 (5MB)
21 03:59:12.198428 progress 0% (0MB)
22 03:59:12.205938 progress 5% (0MB)
23 03:59:12.213099 progress 10% (0MB)
24 03:59:12.218685 progress 15% (0MB)
25 03:59:12.223012 progress 20% (1MB)
26 03:59:12.226295 progress 25% (1MB)
27 03:59:12.227900 progress 30% (1MB)
28 03:59:12.229385 progress 35% (1MB)
29 03:59:12.230727 progress 40% (2MB)
30 03:59:12.232087 progress 45% (2MB)
31 03:59:12.233393 progress 50% (2MB)
32 03:59:12.234955 progress 55% (2MB)
33 03:59:12.236312 progress 60% (3MB)
34 03:59:12.237604 progress 65% (3MB)
35 03:59:12.239108 progress 70% (3MB)
36 03:59:12.240393 progress 75% (3MB)
37 03:59:12.241711 progress 80% (4MB)
38 03:59:12.243009 progress 85% (4MB)
39 03:59:12.244432 progress 90% (4MB)
40 03:59:12.246443 progress 95% (4MB)
41 03:59:12.248939 progress 100% (5MB)
42 03:59:12.249210 5MB downloaded in 0.06s (91.85MB/s)
43 03:59:12.249371 end: 1.1.1 http-download (duration 00:00:00) [common]
45 03:59:12.249625 end: 1.1 download-retry (duration 00:00:00) [common]
46 03:59:12.249739 start: 1.2 download-retry (timeout 00:10:00) [common]
47 03:59:12.249845 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 03:59:12.249953 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-938-gc773c630d0e4f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 03:59:12.250025 saving as /var/lib/lava/dispatcher/tmp/9338319/tftp-deploy-w21221ve/kernel/bzImage
50 03:59:12.250088 total size: 7573392 (7MB)
51 03:59:12.250150 No compression specified
52 03:59:12.252006 progress 0% (0MB)
53 03:59:12.255503 progress 5% (0MB)
54 03:59:12.259400 progress 10% (0MB)
55 03:59:12.262783 progress 15% (1MB)
56 03:59:12.266280 progress 20% (1MB)
57 03:59:12.270192 progress 25% (1MB)
58 03:59:12.273478 progress 30% (2MB)
59 03:59:12.276798 progress 35% (2MB)
60 03:59:12.280160 progress 40% (2MB)
61 03:59:12.283507 progress 45% (3MB)
62 03:59:12.287459 progress 50% (3MB)
63 03:59:12.291510 progress 55% (4MB)
64 03:59:12.295210 progress 60% (4MB)
65 03:59:12.298204 progress 65% (4MB)
66 03:59:12.301518 progress 70% (5MB)
67 03:59:12.305478 progress 75% (5MB)
68 03:59:12.308779 progress 80% (5MB)
69 03:59:12.313034 progress 85% (6MB)
70 03:59:12.316707 progress 90% (6MB)
71 03:59:12.319692 progress 95% (6MB)
72 03:59:12.323208 progress 100% (7MB)
73 03:59:12.323382 7MB downloaded in 0.07s (98.55MB/s)
74 03:59:12.323533 end: 1.2.1 http-download (duration 00:00:00) [common]
76 03:59:12.323776 end: 1.2 download-retry (duration 00:00:00) [common]
77 03:59:12.323867 start: 1.3 download-retry (timeout 00:10:00) [common]
78 03:59:12.323957 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 03:59:12.324064 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230217.0/amd64/full.rootfs.tar.xz
80 03:59:12.324134 saving as /var/lib/lava/dispatcher/tmp/9338319/tftp-deploy-w21221ve/nfsrootfs/full.rootfs.tar
81 03:59:12.324199 total size: 124173696 (118MB)
82 03:59:12.324262 Using unxz to decompress xz
83 03:59:12.328354 progress 0% (0MB)
84 03:59:12.780891 progress 5% (5MB)
85 03:59:13.267385 progress 10% (11MB)
86 03:59:13.744014 progress 15% (17MB)
87 03:59:14.220605 progress 20% (23MB)
88 03:59:14.579968 progress 25% (29MB)
89 03:59:14.928172 progress 30% (35MB)
90 03:59:15.215429 progress 35% (41MB)
91 03:59:15.374482 progress 40% (47MB)
92 03:59:15.747065 progress 45% (53MB)
93 03:59:16.104527 progress 50% (59MB)
94 03:59:16.441192 progress 55% (65MB)
95 03:59:16.790262 progress 60% (71MB)
96 03:59:17.123820 progress 65% (77MB)
97 03:59:17.497983 progress 70% (82MB)
98 03:59:17.912532 progress 75% (88MB)
99 03:59:18.329623 progress 80% (94MB)
100 03:59:18.460782 progress 85% (100MB)
101 03:59:18.620021 progress 90% (106MB)
102 03:59:18.950324 progress 95% (112MB)
103 03:59:19.318239 progress 100% (118MB)
104 03:59:19.323886 118MB downloaded in 7.00s (16.92MB/s)
105 03:59:19.324158 end: 1.3.1 http-download (duration 00:00:07) [common]
107 03:59:19.324448 end: 1.3 download-retry (duration 00:00:07) [common]
108 03:59:19.324543 start: 1.4 download-retry (timeout 00:09:53) [common]
109 03:59:19.324635 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 03:59:19.324752 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-938-gc773c630d0e4f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 03:59:19.324826 saving as /var/lib/lava/dispatcher/tmp/9338319/tftp-deploy-w21221ve/modules/modules.tar
112 03:59:19.324890 total size: 51688 (0MB)
113 03:59:19.324954 Using unxz to decompress xz
114 03:59:19.329983 progress 63% (0MB)
115 03:59:19.330356 progress 100% (0MB)
116 03:59:19.333677 0MB downloaded in 0.01s (5.61MB/s)
117 03:59:19.333963 end: 1.4.1 http-download (duration 00:00:00) [common]
119 03:59:19.334235 end: 1.4 download-retry (duration 00:00:00) [common]
120 03:59:19.334330 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 03:59:19.334429 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 03:59:21.018345 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9338319/extract-nfsrootfs-brszwu8u
123 03:59:21.018551 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 03:59:21.018661 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 03:59:21.018803 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel
126 03:59:21.018907 makedir: /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin
127 03:59:21.018995 makedir: /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/tests
128 03:59:21.019080 makedir: /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/results
129 03:59:21.019178 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-add-keys
130 03:59:21.019308 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-add-sources
131 03:59:21.019425 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-background-process-start
132 03:59:21.019539 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-background-process-stop
133 03:59:21.019655 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-common-functions
134 03:59:21.019815 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-echo-ipv4
135 03:59:21.019941 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-install-packages
136 03:59:21.020051 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-installed-packages
137 03:59:21.020159 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-os-build
138 03:59:21.020268 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-probe-channel
139 03:59:21.020376 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-probe-ip
140 03:59:21.020485 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-target-ip
141 03:59:21.020593 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-target-mac
142 03:59:21.020700 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-target-storage
143 03:59:21.020811 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-test-case
144 03:59:21.020921 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-test-event
145 03:59:21.021028 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-test-feedback
146 03:59:21.021134 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-test-raise
147 03:59:21.021242 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-test-reference
148 03:59:21.021350 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-test-runner
149 03:59:21.021457 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-test-set
150 03:59:21.021564 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-test-shell
151 03:59:21.021674 Updating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-install-packages (oe)
152 03:59:21.021824 Updating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/bin/lava-installed-packages (oe)
153 03:59:21.021921 Creating /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/environment
154 03:59:21.022006 LAVA metadata
155 03:59:21.022072 - LAVA_JOB_ID=9338319
156 03:59:21.022136 - LAVA_DISPATCHER_IP=192.168.201.1
157 03:59:21.022235 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 03:59:21.022301 skipped lava-vland-overlay
159 03:59:21.022380 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 03:59:21.022463 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 03:59:21.022526 skipped lava-multinode-overlay
162 03:59:21.022602 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 03:59:21.022684 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 03:59:21.022756 Loading test definitions
165 03:59:21.022846 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 03:59:21.022919 Using /lava-9338319 at stage 0
167 03:59:21.023014 Fetching tests from https://github.com/kernelci/test-definitions
168 03:59:21.023094 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/0/tests/0_ltp-ipc'
169 03:59:25.729557 Running '/usr/bin/git checkout kernelci.org
170 03:59:25.866426 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 03:59:25.867163 uuid=9338319_1.5.2.3.1 testdef=None
172 03:59:25.867330 end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
174 03:59:25.867581 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
175 03:59:25.868359 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 03:59:25.868603 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
178 03:59:25.869592 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 03:59:25.869880 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
181 03:59:25.870829 runner path: /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/0/tests/0_ltp-ipc test_uuid 9338319_1.5.2.3.1
182 03:59:25.870922 SKIPFILE='skipfile-lkft.yaml'
183 03:59:25.870988 SKIP_INSTALL='true'
184 03:59:25.871050 TST_CMDFILES='ipc'
185 03:59:25.871185 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 03:59:25.871400 Creating lava-test-runner.conf files
188 03:59:25.871465 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9338319/lava-overlay-jaay0sel/lava-9338319/0 for stage 0
189 03:59:25.871548 - 0_ltp-ipc
190 03:59:25.871647 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
191 03:59:25.871738 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
192 03:59:33.378402 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
193 03:59:33.378560 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
194 03:59:33.378658 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 03:59:33.378759 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
196 03:59:33.378857 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
197 03:59:33.481151 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 03:59:33.481497 start: 1.5.4 extract-modules (timeout 00:09:39) [common]
199 03:59:33.481692 extracting modules file /var/lib/lava/dispatcher/tmp/9338319/tftp-deploy-w21221ve/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9338319/extract-nfsrootfs-brszwu8u
200 03:59:33.485765 extracting modules file /var/lib/lava/dispatcher/tmp/9338319/tftp-deploy-w21221ve/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9338319/extract-overlay-ramdisk-jn5jb5tb/ramdisk
201 03:59:33.489507 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 03:59:33.489622 start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
203 03:59:33.489715 [common] Applying overlay to NFS
204 03:59:33.489821 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9338319/compress-overlay-anbjjyc5/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9338319/extract-nfsrootfs-brszwu8u
205 03:59:33.945044 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 03:59:33.945216 start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
207 03:59:33.945320 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 03:59:33.945412 start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
209 03:59:33.945493 Building ramdisk /var/lib/lava/dispatcher/tmp/9338319/extract-overlay-ramdisk-jn5jb5tb/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9338319/extract-overlay-ramdisk-jn5jb5tb/ramdisk
210 03:59:33.979487 >> 24546 blocks
211 03:59:34.449570 rename /var/lib/lava/dispatcher/tmp/9338319/extract-overlay-ramdisk-jn5jb5tb/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9338319/tftp-deploy-w21221ve/ramdisk/ramdisk.cpio.gz
212 03:59:34.449989 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 03:59:34.450122 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
214 03:59:34.450232 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
215 03:59:34.450329 No mkimage arch provided, not using FIT.
216 03:59:34.450422 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 03:59:34.450512 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 03:59:34.450613 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
219 03:59:34.450705 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
220 03:59:34.450784 No LXC device requested
221 03:59:34.450870 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 03:59:34.450960 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
223 03:59:34.451046 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 03:59:34.451121 Checking files for TFTP limit of 4294967296 bytes.
225 03:59:34.451499 end: 1 tftp-deploy (duration 00:00:22) [common]
226 03:59:34.451603 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 03:59:34.451696 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 03:59:34.451825 substitutions:
229 03:59:34.451893 - {DTB}: None
230 03:59:34.451959 - {INITRD}: 9338319/tftp-deploy-w21221ve/ramdisk/ramdisk.cpio.gz
231 03:59:34.452021 - {KERNEL}: 9338319/tftp-deploy-w21221ve/kernel/bzImage
232 03:59:34.452080 - {LAVA_MAC}: None
233 03:59:34.452138 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9338319/extract-nfsrootfs-brszwu8u
234 03:59:34.452199 - {NFS_SERVER_IP}: 192.168.201.1
235 03:59:34.452257 - {PRESEED_CONFIG}: None
236 03:59:34.452314 - {PRESEED_LOCAL}: None
237 03:59:34.452370 - {RAMDISK}: 9338319/tftp-deploy-w21221ve/ramdisk/ramdisk.cpio.gz
238 03:59:34.452427 - {ROOT_PART}: None
239 03:59:34.452483 - {ROOT}: None
240 03:59:34.452539 - {SERVER_IP}: 192.168.201.1
241 03:59:34.452594 - {TEE}: None
242 03:59:34.452650 Parsed boot commands:
243 03:59:34.452705 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 03:59:34.452863 Parsed boot commands: tftpboot 192.168.201.1 9338319/tftp-deploy-w21221ve/kernel/bzImage 9338319/tftp-deploy-w21221ve/kernel/cmdline 9338319/tftp-deploy-w21221ve/ramdisk/ramdisk.cpio.gz
245 03:59:34.452955 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 03:59:34.453046 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 03:59:34.453143 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 03:59:34.453231 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 03:59:34.453310 Not connected, no need to disconnect.
250 03:59:34.453397 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 03:59:34.453480 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 03:59:34.453553 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
253 03:59:34.456553 Setting prompt string to ['lava-test: # ']
254 03:59:34.456846 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 03:59:34.456957 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 03:59:34.457056 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 03:59:34.457151 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 03:59:34.457323 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
259 03:59:43.788510 >> Command sent successfully.
260 03:59:43.794090 Returned 0 in 9 seconds
261 03:59:43.895251 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
263 03:59:43.896694 end: 2.2.2 reset-device (duration 00:00:09) [common]
264 03:59:43.897199 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
265 03:59:43.897641 Setting prompt string to 'Starting depthcharge on Helios...'
266 03:59:43.898048 Changing prompt to 'Starting depthcharge on Helios...'
267 03:59:43.898416 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 03:59:43.898916 [Enter `^Ec?' for help]
269 03:59:43.898996
270 03:59:43.899060
271 03:59:43.899123 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 03:59:43.899188 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 03:59:43.899247 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 03:59:43.899305 CPU: AES supported, TXT NOT supported, VT supported
275 03:59:43.899362 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 03:59:43.899420 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 03:59:43.899477 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 03:59:43.899533 VBOOT: Loading verstage.
279 03:59:43.899588 FMAP: Found "FLASH" version 1.1 at 0xc04000.
280 03:59:43.899645 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 03:59:43.899702 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 03:59:43.899759 CBFS @ c08000 size 3f8000
283 03:59:43.899814 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 03:59:43.899870 CBFS: Locating 'fallback/verstage'
285 03:59:43.899926 CBFS: Found @ offset 10fb80 size 1072c
286 03:59:43.899981
287 03:59:43.900035
288 03:59:43.900091 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 03:59:43.900147 Probing TPM: . done!
290 03:59:43.900203 TPM ready after 0 ms
291 03:59:43.900259 Connected to device vid:did:rid of 1ae0:0028:00
292 03:59:43.900315 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
293 03:59:43.900375 Initialized TPM device CR50 revision 0
294 03:59:43.900432 tlcl_send_startup: Startup return code is 0
295 03:59:43.900488 TPM: setup succeeded
296 03:59:43.900544 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 03:59:43.900600 Chrome EC: UHEPI supported
298 03:59:43.900656 Phase 1
299 03:59:43.900714 FMAP: area GBB found @ c05000 (12288 bytes)
300 03:59:43.900770 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 03:59:43.900827 Phase 2
302 03:59:43.900882 Phase 3
303 03:59:43.900937 FMAP: area GBB found @ c05000 (12288 bytes)
304 03:59:43.900993 VB2:vb2_report_dev_firmware() This is developer signed firmware
305 03:59:43.901049 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
306 03:59:43.901105 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
307 03:59:43.901161 VB2:vb2_verify_keyblock() Checking keyblock signature...
308 03:59:43.901218 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
309 03:59:43.901274 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
310 03:59:43.901329 VB2:vb2_verify_fw_preamble() Verifying preamble.
311 03:59:43.901385 Phase 4
312 03:59:43.901440 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
313 03:59:43.901496 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
314 03:59:43.901552 VB2:vb2_rsa_verify_digest() Digest check failed!
315 03:59:43.901608 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
316 03:59:43.901664 Saving nvdata
317 03:59:43.901741 Reboot requested (10020007)
318 03:59:43.901810 board_reset() called!
319 03:59:43.901865 full_reset() called!
320 03:59:47.462751
321 03:59:47.463358
322 03:59:47.472666 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
323 03:59:47.475941 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
324 03:59:47.482462 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
325 03:59:47.485474 CPU: AES supported, TXT NOT supported, VT supported
326 03:59:47.492069 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
327 03:59:47.499009 PCH: device id 0284 (rev 00) is Cometlake-U Premium
328 03:59:47.502131 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
329 03:59:47.505644 VBOOT: Loading verstage.
330 03:59:47.512020 FMAP: Found "FLASH" version 1.1 at 0xc04000.
331 03:59:47.515458 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
332 03:59:47.522270 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
333 03:59:47.522824 CBFS @ c08000 size 3f8000
334 03:59:47.528596 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
335 03:59:47.531882 CBFS: Locating 'fallback/verstage'
336 03:59:47.535144 CBFS: Found @ offset 10fb80 size 1072c
337 03:59:47.539521
338 03:59:47.540069
339 03:59:47.549286 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
340 03:59:47.563998 Probing TPM: . done!
341 03:59:47.567253 TPM ready after 0 ms
342 03:59:47.570663 Connected to device vid:did:rid of 1ae0:0028:00
343 03:59:47.580791 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
344 03:59:47.584034 Initialized TPM device CR50 revision 0
345 03:59:47.626523 tlcl_send_startup: Startup return code is 0
346 03:59:47.627114 TPM: setup succeeded
347 03:59:47.639616 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
348 03:59:47.642902 Chrome EC: UHEPI supported
349 03:59:47.646291 Phase 1
350 03:59:47.649638 FMAP: area GBB found @ c05000 (12288 bytes)
351 03:59:47.655901 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
352 03:59:47.662701 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
353 03:59:47.666090 Recovery requested (1009000e)
354 03:59:47.671978 Saving nvdata
355 03:59:47.677964 tlcl_extend: response is 0
356 03:59:47.686578 tlcl_extend: response is 0
357 03:59:47.693254 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
358 03:59:47.696819 CBFS @ c08000 size 3f8000
359 03:59:47.703574 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
360 03:59:47.706502 CBFS: Locating 'fallback/romstage'
361 03:59:47.709587 CBFS: Found @ offset 80 size 145fc
362 03:59:47.713131 Accumulated console time in verstage 99 ms
363 03:59:47.713680
364 03:59:47.716898
365 03:59:47.726154 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
366 03:59:47.733495 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
367 03:59:47.736240 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
368 03:59:47.739780 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
369 03:59:47.746138 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
370 03:59:47.749552 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
371 03:59:47.752548 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
372 03:59:47.755750 TCO_STS: 0000 0000
373 03:59:47.759146 GEN_PMCON: e0015238 00000200
374 03:59:47.762601 GBLRST_CAUSE: 00000000 00000000
375 03:59:47.765993 prev_sleep_state 5
376 03:59:47.769024 Boot Count incremented to 47828
377 03:59:47.772188 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 03:59:47.775392 CBFS @ c08000 size 3f8000
379 03:59:47.782170 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 03:59:47.785596 CBFS: Locating 'fspm.bin'
381 03:59:47.788936 CBFS: Found @ offset 5ffc0 size 71000
382 03:59:47.791772 Chrome EC: UHEPI supported
383 03:59:47.798342 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
384 03:59:47.802904 Probing TPM: done!
385 03:59:47.809731 Connected to device vid:did:rid of 1ae0:0028:00
386 03:59:47.819342 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
387 03:59:47.825768 Initialized TPM device CR50 revision 0
388 03:59:47.834491 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
389 03:59:47.841248 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
390 03:59:47.844621 MRC cache found, size 1948
391 03:59:47.848165 bootmode is set to: 2
392 03:59:47.851301 PRMRR disabled by config.
393 03:59:47.854371 SPD INDEX = 1
394 03:59:47.857452 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
395 03:59:47.861172 CBFS @ c08000 size 3f8000
396 03:59:47.867660 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
397 03:59:47.868274 CBFS: Locating 'spd.bin'
398 03:59:47.871131 CBFS: Found @ offset 5fb80 size 400
399 03:59:47.874498 SPD: module type is LPDDR3
400 03:59:47.877796 SPD: module part is
401 03:59:47.884380 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
402 03:59:47.887348 SPD: device width 4 bits, bus width 8 bits
403 03:59:47.891013 SPD: module size is 4096 MB (per channel)
404 03:59:47.893957 memory slot: 0 configuration done.
405 03:59:47.897197 memory slot: 2 configuration done.
406 03:59:47.949522 CBMEM:
407 03:59:47.953075 IMD: root @ 99fff000 254 entries.
408 03:59:47.955791 IMD: root @ 99ffec00 62 entries.
409 03:59:47.959369 External stage cache:
410 03:59:47.962988 IMD: root @ 9abff000 254 entries.
411 03:59:47.966127 IMD: root @ 9abfec00 62 entries.
412 03:59:47.972690 Chrome EC: clear events_b mask to 0x0000000020004000
413 03:59:47.985128 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 03:59:47.998278 tlcl_write: response is 0
415 03:59:48.007705 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
416 03:59:48.014344 MRC: TPM MRC hash updated successfully.
417 03:59:48.014909 2 DIMMs found
418 03:59:48.017316 SMM Memory Map
419 03:59:48.020658 SMRAM : 0x9a000000 0x1000000
420 03:59:48.023945 Subregion 0: 0x9a000000 0xa00000
421 03:59:48.027130 Subregion 1: 0x9aa00000 0x200000
422 03:59:48.030034 Subregion 2: 0x9ac00000 0x400000
423 03:59:48.033695 top_of_ram = 0x9a000000
424 03:59:48.036938 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
425 03:59:48.043560 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
426 03:59:48.046930 MTRR Range: Start=ff000000 End=0 (Size 1000000)
427 03:59:48.053479 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
428 03:59:48.056538 CBFS @ c08000 size 3f8000
429 03:59:48.059732 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
430 03:59:48.066264 CBFS: Locating 'fallback/postcar'
431 03:59:48.069675 CBFS: Found @ offset 107000 size 4b44
432 03:59:48.076429 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
433 03:59:48.086362 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
434 03:59:48.089608 Processing 180 relocs. Offset value of 0x97c0c000
435 03:59:48.098005 Accumulated console time in romstage 286 ms
436 03:59:48.098592
437 03:59:48.098952
438 03:59:48.108104 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
439 03:59:48.114358 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 03:59:48.117483 CBFS @ c08000 size 3f8000
441 03:59:48.124374 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 03:59:48.128044 CBFS: Locating 'fallback/ramstage'
443 03:59:48.130742 CBFS: Found @ offset 43380 size 1b9e8
444 03:59:48.137260 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
445 03:59:48.169815 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
446 03:59:48.173332 Processing 3976 relocs. Offset value of 0x98db0000
447 03:59:48.179962 Accumulated console time in postcar 52 ms
448 03:59:48.180520
449 03:59:48.180877
450 03:59:48.189984 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
451 03:59:48.195804 FMAP: area RO_VPD found @ c00000 (16384 bytes)
452 03:59:48.199340 WARNING: RO_VPD is uninitialized or empty.
453 03:59:48.202533 FMAP: area RW_VPD found @ af8000 (8192 bytes)
454 03:59:48.209137 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 03:59:48.209683 Normal boot.
456 03:59:48.216017 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
457 03:59:48.219350 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
458 03:59:48.222287 CBFS @ c08000 size 3f8000
459 03:59:48.229522 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
460 03:59:48.232384 CBFS: Locating 'cpu_microcode_blob.bin'
461 03:59:48.235702 CBFS: Found @ offset 14700 size 2ec00
462 03:59:48.239311 microcode: sig=0x806ec pf=0x4 revision=0xc9
463 03:59:48.242401 Skip microcode update
464 03:59:48.248973 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 03:59:48.249536 CBFS @ c08000 size 3f8000
466 03:59:48.255248 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 03:59:48.258644 CBFS: Locating 'fsps.bin'
468 03:59:48.261878 CBFS: Found @ offset d1fc0 size 35000
469 03:59:48.287928 Detected 4 core, 8 thread CPU.
470 03:59:48.291419 Setting up SMI for CPU
471 03:59:48.294576 IED base = 0x9ac00000
472 03:59:48.297611 IED size = 0x00400000
473 03:59:48.298100 Will perform SMM setup.
474 03:59:48.304127 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
475 03:59:48.310930 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
476 03:59:48.317748 Processing 16 relocs. Offset value of 0x00030000
477 03:59:48.320483 Attempting to start 7 APs
478 03:59:48.323604 Waiting for 10ms after sending INIT.
479 03:59:48.337825 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
480 03:59:48.338395 done.
481 03:59:48.341045 AP: slot 1 apic_id 3.
482 03:59:48.344365 AP: slot 4 apic_id 2.
483 03:59:48.344924 AP: slot 5 apic_id 5.
484 03:59:48.347354 AP: slot 2 apic_id 4.
485 03:59:48.350868 AP: slot 7 apic_id 6.
486 03:59:48.353964 AP: slot 6 apic_id 7.
487 03:59:48.357462 Waiting for 2nd SIPI to complete...done.
488 03:59:48.364143 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
489 03:59:48.370240 Processing 13 relocs. Offset value of 0x00038000
490 03:59:48.377129 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
491 03:59:48.380314 Installing SMM handler to 0x9a000000
492 03:59:48.386877 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
493 03:59:48.393818 Processing 658 relocs. Offset value of 0x9a010000
494 03:59:48.399958 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
495 03:59:48.403687 Processing 13 relocs. Offset value of 0x9a008000
496 03:59:48.409857 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
497 03:59:48.416647 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
498 03:59:48.422912 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
499 03:59:48.426311 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
500 03:59:48.433094 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
501 03:59:48.439716 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
502 03:59:48.446222 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
503 03:59:48.452774 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
504 03:59:48.455894 Clearing SMI status registers
505 03:59:48.456340 SMI_STS: PM1
506 03:59:48.459236 PM1_STS: PWRBTN
507 03:59:48.459680 TCO_STS: SECOND_TO
508 03:59:48.462282 New SMBASE 0x9a000000
509 03:59:48.465812 In relocation handler: CPU 0
510 03:59:48.469047 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
511 03:59:48.475989 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 03:59:48.476708 Relocation complete.
513 03:59:48.479131 New SMBASE 0x99fff400
514 03:59:48.482179 In relocation handler: CPU 3
515 03:59:48.485836 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
516 03:59:48.492437 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 03:59:48.492991 Relocation complete.
518 03:59:48.495448 New SMBASE 0x99fffc00
519 03:59:48.498246 In relocation handler: CPU 1
520 03:59:48.501674 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
521 03:59:48.508858 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 03:59:48.509414 Relocation complete.
523 03:59:48.511766 New SMBASE 0x99fff000
524 03:59:48.514926 In relocation handler: CPU 4
525 03:59:48.518675 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
526 03:59:48.525216 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 03:59:48.525804 Relocation complete.
528 03:59:48.528336 New SMBASE 0x99ffec00
529 03:59:48.531651 In relocation handler: CPU 5
530 03:59:48.534658 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
531 03:59:48.541520 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 03:59:48.542113 Relocation complete.
533 03:59:48.544820 New SMBASE 0x99fff800
534 03:59:48.547561 In relocation handler: CPU 2
535 03:59:48.551078 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
536 03:59:48.557281 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 03:59:48.557763 Relocation complete.
538 03:59:48.560941 New SMBASE 0x99ffe800
539 03:59:48.564491 In relocation handler: CPU 6
540 03:59:48.567604 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
541 03:59:48.574243 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 03:59:48.574805 Relocation complete.
543 03:59:48.577320 New SMBASE 0x99ffe400
544 03:59:48.580758 In relocation handler: CPU 7
545 03:59:48.583999 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
546 03:59:48.590425 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 03:59:48.590961 Relocation complete.
548 03:59:48.593533 Initializing CPU #0
549 03:59:48.597042 CPU: vendor Intel device 806ec
550 03:59:48.600106 CPU: family 06, model 8e, stepping 0c
551 03:59:48.603617 Clearing out pending MCEs
552 03:59:48.606654 Setting up local APIC...
553 03:59:48.607107 apic_id: 0x00 done.
554 03:59:48.609862 Turbo is available but hidden
555 03:59:48.613452 Turbo is available and visible
556 03:59:48.616739 VMX status: enabled
557 03:59:48.620397 IA32_FEATURE_CONTROL status: locked
558 03:59:48.622989 Skip microcode update
559 03:59:48.623444 CPU #0 initialized
560 03:59:48.626400 Initializing CPU #3
561 03:59:48.626950 Initializing CPU #4
562 03:59:48.629489 Initializing CPU #1
563 03:59:48.633123 CPU: vendor Intel device 806ec
564 03:59:48.636371 CPU: family 06, model 8e, stepping 0c
565 03:59:48.639871 CPU: vendor Intel device 806ec
566 03:59:48.642946 CPU: family 06, model 8e, stepping 0c
567 03:59:48.646372 Clearing out pending MCEs
568 03:59:48.649652 Clearing out pending MCEs
569 03:59:48.652785 Setting up local APIC...
570 03:59:48.653330 Initializing CPU #2
571 03:59:48.656026 Initializing CPU #5
572 03:59:48.656477 Initializing CPU #6
573 03:59:48.659530 CPU: vendor Intel device 806ec
574 03:59:48.666143 CPU: family 06, model 8e, stepping 0c
575 03:59:48.666697 Clearing out pending MCEs
576 03:59:48.669268 Initializing CPU #7
577 03:59:48.672576 CPU: vendor Intel device 806ec
578 03:59:48.675976 CPU: family 06, model 8e, stepping 0c
579 03:59:48.679459 CPU: vendor Intel device 806ec
580 03:59:48.682947 CPU: family 06, model 8e, stepping 0c
581 03:59:48.686212 Clearing out pending MCEs
582 03:59:48.688928 Clearing out pending MCEs
583 03:59:48.692599 Setting up local APIC...
584 03:59:48.693151 CPU: vendor Intel device 806ec
585 03:59:48.698913 CPU: family 06, model 8e, stepping 0c
586 03:59:48.702168 CPU: vendor Intel device 806ec
587 03:59:48.705670 CPU: family 06, model 8e, stepping 0c
588 03:59:48.709019 Clearing out pending MCEs
589 03:59:48.709565 Clearing out pending MCEs
590 03:59:48.712373 Setting up local APIC...
591 03:59:48.715259 apic_id: 0x07 done.
592 03:59:48.718626 Setting up local APIC...
593 03:59:48.719112 Setting up local APIC...
594 03:59:48.722274 apic_id: 0x02 done.
595 03:59:48.725449 Setting up local APIC...
596 03:59:48.725940 apic_id: 0x05 done.
597 03:59:48.728366 apic_id: 0x04 done.
598 03:59:48.732154 VMX status: enabled
599 03:59:48.732718 apic_id: 0x03 done.
600 03:59:48.735173 IA32_FEATURE_CONTROL status: locked
601 03:59:48.738598 VMX status: enabled
602 03:59:48.741859 Skip microcode update
603 03:59:48.744788 IA32_FEATURE_CONTROL status: locked
604 03:59:48.745240 CPU #4 initialized
605 03:59:48.748274 Skip microcode update
606 03:59:48.751882 VMX status: enabled
607 03:59:48.752450 VMX status: enabled
608 03:59:48.754740 IA32_FEATURE_CONTROL status: locked
609 03:59:48.761837 IA32_FEATURE_CONTROL status: locked
610 03:59:48.762383 Skip microcode update
611 03:59:48.765022 CPU #1 initialized
612 03:59:48.767995 Setting up local APIC...
613 03:59:48.768548 CPU #2 initialized
614 03:59:48.771520 apic_id: 0x06 done.
615 03:59:48.772072 VMX status: enabled
616 03:59:48.774619 VMX status: enabled
617 03:59:48.777735 IA32_FEATURE_CONTROL status: locked
618 03:59:48.781290 IA32_FEATURE_CONTROL status: locked
619 03:59:48.784489 Skip microcode update
620 03:59:48.787737 Skip microcode update
621 03:59:48.788322 CPU #6 initialized
622 03:59:48.791204 CPU #7 initialized
623 03:59:48.791752 apic_id: 0x01 done.
624 03:59:48.793950 Skip microcode update
625 03:59:48.797693 VMX status: enabled
626 03:59:48.798396 CPU #5 initialized
627 03:59:48.800648 IA32_FEATURE_CONTROL status: locked
628 03:59:48.804319 Skip microcode update
629 03:59:48.807523 CPU #3 initialized
630 03:59:48.810751 bsp_do_flight_plan done after 452 msecs.
631 03:59:48.814188 CPU: frequency set to 4200 MHz
632 03:59:48.814757 Enabling SMIs.
633 03:59:48.816904 Locking SMM.
634 03:59:48.831879 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
635 03:59:48.834879 CBFS @ c08000 size 3f8000
636 03:59:48.841597 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
637 03:59:48.842178 CBFS: Locating 'vbt.bin'
638 03:59:48.844842 CBFS: Found @ offset 5f5c0 size 499
639 03:59:48.851757 Found a VBT of 4608 bytes after decompression
640 03:59:49.033407 Display FSP Version Info HOB
641 03:59:49.036347 Reference Code - CPU = 9.0.1e.30
642 03:59:49.039557 uCode Version = 0.0.0.ca
643 03:59:49.043142 TXT ACM version = ff.ff.ff.ffff
644 03:59:49.046553 Display FSP Version Info HOB
645 03:59:49.049573 Reference Code - ME = 9.0.1e.30
646 03:59:49.052492 MEBx version = 0.0.0.0
647 03:59:49.055762 ME Firmware Version = Consumer SKU
648 03:59:49.059017 Display FSP Version Info HOB
649 03:59:49.062236 Reference Code - CML PCH = 9.0.1e.30
650 03:59:49.065728 PCH-CRID Status = Disabled
651 03:59:49.069284 PCH-CRID Original Value = ff.ff.ff.ffff
652 03:59:49.072132 PCH-CRID New Value = ff.ff.ff.ffff
653 03:59:49.075235 OPROM - RST - RAID = ff.ff.ff.ffff
654 03:59:49.078754 ChipsetInit Base Version = ff.ff.ff.ffff
655 03:59:49.085478 ChipsetInit Oem Version = ff.ff.ff.ffff
656 03:59:49.086045 Display FSP Version Info HOB
657 03:59:49.091895 Reference Code - SA - System Agent = 9.0.1e.30
658 03:59:49.095127 Reference Code - MRC = 0.7.1.6c
659 03:59:49.098626 SA - PCIe Version = 9.0.1e.30
660 03:59:49.101292 SA-CRID Status = Disabled
661 03:59:49.104832 SA-CRID Original Value = 0.0.0.c
662 03:59:49.105375 SA-CRID New Value = 0.0.0.c
663 03:59:49.108100 OPROM - VBIOS = ff.ff.ff.ffff
664 03:59:49.112085 RTC Init
665 03:59:49.114938 Set power on after power failure.
666 03:59:49.115392 Disabling Deep S3
667 03:59:49.118376 Disabling Deep S3
668 03:59:49.121841 Disabling Deep S4
669 03:59:49.122391 Disabling Deep S4
670 03:59:49.125075 Disabling Deep S5
671 03:59:49.125625 Disabling Deep S5
672 03:59:49.131794 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
673 03:59:49.134936 Enumerating buses...
674 03:59:49.138288 Show all devs... Before device enumeration.
675 03:59:49.141266 Root Device: enabled 1
676 03:59:49.144851 CPU_CLUSTER: 0: enabled 1
677 03:59:49.145408 DOMAIN: 0000: enabled 1
678 03:59:49.148245 APIC: 00: enabled 1
679 03:59:49.151543 PCI: 00:00.0: enabled 1
680 03:59:49.152093 PCI: 00:02.0: enabled 1
681 03:59:49.154403 PCI: 00:04.0: enabled 0
682 03:59:49.157688 PCI: 00:05.0: enabled 0
683 03:59:49.160904 PCI: 00:12.0: enabled 1
684 03:59:49.161446 PCI: 00:12.5: enabled 0
685 03:59:49.164092 PCI: 00:12.6: enabled 0
686 03:59:49.167340 PCI: 00:14.0: enabled 1
687 03:59:49.170682 PCI: 00:14.1: enabled 0
688 03:59:49.171160 PCI: 00:14.3: enabled 1
689 03:59:49.173812 PCI: 00:14.5: enabled 0
690 03:59:49.177419 PCI: 00:15.0: enabled 1
691 03:59:49.180801 PCI: 00:15.1: enabled 1
692 03:59:49.181348 PCI: 00:15.2: enabled 0
693 03:59:49.183531 PCI: 00:15.3: enabled 0
694 03:59:49.186998 PCI: 00:16.0: enabled 1
695 03:59:49.190148 PCI: 00:16.1: enabled 0
696 03:59:49.190599 PCI: 00:16.2: enabled 0
697 03:59:49.193251 PCI: 00:16.3: enabled 0
698 03:59:49.197061 PCI: 00:16.4: enabled 0
699 03:59:49.199959 PCI: 00:16.5: enabled 0
700 03:59:49.200406 PCI: 00:17.0: enabled 1
701 03:59:49.203253 PCI: 00:19.0: enabled 1
702 03:59:49.206663 PCI: 00:19.1: enabled 0
703 03:59:49.209726 PCI: 00:19.2: enabled 0
704 03:59:49.210177 PCI: 00:1a.0: enabled 0
705 03:59:49.213453 PCI: 00:1c.0: enabled 0
706 03:59:49.216406 PCI: 00:1c.1: enabled 0
707 03:59:49.219933 PCI: 00:1c.2: enabled 0
708 03:59:49.220496 PCI: 00:1c.3: enabled 0
709 03:59:49.222649 PCI: 00:1c.4: enabled 0
710 03:59:49.226328 PCI: 00:1c.5: enabled 0
711 03:59:49.229738 PCI: 00:1c.6: enabled 0
712 03:59:49.230309 PCI: 00:1c.7: enabled 0
713 03:59:49.232707 PCI: 00:1d.0: enabled 1
714 03:59:49.235989 PCI: 00:1d.1: enabled 0
715 03:59:49.239070 PCI: 00:1d.2: enabled 0
716 03:59:49.239639 PCI: 00:1d.3: enabled 0
717 03:59:49.242199 PCI: 00:1d.4: enabled 0
718 03:59:49.246040 PCI: 00:1d.5: enabled 1
719 03:59:49.249270 PCI: 00:1e.0: enabled 1
720 03:59:49.249849 PCI: 00:1e.1: enabled 0
721 03:59:49.251906 PCI: 00:1e.2: enabled 1
722 03:59:49.255337 PCI: 00:1e.3: enabled 1
723 03:59:49.258670 PCI: 00:1f.0: enabled 1
724 03:59:49.259122 PCI: 00:1f.1: enabled 1
725 03:59:49.261799 PCI: 00:1f.2: enabled 1
726 03:59:49.264931 PCI: 00:1f.3: enabled 1
727 03:59:49.268227 PCI: 00:1f.4: enabled 1
728 03:59:49.268681 PCI: 00:1f.5: enabled 1
729 03:59:49.271754 PCI: 00:1f.6: enabled 0
730 03:59:49.275310 USB0 port 0: enabled 1
731 03:59:49.275862 I2C: 00:15: enabled 1
732 03:59:49.277899 I2C: 00:5d: enabled 1
733 03:59:49.281575 GENERIC: 0.0: enabled 1
734 03:59:49.284906 I2C: 00:1a: enabled 1
735 03:59:49.285475 I2C: 00:38: enabled 1
736 03:59:49.287976 I2C: 00:39: enabled 1
737 03:59:49.291096 I2C: 00:3a: enabled 1
738 03:59:49.291549 I2C: 00:3b: enabled 1
739 03:59:49.294635 PCI: 00:00.0: enabled 1
740 03:59:49.297778 SPI: 00: enabled 1
741 03:59:49.298320 SPI: 01: enabled 1
742 03:59:49.301094 PNP: 0c09.0: enabled 1
743 03:59:49.304377 USB2 port 0: enabled 1
744 03:59:49.304927 USB2 port 1: enabled 1
745 03:59:49.307516 USB2 port 2: enabled 0
746 03:59:49.310914 USB2 port 3: enabled 0
747 03:59:49.314386 USB2 port 5: enabled 0
748 03:59:49.314939 USB2 port 6: enabled 1
749 03:59:49.317207 USB2 port 9: enabled 1
750 03:59:49.320655 USB3 port 0: enabled 1
751 03:59:49.321206 USB3 port 1: enabled 1
752 03:59:49.323665 USB3 port 2: enabled 1
753 03:59:49.327296 USB3 port 3: enabled 1
754 03:59:49.330229 USB3 port 4: enabled 0
755 03:59:49.330685 APIC: 03: enabled 1
756 03:59:49.333894 APIC: 04: enabled 1
757 03:59:49.336727 APIC: 01: enabled 1
758 03:59:49.337278 APIC: 02: enabled 1
759 03:59:49.340015 APIC: 05: enabled 1
760 03:59:49.340466 APIC: 07: enabled 1
761 03:59:49.343079 APIC: 06: enabled 1
762 03:59:49.346309 Compare with tree...
763 03:59:49.346763 Root Device: enabled 1
764 03:59:49.349906 CPU_CLUSTER: 0: enabled 1
765 03:59:49.353183 APIC: 00: enabled 1
766 03:59:49.356449 APIC: 03: enabled 1
767 03:59:49.357032 APIC: 04: enabled 1
768 03:59:49.359517 APIC: 01: enabled 1
769 03:59:49.363211 APIC: 02: enabled 1
770 03:59:49.363776 APIC: 05: enabled 1
771 03:59:49.366060 APIC: 07: enabled 1
772 03:59:49.369345 APIC: 06: enabled 1
773 03:59:49.372556 DOMAIN: 0000: enabled 1
774 03:59:49.373003 PCI: 00:00.0: enabled 1
775 03:59:49.375829 PCI: 00:02.0: enabled 1
776 03:59:49.379085 PCI: 00:04.0: enabled 0
777 03:59:49.382428 PCI: 00:05.0: enabled 0
778 03:59:49.385309 PCI: 00:12.0: enabled 1
779 03:59:49.385792 PCI: 00:12.5: enabled 0
780 03:59:49.388821 PCI: 00:12.6: enabled 0
781 03:59:49.392209 PCI: 00:14.0: enabled 1
782 03:59:49.395370 USB0 port 0: enabled 1
783 03:59:49.398538 USB2 port 0: enabled 1
784 03:59:49.399102 USB2 port 1: enabled 1
785 03:59:49.402008 USB2 port 2: enabled 0
786 03:59:49.404916 USB2 port 3: enabled 0
787 03:59:49.408327 USB2 port 5: enabled 0
788 03:59:49.411328 USB2 port 6: enabled 1
789 03:59:49.414999 USB2 port 9: enabled 1
790 03:59:49.415547 USB3 port 0: enabled 1
791 03:59:49.418221 USB3 port 1: enabled 1
792 03:59:49.421510 USB3 port 2: enabled 1
793 03:59:49.424750 USB3 port 3: enabled 1
794 03:59:49.428353 USB3 port 4: enabled 0
795 03:59:49.431322 PCI: 00:14.1: enabled 0
796 03:59:49.431769 PCI: 00:14.3: enabled 1
797 03:59:49.434219 PCI: 00:14.5: enabled 0
798 03:59:49.437557 PCI: 00:15.0: enabled 1
799 03:59:49.441191 I2C: 00:15: enabled 1
800 03:59:49.444817 PCI: 00:15.1: enabled 1
801 03:59:49.445365 I2C: 00:5d: enabled 1
802 03:59:49.448036 GENERIC: 0.0: enabled 1
803 03:59:49.450886 PCI: 00:15.2: enabled 0
804 03:59:49.454252 PCI: 00:15.3: enabled 0
805 03:59:49.457021 PCI: 00:16.0: enabled 1
806 03:59:49.457471 PCI: 00:16.1: enabled 0
807 03:59:49.460743 PCI: 00:16.2: enabled 0
808 03:59:49.464146 PCI: 00:16.3: enabled 0
809 03:59:49.467318 PCI: 00:16.4: enabled 0
810 03:59:49.470215 PCI: 00:16.5: enabled 0
811 03:59:49.470657 PCI: 00:17.0: enabled 1
812 03:59:49.473855 PCI: 00:19.0: enabled 1
813 03:59:49.477210 I2C: 00:1a: enabled 1
814 03:59:49.480224 I2C: 00:38: enabled 1
815 03:59:49.483461 I2C: 00:39: enabled 1
816 03:59:49.483923 I2C: 00:3a: enabled 1
817 03:59:49.486985 I2C: 00:3b: enabled 1
818 03:59:49.489927 PCI: 00:19.1: enabled 0
819 03:59:49.493170 PCI: 00:19.2: enabled 0
820 03:59:49.493612 PCI: 00:1a.0: enabled 0
821 03:59:49.496950 PCI: 00:1c.0: enabled 0
822 03:59:49.499943 PCI: 00:1c.1: enabled 0
823 03:59:49.503049 PCI: 00:1c.2: enabled 0
824 03:59:49.506383 PCI: 00:1c.3: enabled 0
825 03:59:49.509937 PCI: 00:1c.4: enabled 0
826 03:59:49.510480 PCI: 00:1c.5: enabled 0
827 03:59:49.513362 PCI: 00:1c.6: enabled 0
828 03:59:49.516070 PCI: 00:1c.7: enabled 0
829 03:59:49.519426 PCI: 00:1d.0: enabled 1
830 03:59:49.522445 PCI: 00:1d.1: enabled 0
831 03:59:49.522906 PCI: 00:1d.2: enabled 0
832 03:59:49.525786 PCI: 00:1d.3: enabled 0
833 03:59:49.529570 PCI: 00:1d.4: enabled 0
834 03:59:49.532176 PCI: 00:1d.5: enabled 1
835 03:59:49.535400 PCI: 00:00.0: enabled 1
836 03:59:49.535848 PCI: 00:1e.0: enabled 1
837 03:59:49.538865 PCI: 00:1e.1: enabled 0
838 03:59:49.542572 PCI: 00:1e.2: enabled 1
839 03:59:49.545532 SPI: 00: enabled 1
840 03:59:49.548902 PCI: 00:1e.3: enabled 1
841 03:59:49.549450 SPI: 01: enabled 1
842 03:59:49.551755 PCI: 00:1f.0: enabled 1
843 03:59:49.555375 PNP: 0c09.0: enabled 1
844 03:59:49.558227 PCI: 00:1f.1: enabled 1
845 03:59:49.558716 PCI: 00:1f.2: enabled 1
846 03:59:49.561574 PCI: 00:1f.3: enabled 1
847 03:59:49.565003 PCI: 00:1f.4: enabled 1
848 03:59:49.568356 PCI: 00:1f.5: enabled 1
849 03:59:49.571234 PCI: 00:1f.6: enabled 0
850 03:59:49.571685 Root Device scanning...
851 03:59:49.574728 scan_static_bus for Root Device
852 03:59:49.578118 CPU_CLUSTER: 0 enabled
853 03:59:49.581316 DOMAIN: 0000 enabled
854 03:59:49.584376 DOMAIN: 0000 scanning...
855 03:59:49.588108 PCI: pci_scan_bus for bus 00
856 03:59:49.591092 PCI: 00:00.0 [8086/0000] ops
857 03:59:49.594660 PCI: 00:00.0 [8086/9b61] enabled
858 03:59:49.597742 PCI: 00:02.0 [8086/0000] bus ops
859 03:59:49.600960 PCI: 00:02.0 [8086/9b41] enabled
860 03:59:49.604041 PCI: 00:04.0 [8086/1903] disabled
861 03:59:49.607191 PCI: 00:08.0 [8086/1911] enabled
862 03:59:49.610559 PCI: 00:12.0 [8086/02f9] enabled
863 03:59:49.614018 PCI: 00:14.0 [8086/0000] bus ops
864 03:59:49.616948 PCI: 00:14.0 [8086/02ed] enabled
865 03:59:49.620576 PCI: 00:14.2 [8086/02ef] enabled
866 03:59:49.623813 PCI: 00:14.3 [8086/02f0] enabled
867 03:59:49.627089 PCI: 00:15.0 [8086/0000] bus ops
868 03:59:49.630563 PCI: 00:15.0 [8086/02e8] enabled
869 03:59:49.633587 PCI: 00:15.1 [8086/0000] bus ops
870 03:59:49.636752 PCI: 00:15.1 [8086/02e9] enabled
871 03:59:49.640273 PCI: 00:16.0 [8086/0000] ops
872 03:59:49.643667 PCI: 00:16.0 [8086/02e0] enabled
873 03:59:49.646753 PCI: 00:17.0 [8086/0000] ops
874 03:59:49.650151 PCI: 00:17.0 [8086/02d3] enabled
875 03:59:49.653465 PCI: 00:19.0 [8086/0000] bus ops
876 03:59:49.656592 PCI: 00:19.0 [8086/02c5] enabled
877 03:59:49.659717 PCI: 00:1d.0 [8086/0000] bus ops
878 03:59:49.663207 PCI: 00:1d.0 [8086/02b0] enabled
879 03:59:49.666031 PCI: Static device PCI: 00:1d.5 not found, disabling it.
880 03:59:49.669534 PCI: 00:1e.0 [8086/0000] ops
881 03:59:49.672740 PCI: 00:1e.0 [8086/02a8] enabled
882 03:59:49.676045 PCI: 00:1e.2 [8086/0000] bus ops
883 03:59:49.679620 PCI: 00:1e.2 [8086/02aa] enabled
884 03:59:49.682367 PCI: 00:1e.3 [8086/0000] bus ops
885 03:59:49.685941 PCI: 00:1e.3 [8086/02ab] enabled
886 03:59:49.688895 PCI: 00:1f.0 [8086/0000] bus ops
887 03:59:49.695485 PCI: 00:1f.0 [8086/0284] enabled
888 03:59:49.698763 PCI: Static device PCI: 00:1f.1 not found, disabling it.
889 03:59:49.705207 PCI: Static device PCI: 00:1f.2 not found, disabling it.
890 03:59:49.708493 PCI: 00:1f.3 [8086/0000] bus ops
891 03:59:49.711841 PCI: 00:1f.3 [8086/02c8] enabled
892 03:59:49.715210 PCI: 00:1f.4 [8086/0000] bus ops
893 03:59:49.718246 PCI: 00:1f.4 [8086/02a3] enabled
894 03:59:49.721822 PCI: 00:1f.5 [8086/0000] bus ops
895 03:59:49.725234 PCI: 00:1f.5 [8086/02a4] enabled
896 03:59:49.728556 PCI: Leftover static devices:
897 03:59:49.729106 PCI: 00:05.0
898 03:59:49.731368 PCI: 00:12.5
899 03:59:49.731917 PCI: 00:12.6
900 03:59:49.734728 PCI: 00:14.1
901 03:59:49.735278 PCI: 00:14.5
902 03:59:49.737846 PCI: 00:15.2
903 03:59:49.738291 PCI: 00:15.3
904 03:59:49.738644 PCI: 00:16.1
905 03:59:49.741574 PCI: 00:16.2
906 03:59:49.742189 PCI: 00:16.3
907 03:59:49.744780 PCI: 00:16.4
908 03:59:49.745327 PCI: 00:16.5
909 03:59:49.745680 PCI: 00:19.1
910 03:59:49.747682 PCI: 00:19.2
911 03:59:49.748230 PCI: 00:1a.0
912 03:59:49.751054 PCI: 00:1c.0
913 03:59:49.751598 PCI: 00:1c.1
914 03:59:49.754367 PCI: 00:1c.2
915 03:59:49.754913 PCI: 00:1c.3
916 03:59:49.755269 PCI: 00:1c.4
917 03:59:49.757217 PCI: 00:1c.5
918 03:59:49.757683 PCI: 00:1c.6
919 03:59:49.761013 PCI: 00:1c.7
920 03:59:49.761558 PCI: 00:1d.1
921 03:59:49.761962 PCI: 00:1d.2
922 03:59:49.763910 PCI: 00:1d.3
923 03:59:49.764355 PCI: 00:1d.4
924 03:59:49.767235 PCI: 00:1d.5
925 03:59:49.767676 PCI: 00:1e.1
926 03:59:49.770389 PCI: 00:1f.1
927 03:59:49.770832 PCI: 00:1f.2
928 03:59:49.771284 PCI: 00:1f.6
929 03:59:49.773599 PCI: Check your devicetree.cb.
930 03:59:49.777022 PCI: 00:02.0 scanning...
931 03:59:49.780434 scan_generic_bus for PCI: 00:02.0
932 03:59:49.783671 scan_generic_bus for PCI: 00:02.0 done
933 03:59:49.790156 scan_bus: scanning of bus PCI: 00:02.0 took 10184 usecs
934 03:59:49.793539 PCI: 00:14.0 scanning...
935 03:59:49.796882 scan_static_bus for PCI: 00:14.0
936 03:59:49.800038 USB0 port 0 enabled
937 03:59:49.800603 USB0 port 0 scanning...
938 03:59:49.803215 scan_static_bus for USB0 port 0
939 03:59:49.806398 USB2 port 0 enabled
940 03:59:49.809600 USB2 port 1 enabled
941 03:59:49.810079 USB2 port 2 disabled
942 03:59:49.812715 USB2 port 3 disabled
943 03:59:49.816453 USB2 port 5 disabled
944 03:59:49.817006 USB2 port 6 enabled
945 03:59:49.819809 USB2 port 9 enabled
946 03:59:49.822902 USB3 port 0 enabled
947 03:59:49.823351 USB3 port 1 enabled
948 03:59:49.826195 USB3 port 2 enabled
949 03:59:49.826752 USB3 port 3 enabled
950 03:59:49.829509 USB3 port 4 disabled
951 03:59:49.832819 USB2 port 0 scanning...
952 03:59:49.835826 scan_static_bus for USB2 port 0
953 03:59:49.839056 scan_static_bus for USB2 port 0 done
954 03:59:49.845630 scan_bus: scanning of bus USB2 port 0 took 9697 usecs
955 03:59:49.846217 USB2 port 1 scanning...
956 03:59:49.849571 scan_static_bus for USB2 port 1
957 03:59:49.856000 scan_static_bus for USB2 port 1 done
958 03:59:49.858813 scan_bus: scanning of bus USB2 port 1 took 9696 usecs
959 03:59:49.862284 USB2 port 6 scanning...
960 03:59:49.865806 scan_static_bus for USB2 port 6
961 03:59:49.868500 scan_static_bus for USB2 port 6 done
962 03:59:49.875272 scan_bus: scanning of bus USB2 port 6 took 9696 usecs
963 03:59:49.878146 USB2 port 9 scanning...
964 03:59:49.882135 scan_static_bus for USB2 port 9
965 03:59:49.885094 scan_static_bus for USB2 port 9 done
966 03:59:49.888289 scan_bus: scanning of bus USB2 port 9 took 9696 usecs
967 03:59:49.891505 USB3 port 0 scanning...
968 03:59:49.894648 scan_static_bus for USB3 port 0
969 03:59:49.898147 scan_static_bus for USB3 port 0 done
970 03:59:49.904234 scan_bus: scanning of bus USB3 port 0 took 9704 usecs
971 03:59:49.907857 USB3 port 1 scanning...
972 03:59:49.911296 scan_static_bus for USB3 port 1
973 03:59:49.914279 scan_static_bus for USB3 port 1 done
974 03:59:49.920800 scan_bus: scanning of bus USB3 port 1 took 9699 usecs
975 03:59:49.921355 USB3 port 2 scanning...
976 03:59:49.924318 scan_static_bus for USB3 port 2
977 03:59:49.931025 scan_static_bus for USB3 port 2 done
978 03:59:49.933682 scan_bus: scanning of bus USB3 port 2 took 9696 usecs
979 03:59:49.937046 USB3 port 3 scanning...
980 03:59:49.940346 scan_static_bus for USB3 port 3
981 03:59:49.943880 scan_static_bus for USB3 port 3 done
982 03:59:49.950421 scan_bus: scanning of bus USB3 port 3 took 9707 usecs
983 03:59:49.953827 scan_static_bus for USB0 port 0 done
984 03:59:49.960119 scan_bus: scanning of bus USB0 port 0 took 155334 usecs
985 03:59:49.963330 scan_static_bus for PCI: 00:14.0 done
986 03:59:49.970017 scan_bus: scanning of bus PCI: 00:14.0 took 172949 usecs
987 03:59:49.970573 PCI: 00:15.0 scanning...
988 03:59:49.973282 scan_generic_bus for PCI: 00:15.0
989 03:59:49.979498 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
990 03:59:49.983000 scan_generic_bus for PCI: 00:15.0 done
991 03:59:49.989860 scan_bus: scanning of bus PCI: 00:15.0 took 14349 usecs
992 03:59:49.990406 PCI: 00:15.1 scanning...
993 03:59:49.992722 scan_generic_bus for PCI: 00:15.1
994 03:59:49.999598 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
995 03:59:50.002499 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
996 03:59:50.005756 scan_generic_bus for PCI: 00:15.1 done
997 03:59:50.012133 scan_bus: scanning of bus PCI: 00:15.1 took 18607 usecs
998 03:59:50.015514 PCI: 00:19.0 scanning...
999 03:59:50.019169 scan_generic_bus for PCI: 00:19.0
1000 03:59:50.022044 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1001 03:59:50.025694 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1002 03:59:50.032042 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1003 03:59:50.035320 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1004 03:59:50.038274 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1005 03:59:50.041870 scan_generic_bus for PCI: 00:19.0 done
1006 03:59:50.048260 scan_bus: scanning of bus PCI: 00:19.0 took 30711 usecs
1007 03:59:50.051699 PCI: 00:1d.0 scanning...
1008 03:59:50.054856 do_pci_scan_bridge for PCI: 00:1d.0
1009 03:59:50.058055 PCI: pci_scan_bus for bus 01
1010 03:59:50.061248 PCI: 01:00.0 [1c5c/1327] enabled
1011 03:59:50.064439 Enabling Common Clock Configuration
1012 03:59:50.068114 L1 Sub-State supported from root port 29
1013 03:59:50.071073 L1 Sub-State Support = 0xf
1014 03:59:50.074222 CommonModeRestoreTime = 0x28
1015 03:59:50.077226 Power On Value = 0x16, Power On Scale = 0x0
1016 03:59:50.080906 ASPM: Enabled L1
1017 03:59:50.087374 scan_bus: scanning of bus PCI: 00:1d.0 took 32773 usecs
1018 03:59:50.087849 PCI: 00:1e.2 scanning...
1019 03:59:50.093853 scan_generic_bus for PCI: 00:1e.2
1020 03:59:50.097678 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1021 03:59:50.100782 scan_generic_bus for PCI: 00:1e.2 done
1022 03:59:50.106870 scan_bus: scanning of bus PCI: 00:1e.2 took 14008 usecs
1023 03:59:50.107434 PCI: 00:1e.3 scanning...
1024 03:59:50.113664 scan_generic_bus for PCI: 00:1e.3
1025 03:59:50.117216 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1026 03:59:50.120592 scan_generic_bus for PCI: 00:1e.3 done
1027 03:59:50.126660 scan_bus: scanning of bus PCI: 00:1e.3 took 14005 usecs
1028 03:59:50.127213 PCI: 00:1f.0 scanning...
1029 03:59:50.130078 scan_static_bus for PCI: 00:1f.0
1030 03:59:50.133531 PNP: 0c09.0 enabled
1031 03:59:50.136646 scan_static_bus for PCI: 00:1f.0 done
1032 03:59:50.142999 scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs
1033 03:59:50.146099 PCI: 00:1f.3 scanning...
1034 03:59:50.149865 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1035 03:59:50.153204 PCI: 00:1f.4 scanning...
1036 03:59:50.156513 scan_generic_bus for PCI: 00:1f.4
1037 03:59:50.162593 scan_generic_bus for PCI: 00:1f.4 done
1038 03:59:50.165977 scan_bus: scanning of bus PCI: 00:1f.4 took 10195 usecs
1039 03:59:50.168983 PCI: 00:1f.5 scanning...
1040 03:59:50.172610 scan_generic_bus for PCI: 00:1f.5
1041 03:59:50.175810 scan_generic_bus for PCI: 00:1f.5 done
1042 03:59:50.182263 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1043 03:59:50.189036 scan_bus: scanning of bus DOMAIN: 0000 took 604905 usecs
1044 03:59:50.191984 scan_static_bus for Root Device done
1045 03:59:50.198507 scan_bus: scanning of bus Root Device took 624772 usecs
1046 03:59:50.199086 done
1047 03:59:50.201750 Chrome EC: UHEPI supported
1048 03:59:50.208248 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1049 03:59:50.211800 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1050 03:59:50.218095 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1051 03:59:50.225999 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1052 03:59:50.229287 SPI flash protection: WPSW=0 SRP0=0
1053 03:59:50.235404 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1054 03:59:50.242085 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1055 03:59:50.242660 found VGA at PCI: 00:02.0
1056 03:59:50.245452 Setting up VGA for PCI: 00:02.0
1057 03:59:50.251889 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1058 03:59:50.254983 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1059 03:59:50.258325 Allocating resources...
1060 03:59:50.261728 Reading resources...
1061 03:59:50.265101 Root Device read_resources bus 0 link: 0
1062 03:59:50.268054 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1063 03:59:50.275009 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1064 03:59:50.277862 DOMAIN: 0000 read_resources bus 0 link: 0
1065 03:59:50.285791 PCI: 00:14.0 read_resources bus 0 link: 0
1066 03:59:50.289265 USB0 port 0 read_resources bus 0 link: 0
1067 03:59:50.297521 USB0 port 0 read_resources bus 0 link: 0 done
1068 03:59:50.300743 PCI: 00:14.0 read_resources bus 0 link: 0 done
1069 03:59:50.307765 PCI: 00:15.0 read_resources bus 1 link: 0
1070 03:59:50.310802 PCI: 00:15.0 read_resources bus 1 link: 0 done
1071 03:59:50.317913 PCI: 00:15.1 read_resources bus 2 link: 0
1072 03:59:50.321079 PCI: 00:15.1 read_resources bus 2 link: 0 done
1073 03:59:50.328614 PCI: 00:19.0 read_resources bus 3 link: 0
1074 03:59:50.335166 PCI: 00:19.0 read_resources bus 3 link: 0 done
1075 03:59:50.338399 PCI: 00:1d.0 read_resources bus 1 link: 0
1076 03:59:50.345024 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1077 03:59:50.348301 PCI: 00:1e.2 read_resources bus 4 link: 0
1078 03:59:50.355130 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1079 03:59:50.358319 PCI: 00:1e.3 read_resources bus 5 link: 0
1080 03:59:50.364811 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1081 03:59:50.368013 PCI: 00:1f.0 read_resources bus 0 link: 0
1082 03:59:50.374628 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1083 03:59:50.381184 DOMAIN: 0000 read_resources bus 0 link: 0 done
1084 03:59:50.384318 Root Device read_resources bus 0 link: 0 done
1085 03:59:50.387642 Done reading resources.
1086 03:59:50.393835 Show resources in subtree (Root Device)...After reading.
1087 03:59:50.397559 Root Device child on link 0 CPU_CLUSTER: 0
1088 03:59:50.400999 CPU_CLUSTER: 0 child on link 0 APIC: 00
1089 03:59:50.403792 APIC: 00
1090 03:59:50.404267 APIC: 03
1091 03:59:50.406908 APIC: 04
1092 03:59:50.407507 APIC: 01
1093 03:59:50.407886 APIC: 02
1094 03:59:50.410226 APIC: 05
1095 03:59:50.410705 APIC: 07
1096 03:59:50.411070 APIC: 06
1097 03:59:50.463688 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1098 03:59:50.464306 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1099 03:59:50.465160 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1100 03:59:50.465546 PCI: 00:00.0
1101 03:59:50.465962 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1102 03:59:50.466308 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1103 03:59:50.513269 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1104 03:59:50.513955 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1105 03:59:50.514756 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1106 03:59:50.515151 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1107 03:59:50.515562 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1108 03:59:50.515904 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1109 03:59:50.563348 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1110 03:59:50.563919 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1111 03:59:50.564347 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1112 03:59:50.564699 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1113 03:59:50.565361 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1114 03:59:50.591007 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1115 03:59:50.591970 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1116 03:59:50.592448 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1117 03:59:50.592813 PCI: 00:02.0
1118 03:59:50.597802 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1119 03:59:50.607770 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1120 03:59:50.617445 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1121 03:59:50.618038 PCI: 00:04.0
1122 03:59:50.621003 PCI: 00:08.0
1123 03:59:50.630453 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1124 03:59:50.633815 PCI: 00:12.0
1125 03:59:50.643552 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 03:59:50.647149 PCI: 00:14.0 child on link 0 USB0 port 0
1127 03:59:50.656772 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1128 03:59:50.659758 USB0 port 0 child on link 0 USB2 port 0
1129 03:59:50.663236 USB2 port 0
1130 03:59:50.663678 USB2 port 1
1131 03:59:50.666870 USB2 port 2
1132 03:59:50.667444 USB2 port 3
1133 03:59:50.670238 USB2 port 5
1134 03:59:50.673292 USB2 port 6
1135 03:59:50.673764 USB2 port 9
1136 03:59:50.676311 USB3 port 0
1137 03:59:50.676754 USB3 port 1
1138 03:59:50.679516 USB3 port 2
1139 03:59:50.679956 USB3 port 3
1140 03:59:50.682981 USB3 port 4
1141 03:59:50.683550 PCI: 00:14.2
1142 03:59:50.692533 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1143 03:59:50.702540 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1144 03:59:50.705662 PCI: 00:14.3
1145 03:59:50.715324 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 03:59:50.718658 PCI: 00:15.0 child on link 0 I2C: 01:15
1147 03:59:50.728714 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 03:59:50.731754 I2C: 01:15
1149 03:59:50.734807 PCI: 00:15.1 child on link 0 I2C: 02:5d
1150 03:59:50.744845 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 03:59:50.748131 I2C: 02:5d
1152 03:59:50.748678 GENERIC: 0.0
1153 03:59:50.751783 PCI: 00:16.0
1154 03:59:50.761062 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 03:59:50.761597 PCI: 00:17.0
1156 03:59:50.770972 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1157 03:59:50.780958 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1158 03:59:50.787291 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1159 03:59:50.797133 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1160 03:59:50.803792 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1161 03:59:50.813320 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1162 03:59:50.816619 PCI: 00:19.0 child on link 0 I2C: 03:1a
1163 03:59:50.826654 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 03:59:50.829642 I2C: 03:1a
1165 03:59:50.830143 I2C: 03:38
1166 03:59:50.833074 I2C: 03:39
1167 03:59:50.833615 I2C: 03:3a
1168 03:59:50.835995 I2C: 03:3b
1169 03:59:50.839133 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1170 03:59:50.849550 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1171 03:59:50.858937 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1172 03:59:50.868765 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1173 03:59:50.869315 PCI: 01:00.0
1174 03:59:50.878551 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 03:59:50.881939 PCI: 00:1e.0
1176 03:59:50.891729 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1177 03:59:50.901628 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 03:59:50.904964 PCI: 00:1e.2 child on link 0 SPI: 00
1179 03:59:50.914568 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 03:59:50.917686 SPI: 00
1181 03:59:50.921275 PCI: 00:1e.3 child on link 0 SPI: 01
1182 03:59:50.930590 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 03:59:50.931144 SPI: 01
1184 03:59:50.937474 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1185 03:59:50.944203 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1186 03:59:50.953488 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1187 03:59:50.957071 PNP: 0c09.0
1188 03:59:50.963349 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1189 03:59:50.966742 PCI: 00:1f.3
1190 03:59:50.976134 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 03:59:50.986664 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1192 03:59:50.989529 PCI: 00:1f.4
1193 03:59:50.995949 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1194 03:59:51.005860 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1195 03:59:51.008983 PCI: 00:1f.5
1196 03:59:51.018599 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1197 03:59:51.025130 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1198 03:59:51.031408 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1199 03:59:51.038098 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1200 03:59:51.041320 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1201 03:59:51.044474 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1202 03:59:51.047803 PCI: 00:17.0 18 * [0x60 - 0x67] io
1203 03:59:51.051030 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1204 03:59:51.057841 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1205 03:59:51.064040 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1206 03:59:51.073801 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1207 03:59:51.080649 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1208 03:59:51.086999 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1209 03:59:51.090266 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1210 03:59:51.099967 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1211 03:59:51.103257 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1212 03:59:51.109589 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1213 03:59:51.112863 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1214 03:59:51.119239 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1215 03:59:51.122693 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1216 03:59:51.129226 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1217 03:59:51.132602 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1218 03:59:51.139149 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1219 03:59:51.142219 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1220 03:59:51.149012 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1221 03:59:51.152569 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1222 03:59:51.158478 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1223 03:59:51.162237 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1224 03:59:51.168565 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1225 03:59:51.171683 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1226 03:59:51.178509 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1227 03:59:51.181510 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1228 03:59:51.187961 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1229 03:59:51.191634 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1230 03:59:51.197506 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1231 03:59:51.200699 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1232 03:59:51.207342 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1233 03:59:51.210495 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1234 03:59:51.220631 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1235 03:59:51.223427 avoid_fixed_resources: DOMAIN: 0000
1236 03:59:51.229987 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1237 03:59:51.236627 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1238 03:59:51.243211 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1239 03:59:51.249784 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1240 03:59:51.259472 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1241 03:59:51.265837 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1242 03:59:51.272649 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1243 03:59:51.282154 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1244 03:59:51.288683 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1245 03:59:51.295333 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1246 03:59:51.305202 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1247 03:59:51.311376 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1248 03:59:51.311962 Setting resources...
1249 03:59:51.318225 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1250 03:59:51.324583 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1251 03:59:51.328189 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1252 03:59:51.331491 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1253 03:59:51.334719 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1254 03:59:51.341150 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1255 03:59:51.347324 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1256 03:59:51.353929 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1257 03:59:51.360485 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1258 03:59:51.367157 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1259 03:59:51.370447 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1260 03:59:51.377054 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1261 03:59:51.380337 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1262 03:59:51.386614 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1263 03:59:51.390073 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1264 03:59:51.396479 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1265 03:59:51.399652 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1266 03:59:51.406205 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1267 03:59:51.409475 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1268 03:59:51.416031 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1269 03:59:51.419370 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1270 03:59:51.425846 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1271 03:59:51.429168 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1272 03:59:51.435803 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1273 03:59:51.438911 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1274 03:59:51.445515 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1275 03:59:51.448682 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1276 03:59:51.454936 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1277 03:59:51.458453 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1278 03:59:51.464816 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1279 03:59:51.468291 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1280 03:59:51.474569 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1281 03:59:51.481126 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1282 03:59:51.487576 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1283 03:59:51.497630 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1284 03:59:51.504178 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1285 03:59:51.507329 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1286 03:59:51.517237 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1287 03:59:51.520313 Root Device assign_resources, bus 0 link: 0
1288 03:59:51.523351 DOMAIN: 0000 assign_resources, bus 0 link: 0
1289 03:59:51.533630 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1290 03:59:51.540145 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1291 03:59:51.549797 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1292 03:59:51.556434 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1293 03:59:51.566628 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1294 03:59:51.573033 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1295 03:59:51.579454 PCI: 00:14.0 assign_resources, bus 0 link: 0
1296 03:59:51.582458 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 03:59:51.593005 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1298 03:59:51.598989 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1299 03:59:51.609130 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1300 03:59:51.615075 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1301 03:59:51.621664 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 03:59:51.625106 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 03:59:51.634495 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1304 03:59:51.637864 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 03:59:51.644294 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 03:59:51.650874 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1307 03:59:51.660574 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1308 03:59:51.667207 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1309 03:59:51.674035 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1310 03:59:51.683453 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1311 03:59:51.690155 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1312 03:59:51.696653 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1313 03:59:51.706726 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1314 03:59:51.709954 PCI: 00:19.0 assign_resources, bus 3 link: 0
1315 03:59:51.716649 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 03:59:51.723210 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1317 03:59:51.732709 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1318 03:59:51.742824 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1319 03:59:51.746036 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1320 03:59:51.755724 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1321 03:59:51.758841 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1322 03:59:51.768805 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1323 03:59:51.775126 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1324 03:59:51.781857 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1325 03:59:51.785532 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 03:59:51.794656 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1327 03:59:51.797912 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1328 03:59:51.801246 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 03:59:51.807816 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1330 03:59:51.811302 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 03:59:51.817583 LPC: Trying to open IO window from 800 size 1ff
1332 03:59:51.824362 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1333 03:59:51.834121 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1334 03:59:51.840495 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1335 03:59:51.850298 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1336 03:59:51.853580 DOMAIN: 0000 assign_resources, bus 0 link: 0
1337 03:59:51.860095 Root Device assign_resources, bus 0 link: 0
1338 03:59:51.863368 Done setting resources.
1339 03:59:51.870125 Show resources in subtree (Root Device)...After assigning values.
1340 03:59:51.873158 Root Device child on link 0 CPU_CLUSTER: 0
1341 03:59:51.876377 CPU_CLUSTER: 0 child on link 0 APIC: 00
1342 03:59:51.879782 APIC: 00
1343 03:59:51.880222 APIC: 03
1344 03:59:51.880569 APIC: 04
1345 03:59:51.882893 APIC: 01
1346 03:59:51.883333 APIC: 02
1347 03:59:51.886307 APIC: 05
1348 03:59:51.886744 APIC: 07
1349 03:59:51.887086 APIC: 06
1350 03:59:51.892818 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1351 03:59:51.902875 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1352 03:59:51.912174 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1353 03:59:51.915685 PCI: 00:00.0
1354 03:59:51.925114 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1355 03:59:51.931973 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1356 03:59:51.941576 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1357 03:59:51.951510 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1358 03:59:51.961142 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1359 03:59:51.970947 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1360 03:59:51.980752 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1361 03:59:51.990466 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1362 03:59:51.996895 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1363 03:59:52.007116 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1364 03:59:52.016674 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1365 03:59:52.026445 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1366 03:59:52.036229 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1367 03:59:52.045809 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1368 03:59:52.055450 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1369 03:59:52.065012 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1370 03:59:52.065494 PCI: 00:02.0
1371 03:59:52.075348 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1372 03:59:52.088160 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1373 03:59:52.094509 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1374 03:59:52.097985 PCI: 00:04.0
1375 03:59:52.101182 PCI: 00:08.0
1376 03:59:52.110906 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1377 03:59:52.111476 PCI: 00:12.0
1378 03:59:52.120618 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1379 03:59:52.127182 PCI: 00:14.0 child on link 0 USB0 port 0
1380 03:59:52.137194 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1381 03:59:52.140370 USB0 port 0 child on link 0 USB2 port 0
1382 03:59:52.143192 USB2 port 0
1383 03:59:52.143771 USB2 port 1
1384 03:59:52.146571 USB2 port 2
1385 03:59:52.147153 USB2 port 3
1386 03:59:52.149691 USB2 port 5
1387 03:59:52.153356 USB2 port 6
1388 03:59:52.153937 USB2 port 9
1389 03:59:52.156514 USB3 port 0
1390 03:59:52.157073 USB3 port 1
1391 03:59:52.159826 USB3 port 2
1392 03:59:52.160276 USB3 port 3
1393 03:59:52.163204 USB3 port 4
1394 03:59:52.163650 PCI: 00:14.2
1395 03:59:52.173227 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1396 03:59:52.186093 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1397 03:59:52.186645 PCI: 00:14.3
1398 03:59:52.195676 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1399 03:59:52.202275 PCI: 00:15.0 child on link 0 I2C: 01:15
1400 03:59:52.212472 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1401 03:59:52.213023 I2C: 01:15
1402 03:59:52.218275 PCI: 00:15.1 child on link 0 I2C: 02:5d
1403 03:59:52.228414 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1404 03:59:52.228869 I2C: 02:5d
1405 03:59:52.231181 GENERIC: 0.0
1406 03:59:52.231633 PCI: 00:16.0
1407 03:59:52.241635 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1408 03:59:52.244619 PCI: 00:17.0
1409 03:59:52.254443 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1410 03:59:52.264000 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1411 03:59:52.274158 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1412 03:59:52.283573 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1413 03:59:52.289735 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1414 03:59:52.302976 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1415 03:59:52.306601 PCI: 00:19.0 child on link 0 I2C: 03:1a
1416 03:59:52.315952 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1417 03:59:52.319179 I2C: 03:1a
1418 03:59:52.319656 I2C: 03:38
1419 03:59:52.322451 I2C: 03:39
1420 03:59:52.322933 I2C: 03:3a
1421 03:59:52.325671 I2C: 03:3b
1422 03:59:52.328824 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1423 03:59:52.338913 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1424 03:59:52.348687 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1425 03:59:52.358548 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1426 03:59:52.361877 PCI: 01:00.0
1427 03:59:52.371477 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1428 03:59:52.371931 PCI: 00:1e.0
1429 03:59:52.384371 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1430 03:59:52.394228 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1431 03:59:52.397438 PCI: 00:1e.2 child on link 0 SPI: 00
1432 03:59:52.407493 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1433 03:59:52.410372 SPI: 00
1434 03:59:52.413674 PCI: 00:1e.3 child on link 0 SPI: 01
1435 03:59:52.423471 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1436 03:59:52.423924 SPI: 01
1437 03:59:52.430519 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1438 03:59:52.436540 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1439 03:59:52.446364 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1440 03:59:52.449730 PNP: 0c09.0
1441 03:59:52.456470 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1442 03:59:52.459767 PCI: 00:1f.3
1443 03:59:52.469303 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1444 03:59:52.478929 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1445 03:59:52.482399 PCI: 00:1f.4
1446 03:59:52.492633 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1447 03:59:52.501818 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1448 03:59:52.502274 PCI: 00:1f.5
1449 03:59:52.512200 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1450 03:59:52.514834 Done allocating resources.
1451 03:59:52.521548 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1452 03:59:52.524498 Enabling resources...
1453 03:59:52.527892 PCI: 00:00.0 subsystem <- 8086/9b61
1454 03:59:52.531165 PCI: 00:00.0 cmd <- 06
1455 03:59:52.534146 PCI: 00:02.0 subsystem <- 8086/9b41
1456 03:59:52.538017 PCI: 00:02.0 cmd <- 03
1457 03:59:52.540970 PCI: 00:08.0 cmd <- 06
1458 03:59:52.544206 PCI: 00:12.0 subsystem <- 8086/02f9
1459 03:59:52.544658 PCI: 00:12.0 cmd <- 02
1460 03:59:52.550952 PCI: 00:14.0 subsystem <- 8086/02ed
1461 03:59:52.551445 PCI: 00:14.0 cmd <- 02
1462 03:59:52.553855 PCI: 00:14.2 cmd <- 02
1463 03:59:52.557635 PCI: 00:14.3 subsystem <- 8086/02f0
1464 03:59:52.560945 PCI: 00:14.3 cmd <- 02
1465 03:59:52.563791 PCI: 00:15.0 subsystem <- 8086/02e8
1466 03:59:52.567252 PCI: 00:15.0 cmd <- 02
1467 03:59:52.570370 PCI: 00:15.1 subsystem <- 8086/02e9
1468 03:59:52.573994 PCI: 00:15.1 cmd <- 02
1469 03:59:52.577021 PCI: 00:16.0 subsystem <- 8086/02e0
1470 03:59:52.580111 PCI: 00:16.0 cmd <- 02
1471 03:59:52.583736 PCI: 00:17.0 subsystem <- 8086/02d3
1472 03:59:52.587021 PCI: 00:17.0 cmd <- 03
1473 03:59:52.590360 PCI: 00:19.0 subsystem <- 8086/02c5
1474 03:59:52.593493 PCI: 00:19.0 cmd <- 02
1475 03:59:52.596316 PCI: 00:1d.0 bridge ctrl <- 0013
1476 03:59:52.599771 PCI: 00:1d.0 subsystem <- 8086/02b0
1477 03:59:52.602954 PCI: 00:1d.0 cmd <- 06
1478 03:59:52.606583 PCI: 00:1e.0 subsystem <- 8086/02a8
1479 03:59:52.609428 PCI: 00:1e.0 cmd <- 06
1480 03:59:52.612765 PCI: 00:1e.2 subsystem <- 8086/02aa
1481 03:59:52.616242 PCI: 00:1e.2 cmd <- 06
1482 03:59:52.618949 PCI: 00:1e.3 subsystem <- 8086/02ab
1483 03:59:52.619408 PCI: 00:1e.3 cmd <- 02
1484 03:59:52.626024 PCI: 00:1f.0 subsystem <- 8086/0284
1485 03:59:52.626477 PCI: 00:1f.0 cmd <- 407
1486 03:59:52.632088 PCI: 00:1f.3 subsystem <- 8086/02c8
1487 03:59:52.632625 PCI: 00:1f.3 cmd <- 02
1488 03:59:52.635648 PCI: 00:1f.4 subsystem <- 8086/02a3
1489 03:59:52.638649 PCI: 00:1f.4 cmd <- 03
1490 03:59:52.641992 PCI: 00:1f.5 subsystem <- 8086/02a4
1491 03:59:52.645500 PCI: 00:1f.5 cmd <- 406
1492 03:59:52.654589 PCI: 01:00.0 cmd <- 02
1493 03:59:52.659904 done.
1494 03:59:52.672351 ME: Version: 14.0.39.1367
1495 03:59:52.678843 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1496 03:59:52.681950 Initializing devices...
1497 03:59:52.682392 Root Device init ...
1498 03:59:52.688456 Chrome EC: Set SMI mask to 0x0000000000000000
1499 03:59:52.694860 Chrome EC: clear events_b mask to 0x0000000000000000
1500 03:59:52.698223 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1501 03:59:52.704629 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1502 03:59:52.711205 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1503 03:59:52.714420 Chrome EC: Set WAKE mask to 0x0000000000000000
1504 03:59:52.720913 Root Device init finished in 35173 usecs
1505 03:59:52.724236 CPU_CLUSTER: 0 init ...
1506 03:59:52.727635 CPU_CLUSTER: 0 init finished in 2448 usecs
1507 03:59:52.732952 PCI: 00:00.0 init ...
1508 03:59:52.736303 CPU TDP: 15 Watts
1509 03:59:52.739407 CPU PL2 = 64 Watts
1510 03:59:52.742864 PCI: 00:00.0 init finished in 7083 usecs
1511 03:59:52.745965 PCI: 00:02.0 init ...
1512 03:59:52.749048 PCI: 00:02.0 init finished in 2254 usecs
1513 03:59:52.752303 PCI: 00:08.0 init ...
1514 03:59:52.755607 PCI: 00:08.0 init finished in 2252 usecs
1515 03:59:52.758924 PCI: 00:12.0 init ...
1516 03:59:52.762600 PCI: 00:12.0 init finished in 2245 usecs
1517 03:59:52.765936 PCI: 00:14.0 init ...
1518 03:59:52.769122 PCI: 00:14.0 init finished in 2254 usecs
1519 03:59:52.772334 PCI: 00:14.2 init ...
1520 03:59:52.775712 PCI: 00:14.2 init finished in 2254 usecs
1521 03:59:52.778778 PCI: 00:14.3 init ...
1522 03:59:52.781766 PCI: 00:14.3 init finished in 2270 usecs
1523 03:59:52.785620 PCI: 00:15.0 init ...
1524 03:59:52.788980 DW I2C bus 0 at 0xd121f000 (400 KHz)
1525 03:59:52.795501 PCI: 00:15.0 init finished in 5980 usecs
1526 03:59:52.796064 PCI: 00:15.1 init ...
1527 03:59:52.801853 DW I2C bus 1 at 0xd1220000 (400 KHz)
1528 03:59:52.805336 PCI: 00:15.1 init finished in 5971 usecs
1529 03:59:52.808505 PCI: 00:16.0 init ...
1530 03:59:52.811593 PCI: 00:16.0 init finished in 2255 usecs
1531 03:59:52.814689 PCI: 00:19.0 init ...
1532 03:59:52.817772 DW I2C bus 4 at 0xd1222000 (400 KHz)
1533 03:59:52.820837 PCI: 00:19.0 init finished in 5978 usecs
1534 03:59:52.824798 PCI: 00:1d.0 init ...
1535 03:59:52.827799 Initializing PCH PCIe bridge.
1536 03:59:52.830708 PCI: 00:1d.0 init finished in 5289 usecs
1537 03:59:52.835326 PCI: 00:1f.0 init ...
1538 03:59:52.838389 IOAPIC: Initializing IOAPIC at 0xfec00000
1539 03:59:52.844793 IOAPIC: Bootstrap Processor Local APIC = 0x00
1540 03:59:52.845363 IOAPIC: ID = 0x02
1541 03:59:52.848335 IOAPIC: Dumping registers
1542 03:59:52.851447 reg 0x0000: 0x02000000
1543 03:59:52.854649 reg 0x0001: 0x00770020
1544 03:59:52.857762 reg 0x0002: 0x00000000
1545 03:59:52.861352 PCI: 00:1f.0 init finished in 23553 usecs
1546 03:59:52.864681 PCI: 00:1f.4 init ...
1547 03:59:52.867531 PCI: 00:1f.4 init finished in 2263 usecs
1548 03:59:52.879286 PCI: 01:00.0 init ...
1549 03:59:52.882346 PCI: 01:00.0 init finished in 2254 usecs
1550 03:59:52.887069 PNP: 0c09.0 init ...
1551 03:59:52.893309 Google Chrome EC uptime: 11.142 seconds
1552 03:59:52.896386 Google Chrome AP resets since EC boot: 0
1553 03:59:52.900050 Google Chrome most recent AP reset causes:
1554 03:59:52.906372 Google Chrome EC reset flags at last EC boot: reset-pin
1555 03:59:52.909637 PNP: 0c09.0 init finished in 20582 usecs
1556 03:59:52.912973 Devices initialized
1557 03:59:52.916228 Show all devs... After init.
1558 03:59:52.916788 Root Device: enabled 1
1559 03:59:52.919039 CPU_CLUSTER: 0: enabled 1
1560 03:59:52.922275 DOMAIN: 0000: enabled 1
1561 03:59:52.925903 APIC: 00: enabled 1
1562 03:59:52.926493 PCI: 00:00.0: enabled 1
1563 03:59:52.929105 PCI: 00:02.0: enabled 1
1564 03:59:52.932186 PCI: 00:04.0: enabled 0
1565 03:59:52.935754 PCI: 00:05.0: enabled 0
1566 03:59:52.936321 PCI: 00:12.0: enabled 1
1567 03:59:52.938669 PCI: 00:12.5: enabled 0
1568 03:59:52.941855 PCI: 00:12.6: enabled 0
1569 03:59:52.945183 PCI: 00:14.0: enabled 1
1570 03:59:52.945638 PCI: 00:14.1: enabled 0
1571 03:59:52.948444 PCI: 00:14.3: enabled 1
1572 03:59:52.951882 PCI: 00:14.5: enabled 0
1573 03:59:52.954914 PCI: 00:15.0: enabled 1
1574 03:59:52.955371 PCI: 00:15.1: enabled 1
1575 03:59:52.958364 PCI: 00:15.2: enabled 0
1576 03:59:52.961442 PCI: 00:15.3: enabled 0
1577 03:59:52.964626 PCI: 00:16.0: enabled 1
1578 03:59:52.965074 PCI: 00:16.1: enabled 0
1579 03:59:52.968361 PCI: 00:16.2: enabled 0
1580 03:59:52.971639 PCI: 00:16.3: enabled 0
1581 03:59:52.974655 PCI: 00:16.4: enabled 0
1582 03:59:52.975107 PCI: 00:16.5: enabled 0
1583 03:59:52.977801 PCI: 00:17.0: enabled 1
1584 03:59:52.981115 PCI: 00:19.0: enabled 1
1585 03:59:52.981565 PCI: 00:19.1: enabled 0
1586 03:59:52.984366 PCI: 00:19.2: enabled 0
1587 03:59:52.987751 PCI: 00:1a.0: enabled 0
1588 03:59:52.990940 PCI: 00:1c.0: enabled 0
1589 03:59:52.991388 PCI: 00:1c.1: enabled 0
1590 03:59:52.994333 PCI: 00:1c.2: enabled 0
1591 03:59:52.997306 PCI: 00:1c.3: enabled 0
1592 03:59:53.000866 PCI: 00:1c.4: enabled 0
1593 03:59:53.001412 PCI: 00:1c.5: enabled 0
1594 03:59:53.004531 PCI: 00:1c.6: enabled 0
1595 03:59:53.007553 PCI: 00:1c.7: enabled 0
1596 03:59:53.010675 PCI: 00:1d.0: enabled 1
1597 03:59:53.011220 PCI: 00:1d.1: enabled 0
1598 03:59:53.014108 PCI: 00:1d.2: enabled 0
1599 03:59:53.016873 PCI: 00:1d.3: enabled 0
1600 03:59:53.020387 PCI: 00:1d.4: enabled 0
1601 03:59:53.020961 PCI: 00:1d.5: enabled 0
1602 03:59:53.023704 PCI: 00:1e.0: enabled 1
1603 03:59:53.026860 PCI: 00:1e.1: enabled 0
1604 03:59:53.030325 PCI: 00:1e.2: enabled 1
1605 03:59:53.030768 PCI: 00:1e.3: enabled 1
1606 03:59:53.033510 PCI: 00:1f.0: enabled 1
1607 03:59:53.036592 PCI: 00:1f.1: enabled 0
1608 03:59:53.039749 PCI: 00:1f.2: enabled 0
1609 03:59:53.040216 PCI: 00:1f.3: enabled 1
1610 03:59:53.043388 PCI: 00:1f.4: enabled 1
1611 03:59:53.046299 PCI: 00:1f.5: enabled 1
1612 03:59:53.049781 PCI: 00:1f.6: enabled 0
1613 03:59:53.050392 USB0 port 0: enabled 1
1614 03:59:53.052855 I2C: 01:15: enabled 1
1615 03:59:53.056268 I2C: 02:5d: enabled 1
1616 03:59:53.056714 GENERIC: 0.0: enabled 1
1617 03:59:53.059671 I2C: 03:1a: enabled 1
1618 03:59:53.062758 I2C: 03:38: enabled 1
1619 03:59:53.065843 I2C: 03:39: enabled 1
1620 03:59:53.066255 I2C: 03:3a: enabled 1
1621 03:59:53.068890 I2C: 03:3b: enabled 1
1622 03:59:53.072239 PCI: 00:00.0: enabled 1
1623 03:59:53.072683 SPI: 00: enabled 1
1624 03:59:53.075560 SPI: 01: enabled 1
1625 03:59:53.078932 PNP: 0c09.0: enabled 1
1626 03:59:53.079511 USB2 port 0: enabled 1
1627 03:59:53.081911 USB2 port 1: enabled 1
1628 03:59:53.085539 USB2 port 2: enabled 0
1629 03:59:53.086283 USB2 port 3: enabled 0
1630 03:59:53.088838 USB2 port 5: enabled 0
1631 03:59:53.092081 USB2 port 6: enabled 1
1632 03:59:53.095529 USB2 port 9: enabled 1
1633 03:59:53.096081 USB3 port 0: enabled 1
1634 03:59:53.098481 USB3 port 1: enabled 1
1635 03:59:53.102101 USB3 port 2: enabled 1
1636 03:59:53.105136 USB3 port 3: enabled 1
1637 03:59:53.105685 USB3 port 4: enabled 0
1638 03:59:53.108515 APIC: 03: enabled 1
1639 03:59:53.111223 APIC: 04: enabled 1
1640 03:59:53.111669 APIC: 01: enabled 1
1641 03:59:53.114691 APIC: 02: enabled 1
1642 03:59:53.115244 APIC: 05: enabled 1
1643 03:59:53.118097 APIC: 07: enabled 1
1644 03:59:53.120953 APIC: 06: enabled 1
1645 03:59:53.121396 PCI: 00:08.0: enabled 1
1646 03:59:53.124176 PCI: 00:14.2: enabled 1
1647 03:59:53.127290 PCI: 01:00.0: enabled 1
1648 03:59:53.130828 Disabling ACPI via APMC:
1649 03:59:53.134246 done.
1650 03:59:53.137671 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1651 03:59:53.140791 ELOG: NV offset 0xaf0000 size 0x4000
1652 03:59:53.148669 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1653 03:59:53.155563 ELOG: Event(17) added with size 13 at 2023-02-26 03:59:52 UTC
1654 03:59:53.161541 ELOG: Event(92) added with size 9 at 2023-02-26 03:59:52 UTC
1655 03:59:53.168267 ELOG: Event(93) added with size 9 at 2023-02-26 03:59:52 UTC
1656 03:59:53.175018 ELOG: Event(9A) added with size 9 at 2023-02-26 03:59:52 UTC
1657 03:59:53.181230 ELOG: Event(9E) added with size 10 at 2023-02-26 03:59:52 UTC
1658 03:59:53.188207 ELOG: Event(16) added with size 11 at 2023-02-26 03:59:52 UTC
1659 03:59:53.191195 Erasing flash addr af0000 + 4 KiB
1660 03:59:53.257151 ELOG: Event(9F) added with size 14 at 2023-02-26 03:59:53 UTC
1661 03:59:53.263619 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 58
1662 03:59:53.270184 ELOG: Event(A1) added with size 10 at 2023-02-26 03:59:53 UTC
1663 03:59:53.276501 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1664 03:59:53.282937 ELOG: Event(A0) added with size 9 at 2023-02-26 03:59:53 UTC
1665 03:59:53.289607 elog_add_boot_reason: Logged dev mode boot
1666 03:59:53.290129 Finalize devices...
1667 03:59:53.292966 PCI: 00:17.0 final
1668 03:59:53.296370 Devices finalized
1669 03:59:53.299129 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1670 03:59:53.306116 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1671 03:59:53.309450 ME: HFSTS1 : 0x90000245
1672 03:59:53.312609 ME: HFSTS2 : 0x3B850126
1673 03:59:53.318833 ME: HFSTS3 : 0x00000020
1674 03:59:53.322006 ME: HFSTS4 : 0x00004800
1675 03:59:53.325250 ME: HFSTS5 : 0x00000000
1676 03:59:53.328403 ME: HFSTS6 : 0x40400006
1677 03:59:53.332136 ME: Manufacturing Mode : NO
1678 03:59:53.335132 ME: FW Partition Table : OK
1679 03:59:53.338566 ME: Bringup Loader Failure : NO
1680 03:59:53.341820 ME: Firmware Init Complete : YES
1681 03:59:53.345152 ME: Boot Options Present : NO
1682 03:59:53.348252 ME: Update In Progress : NO
1683 03:59:53.351496 ME: D0i3 Support : YES
1684 03:59:53.354843 ME: Low Power State Enabled : NO
1685 03:59:53.361398 ME: CPU Replaced : NO
1686 03:59:53.364555 ME: CPU Replacement Valid : YES
1687 03:59:53.367935 ME: Current Working State : 5
1688 03:59:53.371213 ME: Current Operation State : 1
1689 03:59:53.374446 ME: Current Operation Mode : 0
1690 03:59:53.377974 ME: Error Code : 0
1691 03:59:53.381149 ME: CPU Debug Disabled : YES
1692 03:59:53.384152 ME: TXT Support : NO
1693 03:59:53.387197 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1694 03:59:53.394143 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1695 03:59:53.397218 CBFS @ c08000 size 3f8000
1696 03:59:53.400390 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1697 03:59:53.406784 CBFS: Locating 'fallback/dsdt.aml'
1698 03:59:53.410346 CBFS: Found @ offset 10bb80 size 3fa5
1699 03:59:53.413671 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1700 03:59:53.417056 CBFS @ c08000 size 3f8000
1701 03:59:53.423235 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1702 03:59:53.426391 CBFS: Locating 'fallback/slic'
1703 03:59:53.429700 CBFS: 'fallback/slic' not found.
1704 03:59:53.436179 ACPI: Writing ACPI tables at 99b3e000.
1705 03:59:53.436735 ACPI: * FACS
1706 03:59:53.439720 ACPI: * DSDT
1707 03:59:53.442943 Ramoops buffer: 0x100000@0x99a3d000.
1708 03:59:53.446023 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1709 03:59:53.452564 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1710 03:59:53.456189 Google Chrome EC: version:
1711 03:59:53.459249 ro: helios_v2.0.2659-56403530b
1712 03:59:53.462886 rw: helios_v2.0.2849-c41de27e7d
1713 03:59:53.463447 running image: 1
1714 03:59:53.467259 ACPI: * FADT
1715 03:59:53.467712 SCI is IRQ9
1716 03:59:53.473638 ACPI: added table 1/32, length now 40
1717 03:59:53.474242 ACPI: * SSDT
1718 03:59:53.476666 Found 1 CPU(s) with 8 core(s) each.
1719 03:59:53.483365 Error: Could not locate 'wifi_sar' in VPD.
1720 03:59:53.486636 Checking CBFS for default SAR values
1721 03:59:53.489807 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1722 03:59:53.493322 CBFS @ c08000 size 3f8000
1723 03:59:53.499836 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1724 03:59:53.503237 CBFS: Locating 'wifi_sar_defaults.hex'
1725 03:59:53.506422 CBFS: Found @ offset 5fac0 size 77
1726 03:59:53.509644 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1727 03:59:53.515946 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1728 03:59:53.519559 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1729 03:59:53.525444 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1730 03:59:53.528868 failed to find key in VPD: dsm_calib_r0_0
1731 03:59:53.539040 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1732 03:59:53.545289 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1733 03:59:53.548418 failed to find key in VPD: dsm_calib_r0_1
1734 03:59:53.558637 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1735 03:59:53.561535 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1736 03:59:53.567827 failed to find key in VPD: dsm_calib_r0_2
1737 03:59:53.574600 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1738 03:59:53.581066 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1739 03:59:53.584204 failed to find key in VPD: dsm_calib_r0_3
1740 03:59:53.594626 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1741 03:59:53.600435 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1742 03:59:53.603762 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1743 03:59:53.607882 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1744 03:59:53.610651 EC returned error result code 1
1745 03:59:53.613838 EC returned error result code 1
1746 03:59:53.620688 EC returned error result code 1
1747 03:59:53.623866 PS2K: Bad resp from EC. Vivaldi disabled!
1748 03:59:53.630390 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1749 03:59:53.633962 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1750 03:59:53.640689 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1751 03:59:53.643991 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1752 03:59:53.650078 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1753 03:59:53.656820 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1754 03:59:53.663400 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1755 03:59:53.669879 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1756 03:59:53.672752 ACPI: added table 2/32, length now 44
1757 03:59:53.673201 ACPI: * MCFG
1758 03:59:53.676415 ACPI: added table 3/32, length now 48
1759 03:59:53.679322 ACPI: * TPM2
1760 03:59:53.682604 TPM2 log created at 99a2d000
1761 03:59:53.685837 ACPI: added table 4/32, length now 52
1762 03:59:53.689114 ACPI: * MADT
1763 03:59:53.689660 SCI is IRQ9
1764 03:59:53.692583 ACPI: added table 5/32, length now 56
1765 03:59:53.695639 current = 99b43ac0
1766 03:59:53.696089 ACPI: * DMAR
1767 03:59:53.698947 ACPI: added table 6/32, length now 60
1768 03:59:53.702280 ACPI: * IGD OpRegion
1769 03:59:53.705668 GMA: Found VBT in CBFS
1770 03:59:53.708822 GMA: Found valid VBT in CBFS
1771 03:59:53.712324 ACPI: added table 7/32, length now 64
1772 03:59:53.712875 ACPI: * HPET
1773 03:59:53.718379 ACPI: added table 8/32, length now 68
1774 03:59:53.718925 ACPI: done.
1775 03:59:53.721688 ACPI tables: 31744 bytes.
1776 03:59:53.725024 smbios_write_tables: 99a2c000
1777 03:59:53.728443 EC returned error result code 3
1778 03:59:53.732010 Couldn't obtain OEM name from CBI
1779 03:59:53.735056 Create SMBIOS type 17
1780 03:59:53.738165 PCI: 00:00.0 (Intel Cannonlake)
1781 03:59:53.741210 PCI: 00:14.3 (Intel WiFi)
1782 03:59:53.741662 SMBIOS tables: 939 bytes.
1783 03:59:53.748198 Writing table forward entry at 0x00000500
1784 03:59:53.751242 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1785 03:59:53.757744 Writing coreboot table at 0x99b62000
1786 03:59:53.761274 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1787 03:59:53.767487 1. 0000000000001000-000000000009ffff: RAM
1788 03:59:53.771002 2. 00000000000a0000-00000000000fffff: RESERVED
1789 03:59:53.777293 3. 0000000000100000-0000000099a2bfff: RAM
1790 03:59:53.780646 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1791 03:59:53.787132 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1792 03:59:53.793693 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1793 03:59:53.796836 7. 000000009a000000-000000009f7fffff: RESERVED
1794 03:59:53.803843 8. 00000000e0000000-00000000efffffff: RESERVED
1795 03:59:53.806944 9. 00000000fc000000-00000000fc000fff: RESERVED
1796 03:59:53.810268 10. 00000000fe000000-00000000fe00ffff: RESERVED
1797 03:59:53.816878 11. 00000000fed10000-00000000fed17fff: RESERVED
1798 03:59:53.819920 12. 00000000fed80000-00000000fed83fff: RESERVED
1799 03:59:53.826179 13. 00000000fed90000-00000000fed91fff: RESERVED
1800 03:59:53.829358 14. 00000000feda0000-00000000feda1fff: RESERVED
1801 03:59:53.836218 15. 0000000100000000-000000045e7fffff: RAM
1802 03:59:53.838948 Graphics framebuffer located at 0xc0000000
1803 03:59:53.842381 Passing 5 GPIOs to payload:
1804 03:59:53.845910 NAME | PORT | POLARITY | VALUE
1805 03:59:53.852499 write protect | undefined | high | low
1806 03:59:53.858707 lid | undefined | high | high
1807 03:59:53.861876 power | undefined | high | low
1808 03:59:53.868499 oprom | undefined | high | low
1809 03:59:53.874998 EC in RW | 0x000000cb | high | low
1810 03:59:53.875567 Board ID: 4
1811 03:59:53.881853 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1812 03:59:53.882428 CBFS @ c08000 size 3f8000
1813 03:59:53.888121 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1814 03:59:53.894849 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6d56
1815 03:59:53.897905 coreboot table: 1492 bytes.
1816 03:59:53.900995 IMD ROOT 0. 99fff000 00001000
1817 03:59:53.904182 IMD SMALL 1. 99ffe000 00001000
1818 03:59:53.907577 FSP MEMORY 2. 99c4e000 003b0000
1819 03:59:53.910877 CONSOLE 3. 99c2e000 00020000
1820 03:59:53.914039 FMAP 4. 99c2d000 0000054e
1821 03:59:53.917225 TIME STAMP 5. 99c2c000 00000910
1822 03:59:53.920810 VBOOT WORK 6. 99c18000 00014000
1823 03:59:53.923719 MRC DATA 7. 99c16000 00001958
1824 03:59:53.927133 ROMSTG STCK 8. 99c15000 00001000
1825 03:59:53.930386 AFTER CAR 9. 99c0b000 0000a000
1826 03:59:53.933781 RAMSTAGE 10. 99baf000 0005c000
1827 03:59:53.937039 REFCODE 11. 99b7a000 00035000
1828 03:59:53.940053 SMM BACKUP 12. 99b6a000 00010000
1829 03:59:53.943738 COREBOOT 13. 99b62000 00008000
1830 03:59:53.946953 ACPI 14. 99b3e000 00024000
1831 03:59:53.949856 ACPI GNVS 15. 99b3d000 00001000
1832 03:59:53.953477 RAMOOPS 16. 99a3d000 00100000
1833 03:59:53.956711 TPM2 TCGLOG17. 99a2d000 00010000
1834 03:59:53.959603 SMBIOS 18. 99a2c000 00000800
1835 03:59:53.962777 IMD small region:
1836 03:59:53.966322 IMD ROOT 0. 99ffec00 00000400
1837 03:59:53.969417 FSP RUNTIME 1. 99ffebe0 00000004
1838 03:59:53.973125 EC HOSTEVENT 2. 99ffebc0 00000008
1839 03:59:53.976131 POWER STATE 3. 99ffeb80 00000040
1840 03:59:53.979594 ROMSTAGE 4. 99ffeb60 00000004
1841 03:59:53.982454 MEM INFO 5. 99ffe9a0 000001b9
1842 03:59:53.985698 VPD 6. 99ffe920 0000006c
1843 03:59:53.989049 MTRR: Physical address space:
1844 03:59:53.995583 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1845 03:59:54.001919 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1846 03:59:54.008859 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1847 03:59:54.015465 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1848 03:59:54.021755 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1849 03:59:54.028431 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1850 03:59:54.034608 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1851 03:59:54.037770 MTRR: Fixed MSR 0x250 0x0606060606060606
1852 03:59:54.041296 MTRR: Fixed MSR 0x258 0x0606060606060606
1853 03:59:54.047691 MTRR: Fixed MSR 0x259 0x0000000000000000
1854 03:59:54.050700 MTRR: Fixed MSR 0x268 0x0606060606060606
1855 03:59:54.054342 MTRR: Fixed MSR 0x269 0x0606060606060606
1856 03:59:54.057438 MTRR: Fixed MSR 0x26a 0x0606060606060606
1857 03:59:54.063721 MTRR: Fixed MSR 0x26b 0x0606060606060606
1858 03:59:54.067165 MTRR: Fixed MSR 0x26c 0x0606060606060606
1859 03:59:54.070225 MTRR: Fixed MSR 0x26d 0x0606060606060606
1860 03:59:54.073692 MTRR: Fixed MSR 0x26e 0x0606060606060606
1861 03:59:54.080513 MTRR: Fixed MSR 0x26f 0x0606060606060606
1862 03:59:54.083293 call enable_fixed_mtrr()
1863 03:59:54.086474 CPU physical address size: 39 bits
1864 03:59:54.089878 MTRR: default type WB/UC MTRR counts: 6/8.
1865 03:59:54.093211 MTRR: WB selected as default type.
1866 03:59:54.099640 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1867 03:59:54.106665 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1868 03:59:54.112713 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1869 03:59:54.119351 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1870 03:59:54.125721 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1871 03:59:54.132001 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1872 03:59:54.135812 MTRR: Fixed MSR 0x250 0x0606060606060606
1873 03:59:54.139080 MTRR: Fixed MSR 0x258 0x0606060606060606
1874 03:59:54.145610 MTRR: Fixed MSR 0x259 0x0000000000000000
1875 03:59:54.148867 MTRR: Fixed MSR 0x268 0x0606060606060606
1876 03:59:54.151943 MTRR: Fixed MSR 0x269 0x0606060606060606
1877 03:59:54.155282 MTRR: Fixed MSR 0x26a 0x0606060606060606
1878 03:59:54.161686 MTRR: Fixed MSR 0x26b 0x0606060606060606
1879 03:59:54.164710 MTRR: Fixed MSR 0x26c 0x0606060606060606
1880 03:59:54.168055 MTRR: Fixed MSR 0x26d 0x0606060606060606
1881 03:59:54.171322 MTRR: Fixed MSR 0x26e 0x0606060606060606
1882 03:59:54.178078 MTRR: Fixed MSR 0x26f 0x0606060606060606
1883 03:59:54.178652
1884 03:59:54.179011 MTRR check
1885 03:59:54.180776 Fixed MTRRs : Enabled
1886 03:59:54.184149 Variable MTRRs: Enabled
1887 03:59:54.184597
1888 03:59:54.187366 call enable_fixed_mtrr()
1889 03:59:54.190660 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1890 03:59:54.193852 CPU physical address size: 39 bits
1891 03:59:54.200832 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1892 03:59:54.204053 MTRR: Fixed MSR 0x250 0x0606060606060606
1893 03:59:54.207303 MTRR: Fixed MSR 0x258 0x0606060606060606
1894 03:59:54.213966 MTRR: Fixed MSR 0x259 0x0000000000000000
1895 03:59:54.217283 MTRR: Fixed MSR 0x268 0x0606060606060606
1896 03:59:54.220539 MTRR: Fixed MSR 0x269 0x0606060606060606
1897 03:59:54.223227 MTRR: Fixed MSR 0x26a 0x0606060606060606
1898 03:59:54.229978 MTRR: Fixed MSR 0x26b 0x0606060606060606
1899 03:59:54.233375 MTRR: Fixed MSR 0x26c 0x0606060606060606
1900 03:59:54.236858 MTRR: Fixed MSR 0x26d 0x0606060606060606
1901 03:59:54.239720 MTRR: Fixed MSR 0x26e 0x0606060606060606
1902 03:59:54.246598 MTRR: Fixed MSR 0x26f 0x0606060606060606
1903 03:59:54.249605 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 03:59:54.252758 call enable_fixed_mtrr()
1905 03:59:54.255950 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 03:59:54.259508 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 03:59:54.266113 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 03:59:54.268919 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 03:59:54.272564 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 03:59:54.275908 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 03:59:54.282048 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 03:59:54.285329 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 03:59:54.288656 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 03:59:54.291630 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 03:59:54.298620 CPU physical address size: 39 bits
1916 03:59:54.299238 call enable_fixed_mtrr()
1917 03:59:54.304701 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 03:59:54.308244 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 03:59:54.311653 MTRR: Fixed MSR 0x258 0x0606060606060606
1920 03:59:54.317593 MTRR: Fixed MSR 0x259 0x0000000000000000
1921 03:59:54.321249 MTRR: Fixed MSR 0x268 0x0606060606060606
1922 03:59:54.324611 MTRR: Fixed MSR 0x269 0x0606060606060606
1923 03:59:54.327393 MTRR: Fixed MSR 0x26a 0x0606060606060606
1924 03:59:54.334069 MTRR: Fixed MSR 0x26b 0x0606060606060606
1925 03:59:54.337780 MTRR: Fixed MSR 0x26c 0x0606060606060606
1926 03:59:54.340466 MTRR: Fixed MSR 0x26d 0x0606060606060606
1927 03:59:54.343715 MTRR: Fixed MSR 0x26e 0x0606060606060606
1928 03:59:54.350537 MTRR: Fixed MSR 0x26f 0x0606060606060606
1929 03:59:54.353778 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 03:59:54.356639 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 03:59:54.360376 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 03:59:54.366547 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 03:59:54.370071 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 03:59:54.373497 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 03:59:54.376780 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 03:59:54.382781 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 03:59:54.386177 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 03:59:54.389227 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 03:59:54.392623 call enable_fixed_mtrr()
1940 03:59:54.395843 call enable_fixed_mtrr()
1941 03:59:54.398997 CPU physical address size: 39 bits
1942 03:59:54.402405 CPU physical address size: 39 bits
1943 03:59:54.406015 CPU physical address size: 39 bits
1944 03:59:54.409304 MTRR: Fixed MSR 0x250 0x0606060606060606
1945 03:59:54.415377 MTRR: Fixed MSR 0x250 0x0606060606060606
1946 03:59:54.418721 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 03:59:54.422258 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 03:59:54.425148 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 03:59:54.431835 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 03:59:54.435098 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 03:59:54.438421 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 03:59:54.441543 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 03:59:54.447942 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 03:59:54.451238 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 03:59:54.454627 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 03:59:54.461424 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 03:59:54.464772 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 03:59:54.468068 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 03:59:54.470763 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 03:59:54.477186 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 03:59:54.481022 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 03:59:54.483712 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 03:59:54.487594 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 03:59:54.493659 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 03:59:54.497087 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 03:59:54.500103 call enable_fixed_mtrr()
1967 03:59:54.503281 call enable_fixed_mtrr()
1968 03:59:54.503728 CBFS @ c08000 size 3f8000
1969 03:59:54.509869 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1970 03:59:54.513350 CPU physical address size: 39 bits
1971 03:59:54.516580 CPU physical address size: 39 bits
1972 03:59:54.519564 CBFS: Locating 'fallback/payload'
1973 03:59:54.526804 CBFS: Found @ offset 1c96c0 size 3f798
1974 03:59:54.530140 Checking segment from ROM address 0xffdd16f8
1975 03:59:54.533640 Checking segment from ROM address 0xffdd1714
1976 03:59:54.540119 Loading segment from ROM address 0xffdd16f8
1977 03:59:54.543424 code (compression=0)
1978 03:59:54.550092 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1979 03:59:54.559285 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1980 03:59:54.559831 it's not compressed!
1981 03:59:54.653270 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1982 03:59:54.659627 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1983 03:59:54.666585 Loading segment from ROM address 0xffdd1714
1984 03:59:54.667137 Entry Point 0x30000000
1985 03:59:54.669372 Loaded segments
1986 03:59:54.675892 Finalizing chipset.
1987 03:59:54.678407 Finalizing SMM.
1988 03:59:54.681834 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1989 03:59:54.685123 mp_park_aps done after 0 msecs.
1990 03:59:54.691559 Jumping to boot code at 30000000(99b62000)
1991 03:59:54.698216 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1992 03:59:54.698763
1993 03:59:54.699139
1994 03:59:54.699471
1995 03:59:54.701514 Starting depthcharge on Helios...
1996 03:59:54.702002
1997 03:59:54.703031 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
1998 03:59:54.703539 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
1999 03:59:54.703944 Setting prompt string to ['hatch:']
2000 03:59:54.704385 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
2001 03:59:54.711353 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2002 03:59:54.711911
2003 03:59:54.718222 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2004 03:59:54.718781
2005 03:59:54.724592 board_setup: Info: eMMC controller not present; skipping
2006 03:59:54.725164
2007 03:59:54.727558 New NVMe Controller 0x30053ac0 @ 00:1d:00
2008 03:59:54.728012
2009 03:59:54.733962 board_setup: Info: SDHCI controller not present; skipping
2010 03:59:54.734420
2011 03:59:54.740845 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2012 03:59:54.741408
2013 03:59:54.741823 Wipe memory regions:
2014 03:59:54.743532
2015 03:59:54.747194 [0x00000000001000, 0x000000000a0000)
2016 03:59:54.747783
2017 03:59:54.750159 [0x00000000100000, 0x00000030000000)
2018 03:59:54.811457
2019 03:59:54.814536 [0x00000030657430, 0x00000099a2c000)
2020 03:59:54.944817
2021 03:59:54.947833 [0x00000100000000, 0x0000045e800000)
2022 03:59:56.866003
2023 03:59:56.866578 R8152: Initializing
2024 03:59:56.866940
2025 03:59:56.868837 Version 6 (ocp_data = 5c30)
2026 03:59:56.869280
2027 03:59:56.872017 R8152: Done initializing
2028 03:59:56.872370
2029 03:59:56.875412 Adding net device
2030 03:59:56.875496
2031 03:59:56.882116 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2032 03:59:56.882293
2033 03:59:56.882390
2034 03:59:56.882470
2035 03:59:56.882780 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2037 03:59:56.984059 hatch: tftpboot 192.168.201.1 9338319/tftp-deploy-w21221ve/kernel/bzImage 9338319/tftp-deploy-w21221ve/kernel/cmdline 9338319/tftp-deploy-w21221ve/ramdisk/ramdisk.cpio.gz
2038 03:59:56.984723 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2039 03:59:56.985191 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
2040 03:59:56.989910 tftpboot 192.168.201.1 9338319/tftp-deploy-w21221ve/kernel/bzIoy-w21221ve/kernel/cmdline 9338319/tftp-deploy-w21221ve/ramdisk/ramdisk.cpio.gz
2041 03:59:56.990454
2042 03:59:56.990812 Waiting for link
2043 03:59:57.190701
2044 03:59:57.191246 done.
2045 03:59:57.191603
2046 03:59:57.191938 MAC: 00:24:32:50:21:91
2047 03:59:57.192269
2048 03:59:57.193859 Sending DHCP discover... done.
2049 03:59:57.194314
2050 03:59:57.197153 Waiting for reply... done.
2051 03:59:57.197604
2052 03:59:57.200325 Sending DHCP request... done.
2053 03:59:57.200775
2054 03:59:57.206927 Waiting for reply... done.
2055 03:59:57.207476
2056 03:59:57.207836 My ip is 192.168.201.14
2057 03:59:57.208172
2058 03:59:57.213694 The DHCP server ip is 192.168.201.1
2059 03:59:57.214281
2060 03:59:57.217017 TFTP server IP predefined by user: 192.168.201.1
2061 03:59:57.217571
2062 03:59:57.223622 Bootfile predefined by user: 9338319/tftp-deploy-w21221ve/kernel/bzImage
2063 03:59:57.224180
2064 03:59:57.226257 Sending tftp read request... done.
2065 03:59:57.226708
2066 03:59:57.233580 Waiting for the transfer...
2067 03:59:57.234179
2068 03:59:57.942105 00000000 ################################################################
2069 03:59:57.942804
2070 03:59:58.678692 00080000 ################################################################
2071 03:59:58.679273
2072 03:59:59.324935 00100000 ################################################################
2073 03:59:59.325506
2074 04:00:00.036814 00180000 ################################################################
2075 04:00:00.037422
2076 04:00:00.762188 00200000 ################################################################
2077 04:00:00.762734
2078 04:00:01.507353 00280000 ################################################################
2079 04:00:01.507912
2080 04:00:02.252556 00300000 ################################################################
2081 04:00:02.253119
2082 04:00:02.937479 00380000 ################################################################
2083 04:00:02.938063
2084 04:00:03.665889 00400000 ################################################################
2085 04:00:03.666440
2086 04:00:04.402277 00480000 ################################################################
2087 04:00:04.402842
2088 04:00:05.123669 00500000 ################################################################
2089 04:00:05.124245
2090 04:00:05.847501 00580000 ################################################################
2091 04:00:05.848068
2092 04:00:06.564877 00600000 ################################################################
2093 04:00:06.565428
2094 04:00:07.282621 00680000 ################################################################
2095 04:00:07.283164
2096 04:00:07.602427 00700000 ############################# done.
2097 04:00:07.603047
2098 04:00:07.605812 The bootfile was 7573392 bytes long.
2099 04:00:07.606275
2100 04:00:07.609422 Sending tftp read request... done.
2101 04:00:07.610044
2102 04:00:07.612385 Waiting for the transfer...
2103 04:00:07.612840
2104 04:00:08.301936 00000000 ################################################################
2105 04:00:08.302516
2106 04:00:08.997175 00080000 ################################################################
2107 04:00:08.997759
2108 04:00:09.695975 00100000 ################################################################
2109 04:00:09.696527
2110 04:00:10.396958 00180000 ################################################################
2111 04:00:10.397525
2112 04:00:11.077384 00200000 ################################################################
2113 04:00:11.077544
2114 04:00:11.685264 00280000 ################################################################
2115 04:00:11.685409
2116 04:00:12.226223 00300000 ################################################################
2117 04:00:12.226380
2118 04:00:12.796673 00380000 ################################################################
2119 04:00:12.796837
2120 04:00:13.366404 00400000 ################################################################
2121 04:00:13.366561
2122 04:00:13.939827 00480000 ################################################################
2123 04:00:13.939979
2124 04:00:14.219687 00500000 ############################### done.
2125 04:00:14.219849
2126 04:00:14.222867 Sending tftp read request... done.
2127 04:00:14.222954
2128 04:00:14.226243 Waiting for the transfer...
2129 04:00:14.226330
2130 04:00:14.226399 00000000 # done.
2131 04:00:14.226465
2132 04:00:14.236111 Command line loaded dynamically from TFTP file: 9338319/tftp-deploy-w21221ve/kernel/cmdline
2133 04:00:14.236198
2134 04:00:14.262176 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9338319/extract-nfsrootfs-brszwu8u,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2135 04:00:14.262267
2136 04:00:14.268486 ec_init(0): CrosEC protocol v3 supported (256, 256)
2137 04:00:14.272443
2138 04:00:14.275450 Shutting down all USB controllers.
2139 04:00:14.279468
2140 04:00:14.279554 Removing current net device
2141 04:00:14.283044
2142 04:00:14.283134 Finalizing coreboot
2143 04:00:14.283204
2144 04:00:14.289601 Exiting depthcharge with code 4 at timestamp: 26994230
2145 04:00:14.289688
2146 04:00:14.289793
2147 04:00:14.289858 Starting kernel ...
2148 04:00:14.289919
2149 04:00:14.290281 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2150 04:00:14.290376 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2151 04:00:14.290451 Setting prompt string to ['Linux version [0-9]']
2152 04:00:14.290520 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2153 04:00:14.290590 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2154 04:00:14.292726
2156 04:04:34.291259 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2158 04:04:34.292347 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2160 04:04:34.293242 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2163 04:04:34.294853 end: 2 depthcharge-action (duration 00:05:00) [common]
2165 04:04:34.296026 Cleaning after the job
2166 04:04:34.296472 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9338319/tftp-deploy-w21221ve/ramdisk
2167 04:04:34.298622 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9338319/tftp-deploy-w21221ve/kernel
2168 04:04:34.301077 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9338319/tftp-deploy-w21221ve/nfsrootfs
2169 04:04:34.377114 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9338319/tftp-deploy-w21221ve/modules
2170 04:04:34.377423 start: 4.1 power-off (timeout 00:00:30) [common]
2171 04:04:34.377620 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
2172 04:04:36.546623 >> Command sent successfully.
2173 04:04:36.549167 Returned 0 in 2 seconds
2174 04:04:36.650406 end: 4.1 power-off (duration 00:00:02) [common]
2176 04:04:36.651855 start: 4.2 read-feedback (timeout 00:09:58) [common]
2177 04:04:36.652983 Listened to connection for namespace 'common' for up to 1s
2179 04:04:36.654337 Listened to connection for namespace 'common' for up to 1s
2180 04:04:36.654639 Listened to connection for namespace 'common' for up to 1s
2181 04:04:36.654957 Listened to connection for namespace 'common' for up to 1s
2182 04:04:36.655293 Listened to connection for namespace 'common' for up to 1s
2183 04:04:37.657677 Finalising connection for namespace 'common'
2184 04:04:37.658524 Disconnecting from shell: Finalise
2185 04:04:37.658943
2186 04:04:37.761298 end: 4.2 read-feedback (duration 00:00:01) [common]
2187 04:04:37.761919 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9338319
2188 04:04:37.949422 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9338319
2189 04:04:37.949621 JobError: Your job cannot terminate cleanly.