Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 03:53:45.957397 lava-dispatcher, installed at version: 2022.11
2 03:53:45.957587 start: 0 validate
3 03:53:45.957720 Start time: 2023-02-26 03:53:45.957711+00:00 (UTC)
4 03:53:45.957847 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:53:45.957976 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230217.0%2Famd64%2Finitrd.cpio.gz exists
6 03:53:46.248500 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:53:46.248664 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-938-gc773c630d0e4f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:53:46.255774 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:53:46.255927 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230217.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 03:53:46.550504 Using caching service: 'http://localhost/cache/?uri=%s'
11 03:53:46.550715 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-938-gc773c630d0e4f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 03:53:46.568743 validate duration: 0.61
14 03:53:46.569001 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 03:53:46.569102 start: 1.1 download-retry (timeout 00:10:00) [common]
16 03:53:46.569191 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 03:53:46.569289 Not decompressing ramdisk as can be used compressed.
18 03:53:46.569415 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230217.0/amd64/initrd.cpio.gz
19 03:53:46.569491 saving as /var/lib/lava/dispatcher/tmp/9338283/tftp-deploy-88_dh9ll/ramdisk/initrd.cpio.gz
20 03:53:46.569556 total size: 5432126 (5MB)
21 03:53:46.572696 progress 0% (0MB)
22 03:53:46.584315 progress 5% (0MB)
23 03:53:46.595131 progress 10% (0MB)
24 03:53:46.607118 progress 15% (0MB)
25 03:53:46.618827 progress 20% (1MB)
26 03:53:46.629389 progress 25% (1MB)
27 03:53:46.640030 progress 30% (1MB)
28 03:53:46.655739 progress 35% (1MB)
29 03:53:46.663121 progress 40% (2MB)
30 03:53:46.674634 progress 45% (2MB)
31 03:53:46.684876 progress 50% (2MB)
32 03:53:46.696922 progress 55% (2MB)
33 03:53:46.706728 progress 60% (3MB)
34 03:53:46.716992 progress 65% (3MB)
35 03:53:46.730250 progress 70% (3MB)
36 03:53:46.746353 progress 75% (3MB)
37 03:53:46.758202 progress 80% (4MB)
38 03:53:46.773090 progress 85% (4MB)
39 03:53:46.787273 progress 90% (4MB)
40 03:53:46.802454 progress 95% (4MB)
41 03:53:46.813112 progress 100% (5MB)
42 03:53:46.813433 5MB downloaded in 0.24s (21.24MB/s)
43 03:53:46.813604 end: 1.1.1 http-download (duration 00:00:00) [common]
45 03:53:46.813903 end: 1.1 download-retry (duration 00:00:00) [common]
46 03:53:46.813997 start: 1.2 download-retry (timeout 00:10:00) [common]
47 03:53:46.814112 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 03:53:46.814237 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-938-gc773c630d0e4f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 03:53:46.814310 saving as /var/lib/lava/dispatcher/tmp/9338283/tftp-deploy-88_dh9ll/kernel/bzImage
50 03:53:46.814389 total size: 7573392 (7MB)
51 03:53:46.814454 No compression specified
52 03:53:46.825591 progress 0% (0MB)
53 03:53:46.848104 progress 5% (0MB)
54 03:53:46.867651 progress 10% (0MB)
55 03:53:46.891809 progress 15% (1MB)
56 03:53:46.909098 progress 20% (1MB)
57 03:53:46.928184 progress 25% (1MB)
58 03:53:46.946204 progress 30% (2MB)
59 03:53:46.968213 progress 35% (2MB)
60 03:53:46.985732 progress 40% (2MB)
61 03:53:47.005922 progress 45% (3MB)
62 03:53:47.025675 progress 50% (3MB)
63 03:53:47.045287 progress 55% (4MB)
64 03:53:47.063461 progress 60% (4MB)
65 03:53:47.082580 progress 65% (4MB)
66 03:53:47.100392 progress 70% (5MB)
67 03:53:47.120695 progress 75% (5MB)
68 03:53:47.137983 progress 80% (5MB)
69 03:53:47.148589 progress 85% (6MB)
70 03:53:47.163365 progress 90% (6MB)
71 03:53:47.184042 progress 95% (6MB)
72 03:53:47.200343 progress 100% (7MB)
73 03:53:47.200565 7MB downloaded in 0.39s (18.70MB/s)
74 03:53:47.200727 end: 1.2.1 http-download (duration 00:00:00) [common]
76 03:53:47.201014 end: 1.2 download-retry (duration 00:00:00) [common]
77 03:53:47.201105 start: 1.3 download-retry (timeout 00:09:59) [common]
78 03:53:47.201200 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 03:53:47.201310 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230217.0/amd64/full.rootfs.tar.xz
80 03:53:47.201387 saving as /var/lib/lava/dispatcher/tmp/9338283/tftp-deploy-88_dh9ll/nfsrootfs/full.rootfs.tar
81 03:53:47.201449 total size: 124173696 (118MB)
82 03:53:47.201511 Using unxz to decompress xz
83 03:53:47.206405 progress 0% (0MB)
84 03:53:47.661883 progress 5% (5MB)
85 03:53:48.130196 progress 10% (11MB)
86 03:53:48.604008 progress 15% (17MB)
87 03:53:49.083486 progress 20% (23MB)
88 03:53:49.433504 progress 25% (29MB)
89 03:53:49.782354 progress 30% (35MB)
90 03:53:50.066836 progress 35% (41MB)
91 03:53:50.227507 progress 40% (47MB)
92 03:53:50.618181 progress 45% (53MB)
93 03:53:50.996033 progress 50% (59MB)
94 03:53:51.353101 progress 55% (65MB)
95 03:53:51.719842 progress 60% (71MB)
96 03:53:52.067061 progress 65% (77MB)
97 03:53:52.446632 progress 70% (82MB)
98 03:53:52.863887 progress 75% (88MB)
99 03:53:53.284110 progress 80% (94MB)
100 03:53:53.415484 progress 85% (100MB)
101 03:53:53.578205 progress 90% (106MB)
102 03:53:53.919219 progress 95% (112MB)
103 03:53:54.289539 progress 100% (118MB)
104 03:53:54.295585 118MB downloaded in 7.09s (16.69MB/s)
105 03:53:54.295926 end: 1.3.1 http-download (duration 00:00:07) [common]
107 03:53:54.296243 end: 1.3 download-retry (duration 00:00:07) [common]
108 03:53:54.296358 start: 1.4 download-retry (timeout 00:09:52) [common]
109 03:53:54.296500 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 03:53:54.296662 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-938-gc773c630d0e4f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 03:53:54.296736 saving as /var/lib/lava/dispatcher/tmp/9338283/tftp-deploy-88_dh9ll/modules/modules.tar
112 03:53:54.296799 total size: 51688 (0MB)
113 03:53:54.296863 Using unxz to decompress xz
114 03:53:54.301121 progress 63% (0MB)
115 03:53:54.301595 progress 100% (0MB)
116 03:53:54.305038 0MB downloaded in 0.01s (5.99MB/s)
117 03:53:54.305290 end: 1.4.1 http-download (duration 00:00:00) [common]
119 03:53:54.305561 end: 1.4 download-retry (duration 00:00:00) [common]
120 03:53:54.305658 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 03:53:54.305754 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 03:53:56.015086 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9338283/extract-nfsrootfs-oo0950p2
123 03:53:56.015287 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 03:53:56.015398 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 03:53:56.015537 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag
126 03:53:56.015639 makedir: /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin
127 03:53:56.015725 makedir: /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/tests
128 03:53:56.015806 makedir: /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/results
129 03:53:56.015927 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-add-keys
130 03:53:56.016063 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-add-sources
131 03:53:56.016178 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-background-process-start
132 03:53:56.016297 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-background-process-stop
133 03:53:56.016408 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-common-functions
134 03:53:56.016521 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-echo-ipv4
135 03:53:56.016629 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-install-packages
136 03:53:56.016737 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-installed-packages
137 03:53:56.016843 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-os-build
138 03:53:56.016956 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-probe-channel
139 03:53:56.017063 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-probe-ip
140 03:53:56.017169 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-target-ip
141 03:53:56.017278 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-target-mac
142 03:53:56.017383 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-target-storage
143 03:53:56.017492 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-test-case
144 03:53:56.017600 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-test-event
145 03:53:56.017706 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-test-feedback
146 03:53:56.017817 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-test-raise
147 03:53:56.017964 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-test-reference
148 03:53:56.018075 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-test-runner
149 03:53:56.018211 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-test-set
150 03:53:56.018341 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-test-shell
151 03:53:56.018457 Updating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-install-packages (oe)
152 03:53:56.018595 Updating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/bin/lava-installed-packages (oe)
153 03:53:56.018692 Creating /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/environment
154 03:53:56.018778 LAVA metadata
155 03:53:56.018844 - LAVA_JOB_ID=9338283
156 03:53:56.018907 - LAVA_DISPATCHER_IP=192.168.201.1
157 03:53:56.019014 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 03:53:56.019078 skipped lava-vland-overlay
159 03:53:56.019156 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 03:53:56.019237 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 03:53:56.019298 skipped lava-multinode-overlay
162 03:53:56.019371 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 03:53:56.019457 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 03:53:56.019546 Loading test definitions
165 03:53:56.019636 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 03:53:56.019704 Using /lava-9338283 at stage 0
167 03:53:56.019799 Fetching tests from https://github.com/kernelci/test-definitions
168 03:53:56.019881 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/0/tests/0_ltp-mm'
169 03:54:02.685199 Running '/usr/bin/git checkout kernelci.org
170 03:54:02.824754 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
171 03:54:02.825545 uuid=9338283_1.5.2.3.1 testdef=None
172 03:54:02.825710 end: 1.5.2.3.1 git-repo-action (duration 00:00:07) [common]
174 03:54:02.825963 start: 1.5.2.3.2 test-overlay (timeout 00:09:44) [common]
175 03:54:02.826781 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 03:54:02.827030 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:44) [common]
178 03:54:02.828076 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 03:54:02.828348 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:44) [common]
181 03:54:02.829387 runner path: /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/0/tests/0_ltp-mm test_uuid 9338283_1.5.2.3.1
182 03:54:02.829483 SKIPFILE='skipfile-lkft.yaml'
183 03:54:02.829552 SKIP_INSTALL='true'
184 03:54:02.829621 TST_CMDFILES='mm'
185 03:54:02.829765 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 03:54:02.829997 Creating lava-test-runner.conf files
188 03:54:02.830066 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9338283/lava-overlay-u_nynxag/lava-9338283/0 for stage 0
189 03:54:02.830163 - 0_ltp-mm
190 03:54:02.830265 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
191 03:54:02.830368 start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
192 03:54:10.469583 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
193 03:54:10.469742 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
194 03:54:10.469840 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 03:54:10.469941 end: 1.5.2 lava-overlay (duration 00:00:14) [common]
196 03:54:10.470041 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
197 03:54:10.575181 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 03:54:10.575534 start: 1.5.4 extract-modules (timeout 00:09:36) [common]
199 03:54:10.575728 extracting modules file /var/lib/lava/dispatcher/tmp/9338283/tftp-deploy-88_dh9ll/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9338283/extract-nfsrootfs-oo0950p2
200 03:54:10.580086 extracting modules file /var/lib/lava/dispatcher/tmp/9338283/tftp-deploy-88_dh9ll/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9338283/extract-overlay-ramdisk-wjepyjqi/ramdisk
201 03:54:10.584274 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 03:54:10.584394 start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
203 03:54:10.584480 [common] Applying overlay to NFS
204 03:54:10.584566 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9338283/compress-overlay-o7pgc2x0/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9338283/extract-nfsrootfs-oo0950p2
205 03:54:11.055919 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 03:54:11.056080 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
207 03:54:11.056184 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 03:54:11.056277 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
209 03:54:11.056366 Building ramdisk /var/lib/lava/dispatcher/tmp/9338283/extract-overlay-ramdisk-wjepyjqi/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9338283/extract-overlay-ramdisk-wjepyjqi/ramdisk
210 03:54:11.090370 >> 24546 blocks
211 03:54:11.566195 rename /var/lib/lava/dispatcher/tmp/9338283/extract-overlay-ramdisk-wjepyjqi/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9338283/tftp-deploy-88_dh9ll/ramdisk/ramdisk.cpio.gz
212 03:54:11.566664 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 03:54:11.566796 start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
214 03:54:11.566902 start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
215 03:54:11.567000 No mkimage arch provided, not using FIT.
216 03:54:11.567094 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 03:54:11.567185 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 03:54:11.567289 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
219 03:54:11.567383 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
220 03:54:11.567465 No LXC device requested
221 03:54:11.567548 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 03:54:11.567647 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
223 03:54:11.567731 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 03:54:11.567807 Checking files for TFTP limit of 4294967296 bytes.
225 03:54:11.568194 end: 1 tftp-deploy (duration 00:00:25) [common]
226 03:54:11.568305 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 03:54:11.568405 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 03:54:11.568564 substitutions:
229 03:54:11.568654 - {DTB}: None
230 03:54:11.568753 - {INITRD}: 9338283/tftp-deploy-88_dh9ll/ramdisk/ramdisk.cpio.gz
231 03:54:11.568831 - {KERNEL}: 9338283/tftp-deploy-88_dh9ll/kernel/bzImage
232 03:54:11.568922 - {LAVA_MAC}: None
233 03:54:11.569014 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9338283/extract-nfsrootfs-oo0950p2
234 03:54:11.569074 - {NFS_SERVER_IP}: 192.168.201.1
235 03:54:11.569130 - {PRESEED_CONFIG}: None
236 03:54:11.569189 - {PRESEED_LOCAL}: None
237 03:54:11.569246 - {RAMDISK}: 9338283/tftp-deploy-88_dh9ll/ramdisk/ramdisk.cpio.gz
238 03:54:11.569305 - {ROOT_PART}: None
239 03:54:11.569360 - {ROOT}: None
240 03:54:11.569418 - {SERVER_IP}: 192.168.201.1
241 03:54:11.569474 - {TEE}: None
242 03:54:11.569531 Parsed boot commands:
243 03:54:11.569586 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 03:54:11.569745 Parsed boot commands: tftpboot 192.168.201.1 9338283/tftp-deploy-88_dh9ll/kernel/bzImage 9338283/tftp-deploy-88_dh9ll/kernel/cmdline 9338283/tftp-deploy-88_dh9ll/ramdisk/ramdisk.cpio.gz
245 03:54:11.569837 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 03:54:11.569929 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 03:54:11.570026 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 03:54:11.570115 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 03:54:11.570191 Not connected, no need to disconnect.
250 03:54:11.570269 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 03:54:11.570353 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 03:54:11.570427 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-2'
253 03:54:11.573312 Setting prompt string to ['lava-test: # ']
254 03:54:11.573618 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 03:54:11.573731 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 03:54:11.573831 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 03:54:11.573930 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 03:54:11.574132 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=reboot'
259 03:54:20.892759 >> Command sent successfully.
260 03:54:20.894874 Returned 0 in 9 seconds
261 03:54:20.995657 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
263 03:54:20.995986 end: 2.2.2 reset-device (duration 00:00:09) [common]
264 03:54:20.996112 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
265 03:54:20.996244 Setting prompt string to 'Starting depthcharge on Helios...'
266 03:54:20.996322 Changing prompt to 'Starting depthcharge on Helios...'
267 03:54:20.996409 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 03:54:20.996772 [Enter `^Ec?' for help]
269 03:54:20.996858
270 03:54:20.996929
271 03:54:20.996994 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 03:54:20.997064 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 03:54:20.997128 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 03:54:20.997188 CPU: AES supported, TXT NOT supported, VT supported
275 03:54:20.997247 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 03:54:20.997317 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 03:54:20.997395 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 03:54:20.997467 VBOOT: Loading verstage.
279 03:54:20.997524 FMAP: Found "FLASH" version 1.1 at 0xc04000.
280 03:54:20.997585 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 03:54:20.997642 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 03:54:20.997700 CBFS @ c08000 size 3f8000
283 03:54:20.997758 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 03:54:20.997826 CBFS: Locating 'fallback/verstage'
285 03:54:20.997883 CBFS: Found @ offset 10fb80 size 1072c
286 03:54:20.997940
287 03:54:20.997996
288 03:54:20.998070 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 03:54:20.998141 Probing TPM: . done!
290 03:54:20.998196 TPM ready after 0 ms
291 03:54:20.998280 Connected to device vid:did:rid of 1ae0:0028:00
292 03:54:20.998341 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
293 03:54:20.998403 Initialized TPM device CR50 revision 0
294 03:54:20.998464 tlcl_send_startup: Startup return code is 0
295 03:54:20.998529 TPM: setup succeeded
296 03:54:20.998602 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 03:54:20.998658 Chrome EC: UHEPI supported
298 03:54:20.998717 Phase 1
299 03:54:20.998815 FMAP: area GBB found @ c05000 (12288 bytes)
300 03:54:20.998875 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 03:54:20.998934 Phase 2
302 03:54:20.998990 Phase 3
303 03:54:20.999046 FMAP: area GBB found @ c05000 (12288 bytes)
304 03:54:20.999102 VB2:vb2_report_dev_firmware() This is developer signed firmware
305 03:54:20.999162 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
306 03:54:20.999220 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
307 03:54:20.999278 VB2:vb2_verify_keyblock() Checking keyblock signature...
308 03:54:20.999343 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
309 03:54:20.999419 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
310 03:54:20.999490 VB2:vb2_verify_fw_preamble() Verifying preamble.
311 03:54:20.999546 Phase 4
312 03:54:20.999601 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
313 03:54:20.999660 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
314 03:54:20.999717 VB2:vb2_rsa_verify_digest() Digest check failed!
315 03:54:20.999773 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
316 03:54:20.999839 Saving nvdata
317 03:54:20.999899 Reboot requested (10020007)
318 03:54:20.999955 board_reset() called!
319 03:54:21.000011 full_reset() called!
320 03:54:24.610255
321 03:54:24.610395
322 03:54:24.619843 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
323 03:54:24.623141 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
324 03:54:24.629641 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
325 03:54:24.633439 CPU: AES supported, TXT NOT supported, VT supported
326 03:54:24.639849 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
327 03:54:24.643060 PCH: device id 0284 (rev 00) is Cometlake-U Premium
328 03:54:24.649396 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
329 03:54:24.652507 VBOOT: Loading verstage.
330 03:54:24.656325 FMAP: Found "FLASH" version 1.1 at 0xc04000.
331 03:54:24.662802 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
332 03:54:24.668948 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
333 03:54:24.669038 CBFS @ c08000 size 3f8000
334 03:54:24.676025 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
335 03:54:24.679223 CBFS: Locating 'fallback/verstage'
336 03:54:24.682423 CBFS: Found @ offset 10fb80 size 1072c
337 03:54:24.686859
338 03:54:24.686947
339 03:54:24.697054 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
340 03:54:24.711004 Probing TPM: . done!
341 03:54:24.714226 TPM ready after 0 ms
342 03:54:24.718099 Connected to device vid:did:rid of 1ae0:0028:00
343 03:54:24.727523 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
344 03:54:24.731452 Initialized TPM device CR50 revision 0
345 03:54:24.773737 tlcl_send_startup: Startup return code is 0
346 03:54:24.773841 TPM: setup succeeded
347 03:54:24.786009 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
348 03:54:24.789820 Chrome EC: UHEPI supported
349 03:54:24.793017 Phase 1
350 03:54:24.796257 FMAP: area GBB found @ c05000 (12288 bytes)
351 03:54:24.803422 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
352 03:54:24.809660 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
353 03:54:24.812848 Recovery requested (1009000e)
354 03:54:24.819283 Saving nvdata
355 03:54:24.825011 tlcl_extend: response is 0
356 03:54:24.834041 tlcl_extend: response is 0
357 03:54:24.841025 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
358 03:54:24.844033 CBFS @ c08000 size 3f8000
359 03:54:24.850338 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
360 03:54:24.854325 CBFS: Locating 'fallback/romstage'
361 03:54:24.857537 CBFS: Found @ offset 80 size 145fc
362 03:54:24.860576 Accumulated console time in verstage 98 ms
363 03:54:24.860665
364 03:54:24.863817
365 03:54:24.873414 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
366 03:54:24.880166 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
367 03:54:24.883452 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
368 03:54:24.889955 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
369 03:54:24.893048 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
370 03:54:24.896343 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
371 03:54:24.899387 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
372 03:54:24.903057 TCO_STS: 0000 0000
373 03:54:24.906223 GEN_PMCON: e0015238 00000200
374 03:54:24.909379 GBLRST_CAUSE: 00000000 00000000
375 03:54:24.912454 prev_sleep_state 5
376 03:54:24.916368 Boot Count incremented to 48391
377 03:54:24.919494 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 03:54:24.922764 CBFS @ c08000 size 3f8000
379 03:54:24.929073 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 03:54:24.932754 CBFS: Locating 'fspm.bin'
381 03:54:24.936063 CBFS: Found @ offset 5ffc0 size 71000
382 03:54:24.939338 Chrome EC: UHEPI supported
383 03:54:24.945668 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
384 03:54:24.950600 Probing TPM: done!
385 03:54:24.956958 Connected to device vid:did:rid of 1ae0:0028:00
386 03:54:24.967155 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
387 03:54:24.972754 Initialized TPM device CR50 revision 0
388 03:54:24.981792 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
389 03:54:24.991960 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
390 03:54:24.992061 MRC cache found, size 1948
391 03:54:24.995186 bootmode is set to: 2
392 03:54:24.998378 PRMRR disabled by config.
393 03:54:25.001529 SPD INDEX = 1
394 03:54:25.004680 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
395 03:54:25.008455 CBFS @ c08000 size 3f8000
396 03:54:25.014617 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
397 03:54:25.014713 CBFS: Locating 'spd.bin'
398 03:54:25.021491 CBFS: Found @ offset 5fb80 size 400
399 03:54:25.021577 SPD: module type is LPDDR3
400 03:54:25.024666 SPD: module part is
401 03:54:25.031115 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
402 03:54:25.034666 SPD: device width 4 bits, bus width 8 bits
403 03:54:25.037964 SPD: module size is 4096 MB (per channel)
404 03:54:25.041123 memory slot: 0 configuration done.
405 03:54:25.047984 memory slot: 2 configuration done.
406 03:54:25.096677 CBMEM:
407 03:54:25.099808 IMD: root @ 99fff000 254 entries.
408 03:54:25.103056 IMD: root @ 99ffec00 62 entries.
409 03:54:25.106120 External stage cache:
410 03:54:25.109861 IMD: root @ 9abff000 254 entries.
411 03:54:25.112980 IMD: root @ 9abfec00 62 entries.
412 03:54:25.119428 Chrome EC: clear events_b mask to 0x0000000020004000
413 03:54:25.132121 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 03:54:25.145610 tlcl_write: response is 0
415 03:54:25.154298 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
416 03:54:25.160777 MRC: TPM MRC hash updated successfully.
417 03:54:25.160863 2 DIMMs found
418 03:54:25.164011 SMM Memory Map
419 03:54:25.167792 SMRAM : 0x9a000000 0x1000000
420 03:54:25.171041 Subregion 0: 0x9a000000 0xa00000
421 03:54:25.174253 Subregion 1: 0x9aa00000 0x200000
422 03:54:25.177461 Subregion 2: 0x9ac00000 0x400000
423 03:54:25.180611 top_of_ram = 0x9a000000
424 03:54:25.183813 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
425 03:54:25.190570 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
426 03:54:25.193631 MTRR Range: Start=ff000000 End=0 (Size 1000000)
427 03:54:25.200617 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
428 03:54:25.203645 CBFS @ c08000 size 3f8000
429 03:54:25.210010 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
430 03:54:25.213849 CBFS: Locating 'fallback/postcar'
431 03:54:25.217096 CBFS: Found @ offset 107000 size 4b44
432 03:54:25.223365 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
433 03:54:25.233251 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
434 03:54:25.236380 Processing 180 relocs. Offset value of 0x97c0c000
435 03:54:25.244639 Accumulated console time in romstage 286 ms
436 03:54:25.244724
437 03:54:25.244805
438 03:54:25.254210 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
439 03:54:25.261167 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 03:54:25.264396 CBFS @ c08000 size 3f8000
441 03:54:25.270679 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 03:54:25.273900 CBFS: Locating 'fallback/ramstage'
443 03:54:25.277661 CBFS: Found @ offset 43380 size 1b9e8
444 03:54:25.283915 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
445 03:54:25.315953 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
446 03:54:25.319793 Processing 3976 relocs. Offset value of 0x98db0000
447 03:54:25.326264 Accumulated console time in postcar 52 ms
448 03:54:25.326347
449 03:54:25.326415
450 03:54:25.335842 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
451 03:54:25.342784 FMAP: area RO_VPD found @ c00000 (16384 bytes)
452 03:54:25.346018 WARNING: RO_VPD is uninitialized or empty.
453 03:54:25.349083 FMAP: area RW_VPD found @ af8000 (8192 bytes)
454 03:54:25.355627 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 03:54:25.355729 Normal boot.
456 03:54:25.362151 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
457 03:54:25.365444 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
458 03:54:25.369289 CBFS @ c08000 size 3f8000
459 03:54:25.375764 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
460 03:54:25.378865 CBFS: Locating 'cpu_microcode_blob.bin'
461 03:54:25.382180 CBFS: Found @ offset 14700 size 2ec00
462 03:54:25.385482 microcode: sig=0x806ec pf=0x4 revision=0xc9
463 03:54:25.388762 Skip microcode update
464 03:54:25.395198 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 03:54:25.395288 CBFS @ c08000 size 3f8000
466 03:54:25.401936 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 03:54:25.405471 CBFS: Locating 'fsps.bin'
468 03:54:25.408562 CBFS: Found @ offset d1fc0 size 35000
469 03:54:25.434645 Detected 4 core, 8 thread CPU.
470 03:54:25.438002 Setting up SMI for CPU
471 03:54:25.441093 IED base = 0x9ac00000
472 03:54:25.444257 IED size = 0x00400000
473 03:54:25.444344 Will perform SMM setup.
474 03:54:25.451249 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
475 03:54:25.457607 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
476 03:54:25.464026 Processing 16 relocs. Offset value of 0x00030000
477 03:54:25.464113 Attempting to start 7 APs
478 03:54:25.470482 Waiting for 10ms after sending INIT.
479 03:54:25.484019 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
480 03:54:25.484112 done.
481 03:54:25.487234 AP: slot 7 apic_id 7.
482 03:54:25.491045 AP: slot 5 apic_id 6.
483 03:54:25.493848 Waiting for 2nd SIPI to complete...done.
484 03:54:25.497670 AP: slot 1 apic_id 3.
485 03:54:25.497786 AP: slot 3 apic_id 2.
486 03:54:25.500874 AP: slot 6 apic_id 4.
487 03:54:25.504008 AP: slot 4 apic_id 5.
488 03:54:25.510732 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
489 03:54:25.517127 Processing 13 relocs. Offset value of 0x00038000
490 03:54:25.523894 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
491 03:54:25.527072 Installing SMM handler to 0x9a000000
492 03:54:25.534035 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
493 03:54:25.540305 Processing 658 relocs. Offset value of 0x9a010000
494 03:54:25.546704 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
495 03:54:25.549938 Processing 13 relocs. Offset value of 0x9a008000
496 03:54:25.557098 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
497 03:54:25.563379 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
498 03:54:25.569774 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
499 03:54:25.572946 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
500 03:54:25.579913 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
501 03:54:25.586576 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
502 03:54:25.592989 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
503 03:54:25.599416 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
504 03:54:25.602756 Clearing SMI status registers
505 03:54:25.602840 SMI_STS: PM1
506 03:54:25.606004 PM1_STS: PWRBTN
507 03:54:25.606081 TCO_STS: SECOND_TO
508 03:54:25.609109 New SMBASE 0x9a000000
509 03:54:25.612783 In relocation handler: CPU 0
510 03:54:25.616298 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
511 03:54:25.622916 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 03:54:25.623001 Relocation complete.
513 03:54:25.625847 New SMBASE 0x99fff800
514 03:54:25.629385 In relocation handler: CPU 2
515 03:54:25.632728 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
516 03:54:25.636165 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 03:54:25.639286 Relocation complete.
518 03:54:25.642622 New SMBASE 0x99ffe400
519 03:54:25.645785 In relocation handler: CPU 7
520 03:54:25.649034 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
521 03:54:25.652258 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 03:54:25.655432 Relocation complete.
523 03:54:25.658855 New SMBASE 0x99ffec00
524 03:54:25.661891 In relocation handler: CPU 5
525 03:54:25.665011 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
526 03:54:25.668255 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 03:54:25.672117 Relocation complete.
528 03:54:25.675209 New SMBASE 0x99fff400
529 03:54:25.678408 In relocation handler: CPU 3
530 03:54:25.681764 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
531 03:54:25.685112 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 03:54:25.688245 Relocation complete.
533 03:54:25.691423 New SMBASE 0x99fffc00
534 03:54:25.694695 In relocation handler: CPU 1
535 03:54:25.698020 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
536 03:54:25.701142 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 03:54:25.704835 Relocation complete.
538 03:54:25.708051 New SMBASE 0x99fff000
539 03:54:25.711288 In relocation handler: CPU 4
540 03:54:25.714293 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
541 03:54:25.717826 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 03:54:25.721305 Relocation complete.
543 03:54:25.724295 New SMBASE 0x99ffe800
544 03:54:25.727358 In relocation handler: CPU 6
545 03:54:25.731034 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
546 03:54:25.734156 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 03:54:25.737437 Relocation complete.
548 03:54:25.741104 Initializing CPU #0
549 03:54:25.744288 CPU: vendor Intel device 806ec
550 03:54:25.747384 CPU: family 06, model 8e, stepping 0c
551 03:54:25.750615 Clearing out pending MCEs
552 03:54:25.750692 Setting up local APIC...
553 03:54:25.753924 apic_id: 0x00 done.
554 03:54:25.757158 Turbo is available but hidden
555 03:54:25.760308 Turbo is available and visible
556 03:54:25.764163 VMX status: enabled
557 03:54:25.767264 IA32_FEATURE_CONTROL status: locked
558 03:54:25.767358 Skip microcode update
559 03:54:25.770454 CPU #0 initialized
560 03:54:25.773645 Initializing CPU #2
561 03:54:25.773734 Initializing CPU #3
562 03:54:25.776813 Initializing CPU #1
563 03:54:25.780617 CPU: vendor Intel device 806ec
564 03:54:25.783814 CPU: family 06, model 8e, stepping 0c
565 03:54:25.787142 CPU: vendor Intel device 806ec
566 03:54:25.790394 CPU: family 06, model 8e, stepping 0c
567 03:54:25.793503 Clearing out pending MCEs
568 03:54:25.796791 Clearing out pending MCEs
569 03:54:25.796871 Setting up local APIC...
570 03:54:25.800111 Initializing CPU #6
571 03:54:25.803291 CPU: vendor Intel device 806ec
572 03:54:25.807027 CPU: family 06, model 8e, stepping 0c
573 03:54:25.810208 Clearing out pending MCEs
574 03:54:25.813565 CPU: vendor Intel device 806ec
575 03:54:25.816675 CPU: family 06, model 8e, stepping 0c
576 03:54:25.819893 Initializing CPU #4
577 03:54:25.819971 Setting up local APIC...
578 03:54:25.823512 CPU: vendor Intel device 806ec
579 03:54:25.826430 CPU: family 06, model 8e, stepping 0c
580 03:54:25.830073 Clearing out pending MCEs
581 03:54:25.833083 Clearing out pending MCEs
582 03:54:25.836604 Setting up local APIC...
583 03:54:25.836691 apic_id: 0x01 done.
584 03:54:25.839506 apic_id: 0x02 done.
585 03:54:25.843147 Setting up local APIC...
586 03:54:25.843240 VMX status: enabled
587 03:54:25.846423 Initializing CPU #5
588 03:54:25.849779 Initializing CPU #7
589 03:54:25.849860 VMX status: enabled
590 03:54:25.852970 apic_id: 0x03 done.
591 03:54:25.856127 IA32_FEATURE_CONTROL status: locked
592 03:54:25.859290 VMX status: enabled
593 03:54:25.859384 Skip microcode update
594 03:54:25.866121 IA32_FEATURE_CONTROL status: locked
595 03:54:25.866203 CPU #3 initialized
596 03:54:25.869341 Skip microcode update
597 03:54:25.872539 IA32_FEATURE_CONTROL status: locked
598 03:54:25.872634 CPU #1 initialized
599 03:54:25.875857 Skip microcode update
600 03:54:25.878976 Setting up local APIC...
601 03:54:25.882886 CPU: vendor Intel device 806ec
602 03:54:25.886082 CPU: family 06, model 8e, stepping 0c
603 03:54:25.889380 CPU: vendor Intel device 806ec
604 03:54:25.892480 CPU: family 06, model 8e, stepping 0c
605 03:54:25.895723 Clearing out pending MCEs
606 03:54:25.898880 Clearing out pending MCEs
607 03:54:25.898966 Setting up local APIC...
608 03:54:25.902351 CPU #2 initialized
609 03:54:25.905482 apic_id: 0x05 done.
610 03:54:25.905571 apic_id: 0x04 done.
611 03:54:25.908714 VMX status: enabled
612 03:54:25.912492 VMX status: enabled
613 03:54:25.915674 IA32_FEATURE_CONTROL status: locked
614 03:54:25.918991 IA32_FEATURE_CONTROL status: locked
615 03:54:25.919080 Skip microcode update
616 03:54:25.922141 Skip microcode update
617 03:54:25.925289 CPU #4 initialized
618 03:54:25.925377 CPU #6 initialized
619 03:54:25.928880 Setting up local APIC...
620 03:54:25.931859 apic_id: 0x06 done.
621 03:54:25.931958 apic_id: 0x07 done.
622 03:54:25.935487 VMX status: enabled
623 03:54:25.938612 VMX status: enabled
624 03:54:25.942302 IA32_FEATURE_CONTROL status: locked
625 03:54:25.945204 IA32_FEATURE_CONTROL status: locked
626 03:54:25.945286 Skip microcode update
627 03:54:25.948287 Skip microcode update
628 03:54:25.952140 CPU #5 initialized
629 03:54:25.952218 CPU #7 initialized
630 03:54:25.958523 bsp_do_flight_plan done after 461 msecs.
631 03:54:25.961616 CPU: frequency set to 4200 MHz
632 03:54:25.961708 Enabling SMIs.
633 03:54:25.961779 Locking SMM.
634 03:54:25.978108 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
635 03:54:25.981241 CBFS @ c08000 size 3f8000
636 03:54:25.987862 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
637 03:54:25.987952 CBFS: Locating 'vbt.bin'
638 03:54:25.994246 CBFS: Found @ offset 5f5c0 size 499
639 03:54:25.997387 Found a VBT of 4608 bytes after decompression
640 03:54:26.180591 Display FSP Version Info HOB
641 03:54:26.184460 Reference Code - CPU = 9.0.1e.30
642 03:54:26.187592 uCode Version = 0.0.0.ca
643 03:54:26.190810 TXT ACM version = ff.ff.ff.ffff
644 03:54:26.194161 Display FSP Version Info HOB
645 03:54:26.197307 Reference Code - ME = 9.0.1e.30
646 03:54:26.200573 MEBx version = 0.0.0.0
647 03:54:26.203710 ME Firmware Version = Consumer SKU
648 03:54:26.206823 Display FSP Version Info HOB
649 03:54:26.210023 Reference Code - CML PCH = 9.0.1e.30
650 03:54:26.213223 PCH-CRID Status = Disabled
651 03:54:26.216542 PCH-CRID Original Value = ff.ff.ff.ffff
652 03:54:26.220170 PCH-CRID New Value = ff.ff.ff.ffff
653 03:54:26.223261 OPROM - RST - RAID = ff.ff.ff.ffff
654 03:54:26.226441 ChipsetInit Base Version = ff.ff.ff.ffff
655 03:54:26.233304 ChipsetInit Oem Version = ff.ff.ff.ffff
656 03:54:26.233391 Display FSP Version Info HOB
657 03:54:26.239726 Reference Code - SA - System Agent = 9.0.1e.30
658 03:54:26.242809 Reference Code - MRC = 0.7.1.6c
659 03:54:26.246453 SA - PCIe Version = 9.0.1e.30
660 03:54:26.249444 SA-CRID Status = Disabled
661 03:54:26.252530 SA-CRID Original Value = 0.0.0.c
662 03:54:26.252611 SA-CRID New Value = 0.0.0.c
663 03:54:26.256126 OPROM - VBIOS = ff.ff.ff.ffff
664 03:54:26.259988 RTC Init
665 03:54:26.262960 Set power on after power failure.
666 03:54:26.263039 Disabling Deep S3
667 03:54:26.266084 Disabling Deep S3
668 03:54:26.269804 Disabling Deep S4
669 03:54:26.269889 Disabling Deep S4
670 03:54:26.272970 Disabling Deep S5
671 03:54:26.273047 Disabling Deep S5
672 03:54:26.279306 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
673 03:54:26.282441 Enumerating buses...
674 03:54:26.285634 Show all devs... Before device enumeration.
675 03:54:26.289388 Root Device: enabled 1
676 03:54:26.292156 CPU_CLUSTER: 0: enabled 1
677 03:54:26.292239 DOMAIN: 0000: enabled 1
678 03:54:26.296024 APIC: 00: enabled 1
679 03:54:26.299251 PCI: 00:00.0: enabled 1
680 03:54:26.301854 PCI: 00:02.0: enabled 1
681 03:54:26.301955 PCI: 00:04.0: enabled 0
682 03:54:26.305518 PCI: 00:05.0: enabled 0
683 03:54:26.308714 PCI: 00:12.0: enabled 1
684 03:54:26.308803 PCI: 00:12.5: enabled 0
685 03:54:26.311972 PCI: 00:12.6: enabled 0
686 03:54:26.315154 PCI: 00:14.0: enabled 1
687 03:54:26.318256 PCI: 00:14.1: enabled 0
688 03:54:26.318346 PCI: 00:14.3: enabled 1
689 03:54:26.321379 PCI: 00:14.5: enabled 0
690 03:54:26.325231 PCI: 00:15.0: enabled 1
691 03:54:26.328547 PCI: 00:15.1: enabled 1
692 03:54:26.328624 PCI: 00:15.2: enabled 0
693 03:54:26.331783 PCI: 00:15.3: enabled 0
694 03:54:26.335027 PCI: 00:16.0: enabled 1
695 03:54:26.338137 PCI: 00:16.1: enabled 0
696 03:54:26.338213 PCI: 00:16.2: enabled 0
697 03:54:26.341309 PCI: 00:16.3: enabled 0
698 03:54:26.344650 PCI: 00:16.4: enabled 0
699 03:54:26.347791 PCI: 00:16.5: enabled 0
700 03:54:26.347868 PCI: 00:17.0: enabled 1
701 03:54:26.350860 PCI: 00:19.0: enabled 1
702 03:54:26.354436 PCI: 00:19.1: enabled 0
703 03:54:26.357443 PCI: 00:19.2: enabled 0
704 03:54:26.357520 PCI: 00:1a.0: enabled 0
705 03:54:26.361101 PCI: 00:1c.0: enabled 0
706 03:54:26.364114 PCI: 00:1c.1: enabled 0
707 03:54:26.367770 PCI: 00:1c.2: enabled 0
708 03:54:26.367858 PCI: 00:1c.3: enabled 0
709 03:54:26.370792 PCI: 00:1c.4: enabled 0
710 03:54:26.373887 PCI: 00:1c.5: enabled 0
711 03:54:26.377586 PCI: 00:1c.6: enabled 0
712 03:54:26.377666 PCI: 00:1c.7: enabled 0
713 03:54:26.380559 PCI: 00:1d.0: enabled 1
714 03:54:26.383836 PCI: 00:1d.1: enabled 0
715 03:54:26.387066 PCI: 00:1d.2: enabled 0
716 03:54:26.387144 PCI: 00:1d.3: enabled 0
717 03:54:26.390243 PCI: 00:1d.4: enabled 0
718 03:54:26.393372 PCI: 00:1d.5: enabled 1
719 03:54:26.396546 PCI: 00:1e.0: enabled 1
720 03:54:26.396646 PCI: 00:1e.1: enabled 0
721 03:54:26.399819 PCI: 00:1e.2: enabled 1
722 03:54:26.403051 PCI: 00:1e.3: enabled 1
723 03:54:26.406334 PCI: 00:1f.0: enabled 1
724 03:54:26.406422 PCI: 00:1f.1: enabled 1
725 03:54:26.409564 PCI: 00:1f.2: enabled 1
726 03:54:26.413504 PCI: 00:1f.3: enabled 1
727 03:54:26.416215 PCI: 00:1f.4: enabled 1
728 03:54:26.416303 PCI: 00:1f.5: enabled 1
729 03:54:26.419938 PCI: 00:1f.6: enabled 0
730 03:54:26.423129 USB0 port 0: enabled 1
731 03:54:26.423217 I2C: 00:15: enabled 1
732 03:54:26.426415 I2C: 00:5d: enabled 1
733 03:54:26.429538 GENERIC: 0.0: enabled 1
734 03:54:26.432752 I2C: 00:1a: enabled 1
735 03:54:26.432840 I2C: 00:38: enabled 1
736 03:54:26.435904 I2C: 00:39: enabled 1
737 03:54:26.439153 I2C: 00:3a: enabled 1
738 03:54:26.439241 I2C: 00:3b: enabled 1
739 03:54:26.442327 PCI: 00:00.0: enabled 1
740 03:54:26.445538 SPI: 00: enabled 1
741 03:54:26.445626 SPI: 01: enabled 1
742 03:54:26.448716 PNP: 0c09.0: enabled 1
743 03:54:26.452607 USB2 port 0: enabled 1
744 03:54:26.452694 USB2 port 1: enabled 1
745 03:54:26.455514 USB2 port 2: enabled 0
746 03:54:26.459075 USB2 port 3: enabled 0
747 03:54:26.461912 USB2 port 5: enabled 0
748 03:54:26.462000 USB2 port 6: enabled 1
749 03:54:26.465554 USB2 port 9: enabled 1
750 03:54:26.468480 USB3 port 0: enabled 1
751 03:54:26.468573 USB3 port 1: enabled 1
752 03:54:26.472139 USB3 port 2: enabled 1
753 03:54:26.475164 USB3 port 3: enabled 1
754 03:54:26.478210 USB3 port 4: enabled 0
755 03:54:26.478297 APIC: 03: enabled 1
756 03:54:26.481849 APIC: 01: enabled 1
757 03:54:26.481932 APIC: 02: enabled 1
758 03:54:26.484888 APIC: 05: enabled 1
759 03:54:26.488061 APIC: 06: enabled 1
760 03:54:26.488155 APIC: 04: enabled 1
761 03:54:26.491199 APIC: 07: enabled 1
762 03:54:26.495064 Compare with tree...
763 03:54:26.495162 Root Device: enabled 1
764 03:54:26.498339 CPU_CLUSTER: 0: enabled 1
765 03:54:26.501539 APIC: 00: enabled 1
766 03:54:26.501635 APIC: 03: enabled 1
767 03:54:26.504815 APIC: 01: enabled 1
768 03:54:26.508220 APIC: 02: enabled 1
769 03:54:26.511385 APIC: 05: enabled 1
770 03:54:26.511475 APIC: 06: enabled 1
771 03:54:26.514596 APIC: 04: enabled 1
772 03:54:26.517809 APIC: 07: enabled 1
773 03:54:26.517890 DOMAIN: 0000: enabled 1
774 03:54:26.521128 PCI: 00:00.0: enabled 1
775 03:54:26.524426 PCI: 00:02.0: enabled 1
776 03:54:26.527660 PCI: 00:04.0: enabled 0
777 03:54:26.530888 PCI: 00:05.0: enabled 0
778 03:54:26.530965 PCI: 00:12.0: enabled 1
779 03:54:26.533959 PCI: 00:12.5: enabled 0
780 03:54:26.537068 PCI: 00:12.6: enabled 0
781 03:54:26.540699 PCI: 00:14.0: enabled 1
782 03:54:26.544025 USB0 port 0: enabled 1
783 03:54:26.544116 USB2 port 0: enabled 1
784 03:54:26.547213 USB2 port 1: enabled 1
785 03:54:26.550317 USB2 port 2: enabled 0
786 03:54:26.553523 USB2 port 3: enabled 0
787 03:54:26.556636 USB2 port 5: enabled 0
788 03:54:26.560351 USB2 port 6: enabled 1
789 03:54:26.560438 USB2 port 9: enabled 1
790 03:54:26.563322 USB3 port 0: enabled 1
791 03:54:26.566311 USB3 port 1: enabled 1
792 03:54:26.569918 USB3 port 2: enabled 1
793 03:54:26.572874 USB3 port 3: enabled 1
794 03:54:26.576692 USB3 port 4: enabled 0
795 03:54:26.576776 PCI: 00:14.1: enabled 0
796 03:54:26.579588 PCI: 00:14.3: enabled 1
797 03:54:26.583191 PCI: 00:14.5: enabled 0
798 03:54:26.586185 PCI: 00:15.0: enabled 1
799 03:54:26.589868 I2C: 00:15: enabled 1
800 03:54:26.589957 PCI: 00:15.1: enabled 1
801 03:54:26.593112 I2C: 00:5d: enabled 1
802 03:54:26.596224 GENERIC: 0.0: enabled 1
803 03:54:26.599596 PCI: 00:15.2: enabled 0
804 03:54:26.602869 PCI: 00:15.3: enabled 0
805 03:54:26.602960 PCI: 00:16.0: enabled 1
806 03:54:26.606061 PCI: 00:16.1: enabled 0
807 03:54:26.609320 PCI: 00:16.2: enabled 0
808 03:54:26.612543 PCI: 00:16.3: enabled 0
809 03:54:26.615752 PCI: 00:16.4: enabled 0
810 03:54:26.615828 PCI: 00:16.5: enabled 0
811 03:54:26.619031 PCI: 00:17.0: enabled 1
812 03:54:26.622306 PCI: 00:19.0: enabled 1
813 03:54:26.625470 I2C: 00:1a: enabled 1
814 03:54:26.628623 I2C: 00:38: enabled 1
815 03:54:26.628701 I2C: 00:39: enabled 1
816 03:54:26.631785 I2C: 00:3a: enabled 1
817 03:54:26.634978 I2C: 00:3b: enabled 1
818 03:54:26.638260 PCI: 00:19.1: enabled 0
819 03:54:26.642066 PCI: 00:19.2: enabled 0
820 03:54:26.642152 PCI: 00:1a.0: enabled 0
821 03:54:26.645297 PCI: 00:1c.0: enabled 0
822 03:54:26.648599 PCI: 00:1c.1: enabled 0
823 03:54:26.651907 PCI: 00:1c.2: enabled 0
824 03:54:26.654510 PCI: 00:1c.3: enabled 0
825 03:54:26.654609 PCI: 00:1c.4: enabled 0
826 03:54:26.658345 PCI: 00:1c.5: enabled 0
827 03:54:26.661630 PCI: 00:1c.6: enabled 0
828 03:54:26.664716 PCI: 00:1c.7: enabled 0
829 03:54:26.667728 PCI: 00:1d.0: enabled 1
830 03:54:26.667813 PCI: 00:1d.1: enabled 0
831 03:54:26.670895 PCI: 00:1d.2: enabled 0
832 03:54:26.674664 PCI: 00:1d.3: enabled 0
833 03:54:26.677661 PCI: 00:1d.4: enabled 0
834 03:54:26.681375 PCI: 00:1d.5: enabled 1
835 03:54:26.681456 PCI: 00:00.0: enabled 1
836 03:54:26.684234 PCI: 00:1e.0: enabled 1
837 03:54:26.687398 PCI: 00:1e.1: enabled 0
838 03:54:26.691112 PCI: 00:1e.2: enabled 1
839 03:54:26.694163 SPI: 00: enabled 1
840 03:54:26.694246 PCI: 00:1e.3: enabled 1
841 03:54:26.697188 SPI: 01: enabled 1
842 03:54:26.700474 PCI: 00:1f.0: enabled 1
843 03:54:26.703633 PNP: 0c09.0: enabled 1
844 03:54:26.703725 PCI: 00:1f.1: enabled 1
845 03:54:26.706828 PCI: 00:1f.2: enabled 1
846 03:54:26.710100 PCI: 00:1f.3: enabled 1
847 03:54:26.713287 PCI: 00:1f.4: enabled 1
848 03:54:26.716557 PCI: 00:1f.5: enabled 1
849 03:54:26.716646 PCI: 00:1f.6: enabled 0
850 03:54:26.720470 Root Device scanning...
851 03:54:26.723116 scan_static_bus for Root Device
852 03:54:26.726478 CPU_CLUSTER: 0 enabled
853 03:54:26.729532 DOMAIN: 0000 enabled
854 03:54:26.729624 DOMAIN: 0000 scanning...
855 03:54:26.733373 PCI: pci_scan_bus for bus 00
856 03:54:26.736574 PCI: 00:00.0 [8086/0000] ops
857 03:54:26.739670 PCI: 00:00.0 [8086/9b61] enabled
858 03:54:26.742865 PCI: 00:02.0 [8086/0000] bus ops
859 03:54:26.746634 PCI: 00:02.0 [8086/9b41] enabled
860 03:54:26.749790 PCI: 00:04.0 [8086/1903] disabled
861 03:54:26.753166 PCI: 00:08.0 [8086/1911] enabled
862 03:54:26.756299 PCI: 00:12.0 [8086/02f9] enabled
863 03:54:26.759545 PCI: 00:14.0 [8086/0000] bus ops
864 03:54:26.762806 PCI: 00:14.0 [8086/02ed] enabled
865 03:54:26.766058 PCI: 00:14.2 [8086/02ef] enabled
866 03:54:26.769826 PCI: 00:14.3 [8086/02f0] enabled
867 03:54:26.772980 PCI: 00:15.0 [8086/0000] bus ops
868 03:54:26.779107 PCI: 00:15.0 [8086/02e8] enabled
869 03:54:26.782765 PCI: 00:15.1 [8086/0000] bus ops
870 03:54:26.785745 PCI: 00:15.1 [8086/02e9] enabled
871 03:54:26.785827 PCI: 00:16.0 [8086/0000] ops
872 03:54:26.789383 PCI: 00:16.0 [8086/02e0] enabled
873 03:54:26.792693 PCI: 00:17.0 [8086/0000] ops
874 03:54:26.795444 PCI: 00:17.0 [8086/02d3] enabled
875 03:54:26.799111 PCI: 00:19.0 [8086/0000] bus ops
876 03:54:26.802224 PCI: 00:19.0 [8086/02c5] enabled
877 03:54:26.805558 PCI: 00:1d.0 [8086/0000] bus ops
878 03:54:26.808656 PCI: 00:1d.0 [8086/02b0] enabled
879 03:54:26.815200 PCI: Static device PCI: 00:1d.5 not found, disabling it.
880 03:54:26.818374 PCI: 00:1e.0 [8086/0000] ops
881 03:54:26.822253 PCI: 00:1e.0 [8086/02a8] enabled
882 03:54:26.824827 PCI: 00:1e.2 [8086/0000] bus ops
883 03:54:26.828718 PCI: 00:1e.2 [8086/02aa] enabled
884 03:54:26.832239 PCI: 00:1e.3 [8086/0000] bus ops
885 03:54:26.835165 PCI: 00:1e.3 [8086/02ab] enabled
886 03:54:26.838422 PCI: 00:1f.0 [8086/0000] bus ops
887 03:54:26.841515 PCI: 00:1f.0 [8086/0284] enabled
888 03:54:26.847836 PCI: Static device PCI: 00:1f.1 not found, disabling it.
889 03:54:26.854387 PCI: Static device PCI: 00:1f.2 not found, disabling it.
890 03:54:26.857785 PCI: 00:1f.3 [8086/0000] bus ops
891 03:54:26.860915 PCI: 00:1f.3 [8086/02c8] enabled
892 03:54:26.864765 PCI: 00:1f.4 [8086/0000] bus ops
893 03:54:26.867998 PCI: 00:1f.4 [8086/02a3] enabled
894 03:54:26.871136 PCI: 00:1f.5 [8086/0000] bus ops
895 03:54:26.874176 PCI: 00:1f.5 [8086/02a4] enabled
896 03:54:26.877266 PCI: Leftover static devices:
897 03:54:26.877357 PCI: 00:05.0
898 03:54:26.877427 PCI: 00:12.5
899 03:54:26.880956 PCI: 00:12.6
900 03:54:26.881035 PCI: 00:14.1
901 03:54:26.884078 PCI: 00:14.5
902 03:54:26.884162 PCI: 00:15.2
903 03:54:26.887610 PCI: 00:15.3
904 03:54:26.887698 PCI: 00:16.1
905 03:54:26.887769 PCI: 00:16.2
906 03:54:26.890535 PCI: 00:16.3
907 03:54:26.890619 PCI: 00:16.4
908 03:54:26.894157 PCI: 00:16.5
909 03:54:26.894243 PCI: 00:19.1
910 03:54:26.894316 PCI: 00:19.2
911 03:54:26.897255 PCI: 00:1a.0
912 03:54:26.897336 PCI: 00:1c.0
913 03:54:26.900322 PCI: 00:1c.1
914 03:54:26.900405 PCI: 00:1c.2
915 03:54:26.903341 PCI: 00:1c.3
916 03:54:26.903431 PCI: 00:1c.4
917 03:54:26.903502 PCI: 00:1c.5
918 03:54:26.907042 PCI: 00:1c.6
919 03:54:26.907131 PCI: 00:1c.7
920 03:54:26.910233 PCI: 00:1d.1
921 03:54:26.910327 PCI: 00:1d.2
922 03:54:26.913415 PCI: 00:1d.3
923 03:54:26.913498 PCI: 00:1d.4
924 03:54:26.913590 PCI: 00:1d.5
925 03:54:26.916603 PCI: 00:1e.1
926 03:54:26.916688 PCI: 00:1f.1
927 03:54:26.919835 PCI: 00:1f.2
928 03:54:26.919918 PCI: 00:1f.6
929 03:54:26.922975 PCI: Check your devicetree.cb.
930 03:54:26.926188 PCI: 00:02.0 scanning...
931 03:54:26.929377 scan_generic_bus for PCI: 00:02.0
932 03:54:26.933123 scan_generic_bus for PCI: 00:02.0 done
933 03:54:26.939574 scan_bus: scanning of bus PCI: 00:02.0 took 10200 usecs
934 03:54:26.942683 PCI: 00:14.0 scanning...
935 03:54:26.945948 scan_static_bus for PCI: 00:14.0
936 03:54:26.946031 USB0 port 0 enabled
937 03:54:26.949176 USB0 port 0 scanning...
938 03:54:26.952437 scan_static_bus for USB0 port 0
939 03:54:26.955556 USB2 port 0 enabled
940 03:54:26.955637 USB2 port 1 enabled
941 03:54:26.958761 USB2 port 2 disabled
942 03:54:26.962532 USB2 port 3 disabled
943 03:54:26.962617 USB2 port 5 disabled
944 03:54:26.965710 USB2 port 6 enabled
945 03:54:26.969040 USB2 port 9 enabled
946 03:54:26.969127 USB3 port 0 enabled
947 03:54:26.972101 USB3 port 1 enabled
948 03:54:26.972184 USB3 port 2 enabled
949 03:54:26.975388 USB3 port 3 enabled
950 03:54:26.978657 USB3 port 4 disabled
951 03:54:26.981774 USB2 port 0 scanning...
952 03:54:26.984859 scan_static_bus for USB2 port 0
953 03:54:26.988061 scan_static_bus for USB2 port 0 done
954 03:54:26.991579 scan_bus: scanning of bus USB2 port 0 took 9701 usecs
955 03:54:26.995224 USB2 port 1 scanning...
956 03:54:26.998533 scan_static_bus for USB2 port 1
957 03:54:27.001526 scan_static_bus for USB2 port 1 done
958 03:54:27.008051 scan_bus: scanning of bus USB2 port 1 took 9702 usecs
959 03:54:27.011231 USB2 port 6 scanning...
960 03:54:27.014326 scan_static_bus for USB2 port 6
961 03:54:27.017559 scan_static_bus for USB2 port 6 done
962 03:54:27.024166 scan_bus: scanning of bus USB2 port 6 took 9709 usecs
963 03:54:27.024247 USB2 port 9 scanning...
964 03:54:27.027365 scan_static_bus for USB2 port 9
965 03:54:27.034346 scan_static_bus for USB2 port 9 done
966 03:54:27.037292 scan_bus: scanning of bus USB2 port 9 took 9701 usecs
967 03:54:27.040574 USB3 port 0 scanning...
968 03:54:27.043677 scan_static_bus for USB3 port 0
969 03:54:27.046950 scan_static_bus for USB3 port 0 done
970 03:54:27.053498 scan_bus: scanning of bus USB3 port 0 took 9701 usecs
971 03:54:27.053578 USB3 port 1 scanning...
972 03:54:27.057186 scan_static_bus for USB3 port 1
973 03:54:27.063824 scan_static_bus for USB3 port 1 done
974 03:54:27.066989 scan_bus: scanning of bus USB3 port 1 took 9699 usecs
975 03:54:27.070336 USB3 port 2 scanning...
976 03:54:27.073503 scan_static_bus for USB3 port 2
977 03:54:27.076730 scan_static_bus for USB3 port 2 done
978 03:54:27.083167 scan_bus: scanning of bus USB3 port 2 took 9711 usecs
979 03:54:27.086894 USB3 port 3 scanning...
980 03:54:27.090104 scan_static_bus for USB3 port 3
981 03:54:27.093272 scan_static_bus for USB3 port 3 done
982 03:54:27.096260 scan_bus: scanning of bus USB3 port 3 took 9692 usecs
983 03:54:27.102955 scan_static_bus for USB0 port 0 done
984 03:54:27.106215 scan_bus: scanning of bus USB0 port 0 took 155395 usecs
985 03:54:27.109646 scan_static_bus for PCI: 00:14.0 done
986 03:54:27.115790 scan_bus: scanning of bus PCI: 00:14.0 took 173025 usecs
987 03:54:27.119193 PCI: 00:15.0 scanning...
988 03:54:27.122505 scan_generic_bus for PCI: 00:15.0
989 03:54:27.125783 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
990 03:54:27.128974 scan_generic_bus for PCI: 00:15.0 done
991 03:54:27.135361 scan_bus: scanning of bus PCI: 00:15.0 took 14289 usecs
992 03:54:27.139026 PCI: 00:15.1 scanning...
993 03:54:27.142276 scan_generic_bus for PCI: 00:15.1
994 03:54:27.145393 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
995 03:54:27.151771 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
996 03:54:27.155092 scan_generic_bus for PCI: 00:15.1 done
997 03:54:27.161619 scan_bus: scanning of bus PCI: 00:15.1 took 18608 usecs
998 03:54:27.161700 PCI: 00:19.0 scanning...
999 03:54:27.164819 scan_generic_bus for PCI: 00:19.0
1000 03:54:27.171257 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1001 03:54:27.175133 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1002 03:54:27.177783 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1003 03:54:27.181591 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1004 03:54:27.187952 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1005 03:54:27.190951 scan_generic_bus for PCI: 00:19.0 done
1006 03:54:27.197308 scan_bus: scanning of bus PCI: 00:19.0 took 30748 usecs
1007 03:54:27.197399 PCI: 00:1d.0 scanning...
1008 03:54:27.204051 do_pci_scan_bridge for PCI: 00:1d.0
1009 03:54:27.204135 PCI: pci_scan_bus for bus 01
1010 03:54:27.207737 PCI: 01:00.0 [1c5c/1327] enabled
1011 03:54:27.214452 Enabling Common Clock Configuration
1012 03:54:27.217388 L1 Sub-State supported from root port 29
1013 03:54:27.221181 L1 Sub-State Support = 0xf
1014 03:54:27.224426 CommonModeRestoreTime = 0x28
1015 03:54:27.227415 Power On Value = 0x16, Power On Scale = 0x0
1016 03:54:27.227503 ASPM: Enabled L1
1017 03:54:27.233970 scan_bus: scanning of bus PCI: 00:1d.0 took 32801 usecs
1018 03:54:27.237100 PCI: 00:1e.2 scanning...
1019 03:54:27.240840 scan_generic_bus for PCI: 00:1e.2
1020 03:54:27.244222 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1021 03:54:27.247379 scan_generic_bus for PCI: 00:1e.2 done
1022 03:54:27.253658 scan_bus: scanning of bus PCI: 00:1e.2 took 14011 usecs
1023 03:54:27.256920 PCI: 00:1e.3 scanning...
1024 03:54:27.260134 scan_generic_bus for PCI: 00:1e.3
1025 03:54:27.263367 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1026 03:54:27.266562 scan_generic_bus for PCI: 00:1e.3 done
1027 03:54:27.273615 scan_bus: scanning of bus PCI: 00:1e.3 took 14013 usecs
1028 03:54:27.276817 PCI: 00:1f.0 scanning...
1029 03:54:27.280047 scan_static_bus for PCI: 00:1f.0
1030 03:54:27.283217 PNP: 0c09.0 enabled
1031 03:54:27.286432 scan_static_bus for PCI: 00:1f.0 done
1032 03:54:27.289550 scan_bus: scanning of bus PCI: 00:1f.0 took 12062 usecs
1033 03:54:27.292622 PCI: 00:1f.3 scanning...
1034 03:54:27.299314 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1035 03:54:27.302452 PCI: 00:1f.4 scanning...
1036 03:54:27.306185 scan_generic_bus for PCI: 00:1f.4
1037 03:54:27.309186 scan_generic_bus for PCI: 00:1f.4 done
1038 03:54:27.315803 scan_bus: scanning of bus PCI: 00:1f.4 took 10199 usecs
1039 03:54:27.318823 PCI: 00:1f.5 scanning...
1040 03:54:27.322388 scan_generic_bus for PCI: 00:1f.5
1041 03:54:27.325444 scan_generic_bus for PCI: 00:1f.5 done
1042 03:54:27.332129 scan_bus: scanning of bus PCI: 00:1f.5 took 10199 usecs
1043 03:54:27.335199 scan_bus: scanning of bus DOMAIN: 0000 took 605229 usecs
1044 03:54:27.341780 scan_static_bus for Root Device done
1045 03:54:27.345418 scan_bus: scanning of bus Root Device took 625159 usecs
1046 03:54:27.345508 done
1047 03:54:27.348618 Chrome EC: UHEPI supported
1048 03:54:27.355034 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1049 03:54:27.361452 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1050 03:54:27.368022 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1051 03:54:27.374400 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1052 03:54:27.378284 SPI flash protection: WPSW=0 SRP0=0
1053 03:54:27.384755 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1054 03:54:27.387949 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1055 03:54:27.391195 found VGA at PCI: 00:02.0
1056 03:54:27.394495 Setting up VGA for PCI: 00:02.0
1057 03:54:27.400788 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1058 03:54:27.404424 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1059 03:54:27.407483 Allocating resources...
1060 03:54:27.410689 Reading resources...
1061 03:54:27.413899 Root Device read_resources bus 0 link: 0
1062 03:54:27.416952 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1063 03:54:27.423844 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1064 03:54:27.427117 DOMAIN: 0000 read_resources bus 0 link: 0
1065 03:54:27.434244 PCI: 00:14.0 read_resources bus 0 link: 0
1066 03:54:27.437466 USB0 port 0 read_resources bus 0 link: 0
1067 03:54:27.445687 USB0 port 0 read_resources bus 0 link: 0 done
1068 03:54:27.448883 PCI: 00:14.0 read_resources bus 0 link: 0 done
1069 03:54:27.456536 PCI: 00:15.0 read_resources bus 1 link: 0
1070 03:54:27.459759 PCI: 00:15.0 read_resources bus 1 link: 0 done
1071 03:54:27.466338 PCI: 00:15.1 read_resources bus 2 link: 0
1072 03:54:27.469533 PCI: 00:15.1 read_resources bus 2 link: 0 done
1073 03:54:27.477229 PCI: 00:19.0 read_resources bus 3 link: 0
1074 03:54:27.483564 PCI: 00:19.0 read_resources bus 3 link: 0 done
1075 03:54:27.486758 PCI: 00:1d.0 read_resources bus 1 link: 0
1076 03:54:27.493308 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1077 03:54:27.496543 PCI: 00:1e.2 read_resources bus 4 link: 0
1078 03:54:27.503486 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1079 03:54:27.506634 PCI: 00:1e.3 read_resources bus 5 link: 0
1080 03:54:27.513191 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1081 03:54:27.516329 PCI: 00:1f.0 read_resources bus 0 link: 0
1082 03:54:27.523167 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1083 03:54:27.529925 DOMAIN: 0000 read_resources bus 0 link: 0 done
1084 03:54:27.533065 Root Device read_resources bus 0 link: 0 done
1085 03:54:27.536329 Done reading resources.
1086 03:54:27.542756 Show resources in subtree (Root Device)...After reading.
1087 03:54:27.545800 Root Device child on link 0 CPU_CLUSTER: 0
1088 03:54:27.549544 CPU_CLUSTER: 0 child on link 0 APIC: 00
1089 03:54:27.552729 APIC: 00
1090 03:54:27.552808 APIC: 03
1091 03:54:27.556092 APIC: 01
1092 03:54:27.556174 APIC: 02
1093 03:54:27.556246 APIC: 05
1094 03:54:27.559171 APIC: 06
1095 03:54:27.559257 APIC: 04
1096 03:54:27.559324 APIC: 07
1097 03:54:27.565717 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1098 03:54:27.619082 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1099 03:54:27.619412 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1100 03:54:27.619508 PCI: 00:00.0
1101 03:54:27.619790 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1102 03:54:27.620319 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1103 03:54:27.620592 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1104 03:54:27.661493 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1105 03:54:27.661784 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1106 03:54:27.662047 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1107 03:54:27.662651 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1108 03:54:27.663098 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1109 03:54:27.669659 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1110 03:54:27.679249 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1111 03:54:27.688830 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1112 03:54:27.698595 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1113 03:54:27.708556 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1114 03:54:27.718812 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1115 03:54:27.724993 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1116 03:54:27.734586 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1117 03:54:27.737972 PCI: 00:02.0
1118 03:54:27.748019 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1119 03:54:27.757980 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1120 03:54:27.767285 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1121 03:54:27.767375 PCI: 00:04.0
1122 03:54:27.771117 PCI: 00:08.0
1123 03:54:27.780601 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1124 03:54:27.780689 PCI: 00:12.0
1125 03:54:27.790694 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 03:54:27.797038 PCI: 00:14.0 child on link 0 USB0 port 0
1127 03:54:27.806444 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1128 03:54:27.809584 USB0 port 0 child on link 0 USB2 port 0
1129 03:54:27.813470 USB2 port 0
1130 03:54:27.813550 USB2 port 1
1131 03:54:27.816442 USB2 port 2
1132 03:54:27.816521 USB2 port 3
1133 03:54:27.819478 USB2 port 5
1134 03:54:27.819556 USB2 port 6
1135 03:54:27.823020 USB2 port 9
1136 03:54:27.823103 USB3 port 0
1137 03:54:27.826233 USB3 port 1
1138 03:54:27.826330 USB3 port 2
1139 03:54:27.829442 USB3 port 3
1140 03:54:27.829518 USB3 port 4
1141 03:54:27.832891 PCI: 00:14.2
1142 03:54:27.842620 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1143 03:54:27.852566 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1144 03:54:27.855802 PCI: 00:14.3
1145 03:54:27.865495 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 03:54:27.868553 PCI: 00:15.0 child on link 0 I2C: 01:15
1147 03:54:27.878210 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 03:54:27.878299 I2C: 01:15
1149 03:54:27.885283 PCI: 00:15.1 child on link 0 I2C: 02:5d
1150 03:54:27.895053 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 03:54:27.895155 I2C: 02:5d
1152 03:54:27.898432 GENERIC: 0.0
1153 03:54:27.898512 PCI: 00:16.0
1154 03:54:27.908038 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 03:54:27.911264 PCI: 00:17.0
1156 03:54:27.920891 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1157 03:54:27.927559 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1158 03:54:27.937615 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1159 03:54:27.944059 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1160 03:54:27.953303 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1161 03:54:27.963427 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1162 03:54:27.966606 PCI: 00:19.0 child on link 0 I2C: 03:1a
1163 03:54:27.976437 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 03:54:27.979640 I2C: 03:1a
1165 03:54:27.979722 I2C: 03:38
1166 03:54:27.982782 I2C: 03:39
1167 03:54:27.982864 I2C: 03:3a
1168 03:54:27.982952 I2C: 03:3b
1169 03:54:27.989601 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1170 03:54:27.996391 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1171 03:54:28.005864 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1172 03:54:28.015855 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1173 03:54:28.019072 PCI: 01:00.0
1174 03:54:28.028656 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 03:54:28.028742 PCI: 00:1e.0
1176 03:54:28.042147 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1177 03:54:28.051634 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 03:54:28.054917 PCI: 00:1e.2 child on link 0 SPI: 00
1179 03:54:28.064944 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 03:54:28.065028 SPI: 00
1181 03:54:28.071763 PCI: 00:1e.3 child on link 0 SPI: 01
1182 03:54:28.081350 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 03:54:28.081438 SPI: 01
1184 03:54:28.084470 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1185 03:54:28.094409 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1186 03:54:28.103900 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1187 03:54:28.103986 PNP: 0c09.0
1188 03:54:28.114152 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1189 03:54:28.114239 PCI: 00:1f.3
1190 03:54:28.127080 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 03:54:28.136400 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1192 03:54:28.136499 PCI: 00:1f.4
1193 03:54:28.146046 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1194 03:54:28.156040 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1195 03:54:28.156129 PCI: 00:1f.5
1196 03:54:28.165830 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1197 03:54:28.172069 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1198 03:54:28.179047 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1199 03:54:28.185390 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1200 03:54:28.188497 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1201 03:54:28.191712 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1202 03:54:28.198483 PCI: 00:17.0 18 * [0x60 - 0x67] io
1203 03:54:28.201656 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1204 03:54:28.208084 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1205 03:54:28.214536 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1206 03:54:28.221478 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1207 03:54:28.231301 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1208 03:54:28.237427 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1209 03:54:28.240637 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1210 03:54:28.250340 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1211 03:54:28.253418 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1212 03:54:28.256907 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1213 03:54:28.263547 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1214 03:54:28.266705 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1215 03:54:28.272951 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1216 03:54:28.276559 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1217 03:54:28.282754 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1218 03:54:28.285944 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1219 03:54:28.292796 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1220 03:54:28.296189 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1221 03:54:28.302317 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1222 03:54:28.306178 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1223 03:54:28.312520 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1224 03:54:28.315603 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1225 03:54:28.322037 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1226 03:54:28.325087 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1227 03:54:28.332033 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1228 03:54:28.335054 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1229 03:54:28.341300 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1230 03:54:28.345043 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1231 03:54:28.351171 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1232 03:54:28.354474 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1233 03:54:28.361215 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1234 03:54:28.367813 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1235 03:54:28.374026 avoid_fixed_resources: DOMAIN: 0000
1236 03:54:28.377125 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1237 03:54:28.384181 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1238 03:54:28.390427 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1239 03:54:28.400482 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1240 03:54:28.406653 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1241 03:54:28.416811 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1242 03:54:28.423129 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1243 03:54:28.429850 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1244 03:54:28.439345 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1245 03:54:28.446344 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1246 03:54:28.452424 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1247 03:54:28.459133 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1248 03:54:28.462716 Setting resources...
1249 03:54:28.468763 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1250 03:54:28.472553 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1251 03:54:28.475784 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1252 03:54:28.481850 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1253 03:54:28.485640 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1254 03:54:28.491887 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1255 03:54:28.498847 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1256 03:54:28.502091 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1257 03:54:28.511720 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1258 03:54:28.514796 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1259 03:54:28.521665 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1260 03:54:28.524838 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1261 03:54:28.531154 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1262 03:54:28.534318 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1263 03:54:28.540674 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1264 03:54:28.544374 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1265 03:54:28.550766 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1266 03:54:28.554423 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1267 03:54:28.560338 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1268 03:54:28.564012 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1269 03:54:28.570629 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1270 03:54:28.573796 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1271 03:54:28.580036 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1272 03:54:28.583705 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1273 03:54:28.589854 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1274 03:54:28.593570 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1275 03:54:28.599782 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1276 03:54:28.602871 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1277 03:54:28.609581 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1278 03:54:28.612889 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1279 03:54:28.619295 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1280 03:54:28.623059 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1281 03:54:28.629415 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1282 03:54:28.639253 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1283 03:54:28.645595 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1284 03:54:28.652291 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1285 03:54:28.658817 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1286 03:54:28.664795 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1287 03:54:28.668358 Root Device assign_resources, bus 0 link: 0
1288 03:54:28.674996 DOMAIN: 0000 assign_resources, bus 0 link: 0
1289 03:54:28.681320 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1290 03:54:28.691382 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1291 03:54:28.697693 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1292 03:54:28.707779 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1293 03:54:28.714632 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1294 03:54:28.723985 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1295 03:54:28.727704 PCI: 00:14.0 assign_resources, bus 0 link: 0
1296 03:54:28.733714 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 03:54:28.740576 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1298 03:54:28.750194 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1299 03:54:28.756889 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1300 03:54:28.766476 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1301 03:54:28.770033 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 03:54:28.776149 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 03:54:28.783089 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1304 03:54:28.789136 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 03:54:28.792896 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 03:54:28.802477 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1307 03:54:28.808785 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1308 03:54:28.815523 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1309 03:54:28.825565 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1310 03:54:28.832119 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1311 03:54:28.841335 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1312 03:54:28.848437 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1313 03:54:28.854822 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1314 03:54:28.861029 PCI: 00:19.0 assign_resources, bus 3 link: 0
1315 03:54:28.864641 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 03:54:28.874299 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1317 03:54:28.884239 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1318 03:54:28.890840 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1319 03:54:28.897145 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1320 03:54:28.903373 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1321 03:54:28.910286 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1322 03:54:28.916701 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1323 03:54:28.926547 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1324 03:54:28.929769 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1325 03:54:28.935982 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 03:54:28.942927 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1327 03:54:28.946110 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1328 03:54:28.952986 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 03:54:28.956142 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1330 03:54:28.962775 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 03:54:28.965837 LPC: Trying to open IO window from 800 size 1ff
1332 03:54:28.975841 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1333 03:54:28.982283 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1334 03:54:28.992212 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1335 03:54:28.998448 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1336 03:54:29.005212 DOMAIN: 0000 assign_resources, bus 0 link: 0
1337 03:54:29.008387 Root Device assign_resources, bus 0 link: 0
1338 03:54:29.011481 Done setting resources.
1339 03:54:29.018153 Show resources in subtree (Root Device)...After assigning values.
1340 03:54:29.021404 Root Device child on link 0 CPU_CLUSTER: 0
1341 03:54:29.027794 CPU_CLUSTER: 0 child on link 0 APIC: 00
1342 03:54:29.027879 APIC: 00
1343 03:54:29.027945 APIC: 03
1344 03:54:29.031026 APIC: 01
1345 03:54:29.031110 APIC: 02
1346 03:54:29.034120 APIC: 05
1347 03:54:29.034204 APIC: 06
1348 03:54:29.034270 APIC: 04
1349 03:54:29.038054 APIC: 07
1350 03:54:29.041037 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1351 03:54:29.051067 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1352 03:54:29.060461 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1353 03:54:29.064109 PCI: 00:00.0
1354 03:54:29.073892 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1355 03:54:29.083180 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1356 03:54:29.092991 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1357 03:54:29.099838 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1358 03:54:29.109851 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1359 03:54:29.119280 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1360 03:54:29.129437 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1361 03:54:29.139342 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1362 03:54:29.148694 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1363 03:54:29.155652 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1364 03:54:29.165108 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1365 03:54:29.174729 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1366 03:54:29.184812 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1367 03:54:29.194488 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1368 03:54:29.204500 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1369 03:54:29.213990 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1370 03:54:29.214080 PCI: 00:02.0
1371 03:54:29.227295 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1372 03:54:29.236869 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1373 03:54:29.247044 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1374 03:54:29.247138 PCI: 00:04.0
1375 03:54:29.250140 PCI: 00:08.0
1376 03:54:29.259679 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1377 03:54:29.259768 PCI: 00:12.0
1378 03:54:29.269693 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1379 03:54:29.276147 PCI: 00:14.0 child on link 0 USB0 port 0
1380 03:54:29.286117 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1381 03:54:29.289182 USB0 port 0 child on link 0 USB2 port 0
1382 03:54:29.292429 USB2 port 0
1383 03:54:29.292512 USB2 port 1
1384 03:54:29.296222 USB2 port 2
1385 03:54:29.296312 USB2 port 3
1386 03:54:29.299111 USB2 port 5
1387 03:54:29.302262 USB2 port 6
1388 03:54:29.302351 USB2 port 9
1389 03:54:29.305345 USB3 port 0
1390 03:54:29.305439 USB3 port 1
1391 03:54:29.309194 USB3 port 2
1392 03:54:29.309284 USB3 port 3
1393 03:54:29.312310 USB3 port 4
1394 03:54:29.312399 PCI: 00:14.2
1395 03:54:29.322369 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1396 03:54:29.335084 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1397 03:54:29.335174 PCI: 00:14.3
1398 03:54:29.345211 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1399 03:54:29.351356 PCI: 00:15.0 child on link 0 I2C: 01:15
1400 03:54:29.361439 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1401 03:54:29.361530 I2C: 01:15
1402 03:54:29.367854 PCI: 00:15.1 child on link 0 I2C: 02:5d
1403 03:54:29.377517 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1404 03:54:29.377607 I2C: 02:5d
1405 03:54:29.380557 GENERIC: 0.0
1406 03:54:29.380643 PCI: 00:16.0
1407 03:54:29.390871 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1408 03:54:29.393970 PCI: 00:17.0
1409 03:54:29.403848 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1410 03:54:29.413307 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1411 03:54:29.423216 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1412 03:54:29.433275 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1413 03:54:29.439754 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1414 03:54:29.452906 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1415 03:54:29.455936 PCI: 00:19.0 child on link 0 I2C: 03:1a
1416 03:54:29.465487 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1417 03:54:29.468668 I2C: 03:1a
1418 03:54:29.468751 I2C: 03:38
1419 03:54:29.472342 I2C: 03:39
1420 03:54:29.472426 I2C: 03:3a
1421 03:54:29.475401 I2C: 03:3b
1422 03:54:29.478423 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1423 03:54:29.488386 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1424 03:54:29.498302 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1425 03:54:29.508199 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1426 03:54:29.511378 PCI: 01:00.0
1427 03:54:29.520891 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1428 03:54:29.520977 PCI: 00:1e.0
1429 03:54:29.533880 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1430 03:54:29.544236 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1431 03:54:29.547450 PCI: 00:1e.2 child on link 0 SPI: 00
1432 03:54:29.557101 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1433 03:54:29.560326 SPI: 00
1434 03:54:29.563544 PCI: 00:1e.3 child on link 0 SPI: 01
1435 03:54:29.573352 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1436 03:54:29.573451 SPI: 01
1437 03:54:29.580057 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1438 03:54:29.586182 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1439 03:54:29.596171 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1440 03:54:29.599380 PNP: 0c09.0
1441 03:54:29.606115 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1442 03:54:29.609282 PCI: 00:1f.3
1443 03:54:29.619220 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1444 03:54:29.629172 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1445 03:54:29.632249 PCI: 00:1f.4
1446 03:54:29.638715 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1447 03:54:29.648274 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1448 03:54:29.651487 PCI: 00:1f.5
1449 03:54:29.661525 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1450 03:54:29.664685 Done allocating resources.
1451 03:54:29.671274 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1452 03:54:29.674168 Enabling resources...
1453 03:54:29.677742 PCI: 00:00.0 subsystem <- 8086/9b61
1454 03:54:29.680825 PCI: 00:00.0 cmd <- 06
1455 03:54:29.684503 PCI: 00:02.0 subsystem <- 8086/9b41
1456 03:54:29.687615 PCI: 00:02.0 cmd <- 03
1457 03:54:29.687701 PCI: 00:08.0 cmd <- 06
1458 03:54:29.694201 PCI: 00:12.0 subsystem <- 8086/02f9
1459 03:54:29.694286 PCI: 00:12.0 cmd <- 02
1460 03:54:29.697345 PCI: 00:14.0 subsystem <- 8086/02ed
1461 03:54:29.700496 PCI: 00:14.0 cmd <- 02
1462 03:54:29.703634 PCI: 00:14.2 cmd <- 02
1463 03:54:29.707151 PCI: 00:14.3 subsystem <- 8086/02f0
1464 03:54:29.710356 PCI: 00:14.3 cmd <- 02
1465 03:54:29.713442 PCI: 00:15.0 subsystem <- 8086/02e8
1466 03:54:29.716714 PCI: 00:15.0 cmd <- 02
1467 03:54:29.719847 PCI: 00:15.1 subsystem <- 8086/02e9
1468 03:54:29.723793 PCI: 00:15.1 cmd <- 02
1469 03:54:29.726917 PCI: 00:16.0 subsystem <- 8086/02e0
1470 03:54:29.729949 PCI: 00:16.0 cmd <- 02
1471 03:54:29.733151 PCI: 00:17.0 subsystem <- 8086/02d3
1472 03:54:29.736269 PCI: 00:17.0 cmd <- 03
1473 03:54:29.740058 PCI: 00:19.0 subsystem <- 8086/02c5
1474 03:54:29.740179 PCI: 00:19.0 cmd <- 02
1475 03:54:29.746372 PCI: 00:1d.0 bridge ctrl <- 0013
1476 03:54:29.749463 PCI: 00:1d.0 subsystem <- 8086/02b0
1477 03:54:29.749548 PCI: 00:1d.0 cmd <- 06
1478 03:54:29.756243 PCI: 00:1e.0 subsystem <- 8086/02a8
1479 03:54:29.756346 PCI: 00:1e.0 cmd <- 06
1480 03:54:29.759470 PCI: 00:1e.2 subsystem <- 8086/02aa
1481 03:54:29.762532 PCI: 00:1e.2 cmd <- 06
1482 03:54:29.765745 PCI: 00:1e.3 subsystem <- 8086/02ab
1483 03:54:29.769527 PCI: 00:1e.3 cmd <- 02
1484 03:54:29.772786 PCI: 00:1f.0 subsystem <- 8086/0284
1485 03:54:29.775896 PCI: 00:1f.0 cmd <- 407
1486 03:54:29.779034 PCI: 00:1f.3 subsystem <- 8086/02c8
1487 03:54:29.782108 PCI: 00:1f.3 cmd <- 02
1488 03:54:29.785653 PCI: 00:1f.4 subsystem <- 8086/02a3
1489 03:54:29.788627 PCI: 00:1f.4 cmd <- 03
1490 03:54:29.792220 PCI: 00:1f.5 subsystem <- 8086/02a4
1491 03:54:29.795206 PCI: 00:1f.5 cmd <- 406
1492 03:54:29.803481 PCI: 01:00.0 cmd <- 02
1493 03:54:29.809119 done.
1494 03:54:29.820227 ME: Version: 14.0.39.1367
1495 03:54:29.827246 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1496 03:54:29.830357 Initializing devices...
1497 03:54:29.830436 Root Device init ...
1498 03:54:29.836629 Chrome EC: Set SMI mask to 0x0000000000000000
1499 03:54:29.843023 Chrome EC: clear events_b mask to 0x0000000000000000
1500 03:54:29.846856 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1501 03:54:29.853294 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1502 03:54:29.859401 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1503 03:54:29.863146 Chrome EC: Set WAKE mask to 0x0000000000000000
1504 03:54:29.869395 Root Device init finished in 35275 usecs
1505 03:54:29.872600 CPU_CLUSTER: 0 init ...
1506 03:54:29.875764 CPU_CLUSTER: 0 init finished in 2447 usecs
1507 03:54:29.881303 PCI: 00:00.0 init ...
1508 03:54:29.884819 CPU TDP: 15 Watts
1509 03:54:29.887819 CPU PL2 = 64 Watts
1510 03:54:29.890978 PCI: 00:00.0 init finished in 7071 usecs
1511 03:54:29.894591 PCI: 00:02.0 init ...
1512 03:54:29.897843 PCI: 00:02.0 init finished in 2252 usecs
1513 03:54:29.900818 PCI: 00:08.0 init ...
1514 03:54:29.904463 PCI: 00:08.0 init finished in 2252 usecs
1515 03:54:29.907679 PCI: 00:12.0 init ...
1516 03:54:29.910625 PCI: 00:12.0 init finished in 2242 usecs
1517 03:54:29.913880 PCI: 00:14.0 init ...
1518 03:54:29.917654 PCI: 00:14.0 init finished in 2253 usecs
1519 03:54:29.920843 PCI: 00:14.2 init ...
1520 03:54:29.924004 PCI: 00:14.2 init finished in 2253 usecs
1521 03:54:29.927064 PCI: 00:14.3 init ...
1522 03:54:29.930359 PCI: 00:14.3 init finished in 2270 usecs
1523 03:54:29.934051 PCI: 00:15.0 init ...
1524 03:54:29.937201 DW I2C bus 0 at 0xd121f000 (400 KHz)
1525 03:54:29.943539 PCI: 00:15.0 init finished in 5965 usecs
1526 03:54:29.943621 PCI: 00:15.1 init ...
1527 03:54:29.946650 DW I2C bus 1 at 0xd1220000 (400 KHz)
1528 03:54:29.953689 PCI: 00:15.1 init finished in 5973 usecs
1529 03:54:29.956754 PCI: 00:16.0 init ...
1530 03:54:29.959939 PCI: 00:16.0 init finished in 2251 usecs
1531 03:54:29.963116 PCI: 00:19.0 init ...
1532 03:54:29.966231 DW I2C bus 4 at 0xd1222000 (400 KHz)
1533 03:54:29.969516 PCI: 00:19.0 init finished in 5976 usecs
1534 03:54:29.972659 PCI: 00:1d.0 init ...
1535 03:54:29.976398 Initializing PCH PCIe bridge.
1536 03:54:29.979581 PCI: 00:1d.0 init finished in 5284 usecs
1537 03:54:29.983321 PCI: 00:1f.0 init ...
1538 03:54:29.986352 IOAPIC: Initializing IOAPIC at 0xfec00000
1539 03:54:29.992974 IOAPIC: Bootstrap Processor Local APIC = 0x00
1540 03:54:29.993052 IOAPIC: ID = 0x02
1541 03:54:29.995970 IOAPIC: Dumping registers
1542 03:54:29.999522 reg 0x0000: 0x02000000
1543 03:54:30.002767 reg 0x0001: 0x00770020
1544 03:54:30.005805 reg 0x0002: 0x00000000
1545 03:54:30.008976 PCI: 00:1f.0 init finished in 23523 usecs
1546 03:54:30.012624 PCI: 00:1f.4 init ...
1547 03:54:30.015830 PCI: 00:1f.4 init finished in 2261 usecs
1548 03:54:30.027139 PCI: 01:00.0 init ...
1549 03:54:30.030271 PCI: 01:00.0 init finished in 2251 usecs
1550 03:54:30.035232 PNP: 0c09.0 init ...
1551 03:54:30.041369 Google Chrome EC uptime: 11.082 seconds
1552 03:54:30.044520 Google Chrome AP resets since EC boot: 0
1553 03:54:30.047625 Google Chrome most recent AP reset causes:
1554 03:54:30.054761 Google Chrome EC reset flags at last EC boot: reset-pin
1555 03:54:30.058026 PNP: 0c09.0 init finished in 20572 usecs
1556 03:54:30.061149 Devices initialized
1557 03:54:30.064317 Show all devs... After init.
1558 03:54:30.064393 Root Device: enabled 1
1559 03:54:30.067484 CPU_CLUSTER: 0: enabled 1
1560 03:54:30.070655 DOMAIN: 0000: enabled 1
1561 03:54:30.070731 APIC: 00: enabled 1
1562 03:54:30.074520 PCI: 00:00.0: enabled 1
1563 03:54:30.077659 PCI: 00:02.0: enabled 1
1564 03:54:30.080745 PCI: 00:04.0: enabled 0
1565 03:54:30.080832 PCI: 00:05.0: enabled 0
1566 03:54:30.083787 PCI: 00:12.0: enabled 1
1567 03:54:30.087342 PCI: 00:12.5: enabled 0
1568 03:54:30.090383 PCI: 00:12.6: enabled 0
1569 03:54:30.090457 PCI: 00:14.0: enabled 1
1570 03:54:30.094106 PCI: 00:14.1: enabled 0
1571 03:54:30.097127 PCI: 00:14.3: enabled 1
1572 03:54:30.100178 PCI: 00:14.5: enabled 0
1573 03:54:30.100254 PCI: 00:15.0: enabled 1
1574 03:54:30.103259 PCI: 00:15.1: enabled 1
1575 03:54:30.106906 PCI: 00:15.2: enabled 0
1576 03:54:30.110001 PCI: 00:15.3: enabled 0
1577 03:54:30.110084 PCI: 00:16.0: enabled 1
1578 03:54:30.113043 PCI: 00:16.1: enabled 0
1579 03:54:30.116950 PCI: 00:16.2: enabled 0
1580 03:54:30.120002 PCI: 00:16.3: enabled 0
1581 03:54:30.120078 PCI: 00:16.4: enabled 0
1582 03:54:30.123148 PCI: 00:16.5: enabled 0
1583 03:54:30.126252 PCI: 00:17.0: enabled 1
1584 03:54:30.129242 PCI: 00:19.0: enabled 1
1585 03:54:30.129314 PCI: 00:19.1: enabled 0
1586 03:54:30.132460 PCI: 00:19.2: enabled 0
1587 03:54:30.136219 PCI: 00:1a.0: enabled 0
1588 03:54:30.139493 PCI: 00:1c.0: enabled 0
1589 03:54:30.139570 PCI: 00:1c.1: enabled 0
1590 03:54:30.142609 PCI: 00:1c.2: enabled 0
1591 03:54:30.145770 PCI: 00:1c.3: enabled 0
1592 03:54:30.149066 PCI: 00:1c.4: enabled 0
1593 03:54:30.149154 PCI: 00:1c.5: enabled 0
1594 03:54:30.152151 PCI: 00:1c.6: enabled 0
1595 03:54:30.155904 PCI: 00:1c.7: enabled 0
1596 03:54:30.159010 PCI: 00:1d.0: enabled 1
1597 03:54:30.159085 PCI: 00:1d.1: enabled 0
1598 03:54:30.162237 PCI: 00:1d.2: enabled 0
1599 03:54:30.165370 PCI: 00:1d.3: enabled 0
1600 03:54:30.168482 PCI: 00:1d.4: enabled 0
1601 03:54:30.168558 PCI: 00:1d.5: enabled 0
1602 03:54:30.171687 PCI: 00:1e.0: enabled 1
1603 03:54:30.175489 PCI: 00:1e.1: enabled 0
1604 03:54:30.178629 PCI: 00:1e.2: enabled 1
1605 03:54:30.178724 PCI: 00:1e.3: enabled 1
1606 03:54:30.181753 PCI: 00:1f.0: enabled 1
1607 03:54:30.184974 PCI: 00:1f.1: enabled 0
1608 03:54:30.188093 PCI: 00:1f.2: enabled 0
1609 03:54:30.188177 PCI: 00:1f.3: enabled 1
1610 03:54:30.191611 PCI: 00:1f.4: enabled 1
1611 03:54:30.194722 PCI: 00:1f.5: enabled 1
1612 03:54:30.194798 PCI: 00:1f.6: enabled 0
1613 03:54:30.198325 USB0 port 0: enabled 1
1614 03:54:30.201436 I2C: 01:15: enabled 1
1615 03:54:30.204526 I2C: 02:5d: enabled 1
1616 03:54:30.204607 GENERIC: 0.0: enabled 1
1617 03:54:30.207610 I2C: 03:1a: enabled 1
1618 03:54:30.211454 I2C: 03:38: enabled 1
1619 03:54:30.211538 I2C: 03:39: enabled 1
1620 03:54:30.214484 I2C: 03:3a: enabled 1
1621 03:54:30.217701 I2C: 03:3b: enabled 1
1622 03:54:30.220813 PCI: 00:00.0: enabled 1
1623 03:54:30.220896 SPI: 00: enabled 1
1624 03:54:30.224062 SPI: 01: enabled 1
1625 03:54:30.224145 PNP: 0c09.0: enabled 1
1626 03:54:30.227819 USB2 port 0: enabled 1
1627 03:54:30.230984 USB2 port 1: enabled 1
1628 03:54:30.234057 USB2 port 2: enabled 0
1629 03:54:30.234129 USB2 port 3: enabled 0
1630 03:54:30.237190 USB2 port 5: enabled 0
1631 03:54:30.240220 USB2 port 6: enabled 1
1632 03:54:30.240302 USB2 port 9: enabled 1
1633 03:54:30.244137 USB3 port 0: enabled 1
1634 03:54:30.247339 USB3 port 1: enabled 1
1635 03:54:30.250446 USB3 port 2: enabled 1
1636 03:54:30.250563 USB3 port 3: enabled 1
1637 03:54:30.253499 USB3 port 4: enabled 0
1638 03:54:30.256587 APIC: 03: enabled 1
1639 03:54:30.256672 APIC: 01: enabled 1
1640 03:54:30.259798 APIC: 02: enabled 1
1641 03:54:30.263054 APIC: 05: enabled 1
1642 03:54:30.263142 APIC: 06: enabled 1
1643 03:54:30.266765 APIC: 04: enabled 1
1644 03:54:30.266850 APIC: 07: enabled 1
1645 03:54:30.270001 PCI: 00:08.0: enabled 1
1646 03:54:30.273022 PCI: 00:14.2: enabled 1
1647 03:54:30.276093 PCI: 01:00.0: enabled 1
1648 03:54:30.279904 Disabling ACPI via APMC:
1649 03:54:30.279984 done.
1650 03:54:30.286147 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1651 03:54:30.289181 ELOG: NV offset 0xaf0000 size 0x4000
1652 03:54:30.296384 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1653 03:54:30.303181 ELOG: Event(17) added with size 13 at 2023-02-26 03:54:30 UTC
1654 03:54:30.309291 POST: Unexpected post code in previous boot: 0x75
1655 03:54:30.316154 ELOG: Event(A3) added with size 11 at 2023-02-26 03:54:30 UTC
1656 03:54:30.322868 ELOG: Event(92) added with size 9 at 2023-02-26 03:54:30 UTC
1657 03:54:30.329132 ELOG: Event(93) added with size 9 at 2023-02-26 03:54:30 UTC
1658 03:54:30.335312 ELOG: Event(9A) added with size 9 at 2023-02-26 03:54:30 UTC
1659 03:54:30.342238 ELOG: Event(9E) added with size 10 at 2023-02-26 03:54:30 UTC
1660 03:54:30.345403 ELOG: Event(9F) added with size 14 at 2023-02-26 03:54:30 UTC
1661 03:54:30.351770 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1662 03:54:30.358651 ELOG: Event(A1) added with size 10 at 2023-02-26 03:54:30 UTC
1663 03:54:30.368178 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1664 03:54:30.374437 ELOG: Event(A0) added with size 9 at 2023-02-26 03:54:30 UTC
1665 03:54:30.378281 elog_add_boot_reason: Logged dev mode boot
1666 03:54:30.378367 Finalize devices...
1667 03:54:30.381438 PCI: 00:17.0 final
1668 03:54:30.384513 Devices finalized
1669 03:54:30.387579 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1670 03:54:30.394278 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1671 03:54:30.397372 ME: HFSTS1 : 0x90000245
1672 03:54:30.400933 ME: HFSTS2 : 0x3B850126
1673 03:54:30.407590 ME: HFSTS3 : 0x00000020
1674 03:54:30.410733 ME: HFSTS4 : 0x00004800
1675 03:54:30.413992 ME: HFSTS5 : 0x00000000
1676 03:54:30.417067 ME: HFSTS6 : 0x40400006
1677 03:54:30.420296 ME: Manufacturing Mode : NO
1678 03:54:30.423455 ME: FW Partition Table : OK
1679 03:54:30.427126 ME: Bringup Loader Failure : NO
1680 03:54:30.430287 ME: Firmware Init Complete : YES
1681 03:54:30.433476 ME: Boot Options Present : NO
1682 03:54:30.439805 ME: Update In Progress : NO
1683 03:54:30.443550 ME: D0i3 Support : YES
1684 03:54:30.446703 ME: Low Power State Enabled : NO
1685 03:54:30.449823 ME: CPU Replaced : NO
1686 03:54:30.453136 ME: CPU Replacement Valid : YES
1687 03:54:30.456243 ME: Current Working State : 5
1688 03:54:30.460071 ME: Current Operation State : 1
1689 03:54:30.463206 ME: Current Operation Mode : 0
1690 03:54:30.463286 ME: Error Code : 0
1691 03:54:30.469649 ME: CPU Debug Disabled : YES
1692 03:54:30.472776 ME: TXT Support : NO
1693 03:54:30.475863 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1694 03:54:30.482753 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1695 03:54:30.485832 CBFS @ c08000 size 3f8000
1696 03:54:30.488859 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1697 03:54:30.492577 CBFS: Locating 'fallback/dsdt.aml'
1698 03:54:30.499306 CBFS: Found @ offset 10bb80 size 3fa5
1699 03:54:30.502399 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1700 03:54:30.505999 CBFS @ c08000 size 3f8000
1701 03:54:30.512094 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1702 03:54:30.515724 CBFS: Locating 'fallback/slic'
1703 03:54:30.518802 CBFS: 'fallback/slic' not found.
1704 03:54:30.525751 ACPI: Writing ACPI tables at 99b3e000.
1705 03:54:30.525836 ACPI: * FACS
1706 03:54:30.528976 ACPI: * DSDT
1707 03:54:30.532072 Ramoops buffer: 0x100000@0x99a3d000.
1708 03:54:30.535110 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1709 03:54:30.542042 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1710 03:54:30.545248 Google Chrome EC: version:
1711 03:54:30.548334 ro: helios_v2.0.2659-56403530b
1712 03:54:30.551553 rw: helios_v2.0.2849-c41de27e7d
1713 03:54:30.551632 running image: 1
1714 03:54:30.555736 ACPI: * FADT
1715 03:54:30.555844 SCI is IRQ9
1716 03:54:30.562075 ACPI: added table 1/32, length now 40
1717 03:54:30.562162 ACPI: * SSDT
1718 03:54:30.565869 Found 1 CPU(s) with 8 core(s) each.
1719 03:54:30.569019 Error: Could not locate 'wifi_sar' in VPD.
1720 03:54:30.575217 Checking CBFS for default SAR values
1721 03:54:30.578660 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1722 03:54:30.581784 CBFS @ c08000 size 3f8000
1723 03:54:30.588680 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1724 03:54:30.591858 CBFS: Locating 'wifi_sar_defaults.hex'
1725 03:54:30.594874 CBFS: Found @ offset 5fac0 size 77
1726 03:54:30.598527 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1727 03:54:30.604696 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1728 03:54:30.607753 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1729 03:54:30.614632 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1730 03:54:30.617683 failed to find key in VPD: dsm_calib_r0_0
1731 03:54:30.627528 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1732 03:54:30.634404 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1733 03:54:30.637598 failed to find key in VPD: dsm_calib_r0_1
1734 03:54:30.643750 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1735 03:54:30.650692 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1736 03:54:30.653741 failed to find key in VPD: dsm_calib_r0_2
1737 03:54:30.663284 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1738 03:54:30.670165 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1739 03:54:30.673398 failed to find key in VPD: dsm_calib_r0_3
1740 03:54:30.683333 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1741 03:54:30.686464 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1742 03:54:30.693252 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1743 03:54:30.696403 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1744 03:54:30.700065 EC returned error result code 1
1745 03:54:30.703156 EC returned error result code 1
1746 03:54:30.709120 EC returned error result code 1
1747 03:54:30.712785 PS2K: Bad resp from EC. Vivaldi disabled!
1748 03:54:30.719072 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1749 03:54:30.722105 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1750 03:54:30.728941 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1751 03:54:30.731954 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1752 03:54:30.738843 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1753 03:54:30.745122 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1754 03:54:30.751989 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1755 03:54:30.758413 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1756 03:54:30.761631 ACPI: added table 2/32, length now 44
1757 03:54:30.761747 ACPI: * MCFG
1758 03:54:30.764784 ACPI: added table 3/32, length now 48
1759 03:54:30.767859 ACPI: * TPM2
1760 03:54:30.771098 TPM2 log created at 99a2d000
1761 03:54:30.774785 ACPI: added table 4/32, length now 52
1762 03:54:30.777864 ACPI: * MADT
1763 03:54:30.777950 SCI is IRQ9
1764 03:54:30.781141 ACPI: added table 5/32, length now 56
1765 03:54:30.784162 current = 99b43ac0
1766 03:54:30.784264 ACPI: * DMAR
1767 03:54:30.787898 ACPI: added table 6/32, length now 60
1768 03:54:30.791087 ACPI: * IGD OpRegion
1769 03:54:30.794279 GMA: Found VBT in CBFS
1770 03:54:30.797519 GMA: Found valid VBT in CBFS
1771 03:54:30.800505 ACPI: added table 7/32, length now 64
1772 03:54:30.800591 ACPI: * HPET
1773 03:54:30.807037 ACPI: added table 8/32, length now 68
1774 03:54:30.807127 ACPI: done.
1775 03:54:30.810625 ACPI tables: 31744 bytes.
1776 03:54:30.814058 smbios_write_tables: 99a2c000
1777 03:54:30.816958 EC returned error result code 3
1778 03:54:30.820544 Couldn't obtain OEM name from CBI
1779 03:54:30.823675 Create SMBIOS type 17
1780 03:54:30.827182 PCI: 00:00.0 (Intel Cannonlake)
1781 03:54:30.827270 PCI: 00:14.3 (Intel WiFi)
1782 03:54:30.830262 SMBIOS tables: 939 bytes.
1783 03:54:30.836519 Writing table forward entry at 0x00000500
1784 03:54:30.840273 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1785 03:54:30.846746 Writing coreboot table at 0x99b62000
1786 03:54:30.849901 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1787 03:54:30.856236 1. 0000000000001000-000000000009ffff: RAM
1788 03:54:30.859486 2. 00000000000a0000-00000000000fffff: RESERVED
1789 03:54:30.862655 3. 0000000000100000-0000000099a2bfff: RAM
1790 03:54:30.869482 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1791 03:54:30.875830 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1792 03:54:30.882293 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1793 03:54:30.886039 7. 000000009a000000-000000009f7fffff: RESERVED
1794 03:54:30.889251 8. 00000000e0000000-00000000efffffff: RESERVED
1795 03:54:30.895545 9. 00000000fc000000-00000000fc000fff: RESERVED
1796 03:54:30.898744 10. 00000000fe000000-00000000fe00ffff: RESERVED
1797 03:54:30.905475 11. 00000000fed10000-00000000fed17fff: RESERVED
1798 03:54:30.908300 12. 00000000fed80000-00000000fed83fff: RESERVED
1799 03:54:30.915169 13. 00000000fed90000-00000000fed91fff: RESERVED
1800 03:54:30.918131 14. 00000000feda0000-00000000feda1fff: RESERVED
1801 03:54:30.924709 15. 0000000100000000-000000045e7fffff: RAM
1802 03:54:30.928271 Graphics framebuffer located at 0xc0000000
1803 03:54:30.931163 Passing 5 GPIOs to payload:
1804 03:54:30.934672 NAME | PORT | POLARITY | VALUE
1805 03:54:30.940938 write protect | undefined | high | low
1806 03:54:30.947865 lid | undefined | high | high
1807 03:54:30.951149 power | undefined | high | low
1808 03:54:30.957406 oprom | undefined | high | low
1809 03:54:30.960600 EC in RW | 0x000000cb | high | low
1810 03:54:30.963710 Board ID: 4
1811 03:54:30.967579 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1812 03:54:30.970802 CBFS @ c08000 size 3f8000
1813 03:54:30.977143 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1814 03:54:30.983478 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum f861
1815 03:54:30.987208 coreboot table: 1492 bytes.
1816 03:54:30.990359 IMD ROOT 0. 99fff000 00001000
1817 03:54:30.993493 IMD SMALL 1. 99ffe000 00001000
1818 03:54:30.996703 FSP MEMORY 2. 99c4e000 003b0000
1819 03:54:30.999799 CONSOLE 3. 99c2e000 00020000
1820 03:54:31.003433 FMAP 4. 99c2d000 0000054e
1821 03:54:31.006465 TIME STAMP 5. 99c2c000 00000910
1822 03:54:31.009956 VBOOT WORK 6. 99c18000 00014000
1823 03:54:31.013080 MRC DATA 7. 99c16000 00001958
1824 03:54:31.016082 ROMSTG STCK 8. 99c15000 00001000
1825 03:54:31.019720 AFTER CAR 9. 99c0b000 0000a000
1826 03:54:31.022769 RAMSTAGE 10. 99baf000 0005c000
1827 03:54:31.025821 REFCODE 11. 99b7a000 00035000
1828 03:54:31.029539 SMM BACKUP 12. 99b6a000 00010000
1829 03:54:31.032598 COREBOOT 13. 99b62000 00008000
1830 03:54:31.035607 ACPI 14. 99b3e000 00024000
1831 03:54:31.039262 ACPI GNVS 15. 99b3d000 00001000
1832 03:54:31.042388 RAMOOPS 16. 99a3d000 00100000
1833 03:54:31.045562 TPM2 TCGLOG17. 99a2d000 00010000
1834 03:54:31.048585 SMBIOS 18. 99a2c000 00000800
1835 03:54:31.051834 IMD small region:
1836 03:54:31.055506 IMD ROOT 0. 99ffec00 00000400
1837 03:54:31.058627 FSP RUNTIME 1. 99ffebe0 00000004
1838 03:54:31.061759 EC HOSTEVENT 2. 99ffebc0 00000008
1839 03:54:31.064883 POWER STATE 3. 99ffeb80 00000040
1840 03:54:31.068087 ROMSTAGE 4. 99ffeb60 00000004
1841 03:54:31.071846 MEM INFO 5. 99ffe9a0 000001b9
1842 03:54:31.074987 VPD 6. 99ffe920 0000006c
1843 03:54:31.078114 MTRR: Physical address space:
1844 03:54:31.084909 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1845 03:54:31.091049 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1846 03:54:31.097465 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1847 03:54:31.104348 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1848 03:54:31.110394 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1849 03:54:31.117099 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1850 03:54:31.120202 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1851 03:54:31.127107 MTRR: Fixed MSR 0x250 0x0606060606060606
1852 03:54:31.130171 MTRR: Fixed MSR 0x258 0x0606060606060606
1853 03:54:31.133303 MTRR: Fixed MSR 0x259 0x0000000000000000
1854 03:54:31.136882 MTRR: Fixed MSR 0x268 0x0606060606060606
1855 03:54:31.143119 MTRR: Fixed MSR 0x269 0x0606060606060606
1856 03:54:31.146895 MTRR: Fixed MSR 0x26a 0x0606060606060606
1857 03:54:31.150075 MTRR: Fixed MSR 0x26b 0x0606060606060606
1858 03:54:31.153100 MTRR: Fixed MSR 0x26c 0x0606060606060606
1859 03:54:31.159398 MTRR: Fixed MSR 0x26d 0x0606060606060606
1860 03:54:31.162607 MTRR: Fixed MSR 0x26e 0x0606060606060606
1861 03:54:31.166356 MTRR: Fixed MSR 0x26f 0x0606060606060606
1862 03:54:31.169458 call enable_fixed_mtrr()
1863 03:54:31.172619 CPU physical address size: 39 bits
1864 03:54:31.179516 MTRR: default type WB/UC MTRR counts: 6/8.
1865 03:54:31.182652 MTRR: WB selected as default type.
1866 03:54:31.189436 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1867 03:54:31.192448 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1868 03:54:31.198841 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1869 03:54:31.205765 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1870 03:54:31.211958 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1871 03:54:31.218655 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1872 03:54:31.224944 MTRR: Fixed MSR 0x250 0x0606060606060606
1873 03:54:31.228509 MTRR: Fixed MSR 0x258 0x0606060606060606
1874 03:54:31.231513 MTRR: Fixed MSR 0x259 0x0000000000000000
1875 03:54:31.235170 MTRR: Fixed MSR 0x268 0x0606060606060606
1876 03:54:31.241123 MTRR: Fixed MSR 0x269 0x0606060606060606
1877 03:54:31.244895 MTRR: Fixed MSR 0x26a 0x0606060606060606
1878 03:54:31.248083 MTRR: Fixed MSR 0x26b 0x0606060606060606
1879 03:54:31.251246 MTRR: Fixed MSR 0x26c 0x0606060606060606
1880 03:54:31.257526 MTRR: Fixed MSR 0x26d 0x0606060606060606
1881 03:54:31.261276 MTRR: Fixed MSR 0x26e 0x0606060606060606
1882 03:54:31.264294 MTRR: Fixed MSR 0x26f 0x0606060606060606
1883 03:54:31.264380
1884 03:54:31.267516 MTRR check
1885 03:54:31.267601 Fixed MTRRs : Enabled
1886 03:54:31.270687 Variable MTRRs: Enabled
1887 03:54:31.270781
1888 03:54:31.274393 call enable_fixed_mtrr()
1889 03:54:31.280744 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1890 03:54:31.283957 CPU physical address size: 39 bits
1891 03:54:31.287113 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1892 03:54:31.294140 MTRR: Fixed MSR 0x250 0x0606060606060606
1893 03:54:31.297186 MTRR: Fixed MSR 0x250 0x0606060606060606
1894 03:54:31.300354 MTRR: Fixed MSR 0x258 0x0606060606060606
1895 03:54:31.303596 MTRR: Fixed MSR 0x259 0x0000000000000000
1896 03:54:31.309863 MTRR: Fixed MSR 0x268 0x0606060606060606
1897 03:54:31.313559 MTRR: Fixed MSR 0x269 0x0606060606060606
1898 03:54:31.316557 MTRR: Fixed MSR 0x26a 0x0606060606060606
1899 03:54:31.319687 MTRR: Fixed MSR 0x26b 0x0606060606060606
1900 03:54:31.326369 MTRR: Fixed MSR 0x26c 0x0606060606060606
1901 03:54:31.329402 MTRR: Fixed MSR 0x26d 0x0606060606060606
1902 03:54:31.333067 MTRR: Fixed MSR 0x26e 0x0606060606060606
1903 03:54:31.336162 MTRR: Fixed MSR 0x26f 0x0606060606060606
1904 03:54:31.342803 MTRR: Fixed MSR 0x258 0x0606060606060606
1905 03:54:31.342886 call enable_fixed_mtrr()
1906 03:54:31.349037 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 03:54:31.352279 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 03:54:31.356022 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 03:54:31.359193 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 03:54:31.365455 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 03:54:31.368549 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 03:54:31.371783 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 03:54:31.375589 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 03:54:31.381948 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 03:54:31.385109 CPU physical address size: 39 bits
1916 03:54:31.388214 call enable_fixed_mtrr()
1917 03:54:31.391975 CBFS @ c08000 size 3f8000
1918 03:54:31.395047 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1919 03:54:31.401323 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 03:54:31.405027 MTRR: Fixed MSR 0x250 0x0606060606060606
1921 03:54:31.408183 MTRR: Fixed MSR 0x258 0x0606060606060606
1922 03:54:31.411246 MTRR: Fixed MSR 0x259 0x0000000000000000
1923 03:54:31.417975 MTRR: Fixed MSR 0x268 0x0606060606060606
1924 03:54:31.421040 MTRR: Fixed MSR 0x269 0x0606060606060606
1925 03:54:31.424230 MTRR: Fixed MSR 0x26a 0x0606060606060606
1926 03:54:31.427805 MTRR: Fixed MSR 0x26b 0x0606060606060606
1927 03:54:31.434044 MTRR: Fixed MSR 0x26c 0x0606060606060606
1928 03:54:31.437753 MTRR: Fixed MSR 0x26d 0x0606060606060606
1929 03:54:31.440824 MTRR: Fixed MSR 0x26e 0x0606060606060606
1930 03:54:31.443805 MTRR: Fixed MSR 0x26f 0x0606060606060606
1931 03:54:31.450743 MTRR: Fixed MSR 0x258 0x0606060606060606
1932 03:54:31.450831 call enable_fixed_mtrr()
1933 03:54:31.457544 MTRR: Fixed MSR 0x259 0x0000000000000000
1934 03:54:31.460680 MTRR: Fixed MSR 0x268 0x0606060606060606
1935 03:54:31.463765 MTRR: Fixed MSR 0x269 0x0606060606060606
1936 03:54:31.467475 MTRR: Fixed MSR 0x26a 0x0606060606060606
1937 03:54:31.473708 MTRR: Fixed MSR 0x26b 0x0606060606060606
1938 03:54:31.476976 MTRR: Fixed MSR 0x26c 0x0606060606060606
1939 03:54:31.480645 MTRR: Fixed MSR 0x26d 0x0606060606060606
1940 03:54:31.483768 MTRR: Fixed MSR 0x26e 0x0606060606060606
1941 03:54:31.490116 MTRR: Fixed MSR 0x26f 0x0606060606060606
1942 03:54:31.493202 CPU physical address size: 39 bits
1943 03:54:31.496357 call enable_fixed_mtrr()
1944 03:54:31.500196 CPU physical address size: 39 bits
1945 03:54:31.503528 CPU physical address size: 39 bits
1946 03:54:31.506475 MTRR: Fixed MSR 0x250 0x0606060606060606
1947 03:54:31.509788 MTRR: Fixed MSR 0x258 0x0606060606060606
1948 03:54:31.516474 MTRR: Fixed MSR 0x259 0x0000000000000000
1949 03:54:31.520043 MTRR: Fixed MSR 0x268 0x0606060606060606
1950 03:54:31.522927 MTRR: Fixed MSR 0x269 0x0606060606060606
1951 03:54:31.526088 MTRR: Fixed MSR 0x26a 0x0606060606060606
1952 03:54:31.532687 MTRR: Fixed MSR 0x26b 0x0606060606060606
1953 03:54:31.536409 MTRR: Fixed MSR 0x26c 0x0606060606060606
1954 03:54:31.539425 MTRR: Fixed MSR 0x26d 0x0606060606060606
1955 03:54:31.542391 MTRR: Fixed MSR 0x26e 0x0606060606060606
1956 03:54:31.549189 MTRR: Fixed MSR 0x26f 0x0606060606060606
1957 03:54:31.552362 MTRR: Fixed MSR 0x250 0x0606060606060606
1958 03:54:31.555446 call enable_fixed_mtrr()
1959 03:54:31.558667 MTRR: Fixed MSR 0x258 0x0606060606060606
1960 03:54:31.561736 MTRR: Fixed MSR 0x259 0x0000000000000000
1961 03:54:31.565018 MTRR: Fixed MSR 0x268 0x0606060606060606
1962 03:54:31.571807 MTRR: Fixed MSR 0x269 0x0606060606060606
1963 03:54:31.575034 MTRR: Fixed MSR 0x26a 0x0606060606060606
1964 03:54:31.578556 MTRR: Fixed MSR 0x26b 0x0606060606060606
1965 03:54:31.581675 MTRR: Fixed MSR 0x26c 0x0606060606060606
1966 03:54:31.588047 MTRR: Fixed MSR 0x26d 0x0606060606060606
1967 03:54:31.591171 MTRR: Fixed MSR 0x26e 0x0606060606060606
1968 03:54:31.594273 MTRR: Fixed MSR 0x26f 0x0606060606060606
1969 03:54:31.598068 CPU physical address size: 39 bits
1970 03:54:31.601169 call enable_fixed_mtrr()
1971 03:54:31.604334 CBFS: Locating 'fallback/payload'
1972 03:54:31.607467 CPU physical address size: 39 bits
1973 03:54:31.614321 CBFS: Found @ offset 1c96c0 size 3f798
1974 03:54:31.617215 Checking segment from ROM address 0xffdd16f8
1975 03:54:31.620691 Checking segment from ROM address 0xffdd1714
1976 03:54:31.627447 Loading segment from ROM address 0xffdd16f8
1977 03:54:31.627534 code (compression=0)
1978 03:54:31.637254 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1979 03:54:31.646543 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1980 03:54:31.646633 it's not compressed!
1981 03:54:31.739721 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1982 03:54:31.746550 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1983 03:54:31.752653 Loading segment from ROM address 0xffdd1714
1984 03:54:31.752742 Entry Point 0x30000000
1985 03:54:31.756556 Loaded segments
1986 03:54:31.761878 Finalizing chipset.
1987 03:54:31.765630 Finalizing SMM.
1988 03:54:31.768758 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1989 03:54:31.771891 mp_park_aps done after 0 msecs.
1990 03:54:31.778161 Jumping to boot code at 30000000(99b62000)
1991 03:54:31.784525 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1992 03:54:31.784611
1993 03:54:31.784683
1994 03:54:31.784751
1995 03:54:31.788275 Starting depthcharge on Helios...
1996 03:54:31.788352
1997 03:54:31.788689 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
1998 03:54:31.788794 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
1999 03:54:31.788881 Setting prompt string to ['hatch:']
2000 03:54:31.788959 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
2001 03:54:31.797726 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2002 03:54:31.797809
2003 03:54:31.804700 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2004 03:54:31.804791
2005 03:54:31.811165 board_setup: Info: eMMC controller not present; skipping
2006 03:54:31.811248
2007 03:54:31.814073 New NVMe Controller 0x30053ac0 @ 00:1d:00
2008 03:54:31.814148
2009 03:54:31.821001 board_setup: Info: SDHCI controller not present; skipping
2010 03:54:31.821087
2011 03:54:31.827830 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2012 03:54:31.827911
2013 03:54:31.827977 Wipe memory regions:
2014 03:54:31.828038
2015 03:54:31.830787 [0x00000000001000, 0x000000000a0000)
2016 03:54:31.833978
2017 03:54:31.837610 [0x00000000100000, 0x00000030000000)
2018 03:54:31.900385
2019 03:54:31.903671 [0x00000030657430, 0x00000099a2c000)
2020 03:54:32.040510
2021 03:54:32.043526 [0x00000100000000, 0x0000045e800000)
2022 03:54:33.427075
2023 03:54:33.427213 R8152: Initializing
2024 03:54:33.427284
2025 03:54:33.430171 Version 9 (ocp_data = 6010)
2026 03:54:33.434041
2027 03:54:33.434114 R8152: Done initializing
2028 03:54:33.434178
2029 03:54:33.437702 Adding net device
2030 03:54:34.041541
2031 03:54:34.041689 R8152: Initializing
2032 03:54:34.041759
2033 03:54:34.044634 Version 6 (ocp_data = 5c30)
2034 03:54:34.044721
2035 03:54:34.048325 R8152: Done initializing
2036 03:54:34.048410
2037 03:54:34.054668 net_add_device: Attemp to include the same device
2038 03:54:34.054753
2039 03:54:34.061678 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2040 03:54:34.061764
2041 03:54:34.061829
2042 03:54:34.061890
2043 03:54:34.062162 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2045 03:54:34.162981 hatch: tftpboot 192.168.201.1 9338283/tftp-deploy-88_dh9ll/kernel/bzImage 9338283/tftp-deploy-88_dh9ll/kernel/cmdline 9338283/tftp-deploy-88_dh9ll/ramdisk/ramdisk.cpio.gz
2046 03:54:34.163137 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2047 03:54:34.163220 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
2048 03:54:34.167470 tftpboot 192.168.201.1 9338283/tftp-deploy-88_dh9ll/kernel/bzImay-88_dh9ll/kernel/cmdline 9338283/tftp-deploy-88_dh9ll/ramdisk/ramdisk.cpio.gz
2049 03:54:34.167559
2050 03:54:34.167626 Waiting for link
2051 03:54:34.368446
2052 03:54:34.368587 done.
2053 03:54:34.368667
2054 03:54:34.368739 MAC: 00:24:32:30:7f:7f
2055 03:54:34.368802
2056 03:54:34.371463 Sending DHCP discover... done.
2057 03:54:34.371551
2058 03:54:34.374385 Waiting for reply... done.
2059 03:54:34.374478
2060 03:54:34.377989 Sending DHCP request... done.
2061 03:54:34.378119
2062 03:54:34.381106 Waiting for reply... done.
2063 03:54:34.381192
2064 03:54:34.384301 My ip is 192.168.201.15
2065 03:54:34.384386
2066 03:54:34.388108 The DHCP server ip is 192.168.201.1
2067 03:54:34.388194
2068 03:54:34.391230 TFTP server IP predefined by user: 192.168.201.1
2069 03:54:34.391316
2070 03:54:34.397356 Bootfile predefined by user: 9338283/tftp-deploy-88_dh9ll/kernel/bzImage
2071 03:54:34.397442
2072 03:54:34.400533 Sending tftp read request... done.
2073 03:54:34.404186
2074 03:54:34.407170 Waiting for the transfer...
2075 03:54:34.407256
2076 03:54:34.934461 00000000 ################################################################
2077 03:54:34.934608
2078 03:54:35.469565 00080000 ################################################################
2079 03:54:35.469720
2080 03:54:36.002994 00100000 ################################################################
2081 03:54:36.003148
2082 03:54:36.524746 00180000 ################################################################
2083 03:54:36.524890
2084 03:54:37.055638 00200000 ################################################################
2085 03:54:37.055830
2086 03:54:37.580860 00280000 ################################################################
2087 03:54:37.581010
2088 03:54:38.101985 00300000 ################################################################
2089 03:54:38.102142
2090 03:54:38.640044 00380000 ################################################################
2091 03:54:38.640193
2092 03:54:39.176593 00400000 ################################################################
2093 03:54:39.176727
2094 03:54:39.697189 00480000 ################################################################
2095 03:54:39.697329
2096 03:54:40.236346 00500000 ################################################################
2097 03:54:40.236487
2098 03:54:40.793127 00580000 ################################################################
2099 03:54:40.793271
2100 03:54:41.337575 00600000 ################################################################
2101 03:54:41.337727
2102 03:54:41.885176 00680000 ################################################################
2103 03:54:41.885321
2104 03:54:42.119446 00700000 ############################# done.
2105 03:54:42.119587
2106 03:54:42.122623 The bootfile was 7573392 bytes long.
2107 03:54:42.122724
2108 03:54:42.125732 Sending tftp read request... done.
2109 03:54:42.125817
2110 03:54:42.128964 Waiting for the transfer...
2111 03:54:42.129044
2112 03:54:42.637928 00000000 ################################################################
2113 03:54:42.638124
2114 03:54:43.137057 00080000 ################################################################
2115 03:54:43.137203
2116 03:54:43.638010 00100000 ################################################################
2117 03:54:43.638160
2118 03:54:44.157961 00180000 ################################################################
2119 03:54:44.158108
2120 03:54:44.669723 00200000 ################################################################
2121 03:54:44.669860
2122 03:54:45.173415 00280000 ################################################################
2123 03:54:45.173562
2124 03:54:45.673649 00300000 ################################################################
2125 03:54:45.673793
2126 03:54:46.174424 00380000 ################################################################
2127 03:54:46.174570
2128 03:54:46.675695 00400000 ################################################################
2129 03:54:46.675836
2130 03:54:47.175366 00480000 ################################################################
2131 03:54:47.175509
2132 03:54:47.418235 00500000 ############################### done.
2133 03:54:47.418378
2134 03:54:47.421387 Sending tftp read request... done.
2135 03:54:47.421467
2136 03:54:47.425025 Waiting for the transfer...
2137 03:54:47.425113
2138 03:54:47.425183 00000000 # done.
2139 03:54:47.425250
2140 03:54:47.434577 Command line loaded dynamically from TFTP file: 9338283/tftp-deploy-88_dh9ll/kernel/cmdline
2141 03:54:47.434679
2142 03:54:47.457472 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9338283/extract-nfsrootfs-oo0950p2,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2143 03:54:47.457602
2144 03:54:47.464336 ec_init(0): CrosEC protocol v3 supported (256, 256)
2145 03:54:47.467537
2146 03:54:47.471207 Shutting down all USB controllers.
2147 03:54:47.471294
2148 03:54:47.471361 Removing current net device
2149 03:54:47.479304
2150 03:54:47.479390 Finalizing coreboot
2151 03:54:47.479459
2152 03:54:47.485413 Exiting depthcharge with code 4 at timestamp: 23019791
2153 03:54:47.485500
2154 03:54:47.485568
2155 03:54:47.485631 Starting kernel ...
2156 03:54:47.485692
2157 03:54:47.485750
2158 03:54:47.486111 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2159 03:54:47.486211 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2160 03:54:47.486288 Setting prompt string to ['Linux version [0-9]']
2161 03:54:47.486357 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2162 03:54:47.486426 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2164 03:59:11.487223 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2166 03:59:11.488373 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2168 03:59:11.489246 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2171 03:59:11.490811 end: 2 depthcharge-action (duration 00:05:00) [common]
2173 03:59:11.492006 Cleaning after the job
2174 03:59:11.492093 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9338283/tftp-deploy-88_dh9ll/ramdisk
2175 03:59:11.492555 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9338283/tftp-deploy-88_dh9ll/kernel
2176 03:59:11.493100 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9338283/tftp-deploy-88_dh9ll/nfsrootfs
2177 03:59:11.538442 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9338283/tftp-deploy-88_dh9ll/modules
2178 03:59:11.538797 start: 4.1 power-off (timeout 00:00:30) [common]
2179 03:59:11.538963 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=off'
2180 03:59:13.706763 >> Command sent successfully.
2181 03:59:13.716737 Returned 0 in 2 seconds
2182 03:59:13.818553 end: 4.1 power-off (duration 00:00:02) [common]
2184 03:59:13.820124 start: 4.2 read-feedback (timeout 00:09:58) [common]
2185 03:59:13.821300 Listened to connection for namespace 'common' for up to 1s
2187 03:59:13.822847 Listened to connection for namespace 'common' for up to 1s
2188 03:59:13.823898 Listened to connection for namespace 'common' for up to 1s
2189 03:59:13.825036 Listened to connection for namespace 'common' for up to 1s
2190 03:59:13.826269 Listened to connection for namespace 'common' for up to 1s
2191 03:59:13.827609 Listened to connection for namespace 'common' for up to 1s
2192 03:59:14.826044 Finalising connection for namespace 'common'
2193 03:59:14.826798 Disconnecting from shell: Finalise
2194 03:59:14.827240