Boot log: acer-cp514-2h-1130g7-volteer

    1 15:58:07.587926  lava-dispatcher, installed at version: 2024.03
    2 15:58:07.588144  start: 0 validate
    3 15:58:07.588261  Start time: 2024-06-14 15:58:07.588256+00:00 (UTC)
    4 15:58:07.588398  Using caching service: 'http://localhost/cache/?uri=%s'
    5 15:58:07.588535  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
    6 15:58:07.888724  Using caching service: 'http://localhost/cache/?uri=%s'
    7 15:58:07.888896  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt-rebase%2Fv4.4-st5-395-gaed3deab96ccf%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 15:58:08.153850  Using caching service: 'http://localhost/cache/?uri=%s'
    9 15:58:08.154850  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt-rebase%2Fv4.4-st5-395-gaed3deab96ccf%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   10 15:58:15.693659  validate duration: 8.11
   12 15:58:15.693911  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 15:58:15.694014  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 15:58:15.694100  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 15:58:15.694238  Not decompressing ramdisk as can be used compressed.
   16 15:58:15.694323  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
   17 15:58:15.694385  saving as /var/lib/lava/dispatcher/tmp/14343413/tftp-deploy-7bqh8dki/ramdisk/rootfs.cpio.gz
   18 15:58:15.694445  total size: 8417901 (8 MB)
   19 15:58:16.510915  progress   0 % (0 MB)
   20 15:58:16.513323  progress   5 % (0 MB)
   21 15:58:16.515446  progress  10 % (0 MB)
   22 15:58:16.517618  progress  15 % (1 MB)
   23 15:58:16.519779  progress  20 % (1 MB)
   24 15:58:16.521891  progress  25 % (2 MB)
   25 15:58:16.524061  progress  30 % (2 MB)
   26 15:58:16.526070  progress  35 % (2 MB)
   27 15:58:16.528206  progress  40 % (3 MB)
   28 15:58:16.530279  progress  45 % (3 MB)
   29 15:58:16.532350  progress  50 % (4 MB)
   30 15:58:16.534444  progress  55 % (4 MB)
   31 15:58:16.536684  progress  60 % (4 MB)
   32 15:58:16.538592  progress  65 % (5 MB)
   33 15:58:16.540690  progress  70 % (5 MB)
   34 15:58:16.542786  progress  75 % (6 MB)
   35 15:58:16.544914  progress  80 % (6 MB)
   36 15:58:16.546958  progress  85 % (6 MB)
   37 15:58:16.549044  progress  90 % (7 MB)
   38 15:58:16.551123  progress  95 % (7 MB)
   39 15:58:16.553061  progress 100 % (8 MB)
   40 15:58:16.553322  8 MB downloaded in 0.86 s (9.35 MB/s)
   41 15:58:16.553506  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 15:58:16.553770  end: 1.1 download-retry (duration 00:00:01) [common]
   44 15:58:16.553879  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 15:58:16.553988  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 15:58:16.554159  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt-rebase/v4.4-st5-395-gaed3deab96ccf/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   47 15:58:16.554236  saving as /var/lib/lava/dispatcher/tmp/14343413/tftp-deploy-7bqh8dki/kernel/bzImage
   48 15:58:16.554289  total size: 14155664 (13 MB)
   49 15:58:16.554343  No compression specified
   50 15:58:16.555385  progress   0 % (0 MB)
   51 15:58:16.559232  progress   5 % (0 MB)
   52 15:58:16.562743  progress  10 % (1 MB)
   53 15:58:16.566119  progress  15 % (2 MB)
   54 15:58:16.569951  progress  20 % (2 MB)
   55 15:58:16.573750  progress  25 % (3 MB)
   56 15:58:16.577276  progress  30 % (4 MB)
   57 15:58:16.581116  progress  35 % (4 MB)
   58 15:58:16.584592  progress  40 % (5 MB)
   59 15:58:16.588734  progress  45 % (6 MB)
   60 15:58:16.592462  progress  50 % (6 MB)
   61 15:58:16.596316  progress  55 % (7 MB)
   62 15:58:16.599847  progress  60 % (8 MB)
   63 15:58:16.603197  progress  65 % (8 MB)
   64 15:58:16.606794  progress  70 % (9 MB)
   65 15:58:16.610227  progress  75 % (10 MB)
   66 15:58:16.613836  progress  80 % (10 MB)
   67 15:58:16.617349  progress  85 % (11 MB)
   68 15:58:16.620700  progress  90 % (12 MB)
   69 15:58:16.624155  progress  95 % (12 MB)
   70 15:58:16.627504  progress 100 % (13 MB)
   71 15:58:16.627765  13 MB downloaded in 0.07 s (183.74 MB/s)
   72 15:58:16.627910  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 15:58:16.628117  end: 1.2 download-retry (duration 00:00:00) [common]
   75 15:58:16.628196  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 15:58:16.628271  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 15:58:16.628400  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt-rebase/v4.4-st5-395-gaed3deab96ccf/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
   78 15:58:16.628460  saving as /var/lib/lava/dispatcher/tmp/14343413/tftp-deploy-7bqh8dki/modules/modules.tar
   79 15:58:16.628511  total size: 717588 (0 MB)
   80 15:58:16.628564  Using unxz to decompress xz
   81 15:58:16.630035  progress   4 % (0 MB)
   82 15:58:16.630307  progress   9 % (0 MB)
   83 15:58:16.631957  progress  18 % (0 MB)
   84 15:58:16.635573  progress  27 % (0 MB)
   85 15:58:16.639345  progress  36 % (0 MB)
   86 15:58:16.641093  progress  41 % (0 MB)
   87 15:58:16.644536  progress  50 % (0 MB)
   88 15:58:16.647909  progress  59 % (0 MB)
   89 15:58:16.651481  progress  68 % (0 MB)
   90 15:58:16.653322  progress  73 % (0 MB)
   91 15:58:16.656677  progress  82 % (0 MB)
   92 15:58:16.660233  progress  91 % (0 MB)
   93 15:58:16.663952  progress 100 % (0 MB)
   94 15:58:16.669611  0 MB downloaded in 0.04 s (16.65 MB/s)
   95 15:58:16.669765  end: 1.3.1 http-download (duration 00:00:00) [common]
   97 15:58:16.669978  end: 1.3 download-retry (duration 00:00:00) [common]
   98 15:58:16.670058  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   99 15:58:16.670136  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
  100 15:58:16.670207  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  101 15:58:16.670280  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
  102 15:58:16.670440  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3
  103 15:58:16.670562  makedir: /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin
  104 15:58:16.670655  makedir: /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/tests
  105 15:58:16.670742  makedir: /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/results
  106 15:58:16.670825  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-add-keys
  107 15:58:16.670957  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-add-sources
  108 15:58:16.671074  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-background-process-start
  109 15:58:16.671189  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-background-process-stop
  110 15:58:16.671310  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-common-functions
  111 15:58:16.671424  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-echo-ipv4
  112 15:58:16.671537  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-install-packages
  113 15:58:16.671655  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-installed-packages
  114 15:58:16.671767  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-os-build
  115 15:58:16.671877  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-probe-channel
  116 15:58:16.671987  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-probe-ip
  117 15:58:16.672099  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-target-ip
  118 15:58:16.672207  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-target-mac
  119 15:58:16.672317  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-target-storage
  120 15:58:16.672429  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-test-case
  121 15:58:16.672538  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-test-event
  122 15:58:16.672646  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-test-feedback
  123 15:58:16.672756  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-test-raise
  124 15:58:16.672868  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-test-reference
  125 15:58:16.672978  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-test-runner
  126 15:58:16.673088  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-test-set
  127 15:58:16.673198  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-test-shell
  128 15:58:16.673310  Updating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-install-packages (oe)
  129 15:58:16.673446  Updating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/bin/lava-installed-packages (oe)
  130 15:58:16.673563  Creating /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/environment
  131 15:58:16.673651  LAVA metadata
  132 15:58:16.673717  - LAVA_JOB_ID=14343413
  133 15:58:16.673773  - LAVA_DISPATCHER_IP=192.168.201.1
  134 15:58:16.673861  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  135 15:58:16.673918  skipped lava-vland-overlay
  136 15:58:16.673997  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  137 15:58:16.674072  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  138 15:58:16.674127  skipped lava-multinode-overlay
  139 15:58:16.674192  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  140 15:58:16.674261  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  141 15:58:16.674323  Loading test definitions
  142 15:58:16.674398  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  143 15:58:16.674457  Using /lava-14343413 at stage 0
  144 15:58:16.674765  uuid=14343413_1.4.2.3.1 testdef=None
  145 15:58:16.674847  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  146 15:58:16.674923  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  147 15:58:16.675363  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  149 15:58:16.675562  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  150 15:58:16.676160  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  152 15:58:16.676370  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  153 15:58:16.676928  runner path: /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/0/tests/0_dmesg test_uuid 14343413_1.4.2.3.1
  154 15:58:16.677072  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  156 15:58:16.677263  Creating lava-test-runner.conf files
  157 15:58:16.677318  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14343413/lava-overlay-52rbj_k3/lava-14343413/0 for stage 0
  158 15:58:16.677398  - 0_dmesg
  159 15:58:16.677496  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  160 15:58:16.677575  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  161 15:58:16.683574  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  162 15:58:16.683682  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  163 15:58:16.683762  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  164 15:58:16.683840  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  165 15:58:16.683917  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  166 15:58:16.908503  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  167 15:58:16.908638  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  168 15:58:16.908717  extracting modules file /var/lib/lava/dispatcher/tmp/14343413/tftp-deploy-7bqh8dki/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14343413/extract-overlay-ramdisk-n0an435a/ramdisk
  169 15:58:16.932363  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  170 15:58:16.932502  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  171 15:58:16.932599  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14343413/compress-overlay-wqyf81sw/overlay-1.4.2.4.tar.gz to ramdisk
  172 15:58:16.932660  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14343413/compress-overlay-wqyf81sw/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14343413/extract-overlay-ramdisk-n0an435a/ramdisk
  173 15:58:16.939564  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  174 15:58:16.939723  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  175 15:58:16.939806  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  176 15:58:16.939912  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  177 15:58:16.939979  Building ramdisk /var/lib/lava/dispatcher/tmp/14343413/extract-overlay-ramdisk-n0an435a/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14343413/extract-overlay-ramdisk-n0an435a/ramdisk
  178 15:58:17.048400  >> 53766 blocks

  179 15:58:18.032128  rename /var/lib/lava/dispatcher/tmp/14343413/extract-overlay-ramdisk-n0an435a/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14343413/tftp-deploy-7bqh8dki/ramdisk/ramdisk.cpio.gz
  180 15:58:18.032302  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  181 15:58:18.032403  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  182 15:58:18.032485  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  183 15:58:18.032555  No mkimage arch provided, not using FIT.
  184 15:58:18.032629  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  185 15:58:18.032701  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  186 15:58:18.032777  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  187 15:58:18.032851  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  188 15:58:18.032909  No LXC device requested
  189 15:58:18.032977  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  190 15:58:18.033050  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  191 15:58:18.033118  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  192 15:58:18.033175  Checking files for TFTP limit of 4294967296 bytes.
  193 15:58:18.033463  end: 1 tftp-deploy (duration 00:00:02) [common]
  194 15:58:18.033551  start: 2 depthcharge-action (timeout 00:05:00) [common]
  195 15:58:18.033631  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  196 15:58:18.033728  substitutions:
  197 15:58:18.033789  - {DTB}: None
  198 15:58:18.033844  - {INITRD}: 14343413/tftp-deploy-7bqh8dki/ramdisk/ramdisk.cpio.gz
  199 15:58:18.033903  - {KERNEL}: 14343413/tftp-deploy-7bqh8dki/kernel/bzImage
  200 15:58:18.033966  - {LAVA_MAC}: None
  201 15:58:18.034019  - {PRESEED_CONFIG}: None
  202 15:58:18.034071  - {PRESEED_LOCAL}: None
  203 15:58:18.034121  - {RAMDISK}: 14343413/tftp-deploy-7bqh8dki/ramdisk/ramdisk.cpio.gz
  204 15:58:18.034180  - {ROOT_PART}: None
  205 15:58:18.034231  - {ROOT}: None
  206 15:58:18.034288  - {SERVER_IP}: 192.168.201.1
  207 15:58:18.034342  - {TEE}: None
  208 15:58:18.034393  Parsed boot commands:
  209 15:58:18.034441  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  210 15:58:18.034577  Parsed boot commands: tftpboot 192.168.201.1 14343413/tftp-deploy-7bqh8dki/kernel/bzImage 14343413/tftp-deploy-7bqh8dki/kernel/cmdline 14343413/tftp-deploy-7bqh8dki/ramdisk/ramdisk.cpio.gz
  211 15:58:18.034662  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  212 15:58:18.034742  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  213 15:58:18.034818  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  214 15:58:18.034895  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  215 15:58:18.034953  Not connected, no need to disconnect.
  216 15:58:18.035020  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  217 15:58:18.035092  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  218 15:58:18.035176  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-6'
  219 15:58:18.038320  Setting prompt string to ['lava-test: # ']
  220 15:58:18.038685  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  221 15:58:18.038819  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  222 15:58:18.038923  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  223 15:58:18.039041  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  224 15:58:18.039317  Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cp514-2h-1130g7-volteer-cbg-6']
  225 15:58:26.734874  Returned 0 in 8 seconds
  226 15:58:26.835380  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  228 15:58:26.835796  end: 2.2.2 reset-device (duration 00:00:09) [common]
  229 15:58:26.835895  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  230 15:58:26.835984  Setting prompt string to 'Starting depthcharge on Voema...'
  231 15:58:26.836048  Changing prompt to 'Starting depthcharge on Voema...'
  232 15:58:26.836113  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  233 15:58:26.836588  [Enter `^Ec?' for help]

  234 15:58:26.836727  

  235 15:58:26.836863  

  236 15:58:26.837039  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  237 15:58:26.837195  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  238 15:58:26.837278  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  239 15:58:26.837419  CPU: AES supported, TXT NOT supported, VT supported

  240 15:58:26.837517  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  241 15:58:26.837601  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  242 15:58:26.837682  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  243 15:58:26.837762  VBOOT: Loading verstage.

  244 15:58:26.837841  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  245 15:58:26.837922  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  246 15:58:26.838005  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  247 15:58:26.838090  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  248 15:58:26.838173  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  249 15:58:26.838254  

  250 15:58:26.838331  

  251 15:58:26.838410  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  252 15:58:26.838488  Probing TPM: . done!

  253 15:58:26.838567  TPM ready after 0 ms

  254 15:58:26.838645  Connected to device vid:did:rid of 1ae0:0028:00

  255 15:58:26.838784  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9

  256 15:58:26.838869  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  257 15:58:26.838948  Initialized TPM device CR50 revision 0

  258 15:58:26.839026  tlcl_send_startup: Startup return code is 0

  259 15:58:26.839103  TPM: setup succeeded

  260 15:58:26.839182  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  261 15:58:26.839261  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  262 15:58:26.839339  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  263 15:58:26.839419  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  264 15:58:26.839496  Chrome EC: UHEPI supported

  265 15:58:26.839573  Phase 1

  266 15:58:26.839678  FMAP: area GBB found @ 1805000 (458752 bytes)

  267 15:58:26.839760  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  268 15:58:26.839844  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  269 15:58:26.839909  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  270 15:58:26.839958  VB2:vb2_check_recovery() Recovery was requested manually

  271 15:58:26.840007  VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7

  272 15:58:26.840056  Recovery requested (1009000e)

  273 15:58:26.840104  TPM: Extending digest for VBOOT: boot mode into PCR 0

  274 15:58:26.840183  tlcl_extend: response is 0

  275 15:58:26.840231  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  276 15:58:26.840281  tlcl_extend: response is 0

  277 15:58:26.840329  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  278 15:58:26.840377  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  279 15:58:26.840426  BS: verstage times (exec / console): total (unknown) / 148 ms

  280 15:58:26.840474  

  281 15:58:26.840528  

  282 15:58:26.840583  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  283 15:58:26.840635  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  284 15:58:26.840683  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  285 15:58:26.840762  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  286 15:58:26.840840  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  287 15:58:26.840926  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  288 15:58:26.841003  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  289 15:58:26.841053  TCO_STS:   0000 0000

  290 15:58:26.841103  GEN_PMCON: d0015038 00002200

  291 15:58:26.841185  GBLRST_CAUSE: 00000000 00000000

  292 15:58:26.841264  HPR_CAUSE0: 00000000

  293 15:58:26.841344  prev_sleep_state 5

  294 15:58:26.841461  Boot Count incremented to 31594

  295 15:58:26.841544  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  296 15:58:26.841623  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  297 15:58:26.841709  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  298 15:58:26.841798  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  299 15:58:26.841876  Chrome EC: UHEPI supported

  300 15:58:26.841966  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  301 15:58:26.842017  Probing TPM:  done!

  302 15:58:26.842096  Connected to device vid:did:rid of 1ae0:0028:00

  303 15:58:26.842177  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9

  304 15:58:26.842255  Initialized TPM device CR50 revision 0

  305 15:58:26.842332  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  306 15:58:26.842409  MRC: Hash idx 0x100b comparison successful.

  307 15:58:26.842484  MRC cache found, size faa8

  308 15:58:26.842560  bootmode is set to: 2

  309 15:58:26.842635  SPD index = 0

  310 15:58:26.842711  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  311 15:58:26.842788  SPD: module type is LPDDR4X

  312 15:58:26.842864  SPD: module part number is MT53E512M64D4NW-046

  313 15:58:26.842940  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  314 15:58:26.843016  SPD: device width 16 bits, bus width 16 bits

  315 15:58:26.843092  SPD: module size is 1024 MB (per channel)

  316 15:58:26.843167  CBMEM:

  317 15:58:26.843242  IMD: root @ 0x76fff000 254 entries.

  318 15:58:26.843318  IMD: root @ 0x76ffec00 62 entries.

  319 15:58:26.843394  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  320 15:58:26.843675  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  321 15:58:26.843798  External stage cache:

  322 15:58:26.843909  IMD: root @ 0x7b3ff000 254 entries.

  323 15:58:26.844019  IMD: root @ 0x7b3fec00 62 entries.

  324 15:58:26.844128  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  325 15:58:26.844239  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  326 15:58:26.844349  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  327 15:58:26.844413  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  328 15:58:26.844464  cse_lite: Skip switching to RW in the recovery path

  329 15:58:26.844513  8 DIMMs found

  330 15:58:26.844563  SMM Memory Map

  331 15:58:26.844612  SMRAM       : 0x7b000000 0x800000

  332 15:58:26.844661   Subregion 0: 0x7b000000 0x200000

  333 15:58:26.844709   Subregion 1: 0x7b200000 0x200000

  334 15:58:26.844757   Subregion 2: 0x7b400000 0x400000

  335 15:58:26.844805  top_of_ram = 0x77000000

  336 15:58:26.844854  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  337 15:58:26.844903  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  338 15:58:26.844951  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  339 15:58:26.844999  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  340 15:58:26.845047  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  341 15:58:26.845096  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  342 15:58:26.845144  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  343 15:58:26.845193  Processing 211 relocs. Offset value of 0x74c0b000

  344 15:58:26.845242  BS: romstage times (exec / console): total (unknown) / 277 ms

  345 15:58:26.845290  

  346 15:58:26.845338  

  347 15:58:26.845385  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  348 15:58:26.845434  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  349 15:58:26.845483  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  350 15:58:26.845532  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  351 15:58:26.845580  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  352 15:58:26.845628  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  353 15:58:26.845677  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  354 15:58:26.845725  Processing 5008 relocs. Offset value of 0x75d98000

  355 15:58:26.845773  BS: postcar times (exec / console): total (unknown) / 59 ms

  356 15:58:26.845822  

  357 15:58:26.845901  

  358 15:58:26.845949  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  359 15:58:26.845998  Normal boot

  360 15:58:26.846046  FW_CONFIG value is 0x804c02

  361 15:58:26.846095  PCI: 00:07.0 disabled by fw_config

  362 15:58:26.846143  PCI: 00:07.1 disabled by fw_config

  363 15:58:26.846191  PCI: 00:0d.2 disabled by fw_config

  364 15:58:26.846237  PCI: 00:1c.7 disabled by fw_config

  365 15:58:26.846285  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  366 15:58:26.846333  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  367 15:58:26.846382  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  368 15:58:26.846430  GENERIC: 0.0 disabled by fw_config

  369 15:58:26.846478  GENERIC: 1.0 disabled by fw_config

  370 15:58:26.846526  fw_config match found: DB_USB=USB3_ACTIVE

  371 15:58:26.846574  fw_config match found: DB_USB=USB3_ACTIVE

  372 15:58:26.846621  fw_config match found: DB_USB=USB3_ACTIVE

  373 15:58:26.846669  fw_config match found: DB_USB=USB3_ACTIVE

  374 15:58:26.846717  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  375 15:58:26.846766  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  376 15:58:26.846814  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  377 15:58:26.846863  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  378 15:58:26.846911  microcode: sig=0x806c1 pf=0x80 revision=0x86

  379 15:58:26.846959  microcode: Update skipped, already up-to-date

  380 15:58:26.847007  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  381 15:58:26.847055  Detected 4 core, 8 thread CPU.

  382 15:58:26.847103  Setting up SMI for CPU

  383 15:58:26.847151  IED base = 0x7b400000

  384 15:58:26.847199  IED size = 0x00400000

  385 15:58:26.847246  Will perform SMM setup.

  386 15:58:26.847293  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  387 15:58:26.847342  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  388 15:58:26.847390  Processing 16 relocs. Offset value of 0x00030000

  389 15:58:26.847438  Attempting to start 7 APs

  390 15:58:26.847485  Waiting for 10ms after sending INIT.

  391 15:58:26.847533  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  392 15:58:26.847581  AP: slot 7 apic_id 7.

  393 15:58:26.847688  AP: slot 3 apic_id 6.

  394 15:58:26.847752  AP: slot 6 apic_id 2.

  395 15:58:26.847800  done.

  396 15:58:26.847865  AP: slot 5 apic_id 4.

  397 15:58:26.847929  AP: slot 4 apic_id 5.

  398 15:58:26.847976  AP: slot 2 apic_id 3.

  399 15:58:26.848023  Waiting for 2nd SIPI to complete...done.

  400 15:58:26.848071  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  401 15:58:26.848119  Processing 13 relocs. Offset value of 0x00038000

  402 15:58:26.848167  Unable to locate Global NVS

  403 15:58:26.848216  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  404 15:58:26.848265  Installing permanent SMM handler to 0x7b000000

  405 15:58:26.848313  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  406 15:58:26.848361  Processing 794 relocs. Offset value of 0x7b010000

  407 15:58:26.848615  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  408 15:58:26.848688  Processing 13 relocs. Offset value of 0x7b008000

  409 15:58:26.848738  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  410 15:58:26.848787  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  411 15:58:26.848836  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  412 15:58:26.848884  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  413 15:58:26.848932  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  414 15:58:26.848980  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  415 15:58:26.849028  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  416 15:58:26.849076  Unable to locate Global NVS

  417 15:58:26.849124  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  418 15:58:26.849172  Clearing SMI status registers

  419 15:58:26.849220  SMI_STS: PM1 

  420 15:58:26.849272  PM1_STS: PWRBTN 

  421 15:58:26.849321  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  422 15:58:26.849368  In relocation handler: CPU 0

  423 15:58:26.849433  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  424 15:58:26.849495  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  425 15:58:26.849543  Relocation complete.

  426 15:58:26.849591  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  427 15:58:26.849639  In relocation handler: CPU 1

  428 15:58:26.849687  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  429 15:58:26.849736  Relocation complete.

  430 15:58:26.849783  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  431 15:58:26.849849  In relocation handler: CPU 6

  432 15:58:26.849912  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  433 15:58:26.849960  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  434 15:58:26.850008  Relocation complete.

  435 15:58:26.850056  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  436 15:58:26.850103  In relocation handler: CPU 2

  437 15:58:26.850151  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  438 15:58:26.850200  Relocation complete.

  439 15:58:26.850248  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  440 15:58:26.850295  In relocation handler: CPU 4

  441 15:58:26.850343  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  442 15:58:26.850391  Relocation complete.

  443 15:58:26.850439  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  444 15:58:26.850487  In relocation handler: CPU 5

  445 15:58:26.850537  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  446 15:58:26.850586  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  447 15:58:26.850634  Relocation complete.

  448 15:58:26.850680  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  449 15:58:26.850727  In relocation handler: CPU 3

  450 15:58:26.850774  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  451 15:58:26.850823  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  452 15:58:26.850870  Relocation complete.

  453 15:58:26.850918  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  454 15:58:26.850966  In relocation handler: CPU 7

  455 15:58:26.851013  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  456 15:58:26.851061  Relocation complete.

  457 15:58:26.851108  Initializing CPU #0

  458 15:58:26.851156  CPU: vendor Intel device 806c1

  459 15:58:26.851204  CPU: family 06, model 8c, stepping 01

  460 15:58:26.851251  Clearing out pending MCEs

  461 15:58:26.851299  Setting up local APIC...

  462 15:58:26.851346   apic_id: 0x00 done.

  463 15:58:26.851393  Turbo is available but hidden

  464 15:58:26.851441  Turbo is available and visible

  465 15:58:26.851489  microcode: Update skipped, already up-to-date

  466 15:58:26.851537  CPU #0 initialized

  467 15:58:26.851584  Initializing CPU #3

  468 15:58:26.851675  Initializing CPU #7

  469 15:58:26.851723  CPU: vendor Intel device 806c1

  470 15:58:26.851771  CPU: family 06, model 8c, stepping 01

  471 15:58:26.851819  CPU: vendor Intel device 806c1

  472 15:58:26.851899  CPU: family 06, model 8c, stepping 01

  473 15:58:26.851946  Clearing out pending MCEs

  474 15:58:26.851994  Initializing CPU #2

  475 15:58:26.852042  Initializing CPU #6

  476 15:58:26.852089  CPU: vendor Intel device 806c1

  477 15:58:26.852136  CPU: family 06, model 8c, stepping 01

  478 15:58:26.852183  CPU: vendor Intel device 806c1

  479 15:58:26.852231  CPU: family 06, model 8c, stepping 01

  480 15:58:26.852278  Clearing out pending MCEs

  481 15:58:26.852327  Clearing out pending MCEs

  482 15:58:26.852374  Setting up local APIC...

  483 15:58:26.852421  Initializing CPU #4

  484 15:58:26.852469  Initializing CPU #5

  485 15:58:26.852517  CPU: vendor Intel device 806c1

  486 15:58:26.852564  CPU: family 06, model 8c, stepping 01

  487 15:58:26.852612  CPU: vendor Intel device 806c1

  488 15:58:26.852659  CPU: family 06, model 8c, stepping 01

  489 15:58:26.852707  Clearing out pending MCEs

  490 15:58:26.852754  Clearing out pending MCEs

  491 15:58:26.852800  Setting up local APIC...

  492 15:58:26.852847  Clearing out pending MCEs

  493 15:58:26.852894  Setting up local APIC...

  494 15:58:26.852941  Setting up local APIC...

  495 15:58:26.852989  Setting up local APIC...

  496 15:58:26.853035   apic_id: 0x05 done.

  497 15:58:26.853082   apic_id: 0x04 done.

  498 15:58:26.853129  microcode: Update skipped, already up-to-date

  499 15:58:26.853177  microcode: Update skipped, already up-to-date

  500 15:58:26.853224   apic_id: 0x02 done.

  501 15:58:26.853271   apic_id: 0x03 done.

  502 15:58:26.853319  microcode: Update skipped, already up-to-date

  503 15:58:26.853367  microcode: Update skipped, already up-to-date

  504 15:58:26.853415  CPU #6 initialized

  505 15:58:26.853463  CPU #2 initialized

  506 15:58:26.853510   apic_id: 0x06 done.

  507 15:58:26.853558  Initializing CPU #1

  508 15:58:26.853605  CPU #4 initialized

  509 15:58:26.853652  CPU #5 initialized

  510 15:58:26.853699  microcode: Update skipped, already up-to-date

  511 15:58:26.853749  Setting up local APIC...

  512 15:58:26.853797  CPU #3 initialized

  513 15:58:26.853862   apic_id: 0x07 done.

  514 15:58:26.853910  CPU: vendor Intel device 806c1

  515 15:58:26.853960  CPU: family 06, model 8c, stepping 01

  516 15:58:26.854022  Clearing out pending MCEs

  517 15:58:26.854069  microcode: Update skipped, already up-to-date

  518 15:58:26.854117  Setting up local APIC...

  519 15:58:26.854164  CPU #7 initialized

  520 15:58:26.854211   apic_id: 0x01 done.

  521 15:58:26.854485  microcode: Update skipped, already up-to-date

  522 15:58:26.854680  CPU #1 initialized

  523 15:58:26.854807  bsp_do_flight_plan done after 455 msecs.

  524 15:58:26.854930  CPU: frequency set to 4000 MHz

  525 15:58:26.855070  Enabling SMIs.

  526 15:58:26.855225  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  527 15:58:26.855336  SATAXPCIE1 indicates PCIe NVMe is present

  528 15:58:26.855477  Probing TPM:  done!

  529 15:58:26.855588  Connected to device vid:did:rid of 1ae0:0028:00

  530 15:58:26.855675  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9

  531 15:58:26.855750  Initialized TPM device CR50 revision 0

  532 15:58:26.855815  Enabling S0i3.4

  533 15:58:26.855863  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  534 15:58:26.855927  Found a VBT of 8704 bytes after decompression

  535 15:58:26.855991  cse_lite: CSE RO boot. HybridStorageMode disabled

  536 15:58:26.856039  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  537 15:58:26.856088  FSPS returned 0

  538 15:58:26.856188  Executing Phase 1 of FspMultiPhaseSiInit

  539 15:58:26.856280  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  540 15:58:26.856366  port C0 DISC req: usage 1 usb3 1 usb2 5

  541 15:58:26.856426  Raw Buffer output 0 00000511

  542 15:58:26.856475  Raw Buffer output 1 00000000

  543 15:58:26.856538  pmc_send_ipc_cmd succeeded

  544 15:58:26.856588  port C1 DISC req: usage 1 usb3 2 usb2 3

  545 15:58:26.856638  Raw Buffer output 0 00000321

  546 15:58:26.856686  Raw Buffer output 1 00000000

  547 15:58:26.856735  pmc_send_ipc_cmd succeeded

  548 15:58:26.856796  Detected 4 core, 8 thread CPU.

  549 15:58:26.856844  Detected 4 core, 8 thread CPU.

  550 15:58:26.856893  Display FSP Version Info HOB

  551 15:58:26.856972  Reference Code - CPU = a.0.4c.31

  552 15:58:26.857020  uCode Version = 0.0.0.86

  553 15:58:26.857068  TXT ACM version = ff.ff.ff.ffff

  554 15:58:26.857116  Reference Code - ME = a.0.4c.31

  555 15:58:26.857180  MEBx version = 0.0.0.0

  556 15:58:26.857229  ME Firmware Version = Consumer SKU

  557 15:58:26.857278  Reference Code - PCH = a.0.4c.31

  558 15:58:26.857328  PCH-CRID Status = Disabled

  559 15:58:26.857376  PCH-CRID Original Value = ff.ff.ff.ffff

  560 15:58:26.857425  PCH-CRID New Value = ff.ff.ff.ffff

  561 15:58:26.857474  OPROM - RST - RAID = ff.ff.ff.ffff

  562 15:58:26.857524  PCH Hsio Version = 4.0.0.0

  563 15:58:26.857573  Reference Code - SA - System Agent = a.0.4c.31

  564 15:58:26.857622  Reference Code - MRC = 2.0.0.1

  565 15:58:26.857672  SA - PCIe Version = a.0.4c.31

  566 15:58:26.857720  SA-CRID Status = Disabled

  567 15:58:26.857769  SA-CRID Original Value = 0.0.0.1

  568 15:58:26.857817  SA-CRID New Value = 0.0.0.1

  569 15:58:26.857865  OPROM - VBIOS = ff.ff.ff.ffff

  570 15:58:26.857915  IO Manageability Engine FW Version = 11.1.4.0

  571 15:58:26.857964  PHY Build Version = 0.0.0.e0

  572 15:58:26.858013  Thunderbolt(TM) FW Version = 0.0.0.0

  573 15:58:26.858062  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  574 15:58:26.858111  ITSS IRQ Polarities Before:

  575 15:58:26.858159  IPC0: 0xffffffff

  576 15:58:26.858207  IPC1: 0xffffffff

  577 15:58:26.858255  IPC2: 0xffffffff

  578 15:58:26.858304  IPC3: 0xffffffff

  579 15:58:26.858353  ITSS IRQ Polarities After:

  580 15:58:26.858402  IPC0: 0xffffffff

  581 15:58:26.858451  IPC1: 0xffffffff

  582 15:58:26.858499  IPC2: 0xffffffff

  583 15:58:26.858547  IPC3: 0xffffffff

  584 15:58:26.858595  Found PCIe Root Port #9 at PCI: 00:1d.0.

  585 15:58:26.858646  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  586 15:58:26.858699  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  587 15:58:26.858749  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  588 15:58:26.858799  BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 237 ms

  589 15:58:26.858849  Enumerating buses...

  590 15:58:26.858898  Show all devs... Before device enumeration.

  591 15:58:26.858948  Root Device: enabled 1

  592 15:58:26.858998  DOMAIN: 0000: enabled 1

  593 15:58:26.859047  CPU_CLUSTER: 0: enabled 1

  594 15:58:26.859095  PCI: 00:00.0: enabled 1

  595 15:58:26.859144  PCI: 00:02.0: enabled 1

  596 15:58:26.859192  PCI: 00:04.0: enabled 1

  597 15:58:26.859240  PCI: 00:05.0: enabled 1

  598 15:58:26.859289  PCI: 00:06.0: enabled 0

  599 15:58:26.859338  PCI: 00:07.0: enabled 0

  600 15:58:26.859386  PCI: 00:07.1: enabled 0

  601 15:58:26.859434  PCI: 00:07.2: enabled 0

  602 15:58:26.859483  PCI: 00:07.3: enabled 0

  603 15:58:26.859531  PCI: 00:08.0: enabled 1

  604 15:58:26.859579  PCI: 00:09.0: enabled 0

  605 15:58:26.859637  PCI: 00:0a.0: enabled 0

  606 15:58:26.859687  PCI: 00:0d.0: enabled 1

  607 15:58:26.859735  PCI: 00:0d.1: enabled 0

  608 15:58:26.859803  PCI: 00:0d.2: enabled 0

  609 15:58:26.859856  PCI: 00:0d.3: enabled 0

  610 15:58:26.859905  PCI: 00:0e.0: enabled 0

  611 15:58:26.859954  PCI: 00:10.2: enabled 1

  612 15:58:26.860004  PCI: 00:10.6: enabled 0

  613 15:58:26.860052  PCI: 00:10.7: enabled 0

  614 15:58:26.860100  PCI: 00:12.0: enabled 0

  615 15:58:26.860148  PCI: 00:12.6: enabled 0

  616 15:58:26.860196  PCI: 00:13.0: enabled 0

  617 15:58:26.860245  PCI: 00:14.0: enabled 1

  618 15:58:26.860293  PCI: 00:14.1: enabled 0

  619 15:58:26.860342  PCI: 00:14.2: enabled 1

  620 15:58:26.860391  PCI: 00:14.3: enabled 1

  621 15:58:26.860439  PCI: 00:15.0: enabled 1

  622 15:58:26.860488  PCI: 00:15.1: enabled 1

  623 15:58:26.860537  PCI: 00:15.2: enabled 1

  624 15:58:26.860585  PCI: 00:15.3: enabled 1

  625 15:58:26.860633  PCI: 00:16.0: enabled 1

  626 15:58:26.860680  PCI: 00:16.1: enabled 0

  627 15:58:26.860729  PCI: 00:16.2: enabled 0

  628 15:58:26.860777  PCI: 00:16.3: enabled 0

  629 15:58:26.860826  PCI: 00:16.4: enabled 0

  630 15:58:26.860873  PCI: 00:16.5: enabled 0

  631 15:58:26.860922  PCI: 00:17.0: enabled 1

  632 15:58:26.860970  PCI: 00:19.0: enabled 0

  633 15:58:26.861019  PCI: 00:19.1: enabled 1

  634 15:58:26.861067  PCI: 00:19.2: enabled 0

  635 15:58:26.861115  PCI: 00:1c.0: enabled 1

  636 15:58:26.861163  PCI: 00:1c.1: enabled 0

  637 15:58:26.861211  PCI: 00:1c.2: enabled 0

  638 15:58:26.861260  PCI: 00:1c.3: enabled 0

  639 15:58:26.861308  PCI: 00:1c.4: enabled 0

  640 15:58:26.861357  PCI: 00:1c.5: enabled 0

  641 15:58:26.861405  PCI: 00:1c.6: enabled 1

  642 15:58:26.861454  PCI: 00:1c.7: enabled 0

  643 15:58:26.861502  PCI: 00:1d.0: enabled 1

  644 15:58:26.861741  PCI: 00:1d.1: enabled 0

  645 15:58:26.861798  PCI: 00:1d.2: enabled 1

  646 15:58:26.861848  PCI: 00:1d.3: enabled 0

  647 15:58:26.861897  PCI: 00:1e.0: enabled 1

  648 15:58:26.861946  PCI: 00:1e.1: enabled 0

  649 15:58:26.861995  PCI: 00:1e.2: enabled 1

  650 15:58:26.862043  PCI: 00:1e.3: enabled 1

  651 15:58:26.862092  PCI: 00:1f.0: enabled 1

  652 15:58:26.862140  PCI: 00:1f.1: enabled 0

  653 15:58:26.862188  PCI: 00:1f.2: enabled 1

  654 15:58:26.862236  PCI: 00:1f.3: enabled 1

  655 15:58:26.862284  PCI: 00:1f.4: enabled 0

  656 15:58:26.862333  PCI: 00:1f.5: enabled 1

  657 15:58:26.862381  PCI: 00:1f.6: enabled 0

  658 15:58:26.862430  PCI: 00:1f.7: enabled 0

  659 15:58:26.862478  APIC: 00: enabled 1

  660 15:58:26.862526  GENERIC: 0.0: enabled 1

  661 15:58:26.862574  GENERIC: 0.0: enabled 1

  662 15:58:26.862643  GENERIC: 1.0: enabled 1

  663 15:58:26.862695  GENERIC: 0.0: enabled 1

  664 15:58:26.862774  GENERIC: 1.0: enabled 1

  665 15:58:26.862823  USB0 port 0: enabled 1

  666 15:58:26.862871  GENERIC: 0.0: enabled 1

  667 15:58:26.862920  USB0 port 0: enabled 1

  668 15:58:26.862968  GENERIC: 0.0: enabled 1

  669 15:58:26.863060  I2C: 00:1a: enabled 1

  670 15:58:26.863122  I2C: 00:31: enabled 1

  671 15:58:26.863171  I2C: 00:32: enabled 1

  672 15:58:26.863219  I2C: 00:10: enabled 1

  673 15:58:26.863268  I2C: 00:15: enabled 1

  674 15:58:26.863317  GENERIC: 0.0: enabled 0

  675 15:58:26.863365  GENERIC: 1.0: enabled 0

  676 15:58:26.863414  GENERIC: 0.0: enabled 1

  677 15:58:26.863462  SPI: 00: enabled 1

  678 15:58:26.863511  SPI: 00: enabled 1

  679 15:58:26.863559  PNP: 0c09.0: enabled 1

  680 15:58:26.863620  GENERIC: 0.0: enabled 1

  681 15:58:26.863671  USB3 port 0: enabled 1

  682 15:58:26.863720  USB3 port 1: enabled 1

  683 15:58:26.863783  USB3 port 2: enabled 0

  684 15:58:26.863830  USB3 port 3: enabled 0

  685 15:58:26.863923  USB2 port 0: enabled 0

  686 15:58:26.863972  USB2 port 1: enabled 1

  687 15:58:26.864020  USB2 port 2: enabled 1

  688 15:58:26.864069  USB2 port 3: enabled 0

  689 15:58:26.864119  USB2 port 4: enabled 1

  690 15:58:26.864167  USB2 port 5: enabled 0

  691 15:58:26.864216  USB2 port 6: enabled 0

  692 15:58:26.864264  USB2 port 7: enabled 0

  693 15:58:26.864312  USB2 port 8: enabled 0

  694 15:58:26.864360  USB2 port 9: enabled 0

  695 15:58:26.864408  USB3 port 0: enabled 0

  696 15:58:26.864456  USB3 port 1: enabled 1

  697 15:58:26.864504  USB3 port 2: enabled 0

  698 15:58:26.864553  USB3 port 3: enabled 0

  699 15:58:26.864601  GENERIC: 0.0: enabled 1

  700 15:58:26.864649  GENERIC: 1.0: enabled 1

  701 15:58:26.864698  APIC: 01: enabled 1

  702 15:58:26.864746  APIC: 03: enabled 1

  703 15:58:26.864795  APIC: 06: enabled 1

  704 15:58:26.864844  APIC: 05: enabled 1

  705 15:58:26.864891  APIC: 04: enabled 1

  706 15:58:26.864940  APIC: 02: enabled 1

  707 15:58:26.864988  APIC: 07: enabled 1

  708 15:58:26.865036  Compare with tree...

  709 15:58:26.865085  Root Device: enabled 1

  710 15:58:26.865134   DOMAIN: 0000: enabled 1

  711 15:58:26.865182    PCI: 00:00.0: enabled 1

  712 15:58:26.865231    PCI: 00:02.0: enabled 1

  713 15:58:26.865279    PCI: 00:04.0: enabled 1

  714 15:58:26.865341     GENERIC: 0.0: enabled 1

  715 15:58:26.865388    PCI: 00:05.0: enabled 1

  716 15:58:26.865435    PCI: 00:06.0: enabled 0

  717 15:58:26.865483    PCI: 00:07.0: enabled 0

  718 15:58:26.865531     GENERIC: 0.0: enabled 1

  719 15:58:26.865578    PCI: 00:07.1: enabled 0

  720 15:58:26.865642     GENERIC: 1.0: enabled 1

  721 15:58:26.865691    PCI: 00:07.2: enabled 0

  722 15:58:26.865770     GENERIC: 0.0: enabled 1

  723 15:58:26.865818    PCI: 00:07.3: enabled 0

  724 15:58:26.865867     GENERIC: 1.0: enabled 1

  725 15:58:26.865915    PCI: 00:08.0: enabled 1

  726 15:58:26.865963    PCI: 00:09.0: enabled 0

  727 15:58:26.866012    PCI: 00:0a.0: enabled 0

  728 15:58:26.866080    PCI: 00:0d.0: enabled 1

  729 15:58:26.866133     USB0 port 0: enabled 1

  730 15:58:26.866182      USB3 port 0: enabled 1

  731 15:58:26.866231      USB3 port 1: enabled 1

  732 15:58:26.866279      USB3 port 2: enabled 0

  733 15:58:26.866328      USB3 port 3: enabled 0

  734 15:58:26.866376    PCI: 00:0d.1: enabled 0

  735 15:58:26.866424    PCI: 00:0d.2: enabled 0

  736 15:58:26.866472     GENERIC: 0.0: enabled 1

  737 15:58:26.866521    PCI: 00:0d.3: enabled 0

  738 15:58:26.866568    PCI: 00:0e.0: enabled 0

  739 15:58:26.866617    PCI: 00:10.2: enabled 1

  740 15:58:26.866665    PCI: 00:10.6: enabled 0

  741 15:58:26.866727    PCI: 00:10.7: enabled 0

  742 15:58:26.866775    PCI: 00:12.0: enabled 0

  743 15:58:26.866822    PCI: 00:12.6: enabled 0

  744 15:58:26.866870    PCI: 00:13.0: enabled 0

  745 15:58:26.866962    PCI: 00:14.0: enabled 1

  746 15:58:26.867010     USB0 port 0: enabled 1

  747 15:58:26.867059      USB2 port 0: enabled 0

  748 15:58:26.867107      USB2 port 1: enabled 1

  749 15:58:26.867156      USB2 port 2: enabled 1

  750 15:58:26.867205      USB2 port 3: enabled 0

  751 15:58:26.867253      USB2 port 4: enabled 1

  752 15:58:26.867301      USB2 port 5: enabled 0

  753 15:58:26.867350      USB2 port 6: enabled 0

  754 15:58:26.867399      USB2 port 7: enabled 0

  755 15:58:26.867447      USB2 port 8: enabled 0

  756 15:58:26.867495      USB2 port 9: enabled 0

  757 15:58:26.867544      USB3 port 0: enabled 0

  758 15:58:26.867592      USB3 port 1: enabled 1

  759 15:58:26.867702      USB3 port 2: enabled 0

  760 15:58:26.867767      USB3 port 3: enabled 0

  761 15:58:26.867848    PCI: 00:14.1: enabled 0

  762 15:58:26.867896    PCI: 00:14.2: enabled 1

  763 15:58:26.867944    PCI: 00:14.3: enabled 1

  764 15:58:26.868021     GENERIC: 0.0: enabled 1

  765 15:58:26.868069    PCI: 00:15.0: enabled 1

  766 15:58:26.868133     I2C: 00:1a: enabled 1

  767 15:58:26.868196     I2C: 00:31: enabled 1

  768 15:58:26.868261     I2C: 00:32: enabled 1

  769 15:58:26.868309    PCI: 00:15.1: enabled 1

  770 15:58:26.868358     I2C: 00:10: enabled 1

  771 15:58:26.868420    PCI: 00:15.2: enabled 1

  772 15:58:26.868468    PCI: 00:15.3: enabled 1

  773 15:58:26.868515    PCI: 00:16.0: enabled 1

  774 15:58:26.868562    PCI: 00:16.1: enabled 0

  775 15:58:26.868609    PCI: 00:16.2: enabled 0

  776 15:58:26.868657    PCI: 00:16.3: enabled 0

  777 15:58:26.868704    PCI: 00:16.4: enabled 0

  778 15:58:26.868751    PCI: 00:16.5: enabled 0

  779 15:58:26.868830    PCI: 00:17.0: enabled 1

  780 15:58:26.868877    PCI: 00:19.0: enabled 0

  781 15:58:26.868924    PCI: 00:19.1: enabled 1

  782 15:58:26.868972     I2C: 00:15: enabled 1

  783 15:58:26.869049    PCI: 00:19.2: enabled 0

  784 15:58:26.869096    PCI: 00:1d.0: enabled 1

  785 15:58:26.869143     GENERIC: 0.0: enabled 1

  786 15:58:26.869207    PCI: 00:1e.0: enabled 1

  787 15:58:26.869256    PCI: 00:1e.1: enabled 0

  788 15:58:26.869304    PCI: 00:1e.2: enabled 1

  789 15:58:26.869369     SPI: 00: enabled 1

  790 15:58:26.869452    PCI: 00:1e.3: enabled 1

  791 15:58:26.869501     SPI: 00: enabled 1

  792 15:58:26.869550    PCI: 00:1f.0: enabled 1

  793 15:58:26.869598     PNP: 0c09.0: enabled 1

  794 15:58:26.869647    PCI: 00:1f.1: enabled 0

  795 15:58:26.869695    PCI: 00:1f.2: enabled 1

  796 15:58:26.869744     GENERIC: 0.0: enabled 1

  797 15:58:26.869793      GENERIC: 0.0: enabled 1

  798 15:58:26.869841      GENERIC: 1.0: enabled 1

  799 15:58:26.869890    PCI: 00:1f.3: enabled 1

  800 15:58:26.869939    PCI: 00:1f.4: enabled 0

  801 15:58:26.869988    PCI: 00:1f.5: enabled 1

  802 15:58:26.870037    PCI: 00:1f.6: enabled 0

  803 15:58:26.870282    PCI: 00:1f.7: enabled 0

  804 15:58:26.870337   CPU_CLUSTER: 0: enabled 1

  805 15:58:26.870388    APIC: 00: enabled 1

  806 15:58:26.870438    APIC: 01: enabled 1

  807 15:58:26.870487    APIC: 03: enabled 1

  808 15:58:26.870536    APIC: 06: enabled 1

  809 15:58:26.870584    APIC: 05: enabled 1

  810 15:58:26.870633    APIC: 04: enabled 1

  811 15:58:26.870681    APIC: 02: enabled 1

  812 15:58:26.870729    APIC: 07: enabled 1

  813 15:58:26.870778  Root Device scanning...

  814 15:58:26.870827  scan_static_bus for Root Device

  815 15:58:26.870876  DOMAIN: 0000 enabled

  816 15:58:26.870926  CPU_CLUSTER: 0 enabled

  817 15:58:26.870974  DOMAIN: 0000 scanning...

  818 15:58:26.871022  PCI: pci_scan_bus for bus 00

  819 15:58:26.871071  PCI: 00:00.0 [8086/0000] ops

  820 15:58:26.871120  PCI: 00:00.0 [8086/9a12] enabled

  821 15:58:26.871196  PCI: 00:02.0 [8086/0000] bus ops

  822 15:58:26.871244  PCI: 00:02.0 [8086/9a40] enabled

  823 15:58:26.871293  PCI: 00:04.0 [8086/0000] bus ops

  824 15:58:26.871342  PCI: 00:04.0 [8086/9a03] enabled

  825 15:58:26.871390  PCI: 00:05.0 [8086/9a19] enabled

  826 15:58:26.871439  PCI: 00:07.0 [0000/0000] hidden

  827 15:58:26.871487  PCI: 00:08.0 [8086/9a11] enabled

  828 15:58:26.871535  PCI: 00:0a.0 [8086/9a0d] disabled

  829 15:58:26.871584  PCI: 00:0d.0 [8086/0000] bus ops

  830 15:58:26.871659  PCI: 00:0d.0 [8086/9a13] enabled

  831 15:58:26.871725  PCI: 00:14.0 [8086/0000] bus ops

  832 15:58:26.871773  PCI: 00:14.0 [8086/a0ed] enabled

  833 15:58:26.871821  PCI: 00:14.2 [8086/a0ef] enabled

  834 15:58:26.871870  PCI: 00:14.3 [8086/0000] bus ops

  835 15:58:26.871949  PCI: 00:14.3 [8086/a0f0] enabled

  836 15:58:26.871998  PCI: 00:15.0 [8086/0000] bus ops

  837 15:58:26.872047  PCI: 00:15.0 [8086/a0e8] enabled

  838 15:58:26.872096  PCI: 00:15.1 [8086/0000] bus ops

  839 15:58:26.872145  PCI: 00:15.1 [8086/a0e9] enabled

  840 15:58:26.872194  PCI: 00:15.2 [8086/0000] bus ops

  841 15:58:26.872243  PCI: 00:15.2 [8086/a0ea] enabled

  842 15:58:26.872304  PCI: 00:15.3 [8086/0000] bus ops

  843 15:58:26.872352  PCI: 00:15.3 [8086/a0eb] enabled

  844 15:58:26.872414  PCI: 00:16.0 [8086/0000] ops

  845 15:58:26.872478  PCI: 00:16.0 [8086/a0e0] enabled

  846 15:58:26.872570  PCI: Static device PCI: 00:17.0 not found, disabling it.

  847 15:58:26.872637  PCI: 00:19.0 [8086/0000] bus ops

  848 15:58:26.872715  PCI: 00:19.0 [8086/a0c5] disabled

  849 15:58:26.872765  PCI: 00:19.1 [8086/0000] bus ops

  850 15:58:26.872814  PCI: 00:19.1 [8086/a0c6] enabled

  851 15:58:26.872863  PCI: 00:1d.0 [8086/0000] bus ops

  852 15:58:26.872926  PCI: 00:1d.0 [8086/a0b0] enabled

  853 15:58:26.872974  PCI: 00:1e.0 [8086/0000] ops

  854 15:58:26.873022  PCI: 00:1e.0 [8086/a0a8] enabled

  855 15:58:26.873086  PCI: 00:1e.2 [8086/0000] bus ops

  856 15:58:26.873134  PCI: 00:1e.2 [8086/a0aa] enabled

  857 15:58:26.873184  PCI: 00:1e.3 [8086/0000] bus ops

  858 15:58:26.873232  PCI: 00:1e.3 [8086/a0ab] enabled

  859 15:58:26.873281  PCI: 00:1f.0 [8086/0000] bus ops

  860 15:58:26.873330  PCI: 00:1f.0 [8086/a087] enabled

  861 15:58:26.873378  RTC Init

  862 15:58:26.873427  Set power on after power failure.

  863 15:58:26.873477  Disabling Deep S3

  864 15:58:26.873526  Disabling Deep S3

  865 15:58:26.873574  Disabling Deep S4

  866 15:58:26.873623  Disabling Deep S4

  867 15:58:26.873672  Disabling Deep S5

  868 15:58:26.873721  Disabling Deep S5

  869 15:58:26.873770  PCI: 00:1f.2 [0000/0000] hidden

  870 15:58:26.873818  PCI: 00:1f.3 [8086/0000] bus ops

  871 15:58:26.873868  PCI: 00:1f.3 [8086/a0c8] enabled

  872 15:58:26.873917  PCI: 00:1f.5 [8086/0000] bus ops

  873 15:58:26.873967  PCI: 00:1f.5 [8086/a0a4] enabled

  874 15:58:26.874016  PCI: Leftover static devices:

  875 15:58:26.874065  PCI: 00:10.2

  876 15:58:26.874128  PCI: 00:10.6

  877 15:58:26.874176  PCI: 00:10.7

  878 15:58:26.874224  PCI: 00:06.0

  879 15:58:26.874271  PCI: 00:07.1

  880 15:58:26.874318  PCI: 00:07.2

  881 15:58:26.874365  PCI: 00:07.3

  882 15:58:26.874412  PCI: 00:09.0

  883 15:58:26.874460  PCI: 00:0d.1

  884 15:58:26.874507  PCI: 00:0d.2

  885 15:58:26.874554  PCI: 00:0d.3

  886 15:58:26.874602  PCI: 00:0e.0

  887 15:58:26.874649  PCI: 00:12.0

  888 15:58:26.874696  PCI: 00:12.6

  889 15:58:26.874743  PCI: 00:13.0

  890 15:58:26.874790  PCI: 00:14.1

  891 15:58:26.874837  PCI: 00:16.1

  892 15:58:26.874884  PCI: 00:16.2

  893 15:58:26.874931  PCI: 00:16.3

  894 15:58:26.874979  PCI: 00:16.4

  895 15:58:26.875025  PCI: 00:16.5

  896 15:58:26.875072  PCI: 00:17.0

  897 15:58:26.875119  PCI: 00:19.2

  898 15:58:26.875165  PCI: 00:1e.1

  899 15:58:26.875212  PCI: 00:1f.1

  900 15:58:26.875259  PCI: 00:1f.4

  901 15:58:26.875306  PCI: 00:1f.6

  902 15:58:26.875353  PCI: 00:1f.7

  903 15:58:26.875400  PCI: Check your devicetree.cb.

  904 15:58:26.875447  PCI: 00:02.0 scanning...

  905 15:58:26.875495  scan_generic_bus for PCI: 00:02.0

  906 15:58:26.875542  scan_generic_bus for PCI: 00:02.0 done

  907 15:58:26.875590  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  908 15:58:26.875678  PCI: 00:04.0 scanning...

  909 15:58:26.875726  scan_generic_bus for PCI: 00:04.0

  910 15:58:26.875773  GENERIC: 0.0 enabled

  911 15:58:26.875821  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  912 15:58:26.875868  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  913 15:58:26.875916  PCI: 00:0d.0 scanning...

  914 15:58:26.875980  scan_static_bus for PCI: 00:0d.0

  915 15:58:26.876062  USB0 port 0 enabled

  916 15:58:26.876115  USB0 port 0 scanning...

  917 15:58:26.876164  scan_static_bus for USB0 port 0

  918 15:58:26.876212  USB3 port 0 enabled

  919 15:58:26.876261  USB3 port 1 enabled

  920 15:58:26.876309  USB3 port 2 disabled

  921 15:58:26.876357  USB3 port 3 disabled

  922 15:58:26.876404  USB3 port 0 scanning...

  923 15:58:26.876452  scan_static_bus for USB3 port 0

  924 15:58:26.876501  scan_static_bus for USB3 port 0 done

  925 15:58:26.876549  scan_bus: bus USB3 port 0 finished in 6 msecs

  926 15:58:26.876597  USB3 port 1 scanning...

  927 15:58:26.876645  scan_static_bus for USB3 port 1

  928 15:58:26.876693  scan_static_bus for USB3 port 1 done

  929 15:58:26.876741  scan_bus: bus USB3 port 1 finished in 6 msecs

  930 15:58:26.876788  scan_static_bus for USB0 port 0 done

  931 15:58:26.876836  scan_bus: bus USB0 port 0 finished in 43 msecs

  932 15:58:26.876884  scan_static_bus for PCI: 00:0d.0 done

  933 15:58:26.876932  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  934 15:58:26.876981  PCI: 00:14.0 scanning...

  935 15:58:26.877029  scan_static_bus for PCI: 00:14.0

  936 15:58:26.877077  USB0 port 0 enabled

  937 15:58:26.877125  USB0 port 0 scanning...

  938 15:58:26.877173  scan_static_bus for USB0 port 0

  939 15:58:26.877220  USB2 port 0 disabled

  940 15:58:26.877268  USB2 port 1 enabled

  941 15:58:26.877315  USB2 port 2 enabled

  942 15:58:26.877362  USB2 port 3 disabled

  943 15:58:26.877410  USB2 port 4 enabled

  944 15:58:26.877457  USB2 port 5 disabled

  945 15:58:26.877505  USB2 port 6 disabled

  946 15:58:26.877552  USB2 port 7 disabled

  947 15:58:26.877599  USB2 port 8 disabled

  948 15:58:26.877647  USB2 port 9 disabled

  949 15:58:26.877694  USB3 port 0 disabled

  950 15:58:26.877741  USB3 port 1 enabled

  951 15:58:26.877788  USB3 port 2 disabled

  952 15:58:26.877835  USB3 port 3 disabled

  953 15:58:26.878081  USB2 port 1 scanning...

  954 15:58:26.878138  scan_static_bus for USB2 port 1

  955 15:58:26.878188  scan_static_bus for USB2 port 1 done

  956 15:58:26.878236  scan_bus: bus USB2 port 1 finished in 6 msecs

  957 15:58:26.878284  USB2 port 2 scanning...

  958 15:58:26.878332  scan_static_bus for USB2 port 2

  959 15:58:26.878381  scan_static_bus for USB2 port 2 done

  960 15:58:26.878429  scan_bus: bus USB2 port 2 finished in 6 msecs

  961 15:58:26.878477  USB2 port 4 scanning...

  962 15:58:26.878524  scan_static_bus for USB2 port 4

  963 15:58:26.878572  scan_static_bus for USB2 port 4 done

  964 15:58:26.878620  scan_bus: bus USB2 port 4 finished in 6 msecs

  965 15:58:26.878668  USB3 port 1 scanning...

  966 15:58:26.878716  scan_static_bus for USB3 port 1

  967 15:58:26.878763  scan_static_bus for USB3 port 1 done

  968 15:58:26.878811  scan_bus: bus USB3 port 1 finished in 6 msecs

  969 15:58:26.878859  scan_static_bus for USB0 port 0 done

  970 15:58:26.878907  scan_bus: bus USB0 port 0 finished in 93 msecs

  971 15:58:26.878955  scan_static_bus for PCI: 00:14.0 done

  972 15:58:26.879003  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

  973 15:58:26.879051  PCI: 00:14.3 scanning...

  974 15:58:26.879098  scan_static_bus for PCI: 00:14.3

  975 15:58:26.879146  GENERIC: 0.0 enabled

  976 15:58:26.879193  scan_static_bus for PCI: 00:14.3 done

  977 15:58:26.879241  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  978 15:58:26.879289  PCI: 00:15.0 scanning...

  979 15:58:26.879337  scan_static_bus for PCI: 00:15.0

  980 15:58:26.879403  I2C: 00:1a enabled

  981 15:58:26.879490  I2C: 00:31 enabled

  982 15:58:26.879567  I2C: 00:32 enabled

  983 15:58:26.879656  scan_static_bus for PCI: 00:15.0 done

  984 15:58:26.879707  scan_bus: bus PCI: 00:15.0 finished in 13 msecs

  985 15:58:26.879756  PCI: 00:15.1 scanning...

  986 15:58:26.879804  scan_static_bus for PCI: 00:15.1

  987 15:58:26.879885  I2C: 00:10 enabled

  988 15:58:26.879933  scan_static_bus for PCI: 00:15.1 done

  989 15:58:26.879981  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

  990 15:58:26.880046  PCI: 00:15.2 scanning...

  991 15:58:26.880109  scan_static_bus for PCI: 00:15.2

  992 15:58:26.880157  scan_static_bus for PCI: 00:15.2 done

  993 15:58:26.880223  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

  994 15:58:26.880272  PCI: 00:15.3 scanning...

  995 15:58:26.880333  scan_static_bus for PCI: 00:15.3

  996 15:58:26.880398  scan_static_bus for PCI: 00:15.3 done

  997 15:58:26.880461  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

  998 15:58:26.880509  PCI: 00:19.1 scanning...

  999 15:58:26.880556  scan_static_bus for PCI: 00:19.1

 1000 15:58:26.880636  I2C: 00:15 enabled

 1001 15:58:26.880684  scan_static_bus for PCI: 00:19.1 done

 1002 15:58:26.880732  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1003 15:58:26.880779  PCI: 00:1d.0 scanning...

 1004 15:58:26.880826  do_pci_scan_bridge for PCI: 00:1d.0

 1005 15:58:26.880874  PCI: pci_scan_bus for bus 01

 1006 15:58:26.880922  PCI: 01:00.0 [1c5c/174a] enabled

 1007 15:58:26.880970  GENERIC: 0.0 enabled

 1008 15:58:26.881017  Enabling Common Clock Configuration

 1009 15:58:26.881065  L1 Sub-State supported from root port 29

 1010 15:58:26.881113  L1 Sub-State Support = 0xf

 1011 15:58:26.881162  CommonModeRestoreTime = 0x28

 1012 15:58:26.881210  Power On Value = 0x16, Power On Scale = 0x0

 1013 15:58:26.881258  ASPM: Enabled L1

 1014 15:58:26.881305  PCIe: Max_Payload_Size adjusted to 128

 1015 15:58:26.881354  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1016 15:58:26.881402  PCI: 00:1e.2 scanning...

 1017 15:58:26.881450  scan_generic_bus for PCI: 00:1e.2

 1018 15:58:26.881498  SPI: 00 enabled

 1019 15:58:26.881545  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1020 15:58:26.881593  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1021 15:58:26.881640  PCI: 00:1e.3 scanning...

 1022 15:58:26.881690  scan_generic_bus for PCI: 00:1e.3

 1023 15:58:26.881739  SPI: 00 enabled

 1024 15:58:26.881786  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1025 15:58:26.881835  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1026 15:58:26.881917  PCI: 00:1f.0 scanning...

 1027 15:58:26.881965  scan_static_bus for PCI: 00:1f.0

 1028 15:58:26.882012  PNP: 0c09.0 enabled

 1029 15:58:26.882060  PNP: 0c09.0 scanning...

 1030 15:58:26.882140  scan_static_bus for PNP: 0c09.0

 1031 15:58:26.882188  scan_static_bus for PNP: 0c09.0 done

 1032 15:58:26.882236  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1033 15:58:26.882284  scan_static_bus for PCI: 00:1f.0 done

 1034 15:58:26.882332  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1035 15:58:26.882380  PCI: 00:1f.2 scanning...

 1036 15:58:26.882428  scan_static_bus for PCI: 00:1f.2

 1037 15:58:26.882475  GENERIC: 0.0 enabled

 1038 15:58:26.882523  GENERIC: 0.0 scanning...

 1039 15:58:26.882571  scan_static_bus for GENERIC: 0.0

 1040 15:58:26.882618  GENERIC: 0.0 enabled

 1041 15:58:26.882666  GENERIC: 1.0 enabled

 1042 15:58:26.882713  scan_static_bus for GENERIC: 0.0 done

 1043 15:58:26.882761  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1044 15:58:26.882830  scan_static_bus for PCI: 00:1f.2 done

 1045 15:58:26.882905  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1046 15:58:26.882954  PCI: 00:1f.3 scanning...

 1047 15:58:26.883001  scan_static_bus for PCI: 00:1f.3

 1048 15:58:26.883050  scan_static_bus for PCI: 00:1f.3 done

 1049 15:58:26.883098  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1050 15:58:26.883145  PCI: 00:1f.5 scanning...

 1051 15:58:26.883193  scan_generic_bus for PCI: 00:1f.5

 1052 15:58:26.883258  scan_generic_bus for PCI: 00:1f.5 done

 1053 15:58:26.883308  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1054 15:58:26.883359  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1055 15:58:26.883409  scan_static_bus for Root Device done

 1056 15:58:26.883458  scan_bus: bus Root Device finished in 736 msecs

 1057 15:58:26.883508  done

 1058 15:58:26.883557  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1059 15:58:26.883615  Chrome EC: UHEPI supported

 1060 15:58:26.883698  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1061 15:58:26.883761  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1062 15:58:26.883810  SPI flash protection: WPSW=0 SRP0=0

 1063 15:58:26.883875  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1064 15:58:26.883938  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1065 15:58:26.883986  found VGA at PCI: 00:02.0

 1066 15:58:26.884034  Setting up VGA for PCI: 00:02.0

 1067 15:58:26.884323  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1068 15:58:26.884379  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1069 15:58:26.884444  Allocating resources...

 1070 15:58:26.884492  Reading resources...

 1071 15:58:26.884540  Root Device read_resources bus 0 link: 0

 1072 15:58:26.884588  DOMAIN: 0000 read_resources bus 0 link: 0

 1073 15:58:26.884652  PCI: 00:04.0 read_resources bus 1 link: 0

 1074 15:58:26.884715  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1075 15:58:26.884763  PCI: 00:0d.0 read_resources bus 0 link: 0

 1076 15:58:26.884839  USB0 port 0 read_resources bus 0 link: 0

 1077 15:58:26.884916  USB0 port 0 read_resources bus 0 link: 0 done

 1078 15:58:26.884963  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1079 15:58:26.885011  PCI: 00:14.0 read_resources bus 0 link: 0

 1080 15:58:26.885059  USB0 port 0 read_resources bus 0 link: 0

 1081 15:58:26.885107  USB0 port 0 read_resources bus 0 link: 0 done

 1082 15:58:26.885155  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1083 15:58:26.885203  PCI: 00:14.3 read_resources bus 0 link: 0

 1084 15:58:26.885251  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1085 15:58:26.885299  PCI: 00:15.0 read_resources bus 0 link: 0

 1086 15:58:26.885346  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1087 15:58:26.885394  PCI: 00:15.1 read_resources bus 0 link: 0

 1088 15:58:26.885443  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1089 15:58:26.885491  PCI: 00:19.1 read_resources bus 0 link: 0

 1090 15:58:26.885539  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1091 15:58:26.885638  PCI: 00:1d.0 read_resources bus 1 link: 0

 1092 15:58:26.885720  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1093 15:58:26.885809  PCI: 00:1e.2 read_resources bus 2 link: 0

 1094 15:58:26.885858  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1095 15:58:26.885906  PCI: 00:1e.3 read_resources bus 3 link: 0

 1096 15:58:26.885955  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1097 15:58:26.886002  PCI: 00:1f.0 read_resources bus 0 link: 0

 1098 15:58:26.886050  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1099 15:58:26.886098  PCI: 00:1f.2 read_resources bus 0 link: 0

 1100 15:58:26.886146  GENERIC: 0.0 read_resources bus 0 link: 0

 1101 15:58:26.886194  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1102 15:58:26.886242  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1103 15:58:26.886290  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1104 15:58:26.886338  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1105 15:58:26.886386  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1106 15:58:26.886433  Root Device read_resources bus 0 link: 0 done

 1107 15:58:26.886481  Done reading resources.

 1108 15:58:26.886530  Show resources in subtree (Root Device)...After reading.

 1109 15:58:26.886578   Root Device child on link 0 DOMAIN: 0000

 1110 15:58:26.886626    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1111 15:58:26.886674    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1112 15:58:26.886724    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1113 15:58:26.886773     PCI: 00:00.0

 1114 15:58:26.886821     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1115 15:58:26.886870     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1116 15:58:26.886920     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1117 15:58:26.886969     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1118 15:58:26.887017     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1119 15:58:26.887066     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1120 15:58:26.887115     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1121 15:58:26.887164     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1122 15:58:26.887212     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1123 15:58:26.887262     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1124 15:58:26.887311     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1125 15:58:26.887359     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1126 15:58:26.887407     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1127 15:58:26.887456     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1128 15:58:26.887504     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1129 15:58:26.887553     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1130 15:58:26.887626     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1131 15:58:26.887693     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1132 15:58:26.887742     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1133 15:58:26.888014     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1134 15:58:26.888098     PCI: 00:02.0

 1135 15:58:26.888157     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1136 15:58:26.888216     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1137 15:58:26.888309     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1138 15:58:26.888389     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1139 15:58:26.888478     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1140 15:58:26.888562      GENERIC: 0.0

 1141 15:58:26.888640     PCI: 00:05.0

 1142 15:58:26.888728     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1143 15:58:26.888806     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1144 15:58:26.888889      GENERIC: 0.0

 1145 15:58:26.888965     PCI: 00:08.0

 1146 15:58:26.889049     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1147 15:58:26.889126     PCI: 00:0a.0

 1148 15:58:26.889232     PCI: 00:0d.0 child on link 0 USB0 port 0

 1149 15:58:26.889331     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1150 15:58:26.889408      USB0 port 0 child on link 0 USB3 port 0

 1151 15:58:26.889483       USB3 port 0

 1152 15:58:26.889558       USB3 port 1

 1153 15:58:26.889638       USB3 port 2

 1154 15:58:26.889713       USB3 port 3

 1155 15:58:26.889789     PCI: 00:14.0 child on link 0 USB0 port 0

 1156 15:58:26.889882     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1157 15:58:26.896014      USB0 port 0 child on link 0 USB2 port 0

 1158 15:58:26.896090       USB2 port 0

 1159 15:58:26.899436       USB2 port 1

 1160 15:58:26.899535       USB2 port 2

 1161 15:58:26.902593       USB2 port 3

 1162 15:58:26.902685       USB2 port 4

 1163 15:58:26.906008       USB2 port 5

 1164 15:58:26.906073       USB2 port 6

 1165 15:58:26.909300       USB2 port 7

 1166 15:58:26.909374       USB2 port 8

 1167 15:58:26.912759       USB2 port 9

 1168 15:58:26.915828       USB3 port 0

 1169 15:58:26.915927       USB3 port 1

 1170 15:58:26.919349       USB3 port 2

 1171 15:58:26.919447       USB3 port 3

 1172 15:58:26.922322     PCI: 00:14.2

 1173 15:58:26.932294     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1174 15:58:26.942030     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1175 15:58:26.945566     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1176 15:58:26.955514     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1177 15:58:26.955657      GENERIC: 0.0

 1178 15:58:26.962180     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1179 15:58:26.971857     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1180 15:58:26.971937      I2C: 00:1a

 1181 15:58:26.975560      I2C: 00:31

 1182 15:58:26.975670      I2C: 00:32

 1183 15:58:26.981705     PCI: 00:15.1 child on link 0 I2C: 00:10

 1184 15:58:26.991733     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1185 15:58:26.991819      I2C: 00:10

 1186 15:58:26.994969     PCI: 00:15.2

 1187 15:58:27.005480     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1188 15:58:27.005562     PCI: 00:15.3

 1189 15:58:27.015482     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1190 15:58:27.018863     PCI: 00:16.0

 1191 15:58:27.028650     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1192 15:58:27.028732     PCI: 00:19.0

 1193 15:58:27.032009     PCI: 00:19.1 child on link 0 I2C: 00:15

 1194 15:58:27.041606     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1195 15:58:27.045072      I2C: 00:15

 1196 15:58:27.048308     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1197 15:58:27.058609     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1198 15:58:27.068199     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1199 15:58:27.074888     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1200 15:58:27.078286      GENERIC: 0.0

 1201 15:58:27.081862      PCI: 01:00.0

 1202 15:58:27.091538      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1203 15:58:27.098400      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1204 15:58:27.108344      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1205 15:58:27.111528     PCI: 00:1e.0

 1206 15:58:27.121536     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1207 15:58:27.125144     PCI: 00:1e.2 child on link 0 SPI: 00

 1208 15:58:27.134803     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1209 15:58:27.138011      SPI: 00

 1210 15:58:27.141129     PCI: 00:1e.3 child on link 0 SPI: 00

 1211 15:58:27.151481     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1212 15:58:27.151607      SPI: 00

 1213 15:58:27.154288     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1214 15:58:27.164374     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1215 15:58:27.167804      PNP: 0c09.0

 1216 15:58:27.174220      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1217 15:58:27.181048     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1218 15:58:27.187783     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1219 15:58:27.197728     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1220 15:58:27.204353      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1221 15:58:27.204491       GENERIC: 0.0

 1222 15:58:27.207777       GENERIC: 1.0

 1223 15:58:27.207878     PCI: 00:1f.3

 1224 15:58:27.217511     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1225 15:58:27.227446     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1226 15:58:27.230910     PCI: 00:1f.5

 1227 15:58:27.240768     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1228 15:58:27.244439    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1229 15:58:27.244515     APIC: 00

 1230 15:58:27.247381     APIC: 01

 1231 15:58:27.247480     APIC: 03

 1232 15:58:27.247564     APIC: 06

 1233 15:58:27.250447     APIC: 05

 1234 15:58:27.250544     APIC: 04

 1235 15:58:27.253871     APIC: 02

 1236 15:58:27.253964     APIC: 07

 1237 15:58:27.260608  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1238 15:58:27.267210   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1239 15:58:27.273880   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1240 15:58:27.280527   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1241 15:58:27.283781    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1242 15:58:27.287078    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1243 15:58:27.290600    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1244 15:58:27.300551   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1245 15:58:27.307396   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1246 15:58:27.313706   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1247 15:58:27.320365  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1248 15:58:27.326871  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1249 15:58:27.336891   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1250 15:58:27.343767   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1251 15:58:27.349930   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1252 15:58:27.353508   DOMAIN: 0000: Resource ranges:

 1253 15:58:27.356906   * Base: 1000, Size: 800, Tag: 100

 1254 15:58:27.360278   * Base: 1900, Size: e700, Tag: 100

 1255 15:58:27.367051    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1256 15:58:27.373175  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1257 15:58:27.379825  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1258 15:58:27.386560   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1259 15:58:27.396937   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1260 15:58:27.402973   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1261 15:58:27.409678   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1262 15:58:27.419457   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1263 15:58:27.426616   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1264 15:58:27.433069   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1265 15:58:27.439557   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1266 15:58:27.449727   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1267 15:58:27.456587   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1268 15:58:27.462929   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1269 15:58:27.472541   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1270 15:58:27.479327   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1271 15:58:27.485882   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1272 15:58:27.496184   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1273 15:58:27.502485   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1274 15:58:27.509133   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1275 15:58:27.519251   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1276 15:58:27.525868   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1277 15:58:27.532621   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1278 15:58:27.542792   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1279 15:58:27.549201   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1280 15:58:27.552243   DOMAIN: 0000: Resource ranges:

 1281 15:58:27.555674   * Base: 7fc00000, Size: 40400000, Tag: 200

 1282 15:58:27.561971   * Base: d0000000, Size: 28000000, Tag: 200

 1283 15:58:27.565735   * Base: fa000000, Size: 1000000, Tag: 200

 1284 15:58:27.569027   * Base: fb001000, Size: 2fff000, Tag: 200

 1285 15:58:27.575374   * Base: fe010000, Size: 2e000, Tag: 200

 1286 15:58:27.578665   * Base: fe03f000, Size: d41000, Tag: 200

 1287 15:58:27.582097   * Base: fed88000, Size: 8000, Tag: 200

 1288 15:58:27.585488   * Base: fed93000, Size: d000, Tag: 200

 1289 15:58:27.588842   * Base: feda2000, Size: 1e000, Tag: 200

 1290 15:58:27.595493   * Base: fede0000, Size: 1220000, Tag: 200

 1291 15:58:27.599036   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1292 15:58:27.605617    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1293 15:58:27.611914    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1294 15:58:27.618698    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1295 15:58:27.625543    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1296 15:58:27.632121    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1297 15:58:27.638747    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1298 15:58:27.644910    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1299 15:58:27.652000    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1300 15:58:27.658483    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1301 15:58:27.665335    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1302 15:58:27.671929    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1303 15:58:27.678438    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1304 15:58:27.684845    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1305 15:58:27.691682    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1306 15:58:27.698176    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1307 15:58:27.704916    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1308 15:58:27.711649    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1309 15:58:27.717927    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1310 15:58:27.724653    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1311 15:58:27.731282    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1312 15:58:27.737824    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1313 15:58:27.744569    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1314 15:58:27.754914  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1315 15:58:27.761312  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1316 15:58:27.764496   PCI: 00:1d.0: Resource ranges:

 1317 15:58:27.767730   * Base: 7fc00000, Size: 100000, Tag: 200

 1318 15:58:27.774509    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1319 15:58:27.780990    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1320 15:58:27.787589    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1321 15:58:27.797487  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1322 15:58:27.804346  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1323 15:58:27.807800  Root Device assign_resources, bus 0 link: 0

 1324 15:58:27.814068  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1325 15:58:27.820908  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1326 15:58:27.831065  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1327 15:58:27.837543  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1328 15:58:27.847322  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1329 15:58:27.850631  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1330 15:58:27.853994  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1331 15:58:27.863784  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1332 15:58:27.870549  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1333 15:58:27.880176  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1334 15:58:27.883506  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1335 15:58:27.890160  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1336 15:58:27.896900  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1337 15:58:27.903506  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1338 15:58:27.906483  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1339 15:58:27.913219  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1340 15:58:27.923445  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1341 15:58:27.929856  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1342 15:58:27.936657  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1343 15:58:27.939957  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1344 15:58:27.949686  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1345 15:58:27.952993  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1346 15:58:27.956614  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1347 15:58:27.966170  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1348 15:58:27.969679  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1349 15:58:27.976184  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1350 15:58:27.982954  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1351 15:58:27.992707  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1352 15:58:27.999341  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1353 15:58:28.009097  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1354 15:58:28.012460  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1355 15:58:28.015878  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1356 15:58:28.025841  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1357 15:58:28.036057  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1358 15:58:28.045634  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1359 15:58:28.049018  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1360 15:58:28.055914  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1361 15:58:28.065578  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1362 15:58:28.072267  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1363 15:58:28.078674  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1364 15:58:28.085553  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1365 15:58:28.092063  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1366 15:58:28.095187  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1367 15:58:28.102283  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1368 15:58:28.108532  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1369 15:58:28.112062  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1370 15:58:28.118881  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1371 15:58:28.121713  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1372 15:58:28.128524  LPC: Trying to open IO window from 800 size 1ff

 1373 15:58:28.135471  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1374 15:58:28.145006  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1375 15:58:28.151789  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1376 15:58:28.155271  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1377 15:58:28.162053  Root Device assign_resources, bus 0 link: 0

 1378 15:58:28.165319  Done setting resources.

 1379 15:58:28.172007  Show resources in subtree (Root Device)...After assigning values.

 1380 15:58:28.175233   Root Device child on link 0 DOMAIN: 0000

 1381 15:58:28.178438    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1382 15:58:28.188443    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1383 15:58:28.198202    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1384 15:58:28.198284     PCI: 00:00.0

 1385 15:58:28.207966     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1386 15:58:28.217865     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1387 15:58:28.227780     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1388 15:58:28.237827     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1389 15:58:28.247880     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1390 15:58:28.257520     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1391 15:58:28.264272     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1392 15:58:28.274549     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1393 15:58:28.284217     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1394 15:58:28.294102     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1395 15:58:28.304369     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1396 15:58:28.310980     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1397 15:58:28.320338     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1398 15:58:28.330487     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1399 15:58:28.340319     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1400 15:58:28.350361     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1401 15:58:28.360012     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1402 15:58:28.370114     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1403 15:58:28.377070     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1404 15:58:28.386917     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1405 15:58:28.390156     PCI: 00:02.0

 1406 15:58:28.399936     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1407 15:58:28.409869     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1408 15:58:28.419691     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1409 15:58:28.423085     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1410 15:58:28.436584     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1411 15:58:28.436693      GENERIC: 0.0

 1412 15:58:28.439490     PCI: 00:05.0

 1413 15:58:28.449533     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1414 15:58:28.453065     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1415 15:58:28.456538      GENERIC: 0.0

 1416 15:58:28.456610     PCI: 00:08.0

 1417 15:58:28.465938     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1418 15:58:28.469282     PCI: 00:0a.0

 1419 15:58:28.472736     PCI: 00:0d.0 child on link 0 USB0 port 0

 1420 15:58:28.482856     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1421 15:58:28.488950      USB0 port 0 child on link 0 USB3 port 0

 1422 15:58:28.489032       USB3 port 0

 1423 15:58:28.492447       USB3 port 1

 1424 15:58:28.492523       USB3 port 2

 1425 15:58:28.495806       USB3 port 3

 1426 15:58:28.499285     PCI: 00:14.0 child on link 0 USB0 port 0

 1427 15:58:28.509469     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1428 15:58:28.515862      USB0 port 0 child on link 0 USB2 port 0

 1429 15:58:28.515947       USB2 port 0

 1430 15:58:28.518630       USB2 port 1

 1431 15:58:28.518706       USB2 port 2

 1432 15:58:28.522086       USB2 port 3

 1433 15:58:28.522163       USB2 port 4

 1434 15:58:28.525508       USB2 port 5

 1435 15:58:28.525584       USB2 port 6

 1436 15:58:28.529383       USB2 port 7

 1437 15:58:28.529460       USB2 port 8

 1438 15:58:28.532448       USB2 port 9

 1439 15:58:28.535488       USB3 port 0

 1440 15:58:28.535563       USB3 port 1

 1441 15:58:28.538989       USB3 port 2

 1442 15:58:28.539064       USB3 port 3

 1443 15:58:28.542067     PCI: 00:14.2

 1444 15:58:28.552198     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1445 15:58:28.562330     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1446 15:58:28.565150     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1447 15:58:28.575226     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1448 15:58:28.578606      GENERIC: 0.0

 1449 15:58:28.582121     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1450 15:58:28.591414     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1451 15:58:28.594684      I2C: 00:1a

 1452 15:58:28.594768      I2C: 00:31

 1453 15:58:28.598000      I2C: 00:32

 1454 15:58:28.601681     PCI: 00:15.1 child on link 0 I2C: 00:10

 1455 15:58:28.611373     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1456 15:58:28.615002      I2C: 00:10

 1457 15:58:28.615110     PCI: 00:15.2

 1458 15:58:28.624441     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1459 15:58:28.627833     PCI: 00:15.3

 1460 15:58:28.637747     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1461 15:58:28.641092     PCI: 00:16.0

 1462 15:58:28.650823     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1463 15:58:28.650911     PCI: 00:19.0

 1464 15:58:28.654027     PCI: 00:19.1 child on link 0 I2C: 00:15

 1465 15:58:28.667581     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1466 15:58:28.667690      I2C: 00:15

 1467 15:58:28.670557     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1468 15:58:28.680775     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1469 15:58:28.693852     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1470 15:58:28.704155     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1471 15:58:28.704239      GENERIC: 0.0

 1472 15:58:28.707482      PCI: 01:00.0

 1473 15:58:28.716894      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1474 15:58:28.727220      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1475 15:58:28.737353      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1476 15:58:28.740067     PCI: 00:1e.0

 1477 15:58:28.750309     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1478 15:58:28.756790     PCI: 00:1e.2 child on link 0 SPI: 00

 1479 15:58:28.766537     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1480 15:58:28.766618      SPI: 00

 1481 15:58:28.770212     PCI: 00:1e.3 child on link 0 SPI: 00

 1482 15:58:28.779925     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1483 15:58:28.783043      SPI: 00

 1484 15:58:28.786511     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1485 15:58:28.796555     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1486 15:58:28.796669      PNP: 0c09.0

 1487 15:58:28.806393      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1488 15:58:28.809673     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1489 15:58:28.819552     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1490 15:58:28.829419     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1491 15:58:28.832793      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1492 15:58:28.836123       GENERIC: 0.0

 1493 15:58:28.836203       GENERIC: 1.0

 1494 15:58:28.839523     PCI: 00:1f.3

 1495 15:58:28.849090     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1496 15:58:28.859417     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1497 15:58:28.862670     PCI: 00:1f.5

 1498 15:58:28.872564     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1499 15:58:28.875866    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1500 15:58:28.875936     APIC: 00

 1501 15:58:28.879173     APIC: 01

 1502 15:58:28.879275     APIC: 03

 1503 15:58:28.882277     APIC: 06

 1504 15:58:28.882370     APIC: 05

 1505 15:58:28.882455     APIC: 04

 1506 15:58:28.885641     APIC: 02

 1507 15:58:28.885732     APIC: 07

 1508 15:58:28.888568  Done allocating resources.

 1509 15:58:28.895273  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1510 15:58:28.901982  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1511 15:58:28.905139  Configure GPIOs for I2S audio on UP4.

 1512 15:58:28.912303  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1513 15:58:28.915174  Enabling resources...

 1514 15:58:28.918508  PCI: 00:00.0 subsystem <- 8086/9a12

 1515 15:58:28.921854  PCI: 00:00.0 cmd <- 06

 1516 15:58:28.924797  PCI: 00:02.0 subsystem <- 8086/9a40

 1517 15:58:28.928125  PCI: 00:02.0 cmd <- 03

 1518 15:58:28.931570  PCI: 00:04.0 subsystem <- 8086/9a03

 1519 15:58:28.931693  PCI: 00:04.0 cmd <- 02

 1520 15:58:28.938489  PCI: 00:05.0 subsystem <- 8086/9a19

 1521 15:58:28.938588  PCI: 00:05.0 cmd <- 02

 1522 15:58:28.941890  PCI: 00:08.0 subsystem <- 8086/9a11

 1523 15:58:28.944950  PCI: 00:08.0 cmd <- 06

 1524 15:58:28.948202  PCI: 00:0d.0 subsystem <- 8086/9a13

 1525 15:58:28.951840  PCI: 00:0d.0 cmd <- 02

 1526 15:58:28.955087  PCI: 00:14.0 subsystem <- 8086/a0ed

 1527 15:58:28.958346  PCI: 00:14.0 cmd <- 02

 1528 15:58:28.961369  PCI: 00:14.2 subsystem <- 8086/a0ef

 1529 15:58:28.964827  PCI: 00:14.2 cmd <- 02

 1530 15:58:28.968122  PCI: 00:14.3 subsystem <- 8086/a0f0

 1531 15:58:28.971182  PCI: 00:14.3 cmd <- 02

 1532 15:58:28.974664  PCI: 00:15.0 subsystem <- 8086/a0e8

 1533 15:58:28.977985  PCI: 00:15.0 cmd <- 02

 1534 15:58:28.981533  PCI: 00:15.1 subsystem <- 8086/a0e9

 1535 15:58:28.981602  PCI: 00:15.1 cmd <- 02

 1536 15:58:28.988598  PCI: 00:15.2 subsystem <- 8086/a0ea

 1537 15:58:28.988703  PCI: 00:15.2 cmd <- 02

 1538 15:58:28.991131  PCI: 00:15.3 subsystem <- 8086/a0eb

 1539 15:58:28.994590  PCI: 00:15.3 cmd <- 02

 1540 15:58:28.997819  PCI: 00:16.0 subsystem <- 8086/a0e0

 1541 15:58:29.001110  PCI: 00:16.0 cmd <- 02

 1542 15:58:29.004584  PCI: 00:19.1 subsystem <- 8086/a0c6

 1543 15:58:29.007811  PCI: 00:19.1 cmd <- 02

 1544 15:58:29.011014  PCI: 00:1d.0 bridge ctrl <- 0013

 1545 15:58:29.014383  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1546 15:58:29.017673  PCI: 00:1d.0 cmd <- 06

 1547 15:58:29.020880  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1548 15:58:29.024518  PCI: 00:1e.0 cmd <- 06

 1549 15:58:29.028012  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1550 15:58:29.031469  PCI: 00:1e.2 cmd <- 06

 1551 15:58:29.034097  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1552 15:58:29.034175  PCI: 00:1e.3 cmd <- 02

 1553 15:58:29.041121  PCI: 00:1f.0 subsystem <- 8086/a087

 1554 15:58:29.041197  PCI: 00:1f.0 cmd <- 407

 1555 15:58:29.044365  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1556 15:58:29.047713  PCI: 00:1f.3 cmd <- 02

 1557 15:58:29.051350  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1558 15:58:29.053954  PCI: 00:1f.5 cmd <- 406

 1559 15:58:29.058734  PCI: 01:00.0 cmd <- 02

 1560 15:58:29.063582  done.

 1561 15:58:29.066929  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1562 15:58:29.069705  Initializing devices...

 1563 15:58:29.073093  Root Device init

 1564 15:58:29.076400  Chrome EC: Set SMI mask to 0x0000000000000000

 1565 15:58:29.083220  Chrome EC: clear events_b mask to 0x0000000000000000

 1566 15:58:29.090066  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1567 15:58:29.093141  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1568 15:58:29.100143  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1569 15:58:29.106510  Chrome EC: Set WAKE mask to 0x0000000000000000

 1570 15:58:29.109932  fw_config match found: DB_USB=USB3_ACTIVE

 1571 15:58:29.116436  Configure Right Type-C port orientation for retimer

 1572 15:58:29.119816  Root Device init finished in 42 msecs

 1573 15:58:29.123030  PCI: 00:00.0 init

 1574 15:58:29.126131  CPU TDP = 9 Watts

 1575 15:58:29.126205  CPU PL1 = 9 Watts

 1576 15:58:29.129601  CPU PL2 = 40 Watts

 1577 15:58:29.129676  CPU PL4 = 83 Watts

 1578 15:58:29.132900  PCI: 00:00.0 init finished in 8 msecs

 1579 15:58:29.136640  PCI: 00:02.0 init

 1580 15:58:29.139838  GMA: Found VBT in CBFS

 1581 15:58:29.143045  GMA: Found valid VBT in CBFS

 1582 15:58:29.146435  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1583 15:58:29.156160                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1584 15:58:29.159444  PCI: 00:02.0 init finished in 18 msecs

 1585 15:58:29.162878  PCI: 00:05.0 init

 1586 15:58:29.166209  PCI: 00:05.0 init finished in 0 msecs

 1587 15:58:29.169654  PCI: 00:08.0 init

 1588 15:58:29.172598  PCI: 00:08.0 init finished in 0 msecs

 1589 15:58:29.175947  PCI: 00:14.0 init

 1590 15:58:29.179179  PCI: 00:14.0 init finished in 0 msecs

 1591 15:58:29.179269  PCI: 00:14.2 init

 1592 15:58:29.182619  PCI: 00:14.2 init finished in 0 msecs

 1593 15:58:29.186508  PCI: 00:15.0 init

 1594 15:58:29.189899  I2C bus 0 version 0x3230302a

 1595 15:58:29.193264  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1596 15:58:29.196696  PCI: 00:15.0 init finished in 6 msecs

 1597 15:58:29.199928  PCI: 00:15.1 init

 1598 15:58:29.203024  I2C bus 1 version 0x3230302a

 1599 15:58:29.206532  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1600 15:58:29.209579  PCI: 00:15.1 init finished in 6 msecs

 1601 15:58:29.212846  PCI: 00:15.2 init

 1602 15:58:29.216254  I2C bus 2 version 0x3230302a

 1603 15:58:29.219461  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1604 15:58:29.222905  PCI: 00:15.2 init finished in 6 msecs

 1605 15:58:29.226347  PCI: 00:15.3 init

 1606 15:58:29.226426  I2C bus 3 version 0x3230302a

 1607 15:58:29.233175  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1608 15:58:29.236142  PCI: 00:15.3 init finished in 6 msecs

 1609 15:58:29.236218  PCI: 00:16.0 init

 1610 15:58:29.239148  PCI: 00:16.0 init finished in 0 msecs

 1611 15:58:29.243369  PCI: 00:19.1 init

 1612 15:58:29.246353  I2C bus 5 version 0x3230302a

 1613 15:58:29.250065  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1614 15:58:29.253131  PCI: 00:19.1 init finished in 6 msecs

 1615 15:58:29.256800  PCI: 00:1d.0 init

 1616 15:58:29.259856  Initializing PCH PCIe bridge.

 1617 15:58:29.263428  PCI: 00:1d.0 init finished in 3 msecs

 1618 15:58:29.266545  PCI: 00:1f.0 init

 1619 15:58:29.269971  IOAPIC: Initializing IOAPIC at 0xfec00000

 1620 15:58:29.276252  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1621 15:58:29.276328  IOAPIC: ID = 0x02

 1622 15:58:29.279495  IOAPIC: Dumping registers

 1623 15:58:29.282850    reg 0x0000: 0x02000000

 1624 15:58:29.282925    reg 0x0001: 0x00770020

 1625 15:58:29.286196    reg 0x0002: 0x00000000

 1626 15:58:29.292848  PCI: 00:1f.0 init finished in 21 msecs

 1627 15:58:29.292928  PCI: 00:1f.2 init

 1628 15:58:29.296374  Disabling ACPI via APMC.

 1629 15:58:29.301810  APMC done.

 1630 15:58:29.304847  PCI: 00:1f.2 init finished in 7 msecs

 1631 15:58:29.316883  PCI: 01:00.0 init

 1632 15:58:29.320112  PCI: 01:00.0 init finished in 0 msecs

 1633 15:58:29.323750  PNP: 0c09.0 init

 1634 15:58:29.329887  Google Chrome EC uptime: 10.187 seconds

 1635 15:58:29.333286  Google Chrome AP resets since EC boot: 0

 1636 15:58:29.336606  Google Chrome most recent AP reset causes:

 1637 15:58:29.343275  Google Chrome EC reset flags at last EC boot: reset-pin | hard

 1638 15:58:29.346501  PNP: 0c09.0 init finished in 20 msecs

 1639 15:58:29.352762  Devices initialized

 1640 15:58:29.356499  Show all devs... After init.

 1641 15:58:29.359766  Root Device: enabled 1

 1642 15:58:29.359839  DOMAIN: 0000: enabled 1

 1643 15:58:29.362780  CPU_CLUSTER: 0: enabled 1

 1644 15:58:29.366355  PCI: 00:00.0: enabled 1

 1645 15:58:29.369257  PCI: 00:02.0: enabled 1

 1646 15:58:29.369333  PCI: 00:04.0: enabled 1

 1647 15:58:29.373112  PCI: 00:05.0: enabled 1

 1648 15:58:29.376122  PCI: 00:06.0: enabled 0

 1649 15:58:29.379218  PCI: 00:07.0: enabled 0

 1650 15:58:29.379302  PCI: 00:07.1: enabled 0

 1651 15:58:29.382430  PCI: 00:07.2: enabled 0

 1652 15:58:29.386259  PCI: 00:07.3: enabled 0

 1653 15:58:29.388931  PCI: 00:08.0: enabled 1

 1654 15:58:29.389007  PCI: 00:09.0: enabled 0

 1655 15:58:29.392414  PCI: 00:0a.0: enabled 0

 1656 15:58:29.395888  PCI: 00:0d.0: enabled 1

 1657 15:58:29.399170  PCI: 00:0d.1: enabled 0

 1658 15:58:29.399254  PCI: 00:0d.2: enabled 0

 1659 15:58:29.402638  PCI: 00:0d.3: enabled 0

 1660 15:58:29.405680  PCI: 00:0e.0: enabled 0

 1661 15:58:29.409191  PCI: 00:10.2: enabled 1

 1662 15:58:29.409264  PCI: 00:10.6: enabled 0

 1663 15:58:29.412340  PCI: 00:10.7: enabled 0

 1664 15:58:29.415828  PCI: 00:12.0: enabled 0

 1665 15:58:29.415904  PCI: 00:12.6: enabled 0

 1666 15:58:29.419417  PCI: 00:13.0: enabled 0

 1667 15:58:29.422202  PCI: 00:14.0: enabled 1

 1668 15:58:29.425930  PCI: 00:14.1: enabled 0

 1669 15:58:29.426006  PCI: 00:14.2: enabled 1

 1670 15:58:29.428974  PCI: 00:14.3: enabled 1

 1671 15:58:29.432550  PCI: 00:15.0: enabled 1

 1672 15:58:29.435733  PCI: 00:15.1: enabled 1

 1673 15:58:29.435808  PCI: 00:15.2: enabled 1

 1674 15:58:29.439044  PCI: 00:15.3: enabled 1

 1675 15:58:29.442391  PCI: 00:16.0: enabled 1

 1676 15:58:29.445815  PCI: 00:16.1: enabled 0

 1677 15:58:29.445894  PCI: 00:16.2: enabled 0

 1678 15:58:29.449061  PCI: 00:16.3: enabled 0

 1679 15:58:29.452244  PCI: 00:16.4: enabled 0

 1680 15:58:29.455760  PCI: 00:16.5: enabled 0

 1681 15:58:29.455826  PCI: 00:17.0: enabled 0

 1682 15:58:29.458867  PCI: 00:19.0: enabled 0

 1683 15:58:29.462404  PCI: 00:19.1: enabled 1

 1684 15:58:29.462484  PCI: 00:19.2: enabled 0

 1685 15:58:29.465239  PCI: 00:1c.0: enabled 1

 1686 15:58:29.468598  PCI: 00:1c.1: enabled 0

 1687 15:58:29.472009  PCI: 00:1c.2: enabled 0

 1688 15:58:29.472078  PCI: 00:1c.3: enabled 0

 1689 15:58:29.475806  PCI: 00:1c.4: enabled 0

 1690 15:58:29.478629  PCI: 00:1c.5: enabled 0

 1691 15:58:29.482196  PCI: 00:1c.6: enabled 1

 1692 15:58:29.482276  PCI: 00:1c.7: enabled 0

 1693 15:58:29.485126  PCI: 00:1d.0: enabled 1

 1694 15:58:29.489013  PCI: 00:1d.1: enabled 0

 1695 15:58:29.492180  PCI: 00:1d.2: enabled 1

 1696 15:58:29.492264  PCI: 00:1d.3: enabled 0

 1697 15:58:29.495283  PCI: 00:1e.0: enabled 1

 1698 15:58:29.498667  PCI: 00:1e.1: enabled 0

 1699 15:58:29.498744  PCI: 00:1e.2: enabled 1

 1700 15:58:29.501996  PCI: 00:1e.3: enabled 1

 1701 15:58:29.505284  PCI: 00:1f.0: enabled 1

 1702 15:58:29.508725  PCI: 00:1f.1: enabled 0

 1703 15:58:29.508796  PCI: 00:1f.2: enabled 1

 1704 15:58:29.511711  PCI: 00:1f.3: enabled 1

 1705 15:58:29.515107  PCI: 00:1f.4: enabled 0

 1706 15:58:29.518521  PCI: 00:1f.5: enabled 1

 1707 15:58:29.518590  PCI: 00:1f.6: enabled 0

 1708 15:58:29.521973  PCI: 00:1f.7: enabled 0

 1709 15:58:29.525331  APIC: 00: enabled 1

 1710 15:58:29.525403  GENERIC: 0.0: enabled 1

 1711 15:58:29.528539  GENERIC: 0.0: enabled 1

 1712 15:58:29.531710  GENERIC: 1.0: enabled 1

 1713 15:58:29.535107  GENERIC: 0.0: enabled 1

 1714 15:58:29.535179  GENERIC: 1.0: enabled 1

 1715 15:58:29.538337  USB0 port 0: enabled 1

 1716 15:58:29.541747  GENERIC: 0.0: enabled 1

 1717 15:58:29.545434  USB0 port 0: enabled 1

 1718 15:58:29.545511  GENERIC: 0.0: enabled 1

 1719 15:58:29.548188  I2C: 00:1a: enabled 1

 1720 15:58:29.551518  I2C: 00:31: enabled 1

 1721 15:58:29.551651  I2C: 00:32: enabled 1

 1722 15:58:29.555507  I2C: 00:10: enabled 1

 1723 15:58:29.558167  I2C: 00:15: enabled 1

 1724 15:58:29.558243  GENERIC: 0.0: enabled 0

 1725 15:58:29.561637  GENERIC: 1.0: enabled 0

 1726 15:58:29.564959  GENERIC: 0.0: enabled 1

 1727 15:58:29.565035  SPI: 00: enabled 1

 1728 15:58:29.568297  SPI: 00: enabled 1

 1729 15:58:29.571787  PNP: 0c09.0: enabled 1

 1730 15:58:29.575083  GENERIC: 0.0: enabled 1

 1731 15:58:29.575155  USB3 port 0: enabled 1

 1732 15:58:29.578025  USB3 port 1: enabled 1

 1733 15:58:29.581379  USB3 port 2: enabled 0

 1734 15:58:29.581448  USB3 port 3: enabled 0

 1735 15:58:29.584757  USB2 port 0: enabled 0

 1736 15:58:29.588101  USB2 port 1: enabled 1

 1737 15:58:29.588175  USB2 port 2: enabled 1

 1738 15:58:29.591491  USB2 port 3: enabled 0

 1739 15:58:29.595225  USB2 port 4: enabled 1

 1740 15:58:29.598064  USB2 port 5: enabled 0

 1741 15:58:29.598138  USB2 port 6: enabled 0

 1742 15:58:29.601431  USB2 port 7: enabled 0

 1743 15:58:29.604486  USB2 port 8: enabled 0

 1744 15:58:29.604562  USB2 port 9: enabled 0

 1745 15:58:29.608374  USB3 port 0: enabled 0

 1746 15:58:29.611654  USB3 port 1: enabled 1

 1747 15:58:29.614619  USB3 port 2: enabled 0

 1748 15:58:29.614693  USB3 port 3: enabled 0

 1749 15:58:29.618097  GENERIC: 0.0: enabled 1

 1750 15:58:29.621327  GENERIC: 1.0: enabled 1

 1751 15:58:29.621422  APIC: 01: enabled 1

 1752 15:58:29.624358  APIC: 03: enabled 1

 1753 15:58:29.627809  APIC: 06: enabled 1

 1754 15:58:29.627887  APIC: 05: enabled 1

 1755 15:58:29.631074  APIC: 04: enabled 1

 1756 15:58:29.631149  APIC: 02: enabled 1

 1757 15:58:29.634281  APIC: 07: enabled 1

 1758 15:58:29.637605  PCI: 01:00.0: enabled 1

 1759 15:58:29.644464  BS: BS_DEV_INIT run times (exec / console): 33 / 536 ms

 1760 15:58:29.648035  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1761 15:58:29.650874  ELOG: NV offset 0xf30000 size 0x1000

 1762 15:58:29.658083  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1763 15:58:29.664790  ELOG: Event(17) added with size 13 at 2024-06-14 15:58:28 UTC

 1764 15:58:29.671082  ELOG: Event(92) added with size 9 at 2024-06-14 15:58:28 UTC

 1765 15:58:29.678144  ELOG: Event(93) added with size 9 at 2024-06-14 15:58:28 UTC

 1766 15:58:29.684297  ELOG: Event(9E) added with size 10 at 2024-06-14 15:58:28 UTC

 1767 15:58:29.690971  ELOG: Event(9F) added with size 14 at 2024-06-14 15:58:28 UTC

 1768 15:58:29.697687  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1769 15:58:29.704153  ELOG: Event(A1) added with size 10 at 2024-06-14 15:58:28 UTC

 1770 15:58:29.710674  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02

 1771 15:58:29.717377  ELOG: Event(A0) added with size 9 at 2024-06-14 15:58:28 UTC

 1772 15:58:29.721169  elog_add_boot_reason: Logged dev mode boot

 1773 15:58:29.727071  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms

 1774 15:58:29.730799  Finalize devices...

 1775 15:58:29.730866  Devices finalized

 1776 15:58:29.737306  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1777 15:58:29.740439  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1778 15:58:29.747482  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1779 15:58:29.750060  ME: HFSTS1                      : 0x80030055

 1780 15:58:29.757079  ME: HFSTS2                      : 0x30280116

 1781 15:58:29.760713  ME: HFSTS3                      : 0x00000050

 1782 15:58:29.766617  ME: HFSTS4                      : 0x00004000

 1783 15:58:29.770446  ME: HFSTS5                      : 0x00000000

 1784 15:58:29.773655  ME: HFSTS6                      : 0x00400006

 1785 15:58:29.777044  ME: Manufacturing Mode          : YES

 1786 15:58:29.783378  ME: SPI Protection Mode Enabled : NO

 1787 15:58:29.786785  ME: FW Partition Table          : OK

 1788 15:58:29.790163  ME: Bringup Loader Failure      : NO

 1789 15:58:29.793509  ME: Firmware Init Complete      : NO

 1790 15:58:29.796861  ME: Boot Options Present        : NO

 1791 15:58:29.799931  ME: Update In Progress          : NO

 1792 15:58:29.802986  ME: D0i3 Support                : YES

 1793 15:58:29.806373  ME: Low Power State Enabled     : NO

 1794 15:58:29.813172  ME: CPU Replaced                : YES

 1795 15:58:29.816272  ME: CPU Replacement Valid       : YES

 1796 15:58:29.819644  ME: Current Working State       : 5

 1797 15:58:29.822702  ME: Current Operation State     : 1

 1798 15:58:29.826126  ME: Current Operation Mode      : 3

 1799 15:58:29.829358  ME: Error Code                  : 0

 1800 15:58:29.832770  ME: Enhanced Debug Mode         : NO

 1801 15:58:29.836292  ME: CPU Debug Disabled          : YES

 1802 15:58:29.842965  ME: TXT Support                 : NO

 1803 15:58:29.846051  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1804 15:58:29.852308  ELOG: Event(91) added with size 10 at 2024-06-14 15:58:28 UTC

 1805 15:58:29.859114  Chrome EC: clear events_b mask to 0x0000000020004000

 1806 15:58:29.866027  BS: BS_WRITE_TABLES entry times (exec / console): 2 / 11 ms

 1807 15:58:29.872307  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1808 15:58:29.875915  CBFS: 'fallback/slic' not found.

 1809 15:58:29.882734  ACPI: Writing ACPI tables at 76b01000.

 1810 15:58:29.882814  ACPI:    * FACS

 1811 15:58:29.885586  ACPI:    * DSDT

 1812 15:58:29.888980  Ramoops buffer: 0x100000@0x76a00000.

 1813 15:58:29.892460  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1814 15:58:29.899166  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1815 15:58:29.901995  Google Chrome EC: version:

 1816 15:58:29.905788  	ro: voema_v2.0.10114-a447f03e46

 1817 15:58:29.908702  	rw: voema_v2.0.10114-a447f03e46

 1818 15:58:29.908796    running image: 1

 1819 15:58:29.915194  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1820 15:58:29.919936  ACPI:    * FADT

 1821 15:58:29.920025  SCI is IRQ9

 1822 15:58:29.926570  ACPI: added table 1/32, length now 40

 1823 15:58:29.926652  ACPI:     * SSDT

 1824 15:58:29.930063  Found 1 CPU(s) with 8 core(s) each.

 1825 15:58:29.936381  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1826 15:58:29.939676  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1827 15:58:29.942996  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1828 15:58:29.946372  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1829 15:58:29.952442  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1830 15:58:29.959542  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1831 15:58:29.962731  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1832 15:58:29.969325  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1833 15:58:29.976223  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1834 15:58:29.979141  \_SB.PCI0.RP09: Added StorageD3Enable property

 1835 15:58:29.985684  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1836 15:58:29.989031  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1837 15:58:29.995724  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1838 15:58:29.998933  PS2K: Passing 80 keymaps to kernel

 1839 15:58:30.005743  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1840 15:58:30.012377  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1841 15:58:30.019319  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1842 15:58:30.025518  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1843 15:58:30.032213  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1844 15:58:30.039045  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1845 15:58:30.045487  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1846 15:58:30.052442  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1847 15:58:30.055317  ACPI: added table 2/32, length now 44

 1848 15:58:30.055395  ACPI:    * MCFG

 1849 15:58:30.058703  ACPI: added table 3/32, length now 48

 1850 15:58:30.061995  ACPI:    * TPM2

 1851 15:58:30.065317  TPM2 log created at 0x769f0000

 1852 15:58:30.068515  ACPI: added table 4/32, length now 52

 1853 15:58:30.072260  ACPI:    * MADT

 1854 15:58:30.072335  SCI is IRQ9

 1855 15:58:30.075224  ACPI: added table 5/32, length now 56

 1856 15:58:30.078592  current = 76b09850

 1857 15:58:30.078668  ACPI:    * DMAR

 1858 15:58:30.081651  ACPI: added table 6/32, length now 60

 1859 15:58:30.085109  ACPI: added table 7/32, length now 64

 1860 15:58:30.088465  ACPI:    * HPET

 1861 15:58:30.091755  ACPI: added table 8/32, length now 68

 1862 15:58:30.095340  ACPI: done.

 1863 15:58:30.095415  ACPI tables: 35216 bytes.

 1864 15:58:30.098454  smbios_write_tables: 769ef000

 1865 15:58:30.101389  EC returned error result code 3

 1866 15:58:30.104727  Couldn't obtain OEM name from CBI

 1867 15:58:30.109438  Create SMBIOS type 16

 1868 15:58:30.112668  Create SMBIOS type 17

 1869 15:58:30.115766  GENERIC: 0.0 (WIFI Device)

 1870 15:58:30.119079  SMBIOS tables: 1750 bytes.

 1871 15:58:30.122431  Writing table forward entry at 0x00000500

 1872 15:58:30.129241  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1873 15:58:30.132328  Writing coreboot table at 0x76b25000

 1874 15:58:30.138975   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1875 15:58:30.142203   1. 0000000000001000-000000000009ffff: RAM

 1876 15:58:30.145755   2. 00000000000a0000-00000000000fffff: RESERVED

 1877 15:58:30.152397   3. 0000000000100000-00000000769eefff: RAM

 1878 15:58:30.155556   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1879 15:58:30.162025   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1880 15:58:30.168731   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1881 15:58:30.172027   7. 0000000077000000-000000007fbfffff: RESERVED

 1882 15:58:30.178683   8. 00000000c0000000-00000000cfffffff: RESERVED

 1883 15:58:30.182476   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1884 15:58:30.185454  10. 00000000fb000000-00000000fb000fff: RESERVED

 1885 15:58:30.192182  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1886 15:58:30.195111  12. 00000000fed80000-00000000fed87fff: RESERVED

 1887 15:58:30.202040  13. 00000000fed90000-00000000fed92fff: RESERVED

 1888 15:58:30.205045  14. 00000000feda0000-00000000feda1fff: RESERVED

 1889 15:58:30.211902  15. 00000000fedc0000-00000000feddffff: RESERVED

 1890 15:58:30.215364  16. 0000000100000000-00000002803fffff: RAM

 1891 15:58:30.218596  Passing 4 GPIOs to payload:

 1892 15:58:30.221957              NAME |       PORT | POLARITY |     VALUE

 1893 15:58:30.228287               lid |  undefined |     high |      high

 1894 15:58:30.235285             power |  undefined |     high |       low

 1895 15:58:30.238536             oprom |  undefined |     high |       low

 1896 15:58:30.244870          EC in RW | 0x000000e5 |     high |       low

 1897 15:58:30.251831  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum d50a

 1898 15:58:30.255076  coreboot table: 1576 bytes.

 1899 15:58:30.258189  IMD ROOT    0. 0x76fff000 0x00001000

 1900 15:58:30.261528  IMD SMALL   1. 0x76ffe000 0x00001000

 1901 15:58:30.264494  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1902 15:58:30.267850  VPD         3. 0x76c4d000 0x00000367

 1903 15:58:30.271147  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1904 15:58:30.274623  CONSOLE     5. 0x76c2c000 0x00020000

 1905 15:58:30.277931  FMAP        6. 0x76c2b000 0x00000578

 1906 15:58:30.284593  TIME STAMP  7. 0x76c2a000 0x00000910

 1907 15:58:30.287907  VBOOT WORK  8. 0x76c16000 0x00014000

 1908 15:58:30.290923  ROMSTG STCK 9. 0x76c15000 0x00001000

 1909 15:58:30.294373  AFTER CAR  10. 0x76c0a000 0x0000b000

 1910 15:58:30.297442  RAMSTAGE   11. 0x76b97000 0x00073000

 1911 15:58:30.300953  REFCODE    12. 0x76b42000 0x00055000

 1912 15:58:30.304184  SMM BACKUP 13. 0x76b32000 0x00010000

 1913 15:58:30.311164  4f444749   14. 0x76b30000 0x00002000

 1914 15:58:30.314028  EXT VBT15. 0x76b2d000 0x0000219f

 1915 15:58:30.317186  COREBOOT   16. 0x76b25000 0x00008000

 1916 15:58:30.320459  ACPI       17. 0x76b01000 0x00024000

 1917 15:58:30.324039  ACPI GNVS  18. 0x76b00000 0x00001000

 1918 15:58:30.327300  RAMOOPS    19. 0x76a00000 0x00100000

 1919 15:58:30.330669  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1920 15:58:30.334003  SMBIOS     21. 0x769ef000 0x00000800

 1921 15:58:30.336726  IMD small region:

 1922 15:58:30.340112    IMD ROOT    0. 0x76ffec00 0x00000400

 1923 15:58:30.343646    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1924 15:58:30.346949    POWER STATE 2. 0x76ffeb80 0x00000044

 1925 15:58:30.353922    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1926 15:58:30.356731    MEM INFO    4. 0x76ffe980 0x000001e0

 1927 15:58:30.363281  BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms

 1928 15:58:30.366556  MTRR: Physical address space:

 1929 15:58:30.370109  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1930 15:58:30.376835  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1931 15:58:30.383456  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1932 15:58:30.389752  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1933 15:58:30.396580  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1934 15:58:30.403175  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1935 15:58:30.409917  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1936 15:58:30.413252  MTRR: Fixed MSR 0x250 0x0606060606060606

 1937 15:58:30.416631  MTRR: Fixed MSR 0x258 0x0606060606060606

 1938 15:58:30.423435  MTRR: Fixed MSR 0x259 0x0000000000000000

 1939 15:58:30.426288  MTRR: Fixed MSR 0x268 0x0606060606060606

 1940 15:58:30.429970  MTRR: Fixed MSR 0x269 0x0606060606060606

 1941 15:58:30.432819  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1942 15:58:30.436216  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1943 15:58:30.442682  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1944 15:58:30.446010  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1945 15:58:30.449473  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1946 15:58:30.452745  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1947 15:58:30.457256  call enable_fixed_mtrr()

 1948 15:58:30.460329  CPU physical address size: 39 bits

 1949 15:58:30.467100  MTRR: default type WB/UC MTRR counts: 6/6.

 1950 15:58:30.470325  MTRR: UC selected as default type.

 1951 15:58:30.477112  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1952 15:58:30.483802  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1953 15:58:30.487077  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1954 15:58:30.493506  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1955 15:58:30.500104  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1956 15:58:30.506365  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1957 15:58:30.509662  

 1958 15:58:30.509738  MTRR check

 1959 15:58:30.513270  Fixed MTRRs   : Enabled

 1960 15:58:30.513413  Variable MTRRs: Enabled

 1961 15:58:30.513474  

 1962 15:58:30.519842  MTRR: Fixed MSR 0x250 0x0606060606060606

 1963 15:58:30.523072  MTRR: Fixed MSR 0x258 0x0606060606060606

 1964 15:58:30.526308  MTRR: Fixed MSR 0x259 0x0000000000000000

 1965 15:58:30.529584  MTRR: Fixed MSR 0x268 0x0606060606060606

 1966 15:58:30.536126  MTRR: Fixed MSR 0x269 0x0606060606060606

 1967 15:58:30.539649  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1968 15:58:30.543303  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1969 15:58:30.546250  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1970 15:58:30.552983  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1971 15:58:30.556351  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1972 15:58:30.559344  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1973 15:58:30.565796  MTRR: Fixed MSR 0x250 0x0606060606060606

 1974 15:58:30.565871  call enable_fixed_mtrr()

 1975 15:58:30.572644  MTRR: Fixed MSR 0x258 0x0606060606060606

 1976 15:58:30.575898  MTRR: Fixed MSR 0x259 0x0000000000000000

 1977 15:58:30.579206  MTRR: Fixed MSR 0x268 0x0606060606060606

 1978 15:58:30.582703  MTRR: Fixed MSR 0x269 0x0606060606060606

 1979 15:58:30.589409  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1980 15:58:30.592414  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1981 15:58:30.595578  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1982 15:58:30.599048  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1983 15:58:30.605684  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1984 15:58:30.608944  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1985 15:58:30.612257  CPU physical address size: 39 bits

 1986 15:58:30.615965  call enable_fixed_mtrr()

 1987 15:58:30.622227  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 1988 15:58:30.625569  MTRR: Fixed MSR 0x250 0x0606060606060606

 1989 15:58:30.632356  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 1990 15:58:30.639112  MTRR: Fixed MSR 0x258 0x0606060606060606

 1991 15:58:30.642388  MTRR: Fixed MSR 0x259 0x0000000000000000

 1992 15:58:30.645632  MTRR: Fixed MSR 0x268 0x0606060606060606

 1993 15:58:30.648995  MTRR: Fixed MSR 0x269 0x0606060606060606

 1994 15:58:30.655506  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1995 15:58:30.659539  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1996 15:58:30.662191  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1997 15:58:30.665200  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1998 15:58:30.672096  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1999 15:58:30.675361  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2000 15:58:30.681638  Checking segment from ROM address 0xffc02b38

 2001 15:58:30.681735  call enable_fixed_mtrr()

 2002 15:58:30.688308  Checking segment from ROM address 0xffc02b54

 2003 15:58:30.691668  CPU physical address size: 39 bits

 2004 15:58:30.695263  Loading segment from ROM address 0xffc02b38

 2005 15:58:30.701548  MTRR: Fixed MSR 0x250 0x0606060606060606

 2006 15:58:30.704825  MTRR: Fixed MSR 0x250 0x0606060606060606

 2007 15:58:30.708138  MTRR: Fixed MSR 0x258 0x0606060606060606

 2008 15:58:30.711382  MTRR: Fixed MSR 0x259 0x0000000000000000

 2009 15:58:30.718165  MTRR: Fixed MSR 0x268 0x0606060606060606

 2010 15:58:30.721518  MTRR: Fixed MSR 0x269 0x0606060606060606

 2011 15:58:30.724832  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2012 15:58:30.728559  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2013 15:58:30.734537  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2014 15:58:30.737938  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2015 15:58:30.741104  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2016 15:58:30.744723  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2017 15:58:30.752260  MTRR: Fixed MSR 0x258 0x0606060606060606

 2018 15:58:30.755629  MTRR: Fixed MSR 0x259 0x0000000000000000

 2019 15:58:30.758557  MTRR: Fixed MSR 0x268 0x0606060606060606

 2020 15:58:30.762043  MTRR: Fixed MSR 0x269 0x0606060606060606

 2021 15:58:30.768698  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2022 15:58:30.771673  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2023 15:58:30.775346  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2024 15:58:30.778523  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2025 15:58:30.785192  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2026 15:58:30.788312  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2027 15:58:30.791667  call enable_fixed_mtrr()

 2028 15:58:30.795098  call enable_fixed_mtrr()

 2029 15:58:30.798237  CPU physical address size: 39 bits

 2030 15:58:30.801819  MTRR: Fixed MSR 0x250 0x0606060606060606

 2031 15:58:30.804746  MTRR: Fixed MSR 0x250 0x0606060606060606

 2032 15:58:30.808116  MTRR: Fixed MSR 0x258 0x0606060606060606

 2033 15:58:30.814726  MTRR: Fixed MSR 0x259 0x0000000000000000

 2034 15:58:30.817790  MTRR: Fixed MSR 0x268 0x0606060606060606

 2035 15:58:30.821371  MTRR: Fixed MSR 0x269 0x0606060606060606

 2036 15:58:30.824682  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2037 15:58:30.831152  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2038 15:58:30.834228  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2039 15:58:30.837406  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2040 15:58:30.840841  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2041 15:58:30.847894  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2042 15:58:30.851090  MTRR: Fixed MSR 0x258 0x0606060606060606

 2043 15:58:30.854404  call enable_fixed_mtrr()

 2044 15:58:30.857820  MTRR: Fixed MSR 0x259 0x0000000000000000

 2045 15:58:30.861253  MTRR: Fixed MSR 0x268 0x0606060606060606

 2046 15:58:30.867199  MTRR: Fixed MSR 0x269 0x0606060606060606

 2047 15:58:30.870481  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2048 15:58:30.873879  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2049 15:58:30.877378  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2050 15:58:30.884123  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2051 15:58:30.887088  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2052 15:58:30.890563  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2053 15:58:30.894234  CPU physical address size: 39 bits

 2054 15:58:30.900349  call enable_fixed_mtrr()

 2055 15:58:30.904143  CPU physical address size: 39 bits

 2056 15:58:30.907547  CPU physical address size: 39 bits

 2057 15:58:30.910334    code (compression=0)

 2058 15:58:30.913598  CPU physical address size: 39 bits

 2059 15:58:30.920482    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2060 15:58:30.929993  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2061 15:58:30.933751  it's not compressed!

 2062 15:58:31.071704  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2063 15:58:31.078169  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2064 15:58:31.085046  Loading segment from ROM address 0xffc02b54

 2065 15:58:31.088258    Entry Point 0x30000000

 2066 15:58:31.088349  Loaded segments

 2067 15:58:31.094364  BS: BS_PAYLOAD_LOAD run times (exec / console): 401 / 65 ms

 2068 15:58:31.137738  Finalizing chipset.

 2069 15:58:31.141007  Finalizing SMM.

 2070 15:58:31.141107  APMC done.

 2071 15:58:31.147838  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2072 15:58:31.150610  mp_park_aps done after 0 msecs.

 2073 15:58:31.154045  Jumping to boot code at 0x30000000(0x76b25000)

 2074 15:58:31.163982  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2075 15:58:31.164092  

 2076 15:58:31.167171  

 2077 15:58:31.167247  

 2078 15:58:31.167569  end: 2.2.3 depthcharge-start (duration 00:00:04) [common]
 2079 15:58:31.167711  start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
 2080 15:58:31.167787  Setting prompt string to ['volteer:']
 2081 15:58:31.167862  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:47)
 2082 15:58:31.170389  Starting depthcharge on Voema...

 2083 15:58:31.170465  

 2084 15:58:31.177155  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2085 15:58:31.177258  

 2086 15:58:31.183674  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2087 15:58:31.183778  

 2088 15:58:31.190493  Looking for NVMe Controller 0x3005f238 @ 00:1d:00

 2089 15:58:31.190597  

 2090 15:58:31.194033  Failed to find eMMC card reader

 2091 15:58:31.194134  

 2092 15:58:31.197230  Wipe memory regions:

 2093 15:58:31.197307  

 2094 15:58:31.200120  	[0x00000000001000, 0x000000000a0000)

 2095 15:58:31.200219  

 2096 15:58:31.203397  	[0x00000000100000, 0x00000030000000)

 2097 15:58:31.229425  

 2098 15:58:31.232406  	[0x00000032662db0, 0x000000769ef000)

 2099 15:58:31.268385  

 2100 15:58:31.271391  	[0x00000100000000, 0x00000280400000)

 2101 15:58:31.471835  

 2102 15:58:31.474712  ec_init: CrosEC protocol v3 supported (256, 256)

 2103 15:58:31.905936  

 2104 15:58:31.906065  R8152: Initializing

 2105 15:58:31.906125  

 2106 15:58:31.909000  Version 6 (ocp_data = 5c30)

 2107 15:58:31.909077  

 2108 15:58:31.912133  R8152: Done initializing

 2109 15:58:31.912211  

 2110 15:58:31.915560  Adding net device

 2111 15:58:32.217076  

 2112 15:58:32.219886  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2113 15:58:32.219985  

 2114 15:58:32.220071  


 2115 15:58:32.223580  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2117 15:58:32.324030  volteer: tftpboot 192.168.201.1 14343413/tftp-deploy-7bqh8dki/kernel/bzImage 14343413/tftp-deploy-7bqh8dki/kernel/cmdline 14343413/tftp-deploy-7bqh8dki/ramdisk/ramdisk.cpio.gz

 2118 15:58:32.324258  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2119 15:58:32.324371  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:46)
 2120 15:58:32.328733  tftpboot 192.168.201.1 14343413/tftp-deploy-7bqh8dki/kernel/bzIploy-7bqh8dki/kernel/cmdline 14343413/tftp-deploy-7bqh8dki/ramdisk/ramdisk.cpio.gz

 2121 15:58:32.328836  

 2122 15:58:32.328922  Waiting for link

 2123 15:58:32.531594  

 2124 15:58:32.531773  done.

 2125 15:58:32.531860  

 2126 15:58:32.531943  MAC: 00:24:32:30:77:76

 2127 15:58:32.532023  

 2128 15:58:32.535085  Sending DHCP discover... done.

 2129 15:58:32.535185  

 2130 15:58:32.538519  Waiting for reply... done.

 2131 15:58:32.538613  

 2132 15:58:32.541741  Sending DHCP request... done.

 2133 15:58:32.541841  

 2134 15:58:32.550119  Waiting for reply... done.

 2135 15:58:32.550217  

 2136 15:58:32.550317  My ip is 192.168.201.16

 2137 15:58:32.550404  

 2138 15:58:32.556921  The DHCP server ip is 192.168.201.1

 2139 15:58:32.557014  

 2140 15:58:32.560246  TFTP server IP predefined by user: 192.168.201.1

 2141 15:58:32.560323  

 2142 15:58:32.566463  Bootfile predefined by user: 14343413/tftp-deploy-7bqh8dki/kernel/bzImage

 2143 15:58:32.566566  

 2144 15:58:32.569641  Sending tftp read request... done.

 2145 15:58:32.569734  

 2146 15:58:32.576560  Waiting for the transfer... 

 2147 15:58:32.576663  

 2148 15:58:33.106929  00000000 ################################################################

 2149 15:58:33.107085  

 2150 15:58:33.618503  00080000 ################################################################

 2151 15:58:33.618649  

 2152 15:58:34.159940  00100000 ################################################################

 2153 15:58:34.160086  

 2154 15:58:34.703966  00180000 ################################################################

 2155 15:58:34.704091  

 2156 15:58:35.259359  00200000 ################################################################

 2157 15:58:35.259500  

 2158 15:58:35.793955  00280000 ################################################################

 2159 15:58:35.794110  

 2160 15:58:36.339249  00300000 ################################################################

 2161 15:58:36.339372  

 2162 15:58:36.903293  00380000 ################################################################

 2163 15:58:36.903437  

 2164 15:58:37.451246  00400000 ################################################################

 2165 15:58:37.451376  

 2166 15:58:37.986752  00480000 ################################################################

 2167 15:58:37.986885  

 2168 15:58:38.538890  00500000 ################################################################

 2169 15:58:38.539023  

 2170 15:58:39.066734  00580000 ################################################################

 2171 15:58:39.066862  

 2172 15:58:39.626355  00600000 ################################################################

 2173 15:58:39.626827  

 2174 15:58:40.253212  00680000 ################################################################

 2175 15:58:40.253345  

 2176 15:58:40.907064  00700000 ################################################################

 2177 15:58:40.907779  

 2178 15:58:41.553032  00780000 ################################################################

 2179 15:58:41.553183  

 2180 15:58:42.137955  00800000 ################################################################

 2181 15:58:42.138561  

 2182 15:58:42.787412  00880000 ################################################################

 2183 15:58:42.788051  

 2184 15:58:43.376784  00900000 ################################################################

 2185 15:58:43.376912  

 2186 15:58:43.951213  00980000 ################################################################

 2187 15:58:43.951367  

 2188 15:58:44.504519  00a00000 ################################################################

 2189 15:58:44.505006  

 2190 15:58:45.129513  00a80000 ################################################################

 2191 15:58:45.129630  

 2192 15:58:45.691754  00b00000 ################################################################

 2193 15:58:45.692216  

 2194 15:58:46.352431  00b80000 ################################################################

 2195 15:58:46.352909  

 2196 15:58:46.977340  00c00000 ################################################################

 2197 15:58:46.977878  

 2198 15:58:47.621021  00c80000 ################################################################

 2199 15:58:47.621476  

 2200 15:58:48.208757  00d00000 ################################################################ done.

 2201 15:58:48.209200  

 2202 15:58:48.212188  The bootfile was 14155664 bytes long.

 2203 15:58:48.212579  

 2204 15:58:48.215414  Sending tftp read request... done.

 2205 15:58:48.215856  

 2206 15:58:48.218615  Waiting for the transfer... 

 2207 15:58:48.218999  

 2208 15:58:48.791040  00000000 ################################################################

 2209 15:58:48.791163  

 2210 15:58:49.327879  00080000 ################################################################

 2211 15:58:49.328007  

 2212 15:58:49.858696  00100000 ################################################################

 2213 15:58:49.858828  

 2214 15:58:50.413959  00180000 ################################################################

 2215 15:58:50.414090  

 2216 15:58:50.939387  00200000 ################################################################

 2217 15:58:50.939507  

 2218 15:58:51.500899  00280000 ################################################################

 2219 15:58:51.501033  

 2220 15:58:52.091691  00300000 ################################################################

 2221 15:58:52.091813  

 2222 15:58:52.624842  00380000 ################################################################

 2223 15:58:52.624968  

 2224 15:58:53.277524  00400000 ################################################################

 2225 15:58:53.277672  

 2226 15:58:53.867973  00480000 ################################################################

 2227 15:58:53.868106  

 2228 15:58:54.434942  00500000 ################################################################

 2229 15:58:54.435071  

 2230 15:58:54.993673  00580000 ################################################################

 2231 15:58:54.993800  

 2232 15:58:55.564180  00600000 ################################################################

 2233 15:58:55.564308  

 2234 15:58:56.149723  00680000 ################################################################

 2235 15:58:56.149848  

 2236 15:58:56.712536  00700000 ################################################################

 2237 15:58:56.712664  

 2238 15:58:57.253422  00780000 ################################################################

 2239 15:58:57.253561  

 2240 15:58:57.820877  00800000 ################################################################

 2241 15:58:57.821007  

 2242 15:58:58.386136  00880000 ################################################################

 2243 15:58:58.386292  

 2244 15:58:58.395740  00900000 ## done.

 2245 15:58:58.395820  

 2246 15:58:58.398949  Sending tftp read request... done.

 2247 15:58:58.399028  

 2248 15:58:58.402212  Waiting for the transfer... 

 2249 15:58:58.402303  

 2250 15:58:58.405604  00000000 # done.

 2251 15:58:58.405676  

 2252 15:58:58.412209  Command line loaded dynamically from TFTP file: 14343413/tftp-deploy-7bqh8dki/kernel/cmdline

 2253 15:58:58.412280  

 2254 15:58:58.428832  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2255 15:58:58.434613  

 2256 15:58:58.438169  Shutting down all USB controllers.

 2257 15:58:58.438245  

 2258 15:58:58.438304  Removing current net device

 2259 15:58:58.438358  

 2260 15:58:58.441451  Finalizing coreboot

 2261 15:58:58.441531  

 2262 15:58:58.447991  Exiting depthcharge with code 4 at timestamp: 35951980

 2263 15:58:58.448070  

 2264 15:58:58.448147  

 2265 15:58:58.448219  Starting kernel ...

 2266 15:58:58.448289  

 2267 15:58:58.448359  

 2268 15:58:58.449018  end: 2.2.4 bootloader-commands (duration 00:00:27) [common]
 2269 15:58:58.449152  start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
 2270 15:58:58.449230  Setting prompt string to ['Linux version [0-9]']
 2271 15:58:58.449329  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2272 15:58:58.449427  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2274 16:03:18.449443  end: 2.2.5 auto-login-action (duration 00:04:20) [common]
 2276 16:03:18.449660  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
 2278 16:03:18.449814  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2281 16:03:18.450079  end: 2 depthcharge-action (duration 00:05:00) [common]
 2283 16:03:18.450343  Cleaning after the job
 2284 16:03:18.450430  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14343413/tftp-deploy-7bqh8dki/ramdisk
 2285 16:03:18.451663  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14343413/tftp-deploy-7bqh8dki/kernel
 2286 16:03:18.453081  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14343413/tftp-deploy-7bqh8dki/modules
 2287 16:03:18.453664  start: 4.1 power-off (timeout 00:00:30) [common]
 2288 16:03:18.453808  Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cp514-2h-1130g7-volteer-cbg-6', '--port=1', '--command=off']
 2289 16:03:19.266464  >> Command sent successfully.

 2290 16:03:19.269398  Returned 0 in 0 seconds
 2291 16:03:19.369713  end: 4.1 power-off (duration 00:00:01) [common]
 2293 16:03:19.369999  start: 4.2 read-feedback (timeout 00:09:59) [common]
 2294 16:03:19.370257  Listened to connection for namespace 'common' for up to 1s
 2296 16:03:19.370623  Listened to connection for namespace 'common' for up to 1s
 2297 16:03:20.371242  Finalising connection for namespace 'common'
 2298 16:03:20.371383  Disconnecting from shell: Finalise
 2299 16:03:20.371458  
 2300 16:03:20.471675  end: 4.2 read-feedback (duration 00:00:01) [common]
 2301 16:03:20.471789  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14343413
 2302 16:03:20.487386  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14343413
 2303 16:03:20.487529  JobError: Your job cannot terminate cleanly.