Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 15:58:38.922999 lava-dispatcher, installed at version: 2024.03
2 15:58:38.923225 start: 0 validate
3 15:58:38.923349 Start time: 2024-06-14 15:58:38.923342+00:00 (UTC)
4 15:58:38.923497 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:58:38.923641 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 15:58:39.190183 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:58:39.190350 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt-rebase%2Fv4.4-st5-395-gaed3deab96ccf%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:58:39.455211 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:58:39.455386 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt-rebase%2Fv4.4-st5-395-gaed3deab96ccf%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 15:58:39.722332 validate duration: 0.80
12 15:58:39.722582 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:58:39.722677 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:58:39.722759 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:58:39.722920 Not decompressing ramdisk as can be used compressed.
16 15:58:39.723009 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 15:58:39.723085 saving as /var/lib/lava/dispatcher/tmp/14343428/tftp-deploy-g9n_rt4g/ramdisk/rootfs.cpio.gz
18 15:58:39.723156 total size: 8417901 (8 MB)
19 15:58:39.724175 progress 0 % (0 MB)
20 15:58:39.726500 progress 5 % (0 MB)
21 15:58:39.728983 progress 10 % (0 MB)
22 15:58:39.731185 progress 15 % (1 MB)
23 15:58:39.733438 progress 20 % (1 MB)
24 15:58:39.735616 progress 25 % (2 MB)
25 15:58:39.737834 progress 30 % (2 MB)
26 15:58:39.739847 progress 35 % (2 MB)
27 15:58:39.742059 progress 40 % (3 MB)
28 15:58:39.744244 progress 45 % (3 MB)
29 15:58:39.746476 progress 50 % (4 MB)
30 15:58:39.748628 progress 55 % (4 MB)
31 15:58:39.750779 progress 60 % (4 MB)
32 15:58:39.752790 progress 65 % (5 MB)
33 15:58:39.754919 progress 70 % (5 MB)
34 15:58:39.757096 progress 75 % (6 MB)
35 15:58:39.759265 progress 80 % (6 MB)
36 15:58:39.761435 progress 85 % (6 MB)
37 15:58:39.763607 progress 90 % (7 MB)
38 15:58:39.765770 progress 95 % (7 MB)
39 15:58:39.767779 progress 100 % (8 MB)
40 15:58:39.768006 8 MB downloaded in 0.04 s (179.02 MB/s)
41 15:58:39.768156 end: 1.1.1 http-download (duration 00:00:00) [common]
43 15:58:39.768371 end: 1.1 download-retry (duration 00:00:00) [common]
44 15:58:39.768480 start: 1.2 download-retry (timeout 00:10:00) [common]
45 15:58:39.768570 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 15:58:39.768705 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt-rebase/v4.4-st5-395-gaed3deab96ccf/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 15:58:39.768772 saving as /var/lib/lava/dispatcher/tmp/14343428/tftp-deploy-g9n_rt4g/kernel/bzImage
48 15:58:39.768826 total size: 14155664 (13 MB)
49 15:58:39.768880 No compression specified
50 15:58:39.769910 progress 0 % (0 MB)
51 15:58:39.773432 progress 5 % (0 MB)
52 15:58:39.777095 progress 10 % (1 MB)
53 15:58:39.780586 progress 15 % (2 MB)
54 15:58:39.784213 progress 20 % (2 MB)
55 15:58:39.787713 progress 25 % (3 MB)
56 15:58:39.791382 progress 30 % (4 MB)
57 15:58:39.795026 progress 35 % (4 MB)
58 15:58:39.798659 progress 40 % (5 MB)
59 15:58:39.802379 progress 45 % (6 MB)
60 15:58:39.805986 progress 50 % (6 MB)
61 15:58:39.809716 progress 55 % (7 MB)
62 15:58:39.813488 progress 60 % (8 MB)
63 15:58:39.817026 progress 65 % (8 MB)
64 15:58:39.820655 progress 70 % (9 MB)
65 15:58:39.824115 progress 75 % (10 MB)
66 15:58:39.827709 progress 80 % (10 MB)
67 15:58:39.831355 progress 85 % (11 MB)
68 15:58:39.834849 progress 90 % (12 MB)
69 15:58:39.838525 progress 95 % (12 MB)
70 15:58:39.842013 progress 100 % (13 MB)
71 15:58:39.842251 13 MB downloaded in 0.07 s (183.87 MB/s)
72 15:58:39.842397 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:58:39.842601 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:58:39.842680 start: 1.3 download-retry (timeout 00:10:00) [common]
76 15:58:39.842754 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 15:58:39.842884 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt-rebase/v4.4-st5-395-gaed3deab96ccf/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 15:58:39.842946 saving as /var/lib/lava/dispatcher/tmp/14343428/tftp-deploy-g9n_rt4g/modules/modules.tar
79 15:58:39.842998 total size: 717588 (0 MB)
80 15:58:39.843051 Using unxz to decompress xz
81 15:58:39.844473 progress 4 % (0 MB)
82 15:58:39.844709 progress 9 % (0 MB)
83 15:58:39.846509 progress 18 % (0 MB)
84 15:58:39.850186 progress 27 % (0 MB)
85 15:58:39.853961 progress 36 % (0 MB)
86 15:58:39.855643 progress 41 % (0 MB)
87 15:58:39.859107 progress 50 % (0 MB)
88 15:58:39.863772 progress 59 % (0 MB)
89 15:58:39.869002 progress 68 % (0 MB)
90 15:58:39.871548 progress 73 % (0 MB)
91 15:58:39.876134 progress 82 % (0 MB)
92 15:58:39.881062 progress 91 % (0 MB)
93 15:58:39.886226 progress 100 % (0 MB)
94 15:58:39.894386 0 MB downloaded in 0.05 s (13.32 MB/s)
95 15:58:39.894574 end: 1.3.1 http-download (duration 00:00:00) [common]
97 15:58:39.894782 end: 1.3 download-retry (duration 00:00:00) [common]
98 15:58:39.894861 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
99 15:58:39.894940 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
100 15:58:39.895010 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
101 15:58:39.895099 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
102 15:58:39.895282 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e
103 15:58:39.895400 makedir: /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin
104 15:58:39.895489 makedir: /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/tests
105 15:58:39.895577 makedir: /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/results
106 15:58:39.895662 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-add-keys
107 15:58:39.895786 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-add-sources
108 15:58:39.895919 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-background-process-start
109 15:58:39.896082 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-background-process-stop
110 15:58:39.896237 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-common-functions
111 15:58:39.896351 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-echo-ipv4
112 15:58:39.896486 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-install-packages
113 15:58:39.896615 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-installed-packages
114 15:58:39.896725 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-os-build
115 15:58:39.896835 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-probe-channel
116 15:58:39.896950 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-probe-ip
117 15:58:39.897060 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-target-ip
118 15:58:39.897174 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-target-mac
119 15:58:39.897283 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-target-storage
120 15:58:39.897397 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-test-case
121 15:58:39.897508 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-test-event
122 15:58:39.897618 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-test-feedback
123 15:58:39.897732 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-test-raise
124 15:58:39.897844 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-test-reference
125 15:58:39.897954 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-test-runner
126 15:58:39.898065 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-test-set
127 15:58:39.898175 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-test-shell
128 15:58:39.898292 Updating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-install-packages (oe)
129 15:58:39.898434 Updating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/bin/lava-installed-packages (oe)
130 15:58:39.898546 Creating /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/environment
131 15:58:39.898634 LAVA metadata
132 15:58:39.898715 - LAVA_JOB_ID=14343428
133 15:58:39.898774 - LAVA_DISPATCHER_IP=192.168.201.1
134 15:58:39.898866 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
135 15:58:39.898923 skipped lava-vland-overlay
136 15:58:39.898988 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
137 15:58:39.899059 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
138 15:58:39.899115 skipped lava-multinode-overlay
139 15:58:39.899211 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
140 15:58:39.899280 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
141 15:58:39.899341 Loading test definitions
142 15:58:39.899416 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
143 15:58:39.899475 Using /lava-14343428 at stage 0
144 15:58:39.899779 uuid=14343428_1.4.2.3.1 testdef=None
145 15:58:39.899921 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
146 15:58:39.899997 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
147 15:58:39.900490 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
149 15:58:39.900705 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
150 15:58:39.901310 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
152 15:58:39.901516 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
153 15:58:39.902130 runner path: /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/0/tests/0_dmesg test_uuid 14343428_1.4.2.3.1
154 15:58:39.902275 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
156 15:58:39.902493 Creating lava-test-runner.conf files
157 15:58:39.902582 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14343428/lava-overlay-ylr25x0e/lava-14343428/0 for stage 0
158 15:58:39.902660 - 0_dmesg
159 15:58:39.902750 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
160 15:58:39.902827 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
161 15:58:39.909397 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
162 15:58:39.909528 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
163 15:58:39.909611 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
164 15:58:39.909688 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
165 15:58:39.909763 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
166 15:58:40.165637 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
167 15:58:40.165777 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
168 15:58:40.165882 extracting modules file /var/lib/lava/dispatcher/tmp/14343428/tftp-deploy-g9n_rt4g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14343428/extract-overlay-ramdisk-8pbu0vn1/ramdisk
169 15:58:40.192307 end: 1.4.4 extract-modules (duration 00:00:00) [common]
170 15:58:40.192472 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
171 15:58:40.192594 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14343428/compress-overlay-mblam9us/overlay-1.4.2.4.tar.gz to ramdisk
172 15:58:40.192687 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14343428/compress-overlay-mblam9us/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14343428/extract-overlay-ramdisk-8pbu0vn1/ramdisk
173 15:58:40.200305 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
174 15:58:40.200472 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
175 15:58:40.200603 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
176 15:58:40.200732 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
177 15:58:40.200845 Building ramdisk /var/lib/lava/dispatcher/tmp/14343428/extract-overlay-ramdisk-8pbu0vn1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14343428/extract-overlay-ramdisk-8pbu0vn1/ramdisk
178 15:58:40.332199 >> 53766 blocks
179 15:58:41.298324 rename /var/lib/lava/dispatcher/tmp/14343428/extract-overlay-ramdisk-8pbu0vn1/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14343428/tftp-deploy-g9n_rt4g/ramdisk/ramdisk.cpio.gz
180 15:58:41.298649 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
181 15:58:41.298826 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
182 15:58:41.298987 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
183 15:58:41.299131 No mkimage arch provided, not using FIT.
184 15:58:41.299286 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
185 15:58:41.299437 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
186 15:58:41.299594 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
187 15:58:41.299745 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
188 15:58:41.299874 No LXC device requested
189 15:58:41.300087 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
190 15:58:41.300244 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
191 15:58:41.300390 end: 1.6 deploy-device-env (duration 00:00:00) [common]
192 15:58:41.300555 Checking files for TFTP limit of 4294967296 bytes.
193 15:58:41.301131 end: 1 tftp-deploy (duration 00:00:02) [common]
194 15:58:41.301311 start: 2 depthcharge-action (timeout 00:05:00) [common]
195 15:58:41.301472 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
196 15:58:41.301661 substitutions:
197 15:58:41.301788 - {DTB}: None
198 15:58:41.301911 - {INITRD}: 14343428/tftp-deploy-g9n_rt4g/ramdisk/ramdisk.cpio.gz
199 15:58:41.302034 - {KERNEL}: 14343428/tftp-deploy-g9n_rt4g/kernel/bzImage
200 15:58:41.302154 - {LAVA_MAC}: None
201 15:58:41.302274 - {PRESEED_CONFIG}: None
202 15:58:41.302393 - {PRESEED_LOCAL}: None
203 15:58:41.302511 - {RAMDISK}: 14343428/tftp-deploy-g9n_rt4g/ramdisk/ramdisk.cpio.gz
204 15:58:41.302642 - {ROOT_PART}: None
205 15:58:41.302757 - {ROOT}: None
206 15:58:41.302876 - {SERVER_IP}: 192.168.201.1
207 15:58:41.302992 - {TEE}: None
208 15:58:41.303110 Parsed boot commands:
209 15:58:41.303221 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
210 15:58:41.303465 Parsed boot commands: tftpboot 192.168.201.1 14343428/tftp-deploy-g9n_rt4g/kernel/bzImage 14343428/tftp-deploy-g9n_rt4g/kernel/cmdline 14343428/tftp-deploy-g9n_rt4g/ramdisk/ramdisk.cpio.gz
211 15:58:41.303622 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
212 15:58:41.303777 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
213 15:58:41.303932 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
214 15:58:41.304087 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
215 15:58:41.304214 Not connected, no need to disconnect.
216 15:58:41.304357 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
217 15:58:41.304547 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
218 15:58:41.304677 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-2'
219 15:58:41.308686 Setting prompt string to ['lava-test: # ']
220 15:58:41.309221 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
221 15:58:41.309395 end: 2.2.1 reset-connection (duration 00:00:00) [common]
222 15:58:41.309603 start: 2.2.2 reset-device (timeout 00:05:00) [common]
223 15:58:41.309763 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
224 15:58:41.310103 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'asus-C436FA-Flip-hatch-cbg-2']
225 15:58:50.133690 Returned 0 in 8 seconds
226 15:58:50.234207 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
228 15:58:50.234573 end: 2.2.2 reset-device (duration 00:00:09) [common]
229 15:58:50.234666 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
230 15:58:50.234776 Setting prompt string to 'Starting depthcharge on Helios...'
231 15:58:50.234864 Changing prompt to 'Starting depthcharge on Helios...'
232 15:58:50.234961 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
233 15:58:50.235390 [Enter `^Ec?' for help]
234 15:58:50.235470
235 15:58:50.235582
236 15:58:50.235696 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
237 15:58:50.235805 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
238 15:58:50.235896 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
239 15:58:50.235991 CPU: AES supported, TXT NOT supported, VT supported
240 15:58:50.236086 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
241 15:58:50.236172 PCH: device id 0284 (rev 00) is Cometlake-U Premium
242 15:58:50.236264 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
243 15:58:50.236350 VBOOT: Loading verstage.
244 15:58:50.236434 FMAP: Found "FLASH" version 1.1 at 0xc04000.
245 15:58:50.236534 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
246 15:58:50.236614 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
247 15:58:50.236698 CBFS @ c08000 size 3f8000
248 15:58:50.236781 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
249 15:58:50.236860 CBFS: Locating 'fallback/verstage'
250 15:58:50.236945 CBFS: Found @ offset 10fb80 size 1072c
251 15:58:50.237024
252 15:58:50.237100
253 15:58:50.237188 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
254 15:58:50.237270 Probing TPM: . done!
255 15:58:50.237348 TPM ready after 0 ms
256 15:58:50.237439 Connected to device vid:did:rid of 1ae0:0028:00
257 15:58:50.237522 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
258 15:58:50.237610 Initialized TPM device CR50 revision 0
259 15:58:50.237691 tlcl_send_startup: Startup return code is 0
260 15:58:50.237769 TPM: setup succeeded
261 15:58:50.237849 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
262 15:58:50.237936 Chrome EC: UHEPI supported
263 15:58:50.238014 Phase 1
264 15:58:50.238091 FMAP: area GBB found @ c05000 (12288 bytes)
265 15:58:50.238179 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
266 15:58:50.238259 VB2:vb2_check_recovery() Recovery was requested manually
267 15:58:50.238337 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
268 15:58:50.238423 Recovery requested (1009000e)
269 15:58:50.238502 tlcl_extend: response is 0
270 15:58:50.238580 tlcl_extend: response is 0
271 15:58:50.238658 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
272 15:58:50.238736 CBFS @ c08000 size 3f8000
273 15:58:50.238816 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
274 15:58:50.238908 CBFS: Locating 'fallback/romstage'
275 15:58:50.238987 CBFS: Found @ offset 80 size 145fc
276 15:58:50.239065 Accumulated console time in verstage 102 ms
277 15:58:50.239142
278 15:58:50.239218
279 15:58:50.239297 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
280 15:58:50.239377 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
281 15:58:50.239454 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
282 15:58:50.239532 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
283 15:58:50.239615 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
284 15:58:50.239668 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
285 15:58:50.239717 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
286 15:58:50.239794 TCO_STS: 0000 0000
287 15:58:50.239874 GEN_PMCON: e0015038 00000200
288 15:58:50.239954 GBLRST_CAUSE: 00000000 00000000
289 15:58:50.240035 prev_sleep_state 5
290 15:58:50.240118 Boot Count incremented to 6972
291 15:58:50.240196 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
292 15:58:50.240274 CBFS @ c08000 size 3f8000
293 15:58:50.240352 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
294 15:58:50.240429 CBFS: Locating 'fspm.bin'
295 15:58:50.240514 CBFS: Found @ offset 5ffc0 size 71000
296 15:58:50.240592 Chrome EC: UHEPI supported
297 15:58:50.240669 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
298 15:58:50.240746 Probing TPM: done!
299 15:58:50.240823 Connected to device vid:did:rid of 1ae0:0028:00
300 15:58:50.240900 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
301 15:58:50.240978 Initialized TPM device CR50 revision 0
302 15:58:50.241055 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
303 15:58:50.241133 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
304 15:58:50.241210 MRC cache found, size 1948
305 15:58:50.241286 bootmode is set to: 2
306 15:58:50.241362 PRMRR disabled by config.
307 15:58:50.241437 SPD INDEX = 1
308 15:58:50.241514 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
309 15:58:50.241590 CBFS @ c08000 size 3f8000
310 15:58:50.241665 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
311 15:58:50.241741 CBFS: Locating 'spd.bin'
312 15:58:50.241816 CBFS: Found @ offset 5fb80 size 400
313 15:58:50.241892 SPD: module type is LPDDR3
314 15:58:50.241968 SPD: module part is
315 15:58:50.242043 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
316 15:58:50.242119 SPD: device width 4 bits, bus width 8 bits
317 15:58:50.242195 SPD: module size is 4096 MB (per channel)
318 15:58:50.242270 memory slot: 0 configuration done.
319 15:58:50.242346 memory slot: 2 configuration done.
320 15:58:50.242421 CBMEM:
321 15:58:50.242496 IMD: root @ 99fff000 254 entries.
322 15:58:50.242573 IMD: root @ 99ffec00 62 entries.
323 15:58:50.242649 External stage cache:
324 15:58:50.242724 IMD: root @ 9abff000 254 entries.
325 15:58:50.242800 IMD: root @ 9abfec00 62 entries.
326 15:58:50.242876 Chrome EC: clear events_b mask to 0x0000000020004000
327 15:58:50.242952 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
328 15:58:50.243028 tlcl_write: response is 0
329 15:58:50.243104 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
330 15:58:50.243180 MRC: TPM MRC hash updated successfully.
331 15:58:50.243256 2 DIMMs found
332 15:58:50.243333 SMM Memory Map
333 15:58:50.243409 SMRAM : 0x9a000000 0x1000000
334 15:58:50.243697 Subregion 0: 0x9a000000 0xa00000
335 15:58:50.243786 Subregion 1: 0x9aa00000 0x200000
336 15:58:50.243865 Subregion 2: 0x9ac00000 0x400000
337 15:58:50.243944 top_of_ram = 0x9a000000
338 15:58:50.244022 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
339 15:58:50.244099 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
340 15:58:50.244175 MTRR Range: Start=ff000000 End=0 (Size 1000000)
341 15:58:50.244250 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 15:58:50.244325 CBFS @ c08000 size 3f8000
343 15:58:50.244400 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 15:58:50.244486 CBFS: Locating 'fallback/postcar'
345 15:58:50.244563 CBFS: Found @ offset 107000 size 4b44
346 15:58:50.244642 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
347 15:58:50.244723 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
348 15:58:50.244810 Processing 180 relocs. Offset value of 0x97c0c000
349 15:58:50.244898 Accumulated console time in romstage 286 ms
350 15:58:50.244987
351 15:58:50.245074
352 15:58:50.245159 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
353 15:58:50.245259 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
354 15:58:50.245348 CBFS @ c08000 size 3f8000
355 15:58:50.245407 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
356 15:58:50.245459 CBFS: Locating 'fallback/ramstage'
357 15:58:50.245511 CBFS: Found @ offset 43380 size 1b9e8
358 15:58:50.245560 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
359 15:58:50.245610 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
360 15:58:50.245661 Processing 3976 relocs. Offset value of 0x98db0000
361 15:58:50.245710 Accumulated console time in postcar 52 ms
362 15:58:50.245759
363 15:58:50.245807
364 15:58:50.245856 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
365 15:58:50.245906 FMAP: area RO_VPD found @ c00000 (16384 bytes)
366 15:58:50.245956 WARNING: RO_VPD is uninitialized or empty.
367 15:58:50.246005 FMAP: area RW_VPD found @ af8000 (8192 bytes)
368 15:58:50.246054 FMAP: area RW_VPD found @ af8000 (8192 bytes)
369 15:58:50.246102 Normal boot.
370 15:58:50.246153 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
371 15:58:50.246203 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 15:58:50.246252 CBFS @ c08000 size 3f8000
373 15:58:50.246302 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 15:58:50.246351 CBFS: Locating 'cpu_microcode_blob.bin'
375 15:58:50.246400 CBFS: Found @ offset 14700 size 2ec00
376 15:58:50.246449 microcode: sig=0x806ec pf=0x4 revision=0xc9
377 15:58:50.246497 Skip microcode update
378 15:58:50.246545 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 15:58:50.246594 CBFS @ c08000 size 3f8000
380 15:58:50.246643 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 15:58:50.246694 CBFS: Locating 'fsps.bin'
382 15:58:50.246742 CBFS: Found @ offset d1fc0 size 35000
383 15:58:50.246791 Detected 4 core, 8 thread CPU.
384 15:58:50.246839 Setting up SMI for CPU
385 15:58:50.246887 IED base = 0x9ac00000
386 15:58:50.246935 IED size = 0x00400000
387 15:58:50.246984 Will perform SMM setup.
388 15:58:50.247032 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
389 15:58:50.247081 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
390 15:58:50.247131 Processing 16 relocs. Offset value of 0x00030000
391 15:58:50.247180 Attempting to start 7 APs
392 15:58:50.247234 Waiting for 10ms after sending INIT.
393 15:58:50.247307 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
394 15:58:50.247358 done.
395 15:58:50.247407 AP: slot 1 apic_id 2.
396 15:58:50.247456 AP: slot 3 apic_id 3.
397 15:58:50.247505 Waiting for 2nd SIPI to complete...done.
398 15:58:50.247555 AP: slot 7 apic_id 6.
399 15:58:50.247604 AP: slot 6 apic_id 7.
400 15:58:50.247652 AP: slot 4 apic_id 5.
401 15:58:50.247700 AP: slot 5 apic_id 4.
402 15:58:50.247749 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
403 15:58:50.247799 Processing 13 relocs. Offset value of 0x00038000
404 15:58:50.247848 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
405 15:58:50.247897 Installing SMM handler to 0x9a000000
406 15:58:50.247946 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
407 15:58:50.247996 Processing 658 relocs. Offset value of 0x9a010000
408 15:58:50.248045 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
409 15:58:50.248094 Processing 13 relocs. Offset value of 0x9a008000
410 15:58:50.248143 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
411 15:58:50.248193 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
412 15:58:50.248241 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
413 15:58:50.248290 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
414 15:58:50.248338 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
415 15:58:50.248387 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
416 15:58:50.248436 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
417 15:58:50.248496 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
418 15:58:50.248546 Clearing SMI status registers
419 15:58:50.248595 SMI_STS: PM1
420 15:58:50.248644 PM1_STS: PWRBTN
421 15:58:50.248693 TCO_STS: SECOND_TO
422 15:58:50.248742 New SMBASE 0x9a000000
423 15:58:50.248792 In relocation handler: CPU 0
424 15:58:50.248840 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
425 15:58:50.248889 Writing SMRR. base = 0x9a000006, mask=0xff000800
426 15:58:50.248939 Relocation complete.
427 15:58:50.248987 New SMBASE 0x99fff800
428 15:58:50.249036 In relocation handler: CPU 2
429 15:58:50.249277 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
430 15:58:50.249335 Writing SMRR. base = 0x9a000006, mask=0xff000800
431 15:58:50.249385 Relocation complete.
432 15:58:50.249434 New SMBASE 0x99fff400
433 15:58:50.249484 In relocation handler: CPU 3
434 15:58:50.249533 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
435 15:58:50.249582 Writing SMRR. base = 0x9a000006, mask=0xff000800
436 15:58:50.249631 Relocation complete.
437 15:58:50.249680 New SMBASE 0x99fffc00
438 15:58:50.249729 In relocation handler: CPU 1
439 15:58:50.249778 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
440 15:58:50.249827 Writing SMRR. base = 0x9a000006, mask=0xff000800
441 15:58:50.249876 Relocation complete.
442 15:58:50.249925 New SMBASE 0x99ffe400
443 15:58:50.249974 In relocation handler: CPU 7
444 15:58:50.250023 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
445 15:58:50.250072 Writing SMRR. base = 0x9a000006, mask=0xff000800
446 15:58:50.250121 Relocation complete.
447 15:58:50.250170 New SMBASE 0x99ffe800
448 15:58:50.250218 In relocation handler: CPU 6
449 15:58:50.250266 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
450 15:58:50.250314 Writing SMRR. base = 0x9a000006, mask=0xff000800
451 15:58:50.250363 Relocation complete.
452 15:58:50.250412 New SMBASE 0x99fff000
453 15:58:50.250461 In relocation handler: CPU 4
454 15:58:50.250509 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
455 15:58:50.250558 Writing SMRR. base = 0x9a000006, mask=0xff000800
456 15:58:50.250607 Relocation complete.
457 15:58:50.250656 New SMBASE 0x99ffec00
458 15:58:50.250704 In relocation handler: CPU 5
459 15:58:50.250752 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
460 15:58:50.250801 Writing SMRR. base = 0x9a000006, mask=0xff000800
461 15:58:50.250850 Relocation complete.
462 15:58:50.250898 Initializing CPU #0
463 15:58:50.250946 CPU: vendor Intel device 806ec
464 15:58:50.250996 CPU: family 06, model 8e, stepping 0c
465 15:58:50.251044 Clearing out pending MCEs
466 15:58:50.251093 Setting up local APIC...
467 15:58:50.251142 apic_id: 0x00 done.
468 15:58:50.251190 Turbo is available but hidden
469 15:58:50.251238 Turbo is available and visible
470 15:58:50.251288 VMX status: enabled
471 15:58:50.251336 IA32_FEATURE_CONTROL status: locked
472 15:58:50.251385 Skip microcode update
473 15:58:50.251433 CPU #0 initialized
474 15:58:50.251482 Initializing CPU #2
475 15:58:50.251530 Initializing CPU #7
476 15:58:50.251578 Initializing CPU #6
477 15:58:50.251626 CPU: vendor Intel device 806ec
478 15:58:50.251674 CPU: family 06, model 8e, stepping 0c
479 15:58:50.251723 CPU: vendor Intel device 806ec
480 15:58:50.251771 CPU: family 06, model 8e, stepping 0c
481 15:58:50.251820 Clearing out pending MCEs
482 15:58:50.251872 Clearing out pending MCEs
483 15:58:50.251920 Setting up local APIC...
484 15:58:50.251968 Initializing CPU #4
485 15:58:50.252016 Initializing CPU #5
486 15:58:50.252064 Initializing CPU #3
487 15:58:50.252113 Initializing CPU #1
488 15:58:50.252161 CPU: vendor Intel device 806ec
489 15:58:50.252210 CPU: family 06, model 8e, stepping 0c
490 15:58:50.252258 CPU: vendor Intel device 806ec
491 15:58:50.252306 CPU: family 06, model 8e, stepping 0c
492 15:58:50.252354 Clearing out pending MCEs
493 15:58:50.252403 Clearing out pending MCEs
494 15:58:50.252461 Setting up local APIC...
495 15:58:50.252512 CPU: vendor Intel device 806ec
496 15:58:50.252560 CPU: family 06, model 8e, stepping 0c
497 15:58:50.252609 Clearing out pending MCEs
498 15:58:50.252657 CPU: vendor Intel device 806ec
499 15:58:50.252706 CPU: family 06, model 8e, stepping 0c
500 15:58:50.252755 CPU: vendor Intel device 806ec
501 15:58:50.252803 CPU: family 06, model 8e, stepping 0c
502 15:58:50.252851 Clearing out pending MCEs
503 15:58:50.252900 Clearing out pending MCEs
504 15:58:50.252948 Setting up local APIC...
505 15:58:50.252997 apic_id: 0x03 done.
506 15:58:50.253045 Setting up local APIC...
507 15:58:50.253095 Setting up local APIC...
508 15:58:50.253143 VMX status: enabled
509 15:58:50.253192 apic_id: 0x02 done.
510 15:58:50.253240 IA32_FEATURE_CONTROL status: locked
511 15:58:50.253291 VMX status: enabled
512 15:58:50.253340 Skip microcode update
513 15:58:50.253388 IA32_FEATURE_CONTROL status: locked
514 15:58:50.253439 CPU #3 initialized
515 15:58:50.253488 Skip microcode update
516 15:58:50.253536 Setting up local APIC...
517 15:58:50.253584 Setting up local APIC...
518 15:58:50.253631 apic_id: 0x06 done.
519 15:58:50.253679 apic_id: 0x07 done.
520 15:58:50.253726 VMX status: enabled
521 15:58:50.253775 VMX status: enabled
522 15:58:50.253823 IA32_FEATURE_CONTROL status: locked
523 15:58:50.253871 IA32_FEATURE_CONTROL status: locked
524 15:58:50.253919 Skip microcode update
525 15:58:50.253967 Skip microcode update
526 15:58:50.254016 CPU #7 initialized
527 15:58:50.254063 CPU #6 initialized
528 15:58:50.254111 CPU #1 initialized
529 15:58:50.254159 apic_id: 0x05 done.
530 15:58:50.254207 apic_id: 0x04 done.
531 15:58:50.254255 VMX status: enabled
532 15:58:50.254303 VMX status: enabled
533 15:58:50.254350 IA32_FEATURE_CONTROL status: locked
534 15:58:50.254398 IA32_FEATURE_CONTROL status: locked
535 15:58:50.254447 Skip microcode update
536 15:58:50.254495 Skip microcode update
537 15:58:50.254543 CPU #4 initialized
538 15:58:50.254592 CPU #5 initialized
539 15:58:50.254640 apic_id: 0x01 done.
540 15:58:50.254689 VMX status: enabled
541 15:58:50.254736 IA32_FEATURE_CONTROL status: locked
542 15:58:50.254784 Skip microcode update
543 15:58:50.254832 CPU #2 initialized
544 15:58:50.254881 bsp_do_flight_plan done after 461 msecs.
545 15:58:50.254929 CPU: frequency set to 4200 MHz
546 15:58:50.254978 Enabling SMIs.
547 15:58:50.255049 Locking SMM.
548 15:58:50.255105 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
549 15:58:50.255155 CBFS @ c08000 size 3f8000
550 15:58:50.255204 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
551 15:58:50.255253 CBFS: Locating 'vbt.bin'
552 15:58:50.255302 CBFS: Found @ offset 5f5c0 size 499
553 15:58:50.255351 Found a VBT of 4608 bytes after decompression
554 15:58:50.255400 Display FSP Version Info HOB
555 15:58:50.255449 Reference Code - CPU = 9.0.1e.30
556 15:58:50.255497 uCode Version = 0.0.0.ca
557 15:58:50.255546 TXT ACM version = ff.ff.ff.ffff
558 15:58:50.255595 Display FSP Version Info HOB
559 15:58:50.255643 Reference Code - ME = 9.0.1e.30
560 15:58:50.255692 MEBx version = 0.0.0.0
561 15:58:50.255739 ME Firmware Version = Consumer SKU
562 15:58:50.255787 Display FSP Version Info HOB
563 15:58:50.255836 Reference Code - CML PCH = 9.0.1e.30
564 15:58:50.255885 PCH-CRID Status = Disabled
565 15:58:50.255933 PCH-CRID Original Value = ff.ff.ff.ffff
566 15:58:50.255981 PCH-CRID New Value = ff.ff.ff.ffff
567 15:58:50.256235 OPROM - RST - RAID = ff.ff.ff.ffff
568 15:58:50.256291 ChipsetInit Base Version = ff.ff.ff.ffff
569 15:58:50.256340 ChipsetInit Oem Version = ff.ff.ff.ffff
570 15:58:50.256389 Display FSP Version Info HOB
571 15:58:50.256439 Reference Code - SA - System Agent = 9.0.1e.30
572 15:58:50.256525 Reference Code - MRC = 0.7.1.6c
573 15:58:50.256602 SA - PCIe Version = 9.0.1e.30
574 15:58:50.256679 SA-CRID Status = Disabled
575 15:58:50.256754 SA-CRID Original Value = 0.0.0.c
576 15:58:50.256805 SA-CRID New Value = 0.0.0.c
577 15:58:50.256855 OPROM - VBIOS = ff.ff.ff.ffff
578 15:58:50.256905 RTC Init
579 15:58:50.256954 Set power on after power failure.
580 15:58:50.257003 Disabling Deep S3
581 15:58:50.257052 Disabling Deep S3
582 15:58:50.257100 Disabling Deep S4
583 15:58:50.257148 Disabling Deep S4
584 15:58:50.257197 Disabling Deep S5
585 15:58:50.257245 Disabling Deep S5
586 15:58:50.257294 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 196 exit 1
587 15:58:50.257343 Enumerating buses...
588 15:58:50.257391 Show all devs... Before device enumeration.
589 15:58:50.257441 Root Device: enabled 1
590 15:58:50.257490 CPU_CLUSTER: 0: enabled 1
591 15:58:50.257539 DOMAIN: 0000: enabled 1
592 15:58:50.257587 APIC: 00: enabled 1
593 15:58:50.257635 PCI: 00:00.0: enabled 1
594 15:58:50.257683 PCI: 00:02.0: enabled 1
595 15:58:50.257732 PCI: 00:04.0: enabled 0
596 15:58:50.257779 PCI: 00:05.0: enabled 0
597 15:58:50.257827 PCI: 00:12.0: enabled 1
598 15:58:50.257876 PCI: 00:12.5: enabled 0
599 15:58:50.257923 PCI: 00:12.6: enabled 0
600 15:58:50.257971 PCI: 00:14.0: enabled 1
601 15:58:50.258019 PCI: 00:14.1: enabled 0
602 15:58:50.258067 PCI: 00:14.3: enabled 1
603 15:58:50.258114 PCI: 00:14.5: enabled 0
604 15:58:50.258162 PCI: 00:15.0: enabled 1
605 15:58:50.258210 PCI: 00:15.1: enabled 1
606 15:58:50.258258 PCI: 00:15.2: enabled 0
607 15:58:50.258306 PCI: 00:15.3: enabled 0
608 15:58:50.258354 PCI: 00:16.0: enabled 1
609 15:58:50.258403 PCI: 00:16.1: enabled 0
610 15:58:50.258451 PCI: 00:16.2: enabled 0
611 15:58:50.258499 PCI: 00:16.3: enabled 0
612 15:58:50.258548 PCI: 00:16.4: enabled 0
613 15:58:50.258597 PCI: 00:16.5: enabled 0
614 15:58:50.258645 PCI: 00:17.0: enabled 1
615 15:58:50.258693 PCI: 00:19.0: enabled 1
616 15:58:50.258742 PCI: 00:19.1: enabled 0
617 15:58:50.258790 PCI: 00:19.2: enabled 0
618 15:58:50.258838 PCI: 00:1a.0: enabled 0
619 15:58:50.258886 PCI: 00:1c.0: enabled 0
620 15:58:50.258934 PCI: 00:1c.1: enabled 0
621 15:58:50.258982 PCI: 00:1c.2: enabled 0
622 15:58:50.259031 PCI: 00:1c.3: enabled 0
623 15:58:50.259080 PCI: 00:1c.4: enabled 0
624 15:58:50.259128 PCI: 00:1c.5: enabled 0
625 15:58:50.259176 PCI: 00:1c.6: enabled 0
626 15:58:50.259225 PCI: 00:1c.7: enabled 0
627 15:58:50.259274 PCI: 00:1d.0: enabled 1
628 15:58:50.259322 PCI: 00:1d.1: enabled 0
629 15:58:50.259370 PCI: 00:1d.2: enabled 0
630 15:58:50.259419 PCI: 00:1d.3: enabled 0
631 15:58:50.259468 PCI: 00:1d.4: enabled 0
632 15:58:50.259517 PCI: 00:1d.5: enabled 1
633 15:58:50.259566 PCI: 00:1e.0: enabled 1
634 15:58:50.259614 PCI: 00:1e.1: enabled 0
635 15:58:50.259663 PCI: 00:1e.2: enabled 1
636 15:58:50.259711 PCI: 00:1e.3: enabled 1
637 15:58:50.259759 PCI: 00:1f.0: enabled 1
638 15:58:50.259808 PCI: 00:1f.1: enabled 1
639 15:58:50.259856 PCI: 00:1f.2: enabled 1
640 15:58:50.259904 PCI: 00:1f.3: enabled 1
641 15:58:50.259952 PCI: 00:1f.4: enabled 1
642 15:58:50.260001 PCI: 00:1f.5: enabled 1
643 15:58:50.260050 PCI: 00:1f.6: enabled 0
644 15:58:50.260098 USB0 port 0: enabled 1
645 15:58:50.260146 I2C: 00:15: enabled 1
646 15:58:50.260194 I2C: 00:5d: enabled 1
647 15:58:50.260242 GENERIC: 0.0: enabled 1
648 15:58:50.260291 I2C: 00:1a: enabled 1
649 15:58:50.260339 I2C: 00:38: enabled 1
650 15:58:50.260386 I2C: 00:39: enabled 1
651 15:58:50.260434 I2C: 00:3a: enabled 1
652 15:58:50.260493 I2C: 00:3b: enabled 1
653 15:58:50.260542 PCI: 00:00.0: enabled 1
654 15:58:50.260590 SPI: 00: enabled 1
655 15:58:50.260639 SPI: 01: enabled 1
656 15:58:50.260687 PNP: 0c09.0: enabled 1
657 15:58:50.260744 USB2 port 0: enabled 1
658 15:58:50.260803 USB2 port 1: enabled 1
659 15:58:50.260853 USB2 port 2: enabled 0
660 15:58:50.260900 USB2 port 3: enabled 0
661 15:58:50.260949 USB2 port 5: enabled 0
662 15:58:50.260997 USB2 port 6: enabled 1
663 15:58:50.261045 USB2 port 9: enabled 1
664 15:58:50.261094 USB3 port 0: enabled 1
665 15:58:50.261142 USB3 port 1: enabled 1
666 15:58:50.261190 USB3 port 2: enabled 1
667 15:58:50.261238 USB3 port 3: enabled 1
668 15:58:50.261286 USB3 port 4: enabled 0
669 15:58:50.261334 APIC: 02: enabled 1
670 15:58:50.261382 APIC: 01: enabled 1
671 15:58:50.261430 APIC: 03: enabled 1
672 15:58:50.261477 APIC: 05: enabled 1
673 15:58:50.261526 APIC: 04: enabled 1
674 15:58:50.261575 APIC: 07: enabled 1
675 15:58:50.261624 APIC: 06: enabled 1
676 15:58:50.261672 Compare with tree...
677 15:58:50.261721 Root Device: enabled 1
678 15:58:50.261769 CPU_CLUSTER: 0: enabled 1
679 15:58:50.261818 APIC: 00: enabled 1
680 15:58:50.261870 APIC: 02: enabled 1
681 15:58:50.261921 APIC: 01: enabled 1
682 15:58:50.261968 APIC: 03: enabled 1
683 15:58:50.262016 APIC: 05: enabled 1
684 15:58:50.262064 APIC: 04: enabled 1
685 15:58:50.262113 APIC: 07: enabled 1
686 15:58:50.262161 APIC: 06: enabled 1
687 15:58:50.262209 DOMAIN: 0000: enabled 1
688 15:58:50.262258 PCI: 00:00.0: enabled 1
689 15:58:50.262306 PCI: 00:02.0: enabled 1
690 15:58:50.262366 PCI: 00:04.0: enabled 0
691 15:58:50.262416 PCI: 00:05.0: enabled 0
692 15:58:50.262464 PCI: 00:12.0: enabled 1
693 15:58:50.262513 PCI: 00:12.5: enabled 0
694 15:58:50.262561 PCI: 00:12.6: enabled 0
695 15:58:50.262610 PCI: 00:14.0: enabled 1
696 15:58:50.262658 USB0 port 0: enabled 1
697 15:58:50.262707 USB2 port 0: enabled 1
698 15:58:50.262755 USB2 port 1: enabled 1
699 15:58:50.262803 USB2 port 2: enabled 0
700 15:58:50.262851 USB2 port 3: enabled 0
701 15:58:50.262899 USB2 port 5: enabled 0
702 15:58:50.262947 USB2 port 6: enabled 1
703 15:58:50.262995 USB2 port 9: enabled 1
704 15:58:50.263043 USB3 port 0: enabled 1
705 15:58:50.263092 USB3 port 1: enabled 1
706 15:58:50.263141 USB3 port 2: enabled 1
707 15:58:50.263217 USB3 port 3: enabled 1
708 15:58:50.263269 USB3 port 4: enabled 0
709 15:58:50.263318 PCI: 00:14.1: enabled 0
710 15:58:50.263367 PCI: 00:14.3: enabled 1
711 15:58:50.263416 PCI: 00:14.5: enabled 0
712 15:58:50.263465 PCI: 00:15.0: enabled 1
713 15:58:50.263512 I2C: 00:15: enabled 1
714 15:58:50.263561 PCI: 00:15.1: enabled 1
715 15:58:50.263609 I2C: 00:5d: enabled 1
716 15:58:50.263658 GENERIC: 0.0: enabled 1
717 15:58:50.263707 PCI: 00:15.2: enabled 0
718 15:58:50.263755 PCI: 00:15.3: enabled 0
719 15:58:50.263803 PCI: 00:16.0: enabled 1
720 15:58:50.263851 PCI: 00:16.1: enabled 0
721 15:58:50.263899 PCI: 00:16.2: enabled 0
722 15:58:50.263947 PCI: 00:16.3: enabled 0
723 15:58:50.263994 PCI: 00:16.4: enabled 0
724 15:58:50.264042 PCI: 00:16.5: enabled 0
725 15:58:50.264091 PCI: 00:17.0: enabled 1
726 15:58:50.264333 PCI: 00:19.0: enabled 1
727 15:58:50.264415 I2C: 00:1a: enabled 1
728 15:58:50.264487 I2C: 00:38: enabled 1
729 15:58:50.264538 I2C: 00:39: enabled 1
730 15:58:50.264587 I2C: 00:3a: enabled 1
731 15:58:50.264635 I2C: 00:3b: enabled 1
732 15:58:50.264684 PCI: 00:19.1: enabled 0
733 15:58:50.264733 PCI: 00:19.2: enabled 0
734 15:58:50.264782 PCI: 00:1a.0: enabled 0
735 15:58:50.264831 PCI: 00:1c.0: enabled 0
736 15:58:50.264879 PCI: 00:1c.1: enabled 0
737 15:58:50.264934 PCI: 00:1c.2: enabled 0
738 15:58:50.264983 PCI: 00:1c.3: enabled 0
739 15:58:50.265032 PCI: 00:1c.4: enabled 0
740 15:58:50.265080 PCI: 00:1c.5: enabled 0
741 15:58:50.265128 PCI: 00:1c.6: enabled 0
742 15:58:50.265176 PCI: 00:1c.7: enabled 0
743 15:58:50.265224 PCI: 00:1d.0: enabled 1
744 15:58:50.265273 PCI: 00:1d.1: enabled 0
745 15:58:50.265322 PCI: 00:1d.2: enabled 0
746 15:58:50.265370 PCI: 00:1d.3: enabled 0
747 15:58:50.265418 PCI: 00:1d.4: enabled 0
748 15:58:50.265466 PCI: 00:1d.5: enabled 1
749 15:58:50.265515 PCI: 00:00.0: enabled 1
750 15:58:50.265563 PCI: 00:1e.0: enabled 1
751 15:58:50.265611 PCI: 00:1e.1: enabled 0
752 15:58:50.265659 PCI: 00:1e.2: enabled 1
753 15:58:50.265707 SPI: 00: enabled 1
754 15:58:50.265755 PCI: 00:1e.3: enabled 1
755 15:58:50.265804 SPI: 01: enabled 1
756 15:58:50.265858 PCI: 00:1f.0: enabled 1
757 15:58:50.265908 PNP: 0c09.0: enabled 1
758 15:58:50.265957 PCI: 00:1f.1: enabled 1
759 15:58:50.266006 PCI: 00:1f.2: enabled 1
760 15:58:50.266055 PCI: 00:1f.3: enabled 1
761 15:58:50.266103 PCI: 00:1f.4: enabled 1
762 15:58:50.266151 PCI: 00:1f.5: enabled 1
763 15:58:50.266199 PCI: 00:1f.6: enabled 0
764 15:58:50.266246 Root Device scanning...
765 15:58:50.266295 scan_static_bus for Root Device
766 15:58:50.266345 CPU_CLUSTER: 0 enabled
767 15:58:50.266399 DOMAIN: 0000 enabled
768 15:58:50.266448 DOMAIN: 0000 scanning...
769 15:58:50.266497 PCI: pci_scan_bus for bus 00
770 15:58:50.266545 PCI: 00:00.0 [8086/0000] ops
771 15:58:50.266594 PCI: 00:00.0 [8086/9b61] enabled
772 15:58:50.266642 PCI: 00:02.0 [8086/0000] bus ops
773 15:58:50.266690 PCI: 00:02.0 [8086/9b41] enabled
774 15:58:50.266756 PCI: 00:04.0 [8086/1903] disabled
775 15:58:50.266834 PCI: 00:08.0 [8086/1911] enabled
776 15:58:50.266896 PCI: 00:12.0 [8086/02f9] enabled
777 15:58:50.266945 PCI: 00:14.0 [8086/0000] bus ops
778 15:58:50.266994 PCI: 00:14.0 [8086/02ed] enabled
779 15:58:50.267043 PCI: 00:14.2 [8086/02ef] enabled
780 15:58:50.267091 PCI: 00:14.3 [8086/02f0] enabled
781 15:58:50.267140 PCI: 00:15.0 [8086/0000] bus ops
782 15:58:50.267188 PCI: 00:15.0 [8086/02e8] enabled
783 15:58:50.267237 PCI: 00:15.1 [8086/0000] bus ops
784 15:58:50.267285 PCI: 00:15.1 [8086/02e9] enabled
785 15:58:50.267334 PCI: 00:16.0 [8086/0000] ops
786 15:58:50.267382 PCI: 00:16.0 [8086/02e0] enabled
787 15:58:50.267431 PCI: 00:17.0 [8086/0000] ops
788 15:58:50.267479 PCI: 00:17.0 [8086/02d3] enabled
789 15:58:50.267527 PCI: 00:19.0 [8086/0000] bus ops
790 15:58:50.267576 PCI: 00:19.0 [8086/02c5] enabled
791 15:58:50.267625 PCI: 00:1d.0 [8086/0000] bus ops
792 15:58:50.267674 PCI: 00:1d.0 [8086/02b0] enabled
793 15:58:50.267722 PCI: Static device PCI: 00:1d.5 not found, disabling it.
794 15:58:50.267771 PCI: 00:1e.0 [8086/0000] ops
795 15:58:50.267820 PCI: 00:1e.0 [8086/02a8] enabled
796 15:58:50.267869 PCI: 00:1e.2 [8086/0000] bus ops
797 15:58:50.267917 PCI: 00:1e.2 [8086/02aa] enabled
798 15:58:50.267976 PCI: 00:1e.3 [8086/0000] bus ops
799 15:58:50.268026 PCI: 00:1e.3 [8086/02ab] enabled
800 15:58:50.268075 PCI: 00:1f.0 [8086/0000] bus ops
801 15:58:50.268124 PCI: 00:1f.0 [8086/0284] enabled
802 15:58:50.268172 PCI: Static device PCI: 00:1f.1 not found, disabling it.
803 15:58:50.268221 PCI: Static device PCI: 00:1f.2 not found, disabling it.
804 15:58:50.268270 PCI: 00:1f.3 [8086/0000] bus ops
805 15:58:50.268319 PCI: 00:1f.3 [8086/02c8] enabled
806 15:58:50.268367 PCI: 00:1f.4 [8086/0000] bus ops
807 15:58:50.268416 PCI: 00:1f.4 [8086/02a3] enabled
808 15:58:50.268475 PCI: 00:1f.5 [8086/0000] bus ops
809 15:58:50.268527 PCI: 00:1f.5 [8086/02a4] enabled
810 15:58:50.268576 PCI: Leftover static devices:
811 15:58:50.268624 PCI: 00:05.0
812 15:58:50.268673 PCI: 00:12.5
813 15:58:50.268723 PCI: 00:12.6
814 15:58:50.268772 PCI: 00:14.1
815 15:58:50.268821 PCI: 00:14.5
816 15:58:50.268868 PCI: 00:15.2
817 15:58:50.268916 PCI: 00:15.3
818 15:58:50.268963 PCI: 00:16.1
819 15:58:50.269012 PCI: 00:16.2
820 15:58:50.269059 PCI: 00:16.3
821 15:58:50.269108 PCI: 00:16.4
822 15:58:50.269156 PCI: 00:16.5
823 15:58:50.269204 PCI: 00:19.1
824 15:58:50.269252 PCI: 00:19.2
825 15:58:50.269304 PCI: 00:1a.0
826 15:58:50.269353 PCI: 00:1c.0
827 15:58:50.269402 PCI: 00:1c.1
828 15:58:50.269450 PCI: 00:1c.2
829 15:58:50.269498 PCI: 00:1c.3
830 15:58:50.269545 PCI: 00:1c.4
831 15:58:50.269596 PCI: 00:1c.5
832 15:58:50.269646 PCI: 00:1c.6
833 15:58:50.269694 PCI: 00:1c.7
834 15:58:50.269742 PCI: 00:1d.1
835 15:58:50.269790 PCI: 00:1d.2
836 15:58:50.269838 PCI: 00:1d.3
837 15:58:50.269885 PCI: 00:1d.4
838 15:58:50.269934 PCI: 00:1d.5
839 15:58:50.269981 PCI: 00:1e.1
840 15:58:50.270029 PCI: 00:1f.1
841 15:58:50.270076 PCI: 00:1f.2
842 15:58:50.270124 PCI: 00:1f.6
843 15:58:50.270172 PCI: Check your devicetree.cb.
844 15:58:50.270221 PCI: 00:02.0 scanning...
845 15:58:50.270269 scan_generic_bus for PCI: 00:02.0
846 15:58:50.270354 scan_generic_bus for PCI: 00:02.0 done
847 15:58:50.270434 scan_bus: scanning of bus PCI: 00:02.0 took 10194 usecs
848 15:58:50.270512 PCI: 00:14.0 scanning...
849 15:58:50.270579 scan_static_bus for PCI: 00:14.0
850 15:58:50.270630 USB0 port 0 enabled
851 15:58:50.270679 USB0 port 0 scanning...
852 15:58:50.270728 scan_static_bus for USB0 port 0
853 15:58:50.270776 USB2 port 0 enabled
854 15:58:50.270824 USB2 port 1 enabled
855 15:58:50.270872 USB2 port 2 disabled
856 15:58:50.270920 USB2 port 3 disabled
857 15:58:50.270969 USB2 port 5 disabled
858 15:58:50.271017 USB2 port 6 enabled
859 15:58:50.271066 USB2 port 9 enabled
860 15:58:50.271114 USB3 port 0 enabled
861 15:58:50.271162 USB3 port 1 enabled
862 15:58:50.271210 USB3 port 2 enabled
863 15:58:50.271258 USB3 port 3 enabled
864 15:58:50.271307 USB3 port 4 disabled
865 15:58:50.271355 USB2 port 0 scanning...
866 15:58:50.271412 scan_static_bus for USB2 port 0
867 15:58:50.271475 scan_static_bus for USB2 port 0 done
868 15:58:50.271525 scan_bus: scanning of bus USB2 port 0 took 9702 usecs
869 15:58:50.271575 USB2 port 1 scanning...
870 15:58:50.271634 scan_static_bus for USB2 port 1
871 15:58:50.271685 scan_static_bus for USB2 port 1 done
872 15:58:50.271739 scan_bus: scanning of bus USB2 port 1 took 9689 usecs
873 15:58:50.271790 USB2 port 6 scanning...
874 15:58:50.271839 scan_static_bus for USB2 port 6
875 15:58:50.271888 scan_static_bus for USB2 port 6 done
876 15:58:50.272133 scan_bus: scanning of bus USB2 port 6 took 9712 usecs
877 15:58:50.272190 USB2 port 9 scanning...
878 15:58:50.272240 scan_static_bus for USB2 port 9
879 15:58:50.272289 scan_static_bus for USB2 port 9 done
880 15:58:50.272339 scan_bus: scanning of bus USB2 port 9 took 9697 usecs
881 15:58:50.272388 USB3 port 0 scanning...
882 15:58:50.272436 scan_static_bus for USB3 port 0
883 15:58:50.272496 scan_static_bus for USB3 port 0 done
884 15:58:50.272546 scan_bus: scanning of bus USB3 port 0 took 9692 usecs
885 15:58:50.272596 USB3 port 1 scanning...
886 15:58:50.272645 scan_static_bus for USB3 port 1
887 15:58:50.272693 scan_static_bus for USB3 port 1 done
888 15:58:50.272768 scan_bus: scanning of bus USB3 port 1 took 9697 usecs
889 15:58:50.272848 USB3 port 2 scanning...
890 15:58:50.272901 scan_static_bus for USB3 port 2
891 15:58:50.272951 scan_static_bus for USB3 port 2 done
892 15:58:50.273000 scan_bus: scanning of bus USB3 port 2 took 9706 usecs
893 15:58:50.273049 USB3 port 3 scanning...
894 15:58:50.273098 scan_static_bus for USB3 port 3
895 15:58:50.273147 scan_static_bus for USB3 port 3 done
896 15:58:50.273201 scan_bus: scanning of bus USB3 port 3 took 9707 usecs
897 15:58:50.273252 scan_static_bus for USB0 port 0 done
898 15:58:50.273301 scan_bus: scanning of bus USB0 port 0 took 155372 usecs
899 15:58:50.273350 scan_static_bus for PCI: 00:14.0 done
900 15:58:50.273399 scan_bus: scanning of bus PCI: 00:14.0 took 172991 usecs
901 15:58:50.273449 PCI: 00:15.0 scanning...
902 15:58:50.273498 scan_generic_bus for PCI: 00:15.0
903 15:58:50.273547 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
904 15:58:50.273595 scan_generic_bus for PCI: 00:15.0 done
905 15:58:50.273644 scan_bus: scanning of bus PCI: 00:15.0 took 14288 usecs
906 15:58:50.273692 PCI: 00:15.1 scanning...
907 15:58:50.273741 scan_generic_bus for PCI: 00:15.1
908 15:58:50.273789 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
909 15:58:50.273837 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
910 15:58:50.273908 scan_generic_bus for PCI: 00:15.1 done
911 15:58:50.273987 scan_bus: scanning of bus PCI: 00:15.1 took 18592 usecs
912 15:58:50.274067 PCI: 00:19.0 scanning...
913 15:58:50.274147 scan_generic_bus for PCI: 00:19.0
914 15:58:50.274226 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
915 15:58:50.274304 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
916 15:58:50.274382 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
917 15:58:50.274434 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
918 15:58:50.274484 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
919 15:58:50.274532 scan_generic_bus for PCI: 00:19.0 done
920 15:58:50.274581 scan_bus: scanning of bus PCI: 00:19.0 took 30730 usecs
921 15:58:50.274630 PCI: 00:1d.0 scanning...
922 15:58:50.274679 do_pci_scan_bridge for PCI: 00:1d.0
923 15:58:50.274728 PCI: pci_scan_bus for bus 01
924 15:58:50.274777 PCI: 01:00.0 [1c5c/1327] enabled
925 15:58:50.274826 Enabling Common Clock Configuration
926 15:58:50.274875 L1 Sub-State supported from root port 29
927 15:58:50.274924 L1 Sub-State Support = 0xf
928 15:58:50.274973 CommonModeRestoreTime = 0x28
929 15:58:50.275021 Power On Value = 0x16, Power On Scale = 0x0
930 15:58:50.275070 ASPM: Enabled L1
931 15:58:50.275119 scan_bus: scanning of bus PCI: 00:1d.0 took 32779 usecs
932 15:58:50.275167 PCI: 00:1e.2 scanning...
933 15:58:50.275216 scan_generic_bus for PCI: 00:1e.2
934 15:58:50.275264 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
935 15:58:50.275313 scan_generic_bus for PCI: 00:1e.2 done
936 15:58:50.275361 scan_bus: scanning of bus PCI: 00:1e.2 took 14006 usecs
937 15:58:50.275409 PCI: 00:1e.3 scanning...
938 15:58:50.275457 scan_generic_bus for PCI: 00:1e.3
939 15:58:50.275506 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
940 15:58:50.275554 scan_generic_bus for PCI: 00:1e.3 done
941 15:58:50.275604 scan_bus: scanning of bus PCI: 00:1e.3 took 14009 usecs
942 15:58:50.275652 PCI: 00:1f.0 scanning...
943 15:58:50.275700 scan_static_bus for PCI: 00:1f.0
944 15:58:50.275749 PNP: 0c09.0 enabled
945 15:58:50.275797 scan_static_bus for PCI: 00:1f.0 done
946 15:58:50.275846 scan_bus: scanning of bus PCI: 00:1f.0 took 12044 usecs
947 15:58:50.275894 PCI: 00:1f.3 scanning...
948 15:58:50.275943 scan_bus: scanning of bus PCI: 00:1f.3 took 2850 usecs
949 15:58:50.275992 PCI: 00:1f.4 scanning...
950 15:58:50.276041 scan_generic_bus for PCI: 00:1f.4
951 15:58:50.276089 scan_generic_bus for PCI: 00:1f.4 done
952 15:58:50.276138 scan_bus: scanning of bus PCI: 00:1f.4 took 10183 usecs
953 15:58:50.276187 PCI: 00:1f.5 scanning...
954 15:58:50.276235 scan_generic_bus for PCI: 00:1f.5
955 15:58:50.276284 scan_generic_bus for PCI: 00:1f.5 done
956 15:58:50.276332 scan_bus: scanning of bus PCI: 00:1f.5 took 10194 usecs
957 15:58:50.276380 scan_bus: scanning of bus DOMAIN: 0000 took 604947 usecs
958 15:58:50.276429 scan_static_bus for Root Device done
959 15:58:50.276488 scan_bus: scanning of bus Root Device took 624827 usecs
960 15:58:50.276537 done
961 15:58:50.276586 Chrome EC: UHEPI supported
962 15:58:50.276635 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
963 15:58:50.276684 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
964 15:58:50.276734 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
965 15:58:50.276782 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
966 15:58:50.276831 SPI flash protection: WPSW=0 SRP0=0
967 15:58:50.276880 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
968 15:58:50.276928 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
969 15:58:50.276977 found VGA at PCI: 00:02.0
970 15:58:50.277026 Setting up VGA for PCI: 00:02.0
971 15:58:50.277075 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
972 15:58:50.277124 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
973 15:58:50.277173 Allocating resources...
974 15:58:50.277224 Reading resources...
975 15:58:50.277275 Root Device read_resources bus 0 link: 0
976 15:58:50.277324 CPU_CLUSTER: 0 read_resources bus 0 link: 0
977 15:58:50.277373 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
978 15:58:50.277422 DOMAIN: 0000 read_resources bus 0 link: 0
979 15:58:50.277679 PCI: 00:14.0 read_resources bus 0 link: 0
980 15:58:50.277738 USB0 port 0 read_resources bus 0 link: 0
981 15:58:50.277789 USB0 port 0 read_resources bus 0 link: 0 done
982 15:58:50.277838 PCI: 00:14.0 read_resources bus 0 link: 0 done
983 15:58:50.277888 PCI: 00:15.0 read_resources bus 1 link: 0
984 15:58:50.277943 PCI: 00:15.0 read_resources bus 1 link: 0 done
985 15:58:50.277995 PCI: 00:15.1 read_resources bus 2 link: 0
986 15:58:50.278044 PCI: 00:15.1 read_resources bus 2 link: 0 done
987 15:58:50.278094 PCI: 00:19.0 read_resources bus 3 link: 0
988 15:58:50.278178 PCI: 00:19.0 read_resources bus 3 link: 0 done
989 15:58:50.278259 PCI: 00:1d.0 read_resources bus 1 link: 0
990 15:58:50.278336 PCI: 00:1d.0 read_resources bus 1 link: 0 done
991 15:58:50.278404 PCI: 00:1e.2 read_resources bus 4 link: 0
992 15:58:50.278455 PCI: 00:1e.2 read_resources bus 4 link: 0 done
993 15:58:50.278504 PCI: 00:1e.3 read_resources bus 5 link: 0
994 15:58:50.278557 PCI: 00:1e.3 read_resources bus 5 link: 0 done
995 15:58:50.278607 PCI: 00:1f.0 read_resources bus 0 link: 0
996 15:58:50.278656 PCI: 00:1f.0 read_resources bus 0 link: 0 done
997 15:58:50.278706 DOMAIN: 0000 read_resources bus 0 link: 0 done
998 15:58:50.278755 Root Device read_resources bus 0 link: 0 done
999 15:58:50.278804 Done reading resources.
1000 15:58:50.278852 Show resources in subtree (Root Device)...After reading.
1001 15:58:50.278906 Root Device child on link 0 CPU_CLUSTER: 0
1002 15:58:50.278955 CPU_CLUSTER: 0 child on link 0 APIC: 00
1003 15:58:50.279004 APIC: 00
1004 15:58:50.279053 APIC: 02
1005 15:58:50.279102 APIC: 01
1006 15:58:50.279166 APIC: 03
1007 15:58:50.279218 APIC: 05
1008 15:58:50.279266 APIC: 04
1009 15:58:50.279314 APIC: 07
1010 15:58:50.279363 APIC: 06
1011 15:58:50.279412 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1012 15:58:50.279462 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1013 15:58:50.279513 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1014 15:58:50.279563 PCI: 00:00.0
1015 15:58:50.279613 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1016 15:58:50.279663 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1017 15:58:50.279723 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1018 15:58:50.279774 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1019 15:58:50.279824 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1020 15:58:50.279874 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1021 15:58:50.279924 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1022 15:58:50.279976 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1023 15:58:50.280057 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1024 15:58:50.280110 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1025 15:58:50.280161 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1026 15:58:50.280211 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1027 15:58:50.280262 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1028 15:58:50.280312 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1029 15:58:50.280362 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1030 15:58:50.280412 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1031 15:58:50.280474 PCI: 00:02.0
1032 15:58:50.280555 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1033 15:58:50.280636 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1034 15:58:50.280716 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1035 15:58:50.280794 PCI: 00:04.0
1036 15:58:50.280870 PCI: 00:08.0
1037 15:58:50.280949 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1038 15:58:50.281026 PCI: 00:12.0
1039 15:58:50.281105 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1040 15:58:50.281183 PCI: 00:14.0 child on link 0 USB0 port 0
1041 15:58:50.281262 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1042 15:58:50.281340 USB0 port 0 child on link 0 USB2 port 0
1043 15:58:50.281417 USB2 port 0
1044 15:58:50.281494 USB2 port 1
1045 15:58:50.281570 USB2 port 2
1046 15:58:50.281646 USB2 port 3
1047 15:58:50.281722 USB2 port 5
1048 15:58:50.281799 USB2 port 6
1049 15:58:50.281875 USB2 port 9
1050 15:58:50.281951 USB3 port 0
1051 15:58:50.282027 USB3 port 1
1052 15:58:50.282102 USB3 port 2
1053 15:58:50.282164 USB3 port 3
1054 15:58:50.282215 USB3 port 4
1055 15:58:50.282264 PCI: 00:14.2
1056 15:58:50.282335 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1057 15:58:50.282618 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1058 15:58:50.282704 PCI: 00:14.3
1059 15:58:50.282789 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1060 15:58:50.282844 PCI: 00:15.0 child on link 0 I2C: 01:15
1061 15:58:50.282895 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1062 15:58:50.282946 I2C: 01:15
1063 15:58:50.282995 PCI: 00:15.1 child on link 0 I2C: 02:5d
1064 15:58:50.283045 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1065 15:58:50.283095 I2C: 02:5d
1066 15:58:50.283143 GENERIC: 0.0
1067 15:58:50.283191 PCI: 00:16.0
1068 15:58:50.283240 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1069 15:58:50.283289 PCI: 00:17.0
1070 15:58:50.283339 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1071 15:58:50.283389 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1072 15:58:50.283438 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1073 15:58:50.283488 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1074 15:58:50.283536 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1075 15:58:50.283584 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1076 15:58:50.283633 PCI: 00:19.0 child on link 0 I2C: 03:1a
1077 15:58:50.283681 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1078 15:58:50.283730 I2C: 03:1a
1079 15:58:50.283778 I2C: 03:38
1080 15:58:50.283826 I2C: 03:39
1081 15:58:50.283874 I2C: 03:3a
1082 15:58:50.283922 I2C: 03:3b
1083 15:58:50.283970 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1084 15:58:50.284019 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1085 15:58:50.284073 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1086 15:58:50.284125 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1087 15:58:50.284175 PCI: 01:00.0
1088 15:58:50.284224 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1089 15:58:50.284274 PCI: 00:1e.0
1090 15:58:50.284323 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1091 15:58:50.284372 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1092 15:58:50.284422 PCI: 00:1e.2 child on link 0 SPI: 00
1093 15:58:50.284482 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1094 15:58:50.284534 SPI: 00
1095 15:58:50.284584 PCI: 00:1e.3 child on link 0 SPI: 01
1096 15:58:50.284634 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1097 15:58:50.284683 SPI: 01
1098 15:58:50.284732 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1099 15:58:50.284781 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1100 15:58:50.284830 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1101 15:58:50.284879 PNP: 0c09.0
1102 15:58:50.284928 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1103 15:58:50.284978 PCI: 00:1f.3
1104 15:58:50.285026 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1105 15:58:50.285076 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1106 15:58:50.285125 PCI: 00:1f.4
1107 15:58:50.285173 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1108 15:58:50.285222 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1109 15:58:50.285272 PCI: 00:1f.5
1110 15:58:50.285321 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1111 15:58:50.285374 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1112 15:58:50.285425 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1113 15:58:50.285474 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1114 15:58:50.285524 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1115 15:58:50.285572 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1116 15:58:50.285621 PCI: 00:17.0 18 * [0x60 - 0x67] io
1117 15:58:50.285669 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1118 15:58:50.285718 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1119 15:58:50.285767 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1120 15:58:50.285816 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1121 15:58:50.285865 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1122 15:58:50.285914 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1123 15:58:50.285963 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1124 15:58:50.286202 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1125 15:58:50.286257 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1126 15:58:50.286308 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1127 15:58:50.286357 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1128 15:58:50.286407 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1129 15:58:50.286478 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1130 15:58:50.286558 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1131 15:58:50.286637 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1132 15:58:50.286718 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1133 15:58:50.286803 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1134 15:58:50.286884 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1135 15:58:50.286962 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1136 15:58:50.287039 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1137 15:58:50.287117 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1138 15:58:50.287195 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1139 15:58:50.287273 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1140 15:58:50.287351 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1141 15:58:50.287428 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1142 15:58:50.287505 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1143 15:58:50.287583 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1144 15:58:50.287660 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1145 15:58:50.287738 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1146 15:58:50.287816 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1147 15:58:50.287893 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1148 15:58:50.287950 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1149 15:58:50.288002 avoid_fixed_resources: DOMAIN: 0000
1150 15:58:50.288052 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1151 15:58:50.288101 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1152 15:58:50.288150 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1153 15:58:50.288201 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1154 15:58:50.288254 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1155 15:58:50.288305 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1156 15:58:50.288354 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1157 15:58:50.288402 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1158 15:58:50.288460 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1159 15:58:50.288537 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1160 15:58:50.288589 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1161 15:58:50.288639 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1162 15:58:50.288688 Setting resources...
1163 15:58:50.288738 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1164 15:58:50.288787 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1165 15:58:50.288836 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1166 15:58:50.288885 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1167 15:58:50.288933 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1168 15:58:50.288982 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1169 15:58:50.289031 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1170 15:58:50.289081 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1171 15:58:50.289130 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1172 15:58:50.289179 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1173 15:58:50.289229 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1174 15:58:50.289278 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1175 15:58:50.289326 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1176 15:58:50.289374 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1177 15:58:50.289424 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1178 15:58:50.289475 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1179 15:58:50.289524 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1180 15:58:50.289573 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1181 15:58:50.289622 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1182 15:58:50.289671 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1183 15:58:50.289719 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1184 15:58:50.289767 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1185 15:58:50.289816 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1186 15:58:50.289864 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1187 15:58:50.289913 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1188 15:58:50.289966 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1189 15:58:50.290017 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1190 15:58:50.290090 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1191 15:58:50.290169 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1192 15:58:50.290249 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1193 15:58:50.290324 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1194 15:58:50.290376 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1195 15:58:50.290425 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1196 15:58:50.290475 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1197 15:58:50.290713 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1198 15:58:50.290772 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1199 15:58:50.290829 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1200 15:58:50.290880 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1201 15:58:50.290931 Root Device assign_resources, bus 0 link: 0
1202 15:58:50.290980 DOMAIN: 0000 assign_resources, bus 0 link: 0
1203 15:58:50.291029 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1204 15:58:50.291079 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1205 15:58:50.291129 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1206 15:58:50.291182 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1207 15:58:50.291234 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1208 15:58:50.291284 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1209 15:58:50.291333 PCI: 00:14.0 assign_resources, bus 0 link: 0
1210 15:58:50.291385 PCI: 00:14.0 assign_resources, bus 0 link: 0
1211 15:58:50.291437 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1212 15:58:50.291487 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1213 15:58:50.291536 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1214 15:58:50.291585 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1215 15:58:50.291635 PCI: 00:15.0 assign_resources, bus 1 link: 0
1216 15:58:50.291695 PCI: 00:15.0 assign_resources, bus 1 link: 0
1217 15:58:50.291745 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1218 15:58:50.291794 PCI: 00:15.1 assign_resources, bus 2 link: 0
1219 15:58:50.291844 PCI: 00:15.1 assign_resources, bus 2 link: 0
1220 15:58:50.291893 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1221 15:58:50.291948 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1222 15:58:50.291999 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1223 15:58:50.292050 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1224 15:58:50.292100 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1225 15:58:50.292149 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1226 15:58:50.292199 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1227 15:58:50.292254 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1228 15:58:50.292304 PCI: 00:19.0 assign_resources, bus 3 link: 0
1229 15:58:50.292353 PCI: 00:19.0 assign_resources, bus 3 link: 0
1230 15:58:50.292402 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1231 15:58:50.292460 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1232 15:58:50.292516 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1233 15:58:50.292567 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1234 15:58:50.292616 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1235 15:58:50.292670 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1236 15:58:50.292719 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1237 15:58:50.292769 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1238 15:58:50.292820 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1239 15:58:50.292871 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1240 15:58:50.292919 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1241 15:58:50.292968 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1242 15:58:50.293016 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1243 15:58:50.293064 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1244 15:58:50.293112 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1245 15:58:50.293161 LPC: Trying to open IO window from 800 size 1ff
1246 15:58:50.293209 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1247 15:58:50.293258 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1248 15:58:50.293306 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1249 15:58:50.293355 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1250 15:58:50.293403 DOMAIN: 0000 assign_resources, bus 0 link: 0
1251 15:58:50.293451 Root Device assign_resources, bus 0 link: 0
1252 15:58:50.293500 Done setting resources.
1253 15:58:50.293549 Show resources in subtree (Root Device)...After assigning values.
1254 15:58:50.293598 Root Device child on link 0 CPU_CLUSTER: 0
1255 15:58:50.293647 CPU_CLUSTER: 0 child on link 0 APIC: 00
1256 15:58:50.293696 APIC: 00
1257 15:58:50.293744 APIC: 02
1258 15:58:50.293792 APIC: 01
1259 15:58:50.293839 APIC: 03
1260 15:58:50.293887 APIC: 05
1261 15:58:50.293934 APIC: 04
1262 15:58:50.293982 APIC: 07
1263 15:58:50.294030 APIC: 06
1264 15:58:50.294077 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1265 15:58:50.294317 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1266 15:58:50.294403 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1267 15:58:50.294474 PCI: 00:00.0
1268 15:58:50.294525 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1269 15:58:50.294575 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1270 15:58:50.294625 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1271 15:58:50.294675 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1272 15:58:50.294724 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1273 15:58:50.294773 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1274 15:58:50.294822 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1275 15:58:50.294871 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1276 15:58:50.294919 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1277 15:58:50.294968 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1278 15:58:50.295017 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1279 15:58:50.295066 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1280 15:58:50.295115 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1281 15:58:50.295164 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1282 15:58:50.295212 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1283 15:58:50.295261 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1284 15:58:50.295309 PCI: 00:02.0
1285 15:58:50.295358 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1286 15:58:50.295409 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1287 15:58:50.295459 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1288 15:58:50.295507 PCI: 00:04.0
1289 15:58:50.295554 PCI: 00:08.0
1290 15:58:50.295602 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1291 15:58:50.295651 PCI: 00:12.0
1292 15:58:50.295699 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1293 15:58:50.295749 PCI: 00:14.0 child on link 0 USB0 port 0
1294 15:58:50.295798 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1295 15:58:50.295847 USB0 port 0 child on link 0 USB2 port 0
1296 15:58:50.295896 USB2 port 0
1297 15:58:50.295944 USB2 port 1
1298 15:58:50.295991 USB2 port 2
1299 15:58:50.296037 USB2 port 3
1300 15:58:50.296084 USB2 port 5
1301 15:58:50.296132 USB2 port 6
1302 15:58:50.296180 USB2 port 9
1303 15:58:50.296227 USB3 port 0
1304 15:58:50.296275 USB3 port 1
1305 15:58:50.296323 USB3 port 2
1306 15:58:50.296370 USB3 port 3
1307 15:58:50.296418 USB3 port 4
1308 15:58:50.296487 PCI: 00:14.2
1309 15:58:50.296535 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1310 15:58:50.296585 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1311 15:58:50.296646 PCI: 00:14.3
1312 15:58:50.296709 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1313 15:58:50.296760 PCI: 00:15.0 child on link 0 I2C: 01:15
1314 15:58:50.296809 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1315 15:58:50.296859 I2C: 01:15
1316 15:58:50.296908 PCI: 00:15.1 child on link 0 I2C: 02:5d
1317 15:58:50.296957 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1318 15:58:50.297007 I2C: 02:5d
1319 15:58:50.297056 GENERIC: 0.0
1320 15:58:50.297105 PCI: 00:16.0
1321 15:58:50.297154 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1322 15:58:50.297202 PCI: 00:17.0
1323 15:58:50.297251 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1324 15:58:50.297300 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1325 15:58:50.297349 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1326 15:58:50.297398 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1327 15:58:50.297448 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1328 15:58:50.297684 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1329 15:58:50.297740 PCI: 00:19.0 child on link 0 I2C: 03:1a
1330 15:58:50.297789 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1331 15:58:50.297839 I2C: 03:1a
1332 15:58:50.297888 I2C: 03:38
1333 15:58:50.297943 I2C: 03:39
1334 15:58:50.297993 I2C: 03:3a
1335 15:58:50.298042 I2C: 03:3b
1336 15:58:50.298090 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1337 15:58:50.298139 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1338 15:58:50.298188 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1339 15:58:50.298237 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1340 15:58:50.298297 PCI: 01:00.0
1341 15:58:50.298379 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1342 15:58:50.298462 PCI: 00:1e.0
1343 15:58:50.298541 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1344 15:58:50.298596 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1345 15:58:50.298647 PCI: 00:1e.2 child on link 0 SPI: 00
1346 15:58:50.298697 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1347 15:58:50.298746 SPI: 00
1348 15:58:50.298795 PCI: 00:1e.3 child on link 0 SPI: 01
1349 15:58:50.298843 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1350 15:58:50.298893 SPI: 01
1351 15:58:50.298941 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1352 15:58:50.298990 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1353 15:58:50.299039 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1354 15:58:50.299088 PNP: 0c09.0
1355 15:58:50.299136 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1356 15:58:50.299185 PCI: 00:1f.3
1357 15:58:50.299234 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1358 15:58:50.299282 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1359 15:58:50.299331 PCI: 00:1f.4
1360 15:58:50.299380 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1361 15:58:50.299433 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1362 15:58:50.299482 PCI: 00:1f.5
1363 15:58:50.299541 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1364 15:58:50.299592 Done allocating resources.
1365 15:58:50.299640 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1366 15:58:50.299689 Enabling resources...
1367 15:58:50.299736 PCI: 00:00.0 subsystem <- 8086/9b61
1368 15:58:50.299791 PCI: 00:00.0 cmd <- 06
1369 15:58:50.299841 PCI: 00:02.0 subsystem <- 8086/9b41
1370 15:58:50.299889 PCI: 00:02.0 cmd <- 03
1371 15:58:50.299937 PCI: 00:08.0 cmd <- 06
1372 15:58:50.299985 PCI: 00:12.0 subsystem <- 8086/02f9
1373 15:58:50.300032 PCI: 00:12.0 cmd <- 02
1374 15:58:50.300080 PCI: 00:14.0 subsystem <- 8086/02ed
1375 15:58:50.300128 PCI: 00:14.0 cmd <- 02
1376 15:58:50.300176 PCI: 00:14.2 cmd <- 02
1377 15:58:50.300223 PCI: 00:14.3 subsystem <- 8086/02f0
1378 15:58:50.300271 PCI: 00:14.3 cmd <- 02
1379 15:58:50.300327 PCI: 00:15.0 subsystem <- 8086/02e8
1380 15:58:50.300404 PCI: 00:15.0 cmd <- 02
1381 15:58:50.300492 PCI: 00:15.1 subsystem <- 8086/02e9
1382 15:58:50.300570 PCI: 00:15.1 cmd <- 02
1383 15:58:50.300647 PCI: 00:16.0 subsystem <- 8086/02e0
1384 15:58:50.300729 PCI: 00:16.0 cmd <- 02
1385 15:58:50.303541 PCI: 00:17.0 subsystem <- 8086/02d3
1386 15:58:50.306061 PCI: 00:17.0 cmd <- 03
1387 15:58:50.309437 PCI: 00:19.0 subsystem <- 8086/02c5
1388 15:58:50.312781 PCI: 00:19.0 cmd <- 02
1389 15:58:50.316609 PCI: 00:1d.0 bridge ctrl <- 0013
1390 15:58:50.319977 PCI: 00:1d.0 subsystem <- 8086/02b0
1391 15:58:50.322736 PCI: 00:1d.0 cmd <- 06
1392 15:58:50.326004 PCI: 00:1e.0 subsystem <- 8086/02a8
1393 15:58:50.329472 PCI: 00:1e.0 cmd <- 06
1394 15:58:50.332913 PCI: 00:1e.2 subsystem <- 8086/02aa
1395 15:58:50.335548 PCI: 00:1e.2 cmd <- 06
1396 15:58:50.338944 PCI: 00:1e.3 subsystem <- 8086/02ab
1397 15:58:50.342372 PCI: 00:1e.3 cmd <- 02
1398 15:58:50.345909 PCI: 00:1f.0 subsystem <- 8086/0284
1399 15:58:50.348708 PCI: 00:1f.0 cmd <- 407
1400 15:58:50.352078 PCI: 00:1f.3 subsystem <- 8086/02c8
1401 15:58:50.352154 PCI: 00:1f.3 cmd <- 02
1402 15:58:50.358947 PCI: 00:1f.4 subsystem <- 8086/02a3
1403 15:58:50.359026 PCI: 00:1f.4 cmd <- 03
1404 15:58:50.365189 PCI: 00:1f.5 subsystem <- 8086/02a4
1405 15:58:50.365266 PCI: 00:1f.5 cmd <- 406
1406 15:58:50.374955 PCI: 01:00.0 cmd <- 02
1407 15:58:50.380350 done.
1408 15:58:50.392321 ME: Version: 14.0.39.1367
1409 15:58:50.399186 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1410 15:58:50.402504 Initializing devices...
1411 15:58:50.402577 Root Device init ...
1412 15:58:50.408523 Chrome EC: Set SMI mask to 0x0000000000000000
1413 15:58:50.415304 Chrome EC: clear events_b mask to 0x0000000000000000
1414 15:58:50.418487 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1415 15:58:50.425115 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1416 15:58:50.431772 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1417 15:58:50.435046 Chrome EC: Set WAKE mask to 0x0000000000000000
1418 15:58:50.441416 Root Device init finished in 35175 usecs
1419 15:58:50.444650 CPU_CLUSTER: 0 init ...
1420 15:58:50.448100 CPU_CLUSTER: 0 init finished in 2438 usecs
1421 15:58:50.453111 PCI: 00:00.0 init ...
1422 15:58:50.456555 CPU TDP: 15 Watts
1423 15:58:50.459449 CPU PL2 = 64 Watts
1424 15:58:50.462859 PCI: 00:00.0 init finished in 7075 usecs
1425 15:58:50.466423 PCI: 00:02.0 init ...
1426 15:58:50.469327 PCI: 00:02.0 init finished in 2254 usecs
1427 15:58:50.472732 PCI: 00:08.0 init ...
1428 15:58:50.476130 PCI: 00:08.0 init finished in 2251 usecs
1429 15:58:50.479637 PCI: 00:12.0 init ...
1430 15:58:50.482394 PCI: 00:12.0 init finished in 2251 usecs
1431 15:58:50.486743 PCI: 00:14.0 init ...
1432 15:58:50.489700 PCI: 00:14.0 init finished in 2243 usecs
1433 15:58:50.492314 PCI: 00:14.2 init ...
1434 15:58:50.495632 PCI: 00:14.2 init finished in 2251 usecs
1435 15:58:50.498823 PCI: 00:14.3 init ...
1436 15:58:50.501970 PCI: 00:14.3 init finished in 2268 usecs
1437 15:58:50.505498 PCI: 00:15.0 init ...
1438 15:58:50.508910 DW I2C bus 0 at 0xd121f000 (400 KHz)
1439 15:58:50.515472 PCI: 00:15.0 init finished in 5967 usecs
1440 15:58:50.515578 PCI: 00:15.1 init ...
1441 15:58:50.521895 DW I2C bus 1 at 0xd1220000 (400 KHz)
1442 15:58:50.525348 PCI: 00:15.1 init finished in 5976 usecs
1443 15:58:50.528613 PCI: 00:16.0 init ...
1444 15:58:50.531820 PCI: 00:16.0 init finished in 2252 usecs
1445 15:58:50.535084 PCI: 00:19.0 init ...
1446 15:58:50.538383 DW I2C bus 4 at 0xd1222000 (400 KHz)
1447 15:58:50.541565 PCI: 00:19.0 init finished in 5979 usecs
1448 15:58:50.544793 PCI: 00:1d.0 init ...
1449 15:58:50.548196 Initializing PCH PCIe bridge.
1450 15:58:50.551421 PCI: 00:1d.0 init finished in 5286 usecs
1451 15:58:50.554638 PCI: 00:1f.0 init ...
1452 15:58:50.558045 IOAPIC: Initializing IOAPIC at 0xfec00000
1453 15:58:50.565126 IOAPIC: Bootstrap Processor Local APIC = 0x00
1454 15:58:50.565203 IOAPIC: ID = 0x02
1455 15:58:50.567974 IOAPIC: Dumping registers
1456 15:58:50.571439 reg 0x0000: 0x02000000
1457 15:58:50.574844 reg 0x0001: 0x00770020
1458 15:58:50.577625 reg 0x0002: 0x00000000
1459 15:58:50.581089 PCI: 00:1f.0 init finished in 23543 usecs
1460 15:58:50.584596 PCI: 00:1f.4 init ...
1461 15:58:50.587368 PCI: 00:1f.4 init finished in 2262 usecs
1462 15:58:50.599096 PCI: 01:00.0 init ...
1463 15:58:50.602587 PCI: 01:00.0 init finished in 2254 usecs
1464 15:58:50.606722 PNP: 0c09.0 init ...
1465 15:58:50.610021 Google Chrome EC uptime: 8.160 seconds
1466 15:58:50.616331 Google Chrome AP resets since EC boot: 0
1467 15:58:50.619434 Google Chrome most recent AP reset causes:
1468 15:58:50.626033 Google Chrome EC reset flags at last EC boot: reset-pin | hard | ap-off
1469 15:58:50.629489 PNP: 0c09.0 init finished in 22055 usecs
1470 15:58:50.632889 Devices initialized
1471 15:58:50.636212 Show all devs... After init.
1472 15:58:50.639678 Root Device: enabled 1
1473 15:58:50.642853 CPU_CLUSTER: 0: enabled 1
1474 15:58:50.642931 DOMAIN: 0000: enabled 1
1475 15:58:50.646267 APIC: 00: enabled 1
1476 15:58:50.649645 PCI: 00:00.0: enabled 1
1477 15:58:50.649727 PCI: 00:02.0: enabled 1
1478 15:58:50.652816 PCI: 00:04.0: enabled 0
1479 15:58:50.656111 PCI: 00:05.0: enabled 0
1480 15:58:50.659560 PCI: 00:12.0: enabled 1
1481 15:58:50.659630 PCI: 00:12.5: enabled 0
1482 15:58:50.662681 PCI: 00:12.6: enabled 0
1483 15:58:50.665790 PCI: 00:14.0: enabled 1
1484 15:58:50.669042 PCI: 00:14.1: enabled 0
1485 15:58:50.669152 PCI: 00:14.3: enabled 1
1486 15:58:50.672476 PCI: 00:14.5: enabled 0
1487 15:58:50.675909 PCI: 00:15.0: enabled 1
1488 15:58:50.678816 PCI: 00:15.1: enabled 1
1489 15:58:50.678891 PCI: 00:15.2: enabled 0
1490 15:58:50.682339 PCI: 00:15.3: enabled 0
1491 15:58:50.685162 PCI: 00:16.0: enabled 1
1492 15:58:50.688567 PCI: 00:16.1: enabled 0
1493 15:58:50.688638 PCI: 00:16.2: enabled 0
1494 15:58:50.691997 PCI: 00:16.3: enabled 0
1495 15:58:50.695529 PCI: 00:16.4: enabled 0
1496 15:58:50.695613 PCI: 00:16.5: enabled 0
1497 15:58:50.698403 PCI: 00:17.0: enabled 1
1498 15:58:50.701914 PCI: 00:19.0: enabled 1
1499 15:58:50.705248 PCI: 00:19.1: enabled 0
1500 15:58:50.705320 PCI: 00:19.2: enabled 0
1501 15:58:50.708035 PCI: 00:1a.0: enabled 0
1502 15:58:50.711594 PCI: 00:1c.0: enabled 0
1503 15:58:50.715102 PCI: 00:1c.1: enabled 0
1504 15:58:50.715176 PCI: 00:1c.2: enabled 0
1505 15:58:50.717888 PCI: 00:1c.3: enabled 0
1506 15:58:50.721355 PCI: 00:1c.4: enabled 0
1507 15:58:50.724613 PCI: 00:1c.5: enabled 0
1508 15:58:50.724707 PCI: 00:1c.6: enabled 0
1509 15:58:50.727888 PCI: 00:1c.7: enabled 0
1510 15:58:50.730936 PCI: 00:1d.0: enabled 1
1511 15:58:50.734510 PCI: 00:1d.1: enabled 0
1512 15:58:50.734587 PCI: 00:1d.2: enabled 0
1513 15:58:50.737449 PCI: 00:1d.3: enabled 0
1514 15:58:50.740885 PCI: 00:1d.4: enabled 0
1515 15:58:50.744278 PCI: 00:1d.5: enabled 0
1516 15:58:50.744381 PCI: 00:1e.0: enabled 1
1517 15:58:50.747675 PCI: 00:1e.1: enabled 0
1518 15:58:50.750942 PCI: 00:1e.2: enabled 1
1519 15:58:50.754317 PCI: 00:1e.3: enabled 1
1520 15:58:50.754423 PCI: 00:1f.0: enabled 1
1521 15:58:50.757502 PCI: 00:1f.1: enabled 0
1522 15:58:50.760631 PCI: 00:1f.2: enabled 0
1523 15:58:50.764162 PCI: 00:1f.3: enabled 1
1524 15:58:50.764235 PCI: 00:1f.4: enabled 1
1525 15:58:50.766833 PCI: 00:1f.5: enabled 1
1526 15:58:50.770189 PCI: 00:1f.6: enabled 0
1527 15:58:50.773432 USB0 port 0: enabled 1
1528 15:58:50.773538 I2C: 01:15: enabled 1
1529 15:58:50.776666 I2C: 02:5d: enabled 1
1530 15:58:50.779977 GENERIC: 0.0: enabled 1
1531 15:58:50.780077 I2C: 03:1a: enabled 1
1532 15:58:50.783544 I2C: 03:38: enabled 1
1533 15:58:50.786443 I2C: 03:39: enabled 1
1534 15:58:50.786536 I2C: 03:3a: enabled 1
1535 15:58:50.789960 I2C: 03:3b: enabled 1
1536 15:58:50.793386 PCI: 00:00.0: enabled 1
1537 15:58:50.793465 SPI: 00: enabled 1
1538 15:58:50.796202 SPI: 01: enabled 1
1539 15:58:50.799921 PNP: 0c09.0: enabled 1
1540 15:58:50.800003 USB2 port 0: enabled 1
1541 15:58:50.803213 USB2 port 1: enabled 1
1542 15:58:50.805932 USB2 port 2: enabled 0
1543 15:58:50.809574 USB2 port 3: enabled 0
1544 15:58:50.809668 USB2 port 5: enabled 0
1545 15:58:50.813108 USB2 port 6: enabled 1
1546 15:58:50.816000 USB2 port 9: enabled 1
1547 15:58:50.816095 USB3 port 0: enabled 1
1548 15:58:50.819472 USB3 port 1: enabled 1
1549 15:58:50.822323 USB3 port 2: enabled 1
1550 15:58:50.825925 USB3 port 3: enabled 1
1551 15:58:50.826007 USB3 port 4: enabled 0
1552 15:58:50.829367 APIC: 02: enabled 1
1553 15:58:50.832706 APIC: 01: enabled 1
1554 15:58:50.832807 APIC: 03: enabled 1
1555 15:58:50.835566 APIC: 05: enabled 1
1556 15:58:50.835671 APIC: 04: enabled 1
1557 15:58:50.838893 APIC: 07: enabled 1
1558 15:58:50.842205 APIC: 06: enabled 1
1559 15:58:50.842284 PCI: 00:08.0: enabled 1
1560 15:58:50.845344 PCI: 00:14.2: enabled 1
1561 15:58:50.848395 PCI: 01:00.0: enabled 1
1562 15:58:50.851571 Disabling ACPI via APMC:
1563 15:58:50.855519 done.
1564 15:58:50.858903 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1565 15:58:50.862022 ELOG: NV offset 0xaf0000 size 0x4000
1566 15:58:50.869596 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1567 15:58:50.876384 ELOG: Event(17) added with size 13 at 2024-06-14 15:58:50 UTC
1568 15:58:50.882669 ELOG: Event(92) added with size 9 at 2024-06-14 15:58:50 UTC
1569 15:58:50.889334 ELOG: Event(93) added with size 9 at 2024-06-14 15:58:50 UTC
1570 15:58:50.895493 ELOG: Event(9E) added with size 10 at 2024-06-14 15:58:50 UTC
1571 15:58:50.902478 ELOG: Event(9F) added with size 14 at 2024-06-14 15:58:50 UTC
1572 15:58:50.908810 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1573 15:58:50.915310 ELOG: Event(A1) added with size 10 at 2024-06-14 15:58:50 UTC
1574 15:58:50.922265 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
1575 15:58:50.928252 ELOG: Event(A0) added with size 9 at 2024-06-14 15:58:50 UTC
1576 15:58:50.931833 elog_add_boot_reason: Logged dev mode boot
1577 15:58:50.935275 Finalize devices...
1578 15:58:50.938038 PCI: 00:17.0 final
1579 15:58:50.938125 Devices finalized
1580 15:58:50.945028 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1581 15:58:50.947822 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1582 15:58:50.954455 ME: HFSTS1 : 0x90000245
1583 15:58:50.957807 ME: HFSTS2 : 0x30850126
1584 15:58:50.961101 ME: HFSTS3 : 0x00000020
1585 15:58:50.964289 ME: HFSTS4 : 0x00004800
1586 15:58:50.970925 ME: HFSTS5 : 0x00000000
1587 15:58:50.974203 ME: HFSTS6 : 0x40400006
1588 15:58:50.977409 ME: Manufacturing Mode : NO
1589 15:58:50.980616 ME: FW Partition Table : OK
1590 15:58:50.983866 ME: Bringup Loader Failure : NO
1591 15:58:50.987417 ME: Firmware Init Complete : YES
1592 15:58:50.990236 ME: Boot Options Present : NO
1593 15:58:50.993619 ME: Update In Progress : NO
1594 15:58:50.996800 ME: D0i3 Support : YES
1595 15:58:51.000168 ME: Low Power State Enabled : NO
1596 15:58:51.003654 ME: CPU Replaced : NO
1597 15:58:51.006508 ME: CPU Replacement Valid : YES
1598 15:58:51.009968 ME: Current Working State : 5
1599 15:58:51.013576 ME: Current Operation State : 1
1600 15:58:51.016469 ME: Current Operation Mode : 0
1601 15:58:51.019961 ME: Error Code : 0
1602 15:58:51.022876 ME: CPU Debug Disabled : YES
1603 15:58:51.026474 ME: TXT Support : NO
1604 15:58:51.032916 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1605 15:58:51.039194 ELOG: Event(91) added with size 10 at 2024-06-14 15:58:51 UTC
1606 15:58:51.045877 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1607 15:58:51.045984 CBFS @ c08000 size 3f8000
1608 15:58:51.052268 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1609 15:58:51.055734 CBFS: Locating 'fallback/dsdt.aml'
1610 15:58:51.059174 CBFS: Found @ offset 10bb80 size 3fa5
1611 15:58:51.065294 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1612 15:58:51.068579 CBFS @ c08000 size 3f8000
1613 15:58:51.075280 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1614 15:58:51.078384 CBFS: Locating 'fallback/slic'
1615 15:58:51.081814 CBFS: 'fallback/slic' not found.
1616 15:58:51.085159 ACPI: Writing ACPI tables at 99b3e000.
1617 15:58:51.088502 ACPI: * FACS
1618 15:58:51.088580 ACPI: * DSDT
1619 15:58:51.094942 Ramoops buffer: 0x100000@0x99a3d000.
1620 15:58:51.098267 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1621 15:58:51.101115 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1622 15:58:51.105013 Google Chrome EC: version:
1623 15:58:51.108298 ro: helios_v2.0.2659-56403530b
1624 15:58:51.111750 rw: helios_v2.0.2849-c41de27e7d
1625 15:58:51.114536 running image: 1
1626 15:58:51.118015 ACPI: * FADT
1627 15:58:51.118094 SCI is IRQ9
1628 15:58:51.124271 ACPI: added table 1/32, length now 40
1629 15:58:51.124349 ACPI: * SSDT
1630 15:58:51.127848 Found 1 CPU(s) with 8 core(s) each.
1631 15:58:51.134174 Error: Could not locate 'wifi_sar' in VPD.
1632 15:58:51.137767 Checking CBFS for default SAR values
1633 15:58:51.140620 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1634 15:58:51.144217 CBFS @ c08000 size 3f8000
1635 15:58:51.150884 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1636 15:58:51.153772 CBFS: Locating 'wifi_sar_defaults.hex'
1637 15:58:51.157390 CBFS: Found @ offset 5fac0 size 77
1638 15:58:51.160575 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1639 15:58:51.167122 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1640 15:58:51.170510 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1641 15:58:51.176402 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1642 15:58:51.179917 failed to find key in VPD: dsm_calib_r0_0
1643 15:58:51.189663 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1644 15:58:51.196540 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1645 15:58:51.199853 failed to find key in VPD: dsm_calib_r0_1
1646 15:58:51.206404 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1647 15:58:51.212989 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1648 15:58:51.215600 failed to find key in VPD: dsm_calib_r0_2
1649 15:58:51.225819 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1650 15:58:51.232023 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1651 15:58:51.236192 failed to find key in VPD: dsm_calib_r0_3
1652 15:58:51.245353 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1653 15:58:51.248290 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1654 15:58:51.255092 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1655 15:58:51.258616 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1656 15:58:51.262170 EC returned error result code 1
1657 15:58:51.264870 EC returned error result code 1
1658 15:58:51.271623 EC returned error result code 1
1659 15:58:51.275156 PS2K: Bad resp from EC. Vivaldi disabled!
1660 15:58:51.281326 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1661 15:58:51.284786 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1662 15:58:51.291004 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1663 15:58:51.294371 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1664 15:58:51.301053 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1665 15:58:51.307661 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1666 15:58:51.314293 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1667 15:58:51.320782 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1668 15:58:51.324248 ACPI: added table 2/32, length now 44
1669 15:58:51.324353 ACPI: * MCFG
1670 15:58:51.327467 ACPI: added table 3/32, length now 48
1671 15:58:51.330680 ACPI: * TPM2
1672 15:58:51.333742 TPM2 log created at 99a2d000
1673 15:58:51.337193 ACPI: added table 4/32, length now 52
1674 15:58:51.337273 ACPI: * MADT
1675 15:58:51.340081 SCI is IRQ9
1676 15:58:51.343537 ACPI: added table 5/32, length now 56
1677 15:58:51.347157 current = 99b43ac0
1678 15:58:51.347235 ACPI: * DMAR
1679 15:58:51.349924 ACPI: added table 6/32, length now 60
1680 15:58:51.353380 ACPI: * IGD OpRegion
1681 15:58:51.356894 GMA: Found VBT in CBFS
1682 15:58:51.360306 GMA: Found valid VBT in CBFS
1683 15:58:51.362969 ACPI: added table 7/32, length now 64
1684 15:58:51.363037 ACPI: * HPET
1685 15:58:51.366421 ACPI: added table 8/32, length now 68
1686 15:58:51.369874 ACPI: done.
1687 15:58:51.373313 ACPI tables: 31744 bytes.
1688 15:58:51.376543 smbios_write_tables: 99a2c000
1689 15:58:51.379338 EC returned error result code 3
1690 15:58:51.382586 Couldn't obtain OEM name from CBI
1691 15:58:51.385959 Create SMBIOS type 17
1692 15:58:51.389469 PCI: 00:00.0 (Intel Cannonlake)
1693 15:58:51.389542 PCI: 00:14.3 (Intel WiFi)
1694 15:58:51.392319 SMBIOS tables: 939 bytes.
1695 15:58:51.399160 Writing table forward entry at 0x00000500
1696 15:58:51.402478 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1697 15:58:51.408691 Writing coreboot table at 0x99b62000
1698 15:58:51.412035 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1699 15:58:51.418644 1. 0000000000001000-000000000009ffff: RAM
1700 15:58:51.422071 2. 00000000000a0000-00000000000fffff: RESERVED
1701 15:58:51.425469 3. 0000000000100000-0000000099a2bfff: RAM
1702 15:58:51.431887 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1703 15:58:51.438087 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1704 15:58:51.444674 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1705 15:58:51.448100 7. 000000009a000000-000000009f7fffff: RESERVED
1706 15:58:51.451541 8. 00000000e0000000-00000000efffffff: RESERVED
1707 15:58:51.457812 9. 00000000fc000000-00000000fc000fff: RESERVED
1708 15:58:51.461442 10. 00000000fe000000-00000000fe00ffff: RESERVED
1709 15:58:51.467471 11. 00000000fed10000-00000000fed17fff: RESERVED
1710 15:58:51.470884 12. 00000000fed80000-00000000fed83fff: RESERVED
1711 15:58:51.477571 13. 00000000fed90000-00000000fed91fff: RESERVED
1712 15:58:51.480922 14. 00000000feda0000-00000000feda1fff: RESERVED
1713 15:58:51.484360 15. 0000000100000000-000000045e7fffff: RAM
1714 15:58:51.490466 Graphics framebuffer located at 0xc0000000
1715 15:58:51.493985 Passing 5 GPIOs to payload:
1716 15:58:51.496793 NAME | PORT | POLARITY | VALUE
1717 15:58:51.503529 write protect | undefined | high | low
1718 15:58:51.506953 lid | undefined | high | high
1719 15:58:51.513280 power | undefined | high | low
1720 15:58:51.520192 oprom | undefined | high | low
1721 15:58:51.523448 EC in RW | 0x000000cb | high | low
1722 15:58:51.526624 Board ID: 4
1723 15:58:51.529973 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1724 15:58:51.532724 CBFS @ c08000 size 3f8000
1725 15:58:51.539600 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1726 15:58:51.546049 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum f826
1727 15:58:51.549470 coreboot table: 1492 bytes.
1728 15:58:51.552727 IMD ROOT 0. 99fff000 00001000
1729 15:58:51.556054 IMD SMALL 1. 99ffe000 00001000
1730 15:58:51.559549 FSP MEMORY 2. 99c4e000 003b0000
1731 15:58:51.562408 CONSOLE 3. 99c2e000 00020000
1732 15:58:51.565877 FMAP 4. 99c2d000 0000054e
1733 15:58:51.569453 TIME STAMP 5. 99c2c000 00000910
1734 15:58:51.572237 VBOOT WORK 6. 99c18000 00014000
1735 15:58:51.575588 MRC DATA 7. 99c16000 00001958
1736 15:58:51.579017 ROMSTG STCK 8. 99c15000 00001000
1737 15:58:51.582448 AFTER CAR 9. 99c0b000 0000a000
1738 15:58:51.585297 RAMSTAGE 10. 99baf000 0005c000
1739 15:58:51.588672 REFCODE 11. 99b7a000 00035000
1740 15:58:51.592054 SMM BACKUP 12. 99b6a000 00010000
1741 15:58:51.595417 COREBOOT 13. 99b62000 00008000
1742 15:58:51.598198 ACPI 14. 99b3e000 00024000
1743 15:58:51.601709 ACPI GNVS 15. 99b3d000 00001000
1744 15:58:51.605239 RAMOOPS 16. 99a3d000 00100000
1745 15:58:51.608470 TPM2 TCGLOG17. 99a2d000 00010000
1746 15:58:51.611287 SMBIOS 18. 99a2c000 00000800
1747 15:58:51.611390 IMD small region:
1748 15:58:51.618387 IMD ROOT 0. 99ffec00 00000400
1749 15:58:51.621091 FSP RUNTIME 1. 99ffebe0 00000004
1750 15:58:51.624653 EC HOSTEVENT 2. 99ffebc0 00000008
1751 15:58:51.628153 POWER STATE 3. 99ffeb80 00000040
1752 15:58:51.630839 ROMSTAGE 4. 99ffeb60 00000004
1753 15:58:51.634113 MEM INFO 5. 99ffe9a0 000001b9
1754 15:58:51.637404 VPD 6. 99ffe960 00000027
1755 15:58:51.640866 MTRR: Physical address space:
1756 15:58:51.647862 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1757 15:58:51.654405 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1758 15:58:51.660859 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1759 15:58:51.666906 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1760 15:58:51.670429 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1761 15:58:51.676693 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1762 15:58:51.683510 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1763 15:58:51.690003 MTRR: Fixed MSR 0x250 0x0606060606060606
1764 15:58:51.693413 MTRR: Fixed MSR 0x258 0x0606060606060606
1765 15:58:51.696818 MTRR: Fixed MSR 0x259 0x0000000000000000
1766 15:58:51.699598 MTRR: Fixed MSR 0x268 0x0606060606060606
1767 15:58:51.706656 MTRR: Fixed MSR 0x269 0x0606060606060606
1768 15:58:51.709553 MTRR: Fixed MSR 0x26a 0x0606060606060606
1769 15:58:51.713053 MTRR: Fixed MSR 0x26b 0x0606060606060606
1770 15:58:51.715831 MTRR: Fixed MSR 0x26c 0x0606060606060606
1771 15:58:51.722724 MTRR: Fixed MSR 0x26d 0x0606060606060606
1772 15:58:51.726111 MTRR: Fixed MSR 0x26e 0x0606060606060606
1773 15:58:51.729450 MTRR: Fixed MSR 0x26f 0x0606060606060606
1774 15:58:51.732221 call enable_fixed_mtrr()
1775 15:58:51.735799 CPU physical address size: 39 bits
1776 15:58:51.741938 MTRR: default type WB/UC MTRR counts: 6/8.
1777 15:58:51.745334 MTRR: WB selected as default type.
1778 15:58:51.752133 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1779 15:58:51.755609 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1780 15:58:51.761750 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1781 15:58:51.768595 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1782 15:58:51.774838 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1783 15:58:51.781186 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1784 15:58:51.788047 MTRR: Fixed MSR 0x250 0x0606060606060606
1785 15:58:51.791136 MTRR: Fixed MSR 0x258 0x0606060606060606
1786 15:58:51.794421 MTRR: Fixed MSR 0x259 0x0000000000000000
1787 15:58:51.797519 MTRR: Fixed MSR 0x268 0x0606060606060606
1788 15:58:51.804267 MTRR: Fixed MSR 0x269 0x0606060606060606
1789 15:58:51.807086 MTRR: Fixed MSR 0x26a 0x0606060606060606
1790 15:58:51.810644 MTRR: Fixed MSR 0x26b 0x0606060606060606
1791 15:58:51.814054 MTRR: Fixed MSR 0x26c 0x0606060606060606
1792 15:58:51.820329 MTRR: Fixed MSR 0x26d 0x0606060606060606
1793 15:58:51.823799 MTRR: Fixed MSR 0x26e 0x0606060606060606
1794 15:58:51.827192 MTRR: Fixed MSR 0x26f 0x0606060606060606
1795 15:58:51.827271
1796 15:58:51.830589 MTRR check
1797 15:58:51.830666 Fixed MTRRs : Enabled
1798 15:58:51.833340 Variable MTRRs: Enabled
1799 15:58:51.833421
1800 15:58:51.836963 call enable_fixed_mtrr()
1801 15:58:51.843338 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1802 15:58:51.846733 CPU physical address size: 39 bits
1803 15:58:51.849982 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1804 15:58:51.856700 MTRR: Fixed MSR 0x250 0x0606060606060606
1805 15:58:51.860042 MTRR: Fixed MSR 0x250 0x0606060606060606
1806 15:58:51.862874 MTRR: Fixed MSR 0x258 0x0606060606060606
1807 15:58:51.866316 MTRR: Fixed MSR 0x259 0x0000000000000000
1808 15:58:51.872714 MTRR: Fixed MSR 0x268 0x0606060606060606
1809 15:58:51.876103 MTRR: Fixed MSR 0x269 0x0606060606060606
1810 15:58:51.879491 MTRR: Fixed MSR 0x26a 0x0606060606060606
1811 15:58:51.882607 MTRR: Fixed MSR 0x26b 0x0606060606060606
1812 15:58:51.889361 MTRR: Fixed MSR 0x26c 0x0606060606060606
1813 15:58:51.892231 MTRR: Fixed MSR 0x26d 0x0606060606060606
1814 15:58:51.895615 MTRR: Fixed MSR 0x26e 0x0606060606060606
1815 15:58:51.899189 MTRR: Fixed MSR 0x26f 0x0606060606060606
1816 15:58:51.905840 MTRR: Fixed MSR 0x258 0x0606060606060606
1817 15:58:51.905914 call enable_fixed_mtrr()
1818 15:58:51.912509 MTRR: Fixed MSR 0x259 0x0000000000000000
1819 15:58:51.915718 MTRR: Fixed MSR 0x268 0x0606060606060606
1820 15:58:51.919083 MTRR: Fixed MSR 0x269 0x0606060606060606
1821 15:58:51.922442 MTRR: Fixed MSR 0x26a 0x0606060606060606
1822 15:58:51.928755 MTRR: Fixed MSR 0x26b 0x0606060606060606
1823 15:58:51.932188 MTRR: Fixed MSR 0x26c 0x0606060606060606
1824 15:58:51.935531 MTRR: Fixed MSR 0x26d 0x0606060606060606
1825 15:58:51.938299 MTRR: Fixed MSR 0x26e 0x0606060606060606
1826 15:58:51.945314 MTRR: Fixed MSR 0x26f 0x0606060606060606
1827 15:58:51.948083 CPU physical address size: 39 bits
1828 15:58:51.951562 call enable_fixed_mtrr()
1829 15:58:51.954944 MTRR: Fixed MSR 0x250 0x0606060606060606
1830 15:58:51.958229 MTRR: Fixed MSR 0x250 0x0606060606060606
1831 15:58:51.961510 MTRR: Fixed MSR 0x258 0x0606060606060606
1832 15:58:51.967634 MTRR: Fixed MSR 0x259 0x0000000000000000
1833 15:58:51.971070 MTRR: Fixed MSR 0x268 0x0606060606060606
1834 15:58:51.974511 MTRR: Fixed MSR 0x269 0x0606060606060606
1835 15:58:51.977874 MTRR: Fixed MSR 0x26a 0x0606060606060606
1836 15:58:51.984077 MTRR: Fixed MSR 0x26b 0x0606060606060606
1837 15:58:51.987432 MTRR: Fixed MSR 0x26c 0x0606060606060606
1838 15:58:51.990754 MTRR: Fixed MSR 0x26d 0x0606060606060606
1839 15:58:51.993786 MTRR: Fixed MSR 0x26e 0x0606060606060606
1840 15:58:52.000288 MTRR: Fixed MSR 0x26f 0x0606060606060606
1841 15:58:52.003893 MTRR: Fixed MSR 0x258 0x0606060606060606
1842 15:58:52.007420 call enable_fixed_mtrr()
1843 15:58:52.010258 MTRR: Fixed MSR 0x259 0x0000000000000000
1844 15:58:52.013552 MTRR: Fixed MSR 0x268 0x0606060606060606
1845 15:58:52.020145 MTRR: Fixed MSR 0x269 0x0606060606060606
1846 15:58:52.023306 MTRR: Fixed MSR 0x26a 0x0606060606060606
1847 15:58:52.027019 MTRR: Fixed MSR 0x26b 0x0606060606060606
1848 15:58:52.030360 MTRR: Fixed MSR 0x26c 0x0606060606060606
1849 15:58:52.036372 MTRR: Fixed MSR 0x26d 0x0606060606060606
1850 15:58:52.039778 MTRR: Fixed MSR 0x26e 0x0606060606060606
1851 15:58:52.043328 MTRR: Fixed MSR 0x26f 0x0606060606060606
1852 15:58:52.046177 CPU physical address size: 39 bits
1853 15:58:52.049629 call enable_fixed_mtrr()
1854 15:58:52.053213 MTRR: Fixed MSR 0x250 0x0606060606060606
1855 15:58:52.059340 MTRR: Fixed MSR 0x250 0x0606060606060606
1856 15:58:52.062648 MTRR: Fixed MSR 0x258 0x0606060606060606
1857 15:58:52.066184 MTRR: Fixed MSR 0x259 0x0000000000000000
1858 15:58:52.069479 MTRR: Fixed MSR 0x268 0x0606060606060606
1859 15:58:52.075666 MTRR: Fixed MSR 0x269 0x0606060606060606
1860 15:58:52.079001 MTRR: Fixed MSR 0x26a 0x0606060606060606
1861 15:58:52.081867 MTRR: Fixed MSR 0x26b 0x0606060606060606
1862 15:58:52.085370 MTRR: Fixed MSR 0x26c 0x0606060606060606
1863 15:58:52.092325 MTRR: Fixed MSR 0x26d 0x0606060606060606
1864 15:58:52.094987 MTRR: Fixed MSR 0x26e 0x0606060606060606
1865 15:58:52.098343 MTRR: Fixed MSR 0x26f 0x0606060606060606
1866 15:58:52.105126 MTRR: Fixed MSR 0x258 0x0606060606060606
1867 15:58:52.108322 MTRR: Fixed MSR 0x259 0x0000000000000000
1868 15:58:52.111803 MTRR: Fixed MSR 0x268 0x0606060606060606
1869 15:58:52.114628 MTRR: Fixed MSR 0x269 0x0606060606060606
1870 15:58:52.121572 MTRR: Fixed MSR 0x26a 0x0606060606060606
1871 15:58:52.125035 MTRR: Fixed MSR 0x26b 0x0606060606060606
1872 15:58:52.127794 MTRR: Fixed MSR 0x26c 0x0606060606060606
1873 15:58:52.131128 MTRR: Fixed MSR 0x26d 0x0606060606060606
1874 15:58:52.137748 MTRR: Fixed MSR 0x26e 0x0606060606060606
1875 15:58:52.141062 MTRR: Fixed MSR 0x26f 0x0606060606060606
1876 15:58:52.144222 call enable_fixed_mtrr()
1877 15:58:52.144351 call enable_fixed_mtrr()
1878 15:58:52.151072 CPU physical address size: 39 bits
1879 15:58:52.151158 CBFS @ c08000 size 3f8000
1880 15:58:52.157339 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1881 15:58:52.160174 CPU physical address size: 39 bits
1882 15:58:52.163613 CBFS: Locating 'fallback/payload'
1883 15:58:52.167093 CPU physical address size: 39 bits
1884 15:58:52.170582 CPU physical address size: 39 bits
1885 15:58:52.176627 CBFS: Found @ offset 1c96c0 size 3f798
1886 15:58:52.180076 Checking segment from ROM address 0xffdd16f8
1887 15:58:52.183555 Checking segment from ROM address 0xffdd1714
1888 15:58:52.189618 Loading segment from ROM address 0xffdd16f8
1889 15:58:52.189693 code (compression=0)
1890 15:58:52.199452 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1891 15:58:52.209190 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1892 15:58:52.209301 it's not compressed!
1893 15:58:52.302991 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1894 15:58:52.309255 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1895 15:58:52.315614 Loading segment from ROM address 0xffdd1714
1896 15:58:52.315719 Entry Point 0x30000000
1897 15:58:52.319282 Loaded segments
1898 15:58:52.324735 Finalizing chipset.
1899 15:58:52.327937 Finalizing SMM.
1900 15:58:52.331726 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1901 15:58:52.334736 mp_park_aps done after 0 msecs.
1902 15:58:52.341073 Jumping to boot code at 30000000(99b62000)
1903 15:58:52.348030 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1904 15:58:52.348134
1905 15:58:52.348221
1906 15:58:52.348304
1907 15:58:52.351484 Starting depthcharge on Helios...
1908 15:58:52.351575
1909 15:58:52.351924 end: 2.2.3 depthcharge-start (duration 00:00:02) [common]
1910 15:58:52.352044 start: 2.2.4 bootloader-commands (timeout 00:04:49) [common]
1911 15:58:52.352145 Setting prompt string to ['hatch:']
1912 15:58:52.352247 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:49)
1913 15:58:52.360831 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1914 15:58:52.360968
1915 15:58:52.367822 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1916 15:58:52.367930
1917 15:58:52.374313 board_setup: Info: eMMC controller not present; skipping
1918 15:58:52.374422
1919 15:58:52.377616 New NVMe Controller 0x30053ac0 @ 00:1d:00
1920 15:58:52.377731
1921 15:58:52.383718 board_setup: Info: SDHCI controller not present; skipping
1922 15:58:52.383822
1923 15:58:52.390561 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1924 15:58:52.390641
1925 15:58:52.390702 Wipe memory regions:
1926 15:58:52.390758
1927 15:58:52.396670 [0x00000000001000, 0x000000000a0000)
1928 15:58:52.396755
1929 15:58:52.399861 [0x00000000100000, 0x00000030000000)
1930 15:58:52.462990
1931 15:58:52.466184 [0x00000030657430, 0x00000099a2c000)
1932 15:58:52.603534
1933 15:58:52.606360 [0x00000100000000, 0x0000045e800000)
1934 15:58:53.989157
1935 15:58:53.989294 R8152: Initializing
1936 15:58:53.989369
1937 15:58:53.992521 Version 9 (ocp_data = 6010)
1938 15:58:53.996824
1939 15:58:53.996901 R8152: Done initializing
1940 15:58:53.996962
1941 15:58:54.000172 Adding net device
1942 15:58:54.632644
1943 15:58:54.632768 R8152: Initializing
1944 15:58:54.632832
1945 15:58:54.635995 Version 6 (ocp_data = 5c30)
1946 15:58:54.636100
1947 15:58:54.639545 R8152: Done initializing
1948 15:58:54.639638
1949 15:58:54.645755 net_add_device: Attemp to include the same device
1950 15:58:54.645854
1951 15:58:54.652820 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
1952 15:58:54.652897
1953 15:58:54.652984
1954 15:58:54.653278 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1956 15:58:54.753602 hatch: tftpboot 192.168.201.1 14343428/tftp-deploy-g9n_rt4g/kernel/bzImage 14343428/tftp-deploy-g9n_rt4g/kernel/cmdline 14343428/tftp-deploy-g9n_rt4g/ramdisk/ramdisk.cpio.gz
1957 15:58:54.753827 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1958 15:58:54.753931 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:47)
1959 15:58:54.757927 tftpboot 192.168.201.1 14343428/tftp-deploy-g9n_rt4g/kernel/bzIploy-g9n_rt4g/kernel/cmdline 14343428/tftp-deploy-g9n_rt4g/ramdisk/ramdisk.cpio.gz
1960 15:58:54.758033
1961 15:58:54.758121 Waiting for link
1962 15:58:54.958440
1963 15:58:54.958580 done.
1964 15:58:54.958669
1965 15:58:54.958754 MAC: 00:24:32:30:7f:7f
1966 15:58:54.958838
1967 15:58:54.961889 Sending DHCP discover... done.
1968 15:58:54.961991
1969 15:58:54.965288 Waiting for reply... done.
1970 15:58:54.965372
1971 15:58:54.969224 Sending DHCP request... done.
1972 15:58:54.969323
1973 15:58:54.971752 Waiting for reply... done.
1974 15:58:54.975122
1975 15:58:54.975200 My ip is 192.168.201.15
1976 15:58:54.975260
1977 15:58:54.978694 The DHCP server ip is 192.168.201.1
1978 15:58:54.978776
1979 15:58:54.984894 TFTP server IP predefined by user: 192.168.201.1
1980 15:58:54.984973
1981 15:58:54.991347 Bootfile predefined by user: 14343428/tftp-deploy-g9n_rt4g/kernel/bzImage
1982 15:58:54.991425
1983 15:58:54.994657 Sending tftp read request... done.
1984 15:58:54.994735
1985 15:58:54.998049 Waiting for the transfer...
1986 15:58:54.998128
1987 15:58:55.511831 00000000 ################################################################
1988 15:58:55.511947
1989 15:58:56.034691 00080000 ################################################################
1990 15:58:56.034807
1991 15:58:56.556464 00100000 ################################################################
1992 15:58:56.556577
1993 15:58:57.066473 00180000 ################################################################
1994 15:58:57.066581
1995 15:58:57.579850 00200000 ################################################################
1996 15:58:57.579965
1997 15:58:58.099000 00280000 ################################################################
1998 15:58:58.099111
1999 15:58:58.634072 00300000 ################################################################
2000 15:58:58.634189
2001 15:58:59.265770 00380000 ################################################################
2002 15:58:59.265892
2003 15:58:59.818066 00400000 ################################################################
2004 15:58:59.818179
2005 15:59:00.335051 00480000 ################################################################
2006 15:59:00.335192
2007 15:59:00.846144 00500000 ################################################################
2008 15:59:00.846269
2009 15:59:01.362623 00580000 ################################################################
2010 15:59:01.362748
2011 15:59:01.870950 00600000 ################################################################
2012 15:59:01.871066
2013 15:59:02.377730 00680000 ################################################################
2014 15:59:02.377854
2015 15:59:02.883935 00700000 ################################################################
2016 15:59:02.884061
2017 15:59:03.391148 00780000 ################################################################
2018 15:59:03.391263
2019 15:59:03.953230 00800000 ################################################################
2020 15:59:03.953367
2021 15:59:04.483815 00880000 ################################################################
2022 15:59:04.483949
2023 15:59:04.994237 00900000 ################################################################
2024 15:59:04.994382
2025 15:59:05.503243 00980000 ################################################################
2026 15:59:05.503367
2027 15:59:06.018460 00a00000 ################################################################
2028 15:59:06.018579
2029 15:59:06.558385 00a80000 ################################################################
2030 15:59:06.558522
2031 15:59:07.079833 00b00000 ################################################################
2032 15:59:07.079989
2033 15:59:07.597649 00b80000 ################################################################
2034 15:59:07.597792
2035 15:59:08.108462 00c00000 ################################################################
2036 15:59:08.108578
2037 15:59:08.615291 00c80000 ################################################################
2038 15:59:08.615411
2039 15:59:09.124659 00d00000 ################################################################ done.
2040 15:59:09.124778
2041 15:59:09.128129 The bootfile was 14155664 bytes long.
2042 15:59:09.128201
2043 15:59:09.131639 Sending tftp read request... done.
2044 15:59:09.131733
2045 15:59:09.134429 Waiting for the transfer...
2046 15:59:09.134520
2047 15:59:09.653464 00000000 ################################################################
2048 15:59:09.653583
2049 15:59:10.171440 00080000 ################################################################
2050 15:59:10.171560
2051 15:59:10.692816 00100000 ################################################################
2052 15:59:10.692956
2053 15:59:11.203171 00180000 ################################################################
2054 15:59:11.203286
2055 15:59:11.715868 00200000 ################################################################
2056 15:59:11.715986
2057 15:59:12.234633 00280000 ################################################################
2058 15:59:12.234745
2059 15:59:12.750720 00300000 ################################################################
2060 15:59:12.750829
2061 15:59:13.269253 00380000 ################################################################
2062 15:59:13.269401
2063 15:59:13.872582 00400000 ################################################################
2064 15:59:13.873180
2065 15:59:14.508729 00480000 ################################################################
2066 15:59:14.509166
2067 15:59:15.066393 00500000 ################################################################
2068 15:59:15.066504
2069 15:59:15.594311 00580000 ################################################################
2070 15:59:15.594445
2071 15:59:16.125129 00600000 ################################################################
2072 15:59:16.125254
2073 15:59:16.641294 00680000 ################################################################
2074 15:59:16.641430
2075 15:59:17.157816 00700000 ################################################################
2076 15:59:17.157929
2077 15:59:17.680709 00780000 ################################################################
2078 15:59:17.680827
2079 15:59:18.192197 00800000 ################################################################
2080 15:59:18.192335
2081 15:59:18.716780 00880000 ################################################################ done.
2082 15:59:18.716929
2083 15:59:18.719492 Sending tftp read request... done.
2084 15:59:18.719584
2085 15:59:18.722857 Waiting for the transfer...
2086 15:59:18.722958
2087 15:59:18.723045 00000000 # done.
2088 15:59:18.723129
2089 15:59:18.732989 Command line loaded dynamically from TFTP file: 14343428/tftp-deploy-g9n_rt4g/kernel/cmdline
2090 15:59:18.733067
2091 15:59:18.752102 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2092 15:59:18.752212
2093 15:59:18.758805 ec_init(0): CrosEC protocol v3 supported (256, 256)
2094 15:59:18.764331
2095 15:59:18.767209 Shutting down all USB controllers.
2096 15:59:18.767300
2097 15:59:18.767382 Removing current net device
2098 15:59:18.771293
2099 15:59:18.771388 Finalizing coreboot
2100 15:59:18.771471
2101 15:59:18.778100 Exiting depthcharge with code 4 at timestamp: 33810319
2102 15:59:18.778193
2103 15:59:18.778275
2104 15:59:18.778355 Starting kernel ...
2105 15:59:18.778432
2106 15:59:18.778509
2107 15:59:18.779173 end: 2.2.4 bootloader-commands (duration 00:00:26) [common]
2108 15:59:18.779294 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2109 15:59:18.779391 Setting prompt string to ['Linux version [0-9]']
2110 15:59:18.779480 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2111 15:59:18.779569 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2113 16:03:41.779586 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2115 16:03:41.779869 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2117 16:03:41.780094 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2120 16:03:41.780478 end: 2 depthcharge-action (duration 00:05:00) [common]
2122 16:03:41.780785 Cleaning after the job
2123 16:03:41.780875 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14343428/tftp-deploy-g9n_rt4g/ramdisk
2124 16:03:41.781991 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14343428/tftp-deploy-g9n_rt4g/kernel
2125 16:03:41.783441 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14343428/tftp-deploy-g9n_rt4g/modules
2126 16:03:41.783942 start: 4.1 power-off (timeout 00:00:30) [common]
2127 16:03:41.784086 Calling: ['pduclient', '--daemon=localhost', '--hostname=asus-C436FA-Flip-hatch-cbg-2', '--port=1', '--command=off']
2128 16:03:42.557611 >> Command sent successfully.
2129 16:03:42.560857 Returned 0 in 0 seconds
2130 16:03:42.661202 end: 4.1 power-off (duration 00:00:01) [common]
2132 16:03:42.661522 start: 4.2 read-feedback (timeout 00:09:59) [common]
2133 16:03:42.661765 Listened to connection for namespace 'common' for up to 1s
2135 16:03:42.662151 Listened to connection for namespace 'common' for up to 1s
2136 16:03:42.662444 Listened to connection for namespace 'common' for up to 1s
2137 16:03:42.662763 Listened to connection for namespace 'common' for up to 1s
2138 16:03:42.663065 Listened to connection for namespace 'common' for up to 1s
2139 16:03:42.665642 Listened to connection for namespace 'common' for up to 1s
2140 16:03:42.669398 Listened to connection for namespace 'common' for up to 1s
2141 16:03:42.672642 Listened to connection for namespace 'common' for up to 1s
2142 16:03:42.675871 Listened to connection for namespace 'common' for up to 1s
2143 16:03:42.679331 Listened to connection for namespace 'common' for up to 1s
2144 16:03:42.682648 Listened to connection for namespace 'common' for up to 1s
2145 16:03:42.685280 Listened to connection for namespace 'common' for up to 1s
2146 16:03:42.689163 Listened to connection for namespace 'common' for up to 1s
2147 16:03:42.692587 Listened to connection for namespace 'common' for up to 1s
2148 16:03:42.695750 Listened to connection for namespace 'common' for up to 1s
2149 16:03:42.698833 Listened to connection for namespace 'common' for up to 1s
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2221 16:03:42.935265 Listened to connection for namespace 'common' for up to 1s
2222 16:03:42.938359 Listened to connection for namespace 'common' for up to 1s
2223 16:03:42.941934 Listened to connection for namespace 'common' for up to 1s
2224 16:03:42.944786 Listened to connection for namespace 'common' for up to 1s
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2227 16:03:42.954863 Listened to connection for namespace 'common' for up to 1s
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2230 16:03:42.964924 Listened to connection for namespace 'common' for up to 1s
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2232 16:03:42.971555 Listened to connection for namespace 'common' for up to 1s
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2237 16:03:42.989350 Listened to connection for namespace 'common' for up to 1s
2238 16:03:43.662371 Finalising connection for namespace 'common'
2239 16:03:43.662553 Disconnecting from shell: Finalise
2240 16:03:43.662650