Boot log: acer-cp514-2h-1130g7-volteer
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 15:58:40.444525 lava-dispatcher, installed at version: 2024.03
2 15:58:40.444738 start: 0 validate
3 15:58:40.444876 Start time: 2024-06-14 15:58:40.444868+00:00 (UTC)
4 15:58:40.445001 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:58:40.445130 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-ltp%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
6 15:58:40.710784 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:58:40.711033 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt-rebase%2Fv4.4-st5-395-gaed3deab96ccf%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:58:40.712219 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:58:40.712334 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-ltp%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:58:40.976207 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:58:40.976363 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt-rebase%2Fv4.4-st5-395-gaed3deab96ccf%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 15:58:40.978651 validate duration: 0.53
14 15:58:40.978898 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:58:40.979011 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:58:40.979152 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:58:40.979304 Not decompressing ramdisk as can be used compressed.
18 15:58:40.979427 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-ltp/20240313.0/amd64/initrd.cpio.gz
19 15:58:40.979490 saving as /var/lib/lava/dispatcher/tmp/14343430/tftp-deploy-e82njvn_/ramdisk/initrd.cpio.gz
20 15:58:40.979553 total size: 6464291 (6 MB)
21 15:58:40.980586 progress 0 % (0 MB)
22 15:58:40.982406 progress 5 % (0 MB)
23 15:58:40.984177 progress 10 % (0 MB)
24 15:58:40.985971 progress 15 % (0 MB)
25 15:58:40.987707 progress 20 % (1 MB)
26 15:58:40.989408 progress 25 % (1 MB)
27 15:58:40.991141 progress 30 % (1 MB)
28 15:58:40.992841 progress 35 % (2 MB)
29 15:58:40.994411 progress 40 % (2 MB)
30 15:58:40.996117 progress 45 % (2 MB)
31 15:58:40.997780 progress 50 % (3 MB)
32 15:58:40.999482 progress 55 % (3 MB)
33 15:58:41.001257 progress 60 % (3 MB)
34 15:58:41.003064 progress 65 % (4 MB)
35 15:58:41.004811 progress 70 % (4 MB)
36 15:58:41.006420 progress 75 % (4 MB)
37 15:58:41.008096 progress 80 % (4 MB)
38 15:58:41.009767 progress 85 % (5 MB)
39 15:58:41.011437 progress 90 % (5 MB)
40 15:58:41.013144 progress 95 % (5 MB)
41 15:58:41.014859 progress 100 % (6 MB)
42 15:58:41.014999 6 MB downloaded in 0.04 s (173.92 MB/s)
43 15:58:41.015159 end: 1.1.1 http-download (duration 00:00:00) [common]
45 15:58:41.015395 end: 1.1 download-retry (duration 00:00:00) [common]
46 15:58:41.015478 start: 1.2 download-retry (timeout 00:10:00) [common]
47 15:58:41.015558 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 15:58:41.015693 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt-rebase/v4.4-st5-395-gaed3deab96ccf/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 15:58:41.015760 saving as /var/lib/lava/dispatcher/tmp/14343430/tftp-deploy-e82njvn_/kernel/bzImage
50 15:58:41.015819 total size: 14155664 (13 MB)
51 15:58:41.015878 No compression specified
52 15:58:41.016955 progress 0 % (0 MB)
53 15:58:41.020628 progress 5 % (0 MB)
54 15:58:41.024478 progress 10 % (1 MB)
55 15:58:41.028395 progress 15 % (2 MB)
56 15:58:41.032353 progress 20 % (2 MB)
57 15:58:41.036148 progress 25 % (3 MB)
58 15:58:41.040088 progress 30 % (4 MB)
59 15:58:41.044099 progress 35 % (4 MB)
60 15:58:41.047983 progress 40 % (5 MB)
61 15:58:41.052025 progress 45 % (6 MB)
62 15:58:41.055853 progress 50 % (6 MB)
63 15:58:41.060040 progress 55 % (7 MB)
64 15:58:41.063938 progress 60 % (8 MB)
65 15:58:41.067785 progress 65 % (8 MB)
66 15:58:41.071874 progress 70 % (9 MB)
67 15:58:41.075648 progress 75 % (10 MB)
68 15:58:41.079398 progress 80 % (10 MB)
69 15:58:41.083088 progress 85 % (11 MB)
70 15:58:41.086664 progress 90 % (12 MB)
71 15:58:41.090325 progress 95 % (12 MB)
72 15:58:41.093776 progress 100 % (13 MB)
73 15:58:41.094023 13 MB downloaded in 0.08 s (172.63 MB/s)
74 15:58:41.094196 end: 1.2.1 http-download (duration 00:00:00) [common]
76 15:58:41.094442 end: 1.2 download-retry (duration 00:00:00) [common]
77 15:58:41.094525 start: 1.3 download-retry (timeout 00:10:00) [common]
78 15:58:41.094607 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 15:58:41.094760 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-ltp/20240313.0/amd64/full.rootfs.tar.xz
80 15:58:41.094842 saving as /var/lib/lava/dispatcher/tmp/14343430/tftp-deploy-e82njvn_/nfsrootfs/full.rootfs.tar
81 15:58:41.094901 total size: 100036868 (95 MB)
82 15:58:41.094961 Using unxz to decompress xz
83 15:58:41.098756 progress 0 % (0 MB)
84 15:58:41.497119 progress 5 % (4 MB)
85 15:58:41.891288 progress 10 % (9 MB)
86 15:58:42.299763 progress 15 % (14 MB)
87 15:58:42.711343 progress 20 % (19 MB)
88 15:58:43.128591 progress 25 % (23 MB)
89 15:58:43.427135 progress 30 % (28 MB)
90 15:58:43.718819 progress 35 % (33 MB)
91 15:58:44.017362 progress 40 % (38 MB)
92 15:58:44.263916 progress 45 % (42 MB)
93 15:58:44.560668 progress 50 % (47 MB)
94 15:58:44.744615 progress 55 % (52 MB)
95 15:58:44.944256 progress 60 % (57 MB)
96 15:58:45.235614 progress 65 % (62 MB)
97 15:58:45.538243 progress 70 % (66 MB)
98 15:58:45.812697 progress 75 % (71 MB)
99 15:58:46.109002 progress 80 % (76 MB)
100 15:58:46.413813 progress 85 % (81 MB)
101 15:58:46.687051 progress 90 % (85 MB)
102 15:58:46.989252 progress 95 % (90 MB)
103 15:58:47.295967 progress 100 % (95 MB)
104 15:58:47.302436 95 MB downloaded in 6.21 s (15.37 MB/s)
105 15:58:47.302914 end: 1.3.1 http-download (duration 00:00:06) [common]
107 15:58:47.303684 end: 1.3 download-retry (duration 00:00:06) [common]
108 15:58:47.303871 start: 1.4 download-retry (timeout 00:09:54) [common]
109 15:58:47.304058 start: 1.4.1 http-download (timeout 00:09:54) [common]
110 15:58:47.304319 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt-rebase/v4.4-st5-395-gaed3deab96ccf/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 15:58:47.304500 saving as /var/lib/lava/dispatcher/tmp/14343430/tftp-deploy-e82njvn_/modules/modules.tar
112 15:58:47.304657 total size: 717588 (0 MB)
113 15:58:47.304804 Using unxz to decompress xz
114 15:58:47.308871 progress 4 % (0 MB)
115 15:58:47.309307 progress 9 % (0 MB)
116 15:58:47.311199 progress 18 % (0 MB)
117 15:58:47.314916 progress 27 % (0 MB)
118 15:58:47.318928 progress 36 % (0 MB)
119 15:58:47.320640 progress 41 % (0 MB)
120 15:58:47.324439 progress 50 % (0 MB)
121 15:58:47.327908 progress 59 % (0 MB)
122 15:58:47.331702 progress 68 % (0 MB)
123 15:58:47.333572 progress 73 % (0 MB)
124 15:58:47.337058 progress 82 % (0 MB)
125 15:58:47.340754 progress 91 % (0 MB)
126 15:58:47.344884 progress 100 % (0 MB)
127 15:58:47.351242 0 MB downloaded in 0.05 s (14.69 MB/s)
128 15:58:47.351594 end: 1.4.1 http-download (duration 00:00:00) [common]
130 15:58:47.352075 end: 1.4 download-retry (duration 00:00:00) [common]
131 15:58:47.352211 start: 1.5 prepare-tftp-overlay (timeout 00:09:54) [common]
132 15:58:47.352345 start: 1.5.1 extract-nfsrootfs (timeout 00:09:54) [common]
133 15:58:50.204920 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14343430/extract-nfsrootfs-4sazxkbo
134 15:58:50.205122 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
135 15:58:50.205223 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
136 15:58:50.205399 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_
137 15:58:50.205532 makedir: /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin
138 15:58:50.205638 makedir: /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/tests
139 15:58:50.205738 makedir: /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/results
140 15:58:50.205840 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-add-keys
141 15:58:50.205982 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-add-sources
142 15:58:50.206108 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-background-process-start
143 15:58:50.206401 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-background-process-stop
144 15:58:50.206528 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-common-functions
145 15:58:50.206657 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-echo-ipv4
146 15:58:50.206780 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-install-packages
147 15:58:50.206902 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-installed-packages
148 15:58:50.207024 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-os-build
149 15:58:50.207148 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-probe-channel
150 15:58:50.207315 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-probe-ip
151 15:58:50.207438 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-target-ip
152 15:58:50.207563 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-target-mac
153 15:58:50.207684 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-target-storage
154 15:58:50.207807 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-test-case
155 15:58:50.207935 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-test-event
156 15:58:50.208089 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-test-feedback
157 15:58:50.208242 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-test-raise
158 15:58:50.208412 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-test-reference
159 15:58:50.208572 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-test-runner
160 15:58:50.208728 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-test-set
161 15:58:50.208886 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-test-shell
162 15:58:50.209044 Updating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-install-packages (oe)
163 15:58:50.209226 Updating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/bin/lava-installed-packages (oe)
164 15:58:50.209374 Creating /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/environment
165 15:58:50.209498 LAVA metadata
166 15:58:50.209591 - LAVA_JOB_ID=14343430
167 15:58:50.209682 - LAVA_DISPATCHER_IP=192.168.201.1
168 15:58:50.209815 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
169 15:58:50.209908 skipped lava-vland-overlay
170 15:58:50.210012 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
171 15:58:50.210120 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
172 15:58:50.210254 skipped lava-multinode-overlay
173 15:58:50.210358 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
174 15:58:50.210474 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
175 15:58:50.210577 Loading test definitions
176 15:58:50.210712 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
177 15:58:50.210814 Using /lava-14343430 at stage 0
178 15:58:50.210950 Fetching tests from https://github.com/kernelci/test-definitions
179 15:58:50.211065 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/0/tests/0_ltp-ipc'
180 15:58:52.790661 Running '/usr/bin/git checkout kernelci.org
181 15:58:52.941593 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
182 15:58:52.942630 uuid=14343430_1.5.2.3.1 testdef=None
183 15:58:52.942807 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
185 15:58:52.943159 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
186 15:58:52.944167 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 15:58:52.944398 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
189 15:58:52.952180 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 15:58:52.953668 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
192 15:58:52.961321 runner path: /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/0/tests/0_ltp-ipc test_uuid 14343430_1.5.2.3.1
193 15:58:52.961672 SKIPFILE='skipfile-lkft.yaml'
194 15:58:52.961926 SKIP_INSTALL='true'
195 15:58:52.962182 TST_CMDFILES='ipc'
196 15:58:52.962764 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
198 15:58:52.963651 Creating lava-test-runner.conf files
199 15:58:52.963901 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14343430/lava-overlay-r7hc5_p_/lava-14343430/0 for stage 0
200 15:58:52.964283 - 0_ltp-ipc
201 15:58:52.964690 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
202 15:58:52.965108 start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
203 15:59:00.653634 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
204 15:59:00.653783 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:40) [common]
205 15:59:00.653879 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
206 15:59:00.653979 end: 1.5.2 lava-overlay (duration 00:00:10) [common]
207 15:59:00.654068 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:40) [common]
208 15:59:00.821793 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
209 15:59:00.822216 start: 1.5.4 extract-modules (timeout 00:09:40) [common]
210 15:59:00.822347 extracting modules file /var/lib/lava/dispatcher/tmp/14343430/tftp-deploy-e82njvn_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14343430/extract-nfsrootfs-4sazxkbo
211 15:59:00.847564 extracting modules file /var/lib/lava/dispatcher/tmp/14343430/tftp-deploy-e82njvn_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14343430/extract-overlay-ramdisk-e91w6zwu/ramdisk
212 15:59:00.874637 end: 1.5.4 extract-modules (duration 00:00:00) [common]
213 15:59:00.874797 start: 1.5.5 apply-overlay-tftp (timeout 00:09:40) [common]
214 15:59:00.874893 [common] Applying overlay to NFS
215 15:59:00.874966 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14343430/compress-overlay-wbx2nj2r/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14343430/extract-nfsrootfs-4sazxkbo
216 15:59:01.868007 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
217 15:59:01.868193 start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
218 15:59:01.868311 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
219 15:59:01.868427 start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
220 15:59:01.868532 Building ramdisk /var/lib/lava/dispatcher/tmp/14343430/extract-overlay-ramdisk-e91w6zwu/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14343430/extract-overlay-ramdisk-e91w6zwu/ramdisk
221 15:59:01.959671 >> 36224 blocks
222 15:59:02.699508 rename /var/lib/lava/dispatcher/tmp/14343430/extract-overlay-ramdisk-e91w6zwu/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14343430/tftp-deploy-e82njvn_/ramdisk/ramdisk.cpio.gz
223 15:59:02.699948 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
224 15:59:02.700067 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
225 15:59:02.700165 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
226 15:59:02.700262 No mkimage arch provided, not using FIT.
227 15:59:02.700348 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
228 15:59:02.700427 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
229 15:59:02.700533 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
230 15:59:02.700620 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
231 15:59:02.700697 No LXC device requested
232 15:59:02.700775 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
233 15:59:02.700867 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
234 15:59:02.700987 end: 1.7 deploy-device-env (duration 00:00:00) [common]
235 15:59:02.701087 Checking files for TFTP limit of 4294967296 bytes.
236 15:59:02.701546 end: 1 tftp-deploy (duration 00:00:22) [common]
237 15:59:02.701649 start: 2 depthcharge-action (timeout 00:05:00) [common]
238 15:59:02.701743 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
239 15:59:02.701859 substitutions:
240 15:59:02.701925 - {DTB}: None
241 15:59:02.701989 - {INITRD}: 14343430/tftp-deploy-e82njvn_/ramdisk/ramdisk.cpio.gz
242 15:59:02.702048 - {KERNEL}: 14343430/tftp-deploy-e82njvn_/kernel/bzImage
243 15:59:02.702105 - {LAVA_MAC}: None
244 15:59:02.702165 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14343430/extract-nfsrootfs-4sazxkbo
245 15:59:02.702227 - {NFS_SERVER_IP}: 192.168.201.1
246 15:59:02.702281 - {PRESEED_CONFIG}: None
247 15:59:02.702335 - {PRESEED_LOCAL}: None
248 15:59:02.702387 - {RAMDISK}: 14343430/tftp-deploy-e82njvn_/ramdisk/ramdisk.cpio.gz
249 15:59:02.702441 - {ROOT_PART}: None
250 15:59:02.702496 - {ROOT}: None
251 15:59:02.702549 - {SERVER_IP}: 192.168.201.1
252 15:59:02.702607 - {TEE}: None
253 15:59:02.702669 Parsed boot commands:
254 15:59:02.702726 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
255 15:59:02.702909 Parsed boot commands: tftpboot 192.168.201.1 14343430/tftp-deploy-e82njvn_/kernel/bzImage 14343430/tftp-deploy-e82njvn_/kernel/cmdline 14343430/tftp-deploy-e82njvn_/ramdisk/ramdisk.cpio.gz
256 15:59:02.703003 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
257 15:59:02.703102 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
258 15:59:02.703203 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
259 15:59:02.703322 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
260 15:59:02.703420 Not connected, no need to disconnect.
261 15:59:02.703527 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
262 15:59:02.703633 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
263 15:59:02.703732 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-8'
264 15:59:02.707266 Setting prompt string to ['lava-test: # ']
265 15:59:02.707627 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
266 15:59:02.707737 end: 2.2.1 reset-connection (duration 00:00:00) [common]
267 15:59:02.707836 start: 2.2.2 reset-device (timeout 00:05:00) [common]
268 15:59:02.707927 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
269 15:59:02.708092 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cp514-2h-1130g7-volteer-cbg-8']
270 15:59:11.345603 Returned 0 in 8 seconds
271 15:59:11.446283 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
273 15:59:11.446737 end: 2.2.2 reset-device (duration 00:00:09) [common]
274 15:59:11.446871 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
275 15:59:11.446997 Setting prompt string to 'Starting depthcharge on Voema...'
276 15:59:11.447069 Changing prompt to 'Starting depthcharge on Voema...'
277 15:59:11.447156 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
278 15:59:11.447649 [Enter `^Ec?' for help]
279 15:59:11.447760
280 15:59:11.447866
281 15:59:11.447967 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
282 15:59:11.448052 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
283 15:59:11.448124 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
284 15:59:11.448188 CPU: AES supported, TXT NOT supported, VT supported
285 15:59:11.448250 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
286 15:59:11.448314 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
287 15:59:11.448372 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
288 15:59:11.448449 VBOOT: Loading verstage.
289 15:59:11.448545 FMAP: Found "FLASH" version 1.1 at 0x1804000.
290 15:59:11.448631 FMAP: base = 0x0 size = 0x2000000 #areas = 32
291 15:59:11.448694 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
292 15:59:11.448751 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
293 15:59:11.448812 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
294 15:59:11.448869
295 15:59:11.448924
296 15:59:11.448979 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
297 15:59:11.449036 Probing TPM: . done!
298 15:59:11.449094 TPM ready after 0 ms
299 15:59:11.449169 Connected to device vid:did:rid of 1ae0:0028:00
300 15:59:11.449226 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
301 15:59:11.449284 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
302 15:59:11.449340 Initialized TPM device CR50 revision 0
303 15:59:11.449396 tlcl_send_startup: Startup return code is 0
304 15:59:11.449451 TPM: setup succeeded
305 15:59:11.449507 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
306 15:59:11.449563 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 15:59:11.449632 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
308 15:59:11.449695 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
309 15:59:11.449753 Chrome EC: UHEPI supported
310 15:59:11.449809 Phase 1
311 15:59:11.449864 FMAP: area GBB found @ 1805000 (458752 bytes)
312 15:59:11.449920 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
313 15:59:11.449976 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
314 15:59:11.450032 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
315 15:59:11.450087 VB2:vb2_check_recovery() Recovery was requested manually
316 15:59:11.450153 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7
317 15:59:11.450229 Recovery requested (1009000e)
318 15:59:11.450286 TPM: Extending digest for VBOOT: boot mode into PCR 0
319 15:59:11.450342 tlcl_extend: response is 0
320 15:59:11.450398 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
321 15:59:11.450454 tlcl_extend: response is 0
322 15:59:11.450509 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
323 15:59:11.450565 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
324 15:59:11.450622 BS: verstage times (exec / console): total (unknown) / 147 ms
325 15:59:11.450693
326 15:59:11.450752
327 15:59:11.450809 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
328 15:59:11.450865 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
329 15:59:11.450920 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
330 15:59:11.450976 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
331 15:59:11.451031 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
332 15:59:11.451086 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
333 15:59:11.451140 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
334 15:59:11.451208 TCO_STS: 0000 0000
335 15:59:11.451270 GEN_PMCON: d0015038 00002200
336 15:59:11.451326 GBLRST_CAUSE: 00000000 00000000
337 15:59:11.451381 HPR_CAUSE0: 00000000
338 15:59:11.451436 prev_sleep_state 5
339 15:59:11.451491 Boot Count incremented to 31306
340 15:59:11.451546 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
341 15:59:11.451601 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
342 15:59:11.451657 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
343 15:59:11.451728 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
344 15:59:11.451790 Chrome EC: UHEPI supported
345 15:59:11.451846 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
346 15:59:11.451902 Probing TPM: done!
347 15:59:11.451957 Connected to device vid:did:rid of 1ae0:0028:00
348 15:59:11.452012 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
349 15:59:11.452067 Initialized TPM device CR50 revision 0
350 15:59:11.452122 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
351 15:59:11.452178 MRC: Hash idx 0x100b comparison successful.
352 15:59:11.452246 MRC cache found, size faa8
353 15:59:11.452308 bootmode is set to: 2
354 15:59:11.452363 SPD index = 0
355 15:59:11.452445 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
356 15:59:11.452504 SPD: module type is LPDDR4X
357 15:59:11.452559 SPD: module part number is MT53E512M64D4NW-046
358 15:59:11.452615 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
359 15:59:11.452671 SPD: device width 16 bits, bus width 16 bits
360 15:59:11.452727 SPD: module size is 1024 MB (per channel)
361 15:59:11.452805 CBMEM:
362 15:59:11.452864 IMD: root @ 0x76fff000 254 entries.
363 15:59:11.452919 IMD: root @ 0x76ffec00 62 entries.
364 15:59:11.452974 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
365 15:59:11.453221 FMAP: area RW_VPD found @ f35000 (8192 bytes)
366 15:59:11.453303 External stage cache:
367 15:59:11.453363 IMD: root @ 0x7b3ff000 254 entries.
368 15:59:11.453420 IMD: root @ 0x7b3fec00 62 entries.
369 15:59:11.453476 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
370 15:59:11.453532 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
371 15:59:11.453587 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
372 15:59:11.453643 MRC: 'RECOVERY_MRC_CACHE' does not need update.
373 15:59:11.453698 cse_lite: Skip switching to RW in the recovery path
374 15:59:11.453753 8 DIMMs found
375 15:59:11.453831 SMM Memory Map
376 15:59:11.453889 SMRAM : 0x7b000000 0x800000
377 15:59:11.453946 Subregion 0: 0x7b000000 0x200000
378 15:59:11.454000 Subregion 1: 0x7b200000 0x200000
379 15:59:11.454056 Subregion 2: 0x7b400000 0x400000
380 15:59:11.454111 top_of_ram = 0x77000000
381 15:59:11.454177 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
382 15:59:11.454235 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
383 15:59:11.454291 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
384 15:59:11.454369 MTRR Range: Start=ff000000 End=0 (Size 1000000)
385 15:59:11.454425 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
386 15:59:11.454481 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
387 15:59:11.454538 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
388 15:59:11.454593 Processing 211 relocs. Offset value of 0x74c0b000
389 15:59:11.454648 BS: romstage times (exec / console): total (unknown) / 277 ms
390 15:59:11.454704
391 15:59:11.454759
392 15:59:11.454826 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
393 15:59:11.454889 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
394 15:59:11.454947 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
395 15:59:11.455003 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
396 15:59:11.455059 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
397 15:59:11.455114 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
398 15:59:11.455170 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
399 15:59:11.455226 Processing 5008 relocs. Offset value of 0x75d98000
400 15:59:11.455281 BS: postcar times (exec / console): total (unknown) / 59 ms
401 15:59:11.455353
402 15:59:11.455411
403 15:59:11.455466 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
404 15:59:11.455522 Normal boot
405 15:59:11.455580 FW_CONFIG value is 0x804c02
406 15:59:11.455636 PCI: 00:07.0 disabled by fw_config
407 15:59:11.455691 PCI: 00:07.1 disabled by fw_config
408 15:59:11.455746 PCI: 00:0d.2 disabled by fw_config
409 15:59:11.455801 PCI: 00:1c.7 disabled by fw_config
410 15:59:11.455876 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
411 15:59:11.455936 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
412 15:59:11.455991 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 15:59:11.456047 GENERIC: 0.0 disabled by fw_config
414 15:59:11.456102 GENERIC: 1.0 disabled by fw_config
415 15:59:11.456157 fw_config match found: DB_USB=USB3_ACTIVE
416 15:59:11.456212 fw_config match found: DB_USB=USB3_ACTIVE
417 15:59:11.456267 fw_config match found: DB_USB=USB3_ACTIVE
418 15:59:11.456322 fw_config match found: DB_USB=USB3_ACTIVE
419 15:59:11.456390 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
420 15:59:11.456453 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
421 15:59:11.456509 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
422 15:59:11.456564 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
423 15:59:11.456620 microcode: sig=0x806c1 pf=0x80 revision=0x86
424 15:59:11.456676 microcode: Update skipped, already up-to-date
425 15:59:11.456731 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
426 15:59:11.456787 Detected 4 core, 8 thread CPU.
427 15:59:11.456842 Setting up SMI for CPU
428 15:59:11.456898 IED base = 0x7b400000
429 15:59:11.456973 IED size = 0x00400000
430 15:59:11.457031 Will perform SMM setup.
431 15:59:11.457086 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
432 15:59:11.457142 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
433 15:59:11.457198 Processing 16 relocs. Offset value of 0x00030000
434 15:59:11.457253 Attempting to start 7 APs
435 15:59:11.457308 Waiting for 10ms after sending INIT.
436 15:59:11.457362 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
437 15:59:11.457418 AP: slot 5 apic_id 4.
438 15:59:11.457494 AP: slot 7 apic_id 6.
439 15:59:11.457551 AP: slot 3 apic_id 7.
440 15:59:11.457606 done.
441 15:59:11.457661 AP: slot 4 apic_id 5.
442 15:59:11.457715 AP: slot 6 apic_id 2.
443 15:59:11.457769 AP: slot 2 apic_id 3.
444 15:59:11.457823 Waiting for 2nd SIPI to complete...done.
445 15:59:11.457879 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
446 15:59:11.457934 Processing 13 relocs. Offset value of 0x00038000
447 15:59:11.458004 Unable to locate Global NVS
448 15:59:11.458097 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
449 15:59:11.458191 Installing permanent SMM handler to 0x7b000000
450 15:59:11.458250 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
451 15:59:11.458306 Processing 794 relocs. Offset value of 0x7b010000
452 15:59:11.458553 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
453 15:59:11.458617 Processing 13 relocs. Offset value of 0x7b008000
454 15:59:11.458675 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
455 15:59:11.458731 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
456 15:59:11.458786 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
457 15:59:11.458842 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
458 15:59:11.458897 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
459 15:59:11.458951 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
460 15:59:11.459018 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
461 15:59:11.459083 Unable to locate Global NVS
462 15:59:11.459140 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
463 15:59:11.459196 Clearing SMI status registers
464 15:59:11.459250 SMI_STS: PM1
465 15:59:11.459305 PM1_STS: PWRBTN
466 15:59:11.459360 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
467 15:59:11.459415 In relocation handler: CPU 0
468 15:59:11.459470 New SMBASE=0x7b000000 IEDBASE=0x7b400000
469 15:59:11.459525 Writing SMRR. base = 0x7b000006, mask=0xff800c00
470 15:59:11.459601 Relocation complete.
471 15:59:11.459657 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
472 15:59:11.459712 In relocation handler: CPU 1
473 15:59:11.459767 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
474 15:59:11.459823 Relocation complete.
475 15:59:11.459877 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
476 15:59:11.459932 In relocation handler: CPU 6
477 15:59:11.459986 New SMBASE=0x7affe800 IEDBASE=0x7b400000
478 15:59:11.460042 Writing SMRR. base = 0x7b000006, mask=0xff800c00
479 15:59:11.460118 Relocation complete.
480 15:59:11.460176 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
481 15:59:11.460232 In relocation handler: CPU 2
482 15:59:11.460287 New SMBASE=0x7afff800 IEDBASE=0x7b400000
483 15:59:11.460342 Relocation complete.
484 15:59:11.460411 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
485 15:59:11.460495 In relocation handler: CPU 3
486 15:59:11.460553 New SMBASE=0x7afff400 IEDBASE=0x7b400000
487 15:59:11.460627 Relocation complete.
488 15:59:11.460686 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
489 15:59:11.460742 In relocation handler: CPU 7
490 15:59:11.460797 New SMBASE=0x7affe400 IEDBASE=0x7b400000
491 15:59:11.460853 Writing SMRR. base = 0x7b000006, mask=0xff800c00
492 15:59:11.460908 Relocation complete.
493 15:59:11.460963 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
494 15:59:11.461019 In relocation handler: CPU 4
495 15:59:11.461074 New SMBASE=0x7afff000 IEDBASE=0x7b400000
496 15:59:11.461142 Relocation complete.
497 15:59:11.461204 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
498 15:59:11.461263 In relocation handler: CPU 5
499 15:59:11.461318 New SMBASE=0x7affec00 IEDBASE=0x7b400000
500 15:59:11.461374 Writing SMRR. base = 0x7b000006, mask=0xff800c00
501 15:59:11.461429 Relocation complete.
502 15:59:11.461484 Initializing CPU #0
503 15:59:11.461538 CPU: vendor Intel device 806c1
504 15:59:11.461593 CPU: family 06, model 8c, stepping 01
505 15:59:11.461659 Clearing out pending MCEs
506 15:59:11.461721 Setting up local APIC...
507 15:59:11.461777 apic_id: 0x00 done.
508 15:59:11.461832 Turbo is available but hidden
509 15:59:11.461886 Turbo is available and visible
510 15:59:11.461942 microcode: Update skipped, already up-to-date
511 15:59:11.461997 CPU #0 initialized
512 15:59:11.462051 Initializing CPU #3
513 15:59:11.462106 Initializing CPU #7
514 15:59:11.462199 CPU: vendor Intel device 806c1
515 15:59:11.462290 CPU: family 06, model 8c, stepping 01
516 15:59:11.462377 CPU: vendor Intel device 806c1
517 15:59:11.462463 CPU: family 06, model 8c, stepping 01
518 15:59:11.462549 Clearing out pending MCEs
519 15:59:11.462634 Clearing out pending MCEs
520 15:59:11.462716 Setting up local APIC...
521 15:59:11.462774 Initializing CPU #6
522 15:59:11.462828 Initializing CPU #2
523 15:59:11.462883 CPU: vendor Intel device 806c1
524 15:59:11.462939 CPU: family 06, model 8c, stepping 01
525 15:59:11.462995 CPU: vendor Intel device 806c1
526 15:59:11.463050 CPU: family 06, model 8c, stepping 01
527 15:59:11.463105 apic_id: 0x07 done.
528 15:59:11.463160 Setting up local APIC...
529 15:59:11.463217 Initializing CPU #1
530 15:59:11.463285 Initializing CPU #5
531 15:59:11.463345 Initializing CPU #4
532 15:59:11.463401 CPU: vendor Intel device 806c1
533 15:59:11.463456 CPU: family 06, model 8c, stepping 01
534 15:59:11.463525 CPU: vendor Intel device 806c1
535 15:59:11.463581 CPU: family 06, model 8c, stepping 01
536 15:59:11.463636 Clearing out pending MCEs
537 15:59:11.463691 Clearing out pending MCEs
538 15:59:11.463767 Clearing out pending MCEs
539 15:59:11.463828 Clearing out pending MCEs
540 15:59:11.463895 Setting up local APIC...
541 15:59:11.463951 Setting up local APIC...
542 15:59:11.464006 apic_id: 0x06 done.
543 15:59:11.464061 microcode: Update skipped, already up-to-date
544 15:59:11.464116 microcode: Update skipped, already up-to-date
545 15:59:11.464171 CPU #3 initialized
546 15:59:11.464233 CPU #7 initialized
547 15:59:11.464299 apic_id: 0x03 done.
548 15:59:11.464357 apic_id: 0x02 done.
549 15:59:11.464412 microcode: Update skipped, already up-to-date
550 15:59:11.464467 microcode: Update skipped, already up-to-date
551 15:59:11.464522 CPU #2 initialized
552 15:59:11.464576 CPU #6 initialized
553 15:59:11.464631 CPU: vendor Intel device 806c1
554 15:59:11.464685 CPU: family 06, model 8c, stepping 01
555 15:59:11.464740 Setting up local APIC...
556 15:59:11.464813 Clearing out pending MCEs
557 15:59:11.464869 apic_id: 0x05 done.
558 15:59:11.464924 Setting up local APIC...
559 15:59:11.464978 Setting up local APIC...
560 15:59:11.465032 microcode: Update skipped, already up-to-date
561 15:59:11.465088 apic_id: 0x04 done.
562 15:59:11.465142 CPU #4 initialized
563 15:59:11.465214 microcode: Update skipped, already up-to-date
564 15:59:11.465284 apic_id: 0x01 done.
565 15:59:11.465346 CPU #5 initialized
566 15:59:11.465611 microcode: Update skipped, already up-to-date
567 15:59:11.465674 CPU #1 initialized
568 15:59:11.465730 bsp_do_flight_plan done after 455 msecs.
569 15:59:11.465786 CPU: frequency set to 4000 MHz
570 15:59:11.465845 Enabling SMIs.
571 15:59:11.465901 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
572 15:59:11.465956 SATAXPCIE1 indicates PCIe NVMe is present
573 15:59:11.466011 Probing TPM: done!
574 15:59:11.466067 Connected to device vid:did:rid of 1ae0:0028:00
575 15:59:11.466122 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
576 15:59:11.466191 Initialized TPM device CR50 revision 0
577 15:59:11.466248 Enabling S0i3.4
578 15:59:11.466303 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
579 15:59:11.466362 Found a VBT of 8704 bytes after decompression
580 15:59:11.466419 cse_lite: CSE RO boot. HybridStorageMode disabled
581 15:59:11.466474 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
582 15:59:11.466550 FSPS returned 0
583 15:59:11.466607 Executing Phase 1 of FspMultiPhaseSiInit
584 15:59:11.466662 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
585 15:59:11.466718 port C0 DISC req: usage 1 usb3 1 usb2 5
586 15:59:11.466774 Raw Buffer output 0 00000511
587 15:59:11.466831 Raw Buffer output 1 00000000
588 15:59:11.466886 pmc_send_ipc_cmd succeeded
589 15:59:11.466941 port C1 DISC req: usage 1 usb3 2 usb2 3
590 15:59:11.466995 Raw Buffer output 0 00000321
591 15:59:11.467050 Raw Buffer output 1 00000000
592 15:59:11.467114 pmc_send_ipc_cmd succeeded
593 15:59:11.467176 Detected 4 core, 8 thread CPU.
594 15:59:11.467232 Detected 4 core, 8 thread CPU.
595 15:59:11.467287 Display FSP Version Info HOB
596 15:59:11.467345 Reference Code - CPU = a.0.4c.31
597 15:59:11.467402 uCode Version = 0.0.0.86
598 15:59:11.467457 TXT ACM version = ff.ff.ff.ffff
599 15:59:11.467511 Reference Code - ME = a.0.4c.31
600 15:59:11.467566 MEBx version = 0.0.0.0
601 15:59:11.467621 ME Firmware Version = Consumer SKU
602 15:59:11.467689 Reference Code - PCH = a.0.4c.31
603 15:59:11.467748 PCH-CRID Status = Disabled
604 15:59:11.467803 PCH-CRID Original Value = ff.ff.ff.ffff
605 15:59:11.467862 PCH-CRID New Value = ff.ff.ff.ffff
606 15:59:11.467918 OPROM - RST - RAID = ff.ff.ff.ffff
607 15:59:11.467974 PCH Hsio Version = 4.0.0.0
608 15:59:11.468029 Reference Code - SA - System Agent = a.0.4c.31
609 15:59:11.468084 Reference Code - MRC = 2.0.0.1
610 15:59:11.468138 SA - PCIe Version = a.0.4c.31
611 15:59:11.468193 SA-CRID Status = Disabled
612 15:59:11.468248 SA-CRID Original Value = 0.0.0.1
613 15:59:11.468303 SA-CRID New Value = 0.0.0.1
614 15:59:11.468360 OPROM - VBIOS = ff.ff.ff.ffff
615 15:59:11.468423 IO Manageability Engine FW Version = 11.1.4.0
616 15:59:11.468495 PHY Build Version = 0.0.0.e0
617 15:59:11.468559 Thunderbolt(TM) FW Version = 0.0.0.0
618 15:59:11.468634 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
619 15:59:11.468696 ITSS IRQ Polarities Before:
620 15:59:11.468751 IPC0: 0xffffffff
621 15:59:11.468806 IPC1: 0xffffffff
622 15:59:11.468863 IPC2: 0xffffffff
623 15:59:11.468918 IPC3: 0xffffffff
624 15:59:11.468973 ITSS IRQ Polarities After:
625 15:59:11.469027 IPC0: 0xffffffff
626 15:59:11.469081 IPC1: 0xffffffff
627 15:59:11.469136 IPC2: 0xffffffff
628 15:59:11.469190 IPC3: 0xffffffff
629 15:59:11.469244 Found PCIe Root Port #9 at PCI: 00:1d.0.
630 15:59:11.469300 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
631 15:59:11.469358 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
632 15:59:11.469437 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
633 15:59:11.469497 BS: BS_DEV_INIT_CHIPS run times (exec / console): 324 / 236 ms
634 15:59:11.469553 Enumerating buses...
635 15:59:11.469627 Show all devs... Before device enumeration.
636 15:59:11.469685 Root Device: enabled 1
637 15:59:11.469741 DOMAIN: 0000: enabled 1
638 15:59:11.469796 CPU_CLUSTER: 0: enabled 1
639 15:59:11.469851 PCI: 00:00.0: enabled 1
640 15:59:11.469918 PCI: 00:02.0: enabled 1
641 15:59:11.469982 PCI: 00:04.0: enabled 1
642 15:59:11.470037 PCI: 00:05.0: enabled 1
643 15:59:11.470091 PCI: 00:06.0: enabled 0
644 15:59:11.470145 PCI: 00:07.0: enabled 0
645 15:59:11.470216 PCI: 00:07.1: enabled 0
646 15:59:11.470271 PCI: 00:07.2: enabled 0
647 15:59:11.470329 PCI: 00:07.3: enabled 0
648 15:59:11.470421 PCI: 00:08.0: enabled 1
649 15:59:11.470484 PCI: 00:09.0: enabled 0
650 15:59:11.470541 PCI: 00:0a.0: enabled 0
651 15:59:11.470596 PCI: 00:0d.0: enabled 1
652 15:59:11.470651 PCI: 00:0d.1: enabled 0
653 15:59:11.470705 PCI: 00:0d.2: enabled 0
654 15:59:11.470759 PCI: 00:0d.3: enabled 0
655 15:59:11.470813 PCI: 00:0e.0: enabled 0
656 15:59:11.470868 PCI: 00:10.2: enabled 1
657 15:59:11.470932 PCI: 00:10.6: enabled 0
658 15:59:11.470997 PCI: 00:10.7: enabled 0
659 15:59:11.471069 PCI: 00:12.0: enabled 0
660 15:59:11.471127 PCI: 00:12.6: enabled 0
661 15:59:11.471201 PCI: 00:13.0: enabled 0
662 15:59:11.471258 PCI: 00:14.0: enabled 1
663 15:59:11.471313 PCI: 00:14.1: enabled 0
664 15:59:11.471368 PCI: 00:14.2: enabled 1
665 15:59:11.471426 PCI: 00:14.3: enabled 1
666 15:59:11.471495 PCI: 00:15.0: enabled 1
667 15:59:11.471571 PCI: 00:15.1: enabled 1
668 15:59:11.471628 PCI: 00:15.2: enabled 1
669 15:59:11.471682 PCI: 00:15.3: enabled 1
670 15:59:11.471738 PCI: 00:16.0: enabled 1
671 15:59:11.471793 PCI: 00:16.1: enabled 0
672 15:59:11.471847 PCI: 00:16.2: enabled 0
673 15:59:11.471901 PCI: 00:16.3: enabled 0
674 15:59:11.471968 PCI: 00:16.4: enabled 0
675 15:59:11.472030 PCI: 00:16.5: enabled 0
676 15:59:11.472085 PCI: 00:17.0: enabled 1
677 15:59:11.472140 PCI: 00:19.0: enabled 0
678 15:59:11.472194 PCI: 00:19.1: enabled 1
679 15:59:11.472249 PCI: 00:19.2: enabled 0
680 15:59:11.472319 PCI: 00:1c.0: enabled 1
681 15:59:11.472387 PCI: 00:1c.1: enabled 0
682 15:59:11.472452 PCI: 00:1c.2: enabled 0
683 15:59:11.472519 PCI: 00:1c.3: enabled 0
684 15:59:11.472577 PCI: 00:1c.4: enabled 0
685 15:59:11.472632 PCI: 00:1c.5: enabled 0
686 15:59:11.472686 PCI: 00:1c.6: enabled 1
687 15:59:11.472741 PCI: 00:1c.7: enabled 0
688 15:59:11.472795 PCI: 00:1d.0: enabled 1
689 15:59:11.472850 PCI: 00:1d.1: enabled 0
690 15:59:11.473097 PCI: 00:1d.2: enabled 1
691 15:59:11.473161 PCI: 00:1d.3: enabled 0
692 15:59:11.473216 PCI: 00:1e.0: enabled 1
693 15:59:11.473270 PCI: 00:1e.1: enabled 0
694 15:59:11.473325 PCI: 00:1e.2: enabled 1
695 15:59:11.473379 PCI: 00:1e.3: enabled 1
696 15:59:11.473433 PCI: 00:1f.0: enabled 1
697 15:59:11.473493 PCI: 00:1f.1: enabled 0
698 15:59:11.473561 PCI: 00:1f.2: enabled 1
699 15:59:11.473618 PCI: 00:1f.3: enabled 1
700 15:59:11.473672 PCI: 00:1f.4: enabled 0
701 15:59:11.473727 PCI: 00:1f.5: enabled 1
702 15:59:11.473780 PCI: 00:1f.6: enabled 0
703 15:59:11.473835 PCI: 00:1f.7: enabled 0
704 15:59:11.473890 APIC: 00: enabled 1
705 15:59:11.473944 GENERIC: 0.0: enabled 1
706 15:59:11.473998 GENERIC: 0.0: enabled 1
707 15:59:11.474094 GENERIC: 1.0: enabled 1
708 15:59:11.474187 GENERIC: 0.0: enabled 1
709 15:59:11.474246 GENERIC: 1.0: enabled 1
710 15:59:11.474302 USB0 port 0: enabled 1
711 15:59:11.474357 GENERIC: 0.0: enabled 1
712 15:59:11.474411 USB0 port 0: enabled 1
713 15:59:11.474466 GENERIC: 0.0: enabled 1
714 15:59:11.474521 I2C: 00:1a: enabled 1
715 15:59:11.474596 I2C: 00:31: enabled 1
716 15:59:11.474654 I2C: 00:32: enabled 1
717 15:59:11.474709 I2C: 00:10: enabled 1
718 15:59:11.474763 I2C: 00:15: enabled 1
719 15:59:11.474818 GENERIC: 0.0: enabled 0
720 15:59:11.474873 GENERIC: 1.0: enabled 0
721 15:59:11.474926 GENERIC: 0.0: enabled 1
722 15:59:11.474981 SPI: 00: enabled 1
723 15:59:11.475047 SPI: 00: enabled 1
724 15:59:11.475109 PNP: 0c09.0: enabled 1
725 15:59:11.475164 GENERIC: 0.0: enabled 1
726 15:59:11.475219 USB3 port 0: enabled 1
727 15:59:11.475273 USB3 port 1: enabled 1
728 15:59:11.475327 USB3 port 2: enabled 0
729 15:59:11.475382 USB3 port 3: enabled 0
730 15:59:11.475436 USB2 port 0: enabled 0
731 15:59:11.475490 USB2 port 1: enabled 1
732 15:59:11.475557 USB2 port 2: enabled 1
733 15:59:11.475618 USB2 port 3: enabled 0
734 15:59:11.475675 USB2 port 4: enabled 1
735 15:59:11.475730 USB2 port 5: enabled 0
736 15:59:11.475785 USB2 port 6: enabled 0
737 15:59:11.475839 USB2 port 7: enabled 0
738 15:59:11.475894 USB2 port 8: enabled 0
739 15:59:11.475948 USB2 port 9: enabled 0
740 15:59:11.476002 USB3 port 0: enabled 0
741 15:59:11.476063 USB3 port 1: enabled 1
742 15:59:11.476130 USB3 port 2: enabled 0
743 15:59:11.476185 USB3 port 3: enabled 0
744 15:59:11.476239 GENERIC: 0.0: enabled 1
745 15:59:11.476293 GENERIC: 1.0: enabled 1
746 15:59:11.476347 APIC: 01: enabled 1
747 15:59:11.476402 APIC: 03: enabled 1
748 15:59:11.476456 APIC: 07: enabled 1
749 15:59:11.476510 APIC: 05: enabled 1
750 15:59:11.476581 APIC: 04: enabled 1
751 15:59:11.476640 APIC: 02: enabled 1
752 15:59:11.476695 APIC: 06: enabled 1
753 15:59:11.476749 Compare with tree...
754 15:59:11.476805 Root Device: enabled 1
755 15:59:11.476859 DOMAIN: 0000: enabled 1
756 15:59:11.476941 PCI: 00:00.0: enabled 1
757 15:59:11.477000 PCI: 00:02.0: enabled 1
758 15:59:11.477058 PCI: 00:04.0: enabled 1
759 15:59:11.477128 GENERIC: 0.0: enabled 1
760 15:59:11.477183 PCI: 00:05.0: enabled 1
761 15:59:11.477237 PCI: 00:06.0: enabled 0
762 15:59:11.477291 PCI: 00:07.0: enabled 0
763 15:59:11.477346 GENERIC: 0.0: enabled 1
764 15:59:11.477400 PCI: 00:07.1: enabled 0
765 15:59:11.477455 GENERIC: 1.0: enabled 1
766 15:59:11.477509 PCI: 00:07.2: enabled 0
767 15:59:11.477564 GENERIC: 0.0: enabled 1
768 15:59:11.477637 PCI: 00:07.3: enabled 0
769 15:59:11.477695 GENERIC: 1.0: enabled 1
770 15:59:11.477749 PCI: 00:08.0: enabled 1
771 15:59:11.477803 PCI: 00:09.0: enabled 0
772 15:59:11.477857 PCI: 00:0a.0: enabled 0
773 15:59:11.477912 PCI: 00:0d.0: enabled 1
774 15:59:11.477967 USB0 port 0: enabled 1
775 15:59:11.478021 USB3 port 0: enabled 1
776 15:59:11.478075 USB3 port 1: enabled 1
777 15:59:11.478169 USB3 port 2: enabled 0
778 15:59:11.478230 USB3 port 3: enabled 0
779 15:59:11.478286 PCI: 00:0d.1: enabled 0
780 15:59:11.478340 PCI: 00:0d.2: enabled 0
781 15:59:11.478395 GENERIC: 0.0: enabled 1
782 15:59:11.478449 PCI: 00:0d.3: enabled 0
783 15:59:11.478504 PCI: 00:0e.0: enabled 0
784 15:59:11.478559 PCI: 00:10.2: enabled 1
785 15:59:11.478613 PCI: 00:10.6: enabled 0
786 15:59:11.478689 PCI: 00:10.7: enabled 0
787 15:59:11.478748 PCI: 00:12.0: enabled 0
788 15:59:11.478803 PCI: 00:12.6: enabled 0
789 15:59:11.478857 PCI: 00:13.0: enabled 0
790 15:59:11.478911 PCI: 00:14.0: enabled 1
791 15:59:11.478966 USB0 port 0: enabled 1
792 15:59:11.479020 USB2 port 0: enabled 0
793 15:59:11.479074 USB2 port 1: enabled 1
794 15:59:11.479128 USB2 port 2: enabled 1
795 15:59:11.479202 USB2 port 3: enabled 0
796 15:59:11.479258 USB2 port 4: enabled 1
797 15:59:11.479313 USB2 port 5: enabled 0
798 15:59:11.479367 USB2 port 6: enabled 0
799 15:59:11.479422 USB2 port 7: enabled 0
800 15:59:11.479477 USB2 port 8: enabled 0
801 15:59:11.479531 USB2 port 9: enabled 0
802 15:59:11.479585 USB3 port 0: enabled 0
803 15:59:11.479639 USB3 port 1: enabled 1
804 15:59:11.479711 USB3 port 2: enabled 0
805 15:59:11.479770 USB3 port 3: enabled 0
806 15:59:11.479825 PCI: 00:14.1: enabled 0
807 15:59:11.479880 PCI: 00:14.2: enabled 1
808 15:59:11.479935 PCI: 00:14.3: enabled 1
809 15:59:11.479989 GENERIC: 0.0: enabled 1
810 15:59:11.480044 PCI: 00:15.0: enabled 1
811 15:59:11.480098 I2C: 00:1a: enabled 1
812 15:59:11.480152 I2C: 00:31: enabled 1
813 15:59:11.480226 I2C: 00:32: enabled 1
814 15:59:11.480283 PCI: 00:15.1: enabled 1
815 15:59:11.480338 I2C: 00:10: enabled 1
816 15:59:11.480392 PCI: 00:15.2: enabled 1
817 15:59:11.480446 PCI: 00:15.3: enabled 1
818 15:59:11.480501 PCI: 00:16.0: enabled 1
819 15:59:11.480555 PCI: 00:16.1: enabled 0
820 15:59:11.480608 PCI: 00:16.2: enabled 0
821 15:59:11.480662 PCI: 00:16.3: enabled 0
822 15:59:11.480721 PCI: 00:16.4: enabled 0
823 15:59:11.480789 PCI: 00:16.5: enabled 0
824 15:59:11.480846 PCI: 00:17.0: enabled 1
825 15:59:11.480901 PCI: 00:19.0: enabled 0
826 15:59:11.480955 PCI: 00:19.1: enabled 1
827 15:59:11.481024 I2C: 00:15: enabled 1
828 15:59:11.481079 PCI: 00:19.2: enabled 0
829 15:59:11.481134 PCI: 00:1d.0: enabled 1
830 15:59:11.481189 GENERIC: 0.0: enabled 1
831 15:59:11.481261 PCI: 00:1e.0: enabled 1
832 15:59:11.481319 PCI: 00:1e.1: enabled 0
833 15:59:11.481374 PCI: 00:1e.2: enabled 1
834 15:59:11.481429 SPI: 00: enabled 1
835 15:59:11.481483 PCI: 00:1e.3: enabled 1
836 15:59:11.481537 SPI: 00: enabled 1
837 15:59:11.481592 PCI: 00:1f.0: enabled 1
838 15:59:11.481647 PNP: 0c09.0: enabled 1
839 15:59:11.481701 PCI: 00:1f.1: enabled 0
840 15:59:11.481771 PCI: 00:1f.2: enabled 1
841 15:59:11.481831 GENERIC: 0.0: enabled 1
842 15:59:11.481886 GENERIC: 0.0: enabled 1
843 15:59:11.481941 GENERIC: 1.0: enabled 1
844 15:59:11.481996 PCI: 00:1f.3: enabled 1
845 15:59:11.482049 PCI: 00:1f.4: enabled 0
846 15:59:11.482103 PCI: 00:1f.5: enabled 1
847 15:59:11.482157 PCI: 00:1f.6: enabled 0
848 15:59:11.482417 PCI: 00:1f.7: enabled 0
849 15:59:11.482480 CPU_CLUSTER: 0: enabled 1
850 15:59:11.482536 APIC: 00: enabled 1
851 15:59:11.482592 APIC: 01: enabled 1
852 15:59:11.482646 APIC: 03: enabled 1
853 15:59:11.482701 APIC: 07: enabled 1
854 15:59:11.482755 APIC: 05: enabled 1
855 15:59:11.482831 APIC: 04: enabled 1
856 15:59:11.482889 APIC: 02: enabled 1
857 15:59:11.482944 APIC: 06: enabled 1
858 15:59:11.482999 Root Device scanning...
859 15:59:11.483055 scan_static_bus for Root Device
860 15:59:11.483110 DOMAIN: 0000 enabled
861 15:59:11.483164 CPU_CLUSTER: 0 enabled
862 15:59:11.483219 DOMAIN: 0000 scanning...
863 15:59:11.483274 PCI: pci_scan_bus for bus 00
864 15:59:11.483350 PCI: 00:00.0 [8086/0000] ops
865 15:59:11.483407 PCI: 00:00.0 [8086/9a12] enabled
866 15:59:11.483462 PCI: 00:02.0 [8086/0000] bus ops
867 15:59:11.483516 PCI: 00:02.0 [8086/9a40] enabled
868 15:59:11.483570 PCI: 00:04.0 [8086/0000] bus ops
869 15:59:11.483624 PCI: 00:04.0 [8086/9a03] enabled
870 15:59:11.483679 PCI: 00:05.0 [8086/9a19] enabled
871 15:59:11.483733 PCI: 00:07.0 [0000/0000] hidden
872 15:59:11.483788 PCI: 00:08.0 [8086/9a11] enabled
873 15:59:11.483842 PCI: 00:0a.0 [8086/9a0d] disabled
874 15:59:11.483900 PCI: 00:0d.0 [8086/0000] bus ops
875 15:59:11.483964 PCI: 00:0d.0 [8086/9a13] enabled
876 15:59:11.484023 PCI: 00:14.0 [8086/0000] bus ops
877 15:59:11.484078 PCI: 00:14.0 [8086/a0ed] enabled
878 15:59:11.484133 PCI: 00:14.2 [8086/a0ef] enabled
879 15:59:11.484188 PCI: 00:14.3 [8086/0000] bus ops
880 15:59:11.484242 PCI: 00:14.3 [8086/a0f0] enabled
881 15:59:11.484297 PCI: 00:15.0 [8086/0000] bus ops
882 15:59:11.484354 PCI: 00:15.0 [8086/a0e8] enabled
883 15:59:11.484409 PCI: 00:15.1 [8086/0000] bus ops
884 15:59:11.484463 PCI: 00:15.1 [8086/a0e9] enabled
885 15:59:11.484518 PCI: 00:15.2 [8086/0000] bus ops
886 15:59:11.484591 PCI: 00:15.2 [8086/a0ea] enabled
887 15:59:11.484648 PCI: 00:15.3 [8086/0000] bus ops
888 15:59:11.484718 PCI: 00:15.3 [8086/a0eb] enabled
889 15:59:11.484776 PCI: 00:16.0 [8086/0000] ops
890 15:59:11.484832 PCI: 00:16.0 [8086/a0e0] enabled
891 15:59:11.484890 PCI: Static device PCI: 00:17.0 not found, disabling it.
892 15:59:11.484948 PCI: 00:19.0 [8086/0000] bus ops
893 15:59:11.485003 PCI: 00:19.0 [8086/a0c5] disabled
894 15:59:11.485058 PCI: 00:19.1 [8086/0000] bus ops
895 15:59:11.485112 PCI: 00:19.1 [8086/a0c6] enabled
896 15:59:11.485167 PCI: 00:1d.0 [8086/0000] bus ops
897 15:59:11.485221 PCI: 00:1d.0 [8086/a0b0] enabled
898 15:59:11.485275 PCI: 00:1e.0 [8086/0000] ops
899 15:59:11.485330 PCI: 00:1e.0 [8086/a0a8] enabled
900 15:59:11.485408 PCI: 00:1e.2 [8086/0000] bus ops
901 15:59:11.485464 PCI: 00:1e.2 [8086/a0aa] enabled
902 15:59:11.485519 PCI: 00:1e.3 [8086/0000] bus ops
903 15:59:11.485573 PCI: 00:1e.3 [8086/a0ab] enabled
904 15:59:11.485627 PCI: 00:1f.0 [8086/0000] bus ops
905 15:59:11.485681 PCI: 00:1f.0 [8086/a087] enabled
906 15:59:11.485736 RTC Init
907 15:59:11.485790 Set power on after power failure.
908 15:59:11.485845 Disabling Deep S3
909 15:59:11.485921 Disabling Deep S3
910 15:59:11.485980 Disabling Deep S4
911 15:59:11.486034 Disabling Deep S4
912 15:59:11.486089 Disabling Deep S5
913 15:59:11.486143 Disabling Deep S5
914 15:59:11.486213 PCI: 00:1f.2 [0000/0000] hidden
915 15:59:11.486269 PCI: 00:1f.3 [8086/0000] bus ops
916 15:59:11.486323 PCI: 00:1f.3 [8086/a0c8] enabled
917 15:59:11.486378 PCI: 00:1f.5 [8086/0000] bus ops
918 15:59:11.486454 PCI: 00:1f.5 [8086/a0a4] enabled
919 15:59:11.486510 PCI: Leftover static devices:
920 15:59:11.486565 PCI: 00:10.2
921 15:59:11.486620 PCI: 00:10.6
922 15:59:11.486674 PCI: 00:10.7
923 15:59:11.486728 PCI: 00:06.0
924 15:59:11.486782 PCI: 00:07.1
925 15:59:11.486836 PCI: 00:07.2
926 15:59:11.486889 PCI: 00:07.3
927 15:59:11.486965 PCI: 00:09.0
928 15:59:11.487042 PCI: 00:0d.1
929 15:59:11.487099 PCI: 00:0d.2
930 15:59:11.487166 PCI: 00:0d.3
931 15:59:11.487221 PCI: 00:0e.0
932 15:59:11.487276 PCI: 00:12.0
933 15:59:11.487329 PCI: 00:12.6
934 15:59:11.487384 PCI: 00:13.0
935 15:59:11.487448 PCI: 00:14.1
936 15:59:11.487511 PCI: 00:16.1
937 15:59:11.487566 PCI: 00:16.2
938 15:59:11.487620 PCI: 00:16.3
939 15:59:11.487688 PCI: 00:16.4
940 15:59:11.487746 PCI: 00:16.5
941 15:59:11.487820 PCI: 00:17.0
942 15:59:11.487877 PCI: 00:19.2
943 15:59:11.487937 PCI: 00:1e.1
944 15:59:11.488005 PCI: 00:1f.1
945 15:59:11.488062 PCI: 00:1f.4
946 15:59:11.488117 PCI: 00:1f.6
947 15:59:11.488199 PCI: 00:1f.7
948 15:59:11.488285 PCI: Check your devicetree.cb.
949 15:59:11.488370 PCI: 00:02.0 scanning...
950 15:59:11.488467 scan_generic_bus for PCI: 00:02.0
951 15:59:11.488555 scan_generic_bus for PCI: 00:02.0 done
952 15:59:11.488641 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
953 15:59:11.488727 PCI: 00:04.0 scanning...
954 15:59:11.488812 scan_generic_bus for PCI: 00:04.0
955 15:59:11.488897 GENERIC: 0.0 enabled
956 15:59:11.488995 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
957 15:59:11.489084 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
958 15:59:11.489169 PCI: 00:0d.0 scanning...
959 15:59:11.489254 scan_static_bus for PCI: 00:0d.0
960 15:59:11.489338 USB0 port 0 enabled
961 15:59:11.489423 USB0 port 0 scanning...
962 15:59:11.489507 scan_static_bus for USB0 port 0
963 15:59:11.489565 USB3 port 0 enabled
964 15:59:11.489620 USB3 port 1 enabled
965 15:59:11.489675 USB3 port 2 disabled
966 15:59:11.489729 USB3 port 3 disabled
967 15:59:11.489784 USB3 port 0 scanning...
968 15:59:11.489838 scan_static_bus for USB3 port 0
969 15:59:11.489892 scan_static_bus for USB3 port 0 done
970 15:59:11.489947 scan_bus: bus USB3 port 0 finished in 6 msecs
971 15:59:11.490002 USB3 port 1 scanning...
972 15:59:11.490059 scan_static_bus for USB3 port 1
973 15:59:11.490130 scan_static_bus for USB3 port 1 done
974 15:59:11.490211 scan_bus: bus USB3 port 1 finished in 6 msecs
975 15:59:11.490287 scan_static_bus for USB0 port 0 done
976 15:59:11.490345 scan_bus: bus USB0 port 0 finished in 43 msecs
977 15:59:11.490400 scan_static_bus for PCI: 00:0d.0 done
978 15:59:11.490456 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
979 15:59:11.490514 PCI: 00:14.0 scanning...
980 15:59:11.490582 scan_static_bus for PCI: 00:14.0
981 15:59:11.490641 USB0 port 0 enabled
982 15:59:11.490696 USB0 port 0 scanning...
983 15:59:11.490750 scan_static_bus for USB0 port 0
984 15:59:11.490805 USB2 port 0 disabled
985 15:59:11.490859 USB2 port 1 enabled
986 15:59:11.490913 USB2 port 2 enabled
987 15:59:11.490968 USB2 port 3 disabled
988 15:59:11.491025 USB2 port 4 enabled
989 15:59:11.491082 USB2 port 5 disabled
990 15:59:11.491137 USB2 port 6 disabled
991 15:59:11.491190 USB2 port 7 disabled
992 15:59:11.491245 USB2 port 8 disabled
993 15:59:11.491299 USB2 port 9 disabled
994 15:59:11.491353 USB3 port 0 disabled
995 15:59:11.491407 USB3 port 1 enabled
996 15:59:11.491461 USB3 port 2 disabled
997 15:59:11.491515 USB3 port 3 disabled
998 15:59:11.491770 USB2 port 1 scanning...
999 15:59:11.491831 scan_static_bus for USB2 port 1
1000 15:59:11.491887 scan_static_bus for USB2 port 1 done
1001 15:59:11.491942 scan_bus: bus USB2 port 1 finished in 6 msecs
1002 15:59:11.491997 USB2 port 2 scanning...
1003 15:59:11.492055 scan_static_bus for USB2 port 2
1004 15:59:11.492110 scan_static_bus for USB2 port 2 done
1005 15:59:11.492179 scan_bus: bus USB2 port 2 finished in 6 msecs
1006 15:59:11.492236 USB2 port 4 scanning...
1007 15:59:11.492292 scan_static_bus for USB2 port 4
1008 15:59:11.492346 scan_static_bus for USB2 port 4 done
1009 15:59:11.492401 scan_bus: bus USB2 port 4 finished in 6 msecs
1010 15:59:11.492455 USB3 port 1 scanning...
1011 15:59:11.492510 scan_static_bus for USB3 port 1
1012 15:59:11.492565 scan_static_bus for USB3 port 1 done
1013 15:59:11.492623 scan_bus: bus USB3 port 1 finished in 6 msecs
1014 15:59:11.492678 scan_static_bus for USB0 port 0 done
1015 15:59:11.492753 scan_bus: bus USB0 port 0 finished in 93 msecs
1016 15:59:11.492810 scan_static_bus for PCI: 00:14.0 done
1017 15:59:11.492865 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1018 15:59:11.492921 PCI: 00:14.3 scanning...
1019 15:59:11.492977 scan_static_bus for PCI: 00:14.3
1020 15:59:11.493032 GENERIC: 0.0 enabled
1021 15:59:11.493123 scan_static_bus for PCI: 00:14.3 done
1022 15:59:11.493212 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1023 15:59:11.493297 PCI: 00:15.0 scanning...
1024 15:59:11.493383 scan_static_bus for PCI: 00:15.0
1025 15:59:11.493474 I2C: 00:1a enabled
1026 15:59:11.493571 I2C: 00:31 enabled
1027 15:59:11.493635 I2C: 00:32 enabled
1028 15:59:11.493691 scan_static_bus for PCI: 00:15.0 done
1029 15:59:11.493747 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1030 15:59:11.493801 PCI: 00:15.1 scanning...
1031 15:59:11.493860 scan_static_bus for PCI: 00:15.1
1032 15:59:11.493952 I2C: 00:10 enabled
1033 15:59:11.494044 scan_static_bus for PCI: 00:15.1 done
1034 15:59:11.494144 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1035 15:59:11.494224 PCI: 00:15.2 scanning...
1036 15:59:11.494281 scan_static_bus for PCI: 00:15.2
1037 15:59:11.494336 scan_static_bus for PCI: 00:15.2 done
1038 15:59:11.494391 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1039 15:59:11.494446 PCI: 00:15.3 scanning...
1040 15:59:11.494500 scan_static_bus for PCI: 00:15.3
1041 15:59:11.494554 scan_static_bus for PCI: 00:15.3 done
1042 15:59:11.494621 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1043 15:59:11.494683 PCI: 00:19.1 scanning...
1044 15:59:11.494737 scan_static_bus for PCI: 00:19.1
1045 15:59:11.494791 I2C: 00:15 enabled
1046 15:59:11.494845 scan_static_bus for PCI: 00:19.1 done
1047 15:59:11.494900 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1048 15:59:11.494954 PCI: 00:1d.0 scanning...
1049 15:59:11.495009 do_pci_scan_bridge for PCI: 00:1d.0
1050 15:59:11.495063 PCI: pci_scan_bus for bus 01
1051 15:59:11.495122 PCI: 01:00.0 [1c5c/174a] enabled
1052 15:59:11.495190 GENERIC: 0.0 enabled
1053 15:59:11.495246 Enabling Common Clock Configuration
1054 15:59:11.495300 L1 Sub-State supported from root port 29
1055 15:59:11.495355 L1 Sub-State Support = 0xf
1056 15:59:11.495409 CommonModeRestoreTime = 0x28
1057 15:59:11.495463 Power On Value = 0x16, Power On Scale = 0x0
1058 15:59:11.495517 ASPM: Enabled L1
1059 15:59:11.495574 PCIe: Max_Payload_Size adjusted to 128
1060 15:59:11.495656 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1061 15:59:11.495714 PCI: 00:1e.2 scanning...
1062 15:59:11.495769 scan_generic_bus for PCI: 00:1e.2
1063 15:59:11.495823 SPI: 00 enabled
1064 15:59:11.495877 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1065 15:59:11.495931 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1066 15:59:11.495986 PCI: 00:1e.3 scanning...
1067 15:59:11.496040 scan_generic_bus for PCI: 00:1e.3
1068 15:59:11.496094 SPI: 00 enabled
1069 15:59:11.496156 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1070 15:59:11.496234 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1071 15:59:11.496292 PCI: 00:1f.0 scanning...
1072 15:59:11.496346 scan_static_bus for PCI: 00:1f.0
1073 15:59:11.496401 PNP: 0c09.0 enabled
1074 15:59:11.496455 PNP: 0c09.0 scanning...
1075 15:59:11.496509 scan_static_bus for PNP: 0c09.0
1076 15:59:11.496563 scan_static_bus for PNP: 0c09.0 done
1077 15:59:11.496617 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1078 15:59:11.496681 scan_static_bus for PCI: 00:1f.0 done
1079 15:59:11.496744 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1080 15:59:11.496818 PCI: 00:1f.2 scanning...
1081 15:59:11.496904 scan_static_bus for PCI: 00:1f.2
1082 15:59:11.496988 GENERIC: 0.0 enabled
1083 15:59:11.497072 GENERIC: 0.0 scanning...
1084 15:59:11.497156 scan_static_bus for GENERIC: 0.0
1085 15:59:11.497240 GENERIC: 0.0 enabled
1086 15:59:11.497298 GENERIC: 1.0 enabled
1087 15:59:11.497353 scan_static_bus for GENERIC: 0.0 done
1088 15:59:11.497408 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1089 15:59:11.497462 scan_static_bus for PCI: 00:1f.2 done
1090 15:59:11.497544 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1091 15:59:11.497603 PCI: 00:1f.3 scanning...
1092 15:59:11.497658 scan_static_bus for PCI: 00:1f.3
1093 15:59:11.497741 scan_static_bus for PCI: 00:1f.3 done
1094 15:59:11.497827 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1095 15:59:11.497911 PCI: 00:1f.5 scanning...
1096 15:59:11.497995 scan_generic_bus for PCI: 00:1f.5
1097 15:59:11.498079 scan_generic_bus for PCI: 00:1f.5 done
1098 15:59:11.498168 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1099 15:59:11.498238 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1100 15:59:11.498304 scan_static_bus for Root Device done
1101 15:59:11.498361 scan_bus: bus Root Device finished in 736 msecs
1102 15:59:11.498416 done
1103 15:59:11.498470 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1104 15:59:11.498524 Chrome EC: UHEPI supported
1105 15:59:11.498579 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1106 15:59:11.498647 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1107 15:59:11.498705 SPI flash protection: WPSW=0 SRP0=0
1108 15:59:11.498781 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1109 15:59:11.498838 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1110 15:59:11.498893 found VGA at PCI: 00:02.0
1111 15:59:11.498947 Setting up VGA for PCI: 00:02.0
1112 15:59:11.499192 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1113 15:59:11.499258 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1114 15:59:11.499328 Allocating resources...
1115 15:59:11.499397 Reading resources...
1116 15:59:11.499456 Root Device read_resources bus 0 link: 0
1117 15:59:11.499524 DOMAIN: 0000 read_resources bus 0 link: 0
1118 15:59:11.499582 PCI: 00:04.0 read_resources bus 1 link: 0
1119 15:59:11.499637 PCI: 00:04.0 read_resources bus 1 link: 0 done
1120 15:59:11.499691 PCI: 00:0d.0 read_resources bus 0 link: 0
1121 15:59:11.499748 USB0 port 0 read_resources bus 0 link: 0
1122 15:59:11.499845 USB0 port 0 read_resources bus 0 link: 0 done
1123 15:59:11.499930 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1124 15:59:11.500014 PCI: 00:14.0 read_resources bus 0 link: 0
1125 15:59:11.500098 USB0 port 0 read_resources bus 0 link: 0
1126 15:59:11.500183 USB0 port 0 read_resources bus 0 link: 0 done
1127 15:59:11.500270 PCI: 00:14.0 read_resources bus 0 link: 0 done
1128 15:59:11.500365 PCI: 00:14.3 read_resources bus 0 link: 0
1129 15:59:11.500461 PCI: 00:14.3 read_resources bus 0 link: 0 done
1130 15:59:11.500547 PCI: 00:15.0 read_resources bus 0 link: 0
1131 15:59:11.500631 PCI: 00:15.0 read_resources bus 0 link: 0 done
1132 15:59:11.500715 PCI: 00:15.1 read_resources bus 0 link: 0
1133 15:59:11.500806 PCI: 00:15.1 read_resources bus 0 link: 0 done
1134 15:59:11.500897 PCI: 00:19.1 read_resources bus 0 link: 0
1135 15:59:11.500982 PCI: 00:19.1 read_resources bus 0 link: 0 done
1136 15:59:11.501074 PCI: 00:1d.0 read_resources bus 1 link: 0
1137 15:59:11.501161 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1138 15:59:11.501245 PCI: 00:1e.2 read_resources bus 2 link: 0
1139 15:59:11.501336 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1140 15:59:11.501395 PCI: 00:1e.3 read_resources bus 3 link: 0
1141 15:59:11.501450 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1142 15:59:11.501516 PCI: 00:1f.0 read_resources bus 0 link: 0
1143 15:59:11.501574 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1144 15:59:11.501629 PCI: 00:1f.2 read_resources bus 0 link: 0
1145 15:59:11.501682 GENERIC: 0.0 read_resources bus 0 link: 0
1146 15:59:11.501736 GENERIC: 0.0 read_resources bus 0 link: 0 done
1147 15:59:11.501796 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1148 15:59:11.501890 DOMAIN: 0000 read_resources bus 0 link: 0 done
1149 15:59:11.501975 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1150 15:59:11.502059 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1151 15:59:11.502144 Root Device read_resources bus 0 link: 0 done
1152 15:59:11.502233 Done reading resources.
1153 15:59:11.502299 Show resources in subtree (Root Device)...After reading.
1154 15:59:11.502366 Root Device child on link 0 DOMAIN: 0000
1155 15:59:11.502423 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1156 15:59:11.502478 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1157 15:59:11.502534 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1158 15:59:11.502589 PCI: 00:00.0
1159 15:59:11.502644 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1160 15:59:11.502699 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1161 15:59:11.502754 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1162 15:59:11.502815 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1163 15:59:11.502895 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1164 15:59:11.502954 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1165 15:59:11.503022 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1166 15:59:11.503081 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1167 15:59:11.503136 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1168 15:59:11.503192 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1169 15:59:11.503246 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1170 15:59:11.503307 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1171 15:59:11.503388 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1172 15:59:11.503446 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1173 15:59:11.503501 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1174 15:59:11.503557 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1175 15:59:11.503612 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1176 15:59:11.503667 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1177 15:59:11.503722 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1178 15:59:11.503966 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1179 15:59:11.504029 PCI: 00:02.0
1180 15:59:11.504084 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1181 15:59:11.504140 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1182 15:59:11.504195 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1183 15:59:11.504250 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1184 15:59:11.504306 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1185 15:59:11.504383 GENERIC: 0.0
1186 15:59:11.504442 PCI: 00:05.0
1187 15:59:11.504497 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1188 15:59:11.504558 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1189 15:59:11.504624 GENERIC: 0.0
1190 15:59:11.504678 PCI: 00:08.0
1191 15:59:11.504732 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 15:59:11.504787 PCI: 00:0a.0
1193 15:59:11.504841 PCI: 00:0d.0 child on link 0 USB0 port 0
1194 15:59:11.504917 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1195 15:59:11.504973 USB0 port 0 child on link 0 USB3 port 0
1196 15:59:11.505027 USB3 port 0
1197 15:59:11.505081 USB3 port 1
1198 15:59:11.505135 USB3 port 2
1199 15:59:11.505188 USB3 port 3
1200 15:59:11.505254 PCI: 00:14.0 child on link 0 USB0 port 0
1201 15:59:11.505313 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1202 15:59:11.505376 USB0 port 0 child on link 0 USB2 port 0
1203 15:59:11.505441 USB2 port 0
1204 15:59:11.505514 USB2 port 1
1205 15:59:11.505599 USB2 port 2
1206 15:59:11.505682 USB2 port 3
1207 15:59:11.506167 USB2 port 4
1208 15:59:11.506239 USB2 port 5
1209 15:59:11.509178 USB2 port 6
1210 15:59:11.509288 USB2 port 7
1211 15:59:11.512620 USB2 port 8
1212 15:59:11.512706 USB2 port 9
1213 15:59:11.515982 USB3 port 0
1214 15:59:11.519000 USB3 port 1
1215 15:59:11.519080 USB3 port 2
1216 15:59:11.522129 USB3 port 3
1217 15:59:11.522221 PCI: 00:14.2
1218 15:59:11.532470 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 15:59:11.542095 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1220 15:59:11.548835 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1221 15:59:11.558788 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 15:59:11.558871 GENERIC: 0.0
1223 15:59:11.561728 PCI: 00:15.0 child on link 0 I2C: 00:1a
1224 15:59:11.572022 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1225 15:59:11.575099 I2C: 00:1a
1226 15:59:11.575175 I2C: 00:31
1227 15:59:11.578135 I2C: 00:32
1228 15:59:11.581325 PCI: 00:15.1 child on link 0 I2C: 00:10
1229 15:59:11.591353 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 15:59:11.594372 I2C: 00:10
1231 15:59:11.594443 PCI: 00:15.2
1232 15:59:11.604642 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 15:59:11.607921 PCI: 00:15.3
1234 15:59:11.617880 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 15:59:11.617961 PCI: 00:16.0
1236 15:59:11.628034 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 15:59:11.630786 PCI: 00:19.0
1238 15:59:11.634519 PCI: 00:19.1 child on link 0 I2C: 00:15
1239 15:59:11.644285 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 15:59:11.647296 I2C: 00:15
1241 15:59:11.651005 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1242 15:59:11.660655 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1243 15:59:11.670244 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1244 15:59:11.677060 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1245 15:59:11.680082 GENERIC: 0.0
1246 15:59:11.680156 PCI: 01:00.0
1247 15:59:11.689944 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1248 15:59:11.700037 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1249 15:59:11.709778 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1250 15:59:11.713413 PCI: 00:1e.0
1251 15:59:11.722991 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1252 15:59:11.726653 PCI: 00:1e.2 child on link 0 SPI: 00
1253 15:59:11.736325 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 15:59:11.739779 SPI: 00
1255 15:59:11.742840 PCI: 00:1e.3 child on link 0 SPI: 00
1256 15:59:11.753108 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 15:59:11.753220 SPI: 00
1258 15:59:11.756217 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1259 15:59:11.766268 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1260 15:59:11.769797 PNP: 0c09.0
1261 15:59:11.776033 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1262 15:59:11.782394 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1263 15:59:11.792472 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1264 15:59:11.799846 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1265 15:59:11.805539 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1266 15:59:11.805640 GENERIC: 0.0
1267 15:59:11.809313 GENERIC: 1.0
1268 15:59:11.809391 PCI: 00:1f.3
1269 15:59:11.819172 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1270 15:59:11.828789 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1271 15:59:11.832146 PCI: 00:1f.5
1272 15:59:11.841852 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1273 15:59:11.845301 CPU_CLUSTER: 0 child on link 0 APIC: 00
1274 15:59:11.845394 APIC: 00
1275 15:59:11.848477 APIC: 01
1276 15:59:11.848561 APIC: 03
1277 15:59:11.851610 APIC: 07
1278 15:59:11.851694 APIC: 05
1279 15:59:11.851760 APIC: 04
1280 15:59:11.855271 APIC: 02
1281 15:59:11.855353 APIC: 06
1282 15:59:11.862125 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1283 15:59:11.868298 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1284 15:59:11.874851 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1285 15:59:11.881572 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1286 15:59:11.884488 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1287 15:59:11.887964 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1288 15:59:11.894607 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1289 15:59:11.901320 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1290 15:59:11.908313 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1291 15:59:11.914599 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1292 15:59:11.924504 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1293 15:59:11.931349 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1294 15:59:11.937602 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1295 15:59:11.944308 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1296 15:59:11.950621 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1297 15:59:11.953933 DOMAIN: 0000: Resource ranges:
1298 15:59:11.957257 * Base: 1000, Size: 800, Tag: 100
1299 15:59:11.963908 * Base: 1900, Size: e700, Tag: 100
1300 15:59:11.967084 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1301 15:59:11.973609 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1302 15:59:11.980244 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1303 15:59:11.990330 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1304 15:59:11.996541 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1305 15:59:12.003289 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1306 15:59:12.013449 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1307 15:59:12.020251 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1308 15:59:12.026510 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1309 15:59:12.036561 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1310 15:59:12.043092 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1311 15:59:12.049426 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1312 15:59:12.059223 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1313 15:59:12.065903 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1314 15:59:12.072828 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1315 15:59:12.082563 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1316 15:59:12.089173 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1317 15:59:12.095285 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1318 15:59:12.105469 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1319 15:59:12.112095 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1320 15:59:12.118854 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1321 15:59:12.128653 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1322 15:59:12.135398 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1323 15:59:12.141612 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1324 15:59:12.152076 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1325 15:59:12.155048 DOMAIN: 0000: Resource ranges:
1326 15:59:12.158706 * Base: 7fc00000, Size: 40400000, Tag: 200
1327 15:59:12.161887 * Base: d0000000, Size: 28000000, Tag: 200
1328 15:59:12.168322 * Base: fa000000, Size: 1000000, Tag: 200
1329 15:59:12.171569 * Base: fb001000, Size: 2fff000, Tag: 200
1330 15:59:12.174773 * Base: fe010000, Size: 2e000, Tag: 200
1331 15:59:12.178292 * Base: fe03f000, Size: d41000, Tag: 200
1332 15:59:12.184856 * Base: fed88000, Size: 8000, Tag: 200
1333 15:59:12.188011 * Base: fed93000, Size: d000, Tag: 200
1334 15:59:12.191756 * Base: feda2000, Size: 1e000, Tag: 200
1335 15:59:12.194833 * Base: fede0000, Size: 1220000, Tag: 200
1336 15:59:12.201650 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1337 15:59:12.208176 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1338 15:59:12.214924 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1339 15:59:12.221275 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1340 15:59:12.227981 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1341 15:59:12.234336 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1342 15:59:12.241179 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1343 15:59:12.247782 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1344 15:59:12.254531 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1345 15:59:12.261178 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1346 15:59:12.267499 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1347 15:59:12.274234 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1348 15:59:12.280956 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1349 15:59:12.287732 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1350 15:59:12.294115 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1351 15:59:12.300796 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1352 15:59:12.307464 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1353 15:59:12.314030 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1354 15:59:12.320827 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1355 15:59:12.327406 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1356 15:59:12.333757 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1357 15:59:12.340654 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1358 15:59:12.346923 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1359 15:59:12.353678 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1360 15:59:12.363915 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1361 15:59:12.367179 PCI: 00:1d.0: Resource ranges:
1362 15:59:12.370373 * Base: 7fc00000, Size: 100000, Tag: 200
1363 15:59:12.377315 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1364 15:59:12.383952 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1365 15:59:12.390380 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1366 15:59:12.400265 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1367 15:59:12.407061 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1368 15:59:12.409898 Root Device assign_resources, bus 0 link: 0
1369 15:59:12.413492 DOMAIN: 0000 assign_resources, bus 0 link: 0
1370 15:59:12.423930 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1371 15:59:12.430059 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1372 15:59:12.440718 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1373 15:59:12.446955 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1374 15:59:12.453506 PCI: 00:04.0 assign_resources, bus 1 link: 0
1375 15:59:12.456745 PCI: 00:04.0 assign_resources, bus 1 link: 0
1376 15:59:12.466943 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1377 15:59:12.473259 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1378 15:59:12.483397 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1379 15:59:12.486387 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1380 15:59:12.489470 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1381 15:59:12.499640 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1382 15:59:12.503056 PCI: 00:14.0 assign_resources, bus 0 link: 0
1383 15:59:12.509552 PCI: 00:14.0 assign_resources, bus 0 link: 0
1384 15:59:12.516108 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1385 15:59:12.526409 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1386 15:59:12.532594 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1387 15:59:12.536573 PCI: 00:14.3 assign_resources, bus 0 link: 0
1388 15:59:12.542426 PCI: 00:14.3 assign_resources, bus 0 link: 0
1389 15:59:12.549441 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1390 15:59:12.555930 PCI: 00:15.0 assign_resources, bus 0 link: 0
1391 15:59:12.558918 PCI: 00:15.0 assign_resources, bus 0 link: 0
1392 15:59:12.568886 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1393 15:59:12.572382 PCI: 00:15.1 assign_resources, bus 0 link: 0
1394 15:59:12.575602 PCI: 00:15.1 assign_resources, bus 0 link: 0
1395 15:59:12.585697 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1396 15:59:12.592003 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1397 15:59:12.601726 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1398 15:59:12.608646 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1399 15:59:12.615163 PCI: 00:19.1 assign_resources, bus 0 link: 0
1400 15:59:12.618698 PCI: 00:19.1 assign_resources, bus 0 link: 0
1401 15:59:12.628307 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1402 15:59:12.638470 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1403 15:59:12.644552 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1404 15:59:12.651530 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1405 15:59:12.658364 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1406 15:59:12.668080 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1407 15:59:12.674581 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1408 15:59:12.677686 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1409 15:59:12.688381 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1410 15:59:12.691513 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1411 15:59:12.698466 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1412 15:59:12.704721 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1413 15:59:12.711516 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1414 15:59:12.714205 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1415 15:59:12.717913 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1416 15:59:12.724776 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1417 15:59:12.728349 LPC: Trying to open IO window from 800 size 1ff
1418 15:59:12.737906 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1419 15:59:12.744488 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1420 15:59:12.754911 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1421 15:59:12.758057 DOMAIN: 0000 assign_resources, bus 0 link: 0
1422 15:59:12.764232 Root Device assign_resources, bus 0 link: 0
1423 15:59:12.764311 Done setting resources.
1424 15:59:12.771106 Show resources in subtree (Root Device)...After assigning values.
1425 15:59:12.777759 Root Device child on link 0 DOMAIN: 0000
1426 15:59:12.780708 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1427 15:59:12.790929 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1428 15:59:12.800766 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1429 15:59:12.800848 PCI: 00:00.0
1430 15:59:12.810627 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1431 15:59:12.820593 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1432 15:59:12.830571 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1433 15:59:12.840347 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1434 15:59:12.847027 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1435 15:59:12.857224 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1436 15:59:12.867266 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1437 15:59:12.877119 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1438 15:59:12.886749 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1439 15:59:12.896775 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1440 15:59:12.903136 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1441 15:59:12.913514 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1442 15:59:12.923199 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1443 15:59:12.933024 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1444 15:59:12.942891 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1445 15:59:12.953585 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1446 15:59:12.962774 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1447 15:59:12.969734 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1448 15:59:12.979318 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1449 15:59:12.989791 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1450 15:59:12.992856 PCI: 00:02.0
1451 15:59:13.002882 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1452 15:59:13.012679 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1453 15:59:13.022649 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1454 15:59:13.025848 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1455 15:59:13.035923 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1456 15:59:13.039117 GENERIC: 0.0
1457 15:59:13.039190 PCI: 00:05.0
1458 15:59:13.052773 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1459 15:59:13.055764 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1460 15:59:13.055845 GENERIC: 0.0
1461 15:59:13.058988 PCI: 00:08.0
1462 15:59:13.068710 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1463 15:59:13.072384 PCI: 00:0a.0
1464 15:59:13.075382 PCI: 00:0d.0 child on link 0 USB0 port 0
1465 15:59:13.085487 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1466 15:59:13.088603 USB0 port 0 child on link 0 USB3 port 0
1467 15:59:13.092464 USB3 port 0
1468 15:59:13.096073 USB3 port 1
1469 15:59:13.096155 USB3 port 2
1470 15:59:13.098782 USB3 port 3
1471 15:59:13.102057 PCI: 00:14.0 child on link 0 USB0 port 0
1472 15:59:13.111934 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1473 15:59:13.115572 USB0 port 0 child on link 0 USB2 port 0
1474 15:59:13.118624 USB2 port 0
1475 15:59:13.118717 USB2 port 1
1476 15:59:13.121607 USB2 port 2
1477 15:59:13.125308 USB2 port 3
1478 15:59:13.125410 USB2 port 4
1479 15:59:13.128455 USB2 port 5
1480 15:59:13.128565 USB2 port 6
1481 15:59:13.131710 USB2 port 7
1482 15:59:13.131791 USB2 port 8
1483 15:59:13.135179 USB2 port 9
1484 15:59:13.135260 USB3 port 0
1485 15:59:13.138667 USB3 port 1
1486 15:59:13.138749 USB3 port 2
1487 15:59:13.141779 USB3 port 3
1488 15:59:13.141861 PCI: 00:14.2
1489 15:59:13.151457 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1490 15:59:13.164493 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1491 15:59:13.168100 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1492 15:59:13.177954 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1493 15:59:13.181240 GENERIC: 0.0
1494 15:59:13.184862 PCI: 00:15.0 child on link 0 I2C: 00:1a
1495 15:59:13.194225 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1496 15:59:13.197761 I2C: 00:1a
1497 15:59:13.197880 I2C: 00:31
1498 15:59:13.201148 I2C: 00:32
1499 15:59:13.204201 PCI: 00:15.1 child on link 0 I2C: 00:10
1500 15:59:13.213949 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1501 15:59:13.214055 I2C: 00:10
1502 15:59:13.217284 PCI: 00:15.2
1503 15:59:13.227931 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1504 15:59:13.230908 PCI: 00:15.3
1505 15:59:13.241052 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1506 15:59:13.241133 PCI: 00:16.0
1507 15:59:13.250863 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1508 15:59:13.253857 PCI: 00:19.0
1509 15:59:13.257028 PCI: 00:19.1 child on link 0 I2C: 00:15
1510 15:59:13.267162 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1511 15:59:13.270692 I2C: 00:15
1512 15:59:13.273595 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1513 15:59:13.284015 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1514 15:59:13.293793 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1515 15:59:13.306616 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1516 15:59:13.306699 GENERIC: 0.0
1517 15:59:13.310322 PCI: 01:00.0
1518 15:59:13.320171 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1519 15:59:13.329891 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1520 15:59:13.339849 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1521 15:59:13.342952 PCI: 00:1e.0
1522 15:59:13.352906 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1523 15:59:13.356636 PCI: 00:1e.2 child on link 0 SPI: 00
1524 15:59:13.366354 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1525 15:59:13.369319 SPI: 00
1526 15:59:13.372976 PCI: 00:1e.3 child on link 0 SPI: 00
1527 15:59:13.383032 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1528 15:59:13.383121 SPI: 00
1529 15:59:13.389371 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1530 15:59:13.396474 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1531 15:59:13.399653 PNP: 0c09.0
1532 15:59:13.409435 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1533 15:59:13.412553 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1534 15:59:13.422738 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1535 15:59:13.432532 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1536 15:59:13.435656 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1537 15:59:13.439200 GENERIC: 0.0
1538 15:59:13.439273 GENERIC: 1.0
1539 15:59:13.442263 PCI: 00:1f.3
1540 15:59:13.452072 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1541 15:59:13.461968 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1542 15:59:13.462056 PCI: 00:1f.5
1543 15:59:13.475509 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1544 15:59:13.478694 CPU_CLUSTER: 0 child on link 0 APIC: 00
1545 15:59:13.478817 APIC: 00
1546 15:59:13.481997 APIC: 01
1547 15:59:13.482072 APIC: 03
1548 15:59:13.482170 APIC: 07
1549 15:59:13.484966 APIC: 05
1550 15:59:13.485059 APIC: 04
1551 15:59:13.488792 APIC: 02
1552 15:59:13.488864 APIC: 06
1553 15:59:13.491946 Done allocating resources.
1554 15:59:13.498437 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1555 15:59:13.501441 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1556 15:59:13.508360 Configure GPIOs for I2S audio on UP4.
1557 15:59:13.514595 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1558 15:59:13.514679 Enabling resources...
1559 15:59:13.521558 PCI: 00:00.0 subsystem <- 8086/9a12
1560 15:59:13.521641 PCI: 00:00.0 cmd <- 06
1561 15:59:13.525206 PCI: 00:02.0 subsystem <- 8086/9a40
1562 15:59:13.527933 PCI: 00:02.0 cmd <- 03
1563 15:59:13.531531 PCI: 00:04.0 subsystem <- 8086/9a03
1564 15:59:13.534532 PCI: 00:04.0 cmd <- 02
1565 15:59:13.538346 PCI: 00:05.0 subsystem <- 8086/9a19
1566 15:59:13.541499 PCI: 00:05.0 cmd <- 02
1567 15:59:13.544571 PCI: 00:08.0 subsystem <- 8086/9a11
1568 15:59:13.548320 PCI: 00:08.0 cmd <- 06
1569 15:59:13.550916 PCI: 00:0d.0 subsystem <- 8086/9a13
1570 15:59:13.554350 PCI: 00:0d.0 cmd <- 02
1571 15:59:13.558011 PCI: 00:14.0 subsystem <- 8086/a0ed
1572 15:59:13.560963 PCI: 00:14.0 cmd <- 02
1573 15:59:13.564032 PCI: 00:14.2 subsystem <- 8086/a0ef
1574 15:59:13.564108 PCI: 00:14.2 cmd <- 02
1575 15:59:13.571075 PCI: 00:14.3 subsystem <- 8086/a0f0
1576 15:59:13.571157 PCI: 00:14.3 cmd <- 02
1577 15:59:13.574256 PCI: 00:15.0 subsystem <- 8086/a0e8
1578 15:59:13.577409 PCI: 00:15.0 cmd <- 02
1579 15:59:13.581194 PCI: 00:15.1 subsystem <- 8086/a0e9
1580 15:59:13.584325 PCI: 00:15.1 cmd <- 02
1581 15:59:13.587661 PCI: 00:15.2 subsystem <- 8086/a0ea
1582 15:59:13.591041 PCI: 00:15.2 cmd <- 02
1583 15:59:13.593969 PCI: 00:15.3 subsystem <- 8086/a0eb
1584 15:59:13.597434 PCI: 00:15.3 cmd <- 02
1585 15:59:13.600472 PCI: 00:16.0 subsystem <- 8086/a0e0
1586 15:59:13.603572 PCI: 00:16.0 cmd <- 02
1587 15:59:13.607483 PCI: 00:19.1 subsystem <- 8086/a0c6
1588 15:59:13.610611 PCI: 00:19.1 cmd <- 02
1589 15:59:13.613664 PCI: 00:1d.0 bridge ctrl <- 0013
1590 15:59:13.616802 PCI: 00:1d.0 subsystem <- 8086/a0b0
1591 15:59:13.620484 PCI: 00:1d.0 cmd <- 06
1592 15:59:13.623467 PCI: 00:1e.0 subsystem <- 8086/a0a8
1593 15:59:13.626561 PCI: 00:1e.0 cmd <- 06
1594 15:59:13.629720 PCI: 00:1e.2 subsystem <- 8086/a0aa
1595 15:59:13.629803 PCI: 00:1e.2 cmd <- 06
1596 15:59:13.636251 PCI: 00:1e.3 subsystem <- 8086/a0ab
1597 15:59:13.636343 PCI: 00:1e.3 cmd <- 02
1598 15:59:13.639923 PCI: 00:1f.0 subsystem <- 8086/a087
1599 15:59:13.643091 PCI: 00:1f.0 cmd <- 407
1600 15:59:13.646254 PCI: 00:1f.3 subsystem <- 8086/a0c8
1601 15:59:13.649431 PCI: 00:1f.3 cmd <- 02
1602 15:59:13.653086 PCI: 00:1f.5 subsystem <- 8086/a0a4
1603 15:59:13.656216 PCI: 00:1f.5 cmd <- 406
1604 15:59:13.660779 PCI: 01:00.0 cmd <- 02
1605 15:59:13.665034 done.
1606 15:59:13.668519 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1607 15:59:13.671858 Initializing devices...
1608 15:59:13.675303 Root Device init
1609 15:59:13.678352 Chrome EC: Set SMI mask to 0x0000000000000000
1610 15:59:13.685818 Chrome EC: clear events_b mask to 0x0000000000000000
1611 15:59:13.692108 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1612 15:59:13.698499 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1613 15:59:13.705131 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1614 15:59:13.708506 Chrome EC: Set WAKE mask to 0x0000000000000000
1615 15:59:13.716518 fw_config match found: DB_USB=USB3_ACTIVE
1616 15:59:13.719545 Configure Right Type-C port orientation for retimer
1617 15:59:13.723134 Root Device init finished in 46 msecs
1618 15:59:13.727566 PCI: 00:00.0 init
1619 15:59:13.730683 CPU TDP = 9 Watts
1620 15:59:13.730757 CPU PL1 = 9 Watts
1621 15:59:13.733822 CPU PL2 = 40 Watts
1622 15:59:13.737457 CPU PL4 = 83 Watts
1623 15:59:13.740847 PCI: 00:00.0 init finished in 8 msecs
1624 15:59:13.743987 PCI: 00:02.0 init
1625 15:59:13.744059 GMA: Found VBT in CBFS
1626 15:59:13.747039 GMA: Found valid VBT in CBFS
1627 15:59:13.753429 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1628 15:59:13.760163 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1629 15:59:13.763454 PCI: 00:02.0 init finished in 18 msecs
1630 15:59:13.766968 PCI: 00:05.0 init
1631 15:59:13.770127 PCI: 00:05.0 init finished in 0 msecs
1632 15:59:13.773595 PCI: 00:08.0 init
1633 15:59:13.776855 PCI: 00:08.0 init finished in 0 msecs
1634 15:59:13.780086 PCI: 00:14.0 init
1635 15:59:13.783091 PCI: 00:14.0 init finished in 0 msecs
1636 15:59:13.786790 PCI: 00:14.2 init
1637 15:59:13.789831 PCI: 00:14.2 init finished in 0 msecs
1638 15:59:13.792956 PCI: 00:15.0 init
1639 15:59:13.796706 I2C bus 0 version 0x3230302a
1640 15:59:13.799892 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1641 15:59:13.803022 PCI: 00:15.0 init finished in 6 msecs
1642 15:59:13.806125 PCI: 00:15.1 init
1643 15:59:13.810026 I2C bus 1 version 0x3230302a
1644 15:59:13.812827 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1645 15:59:13.816399 PCI: 00:15.1 init finished in 6 msecs
1646 15:59:13.816751 PCI: 00:15.2 init
1647 15:59:13.819635 I2C bus 2 version 0x3230302a
1648 15:59:13.822722 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1649 15:59:13.829283 PCI: 00:15.2 init finished in 6 msecs
1650 15:59:13.829563 PCI: 00:15.3 init
1651 15:59:13.832528 I2C bus 3 version 0x3230302a
1652 15:59:13.836153 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1653 15:59:13.842310 PCI: 00:15.3 init finished in 6 msecs
1654 15:59:13.842701 PCI: 00:16.0 init
1655 15:59:13.846034 PCI: 00:16.0 init finished in 0 msecs
1656 15:59:13.849415 PCI: 00:19.1 init
1657 15:59:13.852384 I2C bus 5 version 0x3230302a
1658 15:59:13.855558 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1659 15:59:13.859247 PCI: 00:19.1 init finished in 6 msecs
1660 15:59:13.862309 PCI: 00:1d.0 init
1661 15:59:13.865607 Initializing PCH PCIe bridge.
1662 15:59:13.869156 PCI: 00:1d.0 init finished in 3 msecs
1663 15:59:13.872020 PCI: 00:1f.0 init
1664 15:59:13.875453 IOAPIC: Initializing IOAPIC at 0xfec00000
1665 15:59:13.881841 IOAPIC: Bootstrap Processor Local APIC = 0x00
1666 15:59:13.882399 IOAPIC: ID = 0x02
1667 15:59:13.885151 IOAPIC: Dumping registers
1668 15:59:13.888931 reg 0x0000: 0x02000000
1669 15:59:13.891829 reg 0x0001: 0x00770020
1670 15:59:13.892242 reg 0x0002: 0x00000000
1671 15:59:13.898541 PCI: 00:1f.0 init finished in 21 msecs
1672 15:59:13.898993 PCI: 00:1f.2 init
1673 15:59:13.901694 Disabling ACPI via APMC.
1674 15:59:13.905492 APMC done.
1675 15:59:13.908369 PCI: 00:1f.2 init finished in 5 msecs
1676 15:59:13.920188 PCI: 01:00.0 init
1677 15:59:13.923338 PCI: 01:00.0 init finished in 0 msecs
1678 15:59:13.926947 PNP: 0c09.0 init
1679 15:59:13.929983 Google Chrome EC uptime: 10.163 seconds
1680 15:59:13.936831 Google Chrome AP resets since EC boot: 0
1681 15:59:13.940361 Google Chrome most recent AP reset causes:
1682 15:59:13.946634 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1683 15:59:13.949800 PNP: 0c09.0 init finished in 19 msecs
1684 15:59:13.955043 Devices initialized
1685 15:59:13.958450 Show all devs... After init.
1686 15:59:13.962128 Root Device: enabled 1
1687 15:59:13.962686 DOMAIN: 0000: enabled 1
1688 15:59:13.965279 CPU_CLUSTER: 0: enabled 1
1689 15:59:13.968324 PCI: 00:00.0: enabled 1
1690 15:59:13.972021 PCI: 00:02.0: enabled 1
1691 15:59:13.972499 PCI: 00:04.0: enabled 1
1692 15:59:13.975091 PCI: 00:05.0: enabled 1
1693 15:59:13.978144 PCI: 00:06.0: enabled 0
1694 15:59:13.981560 PCI: 00:07.0: enabled 0
1695 15:59:13.982001 PCI: 00:07.1: enabled 0
1696 15:59:13.984677 PCI: 00:07.2: enabled 0
1697 15:59:13.988410 PCI: 00:07.3: enabled 0
1698 15:59:13.991478 PCI: 00:08.0: enabled 1
1699 15:59:13.991918 PCI: 00:09.0: enabled 0
1700 15:59:13.994505 PCI: 00:0a.0: enabled 0
1701 15:59:13.998028 PCI: 00:0d.0: enabled 1
1702 15:59:14.001348 PCI: 00:0d.1: enabled 0
1703 15:59:14.001832 PCI: 00:0d.2: enabled 0
1704 15:59:14.004565 PCI: 00:0d.3: enabled 0
1705 15:59:14.007546 PCI: 00:0e.0: enabled 0
1706 15:59:14.011219 PCI: 00:10.2: enabled 1
1707 15:59:14.011638 PCI: 00:10.6: enabled 0
1708 15:59:14.014315 PCI: 00:10.7: enabled 0
1709 15:59:14.017440 PCI: 00:12.0: enabled 0
1710 15:59:14.021236 PCI: 00:12.6: enabled 0
1711 15:59:14.021755 PCI: 00:13.0: enabled 0
1712 15:59:14.024253 PCI: 00:14.0: enabled 1
1713 15:59:14.027414 PCI: 00:14.1: enabled 0
1714 15:59:14.030743 PCI: 00:14.2: enabled 1
1715 15:59:14.031182 PCI: 00:14.3: enabled 1
1716 15:59:14.033788 PCI: 00:15.0: enabled 1
1717 15:59:14.037432 PCI: 00:15.1: enabled 1
1718 15:59:14.040436 PCI: 00:15.2: enabled 1
1719 15:59:14.040853 PCI: 00:15.3: enabled 1
1720 15:59:14.043842 PCI: 00:16.0: enabled 1
1721 15:59:14.046739 PCI: 00:16.1: enabled 0
1722 15:59:14.050644 PCI: 00:16.2: enabled 0
1723 15:59:14.051292 PCI: 00:16.3: enabled 0
1724 15:59:14.053892 PCI: 00:16.4: enabled 0
1725 15:59:14.056828 PCI: 00:16.5: enabled 0
1726 15:59:14.059958 PCI: 00:17.0: enabled 0
1727 15:59:14.060395 PCI: 00:19.0: enabled 0
1728 15:59:14.063567 PCI: 00:19.1: enabled 1
1729 15:59:14.066296 PCI: 00:19.2: enabled 0
1730 15:59:14.069620 PCI: 00:1c.0: enabled 1
1731 15:59:14.070230 PCI: 00:1c.1: enabled 0
1732 15:59:14.073298 PCI: 00:1c.2: enabled 0
1733 15:59:14.076866 PCI: 00:1c.3: enabled 0
1734 15:59:14.079995 PCI: 00:1c.4: enabled 0
1735 15:59:14.080436 PCI: 00:1c.5: enabled 0
1736 15:59:14.082994 PCI: 00:1c.6: enabled 1
1737 15:59:14.086619 PCI: 00:1c.7: enabled 0
1738 15:59:14.089437 PCI: 00:1d.0: enabled 1
1739 15:59:14.089890 PCI: 00:1d.1: enabled 0
1740 15:59:14.092699 PCI: 00:1d.2: enabled 1
1741 15:59:14.096317 PCI: 00:1d.3: enabled 0
1742 15:59:14.099280 PCI: 00:1e.0: enabled 1
1743 15:59:14.099835 PCI: 00:1e.1: enabled 0
1744 15:59:14.103180 PCI: 00:1e.2: enabled 1
1745 15:59:14.106076 PCI: 00:1e.3: enabled 1
1746 15:59:14.106551 PCI: 00:1f.0: enabled 1
1747 15:59:14.109683 PCI: 00:1f.1: enabled 0
1748 15:59:14.112926 PCI: 00:1f.2: enabled 1
1749 15:59:14.115945 PCI: 00:1f.3: enabled 1
1750 15:59:14.116363 PCI: 00:1f.4: enabled 0
1751 15:59:14.119031 PCI: 00:1f.5: enabled 1
1752 15:59:14.122615 PCI: 00:1f.6: enabled 0
1753 15:59:14.125874 PCI: 00:1f.7: enabled 0
1754 15:59:14.126321 APIC: 00: enabled 1
1755 15:59:14.128821 GENERIC: 0.0: enabled 1
1756 15:59:14.132633 GENERIC: 0.0: enabled 1
1757 15:59:14.135645 GENERIC: 1.0: enabled 1
1758 15:59:14.136062 GENERIC: 0.0: enabled 1
1759 15:59:14.138663 GENERIC: 1.0: enabled 1
1760 15:59:14.142665 USB0 port 0: enabled 1
1761 15:59:14.145468 GENERIC: 0.0: enabled 1
1762 15:59:14.145880 USB0 port 0: enabled 1
1763 15:59:14.148607 GENERIC: 0.0: enabled 1
1764 15:59:14.151757 I2C: 00:1a: enabled 1
1765 15:59:14.152197 I2C: 00:31: enabled 1
1766 15:59:14.155230 I2C: 00:32: enabled 1
1767 15:59:14.158704 I2C: 00:10: enabled 1
1768 15:59:14.159155 I2C: 00:15: enabled 1
1769 15:59:14.161816 GENERIC: 0.0: enabled 0
1770 15:59:14.165377 GENERIC: 1.0: enabled 0
1771 15:59:14.168489 GENERIC: 0.0: enabled 1
1772 15:59:14.169025 SPI: 00: enabled 1
1773 15:59:14.171515 SPI: 00: enabled 1
1774 15:59:14.174665 PNP: 0c09.0: enabled 1
1775 15:59:14.175114 GENERIC: 0.0: enabled 1
1776 15:59:14.178103 USB3 port 0: enabled 1
1777 15:59:14.181740 USB3 port 1: enabled 1
1778 15:59:14.182281 USB3 port 2: enabled 0
1779 15:59:14.185066 USB3 port 3: enabled 0
1780 15:59:14.187906 USB2 port 0: enabled 0
1781 15:59:14.191676 USB2 port 1: enabled 1
1782 15:59:14.192101 USB2 port 2: enabled 1
1783 15:59:14.194479 USB2 port 3: enabled 0
1784 15:59:14.198157 USB2 port 4: enabled 1
1785 15:59:14.198661 USB2 port 5: enabled 0
1786 15:59:14.201319 USB2 port 6: enabled 0
1787 15:59:14.204553 USB2 port 7: enabled 0
1788 15:59:14.207634 USB2 port 8: enabled 0
1789 15:59:14.208057 USB2 port 9: enabled 0
1790 15:59:14.211348 USB3 port 0: enabled 0
1791 15:59:14.214363 USB3 port 1: enabled 1
1792 15:59:14.214837 USB3 port 2: enabled 0
1793 15:59:14.217467 USB3 port 3: enabled 0
1794 15:59:14.220913 GENERIC: 0.0: enabled 1
1795 15:59:14.224307 GENERIC: 1.0: enabled 1
1796 15:59:14.224782 APIC: 01: enabled 1
1797 15:59:14.227264 APIC: 03: enabled 1
1798 15:59:14.227749 APIC: 07: enabled 1
1799 15:59:14.230885 APIC: 05: enabled 1
1800 15:59:14.234299 APIC: 04: enabled 1
1801 15:59:14.234740 APIC: 02: enabled 1
1802 15:59:14.237309 APIC: 06: enabled 1
1803 15:59:14.240835 PCI: 01:00.0: enabled 1
1804 15:59:14.244051 BS: BS_DEV_INIT run times (exec / console): 33 / 536 ms
1805 15:59:14.250295 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1806 15:59:14.253880 ELOG: NV offset 0xf30000 size 0x1000
1807 15:59:14.260533 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1808 15:59:14.266966 ELOG: Event(17) added with size 13 at 2024-06-14 15:59:14 UTC
1809 15:59:14.273780 ELOG: Event(92) added with size 9 at 2024-06-14 15:59:14 UTC
1810 15:59:14.280130 ELOG: Event(93) added with size 9 at 2024-06-14 15:59:14 UTC
1811 15:59:14.286665 ELOG: Event(9E) added with size 10 at 2024-06-14 15:59:14 UTC
1812 15:59:14.293320 ELOG: Event(9F) added with size 14 at 2024-06-14 15:59:14 UTC
1813 15:59:14.299803 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1814 15:59:14.306580 ELOG: Event(A1) added with size 10 at 2024-06-14 15:59:14 UTC
1815 15:59:14.313121 elog_add_boot_reason: Logged recovery mode boot, reason: 0x02
1816 15:59:14.316188 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1817 15:59:14.319883 Finalize devices...
1818 15:59:14.323158 Devices finalized
1819 15:59:14.325956 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1820 15:59:14.332420 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1821 15:59:14.338986 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1822 15:59:14.342645 ME: HFSTS1 : 0x80030055
1823 15:59:14.345640 ME: HFSTS2 : 0x30280116
1824 15:59:14.352491 ME: HFSTS3 : 0x00000050
1825 15:59:14.355585 ME: HFSTS4 : 0x00004000
1826 15:59:14.358739 ME: HFSTS5 : 0x00000000
1827 15:59:14.365515 ME: HFSTS6 : 0x00400006
1828 15:59:14.368503 ME: Manufacturing Mode : YES
1829 15:59:14.372362 ME: SPI Protection Mode Enabled : NO
1830 15:59:14.375545 ME: FW Partition Table : OK
1831 15:59:14.378270 ME: Bringup Loader Failure : NO
1832 15:59:14.381673 ME: Firmware Init Complete : NO
1833 15:59:14.388526 ME: Boot Options Present : NO
1834 15:59:14.391551 ME: Update In Progress : NO
1835 15:59:14.395241 ME: D0i3 Support : YES
1836 15:59:14.397954 ME: Low Power State Enabled : NO
1837 15:59:14.401426 ME: CPU Replaced : YES
1838 15:59:14.404784 ME: CPU Replacement Valid : YES
1839 15:59:14.408173 ME: Current Working State : 5
1840 15:59:14.414369 ME: Current Operation State : 1
1841 15:59:14.418011 ME: Current Operation Mode : 3
1842 15:59:14.421043 ME: Error Code : 0
1843 15:59:14.424248 ME: Enhanced Debug Mode : NO
1844 15:59:14.427300 ME: CPU Debug Disabled : YES
1845 15:59:14.430690 ME: TXT Support : NO
1846 15:59:14.437305 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1847 15:59:14.443823 ELOG: Event(91) added with size 10 at 2024-06-14 15:59:14 UTC
1848 15:59:14.450539 Chrome EC: clear events_b mask to 0x0000000020004000
1849 15:59:14.457503 BS: BS_WRITE_TABLES entry times (exec / console): 2 / 11 ms
1850 15:59:14.463704 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1851 15:59:14.467055 CBFS: 'fallback/slic' not found.
1852 15:59:14.470379 ACPI: Writing ACPI tables at 76b01000.
1853 15:59:14.473361 ACPI: * FACS
1854 15:59:14.473785 ACPI: * DSDT
1855 15:59:14.477012 Ramoops buffer: 0x100000@0x76a00000.
1856 15:59:14.484018 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1857 15:59:14.486822 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1858 15:59:14.490196 Google Chrome EC: version:
1859 15:59:14.493661 ro: voema_v2.0.7540-147f8d37d1
1860 15:59:14.496990 rw: voema_v2.0.7540-147f8d37d1
1861 15:59:14.500188 running image: 1
1862 15:59:14.506692 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1863 15:59:14.509763 ACPI: * FADT
1864 15:59:14.510239 SCI is IRQ9
1865 15:59:14.516389 ACPI: added table 1/32, length now 40
1866 15:59:14.516858 ACPI: * SSDT
1867 15:59:14.519767 Found 1 CPU(s) with 8 core(s) each.
1868 15:59:14.526409 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1869 15:59:14.529543 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1870 15:59:14.533264 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1871 15:59:14.536425 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1872 15:59:14.543181 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1873 15:59:14.549292 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1874 15:59:14.552745 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1875 15:59:14.559361 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1876 15:59:14.565896 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1877 15:59:14.568831 \_SB.PCI0.RP09: Added StorageD3Enable property
1878 15:59:14.575584 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1879 15:59:14.578502 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1880 15:59:14.586135 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1881 15:59:14.589246 PS2K: Passing 80 keymaps to kernel
1882 15:59:14.595658 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1883 15:59:14.602415 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1884 15:59:14.609400 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1885 15:59:14.615541 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1886 15:59:14.622094 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1887 15:59:14.628402 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1888 15:59:14.635126 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1889 15:59:14.641931 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1890 15:59:14.645065 ACPI: added table 2/32, length now 44
1891 15:59:14.648153 ACPI: * MCFG
1892 15:59:14.651813 ACPI: added table 3/32, length now 48
1893 15:59:14.654898 ACPI: * TPM2
1894 15:59:14.655323 TPM2 log created at 0x769f0000
1895 15:59:14.661610 ACPI: added table 4/32, length now 52
1896 15:59:14.662034 ACPI: * MADT
1897 15:59:14.662445 SCI is IRQ9
1898 15:59:14.668095 ACPI: added table 5/32, length now 56
1899 15:59:14.668565 current = 76b09850
1900 15:59:14.671132 ACPI: * DMAR
1901 15:59:14.674375 ACPI: added table 6/32, length now 60
1902 15:59:14.677571 ACPI: added table 7/32, length now 64
1903 15:59:14.680948 ACPI: * HPET
1904 15:59:14.684167 ACPI: added table 8/32, length now 68
1905 15:59:14.684617 ACPI: done.
1906 15:59:14.687852 ACPI tables: 35216 bytes.
1907 15:59:14.691086 smbios_write_tables: 769ef000
1908 15:59:14.694132 EC returned error result code 3
1909 15:59:14.697257 Couldn't obtain OEM name from CBI
1910 15:59:14.700724 Create SMBIOS type 16
1911 15:59:14.701209 Create SMBIOS type 17
1912 15:59:14.703753 GENERIC: 0.0 (WIFI Device)
1913 15:59:14.707330 SMBIOS tables: 1750 bytes.
1914 15:59:14.710537 Writing table forward entry at 0x00000500
1915 15:59:14.717220 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1916 15:59:14.720269 Writing coreboot table at 0x76b25000
1917 15:59:14.727108 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1918 15:59:14.733508 1. 0000000000001000-000000000009ffff: RAM
1919 15:59:14.736450 2. 00000000000a0000-00000000000fffff: RESERVED
1920 15:59:14.740408 3. 0000000000100000-00000000769eefff: RAM
1921 15:59:14.746618 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1922 15:59:14.753243 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1923 15:59:14.756310 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1924 15:59:14.763055 7. 0000000077000000-000000007fbfffff: RESERVED
1925 15:59:14.766047 8. 00000000c0000000-00000000cfffffff: RESERVED
1926 15:59:14.773073 9. 00000000f8000000-00000000f9ffffff: RESERVED
1927 15:59:14.776108 10. 00000000fb000000-00000000fb000fff: RESERVED
1928 15:59:14.782665 11. 00000000fe000000-00000000fe00ffff: RESERVED
1929 15:59:14.786075 12. 00000000fed80000-00000000fed87fff: RESERVED
1930 15:59:14.792531 13. 00000000fed90000-00000000fed92fff: RESERVED
1931 15:59:14.796338 14. 00000000feda0000-00000000feda1fff: RESERVED
1932 15:59:14.802454 15. 00000000fedc0000-00000000feddffff: RESERVED
1933 15:59:14.805657 16. 0000000100000000-00000002803fffff: RAM
1934 15:59:14.808963 Passing 4 GPIOs to payload:
1935 15:59:14.812764 NAME | PORT | POLARITY | VALUE
1936 15:59:14.818933 lid | undefined | high | high
1937 15:59:14.822362 power | undefined | high | low
1938 15:59:14.829085 oprom | undefined | high | low
1939 15:59:14.835222 EC in RW | 0x000000e5 | high | low
1940 15:59:14.841987 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 1729
1941 15:59:14.845473 coreboot table: 1576 bytes.
1942 15:59:14.848676 IMD ROOT 0. 0x76fff000 0x00001000
1943 15:59:14.851760 IMD SMALL 1. 0x76ffe000 0x00001000
1944 15:59:14.854847 FSP MEMORY 2. 0x76c4e000 0x003b0000
1945 15:59:14.858436 VPD 3. 0x76c4d000 0x00000367
1946 15:59:14.861424 RO MCACHE 4. 0x76c4c000 0x00000fdc
1947 15:59:14.865305 CONSOLE 5. 0x76c2c000 0x00020000
1948 15:59:14.868255 FMAP 6. 0x76c2b000 0x00000578
1949 15:59:14.874586 TIME STAMP 7. 0x76c2a000 0x00000910
1950 15:59:14.878050 VBOOT WORK 8. 0x76c16000 0x00014000
1951 15:59:14.881206 ROMSTG STCK 9. 0x76c15000 0x00001000
1952 15:59:14.884940 AFTER CAR 10. 0x76c0a000 0x0000b000
1953 15:59:14.888023 RAMSTAGE 11. 0x76b97000 0x00073000
1954 15:59:14.891025 REFCODE 12. 0x76b42000 0x00055000
1955 15:59:14.894545 SMM BACKUP 13. 0x76b32000 0x00010000
1956 15:59:14.901437 4f444749 14. 0x76b30000 0x00002000
1957 15:59:14.904457 EXT VBT15. 0x76b2d000 0x0000219f
1958 15:59:14.907645 COREBOOT 16. 0x76b25000 0x00008000
1959 15:59:14.910597 ACPI 17. 0x76b01000 0x00024000
1960 15:59:14.914384 ACPI GNVS 18. 0x76b00000 0x00001000
1961 15:59:14.917524 RAMOOPS 19. 0x76a00000 0x00100000
1962 15:59:14.920654 TPM2 TCGLOG20. 0x769f0000 0x00010000
1963 15:59:14.924149 SMBIOS 21. 0x769ef000 0x00000800
1964 15:59:14.927342 IMD small region:
1965 15:59:14.931000 IMD ROOT 0. 0x76ffec00 0x00000400
1966 15:59:14.933512 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1967 15:59:14.940636 POWER STATE 2. 0x76ffeb80 0x00000044
1968 15:59:14.943671 ROMSTAGE 3. 0x76ffeb60 0x00000004
1969 15:59:14.946740 MEM INFO 4. 0x76ffe980 0x000001e0
1970 15:59:14.953266 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1971 15:59:14.956541 MTRR: Physical address space:
1972 15:59:14.963331 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1973 15:59:14.967046 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1974 15:59:14.973336 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1975 15:59:14.979613 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1976 15:59:14.986595 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1977 15:59:14.992660 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1978 15:59:14.999412 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1979 15:59:15.002910 MTRR: Fixed MSR 0x250 0x0606060606060606
1980 15:59:15.005880 MTRR: Fixed MSR 0x258 0x0606060606060606
1981 15:59:15.012438 MTRR: Fixed MSR 0x259 0x0000000000000000
1982 15:59:15.016056 MTRR: Fixed MSR 0x268 0x0606060606060606
1983 15:59:15.019219 MTRR: Fixed MSR 0x269 0x0606060606060606
1984 15:59:15.022332 MTRR: Fixed MSR 0x26a 0x0606060606060606
1985 15:59:15.028644 MTRR: Fixed MSR 0x26b 0x0606060606060606
1986 15:59:15.032354 MTRR: Fixed MSR 0x26c 0x0606060606060606
1987 15:59:15.035774 MTRR: Fixed MSR 0x26d 0x0606060606060606
1988 15:59:15.038971 MTRR: Fixed MSR 0x26e 0x0606060606060606
1989 15:59:15.045365 MTRR: Fixed MSR 0x26f 0x0606060606060606
1990 15:59:15.048495 call enable_fixed_mtrr()
1991 15:59:15.051801 CPU physical address size: 39 bits
1992 15:59:15.055442 MTRR: default type WB/UC MTRR counts: 6/6.
1993 15:59:15.058564 MTRR: UC selected as default type.
1994 15:59:15.065392 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1995 15:59:15.071744 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1996 15:59:15.078520 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1997 15:59:15.084622 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1998 15:59:15.091742 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1999 15:59:15.097716 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2000 15:59:15.101407 MTRR: Fixed MSR 0x250 0x0606060606060606
2001 15:59:15.107519 MTRR: Fixed MSR 0x258 0x0606060606060606
2002 15:59:15.111403 MTRR: Fixed MSR 0x259 0x0000000000000000
2003 15:59:15.114371 MTRR: Fixed MSR 0x268 0x0606060606060606
2004 15:59:15.117886 MTRR: Fixed MSR 0x269 0x0606060606060606
2005 15:59:15.124153 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 15:59:15.127578 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 15:59:15.130716 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 15:59:15.133841 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 15:59:15.140542 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 15:59:15.143690 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 15:59:15.144111
2012 15:59:15.147354 MTRR check
2013 15:59:15.147771 Fixed MTRRs : Enabled
2014 15:59:15.150292 Variable MTRRs: Enabled
2015 15:59:15.150712
2016 15:59:15.153677 call enable_fixed_mtrr()
2017 15:59:15.160114 BS: BS_WRITE_TABLES exit times (exec / console): 48 / 151 ms
2018 15:59:15.163436 CPU physical address size: 39 bits
2019 15:59:15.170248 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2020 15:59:15.176829 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 15:59:15.179978 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 15:59:15.182985 MTRR: Fixed MSR 0x258 0x0606060606060606
2023 15:59:15.186606 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 15:59:15.192921 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 15:59:15.196564 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 15:59:15.199645 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 15:59:15.202922 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 15:59:15.209716 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 15:59:15.212685 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 15:59:15.216053 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 15:59:15.219534 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 15:59:15.226044 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 15:59:15.228980 call enable_fixed_mtrr()
2034 15:59:15.232866 MTRR: Fixed MSR 0x259 0x0000000000000000
2035 15:59:15.235371 MTRR: Fixed MSR 0x268 0x0606060606060606
2036 15:59:15.242455 MTRR: Fixed MSR 0x269 0x0606060606060606
2037 15:59:15.245677 MTRR: Fixed MSR 0x26a 0x0606060606060606
2038 15:59:15.248682 MTRR: Fixed MSR 0x26b 0x0606060606060606
2039 15:59:15.252645 MTRR: Fixed MSR 0x26c 0x0606060606060606
2040 15:59:15.258722 MTRR: Fixed MSR 0x26d 0x0606060606060606
2041 15:59:15.262343 MTRR: Fixed MSR 0x26e 0x0606060606060606
2042 15:59:15.265347 MTRR: Fixed MSR 0x26f 0x0606060606060606
2043 15:59:15.268799 CPU physical address size: 39 bits
2044 15:59:15.272940 call enable_fixed_mtrr()
2045 15:59:15.276328 MTRR: Fixed MSR 0x250 0x0606060606060606
2046 15:59:15.282816 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 15:59:15.285972 MTRR: Fixed MSR 0x258 0x0606060606060606
2048 15:59:15.289244 MTRR: Fixed MSR 0x259 0x0000000000000000
2049 15:59:15.293002 MTRR: Fixed MSR 0x268 0x0606060606060606
2050 15:59:15.299137 MTRR: Fixed MSR 0x269 0x0606060606060606
2051 15:59:15.302995 MTRR: Fixed MSR 0x26a 0x0606060606060606
2052 15:59:15.306215 MTRR: Fixed MSR 0x26b 0x0606060606060606
2053 15:59:15.309251 MTRR: Fixed MSR 0x26c 0x0606060606060606
2054 15:59:15.315704 MTRR: Fixed MSR 0x26d 0x0606060606060606
2055 15:59:15.319376 MTRR: Fixed MSR 0x26e 0x0606060606060606
2056 15:59:15.322451 MTRR: Fixed MSR 0x26f 0x0606060606060606
2057 15:59:15.329169 MTRR: Fixed MSR 0x258 0x0606060606060606
2058 15:59:15.329649 call enable_fixed_mtrr()
2059 15:59:15.335571 MTRR: Fixed MSR 0x259 0x0000000000000000
2060 15:59:15.339227 MTRR: Fixed MSR 0x268 0x0606060606060606
2061 15:59:15.342092 MTRR: Fixed MSR 0x269 0x0606060606060606
2062 15:59:15.345970 MTRR: Fixed MSR 0x26a 0x0606060606060606
2063 15:59:15.352159 MTRR: Fixed MSR 0x26b 0x0606060606060606
2064 15:59:15.355127 MTRR: Fixed MSR 0x26c 0x0606060606060606
2065 15:59:15.358918 MTRR: Fixed MSR 0x26d 0x0606060606060606
2066 15:59:15.362077 MTRR: Fixed MSR 0x26e 0x0606060606060606
2067 15:59:15.368900 MTRR: Fixed MSR 0x26f 0x0606060606060606
2068 15:59:15.371752 CPU physical address size: 39 bits
2069 15:59:15.375414 call enable_fixed_mtrr()
2070 15:59:15.378340 CPU physical address size: 39 bits
2071 15:59:15.381965 CPU physical address size: 39 bits
2072 15:59:15.388349 Checking segment from ROM address 0xffc02b38
2073 15:59:15.391384 MTRR: Fixed MSR 0x250 0x0606060606060606
2074 15:59:15.395157 MTRR: Fixed MSR 0x250 0x0606060606060606
2075 15:59:15.397999 MTRR: Fixed MSR 0x258 0x0606060606060606
2076 15:59:15.404497 MTRR: Fixed MSR 0x259 0x0000000000000000
2077 15:59:15.408198 MTRR: Fixed MSR 0x268 0x0606060606060606
2078 15:59:15.411148 MTRR: Fixed MSR 0x269 0x0606060606060606
2079 15:59:15.414920 MTRR: Fixed MSR 0x26a 0x0606060606060606
2080 15:59:15.421123 MTRR: Fixed MSR 0x26b 0x0606060606060606
2081 15:59:15.424229 MTRR: Fixed MSR 0x26c 0x0606060606060606
2082 15:59:15.427977 MTRR: Fixed MSR 0x26d 0x0606060606060606
2083 15:59:15.431099 MTRR: Fixed MSR 0x26e 0x0606060606060606
2084 15:59:15.437676 MTRR: Fixed MSR 0x26f 0x0606060606060606
2085 15:59:15.440782 MTRR: Fixed MSR 0x258 0x0606060606060606
2086 15:59:15.444249 call enable_fixed_mtrr()
2087 15:59:15.447246 MTRR: Fixed MSR 0x259 0x0000000000000000
2088 15:59:15.450823 MTRR: Fixed MSR 0x268 0x0606060606060606
2089 15:59:15.457583 MTRR: Fixed MSR 0x269 0x0606060606060606
2090 15:59:15.460950 MTRR: Fixed MSR 0x26a 0x0606060606060606
2091 15:59:15.464022 MTRR: Fixed MSR 0x26b 0x0606060606060606
2092 15:59:15.466992 MTRR: Fixed MSR 0x26c 0x0606060606060606
2093 15:59:15.473695 MTRR: Fixed MSR 0x26d 0x0606060606060606
2094 15:59:15.476835 MTRR: Fixed MSR 0x26e 0x0606060606060606
2095 15:59:15.480409 MTRR: Fixed MSR 0x26f 0x0606060606060606
2096 15:59:15.483488 CPU physical address size: 39 bits
2097 15:59:15.490121 call enable_fixed_mtrr()
2098 15:59:15.493484 Checking segment from ROM address 0xffc02b54
2099 15:59:15.496786 CPU physical address size: 39 bits
2100 15:59:15.499920 Loading segment from ROM address 0xffc02b38
2101 15:59:15.503507 code (compression=0)
2102 15:59:15.513004 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2103 15:59:15.520018 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2104 15:59:15.523366 it's not compressed!
2105 15:59:15.661682 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2106 15:59:15.668285 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2107 15:59:15.674667 Loading segment from ROM address 0xffc02b54
2108 15:59:15.678255 Entry Point 0x30000000
2109 15:59:15.678771 Loaded segments
2110 15:59:15.684484 BS: BS_PAYLOAD_LOAD run times (exec / console): 455 / 64 ms
2111 15:59:15.728465 Finalizing chipset.
2112 15:59:15.731353 Finalizing SMM.
2113 15:59:15.731833 APMC done.
2114 15:59:15.737877 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2115 15:59:15.741025 mp_park_aps done after 0 msecs.
2116 15:59:15.744675 Jumping to boot code at 0x30000000(0x76b25000)
2117 15:59:15.754391 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2118 15:59:15.754825
2119 15:59:15.755169
2120 15:59:15.757517
2121 15:59:15.757875 Starting depthcharge on Voema...
2122 15:59:15.759028 end: 2.2.3 depthcharge-start (duration 00:00:04) [common]
2123 15:59:15.759543 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
2124 15:59:15.760140 Setting prompt string to ['volteer:']
2125 15:59:15.760632 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:47)
2126 15:59:15.761338
2127 15:59:15.767462 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2128 15:59:15.767887
2129 15:59:15.774131 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2130 15:59:15.774597
2131 15:59:15.780475 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2132 15:59:15.780902
2133 15:59:15.783972 Failed to find eMMC card reader
2134 15:59:15.784353
2135 15:59:15.787101 Wipe memory regions:
2136 15:59:15.787528
2137 15:59:15.790848 [0x00000000001000, 0x000000000a0000)
2138 15:59:15.791269
2139 15:59:15.793715 [0x00000000100000, 0x00000030000000)
2140 15:59:15.819864
2141 15:59:15.822944 [0x00000032662db0, 0x000000769ef000)
2142 15:59:15.858733
2143 15:59:15.861756 [0x00000100000000, 0x00000280400000)
2144 15:59:16.062884
2145 15:59:16.066150 ec_init: CrosEC protocol v3 supported (256, 256)
2146 15:59:16.066758
2147 15:59:16.072449 update_port_state: port C0 state: usb enable 1 mux conn 0
2148 15:59:16.072873
2149 15:59:16.082611 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2150 15:59:16.086191
2151 15:59:16.089173 pmc_check_ipc_sts: STS_BUSY done after 1512 us
2152 15:59:16.089692
2153 15:59:16.092217 send_conn_disc_msg: pmc_send_cmd succeeded
2154 15:59:16.524157
2155 15:59:16.524678 R8152: Initializing
2156 15:59:16.525019
2157 15:59:16.527233 Version 6 (ocp_data = 5c30)
2158 15:59:16.527673
2159 15:59:16.530987 R8152: Done initializing
2160 15:59:16.531424
2161 15:59:16.534205 Adding net device
2162 15:59:16.834809
2163 15:59:16.838635 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2164 15:59:16.839288
2165 15:59:16.839852
2166 15:59:16.842090 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2168 15:59:16.943694 volteer: tftpboot 192.168.201.1 14343430/tftp-deploy-e82njvn_/kernel/bzImage 14343430/tftp-deploy-e82njvn_/kernel/cmdline 14343430/tftp-deploy-e82njvn_/ramdisk/ramdisk.cpio.gz
2169 15:59:16.944288 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2170 15:59:16.944798 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:46)
2171 15:59:16.949189 tftpboot 192.168.201.1 14343430/tftp-deploy-e82njvn_/kernel/bzIploy-e82njvn_/kernel/cmdline 14343430/tftp-deploy-e82njvn_/ramdisk/ramdisk.cpio.gz
2172 15:59:16.949719
2173 15:59:16.950054 Waiting for link
2174 15:59:17.152396
2175 15:59:17.153079 done.
2176 15:59:17.153598
2177 15:59:17.154218 MAC: 00:24:32:30:79:42
2178 15:59:17.154737
2179 15:59:17.155653 Sending DHCP discover... done.
2180 15:59:17.156165
2181 15:59:17.158525 Waiting for reply... done.
2182 15:59:17.159078
2183 15:59:17.162122 Sending DHCP request... done.
2184 15:59:17.162719
2185 15:59:17.165146 Waiting for reply... done.
2186 15:59:17.165674
2187 15:59:17.168785 My ip is 192.168.201.13
2188 15:59:17.169340
2189 15:59:17.171889 The DHCP server ip is 192.168.201.1
2190 15:59:17.172436
2191 15:59:17.175175 TFTP server IP predefined by user: 192.168.201.1
2192 15:59:17.175806
2193 15:59:17.185011 Bootfile predefined by user: 14343430/tftp-deploy-e82njvn_/kernel/bzImage
2194 15:59:17.185579
2195 15:59:17.188161 Sending tftp read request... done.
2196 15:59:17.188863
2197 15:59:17.195751 Waiting for the transfer...
2198 15:59:17.196317
2199 15:59:17.858076 00000000 ################################################################
2200 15:59:17.858836
2201 15:59:18.450437 00080000 ################################################################
2202 15:59:18.450584
2203 15:59:19.003488 00100000 ################################################################
2204 15:59:19.003638
2205 15:59:19.585453 00180000 ################################################################
2206 15:59:19.585596
2207 15:59:20.146248 00200000 ################################################################
2208 15:59:20.146400
2209 15:59:20.719756 00280000 ################################################################
2210 15:59:20.719901
2211 15:59:21.313263 00300000 ################################################################
2212 15:59:21.313442
2213 15:59:21.881043 00380000 ################################################################
2214 15:59:21.881194
2215 15:59:22.422257 00400000 ################################################################
2216 15:59:22.422409
2217 15:59:22.948415 00480000 ################################################################
2218 15:59:22.948566
2219 15:59:23.515198 00500000 ################################################################
2220 15:59:23.515355
2221 15:59:24.097882 00580000 ################################################################
2222 15:59:24.098032
2223 15:59:24.666082 00600000 ################################################################
2224 15:59:24.666267
2225 15:59:25.215692 00680000 ################################################################
2226 15:59:25.215844
2227 15:59:25.775812 00700000 ################################################################
2228 15:59:25.775951
2229 15:59:26.315932 00780000 ################################################################
2230 15:59:26.316101
2231 15:59:26.890852 00800000 ################################################################
2232 15:59:26.890992
2233 15:59:27.521956 00880000 ################################################################
2234 15:59:27.522137
2235 15:59:28.112645 00900000 ################################################################
2236 15:59:28.112795
2237 15:59:28.731402 00980000 ################################################################
2238 15:59:28.731547
2239 15:59:29.358962 00a00000 ################################################################
2240 15:59:29.359111
2241 15:59:29.967062 00a80000 ################################################################
2242 15:59:29.967217
2243 15:59:30.551361 00b00000 ################################################################
2244 15:59:30.551512
2245 15:59:31.265340 00b80000 ################################################################
2246 15:59:31.265880
2247 15:59:31.982074 00c00000 ################################################################
2248 15:59:31.982678
2249 15:59:32.704040 00c80000 ################################################################
2250 15:59:32.704563
2251 15:59:33.407709 00d00000 ################################################################ done.
2252 15:59:33.407863
2253 15:59:33.410769 The bootfile was 14155664 bytes long.
2254 15:59:33.410854
2255 15:59:33.414503 Sending tftp read request... done.
2256 15:59:33.414587
2257 15:59:33.417498 Waiting for the transfer...
2258 15:59:33.417581
2259 15:59:33.951527 00000000 ################################################################
2260 15:59:33.951679
2261 15:59:34.494193 00080000 ################################################################
2262 15:59:34.494340
2263 15:59:35.019933 00100000 ################################################################
2264 15:59:35.020077
2265 15:59:35.555155 00180000 ################################################################
2266 15:59:35.555305
2267 15:59:36.123713 00200000 ################################################################
2268 15:59:36.123869
2269 15:59:36.826409 00280000 ################################################################
2270 15:59:36.826561
2271 15:59:37.493681 00300000 ################################################################
2272 15:59:37.493832
2273 15:59:38.028894 00380000 ################################################################
2274 15:59:38.029040
2275 15:59:38.582121 00400000 ################################################################
2276 15:59:38.582332
2277 15:59:39.129766 00480000 ################################################################
2278 15:59:39.129917
2279 15:59:39.695255 00500000 ################################################################
2280 15:59:39.695407
2281 15:59:40.293783 00580000 ################################################################
2282 15:59:40.293925
2283 15:59:40.924830 00600000 ################################################################
2284 15:59:40.925401
2285 15:59:41.605459 00680000 ################################################################
2286 15:59:41.605985
2287 15:59:41.694867 00700000 ######### done.
2288 15:59:41.695347
2289 15:59:41.697787 Sending tftp read request... done.
2290 15:59:41.698244
2291 15:59:41.700875 Waiting for the transfer...
2292 15:59:41.701324
2293 15:59:41.701660 00000000 # done.
2294 15:59:41.701977
2295 15:59:41.711160 Command line loaded dynamically from TFTP file: 14343430/tftp-deploy-e82njvn_/kernel/cmdline
2296 15:59:41.711729
2297 15:59:41.737527 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14343430/extract-nfsrootfs-4sazxkbo,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
2298 15:59:41.742736
2299 15:59:41.746075 Shutting down all USB controllers.
2300 15:59:41.746674
2301 15:59:41.747070 Removing current net device
2302 15:59:41.747387
2303 15:59:41.749444 Finalizing coreboot
2304 15:59:41.749866
2305 15:59:41.755730 Exiting depthcharge with code 4 at timestamp: 34649231
2306 15:59:41.756345
2307 15:59:41.756686
2308 15:59:41.756995 Starting kernel ...
2309 15:59:41.757289
2310 15:59:41.757574
2311 15:59:41.758892 end: 2.2.4 bootloader-commands (duration 00:00:26) [common]
2312 15:59:41.759374 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2313 15:59:41.759746 Setting prompt string to ['Linux version [0-9]']
2314 15:59:41.760101 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2315 15:59:41.760449 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2317 16:04:02.759779 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2319 16:04:02.760088 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2321 16:04:02.760326 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2324 16:04:02.760722 end: 2 depthcharge-action (duration 00:05:00) [common]
2326 16:04:02.761065 Cleaning after the job
2327 16:04:02.761183 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14343430/tftp-deploy-e82njvn_/ramdisk
2328 16:04:02.762122 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14343430/tftp-deploy-e82njvn_/kernel
2329 16:04:02.763647 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14343430/tftp-deploy-e82njvn_/nfsrootfs
2330 16:04:02.839943 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14343430/tftp-deploy-e82njvn_/modules
2331 16:04:02.840579 start: 4.1 power-off (timeout 00:00:30) [common]
2332 16:04:02.840872 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cp514-2h-1130g7-volteer-cbg-8', '--port=1', '--command=off']
2333 16:04:03.737165 >> Command sent successfully.
2334 16:04:03.739586 Returned 0 in 0 seconds
2335 16:04:03.839976 end: 4.1 power-off (duration 00:00:01) [common]
2337 16:04:03.840386 start: 4.2 read-feedback (timeout 00:09:59) [common]
2338 16:04:03.840686 Listened to connection for namespace 'common' for up to 1s
2340 16:04:03.841145 Listened to connection for namespace 'common' for up to 1s
2341 16:04:04.841290 Finalising connection for namespace 'common'
2342 16:04:04.841456 Disconnecting from shell: Finalise
2343 16:04:04.841534
2344 16:04:04.941846 end: 4.2 read-feedback (duration 00:00:01) [common]
2345 16:04:04.941990 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14343430
2346 16:04:05.369095 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14343430
2347 16:04:05.369287 JobError: Your job cannot terminate cleanly.