Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 15:53:58.915654 lava-dispatcher, installed at version: 2022.11
2 15:53:58.915846 start: 0 validate
3 15:53:58.916018 Start time: 2023-02-06 15:53:58.916012+00:00 (UTC)
4 15:53:58.916163 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:53:58.916292 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230127.0%2Famd64%2Finitrd.cpio.gz exists
6 15:53:59.220125 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:53:59.220299 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-1684-gd04aea87b5a3%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:53:59.508949 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:53:59.509109 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230127.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:53:59.796976 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:53:59.797130 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-1684-gd04aea87b5a3%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:54:00.098928 validate duration: 1.18
14 15:54:00.099219 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:54:00.099333 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:54:00.099424 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:54:00.099523 Not decompressing ramdisk as can be used compressed.
18 15:54:00.099610 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230127.0/amd64/initrd.cpio.gz
19 15:54:00.099678 saving as /var/lib/lava/dispatcher/tmp/9036895/tftp-deploy-_dkdd8bk/ramdisk/initrd.cpio.gz
20 15:54:00.099741 total size: 5431822 (5MB)
21 15:54:00.100928 progress 0% (0MB)
22 15:54:00.102365 progress 5% (0MB)
23 15:54:00.103740 progress 10% (0MB)
24 15:54:00.105160 progress 15% (0MB)
25 15:54:00.106642 progress 20% (1MB)
26 15:54:00.107969 progress 25% (1MB)
27 15:54:00.109282 progress 30% (1MB)
28 15:54:00.110743 progress 35% (1MB)
29 15:54:00.112086 progress 40% (2MB)
30 15:54:00.113405 progress 45% (2MB)
31 15:54:00.114691 progress 50% (2MB)
32 15:54:00.116174 progress 55% (2MB)
33 15:54:00.117476 progress 60% (3MB)
34 15:54:00.118772 progress 65% (3MB)
35 15:54:00.120253 progress 70% (3MB)
36 15:54:00.121541 progress 75% (3MB)
37 15:54:00.122891 progress 80% (4MB)
38 15:54:00.124218 progress 85% (4MB)
39 15:54:00.125649 progress 90% (4MB)
40 15:54:00.126959 progress 95% (4MB)
41 15:54:00.128311 progress 100% (5MB)
42 15:54:00.128573 5MB downloaded in 0.03s (179.70MB/s)
43 15:54:00.128720 end: 1.1.1 http-download (duration 00:00:00) [common]
45 15:54:00.128966 end: 1.1 download-retry (duration 00:00:00) [common]
46 15:54:00.129062 start: 1.2 download-retry (timeout 00:10:00) [common]
47 15:54:00.129160 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 15:54:00.129283 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-1684-gd04aea87b5a3/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:54:00.129390 saving as /var/lib/lava/dispatcher/tmp/9036895/tftp-deploy-_dkdd8bk/kernel/bzImage
50 15:54:00.129452 total size: 7577488 (7MB)
51 15:54:00.129513 No compression specified
52 15:54:00.130591 progress 0% (0MB)
53 15:54:00.132570 progress 5% (0MB)
54 15:54:00.134587 progress 10% (0MB)
55 15:54:00.136396 progress 15% (1MB)
56 15:54:00.138328 progress 20% (1MB)
57 15:54:00.140211 progress 25% (1MB)
58 15:54:00.142156 progress 30% (2MB)
59 15:54:00.144004 progress 35% (2MB)
60 15:54:00.145953 progress 40% (2MB)
61 15:54:00.147871 progress 45% (3MB)
62 15:54:00.149675 progress 50% (3MB)
63 15:54:00.151575 progress 55% (4MB)
64 15:54:00.153385 progress 60% (4MB)
65 15:54:00.155297 progress 65% (4MB)
66 15:54:00.157133 progress 70% (5MB)
67 15:54:00.159093 progress 75% (5MB)
68 15:54:00.160923 progress 80% (5MB)
69 15:54:00.162867 progress 85% (6MB)
70 15:54:00.164826 progress 90% (6MB)
71 15:54:00.166678 progress 95% (6MB)
72 15:54:00.168656 progress 100% (7MB)
73 15:54:00.168877 7MB downloaded in 0.04s (183.32MB/s)
74 15:54:00.169030 end: 1.2.1 http-download (duration 00:00:00) [common]
76 15:54:00.169270 end: 1.2 download-retry (duration 00:00:00) [common]
77 15:54:00.169379 start: 1.3 download-retry (timeout 00:10:00) [common]
78 15:54:00.169529 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 15:54:00.169636 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230127.0/amd64/full.rootfs.tar.xz
80 15:54:00.169704 saving as /var/lib/lava/dispatcher/tmp/9036895/tftp-deploy-_dkdd8bk/nfsrootfs/full.rootfs.tar
81 15:54:00.169794 total size: 123885004 (118MB)
82 15:54:00.169871 Using unxz to decompress xz
83 15:54:00.173153 progress 0% (0MB)
84 15:54:00.616212 progress 5% (5MB)
85 15:54:01.069118 progress 10% (11MB)
86 15:54:01.523490 progress 15% (17MB)
87 15:54:01.987514 progress 20% (23MB)
88 15:54:02.319671 progress 25% (29MB)
89 15:54:02.654992 progress 30% (35MB)
90 15:54:02.926960 progress 35% (41MB)
91 15:54:03.092465 progress 40% (47MB)
92 15:54:03.465634 progress 45% (53MB)
93 15:54:03.830746 progress 50% (59MB)
94 15:54:04.167718 progress 55% (65MB)
95 15:54:04.523578 progress 60% (70MB)
96 15:54:04.857586 progress 65% (76MB)
97 15:54:05.237700 progress 70% (82MB)
98 15:54:05.651684 progress 75% (88MB)
99 15:54:06.069294 progress 80% (94MB)
100 15:54:06.196922 progress 85% (100MB)
101 15:54:06.362772 progress 90% (106MB)
102 15:54:06.693531 progress 95% (112MB)
103 15:54:07.062368 progress 100% (118MB)
104 15:54:07.068485 118MB downloaded in 6.90s (17.13MB/s)
105 15:54:07.068762 end: 1.3.1 http-download (duration 00:00:07) [common]
107 15:54:07.069043 end: 1.3 download-retry (duration 00:00:07) [common]
108 15:54:07.069136 start: 1.4 download-retry (timeout 00:09:53) [common]
109 15:54:07.069225 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 15:54:07.069341 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-1684-gd04aea87b5a3/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:54:07.069411 saving as /var/lib/lava/dispatcher/tmp/9036895/tftp-deploy-_dkdd8bk/modules/modules.tar
112 15:54:07.069472 total size: 54728 (0MB)
113 15:54:07.069535 Using unxz to decompress xz
114 15:54:07.072708 progress 59% (0MB)
115 15:54:07.073083 progress 100% (0MB)
116 15:54:07.076524 0MB downloaded in 0.01s (7.41MB/s)
117 15:54:07.076777 end: 1.4.1 http-download (duration 00:00:00) [common]
119 15:54:07.077038 end: 1.4 download-retry (duration 00:00:00) [common]
120 15:54:07.077136 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 15:54:07.077233 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 15:54:08.796634 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9036895/extract-nfsrootfs-v51c_7ea
123 15:54:08.796854 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 15:54:08.796987 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 15:54:08.797136 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm
126 15:54:08.797243 makedir: /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin
127 15:54:08.797332 makedir: /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/tests
128 15:54:08.797417 makedir: /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/results
129 15:54:08.797519 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-add-keys
130 15:54:08.797654 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-add-sources
131 15:54:08.797775 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-background-process-start
132 15:54:08.797898 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-background-process-stop
133 15:54:08.798014 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-common-functions
134 15:54:08.798128 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-echo-ipv4
135 15:54:08.798242 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-install-packages
136 15:54:08.798359 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-installed-packages
137 15:54:08.798471 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-os-build
138 15:54:08.798586 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-probe-channel
139 15:54:08.798700 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-probe-ip
140 15:54:08.798814 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-target-ip
141 15:54:08.798930 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-target-mac
142 15:54:08.799061 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-target-storage
143 15:54:08.799178 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-test-case
144 15:54:08.799294 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-test-event
145 15:54:08.799407 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-test-feedback
146 15:54:08.799520 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-test-raise
147 15:54:08.799633 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-test-reference
148 15:54:08.799747 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-test-runner
149 15:54:08.799859 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-test-set
150 15:54:08.800287 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-test-shell
151 15:54:08.800425 Updating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-install-packages (oe)
152 15:54:08.800565 Updating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/bin/lava-installed-packages (oe)
153 15:54:08.800686 Creating /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/environment
154 15:54:08.800791 LAVA metadata
155 15:54:08.800870 - LAVA_JOB_ID=9036895
156 15:54:08.800957 - LAVA_DISPATCHER_IP=192.168.201.1
157 15:54:08.801089 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 15:54:08.801167 skipped lava-vland-overlay
159 15:54:08.801272 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 15:54:08.801376 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 15:54:08.801449 skipped lava-multinode-overlay
162 15:54:08.801552 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 15:54:08.801655 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 15:54:08.801744 Loading test definitions
165 15:54:08.801860 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 15:54:08.801946 Using /lava-9036895 at stage 0
167 15:54:08.802069 Fetching tests from https://github.com/kernelci/test-definitions
168 15:54:08.802162 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/0/tests/0_ltp-ipc'
169 15:54:12.168065 Running '/usr/bin/git checkout kernelci.org
170 15:54:12.292195 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 15:54:12.292979 uuid=9036895_1.5.2.3.1 testdef=None
172 15:54:12.293161 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
174 15:54:12.293456 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
175 15:54:12.294318 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 15:54:12.294602 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
178 15:54:12.295664 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 15:54:12.295964 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
181 15:54:12.297012 runner path: /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/0/tests/0_ltp-ipc test_uuid 9036895_1.5.2.3.1
182 15:54:12.297114 SKIPFILE='skipfile-lkft.yaml'
183 15:54:12.297184 SKIP_INSTALL='true'
184 15:54:12.297246 TST_CMDFILES='ipc'
185 15:54:12.297393 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 15:54:12.297615 Creating lava-test-runner.conf files
188 15:54:12.297685 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9036895/lava-overlay-lq9sornm/lava-9036895/0 for stage 0
189 15:54:12.297775 - 0_ltp-ipc
190 15:54:12.297879 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
191 15:54:12.297970 start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
192 15:54:19.988576 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
193 15:54:19.988750 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:40) [common]
194 15:54:19.988871 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 15:54:19.989002 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
196 15:54:19.989117 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:40) [common]
197 15:54:20.094872 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 15:54:20.095238 start: 1.5.4 extract-modules (timeout 00:09:40) [common]
199 15:54:20.095446 extracting modules file /var/lib/lava/dispatcher/tmp/9036895/tftp-deploy-_dkdd8bk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9036895/extract-nfsrootfs-v51c_7ea
200 15:54:20.100198 extracting modules file /var/lib/lava/dispatcher/tmp/9036895/tftp-deploy-_dkdd8bk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9036895/extract-overlay-ramdisk-n4do_pb4/ramdisk
201 15:54:20.104819 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 15:54:20.104977 start: 1.5.5 apply-overlay-tftp (timeout 00:09:40) [common]
203 15:54:20.105092 [common] Applying overlay to NFS
204 15:54:20.105172 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9036895/compress-overlay-phdr9fi3/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9036895/extract-nfsrootfs-v51c_7ea
205 15:54:20.575894 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 15:54:20.576113 start: 1.5.6 configure-preseed-file (timeout 00:09:40) [common]
207 15:54:20.576219 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 15:54:20.576313 start: 1.5.7 compress-ramdisk (timeout 00:09:40) [common]
209 15:54:20.576394 Building ramdisk /var/lib/lava/dispatcher/tmp/9036895/extract-overlay-ramdisk-n4do_pb4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9036895/extract-overlay-ramdisk-n4do_pb4/ramdisk
210 15:54:20.610740 >> 24583 blocks
211 15:54:21.103664 rename /var/lib/lava/dispatcher/tmp/9036895/extract-overlay-ramdisk-n4do_pb4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9036895/tftp-deploy-_dkdd8bk/ramdisk/ramdisk.cpio.gz
212 15:54:21.104089 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 15:54:21.104222 start: 1.5.8 prepare-kernel (timeout 00:09:39) [common]
214 15:54:21.104336 start: 1.5.8.1 prepare-fit (timeout 00:09:39) [common]
215 15:54:21.104431 No mkimage arch provided, not using FIT.
216 15:54:21.104524 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 15:54:21.104610 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 15:54:21.104709 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
219 15:54:21.104807 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:39) [common]
220 15:54:21.104888 No LXC device requested
221 15:54:21.104973 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 15:54:21.105062 start: 1.7 deploy-device-env (timeout 00:09:39) [common]
223 15:54:21.105144 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 15:54:21.105229 Checking files for TFTP limit of 4294967296 bytes.
225 15:54:21.105648 end: 1 tftp-deploy (duration 00:00:21) [common]
226 15:54:21.105754 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 15:54:21.105854 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 15:54:21.105997 substitutions:
229 15:54:21.106068 - {DTB}: None
230 15:54:21.106135 - {INITRD}: 9036895/tftp-deploy-_dkdd8bk/ramdisk/ramdisk.cpio.gz
231 15:54:21.106197 - {KERNEL}: 9036895/tftp-deploy-_dkdd8bk/kernel/bzImage
232 15:54:21.106258 - {LAVA_MAC}: None
233 15:54:21.106317 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9036895/extract-nfsrootfs-v51c_7ea
234 15:54:21.106385 - {NFS_SERVER_IP}: 192.168.201.1
235 15:54:21.106446 - {PRESEED_CONFIG}: None
236 15:54:21.106504 - {PRESEED_LOCAL}: None
237 15:54:21.106561 - {RAMDISK}: 9036895/tftp-deploy-_dkdd8bk/ramdisk/ramdisk.cpio.gz
238 15:54:21.106618 - {ROOT_PART}: None
239 15:54:21.106674 - {ROOT}: None
240 15:54:21.106730 - {SERVER_IP}: 192.168.201.1
241 15:54:21.106787 - {TEE}: None
242 15:54:21.106844 Parsed boot commands:
243 15:54:21.106899 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 15:54:21.107059 Parsed boot commands: tftpboot 192.168.201.1 9036895/tftp-deploy-_dkdd8bk/kernel/bzImage 9036895/tftp-deploy-_dkdd8bk/kernel/cmdline 9036895/tftp-deploy-_dkdd8bk/ramdisk/ramdisk.cpio.gz
245 15:54:21.107155 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 15:54:21.107247 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 15:54:21.107343 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 15:54:21.107434 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 15:54:21.107506 Not connected, no need to disconnect.
250 15:54:21.107586 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 15:54:21.107672 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 15:54:21.107745 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
253 15:54:21.110780 Setting prompt string to ['lava-test: # ']
254 15:54:21.111093 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 15:54:21.111209 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 15:54:21.111315 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 15:54:21.111441 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 15:54:21.111680 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
259 15:54:30.427883 >> Command sent successfully.
260 15:54:30.430377 Returned 0 in 9 seconds
261 15:54:30.531166 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
263 15:54:30.531483 end: 2.2.2 reset-device (duration 00:00:09) [common]
264 15:54:30.531599 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
265 15:54:30.531695 Setting prompt string to 'Starting depthcharge on Helios...'
266 15:54:30.531776 Changing prompt to 'Starting depthcharge on Helios...'
267 15:54:30.531844 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 15:54:30.532148 [Enter `^Ec?' for help]
269 15:54:30.532254
270 15:54:30.532321
271 15:54:30.532383 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 15:54:30.532460 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 15:54:30.532520 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 15:54:30.532597 CPU: AES supported, TXT NOT supported, VT supported
275 15:54:30.532656 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 15:54:30.532728 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 15:54:30.532804 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 15:54:30.532875 VBOOT: Loading verstage.
279 15:54:30.532931 FMAP: Found "FLASH" version 1.1 at 0xc04000.
280 15:54:30.532988 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 15:54:30.533061 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 15:54:30.533131 CBFS @ c08000 size 3f8000
283 15:54:30.533187 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 15:54:30.533243 CBFS: Locating 'fallback/verstage'
285 15:54:30.533316 CBFS: Found @ offset 10fb80 size 1072c
286 15:54:30.533385
287 15:54:30.533439
288 15:54:30.533494 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 15:54:30.533569 Probing TPM: . done!
290 15:54:30.533718 TPM ready after 0 ms
291 15:54:30.533826 Connected to device vid:did:rid of 1ae0:0028:00
292 15:54:30.533899 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
293 15:54:30.533960 Initialized TPM device CR50 revision 0
294 15:54:30.534047 tlcl_send_startup: Startup return code is 0
295 15:54:30.534135 TPM: setup succeeded
296 15:54:30.534191 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 15:54:30.534247 Chrome EC: UHEPI supported
298 15:54:30.534319 Phase 1
299 15:54:30.534396 FMAP: area GBB found @ c05000 (12288 bytes)
300 15:54:30.534453 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 15:54:30.534509 Phase 2
302 15:54:30.534581 Phase 3
303 15:54:30.534650 FMAP: area GBB found @ c05000 (12288 bytes)
304 15:54:30.534707 VB2:vb2_report_dev_firmware() This is developer signed firmware
305 15:54:30.534763 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
306 15:54:30.534850 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
307 15:54:30.534905 VB2:vb2_verify_keyblock() Checking keyblock signature...
308 15:54:30.534961 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
309 15:54:30.535017 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
310 15:54:30.535100 VB2:vb2_verify_fw_preamble() Verifying preamble.
311 15:54:30.535155 Phase 4
312 15:54:30.535211 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
313 15:54:30.535267 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
314 15:54:30.535351 VB2:vb2_rsa_verify_digest() Digest check failed!
315 15:54:30.535406 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
316 15:54:30.535462 Saving nvdata
317 15:54:30.535517 Reboot requested (10020007)
318 15:54:30.535587 board_reset() called!
319 15:54:30.535693 full_reset() called!
320 15:54:34.109902
321 15:54:34.110047
322 15:54:34.119349 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
323 15:54:34.122928 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
324 15:54:34.129697 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
325 15:54:34.132639 CPU: AES supported, TXT NOT supported, VT supported
326 15:54:34.139202 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
327 15:54:34.142811 PCH: device id 0284 (rev 00) is Cometlake-U Premium
328 15:54:34.148797 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
329 15:54:34.152382 VBOOT: Loading verstage.
330 15:54:34.156012 FMAP: Found "FLASH" version 1.1 at 0xc04000.
331 15:54:34.162308 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
332 15:54:34.168710 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
333 15:54:34.168793 CBFS @ c08000 size 3f8000
334 15:54:34.175166 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
335 15:54:34.178737 CBFS: Locating 'fallback/verstage'
336 15:54:34.181641 CBFS: Found @ offset 10fb80 size 1072c
337 15:54:34.186007
338 15:54:34.186089
339 15:54:34.196491 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
340 15:54:34.210678 Probing TPM: . done!
341 15:54:34.214207 TPM ready after 0 ms
342 15:54:34.217013 Connected to device vid:did:rid of 1ae0:0028:00
343 15:54:34.227732 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
344 15:54:34.230568 Initialized TPM device CR50 revision 0
345 15:54:34.273131 tlcl_send_startup: Startup return code is 0
346 15:54:34.273248 TPM: setup succeeded
347 15:54:34.286061 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
348 15:54:34.289664 Chrome EC: UHEPI supported
349 15:54:34.292540 Phase 1
350 15:54:34.296026 FMAP: area GBB found @ c05000 (12288 bytes)
351 15:54:34.302633 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
352 15:54:34.309061 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
353 15:54:34.312699 Recovery requested (1009000e)
354 15:54:34.318306 Saving nvdata
355 15:54:34.324579 tlcl_extend: response is 0
356 15:54:34.333213 tlcl_extend: response is 0
357 15:54:34.340612 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
358 15:54:34.343412 CBFS @ c08000 size 3f8000
359 15:54:34.349838 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
360 15:54:34.353347 CBFS: Locating 'fallback/romstage'
361 15:54:34.357055 CBFS: Found @ offset 80 size 145fc
362 15:54:34.359840 Accumulated console time in verstage 98 ms
363 15:54:34.359933
364 15:54:34.360015
365 15:54:34.373397 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
366 15:54:34.380015 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
367 15:54:34.382917 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
368 15:54:34.386610 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
369 15:54:34.392858 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
370 15:54:34.396393 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
371 15:54:34.399297 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
372 15:54:34.402910 TCO_STS: 0000 0000
373 15:54:34.406385 GEN_PMCON: e0015238 00000200
374 15:54:34.409286 GBLRST_CAUSE: 00000000 00000000
375 15:54:34.409369 prev_sleep_state 5
376 15:54:34.412919 Boot Count incremented to 47145
377 15:54:34.419867 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 15:54:34.423416 CBFS @ c08000 size 3f8000
379 15:54:34.429813 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 15:54:34.429933 CBFS: Locating 'fspm.bin'
381 15:54:34.436380 CBFS: Found @ offset 5ffc0 size 71000
382 15:54:34.439820 Chrome EC: UHEPI supported
383 15:54:34.446343 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
384 15:54:34.449954 Probing TPM: done!
385 15:54:34.456518 Connected to device vid:did:rid of 1ae0:0028:00
386 15:54:34.466482 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
387 15:54:34.472241 Initialized TPM device CR50 revision 0
388 15:54:34.480859 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
389 15:54:34.490849 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
390 15:54:34.490995 MRC cache found, size 1948
391 15:54:34.494642 bootmode is set to: 2
392 15:54:34.497551 PRMRR disabled by config.
393 15:54:34.501133 SPD INDEX = 1
394 15:54:34.503926 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
395 15:54:34.507538 CBFS @ c08000 size 3f8000
396 15:54:34.514068 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
397 15:54:34.514168 CBFS: Locating 'spd.bin'
398 15:54:34.517500 CBFS: Found @ offset 5fb80 size 400
399 15:54:34.521066 SPD: module type is LPDDR3
400 15:54:34.523883 SPD: module part is
401 15:54:34.530516 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
402 15:54:34.533997 SPD: device width 4 bits, bus width 8 bits
403 15:54:34.536926 SPD: module size is 4096 MB (per channel)
404 15:54:34.540637 memory slot: 0 configuration done.
405 15:54:34.547139 memory slot: 2 configuration done.
406 15:54:34.595876 CBMEM:
407 15:54:34.598670 IMD: root @ 99fff000 254 entries.
408 15:54:34.601876 IMD: root @ 99ffec00 62 entries.
409 15:54:34.605360 External stage cache:
410 15:54:34.609097 IMD: root @ 9abff000 254 entries.
411 15:54:34.612078 IMD: root @ 9abfec00 62 entries.
412 15:54:34.618947 Chrome EC: clear events_b mask to 0x0000000020004000
413 15:54:34.631330 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 15:54:34.644266 tlcl_write: response is 0
415 15:54:34.653530 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
416 15:54:34.659963 MRC: TPM MRC hash updated successfully.
417 15:54:34.660050 2 DIMMs found
418 15:54:34.663632 SMM Memory Map
419 15:54:34.666502 SMRAM : 0x9a000000 0x1000000
420 15:54:34.670049 Subregion 0: 0x9a000000 0xa00000
421 15:54:34.673735 Subregion 1: 0x9aa00000 0x200000
422 15:54:34.676587 Subregion 2: 0x9ac00000 0x400000
423 15:54:34.680249 top_of_ram = 0x9a000000
424 15:54:34.682995 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
425 15:54:34.689575 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
426 15:54:34.693165 MTRR Range: Start=ff000000 End=0 (Size 1000000)
427 15:54:34.699604 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
428 15:54:34.703252 CBFS @ c08000 size 3f8000
429 15:54:34.706076 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
430 15:54:34.709728 CBFS: Locating 'fallback/postcar'
431 15:54:34.716205 CBFS: Found @ offset 107000 size 4b44
432 15:54:34.722645 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
433 15:54:34.732703 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
434 15:54:34.735673 Processing 180 relocs. Offset value of 0x97c0c000
435 15:54:34.744322 Accumulated console time in romstage 286 ms
436 15:54:34.744411
437 15:54:34.744480
438 15:54:34.753797 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
439 15:54:34.760566 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 15:54:34.764317 CBFS @ c08000 size 3f8000
441 15:54:34.770759 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 15:54:34.773570 CBFS: Locating 'fallback/ramstage'
443 15:54:34.777083 CBFS: Found @ offset 43380 size 1b9e8
444 15:54:34.783549 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
445 15:54:34.815876 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
446 15:54:34.819406 Processing 3976 relocs. Offset value of 0x98db0000
447 15:54:34.826241 Accumulated console time in postcar 52 ms
448 15:54:34.826378
449 15:54:34.826501
450 15:54:34.835822 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
451 15:54:34.842415 FMAP: area RO_VPD found @ c00000 (16384 bytes)
452 15:54:34.845455 WARNING: RO_VPD is uninitialized or empty.
453 15:54:34.849134 FMAP: area RW_VPD found @ af8000 (8192 bytes)
454 15:54:34.855622 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 15:54:34.855711 Normal boot.
456 15:54:34.862152 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
457 15:54:34.865688 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
458 15:54:34.869092 CBFS @ c08000 size 3f8000
459 15:54:34.875518 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
460 15:54:34.878374 CBFS: Locating 'cpu_microcode_blob.bin'
461 15:54:34.881953 CBFS: Found @ offset 14700 size 2ec00
462 15:54:34.885402 microcode: sig=0x806ec pf=0x4 revision=0xc9
463 15:54:34.888269 Skip microcode update
464 15:54:34.894767 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 15:54:34.894855 CBFS @ c08000 size 3f8000
466 15:54:34.901715 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 15:54:34.905256 CBFS: Locating 'fsps.bin'
468 15:54:34.908152 CBFS: Found @ offset d1fc0 size 35000
469 15:54:34.934266 Detected 4 core, 8 thread CPU.
470 15:54:34.937960 Setting up SMI for CPU
471 15:54:34.940912 IED base = 0x9ac00000
472 15:54:34.944313 IED size = 0x00400000
473 15:54:34.944399 Will perform SMM setup.
474 15:54:34.950766 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
475 15:54:34.957211 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
476 15:54:34.963784 Processing 16 relocs. Offset value of 0x00030000
477 15:54:34.963873 Attempting to start 7 APs
478 15:54:34.970248 Waiting for 10ms after sending INIT.
479 15:54:34.984049 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
480 15:54:34.984142 done.
481 15:54:34.986913 AP: slot 7 apic_id 6.
482 15:54:34.990384 AP: slot 6 apic_id 7.
483 15:54:34.990468 AP: slot 5 apic_id 4.
484 15:54:34.993992 AP: slot 2 apic_id 5.
485 15:54:34.996905 AP: slot 4 apic_id 2.
486 15:54:35.000539 AP: slot 1 apic_id 3.
487 15:54:35.003234 Waiting for 2nd SIPI to complete...done.
488 15:54:35.010103 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
489 15:54:35.016440 Processing 13 relocs. Offset value of 0x00038000
490 15:54:35.023709 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
491 15:54:35.026637 Installing SMM handler to 0x9a000000
492 15:54:35.033021 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
493 15:54:35.040009 Processing 658 relocs. Offset value of 0x9a010000
494 15:54:35.046506 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
495 15:54:35.049438 Processing 13 relocs. Offset value of 0x9a008000
496 15:54:35.056678 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
497 15:54:35.063105 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
498 15:54:35.069682 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
499 15:54:35.072548 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
500 15:54:35.079221 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
501 15:54:35.085867 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
502 15:54:35.092162 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
503 15:54:35.099413 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
504 15:54:35.104587 Clearing SMI status registers
505 15:54:35.104689 SMI_STS: PM1
506 15:54:35.105326 PM1_STS: PWRBTN
507 15:54:35.105402 TCO_STS: SECOND_TO
508 15:54:35.108912 New SMBASE 0x9a000000
509 15:54:35.112435 In relocation handler: CPU 0
510 15:54:35.115280 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
511 15:54:35.121820 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 15:54:35.121909 Relocation complete.
513 15:54:35.125401 New SMBASE 0x99fff400
514 15:54:35.128958 In relocation handler: CPU 3
515 15:54:35.131800 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
516 15:54:35.138230 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 15:54:35.138322 Relocation complete.
518 15:54:35.141914 New SMBASE 0x99fffc00
519 15:54:35.144797 In relocation handler: CPU 1
520 15:54:35.148295 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
521 15:54:35.154717 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 15:54:35.154811 Relocation complete.
523 15:54:35.157664 New SMBASE 0x99fff000
524 15:54:35.161179 In relocation handler: CPU 4
525 15:54:35.164951 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
526 15:54:35.170830 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 15:54:35.170915 Relocation complete.
528 15:54:35.174496 New SMBASE 0x99ffe400
529 15:54:35.177956 In relocation handler: CPU 7
530 15:54:35.180801 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
531 15:54:35.187512 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 15:54:35.187600 Relocation complete.
533 15:54:35.191092 New SMBASE 0x99ffe800
534 15:54:35.193946 In relocation handler: CPU 6
535 15:54:35.197503 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
536 15:54:35.204123 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 15:54:35.204210 Relocation complete.
538 15:54:35.207758 New SMBASE 0x99fff800
539 15:54:35.210605 In relocation handler: CPU 2
540 15:54:35.214170 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
541 15:54:35.217088 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 15:54:35.220695 Relocation complete.
543 15:54:35.224340 New SMBASE 0x99ffec00
544 15:54:35.227149 In relocation handler: CPU 5
545 15:54:35.230841 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
546 15:54:35.233651 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 15:54:35.237234 Relocation complete.
548 15:54:35.240157 Initializing CPU #0
549 15:54:35.243732 CPU: vendor Intel device 806ec
550 15:54:35.246690 CPU: family 06, model 8e, stepping 0c
551 15:54:35.250229 Clearing out pending MCEs
552 15:54:35.250304 Setting up local APIC...
553 15:54:35.253690 apic_id: 0x00 done.
554 15:54:35.256629 Turbo is available but hidden
555 15:54:35.260028 Turbo is available and visible
556 15:54:35.263628 VMX status: enabled
557 15:54:35.266437 IA32_FEATURE_CONTROL status: locked
558 15:54:35.266522 Skip microcode update
559 15:54:35.270040 CPU #0 initialized
560 15:54:35.272927 Initializing CPU #3
561 15:54:35.273014 Initializing CPU #7
562 15:54:35.276587 Initializing CPU #6
563 15:54:35.279487 CPU: vendor Intel device 806ec
564 15:54:35.283071 CPU: family 06, model 8e, stepping 0c
565 15:54:35.286173 Initializing CPU #5
566 15:54:35.286259 Initializing CPU #2
567 15:54:35.289650 CPU: vendor Intel device 806ec
568 15:54:35.293172 CPU: family 06, model 8e, stepping 0c
569 15:54:35.295991 CPU: vendor Intel device 806ec
570 15:54:35.299613 CPU: family 06, model 8e, stepping 0c
571 15:54:35.303157 Clearing out pending MCEs
572 15:54:35.306069 Clearing out pending MCEs
573 15:54:35.309710 Setting up local APIC...
574 15:54:35.312551 CPU: vendor Intel device 806ec
575 15:54:35.316067 CPU: family 06, model 8e, stepping 0c
576 15:54:35.319667 Clearing out pending MCEs
577 15:54:35.319816 apic_id: 0x05 done.
578 15:54:35.322401 Setting up local APIC...
579 15:54:35.326062 Setting up local APIC...
580 15:54:35.328923 CPU: vendor Intel device 806ec
581 15:54:35.332370 CPU: family 06, model 8e, stepping 0c
582 15:54:35.335857 Clearing out pending MCEs
583 15:54:35.339219 Clearing out pending MCEs
584 15:54:35.339299 Setting up local APIC...
585 15:54:35.342193 Initializing CPU #1
586 15:54:35.345704 Initializing CPU #4
587 15:54:35.348634 CPU: vendor Intel device 806ec
588 15:54:35.352054 CPU: family 06, model 8e, stepping 0c
589 15:54:35.355492 CPU: vendor Intel device 806ec
590 15:54:35.358483 CPU: family 06, model 8e, stepping 0c
591 15:54:35.361928 Clearing out pending MCEs
592 15:54:35.362009 Clearing out pending MCEs
593 15:54:35.365610 Setting up local APIC...
594 15:54:35.368481 Setting up local APIC...
595 15:54:35.372088 Setting up local APIC...
596 15:54:35.372170 apic_id: 0x01 done.
597 15:54:35.374996 apic_id: 0x06 done.
598 15:54:35.378610 apic_id: 0x07 done.
599 15:54:35.378688 VMX status: enabled
600 15:54:35.382212 VMX status: enabled
601 15:54:35.385059 IA32_FEATURE_CONTROL status: locked
602 15:54:35.388742 IA32_FEATURE_CONTROL status: locked
603 15:54:35.391576 Skip microcode update
604 15:54:35.391656 Skip microcode update
605 15:54:35.395119 apic_id: 0x04 done.
606 15:54:35.398658 VMX status: enabled
607 15:54:35.398746 VMX status: enabled
608 15:54:35.401654 CPU #6 initialized
609 15:54:35.404650 CPU #7 initialized
610 15:54:35.404745 apic_id: 0x03 done.
611 15:54:35.408223 apic_id: 0x02 done.
612 15:54:35.408303 VMX status: enabled
613 15:54:35.411799 VMX status: enabled
614 15:54:35.414588 IA32_FEATURE_CONTROL status: locked
615 15:54:35.418139 IA32_FEATURE_CONTROL status: locked
616 15:54:35.421760 Skip microcode update
617 15:54:35.424649 Skip microcode update
618 15:54:35.424735 CPU #1 initialized
619 15:54:35.428175 CPU #4 initialized
620 15:54:35.431736 IA32_FEATURE_CONTROL status: locked
621 15:54:35.431831 VMX status: enabled
622 15:54:35.438238 IA32_FEATURE_CONTROL status: locked
623 15:54:35.441008 IA32_FEATURE_CONTROL status: locked
624 15:54:35.441093 Skip microcode update
625 15:54:35.444689 Skip microcode update
626 15:54:35.447573 CPU #2 initialized
627 15:54:35.447689 CPU #5 initialized
628 15:54:35.451124 Skip microcode update
629 15:54:35.454614 CPU #3 initialized
630 15:54:35.457525 bsp_do_flight_plan done after 452 msecs.
631 15:54:35.461083 CPU: frequency set to 4200 MHz
632 15:54:35.461169 Enabling SMIs.
633 15:54:35.464559 Locking SMM.
634 15:54:35.477601 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
635 15:54:35.481163 CBFS @ c08000 size 3f8000
636 15:54:35.487743 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
637 15:54:35.487854 CBFS: Locating 'vbt.bin'
638 15:54:35.494257 CBFS: Found @ offset 5f5c0 size 499
639 15:54:35.497724 Found a VBT of 4608 bytes after decompression
640 15:54:35.678789 Display FSP Version Info HOB
641 15:54:35.682325 Reference Code - CPU = 9.0.1e.30
642 15:54:35.685157 uCode Version = 0.0.0.ca
643 15:54:35.688786 TXT ACM version = ff.ff.ff.ffff
644 15:54:35.691782 Display FSP Version Info HOB
645 15:54:35.695304 Reference Code - ME = 9.0.1e.30
646 15:54:35.698200 MEBx version = 0.0.0.0
647 15:54:35.701770 ME Firmware Version = Consumer SKU
648 15:54:35.704649 Display FSP Version Info HOB
649 15:54:35.708274 Reference Code - CML PCH = 9.0.1e.30
650 15:54:35.711860 PCH-CRID Status = Disabled
651 15:54:35.714811 PCH-CRID Original Value = ff.ff.ff.ffff
652 15:54:35.718239 PCH-CRID New Value = ff.ff.ff.ffff
653 15:54:35.721719 OPROM - RST - RAID = ff.ff.ff.ffff
654 15:54:35.724575 ChipsetInit Base Version = ff.ff.ff.ffff
655 15:54:35.728136 ChipsetInit Oem Version = ff.ff.ff.ffff
656 15:54:35.731638 Display FSP Version Info HOB
657 15:54:35.738190 Reference Code - SA - System Agent = 9.0.1e.30
658 15:54:35.741024 Reference Code - MRC = 0.7.1.6c
659 15:54:35.744631 SA - PCIe Version = 9.0.1e.30
660 15:54:35.744717 SA-CRID Status = Disabled
661 15:54:35.748054 SA-CRID Original Value = 0.0.0.c
662 15:54:35.750942 SA-CRID New Value = 0.0.0.c
663 15:54:35.754560 OPROM - VBIOS = ff.ff.ff.ffff
664 15:54:35.757419 RTC Init
665 15:54:35.760918 Set power on after power failure.
666 15:54:35.761003 Disabling Deep S3
667 15:54:35.764539 Disabling Deep S3
668 15:54:35.767365 Disabling Deep S4
669 15:54:35.767465 Disabling Deep S4
670 15:54:35.770942 Disabling Deep S5
671 15:54:35.771027 Disabling Deep S5
672 15:54:35.776870 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
673 15:54:35.780476 Enumerating buses...
674 15:54:35.783411 Show all devs... Before device enumeration.
675 15:54:35.787037 Root Device: enabled 1
676 15:54:35.790531 CPU_CLUSTER: 0: enabled 1
677 15:54:35.790617 DOMAIN: 0000: enabled 1
678 15:54:35.793370 APIC: 00: enabled 1
679 15:54:35.797108 PCI: 00:00.0: enabled 1
680 15:54:35.797194 PCI: 00:02.0: enabled 1
681 15:54:35.799834 PCI: 00:04.0: enabled 0
682 15:54:35.803410 PCI: 00:05.0: enabled 0
683 15:54:35.806974 PCI: 00:12.0: enabled 1
684 15:54:35.807066 PCI: 00:12.5: enabled 0
685 15:54:35.809817 PCI: 00:12.6: enabled 0
686 15:54:35.813543 PCI: 00:14.0: enabled 1
687 15:54:35.816512 PCI: 00:14.1: enabled 0
688 15:54:35.816644 PCI: 00:14.3: enabled 1
689 15:54:35.819941 PCI: 00:14.5: enabled 0
690 15:54:35.822797 PCI: 00:15.0: enabled 1
691 15:54:35.826381 PCI: 00:15.1: enabled 1
692 15:54:35.826465 PCI: 00:15.2: enabled 0
693 15:54:35.829998 PCI: 00:15.3: enabled 0
694 15:54:35.833043 PCI: 00:16.0: enabled 1
695 15:54:35.836596 PCI: 00:16.1: enabled 0
696 15:54:35.836682 PCI: 00:16.2: enabled 0
697 15:54:35.839481 PCI: 00:16.3: enabled 0
698 15:54:35.842988 PCI: 00:16.4: enabled 0
699 15:54:35.846419 PCI: 00:16.5: enabled 0
700 15:54:35.846508 PCI: 00:17.0: enabled 1
701 15:54:35.849244 PCI: 00:19.0: enabled 1
702 15:54:35.852835 PCI: 00:19.1: enabled 0
703 15:54:35.852929 PCI: 00:19.2: enabled 0
704 15:54:35.855690 PCI: 00:1a.0: enabled 0
705 15:54:35.859178 PCI: 00:1c.0: enabled 0
706 15:54:35.862715 PCI: 00:1c.1: enabled 0
707 15:54:35.862791 PCI: 00:1c.2: enabled 0
708 15:54:35.865564 PCI: 00:1c.3: enabled 0
709 15:54:35.869240 PCI: 00:1c.4: enabled 0
710 15:54:35.872172 PCI: 00:1c.5: enabled 0
711 15:54:35.872249 PCI: 00:1c.6: enabled 0
712 15:54:35.875858 PCI: 00:1c.7: enabled 0
713 15:54:35.878746 PCI: 00:1d.0: enabled 1
714 15:54:35.881793 PCI: 00:1d.1: enabled 0
715 15:54:35.881886 PCI: 00:1d.2: enabled 0
716 15:54:35.885468 PCI: 00:1d.3: enabled 0
717 15:54:35.888370 PCI: 00:1d.4: enabled 0
718 15:54:35.891947 PCI: 00:1d.5: enabled 1
719 15:54:35.892040 PCI: 00:1e.0: enabled 1
720 15:54:35.894775 PCI: 00:1e.1: enabled 0
721 15:54:35.898333 PCI: 00:1e.2: enabled 1
722 15:54:35.901955 PCI: 00:1e.3: enabled 1
723 15:54:35.902042 PCI: 00:1f.0: enabled 1
724 15:54:35.904865 PCI: 00:1f.1: enabled 1
725 15:54:35.908498 PCI: 00:1f.2: enabled 1
726 15:54:35.911284 PCI: 00:1f.3: enabled 1
727 15:54:35.911375 PCI: 00:1f.4: enabled 1
728 15:54:35.914805 PCI: 00:1f.5: enabled 1
729 15:54:35.917733 PCI: 00:1f.6: enabled 0
730 15:54:35.921291 USB0 port 0: enabled 1
731 15:54:35.921397 I2C: 00:15: enabled 1
732 15:54:35.924722 I2C: 00:5d: enabled 1
733 15:54:35.927632 GENERIC: 0.0: enabled 1
734 15:54:35.927719 I2C: 00:1a: enabled 1
735 15:54:35.931205 I2C: 00:38: enabled 1
736 15:54:35.934804 I2C: 00:39: enabled 1
737 15:54:35.934907 I2C: 00:3a: enabled 1
738 15:54:35.937651 I2C: 00:3b: enabled 1
739 15:54:35.941263 PCI: 00:00.0: enabled 1
740 15:54:35.941351 SPI: 00: enabled 1
741 15:54:35.944112 SPI: 01: enabled 1
742 15:54:35.947629 PNP: 0c09.0: enabled 1
743 15:54:35.947716 USB2 port 0: enabled 1
744 15:54:35.950522 USB2 port 1: enabled 1
745 15:54:35.954248 USB2 port 2: enabled 0
746 15:54:35.957167 USB2 port 3: enabled 0
747 15:54:35.957255 USB2 port 5: enabled 0
748 15:54:35.960703 USB2 port 6: enabled 1
749 15:54:35.964165 USB2 port 9: enabled 1
750 15:54:35.964252 USB3 port 0: enabled 1
751 15:54:35.966983 USB3 port 1: enabled 1
752 15:54:35.970515 USB3 port 2: enabled 1
753 15:54:35.973484 USB3 port 3: enabled 1
754 15:54:35.973576 USB3 port 4: enabled 0
755 15:54:35.976994 APIC: 03: enabled 1
756 15:54:35.980671 APIC: 05: enabled 1
757 15:54:35.980758 APIC: 01: enabled 1
758 15:54:35.983561 APIC: 02: enabled 1
759 15:54:35.983648 APIC: 04: enabled 1
760 15:54:35.986482 APIC: 07: enabled 1
761 15:54:35.990043 APIC: 06: enabled 1
762 15:54:35.990130 Compare with tree...
763 15:54:35.993695 Root Device: enabled 1
764 15:54:35.996593 CPU_CLUSTER: 0: enabled 1
765 15:54:36.000191 APIC: 00: enabled 1
766 15:54:36.000279 APIC: 03: enabled 1
767 15:54:36.003018 APIC: 05: enabled 1
768 15:54:36.006537 APIC: 01: enabled 1
769 15:54:36.006625 APIC: 02: enabled 1
770 15:54:36.010020 APIC: 04: enabled 1
771 15:54:36.012832 APIC: 07: enabled 1
772 15:54:36.012936 APIC: 06: enabled 1
773 15:54:36.016440 DOMAIN: 0000: enabled 1
774 15:54:36.019205 PCI: 00:00.0: enabled 1
775 15:54:36.022779 PCI: 00:02.0: enabled 1
776 15:54:36.026221 PCI: 00:04.0: enabled 0
777 15:54:36.026313 PCI: 00:05.0: enabled 0
778 15:54:36.029243 PCI: 00:12.0: enabled 1
779 15:54:36.032937 PCI: 00:12.5: enabled 0
780 15:54:36.035667 PCI: 00:12.6: enabled 0
781 15:54:36.039307 PCI: 00:14.0: enabled 1
782 15:54:36.039452 USB0 port 0: enabled 1
783 15:54:36.042303 USB2 port 0: enabled 1
784 15:54:36.045819 USB2 port 1: enabled 1
785 15:54:36.048659 USB2 port 2: enabled 0
786 15:54:36.052155 USB2 port 3: enabled 0
787 15:54:36.055054 USB2 port 5: enabled 0
788 15:54:36.055141 USB2 port 6: enabled 1
789 15:54:36.058697 USB2 port 9: enabled 1
790 15:54:36.062196 USB3 port 0: enabled 1
791 15:54:36.065045 USB3 port 1: enabled 1
792 15:54:36.068397 USB3 port 2: enabled 1
793 15:54:36.071851 USB3 port 3: enabled 1
794 15:54:36.071988 USB3 port 4: enabled 0
795 15:54:36.074662 PCI: 00:14.1: enabled 0
796 15:54:36.078194 PCI: 00:14.3: enabled 1
797 15:54:36.081871 PCI: 00:14.5: enabled 0
798 15:54:36.084789 PCI: 00:15.0: enabled 1
799 15:54:36.084877 I2C: 00:15: enabled 1
800 15:54:36.088295 PCI: 00:15.1: enabled 1
801 15:54:36.091129 I2C: 00:5d: enabled 1
802 15:54:36.094792 GENERIC: 0.0: enabled 1
803 15:54:36.097640 PCI: 00:15.2: enabled 0
804 15:54:36.097727 PCI: 00:15.3: enabled 0
805 15:54:36.101096 PCI: 00:16.0: enabled 1
806 15:54:36.104587 PCI: 00:16.1: enabled 0
807 15:54:36.107530 PCI: 00:16.2: enabled 0
808 15:54:36.110863 PCI: 00:16.3: enabled 0
809 15:54:36.110975 PCI: 00:16.4: enabled 0
810 15:54:36.114421 PCI: 00:16.5: enabled 0
811 15:54:36.117301 PCI: 00:17.0: enabled 1
812 15:54:36.120840 PCI: 00:19.0: enabled 1
813 15:54:36.124397 I2C: 00:1a: enabled 1
814 15:54:36.124501 I2C: 00:38: enabled 1
815 15:54:36.127224 I2C: 00:39: enabled 1
816 15:54:36.130809 I2C: 00:3a: enabled 1
817 15:54:36.133637 I2C: 00:3b: enabled 1
818 15:54:36.133724 PCI: 00:19.1: enabled 0
819 15:54:36.137273 PCI: 00:19.2: enabled 0
820 15:54:36.140810 PCI: 00:1a.0: enabled 0
821 15:54:36.143648 PCI: 00:1c.0: enabled 0
822 15:54:36.147044 PCI: 00:1c.1: enabled 0
823 15:54:36.147131 PCI: 00:1c.2: enabled 0
824 15:54:36.150675 PCI: 00:1c.3: enabled 0
825 15:54:36.153353 PCI: 00:1c.4: enabled 0
826 15:54:36.156942 PCI: 00:1c.5: enabled 0
827 15:54:36.160335 PCI: 00:1c.6: enabled 0
828 15:54:36.160423 PCI: 00:1c.7: enabled 0
829 15:54:36.163249 PCI: 00:1d.0: enabled 1
830 15:54:36.166780 PCI: 00:1d.1: enabled 0
831 15:54:36.169673 PCI: 00:1d.2: enabled 0
832 15:54:36.173231 PCI: 00:1d.3: enabled 0
833 15:54:36.176134 PCI: 00:1d.4: enabled 0
834 15:54:36.176239 PCI: 00:1d.5: enabled 1
835 15:54:36.179637 PCI: 00:00.0: enabled 1
836 15:54:36.183155 PCI: 00:1e.0: enabled 1
837 15:54:36.186020 PCI: 00:1e.1: enabled 0
838 15:54:36.189528 PCI: 00:1e.2: enabled 1
839 15:54:36.189615 SPI: 00: enabled 1
840 15:54:36.192527 PCI: 00:1e.3: enabled 1
841 15:54:36.196074 SPI: 01: enabled 1
842 15:54:36.198977 PCI: 00:1f.0: enabled 1
843 15:54:36.199064 PNP: 0c09.0: enabled 1
844 15:54:36.202621 PCI: 00:1f.1: enabled 1
845 15:54:36.205559 PCI: 00:1f.2: enabled 1
846 15:54:36.209186 PCI: 00:1f.3: enabled 1
847 15:54:36.212117 PCI: 00:1f.4: enabled 1
848 15:54:36.212238 PCI: 00:1f.5: enabled 1
849 15:54:36.215519 PCI: 00:1f.6: enabled 0
850 15:54:36.219036 Root Device scanning...
851 15:54:36.221935 scan_static_bus for Root Device
852 15:54:36.225438 CPU_CLUSTER: 0 enabled
853 15:54:36.225544 DOMAIN: 0000 enabled
854 15:54:36.228918 DOMAIN: 0000 scanning...
855 15:54:36.231802 PCI: pci_scan_bus for bus 00
856 15:54:36.235273 PCI: 00:00.0 [8086/0000] ops
857 15:54:36.238144 PCI: 00:00.0 [8086/9b61] enabled
858 15:54:36.241699 PCI: 00:02.0 [8086/0000] bus ops
859 15:54:36.245304 PCI: 00:02.0 [8086/9b41] enabled
860 15:54:36.248168 PCI: 00:04.0 [8086/1903] disabled
861 15:54:36.251811 PCI: 00:08.0 [8086/1911] enabled
862 15:54:36.254641 PCI: 00:12.0 [8086/02f9] enabled
863 15:54:36.258123 PCI: 00:14.0 [8086/0000] bus ops
864 15:54:36.261754 PCI: 00:14.0 [8086/02ed] enabled
865 15:54:36.264616 PCI: 00:14.2 [8086/02ef] enabled
866 15:54:36.268183 PCI: 00:14.3 [8086/02f0] enabled
867 15:54:36.270863 PCI: 00:15.0 [8086/0000] bus ops
868 15:54:36.274495 PCI: 00:15.0 [8086/02e8] enabled
869 15:54:36.278046 PCI: 00:15.1 [8086/0000] bus ops
870 15:54:36.280938 PCI: 00:15.1 [8086/02e9] enabled
871 15:54:36.284526 PCI: 00:16.0 [8086/0000] ops
872 15:54:36.287493 PCI: 00:16.0 [8086/02e0] enabled
873 15:54:36.291011 PCI: 00:17.0 [8086/0000] ops
874 15:54:36.293941 PCI: 00:17.0 [8086/02d3] enabled
875 15:54:36.297569 PCI: 00:19.0 [8086/0000] bus ops
876 15:54:36.300362 PCI: 00:19.0 [8086/02c5] enabled
877 15:54:36.303875 PCI: 00:1d.0 [8086/0000] bus ops
878 15:54:36.307518 PCI: 00:1d.0 [8086/02b0] enabled
879 15:54:36.313963 PCI: Static device PCI: 00:1d.5 not found, disabling it.
880 15:54:36.316744 PCI: 00:1e.0 [8086/0000] ops
881 15:54:36.320404 PCI: 00:1e.0 [8086/02a8] enabled
882 15:54:36.323224 PCI: 00:1e.2 [8086/0000] bus ops
883 15:54:36.326746 PCI: 00:1e.2 [8086/02aa] enabled
884 15:54:36.330431 PCI: 00:1e.3 [8086/0000] bus ops
885 15:54:36.333270 PCI: 00:1e.3 [8086/02ab] enabled
886 15:54:36.336267 PCI: 00:1f.0 [8086/0000] bus ops
887 15:54:36.340039 PCI: 00:1f.0 [8086/0284] enabled
888 15:54:36.346402 PCI: Static device PCI: 00:1f.1 not found, disabling it.
889 15:54:36.349908 PCI: Static device PCI: 00:1f.2 not found, disabling it.
890 15:54:36.352811 PCI: 00:1f.3 [8086/0000] bus ops
891 15:54:36.356437 PCI: 00:1f.3 [8086/02c8] enabled
892 15:54:36.359233 PCI: 00:1f.4 [8086/0000] bus ops
893 15:54:36.362741 PCI: 00:1f.4 [8086/02a3] enabled
894 15:54:36.365713 PCI: 00:1f.5 [8086/0000] bus ops
895 15:54:36.369190 PCI: 00:1f.5 [8086/02a4] enabled
896 15:54:36.372748 PCI: Leftover static devices:
897 15:54:36.376277 PCI: 00:05.0
898 15:54:36.376365 PCI: 00:12.5
899 15:54:36.379153 PCI: 00:12.6
900 15:54:36.379242 PCI: 00:14.1
901 15:54:36.379314 PCI: 00:14.5
902 15:54:36.382705 PCI: 00:15.2
903 15:54:36.382791 PCI: 00:15.3
904 15:54:36.385601 PCI: 00:16.1
905 15:54:36.385688 PCI: 00:16.2
906 15:54:36.389152 PCI: 00:16.3
907 15:54:36.389249 PCI: 00:16.4
908 15:54:36.389323 PCI: 00:16.5
909 15:54:36.392046 PCI: 00:19.1
910 15:54:36.392124 PCI: 00:19.2
911 15:54:36.395636 PCI: 00:1a.0
912 15:54:36.395716 PCI: 00:1c.0
913 15:54:36.395786 PCI: 00:1c.1
914 15:54:36.399120 PCI: 00:1c.2
915 15:54:36.399199 PCI: 00:1c.3
916 15:54:36.401996 PCI: 00:1c.4
917 15:54:36.402075 PCI: 00:1c.5
918 15:54:36.405616 PCI: 00:1c.6
919 15:54:36.405696 PCI: 00:1c.7
920 15:54:36.405763 PCI: 00:1d.1
921 15:54:36.408560 PCI: 00:1d.2
922 15:54:36.408650 PCI: 00:1d.3
923 15:54:36.412075 PCI: 00:1d.4
924 15:54:36.412162 PCI: 00:1d.5
925 15:54:36.414873 PCI: 00:1e.1
926 15:54:36.414953 PCI: 00:1f.1
927 15:54:36.415023 PCI: 00:1f.2
928 15:54:36.418440 PCI: 00:1f.6
929 15:54:36.421904 PCI: Check your devicetree.cb.
930 15:54:36.421985 PCI: 00:02.0 scanning...
931 15:54:36.428281 scan_generic_bus for PCI: 00:02.0
932 15:54:36.431952 scan_generic_bus for PCI: 00:02.0 done
933 15:54:36.435514 scan_bus: scanning of bus PCI: 00:02.0 took 10192 usecs
934 15:54:36.438289 PCI: 00:14.0 scanning...
935 15:54:36.441946 scan_static_bus for PCI: 00:14.0
936 15:54:36.444810 USB0 port 0 enabled
937 15:54:36.448251 USB0 port 0 scanning...
938 15:54:36.451876 scan_static_bus for USB0 port 0
939 15:54:36.451995 USB2 port 0 enabled
940 15:54:36.454806 USB2 port 1 enabled
941 15:54:36.458331 USB2 port 2 disabled
942 15:54:36.458409 USB2 port 3 disabled
943 15:54:36.461752 USB2 port 5 disabled
944 15:54:36.464754 USB2 port 6 enabled
945 15:54:36.464833 USB2 port 9 enabled
946 15:54:36.468487 USB3 port 0 enabled
947 15:54:36.468574 USB3 port 1 enabled
948 15:54:36.471321 USB3 port 2 enabled
949 15:54:36.474877 USB3 port 3 enabled
950 15:54:36.474960 USB3 port 4 disabled
951 15:54:36.477724 USB2 port 0 scanning...
952 15:54:36.481295 scan_static_bus for USB2 port 0
953 15:54:36.484240 scan_static_bus for USB2 port 0 done
954 15:54:36.491514 scan_bus: scanning of bus USB2 port 0 took 9707 usecs
955 15:54:36.494332 USB2 port 1 scanning...
956 15:54:36.497272 scan_static_bus for USB2 port 1
957 15:54:36.500923 scan_static_bus for USB2 port 1 done
958 15:54:36.503793 scan_bus: scanning of bus USB2 port 1 took 9690 usecs
959 15:54:36.507413 USB2 port 6 scanning...
960 15:54:36.510207 scan_static_bus for USB2 port 6
961 15:54:36.513865 scan_static_bus for USB2 port 6 done
962 15:54:36.520116 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
963 15:54:36.523774 USB2 port 9 scanning...
964 15:54:36.526655 scan_static_bus for USB2 port 9
965 15:54:36.530146 scan_static_bus for USB2 port 9 done
966 15:54:36.536536 scan_bus: scanning of bus USB2 port 9 took 9708 usecs
967 15:54:36.536627 USB3 port 0 scanning...
968 15:54:36.540113 scan_static_bus for USB3 port 0
969 15:54:36.546519 scan_static_bus for USB3 port 0 done
970 15:54:36.550009 scan_bus: scanning of bus USB3 port 0 took 9689 usecs
971 15:54:36.552902 USB3 port 1 scanning...
972 15:54:36.556465 scan_static_bus for USB3 port 1
973 15:54:36.559366 scan_static_bus for USB3 port 1 done
974 15:54:36.566385 scan_bus: scanning of bus USB3 port 1 took 9707 usecs
975 15:54:36.569197 USB3 port 2 scanning...
976 15:54:36.572810 scan_static_bus for USB3 port 2
977 15:54:36.575690 scan_static_bus for USB3 port 2 done
978 15:54:36.579135 scan_bus: scanning of bus USB3 port 2 took 9700 usecs
979 15:54:36.582651 USB3 port 3 scanning...
980 15:54:36.585587 scan_static_bus for USB3 port 3
981 15:54:36.589177 scan_static_bus for USB3 port 3 done
982 15:54:36.595697 scan_bus: scanning of bus USB3 port 3 took 9707 usecs
983 15:54:36.598623 scan_static_bus for USB0 port 0 done
984 15:54:36.605800 scan_bus: scanning of bus USB0 port 0 took 155345 usecs
985 15:54:36.608692 scan_static_bus for PCI: 00:14.0 done
986 15:54:36.615089 scan_bus: scanning of bus PCI: 00:14.0 took 172965 usecs
987 15:54:36.615182 PCI: 00:15.0 scanning...
988 15:54:36.622261 scan_generic_bus for PCI: 00:15.0
989 15:54:36.624981 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
990 15:54:36.628553 scan_generic_bus for PCI: 00:15.0 done
991 15:54:36.635115 scan_bus: scanning of bus PCI: 00:15.0 took 14301 usecs
992 15:54:36.635202 PCI: 00:15.1 scanning...
993 15:54:36.641507 scan_generic_bus for PCI: 00:15.1
994 15:54:36.645155 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
995 15:54:36.647893 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
996 15:54:36.651520 scan_generic_bus for PCI: 00:15.1 done
997 15:54:36.657973 scan_bus: scanning of bus PCI: 00:15.1 took 18599 usecs
998 15:54:36.661622 PCI: 00:19.0 scanning...
999 15:54:36.664334 scan_generic_bus for PCI: 00:19.0
1000 15:54:36.667948 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1001 15:54:36.670890 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1002 15:54:36.677414 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1003 15:54:36.680897 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1004 15:54:36.683819 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1005 15:54:36.687471 scan_generic_bus for PCI: 00:19.0 done
1006 15:54:36.693898 scan_bus: scanning of bus PCI: 00:19.0 took 30731 usecs
1007 15:54:36.697556 PCI: 00:1d.0 scanning...
1008 15:54:36.700559 do_pci_scan_bridge for PCI: 00:1d.0
1009 15:54:36.704181 PCI: pci_scan_bus for bus 01
1010 15:54:36.707012 PCI: 01:00.0 [1c5c/1327] enabled
1011 15:54:36.710707 Enabling Common Clock Configuration
1012 15:54:36.713610 L1 Sub-State supported from root port 29
1013 15:54:36.717255 L1 Sub-State Support = 0xf
1014 15:54:36.720171 CommonModeRestoreTime = 0x28
1015 15:54:36.723696 Power On Value = 0x16, Power On Scale = 0x0
1016 15:54:36.726456 ASPM: Enabled L1
1017 15:54:36.733680 scan_bus: scanning of bus PCI: 00:1d.0 took 32772 usecs
1018 15:54:36.733768 PCI: 00:1e.2 scanning...
1019 15:54:36.740146 scan_generic_bus for PCI: 00:1e.2
1020 15:54:36.743604 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1021 15:54:36.746481 scan_generic_bus for PCI: 00:1e.2 done
1022 15:54:36.752900 scan_bus: scanning of bus PCI: 00:1e.2 took 14004 usecs
1023 15:54:36.752986 PCI: 00:1e.3 scanning...
1024 15:54:36.756565 scan_generic_bus for PCI: 00:1e.3
1025 15:54:36.762852 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1026 15:54:36.766322 scan_generic_bus for PCI: 00:1e.3 done
1027 15:54:36.772839 scan_bus: scanning of bus PCI: 00:1e.3 took 14002 usecs
1028 15:54:36.772926 PCI: 00:1f.0 scanning...
1029 15:54:36.775769 scan_static_bus for PCI: 00:1f.0
1030 15:54:36.779284 PNP: 0c09.0 enabled
1031 15:54:36.782799 scan_static_bus for PCI: 00:1f.0 done
1032 15:54:36.789226 scan_bus: scanning of bus PCI: 00:1f.0 took 12046 usecs
1033 15:54:36.792255 PCI: 00:1f.3 scanning...
1034 15:54:36.795915 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1035 15:54:36.798821 PCI: 00:1f.4 scanning...
1036 15:54:36.802449 scan_generic_bus for PCI: 00:1f.4
1037 15:54:36.808909 scan_generic_bus for PCI: 00:1f.4 done
1038 15:54:36.811805 scan_bus: scanning of bus PCI: 00:1f.4 took 10187 usecs
1039 15:54:36.815391 PCI: 00:1f.5 scanning...
1040 15:54:36.818335 scan_generic_bus for PCI: 00:1f.5
1041 15:54:36.821983 scan_generic_bus for PCI: 00:1f.5 done
1042 15:54:36.828264 scan_bus: scanning of bus PCI: 00:1f.5 took 10202 usecs
1043 15:54:36.834819 scan_bus: scanning of bus DOMAIN: 0000 took 605018 usecs
1044 15:54:36.838390 scan_static_bus for Root Device done
1045 15:54:36.844884 scan_bus: scanning of bus Root Device took 624935 usecs
1046 15:54:36.844972 done
1047 15:54:36.847702 Chrome EC: UHEPI supported
1048 15:54:36.854248 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1049 15:54:36.857850 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1050 15:54:36.864323 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1051 15:54:36.872108 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1052 15:54:36.874980 SPI flash protection: WPSW=0 SRP0=1
1053 15:54:36.881432 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1054 15:54:36.884977 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1055 15:54:36.887803 found VGA at PCI: 00:02.0
1056 15:54:36.891450 Setting up VGA for PCI: 00:02.0
1057 15:54:36.897903 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1058 15:54:36.901613 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1059 15:54:36.904655 Allocating resources...
1060 15:54:36.907629 Reading resources...
1061 15:54:36.911246 Root Device read_resources bus 0 link: 0
1062 15:54:36.914116 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1063 15:54:36.920875 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1064 15:54:36.923892 DOMAIN: 0000 read_resources bus 0 link: 0
1065 15:54:36.932202 PCI: 00:14.0 read_resources bus 0 link: 0
1066 15:54:36.935138 USB0 port 0 read_resources bus 0 link: 0
1067 15:54:36.943154 USB0 port 0 read_resources bus 0 link: 0 done
1068 15:54:36.946645 PCI: 00:14.0 read_resources bus 0 link: 0 done
1069 15:54:36.953745 PCI: 00:15.0 read_resources bus 1 link: 0
1070 15:54:36.957327 PCI: 00:15.0 read_resources bus 1 link: 0 done
1071 15:54:36.963820 PCI: 00:15.1 read_resources bus 2 link: 0
1072 15:54:36.967522 PCI: 00:15.1 read_resources bus 2 link: 0 done
1073 15:54:36.974621 PCI: 00:19.0 read_resources bus 3 link: 0
1074 15:54:36.981066 PCI: 00:19.0 read_resources bus 3 link: 0 done
1075 15:54:36.984569 PCI: 00:1d.0 read_resources bus 1 link: 0
1076 15:54:36.990801 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1077 15:54:36.994438 PCI: 00:1e.2 read_resources bus 4 link: 0
1078 15:54:37.000832 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1079 15:54:37.004655 PCI: 00:1e.3 read_resources bus 5 link: 0
1080 15:54:37.011009 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1081 15:54:37.013837 PCI: 00:1f.0 read_resources bus 0 link: 0
1082 15:54:37.020312 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1083 15:54:37.027459 DOMAIN: 0000 read_resources bus 0 link: 0 done
1084 15:54:37.030305 Root Device read_resources bus 0 link: 0 done
1085 15:54:37.033830 Done reading resources.
1086 15:54:37.040325 Show resources in subtree (Root Device)...After reading.
1087 15:54:37.043803 Root Device child on link 0 CPU_CLUSTER: 0
1088 15:54:37.046566 CPU_CLUSTER: 0 child on link 0 APIC: 00
1089 15:54:37.050103 APIC: 00
1090 15:54:37.050190 APIC: 03
1091 15:54:37.050259 APIC: 05
1092 15:54:37.053737 APIC: 01
1093 15:54:37.053867 APIC: 02
1094 15:54:37.056333 APIC: 04
1095 15:54:37.056420 APIC: 07
1096 15:54:37.056489 APIC: 06
1097 15:54:37.062829 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1098 15:54:37.119351 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1099 15:54:37.119711 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1100 15:54:37.119806 PCI: 00:00.0
1101 15:54:37.119874 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1102 15:54:37.120172 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1103 15:54:37.120244 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1104 15:54:37.120310 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1105 15:54:37.170103 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1106 15:54:37.170475 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1107 15:54:37.170601 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1108 15:54:37.170884 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1109 15:54:37.170984 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1110 15:54:37.199324 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1111 15:54:37.200215 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1112 15:54:37.200303 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1113 15:54:37.203716 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1114 15:54:37.213272 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1115 15:54:37.223307 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1116 15:54:37.232828 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1117 15:54:37.232925 PCI: 00:02.0
1118 15:54:37.246342 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1119 15:54:37.255632 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1120 15:54:37.262129 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1121 15:54:37.265660 PCI: 00:04.0
1122 15:54:37.265760 PCI: 00:08.0
1123 15:54:37.275604 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1124 15:54:37.279172 PCI: 00:12.0
1125 15:54:37.288673 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 15:54:37.291685 PCI: 00:14.0 child on link 0 USB0 port 0
1127 15:54:37.301661 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1128 15:54:37.308695 USB0 port 0 child on link 0 USB2 port 0
1129 15:54:37.308777 USB2 port 0
1130 15:54:37.311537 USB2 port 1
1131 15:54:37.311611 USB2 port 2
1132 15:54:37.315194 USB2 port 3
1133 15:54:37.315277 USB2 port 5
1134 15:54:37.318194 USB2 port 6
1135 15:54:37.318273 USB2 port 9
1136 15:54:37.321797 USB3 port 0
1137 15:54:37.324721 USB3 port 1
1138 15:54:37.324807 USB3 port 2
1139 15:54:37.328253 USB3 port 3
1140 15:54:37.328396 USB3 port 4
1141 15:54:37.331218 PCI: 00:14.2
1142 15:54:37.341207 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1143 15:54:37.350634 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1144 15:54:37.350761 PCI: 00:14.3
1145 15:54:37.360568 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 15:54:37.366854 PCI: 00:15.0 child on link 0 I2C: 01:15
1147 15:54:37.376923 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 15:54:37.377012 I2C: 01:15
1149 15:54:37.379784 PCI: 00:15.1 child on link 0 I2C: 02:5d
1150 15:54:37.389916 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 15:54:37.393530 I2C: 02:5d
1152 15:54:37.393615 GENERIC: 0.0
1153 15:54:37.396790 PCI: 00:16.0
1154 15:54:37.406015 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 15:54:37.406108 PCI: 00:17.0
1156 15:54:37.415946 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1157 15:54:37.426009 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1158 15:54:37.435462 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1159 15:54:37.441968 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1160 15:54:37.451871 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1161 15:54:37.458345 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1162 15:54:37.464884 PCI: 00:19.0 child on link 0 I2C: 03:1a
1163 15:54:37.474764 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 15:54:37.474861 I2C: 03:1a
1165 15:54:37.478278 I2C: 03:38
1166 15:54:37.478370 I2C: 03:39
1167 15:54:37.481801 I2C: 03:3a
1168 15:54:37.481878 I2C: 03:3b
1169 15:54:37.484727 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1170 15:54:37.494929 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1171 15:54:37.504166 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1172 15:54:37.514110 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1173 15:54:37.514203 PCI: 01:00.0
1174 15:54:37.524333 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 15:54:37.527194 PCI: 00:1e.0
1176 15:54:37.537345 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1177 15:54:37.546731 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 15:54:37.553253 PCI: 00:1e.2 child on link 0 SPI: 00
1179 15:54:37.563091 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 15:54:37.563180 SPI: 00
1181 15:54:37.566641 PCI: 00:1e.3 child on link 0 SPI: 01
1182 15:54:37.576674 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 15:54:37.579501 SPI: 01
1184 15:54:37.582960 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1185 15:54:37.593180 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1186 15:54:37.599432 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1187 15:54:37.602942 PNP: 0c09.0
1188 15:54:37.612138 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1189 15:54:37.612257 PCI: 00:1f.3
1190 15:54:37.622433 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 15:54:37.631747 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1192 15:54:37.635349 PCI: 00:1f.4
1193 15:54:37.645229 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1194 15:54:37.651601 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1195 15:54:37.654521 PCI: 00:1f.5
1196 15:54:37.664483 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1197 15:54:37.670973 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1198 15:54:37.678075 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1199 15:54:37.684366 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1200 15:54:37.687875 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1201 15:54:37.690829 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1202 15:54:37.694548 PCI: 00:17.0 18 * [0x60 - 0x67] io
1203 15:54:37.697404 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1204 15:54:37.703736 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1205 15:54:37.710310 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1206 15:54:37.720250 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1207 15:54:37.726785 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1208 15:54:37.733192 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1209 15:54:37.736747 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1210 15:54:37.746787 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1211 15:54:37.749665 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1212 15:54:37.755948 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1213 15:54:37.759395 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1214 15:54:37.766515 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1215 15:54:37.769307 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1216 15:54:37.775876 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1217 15:54:37.779526 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1218 15:54:37.785984 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1219 15:54:37.788809 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1220 15:54:37.795295 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1221 15:54:37.798929 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1222 15:54:37.805321 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1223 15:54:37.808810 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1224 15:54:37.815298 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1225 15:54:37.818777 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1226 15:54:37.825331 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1227 15:54:37.828248 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1228 15:54:37.834786 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1229 15:54:37.838293 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1230 15:54:37.844739 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1231 15:54:37.848321 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1232 15:54:37.851033 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1233 15:54:37.857541 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1234 15:54:37.867345 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1235 15:54:37.870883 avoid_fixed_resources: DOMAIN: 0000
1236 15:54:37.877292 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1237 15:54:37.880274 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1238 15:54:37.890171 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1239 15:54:37.896634 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1240 15:54:37.903091 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1241 15:54:37.913029 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1242 15:54:37.920089 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1243 15:54:37.926604 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1244 15:54:37.935824 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1245 15:54:37.942527 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1246 15:54:37.948970 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1247 15:54:37.958891 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1248 15:54:37.958979 Setting resources...
1249 15:54:37.965156 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1250 15:54:37.968586 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1251 15:54:37.974975 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1252 15:54:37.978655 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1253 15:54:37.981511 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1254 15:54:37.988415 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1255 15:54:37.994734 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1256 15:54:38.001224 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1257 15:54:38.008250 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1258 15:54:38.014741 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1259 15:54:38.017734 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1260 15:54:38.024619 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1261 15:54:38.027554 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1262 15:54:38.034039 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1263 15:54:38.037663 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1264 15:54:38.044036 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1265 15:54:38.046960 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1266 15:54:38.053359 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1267 15:54:38.056991 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1268 15:54:38.063495 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1269 15:54:38.066299 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1270 15:54:38.073236 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1271 15:54:38.076081 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1272 15:54:38.083229 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1273 15:54:38.086062 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1274 15:54:38.092462 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1275 15:54:38.096040 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1276 15:54:38.102438 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1277 15:54:38.106043 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1278 15:54:38.108858 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1279 15:54:38.115301 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1280 15:54:38.118938 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1281 15:54:38.128938 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1282 15:54:38.135386 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1283 15:54:38.141851 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1284 15:54:38.148271 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1285 15:54:38.155261 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1286 15:54:38.161716 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1287 15:54:38.168183 Root Device assign_resources, bus 0 link: 0
1288 15:54:38.170962 DOMAIN: 0000 assign_resources, bus 0 link: 0
1289 15:54:38.180927 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1290 15:54:38.187235 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1291 15:54:38.197140 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1292 15:54:38.204345 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1293 15:54:38.213388 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1294 15:54:38.219855 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1295 15:54:38.226929 PCI: 00:14.0 assign_resources, bus 0 link: 0
1296 15:54:38.229710 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 15:54:38.239849 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1298 15:54:38.246334 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1299 15:54:38.255770 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1300 15:54:38.262896 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1301 15:54:38.265765 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 15:54:38.272712 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 15:54:38.279018 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1304 15:54:38.285451 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 15:54:38.288945 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 15:54:38.298989 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1307 15:54:38.305537 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1308 15:54:38.315538 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1309 15:54:38.322007 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1310 15:54:38.328256 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1311 15:54:38.337749 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1312 15:54:38.344935 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1313 15:54:38.354575 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1314 15:54:38.357310 PCI: 00:19.0 assign_resources, bus 3 link: 0
1315 15:54:38.360980 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 15:54:38.371033 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1317 15:54:38.380347 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1318 15:54:38.386975 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1319 15:54:38.393375 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1320 15:54:38.400554 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1321 15:54:38.406974 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1322 15:54:38.413358 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1323 15:54:38.423215 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1324 15:54:38.426317 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1325 15:54:38.432717 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 15:54:38.439167 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1327 15:54:38.442816 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1328 15:54:38.449228 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 15:54:38.452834 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1330 15:54:38.459195 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 15:54:38.462718 LPC: Trying to open IO window from 800 size 1ff
1332 15:54:38.472148 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1333 15:54:38.479240 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1334 15:54:38.489100 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1335 15:54:38.494921 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1336 15:54:38.501903 DOMAIN: 0000 assign_resources, bus 0 link: 0
1337 15:54:38.505428 Root Device assign_resources, bus 0 link: 0
1338 15:54:38.508217 Done setting resources.
1339 15:54:38.514751 Show resources in subtree (Root Device)...After assigning values.
1340 15:54:38.518168 Root Device child on link 0 CPU_CLUSTER: 0
1341 15:54:38.524601 CPU_CLUSTER: 0 child on link 0 APIC: 00
1342 15:54:38.524685 APIC: 00
1343 15:54:38.524751 APIC: 03
1344 15:54:38.528266 APIC: 05
1345 15:54:38.528356 APIC: 01
1346 15:54:38.531030 APIC: 02
1347 15:54:38.531118 APIC: 04
1348 15:54:38.531204 APIC: 07
1349 15:54:38.534648 APIC: 06
1350 15:54:38.537591 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1351 15:54:38.547678 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1352 15:54:38.557665 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1353 15:54:38.560599 PCI: 00:00.0
1354 15:54:38.570544 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1355 15:54:38.579873 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1356 15:54:38.590021 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1357 15:54:38.596403 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1358 15:54:38.606255 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1359 15:54:38.616330 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1360 15:54:38.626174 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1361 15:54:38.635582 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1362 15:54:38.645731 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1363 15:54:38.652132 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1364 15:54:38.662390 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1365 15:54:38.671574 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1366 15:54:38.681665 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1367 15:54:38.691626 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1368 15:54:38.701378 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1369 15:54:38.711451 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1370 15:54:38.711540 PCI: 00:02.0
1371 15:54:38.724369 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1372 15:54:38.733543 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1373 15:54:38.743694 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1374 15:54:38.743783 PCI: 00:04.0
1375 15:54:38.747283 PCI: 00:08.0
1376 15:54:38.756704 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1377 15:54:38.756793 PCI: 00:12.0
1378 15:54:38.766773 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1379 15:54:38.773328 PCI: 00:14.0 child on link 0 USB0 port 0
1380 15:54:38.783310 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1381 15:54:38.786112 USB0 port 0 child on link 0 USB2 port 0
1382 15:54:38.789525 USB2 port 0
1383 15:54:38.789613 USB2 port 1
1384 15:54:38.792953 USB2 port 2
1385 15:54:38.793040 USB2 port 3
1386 15:54:38.795735 USB2 port 5
1387 15:54:38.795825 USB2 port 6
1388 15:54:38.799375 USB2 port 9
1389 15:54:38.802819 USB3 port 0
1390 15:54:38.802906 USB3 port 1
1391 15:54:38.805679 USB3 port 2
1392 15:54:38.805767 USB3 port 3
1393 15:54:38.809161 USB3 port 4
1394 15:54:38.809248 PCI: 00:14.2
1395 15:54:38.819104 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1396 15:54:38.828460 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1397 15:54:38.832048 PCI: 00:14.3
1398 15:54:38.842037 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1399 15:54:38.844970 PCI: 00:15.0 child on link 0 I2C: 01:15
1400 15:54:38.857861 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1401 15:54:38.857951 I2C: 01:15
1402 15:54:38.861558 PCI: 00:15.1 child on link 0 I2C: 02:5d
1403 15:54:38.874331 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1404 15:54:38.874420 I2C: 02:5d
1405 15:54:38.877883 GENERIC: 0.0
1406 15:54:38.877971 PCI: 00:16.0
1407 15:54:38.887844 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1408 15:54:38.890624 PCI: 00:17.0
1409 15:54:38.900843 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1410 15:54:38.910715 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1411 15:54:38.920112 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1412 15:54:38.927141 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1413 15:54:38.936325 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1414 15:54:38.946181 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1415 15:54:38.952673 PCI: 00:19.0 child on link 0 I2C: 03:1a
1416 15:54:38.962802 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1417 15:54:38.962893 I2C: 03:1a
1418 15:54:38.965757 I2C: 03:38
1419 15:54:38.965893 I2C: 03:39
1420 15:54:38.969337 I2C: 03:3a
1421 15:54:38.969472 I2C: 03:3b
1422 15:54:38.975804 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1423 15:54:38.982172 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1424 15:54:38.995629 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1425 15:54:39.004902 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1426 15:54:39.004996 PCI: 01:00.0
1427 15:54:39.014763 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1428 15:54:39.018461 PCI: 00:1e.0
1429 15:54:39.027754 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1430 15:54:39.037777 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1431 15:54:39.044745 PCI: 00:1e.2 child on link 0 SPI: 00
1432 15:54:39.054173 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1433 15:54:39.054256 SPI: 00
1434 15:54:39.057819 PCI: 00:1e.3 child on link 0 SPI: 01
1435 15:54:39.070806 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1436 15:54:39.070893 SPI: 01
1437 15:54:39.074333 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1438 15:54:39.083631 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1439 15:54:39.093716 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1440 15:54:39.093802 PNP: 0c09.0
1441 15:54:39.103538 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1442 15:54:39.103621 PCI: 00:1f.3
1443 15:54:39.116876 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1444 15:54:39.126142 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1445 15:54:39.126227 PCI: 00:1f.4
1446 15:54:39.136073 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1447 15:54:39.146037 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1448 15:54:39.148956 PCI: 00:1f.5
1449 15:54:39.159180 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1450 15:54:39.161994 Done allocating resources.
1451 15:54:39.165703 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1452 15:54:39.168605 Enabling resources...
1453 15:54:39.175003 PCI: 00:00.0 subsystem <- 8086/9b61
1454 15:54:39.175108 PCI: 00:00.0 cmd <- 06
1455 15:54:39.178541 PCI: 00:02.0 subsystem <- 8086/9b41
1456 15:54:39.181481 PCI: 00:02.0 cmd <- 03
1457 15:54:39.185058 PCI: 00:08.0 cmd <- 06
1458 15:54:39.188632 PCI: 00:12.0 subsystem <- 8086/02f9
1459 15:54:39.191539 PCI: 00:12.0 cmd <- 02
1460 15:54:39.195122 PCI: 00:14.0 subsystem <- 8086/02ed
1461 15:54:39.197923 PCI: 00:14.0 cmd <- 02
1462 15:54:39.201572 PCI: 00:14.2 cmd <- 02
1463 15:54:39.204418 PCI: 00:14.3 subsystem <- 8086/02f0
1464 15:54:39.208088 PCI: 00:14.3 cmd <- 02
1465 15:54:39.210930 PCI: 00:15.0 subsystem <- 8086/02e8
1466 15:54:39.214506 PCI: 00:15.0 cmd <- 02
1467 15:54:39.217353 PCI: 00:15.1 subsystem <- 8086/02e9
1468 15:54:39.217433 PCI: 00:15.1 cmd <- 02
1469 15:54:39.224707 PCI: 00:16.0 subsystem <- 8086/02e0
1470 15:54:39.224788 PCI: 00:16.0 cmd <- 02
1471 15:54:39.227643 PCI: 00:17.0 subsystem <- 8086/02d3
1472 15:54:39.230667 PCI: 00:17.0 cmd <- 03
1473 15:54:39.234064 PCI: 00:19.0 subsystem <- 8086/02c5
1474 15:54:39.237644 PCI: 00:19.0 cmd <- 02
1475 15:54:39.240604 PCI: 00:1d.0 bridge ctrl <- 0013
1476 15:54:39.244178 PCI: 00:1d.0 subsystem <- 8086/02b0
1477 15:54:39.247069 PCI: 00:1d.0 cmd <- 06
1478 15:54:39.250779 PCI: 00:1e.0 subsystem <- 8086/02a8
1479 15:54:39.253663 PCI: 00:1e.0 cmd <- 06
1480 15:54:39.257212 PCI: 00:1e.2 subsystem <- 8086/02aa
1481 15:54:39.260108 PCI: 00:1e.2 cmd <- 06
1482 15:54:39.263746 PCI: 00:1e.3 subsystem <- 8086/02ab
1483 15:54:39.267278 PCI: 00:1e.3 cmd <- 02
1484 15:54:39.270173 PCI: 00:1f.0 subsystem <- 8086/0284
1485 15:54:39.273707 PCI: 00:1f.0 cmd <- 407
1486 15:54:39.276599 PCI: 00:1f.3 subsystem <- 8086/02c8
1487 15:54:39.280082 PCI: 00:1f.3 cmd <- 02
1488 15:54:39.283731 PCI: 00:1f.4 subsystem <- 8086/02a3
1489 15:54:39.286575 PCI: 00:1f.4 cmd <- 03
1490 15:54:39.290202 PCI: 00:1f.5 subsystem <- 8086/02a4
1491 15:54:39.290284 PCI: 00:1f.5 cmd <- 406
1492 15:54:39.300095 PCI: 01:00.0 cmd <- 02
1493 15:54:39.305684 done.
1494 15:54:39.318140 ME: Version: 14.0.39.1367
1495 15:54:39.324596 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1496 15:54:39.328247 Initializing devices...
1497 15:54:39.328379 Root Device init ...
1498 15:54:39.334678 Chrome EC: Set SMI mask to 0x0000000000000000
1499 15:54:39.341031 Chrome EC: clear events_b mask to 0x0000000000000000
1500 15:54:39.344516 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1501 15:54:39.350845 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1502 15:54:39.357502 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1503 15:54:39.361063 Chrome EC: Set WAKE mask to 0x0000000000000000
1504 15:54:39.367555 Root Device init finished in 35205 usecs
1505 15:54:39.370369 CPU_CLUSTER: 0 init ...
1506 15:54:39.373987 CPU_CLUSTER: 0 init finished in 2448 usecs
1507 15:54:39.379006 PCI: 00:00.0 init ...
1508 15:54:39.382537 CPU TDP: 15 Watts
1509 15:54:39.385381 CPU PL2 = 64 Watts
1510 15:54:39.388873 PCI: 00:00.0 init finished in 7082 usecs
1511 15:54:39.392520 PCI: 00:02.0 init ...
1512 15:54:39.395482 PCI: 00:02.0 init finished in 2253 usecs
1513 15:54:39.398504 PCI: 00:08.0 init ...
1514 15:54:39.402061 PCI: 00:08.0 init finished in 2253 usecs
1515 15:54:39.405588 PCI: 00:12.0 init ...
1516 15:54:39.408587 PCI: 00:12.0 init finished in 2253 usecs
1517 15:54:39.411899 PCI: 00:14.0 init ...
1518 15:54:39.415327 PCI: 00:14.0 init finished in 2253 usecs
1519 15:54:39.418133 PCI: 00:14.2 init ...
1520 15:54:39.421710 PCI: 00:14.2 init finished in 2253 usecs
1521 15:54:39.424458 PCI: 00:14.3 init ...
1522 15:54:39.428128 PCI: 00:14.3 init finished in 2270 usecs
1523 15:54:39.431646 PCI: 00:15.0 init ...
1524 15:54:39.434569 DW I2C bus 0 at 0xd121f000 (400 KHz)
1525 15:54:39.441083 PCI: 00:15.0 init finished in 5980 usecs
1526 15:54:39.441170 PCI: 00:15.1 init ...
1527 15:54:39.447537 DW I2C bus 1 at 0xd1220000 (400 KHz)
1528 15:54:39.451068 PCI: 00:15.1 init finished in 5979 usecs
1529 15:54:39.454069 PCI: 00:16.0 init ...
1530 15:54:39.457726 PCI: 00:16.0 init finished in 2251 usecs
1531 15:54:39.460664 PCI: 00:19.0 init ...
1532 15:54:39.464212 DW I2C bus 4 at 0xd1222000 (400 KHz)
1533 15:54:39.467065 PCI: 00:19.0 init finished in 5977 usecs
1534 15:54:39.470658 PCI: 00:1d.0 init ...
1535 15:54:39.473530 Initializing PCH PCIe bridge.
1536 15:54:39.477059 PCI: 00:1d.0 init finished in 5285 usecs
1537 15:54:39.481212 PCI: 00:1f.0 init ...
1538 15:54:39.483887 IOAPIC: Initializing IOAPIC at 0xfec00000
1539 15:54:39.490305 IOAPIC: Bootstrap Processor Local APIC = 0x00
1540 15:54:39.490392 IOAPIC: ID = 0x02
1541 15:54:39.493931 IOAPIC: Dumping registers
1542 15:54:39.497527 reg 0x0000: 0x02000000
1543 15:54:39.500228 reg 0x0001: 0x00770020
1544 15:54:39.503774 reg 0x0002: 0x00000000
1545 15:54:39.507372 PCI: 00:1f.0 init finished in 23534 usecs
1546 15:54:39.510056 PCI: 00:1f.4 init ...
1547 15:54:39.513523 PCI: 00:1f.4 init finished in 2263 usecs
1548 15:54:39.525480 PCI: 01:00.0 init ...
1549 15:54:39.528376 PCI: 01:00.0 init finished in 2252 usecs
1550 15:54:39.532600 PNP: 0c09.0 init ...
1551 15:54:39.536308 Google Chrome EC uptime: 11.073 seconds
1552 15:54:39.542707 Google Chrome AP resets since EC boot: 0
1553 15:54:39.546174 Google Chrome most recent AP reset causes:
1554 15:54:39.552685 Google Chrome EC reset flags at last EC boot: reset-pin
1555 15:54:39.555647 PNP: 0c09.0 init finished in 20569 usecs
1556 15:54:39.559243 Devices initialized
1557 15:54:39.562103 Show all devs... After init.
1558 15:54:39.562195 Root Device: enabled 1
1559 15:54:39.565725 CPU_CLUSTER: 0: enabled 1
1560 15:54:39.568654 DOMAIN: 0000: enabled 1
1561 15:54:39.568731 APIC: 00: enabled 1
1562 15:54:39.572121 PCI: 00:00.0: enabled 1
1563 15:54:39.575077 PCI: 00:02.0: enabled 1
1564 15:54:39.578630 PCI: 00:04.0: enabled 0
1565 15:54:39.578707 PCI: 00:05.0: enabled 0
1566 15:54:39.581496 PCI: 00:12.0: enabled 1
1567 15:54:39.585134 PCI: 00:12.5: enabled 0
1568 15:54:39.587996 PCI: 00:12.6: enabled 0
1569 15:54:39.588080 PCI: 00:14.0: enabled 1
1570 15:54:39.591615 PCI: 00:14.1: enabled 0
1571 15:54:39.595171 PCI: 00:14.3: enabled 1
1572 15:54:39.598041 PCI: 00:14.5: enabled 0
1573 15:54:39.598124 PCI: 00:15.0: enabled 1
1574 15:54:39.601643 PCI: 00:15.1: enabled 1
1575 15:54:39.604518 PCI: 00:15.2: enabled 0
1576 15:54:39.607884 PCI: 00:15.3: enabled 0
1577 15:54:39.608005 PCI: 00:16.0: enabled 1
1578 15:54:39.611283 PCI: 00:16.1: enabled 0
1579 15:54:39.614096 PCI: 00:16.2: enabled 0
1580 15:54:39.617678 PCI: 00:16.3: enabled 0
1581 15:54:39.617762 PCI: 00:16.4: enabled 0
1582 15:54:39.621265 PCI: 00:16.5: enabled 0
1583 15:54:39.624094 PCI: 00:17.0: enabled 1
1584 15:54:39.627638 PCI: 00:19.0: enabled 1
1585 15:54:39.627714 PCI: 00:19.1: enabled 0
1586 15:54:39.630547 PCI: 00:19.2: enabled 0
1587 15:54:39.634066 PCI: 00:1a.0: enabled 0
1588 15:54:39.637011 PCI: 00:1c.0: enabled 0
1589 15:54:39.637098 PCI: 00:1c.1: enabled 0
1590 15:54:39.640687 PCI: 00:1c.2: enabled 0
1591 15:54:39.644117 PCI: 00:1c.3: enabled 0
1592 15:54:39.646908 PCI: 00:1c.4: enabled 0
1593 15:54:39.646990 PCI: 00:1c.5: enabled 0
1594 15:54:39.650596 PCI: 00:1c.6: enabled 0
1595 15:54:39.653429 PCI: 00:1c.7: enabled 0
1596 15:54:39.657120 PCI: 00:1d.0: enabled 1
1597 15:54:39.657207 PCI: 00:1d.1: enabled 0
1598 15:54:39.660062 PCI: 00:1d.2: enabled 0
1599 15:54:39.663817 PCI: 00:1d.3: enabled 0
1600 15:54:39.666769 PCI: 00:1d.4: enabled 0
1601 15:54:39.666850 PCI: 00:1d.5: enabled 0
1602 15:54:39.670212 PCI: 00:1e.0: enabled 1
1603 15:54:39.673098 PCI: 00:1e.1: enabled 0
1604 15:54:39.673186 PCI: 00:1e.2: enabled 1
1605 15:54:39.676728 PCI: 00:1e.3: enabled 1
1606 15:54:39.680276 PCI: 00:1f.0: enabled 1
1607 15:54:39.683186 PCI: 00:1f.1: enabled 0
1608 15:54:39.683266 PCI: 00:1f.2: enabled 0
1609 15:54:39.686096 PCI: 00:1f.3: enabled 1
1610 15:54:39.689652 PCI: 00:1f.4: enabled 1
1611 15:54:39.693233 PCI: 00:1f.5: enabled 1
1612 15:54:39.693311 PCI: 00:1f.6: enabled 0
1613 15:54:39.696132 USB0 port 0: enabled 1
1614 15:54:39.699761 I2C: 01:15: enabled 1
1615 15:54:39.702845 I2C: 02:5d: enabled 1
1616 15:54:39.702926 GENERIC: 0.0: enabled 1
1617 15:54:39.705736 I2C: 03:1a: enabled 1
1618 15:54:39.709245 I2C: 03:38: enabled 1
1619 15:54:39.709323 I2C: 03:39: enabled 1
1620 15:54:39.712692 I2C: 03:3a: enabled 1
1621 15:54:39.715486 I2C: 03:3b: enabled 1
1622 15:54:39.715561 PCI: 00:00.0: enabled 1
1623 15:54:39.718987 SPI: 00: enabled 1
1624 15:54:39.722607 SPI: 01: enabled 1
1625 15:54:39.722692 PNP: 0c09.0: enabled 1
1626 15:54:39.725371 USB2 port 0: enabled 1
1627 15:54:39.728959 USB2 port 1: enabled 1
1628 15:54:39.729041 USB2 port 2: enabled 0
1629 15:54:39.732926 USB2 port 3: enabled 0
1630 15:54:39.735165 USB2 port 5: enabled 0
1631 15:54:39.738844 USB2 port 6: enabled 1
1632 15:54:39.738934 USB2 port 9: enabled 1
1633 15:54:39.741744 USB3 port 0: enabled 1
1634 15:54:39.745183 USB3 port 1: enabled 1
1635 15:54:39.748696 USB3 port 2: enabled 1
1636 15:54:39.748777 USB3 port 3: enabled 1
1637 15:54:39.751537 USB3 port 4: enabled 0
1638 15:54:39.755318 APIC: 03: enabled 1
1639 15:54:39.755406 APIC: 05: enabled 1
1640 15:54:39.757988 APIC: 01: enabled 1
1641 15:54:39.758072 APIC: 02: enabled 1
1642 15:54:39.761581 APIC: 04: enabled 1
1643 15:54:39.764494 APIC: 07: enabled 1
1644 15:54:39.764569 APIC: 06: enabled 1
1645 15:54:39.768070 PCI: 00:08.0: enabled 1
1646 15:54:39.771565 PCI: 00:14.2: enabled 1
1647 15:54:39.774458 PCI: 01:00.0: enabled 1
1648 15:54:39.777972 Disabling ACPI via APMC:
1649 15:54:39.778049 done.
1650 15:54:39.784474 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1651 15:54:39.788187 ELOG: NV offset 0xaf0000 size 0x4000
1652 15:54:39.794542 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1653 15:54:39.800944 ELOG: Event(17) added with size 13 at 2023-02-06 15:54:39 UTC
1654 15:54:39.807046 POST: Unexpected post code in previous boot: 0x73
1655 15:54:39.814115 ELOG: Event(A3) added with size 11 at 2023-02-06 15:54:39 UTC
1656 15:54:39.820449 ELOG: Event(A6) added with size 13 at 2023-02-06 15:54:39 UTC
1657 15:54:39.826695 ELOG: Event(92) added with size 9 at 2023-02-06 15:54:39 UTC
1658 15:54:39.833775 ELOG: Event(93) added with size 9 at 2023-02-06 15:54:39 UTC
1659 15:54:39.840184 ELOG: Event(9A) added with size 9 at 2023-02-06 15:54:39 UTC
1660 15:54:39.843001 ELOG: Event(9E) added with size 10 at 2023-02-06 15:54:39 UTC
1661 15:54:39.850027 ELOG: Event(9F) added with size 14 at 2023-02-06 15:54:39 UTC
1662 15:54:39.856622 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1663 15:54:39.862932 ELOG: Event(A1) added with size 10 at 2023-02-06 15:54:39 UTC
1664 15:54:39.869503 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1665 15:54:39.876623 ELOG: Event(A0) added with size 9 at 2023-02-06 15:54:39 UTC
1666 15:54:39.882873 elog_add_boot_reason: Logged dev mode boot
1667 15:54:39.882961 Finalize devices...
1668 15:54:39.885806 PCI: 00:17.0 final
1669 15:54:39.885922 Devices finalized
1670 15:54:39.892907 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1671 15:54:39.899301 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1672 15:54:39.902916 ME: HFSTS1 : 0x90000245
1673 15:54:39.905666 ME: HFSTS2 : 0x3B850126
1674 15:54:39.909132 ME: HFSTS3 : 0x00000020
1675 15:54:39.915566 ME: HFSTS4 : 0x00004800
1676 15:54:39.919028 ME: HFSTS5 : 0x00000000
1677 15:54:39.921774 ME: HFSTS6 : 0x40400006
1678 15:54:39.925318 ME: Manufacturing Mode : NO
1679 15:54:39.928794 ME: FW Partition Table : OK
1680 15:54:39.932267 ME: Bringup Loader Failure : NO
1681 15:54:39.935121 ME: Firmware Init Complete : YES
1682 15:54:39.938710 ME: Boot Options Present : NO
1683 15:54:39.941583 ME: Update In Progress : NO
1684 15:54:39.945263 ME: D0i3 Support : YES
1685 15:54:39.948147 ME: Low Power State Enabled : NO
1686 15:54:39.951627 ME: CPU Replaced : NO
1687 15:54:39.955256 ME: CPU Replacement Valid : YES
1688 15:54:39.958090 ME: Current Working State : 5
1689 15:54:39.961573 ME: Current Operation State : 1
1690 15:54:39.965050 ME: Current Operation Mode : 0
1691 15:54:39.968065 ME: Error Code : 0
1692 15:54:39.971627 ME: CPU Debug Disabled : YES
1693 15:54:39.974529 ME: TXT Support : NO
1694 15:54:39.981086 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1695 15:54:39.987545 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1696 15:54:39.987630 CBFS @ c08000 size 3f8000
1697 15:54:39.993948 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1698 15:54:39.997656 CBFS: Locating 'fallback/dsdt.aml'
1699 15:54:40.004131 CBFS: Found @ offset 10bb80 size 3fa5
1700 15:54:40.007022 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1701 15:54:40.010646 CBFS @ c08000 size 3f8000
1702 15:54:40.016902 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1703 15:54:40.020462 CBFS: Locating 'fallback/slic'
1704 15:54:40.023403 CBFS: 'fallback/slic' not found.
1705 15:54:40.026931 ACPI: Writing ACPI tables at 99b3e000.
1706 15:54:40.029904 ACPI: * FACS
1707 15:54:40.030009 ACPI: * DSDT
1708 15:54:40.037056 Ramoops buffer: 0x100000@0x99a3d000.
1709 15:54:40.040067 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1710 15:54:40.042961 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1711 15:54:40.047191 Google Chrome EC: version:
1712 15:54:40.050047 ro: helios_v2.0.2659-56403530b
1713 15:54:40.053553 rw: helios_v2.0.2849-c41de27e7d
1714 15:54:40.057155 running image: 1
1715 15:54:40.060161 ACPI: * FADT
1716 15:54:40.060249 SCI is IRQ9
1717 15:54:40.066590 ACPI: added table 1/32, length now 40
1718 15:54:40.066679 ACPI: * SSDT
1719 15:54:40.070093 Found 1 CPU(s) with 8 core(s) each.
1720 15:54:40.076643 Error: Could not locate 'wifi_sar' in VPD.
1721 15:54:40.079495 Checking CBFS for default SAR values
1722 15:54:40.083086 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1723 15:54:40.085898 CBFS @ c08000 size 3f8000
1724 15:54:40.092439 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1725 15:54:40.096036 CBFS: Locating 'wifi_sar_defaults.hex'
1726 15:54:40.099617 CBFS: Found @ offset 5fac0 size 77
1727 15:54:40.105632 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1728 15:54:40.109024 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1729 15:54:40.112604 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1730 15:54:40.119139 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1731 15:54:40.121874 failed to find key in VPD: dsm_calib_r0_0
1732 15:54:40.131719 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1733 15:54:40.138639 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1734 15:54:40.141528 failed to find key in VPD: dsm_calib_r0_1
1735 15:54:40.148181 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1736 15:54:40.154653 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1737 15:54:40.158248 failed to find key in VPD: dsm_calib_r0_2
1738 15:54:40.167565 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1739 15:54:40.173941 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1740 15:54:40.177486 failed to find key in VPD: dsm_calib_r0_3
1741 15:54:40.187486 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1742 15:54:40.190407 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1743 15:54:40.196908 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1744 15:54:40.200646 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1745 15:54:40.203502 EC returned error result code 1
1746 15:54:40.207137 EC returned error result code 1
1747 15:54:40.213585 EC returned error result code 1
1748 15:54:40.217154 PS2K: Bad resp from EC. Vivaldi disabled!
1749 15:54:40.223724 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1750 15:54:40.226638 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1751 15:54:40.233030 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1752 15:54:40.236628 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1753 15:54:40.243036 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1754 15:54:40.249382 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1755 15:54:40.255731 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1756 15:54:40.262714 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1757 15:54:40.265593 ACPI: added table 2/32, length now 44
1758 15:54:40.265674 ACPI: * MCFG
1759 15:54:40.269243 ACPI: added table 3/32, length now 48
1760 15:54:40.272170 ACPI: * TPM2
1761 15:54:40.275770 TPM2 log created at 99a2d000
1762 15:54:40.278782 ACPI: added table 4/32, length now 52
1763 15:54:40.282259 ACPI: * MADT
1764 15:54:40.282333 SCI is IRQ9
1765 15:54:40.285161 ACPI: added table 5/32, length now 56
1766 15:54:40.288810 current = 99b43ac0
1767 15:54:40.288890 ACPI: * DMAR
1768 15:54:40.291655 ACPI: added table 6/32, length now 60
1769 15:54:40.295217 ACPI: * IGD OpRegion
1770 15:54:40.298813 GMA: Found VBT in CBFS
1771 15:54:40.301759 GMA: Found valid VBT in CBFS
1772 15:54:40.305255 ACPI: added table 7/32, length now 64
1773 15:54:40.305331 ACPI: * HPET
1774 15:54:40.311626 ACPI: added table 8/32, length now 68
1775 15:54:40.311706 ACPI: done.
1776 15:54:40.314609 ACPI tables: 31744 bytes.
1777 15:54:40.318090 smbios_write_tables: 99a2c000
1778 15:54:40.321601 EC returned error result code 3
1779 15:54:40.324473 Couldn't obtain OEM name from CBI
1780 15:54:40.328055 Create SMBIOS type 17
1781 15:54:40.331522 PCI: 00:00.0 (Intel Cannonlake)
1782 15:54:40.334276 PCI: 00:14.3 (Intel WiFi)
1783 15:54:40.334358 SMBIOS tables: 939 bytes.
1784 15:54:40.340658 Writing table forward entry at 0x00000500
1785 15:54:40.344316 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1786 15:54:40.350710 Writing coreboot table at 0x99b62000
1787 15:54:40.354205 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1788 15:54:40.360676 1. 0000000000001000-000000000009ffff: RAM
1789 15:54:40.364089 2. 00000000000a0000-00000000000fffff: RESERVED
1790 15:54:40.367090 3. 0000000000100000-0000000099a2bfff: RAM
1791 15:54:40.373454 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1792 15:54:40.380207 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1793 15:54:40.386636 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1794 15:54:40.390263 7. 000000009a000000-000000009f7fffff: RESERVED
1795 15:54:40.393176 8. 00000000e0000000-00000000efffffff: RESERVED
1796 15:54:40.400277 9. 00000000fc000000-00000000fc000fff: RESERVED
1797 15:54:40.402946 10. 00000000fe000000-00000000fe00ffff: RESERVED
1798 15:54:40.409991 11. 00000000fed10000-00000000fed17fff: RESERVED
1799 15:54:40.412798 12. 00000000fed80000-00000000fed83fff: RESERVED
1800 15:54:40.419454 13. 00000000fed90000-00000000fed91fff: RESERVED
1801 15:54:40.422975 14. 00000000feda0000-00000000feda1fff: RESERVED
1802 15:54:40.425765 15. 0000000100000000-000000045e7fffff: RAM
1803 15:54:40.432911 Graphics framebuffer located at 0xc0000000
1804 15:54:40.435677 Passing 5 GPIOs to payload:
1805 15:54:40.439477 NAME | PORT | POLARITY | VALUE
1806 15:54:40.445795 write protect | undefined | high | low
1807 15:54:40.452192 lid | undefined | high | high
1808 15:54:40.455033 power | undefined | high | low
1809 15:54:40.462114 oprom | undefined | high | low
1810 15:54:40.465133 EC in RW | 0x000000cb | high | low
1811 15:54:40.468645 Board ID: 4
1812 15:54:40.471454 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1813 15:54:40.475058 CBFS @ c08000 size 3f8000
1814 15:54:40.481614 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1815 15:54:40.488171 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1816 15:54:40.491106 coreboot table: 1492 bytes.
1817 15:54:40.494919 IMD ROOT 0. 99fff000 00001000
1818 15:54:40.497852 IMD SMALL 1. 99ffe000 00001000
1819 15:54:40.500880 FSP MEMORY 2. 99c4e000 003b0000
1820 15:54:40.504697 CONSOLE 3. 99c2e000 00020000
1821 15:54:40.507513 FMAP 4. 99c2d000 0000054e
1822 15:54:40.511342 TIME STAMP 5. 99c2c000 00000910
1823 15:54:40.514338 VBOOT WORK 6. 99c18000 00014000
1824 15:54:40.517426 MRC DATA 7. 99c16000 00001958
1825 15:54:40.521122 ROMSTG STCK 8. 99c15000 00001000
1826 15:54:40.523994 AFTER CAR 9. 99c0b000 0000a000
1827 15:54:40.527754 RAMSTAGE 10. 99baf000 0005c000
1828 15:54:40.530719 REFCODE 11. 99b7a000 00035000
1829 15:54:40.533751 SMM BACKUP 12. 99b6a000 00010000
1830 15:54:40.537263 COREBOOT 13. 99b62000 00008000
1831 15:54:40.540410 ACPI 14. 99b3e000 00024000
1832 15:54:40.543976 ACPI GNVS 15. 99b3d000 00001000
1833 15:54:40.546963 RAMOOPS 16. 99a3d000 00100000
1834 15:54:40.550001 TPM2 TCGLOG17. 99a2d000 00010000
1835 15:54:40.553689 SMBIOS 18. 99a2c000 00000800
1836 15:54:40.553927 IMD small region:
1837 15:54:40.560171 IMD ROOT 0. 99ffec00 00000400
1838 15:54:40.563322 FSP RUNTIME 1. 99ffebe0 00000004
1839 15:54:40.566887 EC HOSTEVENT 2. 99ffebc0 00000008
1840 15:54:40.569852 POWER STATE 3. 99ffeb80 00000040
1841 15:54:40.572921 ROMSTAGE 4. 99ffeb60 00000004
1842 15:54:40.576511 MEM INFO 5. 99ffe9a0 000001b9
1843 15:54:40.580096 VPD 6. 99ffe920 0000006c
1844 15:54:40.583086 MTRR: Physical address space:
1845 15:54:40.589688 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1846 15:54:40.596415 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1847 15:54:40.602392 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1848 15:54:40.609762 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1849 15:54:40.616236 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1850 15:54:40.619170 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1851 15:54:40.626054 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1852 15:54:40.632477 MTRR: Fixed MSR 0x250 0x0606060606060606
1853 15:54:40.635197 MTRR: Fixed MSR 0x258 0x0606060606060606
1854 15:54:40.638850 MTRR: Fixed MSR 0x259 0x0000000000000000
1855 15:54:40.641714 MTRR: Fixed MSR 0x268 0x0606060606060606
1856 15:54:40.648781 MTRR: Fixed MSR 0x269 0x0606060606060606
1857 15:54:40.651653 MTRR: Fixed MSR 0x26a 0x0606060606060606
1858 15:54:40.655209 MTRR: Fixed MSR 0x26b 0x0606060606060606
1859 15:54:40.658082 MTRR: Fixed MSR 0x26c 0x0606060606060606
1860 15:54:40.664551 MTRR: Fixed MSR 0x26d 0x0606060606060606
1861 15:54:40.668102 MTRR: Fixed MSR 0x26e 0x0606060606060606
1862 15:54:40.671360 MTRR: Fixed MSR 0x26f 0x0606060606060606
1863 15:54:40.674712 call enable_fixed_mtrr()
1864 15:54:40.677592 CPU physical address size: 39 bits
1865 15:54:40.684908 MTRR: default type WB/UC MTRR counts: 6/8.
1866 15:54:40.687676 MTRR: WB selected as default type.
1867 15:54:40.694210 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1868 15:54:40.697588 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1869 15:54:40.704231 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1870 15:54:40.710562 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1871 15:54:40.717100 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1872 15:54:40.723411 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1873 15:54:40.729954 MTRR: Fixed MSR 0x250 0x0606060606060606
1874 15:54:40.733441 MTRR: Fixed MSR 0x258 0x0606060606060606
1875 15:54:40.737107 MTRR: Fixed MSR 0x259 0x0000000000000000
1876 15:54:40.740017 MTRR: Fixed MSR 0x268 0x0606060606060606
1877 15:54:40.746227 MTRR: Fixed MSR 0x269 0x0606060606060606
1878 15:54:40.749655 MTRR: Fixed MSR 0x26a 0x0606060606060606
1879 15:54:40.753219 MTRR: Fixed MSR 0x26b 0x0606060606060606
1880 15:54:40.756071 MTRR: Fixed MSR 0x26c 0x0606060606060606
1881 15:54:40.762437 MTRR: Fixed MSR 0x26d 0x0606060606060606
1882 15:54:40.765986 MTRR: Fixed MSR 0x26e 0x0606060606060606
1883 15:54:40.769707 MTRR: Fixed MSR 0x26f 0x0606060606060606
1884 15:54:40.770166
1885 15:54:40.772532 MTRR check
1886 15:54:40.772979 Fixed MTRRs : Enabled
1887 15:54:40.776179 Variable MTRRs: Enabled
1888 15:54:40.776722
1889 15:54:40.779136 call enable_fixed_mtrr()
1890 15:54:40.785358 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1891 15:54:40.789046 CPU physical address size: 39 bits
1892 15:54:40.792458 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1893 15:54:40.799081 MTRR: Fixed MSR 0x250 0x0606060606060606
1894 15:54:40.802256 MTRR: Fixed MSR 0x250 0x0606060606060606
1895 15:54:40.805607 MTRR: Fixed MSR 0x258 0x0606060606060606
1896 15:54:40.808592 MTRR: Fixed MSR 0x259 0x0000000000000000
1897 15:54:40.814939 MTRR: Fixed MSR 0x268 0x0606060606060606
1898 15:54:40.818337 MTRR: Fixed MSR 0x269 0x0606060606060606
1899 15:54:40.821339 MTRR: Fixed MSR 0x26a 0x0606060606060606
1900 15:54:40.824964 MTRR: Fixed MSR 0x26b 0x0606060606060606
1901 15:54:40.831337 MTRR: Fixed MSR 0x26c 0x0606060606060606
1902 15:54:40.834862 MTRR: Fixed MSR 0x26d 0x0606060606060606
1903 15:54:40.837627 MTRR: Fixed MSR 0x26e 0x0606060606060606
1904 15:54:40.841353 MTRR: Fixed MSR 0x26f 0x0606060606060606
1905 15:54:40.847644 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 15:54:40.851194 call enable_fixed_mtrr()
1907 15:54:40.854023 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 15:54:40.857624 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 15:54:40.860413 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 15:54:40.867742 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 15:54:40.870585 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 15:54:40.874070 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 15:54:40.876970 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 15:54:40.883336 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 15:54:40.886846 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 15:54:40.890505 CPU physical address size: 39 bits
1917 15:54:40.893570 call enable_fixed_mtrr()
1918 15:54:40.897088 CBFS @ c08000 size 3f8000
1919 15:54:40.900038 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1920 15:54:40.903520 CBFS: Locating 'fallback/payload'
1921 15:54:40.909384 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 15:54:40.913016 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 15:54:40.916455 MTRR: Fixed MSR 0x258 0x0606060606060606
1924 15:54:40.919384 MTRR: Fixed MSR 0x259 0x0000000000000000
1925 15:54:40.925799 MTRR: Fixed MSR 0x268 0x0606060606060606
1926 15:54:40.929466 MTRR: Fixed MSR 0x269 0x0606060606060606
1927 15:54:40.932283 MTRR: Fixed MSR 0x26a 0x0606060606060606
1928 15:54:40.935758 MTRR: Fixed MSR 0x26b 0x0606060606060606
1929 15:54:40.942226 MTRR: Fixed MSR 0x26c 0x0606060606060606
1930 15:54:40.945828 MTRR: Fixed MSR 0x26d 0x0606060606060606
1931 15:54:40.948634 MTRR: Fixed MSR 0x26e 0x0606060606060606
1932 15:54:40.952081 MTRR: Fixed MSR 0x26f 0x0606060606060606
1933 15:54:40.959042 MTRR: Fixed MSR 0x258 0x0606060606060606
1934 15:54:40.961876 MTRR: Fixed MSR 0x259 0x0000000000000000
1935 15:54:40.965180 MTRR: Fixed MSR 0x268 0x0606060606060606
1936 15:54:40.971712 MTRR: Fixed MSR 0x269 0x0606060606060606
1937 15:54:40.975326 MTRR: Fixed MSR 0x26a 0x0606060606060606
1938 15:54:40.978251 MTRR: Fixed MSR 0x26b 0x0606060606060606
1939 15:54:40.981910 MTRR: Fixed MSR 0x26c 0x0606060606060606
1940 15:54:40.988435 MTRR: Fixed MSR 0x26d 0x0606060606060606
1941 15:54:40.991228 MTRR: Fixed MSR 0x26e 0x0606060606060606
1942 15:54:40.994750 MTRR: Fixed MSR 0x26f 0x0606060606060606
1943 15:54:40.998228 call enable_fixed_mtrr()
1944 15:54:41.001091 call enable_fixed_mtrr()
1945 15:54:41.004711 CPU physical address size: 39 bits
1946 15:54:41.007525 CPU physical address size: 39 bits
1947 15:54:41.011507 CPU physical address size: 39 bits
1948 15:54:41.014622 CBFS: Found @ offset 1c96c0 size 3f798
1949 15:54:41.017405 MTRR: Fixed MSR 0x250 0x0606060606060606
1950 15:54:41.023816 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 15:54:41.027707 MTRR: Fixed MSR 0x258 0x0606060606060606
1952 15:54:41.031059 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 15:54:41.033738 MTRR: Fixed MSR 0x268 0x0606060606060606
1954 15:54:41.040121 MTRR: Fixed MSR 0x269 0x0606060606060606
1955 15:54:41.043532 MTRR: Fixed MSR 0x26a 0x0606060606060606
1956 15:54:41.046951 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 15:54:41.050528 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 15:54:41.056735 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 15:54:41.060251 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 15:54:41.063121 MTRR: Fixed MSR 0x26f 0x0606060606060606
1961 15:54:41.070109 MTRR: Fixed MSR 0x258 0x0606060606060606
1962 15:54:41.072925 MTRR: Fixed MSR 0x259 0x0000000000000000
1963 15:54:41.076489 MTRR: Fixed MSR 0x268 0x0606060606060606
1964 15:54:41.079390 MTRR: Fixed MSR 0x269 0x0606060606060606
1965 15:54:41.086550 MTRR: Fixed MSR 0x26a 0x0606060606060606
1966 15:54:41.089425 MTRR: Fixed MSR 0x26b 0x0606060606060606
1967 15:54:41.092913 MTRR: Fixed MSR 0x26c 0x0606060606060606
1968 15:54:41.095811 MTRR: Fixed MSR 0x26d 0x0606060606060606
1969 15:54:41.102304 MTRR: Fixed MSR 0x26e 0x0606060606060606
1970 15:54:41.105887 MTRR: Fixed MSR 0x26f 0x0606060606060606
1971 15:54:41.109404 call enable_fixed_mtrr()
1972 15:54:41.112260 Checking segment from ROM address 0xffdd16f8
1973 15:54:41.115271 call enable_fixed_mtrr()
1974 15:54:41.118756 CPU physical address size: 39 bits
1975 15:54:41.122045 CPU physical address size: 39 bits
1976 15:54:41.125155 Checking segment from ROM address 0xffdd1714
1977 15:54:41.132340 Loading segment from ROM address 0xffdd16f8
1978 15:54:41.135069 code (compression=0)
1979 15:54:41.141681 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1980 15:54:41.151764 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1981 15:54:41.152264 it's not compressed!
1982 15:54:41.245363 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1983 15:54:41.251735 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1984 15:54:41.258056 Loading segment from ROM address 0xffdd1714
1985 15:54:41.258534 Entry Point 0x30000000
1986 15:54:41.261579 Loaded segments
1987 15:54:41.267119 Finalizing chipset.
1988 15:54:41.270651 Finalizing SMM.
1989 15:54:41.273535 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1990 15:54:41.277009 mp_park_aps done after 0 msecs.
1991 15:54:41.283450 Jumping to boot code at 30000000(99b62000)
1992 15:54:41.289965 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1993 15:54:41.290422
1994 15:54:41.290788
1995 15:54:41.291137
1996 15:54:41.293381 Starting depthcharge on Helios...
1997 15:54:41.293876
1998 15:54:41.294902 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
1999 15:54:41.295410 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2000 15:54:41.295826 Setting prompt string to ['hatch:']
2001 15:54:41.296278 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
2002 15:54:41.303379 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2003 15:54:41.303872
2004 15:54:41.310003 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2005 15:54:41.310473
2006 15:54:41.316589 board_setup: Info: eMMC controller not present; skipping
2007 15:54:41.317128
2008 15:54:41.319492 New NVMe Controller 0x30053ac0 @ 00:1d:00
2009 15:54:41.319973
2010 15:54:41.326057 board_setup: Info: SDHCI controller not present; skipping
2011 15:54:41.326503
2012 15:54:41.333222 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2013 15:54:41.333668
2014 15:54:41.334210 Wipe memory regions:
2015 15:54:41.334573
2016 15:54:41.335985 [0x00000000001000, 0x000000000a0000)
2017 15:54:41.339740
2018 15:54:41.342495 [0x00000000100000, 0x00000030000000)
2019 15:54:41.405992
2020 15:54:41.409530 [0x00000030657430, 0x00000099a2c000)
2021 15:54:41.547120
2022 15:54:41.549991 [0x00000100000000, 0x0000045e800000)
2023 15:54:42.931939
2024 15:54:42.932092 R8152: Initializing
2025 15:54:42.932163
2026 15:54:42.934807 Version 9 (ocp_data = 6010)
2027 15:54:42.939265
2028 15:54:42.939347 R8152: Done initializing
2029 15:54:42.939416
2030 15:54:42.942987 Adding net device
2031 15:54:43.426215
2032 15:54:43.426725 R8152: Initializing
2033 15:54:43.427079
2034 15:54:43.429105 Version 6 (ocp_data = 5c30)
2035 15:54:43.429538
2036 15:54:43.431830 R8152: Done initializing
2037 15:54:43.432297
2038 15:54:43.438494 net_add_device: Attemp to include the same device
2039 15:54:43.438981
2040 15:54:43.445690 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2041 15:54:43.446159
2042 15:54:43.446502
2043 15:54:43.446853
2044 15:54:43.447564 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2046 15:54:43.549139 hatch: tftpboot 192.168.201.1 9036895/tftp-deploy-_dkdd8bk/kernel/bzImage 9036895/tftp-deploy-_dkdd8bk/kernel/cmdline 9036895/tftp-deploy-_dkdd8bk/ramdisk/ramdisk.cpio.gz
2047 15:54:43.549746 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2048 15:54:43.550151 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2049 15:54:43.554657 tftpboot 192.168.201.1 9036895/tftp-deploy-_dkdd8bk/kernel/bzImoy-_dkdd8bk/kernel/cmdline 9036895/tftp-deploy-_dkdd8bk/ramdisk/ramdisk.cpio.gz
2050 15:54:43.555114
2051 15:54:43.555455 Waiting for link
2052 15:54:43.755326
2053 15:54:43.755627 done.
2054 15:54:43.755878
2055 15:54:43.756117 MAC: 00:24:32:50:19:be
2056 15:54:43.756336
2057 15:54:43.758300 Sending DHCP discover... done.
2058 15:54:43.758539
2059 15:54:43.761976 Waiting for reply... done.
2060 15:54:43.762219
2061 15:54:43.765074 Sending DHCP request... done.
2062 15:54:43.765315
2063 15:54:43.771710 Waiting for reply... done.
2064 15:54:43.771974
2065 15:54:43.772213 My ip is 192.168.201.15
2066 15:54:43.772438
2067 15:54:43.778418 The DHCP server ip is 192.168.201.1
2068 15:54:43.778677
2069 15:54:43.782111 TFTP server IP predefined by user: 192.168.201.1
2070 15:54:43.782354
2071 15:54:43.788791 Bootfile predefined by user: 9036895/tftp-deploy-_dkdd8bk/kernel/bzImage
2072 15:54:43.789035
2073 15:54:43.791692 Sending tftp read request... done.
2074 15:54:43.791956
2075 15:54:43.798507 Waiting for the transfer...
2076 15:54:43.798750
2077 15:54:44.351151 00000000 ################################################################
2078 15:54:44.351291
2079 15:54:44.903690 00080000 ################################################################
2080 15:54:44.903847
2081 15:54:45.443633 00100000 ################################################################
2082 15:54:45.443774
2083 15:54:45.962634 00180000 ################################################################
2084 15:54:45.962793
2085 15:54:46.478636 00200000 ################################################################
2086 15:54:46.478784
2087 15:54:46.996930 00280000 ################################################################
2088 15:54:46.997074
2089 15:54:47.511432 00300000 ################################################################
2090 15:54:47.511576
2091 15:54:48.033436 00380000 ################################################################
2092 15:54:48.033590
2093 15:54:48.547514 00400000 ################################################################
2094 15:54:48.547653
2095 15:54:49.067335 00480000 ################################################################
2096 15:54:49.067470
2097 15:54:49.595383 00500000 ################################################################
2098 15:54:49.595516
2099 15:54:50.126172 00580000 ################################################################
2100 15:54:50.126305
2101 15:54:50.663546 00600000 ################################################################
2102 15:54:50.663689
2103 15:54:51.212829 00680000 ################################################################
2104 15:54:51.212969
2105 15:54:51.448080 00700000 ############################# done.
2106 15:54:51.448219
2107 15:54:51.451081 The bootfile was 7577488 bytes long.
2108 15:54:51.451167
2109 15:54:51.454614 Sending tftp read request... done.
2110 15:54:51.454702
2111 15:54:51.457574 Waiting for the transfer...
2112 15:54:51.457659
2113 15:54:51.969443 00000000 ################################################################
2114 15:54:51.969612
2115 15:54:52.480855 00080000 ################################################################
2116 15:54:52.480997
2117 15:54:53.067433 00100000 ################################################################
2118 15:54:53.068016
2119 15:54:53.744749 00180000 ################################################################
2120 15:54:53.745287
2121 15:54:54.405452 00200000 ################################################################
2122 15:54:54.405648
2123 15:54:55.078526 00280000 ################################################################
2124 15:54:55.079140
2125 15:54:55.754031 00300000 ################################################################
2126 15:54:55.754569
2127 15:54:56.423203 00380000 ################################################################
2128 15:54:56.423730
2129 15:54:57.091587 00400000 ################################################################
2130 15:54:57.092155
2131 15:54:57.765911 00480000 ################################################################
2132 15:54:57.766434
2133 15:54:58.087551 00500000 ################################ done.
2134 15:54:58.088188
2135 15:54:58.091061 Sending tftp read request... done.
2136 15:54:58.091513
2137 15:54:58.093969 Waiting for the transfer...
2138 15:54:58.094430
2139 15:54:58.094780 00000000 # done.
2140 15:54:58.095118
2141 15:54:58.104194 Command line loaded dynamically from TFTP file: 9036895/tftp-deploy-_dkdd8bk/kernel/cmdline
2142 15:54:58.104668
2143 15:54:58.130184 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9036895/extract-nfsrootfs-v51c_7ea,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2144 15:54:58.130671
2145 15:54:58.136429 ec_init(0): CrosEC protocol v3 supported (256, 256)
2146 15:54:58.140609
2147 15:54:58.143522 Shutting down all USB controllers.
2148 15:54:58.144015
2149 15:54:58.144471 Removing current net device
2150 15:54:58.147948
2151 15:54:58.148409 Finalizing coreboot
2152 15:54:58.148858
2153 15:54:58.154434 Exiting depthcharge with code 4 at timestamp: 24194984
2154 15:54:58.154895
2155 15:54:58.155345
2156 15:54:58.155772 Starting kernel ...
2157 15:54:58.156226
2158 15:54:58.156639
2159 15:54:58.157892 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2160 15:54:58.158456 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2161 15:54:58.158887 Setting prompt string to ['Linux version [0-9]']
2162 15:54:58.159338 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2163 15:54:58.159788 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2165 15:59:21.158645 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2167 15:59:21.158969 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2169 15:59:21.159224 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2172 15:59:21.159617 end: 2 depthcharge-action (duration 00:05:00) [common]
2174 15:59:21.159859 Cleaning after the job
2175 15:59:21.159970 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9036895/tftp-deploy-_dkdd8bk/ramdisk
2176 15:59:21.160421 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9036895/tftp-deploy-_dkdd8bk/kernel
2177 15:59:21.161001 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9036895/tftp-deploy-_dkdd8bk/nfsrootfs
2178 15:59:21.212657 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9036895/tftp-deploy-_dkdd8bk/modules
2179 15:59:21.212954 start: 4.1 power-off (timeout 00:00:30) [common]
2180 15:59:21.213120 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2181 15:59:23.379192 >> Command sent successfully.
2182 15:59:23.388656 Returned 0 in 2 seconds
2183 15:59:23.490299 end: 4.1 power-off (duration 00:00:02) [common]
2185 15:59:23.491950 start: 4.2 read-feedback (timeout 00:09:58) [common]
2186 15:59:23.493200 Listened to connection for namespace 'common' for up to 1s
2188 15:59:23.494841 Listened to connection for namespace 'common' for up to 1s
2189 15:59:23.495970 Listened to connection for namespace 'common' for up to 1s
2190 15:59:23.497191 Listened to connection for namespace 'common' for up to 1s
2191 15:59:23.498465 Listened to connection for namespace 'common' for up to 1s
2192 15:59:23.499764 Listened to connection for namespace 'common' for up to 1s
2193 15:59:24.496000 Finalising connection for namespace 'common'
2194 15:59:24.496173 Disconnecting from shell: Finalise
2195 15:59:24.496278
2196 15:59:24.597206 end: 4.2 read-feedback (duration 00:00:01) [common]
2197 15:59:24.597340 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9036895
2198 15:59:24.740185 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9036895
2199 15:59:24.740384 JobError: Your job cannot terminate cleanly.