Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 15:53:10.217407 lava-dispatcher, installed at version: 2022.11
2 15:53:10.217598 start: 0 validate
3 15:53:10.217736 Start time: 2023-02-06 15:53:10.217729+00:00 (UTC)
4 15:53:10.217861 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:53:10.217986 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230127.0%2Famd64%2Finitrd.cpio.gz exists
6 15:53:10.512588 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:53:10.513333 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-1684-gd04aea87b5a3%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:53:10.808933 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:53:10.809683 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230127.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:53:11.105015 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:53:11.105768 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-1684-gd04aea87b5a3%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:53:11.406960 validate duration: 1.19
14 15:53:11.408375 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:53:11.408983 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:53:11.409529 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:53:11.410085 Not decompressing ramdisk as can be used compressed.
18 15:53:11.410842 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230127.0/amd64/initrd.cpio.gz
19 15:53:11.411269 saving as /var/lib/lava/dispatcher/tmp/9036875/tftp-deploy-c6pxu6vf/ramdisk/initrd.cpio.gz
20 15:53:11.411639 total size: 5431822 (5MB)
21 15:53:11.418332 progress 0% (0MB)
22 15:53:11.424643 progress 5% (0MB)
23 15:53:11.426085 progress 10% (0MB)
24 15:53:11.427481 progress 15% (0MB)
25 15:53:11.429062 progress 20% (1MB)
26 15:53:11.430469 progress 25% (1MB)
27 15:53:11.432336 progress 30% (1MB)
28 15:53:11.435092 progress 35% (1MB)
29 15:53:11.437020 progress 40% (2MB)
30 15:53:11.439321 progress 45% (2MB)
31 15:53:11.441753 progress 50% (2MB)
32 15:53:11.444667 progress 55% (2MB)
33 15:53:11.446807 progress 60% (3MB)
34 15:53:11.449439 progress 65% (3MB)
35 15:53:11.452088 progress 70% (3MB)
36 15:53:11.454263 progress 75% (3MB)
37 15:53:11.456558 progress 80% (4MB)
38 15:53:11.458638 progress 85% (4MB)
39 15:53:11.461672 progress 90% (4MB)
40 15:53:11.464035 progress 95% (4MB)
41 15:53:11.466372 progress 100% (5MB)
42 15:53:11.466643 5MB downloaded in 0.06s (94.17MB/s)
43 15:53:11.466803 end: 1.1.1 http-download (duration 00:00:00) [common]
45 15:53:11.467055 end: 1.1 download-retry (duration 00:00:00) [common]
46 15:53:11.467146 start: 1.2 download-retry (timeout 00:10:00) [common]
47 15:53:11.467233 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 15:53:11.467338 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-1684-gd04aea87b5a3/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:53:11.467411 saving as /var/lib/lava/dispatcher/tmp/9036875/tftp-deploy-c6pxu6vf/kernel/bzImage
50 15:53:11.467474 total size: 7577488 (7MB)
51 15:53:11.467536 No compression specified
52 15:53:11.469660 progress 0% (0MB)
53 15:53:11.473049 progress 5% (0MB)
54 15:53:11.476349 progress 10% (0MB)
55 15:53:11.479940 progress 15% (1MB)
56 15:53:11.483302 progress 20% (1MB)
57 15:53:11.486361 progress 25% (1MB)
58 15:53:11.489657 progress 30% (2MB)
59 15:53:11.492670 progress 35% (2MB)
60 15:53:11.496155 progress 40% (2MB)
61 15:53:11.499700 progress 45% (3MB)
62 15:53:11.502461 progress 50% (3MB)
63 15:53:11.505930 progress 55% (4MB)
64 15:53:11.508987 progress 60% (4MB)
65 15:53:11.512840 progress 65% (4MB)
66 15:53:11.516100 progress 70% (5MB)
67 15:53:11.519590 progress 75% (5MB)
68 15:53:11.522673 progress 80% (5MB)
69 15:53:11.526277 progress 85% (6MB)
70 15:53:11.529895 progress 90% (6MB)
71 15:53:11.533794 progress 95% (6MB)
72 15:53:11.536662 progress 100% (7MB)
73 15:53:11.536855 7MB downloaded in 0.07s (104.16MB/s)
74 15:53:11.537009 end: 1.2.1 http-download (duration 00:00:00) [common]
76 15:53:11.537250 end: 1.2 download-retry (duration 00:00:00) [common]
77 15:53:11.537340 start: 1.3 download-retry (timeout 00:10:00) [common]
78 15:53:11.537428 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 15:53:11.537536 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230127.0/amd64/full.rootfs.tar.xz
80 15:53:11.537605 saving as /var/lib/lava/dispatcher/tmp/9036875/tftp-deploy-c6pxu6vf/nfsrootfs/full.rootfs.tar
81 15:53:11.537668 total size: 123885004 (118MB)
82 15:53:11.537732 Using unxz to decompress xz
83 15:53:11.541824 progress 0% (0MB)
84 15:53:11.999968 progress 5% (5MB)
85 15:53:12.469810 progress 10% (11MB)
86 15:53:12.922164 progress 15% (17MB)
87 15:53:13.374797 progress 20% (23MB)
88 15:53:13.699690 progress 25% (29MB)
89 15:53:14.032092 progress 30% (35MB)
90 15:53:14.300241 progress 35% (41MB)
91 15:53:14.463671 progress 40% (47MB)
92 15:53:14.820388 progress 45% (53MB)
93 15:53:15.171530 progress 50% (59MB)
94 15:53:15.496745 progress 55% (65MB)
95 15:53:15.838433 progress 60% (70MB)
96 15:53:16.161085 progress 65% (76MB)
97 15:53:16.527167 progress 70% (82MB)
98 15:53:16.927780 progress 75% (88MB)
99 15:53:17.327803 progress 80% (94MB)
100 15:53:17.447776 progress 85% (100MB)
101 15:53:17.602580 progress 90% (106MB)
102 15:53:17.921414 progress 95% (112MB)
103 15:53:18.278097 progress 100% (118MB)
104 15:53:18.283984 118MB downloaded in 6.75s (17.51MB/s)
105 15:53:18.284239 end: 1.3.1 http-download (duration 00:00:07) [common]
107 15:53:18.284510 end: 1.3 download-retry (duration 00:00:07) [common]
108 15:53:18.284603 start: 1.4 download-retry (timeout 00:09:53) [common]
109 15:53:18.284693 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 15:53:18.284811 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-1684-gd04aea87b5a3/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:53:18.284889 saving as /var/lib/lava/dispatcher/tmp/9036875/tftp-deploy-c6pxu6vf/modules/modules.tar
112 15:53:18.284958 total size: 54728 (0MB)
113 15:53:18.285022 Using unxz to decompress xz
114 15:53:18.290339 progress 59% (0MB)
115 15:53:18.290746 progress 100% (0MB)
116 15:53:18.294134 0MB downloaded in 0.01s (5.69MB/s)
117 15:53:18.294347 end: 1.4.1 http-download (duration 00:00:00) [common]
119 15:53:18.294652 end: 1.4 download-retry (duration 00:00:00) [common]
120 15:53:18.294749 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 15:53:18.294845 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 15:53:19.958262 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9036875/extract-nfsrootfs-nik9hf2w
123 15:53:19.958461 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 15:53:19.958834 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 15:53:19.958973 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431
126 15:53:19.959077 makedir: /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin
127 15:53:19.959164 makedir: /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/tests
128 15:53:19.959246 makedir: /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/results
129 15:53:19.959374 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-add-keys
130 15:53:19.959502 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-add-sources
131 15:53:19.959617 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-background-process-start
132 15:53:19.959732 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-background-process-stop
133 15:53:19.959843 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-common-functions
134 15:53:19.959953 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-echo-ipv4
135 15:53:19.960063 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-install-packages
136 15:53:19.960172 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-installed-packages
137 15:53:19.960279 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-os-build
138 15:53:19.960387 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-probe-channel
139 15:53:19.960495 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-probe-ip
140 15:53:19.960603 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-target-ip
141 15:53:19.960712 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-target-mac
142 15:53:19.960819 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-target-storage
143 15:53:19.960929 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-test-case
144 15:53:19.961038 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-test-event
145 15:53:19.961146 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-test-feedback
146 15:53:19.961253 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-test-raise
147 15:53:19.961360 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-test-reference
148 15:53:19.961467 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-test-runner
149 15:53:19.961574 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-test-set
150 15:53:19.961681 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-test-shell
151 15:53:19.961791 Updating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-install-packages (oe)
152 15:53:19.961902 Updating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/bin/lava-installed-packages (oe)
153 15:53:19.961998 Creating /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/environment
154 15:53:19.962084 LAVA metadata
155 15:53:19.962151 - LAVA_JOB_ID=9036875
156 15:53:19.962215 - LAVA_DISPATCHER_IP=192.168.201.1
157 15:53:19.962311 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 15:53:19.962385 skipped lava-vland-overlay
159 15:53:19.962479 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 15:53:19.962591 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 15:53:19.962655 skipped lava-multinode-overlay
162 15:53:19.962729 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 15:53:19.962846 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 15:53:19.962917 Loading test definitions
165 15:53:19.963006 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 15:53:19.963078 Using /lava-9036875 at stage 0
167 15:53:19.963170 Fetching tests from https://github.com/kernelci/test-definitions
168 15:53:19.963250 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/0/tests/0_ltp-mm'
169 15:53:26.367803 Running '/usr/bin/git checkout kernelci.org
170 15:53:26.501474 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
171 15:53:26.502217 uuid=9036875_1.5.2.3.1 testdef=None
172 15:53:26.502373 end: 1.5.2.3.1 git-repo-action (duration 00:00:07) [common]
174 15:53:26.502666 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
175 15:53:26.503463 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 15:53:26.503706 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
178 15:53:26.504684 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 15:53:26.504933 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
181 15:53:26.505881 runner path: /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/0/tests/0_ltp-mm test_uuid 9036875_1.5.2.3.1
182 15:53:26.505971 SKIPFILE='skipfile-lkft.yaml'
183 15:53:26.506038 SKIP_INSTALL='true'
184 15:53:26.506101 TST_CMDFILES='mm'
185 15:53:26.506238 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 15:53:26.506456 Creating lava-test-runner.conf files
188 15:53:26.506548 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9036875/lava-overlay-b682x431/lava-9036875/0 for stage 0
189 15:53:26.506662 - 0_ltp-mm
190 15:53:26.506763 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
191 15:53:26.506854 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
192 15:53:33.903981 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
193 15:53:33.904162 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
194 15:53:33.904265 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 15:53:33.904394 end: 1.5.2 lava-overlay (duration 00:00:14) [common]
196 15:53:33.904532 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
197 15:53:34.010331 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 15:53:34.010698 start: 1.5.4 extract-modules (timeout 00:09:37) [common]
199 15:53:34.010901 extracting modules file /var/lib/lava/dispatcher/tmp/9036875/tftp-deploy-c6pxu6vf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9036875/extract-nfsrootfs-nik9hf2w
200 15:53:34.015124 extracting modules file /var/lib/lava/dispatcher/tmp/9036875/tftp-deploy-c6pxu6vf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9036875/extract-overlay-ramdisk-7zvkw5bs/ramdisk
201 15:53:34.019097 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 15:53:34.019231 start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
203 15:53:34.019322 [common] Applying overlay to NFS
204 15:53:34.019398 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9036875/compress-overlay-10v2ld3f/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9036875/extract-nfsrootfs-nik9hf2w
205 15:53:34.487179 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 15:53:34.487360 start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
207 15:53:34.487458 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 15:53:34.487553 start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
209 15:53:34.487638 Building ramdisk /var/lib/lava/dispatcher/tmp/9036875/extract-overlay-ramdisk-7zvkw5bs/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9036875/extract-overlay-ramdisk-7zvkw5bs/ramdisk
210 15:53:34.522164 >> 24583 blocks
211 15:53:34.996753 rename /var/lib/lava/dispatcher/tmp/9036875/extract-overlay-ramdisk-7zvkw5bs/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9036875/tftp-deploy-c6pxu6vf/ramdisk/ramdisk.cpio.gz
212 15:53:34.997179 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 15:53:34.997316 start: 1.5.8 prepare-kernel (timeout 00:09:36) [common]
214 15:53:34.997431 start: 1.5.8.1 prepare-fit (timeout 00:09:36) [common]
215 15:53:34.997546 No mkimage arch provided, not using FIT.
216 15:53:34.997649 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 15:53:34.997764 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 15:53:34.997875 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
219 15:53:34.997987 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:36) [common]
220 15:53:34.998072 No LXC device requested
221 15:53:34.998177 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 15:53:34.998272 start: 1.7 deploy-device-env (timeout 00:09:36) [common]
223 15:53:34.998378 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 15:53:34.998457 Checking files for TFTP limit of 4294967296 bytes.
225 15:53:34.998906 end: 1 tftp-deploy (duration 00:00:24) [common]
226 15:53:34.999042 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 15:53:34.999148 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 15:53:34.999298 substitutions:
229 15:53:34.999377 - {DTB}: None
230 15:53:34.999466 - {INITRD}: 9036875/tftp-deploy-c6pxu6vf/ramdisk/ramdisk.cpio.gz
231 15:53:34.999532 - {KERNEL}: 9036875/tftp-deploy-c6pxu6vf/kernel/bzImage
232 15:53:34.999606 - {LAVA_MAC}: None
233 15:53:34.999672 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9036875/extract-nfsrootfs-nik9hf2w
234 15:53:34.999735 - {NFS_SERVER_IP}: 192.168.201.1
235 15:53:34.999821 - {PRESEED_CONFIG}: None
236 15:53:34.999887 - {PRESEED_LOCAL}: None
237 15:53:34.999947 - {RAMDISK}: 9036875/tftp-deploy-c6pxu6vf/ramdisk/ramdisk.cpio.gz
238 15:53:35.000031 - {ROOT_PART}: None
239 15:53:35.000091 - {ROOT}: None
240 15:53:35.000150 - {SERVER_IP}: 192.168.201.1
241 15:53:35.000221 - {TEE}: None
242 15:53:35.000287 Parsed boot commands:
243 15:53:35.000344 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 15:53:35.000527 Parsed boot commands: tftpboot 192.168.201.1 9036875/tftp-deploy-c6pxu6vf/kernel/bzImage 9036875/tftp-deploy-c6pxu6vf/kernel/cmdline 9036875/tftp-deploy-c6pxu6vf/ramdisk/ramdisk.cpio.gz
245 15:53:35.000641 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 15:53:35.000734 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 15:53:35.000854 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 15:53:35.000950 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 15:53:35.001033 Not connected, no need to disconnect.
250 15:53:35.001140 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 15:53:35.001231 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 15:53:35.001321 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-2'
253 15:53:35.004539 Setting prompt string to ['lava-test: # ']
254 15:53:35.004888 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 15:53:35.005030 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 15:53:35.005165 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 15:53:35.005301 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 15:53:35.005500 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=reboot'
259 15:53:44.323659 >> Command sent successfully.
260 15:53:44.332659 Returned 0 in 9 seconds
261 15:53:44.434182 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
263 15:53:44.435291 end: 2.2.2 reset-device (duration 00:00:09) [common]
264 15:53:44.435660 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
265 15:53:44.435982 Setting prompt string to 'Starting depthcharge on Helios...'
266 15:53:44.436234 Changing prompt to 'Starting depthcharge on Helios...'
267 15:53:44.436496 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 15:53:44.437416 [Enter `^Ec?' for help]
269 15:53:44.437733
270 15:53:44.437987
271 15:53:44.438238 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 15:53:44.438505 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 15:53:44.438766 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 15:53:44.438998 CPU: AES supported, TXT NOT supported, VT supported
275 15:53:44.439130 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 15:53:44.439193 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 15:53:44.439253 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 15:53:44.439313 VBOOT: Loading verstage.
279 15:53:44.439373 FMAP: Found "FLASH" version 1.1 at 0xc04000.
280 15:53:44.439434 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 15:53:44.439493 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 15:53:44.439553 CBFS @ c08000 size 3f8000
283 15:53:44.439612 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 15:53:44.439671 CBFS: Locating 'fallback/verstage'
285 15:53:44.439730 CBFS: Found @ offset 10fb80 size 1072c
286 15:53:44.439789
287 15:53:44.439847
288 15:53:44.439906 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 15:53:44.439965 Probing TPM: . done!
290 15:53:44.440041 TPM ready after 0 ms
291 15:53:44.440116 Connected to device vid:did:rid of 1ae0:0028:00
292 15:53:44.440175 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
293 15:53:44.440237 Initialized TPM device CR50 revision 0
294 15:53:44.440296 tlcl_send_startup: Startup return code is 0
295 15:53:44.440355 TPM: setup succeeded
296 15:53:44.440414 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 15:53:44.440472 Chrome EC: UHEPI supported
298 15:53:44.440530 Phase 1
299 15:53:44.440590 FMAP: area GBB found @ c05000 (12288 bytes)
300 15:53:44.440649 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 15:53:44.440707 Phase 2
302 15:53:44.440765 Phase 3
303 15:53:44.440823 FMAP: area GBB found @ c05000 (12288 bytes)
304 15:53:44.440881 VB2:vb2_report_dev_firmware() This is developer signed firmware
305 15:53:44.440940 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
306 15:53:44.440998 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
307 15:53:44.441057 VB2:vb2_verify_keyblock() Checking keyblock signature...
308 15:53:44.441114 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
309 15:53:44.441172 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
310 15:53:44.441230 VB2:vb2_verify_fw_preamble() Verifying preamble.
311 15:53:44.441287 Phase 4
312 15:53:44.441345 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
313 15:53:44.441403 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
314 15:53:44.441462 VB2:vb2_rsa_verify_digest() Digest check failed!
315 15:53:44.441520 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
316 15:53:44.441579 Saving nvdata
317 15:53:44.441636 Reboot requested (10020007)
318 15:53:44.441693 board_reset() called!
319 15:53:44.441750 full_reset() called!
320 15:53:48.004556
321 15:53:48.004718
322 15:53:48.014300 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
323 15:53:48.017359 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
324 15:53:48.023693 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
325 15:53:48.026994 CPU: AES supported, TXT NOT supported, VT supported
326 15:53:48.033731 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
327 15:53:48.036874 PCH: device id 0284 (rev 00) is Cometlake-U Premium
328 15:53:48.043356 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
329 15:53:48.046984 VBOOT: Loading verstage.
330 15:53:48.050674 FMAP: Found "FLASH" version 1.1 at 0xc04000.
331 15:53:48.056603 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
332 15:53:48.063202 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
333 15:53:48.063293 CBFS @ c08000 size 3f8000
334 15:53:48.069774 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
335 15:53:48.072951 CBFS: Locating 'fallback/verstage'
336 15:53:48.076955 CBFS: Found @ offset 10fb80 size 1072c
337 15:53:48.080926
338 15:53:48.081013
339 15:53:48.090268 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
340 15:53:48.104936 Probing TPM: . done!
341 15:53:48.108535 TPM ready after 0 ms
342 15:53:48.111505 Connected to device vid:did:rid of 1ae0:0028:00
343 15:53:48.121799 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
344 15:53:48.125131 Initialized TPM device CR50 revision 0
345 15:53:48.167492 tlcl_send_startup: Startup return code is 0
346 15:53:48.167606 TPM: setup succeeded
347 15:53:48.180282 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
348 15:53:48.183908 Chrome EC: UHEPI supported
349 15:53:48.187849 Phase 1
350 15:53:48.190648 FMAP: area GBB found @ c05000 (12288 bytes)
351 15:53:48.197177 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
352 15:53:48.203740 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
353 15:53:48.206910 Recovery requested (1009000e)
354 15:53:48.212962 Saving nvdata
355 15:53:48.218965 tlcl_extend: response is 0
356 15:53:48.228160 tlcl_extend: response is 0
357 15:53:48.234835 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
358 15:53:48.238111 CBFS @ c08000 size 3f8000
359 15:53:48.244982 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
360 15:53:48.248218 CBFS: Locating 'fallback/romstage'
361 15:53:48.251228 CBFS: Found @ offset 80 size 145fc
362 15:53:48.254216 Accumulated console time in verstage 98 ms
363 15:53:48.254305
364 15:53:48.257773
365 15:53:48.267781 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
366 15:53:48.274396 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
367 15:53:48.277639 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
368 15:53:48.280507 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
369 15:53:48.287225 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
370 15:53:48.290490 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
371 15:53:48.294002 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
372 15:53:48.297366 TCO_STS: 0000 0000
373 15:53:48.300921 GEN_PMCON: e0015238 00000200
374 15:53:48.303724 GBLRST_CAUSE: 00000000 00000000
375 15:53:48.303815 prev_sleep_state 5
376 15:53:48.307954 Boot Count incremented to 46387
377 15:53:48.314328 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 15:53:48.317540 CBFS @ c08000 size 3f8000
379 15:53:48.324395 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 15:53:48.324486 CBFS: Locating 'fspm.bin'
381 15:53:48.330853 CBFS: Found @ offset 5ffc0 size 71000
382 15:53:48.334718 Chrome EC: UHEPI supported
383 15:53:48.340523 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
384 15:53:48.344657 Probing TPM: done!
385 15:53:48.351575 Connected to device vid:did:rid of 1ae0:0028:00
386 15:53:48.360870 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
387 15:53:48.367319 Initialized TPM device CR50 revision 0
388 15:53:48.376258 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
389 15:53:48.382974 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
390 15:53:48.385656 MRC cache found, size 1948
391 15:53:48.389045 bootmode is set to: 2
392 15:53:48.392404 PRMRR disabled by config.
393 15:53:48.395584 SPD INDEX = 1
394 15:53:48.399087 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
395 15:53:48.402243 CBFS @ c08000 size 3f8000
396 15:53:48.408620 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
397 15:53:48.408709 CBFS: Locating 'spd.bin'
398 15:53:48.412408 CBFS: Found @ offset 5fb80 size 400
399 15:53:48.415258 SPD: module type is LPDDR3
400 15:53:48.418704 SPD: module part is
401 15:53:48.425458 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
402 15:53:48.428602 SPD: device width 4 bits, bus width 8 bits
403 15:53:48.431836 SPD: module size is 4096 MB (per channel)
404 15:53:48.435057 memory slot: 0 configuration done.
405 15:53:48.441779 memory slot: 2 configuration done.
406 15:53:48.490334 CBMEM:
407 15:53:48.493329 IMD: root @ 99fff000 254 entries.
408 15:53:48.496539 IMD: root @ 99ffec00 62 entries.
409 15:53:48.499877 External stage cache:
410 15:53:48.503289 IMD: root @ 9abff000 254 entries.
411 15:53:48.506392 IMD: root @ 9abfec00 62 entries.
412 15:53:48.513155 Chrome EC: clear events_b mask to 0x0000000020004000
413 15:53:48.525958 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 15:53:48.538868 tlcl_write: response is 0
415 15:53:48.548185 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
416 15:53:48.554430 MRC: TPM MRC hash updated successfully.
417 15:53:48.554529 2 DIMMs found
418 15:53:48.558053 SMM Memory Map
419 15:53:48.561303 SMRAM : 0x9a000000 0x1000000
420 15:53:48.564154 Subregion 0: 0x9a000000 0xa00000
421 15:53:48.567870 Subregion 1: 0x9aa00000 0x200000
422 15:53:48.571167 Subregion 2: 0x9ac00000 0x400000
423 15:53:48.574169 top_of_ram = 0x9a000000
424 15:53:48.577475 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
425 15:53:48.584080 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
426 15:53:48.587390 MTRR Range: Start=ff000000 End=0 (Size 1000000)
427 15:53:48.594374 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
428 15:53:48.597083 CBFS @ c08000 size 3f8000
429 15:53:48.603608 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
430 15:53:48.607355 CBFS: Locating 'fallback/postcar'
431 15:53:48.610642 CBFS: Found @ offset 107000 size 4b44
432 15:53:48.617240 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
433 15:53:48.627194 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
434 15:53:48.630020 Processing 180 relocs. Offset value of 0x97c0c000
435 15:53:48.638420 Accumulated console time in romstage 286 ms
436 15:53:48.638509
437 15:53:48.638599
438 15:53:48.648385 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
439 15:53:48.654421 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 15:53:48.658222 CBFS @ c08000 size 3f8000
441 15:53:48.664521 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 15:53:48.667663 CBFS: Locating 'fallback/ramstage'
443 15:53:48.671429 CBFS: Found @ offset 43380 size 1b9e8
444 15:53:48.677863 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
445 15:53:48.709911 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
446 15:53:48.713259 Processing 3976 relocs. Offset value of 0x98db0000
447 15:53:48.720076 Accumulated console time in postcar 52 ms
448 15:53:48.720165
449 15:53:48.720236
450 15:53:48.730069 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
451 15:53:48.736615 FMAP: area RO_VPD found @ c00000 (16384 bytes)
452 15:53:48.739710 WARNING: RO_VPD is uninitialized or empty.
453 15:53:48.742948 FMAP: area RW_VPD found @ af8000 (8192 bytes)
454 15:53:48.749842 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 15:53:48.749932 Normal boot.
456 15:53:48.755824 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
457 15:53:48.759393 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
458 15:53:48.762821 CBFS @ c08000 size 3f8000
459 15:53:48.768982 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
460 15:53:48.772487 CBFS: Locating 'cpu_microcode_blob.bin'
461 15:53:48.776232 CBFS: Found @ offset 14700 size 2ec00
462 15:53:48.779236 microcode: sig=0x806ec pf=0x4 revision=0xc9
463 15:53:48.782228 Skip microcode update
464 15:53:48.788945 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 15:53:48.789038 CBFS @ c08000 size 3f8000
466 15:53:48.795967 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 15:53:48.798809 CBFS: Locating 'fsps.bin'
468 15:53:48.802355 CBFS: Found @ offset d1fc0 size 35000
469 15:53:48.827886 Detected 4 core, 8 thread CPU.
470 15:53:48.831263 Setting up SMI for CPU
471 15:53:48.834789 IED base = 0x9ac00000
472 15:53:48.834877 IED size = 0x00400000
473 15:53:48.838025 Will perform SMM setup.
474 15:53:48.844396 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
475 15:53:48.851251 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
476 15:53:48.857884 Processing 16 relocs. Offset value of 0x00030000
477 15:53:48.857972 Attempting to start 7 APs
478 15:53:48.863967 Waiting for 10ms after sending INIT.
479 15:53:48.878147 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
480 15:53:48.878237 done.
481 15:53:48.880759 AP: slot 1 apic_id 2.
482 15:53:48.884448 AP: slot 6 apic_id 3.
483 15:53:48.884539 AP: slot 5 apic_id 5.
484 15:53:48.887478 AP: slot 7 apic_id 4.
485 15:53:48.891040 AP: slot 4 apic_id 6.
486 15:53:48.891127 AP: slot 3 apic_id 7.
487 15:53:48.897380 Waiting for 2nd SIPI to complete...done.
488 15:53:48.904191 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
489 15:53:48.911017 Processing 13 relocs. Offset value of 0x00038000
490 15:53:48.917612 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
491 15:53:48.920394 Installing SMM handler to 0x9a000000
492 15:53:48.926976 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
493 15:53:48.934281 Processing 658 relocs. Offset value of 0x9a010000
494 15:53:48.940649 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
495 15:53:48.943644 Processing 13 relocs. Offset value of 0x9a008000
496 15:53:48.950465 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
497 15:53:48.956854 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
498 15:53:48.963122 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
499 15:53:48.966491 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
500 15:53:48.973121 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
501 15:53:48.979699 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
502 15:53:48.986419 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
503 15:53:48.993201 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
504 15:53:48.996448 Clearing SMI status registers
505 15:53:48.996537 SMI_STS: PM1
506 15:53:48.999366 PM1_STS: PWRBTN
507 15:53:48.999455 TCO_STS: SECOND_TO
508 15:53:49.003010 New SMBASE 0x9a000000
509 15:53:49.006144 In relocation handler: CPU 0
510 15:53:49.009325 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
511 15:53:49.016295 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 15:53:49.016383 Relocation complete.
513 15:53:49.019076 New SMBASE 0x99fff800
514 15:53:49.022636 In relocation handler: CPU 2
515 15:53:49.026164 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
516 15:53:49.032171 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 15:53:49.032261 Relocation complete.
518 15:53:49.035741 New SMBASE 0x99fff000
519 15:53:49.038980 In relocation handler: CPU 4
520 15:53:49.042555 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
521 15:53:49.049396 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 15:53:49.049485 Relocation complete.
523 15:53:49.051947 New SMBASE 0x99ffe400
524 15:53:49.055198 In relocation handler: CPU 7
525 15:53:49.059023 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
526 15:53:49.064884 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 15:53:49.064980 Relocation complete.
528 15:53:49.068700 New SMBASE 0x99ffec00
529 15:53:49.072001 In relocation handler: CPU 5
530 15:53:49.075155 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
531 15:53:49.081721 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 15:53:49.081810 Relocation complete.
533 15:53:49.084933 New SMBASE 0x99fff400
534 15:53:49.088271 In relocation handler: CPU 3
535 15:53:49.091300 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
536 15:53:49.098429 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 15:53:49.098525 Relocation complete.
538 15:53:49.101155 New SMBASE 0x99fffc00
539 15:53:49.105201 In relocation handler: CPU 1
540 15:53:49.108270 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
541 15:53:49.114021 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 15:53:49.114111 Relocation complete.
543 15:53:49.117940 New SMBASE 0x99ffe800
544 15:53:49.120858 In relocation handler: CPU 6
545 15:53:49.123949 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
546 15:53:49.130715 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 15:53:49.130804 Relocation complete.
548 15:53:49.133961 Initializing CPU #0
549 15:53:49.137590 CPU: vendor Intel device 806ec
550 15:53:49.140840 CPU: family 06, model 8e, stepping 0c
551 15:53:49.144267 Clearing out pending MCEs
552 15:53:49.146863 Setting up local APIC...
553 15:53:49.146952 apic_id: 0x00 done.
554 15:53:49.150529 Turbo is available but hidden
555 15:53:49.153981 Turbo is available and visible
556 15:53:49.157047 VMX status: enabled
557 15:53:49.160978 IA32_FEATURE_CONTROL status: locked
558 15:53:49.163434 Skip microcode update
559 15:53:49.163537 CPU #0 initialized
560 15:53:49.166704 Initializing CPU #2
561 15:53:49.166794 Initializing CPU #1
562 15:53:49.169843 Initializing CPU #6
563 15:53:49.173330 CPU: vendor Intel device 806ec
564 15:53:49.176293 CPU: family 06, model 8e, stepping 0c
565 15:53:49.180062 CPU: vendor Intel device 806ec
566 15:53:49.183095 CPU: family 06, model 8e, stepping 0c
567 15:53:49.186377 Clearing out pending MCEs
568 15:53:49.190084 Clearing out pending MCEs
569 15:53:49.192841 Setting up local APIC...
570 15:53:49.196259 CPU: vendor Intel device 806ec
571 15:53:49.199547 CPU: family 06, model 8e, stepping 0c
572 15:53:49.202764 Clearing out pending MCEs
573 15:53:49.202853 Initializing CPU #5
574 15:53:49.206263 Initializing CPU #7
575 15:53:49.209238 CPU: vendor Intel device 806ec
576 15:53:49.212720 CPU: family 06, model 8e, stepping 0c
577 15:53:49.216563 CPU: vendor Intel device 806ec
578 15:53:49.219176 CPU: family 06, model 8e, stepping 0c
579 15:53:49.222630 Clearing out pending MCEs
580 15:53:49.225740 Clearing out pending MCEs
581 15:53:49.225829 Setting up local APIC...
582 15:53:49.229140 Initializing CPU #3
583 15:53:49.232606 Initializing CPU #4
584 15:53:49.235605 CPU: vendor Intel device 806ec
585 15:53:49.239058 CPU: family 06, model 8e, stepping 0c
586 15:53:49.242385 CPU: vendor Intel device 806ec
587 15:53:49.245863 CPU: family 06, model 8e, stepping 0c
588 15:53:49.248823 Clearing out pending MCEs
589 15:53:49.248912 Clearing out pending MCEs
590 15:53:49.252297 Setting up local APIC...
591 15:53:49.255333 Setting up local APIC...
592 15:53:49.258751 Setting up local APIC...
593 15:53:49.258840 Setting up local APIC...
594 15:53:49.262180 apic_id: 0x07 done.
595 15:53:49.265359 apic_id: 0x06 done.
596 15:53:49.265448 VMX status: enabled
597 15:53:49.268492 VMX status: enabled
598 15:53:49.271959 IA32_FEATURE_CONTROL status: locked
599 15:53:49.275446 IA32_FEATURE_CONTROL status: locked
600 15:53:49.278631 Skip microcode update
601 15:53:49.281772 Skip microcode update
602 15:53:49.281861 CPU #3 initialized
603 15:53:49.285091 CPU #4 initialized
604 15:53:49.285180 apic_id: 0x01 done.
605 15:53:49.288304 Setting up local APIC...
606 15:53:49.291955 apic_id: 0x04 done.
607 15:53:49.292043 apic_id: 0x05 done.
608 15:53:49.295175 VMX status: enabled
609 15:53:49.298447 VMX status: enabled
610 15:53:49.301532 IA32_FEATURE_CONTROL status: locked
611 15:53:49.304570 IA32_FEATURE_CONTROL status: locked
612 15:53:49.308062 Skip microcode update
613 15:53:49.308150 Skip microcode update
614 15:53:49.311443 CPU #7 initialized
615 15:53:49.314285 VMX status: enabled
616 15:53:49.314375 CPU #5 initialized
617 15:53:49.317758 IA32_FEATURE_CONTROL status: locked
618 15:53:49.321431 apic_id: 0x02 done.
619 15:53:49.324533 apic_id: 0x03 done.
620 15:53:49.324622 VMX status: enabled
621 15:53:49.327807 VMX status: enabled
622 15:53:49.331291 IA32_FEATURE_CONTROL status: locked
623 15:53:49.334566 IA32_FEATURE_CONTROL status: locked
624 15:53:49.337436 Skip microcode update
625 15:53:49.337524 Skip microcode update
626 15:53:49.340600 CPU #1 initialized
627 15:53:49.343886 CPU #6 initialized
628 15:53:49.343974 Skip microcode update
629 15:53:49.347478 CPU #2 initialized
630 15:53:49.350805 bsp_do_flight_plan done after 452 msecs.
631 15:53:49.354070 CPU: frequency set to 4200 MHz
632 15:53:49.356948 Enabling SMIs.
633 15:53:49.357037 Locking SMM.
634 15:53:49.371963 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
635 15:53:49.375287 CBFS @ c08000 size 3f8000
636 15:53:49.381765 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
637 15:53:49.381855 CBFS: Locating 'vbt.bin'
638 15:53:49.388455 CBFS: Found @ offset 5f5c0 size 499
639 15:53:49.391584 Found a VBT of 4608 bytes after decompression
640 15:53:49.574429 Display FSP Version Info HOB
641 15:53:49.577739 Reference Code - CPU = 9.0.1e.30
642 15:53:49.581080 uCode Version = 0.0.0.ca
643 15:53:49.583947 TXT ACM version = ff.ff.ff.ffff
644 15:53:49.587492 Display FSP Version Info HOB
645 15:53:49.590385 Reference Code - ME = 9.0.1e.30
646 15:53:49.593813 MEBx version = 0.0.0.0
647 15:53:49.597257 ME Firmware Version = Consumer SKU
648 15:53:49.600186 Display FSP Version Info HOB
649 15:53:49.603553 Reference Code - CML PCH = 9.0.1e.30
650 15:53:49.606835 PCH-CRID Status = Disabled
651 15:53:49.610369 PCH-CRID Original Value = ff.ff.ff.ffff
652 15:53:49.613449 PCH-CRID New Value = ff.ff.ff.ffff
653 15:53:49.616304 OPROM - RST - RAID = ff.ff.ff.ffff
654 15:53:49.619786 ChipsetInit Base Version = ff.ff.ff.ffff
655 15:53:49.626198 ChipsetInit Oem Version = ff.ff.ff.ffff
656 15:53:49.629473 Display FSP Version Info HOB
657 15:53:49.633391 Reference Code - SA - System Agent = 9.0.1e.30
658 15:53:49.636126 Reference Code - MRC = 0.7.1.6c
659 15:53:49.639413 SA - PCIe Version = 9.0.1e.30
660 15:53:49.642838 SA-CRID Status = Disabled
661 15:53:49.646013 SA-CRID Original Value = 0.0.0.c
662 15:53:49.649017 SA-CRID New Value = 0.0.0.c
663 15:53:49.649105 OPROM - VBIOS = ff.ff.ff.ffff
664 15:53:49.653242 RTC Init
665 15:53:49.656430 Set power on after power failure.
666 15:53:49.656517 Disabling Deep S3
667 15:53:49.659508 Disabling Deep S3
668 15:53:49.663137 Disabling Deep S4
669 15:53:49.663224 Disabling Deep S4
670 15:53:49.666304 Disabling Deep S5
671 15:53:49.666391 Disabling Deep S5
672 15:53:49.673320 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
673 15:53:49.675965 Enumerating buses...
674 15:53:49.679117 Show all devs... Before device enumeration.
675 15:53:49.682745 Root Device: enabled 1
676 15:53:49.685736 CPU_CLUSTER: 0: enabled 1
677 15:53:49.685823 DOMAIN: 0000: enabled 1
678 15:53:49.689183 APIC: 00: enabled 1
679 15:53:49.692488 PCI: 00:00.0: enabled 1
680 15:53:49.695365 PCI: 00:02.0: enabled 1
681 15:53:49.695452 PCI: 00:04.0: enabled 0
682 15:53:49.698538 PCI: 00:05.0: enabled 0
683 15:53:49.701897 PCI: 00:12.0: enabled 1
684 15:53:49.705695 PCI: 00:12.5: enabled 0
685 15:53:49.705783 PCI: 00:12.6: enabled 0
686 15:53:49.708714 PCI: 00:14.0: enabled 1
687 15:53:49.711752 PCI: 00:14.1: enabled 0
688 15:53:49.711839 PCI: 00:14.3: enabled 1
689 15:53:49.715107 PCI: 00:14.5: enabled 0
690 15:53:49.718896 PCI: 00:15.0: enabled 1
691 15:53:49.721963 PCI: 00:15.1: enabled 1
692 15:53:49.722051 PCI: 00:15.2: enabled 0
693 15:53:49.725198 PCI: 00:15.3: enabled 0
694 15:53:49.728254 PCI: 00:16.0: enabled 1
695 15:53:49.731686 PCI: 00:16.1: enabled 0
696 15:53:49.731774 PCI: 00:16.2: enabled 0
697 15:53:49.734745 PCI: 00:16.3: enabled 0
698 15:53:49.737819 PCI: 00:16.4: enabled 0
699 15:53:49.741259 PCI: 00:16.5: enabled 0
700 15:53:49.741348 PCI: 00:17.0: enabled 1
701 15:53:49.744905 PCI: 00:19.0: enabled 1
702 15:53:49.747783 PCI: 00:19.1: enabled 0
703 15:53:49.751012 PCI: 00:19.2: enabled 0
704 15:53:49.751101 PCI: 00:1a.0: enabled 0
705 15:53:49.754448 PCI: 00:1c.0: enabled 0
706 15:53:49.757330 PCI: 00:1c.1: enabled 0
707 15:53:49.760771 PCI: 00:1c.2: enabled 0
708 15:53:49.760859 PCI: 00:1c.3: enabled 0
709 15:53:49.764154 PCI: 00:1c.4: enabled 0
710 15:53:49.767269 PCI: 00:1c.5: enabled 0
711 15:53:49.770802 PCI: 00:1c.6: enabled 0
712 15:53:49.770890 PCI: 00:1c.7: enabled 0
713 15:53:49.774212 PCI: 00:1d.0: enabled 1
714 15:53:49.776938 PCI: 00:1d.1: enabled 0
715 15:53:49.780314 PCI: 00:1d.2: enabled 0
716 15:53:49.780402 PCI: 00:1d.3: enabled 0
717 15:53:49.783631 PCI: 00:1d.4: enabled 0
718 15:53:49.786894 PCI: 00:1d.5: enabled 1
719 15:53:49.790306 PCI: 00:1e.0: enabled 1
720 15:53:49.790394 PCI: 00:1e.1: enabled 0
721 15:53:49.793383 PCI: 00:1e.2: enabled 1
722 15:53:49.796907 PCI: 00:1e.3: enabled 1
723 15:53:49.799929 PCI: 00:1f.0: enabled 1
724 15:53:49.800017 PCI: 00:1f.1: enabled 1
725 15:53:49.803013 PCI: 00:1f.2: enabled 1
726 15:53:49.806474 PCI: 00:1f.3: enabled 1
727 15:53:49.809538 PCI: 00:1f.4: enabled 1
728 15:53:49.809625 PCI: 00:1f.5: enabled 1
729 15:53:49.813442 PCI: 00:1f.6: enabled 0
730 15:53:49.816107 USB0 port 0: enabled 1
731 15:53:49.816195 I2C: 00:15: enabled 1
732 15:53:49.819505 I2C: 00:5d: enabled 1
733 15:53:49.822427 GENERIC: 0.0: enabled 1
734 15:53:49.825913 I2C: 00:1a: enabled 1
735 15:53:49.826001 I2C: 00:38: enabled 1
736 15:53:49.828955 I2C: 00:39: enabled 1
737 15:53:49.832253 I2C: 00:3a: enabled 1
738 15:53:49.832341 I2C: 00:3b: enabled 1
739 15:53:49.835899 PCI: 00:00.0: enabled 1
740 15:53:49.839130 SPI: 00: enabled 1
741 15:53:49.839217 SPI: 01: enabled 1
742 15:53:49.842336 PNP: 0c09.0: enabled 1
743 15:53:49.845466 USB2 port 0: enabled 1
744 15:53:49.845554 USB2 port 1: enabled 1
745 15:53:49.848778 USB2 port 2: enabled 0
746 15:53:49.852322 USB2 port 3: enabled 0
747 15:53:49.855293 USB2 port 5: enabled 0
748 15:53:49.855382 USB2 port 6: enabled 1
749 15:53:49.858332 USB2 port 9: enabled 1
750 15:53:49.862023 USB3 port 0: enabled 1
751 15:53:49.862111 USB3 port 1: enabled 1
752 15:53:49.864893 USB3 port 2: enabled 1
753 15:53:49.868776 USB3 port 3: enabled 1
754 15:53:49.871664 USB3 port 4: enabled 0
755 15:53:49.871753 APIC: 02: enabled 1
756 15:53:49.874637 APIC: 01: enabled 1
757 15:53:49.874726 APIC: 07: enabled 1
758 15:53:49.878212 APIC: 06: enabled 1
759 15:53:49.881265 APIC: 05: enabled 1
760 15:53:49.881352 APIC: 03: enabled 1
761 15:53:49.884819 APIC: 04: enabled 1
762 15:53:49.887772 Compare with tree...
763 15:53:49.887860 Root Device: enabled 1
764 15:53:49.891652 CPU_CLUSTER: 0: enabled 1
765 15:53:49.894521 APIC: 00: enabled 1
766 15:53:49.897869 APIC: 02: enabled 1
767 15:53:49.897956 APIC: 01: enabled 1
768 15:53:49.900863 APIC: 07: enabled 1
769 15:53:49.904509 APIC: 06: enabled 1
770 15:53:49.904597 APIC: 05: enabled 1
771 15:53:49.907292 APIC: 03: enabled 1
772 15:53:49.910578 APIC: 04: enabled 1
773 15:53:49.910669 DOMAIN: 0000: enabled 1
774 15:53:49.914286 PCI: 00:00.0: enabled 1
775 15:53:49.916997 PCI: 00:02.0: enabled 1
776 15:53:49.920629 PCI: 00:04.0: enabled 0
777 15:53:49.924193 PCI: 00:05.0: enabled 0
778 15:53:49.924281 PCI: 00:12.0: enabled 1
779 15:53:49.927168 PCI: 00:12.5: enabled 0
780 15:53:49.930329 PCI: 00:12.6: enabled 0
781 15:53:49.933915 PCI: 00:14.0: enabled 1
782 15:53:49.937064 USB0 port 0: enabled 1
783 15:53:49.939952 USB2 port 0: enabled 1
784 15:53:49.940040 USB2 port 1: enabled 1
785 15:53:49.943669 USB2 port 2: enabled 0
786 15:53:49.947199 USB2 port 3: enabled 0
787 15:53:49.949850 USB2 port 5: enabled 0
788 15:53:49.953255 USB2 port 6: enabled 1
789 15:53:49.956410 USB2 port 9: enabled 1
790 15:53:49.956498 USB3 port 0: enabled 1
791 15:53:49.960070 USB3 port 1: enabled 1
792 15:53:49.963067 USB3 port 2: enabled 1
793 15:53:49.966286 USB3 port 3: enabled 1
794 15:53:49.969356 USB3 port 4: enabled 0
795 15:53:49.973021 PCI: 00:14.1: enabled 0
796 15:53:49.973108 PCI: 00:14.3: enabled 1
797 15:53:49.975924 PCI: 00:14.5: enabled 0
798 15:53:49.979723 PCI: 00:15.0: enabled 1
799 15:53:49.982526 I2C: 00:15: enabled 1
800 15:53:49.986023 PCI: 00:15.1: enabled 1
801 15:53:49.986111 I2C: 00:5d: enabled 1
802 15:53:49.988920 GENERIC: 0.0: enabled 1
803 15:53:49.992541 PCI: 00:15.2: enabled 0
804 15:53:49.995531 PCI: 00:15.3: enabled 0
805 15:53:49.999034 PCI: 00:16.0: enabled 1
806 15:53:49.999122 PCI: 00:16.1: enabled 0
807 15:53:50.002397 PCI: 00:16.2: enabled 0
808 15:53:50.005376 PCI: 00:16.3: enabled 0
809 15:53:50.008447 PCI: 00:16.4: enabled 0
810 15:53:50.011698 PCI: 00:16.5: enabled 0
811 15:53:50.011786 PCI: 00:17.0: enabled 1
812 15:53:50.015117 PCI: 00:19.0: enabled 1
813 15:53:50.018598 I2C: 00:1a: enabled 1
814 15:53:50.022239 I2C: 00:38: enabled 1
815 15:53:50.024739 I2C: 00:39: enabled 1
816 15:53:50.024826 I2C: 00:3a: enabled 1
817 15:53:50.028520 I2C: 00:3b: enabled 1
818 15:53:50.031419 PCI: 00:19.1: enabled 0
819 15:53:50.035171 PCI: 00:19.2: enabled 0
820 15:53:50.035259 PCI: 00:1a.0: enabled 0
821 15:53:50.038414 PCI: 00:1c.0: enabled 0
822 15:53:50.041538 PCI: 00:1c.1: enabled 0
823 15:53:50.044898 PCI: 00:1c.2: enabled 0
824 15:53:50.047851 PCI: 00:1c.3: enabled 0
825 15:53:50.047939 PCI: 00:1c.4: enabled 0
826 15:53:50.051173 PCI: 00:1c.5: enabled 0
827 15:53:50.054227 PCI: 00:1c.6: enabled 0
828 15:53:50.058006 PCI: 00:1c.7: enabled 0
829 15:53:50.060896 PCI: 00:1d.0: enabled 1
830 15:53:50.060984 PCI: 00:1d.1: enabled 0
831 15:53:50.064168 PCI: 00:1d.2: enabled 0
832 15:53:50.067511 PCI: 00:1d.3: enabled 0
833 15:53:50.070942 PCI: 00:1d.4: enabled 0
834 15:53:50.074425 PCI: 00:1d.5: enabled 1
835 15:53:50.077098 PCI: 00:00.0: enabled 1
836 15:53:50.077186 PCI: 00:1e.0: enabled 1
837 15:53:50.080394 PCI: 00:1e.1: enabled 0
838 15:53:50.083767 PCI: 00:1e.2: enabled 1
839 15:53:50.087267 SPI: 00: enabled 1
840 15:53:50.087355 PCI: 00:1e.3: enabled 1
841 15:53:50.090506 SPI: 01: enabled 1
842 15:53:50.093453 PCI: 00:1f.0: enabled 1
843 15:53:50.096951 PNP: 0c09.0: enabled 1
844 15:53:50.099866 PCI: 00:1f.1: enabled 1
845 15:53:50.099954 PCI: 00:1f.2: enabled 1
846 15:53:50.104042 PCI: 00:1f.3: enabled 1
847 15:53:50.106882 PCI: 00:1f.4: enabled 1
848 15:53:50.109917 PCI: 00:1f.5: enabled 1
849 15:53:50.113043 PCI: 00:1f.6: enabled 0
850 15:53:50.113131 Root Device scanning...
851 15:53:50.116710 scan_static_bus for Root Device
852 15:53:50.119965 CPU_CLUSTER: 0 enabled
853 15:53:50.123050 DOMAIN: 0000 enabled
854 15:53:50.126524 DOMAIN: 0000 scanning...
855 15:53:50.129473 PCI: pci_scan_bus for bus 00
856 15:53:50.129560 PCI: 00:00.0 [8086/0000] ops
857 15:53:50.132818 PCI: 00:00.0 [8086/9b61] enabled
858 15:53:50.138985 PCI: 00:02.0 [8086/0000] bus ops
859 15:53:50.142679 PCI: 00:02.0 [8086/9b41] enabled
860 15:53:50.145865 PCI: 00:04.0 [8086/1903] disabled
861 15:53:50.148768 PCI: 00:08.0 [8086/1911] enabled
862 15:53:50.152052 PCI: 00:12.0 [8086/02f9] enabled
863 15:53:50.155739 PCI: 00:14.0 [8086/0000] bus ops
864 15:53:50.158678 PCI: 00:14.0 [8086/02ed] enabled
865 15:53:50.162286 PCI: 00:14.2 [8086/02ef] enabled
866 15:53:50.165269 PCI: 00:14.3 [8086/02f0] enabled
867 15:53:50.168834 PCI: 00:15.0 [8086/0000] bus ops
868 15:53:50.171942 PCI: 00:15.0 [8086/02e8] enabled
869 15:53:50.175136 PCI: 00:15.1 [8086/0000] bus ops
870 15:53:50.178460 PCI: 00:15.1 [8086/02e9] enabled
871 15:53:50.181840 PCI: 00:16.0 [8086/0000] ops
872 15:53:50.184818 PCI: 00:16.0 [8086/02e0] enabled
873 15:53:50.188372 PCI: 00:17.0 [8086/0000] ops
874 15:53:50.191521 PCI: 00:17.0 [8086/02d3] enabled
875 15:53:50.194980 PCI: 00:19.0 [8086/0000] bus ops
876 15:53:50.198023 PCI: 00:19.0 [8086/02c5] enabled
877 15:53:50.201430 PCI: 00:1d.0 [8086/0000] bus ops
878 15:53:50.204644 PCI: 00:1d.0 [8086/02b0] enabled
879 15:53:50.207524 PCI: Static device PCI: 00:1d.5 not found, disabling it.
880 15:53:50.210728 PCI: 00:1e.0 [8086/0000] ops
881 15:53:50.214278 PCI: 00:1e.0 [8086/02a8] enabled
882 15:53:50.217881 PCI: 00:1e.2 [8086/0000] bus ops
883 15:53:50.220860 PCI: 00:1e.2 [8086/02aa] enabled
884 15:53:50.224070 PCI: 00:1e.3 [8086/0000] bus ops
885 15:53:50.227225 PCI: 00:1e.3 [8086/02ab] enabled
886 15:53:50.230575 PCI: 00:1f.0 [8086/0000] bus ops
887 15:53:50.233841 PCI: 00:1f.0 [8086/0284] enabled
888 15:53:50.240474 PCI: Static device PCI: 00:1f.1 not found, disabling it.
889 15:53:50.246651 PCI: Static device PCI: 00:1f.2 not found, disabling it.
890 15:53:50.250286 PCI: 00:1f.3 [8086/0000] bus ops
891 15:53:50.253379 PCI: 00:1f.3 [8086/02c8] enabled
892 15:53:50.257070 PCI: 00:1f.4 [8086/0000] bus ops
893 15:53:50.259960 PCI: 00:1f.4 [8086/02a3] enabled
894 15:53:50.263409 PCI: 00:1f.5 [8086/0000] bus ops
895 15:53:50.266509 PCI: 00:1f.5 [8086/02a4] enabled
896 15:53:50.269717 PCI: Leftover static devices:
897 15:53:50.269807 PCI: 00:05.0
898 15:53:50.272792 PCI: 00:12.5
899 15:53:50.272882 PCI: 00:12.6
900 15:53:50.276784 PCI: 00:14.1
901 15:53:50.276874 PCI: 00:14.5
902 15:53:50.276961 PCI: 00:15.2
903 15:53:50.279573 PCI: 00:15.3
904 15:53:50.279662 PCI: 00:16.1
905 15:53:50.283175 PCI: 00:16.2
906 15:53:50.283265 PCI: 00:16.3
907 15:53:50.285938 PCI: 00:16.4
908 15:53:50.286028 PCI: 00:16.5
909 15:53:50.286115 PCI: 00:19.1
910 15:53:50.289300 PCI: 00:19.2
911 15:53:50.289390 PCI: 00:1a.0
912 15:53:50.292650 PCI: 00:1c.0
913 15:53:50.292739 PCI: 00:1c.1
914 15:53:50.292826 PCI: 00:1c.2
915 15:53:50.295839 PCI: 00:1c.3
916 15:53:50.295929 PCI: 00:1c.4
917 15:53:50.299476 PCI: 00:1c.5
918 15:53:50.299566 PCI: 00:1c.6
919 15:53:50.302508 PCI: 00:1c.7
920 15:53:50.302603 PCI: 00:1d.1
921 15:53:50.302691 PCI: 00:1d.2
922 15:53:50.305423 PCI: 00:1d.3
923 15:53:50.305513 PCI: 00:1d.4
924 15:53:50.309040 PCI: 00:1d.5
925 15:53:50.309130 PCI: 00:1e.1
926 15:53:50.309218 PCI: 00:1f.1
927 15:53:50.312614 PCI: 00:1f.2
928 15:53:50.312704 PCI: 00:1f.6
929 15:53:50.315812 PCI: Check your devicetree.cb.
930 15:53:50.318784 PCI: 00:02.0 scanning...
931 15:53:50.321984 scan_generic_bus for PCI: 00:02.0
932 15:53:50.325140 scan_generic_bus for PCI: 00:02.0 done
933 15:53:50.331854 scan_bus: scanning of bus PCI: 00:02.0 took 10198 usecs
934 15:53:50.334914 PCI: 00:14.0 scanning...
935 15:53:50.338296 scan_static_bus for PCI: 00:14.0
936 15:53:50.341339 USB0 port 0 enabled
937 15:53:50.341429 USB0 port 0 scanning...
938 15:53:50.344691 scan_static_bus for USB0 port 0
939 15:53:50.348056 USB2 port 0 enabled
940 15:53:50.351619 USB2 port 1 enabled
941 15:53:50.351709 USB2 port 2 disabled
942 15:53:50.354542 USB2 port 3 disabled
943 15:53:50.357586 USB2 port 5 disabled
944 15:53:50.357676 USB2 port 6 enabled
945 15:53:50.361167 USB2 port 9 enabled
946 15:53:50.364124 USB3 port 0 enabled
947 15:53:50.364214 USB3 port 1 enabled
948 15:53:50.367372 USB3 port 2 enabled
949 15:53:50.367462 USB3 port 3 enabled
950 15:53:50.370660 USB3 port 4 disabled
951 15:53:50.373903 USB2 port 0 scanning...
952 15:53:50.377447 scan_static_bus for USB2 port 0
953 15:53:50.380764 scan_static_bus for USB2 port 0 done
954 15:53:50.387072 scan_bus: scanning of bus USB2 port 0 took 9709 usecs
955 15:53:50.387162 USB2 port 1 scanning...
956 15:53:50.390269 scan_static_bus for USB2 port 1
957 15:53:50.397091 scan_static_bus for USB2 port 1 done
958 15:53:50.400387 scan_bus: scanning of bus USB2 port 1 took 9691 usecs
959 15:53:50.403688 USB2 port 6 scanning...
960 15:53:50.406879 scan_static_bus for USB2 port 6
961 15:53:50.409857 scan_static_bus for USB2 port 6 done
962 15:53:50.416509 scan_bus: scanning of bus USB2 port 6 took 9710 usecs
963 15:53:50.419863 USB2 port 9 scanning...
964 15:53:50.423227 scan_static_bus for USB2 port 9
965 15:53:50.426318 scan_static_bus for USB2 port 9 done
966 15:53:50.429768 scan_bus: scanning of bus USB2 port 9 took 9700 usecs
967 15:53:50.433206 USB3 port 0 scanning...
968 15:53:50.436789 scan_static_bus for USB3 port 0
969 15:53:50.439217 scan_static_bus for USB3 port 0 done
970 15:53:50.445951 scan_bus: scanning of bus USB3 port 0 took 9710 usecs
971 15:53:50.449408 USB3 port 1 scanning...
972 15:53:50.452619 scan_static_bus for USB3 port 1
973 15:53:50.455748 scan_static_bus for USB3 port 1 done
974 15:53:50.462035 scan_bus: scanning of bus USB3 port 1 took 9695 usecs
975 15:53:50.462124 USB3 port 2 scanning...
976 15:53:50.465652 scan_static_bus for USB3 port 2
977 15:53:50.472226 scan_static_bus for USB3 port 2 done
978 15:53:50.475463 scan_bus: scanning of bus USB3 port 2 took 9707 usecs
979 15:53:50.478646 USB3 port 3 scanning...
980 15:53:50.482167 scan_static_bus for USB3 port 3
981 15:53:50.485386 scan_static_bus for USB3 port 3 done
982 15:53:50.491677 scan_bus: scanning of bus USB3 port 3 took 9711 usecs
983 15:53:50.495211 scan_static_bus for USB0 port 0 done
984 15:53:50.502060 scan_bus: scanning of bus USB0 port 0 took 155390 usecs
985 15:53:50.504789 scan_static_bus for PCI: 00:14.0 done
986 15:53:50.508125 scan_bus: scanning of bus PCI: 00:14.0 took 173011 usecs
987 15:53:50.511349 PCI: 00:15.0 scanning...
988 15:53:50.514947 scan_generic_bus for PCI: 00:15.0
989 15:53:50.521530 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
990 15:53:50.524630 scan_generic_bus for PCI: 00:15.0 done
991 15:53:50.531047 scan_bus: scanning of bus PCI: 00:15.0 took 14308 usecs
992 15:53:50.531136 PCI: 00:15.1 scanning...
993 15:53:50.534468 scan_generic_bus for PCI: 00:15.1
994 15:53:50.541019 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
995 15:53:50.544333 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
996 15:53:50.547863 scan_generic_bus for PCI: 00:15.1 done
997 15:53:50.554111 scan_bus: scanning of bus PCI: 00:15.1 took 18661 usecs
998 15:53:50.557409 PCI: 00:19.0 scanning...
999 15:53:50.560547 scan_generic_bus for PCI: 00:19.0
1000 15:53:50.564431 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1001 15:53:50.566841 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1002 15:53:50.573679 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1003 15:53:50.576823 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1004 15:53:50.580263 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1005 15:53:50.583759 scan_generic_bus for PCI: 00:19.0 done
1006 15:53:50.590042 scan_bus: scanning of bus PCI: 00:19.0 took 30762 usecs
1007 15:53:50.593241 PCI: 00:1d.0 scanning...
1008 15:53:50.596772 do_pci_scan_bridge for PCI: 00:1d.0
1009 15:53:50.599929 PCI: pci_scan_bus for bus 01
1010 15:53:50.603294 PCI: 01:00.0 [1c5c/1327] enabled
1011 15:53:50.606321 Enabling Common Clock Configuration
1012 15:53:50.609720 L1 Sub-State supported from root port 29
1013 15:53:50.613021 L1 Sub-State Support = 0xf
1014 15:53:50.616539 CommonModeRestoreTime = 0x28
1015 15:53:50.619224 Power On Value = 0x16, Power On Scale = 0x0
1016 15:53:50.622923 ASPM: Enabled L1
1017 15:53:50.628913 scan_bus: scanning of bus PCI: 00:1d.0 took 32801 usecs
1018 15:53:50.629008 PCI: 00:1e.2 scanning...
1019 15:53:50.635713 scan_generic_bus for PCI: 00:1e.2
1020 15:53:50.638817 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1021 15:53:50.642110 scan_generic_bus for PCI: 00:1e.2 done
1022 15:53:50.648795 scan_bus: scanning of bus PCI: 00:1e.2 took 14015 usecs
1023 15:53:50.648887 PCI: 00:1e.3 scanning...
1024 15:53:50.655251 scan_generic_bus for PCI: 00:1e.3
1025 15:53:50.658344 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1026 15:53:50.661803 scan_generic_bus for PCI: 00:1e.3 done
1027 15:53:50.668367 scan_bus: scanning of bus PCI: 00:1e.3 took 14009 usecs
1028 15:53:50.668458 PCI: 00:1f.0 scanning...
1029 15:53:50.671422 scan_static_bus for PCI: 00:1f.0
1030 15:53:50.675209 PNP: 0c09.0 enabled
1031 15:53:50.677974 scan_static_bus for PCI: 00:1f.0 done
1032 15:53:50.684646 scan_bus: scanning of bus PCI: 00:1f.0 took 12058 usecs
1033 15:53:50.687734 PCI: 00:1f.3 scanning...
1034 15:53:50.694258 scan_bus: scanning of bus PCI: 00:1f.3 took 2852 usecs
1035 15:53:50.694349 PCI: 00:1f.4 scanning...
1036 15:53:50.697632 scan_generic_bus for PCI: 00:1f.4
1037 15:53:50.704027 scan_generic_bus for PCI: 00:1f.4 done
1038 15:53:50.707497 scan_bus: scanning of bus PCI: 00:1f.4 took 10188 usecs
1039 15:53:50.710748 PCI: 00:1f.5 scanning...
1040 15:53:50.713952 scan_generic_bus for PCI: 00:1f.5
1041 15:53:50.717623 scan_generic_bus for PCI: 00:1f.5 done
1042 15:53:50.724380 scan_bus: scanning of bus PCI: 00:1f.5 took 10197 usecs
1043 15:53:50.730886 scan_bus: scanning of bus DOMAIN: 0000 took 605137 usecs
1044 15:53:50.733397 scan_static_bus for Root Device done
1045 15:53:50.739937 scan_bus: scanning of bus Root Device took 625014 usecs
1046 15:53:50.740027 done
1047 15:53:50.743216 Chrome EC: UHEPI supported
1048 15:53:50.749673 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1049 15:53:50.756493 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1050 15:53:50.759709 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1051 15:53:50.767132 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1052 15:53:50.770477 SPI flash protection: WPSW=0 SRP0=0
1053 15:53:50.777177 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1054 15:53:50.780355 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1055 15:53:50.783937 found VGA at PCI: 00:02.0
1056 15:53:50.787211 Setting up VGA for PCI: 00:02.0
1057 15:53:50.793336 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1058 15:53:50.797001 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1059 15:53:50.799883 Allocating resources...
1060 15:53:50.803762 Reading resources...
1061 15:53:50.806660 Root Device read_resources bus 0 link: 0
1062 15:53:50.809503 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1063 15:53:50.816262 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1064 15:53:50.819591 DOMAIN: 0000 read_resources bus 0 link: 0
1065 15:53:50.827650 PCI: 00:14.0 read_resources bus 0 link: 0
1066 15:53:50.830900 USB0 port 0 read_resources bus 0 link: 0
1067 15:53:50.839021 USB0 port 0 read_resources bus 0 link: 0 done
1068 15:53:50.842238 PCI: 00:14.0 read_resources bus 0 link: 0 done
1069 15:53:50.849726 PCI: 00:15.0 read_resources bus 1 link: 0
1070 15:53:50.852531 PCI: 00:15.0 read_resources bus 1 link: 0 done
1071 15:53:50.859938 PCI: 00:15.1 read_resources bus 2 link: 0
1072 15:53:50.862842 PCI: 00:15.1 read_resources bus 2 link: 0 done
1073 15:53:50.870383 PCI: 00:19.0 read_resources bus 3 link: 0
1074 15:53:50.876678 PCI: 00:19.0 read_resources bus 3 link: 0 done
1075 15:53:50.880244 PCI: 00:1d.0 read_resources bus 1 link: 0
1076 15:53:50.886962 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1077 15:53:50.889752 PCI: 00:1e.2 read_resources bus 4 link: 0
1078 15:53:50.896387 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1079 15:53:50.899502 PCI: 00:1e.3 read_resources bus 5 link: 0
1080 15:53:50.906462 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1081 15:53:50.909586 PCI: 00:1f.0 read_resources bus 0 link: 0
1082 15:53:50.916658 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1083 15:53:50.922670 DOMAIN: 0000 read_resources bus 0 link: 0 done
1084 15:53:50.926012 Root Device read_resources bus 0 link: 0 done
1085 15:53:50.929372 Done reading resources.
1086 15:53:50.936077 Show resources in subtree (Root Device)...After reading.
1087 15:53:50.939263 Root Device child on link 0 CPU_CLUSTER: 0
1088 15:53:50.942310 CPU_CLUSTER: 0 child on link 0 APIC: 00
1089 15:53:50.946002 APIC: 00
1090 15:53:50.946090 APIC: 02
1091 15:53:50.948602 APIC: 01
1092 15:53:50.948696 APIC: 07
1093 15:53:50.948766 APIC: 06
1094 15:53:50.951823 APIC: 05
1095 15:53:50.951911 APIC: 03
1096 15:53:50.955440 APIC: 04
1097 15:53:50.958711 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1098 15:53:51.008277 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1099 15:53:51.008565 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1100 15:53:51.008654 PCI: 00:00.0
1101 15:53:51.008908 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1102 15:53:51.009166 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1103 15:53:51.010357 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1104 15:53:51.058582 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1105 15:53:51.058688 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1106 15:53:51.059925 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1107 15:53:51.060328 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1108 15:53:51.060846 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1109 15:53:51.087344 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1110 15:53:51.087459 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1111 15:53:51.088243 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1112 15:53:51.094391 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1113 15:53:51.100814 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1114 15:53:51.110462 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1115 15:53:51.120305 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1116 15:53:51.130328 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1117 15:53:51.130439 PCI: 00:02.0
1118 15:53:51.140057 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1119 15:53:51.150028 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1120 15:53:51.159490 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1121 15:53:51.159579 PCI: 00:04.0
1122 15:53:51.162816 PCI: 00:08.0
1123 15:53:51.172522 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1124 15:53:51.175921 PCI: 00:12.0
1125 15:53:51.185625 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 15:53:51.188791 PCI: 00:14.0 child on link 0 USB0 port 0
1127 15:53:51.198743 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1128 15:53:51.201566 USB0 port 0 child on link 0 USB2 port 0
1129 15:53:51.204891 USB2 port 0
1130 15:53:51.204979 USB2 port 1
1131 15:53:51.207985 USB2 port 2
1132 15:53:51.211387 USB2 port 3
1133 15:53:51.211475 USB2 port 5
1134 15:53:51.214884 USB2 port 6
1135 15:53:51.214972 USB2 port 9
1136 15:53:51.218092 USB3 port 0
1137 15:53:51.218181 USB3 port 1
1138 15:53:51.221677 USB3 port 2
1139 15:53:51.221765 USB3 port 3
1140 15:53:51.224412 USB3 port 4
1141 15:53:51.224500 PCI: 00:14.2
1142 15:53:51.234224 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1143 15:53:51.243994 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1144 15:53:51.247380 PCI: 00:14.3
1145 15:53:51.257472 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 15:53:51.260538 PCI: 00:15.0 child on link 0 I2C: 01:15
1147 15:53:51.270142 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 15:53:51.273803 I2C: 01:15
1149 15:53:51.276651 PCI: 00:15.1 child on link 0 I2C: 02:5d
1150 15:53:51.286678 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 15:53:51.289768 I2C: 02:5d
1152 15:53:51.289856 GENERIC: 0.0
1153 15:53:51.292986 PCI: 00:16.0
1154 15:53:51.302950 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 15:53:51.303040 PCI: 00:17.0
1156 15:53:51.313111 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1157 15:53:51.322673 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1158 15:53:51.328938 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1159 15:53:51.338973 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1160 15:53:51.345338 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1161 15:53:51.354830 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1162 15:53:51.358225 PCI: 00:19.0 child on link 0 I2C: 03:1a
1163 15:53:51.368171 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 15:53:51.371329 I2C: 03:1a
1165 15:53:51.371417 I2C: 03:38
1166 15:53:51.374528 I2C: 03:39
1167 15:53:51.374633 I2C: 03:3a
1168 15:53:51.378102 I2C: 03:3b
1169 15:53:51.381183 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1170 15:53:51.391429 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1171 15:53:51.401029 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1172 15:53:51.410538 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1173 15:53:51.410641 PCI: 01:00.0
1174 15:53:51.420187 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 15:53:51.423474 PCI: 00:1e.0
1176 15:53:51.433390 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1177 15:53:51.443412 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 15:53:51.450349 PCI: 00:1e.2 child on link 0 SPI: 00
1179 15:53:51.459456 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 15:53:51.459545 SPI: 00
1181 15:53:51.462377 PCI: 00:1e.3 child on link 0 SPI: 01
1182 15:53:51.472489 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 15:53:51.475426 SPI: 01
1184 15:53:51.478782 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1185 15:53:51.488884 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1186 15:53:51.495134 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1187 15:53:51.499035 PNP: 0c09.0
1188 15:53:51.508489 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1189 15:53:51.508578 PCI: 00:1f.3
1190 15:53:51.518063 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 15:53:51.527720 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1192 15:53:51.531289 PCI: 00:1f.4
1193 15:53:51.541172 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1194 15:53:51.547228 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1195 15:53:51.550643 PCI: 00:1f.5
1196 15:53:51.560323 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1197 15:53:51.567281 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1198 15:53:51.573873 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1199 15:53:51.579922 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1200 15:53:51.583591 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1201 15:53:51.587032 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1202 15:53:51.589935 PCI: 00:17.0 18 * [0x60 - 0x67] io
1203 15:53:51.593187 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1204 15:53:51.599769 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1205 15:53:51.606102 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1206 15:53:51.615746 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1207 15:53:51.622701 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1208 15:53:51.628976 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1209 15:53:51.635779 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1210 15:53:51.641971 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1211 15:53:51.645040 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1212 15:53:51.651833 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1213 15:53:51.655334 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1214 15:53:51.661645 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1215 15:53:51.665024 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1216 15:53:51.671618 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1217 15:53:51.674648 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1218 15:53:51.681097 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1219 15:53:51.684162 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1220 15:53:51.691367 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1221 15:53:51.694246 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1222 15:53:51.700640 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1223 15:53:51.703981 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1224 15:53:51.710359 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1225 15:53:51.713606 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1226 15:53:51.720460 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1227 15:53:51.723667 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1228 15:53:51.730003 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1229 15:53:51.733150 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1230 15:53:51.740094 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1231 15:53:51.743023 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1232 15:53:51.749368 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1233 15:53:51.752900 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1234 15:53:51.762748 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1235 15:53:51.766244 avoid_fixed_resources: DOMAIN: 0000
1236 15:53:51.773141 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1237 15:53:51.779092 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1238 15:53:51.785887 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1239 15:53:51.792255 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1240 15:53:51.802074 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1241 15:53:51.808493 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1242 15:53:51.815082 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1243 15:53:51.824837 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1244 15:53:51.831456 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1245 15:53:51.837616 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1246 15:53:51.847478 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1247 15:53:51.853970 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1248 15:53:51.854062 Setting resources...
1249 15:53:51.860699 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1250 15:53:51.867310 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1251 15:53:51.870815 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1252 15:53:51.873810 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1253 15:53:51.877337 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1254 15:53:51.883696 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1255 15:53:51.890173 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1256 15:53:51.896849 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1257 15:53:51.903029 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1258 15:53:51.909632 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1259 15:53:51.912954 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1260 15:53:51.919532 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1261 15:53:51.922476 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1262 15:53:51.929043 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1263 15:53:51.932276 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1264 15:53:51.939176 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1265 15:53:51.942336 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1266 15:53:51.948943 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1267 15:53:51.951796 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1268 15:53:51.958781 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1269 15:53:51.961771 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1270 15:53:51.968764 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1271 15:53:51.971271 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1272 15:53:51.977820 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1273 15:53:51.981467 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1274 15:53:51.987653 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1275 15:53:51.991562 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1276 15:53:51.997625 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1277 15:53:52.001004 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1278 15:53:52.007472 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1279 15:53:52.010458 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1280 15:53:52.017321 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1281 15:53:52.023571 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1282 15:53:52.030101 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1283 15:53:52.040277 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1284 15:53:52.046459 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1285 15:53:52.049439 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1286 15:53:52.059356 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1287 15:53:52.062482 Root Device assign_resources, bus 0 link: 0
1288 15:53:52.066055 DOMAIN: 0000 assign_resources, bus 0 link: 0
1289 15:53:52.076218 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1290 15:53:52.085846 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1291 15:53:52.093516 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1292 15:53:52.099517 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1293 15:53:52.108920 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1294 15:53:52.115388 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1295 15:53:52.121925 PCI: 00:14.0 assign_resources, bus 0 link: 0
1296 15:53:52.125049 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 15:53:52.135521 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1298 15:53:52.141631 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1299 15:53:52.151452 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1300 15:53:52.158011 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1301 15:53:52.164285 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 15:53:52.167548 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 15:53:52.177596 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1304 15:53:52.180659 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 15:53:52.187210 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 15:53:52.193763 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1307 15:53:52.203589 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1308 15:53:52.209973 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1309 15:53:52.216272 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1310 15:53:52.226414 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1311 15:53:52.233023 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1312 15:53:52.239363 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1313 15:53:52.249137 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1314 15:53:52.252428 PCI: 00:19.0 assign_resources, bus 3 link: 0
1315 15:53:52.259422 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 15:53:52.265628 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1317 15:53:52.275457 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1318 15:53:52.285445 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1319 15:53:52.288251 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1320 15:53:52.298036 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1321 15:53:52.301643 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1322 15:53:52.311360 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1323 15:53:52.317470 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1324 15:53:52.324470 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1325 15:53:52.327783 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 15:53:52.337367 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1327 15:53:52.340877 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1328 15:53:52.344129 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 15:53:52.350352 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1330 15:53:52.353771 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 15:53:52.360230 LPC: Trying to open IO window from 800 size 1ff
1332 15:53:52.366822 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1333 15:53:52.377035 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1334 15:53:52.383330 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1335 15:53:52.393127 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1336 15:53:52.396510 DOMAIN: 0000 assign_resources, bus 0 link: 0
1337 15:53:52.402736 Root Device assign_resources, bus 0 link: 0
1338 15:53:52.406137 Done setting resources.
1339 15:53:52.412535 Show resources in subtree (Root Device)...After assigning values.
1340 15:53:52.415887 Root Device child on link 0 CPU_CLUSTER: 0
1341 15:53:52.419195 CPU_CLUSTER: 0 child on link 0 APIC: 00
1342 15:53:52.422440 APIC: 00
1343 15:53:52.422553 APIC: 02
1344 15:53:52.422636 APIC: 01
1345 15:53:52.425444 APIC: 07
1346 15:53:52.425531 APIC: 06
1347 15:53:52.428872 APIC: 05
1348 15:53:52.428959 APIC: 03
1349 15:53:52.429027 APIC: 04
1350 15:53:52.435432 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1351 15:53:52.445042 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1352 15:53:52.454929 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1353 15:53:52.458202 PCI: 00:00.0
1354 15:53:52.467662 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1355 15:53:52.474800 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1356 15:53:52.484278 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1357 15:53:52.493808 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1358 15:53:52.503894 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1359 15:53:52.513594 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1360 15:53:52.523065 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1361 15:53:52.532919 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1362 15:53:52.539358 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1363 15:53:52.549551 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1364 15:53:52.559459 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1365 15:53:52.568952 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1366 15:53:52.578770 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1367 15:53:52.588651 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1368 15:53:52.598221 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1369 15:53:52.608123 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1370 15:53:52.608215 PCI: 00:02.0
1371 15:53:52.617741 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1372 15:53:52.630748 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1373 15:53:52.637558 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1374 15:53:52.640597 PCI: 00:04.0
1375 15:53:52.640685 PCI: 00:08.0
1376 15:53:52.653557 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1377 15:53:52.653647 PCI: 00:12.0
1378 15:53:52.663475 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1379 15:53:52.670048 PCI: 00:14.0 child on link 0 USB0 port 0
1380 15:53:52.679935 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1381 15:53:52.683051 USB0 port 0 child on link 0 USB2 port 0
1382 15:53:52.686301 USB2 port 0
1383 15:53:52.686389 USB2 port 1
1384 15:53:52.689750 USB2 port 2
1385 15:53:52.689837 USB2 port 3
1386 15:53:52.692549 USB2 port 5
1387 15:53:52.692637 USB2 port 6
1388 15:53:52.696120 USB2 port 9
1389 15:53:52.696207 USB3 port 0
1390 15:53:52.699307 USB3 port 1
1391 15:53:52.702737 USB3 port 2
1392 15:53:52.702825 USB3 port 3
1393 15:53:52.705796 USB3 port 4
1394 15:53:52.705883 PCI: 00:14.2
1395 15:53:52.715554 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1396 15:53:52.725289 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1397 15:53:52.728524 PCI: 00:14.3
1398 15:53:52.738890 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1399 15:53:52.741824 PCI: 00:15.0 child on link 0 I2C: 01:15
1400 15:53:52.754837 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1401 15:53:52.754929 I2C: 01:15
1402 15:53:52.758211 PCI: 00:15.1 child on link 0 I2C: 02:5d
1403 15:53:52.771095 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1404 15:53:52.771187 I2C: 02:5d
1405 15:53:52.774344 GENERIC: 0.0
1406 15:53:52.774431 PCI: 00:16.0
1407 15:53:52.784389 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1408 15:53:52.787250 PCI: 00:17.0
1409 15:53:52.797036 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1410 15:53:52.806639 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1411 15:53:52.816345 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1412 15:53:52.826472 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1413 15:53:52.832986 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1414 15:53:52.845705 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1415 15:53:52.849090 PCI: 00:19.0 child on link 0 I2C: 03:1a
1416 15:53:52.859225 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1417 15:53:52.859314 I2C: 03:1a
1418 15:53:52.862120 I2C: 03:38
1419 15:53:52.862207 I2C: 03:39
1420 15:53:52.866063 I2C: 03:3a
1421 15:53:52.866151 I2C: 03:3b
1422 15:53:52.871931 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1423 15:53:52.882002 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1424 15:53:52.891532 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1425 15:53:52.901220 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1426 15:53:52.901311 PCI: 01:00.0
1427 15:53:52.914932 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1428 15:53:52.915022 PCI: 00:1e.0
1429 15:53:52.927546 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1430 15:53:52.937194 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1431 15:53:52.940175 PCI: 00:1e.2 child on link 0 SPI: 00
1432 15:53:52.949892 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1433 15:53:52.949984 SPI: 00
1434 15:53:52.956983 PCI: 00:1e.3 child on link 0 SPI: 01
1435 15:53:52.966512 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1436 15:53:52.966659 SPI: 01
1437 15:53:52.973303 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1438 15:53:52.979146 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1439 15:53:52.989130 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1440 15:53:52.992341 PNP: 0c09.0
1441 15:53:52.998768 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1442 15:53:53.002550 PCI: 00:1f.3
1443 15:53:53.012100 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1444 15:53:53.022094 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1445 15:53:53.024858 PCI: 00:1f.4
1446 15:53:53.032017 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1447 15:53:53.041485 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1448 15:53:53.044867 PCI: 00:1f.5
1449 15:53:53.054500 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1450 15:53:53.057540 Done allocating resources.
1451 15:53:53.064533 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1452 15:53:53.064623 Enabling resources...
1453 15:53:53.071572 PCI: 00:00.0 subsystem <- 8086/9b61
1454 15:53:53.071662 PCI: 00:00.0 cmd <- 06
1455 15:53:53.078363 PCI: 00:02.0 subsystem <- 8086/9b41
1456 15:53:53.078453 PCI: 00:02.0 cmd <- 03
1457 15:53:53.081520 PCI: 00:08.0 cmd <- 06
1458 15:53:53.084593 PCI: 00:12.0 subsystem <- 8086/02f9
1459 15:53:53.087919 PCI: 00:12.0 cmd <- 02
1460 15:53:53.091841 PCI: 00:14.0 subsystem <- 8086/02ed
1461 15:53:53.094790 PCI: 00:14.0 cmd <- 02
1462 15:53:53.097725 PCI: 00:14.2 cmd <- 02
1463 15:53:53.101563 PCI: 00:14.3 subsystem <- 8086/02f0
1464 15:53:53.104389 PCI: 00:14.3 cmd <- 02
1465 15:53:53.107703 PCI: 00:15.0 subsystem <- 8086/02e8
1466 15:53:53.111030 PCI: 00:15.0 cmd <- 02
1467 15:53:53.114206 PCI: 00:15.1 subsystem <- 8086/02e9
1468 15:53:53.114293 PCI: 00:15.1 cmd <- 02
1469 15:53:53.120586 PCI: 00:16.0 subsystem <- 8086/02e0
1470 15:53:53.120673 PCI: 00:16.0 cmd <- 02
1471 15:53:53.126991 PCI: 00:17.0 subsystem <- 8086/02d3
1472 15:53:53.127078 PCI: 00:17.0 cmd <- 03
1473 15:53:53.130569 PCI: 00:19.0 subsystem <- 8086/02c5
1474 15:53:53.133524 PCI: 00:19.0 cmd <- 02
1475 15:53:53.136922 PCI: 00:1d.0 bridge ctrl <- 0013
1476 15:53:53.140362 PCI: 00:1d.0 subsystem <- 8086/02b0
1477 15:53:53.143508 PCI: 00:1d.0 cmd <- 06
1478 15:53:53.147054 PCI: 00:1e.0 subsystem <- 8086/02a8
1479 15:53:53.150032 PCI: 00:1e.0 cmd <- 06
1480 15:53:53.153368 PCI: 00:1e.2 subsystem <- 8086/02aa
1481 15:53:53.156435 PCI: 00:1e.2 cmd <- 06
1482 15:53:53.159906 PCI: 00:1e.3 subsystem <- 8086/02ab
1483 15:53:53.163022 PCI: 00:1e.3 cmd <- 02
1484 15:53:53.166485 PCI: 00:1f.0 subsystem <- 8086/0284
1485 15:53:53.169528 PCI: 00:1f.0 cmd <- 407
1486 15:53:53.172800 PCI: 00:1f.3 subsystem <- 8086/02c8
1487 15:53:53.176187 PCI: 00:1f.3 cmd <- 02
1488 15:53:53.179975 PCI: 00:1f.4 subsystem <- 8086/02a3
1489 15:53:53.183246 PCI: 00:1f.4 cmd <- 03
1490 15:53:53.185935 PCI: 00:1f.5 subsystem <- 8086/02a4
1491 15:53:53.188939 PCI: 00:1f.5 cmd <- 406
1492 15:53:53.196485 PCI: 01:00.0 cmd <- 02
1493 15:53:53.201914 done.
1494 15:53:53.214240 ME: Version: 14.0.39.1367
1495 15:53:53.220407 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1496 15:53:53.223873 Initializing devices...
1497 15:53:53.223962 Root Device init ...
1498 15:53:53.230492 Chrome EC: Set SMI mask to 0x0000000000000000
1499 15:53:53.237092 Chrome EC: clear events_b mask to 0x0000000000000000
1500 15:53:53.240097 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1501 15:53:53.247267 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1502 15:53:53.253220 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1503 15:53:53.256466 Chrome EC: Set WAKE mask to 0x0000000000000000
1504 15:53:53.262860 Root Device init finished in 35159 usecs
1505 15:53:53.266207 CPU_CLUSTER: 0 init ...
1506 15:53:53.269724 CPU_CLUSTER: 0 init finished in 2437 usecs
1507 15:53:53.274835 PCI: 00:00.0 init ...
1508 15:53:53.277870 CPU TDP: 15 Watts
1509 15:53:53.281604 CPU PL2 = 64 Watts
1510 15:53:53.284527 PCI: 00:00.0 init finished in 7078 usecs
1511 15:53:53.288073 PCI: 00:02.0 init ...
1512 15:53:53.290818 PCI: 00:02.0 init finished in 2245 usecs
1513 15:53:53.294207 PCI: 00:08.0 init ...
1514 15:53:53.297361 PCI: 00:08.0 init finished in 2252 usecs
1515 15:53:53.300993 PCI: 00:12.0 init ...
1516 15:53:53.303993 PCI: 00:12.0 init finished in 2251 usecs
1517 15:53:53.307221 PCI: 00:14.0 init ...
1518 15:53:53.310811 PCI: 00:14.0 init finished in 2242 usecs
1519 15:53:53.314463 PCI: 00:14.2 init ...
1520 15:53:53.317108 PCI: 00:14.2 init finished in 2252 usecs
1521 15:53:53.320299 PCI: 00:14.3 init ...
1522 15:53:53.323846 PCI: 00:14.3 init finished in 2268 usecs
1523 15:53:53.327183 PCI: 00:15.0 init ...
1524 15:53:53.330705 DW I2C bus 0 at 0xd121f000 (400 KHz)
1525 15:53:53.336803 PCI: 00:15.0 init finished in 5975 usecs
1526 15:53:53.336892 PCI: 00:15.1 init ...
1527 15:53:53.340136 DW I2C bus 1 at 0xd1220000 (400 KHz)
1528 15:53:53.346585 PCI: 00:15.1 init finished in 5976 usecs
1529 15:53:53.349960 PCI: 00:16.0 init ...
1530 15:53:53.353598 PCI: 00:16.0 init finished in 2252 usecs
1531 15:53:53.356658 PCI: 00:19.0 init ...
1532 15:53:53.359863 DW I2C bus 4 at 0xd1222000 (400 KHz)
1533 15:53:53.363015 PCI: 00:19.0 init finished in 5974 usecs
1534 15:53:53.366504 PCI: 00:1d.0 init ...
1535 15:53:53.369937 Initializing PCH PCIe bridge.
1536 15:53:53.372718 PCI: 00:1d.0 init finished in 5281 usecs
1537 15:53:53.376845 PCI: 00:1f.0 init ...
1538 15:53:53.379934 IOAPIC: Initializing IOAPIC at 0xfec00000
1539 15:53:53.386217 IOAPIC: Bootstrap Processor Local APIC = 0x00
1540 15:53:53.386307 IOAPIC: ID = 0x02
1541 15:53:53.389641 IOAPIC: Dumping registers
1542 15:53:53.392730 reg 0x0000: 0x02000000
1543 15:53:53.395961 reg 0x0001: 0x00770020
1544 15:53:53.399220 reg 0x0002: 0x00000000
1545 15:53:53.402939 PCI: 00:1f.0 init finished in 23543 usecs
1546 15:53:53.406023 PCI: 00:1f.4 init ...
1547 15:53:53.409099 PCI: 00:1f.4 init finished in 2262 usecs
1548 15:53:53.420799 PCI: 01:00.0 init ...
1549 15:53:53.423996 PCI: 01:00.0 init finished in 2250 usecs
1550 15:53:53.428531 PNP: 0c09.0 init ...
1551 15:53:53.431796 Google Chrome EC uptime: 11.036 seconds
1552 15:53:53.438116 Google Chrome AP resets since EC boot: 0
1553 15:53:53.441731 Google Chrome most recent AP reset causes:
1554 15:53:53.447786 Google Chrome EC reset flags at last EC boot: reset-pin
1555 15:53:53.451288 PNP: 0c09.0 init finished in 20565 usecs
1556 15:53:53.454626 Devices initialized
1557 15:53:53.457803 Show all devs... After init.
1558 15:53:53.457891 Root Device: enabled 1
1559 15:53:53.461113 CPU_CLUSTER: 0: enabled 1
1560 15:53:53.464362 DOMAIN: 0000: enabled 1
1561 15:53:53.467799 APIC: 00: enabled 1
1562 15:53:53.467887 PCI: 00:00.0: enabled 1
1563 15:53:53.470843 PCI: 00:02.0: enabled 1
1564 15:53:53.474116 PCI: 00:04.0: enabled 0
1565 15:53:53.474205 PCI: 00:05.0: enabled 0
1566 15:53:53.477530 PCI: 00:12.0: enabled 1
1567 15:53:53.480807 PCI: 00:12.5: enabled 0
1568 15:53:53.483915 PCI: 00:12.6: enabled 0
1569 15:53:53.484003 PCI: 00:14.0: enabled 1
1570 15:53:53.487173 PCI: 00:14.1: enabled 0
1571 15:53:53.490108 PCI: 00:14.3: enabled 1
1572 15:53:53.493639 PCI: 00:14.5: enabled 0
1573 15:53:53.493728 PCI: 00:15.0: enabled 1
1574 15:53:53.497085 PCI: 00:15.1: enabled 1
1575 15:53:53.500735 PCI: 00:15.2: enabled 0
1576 15:53:53.503077 PCI: 00:15.3: enabled 0
1577 15:53:53.503165 PCI: 00:16.0: enabled 1
1578 15:53:53.506898 PCI: 00:16.1: enabled 0
1579 15:53:53.509623 PCI: 00:16.2: enabled 0
1580 15:53:53.513589 PCI: 00:16.3: enabled 0
1581 15:53:53.513677 PCI: 00:16.4: enabled 0
1582 15:53:53.516626 PCI: 00:16.5: enabled 0
1583 15:53:53.519481 PCI: 00:17.0: enabled 1
1584 15:53:53.522710 PCI: 00:19.0: enabled 1
1585 15:53:53.522797 PCI: 00:19.1: enabled 0
1586 15:53:53.526412 PCI: 00:19.2: enabled 0
1587 15:53:53.529301 PCI: 00:1a.0: enabled 0
1588 15:53:53.532562 PCI: 00:1c.0: enabled 0
1589 15:53:53.532650 PCI: 00:1c.1: enabled 0
1590 15:53:53.535698 PCI: 00:1c.2: enabled 0
1591 15:53:53.539284 PCI: 00:1c.3: enabled 0
1592 15:53:53.542473 PCI: 00:1c.4: enabled 0
1593 15:53:53.542600 PCI: 00:1c.5: enabled 0
1594 15:53:53.545558 PCI: 00:1c.6: enabled 0
1595 15:53:53.549368 PCI: 00:1c.7: enabled 0
1596 15:53:53.552153 PCI: 00:1d.0: enabled 1
1597 15:53:53.552241 PCI: 00:1d.1: enabled 0
1598 15:53:53.555599 PCI: 00:1d.2: enabled 0
1599 15:53:53.559087 PCI: 00:1d.3: enabled 0
1600 15:53:53.561912 PCI: 00:1d.4: enabled 0
1601 15:53:53.562001 PCI: 00:1d.5: enabled 0
1602 15:53:53.565054 PCI: 00:1e.0: enabled 1
1603 15:53:53.568902 PCI: 00:1e.1: enabled 0
1604 15:53:53.571598 PCI: 00:1e.2: enabled 1
1605 15:53:53.571690 PCI: 00:1e.3: enabled 1
1606 15:53:53.574943 PCI: 00:1f.0: enabled 1
1607 15:53:53.577924 PCI: 00:1f.1: enabled 0
1608 15:53:53.581353 PCI: 00:1f.2: enabled 0
1609 15:53:53.581443 PCI: 00:1f.3: enabled 1
1610 15:53:53.585146 PCI: 00:1f.4: enabled 1
1611 15:53:53.587899 PCI: 00:1f.5: enabled 1
1612 15:53:53.591426 PCI: 00:1f.6: enabled 0
1613 15:53:53.591516 USB0 port 0: enabled 1
1614 15:53:53.594434 I2C: 01:15: enabled 1
1615 15:53:53.597661 I2C: 02:5d: enabled 1
1616 15:53:53.597750 GENERIC: 0.0: enabled 1
1617 15:53:53.601122 I2C: 03:1a: enabled 1
1618 15:53:53.604389 I2C: 03:38: enabled 1
1619 15:53:53.607787 I2C: 03:39: enabled 1
1620 15:53:53.607876 I2C: 03:3a: enabled 1
1621 15:53:53.610922 I2C: 03:3b: enabled 1
1622 15:53:53.614439 PCI: 00:00.0: enabled 1
1623 15:53:53.614562 SPI: 00: enabled 1
1624 15:53:53.617351 SPI: 01: enabled 1
1625 15:53:53.620641 PNP: 0c09.0: enabled 1
1626 15:53:53.620730 USB2 port 0: enabled 1
1627 15:53:53.623933 USB2 port 1: enabled 1
1628 15:53:53.627603 USB2 port 2: enabled 0
1629 15:53:53.627691 USB2 port 3: enabled 0
1630 15:53:53.630852 USB2 port 5: enabled 0
1631 15:53:53.633524 USB2 port 6: enabled 1
1632 15:53:53.637492 USB2 port 9: enabled 1
1633 15:53:53.637582 USB3 port 0: enabled 1
1634 15:53:53.640052 USB3 port 1: enabled 1
1635 15:53:53.643319 USB3 port 2: enabled 1
1636 15:53:53.643408 USB3 port 3: enabled 1
1637 15:53:53.646548 USB3 port 4: enabled 0
1638 15:53:53.650384 APIC: 02: enabled 1
1639 15:53:53.650473 APIC: 01: enabled 1
1640 15:53:53.653416 APIC: 07: enabled 1
1641 15:53:53.656543 APIC: 06: enabled 1
1642 15:53:53.656631 APIC: 05: enabled 1
1643 15:53:53.659570 APIC: 03: enabled 1
1644 15:53:53.659659 APIC: 04: enabled 1
1645 15:53:53.662990 PCI: 00:08.0: enabled 1
1646 15:53:53.666512 PCI: 00:14.2: enabled 1
1647 15:53:53.669678 PCI: 01:00.0: enabled 1
1648 15:53:53.673477 Disabling ACPI via APMC:
1649 15:53:53.676210 done.
1650 15:53:53.679533 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1651 15:53:53.683076 ELOG: NV offset 0xaf0000 size 0x4000
1652 15:53:53.689791 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1653 15:53:53.696464 ELOG: Event(17) added with size 13 at 2023-02-06 15:53:53 UTC
1654 15:53:53.703515 POST: Unexpected post code in previous boot: 0x25
1655 15:53:53.709692 ELOG: Event(A3) added with size 11 at 2023-02-06 15:53:53 UTC
1656 15:53:53.716484 ELOG: Event(A6) added with size 13 at 2023-02-06 15:53:53 UTC
1657 15:53:53.722649 ELOG: Event(92) added with size 9 at 2023-02-06 15:53:53 UTC
1658 15:53:53.728999 ELOG: Event(93) added with size 9 at 2023-02-06 15:53:53 UTC
1659 15:53:53.735622 ELOG: Event(9A) added with size 9 at 2023-02-06 15:53:53 UTC
1660 15:53:53.738887 ELOG: Event(9E) added with size 10 at 2023-02-06 15:53:53 UTC
1661 15:53:53.745843 ELOG: Event(9F) added with size 14 at 2023-02-06 15:53:53 UTC
1662 15:53:53.752563 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1663 15:53:53.759047 ELOG: Event(A1) added with size 10 at 2023-02-06 15:53:53 UTC
1664 15:53:53.764914 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1665 15:53:53.771891 ELOG: Event(A0) added with size 9 at 2023-02-06 15:53:53 UTC
1666 15:53:53.778997 elog_add_boot_reason: Logged dev mode boot
1667 15:53:53.779088 Finalize devices...
1668 15:53:53.781858 PCI: 00:17.0 final
1669 15:53:53.781946 Devices finalized
1670 15:53:53.788621 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1671 15:53:53.794632 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1672 15:53:53.797927 ME: HFSTS1 : 0x90000245
1673 15:53:53.801201 ME: HFSTS2 : 0x3B850126
1674 15:53:53.804794 ME: HFSTS3 : 0x00000020
1675 15:53:53.810816 ME: HFSTS4 : 0x00004800
1676 15:53:53.814372 ME: HFSTS5 : 0x00000000
1677 15:53:53.817695 ME: HFSTS6 : 0x40400006
1678 15:53:53.820684 ME: Manufacturing Mode : NO
1679 15:53:53.824337 ME: FW Partition Table : OK
1680 15:53:53.827192 ME: Bringup Loader Failure : NO
1681 15:53:53.830806 ME: Firmware Init Complete : YES
1682 15:53:53.833722 ME: Boot Options Present : NO
1683 15:53:53.837063 ME: Update In Progress : NO
1684 15:53:53.840182 ME: D0i3 Support : YES
1685 15:53:53.843647 ME: Low Power State Enabled : NO
1686 15:53:53.846808 ME: CPU Replaced : NO
1687 15:53:53.850086 ME: CPU Replacement Valid : YES
1688 15:53:53.853763 ME: Current Working State : 5
1689 15:53:53.856544 ME: Current Operation State : 1
1690 15:53:53.859868 ME: Current Operation Mode : 0
1691 15:53:53.863385 ME: Error Code : 0
1692 15:53:53.866729 ME: CPU Debug Disabled : YES
1693 15:53:53.869725 ME: TXT Support : NO
1694 15:53:53.875943 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1695 15:53:53.882503 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1696 15:53:53.886084 CBFS @ c08000 size 3f8000
1697 15:53:53.889032 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1698 15:53:53.892355 CBFS: Locating 'fallback/dsdt.aml'
1699 15:53:53.899321 CBFS: Found @ offset 10bb80 size 3fa5
1700 15:53:53.902364 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1701 15:53:53.905795 CBFS @ c08000 size 3f8000
1702 15:53:53.912977 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1703 15:53:53.915681 CBFS: Locating 'fallback/slic'
1704 15:53:53.918509 CBFS: 'fallback/slic' not found.
1705 15:53:53.925130 ACPI: Writing ACPI tables at 99b3e000.
1706 15:53:53.925219 ACPI: * FACS
1707 15:53:53.928243 ACPI: * DSDT
1708 15:53:53.931559 Ramoops buffer: 0x100000@0x99a3d000.
1709 15:53:53.934624 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1710 15:53:53.941235 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1711 15:53:53.944624 Google Chrome EC: version:
1712 15:53:53.947697 ro: helios_v2.0.2659-56403530b
1713 15:53:53.951135 rw: helios_v2.0.2849-c41de27e7d
1714 15:53:53.951225 running image: 1
1715 15:53:53.955365 ACPI: * FADT
1716 15:53:53.955454 SCI is IRQ9
1717 15:53:53.961853 ACPI: added table 1/32, length now 40
1718 15:53:53.961942 ACPI: * SSDT
1719 15:53:53.965130 Found 1 CPU(s) with 8 core(s) each.
1720 15:53:53.971687 Error: Could not locate 'wifi_sar' in VPD.
1721 15:53:53.975207 Checking CBFS for default SAR values
1722 15:53:53.978476 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1723 15:53:53.981812 CBFS @ c08000 size 3f8000
1724 15:53:53.987988 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1725 15:53:53.991491 CBFS: Locating 'wifi_sar_defaults.hex'
1726 15:53:53.994636 CBFS: Found @ offset 5fac0 size 77
1727 15:53:53.997766 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1728 15:53:54.004411 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1729 15:53:54.007430 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1730 15:53:54.014056 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1731 15:53:54.017339 failed to find key in VPD: dsm_calib_r0_0
1732 15:53:54.027716 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1733 15:53:54.033714 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1734 15:53:54.037019 failed to find key in VPD: dsm_calib_r0_1
1735 15:53:54.046705 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1736 15:53:54.050317 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1737 15:53:54.053265 failed to find key in VPD: dsm_calib_r0_2
1738 15:53:54.062968 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1739 15:53:54.069952 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1740 15:53:54.073010 failed to find key in VPD: dsm_calib_r0_3
1741 15:53:54.082655 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1742 15:53:54.085928 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1743 15:53:54.092317 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1744 15:53:54.095785 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1745 15:53:54.099467 EC returned error result code 1
1746 15:53:54.102673 EC returned error result code 1
1747 15:53:54.105902 EC returned error result code 1
1748 15:53:54.112374 PS2K: Bad resp from EC. Vivaldi disabled!
1749 15:53:54.118774 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1750 15:53:54.122110 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1751 15:53:54.128778 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1752 15:53:54.131868 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1753 15:53:54.138934 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1754 15:53:54.144987 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1755 15:53:54.151382 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1756 15:53:54.158081 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1757 15:53:54.161303 ACPI: added table 2/32, length now 44
1758 15:53:54.161397 ACPI: * MCFG
1759 15:53:54.164342 ACPI: added table 3/32, length now 48
1760 15:53:54.167809 ACPI: * TPM2
1761 15:53:54.171281 TPM2 log created at 99a2d000
1762 15:53:54.174366 ACPI: added table 4/32, length now 52
1763 15:53:54.174454 ACPI: * MADT
1764 15:53:54.178276 SCI is IRQ9
1765 15:53:54.181013 ACPI: added table 5/32, length now 56
1766 15:53:54.183983 current = 99b43ac0
1767 15:53:54.184070 ACPI: * DMAR
1768 15:53:54.187677 ACPI: added table 6/32, length now 60
1769 15:53:54.190821 ACPI: * IGD OpRegion
1770 15:53:54.193724 GMA: Found VBT in CBFS
1771 15:53:54.196952 GMA: Found valid VBT in CBFS
1772 15:53:54.200373 ACPI: added table 7/32, length now 64
1773 15:53:54.200463 ACPI: * HPET
1774 15:53:54.206832 ACPI: added table 8/32, length now 68
1775 15:53:54.206921 ACPI: done.
1776 15:53:54.210188 ACPI tables: 31744 bytes.
1777 15:53:54.213831 smbios_write_tables: 99a2c000
1778 15:53:54.217113 EC returned error result code 3
1779 15:53:54.220070 Couldn't obtain OEM name from CBI
1780 15:53:54.223412 Create SMBIOS type 17
1781 15:53:54.226780 PCI: 00:00.0 (Intel Cannonlake)
1782 15:53:54.226869 PCI: 00:14.3 (Intel WiFi)
1783 15:53:54.229929 SMBIOS tables: 939 bytes.
1784 15:53:54.236544 Writing table forward entry at 0x00000500
1785 15:53:54.239456 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1786 15:53:54.245959 Writing coreboot table at 0x99b62000
1787 15:53:54.249286 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1788 15:53:54.256461 1. 0000000000001000-000000000009ffff: RAM
1789 15:53:54.258998 2. 00000000000a0000-00000000000fffff: RESERVED
1790 15:53:54.262583 3. 0000000000100000-0000000099a2bfff: RAM
1791 15:53:54.269187 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1792 15:53:54.275865 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1793 15:53:54.282322 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1794 15:53:54.285243 7. 000000009a000000-000000009f7fffff: RESERVED
1795 15:53:54.288611 8. 00000000e0000000-00000000efffffff: RESERVED
1796 15:53:54.295031 9. 00000000fc000000-00000000fc000fff: RESERVED
1797 15:53:54.298652 10. 00000000fe000000-00000000fe00ffff: RESERVED
1798 15:53:54.305198 11. 00000000fed10000-00000000fed17fff: RESERVED
1799 15:53:54.308003 12. 00000000fed80000-00000000fed83fff: RESERVED
1800 15:53:54.314711 13. 00000000fed90000-00000000fed91fff: RESERVED
1801 15:53:54.317713 14. 00000000feda0000-00000000feda1fff: RESERVED
1802 15:53:54.324348 15. 0000000100000000-000000045e7fffff: RAM
1803 15:53:54.327355 Graphics framebuffer located at 0xc0000000
1804 15:53:54.330854 Passing 5 GPIOs to payload:
1805 15:53:54.334690 NAME | PORT | POLARITY | VALUE
1806 15:53:54.340784 write protect | undefined | high | low
1807 15:53:54.347474 lid | undefined | high | high
1808 15:53:54.350469 power | undefined | high | low
1809 15:53:54.356863 oprom | undefined | high | low
1810 15:53:54.360308 EC in RW | 0x000000cb | high | low
1811 15:53:54.363494 Board ID: 4
1812 15:53:54.366853 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1813 15:53:54.370416 CBFS @ c08000 size 3f8000
1814 15:53:54.376864 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1815 15:53:54.383070 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum f861
1816 15:53:54.386266 coreboot table: 1492 bytes.
1817 15:53:54.389835 IMD ROOT 0. 99fff000 00001000
1818 15:53:54.393415 IMD SMALL 1. 99ffe000 00001000
1819 15:53:54.396474 FSP MEMORY 2. 99c4e000 003b0000
1820 15:53:54.399302 CONSOLE 3. 99c2e000 00020000
1821 15:53:54.402464 FMAP 4. 99c2d000 0000054e
1822 15:53:54.406067 TIME STAMP 5. 99c2c000 00000910
1823 15:53:54.409462 VBOOT WORK 6. 99c18000 00014000
1824 15:53:54.412386 MRC DATA 7. 99c16000 00001958
1825 15:53:54.415637 ROMSTG STCK 8. 99c15000 00001000
1826 15:53:54.418954 AFTER CAR 9. 99c0b000 0000a000
1827 15:53:54.422056 RAMSTAGE 10. 99baf000 0005c000
1828 15:53:54.425672 REFCODE 11. 99b7a000 00035000
1829 15:53:54.429115 SMM BACKUP 12. 99b6a000 00010000
1830 15:53:54.432555 COREBOOT 13. 99b62000 00008000
1831 15:53:54.435463 ACPI 14. 99b3e000 00024000
1832 15:53:54.438518 ACPI GNVS 15. 99b3d000 00001000
1833 15:53:54.441861 RAMOOPS 16. 99a3d000 00100000
1834 15:53:54.445415 TPM2 TCGLOG17. 99a2d000 00010000
1835 15:53:54.448726 SMBIOS 18. 99a2c000 00000800
1836 15:53:54.451612 IMD small region:
1837 15:53:54.455236 IMD ROOT 0. 99ffec00 00000400
1838 15:53:54.458504 FSP RUNTIME 1. 99ffebe0 00000004
1839 15:53:54.461386 EC HOSTEVENT 2. 99ffebc0 00000008
1840 15:53:54.464616 POWER STATE 3. 99ffeb80 00000040
1841 15:53:54.467902 ROMSTAGE 4. 99ffeb60 00000004
1842 15:53:54.471320 MEM INFO 5. 99ffe9a0 000001b9
1843 15:53:54.475048 VPD 6. 99ffe920 0000006c
1844 15:53:54.477616 MTRR: Physical address space:
1845 15:53:54.484467 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1846 15:53:54.490754 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1847 15:53:54.497334 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1848 15:53:54.503955 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1849 15:53:54.510632 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1850 15:53:54.516903 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1851 15:53:54.520481 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1852 15:53:54.526426 MTRR: Fixed MSR 0x250 0x0606060606060606
1853 15:53:54.530123 MTRR: Fixed MSR 0x258 0x0606060606060606
1854 15:53:54.533018 MTRR: Fixed MSR 0x259 0x0000000000000000
1855 15:53:54.536336 MTRR: Fixed MSR 0x268 0x0606060606060606
1856 15:53:54.543438 MTRR: Fixed MSR 0x269 0x0606060606060606
1857 15:53:54.546479 MTRR: Fixed MSR 0x26a 0x0606060606060606
1858 15:53:54.549550 MTRR: Fixed MSR 0x26b 0x0606060606060606
1859 15:53:54.555771 MTRR: Fixed MSR 0x26c 0x0606060606060606
1860 15:53:54.559134 MTRR: Fixed MSR 0x26d 0x0606060606060606
1861 15:53:54.562196 MTRR: Fixed MSR 0x26e 0x0606060606060606
1862 15:53:54.565654 MTRR: Fixed MSR 0x26f 0x0606060606060606
1863 15:53:54.568899 call enable_fixed_mtrr()
1864 15:53:54.572036 CPU physical address size: 39 bits
1865 15:53:54.578871 MTRR: default type WB/UC MTRR counts: 6/8.
1866 15:53:54.581882 MTRR: WB selected as default type.
1867 15:53:54.588567 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1868 15:53:54.595197 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1869 15:53:54.598256 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1870 15:53:54.604902 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1871 15:53:54.611241 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1872 15:53:54.618416 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1873 15:53:54.624409 MTRR: Fixed MSR 0x250 0x0606060606060606
1874 15:53:54.627659 MTRR: Fixed MSR 0x258 0x0606060606060606
1875 15:53:54.630812 MTRR: Fixed MSR 0x259 0x0000000000000000
1876 15:53:54.634279 MTRR: Fixed MSR 0x268 0x0606060606060606
1877 15:53:54.640700 MTRR: Fixed MSR 0x269 0x0606060606060606
1878 15:53:54.644217 MTRR: Fixed MSR 0x26a 0x0606060606060606
1879 15:53:54.647420 MTRR: Fixed MSR 0x26b 0x0606060606060606
1880 15:53:54.653598 MTRR: Fixed MSR 0x26c 0x0606060606060606
1881 15:53:54.657044 MTRR: Fixed MSR 0x26d 0x0606060606060606
1882 15:53:54.660556 MTRR: Fixed MSR 0x26e 0x0606060606060606
1883 15:53:54.663729 MTRR: Fixed MSR 0x26f 0x0606060606060606
1884 15:53:54.663821
1885 15:53:54.667321 MTRR check
1886 15:53:54.670808 Fixed MTRRs : Enabled
1887 15:53:54.670900 Variable MTRRs: Enabled
1888 15:53:54.670971
1889 15:53:54.673711 call enable_fixed_mtrr()
1890 15:53:54.680233 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1891 15:53:54.683498 CPU physical address size: 39 bits
1892 15:53:54.686502 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1893 15:53:54.693277 MTRR: Fixed MSR 0x250 0x0606060606060606
1894 15:53:54.696082 MTRR: Fixed MSR 0x258 0x0606060606060606
1895 15:53:54.699425 MTRR: Fixed MSR 0x259 0x0000000000000000
1896 15:53:54.705855 MTRR: Fixed MSR 0x268 0x0606060606060606
1897 15:53:54.709245 MTRR: Fixed MSR 0x269 0x0606060606060606
1898 15:53:54.712240 MTRR: Fixed MSR 0x26a 0x0606060606060606
1899 15:53:54.715812 MTRR: Fixed MSR 0x26b 0x0606060606060606
1900 15:53:54.722238 MTRR: Fixed MSR 0x26c 0x0606060606060606
1901 15:53:54.725369 MTRR: Fixed MSR 0x26d 0x0606060606060606
1902 15:53:54.728920 MTRR: Fixed MSR 0x26e 0x0606060606060606
1903 15:53:54.731973 MTRR: Fixed MSR 0x26f 0x0606060606060606
1904 15:53:54.738551 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 15:53:54.741961 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 15:53:54.745017 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 15:53:54.748319 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 15:53:54.755146 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 15:53:54.758211 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 15:53:54.761833 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 15:53:54.764958 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 15:53:54.771544 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 15:53:54.774524 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 15:53:54.777793 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 15:53:54.781121 call enable_fixed_mtrr()
1916 15:53:54.784423 call enable_fixed_mtrr()
1917 15:53:54.787524 CPU physical address size: 39 bits
1918 15:53:54.790670 CPU physical address size: 39 bits
1919 15:53:54.794017 CBFS @ c08000 size 3f8000
1920 15:53:54.800692 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1921 15:53:54.803820 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 15:53:54.807255 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 15:53:54.810764 MTRR: Fixed MSR 0x258 0x0606060606060606
1924 15:53:54.817053 MTRR: Fixed MSR 0x259 0x0000000000000000
1925 15:53:54.820626 MTRR: Fixed MSR 0x268 0x0606060606060606
1926 15:53:54.823513 MTRR: Fixed MSR 0x269 0x0606060606060606
1927 15:53:54.826730 MTRR: Fixed MSR 0x26a 0x0606060606060606
1928 15:53:54.833180 MTRR: Fixed MSR 0x26b 0x0606060606060606
1929 15:53:54.836625 MTRR: Fixed MSR 0x26c 0x0606060606060606
1930 15:53:54.840002 MTRR: Fixed MSR 0x26d 0x0606060606060606
1931 15:53:54.843151 MTRR: Fixed MSR 0x26e 0x0606060606060606
1932 15:53:54.849937 MTRR: Fixed MSR 0x26f 0x0606060606060606
1933 15:53:54.853395 MTRR: Fixed MSR 0x258 0x0606060606060606
1934 15:53:54.856157 call enable_fixed_mtrr()
1935 15:53:54.859496 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 15:53:54.862799 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 15:53:54.866264 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 15:53:54.872351 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 15:53:54.876023 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 15:53:54.879212 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 15:53:54.882308 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 15:53:54.888839 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 15:53:54.892442 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 15:53:54.895414 CPU physical address size: 39 bits
1945 15:53:54.898467 call enable_fixed_mtrr()
1946 15:53:54.901991 MTRR: Fixed MSR 0x250 0x0606060606060606
1947 15:53:54.908682 MTRR: Fixed MSR 0x258 0x0606060606060606
1948 15:53:54.911934 MTRR: Fixed MSR 0x259 0x0000000000000000
1949 15:53:54.915364 MTRR: Fixed MSR 0x268 0x0606060606060606
1950 15:53:54.918461 MTRR: Fixed MSR 0x269 0x0606060606060606
1951 15:53:54.924864 MTRR: Fixed MSR 0x26a 0x0606060606060606
1952 15:53:54.927871 MTRR: Fixed MSR 0x26b 0x0606060606060606
1953 15:53:54.931443 MTRR: Fixed MSR 0x26c 0x0606060606060606
1954 15:53:54.934418 MTRR: Fixed MSR 0x26d 0x0606060606060606
1955 15:53:54.941280 MTRR: Fixed MSR 0x26e 0x0606060606060606
1956 15:53:54.944194 MTRR: Fixed MSR 0x26f 0x0606060606060606
1957 15:53:54.947608 MTRR: Fixed MSR 0x250 0x0606060606060606
1958 15:53:54.950981 call enable_fixed_mtrr()
1959 15:53:54.954031 MTRR: Fixed MSR 0x258 0x0606060606060606
1960 15:53:54.957911 MTRR: Fixed MSR 0x259 0x0000000000000000
1961 15:53:54.963680 MTRR: Fixed MSR 0x268 0x0606060606060606
1962 15:53:54.967584 MTRR: Fixed MSR 0x269 0x0606060606060606
1963 15:53:54.970422 MTRR: Fixed MSR 0x26a 0x0606060606060606
1964 15:53:54.973475 MTRR: Fixed MSR 0x26b 0x0606060606060606
1965 15:53:54.979951 MTRR: Fixed MSR 0x26c 0x0606060606060606
1966 15:53:54.983156 MTRR: Fixed MSR 0x26d 0x0606060606060606
1967 15:53:54.986657 MTRR: Fixed MSR 0x26e 0x0606060606060606
1968 15:53:54.989771 MTRR: Fixed MSR 0x26f 0x0606060606060606
1969 15:53:54.996692 CPU physical address size: 39 bits
1970 15:53:54.999552 call enable_fixed_mtrr()
1971 15:53:55.002894 CPU physical address size: 39 bits
1972 15:53:55.006043 CPU physical address size: 39 bits
1973 15:53:55.009390 CBFS: Locating 'fallback/payload'
1974 15:53:55.012527 CBFS: Found @ offset 1c96c0 size 3f798
1975 15:53:55.019055 Checking segment from ROM address 0xffdd16f8
1976 15:53:55.022378 Checking segment from ROM address 0xffdd1714
1977 15:53:55.025746 Loading segment from ROM address 0xffdd16f8
1978 15:53:55.028724 code (compression=0)
1979 15:53:55.039076 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1980 15:53:55.045190 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1981 15:53:55.048189 it's not compressed!
1982 15:53:55.140125 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1983 15:53:55.146840 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1984 15:53:55.153255 Loading segment from ROM address 0xffdd1714
1985 15:53:55.153344 Entry Point 0x30000000
1986 15:53:55.156656 Loaded segments
1987 15:53:55.162522 Finalizing chipset.
1988 15:53:55.165669 Finalizing SMM.
1989 15:53:55.168713 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1990 15:53:55.171897 mp_park_aps done after 0 msecs.
1991 15:53:55.178961 Jumping to boot code at 30000000(99b62000)
1992 15:53:55.185235 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1993 15:53:55.185326
1994 15:53:55.185399
1995 15:53:55.185463
1996 15:53:55.188373 Starting depthcharge on Helios...
1997 15:53:55.188473
1998 15:53:55.188818 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
1999 15:53:55.188920 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2000 15:53:55.189007 Setting prompt string to ['hatch:']
2001 15:53:55.189088 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
2002 15:53:55.198431 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2003 15:53:55.198549
2004 15:53:55.204736 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2005 15:53:55.204824
2006 15:53:55.211170 board_setup: Info: eMMC controller not present; skipping
2007 15:53:55.211259
2008 15:53:55.214933 New NVMe Controller 0x30053ac0 @ 00:1d:00
2009 15:53:55.215023
2010 15:53:55.221162 board_setup: Info: SDHCI controller not present; skipping
2011 15:53:55.221251
2012 15:53:55.227542 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2013 15:53:55.227631
2014 15:53:55.227701 Wipe memory regions:
2015 15:53:55.227767
2016 15:53:55.234266 [0x00000000001000, 0x000000000a0000)
2017 15:53:55.234355
2018 15:53:55.237355 [0x00000000100000, 0x00000030000000)
2019 15:53:55.300627
2020 15:53:55.303801 [0x00000030657430, 0x00000099a2c000)
2021 15:53:55.440870
2022 15:53:55.444119 [0x00000100000000, 0x0000045e800000)
2023 15:53:56.826806
2024 15:53:56.827347 R8152: Initializing
2025 15:53:56.827709
2026 15:53:56.830251 Version 9 (ocp_data = 6010)
2027 15:53:56.834264
2028 15:53:56.834754 R8152: Done initializing
2029 15:53:56.835122
2030 15:53:56.837418 Adding net device
2031 15:53:57.441579
2032 15:53:57.441721 R8152: Initializing
2033 15:53:57.441796
2034 15:53:57.444565 Version 6 (ocp_data = 5c30)
2035 15:53:57.444639
2036 15:53:57.447813 R8152: Done initializing
2037 15:53:57.447906
2038 15:53:57.454680 net_add_device: Attemp to include the same device
2039 15:53:57.454767
2040 15:53:57.461622 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2041 15:53:57.461710
2042 15:53:57.461785
2043 15:53:57.461848
2044 15:53:57.462142 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2046 15:53:57.562802 hatch: tftpboot 192.168.201.1 9036875/tftp-deploy-c6pxu6vf/kernel/bzImage 9036875/tftp-deploy-c6pxu6vf/kernel/cmdline 9036875/tftp-deploy-c6pxu6vf/ramdisk/ramdisk.cpio.gz
2047 15:53:57.562948 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2048 15:53:57.563034 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
2049 15:53:57.567524 tftpboot 192.168.201.1 9036875/tftp-deploy-c6pxu6vf/kernel/bzImy-c6pxu6vf/kernel/cmdline 9036875/tftp-deploy-c6pxu6vf/ramdisk/ramdisk.cpio.gz
2050 15:53:57.567610
2051 15:53:57.567681 Waiting for link
2052 15:53:57.768138
2053 15:53:57.768280 done.
2054 15:53:57.768357
2055 15:53:57.768423 MAC: 00:24:32:30:7f:7f
2056 15:53:57.768486
2057 15:53:57.771346 Sending DHCP discover... done.
2058 15:53:57.771424
2059 15:53:57.774710 Waiting for reply... done.
2060 15:53:57.774782
2061 15:53:57.778008 Sending DHCP request... done.
2062 15:53:57.778091
2063 15:53:57.781313 Waiting for reply... done.
2064 15:53:57.781393
2065 15:53:57.784763 My ip is 192.168.201.15
2066 15:53:57.784846
2067 15:53:57.788393 The DHCP server ip is 192.168.201.1
2068 15:53:57.788472
2069 15:53:57.791074 TFTP server IP predefined by user: 192.168.201.1
2070 15:53:57.791150
2071 15:53:57.797525 Bootfile predefined by user: 9036875/tftp-deploy-c6pxu6vf/kernel/bzImage
2072 15:53:57.801024
2073 15:53:57.804343 Sending tftp read request... done.
2074 15:53:57.804427
2075 15:53:57.808236 Waiting for the transfer...
2076 15:53:57.808311
2077 15:53:58.316000 00000000 ################################################################
2078 15:53:58.316141
2079 15:53:58.831370 00080000 ################################################################
2080 15:53:58.831515
2081 15:53:59.341907 00100000 ################################################################
2082 15:53:59.342050
2083 15:53:59.850879 00180000 ################################################################
2084 15:53:59.851025
2085 15:54:00.351444 00200000 ################################################################
2086 15:54:00.351595
2087 15:54:00.860919 00280000 ################################################################
2088 15:54:00.861068
2089 15:54:01.382071 00300000 ################################################################
2090 15:54:01.382227
2091 15:54:01.906429 00380000 ################################################################
2092 15:54:01.906622
2093 15:54:02.425796 00400000 ################################################################
2094 15:54:02.425977
2095 15:54:02.941524 00480000 ################################################################
2096 15:54:02.941679
2097 15:54:03.453561 00500000 ################################################################
2098 15:54:03.453710
2099 15:54:03.964605 00580000 ################################################################
2100 15:54:03.964747
2101 15:54:04.475618 00600000 ################################################################
2102 15:54:04.475766
2103 15:54:05.001042 00680000 ################################################################
2104 15:54:05.001188
2105 15:54:05.250532 00700000 ############################# done.
2106 15:54:05.250693
2107 15:54:05.254200 The bootfile was 7577488 bytes long.
2108 15:54:05.254290
2109 15:54:05.257524 Sending tftp read request... done.
2110 15:54:05.257613
2111 15:54:05.260644 Waiting for the transfer...
2112 15:54:05.260733
2113 15:54:05.786398 00000000 ################################################################
2114 15:54:05.786549
2115 15:54:06.351226 00080000 ################################################################
2116 15:54:06.351821
2117 15:54:07.018705 00100000 ################################################################
2118 15:54:07.019276
2119 15:54:07.692500 00180000 ################################################################
2120 15:54:07.693033
2121 15:54:08.347511 00200000 ################################################################
2122 15:54:08.348058
2123 15:54:09.004214 00280000 ################################################################
2124 15:54:09.004750
2125 15:54:09.653229 00300000 ################################################################
2126 15:54:09.653786
2127 15:54:10.269973 00380000 ################################################################
2128 15:54:10.270122
2129 15:54:10.847711 00400000 ################################################################
2130 15:54:10.848254
2131 15:54:11.485406 00480000 ################################################################
2132 15:54:11.486044
2133 15:54:11.785214 00500000 ################################ done.
2134 15:54:11.785356
2135 15:54:11.788208 Sending tftp read request... done.
2136 15:54:11.788301
2137 15:54:11.791439 Waiting for the transfer...
2138 15:54:11.791539
2139 15:54:11.791624 00000000 # done.
2140 15:54:11.791710
2141 15:54:11.801334 Command line loaded dynamically from TFTP file: 9036875/tftp-deploy-c6pxu6vf/kernel/cmdline
2142 15:54:11.801454
2143 15:54:11.827888 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9036875/extract-nfsrootfs-nik9hf2w,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2144 15:54:11.828116
2145 15:54:11.833695 ec_init(0): CrosEC protocol v3 supported (256, 256)
2146 15:54:11.837863
2147 15:54:11.841457 Shutting down all USB controllers.
2148 15:54:11.841882
2149 15:54:11.842290 Removing current net device
2150 15:54:11.848478
2151 15:54:11.849032 Finalizing coreboot
2152 15:54:11.849444
2153 15:54:11.855577 Exiting depthcharge with code 4 at timestamp: 24001229
2154 15:54:11.856113
2155 15:54:11.856537
2156 15:54:11.856930 Starting kernel ...
2157 15:54:11.858273 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2158 15:54:11.858939 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2159 15:54:11.859392 Setting prompt string to ['Linux version [0-9]']
2160 15:54:11.859805 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2161 15:54:11.860205 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2162 15:54:11.861268
2163 15:54:11.861748
2165 15:58:34.859146 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2167 15:58:34.859369 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2169 15:58:34.859531 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2172 15:58:34.859803 end: 2 depthcharge-action (duration 00:05:00) [common]
2174 15:58:34.860083 Cleaning after the job
2175 15:58:34.860171 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9036875/tftp-deploy-c6pxu6vf/ramdisk
2176 15:58:34.860657 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9036875/tftp-deploy-c6pxu6vf/kernel
2177 15:58:34.861242 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9036875/tftp-deploy-c6pxu6vf/nfsrootfs
2178 15:58:34.910315 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9036875/tftp-deploy-c6pxu6vf/modules
2179 15:58:34.910668 start: 4.1 power-off (timeout 00:00:30) [common]
2180 15:58:34.910838 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=off'
2181 15:58:37.075276 >> Command sent successfully.
2182 15:58:37.077547 Returned 0 in 2 seconds
2183 15:58:37.178313 end: 4.1 power-off (duration 00:00:02) [common]
2185 15:58:37.178694 start: 4.2 read-feedback (timeout 00:09:58) [common]
2186 15:58:37.178953 Listened to connection for namespace 'common' for up to 1s
2188 15:58:37.179359 Listened to connection for namespace 'common' for up to 1s
2189 15:58:37.179672 Listened to connection for namespace 'common' for up to 1s
2190 15:58:37.179997 Listened to connection for namespace 'common' for up to 1s
2191 15:58:37.180319 Listened to connection for namespace 'common' for up to 1s
2192 15:58:38.182577 Finalising connection for namespace 'common'
2193 15:58:38.182754 Disconnecting from shell: Finalise
2194 15:58:38.182833
2195 15:58:38.283703 end: 4.2 read-feedback (duration 00:00:01) [common]
2196 15:58:38.283852 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9036875
2197 15:58:38.439073 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9036875
2198 15:58:38.439269 JobError: Your job cannot terminate cleanly.