Boot log: asus-C436FA-Flip-hatch

    1 13:13:34.845783  lava-dispatcher, installed at version: 2023.05.1
    2 13:13:34.846009  start: 0 validate
    3 13:13:34.846148  Start time: 2023-06-07 13:13:34.846138+00:00 (UTC)
    4 13:13:34.846285  Using caching service: 'http://localhost/cache/?uri=%s'
    5 13:13:34.846418  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230527.0%2Fx86%2Frootfs.cpio.gz exists
    6 13:13:35.115749  Using caching service: 'http://localhost/cache/?uri=%s'
    7 13:13:35.115944  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2172-gb3363b986efb%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 13:13:35.384223  Using caching service: 'http://localhost/cache/?uri=%s'
    9 13:13:35.384451  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2172-gb3363b986efb%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 13:13:35.655767  validate duration: 0.81
   12 13:13:35.656105  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 13:13:35.656203  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 13:13:35.656295  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 13:13:35.656421  Not decompressing ramdisk as can be used compressed.
   16 13:13:35.656507  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230527.0/x86/rootfs.cpio.gz
   17 13:13:35.656573  saving as /var/lib/lava/dispatcher/tmp/10624241/tftp-deploy-a5ofgnnn/ramdisk/rootfs.cpio.gz
   18 13:13:35.656636  total size: 8430069 (8MB)
   19 13:13:35.657676  progress   0% (0MB)
   20 13:13:35.659921  progress   5% (0MB)
   21 13:13:35.662128  progress  10% (0MB)
   22 13:13:35.664463  progress  15% (1MB)
   23 13:13:35.666674  progress  20% (1MB)
   24 13:13:35.668907  progress  25% (2MB)
   25 13:13:35.671110  progress  30% (2MB)
   26 13:13:35.673337  progress  35% (2MB)
   27 13:13:35.675366  progress  40% (3MB)
   28 13:13:35.677621  progress  45% (3MB)
   29 13:13:35.679962  progress  50% (4MB)
   30 13:13:35.682165  progress  55% (4MB)
   31 13:13:35.684384  progress  60% (4MB)
   32 13:13:35.686557  progress  65% (5MB)
   33 13:13:35.688768  progress  70% (5MB)
   34 13:13:35.690774  progress  75% (6MB)
   35 13:13:35.692967  progress  80% (6MB)
   36 13:13:35.695138  progress  85% (6MB)
   37 13:13:35.697346  progress  90% (7MB)
   38 13:13:35.699565  progress  95% (7MB)
   39 13:13:35.701825  progress 100% (8MB)
   40 13:13:35.701968  8MB downloaded in 0.05s (177.36MB/s)
   41 13:13:35.702121  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 13:13:35.702365  end: 1.1 download-retry (duration 00:00:00) [common]
   44 13:13:35.702452  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 13:13:35.702539  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 13:13:35.702679  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2172-gb3363b986efb/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 13:13:35.702752  saving as /var/lib/lava/dispatcher/tmp/10624241/tftp-deploy-a5ofgnnn/kernel/bzImage
   48 13:13:35.702814  total size: 7888784 (7MB)
   49 13:13:35.702875  No compression specified
   50 13:13:35.704022  progress   0% (0MB)
   51 13:13:35.706144  progress   5% (0MB)
   52 13:13:35.708263  progress  10% (0MB)
   53 13:13:35.710307  progress  15% (1MB)
   54 13:13:35.712376  progress  20% (1MB)
   55 13:13:35.714444  progress  25% (1MB)
   56 13:13:35.716535  progress  30% (2MB)
   57 13:13:35.718626  progress  35% (2MB)
   58 13:13:35.720701  progress  40% (3MB)
   59 13:13:35.722726  progress  45% (3MB)
   60 13:13:35.724788  progress  50% (3MB)
   61 13:13:35.726781  progress  55% (4MB)
   62 13:13:35.728798  progress  60% (4MB)
   63 13:13:35.730805  progress  65% (4MB)
   64 13:13:35.732852  progress  70% (5MB)
   65 13:13:35.734883  progress  75% (5MB)
   66 13:13:35.736958  progress  80% (6MB)
   67 13:13:35.739247  progress  85% (6MB)
   68 13:13:35.741522  progress  90% (6MB)
   69 13:13:35.743778  progress  95% (7MB)
   70 13:13:35.746343  progress 100% (7MB)
   71 13:13:35.746663  7MB downloaded in 0.04s (171.59MB/s)
   72 13:13:35.746890  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 13:13:35.747122  end: 1.2 download-retry (duration 00:00:00) [common]
   75 13:13:35.747208  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 13:13:35.747296  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 13:13:35.747503  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2172-gb3363b986efb/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 13:13:35.747602  saving as /var/lib/lava/dispatcher/tmp/10624241/tftp-deploy-a5ofgnnn/modules/modules.tar
   79 13:13:35.747716  total size: 253664 (0MB)
   80 13:13:35.747809  Using unxz to decompress xz
   81 13:13:35.752276  progress  12% (0MB)
   82 13:13:35.752743  progress  25% (0MB)
   83 13:13:35.753018  progress  38% (0MB)
   84 13:13:35.754441  progress  51% (0MB)
   85 13:13:35.756542  progress  64% (0MB)
   86 13:13:35.758426  progress  77% (0MB)
   87 13:13:35.760327  progress  90% (0MB)
   88 13:13:35.762120  progress 100% (0MB)
   89 13:13:35.768343  0MB downloaded in 0.02s (11.75MB/s)
   90 13:13:35.768783  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 13:13:35.769388  end: 1.3 download-retry (duration 00:00:00) [common]
   93 13:13:35.769560  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
   94 13:13:35.769826  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
   95 13:13:35.769972  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 13:13:35.770103  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
   97 13:13:35.770379  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_
   98 13:13:35.770561  makedir: /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin
   99 13:13:35.770708  makedir: /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/tests
  100 13:13:35.770854  makedir: /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/results
  101 13:13:35.771016  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-add-keys
  102 13:13:35.771302  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-add-sources
  103 13:13:35.771514  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-background-process-start
  104 13:13:35.771691  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-background-process-stop
  105 13:13:35.771884  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-common-functions
  106 13:13:35.772070  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-echo-ipv4
  107 13:13:35.772266  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-install-packages
  108 13:13:35.772423  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-installed-packages
  109 13:13:35.772579  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-os-build
  110 13:13:35.772821  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-probe-channel
  111 13:13:35.772980  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-probe-ip
  112 13:13:35.773207  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-target-ip
  113 13:13:35.773379  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-target-mac
  114 13:13:35.773548  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-target-storage
  115 13:13:35.773712  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-test-case
  116 13:13:35.773876  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-test-event
  117 13:13:35.774053  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-test-feedback
  118 13:13:35.774238  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-test-raise
  119 13:13:35.774421  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-test-reference
  120 13:13:35.774585  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-test-runner
  121 13:13:35.774757  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-test-set
  122 13:13:35.774914  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-test-shell
  123 13:13:35.775074  Updating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-install-packages (oe)
  124 13:13:35.775264  Updating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/bin/lava-installed-packages (oe)
  125 13:13:35.775490  Creating /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/environment
  126 13:13:35.775641  LAVA metadata
  127 13:13:35.775747  - LAVA_JOB_ID=10624241
  128 13:13:35.775853  - LAVA_DISPATCHER_IP=192.168.201.1
  129 13:13:35.775978  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  130 13:13:35.776050  skipped lava-vland-overlay
  131 13:13:35.776127  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 13:13:35.776214  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  133 13:13:35.776277  skipped lava-multinode-overlay
  134 13:13:35.776351  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 13:13:35.776431  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  136 13:13:35.776516  Loading test definitions
  137 13:13:35.776617  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  138 13:13:35.776691  Using /lava-10624241 at stage 0
  139 13:13:35.777006  uuid=10624241_1.4.2.3.1 testdef=None
  140 13:13:35.777096  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 13:13:35.777181  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  142 13:13:35.777704  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 13:13:35.777938  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  145 13:13:35.778582  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 13:13:35.778816  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  148 13:13:35.779426  runner path: /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/0/tests/0_dmesg test_uuid 10624241_1.4.2.3.1
  149 13:13:35.779578  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 13:13:35.779809  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  152 13:13:35.779922  Using /lava-10624241 at stage 1
  153 13:13:35.780215  uuid=10624241_1.4.2.3.5 testdef=None
  154 13:13:35.780304  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  155 13:13:35.780397  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  156 13:13:35.780902  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  158 13:13:35.781175  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  159 13:13:35.781960  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  161 13:13:35.782336  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  162 13:13:35.783364  runner path: /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/1/tests/1_bootrr test_uuid 10624241_1.4.2.3.5
  163 13:13:35.783561  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  165 13:13:35.783930  Creating lava-test-runner.conf files
  166 13:13:35.783999  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/0 for stage 0
  167 13:13:35.784122  - 0_dmesg
  168 13:13:35.784233  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10624241/lava-overlay-i5n30ls_/lava-10624241/1 for stage 1
  169 13:13:35.784353  - 1_bootrr
  170 13:13:35.784479  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  171 13:13:35.784594  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  172 13:13:35.794448  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  173 13:13:35.794567  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  174 13:13:35.794655  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  175 13:13:35.794740  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  176 13:13:35.794826  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  177 13:13:36.038325  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  178 13:13:36.038695  start: 1.4.4 extract-modules (timeout 00:10:00) [common]
  179 13:13:36.038812  extracting modules file /var/lib/lava/dispatcher/tmp/10624241/tftp-deploy-a5ofgnnn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10624241/extract-overlay-ramdisk-v9m8kgwn/ramdisk
  180 13:13:36.052186  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  181 13:13:36.052323  start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
  182 13:13:36.052413  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10624241/compress-overlay-sdf6wwzt/overlay-1.4.2.4.tar.gz to ramdisk
  183 13:13:36.052491  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10624241/compress-overlay-sdf6wwzt/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10624241/extract-overlay-ramdisk-v9m8kgwn/ramdisk
  184 13:13:36.061558  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  185 13:13:36.061739  start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
  186 13:13:36.061869  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  187 13:13:36.062067  start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
  188 13:13:36.062187  Building ramdisk /var/lib/lava/dispatcher/tmp/10624241/extract-overlay-ramdisk-v9m8kgwn/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10624241/extract-overlay-ramdisk-v9m8kgwn/ramdisk
  189 13:13:36.197074  >> 49825 blocks

  190 13:13:37.045365  rename /var/lib/lava/dispatcher/tmp/10624241/extract-overlay-ramdisk-v9m8kgwn/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10624241/tftp-deploy-a5ofgnnn/ramdisk/ramdisk.cpio.gz
  191 13:13:37.045787  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  192 13:13:37.045910  start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
  193 13:13:37.046011  start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
  194 13:13:37.046108  No mkimage arch provided, not using FIT.
  195 13:13:37.046198  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  196 13:13:37.046285  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  197 13:13:37.046395  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  198 13:13:37.046491  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
  199 13:13:37.046577  No LXC device requested
  200 13:13:37.046660  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  201 13:13:37.046754  start: 1.6 deploy-device-env (timeout 00:09:59) [common]
  202 13:13:37.046837  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  203 13:13:37.046909  Checking files for TFTP limit of 4294967296 bytes.
  204 13:13:37.047306  end: 1 tftp-deploy (duration 00:00:01) [common]
  205 13:13:37.047413  start: 2 depthcharge-action (timeout 00:05:00) [common]
  206 13:13:37.047501  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  207 13:13:37.047621  substitutions:
  208 13:13:37.047693  - {DTB}: None
  209 13:13:37.047758  - {INITRD}: 10624241/tftp-deploy-a5ofgnnn/ramdisk/ramdisk.cpio.gz
  210 13:13:37.047822  - {KERNEL}: 10624241/tftp-deploy-a5ofgnnn/kernel/bzImage
  211 13:13:37.047929  - {LAVA_MAC}: None
  212 13:13:37.048020  - {PRESEED_CONFIG}: None
  213 13:13:37.048124  - {PRESEED_LOCAL}: None
  214 13:13:37.048200  - {RAMDISK}: 10624241/tftp-deploy-a5ofgnnn/ramdisk/ramdisk.cpio.gz
  215 13:13:37.048260  - {ROOT_PART}: None
  216 13:13:37.048317  - {ROOT}: None
  217 13:13:37.048374  - {SERVER_IP}: 192.168.201.1
  218 13:13:37.048430  - {TEE}: None
  219 13:13:37.048486  Parsed boot commands:
  220 13:13:37.048543  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  221 13:13:37.048716  Parsed boot commands: tftpboot 192.168.201.1 10624241/tftp-deploy-a5ofgnnn/kernel/bzImage 10624241/tftp-deploy-a5ofgnnn/kernel/cmdline 10624241/tftp-deploy-a5ofgnnn/ramdisk/ramdisk.cpio.gz
  222 13:13:37.048806  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  223 13:13:37.048892  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  224 13:13:37.048985  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  225 13:13:37.049083  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  226 13:13:37.049160  Not connected, no need to disconnect.
  227 13:13:37.049237  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  228 13:13:37.049426  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  229 13:13:37.049494  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
  230 13:13:37.052850  Setting prompt string to ['lava-test: # ']
  231 13:13:37.053237  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  232 13:13:37.053348  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  233 13:13:37.053446  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  234 13:13:37.053536  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  235 13:13:37.053734  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
  236 13:13:42.186720  >> Command sent successfully.

  237 13:13:42.189093  Returned 0 in 5 seconds
  238 13:13:42.289477  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  240 13:13:42.289813  end: 2.2.2 reset-device (duration 00:00:05) [common]
  241 13:13:42.289969  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  242 13:13:42.290079  Setting prompt string to 'Starting depthcharge on Helios...'
  243 13:13:42.290148  Changing prompt to 'Starting depthcharge on Helios...'
  244 13:13:42.290218  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  245 13:13:42.290472  [Enter `^Ec?' for help]

  246 13:13:42.910515  

  247 13:13:42.910671  

  248 13:13:42.920685  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  249 13:13:42.923827  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  250 13:13:42.930405  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  251 13:13:42.933820  CPU: AES supported, TXT NOT supported, VT supported

  252 13:13:42.940727  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  253 13:13:42.943893  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  254 13:13:42.950305  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  255 13:13:42.953721  VBOOT: Loading verstage.

  256 13:13:42.957086  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  257 13:13:42.963489  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  258 13:13:42.967021  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  259 13:13:42.970630  CBFS @ c08000 size 3f8000

  260 13:13:42.977143  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  261 13:13:42.980474  CBFS: Locating 'fallback/verstage'

  262 13:13:42.984028  CBFS: Found @ offset 10fb80 size 1072c

  263 13:13:42.984112  

  264 13:13:42.987023  

  265 13:13:42.996887  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  266 13:13:43.011465  Probing TPM: . done!

  267 13:13:43.014528  TPM ready after 0 ms

  268 13:13:43.018191  Connected to device vid:did:rid of 1ae0:0028:00

  269 13:13:43.028215  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  270 13:13:43.031288  Initialized TPM device CR50 revision 0

  271 13:13:43.078420  tlcl_send_startup: Startup return code is 0

  272 13:13:43.078512  TPM: setup succeeded

  273 13:13:43.091252  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  274 13:13:43.095089  Chrome EC: UHEPI supported

  275 13:13:43.098298  Phase 1

  276 13:13:43.101771  FMAP: area GBB found @ c05000 (12288 bytes)

  277 13:13:43.108587  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  278 13:13:43.108677  Phase 2

  279 13:13:43.111669  Phase 3

  280 13:13:43.114908  FMAP: area GBB found @ c05000 (12288 bytes)

  281 13:13:43.122030  VB2:vb2_report_dev_firmware() This is developer signed firmware

  282 13:13:43.128515  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  283 13:13:43.131516  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  284 13:13:43.138100  VB2:vb2_verify_keyblock() Checking keyblock signature...

  285 13:13:43.153688  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  286 13:13:43.157371  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  287 13:13:43.163531  VB2:vb2_verify_fw_preamble() Verifying preamble.

  288 13:13:43.168169  Phase 4

  289 13:13:43.171180  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)

  290 13:13:43.177872  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  291 13:13:43.357433  VB2:vb2_rsa_verify_digest() Digest check failed!

  292 13:13:43.361075  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  293 13:13:43.364103  Saving nvdata

  294 13:13:43.367772  Reboot requested (10020007)

  295 13:13:43.370816  board_reset() called!

  296 13:13:43.370902  full_reset() called!

  297 13:13:47.876915  

  298 13:13:47.877433  

  299 13:13:47.886977  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  300 13:13:47.890006  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  301 13:13:47.896794  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  302 13:13:47.900364  CPU: AES supported, TXT NOT supported, VT supported

  303 13:13:47.906777  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  304 13:13:47.910207  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  305 13:13:47.916679  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  306 13:13:47.920357  VBOOT: Loading verstage.

  307 13:13:47.923610  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  308 13:13:47.930069  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  309 13:13:47.936841  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  310 13:13:47.937310  CBFS @ c08000 size 3f8000

  311 13:13:47.943385  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  312 13:13:47.946663  CBFS: Locating 'fallback/verstage'

  313 13:13:47.950172  CBFS: Found @ offset 10fb80 size 1072c

  314 13:13:47.953800  

  315 13:13:47.954225  

  316 13:13:47.963586  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  317 13:13:47.978363  Probing TPM: . done!

  318 13:13:47.981915  TPM ready after 0 ms

  319 13:13:47.984729  Connected to device vid:did:rid of 1ae0:0028:00

  320 13:13:47.994779  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  321 13:13:47.998239  Initialized TPM device CR50 revision 0

  322 13:13:48.043954  tlcl_send_startup: Startup return code is 0

  323 13:13:48.044183  TPM: setup succeeded

  324 13:13:48.056882  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  325 13:13:48.060474  Chrome EC: UHEPI supported

  326 13:13:48.064241  Phase 1

  327 13:13:48.067400  FMAP: area GBB found @ c05000 (12288 bytes)

  328 13:13:48.074105  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  329 13:13:48.080526  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  330 13:13:48.083624  Recovery requested (1009000e)

  331 13:13:48.089308  Saving nvdata

  332 13:13:48.095521  tlcl_extend: response is 0

  333 13:13:48.104350  tlcl_extend: response is 0

  334 13:13:48.111788  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  335 13:13:48.114624  CBFS @ c08000 size 3f8000

  336 13:13:48.121562  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  337 13:13:48.125048  CBFS: Locating 'fallback/romstage'

  338 13:13:48.128459  CBFS: Found @ offset 80 size 145fc

  339 13:13:48.131577  Accumulated console time in verstage 98 ms

  340 13:13:48.131791  

  341 13:13:48.131979  

  342 13:13:48.144955  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  343 13:13:48.151729  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  344 13:13:48.154601  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  345 13:13:48.158246  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  346 13:13:48.165011  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  347 13:13:48.167944  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  348 13:13:48.171037  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  349 13:13:48.174575  TCO_STS:   0000 0000

  350 13:13:48.177849  GEN_PMCON: e0015238 00000200

  351 13:13:48.180977  GBLRST_CAUSE: 00000000 00000000

  352 13:13:48.181062  prev_sleep_state 5

  353 13:13:48.184288  Boot Count incremented to 63798

  354 13:13:48.191102  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  355 13:13:48.194498  CBFS @ c08000 size 3f8000

  356 13:13:48.200744  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  357 13:13:48.200824  CBFS: Locating 'fspm.bin'

  358 13:13:48.204409  CBFS: Found @ offset 5ffc0 size 71000

  359 13:13:48.208564  Chrome EC: UHEPI supported

  360 13:13:48.215753  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  361 13:13:48.221203  Probing TPM:  done!

  362 13:13:48.227772  Connected to device vid:did:rid of 1ae0:0028:00

  363 13:13:48.237553  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  364 13:13:48.243801  Initialized TPM device CR50 revision 0

  365 13:13:48.253040  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  366 13:13:48.259238  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  367 13:13:48.262780  MRC cache found, size 1948

  368 13:13:48.265880  bootmode is set to: 2

  369 13:13:48.269126  PRMRR disabled by config.

  370 13:13:48.269201  SPD INDEX = 1

  371 13:13:48.275930  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  372 13:13:48.279034  CBFS @ c08000 size 3f8000

  373 13:13:48.282620  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  374 13:13:48.285904  CBFS: Locating 'spd.bin'

  375 13:13:48.289321  CBFS: Found @ offset 5fb80 size 400

  376 13:13:48.292672  SPD: module type is LPDDR3

  377 13:13:48.295806  SPD: module part is 

  378 13:13:48.302285  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  379 13:13:48.305918  SPD: device width 4 bits, bus width 8 bits

  380 13:13:48.308936  SPD: module size is 4096 MB (per channel)

  381 13:13:48.312583  memory slot: 0 configuration done.

  382 13:13:48.315883  memory slot: 2 configuration done.

  383 13:13:48.367445  CBMEM:

  384 13:13:48.370537  IMD: root @ 99fff000 254 entries.

  385 13:13:48.373648  IMD: root @ 99ffec00 62 entries.

  386 13:13:48.377372  External stage cache:

  387 13:13:48.380579  IMD: root @ 9abff000 254 entries.

  388 13:13:48.384240  IMD: root @ 9abfec00 62 entries.

  389 13:13:48.387399  Chrome EC: clear events_b mask to 0x0000000020004000

  390 13:13:48.403453  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  391 13:13:48.416249  tlcl_write: response is 0

  392 13:13:48.425770  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  393 13:13:48.432144  MRC: TPM MRC hash updated successfully.

  394 13:13:48.432259  2 DIMMs found

  395 13:13:48.435535  SMM Memory Map

  396 13:13:48.438734  SMRAM       : 0x9a000000 0x1000000

  397 13:13:48.442056   Subregion 0: 0x9a000000 0xa00000

  398 13:13:48.445782   Subregion 1: 0x9aa00000 0x200000

  399 13:13:48.448980   Subregion 2: 0x9ac00000 0x400000

  400 13:13:48.452301  top_of_ram = 0x9a000000

  401 13:13:48.455511  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  402 13:13:48.462191  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  403 13:13:48.465840  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  404 13:13:48.472036  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  405 13:13:48.475479  CBFS @ c08000 size 3f8000

  406 13:13:48.478672  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  407 13:13:48.482166  CBFS: Locating 'fallback/postcar'

  408 13:13:48.485304  CBFS: Found @ offset 107000 size 4b44

  409 13:13:48.491955  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  410 13:13:48.504596  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  411 13:13:48.507620  Processing 180 relocs. Offset value of 0x97c0c000

  412 13:13:48.516398  Accumulated console time in romstage 286 ms

  413 13:13:48.516511  

  414 13:13:48.516616  

  415 13:13:48.526087  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  416 13:13:48.533119  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  417 13:13:48.536199  CBFS @ c08000 size 3f8000

  418 13:13:48.539671  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  419 13:13:48.542768  CBFS: Locating 'fallback/ramstage'

  420 13:13:48.549657  CBFS: Found @ offset 43380 size 1b9e8

  421 13:13:48.556494  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  422 13:13:48.588280  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  423 13:13:48.591320  Processing 3976 relocs. Offset value of 0x98db0000

  424 13:13:48.597971  Accumulated console time in postcar 52 ms

  425 13:13:48.598413  

  426 13:13:48.598762  

  427 13:13:48.608160  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  428 13:13:48.614835  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  429 13:13:48.618188  WARNING: RO_VPD is uninitialized or empty.

  430 13:13:48.621337  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  431 13:13:48.627913  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  432 13:13:48.628545  Normal boot.

  433 13:13:48.634746  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  434 13:13:48.638156  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  435 13:13:48.641611  CBFS @ c08000 size 3f8000

  436 13:13:48.647703  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  437 13:13:48.651170  CBFS: Locating 'cpu_microcode_blob.bin'

  438 13:13:48.654336  CBFS: Found @ offset 14700 size 2ec00

  439 13:13:48.657727  microcode: sig=0x806ec pf=0x4 revision=0xc9

  440 13:13:48.660986  Skip microcode update

  441 13:13:48.664661  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  442 13:13:48.668078  CBFS @ c08000 size 3f8000

  443 13:13:48.674195  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  444 13:13:48.677844  CBFS: Locating 'fsps.bin'

  445 13:13:48.680884  CBFS: Found @ offset d1fc0 size 35000

  446 13:13:48.706209  Detected 4 core, 8 thread CPU.

  447 13:13:48.709716  Setting up SMI for CPU

  448 13:13:48.712623  IED base = 0x9ac00000

  449 13:13:48.712717  IED size = 0x00400000

  450 13:13:48.716169  Will perform SMM setup.

  451 13:13:48.722496  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  452 13:13:48.729301  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  453 13:13:48.732548  Processing 16 relocs. Offset value of 0x00030000

  454 13:13:48.736049  Attempting to start 7 APs

  455 13:13:48.739813  Waiting for 10ms after sending INIT.

  456 13:13:48.755894  Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.

  457 13:13:48.756017  done.

  458 13:13:48.759415  AP: slot 6 apic_id 4.

  459 13:13:48.762279  AP: slot 5 apic_id 5.

  460 13:13:48.762389  AP: slot 4 apic_id 3.

  461 13:13:48.765928  AP: slot 1 apic_id 2.

  462 13:13:48.769031  Waiting for 2nd SIPI to complete...done.

  463 13:13:48.772436  AP: slot 7 apic_id 7.

  464 13:13:48.775688  AP: slot 2 apic_id 6.

  465 13:13:48.782248  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  466 13:13:48.788943  Processing 13 relocs. Offset value of 0x00038000

  467 13:13:48.791989  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  468 13:13:48.798707  Installing SMM handler to 0x9a000000

  469 13:13:48.805564  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  470 13:13:48.811996  Processing 658 relocs. Offset value of 0x9a010000

  471 13:13:48.818707  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  472 13:13:48.821835  Processing 13 relocs. Offset value of 0x9a008000

  473 13:13:48.828447  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  474 13:13:48.835099  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  475 13:13:48.841633  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  476 13:13:48.845332  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  477 13:13:48.851637  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  478 13:13:48.858228  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  479 13:13:48.861718  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  480 13:13:48.868481  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  481 13:13:48.871596  Clearing SMI status registers

  482 13:13:48.875114  SMI_STS: PM1 

  483 13:13:48.875197  PM1_STS: PWRBTN 

  484 13:13:48.878592  TCO_STS: SECOND_TO 

  485 13:13:48.881699  New SMBASE 0x9a000000

  486 13:13:48.885353  In relocation handler: CPU 0

  487 13:13:48.888661  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  488 13:13:48.891989  Writing SMRR. base = 0x9a000006, mask=0xff000800

  489 13:13:48.894987  Relocation complete.

  490 13:13:48.898132  New SMBASE 0x99fff400

  491 13:13:48.898217  In relocation handler: CPU 3

  492 13:13:48.904952  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  493 13:13:48.908605  Writing SMRR. base = 0x9a000006, mask=0xff000800

  494 13:13:48.911661  Relocation complete.

  495 13:13:48.915053  New SMBASE 0x99fff800

  496 13:13:48.915139  In relocation handler: CPU 2

  497 13:13:48.921618  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  498 13:13:48.924749  Writing SMRR. base = 0x9a000006, mask=0xff000800

  499 13:13:48.928304  Relocation complete.

  500 13:13:48.928421  New SMBASE 0x99ffe400

  501 13:13:48.931586  In relocation handler: CPU 7

  502 13:13:48.938281  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  503 13:13:48.941774  Writing SMRR. base = 0x9a000006, mask=0xff000800

  504 13:13:48.944865  Relocation complete.

  505 13:13:48.944949  New SMBASE 0x99ffec00

  506 13:13:48.948346  In relocation handler: CPU 5

  507 13:13:48.951751  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  508 13:13:48.958216  Writing SMRR. base = 0x9a000006, mask=0xff000800

  509 13:13:48.961870  Relocation complete.

  510 13:13:48.961955  New SMBASE 0x99ffe800

  511 13:13:48.965062  In relocation handler: CPU 6

  512 13:13:48.968119  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  513 13:13:48.974840  Writing SMRR. base = 0x9a000006, mask=0xff000800

  514 13:13:48.978038  Relocation complete.

  515 13:13:48.978122  New SMBASE 0x99fff000

  516 13:13:48.981490  In relocation handler: CPU 4

  517 13:13:48.984714  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  518 13:13:48.991543  Writing SMRR. base = 0x9a000006, mask=0xff000800

  519 13:13:48.991649  Relocation complete.

  520 13:13:48.994632  New SMBASE 0x99fffc00

  521 13:13:48.998325  In relocation handler: CPU 1

  522 13:13:49.001444  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  523 13:13:49.008277  Writing SMRR. base = 0x9a000006, mask=0xff000800

  524 13:13:49.008419  Relocation complete.

  525 13:13:49.011275  Initializing CPU #0

  526 13:13:49.014953  CPU: vendor Intel device 806ec

  527 13:13:49.017902  CPU: family 06, model 8e, stepping 0c

  528 13:13:49.021601  Clearing out pending MCEs

  529 13:13:49.024775  Setting up local APIC...

  530 13:13:49.025008   apic_id: 0x00 done.

  531 13:13:49.028147  Turbo is available but hidden

  532 13:13:49.031453  Turbo is available and visible

  533 13:13:49.034705  VMX status: enabled

  534 13:13:49.038483  IA32_FEATURE_CONTROL status: locked

  535 13:13:49.041567  Skip microcode update

  536 13:13:49.042000  CPU #0 initialized

  537 13:13:49.044752  Initializing CPU #3

  538 13:13:49.045187  Initializing CPU #4

  539 13:13:49.048283  Initializing CPU #1

  540 13:13:49.051298  CPU: vendor Intel device 806ec

  541 13:13:49.054674  CPU: family 06, model 8e, stepping 0c

  542 13:13:49.058170  CPU: vendor Intel device 806ec

  543 13:13:49.061230  CPU: family 06, model 8e, stepping 0c

  544 13:13:49.065025  Clearing out pending MCEs

  545 13:13:49.068355  Clearing out pending MCEs

  546 13:13:49.071357  Setting up local APIC...

  547 13:13:49.071793  Initializing CPU #7

  548 13:13:49.075048  Initializing CPU #2

  549 13:13:49.078132  CPU: vendor Intel device 806ec

  550 13:13:49.081289  CPU: family 06, model 8e, stepping 0c

  551 13:13:49.084945  CPU: vendor Intel device 806ec

  552 13:13:49.087918  CPU: family 06, model 8e, stepping 0c

  553 13:13:49.091109  Clearing out pending MCEs

  554 13:13:49.094616  Clearing out pending MCEs

  555 13:13:49.095052  Setting up local APIC...

  556 13:13:49.097787  CPU: vendor Intel device 806ec

  557 13:13:49.101503  CPU: family 06, model 8e, stepping 0c

  558 13:13:49.104546  Clearing out pending MCEs

  559 13:13:49.107791  Initializing CPU #5

  560 13:13:49.108257  Initializing CPU #6

  561 13:13:49.111449  CPU: vendor Intel device 806ec

  562 13:13:49.117664  CPU: family 06, model 8e, stepping 0c

  563 13:13:49.118162  CPU: vendor Intel device 806ec

  564 13:13:49.124719  CPU: family 06, model 8e, stepping 0c

  565 13:13:49.125361  Clearing out pending MCEs

  566 13:13:49.127523  Clearing out pending MCEs

  567 13:13:49.131141  Setting up local APIC...

  568 13:13:49.134511  Setting up local APIC...

  569 13:13:49.134621  Setting up local APIC...

  570 13:13:49.137781   apic_id: 0x07 done.

  571 13:13:49.141128  Setting up local APIC...

  572 13:13:49.141212   apic_id: 0x01 done.

  573 13:13:49.144522   apic_id: 0x05 done.

  574 13:13:49.147525   apic_id: 0x04 done.

  575 13:13:49.147640  VMX status: enabled

  576 13:13:49.151124  VMX status: enabled

  577 13:13:49.154320  IA32_FEATURE_CONTROL status: locked

  578 13:13:49.157573  IA32_FEATURE_CONTROL status: locked

  579 13:13:49.160892  Skip microcode update

  580 13:13:49.163867  Skip microcode update

  581 13:13:49.163964  CPU #5 initialized

  582 13:13:49.167531  CPU #6 initialized

  583 13:13:49.167640   apic_id: 0x03 done.

  584 13:13:49.170939  Setting up local APIC...

  585 13:13:49.173907   apic_id: 0x06 done.

  586 13:13:49.174017  VMX status: enabled

  587 13:13:49.177717  VMX status: enabled

  588 13:13:49.180550  VMX status: enabled

  589 13:13:49.180634   apic_id: 0x02 done.

  590 13:13:49.184400  IA32_FEATURE_CONTROL status: locked

  591 13:13:49.187392  VMX status: enabled

  592 13:13:49.190926  Skip microcode update

  593 13:13:49.194088  IA32_FEATURE_CONTROL status: locked

  594 13:13:49.194173  CPU #4 initialized

  595 13:13:49.197305  Skip microcode update

  596 13:13:49.200591  VMX status: enabled

  597 13:13:49.200688  CPU #1 initialized

  598 13:13:49.204345  IA32_FEATURE_CONTROL status: locked

  599 13:13:49.207652  IA32_FEATURE_CONTROL status: locked

  600 13:13:49.210499  IA32_FEATURE_CONTROL status: locked

  601 13:13:49.214040  Skip microcode update

  602 13:13:49.217238  Skip microcode update

  603 13:13:49.217364  CPU #7 initialized

  604 13:13:49.220408  CPU #2 initialized

  605 13:13:49.224021  Skip microcode update

  606 13:13:49.224159  CPU #3 initialized

  607 13:13:49.230305  bsp_do_flight_plan done after 457 msecs.

  608 13:13:49.230490  CPU: frequency set to 4200 MHz

  609 13:13:49.233681  Enabling SMIs.

  610 13:13:49.233865  Locking SMM.

  611 13:13:49.249727  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  612 13:13:49.253449  CBFS @ c08000 size 3f8000

  613 13:13:49.260077  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  614 13:13:49.260327  CBFS: Locating 'vbt.bin'

  615 13:13:49.263088  CBFS: Found @ offset 5f5c0 size 499

  616 13:13:49.269829  Found a VBT of 4608 bytes after decompression

  617 13:13:49.449237  Display FSP Version Info HOB

  618 13:13:49.452381  Reference Code - CPU = 9.0.1e.30

  619 13:13:49.456007  uCode Version = 0.0.0.ca

  620 13:13:49.458990  TXT ACM version = ff.ff.ff.ffff

  621 13:13:49.462585  Display FSP Version Info HOB

  622 13:13:49.465615  Reference Code - ME = 9.0.1e.30

  623 13:13:49.469005  MEBx version = 0.0.0.0

  624 13:13:49.472540  ME Firmware Version = Consumer SKU

  625 13:13:49.475789  Display FSP Version Info HOB

  626 13:13:49.479115  Reference Code - CML PCH = 9.0.1e.30

  627 13:13:49.482638  PCH-CRID Status = Disabled

  628 13:13:49.485456  PCH-CRID Original Value = ff.ff.ff.ffff

  629 13:13:49.488816  PCH-CRID New Value = ff.ff.ff.ffff

  630 13:13:49.492532  OPROM - RST - RAID = ff.ff.ff.ffff

  631 13:13:49.495711  ChipsetInit Base Version = ff.ff.ff.ffff

  632 13:13:49.498769  ChipsetInit Oem Version = ff.ff.ff.ffff

  633 13:13:49.502388  Display FSP Version Info HOB

  634 13:13:49.509074  Reference Code - SA - System Agent = 9.0.1e.30

  635 13:13:49.512449  Reference Code - MRC = 0.7.1.6c

  636 13:13:49.512560  SA - PCIe Version = 9.0.1e.30

  637 13:13:49.515502  SA-CRID Status = Disabled

  638 13:13:49.519040  SA-CRID Original Value = 0.0.0.c

  639 13:13:49.522262  SA-CRID New Value = 0.0.0.c

  640 13:13:49.525424  OPROM - VBIOS = ff.ff.ff.ffff

  641 13:13:49.528762  RTC Init

  642 13:13:49.532360  Set power on after power failure.

  643 13:13:49.532444  Disabling Deep S3

  644 13:13:49.535560  Disabling Deep S3

  645 13:13:49.535643  Disabling Deep S4

  646 13:13:49.539077  Disabling Deep S4

  647 13:13:49.539161  Disabling Deep S5

  648 13:13:49.542139  Disabling Deep S5

  649 13:13:49.548763  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 190 exit 1

  650 13:13:49.548848  Enumerating buses...

  651 13:13:49.555617  Show all devs... Before device enumeration.

  652 13:13:49.555701  Root Device: enabled 1

  653 13:13:49.558775  CPU_CLUSTER: 0: enabled 1

  654 13:13:49.561996  DOMAIN: 0000: enabled 1

  655 13:13:49.565463  APIC: 00: enabled 1

  656 13:13:49.565546  PCI: 00:00.0: enabled 1

  657 13:13:49.568614  PCI: 00:02.0: enabled 1

  658 13:13:49.572278  PCI: 00:04.0: enabled 0

  659 13:13:49.572363  PCI: 00:05.0: enabled 0

  660 13:13:49.575466  PCI: 00:12.0: enabled 1

  661 13:13:49.579050  PCI: 00:12.5: enabled 0

  662 13:13:49.581799  PCI: 00:12.6: enabled 0

  663 13:13:49.581884  PCI: 00:14.0: enabled 1

  664 13:13:49.585330  PCI: 00:14.1: enabled 0

  665 13:13:49.588480  PCI: 00:14.3: enabled 1

  666 13:13:49.591918  PCI: 00:14.5: enabled 0

  667 13:13:49.592003  PCI: 00:15.0: enabled 1

  668 13:13:49.595141  PCI: 00:15.1: enabled 1

  669 13:13:49.598526  PCI: 00:15.2: enabled 0

  670 13:13:49.601801  PCI: 00:15.3: enabled 0

  671 13:13:49.601886  PCI: 00:16.0: enabled 1

  672 13:13:49.605302  PCI: 00:16.1: enabled 0

  673 13:13:49.608298  PCI: 00:16.2: enabled 0

  674 13:13:49.611996  PCI: 00:16.3: enabled 0

  675 13:13:49.612110  PCI: 00:16.4: enabled 0

  676 13:13:49.614981  PCI: 00:16.5: enabled 0

  677 13:13:49.618585  PCI: 00:17.0: enabled 1

  678 13:13:49.618700  PCI: 00:19.0: enabled 1

  679 13:13:49.621632  PCI: 00:19.1: enabled 0

  680 13:13:49.624783  PCI: 00:19.2: enabled 0

  681 13:13:49.628608  PCI: 00:1a.0: enabled 0

  682 13:13:49.628692  PCI: 00:1c.0: enabled 0

  683 13:13:49.631355  PCI: 00:1c.1: enabled 0

  684 13:13:49.635202  PCI: 00:1c.2: enabled 0

  685 13:13:49.638204  PCI: 00:1c.3: enabled 0

  686 13:13:49.638288  PCI: 00:1c.4: enabled 0

  687 13:13:49.641986  PCI: 00:1c.5: enabled 0

  688 13:13:49.644868  PCI: 00:1c.6: enabled 0

  689 13:13:49.648022  PCI: 00:1c.7: enabled 0

  690 13:13:49.648107  PCI: 00:1d.0: enabled 1

  691 13:13:49.651609  PCI: 00:1d.1: enabled 0

  692 13:13:49.654929  PCI: 00:1d.2: enabled 0

  693 13:13:49.655014  PCI: 00:1d.3: enabled 0

  694 13:13:49.658033  PCI: 00:1d.4: enabled 0

  695 13:13:49.661638  PCI: 00:1d.5: enabled 1

  696 13:13:49.664945  PCI: 00:1e.0: enabled 1

  697 13:13:49.665030  PCI: 00:1e.1: enabled 0

  698 13:13:49.668458  PCI: 00:1e.2: enabled 1

  699 13:13:49.671447  PCI: 00:1e.3: enabled 1

  700 13:13:49.674979  PCI: 00:1f.0: enabled 1

  701 13:13:49.675064  PCI: 00:1f.1: enabled 1

  702 13:13:49.678046  PCI: 00:1f.2: enabled 1

  703 13:13:49.681568  PCI: 00:1f.3: enabled 1

  704 13:13:49.681653  PCI: 00:1f.4: enabled 1

  705 13:13:49.685027  PCI: 00:1f.5: enabled 1

  706 13:13:49.688126  PCI: 00:1f.6: enabled 0

  707 13:13:49.691418  USB0 port 0: enabled 1

  708 13:13:49.691503  I2C: 00:15: enabled 1

  709 13:13:49.694930  I2C: 00:5d: enabled 1

  710 13:13:49.697890  GENERIC: 0.0: enabled 1

  711 13:13:49.697976  I2C: 00:1a: enabled 1

  712 13:13:49.701403  I2C: 00:38: enabled 1

  713 13:13:49.704728  I2C: 00:39: enabled 1

  714 13:13:49.704820  I2C: 00:3a: enabled 1

  715 13:13:49.707996  I2C: 00:3b: enabled 1

  716 13:13:49.711326  PCI: 00:00.0: enabled 1

  717 13:13:49.711400  SPI: 00: enabled 1

  718 13:13:49.714558  SPI: 01: enabled 1

  719 13:13:49.717955  PNP: 0c09.0: enabled 1

  720 13:13:49.718055  USB2 port 0: enabled 1

  721 13:13:49.721011  USB2 port 1: enabled 1

  722 13:13:49.724463  USB2 port 2: enabled 0

  723 13:13:49.727629  USB2 port 3: enabled 0

  724 13:13:49.727729  USB2 port 5: enabled 0

  725 13:13:49.731404  USB2 port 6: enabled 1

  726 13:13:49.734377  USB2 port 9: enabled 1

  727 13:13:49.734450  USB3 port 0: enabled 1

  728 13:13:49.737610  USB3 port 1: enabled 1

  729 13:13:49.741154  USB3 port 2: enabled 1

  730 13:13:49.744541  USB3 port 3: enabled 1

  731 13:13:49.744617  USB3 port 4: enabled 0

  732 13:13:49.747500  APIC: 02: enabled 1

  733 13:13:49.747598  APIC: 06: enabled 1

  734 13:13:49.751023  APIC: 01: enabled 1

  735 13:13:49.754298  APIC: 03: enabled 1

  736 13:13:49.754368  APIC: 05: enabled 1

  737 13:13:49.757384  APIC: 04: enabled 1

  738 13:13:49.761029  APIC: 07: enabled 1

  739 13:13:49.761099  Compare with tree...

  740 13:13:49.764131  Root Device: enabled 1

  741 13:13:49.767778   CPU_CLUSTER: 0: enabled 1

  742 13:13:49.767910    APIC: 00: enabled 1

  743 13:13:49.770813    APIC: 02: enabled 1

  744 13:13:49.774341    APIC: 06: enabled 1

  745 13:13:49.774415    APIC: 01: enabled 1

  746 13:13:49.777406    APIC: 03: enabled 1

  747 13:13:49.780702    APIC: 05: enabled 1

  748 13:13:49.780779    APIC: 04: enabled 1

  749 13:13:49.783891    APIC: 07: enabled 1

  750 13:13:49.787492   DOMAIN: 0000: enabled 1

  751 13:13:49.790846    PCI: 00:00.0: enabled 1

  752 13:13:49.790921    PCI: 00:02.0: enabled 1

  753 13:13:49.793959    PCI: 00:04.0: enabled 0

  754 13:13:49.797476    PCI: 00:05.0: enabled 0

  755 13:13:49.800981    PCI: 00:12.0: enabled 1

  756 13:13:49.804081    PCI: 00:12.5: enabled 0

  757 13:13:49.804153    PCI: 00:12.6: enabled 0

  758 13:13:49.807649    PCI: 00:14.0: enabled 1

  759 13:13:49.811039     USB0 port 0: enabled 1

  760 13:13:49.814368      USB2 port 0: enabled 1

  761 13:13:49.817636      USB2 port 1: enabled 1

  762 13:13:49.817714      USB2 port 2: enabled 0

  763 13:13:49.821008      USB2 port 3: enabled 0

  764 13:13:49.824072      USB2 port 5: enabled 0

  765 13:13:49.827371      USB2 port 6: enabled 1

  766 13:13:49.830744      USB2 port 9: enabled 1

  767 13:13:49.830846      USB3 port 0: enabled 1

  768 13:13:49.834498      USB3 port 1: enabled 1

  769 13:13:49.837541      USB3 port 2: enabled 1

  770 13:13:49.840539      USB3 port 3: enabled 1

  771 13:13:49.844311      USB3 port 4: enabled 0

  772 13:13:49.847465    PCI: 00:14.1: enabled 0

  773 13:13:49.847566    PCI: 00:14.3: enabled 1

  774 13:13:49.850728    PCI: 00:14.5: enabled 0

  775 13:13:49.854168    PCI: 00:15.0: enabled 1

  776 13:13:49.857085     I2C: 00:15: enabled 1

  777 13:13:49.860831    PCI: 00:15.1: enabled 1

  778 13:13:49.860933     I2C: 00:5d: enabled 1

  779 13:13:49.864045     GENERIC: 0.0: enabled 1

  780 13:13:49.867114    PCI: 00:15.2: enabled 0

  781 13:13:49.870410    PCI: 00:15.3: enabled 0

  782 13:13:49.870526    PCI: 00:16.0: enabled 1

  783 13:13:49.873950    PCI: 00:16.1: enabled 0

  784 13:13:49.877566    PCI: 00:16.2: enabled 0

  785 13:13:49.880811    PCI: 00:16.3: enabled 0

  786 13:13:49.883697    PCI: 00:16.4: enabled 0

  787 13:13:49.883824    PCI: 00:16.5: enabled 0

  788 13:13:49.887539    PCI: 00:17.0: enabled 1

  789 13:13:49.889926    PCI: 00:19.0: enabled 1

  790 13:13:49.893413     I2C: 00:1a: enabled 1

  791 13:13:49.897151     I2C: 00:38: enabled 1

  792 13:13:49.897265     I2C: 00:39: enabled 1

  793 13:13:49.900073     I2C: 00:3a: enabled 1

  794 13:13:49.903614     I2C: 00:3b: enabled 1

  795 13:13:49.906757    PCI: 00:19.1: enabled 0

  796 13:13:49.910015    PCI: 00:19.2: enabled 0

  797 13:13:49.910118    PCI: 00:1a.0: enabled 0

  798 13:13:49.913151    PCI: 00:1c.0: enabled 0

  799 13:13:49.916514    PCI: 00:1c.1: enabled 0

  800 13:13:49.920095    PCI: 00:1c.2: enabled 0

  801 13:13:49.920169    PCI: 00:1c.3: enabled 0

  802 13:13:49.923409    PCI: 00:1c.4: enabled 0

  803 13:13:49.926798    PCI: 00:1c.5: enabled 0

  804 13:13:49.930086    PCI: 00:1c.6: enabled 0

  805 13:13:49.933087    PCI: 00:1c.7: enabled 0

  806 13:13:49.933160    PCI: 00:1d.0: enabled 1

  807 13:13:49.936432    PCI: 00:1d.1: enabled 0

  808 13:13:49.940178    PCI: 00:1d.2: enabled 0

  809 13:13:49.943378    PCI: 00:1d.3: enabled 0

  810 13:13:49.946355    PCI: 00:1d.4: enabled 0

  811 13:13:49.946428    PCI: 00:1d.5: enabled 1

  812 13:13:49.949997     PCI: 00:00.0: enabled 1

  813 13:13:49.953356    PCI: 00:1e.0: enabled 1

  814 13:13:49.956344    PCI: 00:1e.1: enabled 0

  815 13:13:49.959847    PCI: 00:1e.2: enabled 1

  816 13:13:49.959948     SPI: 00: enabled 1

  817 13:13:49.963023    PCI: 00:1e.3: enabled 1

  818 13:13:49.966564     SPI: 01: enabled 1

  819 13:13:49.969843    PCI: 00:1f.0: enabled 1

  820 13:13:49.969927     PNP: 0c09.0: enabled 1

  821 13:13:49.972992    PCI: 00:1f.1: enabled 1

  822 13:13:49.976085    PCI: 00:1f.2: enabled 1

  823 13:13:49.979581    PCI: 00:1f.3: enabled 1

  824 13:13:49.983076    PCI: 00:1f.4: enabled 1

  825 13:13:49.983152    PCI: 00:1f.5: enabled 1

  826 13:13:49.986279    PCI: 00:1f.6: enabled 0

  827 13:13:49.989605  Root Device scanning...

  828 13:13:49.993288  scan_static_bus for Root Device

  829 13:13:49.996188  CPU_CLUSTER: 0 enabled

  830 13:13:49.996279  DOMAIN: 0000 enabled

  831 13:13:49.999556  DOMAIN: 0000 scanning...

  832 13:13:50.003100  PCI: pci_scan_bus for bus 00

  833 13:13:50.006069  PCI: 00:00.0 [8086/0000] ops

  834 13:13:50.009551  PCI: 00:00.0 [8086/9b61] enabled

  835 13:13:50.012700  PCI: 00:02.0 [8086/0000] bus ops

  836 13:13:50.016009  PCI: 00:02.0 [8086/9b41] enabled

  837 13:13:50.019511  PCI: 00:04.0 [8086/1903] disabled

  838 13:13:50.022675  PCI: 00:08.0 [8086/1911] enabled

  839 13:13:50.026400  PCI: 00:12.0 [8086/02f9] enabled

  840 13:13:50.029424  PCI: 00:14.0 [8086/0000] bus ops

  841 13:13:50.032874  PCI: 00:14.0 [8086/02ed] enabled

  842 13:13:50.036371  PCI: 00:14.2 [8086/02ef] enabled

  843 13:13:50.039405  PCI: 00:14.3 [8086/02f0] enabled

  844 13:13:50.043038  PCI: 00:15.0 [8086/0000] bus ops

  845 13:13:50.046298  PCI: 00:15.0 [8086/02e8] enabled

  846 13:13:50.049381  PCI: 00:15.1 [8086/0000] bus ops

  847 13:13:50.053017  PCI: 00:15.1 [8086/02e9] enabled

  848 13:13:50.056200  PCI: 00:16.0 [8086/0000] ops

  849 13:13:50.059188  PCI: 00:16.0 [8086/02e0] enabled

  850 13:13:50.062551  PCI: 00:17.0 [8086/0000] ops

  851 13:13:50.065777  PCI: 00:17.0 [8086/02d3] enabled

  852 13:13:50.069550  PCI: 00:19.0 [8086/0000] bus ops

  853 13:13:50.072504  PCI: 00:19.0 [8086/02c5] enabled

  854 13:13:50.075767  PCI: 00:1d.0 [8086/0000] bus ops

  855 13:13:50.079441  PCI: 00:1d.0 [8086/02b0] enabled

  856 13:13:50.082458  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  857 13:13:50.085987  PCI: 00:1e.0 [8086/0000] ops

  858 13:13:50.089075  PCI: 00:1e.0 [8086/02a8] enabled

  859 13:13:50.092741  PCI: 00:1e.2 [8086/0000] bus ops

  860 13:13:50.095937  PCI: 00:1e.2 [8086/02aa] enabled

  861 13:13:50.098916  PCI: 00:1e.3 [8086/0000] bus ops

  862 13:13:50.102401  PCI: 00:1e.3 [8086/02ab] enabled

  863 13:13:50.105958  PCI: 00:1f.0 [8086/0000] bus ops

  864 13:13:50.108993  PCI: 00:1f.0 [8086/0284] enabled

  865 13:13:50.115927  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  866 13:13:50.122358  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  867 13:13:50.125559  PCI: 00:1f.3 [8086/0000] bus ops

  868 13:13:50.129335  PCI: 00:1f.3 [8086/02c8] enabled

  869 13:13:50.132128  PCI: 00:1f.4 [8086/0000] bus ops

  870 13:13:50.135677  PCI: 00:1f.4 [8086/02a3] enabled

  871 13:13:50.138900  PCI: 00:1f.5 [8086/0000] bus ops

  872 13:13:50.142364  PCI: 00:1f.5 [8086/02a4] enabled

  873 13:13:50.145533  PCI: Leftover static devices:

  874 13:13:50.145611  PCI: 00:05.0

  875 13:13:50.145695  PCI: 00:12.5

  876 13:13:50.149127  PCI: 00:12.6

  877 13:13:50.149200  PCI: 00:14.1

  878 13:13:50.152584  PCI: 00:14.5

  879 13:13:50.152659  PCI: 00:15.2

  880 13:13:50.155629  PCI: 00:15.3

  881 13:13:50.155696  PCI: 00:16.1

  882 13:13:50.155756  PCI: 00:16.2

  883 13:13:50.158871  PCI: 00:16.3

  884 13:13:50.158949  PCI: 00:16.4

  885 13:13:50.162537  PCI: 00:16.5

  886 13:13:50.162615  PCI: 00:19.1

  887 13:13:50.162684  PCI: 00:19.2

  888 13:13:50.165550  PCI: 00:1a.0

  889 13:13:50.165627  PCI: 00:1c.0

  890 13:13:50.169038  PCI: 00:1c.1

  891 13:13:50.169143  PCI: 00:1c.2

  892 13:13:50.169240  PCI: 00:1c.3

  893 13:13:50.172259  PCI: 00:1c.4

  894 13:13:50.172332  PCI: 00:1c.5

  895 13:13:50.175446  PCI: 00:1c.6

  896 13:13:50.175516  PCI: 00:1c.7

  897 13:13:50.179150  PCI: 00:1d.1

  898 13:13:50.179222  PCI: 00:1d.2

  899 13:13:50.179287  PCI: 00:1d.3

  900 13:13:50.182129  PCI: 00:1d.4

  901 13:13:50.182201  PCI: 00:1d.5

  902 13:13:50.185679  PCI: 00:1e.1

  903 13:13:50.185753  PCI: 00:1f.1

  904 13:13:50.185815  PCI: 00:1f.2

  905 13:13:50.189110  PCI: 00:1f.6

  906 13:13:50.192232  PCI: Check your devicetree.cb.

  907 13:13:50.192309  PCI: 00:02.0 scanning...

  908 13:13:50.198991  scan_generic_bus for PCI: 00:02.0

  909 13:13:50.202453  scan_generic_bus for PCI: 00:02.0 done

  910 13:13:50.205966  scan_bus: scanning of bus PCI: 00:02.0 took 10187 usecs

  911 13:13:50.208954  PCI: 00:14.0 scanning...

  912 13:13:50.212477  scan_static_bus for PCI: 00:14.0

  913 13:13:50.215552  USB0 port 0 enabled

  914 13:13:50.219226  USB0 port 0 scanning...

  915 13:13:50.222289  scan_static_bus for USB0 port 0

  916 13:13:50.222397  USB2 port 0 enabled

  917 13:13:50.225821  USB2 port 1 enabled

  918 13:13:50.228759  USB2 port 2 disabled

  919 13:13:50.228836  USB2 port 3 disabled

  920 13:13:50.232316  USB2 port 5 disabled

  921 13:13:50.232394  USB2 port 6 enabled

  922 13:13:50.235451  USB2 port 9 enabled

  923 13:13:50.238978  USB3 port 0 enabled

  924 13:13:50.239054  USB3 port 1 enabled

  925 13:13:50.241878  USB3 port 2 enabled

  926 13:13:50.245380  USB3 port 3 enabled

  927 13:13:50.245453  USB3 port 4 disabled

  928 13:13:50.248950  USB2 port 0 scanning...

  929 13:13:50.252174  scan_static_bus for USB2 port 0

  930 13:13:50.255483  scan_static_bus for USB2 port 0 done

  931 13:13:50.261811  scan_bus: scanning of bus USB2 port 0 took 9699 usecs

  932 13:13:50.261887  USB2 port 1 scanning...

  933 13:13:50.265486  scan_static_bus for USB2 port 1

  934 13:13:50.271802  scan_static_bus for USB2 port 1 done

  935 13:13:50.275407  scan_bus: scanning of bus USB2 port 1 took 9710 usecs

  936 13:13:50.279019  USB2 port 6 scanning...

  937 13:13:50.282093  scan_static_bus for USB2 port 6

  938 13:13:50.285252  scan_static_bus for USB2 port 6 done

  939 13:13:50.291984  scan_bus: scanning of bus USB2 port 6 took 9712 usecs

  940 13:13:50.292061  USB2 port 9 scanning...

  941 13:13:50.295490  scan_static_bus for USB2 port 9

  942 13:13:50.302113  scan_static_bus for USB2 port 9 done

  943 13:13:50.305384  scan_bus: scanning of bus USB2 port 9 took 9700 usecs

  944 13:13:50.308932  USB3 port 0 scanning...

  945 13:13:50.311936  scan_static_bus for USB3 port 0

  946 13:13:50.315521  scan_static_bus for USB3 port 0 done

  947 13:13:50.321867  scan_bus: scanning of bus USB3 port 0 took 9707 usecs

  948 13:13:50.324946  USB3 port 1 scanning...

  949 13:13:50.328421  scan_static_bus for USB3 port 1

  950 13:13:50.331548  scan_static_bus for USB3 port 1 done

  951 13:13:50.334934  scan_bus: scanning of bus USB3 port 1 took 9711 usecs

  952 13:13:50.338535  USB3 port 2 scanning...

  953 13:13:50.341414  scan_static_bus for USB3 port 2

  954 13:13:50.344936  scan_static_bus for USB3 port 2 done

  955 13:13:50.351447  scan_bus: scanning of bus USB3 port 2 took 9700 usecs

  956 13:13:50.355072  USB3 port 3 scanning...

  957 13:13:50.358364  scan_static_bus for USB3 port 3

  958 13:13:50.361458  scan_static_bus for USB3 port 3 done

  959 13:13:50.364638  scan_bus: scanning of bus USB3 port 3 took 9691 usecs

  960 13:13:50.368503  scan_static_bus for USB0 port 0 done

  961 13:13:50.374610  scan_bus: scanning of bus USB0 port 0 took 155410 usecs

  962 13:13:50.378305  scan_static_bus for PCI: 00:14.0 done

  963 13:13:50.384635  scan_bus: scanning of bus PCI: 00:14.0 took 173041 usecs

  964 13:13:50.387739  PCI: 00:15.0 scanning...

  965 13:13:50.391436  scan_generic_bus for PCI: 00:15.0

  966 13:13:50.394626  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

  967 13:13:50.398196  scan_generic_bus for PCI: 00:15.0 done

  968 13:13:50.404537  scan_bus: scanning of bus PCI: 00:15.0 took 14303 usecs

  969 13:13:50.407681  PCI: 00:15.1 scanning...

  970 13:13:50.411264  scan_generic_bus for PCI: 00:15.1

  971 13:13:50.414375  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

  972 13:13:50.417485  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

  973 13:13:50.424345  scan_generic_bus for PCI: 00:15.1 done

  974 13:13:50.427565  scan_bus: scanning of bus PCI: 00:15.1 took 18615 usecs

  975 13:13:50.431169  PCI: 00:19.0 scanning...

  976 13:13:50.434113  scan_generic_bus for PCI: 00:19.0

  977 13:13:50.437654  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

  978 13:13:50.444099  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

  979 13:13:50.447591  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

  980 13:13:50.450844  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

  981 13:13:50.454157  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

  982 13:13:50.460989  scan_generic_bus for PCI: 00:19.0 done

  983 13:13:50.464102  scan_bus: scanning of bus PCI: 00:19.0 took 30714 usecs

  984 13:13:50.467273  PCI: 00:1d.0 scanning...

  985 13:13:50.470857  do_pci_scan_bridge for PCI: 00:1d.0

  986 13:13:50.474073  PCI: pci_scan_bus for bus 01

  987 13:13:50.477053  PCI: 01:00.0 [1c5c/1327] enabled

  988 13:13:50.480755  Enabling Common Clock Configuration

  989 13:13:50.484025  L1 Sub-State supported from root port 29

  990 13:13:50.487068  L1 Sub-State Support = 0xf

  991 13:13:50.490414  CommonModeRestoreTime = 0x28

  992 13:13:50.497226  Power On Value = 0x16, Power On Scale = 0x0

  993 13:13:50.497309  ASPM: Enabled L1

  994 13:13:50.503861  scan_bus: scanning of bus PCI: 00:1d.0 took 32801 usecs

  995 13:13:50.507105  PCI: 00:1e.2 scanning...

  996 13:13:50.510333  scan_generic_bus for PCI: 00:1e.2

  997 13:13:50.513868  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

  998 13:13:50.517008  scan_generic_bus for PCI: 00:1e.2 done

  999 13:13:50.523520  scan_bus: scanning of bus PCI: 00:1e.2 took 14008 usecs

 1000 13:13:50.523626  PCI: 00:1e.3 scanning...

 1001 13:13:50.530024  scan_generic_bus for PCI: 00:1e.3

 1002 13:13:50.533743  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1003 13:13:50.536551  scan_generic_bus for PCI: 00:1e.3 done

 1004 13:13:50.543772  scan_bus: scanning of bus PCI: 00:1e.3 took 14012 usecs

 1005 13:13:50.543879  PCI: 00:1f.0 scanning...

 1006 13:13:50.546965  scan_static_bus for PCI: 00:1f.0

 1007 13:13:50.549843  PNP: 0c09.0 enabled

 1008 13:13:50.553489  scan_static_bus for PCI: 00:1f.0 done

 1009 13:13:50.559797  scan_bus: scanning of bus PCI: 00:1f.0 took 12043 usecs

 1010 13:13:50.563015  PCI: 00:1f.3 scanning...

 1011 13:13:50.566230  scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs

 1012 13:13:50.570055  PCI: 00:1f.4 scanning...

 1013 13:13:50.573327  scan_generic_bus for PCI: 00:1f.4

 1014 13:13:50.576330  scan_generic_bus for PCI: 00:1f.4 done

 1015 13:13:50.583251  scan_bus: scanning of bus PCI: 00:1f.4 took 10188 usecs

 1016 13:13:50.586312  PCI: 00:1f.5 scanning...

 1017 13:13:50.590046  scan_generic_bus for PCI: 00:1f.5

 1018 13:13:50.593142  scan_generic_bus for PCI: 00:1f.5 done

 1019 13:13:50.600019  scan_bus: scanning of bus PCI: 00:1f.5 took 10188 usecs

 1020 13:13:50.603219  scan_bus: scanning of bus DOMAIN: 0000 took 605175 usecs

 1021 13:13:50.609611  scan_static_bus for Root Device done

 1022 13:13:50.613131  scan_bus: scanning of bus Root Device took 625053 usecs

 1023 13:13:50.616228  done

 1024 13:13:50.616301  Chrome EC: UHEPI supported

 1025 13:13:50.622776  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1026 13:13:50.629773  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1027 13:13:50.636156  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1028 13:13:50.643177  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1029 13:13:50.646507  SPI flash protection: WPSW=0 SRP0=0

 1030 13:13:50.653013  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1031 13:13:50.655952  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1032 13:13:50.659544  found VGA at PCI: 00:02.0

 1033 13:13:50.662971  Setting up VGA for PCI: 00:02.0

 1034 13:13:50.669213  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1035 13:13:50.672883  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1036 13:13:50.676015  Allocating resources...

 1037 13:13:50.676118  Reading resources...

 1038 13:13:50.682800  Root Device read_resources bus 0 link: 0

 1039 13:13:50.685667  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1040 13:13:50.692677  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1041 13:13:50.696085  DOMAIN: 0000 read_resources bus 0 link: 0

 1042 13:13:50.702722  PCI: 00:14.0 read_resources bus 0 link: 0

 1043 13:13:50.706011  USB0 port 0 read_resources bus 0 link: 0

 1044 13:13:50.714272  USB0 port 0 read_resources bus 0 link: 0 done

 1045 13:13:50.717445  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1046 13:13:50.724782  PCI: 00:15.0 read_resources bus 1 link: 0

 1047 13:13:50.727824  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1048 13:13:50.734897  PCI: 00:15.1 read_resources bus 2 link: 0

 1049 13:13:50.738123  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1050 13:13:50.745543  PCI: 00:19.0 read_resources bus 3 link: 0

 1051 13:13:50.752039  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1052 13:13:50.755536  PCI: 00:1d.0 read_resources bus 1 link: 0

 1053 13:13:50.762258  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1054 13:13:50.765374  PCI: 00:1e.2 read_resources bus 4 link: 0

 1055 13:13:50.771993  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1056 13:13:50.775372  PCI: 00:1e.3 read_resources bus 5 link: 0

 1057 13:13:50.782359  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1058 13:13:50.785722  PCI: 00:1f.0 read_resources bus 0 link: 0

 1059 13:13:50.792126  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1060 13:13:50.798548  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1061 13:13:50.802379  Root Device read_resources bus 0 link: 0 done

 1062 13:13:50.805131  Done reading resources.

 1063 13:13:50.808796  Show resources in subtree (Root Device)...After reading.

 1064 13:13:50.815418   Root Device child on link 0 CPU_CLUSTER: 0

 1065 13:13:50.818435    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1066 13:13:50.818526     APIC: 00

 1067 13:13:50.822160     APIC: 02

 1068 13:13:50.822242     APIC: 06

 1069 13:13:50.825397     APIC: 01

 1070 13:13:50.825480     APIC: 03

 1071 13:13:50.825545     APIC: 05

 1072 13:13:50.828497     APIC: 04

 1073 13:13:50.828579     APIC: 07

 1074 13:13:50.832085    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1075 13:13:50.841617    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1076 13:13:50.897941    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1077 13:13:50.898080     PCI: 00:00.0

 1078 13:13:50.898808     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1079 13:13:50.898913     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1080 13:13:50.899218     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1081 13:13:50.899310     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1082 13:13:50.925774     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1083 13:13:50.926071     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1084 13:13:50.926322     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1085 13:13:50.929270     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1086 13:13:50.939148     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1087 13:13:50.946073     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1088 13:13:50.956168     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1089 13:13:50.966029     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1090 13:13:50.975882     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1091 13:13:50.986060     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1092 13:13:50.996157     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1093 13:13:51.002298     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1094 13:13:51.006005     PCI: 00:02.0

 1095 13:13:51.015556     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1096 13:13:51.025818     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1097 13:13:51.035607     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1098 13:13:51.035697     PCI: 00:04.0

 1099 13:13:51.038613     PCI: 00:08.0

 1100 13:13:51.048910     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1101 13:13:51.048999     PCI: 00:12.0

 1102 13:13:51.058850     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1103 13:13:51.065310     PCI: 00:14.0 child on link 0 USB0 port 0

 1104 13:13:51.075308     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1105 13:13:51.078422      USB0 port 0 child on link 0 USB2 port 0

 1106 13:13:51.078510       USB2 port 0

 1107 13:13:51.081923       USB2 port 1

 1108 13:13:51.082005       USB2 port 2

 1109 13:13:51.085262       USB2 port 3

 1110 13:13:51.088258       USB2 port 5

 1111 13:13:51.088341       USB2 port 6

 1112 13:13:51.091403       USB2 port 9

 1113 13:13:51.091485       USB3 port 0

 1114 13:13:51.095077       USB3 port 1

 1115 13:13:51.095159       USB3 port 2

 1116 13:13:51.098133       USB3 port 3

 1117 13:13:51.098215       USB3 port 4

 1118 13:13:51.101683     PCI: 00:14.2

 1119 13:13:51.111717     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1120 13:13:51.121515     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1121 13:13:51.121600     PCI: 00:14.3

 1122 13:13:51.131547     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1123 13:13:51.138220     PCI: 00:15.0 child on link 0 I2C: 01:15

 1124 13:13:51.147972     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1125 13:13:51.148057      I2C: 01:15

 1126 13:13:51.151501     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1127 13:13:51.161189     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1128 13:13:51.164425      I2C: 02:5d

 1129 13:13:51.164509      GENERIC: 0.0

 1130 13:13:51.167826     PCI: 00:16.0

 1131 13:13:51.177767     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1132 13:13:51.177859     PCI: 00:17.0

 1133 13:13:51.187613     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1134 13:13:51.197487     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1135 13:13:51.204310     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1136 13:13:51.214101     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1137 13:13:51.220960     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1138 13:13:51.231062     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1139 13:13:51.234030     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1140 13:13:51.244367     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1141 13:13:51.247279      I2C: 03:1a

 1142 13:13:51.247384      I2C: 03:38

 1143 13:13:51.250801      I2C: 03:39

 1144 13:13:51.250902      I2C: 03:3a

 1145 13:13:51.253811      I2C: 03:3b

 1146 13:13:51.257412     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1147 13:13:51.267292     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1148 13:13:51.277225     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1149 13:13:51.283894     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1150 13:13:51.287001      PCI: 01:00.0

 1151 13:13:51.297404      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1152 13:13:51.297519     PCI: 00:1e.0

 1153 13:13:51.310589     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1154 13:13:51.320452     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1155 13:13:51.323592     PCI: 00:1e.2 child on link 0 SPI: 00

 1156 13:13:51.333813     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1157 13:13:51.333899      SPI: 00

 1158 13:13:51.337513     PCI: 00:1e.3 child on link 0 SPI: 01

 1159 13:13:51.347177     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1160 13:13:51.350671      SPI: 01

 1161 13:13:51.353643     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1162 13:13:51.364034     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1163 13:13:51.370495     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1164 13:13:51.373489      PNP: 0c09.0

 1165 13:13:51.380197      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1166 13:13:51.383870     PCI: 00:1f.3

 1167 13:13:51.393934     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1168 13:13:51.403945     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1169 13:13:51.407161     PCI: 00:1f.4

 1170 13:13:51.413670     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1171 13:13:51.423661     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1172 13:13:51.426884     PCI: 00:1f.5

 1173 13:13:51.433359     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1174 13:13:51.440421  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1175 13:13:51.447313  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1176 13:13:51.453414  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1177 13:13:51.456674  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1178 13:13:51.460048  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1179 13:13:51.466821  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1180 13:13:51.469865  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1181 13:13:51.476478  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1182 13:13:51.482994  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1183 13:13:51.489817  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1184 13:13:51.499653  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1185 13:13:51.506419  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1186 13:13:51.509649  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1187 13:13:51.515932  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1188 13:13:51.523093  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1189 13:13:51.526160  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1190 13:13:51.532678  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1191 13:13:51.536283  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1192 13:13:51.542568  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1193 13:13:51.546182  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1194 13:13:51.552886  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1195 13:13:51.555985  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1196 13:13:51.559069  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1197 13:13:51.566078  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1198 13:13:51.569116  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1199 13:13:51.575745  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1200 13:13:51.579319  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1201 13:13:51.586222  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1202 13:13:51.589176  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1203 13:13:51.595835  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1204 13:13:51.599331  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1205 13:13:51.605797  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1206 13:13:51.608934  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1207 13:13:51.615551  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1208 13:13:51.618735  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1209 13:13:51.625350  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1210 13:13:51.629036  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1211 13:13:51.638874  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1212 13:13:51.641982  avoid_fixed_resources: DOMAIN: 0000

 1213 13:13:51.645261  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1214 13:13:51.651582  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1215 13:13:51.661443  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1216 13:13:51.668076  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1217 13:13:51.675126  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1218 13:13:51.684982  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1219 13:13:51.691488  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1220 13:13:51.698092  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1221 13:13:51.704698  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1222 13:13:51.714759  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1223 13:13:51.721019  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1224 13:13:51.727800  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1225 13:13:51.731421  Setting resources...

 1226 13:13:51.738137  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1227 13:13:51.741243  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1228 13:13:51.744574  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1229 13:13:51.748099  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1230 13:13:51.754574  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1231 13:13:51.757945  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1232 13:13:51.764874  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1233 13:13:51.770844  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1234 13:13:51.777767  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1235 13:13:51.784318  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1236 13:13:51.790807  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1237 13:13:51.794290  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1238 13:13:51.797225  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1239 13:13:51.804003  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1240 13:13:51.807574  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1241 13:13:51.814168  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1242 13:13:51.817341  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1243 13:13:51.823625  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1244 13:13:51.826881  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1245 13:13:51.833607  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1246 13:13:51.836969  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1247 13:13:51.843762  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1248 13:13:51.847037  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1249 13:13:51.853753  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1250 13:13:51.856946  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1251 13:13:51.863445  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1252 13:13:51.867107  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1253 13:13:51.873325  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1254 13:13:51.876464  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1255 13:13:51.880066  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1256 13:13:51.886618  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1257 13:13:51.890186  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1258 13:13:51.900186  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1259 13:13:51.906777  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1260 13:13:51.913129  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1261 13:13:51.919837  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1262 13:13:51.926683  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1263 13:13:51.933062  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1264 13:13:51.936545  Root Device assign_resources, bus 0 link: 0

 1265 13:13:51.943301  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1266 13:13:51.949533  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1267 13:13:51.959501  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1268 13:13:51.966348  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1269 13:13:51.976233  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1270 13:13:51.982780  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1271 13:13:51.993156  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1272 13:13:51.996031  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1273 13:13:52.002518  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1274 13:13:52.009497  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1275 13:13:52.015959  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1276 13:13:52.026331  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1277 13:13:52.032619  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1278 13:13:52.039287  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1279 13:13:52.042804  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1280 13:13:52.052548  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1281 13:13:52.056130  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1282 13:13:52.059228  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1283 13:13:52.069543  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1284 13:13:52.076182  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1285 13:13:52.085985  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1286 13:13:52.092369  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1287 13:13:52.099081  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1288 13:13:52.109135  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1289 13:13:52.115570  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1290 13:13:52.125639  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1291 13:13:52.128830  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1292 13:13:52.132676  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1293 13:13:52.141843  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1294 13:13:52.151717  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1295 13:13:52.158864  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1296 13:13:52.165136  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1297 13:13:52.171813  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1298 13:13:52.178210  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1299 13:13:52.184796  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1300 13:13:52.194917  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1301 13:13:52.198027  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1302 13:13:52.201740  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1303 13:13:52.211584  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1304 13:13:52.214851  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1305 13:13:52.221453  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1306 13:13:52.224409  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1307 13:13:52.231033  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1308 13:13:52.234629  LPC: Trying to open IO window from 800 size 1ff

 1309 13:13:52.244174  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1310 13:13:52.251229  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1311 13:13:52.260707  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1312 13:13:52.267704  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1313 13:13:52.271019  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1314 13:13:52.277717  Root Device assign_resources, bus 0 link: 0

 1315 13:13:52.280853  Done setting resources.

 1316 13:13:52.287639  Show resources in subtree (Root Device)...After assigning values.

 1317 13:13:52.290855   Root Device child on link 0 CPU_CLUSTER: 0

 1318 13:13:52.294281    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1319 13:13:52.294361     APIC: 00

 1320 13:13:52.297826     APIC: 02

 1321 13:13:52.297905     APIC: 06

 1322 13:13:52.300853     APIC: 01

 1323 13:13:52.300933     APIC: 03

 1324 13:13:52.300996     APIC: 05

 1325 13:13:52.304447     APIC: 04

 1326 13:13:52.304526     APIC: 07

 1327 13:13:52.307643    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1328 13:13:52.317573    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1329 13:13:52.330588    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1330 13:13:52.330672     PCI: 00:00.0

 1331 13:13:52.340474     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1332 13:13:52.350610     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1333 13:13:52.360141     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1334 13:13:52.370547     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1335 13:13:52.376823     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1336 13:13:52.386965     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1337 13:13:52.396671     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1338 13:13:52.406756     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1339 13:13:52.416265     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1340 13:13:52.423343     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1341 13:13:52.433015     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1342 13:13:52.442763     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1343 13:13:52.453023     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1344 13:13:52.462702     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1345 13:13:52.472916     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1346 13:13:52.482324     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1347 13:13:52.482412     PCI: 00:02.0

 1348 13:13:52.492440     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1349 13:13:52.505694     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1350 13:13:52.512371     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1351 13:13:52.515489     PCI: 00:04.0

 1352 13:13:52.515604     PCI: 00:08.0

 1353 13:13:52.525509     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1354 13:13:52.528649     PCI: 00:12.0

 1355 13:13:52.538780     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1356 13:13:52.541938     PCI: 00:14.0 child on link 0 USB0 port 0

 1357 13:13:52.554920     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1358 13:13:52.558680      USB0 port 0 child on link 0 USB2 port 0

 1359 13:13:52.558794       USB2 port 0

 1360 13:13:52.561823       USB2 port 1

 1361 13:13:52.564888       USB2 port 2

 1362 13:13:52.564963       USB2 port 3

 1363 13:13:52.568380       USB2 port 5

 1364 13:13:52.568461       USB2 port 6

 1365 13:13:52.571690       USB2 port 9

 1366 13:13:52.571768       USB3 port 0

 1367 13:13:52.574866       USB3 port 1

 1368 13:13:52.574939       USB3 port 2

 1369 13:13:52.578491       USB3 port 3

 1370 13:13:52.578565       USB3 port 4

 1371 13:13:52.581636     PCI: 00:14.2

 1372 13:13:52.591432     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1373 13:13:52.601533     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1374 13:13:52.604897     PCI: 00:14.3

 1375 13:13:52.614879     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1376 13:13:52.617956     PCI: 00:15.0 child on link 0 I2C: 01:15

 1377 13:13:52.628113     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1378 13:13:52.631536      I2C: 01:15

 1379 13:13:52.634605     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1380 13:13:52.644749     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1381 13:13:52.644840      I2C: 02:5d

 1382 13:13:52.647942      GENERIC: 0.0

 1383 13:13:52.648016     PCI: 00:16.0

 1384 13:13:52.661294     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1385 13:13:52.661375     PCI: 00:17.0

 1386 13:13:52.670831     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1387 13:13:52.681083     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1388 13:13:52.690636     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1389 13:13:52.700540     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1390 13:13:52.710742     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1391 13:13:52.720318     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1392 13:13:52.723577     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1393 13:13:52.733826     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1394 13:13:52.733914      I2C: 03:1a

 1395 13:13:52.736722      I2C: 03:38

 1396 13:13:52.736805      I2C: 03:39

 1397 13:13:52.740500      I2C: 03:3a

 1398 13:13:52.740582      I2C: 03:3b

 1399 13:13:52.747016     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1400 13:13:52.756765     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1401 13:13:52.766572     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1402 13:13:52.776695     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1403 13:13:52.776784      PCI: 01:00.0

 1404 13:13:52.786582      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1405 13:13:52.789783     PCI: 00:1e.0

 1406 13:13:52.799997     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1407 13:13:52.809737     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1408 13:13:52.816609     PCI: 00:1e.2 child on link 0 SPI: 00

 1409 13:13:52.825997     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1410 13:13:52.826093      SPI: 00

 1411 13:13:52.829648     PCI: 00:1e.3 child on link 0 SPI: 01

 1412 13:13:52.839757     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1413 13:13:52.842633      SPI: 01

 1414 13:13:52.846265     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1415 13:13:52.855956     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1416 13:13:52.862754     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1417 13:13:52.865872      PNP: 0c09.0

 1418 13:13:52.875995      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1419 13:13:52.876079     PCI: 00:1f.3

 1420 13:13:52.885760     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1421 13:13:52.895616     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1422 13:13:52.899253     PCI: 00:1f.4

 1423 13:13:52.908994     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1424 13:13:52.918684     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1425 13:13:52.918770     PCI: 00:1f.5

 1426 13:13:52.928651     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1427 13:13:52.932303  Done allocating resources.

 1428 13:13:52.938713  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1429 13:13:52.941867  Enabling resources...

 1430 13:13:52.945371  PCI: 00:00.0 subsystem <- 8086/9b61

 1431 13:13:52.948384  PCI: 00:00.0 cmd <- 06

 1432 13:13:52.951930  PCI: 00:02.0 subsystem <- 8086/9b41

 1433 13:13:52.954934  PCI: 00:02.0 cmd <- 03

 1434 13:13:52.955016  PCI: 00:08.0 cmd <- 06

 1435 13:13:52.961730  PCI: 00:12.0 subsystem <- 8086/02f9

 1436 13:13:52.961813  PCI: 00:12.0 cmd <- 02

 1437 13:13:52.965001  PCI: 00:14.0 subsystem <- 8086/02ed

 1438 13:13:52.968791  PCI: 00:14.0 cmd <- 02

 1439 13:13:52.971874  PCI: 00:14.2 cmd <- 02

 1440 13:13:52.974948  PCI: 00:14.3 subsystem <- 8086/02f0

 1441 13:13:52.978260  PCI: 00:14.3 cmd <- 02

 1442 13:13:52.981977  PCI: 00:15.0 subsystem <- 8086/02e8

 1443 13:13:52.984997  PCI: 00:15.0 cmd <- 02

 1444 13:13:52.988465  PCI: 00:15.1 subsystem <- 8086/02e9

 1445 13:13:52.991592  PCI: 00:15.1 cmd <- 02

 1446 13:13:52.994697  PCI: 00:16.0 subsystem <- 8086/02e0

 1447 13:13:52.994779  PCI: 00:16.0 cmd <- 02

 1448 13:13:53.002050  PCI: 00:17.0 subsystem <- 8086/02d3

 1449 13:13:53.002159  PCI: 00:17.0 cmd <- 03

 1450 13:13:53.005025  PCI: 00:19.0 subsystem <- 8086/02c5

 1451 13:13:53.008398  PCI: 00:19.0 cmd <- 02

 1452 13:13:53.012065  PCI: 00:1d.0 bridge ctrl <- 0013

 1453 13:13:53.015023  PCI: 00:1d.0 subsystem <- 8086/02b0

 1454 13:13:53.018612  PCI: 00:1d.0 cmd <- 06

 1455 13:13:53.021586  PCI: 00:1e.0 subsystem <- 8086/02a8

 1456 13:13:53.025053  PCI: 00:1e.0 cmd <- 06

 1457 13:13:53.028267  PCI: 00:1e.2 subsystem <- 8086/02aa

 1458 13:13:53.031496  PCI: 00:1e.2 cmd <- 06

 1459 13:13:53.035131  PCI: 00:1e.3 subsystem <- 8086/02ab

 1460 13:13:53.038349  PCI: 00:1e.3 cmd <- 02

 1461 13:13:53.042051  PCI: 00:1f.0 subsystem <- 8086/0284

 1462 13:13:53.044762  PCI: 00:1f.0 cmd <- 407

 1463 13:13:53.048370  PCI: 00:1f.3 subsystem <- 8086/02c8

 1464 13:13:53.051477  PCI: 00:1f.3 cmd <- 02

 1465 13:13:53.054969  PCI: 00:1f.4 subsystem <- 8086/02a3

 1466 13:13:53.055072  PCI: 00:1f.4 cmd <- 03

 1467 13:13:53.061731  PCI: 00:1f.5 subsystem <- 8086/02a4

 1468 13:13:53.061842  PCI: 00:1f.5 cmd <- 406

 1469 13:13:53.071618  PCI: 01:00.0 cmd <- 02

 1470 13:13:53.076552  done.

 1471 13:13:53.089847  ME: Version: 14.0.39.1367

 1472 13:13:53.096630  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13

 1473 13:13:53.099870  Initializing devices...

 1474 13:13:53.099987  Root Device init ...

 1475 13:13:53.106413  Chrome EC: Set SMI mask to 0x0000000000000000

 1476 13:13:53.110137  Chrome EC: clear events_b mask to 0x0000000000000000

 1477 13:13:53.116642  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1478 13:13:53.123184  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1479 13:13:53.130129  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1480 13:13:53.132889  Chrome EC: Set WAKE mask to 0x0000000000000000

 1481 13:13:53.136460  Root Device init finished in 35157 usecs

 1482 13:13:53.140156  CPU_CLUSTER: 0 init ...

 1483 13:13:53.146622  CPU_CLUSTER: 0 init finished in 2447 usecs

 1484 13:13:53.150685  PCI: 00:00.0 init ...

 1485 13:13:53.153824  CPU TDP: 15 Watts

 1486 13:13:53.157132  CPU PL2 = 64 Watts

 1487 13:13:53.160876  PCI: 00:00.0 init finished in 7076 usecs

 1488 13:13:53.163815  PCI: 00:02.0 init ...

 1489 13:13:53.167359  PCI: 00:02.0 init finished in 2253 usecs

 1490 13:13:53.170512  PCI: 00:08.0 init ...

 1491 13:13:53.174146  PCI: 00:08.0 init finished in 2251 usecs

 1492 13:13:53.177206  PCI: 00:12.0 init ...

 1493 13:13:53.180302  PCI: 00:12.0 init finished in 2252 usecs

 1494 13:13:53.184115  PCI: 00:14.0 init ...

 1495 13:13:53.187183  PCI: 00:14.0 init finished in 2244 usecs

 1496 13:13:53.190842  PCI: 00:14.2 init ...

 1497 13:13:53.194279  PCI: 00:14.2 init finished in 2252 usecs

 1498 13:13:53.197282  PCI: 00:14.3 init ...

 1499 13:13:53.200959  PCI: 00:14.3 init finished in 2269 usecs

 1500 13:13:53.204346  PCI: 00:15.0 init ...

 1501 13:13:53.207130  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1502 13:13:53.210876  PCI: 00:15.0 init finished in 5977 usecs

 1503 13:13:53.214109  PCI: 00:15.1 init ...

 1504 13:13:53.217180  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1505 13:13:53.223752  PCI: 00:15.1 init finished in 5975 usecs

 1506 13:13:53.224377  PCI: 00:16.0 init ...

 1507 13:13:53.230522  PCI: 00:16.0 init finished in 2243 usecs

 1508 13:13:53.233303  PCI: 00:19.0 init ...

 1509 13:13:53.236834  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1510 13:13:53.240463  PCI: 00:19.0 init finished in 5976 usecs

 1511 13:13:53.243574  PCI: 00:1d.0 init ...

 1512 13:13:53.246944  Initializing PCH PCIe bridge.

 1513 13:13:53.250196  PCI: 00:1d.0 init finished in 5276 usecs

 1514 13:13:53.253327  PCI: 00:1f.0 init ...

 1515 13:13:53.256780  IOAPIC: Initializing IOAPIC at 0xfec00000

 1516 13:13:53.263261  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1517 13:13:53.263893  IOAPIC: ID = 0x02

 1518 13:13:53.266845  IOAPIC: Dumping registers

 1519 13:13:53.269674    reg 0x0000: 0x02000000

 1520 13:13:53.273500    reg 0x0001: 0x00770020

 1521 13:13:53.274076    reg 0x0002: 0x00000000

 1522 13:13:53.279623  PCI: 00:1f.0 init finished in 23533 usecs

 1523 13:13:53.283024  PCI: 00:1f.4 init ...

 1524 13:13:53.285759  PCI: 00:1f.4 init finished in 2262 usecs

 1525 13:13:53.296853  PCI: 01:00.0 init ...

 1526 13:13:53.299762  PCI: 01:00.0 init finished in 2250 usecs

 1527 13:13:53.304165  PNP: 0c09.0 init ...

 1528 13:13:53.307786  Google Chrome EC uptime: 11.097 seconds

 1529 13:13:53.314301  Google Chrome AP resets since EC boot: 0

 1530 13:13:53.317466  Google Chrome most recent AP reset causes:

 1531 13:13:53.324018  Google Chrome EC reset flags at last EC boot: reset-pin

 1532 13:13:53.327679  PNP: 0c09.0 init finished in 20566 usecs

 1533 13:13:53.330845  Devices initialized

 1534 13:13:53.330929  Show all devs... After init.

 1535 13:13:53.334332  Root Device: enabled 1

 1536 13:13:53.337531  CPU_CLUSTER: 0: enabled 1

 1537 13:13:53.340871  DOMAIN: 0000: enabled 1

 1538 13:13:53.340956  APIC: 00: enabled 1

 1539 13:13:53.343773  PCI: 00:00.0: enabled 1

 1540 13:13:53.347544  PCI: 00:02.0: enabled 1

 1541 13:13:53.350599  PCI: 00:04.0: enabled 0

 1542 13:13:53.350682  PCI: 00:05.0: enabled 0

 1543 13:13:53.353884  PCI: 00:12.0: enabled 1

 1544 13:13:53.357398  PCI: 00:12.5: enabled 0

 1545 13:13:53.357481  PCI: 00:12.6: enabled 0

 1546 13:13:53.360603  PCI: 00:14.0: enabled 1

 1547 13:13:53.364123  PCI: 00:14.1: enabled 0

 1548 13:13:53.367399  PCI: 00:14.3: enabled 1

 1549 13:13:53.367482  PCI: 00:14.5: enabled 0

 1550 13:13:53.370548  PCI: 00:15.0: enabled 1

 1551 13:13:53.373575  PCI: 00:15.1: enabled 1

 1552 13:13:53.376847  PCI: 00:15.2: enabled 0

 1553 13:13:53.376931  PCI: 00:15.3: enabled 0

 1554 13:13:53.380466  PCI: 00:16.0: enabled 1

 1555 13:13:53.383545  PCI: 00:16.1: enabled 0

 1556 13:13:53.387103  PCI: 00:16.2: enabled 0

 1557 13:13:53.387186  PCI: 00:16.3: enabled 0

 1558 13:13:53.390378  PCI: 00:16.4: enabled 0

 1559 13:13:53.393321  PCI: 00:16.5: enabled 0

 1560 13:13:53.397105  PCI: 00:17.0: enabled 1

 1561 13:13:53.397187  PCI: 00:19.0: enabled 1

 1562 13:13:53.400142  PCI: 00:19.1: enabled 0

 1563 13:13:53.403491  PCI: 00:19.2: enabled 0

 1564 13:13:53.403574  PCI: 00:1a.0: enabled 0

 1565 13:13:53.407084  PCI: 00:1c.0: enabled 0

 1566 13:13:53.410052  PCI: 00:1c.1: enabled 0

 1567 13:13:53.413601  PCI: 00:1c.2: enabled 0

 1568 13:13:53.413684  PCI: 00:1c.3: enabled 0

 1569 13:13:53.416798  PCI: 00:1c.4: enabled 0

 1570 13:13:53.420106  PCI: 00:1c.5: enabled 0

 1571 13:13:53.423394  PCI: 00:1c.6: enabled 0

 1572 13:13:53.423477  PCI: 00:1c.7: enabled 0

 1573 13:13:53.426340  PCI: 00:1d.0: enabled 1

 1574 13:13:53.430033  PCI: 00:1d.1: enabled 0

 1575 13:13:53.433067  PCI: 00:1d.2: enabled 0

 1576 13:13:53.433146  PCI: 00:1d.3: enabled 0

 1577 13:13:53.436714  PCI: 00:1d.4: enabled 0

 1578 13:13:53.439556  PCI: 00:1d.5: enabled 0

 1579 13:13:53.442997  PCI: 00:1e.0: enabled 1

 1580 13:13:53.443075  PCI: 00:1e.1: enabled 0

 1581 13:13:53.446598  PCI: 00:1e.2: enabled 1

 1582 13:13:53.449528  PCI: 00:1e.3: enabled 1

 1583 13:13:53.449613  PCI: 00:1f.0: enabled 1

 1584 13:13:53.453532  PCI: 00:1f.1: enabled 0

 1585 13:13:53.456369  PCI: 00:1f.2: enabled 0

 1586 13:13:53.459814  PCI: 00:1f.3: enabled 1

 1587 13:13:53.459917  PCI: 00:1f.4: enabled 1

 1588 13:13:53.462921  PCI: 00:1f.5: enabled 1

 1589 13:13:53.466554  PCI: 00:1f.6: enabled 0

 1590 13:13:53.469354  USB0 port 0: enabled 1

 1591 13:13:53.469463  I2C: 01:15: enabled 1

 1592 13:13:53.473121  I2C: 02:5d: enabled 1

 1593 13:13:53.476136  GENERIC: 0.0: enabled 1

 1594 13:13:53.476248  I2C: 03:1a: enabled 1

 1595 13:13:53.479407  I2C: 03:38: enabled 1

 1596 13:13:53.482451  I2C: 03:39: enabled 1

 1597 13:13:53.482584  I2C: 03:3a: enabled 1

 1598 13:13:53.486291  I2C: 03:3b: enabled 1

 1599 13:13:53.489369  PCI: 00:00.0: enabled 1

 1600 13:13:53.489502  SPI: 00: enabled 1

 1601 13:13:53.492553  SPI: 01: enabled 1

 1602 13:13:53.496193  PNP: 0c09.0: enabled 1

 1603 13:13:53.496277  USB2 port 0: enabled 1

 1604 13:13:53.499312  USB2 port 1: enabled 1

 1605 13:13:53.502472  USB2 port 2: enabled 0

 1606 13:13:53.502580  USB2 port 3: enabled 0

 1607 13:13:53.505985  USB2 port 5: enabled 0

 1608 13:13:53.509367  USB2 port 6: enabled 1

 1609 13:13:53.512414  USB2 port 9: enabled 1

 1610 13:13:53.512516  USB3 port 0: enabled 1

 1611 13:13:53.516142  USB3 port 1: enabled 1

 1612 13:13:53.519480  USB3 port 2: enabled 1

 1613 13:13:53.519597  USB3 port 3: enabled 1

 1614 13:13:53.522721  USB3 port 4: enabled 0

 1615 13:13:53.525852  APIC: 02: enabled 1

 1616 13:13:53.525958  APIC: 06: enabled 1

 1617 13:13:53.529032  APIC: 01: enabled 1

 1618 13:13:53.532426  APIC: 03: enabled 1

 1619 13:13:53.532530  APIC: 05: enabled 1

 1620 13:13:53.535507  APIC: 04: enabled 1

 1621 13:13:53.535631  APIC: 07: enabled 1

 1622 13:13:53.539123  PCI: 00:08.0: enabled 1

 1623 13:13:53.542344  PCI: 00:14.2: enabled 1

 1624 13:13:53.545505  PCI: 01:00.0: enabled 1

 1625 13:13:53.548941  Disabling ACPI via APMC:

 1626 13:13:53.552659  done.

 1627 13:13:53.555512  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1628 13:13:53.559166  ELOG: NV offset 0xaf0000 size 0x4000

 1629 13:13:53.565711  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1630 13:13:53.572420  ELOG: Event(17) added with size 13 at 2023-06-07 13:13:52 UTC

 1631 13:13:53.579026  ELOG: Event(92) added with size 9 at 2023-06-07 13:13:52 UTC

 1632 13:13:53.586195  ELOG: Event(93) added with size 9 at 2023-06-07 13:13:52 UTC

 1633 13:13:53.592446  ELOG: Event(9A) added with size 9 at 2023-06-07 13:13:52 UTC

 1634 13:13:53.599088  ELOG: Event(9E) added with size 10 at 2023-06-07 13:13:52 UTC

 1635 13:13:53.605879  ELOG: Event(9F) added with size 14 at 2023-06-07 13:13:52 UTC

 1636 13:13:53.608915  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1637 13:13:53.615960  ELOG: Event(A1) added with size 10 at 2023-06-07 13:13:52 UTC

 1638 13:13:53.626370  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1639 13:13:53.633026  ELOG: Event(A0) added with size 9 at 2023-06-07 13:13:52 UTC

 1640 13:13:53.636148  elog_add_boot_reason: Logged dev mode boot

 1641 13:13:53.636231  Finalize devices...

 1642 13:13:53.639571  PCI: 00:17.0 final

 1643 13:13:53.642632  Devices finalized

 1644 13:13:53.645688  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1645 13:13:53.652295  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1646 13:13:53.655741  ME: HFSTS1                  : 0x90000245

 1647 13:13:53.659023  ME: HFSTS2                  : 0x3B850126

 1648 13:13:53.665528  ME: HFSTS3                  : 0x00000020

 1649 13:13:53.669176  ME: HFSTS4                  : 0x00004800

 1650 13:13:53.672252  ME: HFSTS5                  : 0x00000000

 1651 13:13:53.675833  ME: HFSTS6                  : 0x40400006

 1652 13:13:53.678918  ME: Manufacturing Mode      : NO

 1653 13:13:53.681880  ME: FW Partition Table      : OK

 1654 13:13:53.685293  ME: Bringup Loader Failure  : NO

 1655 13:13:53.688549  ME: Firmware Init Complete  : YES

 1656 13:13:53.691985  ME: Boot Options Present    : NO

 1657 13:13:53.695177  ME: Update In Progress      : NO

 1658 13:13:53.698957  ME: D0i3 Support            : YES

 1659 13:13:53.701923  ME: Low Power State Enabled : NO

 1660 13:13:53.705480  ME: CPU Replaced            : NO

 1661 13:13:53.708619  ME: CPU Replacement Valid   : YES

 1662 13:13:53.711807  ME: Current Working State   : 5

 1663 13:13:53.715511  ME: Current Operation State : 1

 1664 13:13:53.718439  ME: Current Operation Mode  : 0

 1665 13:13:53.721648  ME: Error Code              : 0

 1666 13:13:53.725251  ME: CPU Debug Disabled      : YES

 1667 13:13:53.728363  ME: TXT Support             : NO

 1668 13:13:53.735039  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1669 13:13:53.741556  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1670 13:13:53.741637  CBFS @ c08000 size 3f8000

 1671 13:13:53.748523  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1672 13:13:53.751621  CBFS: Locating 'fallback/dsdt.aml'

 1673 13:13:53.755241  CBFS: Found @ offset 10bb80 size 3fa5

 1674 13:13:53.761407  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1675 13:13:53.764940  CBFS @ c08000 size 3f8000

 1676 13:13:53.771370  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1677 13:13:53.771479  CBFS: Locating 'fallback/slic'

 1678 13:13:53.776917  CBFS: 'fallback/slic' not found.

 1679 13:13:53.783525  ACPI: Writing ACPI tables at 99b3e000.

 1680 13:13:53.783628  ACPI:    * FACS

 1681 13:13:53.786947  ACPI:    * DSDT

 1682 13:13:53.789911  Ramoops buffer: 0x100000@0x99a3d000.

 1683 13:13:53.793326  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1684 13:13:53.800085  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1685 13:13:53.803188  Google Chrome EC: version:

 1686 13:13:53.806905  	ro: helios_v2.0.2659-56403530b

 1687 13:13:53.809825  	rw: helios_v2.0.2849-c41de27e7d

 1688 13:13:53.809926    running image: 1

 1689 13:13:53.814214  ACPI:    * FADT

 1690 13:13:53.814333  SCI is IRQ9

 1691 13:13:53.820937  ACPI: added table 1/32, length now 40

 1692 13:13:53.821053  ACPI:     * SSDT

 1693 13:13:53.824097  Found 1 CPU(s) with 8 core(s) each.

 1694 13:13:53.827637  Error: Could not locate 'wifi_sar' in VPD.

 1695 13:13:53.834176  Checking CBFS for default SAR values

 1696 13:13:53.837308  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1697 13:13:53.840827  CBFS @ c08000 size 3f8000

 1698 13:13:53.847113  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1699 13:13:53.850192  CBFS: Locating 'wifi_sar_defaults.hex'

 1700 13:13:53.854060  CBFS: Found @ offset 5fac0 size 77

 1701 13:13:53.856988  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1702 13:13:53.863795  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1703 13:13:53.866986  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1704 13:13:53.873602  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1705 13:13:53.876930  failed to find key in VPD: dsm_calib_r0_0

 1706 13:13:53.886849  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1707 13:13:53.889948  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1708 13:13:53.893363  failed to find key in VPD: dsm_calib_r0_1

 1709 13:13:53.903222  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1710 13:13:53.910220  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1711 13:13:53.913094  failed to find key in VPD: dsm_calib_r0_2

 1712 13:13:53.922937  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1713 13:13:53.926386  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1714 13:13:53.933115  failed to find key in VPD: dsm_calib_r0_3

 1715 13:13:53.939784  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1716 13:13:53.946499  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1717 13:13:53.949553  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1718 13:13:53.953054  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1719 13:13:53.956825  EC returned error result code 1

 1720 13:13:53.960845  EC returned error result code 1

 1721 13:13:53.964436  EC returned error result code 1

 1722 13:13:53.971115  PS2K: Bad resp from EC. Vivaldi disabled!

 1723 13:13:53.974370  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1724 13:13:53.981195  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1725 13:13:53.987513  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1726 13:13:53.990946  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1727 13:13:53.997460  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1728 13:13:54.004109  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1729 13:13:54.010451  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1730 13:13:54.014091  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1731 13:13:54.020759  ACPI: added table 2/32, length now 44

 1732 13:13:54.020837  ACPI:    * MCFG

 1733 13:13:54.023994  ACPI: added table 3/32, length now 48

 1734 13:13:54.027217  ACPI:    * TPM2

 1735 13:13:54.030451  TPM2 log created at 99a2d000

 1736 13:13:54.033615  ACPI: added table 4/32, length now 52

 1737 13:13:54.033723  ACPI:    * MADT

 1738 13:13:54.037198  SCI is IRQ9

 1739 13:13:54.040469  ACPI: added table 5/32, length now 56

 1740 13:13:54.040583  current = 99b43ac0

 1741 13:13:54.043673  ACPI:    * DMAR

 1742 13:13:54.047195  ACPI: added table 6/32, length now 60

 1743 13:13:54.050327  ACPI:    * IGD OpRegion

 1744 13:13:54.050439  GMA: Found VBT in CBFS

 1745 13:13:54.053894  GMA: Found valid VBT in CBFS

 1746 13:13:54.057222  ACPI: added table 7/32, length now 64

 1747 13:13:54.060218  ACPI:    * HPET

 1748 13:13:54.063523  ACPI: added table 8/32, length now 68

 1749 13:13:54.063606  ACPI: done.

 1750 13:13:54.066825  ACPI tables: 31744 bytes.

 1751 13:13:54.070593  smbios_write_tables: 99a2c000

 1752 13:13:54.073727  EC returned error result code 3

 1753 13:13:54.077267  Couldn't obtain OEM name from CBI

 1754 13:13:54.080744  Create SMBIOS type 17

 1755 13:13:54.083779  PCI: 00:00.0 (Intel Cannonlake)

 1756 13:13:54.087265  PCI: 00:14.3 (Intel WiFi)

 1757 13:13:54.090453  SMBIOS tables: 939 bytes.

 1758 13:13:54.093891  Writing table forward entry at 0x00000500

 1759 13:13:54.100452  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1760 13:13:54.103962  Writing coreboot table at 0x99b62000

 1761 13:13:54.110176   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1762 13:13:54.114118   1. 0000000000001000-000000000009ffff: RAM

 1763 13:13:54.117056   2. 00000000000a0000-00000000000fffff: RESERVED

 1764 13:13:54.123448   3. 0000000000100000-0000000099a2bfff: RAM

 1765 13:13:54.126988   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1766 13:13:54.133577   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1767 13:13:54.139880   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1768 13:13:54.143102   7. 000000009a000000-000000009f7fffff: RESERVED

 1769 13:13:54.149948   8. 00000000e0000000-00000000efffffff: RESERVED

 1770 13:13:54.152913   9. 00000000fc000000-00000000fc000fff: RESERVED

 1771 13:13:54.156634  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1772 13:13:54.162986  11. 00000000fed10000-00000000fed17fff: RESERVED

 1773 13:13:54.166512  12. 00000000fed80000-00000000fed83fff: RESERVED

 1774 13:13:54.173011  13. 00000000fed90000-00000000fed91fff: RESERVED

 1775 13:13:54.176174  14. 00000000feda0000-00000000feda1fff: RESERVED

 1776 13:13:54.183181  15. 0000000100000000-000000045e7fffff: RAM

 1777 13:13:54.186293  Graphics framebuffer located at 0xc0000000

 1778 13:13:54.189732  Passing 5 GPIOs to payload:

 1779 13:13:54.192745              NAME |       PORT | POLARITY |     VALUE

 1780 13:13:54.199328     write protect |  undefined |     high |       low

 1781 13:13:54.203042               lid |  undefined |     high |      high

 1782 13:13:54.209164             power |  undefined |     high |       low

 1783 13:13:54.216022             oprom |  undefined |     high |       low

 1784 13:13:54.219081          EC in RW | 0x000000cb |     high |       low

 1785 13:13:54.222814  Board ID: 4

 1786 13:13:54.225993  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1787 13:13:54.229125  CBFS @ c08000 size 3f8000

 1788 13:13:54.235879  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1789 13:13:54.242435  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa

 1790 13:13:54.242522  coreboot table: 1492 bytes.

 1791 13:13:54.245513  IMD ROOT    0. 99fff000 00001000

 1792 13:13:54.249160  IMD SMALL   1. 99ffe000 00001000

 1793 13:13:54.252362  FSP MEMORY  2. 99c4e000 003b0000

 1794 13:13:54.255496  CONSOLE     3. 99c2e000 00020000

 1795 13:13:54.259214  FMAP        4. 99c2d000 0000054e

 1796 13:13:54.262574  TIME STAMP  5. 99c2c000 00000910

 1797 13:13:54.265795  VBOOT WORK  6. 99c18000 00014000

 1798 13:13:54.268975  MRC DATA    7. 99c16000 00001958

 1799 13:13:54.272355  ROMSTG STCK 8. 99c15000 00001000

 1800 13:13:54.275581  AFTER CAR   9. 99c0b000 0000a000

 1801 13:13:54.279596  RAMSTAGE   10. 99baf000 0005c000

 1802 13:13:54.282519  REFCODE    11. 99b7a000 00035000

 1803 13:13:54.285852  SMM BACKUP 12. 99b6a000 00010000

 1804 13:13:54.289097  COREBOOT   13. 99b62000 00008000

 1805 13:13:54.292644  ACPI       14. 99b3e000 00024000

 1806 13:13:54.295487  ACPI GNVS  15. 99b3d000 00001000

 1807 13:13:54.298897  RAMOOPS    16. 99a3d000 00100000

 1808 13:13:54.302556  TPM2 TCGLOG17. 99a2d000 00010000

 1809 13:13:54.305467  SMBIOS     18. 99a2c000 00000800

 1810 13:13:54.308921  IMD small region:

 1811 13:13:54.312310    IMD ROOT    0. 99ffec00 00000400

 1812 13:13:54.315449    FSP RUNTIME 1. 99ffebe0 00000004

 1813 13:13:54.318703    EC HOSTEVENT 2. 99ffebc0 00000008

 1814 13:13:54.321884    POWER STATE 3. 99ffeb80 00000040

 1815 13:13:54.325723    ROMSTAGE    4. 99ffeb60 00000004

 1816 13:13:54.328668    MEM INFO    5. 99ffe9a0 000001b9

 1817 13:13:54.331863    VPD         6. 99ffe920 0000006c

 1818 13:13:54.335054  MTRR: Physical address space:

 1819 13:13:54.341675  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1820 13:13:54.348437  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1821 13:13:54.354877  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1822 13:13:54.361569  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1823 13:13:54.367951  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1824 13:13:54.374786  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1825 13:13:54.381405  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1826 13:13:54.384879  MTRR: Fixed MSR 0x250 0x0606060606060606

 1827 13:13:54.387771  MTRR: Fixed MSR 0x258 0x0606060606060606

 1828 13:13:54.391432  MTRR: Fixed MSR 0x259 0x0000000000000000

 1829 13:13:54.397700  MTRR: Fixed MSR 0x268 0x0606060606060606

 1830 13:13:54.400900  MTRR: Fixed MSR 0x269 0x0606060606060606

 1831 13:13:54.404234  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1832 13:13:54.407197  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1833 13:13:54.413930  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1834 13:13:54.417429  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1835 13:13:54.420511  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1836 13:13:54.424122  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1837 13:13:54.427726  call enable_fixed_mtrr()

 1838 13:13:54.431022  CPU physical address size: 39 bits

 1839 13:13:54.437405  MTRR: default type WB/UC MTRR counts: 6/8.

 1840 13:13:54.441057  MTRR: WB selected as default type.

 1841 13:13:54.447642  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1842 13:13:54.451074  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1843 13:13:54.457425  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1844 13:13:54.464147  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1845 13:13:54.470614  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1846 13:13:54.476931  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1847 13:13:54.483739  MTRR: Fixed MSR 0x250 0x0606060606060606

 1848 13:13:54.486944  MTRR: Fixed MSR 0x258 0x0606060606060606

 1849 13:13:54.490276  MTRR: Fixed MSR 0x259 0x0000000000000000

 1850 13:13:54.493314  MTRR: Fixed MSR 0x268 0x0606060606060606

 1851 13:13:54.500416  MTRR: Fixed MSR 0x269 0x0606060606060606

 1852 13:13:54.503643  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1853 13:13:54.506826  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1854 13:13:54.509822  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1855 13:13:54.513594  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1856 13:13:54.519889  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1857 13:13:54.523093  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1858 13:13:54.523250  

 1859 13:13:54.523361  MTRR check

 1860 13:13:54.526271  Fixed MTRRs   : Enabled

 1861 13:13:54.530008  Variable MTRRs: Enabled

 1862 13:13:54.530164  

 1863 13:13:54.533201  call enable_fixed_mtrr()

 1864 13:13:54.537064  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1865 13:13:54.540062  CPU physical address size: 39 bits

 1866 13:13:54.546460  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1867 13:13:54.549652  MTRR: Fixed MSR 0x250 0x0606060606060606

 1868 13:13:54.556299  MTRR: Fixed MSR 0x258 0x0606060606060606

 1869 13:13:54.559525  MTRR: Fixed MSR 0x259 0x0000000000000000

 1870 13:13:54.563291  MTRR: Fixed MSR 0x268 0x0606060606060606

 1871 13:13:54.566354  MTRR: Fixed MSR 0x269 0x0606060606060606

 1872 13:13:54.569310  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1873 13:13:54.576155  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1874 13:13:54.579688  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1875 13:13:54.582880  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1876 13:13:54.586469  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1877 13:13:54.592524  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1878 13:13:54.596140  MTRR: Fixed MSR 0x250 0x0606060606060606

 1879 13:13:54.599585  call enable_fixed_mtrr()

 1880 13:13:54.602451  MTRR: Fixed MSR 0x258 0x0606060606060606

 1881 13:13:54.605861  MTRR: Fixed MSR 0x259 0x0000000000000000

 1882 13:13:54.609230  MTRR: Fixed MSR 0x268 0x0606060606060606

 1883 13:13:54.615815  MTRR: Fixed MSR 0x269 0x0606060606060606

 1884 13:13:54.619485  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1885 13:13:54.622455  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1886 13:13:54.625962  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1887 13:13:54.632560  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1888 13:13:54.635718  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1889 13:13:54.638859  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1890 13:13:54.641980  CPU physical address size: 39 bits

 1891 13:13:54.645621  call enable_fixed_mtrr()

 1892 13:13:54.648802  MTRR: Fixed MSR 0x250 0x0606060606060606

 1893 13:13:54.655607  MTRR: Fixed MSR 0x250 0x0606060606060606

 1894 13:13:54.658703  MTRR: Fixed MSR 0x258 0x0606060606060606

 1895 13:13:54.662072  MTRR: Fixed MSR 0x259 0x0000000000000000

 1896 13:13:54.664988  MTRR: Fixed MSR 0x268 0x0606060606060606

 1897 13:13:54.671804  MTRR: Fixed MSR 0x269 0x0606060606060606

 1898 13:13:54.675125  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1899 13:13:54.678572  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1900 13:13:54.681770  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1901 13:13:54.688201  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1902 13:13:54.691670  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1903 13:13:54.694714  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1904 13:13:54.698224  MTRR: Fixed MSR 0x258 0x0606060606060606

 1905 13:13:54.704874  MTRR: Fixed MSR 0x259 0x0000000000000000

 1906 13:13:54.708328  MTRR: Fixed MSR 0x268 0x0606060606060606

 1907 13:13:54.711383  MTRR: Fixed MSR 0x269 0x0606060606060606

 1908 13:13:54.715234  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1909 13:13:54.721468  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1910 13:13:54.724568  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1911 13:13:54.728074  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1912 13:13:54.731527  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1913 13:13:54.737888  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1914 13:13:54.737972  call enable_fixed_mtrr()

 1915 13:13:54.741132  call enable_fixed_mtrr()

 1916 13:13:54.744701  CPU physical address size: 39 bits

 1917 13:13:54.747736  MTRR: Fixed MSR 0x250 0x0606060606060606

 1918 13:13:54.754531  MTRR: Fixed MSR 0x258 0x0606060606060606

 1919 13:13:54.757576  MTRR: Fixed MSR 0x259 0x0000000000000000

 1920 13:13:54.761177  MTRR: Fixed MSR 0x268 0x0606060606060606

 1921 13:13:54.764227  MTRR: Fixed MSR 0x269 0x0606060606060606

 1922 13:13:54.770986  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1923 13:13:54.774097  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1924 13:13:54.777435  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1925 13:13:54.780986  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1926 13:13:54.787531  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1927 13:13:54.790721  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1928 13:13:54.794543  MTRR: Fixed MSR 0x250 0x0606060606060606

 1929 13:13:54.797298  MTRR: Fixed MSR 0x258 0x0606060606060606

 1930 13:13:54.804111  MTRR: Fixed MSR 0x259 0x0000000000000000

 1931 13:13:54.807098  MTRR: Fixed MSR 0x268 0x0606060606060606

 1932 13:13:54.810462  MTRR: Fixed MSR 0x269 0x0606060606060606

 1933 13:13:54.814235  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1934 13:13:54.820557  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1935 13:13:54.823640  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1936 13:13:54.827039  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1937 13:13:54.830439  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1938 13:13:54.837022  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1939 13:13:54.837110  call enable_fixed_mtrr()

 1940 13:13:54.840137  call enable_fixed_mtrr()

 1941 13:13:54.843320  CPU physical address size: 39 bits

 1942 13:13:54.847081  CPU physical address size: 39 bits

 1943 13:13:54.850160  CPU physical address size: 39 bits

 1944 13:13:54.856591  CPU physical address size: 39 bits

 1945 13:13:54.856675  CBFS @ c08000 size 3f8000

 1946 13:13:54.863076  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1947 13:13:54.866683  CBFS: Locating 'fallback/payload'

 1948 13:13:54.873095  CBFS: Found @ offset 1c96c0 size 3f798

 1949 13:13:54.876918  Checking segment from ROM address 0xffdd16f8

 1950 13:13:54.879933  Checking segment from ROM address 0xffdd1714

 1951 13:13:54.886703  Loading segment from ROM address 0xffdd16f8

 1952 13:13:54.886784    code (compression=0)

 1953 13:13:54.896427    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1954 13:13:54.906563  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1955 13:13:54.906649  it's not compressed!

 1956 13:13:54.999211  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1957 13:13:55.005884  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1958 13:13:55.009005  Loading segment from ROM address 0xffdd1714

 1959 13:13:55.012438    Entry Point 0x30000000

 1960 13:13:55.015930  Loaded segments

 1961 13:13:55.021420  Finalizing chipset.

 1962 13:13:55.025158  Finalizing SMM.

 1963 13:13:55.028102  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5

 1964 13:13:55.031308  mp_park_aps done after 0 msecs.

 1965 13:13:55.037796  Jumping to boot code at 30000000(99b62000)

 1966 13:13:55.044702  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 1967 13:13:55.045282  

 1968 13:13:55.045776  

 1969 13:13:55.046250  

 1970 13:13:55.047944  Starting depthcharge on Helios...

 1971 13:13:55.048456  

 1972 13:13:55.049664  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 1973 13:13:55.050330  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 1974 13:13:55.050946  Setting prompt string to ['hatch:']
 1975 13:13:55.051471  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 1976 13:13:55.057740  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1977 13:13:55.058213  

 1978 13:13:55.064174  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1979 13:13:55.064624  

 1980 13:13:55.070932  board_setup: Info: eMMC controller not present; skipping

 1981 13:13:55.071445  

 1982 13:13:55.074742  New NVMe Controller 0x30053ac0 @ 00:1d:00

 1983 13:13:55.075232  

 1984 13:13:55.080994  board_setup: Info: SDHCI controller not present; skipping

 1985 13:13:55.081422  

 1986 13:13:55.087971  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 1987 13:13:55.088437  

 1988 13:13:55.088781  Wipe memory regions:

 1989 13:13:55.089101  

 1990 13:13:55.090981  	[0x00000000001000, 0x000000000a0000)

 1991 13:13:55.091536  

 1992 13:13:55.093902  	[0x00000000100000, 0x00000030000000)

 1993 13:13:55.159928  

 1994 13:13:55.163299  	[0x00000030657430, 0x00000099a2c000)

 1995 13:13:55.300689  

 1996 13:13:55.303635  	[0x00000100000000, 0x0000045e800000)

 1997 13:13:56.686375  

 1998 13:13:56.686519  R8152: Initializing

 1999 13:13:56.686589  

 2000 13:13:56.689367  Version 9 (ocp_data = 6010)

 2001 13:13:56.693768  

 2002 13:13:56.693855  R8152: Done initializing

 2003 13:13:56.693923  

 2004 13:13:56.696924  Adding net device

 2005 13:13:57.306225  

 2006 13:13:57.306359  R8152: Initializing

 2007 13:13:57.306427  

 2008 13:13:57.309312  Version 6 (ocp_data = 5c30)

 2009 13:13:57.309424  

 2010 13:13:57.313088  R8152: Done initializing

 2011 13:13:57.313178  

 2012 13:13:57.316178  net_add_device: Attemp to include the same device

 2013 13:13:57.319746  

 2014 13:13:57.326901  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2015 13:13:57.327006  

 2016 13:13:57.327071  

 2017 13:13:57.327131  

 2018 13:13:57.327466  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2020 13:13:57.427855  hatch: tftpboot 192.168.201.1 10624241/tftp-deploy-a5ofgnnn/kernel/bzImage 10624241/tftp-deploy-a5ofgnnn/kernel/cmdline 10624241/tftp-deploy-a5ofgnnn/ramdisk/ramdisk.cpio.gz

 2021 13:13:57.428127  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2022 13:13:57.428230  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2023 13:13:57.433123  tftpboot 192.168.201.1 10624241/tftp-deploy-a5ofgnnn/kernel/bzImploy-a5ofgnnn/kernel/cmdline 10624241/tftp-deploy-a5ofgnnn/ramdisk/ramdisk.cpio.gz

 2024 13:13:57.433212  

 2025 13:13:57.433276  Waiting for link

 2026 13:13:57.633323  

 2027 13:13:57.633531  done.

 2028 13:13:57.633672  

 2029 13:13:57.633800  MAC: 00:24:32:50:1a:5f

 2030 13:13:57.633925  

 2031 13:13:57.636764  Sending DHCP discover... done.

 2032 13:13:57.636878  

 2033 13:13:57.640027  Waiting for reply... done.

 2034 13:13:57.640129  

 2035 13:13:57.644026  Sending DHCP request... done.

 2036 13:13:57.644157  

 2037 13:13:57.757419  Waiting for reply... done.

 2038 13:13:57.757590  

 2039 13:13:57.757704  My ip is 192.168.201.21

 2040 13:13:57.757834  

 2041 13:13:57.760689  The DHCP server ip is 192.168.201.1

 2042 13:13:57.763813  

 2043 13:13:57.767209  TFTP server IP predefined by user: 192.168.201.1

 2044 13:13:57.767331  

 2045 13:13:57.774072  Bootfile predefined by user: 10624241/tftp-deploy-a5ofgnnn/kernel/bzImage

 2046 13:13:57.774217  

 2047 13:13:57.777201  Sending tftp read request... done.

 2048 13:13:57.777302  

 2049 13:13:57.780535  Waiting for the transfer... 

 2050 13:13:57.783497  

 2051 13:13:58.312160  00000000 ################################################################

 2052 13:13:58.312330  

 2053 13:13:58.863684  00080000 ################################################################

 2054 13:13:58.863895  

 2055 13:13:59.409423  00100000 ################################################################

 2056 13:13:59.409600  

 2057 13:13:59.965830  00180000 ################################################################

 2058 13:13:59.966005  

 2059 13:14:00.509884  00200000 ################################################################

 2060 13:14:00.510021  

 2061 13:14:01.057357  00280000 ################################################################

 2062 13:14:01.057514  

 2063 13:14:01.617462  00300000 ################################################################

 2064 13:14:01.617612  

 2065 13:14:02.150949  00380000 ################################################################

 2066 13:14:02.151109  

 2067 13:14:02.674706  00400000 ################################################################

 2068 13:14:02.674885  

 2069 13:14:03.209222  00480000 ################################################################

 2070 13:14:03.209368  

 2071 13:14:03.748638  00500000 ################################################################

 2072 13:14:03.748839  

 2073 13:14:04.281251  00580000 ################################################################

 2074 13:14:04.281402  

 2075 13:14:04.824599  00600000 ################################################################

 2076 13:14:04.824765  

 2077 13:14:05.359681  00680000 ################################################################

 2078 13:14:05.359850  

 2079 13:14:05.879686  00700000 ################################################################

 2080 13:14:05.879836  

 2081 13:14:05.905686  00780000 ### done.

 2082 13:14:05.905796  

 2083 13:14:05.908532  The bootfile was 7888784 bytes long.

 2084 13:14:05.908617  

 2085 13:14:05.912352  Sending tftp read request... done.

 2086 13:14:05.912439  

 2087 13:14:05.914996  Waiting for the transfer... 

 2088 13:14:05.915072  

 2089 13:14:06.435777  00000000 ################################################################

 2090 13:14:06.435984  

 2091 13:14:06.964456  00080000 ################################################################

 2092 13:14:06.964629  

 2093 13:14:07.489923  00100000 ################################################################

 2094 13:14:07.490077  

 2095 13:14:08.018089  00180000 ################################################################

 2096 13:14:08.018270  

 2097 13:14:08.552829  00200000 ################################################################

 2098 13:14:08.552982  

 2099 13:14:09.084015  00280000 ################################################################

 2100 13:14:09.084166  

 2101 13:14:09.618322  00300000 ################################################################

 2102 13:14:09.618475  

 2103 13:14:10.148010  00380000 ################################################################

 2104 13:14:10.148165  

 2105 13:14:10.677371  00400000 ################################################################

 2106 13:14:10.677524  

 2107 13:14:11.214240  00480000 ################################################################

 2108 13:14:11.214390  

 2109 13:14:11.749933  00500000 ################################################################

 2110 13:14:11.750086  

 2111 13:14:12.277719  00580000 ################################################################

 2112 13:14:12.277887  

 2113 13:14:12.804678  00600000 ################################################################

 2114 13:14:12.804824  

 2115 13:14:13.336908  00680000 ################################################################

 2116 13:14:13.337099  

 2117 13:14:13.877301  00700000 ################################################################

 2118 13:14:13.877450  

 2119 13:14:14.395460  00780000 ################################################################

 2120 13:14:14.395684  

 2121 13:14:14.821903  00800000 ##################################################### done.

 2122 13:14:14.822154  

 2123 13:14:14.825143  Sending tftp read request... done.

 2124 13:14:14.825271  

 2125 13:14:14.828268  Waiting for the transfer... 

 2126 13:14:14.828396  

 2127 13:14:14.828504  00000000 # done.

 2128 13:14:14.828614  

 2129 13:14:14.838430  Command line loaded dynamically from TFTP file: 10624241/tftp-deploy-a5ofgnnn/kernel/cmdline

 2130 13:14:14.838564  

 2131 13:14:14.854718  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2132 13:14:14.854854  

 2133 13:14:14.861315  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2134 13:14:14.865885  

 2135 13:14:14.869404  Shutting down all USB controllers.

 2136 13:14:14.869540  

 2137 13:14:14.869640  Removing current net device

 2138 13:14:14.877054  

 2139 13:14:14.877165  Finalizing coreboot

 2140 13:14:14.877236  

 2141 13:14:14.883424  Exiting depthcharge with code 4 at timestamp: 27174531

 2142 13:14:14.883530  

 2143 13:14:14.883630  

 2144 13:14:14.883696  Starting kernel ...

 2145 13:14:14.883758  

 2146 13:14:14.883819  

 2147 13:14:14.884304  end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
 2148 13:14:14.884403  start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
 2149 13:14:14.884482  Setting prompt string to ['Linux version [0-9]']
 2150 13:14:14.884571  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2151 13:14:14.884656  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2153 13:18:36.885291  end: 2.2.5 auto-login-action (duration 00:04:22) [common]
 2155 13:18:36.886381  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
 2157 13:18:36.887232  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2160 13:18:36.888655  end: 2 depthcharge-action (duration 00:05:00) [common]
 2162 13:18:36.889826  Cleaning after the job
 2163 13:18:36.890295  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624241/tftp-deploy-a5ofgnnn/ramdisk
 2164 13:18:36.895747  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624241/tftp-deploy-a5ofgnnn/kernel
 2165 13:18:36.900906  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624241/tftp-deploy-a5ofgnnn/modules
 2166 13:18:36.902585  start: 5.1 power-off (timeout 00:00:30) [common]
 2167 13:18:36.903461  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
 2168 13:18:37.019660  >> Command sent successfully.

 2169 13:18:37.022905  Returned 0 in 0 seconds
 2170 13:18:37.123770  end: 5.1 power-off (duration 00:00:00) [common]
 2172 13:18:37.125498  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2173 13:18:37.126889  Listened to connection for namespace 'common' for up to 1s
 2175 13:18:37.128352  Listened to connection for namespace 'common' for up to 1s
 2176 13:18:38.127433  Finalising connection for namespace 'common'
 2177 13:18:38.128221  Disconnecting from shell: Finalise
 2178 13:18:38.128657  
 2179 13:18:38.229682  end: 5.2 read-feedback (duration 00:00:01) [common]
 2180 13:18:38.230280  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10624241
 2181 13:18:38.280860  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10624241
 2182 13:18:38.281109  JobError: Your job cannot terminate cleanly.