Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 13:48:36.077342 lava-dispatcher, installed at version: 2023.06
2 13:48:36.077555 start: 0 validate
3 13:48:36.077684 Start time: 2023-08-16 13:48:36.077676+00:00 (UTC)
4 13:48:36.077811 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:48:36.077957 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 13:48:36.330819 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:48:36.331614 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2312-g74888f4b13f0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:48:45.346738 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:48:45.347450 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2312-g74888f4b13f0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 13:48:45.615165 validate duration: 9.54
12 13:48:45.616466 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 13:48:45.617005 start: 1.1 download-retry (timeout 00:10:00) [common]
14 13:48:45.617506 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 13:48:45.618132 Not decompressing ramdisk as can be used compressed.
16 13:48:45.618619 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 13:48:45.619005 saving as /var/lib/lava/dispatcher/tmp/11299519/tftp-deploy-sbjpz5qy/ramdisk/rootfs.cpio.gz
18 13:48:45.619361 total size: 8418130 (8 MB)
19 13:48:46.123900 progress 0 % (0 MB)
20 13:48:46.129609 progress 5 % (0 MB)
21 13:48:46.131870 progress 10 % (0 MB)
22 13:48:46.134099 progress 15 % (1 MB)
23 13:48:46.136377 progress 20 % (1 MB)
24 13:48:46.138590 progress 25 % (2 MB)
25 13:48:46.140840 progress 30 % (2 MB)
26 13:48:46.142893 progress 35 % (2 MB)
27 13:48:46.145146 progress 40 % (3 MB)
28 13:48:46.147402 progress 45 % (3 MB)
29 13:48:46.149617 progress 50 % (4 MB)
30 13:48:46.151818 progress 55 % (4 MB)
31 13:48:46.153998 progress 60 % (4 MB)
32 13:48:46.156009 progress 65 % (5 MB)
33 13:48:46.158171 progress 70 % (5 MB)
34 13:48:46.160342 progress 75 % (6 MB)
35 13:48:46.162507 progress 80 % (6 MB)
36 13:48:46.164677 progress 85 % (6 MB)
37 13:48:46.167076 progress 90 % (7 MB)
38 13:48:46.169280 progress 95 % (7 MB)
39 13:48:46.171309 progress 100 % (8 MB)
40 13:48:46.171536 8 MB downloaded in 0.55 s (14.54 MB/s)
41 13:48:46.171702 end: 1.1.1 http-download (duration 00:00:01) [common]
43 13:48:46.171941 end: 1.1 download-retry (duration 00:00:01) [common]
44 13:48:46.172027 start: 1.2 download-retry (timeout 00:09:59) [common]
45 13:48:46.172111 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 13:48:46.172257 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2312-g74888f4b13f0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 13:48:46.172328 saving as /var/lib/lava/dispatcher/tmp/11299519/tftp-deploy-sbjpz5qy/kernel/bzImage
48 13:48:46.172388 total size: 8499088 (8 MB)
49 13:48:46.172448 No compression specified
50 13:48:46.173539 progress 0 % (0 MB)
51 13:48:46.175678 progress 5 % (0 MB)
52 13:48:46.177933 progress 10 % (0 MB)
53 13:48:46.180236 progress 15 % (1 MB)
54 13:48:46.182475 progress 20 % (1 MB)
55 13:48:46.184775 progress 25 % (2 MB)
56 13:48:46.187020 progress 30 % (2 MB)
57 13:48:46.189308 progress 35 % (2 MB)
58 13:48:46.191612 progress 40 % (3 MB)
59 13:48:46.193909 progress 45 % (3 MB)
60 13:48:46.196236 progress 50 % (4 MB)
61 13:48:46.198472 progress 55 % (4 MB)
62 13:48:46.200718 progress 60 % (4 MB)
63 13:48:46.202892 progress 65 % (5 MB)
64 13:48:46.205172 progress 70 % (5 MB)
65 13:48:46.207360 progress 75 % (6 MB)
66 13:48:46.209681 progress 80 % (6 MB)
67 13:48:46.211903 progress 85 % (6 MB)
68 13:48:46.214084 progress 90 % (7 MB)
69 13:48:46.216299 progress 95 % (7 MB)
70 13:48:46.218488 progress 100 % (8 MB)
71 13:48:46.218636 8 MB downloaded in 0.05 s (175.27 MB/s)
72 13:48:46.218778 end: 1.2.1 http-download (duration 00:00:00) [common]
74 13:48:46.219006 end: 1.2 download-retry (duration 00:00:00) [common]
75 13:48:46.219091 start: 1.3 download-retry (timeout 00:09:59) [common]
76 13:48:46.219175 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 13:48:46.219308 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2312-g74888f4b13f0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 13:48:46.219383 saving as /var/lib/lava/dispatcher/tmp/11299519/tftp-deploy-sbjpz5qy/modules/modules.tar
79 13:48:46.219443 total size: 253616 (0 MB)
80 13:48:46.219504 Using unxz to decompress xz
81 13:48:46.223796 progress 12 % (0 MB)
82 13:48:46.224184 progress 25 % (0 MB)
83 13:48:46.224417 progress 38 % (0 MB)
84 13:48:46.226004 progress 51 % (0 MB)
85 13:48:46.227885 progress 64 % (0 MB)
86 13:48:46.229642 progress 77 % (0 MB)
87 13:48:46.231477 progress 90 % (0 MB)
88 13:48:46.233366 progress 100 % (0 MB)
89 13:48:46.239216 0 MB downloaded in 0.02 s (12.24 MB/s)
90 13:48:46.239461 end: 1.3.1 http-download (duration 00:00:00) [common]
92 13:48:46.239788 end: 1.3 download-retry (duration 00:00:00) [common]
93 13:48:46.239882 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 13:48:46.239977 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 13:48:46.240113 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 13:48:46.240257 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 13:48:46.240524 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz
98 13:48:46.240690 makedir: /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin
99 13:48:46.240797 makedir: /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/tests
100 13:48:46.240896 makedir: /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/results
101 13:48:46.241014 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-add-keys
102 13:48:46.241226 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-add-sources
103 13:48:46.241380 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-background-process-start
104 13:48:46.241671 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-background-process-stop
105 13:48:46.241815 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-common-functions
106 13:48:46.241959 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-echo-ipv4
107 13:48:46.242099 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-install-packages
108 13:48:46.242224 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-installed-packages
109 13:48:46.242349 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-os-build
110 13:48:46.242481 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-probe-channel
111 13:48:46.242608 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-probe-ip
112 13:48:46.242733 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-target-ip
113 13:48:46.242857 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-target-mac
114 13:48:46.242980 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-target-storage
115 13:48:46.243109 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-test-case
116 13:48:46.243233 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-test-event
117 13:48:46.243356 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-test-feedback
118 13:48:46.243480 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-test-raise
119 13:48:46.243605 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-test-reference
120 13:48:46.243793 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-test-runner
121 13:48:46.243943 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-test-set
122 13:48:46.244157 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-test-shell
123 13:48:46.244289 Updating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-install-packages (oe)
124 13:48:46.244444 Updating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/bin/lava-installed-packages (oe)
125 13:48:46.244581 Creating /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/environment
126 13:48:46.244681 LAVA metadata
127 13:48:46.244754 - LAVA_JOB_ID=11299519
128 13:48:46.244848 - LAVA_DISPATCHER_IP=192.168.201.1
129 13:48:46.244954 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 13:48:46.245096 skipped lava-vland-overlay
131 13:48:46.245352 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 13:48:46.245476 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 13:48:46.245592 skipped lava-multinode-overlay
134 13:48:46.245691 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 13:48:46.245775 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 13:48:46.245849 Loading test definitions
137 13:48:46.245941 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 13:48:46.246021 Using /lava-11299519 at stage 0
139 13:48:46.246329 uuid=11299519_1.4.2.3.1 testdef=None
140 13:48:46.246417 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 13:48:46.246506 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 13:48:46.247044 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 13:48:46.247263 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 13:48:46.248471 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 13:48:46.248838 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 13:48:46.249780 runner path: /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/0/tests/0_dmesg test_uuid 11299519_1.4.2.3.1
149 13:48:46.250038 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 13:48:46.250392 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 13:48:46.250491 Using /lava-11299519 at stage 1
153 13:48:46.250905 uuid=11299519_1.4.2.3.5 testdef=None
154 13:48:46.251021 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 13:48:46.251133 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 13:48:46.251834 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 13:48:46.252051 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 13:48:46.252782 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 13:48:46.253008 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 13:48:46.253725 runner path: /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/1/tests/1_bootrr test_uuid 11299519_1.4.2.3.5
163 13:48:46.253878 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 13:48:46.254082 Creating lava-test-runner.conf files
166 13:48:46.254147 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/0 for stage 0
167 13:48:46.254237 - 0_dmesg
168 13:48:46.254315 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299519/lava-overlay-9a3l5btz/lava-11299519/1 for stage 1
169 13:48:46.254404 - 1_bootrr
170 13:48:46.254497 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 13:48:46.254582 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 13:48:46.263161 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 13:48:46.263270 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 13:48:46.263358 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 13:48:46.263443 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 13:48:46.263527 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 13:48:46.515494 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 13:48:46.515917 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 13:48:46.516041 extracting modules file /var/lib/lava/dispatcher/tmp/11299519/tftp-deploy-sbjpz5qy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299519/extract-overlay-ramdisk-lil9v6l2/ramdisk
180 13:48:46.529823 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 13:48:46.529956 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 13:48:46.530049 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299519/compress-overlay-c2evkx5l/overlay-1.4.2.4.tar.gz to ramdisk
183 13:48:46.530121 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299519/compress-overlay-c2evkx5l/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11299519/extract-overlay-ramdisk-lil9v6l2/ramdisk
184 13:48:46.539120 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 13:48:46.539237 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 13:48:46.539361 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 13:48:46.539447 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 13:48:46.539563 Building ramdisk /var/lib/lava/dispatcher/tmp/11299519/extract-overlay-ramdisk-lil9v6l2/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11299519/extract-overlay-ramdisk-lil9v6l2/ramdisk
189 13:48:46.686298 >> 49825 blocks
190 13:48:47.515841 rename /var/lib/lava/dispatcher/tmp/11299519/extract-overlay-ramdisk-lil9v6l2/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11299519/tftp-deploy-sbjpz5qy/ramdisk/ramdisk.cpio.gz
191 13:48:47.516317 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 13:48:47.516446 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 13:48:47.516552 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 13:48:47.516654 No mkimage arch provided, not using FIT.
195 13:48:47.516742 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 13:48:47.516828 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 13:48:47.516935 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 13:48:47.517030 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 13:48:47.517108 No LXC device requested
200 13:48:47.517184 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 13:48:47.517272 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 13:48:47.517356 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 13:48:47.517427 Checking files for TFTP limit of 4294967296 bytes.
204 13:48:47.517836 end: 1 tftp-deploy (duration 00:00:02) [common]
205 13:48:47.517938 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 13:48:47.518027 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 13:48:47.518142 substitutions:
208 13:48:47.518208 - {DTB}: None
209 13:48:47.518270 - {INITRD}: 11299519/tftp-deploy-sbjpz5qy/ramdisk/ramdisk.cpio.gz
210 13:48:47.518329 - {KERNEL}: 11299519/tftp-deploy-sbjpz5qy/kernel/bzImage
211 13:48:47.518386 - {LAVA_MAC}: None
212 13:48:47.518444 - {PRESEED_CONFIG}: None
213 13:48:47.518500 - {PRESEED_LOCAL}: None
214 13:48:47.518555 - {RAMDISK}: 11299519/tftp-deploy-sbjpz5qy/ramdisk/ramdisk.cpio.gz
215 13:48:47.518611 - {ROOT_PART}: None
216 13:48:47.518666 - {ROOT}: None
217 13:48:47.518720 - {SERVER_IP}: 192.168.201.1
218 13:48:47.518774 - {TEE}: None
219 13:48:47.518829 Parsed boot commands:
220 13:48:47.518883 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 13:48:47.519063 Parsed boot commands: tftpboot 192.168.201.1 11299519/tftp-deploy-sbjpz5qy/kernel/bzImage 11299519/tftp-deploy-sbjpz5qy/kernel/cmdline 11299519/tftp-deploy-sbjpz5qy/ramdisk/ramdisk.cpio.gz
222 13:48:47.519152 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 13:48:47.519238 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 13:48:47.519334 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 13:48:47.519416 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 13:48:47.519488 Not connected, no need to disconnect.
227 13:48:47.519562 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 13:48:47.519811 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 13:48:47.519881 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-1'
230 13:48:47.523922 Setting prompt string to ['lava-test: # ']
231 13:48:47.524287 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 13:48:47.524397 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 13:48:47.524498 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 13:48:47.524592 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 13:48:47.524824 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-1' '--port=1' '--command=reboot'
236 13:48:52.658722 >> Command sent successfully.
237 13:48:52.661140 Returned 0 in 5 seconds
238 13:48:52.761540 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 13:48:52.761878 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 13:48:52.761984 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 13:48:52.762074 Setting prompt string to 'Starting depthcharge on Magolor...'
243 13:48:52.762144 Changing prompt to 'Starting depthcharge on Magolor...'
244 13:48:52.762214 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
245 13:48:52.762499 [Enter `^Ec?' for help]
246 13:48:53.902464
247 13:48:53.902674
248 13:48:53.912580 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
249 13:48:53.915799 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
250 13:48:53.919187 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
251 13:48:53.925800 CPU: AES supported, TXT NOT supported, VT supported
252 13:48:53.929313 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
253 13:48:53.935898 PCH: device id 4d87 (rev 01) is Jasperlake Super
254 13:48:53.939575 IGD: device id 4e55 (rev 01) is Jasperlake GT4
255 13:48:53.942886 VBOOT: Loading verstage.
256 13:48:53.949922 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 13:48:53.953249 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 13:48:53.960031 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 13:48:53.963241 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
260 13:48:53.966651
261 13:48:53.966763
262 13:48:53.976587 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
263 13:48:53.990808 Probing TPM: . done!
264 13:48:53.994389 TPM ready after 0 ms
265 13:48:53.997583 Connected to device vid:did:rid of 1ae0:0028:00
266 13:48:54.009207 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
267 13:48:54.015866 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
268 13:48:54.067876 Initialized TPM device CR50 revision 0
269 13:48:54.077410 tlcl_send_startup: Startup return code is 0
270 13:48:54.077532 TPM: setup succeeded
271 13:48:54.091575 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 13:48:54.105866 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 13:48:54.121259 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 13:48:54.132346 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 13:48:54.135424 Chrome EC: UHEPI supported
276 13:48:54.135521 Phase 1
277 13:48:54.142741 FMAP: area GBB found @ c05000 (12288 bytes)
278 13:48:54.149077 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 13:48:54.155699 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 13:48:54.159150 Recovery requested (1009000e)
281 13:48:54.162686 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 13:48:54.173977 tlcl_extend: response is 0
283 13:48:54.181410 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 13:48:54.190218 tlcl_extend: response is 0
285 13:48:54.197211 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 13:48:54.200012 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
287 13:48:54.207431 BS: verstage times (exec / console): total (unknown) / 124 ms
288 13:48:54.207552
289 13:48:54.207721
290 13:48:54.220773 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
291 13:48:54.223748 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
292 13:48:54.230855 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
293 13:48:54.234169 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
294 13:48:54.237556 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
295 13:48:54.244260 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
296 13:48:54.247457 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
297 13:48:54.250959 TCO_STS: 0000 0001
298 13:48:54.254374 GEN_PMCON: d0015038 00002200
299 13:48:54.257657 GBLRST_CAUSE: 00000000 00000000
300 13:48:54.257747 prev_sleep_state 5
301 13:48:54.260801 Boot Count incremented to 4041
302 13:48:54.267449 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 13:48:54.270982 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
304 13:48:54.274697 Chrome EC: UHEPI supported
305 13:48:54.281265 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
306 13:48:54.287978 Probing TPM: done!
307 13:48:54.294426 Connected to device vid:did:rid of 1ae0:0028:00
308 13:48:54.304362 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
309 13:48:54.312966 Initialized TPM device CR50 revision 0
310 13:48:54.323821 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 13:48:54.330882 MRC: Hash idx 0x100b comparison successful.
312 13:48:54.331001 MRC cache found, size 5458
313 13:48:54.334217 bootmode is set to: 2
314 13:48:54.337662 SPD INDEX = 0
315 13:48:54.340937 CBFS: Found 'spd.bin' @0x40c40 size 0x600
316 13:48:54.344387 SPD: module type is LPDDR4X
317 13:48:54.351085 SPD: module part number is MT53E512M32D2NP-046 WT:E
318 13:48:54.354225 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
319 13:48:54.360680 SPD: device width 16 bits, bus width 32 bits
320 13:48:54.364204 SPD: module size is 4096 MB (per channel)
321 13:48:54.367325 meminit_channels: DRAM half-populated
322 13:48:54.450399 CBMEM:
323 13:48:54.453774 IMD: root @ 0x76fff000 254 entries.
324 13:48:54.456675 IMD: root @ 0x76ffec00 62 entries.
325 13:48:54.460319 FMAP: area RO_VPD found @ c00000 (16384 bytes)
326 13:48:54.466795 WARNING: RO_VPD is uninitialized or empty.
327 13:48:54.470192 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
328 13:48:54.473918 External stage cache:
329 13:48:54.477066 IMD: root @ 0x7b3ff000 254 entries.
330 13:48:54.480693 IMD: root @ 0x7b3fec00 62 entries.
331 13:48:54.490045 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
332 13:48:54.496973 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 13:48:54.503348 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
334 13:48:54.512347 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 13:48:54.515157 cse_lite: Skip switching to RW in the recovery path
336 13:48:54.518442 1 DIMMs found
337 13:48:54.518563 SMM Memory Map
338 13:48:54.522029 SMRAM : 0x7b000000 0x800000
339 13:48:54.525325 Subregion 0: 0x7b000000 0x200000
340 13:48:54.528674 Subregion 1: 0x7b200000 0x200000
341 13:48:54.535408 Subregion 2: 0x7b400000 0x400000
342 13:48:54.535527 top_of_ram = 0x77000000
343 13:48:54.541829 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 13:48:54.548484 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 13:48:54.551725 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 13:48:54.555193 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
347 13:48:54.561850 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
348 13:48:54.574029 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
349 13:48:54.577502 Processing 188 relocs. Offset value of 0x74c0e000
350 13:48:54.587294 BS: romstage times (exec / console): total (unknown) / 255 ms
351 13:48:54.592024
352 13:48:54.592144
353 13:48:54.601723 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
354 13:48:54.605094 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 13:48:54.611985 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
356 13:48:54.618474 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
357 13:48:54.674602 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
358 13:48:54.681334 Processing 4805 relocs. Offset value of 0x75da8000
359 13:48:54.684825 BS: postcar times (exec / console): total (unknown) / 42 ms
360 13:48:54.688161
361 13:48:54.688269
362 13:48:54.697785 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
363 13:48:54.697886 Normal boot
364 13:48:54.701634 EC returned error result code 3
365 13:48:54.704916 FW_CONFIG value is 0x204
366 13:48:54.708221 GENERIC: 0.0 disabled by fw_config
367 13:48:54.714636 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 13:48:54.718108 I2C: 00:10 disabled by fw_config
369 13:48:54.721895 I2C: 00:10 disabled by fw_config
370 13:48:54.724772 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 13:48:54.731311 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 13:48:54.734598 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 13:48:54.741307 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 13:48:54.744586 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
375 13:48:54.748206 I2C: 00:10 disabled by fw_config
376 13:48:54.754738 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
377 13:48:54.761437 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
378 13:48:54.764775 I2C: 00:1a disabled by fw_config
379 13:48:54.767859 I2C: 00:1a disabled by fw_config
380 13:48:54.774716 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 13:48:54.777930 fw_config match found: AUDIO_AMP=UNPROVISIONED
382 13:48:54.781575 GENERIC: 0.0 disabled by fw_config
383 13:48:54.788135 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 13:48:54.791785 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
385 13:48:54.797911 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
386 13:48:54.801188 microcode: Update skipped, already up-to-date
387 13:48:54.807889 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
388 13:48:54.833732 Detected 2 core, 2 thread CPU.
389 13:48:54.836831 Setting up SMI for CPU
390 13:48:54.840321 IED base = 0x7b400000
391 13:48:54.840403 IED size = 0x00400000
392 13:48:54.843770 Will perform SMM setup.
393 13:48:54.846956 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
394 13:48:54.857137 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 13:48:54.860068 Processing 16 relocs. Offset value of 0x00030000
396 13:48:54.864236 Attempting to start 1 APs
397 13:48:54.867243 Waiting for 10ms after sending INIT.
398 13:48:54.883779 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 2.
399 13:48:54.883884 done.
400 13:48:54.890193 Waiting for 2nd SIPI to complete...done.
401 13:48:54.896982 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 13:48:54.903671 Processing 13 relocs. Offset value of 0x00038000
403 13:48:54.903786 Unable to locate Global NVS
404 13:48:54.913591 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
405 13:48:54.916826 Installing permanent SMM handler to 0x7b000000
406 13:48:54.923438 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
407 13:48:54.930130 Processing 704 relocs. Offset value of 0x7b010000
408 13:48:54.937582 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 13:48:54.943259 Processing 13 relocs. Offset value of 0x7b008000
410 13:48:54.950386 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 13:48:54.953260 Unable to locate Global NVS
412 13:48:54.960087 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
413 13:48:54.963277 Clearing SMI status registers
414 13:48:54.963357 SMI_STS: PM1
415 13:48:54.966748 PM1_STS: PWRBTN
416 13:48:54.966828 TCO_STS: INTRD_DET
417 13:48:54.969913 GPE0 STD STS:
418 13:48:54.976722 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
419 13:48:54.980504 In relocation handler: CPU 0
420 13:48:54.983508 New SMBASE=0x7b000000 IEDBASE=0x7b400000
421 13:48:54.986813 Writing SMRR. base = 0x7b000006, mask=0xff800800
422 13:48:54.990404 Relocation complete.
423 13:48:54.997998 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
424 13:48:55.001601 In relocation handler: CPU 1
425 13:48:55.005031 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
426 13:48:55.008160 Writing SMRR. base = 0x7b000006, mask=0xff800800
427 13:48:55.011818 Relocation complete.
428 13:48:55.014822 Initializing CPU #0
429 13:48:55.018194 CPU: vendor Intel device 906c0
430 13:48:55.021916 CPU: family 06, model 9c, stepping 00
431 13:48:55.025008 Clearing out pending MCEs
432 13:48:55.025161 Setting up local APIC...
433 13:48:55.028253 apic_id: 0x00 done.
434 13:48:55.031866 Turbo is available but hidden
435 13:48:55.035114 Turbo is available and visible
436 13:48:55.038385 microcode: Update skipped, already up-to-date
437 13:48:55.041553 CPU #0 initialized
438 13:48:55.045037 Initializing CPU #1
439 13:48:55.048354 CPU: vendor Intel device 906c0
440 13:48:55.051971 CPU: family 06, model 9c, stepping 00
441 13:48:55.052056 Clearing out pending MCEs
442 13:48:55.054670 Setting up local APIC...
443 13:48:55.058428 apic_id: 0x02 done.
444 13:48:55.061438 microcode: Update skipped, already up-to-date
445 13:48:55.065038 CPU #1 initialized
446 13:48:55.067857 bsp_do_flight_plan done after 175 msecs.
447 13:48:55.071436 CPU: frequency set to 2800 MHz
448 13:48:55.074429 Enabling SMIs.
449 13:48:55.081213 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 289 ms
450 13:48:55.089720 Probing TPM: done!
451 13:48:55.096608 Connected to device vid:did:rid of 1ae0:0028:00
452 13:48:55.106219 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
453 13:48:55.109567 Initialized TPM device CR50 revision 0
454 13:48:55.112912 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
455 13:48:55.120109 Found a VBT of 7680 bytes after decompression
456 13:48:55.126547 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
457 13:48:55.162156 Detected 2 core, 2 thread CPU.
458 13:48:55.165292 Detected 2 core, 2 thread CPU.
459 13:48:55.526794 Display FSP Version Info HOB
460 13:48:55.529934 Reference Code - CPU = 8.7.22.30
461 13:48:55.533213 uCode Version = 24.0.0.1f
462 13:48:55.536522 TXT ACM version = ff.ff.ff.ffff
463 13:48:55.540024 Reference Code - ME = 8.7.22.30
464 13:48:55.543367 MEBx version = 0.0.0.0
465 13:48:55.546836 ME Firmware Version = Consumer SKU
466 13:48:55.549978 Reference Code - PCH = 8.7.22.30
467 13:48:55.553160 PCH-CRID Status = Disabled
468 13:48:55.556589 PCH-CRID Original Value = ff.ff.ff.ffff
469 13:48:55.559835 PCH-CRID New Value = ff.ff.ff.ffff
470 13:48:55.563416 OPROM - RST - RAID = ff.ff.ff.ffff
471 13:48:55.566455 PCH Hsio Version = 4.0.0.0
472 13:48:55.569881 Reference Code - SA - System Agent = 8.7.22.30
473 13:48:55.573418 Reference Code - MRC = 0.0.4.68
474 13:48:55.577063 SA - PCIe Version = 8.7.22.30
475 13:48:55.580854 SA-CRID Status = Disabled
476 13:48:55.584241 SA-CRID Original Value = 0.0.0.0
477 13:48:55.584325 SA-CRID New Value = 0.0.0.0
478 13:48:55.587397 OPROM - VBIOS = ff.ff.ff.ffff
479 13:48:55.595442 IO Manageability Engine FW Version = ff.ff.ff.ffff
480 13:48:55.595534 PHY Build Version = ff.ff.ff.ffff
481 13:48:55.602165 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
482 13:48:55.608851 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
483 13:48:55.608936 ITSS IRQ Polarities Before:
484 13:48:55.612076 IPC0: 0xffffffff
485 13:48:55.612159 IPC1: 0xffffffff
486 13:48:55.615266 IPC2: 0xffffffff
487 13:48:55.618888 IPC3: 0xffffffff
488 13:48:55.618971 ITSS IRQ Polarities After:
489 13:48:55.621988 IPC0: 0xffffffff
490 13:48:55.622069 IPC1: 0xffffffff
491 13:48:55.625550 IPC2: 0xffffffff
492 13:48:55.625632 IPC3: 0xffffffff
493 13:48:55.638976 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
494 13:48:55.645737 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
495 13:48:55.648838 Enumerating buses...
496 13:48:55.652062 Show all devs... Before device enumeration.
497 13:48:55.655231 Root Device: enabled 1
498 13:48:55.655312 CPU_CLUSTER: 0: enabled 1
499 13:48:55.658848 DOMAIN: 0000: enabled 1
500 13:48:55.662066 PCI: 00:00.0: enabled 1
501 13:48:55.665190 PCI: 00:02.0: enabled 1
502 13:48:55.665274 PCI: 00:04.0: enabled 1
503 13:48:55.668593 PCI: 00:05.0: enabled 1
504 13:48:55.671831 PCI: 00:09.0: enabled 0
505 13:48:55.675315 PCI: 00:12.6: enabled 0
506 13:48:55.675397 PCI: 00:14.0: enabled 1
507 13:48:55.678758 PCI: 00:14.1: enabled 0
508 13:48:55.682211 PCI: 00:14.2: enabled 0
509 13:48:55.685255 PCI: 00:14.3: enabled 1
510 13:48:55.685338 PCI: 00:14.5: enabled 1
511 13:48:55.688698 PCI: 00:15.0: enabled 1
512 13:48:55.691914 PCI: 00:15.1: enabled 1
513 13:48:55.691996 PCI: 00:15.2: enabled 1
514 13:48:55.695298 PCI: 00:15.3: enabled 1
515 13:48:55.698456 PCI: 00:16.0: enabled 1
516 13:48:55.702422 PCI: 00:16.1: enabled 0
517 13:48:55.702505 PCI: 00:16.4: enabled 0
518 13:48:55.705207 PCI: 00:16.5: enabled 0
519 13:48:55.708289 PCI: 00:17.0: enabled 0
520 13:48:55.712424 PCI: 00:19.0: enabled 1
521 13:48:55.712506 PCI: 00:19.1: enabled 0
522 13:48:55.715282 PCI: 00:19.2: enabled 1
523 13:48:55.718612 PCI: 00:1a.0: enabled 1
524 13:48:55.718694 PCI: 00:1c.0: enabled 0
525 13:48:55.721874 PCI: 00:1c.1: enabled 0
526 13:48:55.725139 PCI: 00:1c.2: enabled 0
527 13:48:55.728494 PCI: 00:1c.3: enabled 0
528 13:48:55.728576 PCI: 00:1c.4: enabled 0
529 13:48:55.731918 PCI: 00:1c.5: enabled 0
530 13:48:55.735210 PCI: 00:1c.6: enabled 0
531 13:48:55.738419 PCI: 00:1c.7: enabled 1
532 13:48:55.738513 PCI: 00:1e.0: enabled 0
533 13:48:55.741808 PCI: 00:1e.1: enabled 0
534 13:48:55.745182 PCI: 00:1e.2: enabled 1
535 13:48:55.748369 PCI: 00:1e.3: enabled 0
536 13:48:55.748450 PCI: 00:1f.0: enabled 1
537 13:48:55.751822 PCI: 00:1f.1: enabled 1
538 13:48:55.755144 PCI: 00:1f.2: enabled 1
539 13:48:55.755226 PCI: 00:1f.3: enabled 1
540 13:48:55.758524 PCI: 00:1f.4: enabled 0
541 13:48:55.761869 PCI: 00:1f.5: enabled 1
542 13:48:55.765071 PCI: 00:1f.7: enabled 0
543 13:48:55.765153 GENERIC: 0.0: enabled 1
544 13:48:55.768752 GENERIC: 0.0: enabled 1
545 13:48:55.771908 USB0 port 0: enabled 1
546 13:48:55.775025 GENERIC: 0.0: enabled 1
547 13:48:55.775107 I2C: 00:2c: enabled 1
548 13:48:55.778368 I2C: 00:15: enabled 1
549 13:48:55.781841 GENERIC: 0.0: enabled 0
550 13:48:55.781923 I2C: 00:15: enabled 1
551 13:48:55.785423 I2C: 00:10: enabled 0
552 13:48:55.788630 I2C: 00:10: enabled 0
553 13:48:55.788712 I2C: 00:2c: enabled 1
554 13:48:55.792110 I2C: 00:40: enabled 1
555 13:48:55.795510 I2C: 00:10: enabled 1
556 13:48:55.795595 I2C: 00:39: enabled 1
557 13:48:55.798403 I2C: 00:36: enabled 1
558 13:48:55.801991 I2C: 00:10: enabled 0
559 13:48:55.802076 I2C: 00:0c: enabled 1
560 13:48:55.805265 I2C: 00:50: enabled 1
561 13:48:55.808745 I2C: 00:1a: enabled 1
562 13:48:55.808829 I2C: 00:1a: enabled 0
563 13:48:55.811821 I2C: 00:1a: enabled 0
564 13:48:55.815171 I2C: 00:28: enabled 1
565 13:48:55.815255 I2C: 00:29: enabled 1
566 13:48:55.818500 PCI: 00:00.0: enabled 1
567 13:48:55.821680 SPI: 00: enabled 1
568 13:48:55.821765 PNP: 0c09.0: enabled 1
569 13:48:55.825083 GENERIC: 0.0: enabled 0
570 13:48:55.828337 USB2 port 0: enabled 1
571 13:48:55.831673 USB2 port 1: enabled 1
572 13:48:55.831769 USB2 port 2: enabled 1
573 13:48:55.835276 USB2 port 3: enabled 1
574 13:48:55.838327 USB2 port 4: enabled 0
575 13:48:55.838409 USB2 port 5: enabled 1
576 13:48:55.841929 USB2 port 6: enabled 0
577 13:48:55.844932 USB2 port 7: enabled 1
578 13:48:55.845015 USB3 port 0: enabled 1
579 13:48:55.848934 USB3 port 1: enabled 1
580 13:48:55.851460 USB3 port 2: enabled 1
581 13:48:55.855029 USB3 port 3: enabled 1
582 13:48:55.855111 APIC: 00: enabled 1
583 13:48:55.858331 APIC: 02: enabled 1
584 13:48:55.858414 Compare with tree...
585 13:48:55.861519 Root Device: enabled 1
586 13:48:55.864967 CPU_CLUSTER: 0: enabled 1
587 13:48:55.868065 APIC: 00: enabled 1
588 13:48:55.868147 APIC: 02: enabled 1
589 13:48:55.871768 DOMAIN: 0000: enabled 1
590 13:48:55.874962 PCI: 00:00.0: enabled 1
591 13:48:55.878174 PCI: 00:02.0: enabled 1
592 13:48:55.878256 PCI: 00:04.0: enabled 1
593 13:48:55.881559 GENERIC: 0.0: enabled 1
594 13:48:55.885083 PCI: 00:05.0: enabled 1
595 13:48:55.888135 GENERIC: 0.0: enabled 1
596 13:48:55.891362 PCI: 00:09.0: enabled 0
597 13:48:55.891445 PCI: 00:12.6: enabled 0
598 13:48:55.894853 PCI: 00:14.0: enabled 1
599 13:48:55.898240 USB0 port 0: enabled 1
600 13:48:55.901439 USB2 port 0: enabled 1
601 13:48:55.904892 USB2 port 1: enabled 1
602 13:48:55.904975 USB2 port 2: enabled 1
603 13:48:55.908854 USB2 port 3: enabled 1
604 13:48:55.911415 USB2 port 4: enabled 0
605 13:48:55.914890 USB2 port 5: enabled 1
606 13:48:55.918435 USB2 port 6: enabled 0
607 13:48:55.921452 USB2 port 7: enabled 1
608 13:48:55.921536 USB3 port 0: enabled 1
609 13:48:55.924908 USB3 port 1: enabled 1
610 13:48:55.927962 USB3 port 2: enabled 1
611 13:48:55.931839 USB3 port 3: enabled 1
612 13:48:55.934561 PCI: 00:14.1: enabled 0
613 13:48:55.934646 PCI: 00:14.2: enabled 0
614 13:48:55.938171 PCI: 00:14.3: enabled 1
615 13:48:55.941278 GENERIC: 0.0: enabled 1
616 13:48:55.944530 PCI: 00:14.5: enabled 1
617 13:48:55.947856 PCI: 00:15.0: enabled 1
618 13:48:55.947942 I2C: 00:2c: enabled 1
619 13:48:55.951172 I2C: 00:15: enabled 1
620 13:48:55.954809 PCI: 00:15.1: enabled 1
621 13:48:55.958088 PCI: 00:15.2: enabled 1
622 13:48:55.961297 GENERIC: 0.0: enabled 0
623 13:48:55.961380 I2C: 00:15: enabled 1
624 13:48:55.964863 I2C: 00:10: enabled 0
625 13:48:55.967914 I2C: 00:10: enabled 0
626 13:48:55.971218 I2C: 00:2c: enabled 1
627 13:48:55.971302 I2C: 00:40: enabled 1
628 13:48:55.974537 I2C: 00:10: enabled 1
629 13:48:55.977932 I2C: 00:39: enabled 1
630 13:48:55.981317 PCI: 00:15.3: enabled 1
631 13:48:55.981403 I2C: 00:36: enabled 1
632 13:48:55.984780 I2C: 00:10: enabled 0
633 13:48:55.987882 I2C: 00:0c: enabled 1
634 13:48:55.991152 I2C: 00:50: enabled 1
635 13:48:55.991237 PCI: 00:16.0: enabled 1
636 13:48:55.994599 PCI: 00:16.1: enabled 0
637 13:48:55.998040 PCI: 00:16.4: enabled 0
638 13:48:56.001209 PCI: 00:16.5: enabled 0
639 13:48:56.004868 PCI: 00:17.0: enabled 0
640 13:48:56.004955 PCI: 00:19.0: enabled 1
641 13:48:56.008223 I2C: 00:1a: enabled 1
642 13:48:56.011210 I2C: 00:1a: enabled 0
643 13:48:56.014496 I2C: 00:1a: enabled 0
644 13:48:56.014582 I2C: 00:28: enabled 1
645 13:48:56.017782 I2C: 00:29: enabled 1
646 13:48:56.021034 PCI: 00:19.1: enabled 0
647 13:48:56.024885 PCI: 00:19.2: enabled 1
648 13:48:56.027896 PCI: 00:1a.0: enabled 1
649 13:48:56.027980 PCI: 00:1e.0: enabled 0
650 13:48:56.031107 PCI: 00:1e.1: enabled 0
651 13:48:56.034552 PCI: 00:1e.2: enabled 1
652 13:48:56.037787 SPI: 00: enabled 1
653 13:48:56.037870 PCI: 00:1e.3: enabled 0
654 13:48:56.041122 PCI: 00:1f.0: enabled 1
655 13:48:56.044262 PNP: 0c09.0: enabled 1
656 13:48:56.047571 PCI: 00:1f.1: enabled 1
657 13:48:56.051319 PCI: 00:1f.2: enabled 1
658 13:48:56.051407 PCI: 00:1f.3: enabled 1
659 13:48:56.054446 GENERIC: 0.0: enabled 0
660 13:48:56.057787 PCI: 00:1f.4: enabled 0
661 13:48:56.061058 PCI: 00:1f.5: enabled 1
662 13:48:56.064762 PCI: 00:1f.7: enabled 0
663 13:48:56.064858 Root Device scanning...
664 13:48:56.067759 scan_static_bus for Root Device
665 13:48:56.071579 CPU_CLUSTER: 0 enabled
666 13:48:56.074394 DOMAIN: 0000 enabled
667 13:48:56.074480 DOMAIN: 0000 scanning...
668 13:48:56.077961 PCI: pci_scan_bus for bus 00
669 13:48:56.080920 PCI: 00:00.0 [8086/0000] ops
670 13:48:56.084187 PCI: 00:00.0 [8086/4e22] enabled
671 13:48:56.087615 PCI: 00:02.0 [8086/0000] bus ops
672 13:48:56.091320 PCI: 00:02.0 [8086/4e55] enabled
673 13:48:56.094136 PCI: 00:04.0 [8086/0000] bus ops
674 13:48:56.097521 PCI: 00:04.0 [8086/4e03] enabled
675 13:48:56.100761 PCI: 00:05.0 [8086/0000] bus ops
676 13:48:56.104160 PCI: 00:05.0 [8086/4e19] enabled
677 13:48:56.107965 PCI: 00:08.0 [8086/4e11] enabled
678 13:48:56.110874 PCI: 00:14.0 [8086/0000] bus ops
679 13:48:56.114317 PCI: 00:14.0 [8086/4ded] enabled
680 13:48:56.117619 PCI: 00:14.2 [8086/4def] disabled
681 13:48:56.123932 PCI: 00:14.3 [8086/0000] bus ops
682 13:48:56.125014 PCI: 00:14.3 [8086/4df0] enabled
683 13:48:56.127613 PCI: 00:14.5 [8086/0000] ops
684 13:48:56.131266 PCI: 00:14.5 [8086/4df8] enabled
685 13:48:56.134382 PCI: 00:15.0 [8086/0000] bus ops
686 13:48:56.137552 PCI: 00:15.0 [8086/4de8] enabled
687 13:48:56.141132 PCI: 00:15.1 [8086/0000] bus ops
688 13:48:56.144396 PCI: 00:15.1 [8086/4de9] enabled
689 13:48:56.147770 PCI: 00:15.2 [8086/0000] bus ops
690 13:48:56.151257 PCI: 00:15.2 [8086/4dea] enabled
691 13:48:56.154297 PCI: 00:15.3 [8086/0000] bus ops
692 13:48:56.157716 PCI: 00:15.3 [8086/4deb] enabled
693 13:48:56.161279 PCI: 00:16.0 [8086/0000] ops
694 13:48:56.164403 PCI: 00:16.0 [8086/4de0] enabled
695 13:48:56.167669 PCI: 00:19.0 [8086/0000] bus ops
696 13:48:56.171412 PCI: 00:19.0 [8086/4dc5] enabled
697 13:48:56.174569 PCI: 00:19.2 [8086/0000] ops
698 13:48:56.178132 PCI: 00:19.2 [8086/4dc7] enabled
699 13:48:56.181108 PCI: 00:1a.0 [8086/0000] ops
700 13:48:56.184535 PCI: 00:1a.0 [8086/4dc4] enabled
701 13:48:56.187625 PCI: 00:1e.0 [8086/0000] ops
702 13:48:56.190888 PCI: 00:1e.0 [8086/4da8] disabled
703 13:48:56.194518 PCI: 00:1e.2 [8086/0000] bus ops
704 13:48:56.197648 PCI: 00:1e.2 [8086/4daa] enabled
705 13:48:56.201264 PCI: 00:1f.0 [8086/0000] bus ops
706 13:48:56.204225 PCI: 00:1f.0 [8086/4d87] enabled
707 13:48:56.207415 PCI: Static device PCI: 00:1f.1 not found, disabling it.
708 13:48:56.210756 RTC Init
709 13:48:56.214090 Set power on after power failure.
710 13:48:56.214175 Disabling Deep S3
711 13:48:56.217431 Disabling Deep S3
712 13:48:56.217513 Disabling Deep S4
713 13:48:56.220836 Disabling Deep S4
714 13:48:56.224011 Disabling Deep S5
715 13:48:56.224093 Disabling Deep S5
716 13:48:56.227456 PCI: 00:1f.2 [0000/0000] hidden
717 13:48:56.230894 PCI: 00:1f.3 [8086/0000] bus ops
718 13:48:56.233871 PCI: 00:1f.3 [8086/4dc8] enabled
719 13:48:56.237351 PCI: 00:1f.5 [8086/0000] bus ops
720 13:48:56.240972 PCI: 00:1f.5 [8086/4da4] enabled
721 13:48:56.244082 PCI: Leftover static devices:
722 13:48:56.244164 PCI: 00:12.6
723 13:48:56.247620 PCI: 00:09.0
724 13:48:56.247711 PCI: 00:14.1
725 13:48:56.250687 PCI: 00:16.1
726 13:48:56.250769 PCI: 00:16.4
727 13:48:56.250834 PCI: 00:16.5
728 13:48:56.253894 PCI: 00:17.0
729 13:48:56.253975 PCI: 00:19.1
730 13:48:56.258017 PCI: 00:1e.1
731 13:48:56.258101 PCI: 00:1e.3
732 13:48:56.258166 PCI: 00:1f.1
733 13:48:56.262390 PCI: 00:1f.4
734 13:48:56.262474 PCI: 00:1f.7
735 13:48:56.265584 PCI: Check your devicetree.cb.
736 13:48:56.268702 PCI: 00:02.0 scanning...
737 13:48:56.272760 scan_generic_bus for PCI: 00:02.0
738 13:48:56.276421 scan_generic_bus for PCI: 00:02.0 done
739 13:48:56.278651 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
740 13:48:56.282111 PCI: 00:04.0 scanning...
741 13:48:56.285413 scan_generic_bus for PCI: 00:04.0
742 13:48:56.288727 GENERIC: 0.0 enabled
743 13:48:56.292174 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
744 13:48:56.298832 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
745 13:48:56.302416 PCI: 00:05.0 scanning...
746 13:48:56.305810 scan_generic_bus for PCI: 00:05.0
747 13:48:56.305895 GENERIC: 0.0 enabled
748 13:48:56.312138 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
749 13:48:56.318887 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
750 13:48:56.318980 PCI: 00:14.0 scanning...
751 13:48:56.322131 scan_static_bus for PCI: 00:14.0
752 13:48:56.325758 USB0 port 0 enabled
753 13:48:56.328816 USB0 port 0 scanning...
754 13:48:56.332187 scan_static_bus for USB0 port 0
755 13:48:56.332272 USB2 port 0 enabled
756 13:48:56.335620 USB2 port 1 enabled
757 13:48:56.338869 USB2 port 2 enabled
758 13:48:56.338953 USB2 port 3 enabled
759 13:48:56.342579 USB2 port 4 disabled
760 13:48:56.342662 USB2 port 5 enabled
761 13:48:56.345520 USB2 port 6 disabled
762 13:48:56.348960 USB2 port 7 enabled
763 13:48:56.349043 USB3 port 0 enabled
764 13:48:56.352262 USB3 port 1 enabled
765 13:48:56.355361 USB3 port 2 enabled
766 13:48:56.355447 USB3 port 3 enabled
767 13:48:56.358842 USB2 port 0 scanning...
768 13:48:56.362236 scan_static_bus for USB2 port 0
769 13:48:56.365469 scan_static_bus for USB2 port 0 done
770 13:48:56.368974 scan_bus: bus USB2 port 0 finished in 6 msecs
771 13:48:56.371913 USB2 port 1 scanning...
772 13:48:56.375456 scan_static_bus for USB2 port 1
773 13:48:56.379065 scan_static_bus for USB2 port 1 done
774 13:48:56.385434 scan_bus: bus USB2 port 1 finished in 6 msecs
775 13:48:56.385551 USB2 port 2 scanning...
776 13:48:56.388968 scan_static_bus for USB2 port 2
777 13:48:56.395228 scan_static_bus for USB2 port 2 done
778 13:48:56.398870 scan_bus: bus USB2 port 2 finished in 6 msecs
779 13:48:56.401920 USB2 port 3 scanning...
780 13:48:56.405423 scan_static_bus for USB2 port 3
781 13:48:56.408535 scan_static_bus for USB2 port 3 done
782 13:48:56.411993 scan_bus: bus USB2 port 3 finished in 6 msecs
783 13:48:56.415381 USB2 port 5 scanning...
784 13:48:56.418465 scan_static_bus for USB2 port 5
785 13:48:56.421872 scan_static_bus for USB2 port 5 done
786 13:48:56.425205 scan_bus: bus USB2 port 5 finished in 6 msecs
787 13:48:56.428894 USB2 port 7 scanning...
788 13:48:56.432169 scan_static_bus for USB2 port 7
789 13:48:56.435361 scan_static_bus for USB2 port 7 done
790 13:48:56.441868 scan_bus: bus USB2 port 7 finished in 6 msecs
791 13:48:56.441953 USB3 port 0 scanning...
792 13:48:56.445535 scan_static_bus for USB3 port 0
793 13:48:56.452348 scan_static_bus for USB3 port 0 done
794 13:48:56.455202 scan_bus: bus USB3 port 0 finished in 6 msecs
795 13:48:56.458892 USB3 port 1 scanning...
796 13:48:56.461943 scan_static_bus for USB3 port 1
797 13:48:56.465354 scan_static_bus for USB3 port 1 done
798 13:48:56.468663 scan_bus: bus USB3 port 1 finished in 6 msecs
799 13:48:56.472045 USB3 port 2 scanning...
800 13:48:56.475285 scan_static_bus for USB3 port 2
801 13:48:56.478387 scan_static_bus for USB3 port 2 done
802 13:48:56.481968 scan_bus: bus USB3 port 2 finished in 6 msecs
803 13:48:56.485406 USB3 port 3 scanning...
804 13:48:56.488644 scan_static_bus for USB3 port 3
805 13:48:56.492023 scan_static_bus for USB3 port 3 done
806 13:48:56.498558 scan_bus: bus USB3 port 3 finished in 6 msecs
807 13:48:56.502070 scan_static_bus for USB0 port 0 done
808 13:48:56.505333 scan_bus: bus USB0 port 0 finished in 172 msecs
809 13:48:56.508613 scan_static_bus for PCI: 00:14.0 done
810 13:48:56.515518 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
811 13:48:56.515714 PCI: 00:14.3 scanning...
812 13:48:56.518895 scan_static_bus for PCI: 00:14.3
813 13:48:56.521975 GENERIC: 0.0 enabled
814 13:48:56.525445 scan_static_bus for PCI: 00:14.3 done
815 13:48:56.531880 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
816 13:48:56.532037 PCI: 00:15.0 scanning...
817 13:48:56.535360 scan_static_bus for PCI: 00:15.0
818 13:48:56.538662 I2C: 00:2c enabled
819 13:48:56.542105 I2C: 00:15 enabled
820 13:48:56.545096 scan_static_bus for PCI: 00:15.0 done
821 13:48:56.548621 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
822 13:48:56.551895 PCI: 00:15.1 scanning...
823 13:48:56.555250 scan_static_bus for PCI: 00:15.1
824 13:48:56.558680 scan_static_bus for PCI: 00:15.1 done
825 13:48:56.565223 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
826 13:48:56.565307 PCI: 00:15.2 scanning...
827 13:48:56.568288 scan_static_bus for PCI: 00:15.2
828 13:48:56.571841 GENERIC: 0.0 disabled
829 13:48:56.575168 I2C: 00:15 enabled
830 13:48:56.575253 I2C: 00:10 disabled
831 13:48:56.578375 I2C: 00:10 disabled
832 13:48:56.578486 I2C: 00:2c enabled
833 13:48:56.582033 I2C: 00:40 enabled
834 13:48:56.585078 I2C: 00:10 enabled
835 13:48:56.585164 I2C: 00:39 enabled
836 13:48:56.588589 scan_static_bus for PCI: 00:15.2 done
837 13:48:56.595301 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
838 13:48:56.598858 PCI: 00:15.3 scanning...
839 13:48:56.601877 scan_static_bus for PCI: 00:15.3
840 13:48:56.602052 I2C: 00:36 enabled
841 13:48:56.605078 I2C: 00:10 disabled
842 13:48:56.605222 I2C: 00:0c enabled
843 13:48:56.608468 I2C: 00:50 enabled
844 13:48:56.611618 scan_static_bus for PCI: 00:15.3 done
845 13:48:56.618185 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
846 13:48:56.618269 PCI: 00:19.0 scanning...
847 13:48:56.621618 scan_static_bus for PCI: 00:19.0
848 13:48:56.625068 I2C: 00:1a enabled
849 13:48:56.628397 I2C: 00:1a disabled
850 13:48:56.628479 I2C: 00:1a disabled
851 13:48:56.632234 I2C: 00:28 enabled
852 13:48:56.632395 I2C: 00:29 enabled
853 13:48:56.638925 scan_static_bus for PCI: 00:19.0 done
854 13:48:56.642316 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
855 13:48:56.645703 PCI: 00:1e.2 scanning...
856 13:48:56.648788 scan_generic_bus for PCI: 00:1e.2
857 13:48:56.648953 SPI: 00 enabled
858 13:48:56.655506 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
859 13:48:56.662216 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
860 13:48:56.662392 PCI: 00:1f.0 scanning...
861 13:48:56.665195 scan_static_bus for PCI: 00:1f.0
862 13:48:56.668729 PNP: 0c09.0 enabled
863 13:48:56.672227 PNP: 0c09.0 scanning...
864 13:48:56.675581 scan_static_bus for PNP: 0c09.0
865 13:48:56.678790 scan_static_bus for PNP: 0c09.0 done
866 13:48:56.681864 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
867 13:48:56.685183 scan_static_bus for PCI: 00:1f.0 done
868 13:48:56.692117 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
869 13:48:56.695400 PCI: 00:1f.3 scanning...
870 13:48:56.698398 scan_static_bus for PCI: 00:1f.3
871 13:48:56.698679 GENERIC: 0.0 disabled
872 13:48:56.701883 scan_static_bus for PCI: 00:1f.3 done
873 13:48:56.708224 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
874 13:48:56.711746 PCI: 00:1f.5 scanning...
875 13:48:56.715268 scan_generic_bus for PCI: 00:1f.5
876 13:48:56.718536 scan_generic_bus for PCI: 00:1f.5 done
877 13:48:56.721927 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
878 13:48:56.728917 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
879 13:48:56.732104 scan_static_bus for Root Device done
880 13:48:56.735822 scan_bus: bus Root Device finished in 665 msecs
881 13:48:56.736313 done
882 13:48:56.742384 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1085 ms
883 13:48:56.746211 Chrome EC: UHEPI supported
884 13:48:56.752221 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
885 13:48:56.759193 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
886 13:48:56.762250 SPI flash protection: WPSW=1 SRP0=0
887 13:48:56.765579 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
888 13:48:56.772383 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
889 13:48:56.775738 found VGA at PCI: 00:02.0
890 13:48:56.778619 Setting up VGA for PCI: 00:02.0
891 13:48:56.781874 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
892 13:48:56.788753 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
893 13:48:56.791976 Allocating resources...
894 13:48:56.792481 Reading resources...
895 13:48:56.798965 Root Device read_resources bus 0 link: 0
896 13:48:56.802006 CPU_CLUSTER: 0 read_resources bus 0 link: 0
897 13:48:56.804956 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
898 13:48:56.812237 DOMAIN: 0000 read_resources bus 0 link: 0
899 13:48:56.815318 PCI: 00:04.0 read_resources bus 1 link: 0
900 13:48:56.822567 PCI: 00:04.0 read_resources bus 1 link: 0 done
901 13:48:56.825280 PCI: 00:05.0 read_resources bus 2 link: 0
902 13:48:56.832051 PCI: 00:05.0 read_resources bus 2 link: 0 done
903 13:48:56.835700 PCI: 00:14.0 read_resources bus 0 link: 0
904 13:48:56.839146 USB0 port 0 read_resources bus 0 link: 0
905 13:48:56.847276 USB0 port 0 read_resources bus 0 link: 0 done
906 13:48:56.850569 PCI: 00:14.0 read_resources bus 0 link: 0 done
907 13:48:56.854061 PCI: 00:14.3 read_resources bus 0 link: 0
908 13:48:56.861267 PCI: 00:14.3 read_resources bus 0 link: 0 done
909 13:48:56.864572 PCI: 00:15.0 read_resources bus 0 link: 0
910 13:48:56.920392 PCI: 00:15.0 read_resources bus 0 link: 0 done
911 13:48:56.920913 PCI: 00:15.2 read_resources bus 0 link: 0
912 13:48:56.921550 PCI: 00:15.2 read_resources bus 0 link: 0 done
913 13:48:56.921878 PCI: 00:15.3 read_resources bus 0 link: 0
914 13:48:56.922173 PCI: 00:15.3 read_resources bus 0 link: 0 done
915 13:48:56.922456 PCI: 00:19.0 read_resources bus 0 link: 0
916 13:48:56.922733 PCI: 00:19.0 read_resources bus 0 link: 0 done
917 13:48:56.923003 PCI: 00:1e.2 read_resources bus 3 link: 0
918 13:48:56.923272 PCI: 00:1e.2 read_resources bus 3 link: 0 done
919 13:48:56.923694 PCI: 00:1f.0 read_resources bus 0 link: 0
920 13:48:56.924113 PCI: 00:1f.0 read_resources bus 0 link: 0 done
921 13:48:56.927102 PCI: 00:1f.3 read_resources bus 0 link: 0
922 13:48:56.930869 PCI: 00:1f.3 read_resources bus 0 link: 0 done
923 13:48:56.934090 DOMAIN: 0000 read_resources bus 0 link: 0 done
924 13:48:56.940692 Root Device read_resources bus 0 link: 0 done
925 13:48:56.941194 Done reading resources.
926 13:48:56.947343 Show resources in subtree (Root Device)...After reading.
927 13:48:56.950736 Root Device child on link 0 CPU_CLUSTER: 0
928 13:48:56.957530 CPU_CLUSTER: 0 child on link 0 APIC: 00
929 13:48:56.958066 APIC: 00
930 13:48:56.958410 APIC: 02
931 13:48:56.963747 DOMAIN: 0000 child on link 0 PCI: 00:00.0
932 13:48:56.973881 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
933 13:48:56.983723 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
934 13:48:56.984252 PCI: 00:00.0
935 13:48:56.994056 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
936 13:48:57.004011 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
937 13:48:57.014171 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
938 13:48:57.020381 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
939 13:48:57.030314 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
940 13:48:57.040588 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
941 13:48:57.050332 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
942 13:48:57.060433 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
943 13:48:57.066886 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
944 13:48:57.076593 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
945 13:48:57.086637 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
946 13:48:57.096614 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
947 13:48:57.106714 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
948 13:48:57.113283 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
949 13:48:57.123518 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
950 13:48:57.133440 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
951 13:48:57.143487 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
952 13:48:57.153400 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
953 13:48:57.160169 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
954 13:48:57.163684 PCI: 00:02.0
955 13:48:57.173127 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
956 13:48:57.182973 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
957 13:48:57.193094 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
958 13:48:57.195956 PCI: 00:04.0 child on link 0 GENERIC: 0.0
959 13:48:57.206292 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
960 13:48:57.209645 GENERIC: 0.0
961 13:48:57.212800 PCI: 00:05.0 child on link 0 GENERIC: 0.0
962 13:48:57.223120 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
963 13:48:57.226222 GENERIC: 0.0
964 13:48:57.226621 PCI: 00:08.0
965 13:48:57.236543 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
966 13:48:57.239976 PCI: 00:14.0 child on link 0 USB0 port 0
967 13:48:57.250017 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
968 13:48:57.256300 USB0 port 0 child on link 0 USB2 port 0
969 13:48:57.256828 USB2 port 0
970 13:48:57.259530 USB2 port 1
971 13:48:57.260203 USB2 port 2
972 13:48:57.262955 USB2 port 3
973 13:48:57.263424 USB2 port 4
974 13:48:57.265855 USB2 port 5
975 13:48:57.266321 USB2 port 6
976 13:48:57.269454 USB2 port 7
977 13:48:57.269848 USB3 port 0
978 13:48:57.272742 USB3 port 1
979 13:48:57.276283 USB3 port 2
980 13:48:57.276671 USB3 port 3
981 13:48:57.279306 PCI: 00:14.2
982 13:48:57.283163 PCI: 00:14.3 child on link 0 GENERIC: 0.0
983 13:48:57.292752 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
984 13:48:57.293132 GENERIC: 0.0
985 13:48:57.296136 PCI: 00:14.5
986 13:48:57.305962 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
987 13:48:57.309744 PCI: 00:15.0 child on link 0 I2C: 00:2c
988 13:48:57.319095 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
989 13:48:57.322537 I2C: 00:2c
990 13:48:57.322907 I2C: 00:15
991 13:48:57.325738 PCI: 00:15.1
992 13:48:57.336004 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 13:48:57.339076 PCI: 00:15.2 child on link 0 GENERIC: 0.0
994 13:48:57.349425 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 13:48:57.352619 GENERIC: 0.0
996 13:48:57.353140 I2C: 00:15
997 13:48:57.353484 I2C: 00:10
998 13:48:57.355795 I2C: 00:10
999 13:48:57.356641 I2C: 00:2c
1000 13:48:57.358831 I2C: 00:40
1001 13:48:57.359288 I2C: 00:10
1002 13:48:57.362207 I2C: 00:39
1003 13:48:57.365527 PCI: 00:15.3 child on link 0 I2C: 00:36
1004 13:48:57.375616 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1005 13:48:57.379144 I2C: 00:36
1006 13:48:57.379563 I2C: 00:10
1007 13:48:57.380137 I2C: 00:0c
1008 13:48:57.382125 I2C: 00:50
1009 13:48:57.382545 PCI: 00:16.0
1010 13:48:57.392029 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 13:48:57.398950 PCI: 00:19.0 child on link 0 I2C: 00:1a
1012 13:48:57.408660 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1013 13:48:57.408998 I2C: 00:1a
1014 13:48:57.412012 I2C: 00:1a
1015 13:48:57.412334 I2C: 00:1a
1016 13:48:57.415336 I2C: 00:28
1017 13:48:57.415740 I2C: 00:29
1018 13:48:57.418612 PCI: 00:19.2
1019 13:48:57.428600 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1020 13:48:57.438885 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1021 13:48:57.439412 PCI: 00:1a.0
1022 13:48:57.448839 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1023 13:48:57.452015 PCI: 00:1e.0
1024 13:48:57.455252 PCI: 00:1e.2 child on link 0 SPI: 00
1025 13:48:57.465028 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1026 13:48:57.465499 SPI: 00
1027 13:48:57.472004 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1028 13:48:57.478621 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1029 13:48:57.481661 PNP: 0c09.0
1030 13:48:57.492009 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1031 13:48:57.492527 PCI: 00:1f.2
1032 13:48:57.501935 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1033 13:48:57.512225 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1034 13:48:57.515259 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1035 13:48:57.526887 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1036 13:48:57.536626 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1037 13:48:57.537135 GENERIC: 0.0
1038 13:48:57.539893 PCI: 00:1f.5
1039 13:48:57.546431 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1040 13:48:57.556291 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1041 13:48:57.562954 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1042 13:48:57.569577 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1043 13:48:57.576205 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1044 13:48:57.582746 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1045 13:48:57.589457 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1046 13:48:57.593141 DOMAIN: 0000: Resource ranges:
1047 13:48:57.599315 * Base: 1000, Size: 800, Tag: 100
1048 13:48:57.602848 * Base: 1900, Size: e700, Tag: 100
1049 13:48:57.606025 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1050 13:48:57.612432 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1051 13:48:57.619191 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1052 13:48:57.629220 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1053 13:48:57.636308 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1054 13:48:57.642618 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1055 13:48:57.652521 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1056 13:48:57.659225 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1057 13:48:57.666040 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1058 13:48:57.672496 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1059 13:48:57.682559 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1060 13:48:57.689331 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1061 13:48:57.696080 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1062 13:48:57.705805 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1063 13:48:57.712175 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1064 13:48:57.719333 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1065 13:48:57.728871 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1066 13:48:57.736002 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1067 13:48:57.742260 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1068 13:48:57.752266 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1069 13:48:57.759023 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1070 13:48:57.765576 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1071 13:48:57.775996 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1072 13:48:57.781905 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1073 13:48:57.785554 DOMAIN: 0000: Resource ranges:
1074 13:48:57.788795 * Base: 7fc00000, Size: 40400000, Tag: 200
1075 13:48:57.792114 * Base: d0000000, Size: 2b000000, Tag: 200
1076 13:48:57.799728 * Base: fb001000, Size: 2fff000, Tag: 200
1077 13:48:57.802560 * Base: fe010000, Size: 22000, Tag: 200
1078 13:48:57.805304 * Base: fe033000, Size: a4d000, Tag: 200
1079 13:48:57.808487 * Base: fea88000, Size: 2f8000, Tag: 200
1080 13:48:57.815590 * Base: fed88000, Size: 8000, Tag: 200
1081 13:48:57.818816 * Base: fed93000, Size: d000, Tag: 200
1082 13:48:57.822471 * Base: feda2000, Size: 125e000, Tag: 200
1083 13:48:57.828993 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1084 13:48:57.835481 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1085 13:48:57.842195 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1086 13:48:57.849072 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1087 13:48:57.855795 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1088 13:48:57.862735 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1089 13:48:57.868805 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1090 13:48:57.875630 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1091 13:48:57.881920 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1092 13:48:57.889081 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1093 13:48:57.895425 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1094 13:48:57.902316 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1095 13:48:57.908332 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1096 13:48:57.915796 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1097 13:48:57.922212 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1098 13:48:57.928704 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1099 13:48:57.934934 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1100 13:48:57.942111 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1101 13:48:57.948510 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1102 13:48:57.955297 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1103 13:48:57.962108 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1104 13:48:57.968606 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1105 13:48:57.975039 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1106 13:48:57.978561 Root Device assign_resources, bus 0 link: 0
1107 13:48:57.984891 DOMAIN: 0000 assign_resources, bus 0 link: 0
1108 13:48:57.991827 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1109 13:48:58.001474 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1110 13:48:58.007977 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1111 13:48:58.014806 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1112 13:48:58.021090 PCI: 00:04.0 assign_resources, bus 1 link: 0
1113 13:48:58.024905 PCI: 00:04.0 assign_resources, bus 1 link: 0
1114 13:48:58.034513 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1115 13:48:58.038244 PCI: 00:05.0 assign_resources, bus 2 link: 0
1116 13:48:58.041385 PCI: 00:05.0 assign_resources, bus 2 link: 0
1117 13:48:58.051472 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1118 13:48:58.058191 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1119 13:48:58.064566 PCI: 00:14.0 assign_resources, bus 0 link: 0
1120 13:48:58.067938 PCI: 00:14.0 assign_resources, bus 0 link: 0
1121 13:48:58.078140 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1122 13:48:58.081000 PCI: 00:14.3 assign_resources, bus 0 link: 0
1123 13:48:58.084516 PCI: 00:14.3 assign_resources, bus 0 link: 0
1124 13:48:58.094713 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1125 13:48:58.101884 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1126 13:48:58.105629 PCI: 00:15.0 assign_resources, bus 0 link: 0
1127 13:48:58.111749 PCI: 00:15.0 assign_resources, bus 0 link: 0
1128 13:48:58.118328 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1129 13:48:58.128387 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1130 13:48:58.131508 PCI: 00:15.2 assign_resources, bus 0 link: 0
1131 13:48:58.135233 PCI: 00:15.2 assign_resources, bus 0 link: 0
1132 13:48:58.145366 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1133 13:48:58.148565 PCI: 00:15.3 assign_resources, bus 0 link: 0
1134 13:48:58.155450 PCI: 00:15.3 assign_resources, bus 0 link: 0
1135 13:48:58.161883 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1136 13:48:58.168379 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1137 13:48:58.175113 PCI: 00:19.0 assign_resources, bus 0 link: 0
1138 13:48:58.178500 PCI: 00:19.0 assign_resources, bus 0 link: 0
1139 13:48:58.188573 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1140 13:48:58.195222 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1141 13:48:58.204997 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1142 13:48:58.208105 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1143 13:48:58.211336 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1144 13:48:58.218233 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1145 13:48:58.221309 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1146 13:48:58.228018 LPC: Trying to open IO window from 800 size 1ff
1147 13:48:58.234809 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1148 13:48:58.244845 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1149 13:48:58.248004 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1150 13:48:58.251996 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1151 13:48:58.262255 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1152 13:48:58.265281 DOMAIN: 0000 assign_resources, bus 0 link: 0
1153 13:48:58.268353 Root Device assign_resources, bus 0 link: 0
1154 13:48:58.271987 Done setting resources.
1155 13:48:58.277917 Show resources in subtree (Root Device)...After assigning values.
1156 13:48:58.281337 Root Device child on link 0 CPU_CLUSTER: 0
1157 13:48:58.288241 CPU_CLUSTER: 0 child on link 0 APIC: 00
1158 13:48:58.288760 APIC: 00
1159 13:48:58.291498 APIC: 02
1160 13:48:58.294506 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1161 13:48:58.304546 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1162 13:48:58.314352 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1163 13:48:58.314777 PCI: 00:00.0
1164 13:48:58.324574 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1165 13:48:58.335090 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1166 13:48:58.344532 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1167 13:48:58.351092 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1168 13:48:58.361141 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1169 13:48:58.371390 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1170 13:48:58.381306 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1171 13:48:58.391392 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1172 13:48:58.397997 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1173 13:48:58.407074 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1174 13:48:58.417685 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1175 13:48:58.427765 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1176 13:48:58.437812 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1177 13:48:58.443870 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1178 13:48:58.454176 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1179 13:48:58.464171 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1180 13:48:58.473973 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1181 13:48:58.483986 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1182 13:48:58.494057 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1183 13:48:58.494742 PCI: 00:02.0
1184 13:48:58.503710 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1185 13:48:58.517259 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1186 13:48:58.523795 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1187 13:48:58.530502 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1188 13:48:58.540382 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1189 13:48:58.540896 GENERIC: 0.0
1190 13:48:58.547349 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1191 13:48:58.557186 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1192 13:48:58.557706 GENERIC: 0.0
1193 13:48:58.560276 PCI: 00:08.0
1194 13:48:58.570345 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1195 13:48:58.573720 PCI: 00:14.0 child on link 0 USB0 port 0
1196 13:48:58.583376 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1197 13:48:58.589718 USB0 port 0 child on link 0 USB2 port 0
1198 13:48:58.590136 USB2 port 0
1199 13:48:58.593121 USB2 port 1
1200 13:48:58.593535 USB2 port 2
1201 13:48:58.596563 USB2 port 3
1202 13:48:58.596981 USB2 port 4
1203 13:48:58.600025 USB2 port 5
1204 13:48:58.603116 USB2 port 6
1205 13:48:58.603529 USB2 port 7
1206 13:48:58.606629 USB3 port 0
1207 13:48:58.607045 USB3 port 1
1208 13:48:58.609675 USB3 port 2
1209 13:48:58.610062 USB3 port 3
1210 13:48:58.613238 PCI: 00:14.2
1211 13:48:58.617254 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1212 13:48:58.626653 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1213 13:48:58.629963 GENERIC: 0.0
1214 13:48:58.630381 PCI: 00:14.5
1215 13:48:58.639981 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1216 13:48:58.646750 PCI: 00:15.0 child on link 0 I2C: 00:2c
1217 13:48:58.656689 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1218 13:48:58.657214 I2C: 00:2c
1219 13:48:58.659666 I2C: 00:15
1220 13:48:58.660084 PCI: 00:15.1
1221 13:48:58.669979 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1222 13:48:58.676344 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1223 13:48:58.685875 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1224 13:48:58.686310 GENERIC: 0.0
1225 13:48:58.689422 I2C: 00:15
1226 13:48:58.689848 I2C: 00:10
1227 13:48:58.692708 I2C: 00:10
1228 13:48:58.693132 I2C: 00:2c
1229 13:48:58.696739 I2C: 00:40
1230 13:48:58.697284 I2C: 00:10
1231 13:48:58.700039 I2C: 00:39
1232 13:48:58.702645 PCI: 00:15.3 child on link 0 I2C: 00:36
1233 13:48:58.712836 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1234 13:48:58.713347 I2C: 00:36
1235 13:48:58.715915 I2C: 00:10
1236 13:48:58.716332 I2C: 00:0c
1237 13:48:58.719178 I2C: 00:50
1238 13:48:58.719593 PCI: 00:16.0
1239 13:48:58.729436 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1240 13:48:58.736304 PCI: 00:19.0 child on link 0 I2C: 00:1a
1241 13:48:58.746531 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1242 13:48:58.747050 I2C: 00:1a
1243 13:48:58.749177 I2C: 00:1a
1244 13:48:58.749591 I2C: 00:1a
1245 13:48:58.752610 I2C: 00:28
1246 13:48:58.753126 I2C: 00:29
1247 13:48:58.755739 PCI: 00:19.2
1248 13:48:58.766141 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1249 13:48:58.775883 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1250 13:48:58.779091 PCI: 00:1a.0
1251 13:48:58.789198 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1252 13:48:58.789736 PCI: 00:1e.0
1253 13:48:58.792548 PCI: 00:1e.2 child on link 0 SPI: 00
1254 13:48:58.805612 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1255 13:48:58.806136 SPI: 00
1256 13:48:58.808835 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1257 13:48:58.818914 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1258 13:48:58.819446 PNP: 0c09.0
1259 13:48:58.829407 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1260 13:48:58.831948 PCI: 00:1f.2
1261 13:48:58.839145 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1262 13:48:58.848663 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1263 13:48:58.852177 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1264 13:48:58.864929 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1265 13:48:58.875023 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1266 13:48:58.875446 GENERIC: 0.0
1267 13:48:58.878220 PCI: 00:1f.5
1268 13:48:58.888359 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1269 13:48:58.891880 Done allocating resources.
1270 13:48:58.898695 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2098 ms
1271 13:48:58.899216 Enabling resources...
1272 13:48:58.905330 PCI: 00:00.0 subsystem <- 8086/4e22
1273 13:48:58.905846 PCI: 00:00.0 cmd <- 06
1274 13:48:58.908583 PCI: 00:02.0 subsystem <- 8086/4e55
1275 13:48:58.911574 PCI: 00:02.0 cmd <- 03
1276 13:48:58.915317 PCI: 00:04.0 subsystem <- 8086/4e03
1277 13:48:58.918360 PCI: 00:04.0 cmd <- 02
1278 13:48:58.921779 PCI: 00:05.0 bridge ctrl <- 0003
1279 13:48:58.924976 PCI: 00:05.0 subsystem <- 8086/4e19
1280 13:48:58.928305 PCI: 00:05.0 cmd <- 02
1281 13:48:58.931326 PCI: 00:08.0 cmd <- 06
1282 13:48:58.934735 PCI: 00:14.0 subsystem <- 8086/4ded
1283 13:48:58.935148 PCI: 00:14.0 cmd <- 02
1284 13:48:58.941900 PCI: 00:14.3 subsystem <- 8086/4df0
1285 13:48:58.942414 PCI: 00:14.3 cmd <- 02
1286 13:48:58.945437 PCI: 00:14.5 subsystem <- 8086/4df8
1287 13:48:58.948471 PCI: 00:14.5 cmd <- 06
1288 13:48:58.951391 PCI: 00:15.0 subsystem <- 8086/4de8
1289 13:48:58.954984 PCI: 00:15.0 cmd <- 02
1290 13:48:58.957662 PCI: 00:15.1 subsystem <- 8086/4de9
1291 13:48:58.961083 PCI: 00:15.1 cmd <- 02
1292 13:48:58.964559 PCI: 00:15.2 subsystem <- 8086/4dea
1293 13:48:58.968065 PCI: 00:15.2 cmd <- 02
1294 13:48:58.971507 PCI: 00:15.3 subsystem <- 8086/4deb
1295 13:48:58.974620 PCI: 00:15.3 cmd <- 02
1296 13:48:58.978309 PCI: 00:16.0 subsystem <- 8086/4de0
1297 13:48:58.978840 PCI: 00:16.0 cmd <- 02
1298 13:48:58.984425 PCI: 00:19.0 subsystem <- 8086/4dc5
1299 13:48:58.984858 PCI: 00:19.0 cmd <- 02
1300 13:48:58.988351 PCI: 00:19.2 subsystem <- 8086/4dc7
1301 13:48:58.991710 PCI: 00:19.2 cmd <- 06
1302 13:48:58.994794 PCI: 00:1a.0 subsystem <- 8086/4dc4
1303 13:48:58.998281 PCI: 00:1a.0 cmd <- 06
1304 13:48:59.001366 PCI: 00:1e.2 subsystem <- 8086/4daa
1305 13:48:59.004832 PCI: 00:1e.2 cmd <- 06
1306 13:48:59.008034 PCI: 00:1f.0 subsystem <- 8086/4d87
1307 13:48:59.011511 PCI: 00:1f.0 cmd <- 407
1308 13:48:59.014456 PCI: 00:1f.3 subsystem <- 8086/4dc8
1309 13:48:59.014985 PCI: 00:1f.3 cmd <- 02
1310 13:48:59.021807 PCI: 00:1f.5 subsystem <- 8086/4da4
1311 13:48:59.022354 PCI: 00:1f.5 cmd <- 406
1312 13:48:59.026492 done.
1313 13:48:59.030066 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1314 13:48:59.032980 Initializing devices...
1315 13:48:59.036306 Root Device init
1316 13:48:59.036733 mainboard: EC init
1317 13:48:59.043847 Chrome EC: Set SMI mask to 0x0000000000000000
1318 13:48:59.049934 Chrome EC: clear events_b mask to 0x0000000000000000
1319 13:48:59.052815 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1320 13:48:59.059710 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1321 13:48:59.066497 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1322 13:48:59.069765 Chrome EC: Set WAKE mask to 0x0000000000000000
1323 13:48:59.077606 Root Device init finished in 36 msecs
1324 13:48:59.080848 PCI: 00:00.0 init
1325 13:48:59.081363 CPU TDP = 6 Watts
1326 13:48:59.084138 CPU PL1 = 7 Watts
1327 13:48:59.087310 CPU PL2 = 12 Watts
1328 13:48:59.090732 PCI: 00:00.0 init finished in 6 msecs
1329 13:48:59.091248 PCI: 00:02.0 init
1330 13:48:59.093827 GMA: Found VBT in CBFS
1331 13:48:59.097539 GMA: Found valid VBT in CBFS
1332 13:48:59.103754 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1333 13:48:59.110532 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1334 13:48:59.114069 PCI: 00:02.0 init finished in 18 msecs
1335 13:48:59.117193 PCI: 00:08.0 init
1336 13:48:59.120765 PCI: 00:08.0 init finished in 0 msecs
1337 13:48:59.124236 PCI: 00:14.0 init
1338 13:48:59.127359 XHCI: Updated LFPS sampling OFF time to 9 ms
1339 13:48:59.130317 PCI: 00:14.0 init finished in 4 msecs
1340 13:48:59.133916 PCI: 00:15.0 init
1341 13:48:59.137136 I2C bus 0 version 0x3230302a
1342 13:48:59.140499 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1343 13:48:59.144046 PCI: 00:15.0 init finished in 6 msecs
1344 13:48:59.146983 PCI: 00:15.1 init
1345 13:48:59.150466 I2C bus 1 version 0x3230302a
1346 13:48:59.153772 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1347 13:48:59.157130 PCI: 00:15.1 init finished in 6 msecs
1348 13:48:59.157547 PCI: 00:15.2 init
1349 13:48:59.160281 I2C bus 2 version 0x3230302a
1350 13:48:59.164202 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1351 13:48:59.170749 PCI: 00:15.2 init finished in 6 msecs
1352 13:48:59.171263 PCI: 00:15.3 init
1353 13:48:59.174040 I2C bus 3 version 0x3230302a
1354 13:48:59.177492 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1355 13:48:59.180373 PCI: 00:15.3 init finished in 6 msecs
1356 13:48:59.183787 PCI: 00:16.0 init
1357 13:48:59.187440 PCI: 00:16.0 init finished in 0 msecs
1358 13:48:59.190802 PCI: 00:19.0 init
1359 13:48:59.193535 I2C bus 4 version 0x3230302a
1360 13:48:59.197375 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1361 13:48:59.200585 PCI: 00:19.0 init finished in 6 msecs
1362 13:48:59.203743 PCI: 00:1a.0 init
1363 13:48:59.207200 PCI: 00:1a.0 init finished in 0 msecs
1364 13:48:59.210503 PCI: 00:1f.0 init
1365 13:48:59.213922 IOAPIC: Initializing IOAPIC at 0xfec00000
1366 13:48:59.217278 IOAPIC: Bootstrap Processor Local APIC = 0x00
1367 13:48:59.220242 IOAPIC: ID = 0x02
1368 13:48:59.223671 IOAPIC: Dumping registers
1369 13:48:59.224212 reg 0x0000: 0x02000000
1370 13:48:59.227218 reg 0x0001: 0x00770020
1371 13:48:59.230419 reg 0x0002: 0x00000000
1372 13:48:59.233763 PCI: 00:1f.0 init finished in 21 msecs
1373 13:48:59.237285 PCI: 00:1f.2 init
1374 13:48:59.237847 Disabling ACPI via APMC.
1375 13:48:59.242570 APMC done.
1376 13:48:59.245791 PCI: 00:1f.2 init finished in 6 msecs
1377 13:48:59.257110 PNP: 0c09.0 init
1378 13:48:59.260309 Google Chrome EC uptime: 6.529 seconds
1379 13:48:59.267353 Google Chrome AP resets since EC boot: 0
1380 13:48:59.270747 Google Chrome most recent AP reset causes:
1381 13:48:59.277334 Google Chrome EC reset flags at last EC boot: reset-pin
1382 13:48:59.280507 PNP: 0c09.0 init finished in 18 msecs
1383 13:48:59.283686 Devices initialized
1384 13:48:59.284269 Show all devs... After init.
1385 13:48:59.287225 Root Device: enabled 1
1386 13:48:59.290401 CPU_CLUSTER: 0: enabled 1
1387 13:48:59.293718 DOMAIN: 0000: enabled 1
1388 13:48:59.294240 PCI: 00:00.0: enabled 1
1389 13:48:59.296810 PCI: 00:02.0: enabled 1
1390 13:48:59.300116 PCI: 00:04.0: enabled 1
1391 13:48:59.303625 PCI: 00:05.0: enabled 1
1392 13:48:59.304078 PCI: 00:09.0: enabled 0
1393 13:48:59.307132 PCI: 00:12.6: enabled 0
1394 13:48:59.310424 PCI: 00:14.0: enabled 1
1395 13:48:59.313837 PCI: 00:14.1: enabled 0
1396 13:48:59.314357 PCI: 00:14.2: enabled 0
1397 13:48:59.317313 PCI: 00:14.3: enabled 1
1398 13:48:59.320035 PCI: 00:14.5: enabled 1
1399 13:48:59.320458 PCI: 00:15.0: enabled 1
1400 13:48:59.324640 PCI: 00:15.1: enabled 1
1401 13:48:59.326936 PCI: 00:15.2: enabled 1
1402 13:48:59.330306 PCI: 00:15.3: enabled 1
1403 13:48:59.330829 PCI: 00:16.0: enabled 1
1404 13:48:59.333483 PCI: 00:16.1: enabled 0
1405 13:48:59.336646 PCI: 00:16.4: enabled 0
1406 13:48:59.339756 PCI: 00:16.5: enabled 0
1407 13:48:59.340176 PCI: 00:17.0: enabled 0
1408 13:48:59.343152 PCI: 00:19.0: enabled 1
1409 13:48:59.346819 PCI: 00:19.1: enabled 0
1410 13:48:59.349777 PCI: 00:19.2: enabled 1
1411 13:48:59.350199 PCI: 00:1a.0: enabled 1
1412 13:48:59.353159 PCI: 00:1c.0: enabled 0
1413 13:48:59.356694 PCI: 00:1c.1: enabled 0
1414 13:48:59.357110 PCI: 00:1c.2: enabled 0
1415 13:48:59.359737 PCI: 00:1c.3: enabled 0
1416 13:48:59.363286 PCI: 00:1c.4: enabled 0
1417 13:48:59.366919 PCI: 00:1c.5: enabled 0
1418 13:48:59.367437 PCI: 00:1c.6: enabled 0
1419 13:48:59.370132 PCI: 00:1c.7: enabled 1
1420 13:48:59.373673 PCI: 00:1e.0: enabled 0
1421 13:48:59.376874 PCI: 00:1e.1: enabled 0
1422 13:48:59.377395 PCI: 00:1e.2: enabled 1
1423 13:48:59.379881 PCI: 00:1e.3: enabled 0
1424 13:48:59.383720 PCI: 00:1f.0: enabled 1
1425 13:48:59.384481 PCI: 00:1f.1: enabled 0
1426 13:48:59.386319 PCI: 00:1f.2: enabled 1
1427 13:48:59.389878 PCI: 00:1f.3: enabled 1
1428 13:48:59.393355 PCI: 00:1f.4: enabled 0
1429 13:48:59.393918 PCI: 00:1f.5: enabled 1
1430 13:48:59.396613 PCI: 00:1f.7: enabled 0
1431 13:48:59.400313 GENERIC: 0.0: enabled 1
1432 13:48:59.403456 GENERIC: 0.0: enabled 1
1433 13:48:59.403914 USB0 port 0: enabled 1
1434 13:48:59.406411 GENERIC: 0.0: enabled 1
1435 13:48:59.409964 I2C: 00:2c: enabled 1
1436 13:48:59.410381 I2C: 00:15: enabled 1
1437 13:48:59.413223 GENERIC: 0.0: enabled 0
1438 13:48:59.416652 I2C: 00:15: enabled 1
1439 13:48:59.417163 I2C: 00:10: enabled 0
1440 13:48:59.419959 I2C: 00:10: enabled 0
1441 13:48:59.422987 I2C: 00:2c: enabled 1
1442 13:48:59.423405 I2C: 00:40: enabled 1
1443 13:48:59.426770 I2C: 00:10: enabled 1
1444 13:48:59.429758 I2C: 00:39: enabled 1
1445 13:48:59.432839 I2C: 00:36: enabled 1
1446 13:48:59.433257 I2C: 00:10: enabled 0
1447 13:48:59.436181 I2C: 00:0c: enabled 1
1448 13:48:59.439578 I2C: 00:50: enabled 1
1449 13:48:59.440027 I2C: 00:1a: enabled 1
1450 13:48:59.443075 I2C: 00:1a: enabled 0
1451 13:48:59.446238 I2C: 00:1a: enabled 0
1452 13:48:59.446655 I2C: 00:28: enabled 1
1453 13:48:59.449911 I2C: 00:29: enabled 1
1454 13:48:59.453409 PCI: 00:00.0: enabled 1
1455 13:48:59.453930 SPI: 00: enabled 1
1456 13:48:59.456479 PNP: 0c09.0: enabled 1
1457 13:48:59.460180 GENERIC: 0.0: enabled 0
1458 13:48:59.460704 USB2 port 0: enabled 1
1459 13:48:59.463356 USB2 port 1: enabled 1
1460 13:48:59.466907 USB2 port 2: enabled 1
1461 13:48:59.467441 USB2 port 3: enabled 1
1462 13:48:59.469911 USB2 port 4: enabled 0
1463 13:48:59.473227 USB2 port 5: enabled 1
1464 13:48:59.476381 USB2 port 6: enabled 0
1465 13:48:59.476904 USB2 port 7: enabled 1
1466 13:48:59.479922 USB3 port 0: enabled 1
1467 13:48:59.482953 USB3 port 1: enabled 1
1468 13:48:59.483472 USB3 port 2: enabled 1
1469 13:48:59.486236 USB3 port 3: enabled 1
1470 13:48:59.489925 APIC: 00: enabled 1
1471 13:48:59.490478 APIC: 02: enabled 1
1472 13:48:59.493222 PCI: 00:08.0: enabled 1
1473 13:48:59.499743 BS: BS_DEV_INIT run times (exec / console): 24 / 438 ms
1474 13:48:59.502968 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1475 13:48:59.506642 ELOG: NV offset 0xbfa000 size 0x1000
1476 13:48:59.513878 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1477 13:48:59.520712 ELOG: Event(17) added with size 13 at 2023-08-16 13:48:58 UTC
1478 13:48:59.527278 ELOG: Event(92) added with size 9 at 2023-08-16 13:48:58 UTC
1479 13:48:59.533717 ELOG: Event(93) added with size 9 at 2023-08-16 13:48:58 UTC
1480 13:48:59.540525 ELOG: Event(9E) added with size 10 at 2023-08-16 13:48:58 UTC
1481 13:48:59.547780 ELOG: Event(9F) added with size 14 at 2023-08-16 13:48:58 UTC
1482 13:48:59.550842 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1483 13:48:59.557141 ELOG: Event(A1) added with size 10 at 2023-08-16 13:48:58 UTC
1484 13:48:59.567471 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1485 13:48:59.571165 ELOG: Event(A0) added with size 9 at 2023-08-16 13:48:58 UTC
1486 13:48:59.577863 elog_add_boot_reason: Logged dev mode boot
1487 13:48:59.584452 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1488 13:48:59.585078 Finalize devices...
1489 13:48:59.587590 Devices finalized
1490 13:48:59.590830 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1491 13:48:59.597400 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1492 13:48:59.603945 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1493 13:48:59.607250 ME: HFSTS1 : 0x80030045
1494 13:48:59.610357 ME: HFSTS2 : 0x30280136
1495 13:48:59.613435 ME: HFSTS3 : 0x00000050
1496 13:48:59.620362 ME: HFSTS4 : 0x00004000
1497 13:48:59.623498 ME: HFSTS5 : 0x00000000
1498 13:48:59.626850 ME: HFSTS6 : 0x40400006
1499 13:48:59.630222 ME: Manufacturing Mode : NO
1500 13:48:59.633489 ME: FW Partition Table : OK
1501 13:48:59.637084 ME: Bringup Loader Failure : NO
1502 13:48:59.640498 ME: Firmware Init Complete : NO
1503 13:48:59.643396 ME: Boot Options Present : NO
1504 13:48:59.646484 ME: Update In Progress : NO
1505 13:48:59.649935 ME: D0i3 Support : YES
1506 13:48:59.653722 ME: Low Power State Enabled : NO
1507 13:48:59.656599 ME: CPU Replaced : YES
1508 13:48:59.660178 ME: CPU Replacement Valid : YES
1509 13:48:59.663154 ME: Current Working State : 5
1510 13:48:59.666642 ME: Current Operation State : 1
1511 13:48:59.670001 ME: Current Operation Mode : 3
1512 13:48:59.673537 ME: Error Code : 0
1513 13:48:59.676602 ME: CPU Debug Disabled : YES
1514 13:48:59.679767 ME: TXT Support : NO
1515 13:48:59.686166 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1516 13:48:59.693006 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1517 13:48:59.696641 ACPI: Writing ACPI tables at 76b27000.
1518 13:48:59.697161 ACPI: * FACS
1519 13:48:59.700063 ACPI: * DSDT
1520 13:48:59.703272 Ramoops buffer: 0x100000@0x76a26000.
1521 13:48:59.706494 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1522 13:48:59.712995 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1523 13:48:59.716230 Google Chrome EC: version:
1524 13:48:59.719315 ro: magolor_1.1.9999-103b6f9
1525 13:48:59.722670 rw: magolor_1.1.9999-103b6f9
1526 13:48:59.723086 running image: 1
1527 13:48:59.729505 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1528 13:48:59.733471 ACPI: * FADT
1529 13:48:59.733887 SCI is IRQ9
1530 13:48:59.736749 ACPI: added table 1/32, length now 40
1531 13:48:59.740365 ACPI: * SSDT
1532 13:48:59.744517 Found 1 CPU(s) with 2 core(s) each.
1533 13:48:59.747337 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1534 13:48:59.754067 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1535 13:48:59.757032 Could not locate 'wifi_sar' in VPD.
1536 13:48:59.760816 Checking CBFS for default SAR values
1537 13:48:59.767397 wifi_sar_defaults.hex has bad len in CBFS
1538 13:48:59.770422 failed from getting SAR limits!
1539 13:48:59.773746 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1540 13:48:59.777024 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1541 13:48:59.783745 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1542 13:48:59.787072 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1543 13:48:59.793731 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1544 13:48:59.797090 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1545 13:48:59.804020 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1546 13:48:59.810173 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1547 13:48:59.817132 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1548 13:48:59.820177 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1549 13:48:59.826781 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1550 13:48:59.833744 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1551 13:48:59.836962 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1552 13:48:59.843723 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1553 13:48:59.846830 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1554 13:48:59.854022 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1555 13:48:59.857548 PS2K: Passing 101 keymaps to kernel
1556 13:48:59.864232 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1557 13:48:59.870784 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1558 13:48:59.874022 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1559 13:48:59.880937 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1560 13:48:59.883760 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1561 13:48:59.890604 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1562 13:48:59.898095 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1563 13:48:59.900585 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1564 13:48:59.906935 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1565 13:48:59.913823 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1566 13:48:59.917125 ACPI: added table 2/32, length now 44
1567 13:48:59.920405 ACPI: * MCFG
1568 13:48:59.923945 ACPI: added table 3/32, length now 48
1569 13:48:59.924368 ACPI: * TPM2
1570 13:48:59.927090 TPM2 log created at 0x76a16000
1571 13:48:59.930473 ACPI: added table 4/32, length now 52
1572 13:48:59.933921 ACPI: * MADT
1573 13:48:59.934448 SCI is IRQ9
1574 13:48:59.937272 ACPI: added table 5/32, length now 56
1575 13:48:59.940185 current = 76b2d580
1576 13:48:59.940604 ACPI: * DMAR
1577 13:48:59.947549 ACPI: added table 6/32, length now 60
1578 13:48:59.950375 ACPI: added table 7/32, length now 64
1579 13:48:59.950901 ACPI: * HPET
1580 13:48:59.953836 ACPI: added table 8/32, length now 68
1581 13:48:59.957221 ACPI: done.
1582 13:48:59.960503 ACPI tables: 26304 bytes.
1583 13:48:59.963449 smbios_write_tables: 76a15000
1584 13:48:59.966885 EC returned error result code 3
1585 13:48:59.971085 Couldn't obtain OEM name from CBI
1586 13:48:59.971610 Create SMBIOS type 16
1587 13:48:59.973833 Create SMBIOS type 17
1588 13:48:59.976840 GENERIC: 0.0 (WIFI Device)
1589 13:48:59.980132 SMBIOS tables: 913 bytes.
1590 13:48:59.984098 Writing table forward entry at 0x00000500
1591 13:48:59.990498 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1592 13:48:59.993463 Writing coreboot table at 0x76b4b000
1593 13:49:00.000367 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1594 13:49:00.003804 1. 0000000000001000-000000000009ffff: RAM
1595 13:49:00.006806 2. 00000000000a0000-00000000000fffff: RESERVED
1596 13:49:00.013794 3. 0000000000100000-0000000076a14fff: RAM
1597 13:49:00.020326 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1598 13:49:00.023525 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1599 13:49:00.030479 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1600 13:49:00.033515 7. 0000000077000000-000000007fbfffff: RESERVED
1601 13:49:00.040386 8. 00000000c0000000-00000000cfffffff: RESERVED
1602 13:49:00.043407 9. 00000000fb000000-00000000fb000fff: RESERVED
1603 13:49:00.050267 10. 00000000fe000000-00000000fe00ffff: RESERVED
1604 13:49:00.053644 11. 00000000fea80000-00000000fea87fff: RESERVED
1605 13:49:00.056981 12. 00000000fed80000-00000000fed87fff: RESERVED
1606 13:49:00.063731 13. 00000000fed90000-00000000fed92fff: RESERVED
1607 13:49:00.067104 14. 00000000feda0000-00000000feda1fff: RESERVED
1608 13:49:00.073157 15. 0000000100000000-00000001803fffff: RAM
1609 13:49:00.073591 Passing 4 GPIOs to payload:
1610 13:49:00.079935 NAME | PORT | POLARITY | VALUE
1611 13:49:00.086469 lid | undefined | high | high
1612 13:49:00.090054 power | undefined | high | low
1613 13:49:00.096705 oprom | undefined | high | low
1614 13:49:00.099914 EC in RW | 0x000000b9 | high | low
1615 13:49:00.106599 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum b17d
1616 13:49:00.110375 coreboot table: 1504 bytes.
1617 13:49:00.113727 IMD ROOT 0. 0x76fff000 0x00001000
1618 13:49:00.116730 IMD SMALL 1. 0x76ffe000 0x00001000
1619 13:49:00.120116 FSP MEMORY 2. 0x76c4e000 0x003b0000
1620 13:49:00.126718 CONSOLE 3. 0x76c2e000 0x00020000
1621 13:49:00.130324 FMAP 4. 0x76c2d000 0x00000578
1622 13:49:00.133525 TIME STAMP 5. 0x76c2c000 0x00000910
1623 13:49:00.136761 VBOOT WORK 6. 0x76c18000 0x00014000
1624 13:49:00.139955 ROMSTG STCK 7. 0x76c17000 0x00001000
1625 13:49:00.143510 AFTER CAR 8. 0x76c0d000 0x0000a000
1626 13:49:00.146873 RAMSTAGE 9. 0x76ba7000 0x00066000
1627 13:49:00.150054 REFCODE 10. 0x76b67000 0x00040000
1628 13:49:00.153192 SMM BACKUP 11. 0x76b57000 0x00010000
1629 13:49:00.160079 4f444749 12. 0x76b55000 0x00002000
1630 13:49:00.163347 EXT VBT13. 0x76b53000 0x00001c43
1631 13:49:00.166761 COREBOOT 14. 0x76b4b000 0x00008000
1632 13:49:00.170205 ACPI 15. 0x76b27000 0x00024000
1633 13:49:00.173224 ACPI GNVS 16. 0x76b26000 0x00001000
1634 13:49:00.176380 RAMOOPS 17. 0x76a26000 0x00100000
1635 13:49:00.180321 TPM2 TCGLOG18. 0x76a16000 0x00010000
1636 13:49:00.183195 SMBIOS 19. 0x76a15000 0x00000800
1637 13:49:00.186518 IMD small region:
1638 13:49:00.189412 IMD ROOT 0. 0x76ffec00 0x00000400
1639 13:49:00.192963 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1640 13:49:00.196331 VPD 2. 0x76ffeb60 0x0000006c
1641 13:49:00.202939 POWER STATE 3. 0x76ffeb20 0x00000040
1642 13:49:00.206526 ROMSTAGE 4. 0x76ffeb00 0x00000004
1643 13:49:00.210021 MEM INFO 5. 0x76ffe920 0x000001e0
1644 13:49:00.216216 BS: BS_WRITE_TABLES run times (exec / console): 6 / 517 ms
1645 13:49:00.219769 MTRR: Physical address space:
1646 13:49:00.223019 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1647 13:49:00.229964 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1648 13:49:00.236612 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1649 13:49:00.243039 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1650 13:49:00.250232 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1651 13:49:00.256512 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1652 13:49:00.262998 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1653 13:49:00.266731 MTRR: Fixed MSR 0x250 0x0606060606060606
1654 13:49:00.269492 MTRR: Fixed MSR 0x258 0x0606060606060606
1655 13:49:00.273134 MTRR: Fixed MSR 0x259 0x0000000000000000
1656 13:49:00.279999 MTRR: Fixed MSR 0x268 0x0606060606060606
1657 13:49:00.282739 MTRR: Fixed MSR 0x269 0x0606060606060606
1658 13:49:00.285804 MTRR: Fixed MSR 0x26a 0x0606060606060606
1659 13:49:00.289134 MTRR: Fixed MSR 0x26b 0x0606060606060606
1660 13:49:00.295854 MTRR: Fixed MSR 0x26c 0x0606060606060606
1661 13:49:00.299686 MTRR: Fixed MSR 0x26d 0x0606060606060606
1662 13:49:00.302809 MTRR: Fixed MSR 0x26e 0x0606060606060606
1663 13:49:00.306067 MTRR: Fixed MSR 0x26f 0x0606060606060606
1664 13:49:00.309521 call enable_fixed_mtrr()
1665 13:49:00.312634 CPU physical address size: 39 bits
1666 13:49:00.319346 MTRR: default type WB/UC MTRR counts: 6/5.
1667 13:49:00.322728 MTRR: UC selected as default type.
1668 13:49:00.326192 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1669 13:49:00.332398 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1670 13:49:00.339240 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1671 13:49:00.346845 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1672 13:49:00.352849 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1673 13:49:00.353427
1674 13:49:00.355977 MTRR check
1675 13:49:00.356502 Fixed MTRRs : Enabled
1676 13:49:00.359093 Variable MTRRs: Enabled
1677 13:49:00.359630
1678 13:49:00.362446 MTRR: Fixed MSR 0x250 0x0606060606060606
1679 13:49:00.369114 MTRR: Fixed MSR 0x258 0x0606060606060606
1680 13:49:00.372262 MTRR: Fixed MSR 0x259 0x0000000000000000
1681 13:49:00.375981 MTRR: Fixed MSR 0x268 0x0606060606060606
1682 13:49:00.378891 MTRR: Fixed MSR 0x269 0x0606060606060606
1683 13:49:00.382059 MTRR: Fixed MSR 0x26a 0x0606060606060606
1684 13:49:00.388941 MTRR: Fixed MSR 0x26b 0x0606060606060606
1685 13:49:00.391955 MTRR: Fixed MSR 0x26c 0x0606060606060606
1686 13:49:00.395450 MTRR: Fixed MSR 0x26d 0x0606060606060606
1687 13:49:00.398744 MTRR: Fixed MSR 0x26e 0x0606060606060606
1688 13:49:00.405256 MTRR: Fixed MSR 0x26f 0x0606060606060606
1689 13:49:00.408957 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1690 13:49:00.412496 call enable_fixed_mtrr()
1691 13:49:00.416457 Checking cr50 for pending updates
1692 13:49:00.419560 CPU physical address size: 39 bits
1693 13:49:00.422926 Reading cr50 TPM mode
1694 13:49:00.433032 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1695 13:49:00.440689 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1696 13:49:00.444118 Checking segment from ROM address 0xfff9d5b8
1697 13:49:00.450717 Checking segment from ROM address 0xfff9d5d4
1698 13:49:00.453929 Loading segment from ROM address 0xfff9d5b8
1699 13:49:00.457719 code (compression=0)
1700 13:49:00.464045 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1701 13:49:00.474036 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1702 13:49:00.477868 it's not compressed!
1703 13:49:00.602647 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1704 13:49:00.609327 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1705 13:49:00.616510 Loading segment from ROM address 0xfff9d5d4
1706 13:49:00.619587 Entry Point 0x30000000
1707 13:49:00.620084 Loaded segments
1708 13:49:00.626179 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1709 13:49:00.642663 Finalizing chipset.
1710 13:49:00.646129 Finalizing SMM.
1711 13:49:00.646702 APMC done.
1712 13:49:00.652285 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1713 13:49:00.655617 mp_park_aps done after 0 msecs.
1714 13:49:00.658889 Jumping to boot code at 0x30000000(0x76b4b000)
1715 13:49:00.668922 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1716 13:49:00.669386
1717 13:49:00.669754
1718 13:49:00.670099
1719 13:49:00.672092 Starting depthcharge on Magolor...
1720 13:49:00.672510
1721 13:49:00.673472 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1722 13:49:00.673951 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1723 13:49:00.674354 Setting prompt string to ['dedede:']
1724 13:49:00.674746 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1725 13:49:00.682391 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1726 13:49:00.682816
1727 13:49:00.689023 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1728 13:49:00.689445
1729 13:49:00.692135 fw_config match found: AUDIO_AMP=UNPROVISIONED
1730 13:49:00.692627
1731 13:49:00.695402 Wipe memory regions:
1732 13:49:00.695867
1733 13:49:00.699056 [0x00000000001000, 0x000000000a0000)
1734 13:49:00.699578
1735 13:49:00.702459 [0x00000000100000, 0x00000030000000)
1736 13:49:00.831244
1737 13:49:00.834825 [0x00000031062170, 0x00000076a15000)
1738 13:49:01.003344
1739 13:49:01.006920 [0x00000100000000, 0x00000180400000)
1740 13:49:02.069663
1741 13:49:02.070222 R8152: Initializing
1742 13:49:02.070598
1743 13:49:02.072749 Version 6 (ocp_data = 5c30)
1744 13:49:02.076412
1745 13:49:02.076975 R8152: Done initializing
1746 13:49:02.077348
1747 13:49:02.079452 Adding net device
1748 13:49:02.079953
1749 13:49:02.082959 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1750 13:49:02.086130
1751 13:49:02.086591
1752 13:49:02.086960
1753 13:49:02.087846 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1755 13:49:02.189408 dedede: tftpboot 192.168.201.1 11299519/tftp-deploy-sbjpz5qy/kernel/bzImage 11299519/tftp-deploy-sbjpz5qy/kernel/cmdline 11299519/tftp-deploy-sbjpz5qy/ramdisk/ramdisk.cpio.gz
1756 13:49:02.190093 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1757 13:49:02.190744 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1758 13:49:02.195001 tftpboot 192.168.201.1 11299519/tftp-deploy-sbjpz5qy/kernel/bzIploy-sbjpz5qy/kernel/cmdline 11299519/tftp-deploy-sbjpz5qy/ramdisk/ramdisk.cpio.gz
1759 13:49:02.195484
1760 13:49:02.195895 Waiting for link
1761 13:49:02.397201
1762 13:49:02.397763 done.
1763 13:49:02.398127
1764 13:49:02.398468 MAC: 00:24:32:30:7a:67
1765 13:49:02.398932
1766 13:49:02.400343 Sending DHCP discover... done.
1767 13:49:02.400802
1768 13:49:02.404089 Waiting for reply... done.
1769 13:49:02.404681
1770 13:49:02.407117 Sending DHCP request... done.
1771 13:49:02.407579
1772 13:49:02.413911 Waiting for reply... done.
1773 13:49:02.414474
1774 13:49:02.414842 My ip is 192.168.201.15
1775 13:49:02.415186
1776 13:49:02.417515 The DHCP server ip is 192.168.201.1
1777 13:49:02.417977
1778 13:49:02.424226 TFTP server IP predefined by user: 192.168.201.1
1779 13:49:02.424797
1780 13:49:02.430777 Bootfile predefined by user: 11299519/tftp-deploy-sbjpz5qy/kernel/bzImage
1781 13:49:02.431326
1782 13:49:02.433811 Sending tftp read request... done.
1783 13:49:02.434275
1784 13:49:02.442475 Waiting for the transfer...
1785 13:49:02.442937
1786 13:49:03.164683 00000000 ################################################################
1787 13:49:03.165252
1788 13:49:03.891887 00080000 ################################################################
1789 13:49:03.892452
1790 13:49:04.610715 00100000 ################################################################
1791 13:49:04.611235
1792 13:49:05.322186 00180000 ################################################################
1793 13:49:05.322779
1794 13:49:05.990970 00200000 ################################################################
1795 13:49:05.991489
1796 13:49:06.640463 00280000 ################################################################
1797 13:49:06.640772
1798 13:49:07.308246 00300000 ################################################################
1799 13:49:07.308755
1800 13:49:07.965374 00380000 ################################################################
1801 13:49:07.965605
1802 13:49:08.546407 00400000 ################################################################
1803 13:49:08.546560
1804 13:49:09.125222 00480000 ################################################################
1805 13:49:09.125374
1806 13:49:09.740237 00500000 ################################################################
1807 13:49:09.740381
1808 13:49:10.354681 00580000 ################################################################
1809 13:49:10.354825
1810 13:49:10.955745 00600000 ################################################################
1811 13:49:10.955910
1812 13:49:11.543225 00680000 ################################################################
1813 13:49:11.543369
1814 13:49:12.110882 00700000 ################################################################
1815 13:49:12.111030
1816 13:49:12.693186 00780000 ################################################################
1817 13:49:12.693339
1818 13:49:12.822743 00800000 ############## done.
1819 13:49:12.822865
1820 13:49:12.826235 The bootfile was 8499088 bytes long.
1821 13:49:12.826316
1822 13:49:12.829396 Sending tftp read request... done.
1823 13:49:12.829477
1824 13:49:12.833061 Waiting for the transfer...
1825 13:49:12.833142
1826 13:49:13.437380 00000000 ################################################################
1827 13:49:13.437524
1828 13:49:14.036220 00080000 ################################################################
1829 13:49:14.036366
1830 13:49:14.640763 00100000 ################################################################
1831 13:49:14.640907
1832 13:49:15.251442 00180000 ################################################################
1833 13:49:15.251587
1834 13:49:15.860086 00200000 ################################################################
1835 13:49:15.860232
1836 13:49:16.455910 00280000 ################################################################
1837 13:49:16.456059
1838 13:49:17.045940 00300000 ################################################################
1839 13:49:17.046338
1840 13:49:17.625568 00380000 ################################################################
1841 13:49:17.625713
1842 13:49:18.318625 00400000 ################################################################
1843 13:49:18.319128
1844 13:49:19.037444 00480000 ################################################################
1845 13:49:19.037986
1846 13:49:19.771814 00500000 ################################################################
1847 13:49:19.772347
1848 13:49:20.514992 00580000 ################################################################
1849 13:49:20.515510
1850 13:49:21.251210 00600000 ################################################################
1851 13:49:21.251777
1852 13:49:21.992196 00680000 ################################################################
1853 13:49:21.992816
1854 13:49:22.731842 00700000 ################################################################
1855 13:49:22.732371
1856 13:49:23.458606 00780000 ################################################################
1857 13:49:23.459249
1858 13:49:24.064816 00800000 ##################################################### done.
1859 13:49:24.065378
1860 13:49:24.068056 Sending tftp read request... done.
1861 13:49:24.068511
1862 13:49:24.071323 Waiting for the transfer...
1863 13:49:24.071811
1864 13:49:24.072174 00000000 # done.
1865 13:49:24.072525
1866 13:49:24.081089 Command line loaded dynamically from TFTP file: 11299519/tftp-deploy-sbjpz5qy/kernel/cmdline
1867 13:49:24.081638
1868 13:49:24.097786 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1869 13:49:24.098360
1870 13:49:24.101277 ec_init: CrosEC protocol v3 supported (256, 256)
1871 13:49:24.109155
1872 13:49:24.112458 Shutting down all USB controllers.
1873 13:49:24.113029
1874 13:49:24.113396 Removing current net device
1875 13:49:24.113733
1876 13:49:24.115684 Finalizing coreboot
1877 13:49:24.116144
1878 13:49:24.122221 Exiting depthcharge with code 4 at timestamp: 30263828
1879 13:49:24.122781
1880 13:49:24.123150
1881 13:49:24.123493 Starting kernel ...
1882 13:49:24.123953
1883 13:49:24.124453
1884 13:49:24.125755 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
1885 13:49:24.126294 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
1886 13:49:24.126700 Setting prompt string to ['Linux version [0-9]']
1887 13:49:24.127072 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1888 13:49:24.127452 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1890 13:53:47.127294 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
1892 13:53:47.128450 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
1894 13:53:47.129311 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1897 13:53:47.130686 end: 2 depthcharge-action (duration 00:05:00) [common]
1899 13:53:47.131874 Cleaning after the job
1900 13:53:47.132061 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299519/tftp-deploy-sbjpz5qy/ramdisk
1901 13:53:47.133365 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299519/tftp-deploy-sbjpz5qy/kernel
1902 13:53:47.134781 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299519/tftp-deploy-sbjpz5qy/modules
1903 13:53:47.135127 start: 5.1 power-off (timeout 00:00:30) [common]
1904 13:53:47.135285 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-1' '--port=1' '--command=off'
1905 13:53:47.217099 >> Command sent successfully.
1906 13:53:47.229630 Returned 0 in 0 seconds
1907 13:53:47.331011 end: 5.1 power-off (duration 00:00:00) [common]
1909 13:53:47.332787 start: 5.2 read-feedback (timeout 00:10:00) [common]
1910 13:53:47.334330 Listened to connection for namespace 'common' for up to 1s
1912 13:53:47.335749 Listened to connection for namespace 'common' for up to 1s
1913 13:53:48.334762 Finalising connection for namespace 'common'
1914 13:53:48.335425 Disconnecting from shell: Finalise
1915 13:53:48.335861
1916 13:53:48.437048 end: 5.2 read-feedback (duration 00:00:01) [common]
1917 13:53:48.437685 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11299519
1918 13:53:48.492406 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11299519
1919 13:53:48.492604 JobError: Your job cannot terminate cleanly.