Boot log: acer-cbv514-1h-34uz-brya

    1 13:48:22.950425  lava-dispatcher, installed at version: 2023.06
    2 13:48:22.950652  start: 0 validate
    3 13:48:22.950800  Start time: 2023-08-16 13:48:22.950793+00:00 (UTC)
    4 13:48:22.950950  Using caching service: 'http://localhost/cache/?uri=%s'
    5 13:48:22.951111  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 13:48:23.214007  Using caching service: 'http://localhost/cache/?uri=%s'
    7 13:48:23.214802  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2312-g74888f4b13f0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 13:48:23.472054  Using caching service: 'http://localhost/cache/?uri=%s'
    9 13:48:23.472796  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2312-g74888f4b13f0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 13:48:26.103118  validate duration: 3.15
   12 13:48:26.103368  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 13:48:26.103462  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 13:48:26.103546  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 13:48:26.103660  Not decompressing ramdisk as can be used compressed.
   16 13:48:26.103745  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 13:48:26.103814  saving as /var/lib/lava/dispatcher/tmp/11299547/tftp-deploy-maozvy8_/ramdisk/rootfs.cpio.gz
   18 13:48:26.103880  total size: 8418130 (8 MB)
   19 13:48:26.658451  progress   0 % (0 MB)
   20 13:48:26.671780  progress   5 % (0 MB)
   21 13:48:26.684684  progress  10 % (0 MB)
   22 13:48:26.694899  progress  15 % (1 MB)
   23 13:48:26.701211  progress  20 % (1 MB)
   24 13:48:26.706112  progress  25 % (2 MB)
   25 13:48:26.710350  progress  30 % (2 MB)
   26 13:48:26.713822  progress  35 % (2 MB)
   27 13:48:26.717242  progress  40 % (3 MB)
   28 13:48:26.720389  progress  45 % (3 MB)
   29 13:48:26.723282  progress  50 % (4 MB)
   30 13:48:26.725999  progress  55 % (4 MB)
   31 13:48:26.728540  progress  60 % (4 MB)
   32 13:48:26.730774  progress  65 % (5 MB)
   33 13:48:26.733070  progress  70 % (5 MB)
   34 13:48:26.735386  progress  75 % (6 MB)
   35 13:48:26.737769  progress  80 % (6 MB)
   36 13:48:26.740087  progress  85 % (6 MB)
   37 13:48:26.742311  progress  90 % (7 MB)
   38 13:48:26.744468  progress  95 % (7 MB)
   39 13:48:26.746484  progress 100 % (8 MB)
   40 13:48:26.746713  8 MB downloaded in 0.64 s (12.49 MB/s)
   41 13:48:26.746868  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 13:48:26.747102  end: 1.1 download-retry (duration 00:00:01) [common]
   44 13:48:26.747185  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 13:48:26.747267  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 13:48:26.747409  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2312-g74888f4b13f0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 13:48:26.747481  saving as /var/lib/lava/dispatcher/tmp/11299547/tftp-deploy-maozvy8_/kernel/bzImage
   48 13:48:26.747540  total size: 8499088 (8 MB)
   49 13:48:26.747601  No compression specified
   50 13:48:26.748994  progress   0 % (0 MB)
   51 13:48:26.751261  progress   5 % (0 MB)
   52 13:48:26.753514  progress  10 % (0 MB)
   53 13:48:26.755715  progress  15 % (1 MB)
   54 13:48:26.757964  progress  20 % (1 MB)
   55 13:48:26.760163  progress  25 % (2 MB)
   56 13:48:26.762380  progress  30 % (2 MB)
   57 13:48:26.764585  progress  35 % (2 MB)
   58 13:48:26.766824  progress  40 % (3 MB)
   59 13:48:26.769022  progress  45 % (3 MB)
   60 13:48:26.771270  progress  50 % (4 MB)
   61 13:48:26.773457  progress  55 % (4 MB)
   62 13:48:26.775612  progress  60 % (4 MB)
   63 13:48:26.777776  progress  65 % (5 MB)
   64 13:48:26.779924  progress  70 % (5 MB)
   65 13:48:26.782089  progress  75 % (6 MB)
   66 13:48:26.784235  progress  80 % (6 MB)
   67 13:48:26.786389  progress  85 % (6 MB)
   68 13:48:26.788541  progress  90 % (7 MB)
   69 13:48:26.790700  progress  95 % (7 MB)
   70 13:48:26.792868  progress 100 % (8 MB)
   71 13:48:26.793016  8 MB downloaded in 0.05 s (178.25 MB/s)
   72 13:48:26.793210  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 13:48:26.793433  end: 1.2 download-retry (duration 00:00:00) [common]
   75 13:48:26.793516  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 13:48:26.793610  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 13:48:26.793747  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2312-g74888f4b13f0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 13:48:26.793821  saving as /var/lib/lava/dispatcher/tmp/11299547/tftp-deploy-maozvy8_/modules/modules.tar
   79 13:48:26.793882  total size: 253616 (0 MB)
   80 13:48:26.793942  Using unxz to decompress xz
   81 13:48:26.798363  progress  12 % (0 MB)
   82 13:48:26.798747  progress  25 % (0 MB)
   83 13:48:26.799027  progress  38 % (0 MB)
   84 13:48:26.800639  progress  51 % (0 MB)
   85 13:48:26.802554  progress  64 % (0 MB)
   86 13:48:26.804320  progress  77 % (0 MB)
   87 13:48:26.806176  progress  90 % (0 MB)
   88 13:48:26.807876  progress 100 % (0 MB)
   89 13:48:26.813493  0 MB downloaded in 0.02 s (12.34 MB/s)
   90 13:48:26.813720  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 13:48:26.813975  end: 1.3 download-retry (duration 00:00:00) [common]
   93 13:48:26.814094  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   94 13:48:26.814207  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
   95 13:48:26.814295  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 13:48:26.814379  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
   97 13:48:26.814591  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b
   98 13:48:26.814728  makedir: /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin
   99 13:48:26.814833  makedir: /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/tests
  100 13:48:26.814930  makedir: /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/results
  101 13:48:26.815041  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-add-keys
  102 13:48:26.815185  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-add-sources
  103 13:48:26.815317  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-background-process-start
  104 13:48:26.815448  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-background-process-stop
  105 13:48:26.815573  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-common-functions
  106 13:48:26.815697  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-echo-ipv4
  107 13:48:26.815823  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-install-packages
  108 13:48:26.815946  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-installed-packages
  109 13:48:26.816071  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-os-build
  110 13:48:26.816215  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-probe-channel
  111 13:48:26.816339  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-probe-ip
  112 13:48:26.816461  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-target-ip
  113 13:48:26.816583  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-target-mac
  114 13:48:26.816705  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-target-storage
  115 13:48:26.816832  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-test-case
  116 13:48:26.816954  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-test-event
  117 13:48:26.817076  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-test-feedback
  118 13:48:26.817264  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-test-raise
  119 13:48:26.817390  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-test-reference
  120 13:48:26.817518  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-test-runner
  121 13:48:26.817643  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-test-set
  122 13:48:26.817768  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-test-shell
  123 13:48:26.817898  Updating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-install-packages (oe)
  124 13:48:26.818053  Updating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/bin/lava-installed-packages (oe)
  125 13:48:26.818263  Creating /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/environment
  126 13:48:26.818416  LAVA metadata
  127 13:48:26.818507  - LAVA_JOB_ID=11299547
  128 13:48:26.818587  - LAVA_DISPATCHER_IP=192.168.201.1
  129 13:48:26.818707  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  130 13:48:26.818776  skipped lava-vland-overlay
  131 13:48:26.818852  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 13:48:26.818929  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  133 13:48:26.818991  skipped lava-multinode-overlay
  134 13:48:26.819064  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 13:48:26.819144  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  136 13:48:26.819229  Loading test definitions
  137 13:48:26.819320  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  138 13:48:26.819405  Using /lava-11299547 at stage 0
  139 13:48:26.819707  uuid=11299547_1.4.2.3.1 testdef=None
  140 13:48:26.819793  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 13:48:26.819879  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  142 13:48:26.820449  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 13:48:26.820665  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  145 13:48:26.821368  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 13:48:26.821593  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  148 13:48:26.822191  runner path: /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/0/tests/0_dmesg test_uuid 11299547_1.4.2.3.1
  149 13:48:26.822345  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 13:48:26.822566  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  152 13:48:26.822635  Using /lava-11299547 at stage 1
  153 13:48:26.822925  uuid=11299547_1.4.2.3.5 testdef=None
  154 13:48:26.823012  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  155 13:48:26.823093  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  156 13:48:26.823557  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  158 13:48:26.823771  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  159 13:48:26.824404  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  161 13:48:26.824625  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  162 13:48:26.825294  runner path: /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/1/tests/1_bootrr test_uuid 11299547_1.4.2.3.5
  163 13:48:26.825444  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  165 13:48:26.825674  Creating lava-test-runner.conf files
  166 13:48:26.825736  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/0 for stage 0
  167 13:48:26.825823  - 0_dmesg
  168 13:48:26.825902  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299547/lava-overlay-2a149l3b/lava-11299547/1 for stage 1
  169 13:48:26.825991  - 1_bootrr
  170 13:48:26.826084  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  171 13:48:26.826168  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  172 13:48:26.834687  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  173 13:48:26.834793  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  174 13:48:26.834878  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  175 13:48:26.834961  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  176 13:48:26.835043  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  177 13:48:27.082456  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  178 13:48:27.082845  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  179 13:48:27.082967  extracting modules file /var/lib/lava/dispatcher/tmp/11299547/tftp-deploy-maozvy8_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299547/extract-overlay-ramdisk-n0x97rpy/ramdisk
  180 13:48:27.096700  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  181 13:48:27.096842  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  182 13:48:27.096939  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299547/compress-overlay-mn2ja7o9/overlay-1.4.2.4.tar.gz to ramdisk
  183 13:48:27.097013  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299547/compress-overlay-mn2ja7o9/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11299547/extract-overlay-ramdisk-n0x97rpy/ramdisk
  184 13:48:27.106183  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  185 13:48:27.106309  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  186 13:48:27.106403  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  187 13:48:27.106492  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  188 13:48:27.106567  Building ramdisk /var/lib/lava/dispatcher/tmp/11299547/extract-overlay-ramdisk-n0x97rpy/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11299547/extract-overlay-ramdisk-n0x97rpy/ramdisk
  189 13:48:27.232149  >> 49825 blocks

  190 13:48:28.077978  rename /var/lib/lava/dispatcher/tmp/11299547/extract-overlay-ramdisk-n0x97rpy/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11299547/tftp-deploy-maozvy8_/ramdisk/ramdisk.cpio.gz
  191 13:48:28.078413  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  192 13:48:28.078531  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  193 13:48:28.078648  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  194 13:48:28.078774  No mkimage arch provided, not using FIT.
  195 13:48:28.078875  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  196 13:48:28.078956  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  197 13:48:28.079064  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  198 13:48:28.079153  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  199 13:48:28.079231  No LXC device requested
  200 13:48:28.079309  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  201 13:48:28.079393  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  202 13:48:28.079468  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  203 13:48:28.079537  Checking files for TFTP limit of 4294967296 bytes.
  204 13:48:28.079933  end: 1 tftp-deploy (duration 00:00:02) [common]
  205 13:48:28.080032  start: 2 depthcharge-action (timeout 00:05:00) [common]
  206 13:48:28.080117  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  207 13:48:28.080236  substitutions:
  208 13:48:28.080299  - {DTB}: None
  209 13:48:28.080361  - {INITRD}: 11299547/tftp-deploy-maozvy8_/ramdisk/ramdisk.cpio.gz
  210 13:48:28.080417  - {KERNEL}: 11299547/tftp-deploy-maozvy8_/kernel/bzImage
  211 13:48:28.080473  - {LAVA_MAC}: None
  212 13:48:28.080526  - {PRESEED_CONFIG}: None
  213 13:48:28.080578  - {PRESEED_LOCAL}: None
  214 13:48:28.080630  - {RAMDISK}: 11299547/tftp-deploy-maozvy8_/ramdisk/ramdisk.cpio.gz
  215 13:48:28.080683  - {ROOT_PART}: None
  216 13:48:28.080750  - {ROOT}: None
  217 13:48:28.080802  - {SERVER_IP}: 192.168.201.1
  218 13:48:28.080867  - {TEE}: None
  219 13:48:28.080919  Parsed boot commands:
  220 13:48:28.080970  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  221 13:48:28.081182  Parsed boot commands: tftpboot 192.168.201.1 11299547/tftp-deploy-maozvy8_/kernel/bzImage 11299547/tftp-deploy-maozvy8_/kernel/cmdline 11299547/tftp-deploy-maozvy8_/ramdisk/ramdisk.cpio.gz
  222 13:48:28.081266  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  223 13:48:28.081346  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  224 13:48:28.081435  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  225 13:48:28.081515  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  226 13:48:28.081582  Not connected, no need to disconnect.
  227 13:48:28.081653  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  228 13:48:28.081849  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  229 13:48:28.081958  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-6'
  230 13:48:28.086011  Setting prompt string to ['lava-test: # ']
  231 13:48:28.086348  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  232 13:48:28.086452  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  233 13:48:28.086547  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  234 13:48:28.086652  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  235 13:48:28.086845  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-6' '--port=1' '--command=reboot'
  236 13:48:33.235685  >> Command sent successfully.

  237 13:48:33.247074  Returned 0 in 5 seconds
  238 13:48:33.348257  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  240 13:48:33.349803  end: 2.2.2 reset-device (duration 00:00:05) [common]
  241 13:48:33.350458  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  242 13:48:33.350915  Setting prompt string to 'Starting depthcharge on Volmar...'
  243 13:48:33.351260  Changing prompt to 'Starting depthcharge on Volmar...'
  244 13:48:33.351601  depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
  245 13:48:33.352852  [Enter `^Ec?' for help]

  246 13:48:34.715168  

  247 13:48:34.715686  

  248 13:48:34.722319  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  249 13:48:34.726218  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  250 13:48:34.730379  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  251 13:48:34.737321  CPU: AES supported, TXT NOT supported, VT supported

  252 13:48:34.745338  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  253 13:48:34.745778  Cache size = 10 MiB

  254 13:48:34.748771  MCH: device id 4609 (rev 04) is Alderlake-P

  255 13:48:34.756320  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  256 13:48:34.759765  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  257 13:48:34.763066  VBOOT: Loading verstage.

  258 13:48:34.766792  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  259 13:48:34.770455  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  260 13:48:34.777138  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  261 13:48:34.784254  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  262 13:48:34.794246  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  263 13:48:34.794784  

  264 13:48:34.795127  

  265 13:48:34.804232  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  266 13:48:34.808627  Probing TPM I2C: I2C bus 1 version 0x3230302a

  267 13:48:34.812005  DW I2C bus 1 at 0xfe022000 (400 KHz)

  268 13:48:34.815072  I2C TX abort detected (00000001)

  269 13:48:34.818670  cr50_i2c_read: Address write failed

  270 13:48:34.831246  .done! DID_VID 0x00281ae0

  271 13:48:34.834776  TPM ready after 0 ms

  272 13:48:34.837974  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  273 13:48:34.851552  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  274 13:48:34.858043  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  275 13:48:34.899735  tlcl_send_startup: Startup return code is 0

  276 13:48:34.900269  TPM: setup succeeded

  277 13:48:34.921250  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  278 13:48:34.943117  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  279 13:48:34.946645  Chrome EC: UHEPI supported

  280 13:48:34.950317  Reading cr50 boot mode

  281 13:48:34.965027  Cr50 says boot_mode is VERIFIED_RW(0x00).

  282 13:48:34.965625  Phase 1

  283 13:48:34.972082  FMAP: area GBB found @ 1805000 (458752 bytes)

  284 13:48:34.978970  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  285 13:48:34.985685  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  286 13:48:34.992749  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  287 13:48:34.993301  Phase 2

  288 13:48:34.993646  Phase 3

  289 13:48:35.000119  FMAP: area GBB found @ 1805000 (458752 bytes)

  290 13:48:35.003257  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  291 13:48:35.009851  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  292 13:48:35.013512  VB2:vb2_verify_keyblock() Checking keyblock signature...

  293 13:48:35.020392  VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW

  294 13:48:35.026808  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  295 13:48:35.033301  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  296 13:48:35.046524  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  297 13:48:35.050257  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  298 13:48:35.057450  VB2:vb2_verify_fw_preamble() Verifying preamble.

  299 13:48:35.060767  VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW

  300 13:48:35.067532  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  301 13:48:35.074748  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  302 13:48:35.075332  Phase 4

  303 13:48:35.080730  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  304 13:48:35.087923  VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW

  305 13:48:35.311906  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  306 13:48:35.318879  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  307 13:48:35.321638  Saving vboot hash.

  308 13:48:35.328736  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  309 13:48:35.344174  tlcl_extend: response is 0

  310 13:48:35.350769  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  311 13:48:35.354338  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  312 13:48:35.371615  tlcl_extend: response is 0

  313 13:48:35.378820  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  314 13:48:35.395732  tlcl_lock_nv_write: response is 0

  315 13:48:35.417639  tlcl_lock_nv_write: response is 0

  316 13:48:35.418157  Slot A is selected

  317 13:48:35.424178  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  318 13:48:35.431120  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  319 13:48:35.437422  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  320 13:48:35.444125  BS: verstage times (exec / console): total (unknown) / 253 ms

  321 13:48:35.444644  

  322 13:48:35.444979  

  323 13:48:35.450703  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  324 13:48:35.455073  Google Chrome EC: version:

  325 13:48:35.458383  	ro: volmar_v2.0.14126-e605144e9c

  326 13:48:35.461701  	rw: volmar_v0.0.55-22d1557

  327 13:48:35.465272    running image: 2

  328 13:48:35.468412  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  329 13:48:35.478444  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  330 13:48:35.484946  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  331 13:48:35.491499  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  332 13:48:35.501620  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  333 13:48:35.511586  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  334 13:48:35.514728  EC took 982us to calculate image hash

  335 13:48:35.524683  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  336 13:48:35.528245  VB2:sync_ec() select_rw=RW(active)

  337 13:48:35.539976  Waited 275us to clear limit power flag.

  338 13:48:35.543641  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  339 13:48:35.547120  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  340 13:48:35.550484  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  341 13:48:35.557537  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  342 13:48:35.560485  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  343 13:48:35.563579  TCO_STS:   0000 0000

  344 13:48:35.564132  GEN_PMCON: d0015038 00002200

  345 13:48:35.567245  GBLRST_CAUSE: 00000000 00000000

  346 13:48:35.570425  HPR_CAUSE0: 00000000

  347 13:48:35.573240  prev_sleep_state 5

  348 13:48:35.577145  Abort disabling TXT, as CPU is not TXT capable.

  349 13:48:35.584968  cse_lite: Number of partitions = 3

  350 13:48:35.588183  cse_lite: Current partition = RO

  351 13:48:35.588691  cse_lite: Next partition = RO

  352 13:48:35.591476  cse_lite: Flags = 0x7

  353 13:48:35.598244  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  354 13:48:35.608284  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  355 13:48:35.611634  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  356 13:48:35.618286  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  357 13:48:35.624904  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  358 13:48:35.631730  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  359 13:48:35.635006  cse_lite: CSE CBFS RW version : 16.1.25.2049

  360 13:48:35.641502  cse_lite: Set Boot Partition Info Command (RW)

  361 13:48:35.644747  HECI: Global Reset(Type:1) Command

  362 13:48:37.063017  �n�boot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  363 13:48:37.066288  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  364 13:48:37.073312  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  365 13:48:37.076531  CPU: AES supported, TXT NOT supported, VT supported

  366 13:48:37.083159  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  367 13:48:37.086702  Cache size = 10 MiB

  368 13:48:37.090014  MCH: device id 4609 (rev 04) is Alderlake-P

  369 13:48:37.096704  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  370 13:48:37.099656  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  371 13:48:37.103423  VBOOT: Loading verstage.

  372 13:48:37.110628  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  373 13:48:37.113796  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  374 13:48:37.117596  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  375 13:48:37.128221  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  376 13:48:37.134534  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  377 13:48:37.135060  

  378 13:48:37.135404  

  379 13:48:37.144629  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  380 13:48:37.151316  Probing TPM I2C: I2C bus 1 version 0x3230302a

  381 13:48:37.154403  DW I2C bus 1 at 0xfe022000 (400 KHz)

  382 13:48:37.157891  done! DID_VID 0x00281ae0

  383 13:48:37.158327  TPM ready after 0 ms

  384 13:48:37.164462  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  385 13:48:37.175698  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  386 13:48:37.179687  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  387 13:48:37.221082  tlcl_send_startup: Startup return code is 0

  388 13:48:37.221611  TPM: setup succeeded

  389 13:48:37.242047  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  390 13:48:37.262800  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  391 13:48:37.266608  Chrome EC: UHEPI supported

  392 13:48:37.269949  Reading cr50 boot mode

  393 13:48:37.285142  Cr50 says boot_mode is VERIFIED_RW(0x00).

  394 13:48:37.285667  Phase 1

  395 13:48:37.291757  FMAP: area GBB found @ 1805000 (458752 bytes)

  396 13:48:37.298606  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  397 13:48:37.305239  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  398 13:48:37.312006  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  399 13:48:37.312534  Phase 2

  400 13:48:37.315430  Phase 3

  401 13:48:37.317926  FMAP: area GBB found @ 1805000 (458752 bytes)

  402 13:48:37.325183  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  403 13:48:37.328540  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  404 13:48:37.334965  VB2:vb2_verify_keyblock() Checking keyblock signature...

  405 13:48:37.342082  VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW

  406 13:48:37.348394  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  407 13:48:37.351987  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  408 13:48:37.365864  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  409 13:48:37.369228  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  410 13:48:37.376200  VB2:vb2_verify_fw_preamble() Verifying preamble.

  411 13:48:37.382347  VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW

  412 13:48:37.385622  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  413 13:48:37.393057  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  414 13:48:37.396935  Phase 4

  415 13:48:37.400269  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  416 13:48:37.406799  VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW

  417 13:48:37.632935  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  418 13:48:37.639602  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  419 13:48:37.642367  Saving vboot hash.

  420 13:48:37.649419  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  421 13:48:37.665027  tlcl_extend: response is 0

  422 13:48:37.671729  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  423 13:48:37.678218  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  424 13:48:37.692613  tlcl_extend: response is 0

  425 13:48:37.699492  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  426 13:48:37.719284  tlcl_lock_nv_write: response is 0

  427 13:48:37.738285  tlcl_lock_nv_write: response is 0

  428 13:48:37.738793  Slot A is selected

  429 13:48:37.745543  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  430 13:48:37.752067  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  431 13:48:37.758309  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  432 13:48:37.765157  BS: verstage times (exec / console): total (unknown) / 246 ms

  433 13:48:37.765640  

  434 13:48:37.766159  

  435 13:48:37.772143  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  436 13:48:37.775848  Google Chrome EC: version:

  437 13:48:37.779075  	ro: volmar_v2.0.14126-e605144e9c

  438 13:48:37.782666  	rw: volmar_v0.0.55-22d1557

  439 13:48:37.785758    running image: 2

  440 13:48:37.789092  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  441 13:48:37.799082  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  442 13:48:37.805960  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  443 13:48:37.812538  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  444 13:48:37.822367  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  445 13:48:37.832304  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  446 13:48:37.835603  EC took 941us to calculate image hash

  447 13:48:37.845906  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  448 13:48:37.849175  VB2:sync_ec() select_rw=RW(active)

  449 13:48:37.860522  Waited 275us to clear limit power flag.

  450 13:48:37.863881  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  451 13:48:37.867888  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  452 13:48:37.870982  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  453 13:48:37.877507  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  454 13:48:37.880923  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  455 13:48:37.884337  TCO_STS:   0000 0000

  456 13:48:37.884895  GEN_PMCON: d1001038 00002200

  457 13:48:37.888525  GBLRST_CAUSE: 00000040 00000000

  458 13:48:37.891381  HPR_CAUSE0: 00000000

  459 13:48:37.891957  prev_sleep_state 5

  460 13:48:37.899507  Abort disabling TXT, as CPU is not TXT capable.

  461 13:48:37.903311  cse_lite: Number of partitions = 3

  462 13:48:37.906214  cse_lite: Current partition = RW

  463 13:48:37.909800  cse_lite: Next partition = RW

  464 13:48:37.912960  cse_lite: Flags = 0x7

  465 13:48:37.919352  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  466 13:48:37.929386  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  467 13:48:37.932956  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  468 13:48:37.939191  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  469 13:48:37.945999  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  470 13:48:37.952759  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  471 13:48:37.955822  cse_lite: CSE CBFS RW version : 16.1.25.2049

  472 13:48:37.959165  Boot Count incremented to 3069

  473 13:48:37.965829  CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4

  474 13:48:37.972646  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  475 13:48:37.985213  Probing TPM I2C: done! DID_VID 0x00281ae0

  476 13:48:37.988646  Locality already claimed

  477 13:48:37.992096  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  478 13:48:38.011241  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0

  479 13:48:38.017815  MRC: Hash idx 0x100d comparison successful.

  480 13:48:38.020844  MRC cache found, size f6c8

  481 13:48:38.021408  bootmode is set to: 2

  482 13:48:38.024766  EC returned error result code 3

  483 13:48:38.027948  FW_CONFIG value from CBI is 0x131

  484 13:48:38.034898  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  485 13:48:38.038225  SPD index = 0

  486 13:48:38.044885  CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c

  487 13:48:38.045491  SPD: module type is LPDDR4X

  488 13:48:38.051795  SPD: module part number is K4U6E3S4AB-MGCL

  489 13:48:38.058368  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  490 13:48:38.061700  SPD: device width 16 bits, bus width 16 bits

  491 13:48:38.064745  SPD: module size is 1024 MB (per channel)

  492 13:48:38.134546  CBMEM:

  493 13:48:38.137605  IMD: root @ 0x76fff000 254 entries.

  494 13:48:38.140937  IMD: root @ 0x76ffec00 62 entries.

  495 13:48:38.149065  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  496 13:48:38.151762  RO_VPD is uninitialized or empty.

  497 13:48:38.155213  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  498 13:48:38.158370  RW_VPD is uninitialized or empty.

  499 13:48:38.165377  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  500 13:48:38.168550  External stage cache:

  501 13:48:38.172303  IMD: root @ 0x7bbff000 254 entries.

  502 13:48:38.175531  IMD: root @ 0x7bbfec00 62 entries.

  503 13:48:38.182382  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  504 13:48:38.188855  MRC: Checking cached data update for 'RW_MRC_CACHE'.

  505 13:48:38.192186  MRC: 'RW_MRC_CACHE' does not need update.

  506 13:48:38.192648  8 DIMMs found

  507 13:48:38.195466  SMM Memory Map

  508 13:48:38.198840  SMRAM       : 0x7b800000 0x800000

  509 13:48:38.202080   Subregion 0: 0x7b800000 0x200000

  510 13:48:38.205063   Subregion 1: 0x7ba00000 0x200000

  511 13:48:38.208390   Subregion 2: 0x7bc00000 0x400000

  512 13:48:38.212337  top_of_ram = 0x77000000

  513 13:48:38.215793  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  514 13:48:38.221848  MTRR Range: Start=7b800000 End=7c000000 (Size 800000)

  515 13:48:38.228766  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  516 13:48:38.231938  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  517 13:48:38.232371  Normal boot

  518 13:48:38.242021  CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948

  519 13:48:38.248812  Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0

  520 13:48:38.255092  Processing 237 relocs. Offset value of 0x74ab9000

  521 13:48:38.263269  BS: romstage times (exec / console): total (unknown) / 381 ms

  522 13:48:38.270441  

  523 13:48:38.270939  

  524 13:48:38.277455  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 postcar starting (log level: 8)...

  525 13:48:38.277977  Normal boot

  526 13:48:38.284228  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  527 13:48:38.290532  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  528 13:48:38.297772  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  529 13:48:38.307178  CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0

  530 13:48:38.355473  Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0

  531 13:48:38.361666  Processing 5931 relocs. Offset value of 0x72a2f000

  532 13:48:38.365053  BS: postcar times (exec / console): total (unknown) / 51 ms

  533 13:48:38.365520  

  534 13:48:38.368380  

  535 13:48:38.374972  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 ramstage starting (log level: 8)...

  536 13:48:38.378411  Reserving BERT start 76a1e000, size 10000

  537 13:48:38.381777  Normal boot

  538 13:48:38.385513  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  539 13:48:38.392018  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  540 13:48:38.402037  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  541 13:48:38.405459  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  542 13:48:38.408427  Google Chrome EC: version:

  543 13:48:38.411790  	ro: volmar_v2.0.14126-e605144e9c

  544 13:48:38.415402  	rw: volmar_v0.0.55-22d1557

  545 13:48:38.415827    running image: 2

  546 13:48:38.421843  ACPI _SWS is PM1 Index 8 GPE Index -1

  547 13:48:38.424892  BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms

  548 13:48:38.430253  EC returned error result code 3

  549 13:48:38.433261  FW_CONFIG value from CBI is 0x131

  550 13:48:38.440498  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  551 13:48:38.443677  PCI: 00:1c.2 disabled by fw_config

  552 13:48:38.450139  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  553 13:48:38.453465  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  554 13:48:38.459877  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  555 13:48:38.463446  fw_config match found: FPMCU_MASK=FPMCU_ENABLED

  556 13:48:38.471157  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  557 13:48:38.477622  CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080

  558 13:48:38.480892  microcode: sig=0x906a4 pf=0x80 revision=0x423

  559 13:48:38.487767  microcode: Update skipped, already up-to-date

  560 13:48:38.494437  CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314

  561 13:48:38.525834  Detected 6 core, 8 thread CPU.

  562 13:48:38.529296  Setting up SMI for CPU

  563 13:48:38.532412  IED base = 0x7bc00000

  564 13:48:38.532929  IED size = 0x00400000

  565 13:48:38.535787  Will perform SMM setup.

  566 13:48:38.539420  CPU: 12th Gen Intel(R) Core(TM) i3-1215U.

  567 13:48:38.542504  LAPIC 0x0 in XAPIC mode.

  568 13:48:38.552711  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

  569 13:48:38.555580  Processing 18 relocs. Offset value of 0x00030000

  570 13:48:38.560495  Attempting to start 7 APs

  571 13:48:38.564224  Waiting for 10ms after sending INIT.

  572 13:48:38.576792  Waiting for SIPI to complete...

  573 13:48:38.580369  LAPIC 0x1 in XAPIC mode.

  574 13:48:38.583706  LAPIC 0x12 in XAPIC mode.

  575 13:48:38.586897  AP: slot 6 apic_id 1, MCU rev: 0x00000423

  576 13:48:38.589902  LAPIC 0x16 in XAPIC mode.

  577 13:48:38.593589  LAPIC 0x14 in XAPIC mode.

  578 13:48:38.596667  AP: slot 3 apic_id 12, MCU rev: 0x00000423

  579 13:48:38.600223  AP: slot 1 apic_id 16, MCU rev: 0x00000423

  580 13:48:38.603494  LAPIC 0x10 in XAPIC mode.

  581 13:48:38.610524  AP: slot 4 apic_id 14, MCU rev: 0x00000423

  582 13:48:38.613368  AP: slot 2 apic_id 10, MCU rev: 0x00000423

  583 13:48:38.613932  done.

  584 13:48:38.617182  Waiting for SIPI to complete...

  585 13:48:38.617723  done.

  586 13:48:38.620335  LAPIC 0x9 in XAPIC mode.

  587 13:48:38.624033  LAPIC 0x8 in XAPIC mode.

  588 13:48:38.626814  AP: slot 5 apic_id 9, MCU rev: 0x00000423

  589 13:48:38.630343  AP: slot 7 apic_id 8, MCU rev: 0x00000423

  590 13:48:38.633574  smm_setup_relocation_handler: enter

  591 13:48:38.636948  smm_setup_relocation_handler: exit

  592 13:48:38.646951  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208

  593 13:48:38.650630  Processing 11 relocs. Offset value of 0x00038000

  594 13:48:38.657085  smm_module_setup_stub: stack_top = 0x7b804000

  595 13:48:38.660028  smm_module_setup_stub: per cpu stack_size = 0x800

  596 13:48:38.666762  smm_module_setup_stub: runtime.start32_offset = 0x4c

  597 13:48:38.669848  smm_module_setup_stub: runtime.smm_size = 0x10000

  598 13:48:38.676521  SMM Module: stub loaded at 38000. Will call 0x76a52094

  599 13:48:38.679959  Installing permanent SMM handler to 0x7b800000

  600 13:48:38.686527  smm_load_module: total_smm_space_needed e468, available -> 200000

  601 13:48:38.696613  Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468

  602 13:48:38.700030  Processing 255 relocs. Offset value of 0x7b9f6000

  603 13:48:38.706728  smm_load_module: smram_start: 0x7b800000

  604 13:48:38.709661  smm_load_module: smram_end: 7ba00000

  605 13:48:38.712972  smm_load_module: handler start 0x7b9f6d5f

  606 13:48:38.716690  smm_load_module: handler_size 98d0

  607 13:48:38.720165  smm_load_module: fxsave_area 0x7b9ff000

  608 13:48:38.722940  smm_load_module: fxsave_size 1000

  609 13:48:38.726500  smm_load_module: CONFIG_MSEG_SIZE 0x0

  610 13:48:38.732863  smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0

  611 13:48:38.739530  smm_load_module: handler_mod_params.smbase = 0x7b800000

  612 13:48:38.742872  smm_load_module: per_cpu_save_state_size = 0x400

  613 13:48:38.746036  smm_load_module: num_cpus = 0x8

  614 13:48:38.752631  smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000

  615 13:48:38.756418  smm_load_module: total_save_state_size = 0x2000

  616 13:48:38.759549  smm_load_module: cpu0 entry: 7b9e6000

  617 13:48:38.766019  smm_create_map: cpus allowed in one segment 30

  618 13:48:38.769354  smm_create_map: min # of segments needed 1

  619 13:48:38.769783  CPU 0x0

  620 13:48:38.776116      smbase 7b9e6000  entry 7b9ee000

  621 13:48:38.779314             ss_start 7b9f5c00  code_end 7b9ee208

  622 13:48:38.779830  CPU 0x1

  623 13:48:38.782947      smbase 7b9e5c00  entry 7b9edc00

  624 13:48:38.789270             ss_start 7b9f5800  code_end 7b9ede08

  625 13:48:38.789762  CPU 0x2

  626 13:48:38.792755      smbase 7b9e5800  entry 7b9ed800

  627 13:48:38.799284             ss_start 7b9f5400  code_end 7b9eda08

  628 13:48:38.799780  CPU 0x3

  629 13:48:38.803007      smbase 7b9e5400  entry 7b9ed400

  630 13:48:38.805997             ss_start 7b9f5000  code_end 7b9ed608

  631 13:48:38.809130  CPU 0x4

  632 13:48:38.812882      smbase 7b9e5000  entry 7b9ed000

  633 13:48:38.816060             ss_start 7b9f4c00  code_end 7b9ed208

  634 13:48:38.816589  CPU 0x5

  635 13:48:38.819077      smbase 7b9e4c00  entry 7b9ecc00

  636 13:48:38.825741             ss_start 7b9f4800  code_end 7b9ece08

  637 13:48:38.826234  CPU 0x6

  638 13:48:38.829168      smbase 7b9e4800  entry 7b9ec800

  639 13:48:38.835763             ss_start 7b9f4400  code_end 7b9eca08

  640 13:48:38.836196  CPU 0x7

  641 13:48:38.839281      smbase 7b9e4400  entry 7b9ec400

  642 13:48:38.843037             ss_start 7b9f4000  code_end 7b9ec608

  643 13:48:38.852802  Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208

  644 13:48:38.856071  Processing 11 relocs. Offset value of 0x7b9ee000

  645 13:48:38.862521  smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000

  646 13:48:38.869330  SMM Module: placing smm entry code at 7b9edc00,  cpu # 0x1

  647 13:48:38.875774  smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes

  648 13:48:38.883074  SMM Module: placing smm entry code at 7b9ed800,  cpu # 0x2

  649 13:48:38.889333  smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes

  650 13:48:38.892924  SMM Module: placing smm entry code at 7b9ed400,  cpu # 0x3

  651 13:48:38.899295  smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes

  652 13:48:38.906050  SMM Module: placing smm entry code at 7b9ed000,  cpu # 0x4

  653 13:48:38.912507  smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes

  654 13:48:38.918973  SMM Module: placing smm entry code at 7b9ecc00,  cpu # 0x5

  655 13:48:38.925668  smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes

  656 13:48:38.932711  SMM Module: placing smm entry code at 7b9ec800,  cpu # 0x6

  657 13:48:38.939432  smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes

  658 13:48:38.945897  SMM Module: placing smm entry code at 7b9ec400,  cpu # 0x7

  659 13:48:38.952289  smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes

  660 13:48:38.955942  smm_module_setup_stub: stack_top = 0x7b804000

  661 13:48:38.958928  smm_module_setup_stub: per cpu stack_size = 0x800

  662 13:48:38.965488  smm_module_setup_stub: runtime.start32_offset = 0x4c

  663 13:48:38.972297  smm_module_setup_stub: runtime.smm_size = 0x200000

  664 13:48:38.975288  SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f

  665 13:48:38.980625  Clearing SMI status registers

  666 13:48:38.983788  SMI_STS: PM1 

  667 13:48:38.984215  PM1_STS: WAK PWRBTN 

  668 13:48:38.993853  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0

  669 13:48:38.997286  In relocation handler: CPU 0

  670 13:48:39.000877  New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000

  671 13:48:39.003923  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  672 13:48:39.007403  Relocation complete.

  673 13:48:39.014089  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6

  674 13:48:39.017523  In relocation handler: CPU 6

  675 13:48:39.020565  New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000

  676 13:48:39.024174  Relocation complete.

  677 13:48:39.030679  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1

  678 13:48:39.034067  In relocation handler: CPU 1

  679 13:48:39.037663  New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000

  680 13:48:39.043762  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  681 13:48:39.044254  Relocation complete.

  682 13:48:39.050604  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2

  683 13:48:39.053926  In relocation handler: CPU 2

  684 13:48:39.057529  New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000

  685 13:48:39.063656  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  686 13:48:39.066857  Relocation complete.

  687 13:48:39.073361  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3

  688 13:48:39.076918  In relocation handler: CPU 3

  689 13:48:39.080284  New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000

  690 13:48:39.083588  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  691 13:48:39.086788  Relocation complete.

  692 13:48:39.093967  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4

  693 13:48:39.097240  In relocation handler: CPU 4

  694 13:48:39.100565  New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000

  695 13:48:39.106930  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  696 13:48:39.107443  Relocation complete.

  697 13:48:39.117016  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7

  698 13:48:39.117568  In relocation handler: CPU 7

  699 13:48:39.124017  New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000

  700 13:48:39.127021  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  701 13:48:39.130318  Relocation complete.

  702 13:48:39.136927  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5

  703 13:48:39.140155  In relocation handler: CPU 5

  704 13:48:39.143529  New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000

  705 13:48:39.147078  Relocation complete.

  706 13:48:39.147584  Initializing CPU #0

  707 13:48:39.150135  CPU: vendor Intel device 906a4

  708 13:48:39.153443  CPU: family 06, model 9a, stepping 04

  709 13:48:39.156673  Clearing out pending MCEs

  710 13:48:39.159961  cpu: energy policy set to 7

  711 13:48:39.163140  Turbo is available but hidden

  712 13:48:39.166480  Turbo is available and visible

  713 13:48:39.169800  microcode: Update skipped, already up-to-date

  714 13:48:39.172991  CPU #0 initialized

  715 13:48:39.176406  Initializing CPU #6

  716 13:48:39.176835  Initializing CPU #3

  717 13:48:39.180037  Initializing CPU #2

  718 13:48:39.183132  CPU: vendor Intel device 906a4

  719 13:48:39.186321  CPU: family 06, model 9a, stepping 04

  720 13:48:39.189799  CPU: vendor Intel device 906a4

  721 13:48:39.193244  CPU: family 06, model 9a, stepping 04

  722 13:48:39.196625  Clearing out pending MCEs

  723 13:48:39.197233  Initializing CPU #1

  724 13:48:39.199517  Initializing CPU #4

  725 13:48:39.203272  cpu: energy policy set to 7

  726 13:48:39.206291  CPU: vendor Intel device 906a4

  727 13:48:39.209666  CPU: family 06, model 9a, stepping 04

  728 13:48:39.213257  CPU: vendor Intel device 906a4

  729 13:48:39.216459  CPU: family 06, model 9a, stepping 04

  730 13:48:39.219670  Clearing out pending MCEs

  731 13:48:39.222833  microcode: Update skipped, already up-to-date

  732 13:48:39.226526  CPU #3 initialized

  733 13:48:39.229670  cpu: energy policy set to 7

  734 13:48:39.230188  Clearing out pending MCEs

  735 13:48:39.232634  Clearing out pending MCEs

  736 13:48:39.239887  microcode: Update skipped, already up-to-date

  737 13:48:39.240420  CPU #4 initialized

  738 13:48:39.242871  cpu: energy policy set to 7

  739 13:48:39.246279  cpu: energy policy set to 7

  740 13:48:39.249681  microcode: Update skipped, already up-to-date

  741 13:48:39.253018  CPU #1 initialized

  742 13:48:39.256404  microcode: Update skipped, already up-to-date

  743 13:48:39.259635  CPU #2 initialized

  744 13:48:39.262592  CPU: vendor Intel device 906a4

  745 13:48:39.266065  CPU: family 06, model 9a, stepping 04

  746 13:48:39.269191  Initializing CPU #7

  747 13:48:39.269621  Clearing out pending MCEs

  748 13:48:39.272480  CPU: vendor Intel device 906a4

  749 13:48:39.279303  CPU: family 06, model 9a, stepping 04

  750 13:48:39.279847  Initializing CPU #5

  751 13:48:39.282612  Clearing out pending MCEs

  752 13:48:39.285850  CPU: vendor Intel device 906a4

  753 13:48:39.288974  CPU: family 06, model 9a, stepping 04

  754 13:48:39.292334  cpu: energy policy set to 7

  755 13:48:39.296418  Clearing out pending MCEs

  756 13:48:39.298776  microcode: Update skipped, already up-to-date

  757 13:48:39.302525  CPU #7 initialized

  758 13:48:39.303061  cpu: energy policy set to 7

  759 13:48:39.305488  cpu: energy policy set to 7

  760 13:48:39.312282  microcode: Update skipped, already up-to-date

  761 13:48:39.312822  CPU #5 initialized

  762 13:48:39.319080  microcode: Update skipped, already up-to-date

  763 13:48:39.319522  CPU #6 initialized

  764 13:48:39.325987  bsp_do_flight_plan done after 702 msecs.

  765 13:48:39.326523  CPU: frequency set to 4400 MHz

  766 13:48:39.329025  Enabling SMIs.

  767 13:48:39.335036  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms

  768 13:48:39.351391  Probing TPM I2C: done! DID_VID 0x00281ae0

  769 13:48:39.354719  Locality already claimed

  770 13:48:39.358432  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  771 13:48:39.369190  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  772 13:48:39.372434  Enabling GPIO PM b/c CR50 has long IRQ pulse support

  773 13:48:39.379585  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  774 13:48:39.386018  CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8

  775 13:48:39.389162  Found a VBT of 9216 bytes after decompression

  776 13:48:39.392853  PCI  1.0, PIN A, using IRQ #16

  777 13:48:39.396178  PCI  2.0, PIN A, using IRQ #17

  778 13:48:39.399347  PCI  4.0, PIN A, using IRQ #18

  779 13:48:39.402908  PCI  5.0, PIN A, using IRQ #16

  780 13:48:39.405925  PCI  6.0, PIN A, using IRQ #16

  781 13:48:39.409227  PCI  6.2, PIN C, using IRQ #18

  782 13:48:39.412507  PCI  7.0, PIN A, using IRQ #19

  783 13:48:39.416102  PCI  7.1, PIN B, using IRQ #20

  784 13:48:39.419191  PCI  7.2, PIN C, using IRQ #21

  785 13:48:39.422741  PCI  7.3, PIN D, using IRQ #22

  786 13:48:39.426089  PCI  8.0, PIN A, using IRQ #23

  787 13:48:39.429296  PCI  D.0, PIN A, using IRQ #17

  788 13:48:39.429741  PCI  D.1, PIN B, using IRQ #19

  789 13:48:39.432782  PCI 10.0, PIN A, using IRQ #24

  790 13:48:39.435781  PCI 10.1, PIN B, using IRQ #25

  791 13:48:39.439411  PCI 10.6, PIN C, using IRQ #20

  792 13:48:39.442950  PCI 10.7, PIN D, using IRQ #21

  793 13:48:39.445817  PCI 11.0, PIN A, using IRQ #26

  794 13:48:39.449432  PCI 11.1, PIN B, using IRQ #27

  795 13:48:39.452731  PCI 11.2, PIN C, using IRQ #28

  796 13:48:39.456151  PCI 11.3, PIN D, using IRQ #29

  797 13:48:39.459417  PCI 12.0, PIN A, using IRQ #30

  798 13:48:39.462410  PCI 12.6, PIN B, using IRQ #31

  799 13:48:39.465654  PCI 12.7, PIN C, using IRQ #22

  800 13:48:39.469234  PCI 13.0, PIN A, using IRQ #32

  801 13:48:39.472639  PCI 13.1, PIN B, using IRQ #33

  802 13:48:39.476299  PCI 13.2, PIN C, using IRQ #34

  803 13:48:39.479511  PCI 13.3, PIN D, using IRQ #35

  804 13:48:39.482709  PCI 14.0, PIN B, using IRQ #23

  805 13:48:39.483233  PCI 14.1, PIN A, using IRQ #36

  806 13:48:39.485806  PCI 14.3, PIN C, using IRQ #17

  807 13:48:39.489297  PCI 15.0, PIN A, using IRQ #37

  808 13:48:39.492899  PCI 15.1, PIN B, using IRQ #38

  809 13:48:39.496255  PCI 15.2, PIN C, using IRQ #39

  810 13:48:39.499126  PCI 15.3, PIN D, using IRQ #40

  811 13:48:39.502748  PCI 16.0, PIN A, using IRQ #18

  812 13:48:39.505780  PCI 16.1, PIN B, using IRQ #19

  813 13:48:39.509345  PCI 16.2, PIN C, using IRQ #20

  814 13:48:39.512440  PCI 16.3, PIN D, using IRQ #21

  815 13:48:39.515550  PCI 16.4, PIN A, using IRQ #18

  816 13:48:39.519019  PCI 16.5, PIN B, using IRQ #19

  817 13:48:39.522502  PCI 17.0, PIN A, using IRQ #22

  818 13:48:39.525631  PCI 19.0, PIN A, using IRQ #41

  819 13:48:39.529012  PCI 19.1, PIN B, using IRQ #42

  820 13:48:39.532353  PCI 19.2, PIN C, using IRQ #43

  821 13:48:39.532911  PCI 1C.0, PIN A, using IRQ #16

  822 13:48:39.535647  PCI 1C.1, PIN B, using IRQ #17

  823 13:48:39.539011  PCI 1C.2, PIN C, using IRQ #18

  824 13:48:39.542423  PCI 1C.3, PIN D, using IRQ #19

  825 13:48:39.545719  PCI 1C.4, PIN A, using IRQ #16

  826 13:48:39.549334  PCI 1C.5, PIN B, using IRQ #17

  827 13:48:39.552543  PCI 1C.6, PIN C, using IRQ #18

  828 13:48:39.556095  PCI 1C.7, PIN D, using IRQ #19

  829 13:48:39.559036  PCI 1D.0, PIN A, using IRQ #16

  830 13:48:39.562447  PCI 1D.1, PIN B, using IRQ #17

  831 13:48:39.565590  PCI 1D.2, PIN C, using IRQ #18

  832 13:48:39.568823  PCI 1D.3, PIN D, using IRQ #19

  833 13:48:39.572492  PCI 1E.0, PIN A, using IRQ #23

  834 13:48:39.576072  PCI 1E.1, PIN B, using IRQ #20

  835 13:48:39.578857  PCI 1E.2, PIN C, using IRQ #44

  836 13:48:39.582465  PCI 1E.3, PIN D, using IRQ #45

  837 13:48:39.582995  PCI 1F.3, PIN B, using IRQ #22

  838 13:48:39.585488  PCI 1F.4, PIN C, using IRQ #23

  839 13:48:39.589061  PCI 1F.6, PIN D, using IRQ #20

  840 13:48:39.592767  PCI 1F.7, PIN A, using IRQ #21

  841 13:48:39.599393  IRQ: Using dynamically assigned PCI IO-APIC IRQs

  842 13:48:39.605550  WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called

  843 13:48:39.788467  FSPS returned 0

  844 13:48:39.791847  Executing Phase 1 of FspMultiPhaseSiInit

  845 13:48:39.801649  FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  846 13:48:39.804842  port C0 DISC req: usage 1 usb3 1 usb2 1

  847 13:48:39.808431  Raw Buffer output 0 00000111

  848 13:48:39.812072  Raw Buffer output 1 00000000

  849 13:48:39.815282  pmc_send_ipc_cmd succeeded

  850 13:48:39.821677  port C1 DISC req: usage 1 usb3 3 usb2 3

  851 13:48:39.822219  Raw Buffer output 0 00000331

  852 13:48:39.825059  Raw Buffer output 1 00000000

  853 13:48:39.829418  pmc_send_ipc_cmd succeeded

  854 13:48:39.833054  Detected 6 core, 8 thread CPU.

  855 13:48:39.836242  Detected 6 core, 8 thread CPU.

  856 13:48:39.841350  Detected 6 core, 8 thread CPU.

  857 13:48:39.844675  Detected 6 core, 8 thread CPU.

  858 13:48:39.848270  Detected 6 core, 8 thread CPU.

  859 13:48:39.851828  Detected 6 core, 8 thread CPU.

  860 13:48:39.854868  Detected 6 core, 8 thread CPU.

  861 13:48:39.858142  Detected 6 core, 8 thread CPU.

  862 13:48:39.861684  Detected 6 core, 8 thread CPU.

  863 13:48:39.864976  Detected 6 core, 8 thread CPU.

  864 13:48:39.868074  Detected 6 core, 8 thread CPU.

  865 13:48:39.871427  Detected 6 core, 8 thread CPU.

  866 13:48:39.874776  Detected 6 core, 8 thread CPU.

  867 13:48:39.877953  Detected 6 core, 8 thread CPU.

  868 13:48:39.881587  Detected 6 core, 8 thread CPU.

  869 13:48:39.885063  Detected 6 core, 8 thread CPU.

  870 13:48:39.888413  Detected 6 core, 8 thread CPU.

  871 13:48:39.891617  Detected 6 core, 8 thread CPU.

  872 13:48:39.895164  Detected 6 core, 8 thread CPU.

  873 13:48:39.898057  Detected 6 core, 8 thread CPU.

  874 13:48:39.901762  Detected 6 core, 8 thread CPU.

  875 13:48:39.904787  Detected 6 core, 8 thread CPU.

  876 13:48:40.184780  Detected 6 core, 8 thread CPU.

  877 13:48:40.188035  Detected 6 core, 8 thread CPU.

  878 13:48:40.191275  Detected 6 core, 8 thread CPU.

  879 13:48:40.194463  Detected 6 core, 8 thread CPU.

  880 13:48:40.198084  Detected 6 core, 8 thread CPU.

  881 13:48:40.201039  Detected 6 core, 8 thread CPU.

  882 13:48:40.204560  Detected 6 core, 8 thread CPU.

  883 13:48:40.207696  Detected 6 core, 8 thread CPU.

  884 13:48:40.211195  Detected 6 core, 8 thread CPU.

  885 13:48:40.214767  Detected 6 core, 8 thread CPU.

  886 13:48:40.217592  Detected 6 core, 8 thread CPU.

  887 13:48:40.221554  Detected 6 core, 8 thread CPU.

  888 13:48:40.224558  Detected 6 core, 8 thread CPU.

  889 13:48:40.228132  Detected 6 core, 8 thread CPU.

  890 13:48:40.231527  Detected 6 core, 8 thread CPU.

  891 13:48:40.234581  Detected 6 core, 8 thread CPU.

  892 13:48:40.237546  Detected 6 core, 8 thread CPU.

  893 13:48:40.241303  Detected 6 core, 8 thread CPU.

  894 13:48:40.244000  Detected 6 core, 8 thread CPU.

  895 13:48:40.247593  Detected 6 core, 8 thread CPU.

  896 13:48:40.251160  Display FSP Version Info HOB

  897 13:48:40.253882  Reference Code - CPU = c.0.65.70

  898 13:48:40.254315  uCode Version = 0.0.4.23

  899 13:48:40.257579  TXT ACM version = ff.ff.ff.ffff

  900 13:48:40.261218  Reference Code - ME = c.0.65.70

  901 13:48:40.264278  MEBx version = 0.0.0.0

  902 13:48:40.267936  ME Firmware Version = Lite SKU

  903 13:48:40.270512  Reference Code - PCH = c.0.65.70

  904 13:48:40.274134  PCH-CRID Status = Disabled

  905 13:48:40.277219  PCH-CRID Original Value = ff.ff.ff.ffff

  906 13:48:40.280899  PCH-CRID New Value = ff.ff.ff.ffff

  907 13:48:40.284341  OPROM - RST - RAID = ff.ff.ff.ffff

  908 13:48:40.287664  PCH Hsio Version = 4.0.0.0

  909 13:48:40.290347  Reference Code - SA - System Agent = c.0.65.70

  910 13:48:40.293880  Reference Code - MRC = 0.0.3.80

  911 13:48:40.297280  SA - PCIe Version = c.0.65.70

  912 13:48:40.300854  SA-CRID Status = Disabled

  913 13:48:40.304236  SA-CRID Original Value = 0.0.0.4

  914 13:48:40.307040  SA-CRID New Value = 0.0.0.4

  915 13:48:40.310573  OPROM - VBIOS = ff.ff.ff.ffff

  916 13:48:40.313626  IO Manageability Engine FW Version = 24.0.4.0

  917 13:48:40.317269  PHY Build Version = 0.0.0.2016

  918 13:48:40.320798  Thunderbolt(TM) FW Version = 0.0.0.0

  919 13:48:40.327252  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  920 13:48:40.333809  BS: BS_DEV_INIT_CHIPS run times (exec / console): 484 / 507 ms

  921 13:48:40.337461  Enumerating buses...

  922 13:48:40.340296  Show all devs... Before device enumeration.

  923 13:48:40.343459  Root Device: enabled 1

  924 13:48:40.346776  CPU_CLUSTER: 0: enabled 1

  925 13:48:40.347197  DOMAIN: 0000: enabled 1

  926 13:48:40.350703  GPIO: 0: enabled 1

  927 13:48:40.353702  PCI: 00:00.0: enabled 1

  928 13:48:40.354234  PCI: 00:01.0: enabled 0

  929 13:48:40.357158  PCI: 00:01.1: enabled 0

  930 13:48:40.360012  PCI: 00:02.0: enabled 1

  931 13:48:40.363499  PCI: 00:04.0: enabled 1

  932 13:48:40.363922  PCI: 00:05.0: enabled 0

  933 13:48:40.366554  PCI: 00:06.0: enabled 1

  934 13:48:40.369868  PCI: 00:06.2: enabled 0

  935 13:48:40.373515  PCI: 00:07.0: enabled 0

  936 13:48:40.373939  PCI: 00:07.1: enabled 0

  937 13:48:40.376898  PCI: 00:07.2: enabled 0

  938 13:48:40.380434  PCI: 00:07.3: enabled 0

  939 13:48:40.380971  PCI: 00:08.0: enabled 0

  940 13:48:40.383926  PCI: 00:09.0: enabled 0

  941 13:48:40.387142  PCI: 00:0a.0: enabled 1

  942 13:48:40.390607  PCI: 00:0d.0: enabled 1

  943 13:48:40.391153  PCI: 00:0d.1: enabled 0

  944 13:48:40.393368  PCI: 00:0d.2: enabled 0

  945 13:48:40.397029  PCI: 00:0d.3: enabled 0

  946 13:48:40.400560  PCI: 00:0e.0: enabled 0

  947 13:48:40.401130  PCI: 00:10.0: enabled 0

  948 13:48:40.403825  PCI: 00:10.1: enabled 0

  949 13:48:40.407368  PCI: 00:10.6: enabled 0

  950 13:48:40.407902  PCI: 00:10.7: enabled 0

  951 13:48:40.410499  PCI: 00:12.0: enabled 0

  952 13:48:40.413495  PCI: 00:12.6: enabled 0

  953 13:48:40.417051  PCI: 00:12.7: enabled 0

  954 13:48:40.417644  PCI: 00:13.0: enabled 0

  955 13:48:40.420157  PCI: 00:14.0: enabled 1

  956 13:48:40.423513  PCI: 00:14.1: enabled 0

  957 13:48:40.426958  PCI: 00:14.2: enabled 1

  958 13:48:40.427380  PCI: 00:14.3: enabled 1

  959 13:48:40.430545  PCI: 00:15.0: enabled 1

  960 13:48:40.433583  PCI: 00:15.1: enabled 1

  961 13:48:40.437232  PCI: 00:15.2: enabled 0

  962 13:48:40.437685  PCI: 00:15.3: enabled 1

  963 13:48:40.440082  PCI: 00:16.0: enabled 1

  964 13:48:40.443512  PCI: 00:16.1: enabled 0

  965 13:48:40.444059  PCI: 00:16.2: enabled 0

  966 13:48:40.447115  PCI: 00:16.3: enabled 0

  967 13:48:40.450364  PCI: 00:16.4: enabled 0

  968 13:48:40.453853  PCI: 00:16.5: enabled 0

  969 13:48:40.454387  PCI: 00:17.0: enabled 1

  970 13:48:40.456854  PCI: 00:19.0: enabled 0

  971 13:48:40.460272  PCI: 00:19.1: enabled 1

  972 13:48:40.463871  PCI: 00:19.2: enabled 0

  973 13:48:40.464413  PCI: 00:1a.0: enabled 0

  974 13:48:40.466791  PCI: 00:1c.0: enabled 0

  975 13:48:40.469859  PCI: 00:1c.1: enabled 0

  976 13:48:40.473497  PCI: 00:1c.2: enabled 0

  977 13:48:40.473924  PCI: 00:1c.3: enabled 0

  978 13:48:40.476721  PCI: 00:1c.4: enabled 0

  979 13:48:40.480339  PCI: 00:1c.5: enabled 0

  980 13:48:40.483295  PCI: 00:1c.6: enabled 0

  981 13:48:40.483722  PCI: 00:1c.7: enabled 0

  982 13:48:40.486954  PCI: 00:1d.0: enabled 0

  983 13:48:40.490752  PCI: 00:1d.1: enabled 0

  984 13:48:40.491284  PCI: 00:1d.2: enabled 0

  985 13:48:40.493230  PCI: 00:1d.3: enabled 0

  986 13:48:40.496675  PCI: 00:1e.0: enabled 1

  987 13:48:40.500257  PCI: 00:1e.1: enabled 0

  988 13:48:40.500816  PCI: 00:1e.2: enabled 0

  989 13:48:40.503571  PCI: 00:1e.3: enabled 1

  990 13:48:40.506872  PCI: 00:1f.0: enabled 1

  991 13:48:40.509978  PCI: 00:1f.1: enabled 0

  992 13:48:40.510406  PCI: 00:1f.2: enabled 1

  993 13:48:40.513646  PCI: 00:1f.3: enabled 1

  994 13:48:40.517012  PCI: 00:1f.4: enabled 0

  995 13:48:40.520187  PCI: 00:1f.5: enabled 1

  996 13:48:40.520721  PCI: 00:1f.6: enabled 0

  997 13:48:40.523786  PCI: 00:1f.7: enabled 0

  998 13:48:40.526966  GENERIC: 0.0: enabled 1

  999 13:48:40.527501  GENERIC: 0.0: enabled 1

 1000 13:48:40.530052  GENERIC: 1.0: enabled 1

 1001 13:48:40.533518  GENERIC: 0.0: enabled 1

 1002 13:48:40.536686  GENERIC: 1.0: enabled 1

 1003 13:48:40.537260  USB0 port 0: enabled 1

 1004 13:48:40.540423  USB0 port 0: enabled 1

 1005 13:48:40.543843  GENERIC: 0.0: enabled 1

 1006 13:48:40.544388  I2C: 00:1a: enabled 1

 1007 13:48:40.546829  I2C: 00:31: enabled 1

 1008 13:48:40.550219  I2C: 00:32: enabled 1

 1009 13:48:40.553290  I2C: 00:50: enabled 1

 1010 13:48:40.553821  I2C: 00:10: enabled 1

 1011 13:48:40.556776  I2C: 00:15: enabled 1

 1012 13:48:40.559841  I2C: 00:2c: enabled 1

 1013 13:48:40.560347  GENERIC: 0.0: enabled 1

 1014 13:48:40.563307  SPI: 00: enabled 1

 1015 13:48:40.566467  PNP: 0c09.0: enabled 1

 1016 13:48:40.566887  GENERIC: 0.0: enabled 1

 1017 13:48:40.570070  USB3 port 0: enabled 1

 1018 13:48:40.573207  USB3 port 1: enabled 0

 1019 13:48:40.573654  USB3 port 2: enabled 1

 1020 13:48:40.576520  USB3 port 3: enabled 0

 1021 13:48:40.579943  USB2 port 0: enabled 1

 1022 13:48:40.583522  USB2 port 1: enabled 0

 1023 13:48:40.584046  USB2 port 2: enabled 1

 1024 13:48:40.586497  USB2 port 3: enabled 0

 1025 13:48:40.589819  USB2 port 4: enabled 0

 1026 13:48:40.590242  USB2 port 5: enabled 1

 1027 13:48:40.593152  USB2 port 6: enabled 0

 1028 13:48:40.596501  USB2 port 7: enabled 0

 1029 13:48:40.596921  USB2 port 8: enabled 1

 1030 13:48:40.600202  USB2 port 9: enabled 1

 1031 13:48:40.603236  USB3 port 0: enabled 1

 1032 13:48:40.606554  USB3 port 1: enabled 0

 1033 13:48:40.606992  USB3 port 2: enabled 0

 1034 13:48:40.609805  USB3 port 3: enabled 0

 1035 13:48:40.613159  GENERIC: 0.0: enabled 1

 1036 13:48:40.613619  GENERIC: 1.0: enabled 1

 1037 13:48:40.616793  APIC: 00: enabled 1

 1038 13:48:40.620166  APIC: 16: enabled 1

 1039 13:48:40.620685  APIC: 10: enabled 1

 1040 13:48:40.623233  APIC: 12: enabled 1

 1041 13:48:40.626566  APIC: 14: enabled 1

 1042 13:48:40.627117  APIC: 09: enabled 1

 1043 13:48:40.630020  APIC: 01: enabled 1

 1044 13:48:40.630543  APIC: 08: enabled 1

 1045 13:48:40.633449  Compare with tree...

 1046 13:48:40.636756  Root Device: enabled 1

 1047 13:48:40.639901   CPU_CLUSTER: 0: enabled 1

 1048 13:48:40.640445    APIC: 00: enabled 1

 1049 13:48:40.643317    APIC: 16: enabled 1

 1050 13:48:40.646318    APIC: 10: enabled 1

 1051 13:48:40.646788    APIC: 12: enabled 1

 1052 13:48:40.650016    APIC: 14: enabled 1

 1053 13:48:40.653094    APIC: 09: enabled 1

 1054 13:48:40.653557    APIC: 01: enabled 1

 1055 13:48:40.656523    APIC: 08: enabled 1

 1056 13:48:40.660110   DOMAIN: 0000: enabled 1

 1057 13:48:40.660639    GPIO: 0: enabled 1

 1058 13:48:40.663374    PCI: 00:00.0: enabled 1

 1059 13:48:40.666488    PCI: 00:01.0: enabled 0

 1060 13:48:40.669880    PCI: 00:01.1: enabled 0

 1061 13:48:40.673202    PCI: 00:02.0: enabled 1

 1062 13:48:40.673630    PCI: 00:04.0: enabled 1

 1063 13:48:40.676146     GENERIC: 0.0: enabled 1

 1064 13:48:40.679769    PCI: 00:05.0: enabled 0

 1065 13:48:40.683419    PCI: 00:06.0: enabled 1

 1066 13:48:40.686161    PCI: 00:06.2: enabled 0

 1067 13:48:40.686609    PCI: 00:08.0: enabled 0

 1068 13:48:40.689763    PCI: 00:09.0: enabled 0

 1069 13:48:40.692860    PCI: 00:0a.0: enabled 1

 1070 13:48:40.696226    PCI: 00:0d.0: enabled 1

 1071 13:48:40.699988     USB0 port 0: enabled 1

 1072 13:48:40.700517      USB3 port 0: enabled 1

 1073 13:48:40.703372      USB3 port 1: enabled 0

 1074 13:48:40.706813      USB3 port 2: enabled 1

 1075 13:48:40.709459      USB3 port 3: enabled 0

 1076 13:48:40.712856    PCI: 00:0d.1: enabled 0

 1077 13:48:40.713461    PCI: 00:0d.2: enabled 0

 1078 13:48:40.716458    PCI: 00:0d.3: enabled 0

 1079 13:48:40.719791    PCI: 00:0e.0: enabled 0

 1080 13:48:40.722996    PCI: 00:10.0: enabled 0

 1081 13:48:40.726494    PCI: 00:10.1: enabled 0

 1082 13:48:40.727020    PCI: 00:10.6: enabled 0

 1083 13:48:40.729640    PCI: 00:10.7: enabled 0

 1084 13:48:40.732837    PCI: 00:12.0: enabled 0

 1085 13:48:40.736362    PCI: 00:12.6: enabled 0

 1086 13:48:40.739393    PCI: 00:12.7: enabled 0

 1087 13:48:40.739832    PCI: 00:13.0: enabled 0

 1088 13:48:40.742885    PCI: 00:14.0: enabled 1

 1089 13:48:40.746017     USB0 port 0: enabled 1

 1090 13:48:40.749283      USB2 port 0: enabled 1

 1091 13:48:40.753400      USB2 port 1: enabled 0

 1092 13:48:40.753818      USB2 port 2: enabled 1

 1093 13:48:40.756162      USB2 port 3: enabled 0

 1094 13:48:40.759739      USB2 port 4: enabled 0

 1095 13:48:40.763099      USB2 port 5: enabled 1

 1096 13:48:40.765956      USB2 port 6: enabled 0

 1097 13:48:40.769262      USB2 port 7: enabled 0

 1098 13:48:40.769682      USB2 port 8: enabled 1

 1099 13:48:40.772450      USB2 port 9: enabled 1

 1100 13:48:40.776008      USB3 port 0: enabled 1

 1101 13:48:40.779589      USB3 port 1: enabled 0

 1102 13:48:40.783076      USB3 port 2: enabled 0

 1103 13:48:40.783600      USB3 port 3: enabled 0

 1104 13:48:40.785842    PCI: 00:14.1: enabled 0

 1105 13:48:40.789683    PCI: 00:14.2: enabled 1

 1106 13:48:40.792595    PCI: 00:14.3: enabled 1

 1107 13:48:40.796686     GENERIC: 0.0: enabled 1

 1108 13:48:40.797245    PCI: 00:15.0: enabled 1

 1109 13:48:40.799435     I2C: 00:1a: enabled 1

 1110 13:48:40.802887     I2C: 00:31: enabled 1

 1111 13:48:40.805602     I2C: 00:32: enabled 1

 1112 13:48:40.809283    PCI: 00:15.1: enabled 1

 1113 13:48:40.809702     I2C: 00:50: enabled 1

 1114 13:48:40.812674    PCI: 00:15.2: enabled 0

 1115 13:48:40.816219    PCI: 00:15.3: enabled 1

 1116 13:48:40.819457     I2C: 00:10: enabled 1

 1117 13:48:40.819986    PCI: 00:16.0: enabled 1

 1118 13:48:40.822803    PCI: 00:16.1: enabled 0

 1119 13:48:40.825926    PCI: 00:16.2: enabled 0

 1120 13:48:40.829824    PCI: 00:16.3: enabled 0

 1121 13:48:40.832566    PCI: 00:16.4: enabled 0

 1122 13:48:40.833086    PCI: 00:16.5: enabled 0

 1123 13:48:40.836029    PCI: 00:17.0: enabled 1

 1124 13:48:40.839150    PCI: 00:19.0: enabled 0

 1125 13:48:40.842946    PCI: 00:19.1: enabled 1

 1126 13:48:40.845710     I2C: 00:15: enabled 1

 1127 13:48:40.846203     I2C: 00:2c: enabled 1

 1128 13:48:40.849243    PCI: 00:19.2: enabled 0

 1129 13:48:40.852529    PCI: 00:1a.0: enabled 0

 1130 13:48:40.856157    PCI: 00:1e.0: enabled 1

 1131 13:48:40.856686    PCI: 00:1e.1: enabled 0

 1132 13:48:40.859817    PCI: 00:1e.2: enabled 0

 1133 13:48:40.862634    PCI: 00:1e.3: enabled 1

 1134 13:48:40.865776     SPI: 00: enabled 1

 1135 13:48:40.869168    PCI: 00:1f.0: enabled 1

 1136 13:48:40.869589     PNP: 0c09.0: enabled 1

 1137 13:48:40.872814    PCI: 00:1f.1: enabled 0

 1138 13:48:40.876062    PCI: 00:1f.2: enabled 1

 1139 13:48:40.879197     GENERIC: 0.0: enabled 1

 1140 13:48:40.882647      GENERIC: 0.0: enabled 1

 1141 13:48:40.883173      GENERIC: 1.0: enabled 1

 1142 13:48:40.885872    PCI: 00:1f.3: enabled 1

 1143 13:48:40.889020    PCI: 00:1f.4: enabled 0

 1144 13:48:40.892435    PCI: 00:1f.5: enabled 1

 1145 13:48:40.896014    PCI: 00:1f.6: enabled 0

 1146 13:48:40.896435    PCI: 00:1f.7: enabled 0

 1147 13:48:40.899423  Root Device scanning...

 1148 13:48:40.902881  scan_static_bus for Root Device

 1149 13:48:40.905832  CPU_CLUSTER: 0 enabled

 1150 13:48:40.906245  DOMAIN: 0000 enabled

 1151 13:48:40.909088  DOMAIN: 0000 scanning...

 1152 13:48:40.912637  PCI: pci_scan_bus for bus 00

 1153 13:48:40.916171  PCI: 00:00.0 [8086/0000] ops

 1154 13:48:40.918989  PCI: 00:00.0 [8086/4609] enabled

 1155 13:48:40.922654  PCI: 00:02.0 [8086/0000] bus ops

 1156 13:48:40.925922  PCI: 00:02.0 [8086/46b3] enabled

 1157 13:48:40.928949  PCI: 00:04.0 [8086/0000] bus ops

 1158 13:48:40.932990  PCI: 00:04.0 [8086/461d] enabled

 1159 13:48:40.935792  PCI: 00:06.0 [8086/0000] bus ops

 1160 13:48:40.939338  PCI: 00:06.0 [8086/464d] enabled

 1161 13:48:40.942639  PCI: 00:08.0 [8086/464f] disabled

 1162 13:48:40.945667  PCI: 00:0a.0 [8086/467d] enabled

 1163 13:48:40.949310  PCI: 00:0d.0 [8086/0000] bus ops

 1164 13:48:40.952840  PCI: 00:0d.0 [8086/461e] enabled

 1165 13:48:40.955821  PCI: 00:14.0 [8086/0000] bus ops

 1166 13:48:40.959381  PCI: 00:14.0 [8086/51ed] enabled

 1167 13:48:40.962428  PCI: 00:14.2 [8086/51ef] enabled

 1168 13:48:40.965728  PCI: 00:14.3 [8086/0000] bus ops

 1169 13:48:40.968982  PCI: 00:14.3 [8086/51f0] enabled

 1170 13:48:40.972360  PCI: 00:15.0 [8086/0000] bus ops

 1171 13:48:40.975698  PCI: 00:15.0 [8086/51e8] enabled

 1172 13:48:40.978945  PCI: 00:15.1 [8086/0000] bus ops

 1173 13:48:40.982896  PCI: 00:15.1 [8086/51e9] enabled

 1174 13:48:40.985737  PCI: 00:15.2 [8086/0000] bus ops

 1175 13:48:40.989446  PCI: 00:15.2 [8086/51ea] disabled

 1176 13:48:40.992724  PCI: 00:15.3 [8086/0000] bus ops

 1177 13:48:40.996042  PCI: 00:15.3 [8086/51eb] enabled

 1178 13:48:40.999638  PCI: 00:16.0 [8086/0000] ops

 1179 13:48:41.002857  PCI: 00:16.0 [8086/51e0] enabled

 1180 13:48:41.009432  PCI: Static device PCI: 00:17.0 not found, disabling it.

 1181 13:48:41.012977  PCI: 00:19.0 [8086/0000] bus ops

 1182 13:48:41.016489  PCI: 00:19.0 [8086/51c5] disabled

 1183 13:48:41.019390  PCI: 00:19.1 [8086/0000] bus ops

 1184 13:48:41.022913  PCI: 00:19.1 [8086/51c6] enabled

 1185 13:48:41.026206  PCI: 00:1e.0 [8086/0000] ops

 1186 13:48:41.029615  PCI: 00:1e.0 [8086/51a8] enabled

 1187 13:48:41.032657  PCI: 00:1e.3 [8086/0000] bus ops

 1188 13:48:41.036022  PCI: 00:1e.3 [8086/51ab] enabled

 1189 13:48:41.039464  PCI: 00:1f.0 [8086/0000] bus ops

 1190 13:48:41.042783  PCI: 00:1f.0 [8086/5182] enabled

 1191 13:48:41.043313  RTC Init

 1192 13:48:41.049813  Set power on after power failure.

 1193 13:48:41.050337  Disabling Deep S3

 1194 13:48:41.052856  Disabling Deep S3

 1195 13:48:41.053418  Disabling Deep S4

 1196 13:48:41.056119  Disabling Deep S4

 1197 13:48:41.056533  Disabling Deep S5

 1198 13:48:41.059810  Disabling Deep S5

 1199 13:48:41.062717  PCI: 00:1f.2 [0000/0000] hidden

 1200 13:48:41.066669  PCI: 00:1f.3 [8086/0000] bus ops

 1201 13:48:41.069634  PCI: 00:1f.3 [8086/51c8] enabled

 1202 13:48:41.072957  PCI: 00:1f.5 [8086/0000] bus ops

 1203 13:48:41.076266  PCI: 00:1f.5 [8086/51a4] enabled

 1204 13:48:41.076797  GPIO: 0 enabled

 1205 13:48:41.079792  PCI: Leftover static devices:

 1206 13:48:41.083247  PCI: 00:01.0

 1207 13:48:41.083804  PCI: 00:01.1

 1208 13:48:41.086126  PCI: 00:05.0

 1209 13:48:41.086548  PCI: 00:06.2

 1210 13:48:41.086878  PCI: 00:09.0

 1211 13:48:41.089717  PCI: 00:0d.1

 1212 13:48:41.090235  PCI: 00:0d.2

 1213 13:48:41.092856  PCI: 00:0d.3

 1214 13:48:41.093329  PCI: 00:0e.0

 1215 13:48:41.093669  PCI: 00:10.0

 1216 13:48:41.096050  PCI: 00:10.1

 1217 13:48:41.096469  PCI: 00:10.6

 1218 13:48:41.099536  PCI: 00:10.7

 1219 13:48:41.099956  PCI: 00:12.0

 1220 13:48:41.100287  PCI: 00:12.6

 1221 13:48:41.103176  PCI: 00:12.7

 1222 13:48:41.103698  PCI: 00:13.0

 1223 13:48:41.106404  PCI: 00:14.1

 1224 13:48:41.106917  PCI: 00:16.1

 1225 13:48:41.109591  PCI: 00:16.2

 1226 13:48:41.110010  PCI: 00:16.3

 1227 13:48:41.110340  PCI: 00:16.4

 1228 13:48:41.113427  PCI: 00:16.5

 1229 13:48:41.113944  PCI: 00:17.0

 1230 13:48:41.116166  PCI: 00:19.2

 1231 13:48:41.116586  PCI: 00:1a.0

 1232 13:48:41.116930  PCI: 00:1e.1

 1233 13:48:41.119837  PCI: 00:1e.2

 1234 13:48:41.120361  PCI: 00:1f.1

 1235 13:48:41.123260  PCI: 00:1f.4

 1236 13:48:41.123778  PCI: 00:1f.6

 1237 13:48:41.124114  PCI: 00:1f.7

 1238 13:48:41.126527  PCI: Check your devicetree.cb.

 1239 13:48:41.129761  PCI: 00:02.0 scanning...

 1240 13:48:41.132751  scan_generic_bus for PCI: 00:02.0

 1241 13:48:41.136512  scan_generic_bus for PCI: 00:02.0 done

 1242 13:48:41.143019  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

 1243 13:48:41.146158  PCI: 00:04.0 scanning...

 1244 13:48:41.149893  scan_generic_bus for PCI: 00:04.0

 1245 13:48:41.150527  GENERIC: 0.0 enabled

 1246 13:48:41.156172  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

 1247 13:48:41.159744  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

 1248 13:48:41.162751  PCI: 00:06.0 scanning...

 1249 13:48:41.166513  do_pci_scan_bridge for PCI: 00:06.0

 1250 13:48:41.169680  PCI: pci_scan_bus for bus 01

 1251 13:48:41.172966  PCI: 01:00.0 [15b7/5009] enabled

 1252 13:48:41.176476  Enabling Common Clock Configuration

 1253 13:48:41.179966  L1 Sub-State supported from root port 6

 1254 13:48:41.183283  L1 Sub-State Support = 0x5

 1255 13:48:41.186617  CommonModeRestoreTime = 0x6e

 1256 13:48:41.189637  Power On Value = 0x5, Power On Scale = 0x2

 1257 13:48:41.193007  ASPM: Enabled L1

 1258 13:48:41.196391  PCIe: Max_Payload_Size adjusted to 256

 1259 13:48:41.199808  PCI: 01:00.0: Enabled LTR

 1260 13:48:41.203116  PCI: 01:00.0: Programmed LTR max latencies

 1261 13:48:41.209839  scan_bus: bus PCI: 00:06.0 finished in 40 msecs

 1262 13:48:41.210396  PCI: 00:0d.0 scanning...

 1263 13:48:41.213350  scan_static_bus for PCI: 00:0d.0

 1264 13:48:41.216629  USB0 port 0 enabled

 1265 13:48:41.219879  USB0 port 0 scanning...

 1266 13:48:41.223234  scan_static_bus for USB0 port 0

 1267 13:48:41.223746  USB3 port 0 enabled

 1268 13:48:41.226439  USB3 port 1 disabled

 1269 13:48:41.229785  USB3 port 2 enabled

 1270 13:48:41.230417  USB3 port 3 disabled

 1271 13:48:41.232835  USB3 port 0 scanning...

 1272 13:48:41.236206  scan_static_bus for USB3 port 0

 1273 13:48:41.239524  scan_static_bus for USB3 port 0 done

 1274 13:48:41.246332  scan_bus: bus USB3 port 0 finished in 6 msecs

 1275 13:48:41.247005  USB3 port 2 scanning...

 1276 13:48:41.249471  scan_static_bus for USB3 port 2

 1277 13:48:41.253223  scan_static_bus for USB3 port 2 done

 1278 13:48:41.259863  scan_bus: bus USB3 port 2 finished in 6 msecs

 1279 13:48:41.262705  scan_static_bus for USB0 port 0 done

 1280 13:48:41.265982  scan_bus: bus USB0 port 0 finished in 43 msecs

 1281 13:48:41.269483  scan_static_bus for PCI: 00:0d.0 done

 1282 13:48:41.276294  scan_bus: bus PCI: 00:0d.0 finished in 59 msecs

 1283 13:48:41.279509  PCI: 00:14.0 scanning...

 1284 13:48:41.282828  scan_static_bus for PCI: 00:14.0

 1285 13:48:41.283259  USB0 port 0 enabled

 1286 13:48:41.286133  USB0 port 0 scanning...

 1287 13:48:41.289450  scan_static_bus for USB0 port 0

 1288 13:48:41.292581  USB2 port 0 enabled

 1289 13:48:41.292999  USB2 port 1 disabled

 1290 13:48:41.296362  USB2 port 2 enabled

 1291 13:48:41.296888  USB2 port 3 disabled

 1292 13:48:41.299850  USB2 port 4 disabled

 1293 13:48:41.302812  USB2 port 5 enabled

 1294 13:48:41.303337  USB2 port 6 disabled

 1295 13:48:41.306186  USB2 port 7 disabled

 1296 13:48:41.309442  USB2 port 8 enabled

 1297 13:48:41.309875  USB2 port 9 enabled

 1298 13:48:41.313084  USB3 port 0 enabled

 1299 13:48:41.313658  USB3 port 1 disabled

 1300 13:48:41.316152  USB3 port 2 disabled

 1301 13:48:41.319213  USB3 port 3 disabled

 1302 13:48:41.323034  USB2 port 0 scanning...

 1303 13:48:41.323553  scan_static_bus for USB2 port 0

 1304 13:48:41.330059  scan_static_bus for USB2 port 0 done

 1305 13:48:41.332604  scan_bus: bus USB2 port 0 finished in 6 msecs

 1306 13:48:41.336342  USB2 port 2 scanning...

 1307 13:48:41.339292  scan_static_bus for USB2 port 2

 1308 13:48:41.342908  scan_static_bus for USB2 port 2 done

 1309 13:48:41.345960  scan_bus: bus USB2 port 2 finished in 6 msecs

 1310 13:48:41.349552  USB2 port 5 scanning...

 1311 13:48:41.352569  scan_static_bus for USB2 port 5

 1312 13:48:41.356235  scan_static_bus for USB2 port 5 done

 1313 13:48:41.359543  scan_bus: bus USB2 port 5 finished in 6 msecs

 1314 13:48:41.362730  USB2 port 8 scanning...

 1315 13:48:41.365853  scan_static_bus for USB2 port 8

 1316 13:48:41.369173  scan_static_bus for USB2 port 8 done

 1317 13:48:41.376046  scan_bus: bus USB2 port 8 finished in 6 msecs

 1318 13:48:41.376536  USB2 port 9 scanning...

 1319 13:48:41.379242  scan_static_bus for USB2 port 9

 1320 13:48:41.382661  scan_static_bus for USB2 port 9 done

 1321 13:48:41.389533  scan_bus: bus USB2 port 9 finished in 6 msecs

 1322 13:48:41.390060  USB3 port 0 scanning...

 1323 13:48:41.392730  scan_static_bus for USB3 port 0

 1324 13:48:41.399420  scan_static_bus for USB3 port 0 done

 1325 13:48:41.402743  scan_bus: bus USB3 port 0 finished in 6 msecs

 1326 13:48:41.406197  scan_static_bus for USB0 port 0 done

 1327 13:48:41.409367  scan_bus: bus USB0 port 0 finished in 120 msecs

 1328 13:48:41.416261  scan_static_bus for PCI: 00:14.0 done

 1329 13:48:41.419575  scan_bus: bus PCI: 00:14.0 finished in 136 msecs

 1330 13:48:41.422682  PCI: 00:14.3 scanning...

 1331 13:48:41.426423  scan_static_bus for PCI: 00:14.3

 1332 13:48:41.426936  GENERIC: 0.0 enabled

 1333 13:48:41.432949  scan_static_bus for PCI: 00:14.3 done

 1334 13:48:41.436169  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1335 13:48:41.439601  PCI: 00:15.0 scanning...

 1336 13:48:41.442775  scan_static_bus for PCI: 00:15.0

 1337 13:48:41.443300  I2C: 00:1a enabled

 1338 13:48:41.445995  I2C: 00:31 enabled

 1339 13:48:41.449655  I2C: 00:32 enabled

 1340 13:48:41.452902  scan_static_bus for PCI: 00:15.0 done

 1341 13:48:41.456332  scan_bus: bus PCI: 00:15.0 finished in 13 msecs

 1342 13:48:41.459569  PCI: 00:15.1 scanning...

 1343 13:48:41.462751  scan_static_bus for PCI: 00:15.1

 1344 13:48:41.466440  I2C: 00:50 enabled

 1345 13:48:41.469247  scan_static_bus for PCI: 00:15.1 done

 1346 13:48:41.472700  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1347 13:48:41.476125  PCI: 00:15.3 scanning...

 1348 13:48:41.479102  scan_static_bus for PCI: 00:15.3

 1349 13:48:41.479531  I2C: 00:10 enabled

 1350 13:48:41.486199  scan_static_bus for PCI: 00:15.3 done

 1351 13:48:41.489584  scan_bus: bus PCI: 00:15.3 finished in 9 msecs

 1352 13:48:41.492790  PCI: 00:19.1 scanning...

 1353 13:48:41.496436  scan_static_bus for PCI: 00:19.1

 1354 13:48:41.496967  I2C: 00:15 enabled

 1355 13:48:41.499642  I2C: 00:2c enabled

 1356 13:48:41.503018  scan_static_bus for PCI: 00:19.1 done

 1357 13:48:41.505926  scan_bus: bus PCI: 00:19.1 finished in 11 msecs

 1358 13:48:41.509531  PCI: 00:1e.3 scanning...

 1359 13:48:41.512661  scan_generic_bus for PCI: 00:1e.3

 1360 13:48:41.516341  SPI: 00 enabled

 1361 13:48:41.522709  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1362 13:48:41.525588  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1363 13:48:41.528825  PCI: 00:1f.0 scanning...

 1364 13:48:41.532062  scan_static_bus for PCI: 00:1f.0

 1365 13:48:41.532574  PNP: 0c09.0 enabled

 1366 13:48:41.535453  PNP: 0c09.0 scanning...

 1367 13:48:41.538775  scan_static_bus for PNP: 0c09.0

 1368 13:48:41.542341  scan_static_bus for PNP: 0c09.0 done

 1369 13:48:41.548570  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1370 13:48:41.552372  scan_static_bus for PCI: 00:1f.0 done

 1371 13:48:41.555713  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1372 13:48:41.558674  PCI: 00:1f.2 scanning...

 1373 13:48:41.561672  scan_static_bus for PCI: 00:1f.2

 1374 13:48:41.565140  GENERIC: 0.0 enabled

 1375 13:48:41.565322  GENERIC: 0.0 scanning...

 1376 13:48:41.568626  scan_static_bus for GENERIC: 0.0

 1377 13:48:41.571530  GENERIC: 0.0 enabled

 1378 13:48:41.575166  GENERIC: 1.0 enabled

 1379 13:48:41.578445  scan_static_bus for GENERIC: 0.0 done

 1380 13:48:41.581645  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1381 13:48:41.588474  scan_static_bus for PCI: 00:1f.2 done

 1382 13:48:41.592194  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1383 13:48:41.594820  PCI: 00:1f.3 scanning...

 1384 13:48:41.598206  scan_static_bus for PCI: 00:1f.3

 1385 13:48:41.601856  scan_static_bus for PCI: 00:1f.3 done

 1386 13:48:41.605509  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1387 13:48:41.608395  PCI: 00:1f.5 scanning...

 1388 13:48:41.611937  scan_generic_bus for PCI: 00:1f.5

 1389 13:48:41.615507  scan_generic_bus for PCI: 00:1f.5 done

 1390 13:48:41.621812  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1391 13:48:41.625236  scan_bus: bus DOMAIN: 0000 finished in 710 msecs

 1392 13:48:41.628744  scan_static_bus for Root Device done

 1393 13:48:41.635489  scan_bus: bus Root Device finished in 729 msecs

 1394 13:48:41.636014  done

 1395 13:48:41.641493  BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms

 1396 13:48:41.645241  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)

 1397 13:48:41.651823  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1398 13:48:41.655267  SPI flash protection: WPSW=0 SRP0=0

 1399 13:48:41.661281  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1400 13:48:41.668353  BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms

 1401 13:48:41.668942  found VGA at PCI: 00:02.0

 1402 13:48:41.671654  Setting up VGA for PCI: 00:02.0

 1403 13:48:41.678337  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1404 13:48:41.681204  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1405 13:48:41.684910  Allocating resources...

 1406 13:48:41.688119  Reading resources...

 1407 13:48:41.691173  Root Device read_resources bus 0 link: 0

 1408 13:48:41.694745  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1409 13:48:41.701447  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1410 13:48:41.704705  DOMAIN: 0000 read_resources bus 0 link: 0

 1411 13:48:41.711423  SA MMIO resource: MCHBAR ->  base = 0xfedc0000, size = 0x20000

 1412 13:48:41.717767  SA MMIO resource: DMIBAR ->  base = 0xfeda0000, size = 0x1000

 1413 13:48:41.724580  SA MMIO resource: EPBAR ->  base = 0xfeda1000, size = 0x1000

 1414 13:48:41.731075  SA MMIO resource: REGBAR ->  base = 0xfb000000, size = 0x1000

 1415 13:48:41.737704  SA MMIO resource: EDRAMBAR ->  base = 0xfed80000, size = 0x4000

 1416 13:48:41.744221  SA MMIO resource: CRAB_ABORT ->  base = 0xfeb00000, size = 0x80000

 1417 13:48:41.747730  SA MMIO resource: TPM ->  base = 0xfed40000, size = 0x10000

 1418 13:48:41.754248  SA MMIO resource: LT_SECURITY ->  base = 0xfed50000, size = 0x20000

 1419 13:48:41.760750  SA MMIO resource: APIC ->  base = 0xfec00000, size = 0x100000

 1420 13:48:41.767221  SA MMIO resource: PCH_RESERVED ->  base = 0xfc800000, size = 0x2000000

 1421 13:48:41.774035  SA MMIO resource: GFXVTBAR ->  base = 0xfed90000, size = 0x1000

 1422 13:48:41.780467  SA MMIO resource: IPUVTBAR ->  base = 0xfed92000, size = 0x1000

 1423 13:48:41.787786  SA MMIO resource: TBT0BAR ->  base = 0xfed84000, size = 0x1000

 1424 13:48:41.793577  SA MMIO resource: TBT1BAR ->  base = 0xfed85000, size = 0x1000

 1425 13:48:41.800429  SA MMIO resource: TBT2BAR ->  base = 0xfed86000, size = 0x1000

 1426 13:48:41.806793  SA MMIO resource: TBT3BAR ->  base = 0xfed87000, size = 0x1000

 1427 13:48:41.813595  SA MMIO resource: VTVC0BAR ->  base = 0xfed91000, size = 0x1000

 1428 13:48:41.820250  SA MMIO resource: MMCONF ->  base = 0xc0000000, size = 0x10000000

 1429 13:48:41.827054  SA MMIO resource: DSM ->  base = 0x7c800000, size = 0x3c00000

 1430 13:48:41.830314  SA MMIO resource: TSEG ->  base = 0x7b800000, size = 0x800000

 1431 13:48:41.836934  SA MMIO resource: GSM ->  base = 0x7c000000, size = 0x800000

 1432 13:48:41.840293  PCI: 00:04.0 read_resources bus 1 link: 0

 1433 13:48:41.846863  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1434 13:48:41.849992  PCI: 00:06.0 read_resources bus 1 link: 0

 1435 13:48:41.857001  PCI: 00:06.0 read_resources bus 1 link: 0 done

 1436 13:48:41.859949  PCI: 00:0d.0 read_resources bus 0 link: 0

 1437 13:48:41.863495  USB0 port 0 read_resources bus 0 link: 0

 1438 13:48:41.866749  USB0 port 0 read_resources bus 0 link: 0 done

 1439 13:48:41.873224  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1440 13:48:41.876686  PCI: 00:14.0 read_resources bus 0 link: 0

 1441 13:48:41.879914  USB0 port 0 read_resources bus 0 link: 0

 1442 13:48:41.887009  USB0 port 0 read_resources bus 0 link: 0 done

 1443 13:48:41.890084  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1444 13:48:41.896782  PCI: 00:14.3 read_resources bus 0 link: 0

 1445 13:48:41.900243  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1446 13:48:41.903343  PCI: 00:15.0 read_resources bus 0 link: 0

 1447 13:48:41.910012  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1448 13:48:41.913429  PCI: 00:15.1 read_resources bus 0 link: 0

 1449 13:48:41.916689  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1450 13:48:41.923278  PCI: 00:15.3 read_resources bus 0 link: 0

 1451 13:48:41.926731  PCI: 00:15.3 read_resources bus 0 link: 0 done

 1452 13:48:41.930018  PCI: 00:19.1 read_resources bus 0 link: 0

 1453 13:48:41.936827  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1454 13:48:41.939930  PCI: 00:1e.3 read_resources bus 2 link: 0

 1455 13:48:41.946569  PCI: 00:1e.3 read_resources bus 2 link: 0 done

 1456 13:48:41.949758  PCI: 00:1f.0 read_resources bus 0 link: 0

 1457 13:48:41.953253  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1458 13:48:41.956772  PCI: 00:1f.2 read_resources bus 0 link: 0

 1459 13:48:41.963287  GENERIC: 0.0 read_resources bus 0 link: 0

 1460 13:48:41.966871  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1461 13:48:41.973060  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1462 13:48:41.976345  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1463 13:48:41.983101  Root Device read_resources bus 0 link: 0 done

 1464 13:48:41.983515  Done reading resources.

 1465 13:48:41.989643  Show resources in subtree (Root Device)...After reading.

 1466 13:48:41.993024   Root Device child on link 0 CPU_CLUSTER: 0

 1467 13:48:41.999836    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1468 13:48:42.000316     APIC: 00

 1469 13:48:42.000649     APIC: 16

 1470 13:48:42.002927     APIC: 10

 1471 13:48:42.003344     APIC: 12

 1472 13:48:42.003671     APIC: 14

 1473 13:48:42.006270     APIC: 09

 1474 13:48:42.006685     APIC: 01

 1475 13:48:42.009847     APIC: 08

 1476 13:48:42.013085    DOMAIN: 0000 child on link 0 GPIO: 0

 1477 13:48:42.023226    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1478 13:48:42.033229    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1479 13:48:42.033726     GPIO: 0

 1480 13:48:42.034059     PCI: 00:00.0

 1481 13:48:42.042983     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1482 13:48:42.053157     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1483 13:48:42.063092     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1484 13:48:42.073230     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1485 13:48:42.079704     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1486 13:48:42.089556     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1487 13:48:42.099637     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1488 13:48:42.109721     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1489 13:48:42.119665     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1490 13:48:42.129649     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1491 13:48:42.139525     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1492 13:48:42.146042     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1493 13:48:42.155977     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1494 13:48:42.165872     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1495 13:48:42.176057     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1496 13:48:42.186050     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1497 13:48:42.192854     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1498 13:48:42.202870     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1499 13:48:42.212832     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1500 13:48:42.223166     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1501 13:48:42.232722     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1502 13:48:42.242847     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1503 13:48:42.252785     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1504 13:48:42.262653     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1505 13:48:42.272764     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1506 13:48:42.279232     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1507 13:48:42.289368     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1508 13:48:42.299284     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1509 13:48:42.302546     PCI: 00:02.0

 1510 13:48:42.312541     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1511 13:48:42.322502     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1512 13:48:42.328959     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1513 13:48:42.336364     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1514 13:48:42.345878     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1515 13:48:42.346298      GENERIC: 0.0

 1516 13:48:42.352389     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1517 13:48:42.359109     PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1518 13:48:42.369074     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1519 13:48:42.378992     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1520 13:48:42.382320      PCI: 01:00.0

 1521 13:48:42.392232      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1522 13:48:42.402168      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1523 13:48:42.402654     PCI: 00:08.0

 1524 13:48:42.405526     PCI: 00:0a.0

 1525 13:48:42.415530     PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1526 13:48:42.419264     PCI: 00:0d.0 child on link 0 USB0 port 0

 1527 13:48:42.428822     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1528 13:48:42.432209      USB0 port 0 child on link 0 USB3 port 0

 1529 13:48:42.435582       USB3 port 0

 1530 13:48:42.436125       USB3 port 1

 1531 13:48:42.438941       USB3 port 2

 1532 13:48:42.439429       USB3 port 3

 1533 13:48:42.445635     PCI: 00:14.0 child on link 0 USB0 port 0

 1534 13:48:42.455694     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1535 13:48:42.458802      USB0 port 0 child on link 0 USB2 port 0

 1536 13:48:42.459220       USB2 port 0

 1537 13:48:42.462210       USB2 port 1

 1538 13:48:42.465415       USB2 port 2

 1539 13:48:42.465907       USB2 port 3

 1540 13:48:42.469010       USB2 port 4

 1541 13:48:42.469540       USB2 port 5

 1542 13:48:42.472258       USB2 port 6

 1543 13:48:42.472688       USB2 port 7

 1544 13:48:42.475469       USB2 port 8

 1545 13:48:42.475886       USB2 port 9

 1546 13:48:42.478679       USB3 port 0

 1547 13:48:42.479097       USB3 port 1

 1548 13:48:42.482283       USB3 port 2

 1549 13:48:42.482699       USB3 port 3

 1550 13:48:42.485504     PCI: 00:14.2

 1551 13:48:42.495674     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1552 13:48:42.505597     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1553 13:48:42.508960     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1554 13:48:42.519051     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1555 13:48:42.522066      GENERIC: 0.0

 1556 13:48:42.525618     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1557 13:48:42.535706     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1558 13:48:42.536201      I2C: 00:1a

 1559 13:48:42.538790      I2C: 00:31

 1560 13:48:42.539208      I2C: 00:32

 1561 13:48:42.545797     PCI: 00:15.1 child on link 0 I2C: 00:50

 1562 13:48:42.555528     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1563 13:48:42.556026      I2C: 00:50

 1564 13:48:42.558691     PCI: 00:15.2

 1565 13:48:42.562240     PCI: 00:15.3 child on link 0 I2C: 00:10

 1566 13:48:42.572094     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1567 13:48:42.572679      I2C: 00:10

 1568 13:48:42.575253     PCI: 00:16.0

 1569 13:48:42.585411     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1570 13:48:42.585928     PCI: 00:19.0

 1571 13:48:42.592448     PCI: 00:19.1 child on link 0 I2C: 00:15

 1572 13:48:42.602188     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1573 13:48:42.602686      I2C: 00:15

 1574 13:48:42.605393      I2C: 00:2c

 1575 13:48:42.605809     PCI: 00:1e.0

 1576 13:48:42.615400     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1577 13:48:42.622221     PCI: 00:1e.3 child on link 0 SPI: 00

 1578 13:48:42.632135     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1579 13:48:42.632676      SPI: 00

 1580 13:48:42.635507     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1581 13:48:42.645324     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1582 13:48:42.645820      PNP: 0c09.0

 1583 13:48:42.655591      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1584 13:48:42.658753     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1585 13:48:42.668811     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1586 13:48:42.678856     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1587 13:48:42.682014      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1588 13:48:42.685394       GENERIC: 0.0

 1589 13:48:42.688648       GENERIC: 1.0

 1590 13:48:42.689081     PCI: 00:1f.3

 1591 13:48:42.698803     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1592 13:48:42.708515     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1593 13:48:42.712164     PCI: 00:1f.5

 1594 13:48:42.718792     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1595 13:48:42.728588  === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1596 13:48:42.732102   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1597 13:48:42.738629   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1598 13:48:42.745162   PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1599 13:48:42.748762    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1600 13:48:42.751964    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1601 13:48:42.761827   PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1602 13:48:42.768561   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1603 13:48:42.775224   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1604 13:48:42.781874  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1605 13:48:42.788422  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1606 13:48:42.795248   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1607 13:48:42.805517   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1608 13:48:42.811779   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1609 13:48:42.815206   DOMAIN: 0000: Resource ranges:

 1610 13:48:42.818611   * Base: 1000, Size: 800, Tag: 100

 1611 13:48:42.822200   * Base: 1900, Size: e700, Tag: 100

 1612 13:48:42.828596    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1613 13:48:42.835100  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1614 13:48:42.841862  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1615 13:48:42.848549   update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)

 1616 13:48:42.855108   update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)

 1617 13:48:42.865261   update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)

 1618 13:48:42.871687   update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)

 1619 13:48:42.878302   update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)

 1620 13:48:42.888324   update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)

 1621 13:48:42.894905   update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)

 1622 13:48:42.902291   update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)

 1623 13:48:42.911699   update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)

 1624 13:48:42.918285   update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)

 1625 13:48:42.925415   update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)

 1626 13:48:42.934904   update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)

 1627 13:48:42.941747   update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)

 1628 13:48:42.948262   update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)

 1629 13:48:42.955175   update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)

 1630 13:48:42.964737   update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)

 1631 13:48:42.971409   update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)

 1632 13:48:42.978241   update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)

 1633 13:48:42.988192   update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)

 1634 13:48:42.994905   update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)

 1635 13:48:43.001488   update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)

 1636 13:48:43.012197   update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)

 1637 13:48:43.018068   update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)

 1638 13:48:43.024730   update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)

 1639 13:48:43.034869   update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)

 1640 13:48:43.041442   update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)

 1641 13:48:43.048335   update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)

 1642 13:48:43.058236   update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)

 1643 13:48:43.064772   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1644 13:48:43.071834   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1645 13:48:43.074836   DOMAIN: 0000: Resource ranges:

 1646 13:48:43.081760   * Base: 80400000, Size: 3fc00000, Tag: 200

 1647 13:48:43.084888   * Base: d0000000, Size: 28000000, Tag: 200

 1648 13:48:43.088315   * Base: fa000000, Size: 1000000, Tag: 200

 1649 13:48:43.091416   * Base: fb001000, Size: 17ff000, Tag: 200

 1650 13:48:43.098116   * Base: fe800000, Size: 300000, Tag: 200

 1651 13:48:43.101543   * Base: feb80000, Size: 80000, Tag: 200

 1652 13:48:43.104708   * Base: fed00000, Size: 40000, Tag: 200

 1653 13:48:43.108048   * Base: fed70000, Size: 10000, Tag: 200

 1654 13:48:43.114852   * Base: fed88000, Size: 8000, Tag: 200

 1655 13:48:43.117796   * Base: fed93000, Size: d000, Tag: 200

 1656 13:48:43.121341   * Base: feda2000, Size: 1e000, Tag: 200

 1657 13:48:43.124601   * Base: fede0000, Size: 1220000, Tag: 200

 1658 13:48:43.131372   * Base: 27fc00000, Size: 7d80400000, Tag: 100200

 1659 13:48:43.137998    PCI: 00:02.0 18 *  [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem

 1660 13:48:43.144720    PCI: 00:02.0 10 *  [0x81000000 - 0x81ffffff] limit: 81ffffff mem

 1661 13:48:43.151099    PCI: 00:06.0 20 *  [0x80400000 - 0x804fffff] limit: 804fffff mem

 1662 13:48:43.158087    PCI: 00:1f.3 20 *  [0x80500000 - 0x805fffff] limit: 805fffff mem

 1663 13:48:43.164371    PCI: 00:04.0 10 *  [0x80600000 - 0x8061ffff] limit: 8061ffff mem

 1664 13:48:43.171119    PCI: 00:0d.0 10 *  [0x80620000 - 0x8062ffff] limit: 8062ffff mem

 1665 13:48:43.177749    PCI: 00:14.0 10 *  [0x80630000 - 0x8063ffff] limit: 8063ffff mem

 1666 13:48:43.184375    PCI: 00:0a.0 10 *  [0x80640000 - 0x80647fff] limit: 80647fff mem

 1667 13:48:43.191246    PCI: 00:14.2 10 *  [0x80648000 - 0x8064bfff] limit: 8064bfff mem

 1668 13:48:43.197757    PCI: 00:14.3 10 *  [0x8064c000 - 0x8064ffff] limit: 8064ffff mem

 1669 13:48:43.204281    PCI: 00:1f.3 10 *  [0x80650000 - 0x80653fff] limit: 80653fff mem

 1670 13:48:43.211159    PCI: 00:14.2 18 *  [0x80654000 - 0x80654fff] limit: 80654fff mem

 1671 13:48:43.217539    PCI: 00:15.0 10 *  [0x80655000 - 0x80655fff] limit: 80655fff mem

 1672 13:48:43.224180    PCI: 00:15.1 10 *  [0x80656000 - 0x80656fff] limit: 80656fff mem

 1673 13:48:43.231186    PCI: 00:15.3 10 *  [0x80657000 - 0x80657fff] limit: 80657fff mem

 1674 13:48:43.237488    PCI: 00:16.0 10 *  [0x80658000 - 0x80658fff] limit: 80658fff mem

 1675 13:48:43.244135    PCI: 00:19.1 10 *  [0x80659000 - 0x80659fff] limit: 80659fff mem

 1676 13:48:43.251181    PCI: 00:1e.3 10 *  [0x8065a000 - 0x8065afff] limit: 8065afff mem

 1677 13:48:43.257496    PCI: 00:1f.5 10 *  [0x8065b000 - 0x8065bfff] limit: 8065bfff mem

 1678 13:48:43.263993  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1679 13:48:43.273856  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff

 1680 13:48:43.277177   PCI: 00:06.0: Resource ranges:

 1681 13:48:43.280396   * Base: 80400000, Size: 100000, Tag: 200

 1682 13:48:43.286920    PCI: 01:00.0 10 *  [0x80400000 - 0x80403fff] limit: 80403fff mem

 1683 13:48:43.293703    PCI: 01:00.0 20 *  [0x80404000 - 0x804040ff] limit: 804040ff mem

 1684 13:48:43.300605  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done

 1685 13:48:43.310500  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1686 13:48:43.313463  Root Device assign_resources, bus 0 link: 0

 1687 13:48:43.317055  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1688 13:48:43.326849  PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64

 1689 13:48:43.333608  PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64

 1690 13:48:43.343430  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1691 13:48:43.350063  PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64

 1692 13:48:43.353226  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1693 13:48:43.359895  PCI: 00:04.0 assign_resources, bus 1 link: 0 done

 1694 13:48:43.366606  PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1695 13:48:43.376588  PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1696 13:48:43.386332  PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem

 1697 13:48:43.389630  PCI: 00:06.0 assign_resources, bus 1 link: 0

 1698 13:48:43.399612  PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64

 1699 13:48:43.406233  PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64

 1700 13:48:43.412869  PCI: 00:06.0 assign_resources, bus 1 link: 0 done

 1701 13:48:43.419775  PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64

 1702 13:48:43.426023  PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64

 1703 13:48:43.432853  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1704 13:48:43.436349  PCI: 00:0d.0 assign_resources, bus 0 link: 0 done

 1705 13:48:43.445966  PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64

 1706 13:48:43.449212  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1707 13:48:43.455543  PCI: 00:14.0 assign_resources, bus 0 link: 0 done

 1708 13:48:43.462492  PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64

 1709 13:48:43.468980  PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64

 1710 13:48:43.478994  PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64

 1711 13:48:43.482430  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1712 13:48:43.488937  PCI: 00:14.3 assign_resources, bus 0 link: 0 done

 1713 13:48:43.495509  PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64

 1714 13:48:43.502464  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1715 13:48:43.505509  PCI: 00:15.0 assign_resources, bus 0 link: 0 done

 1716 13:48:43.512282  PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64

 1717 13:48:43.519070  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1718 13:48:43.522245  PCI: 00:15.1 assign_resources, bus 0 link: 0 done

 1719 13:48:43.532209  PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64

 1720 13:48:43.535434  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1721 13:48:43.542074  PCI: 00:15.3 assign_resources, bus 0 link: 0 done

 1722 13:48:43.548567  PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64

 1723 13:48:43.555068  PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64

 1724 13:48:43.561748  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1725 13:48:43.565023  PCI: 00:19.1 assign_resources, bus 0 link: 0 done

 1726 13:48:43.575005  PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64

 1727 13:48:43.578313  PCI: 00:1e.3 assign_resources, bus 2 link: 0

 1728 13:48:43.585281  PCI: 00:1e.3 assign_resources, bus 2 link: 0 done

 1729 13:48:43.588712  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1730 13:48:43.591746  PCI: 00:1f.0 assign_resources, bus 0 link: 0 done

 1731 13:48:43.598368  LPC: Trying to open IO window from 800 size 1ff

 1732 13:48:43.605126  PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64

 1733 13:48:43.614835  PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64

 1734 13:48:43.621704  PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem

 1735 13:48:43.628420  DOMAIN: 0000 assign_resources, bus 0 link: 0 done

 1736 13:48:43.631734  Root Device assign_resources, bus 0 link: 0 done

 1737 13:48:43.634790  Done setting resources.

 1738 13:48:43.641795  Show resources in subtree (Root Device)...After assigning values.

 1739 13:48:43.644611   Root Device child on link 0 CPU_CLUSTER: 0

 1740 13:48:43.648241    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1741 13:48:43.651261     APIC: 00

 1742 13:48:43.651823     APIC: 16

 1743 13:48:43.652160     APIC: 10

 1744 13:48:43.654792     APIC: 12

 1745 13:48:43.655360     APIC: 14

 1746 13:48:43.658197     APIC: 09

 1747 13:48:43.658793     APIC: 01

 1748 13:48:43.659131     APIC: 08

 1749 13:48:43.664658    DOMAIN: 0000 child on link 0 GPIO: 0

 1750 13:48:43.671317    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1751 13:48:43.681179    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1752 13:48:43.684365     GPIO: 0

 1753 13:48:43.684793     PCI: 00:00.0

 1754 13:48:43.694760     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1755 13:48:43.704539     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1756 13:48:43.714540     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1757 13:48:43.724743     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1758 13:48:43.731692     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1759 13:48:43.740908     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1760 13:48:43.751298     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1761 13:48:43.760865     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1762 13:48:43.771189     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1763 13:48:43.781034     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1764 13:48:43.790735     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1765 13:48:43.797253     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1766 13:48:43.807475     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1767 13:48:43.817191     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1768 13:48:43.827545     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1769 13:48:43.837207     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1770 13:48:43.844354     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1771 13:48:43.854118     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1772 13:48:43.863571     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1773 13:48:43.874122     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1774 13:48:43.884206     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1775 13:48:43.893679     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1776 13:48:43.903711     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1777 13:48:43.913297     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1778 13:48:43.923744     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1779 13:48:43.933702     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1780 13:48:43.940208     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1781 13:48:43.949977     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1782 13:48:43.953553     PCI: 00:02.0

 1783 13:48:43.963132     PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10

 1784 13:48:43.973658     PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18

 1785 13:48:43.983667     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1786 13:48:43.986659     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1787 13:48:43.996543     PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10

 1788 13:48:44.000132      GENERIC: 0.0

 1789 13:48:44.003491     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1790 13:48:44.012889     PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1791 13:48:44.026120     PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1792 13:48:44.036580     PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20

 1793 13:48:44.037091      PCI: 01:00.0

 1794 13:48:44.049456      PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10

 1795 13:48:44.059709      PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20

 1796 13:48:44.060242     PCI: 00:08.0

 1797 13:48:44.063092     PCI: 00:0a.0

 1798 13:48:44.073004     PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10

 1799 13:48:44.076213     PCI: 00:0d.0 child on link 0 USB0 port 0

 1800 13:48:44.086216     PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10

 1801 13:48:44.092950      USB0 port 0 child on link 0 USB3 port 0

 1802 13:48:44.093545       USB3 port 0

 1803 13:48:44.095970       USB3 port 1

 1804 13:48:44.096399       USB3 port 2

 1805 13:48:44.099880       USB3 port 3

 1806 13:48:44.103023     PCI: 00:14.0 child on link 0 USB0 port 0

 1807 13:48:44.112861     PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10

 1808 13:48:44.116263      USB0 port 0 child on link 0 USB2 port 0

 1809 13:48:44.119941       USB2 port 0

 1810 13:48:44.120475       USB2 port 1

 1811 13:48:44.122853       USB2 port 2

 1812 13:48:44.126162       USB2 port 3

 1813 13:48:44.126591       USB2 port 4

 1814 13:48:44.129719       USB2 port 5

 1815 13:48:44.130281       USB2 port 6

 1816 13:48:44.132441       USB2 port 7

 1817 13:48:44.132927       USB2 port 8

 1818 13:48:44.136144       USB2 port 9

 1819 13:48:44.136569       USB3 port 0

 1820 13:48:44.139796       USB3 port 1

 1821 13:48:44.140323       USB3 port 2

 1822 13:48:44.142712       USB3 port 3

 1823 13:48:44.143133     PCI: 00:14.2

 1824 13:48:44.152643     PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10

 1825 13:48:44.166495     PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18

 1826 13:48:44.169337     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1827 13:48:44.179256     PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10

 1828 13:48:44.182675      GENERIC: 0.0

 1829 13:48:44.186057     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1830 13:48:44.195608     PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10

 1831 13:48:44.196035      I2C: 00:1a

 1832 13:48:44.199237      I2C: 00:31

 1833 13:48:44.199658      I2C: 00:32

 1834 13:48:44.205658     PCI: 00:15.1 child on link 0 I2C: 00:50

 1835 13:48:44.215644     PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10

 1836 13:48:44.216084      I2C: 00:50

 1837 13:48:44.219102     PCI: 00:15.2

 1838 13:48:44.222455     PCI: 00:15.3 child on link 0 I2C: 00:10

 1839 13:48:44.232336     PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10

 1840 13:48:44.235682      I2C: 00:10

 1841 13:48:44.236217     PCI: 00:16.0

 1842 13:48:44.245472     PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10

 1843 13:48:44.249008     PCI: 00:19.0

 1844 13:48:44.252074     PCI: 00:19.1 child on link 0 I2C: 00:15

 1845 13:48:44.262098     PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10

 1846 13:48:44.265838      I2C: 00:15

 1847 13:48:44.266372      I2C: 00:2c

 1848 13:48:44.269243     PCI: 00:1e.0

 1849 13:48:44.278715     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1850 13:48:44.282635     PCI: 00:1e.3 child on link 0 SPI: 00

 1851 13:48:44.292349     PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10

 1852 13:48:44.295608      SPI: 00

 1853 13:48:44.298485     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1854 13:48:44.309009     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1855 13:48:44.309609      PNP: 0c09.0

 1856 13:48:44.319022      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1857 13:48:44.321863     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1858 13:48:44.331721     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1859 13:48:44.341790     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1860 13:48:44.345399      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1861 13:48:44.348489       GENERIC: 0.0

 1862 13:48:44.348961       GENERIC: 1.0

 1863 13:48:44.352192     PCI: 00:1f.3

 1864 13:48:44.362086     PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10

 1865 13:48:44.371550     PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20

 1866 13:48:44.374889     PCI: 00:1f.5

 1867 13:48:44.384774     PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10

 1868 13:48:44.388135  Done allocating resources.

 1869 13:48:44.391944  BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms

 1870 13:48:44.398305  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

 1871 13:48:44.405278  Configure audio over I2S with MAX98373 NAU88L25B.

 1872 13:48:44.408463  Enabling BT offload

 1873 13:48:44.414738  BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms

 1874 13:48:44.418336  Enabling resources...

 1875 13:48:44.421613  PCI: 00:00.0 subsystem <- 8086/4609

 1876 13:48:44.424845  PCI: 00:00.0 cmd <- 06

 1877 13:48:44.428254  PCI: 00:02.0 subsystem <- 8086/46b3

 1878 13:48:44.431777  PCI: 00:02.0 cmd <- 03

 1879 13:48:44.435059  PCI: 00:04.0 subsystem <- 8086/461d

 1880 13:48:44.435483  PCI: 00:04.0 cmd <- 02

 1881 13:48:44.438429  PCI: 00:06.0 bridge ctrl <- 0013

 1882 13:48:44.441852  PCI: 00:06.0 subsystem <- 8086/464d

 1883 13:48:44.444818  PCI: 00:06.0 cmd <- 106

 1884 13:48:44.448441  PCI: 00:0a.0 subsystem <- 8086/467d

 1885 13:48:44.451805  PCI: 00:0a.0 cmd <- 02

 1886 13:48:44.455019  PCI: 00:0d.0 subsystem <- 8086/461e

 1887 13:48:44.458386  PCI: 00:0d.0 cmd <- 02

 1888 13:48:44.461608  PCI: 00:14.0 subsystem <- 8086/51ed

 1889 13:48:44.465330  PCI: 00:14.0 cmd <- 02

 1890 13:48:44.468026  PCI: 00:14.2 subsystem <- 8086/51ef

 1891 13:48:44.468446  PCI: 00:14.2 cmd <- 02

 1892 13:48:44.471596  PCI: 00:14.3 subsystem <- 8086/51f0

 1893 13:48:44.474488  PCI: 00:14.3 cmd <- 02

 1894 13:48:44.478097  PCI: 00:15.0 subsystem <- 8086/51e8

 1895 13:48:44.481753  PCI: 00:15.0 cmd <- 02

 1896 13:48:44.484780  PCI: 00:15.1 subsystem <- 8086/51e9

 1897 13:48:44.488295  PCI: 00:15.1 cmd <- 06

 1898 13:48:44.491217  PCI: 00:15.3 subsystem <- 8086/51eb

 1899 13:48:44.494992  PCI: 00:15.3 cmd <- 02

 1900 13:48:44.497956  PCI: 00:16.0 subsystem <- 8086/51e0

 1901 13:48:44.498381  PCI: 00:16.0 cmd <- 02

 1902 13:48:44.501170  PCI: 00:19.1 subsystem <- 8086/51c6

 1903 13:48:44.505007  PCI: 00:19.1 cmd <- 02

 1904 13:48:44.508276  PCI: 00:1e.0 subsystem <- 8086/51a8

 1905 13:48:44.511562  PCI: 00:1e.0 cmd <- 06

 1906 13:48:44.514757  PCI: 00:1e.3 subsystem <- 8086/51ab

 1907 13:48:44.518058  PCI: 00:1e.3 cmd <- 02

 1908 13:48:44.521314  PCI: 00:1f.0 subsystem <- 8086/5182

 1909 13:48:44.525143  PCI: 00:1f.0 cmd <- 407

 1910 13:48:44.528171  PCI: 00:1f.3 subsystem <- 8086/51c8

 1911 13:48:44.528708  PCI: 00:1f.3 cmd <- 02

 1912 13:48:44.531705  PCI: 00:1f.5 subsystem <- 8086/51a4

 1913 13:48:44.534678  PCI: 00:1f.5 cmd <- 406

 1914 13:48:44.537843  PCI: 01:00.0 cmd <- 02

 1915 13:48:44.538260  done.

 1916 13:48:44.545065  BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms

 1917 13:48:44.548030  ME: Version: Unavailable

 1918 13:48:44.551862  BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms

 1919 13:48:44.554851  Initializing devices...

 1920 13:48:44.557768  Root Device init

 1921 13:48:44.558194  mainboard: EC init

 1922 13:48:44.564661  Chrome EC: Set SMI mask to 0x0000000000000000

 1923 13:48:44.565221  Chrome EC: UHEPI supported

 1924 13:48:44.572590  Chrome EC: clear events_b mask to 0x0000000000000000

 1925 13:48:44.579192  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1926 13:48:44.585895  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e

 1927 13:48:44.592790  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e

 1928 13:48:44.599364  Chrome EC: Set WAKE mask to 0x0000000000000000

 1929 13:48:44.603005  Root Device init finished in 42 msecs

 1930 13:48:44.605703  PCI: 00:00.0 init

 1931 13:48:44.609258  CPU TDP = 15 Watts

 1932 13:48:44.609739  CPU PL1 = 15 Watts

 1933 13:48:44.612644  CPU PL2 = 55 Watts

 1934 13:48:44.613207  CPU PL4 = 123 Watts

 1935 13:48:44.619128  PCI: 00:00.0 init finished in 8 msecs

 1936 13:48:44.619550  PCI: 00:02.0 init

 1937 13:48:44.622893  GMA: Found VBT in CBFS

 1938 13:48:44.625677  GMA: Found valid VBT in CBFS

 1939 13:48:44.632489  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1940 13:48:44.639014                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000

 1941 13:48:44.642484  PCI: 00:02.0 init finished in 18 msecs

 1942 13:48:44.646069  PCI: 00:06.0 init

 1943 13:48:44.646490  Initializing PCH PCIe bridge.

 1944 13:48:44.652567  PCI: 00:06.0 init finished in 3 msecs

 1945 13:48:44.652990  PCI: 00:0a.0 init

 1946 13:48:44.655876  PCI: 00:0a.0 init finished in 0 msecs

 1947 13:48:44.659520  PCI: 00:14.0 init

 1948 13:48:44.662546  PCI: 00:14.0 init finished in 0 msecs

 1949 13:48:44.665669  PCI: 00:14.2 init

 1950 13:48:44.669291  PCI: 00:14.2 init finished in 0 msecs

 1951 13:48:44.669798  PCI: 00:15.0 init

 1952 13:48:44.672637  I2C bus 0 version 0x3230302a

 1953 13:48:44.675572  DW I2C bus 0 at 0x80655000 (400 KHz)

 1954 13:48:44.678986  PCI: 00:15.0 init finished in 6 msecs

 1955 13:48:44.682616  PCI: 00:15.1 init

 1956 13:48:44.685950  I2C bus 1 version 0x3230302a

 1957 13:48:44.688963  DW I2C bus 1 at 0x80656000 (400 KHz)

 1958 13:48:44.692318  PCI: 00:15.1 init finished in 6 msecs

 1959 13:48:44.695668  PCI: 00:15.3 init

 1960 13:48:44.699034  I2C bus 3 version 0x3230302a

 1961 13:48:44.702406  DW I2C bus 3 at 0x80657000 (400 KHz)

 1962 13:48:44.706376  PCI: 00:15.3 init finished in 6 msecs

 1963 13:48:44.706907  PCI: 00:16.0 init

 1964 13:48:44.709164  PCI: 00:16.0 init finished in 0 msecs

 1965 13:48:44.712659  PCI: 00:19.1 init

 1966 13:48:44.716254  I2C bus 5 version 0x3230302a

 1967 13:48:44.719464  DW I2C bus 5 at 0x80659000 (400 KHz)

 1968 13:48:44.722319  PCI: 00:19.1 init finished in 6 msecs

 1969 13:48:44.726050  PCI: 00:1f.0 init

 1970 13:48:44.729303  IOAPIC: Initializing IOAPIC at 0xfec00000

 1971 13:48:44.732543  IOAPIC: ID = 0x02

 1972 13:48:44.732966  IOAPIC: Dumping registers

 1973 13:48:44.736372    reg 0x0000: 0x02000000

 1974 13:48:44.739428    reg 0x0001: 0x00770020

 1975 13:48:44.742342    reg 0x0002: 0x00000000

 1976 13:48:44.742811  IOAPIC: 120 interrupts

 1977 13:48:44.749482  IOAPIC: Clearing IOAPIC at 0xfec00000

 1978 13:48:44.752719  IOAPIC: vector 0x00 value 0x00000000 0x00010000

 1979 13:48:44.756198  IOAPIC: vector 0x01 value 0x00000000 0x00010000

 1980 13:48:44.762856  IOAPIC: vector 0x02 value 0x00000000 0x00010000

 1981 13:48:44.766079  IOAPIC: vector 0x03 value 0x00000000 0x00010000

 1982 13:48:44.772778  IOAPIC: vector 0x04 value 0x00000000 0x00010000

 1983 13:48:44.776009  IOAPIC: vector 0x05 value 0x00000000 0x00010000

 1984 13:48:44.782501  IOAPIC: vector 0x06 value 0x00000000 0x00010000

 1985 13:48:44.785997  IOAPIC: vector 0x07 value 0x00000000 0x00010000

 1986 13:48:44.792234  IOAPIC: vector 0x08 value 0x00000000 0x00010000

 1987 13:48:44.796067  IOAPIC: vector 0x09 value 0x00000000 0x00010000

 1988 13:48:44.798899  IOAPIC: vector 0x0a value 0x00000000 0x00010000

 1989 13:48:44.805746  IOAPIC: vector 0x0b value 0x00000000 0x00010000

 1990 13:48:44.809157  IOAPIC: vector 0x0c value 0x00000000 0x00010000

 1991 13:48:44.815721  IOAPIC: vector 0x0d value 0x00000000 0x00010000

 1992 13:48:44.819315  IOAPIC: vector 0x0e value 0x00000000 0x00010000

 1993 13:48:44.825720  IOAPIC: vector 0x0f value 0x00000000 0x00010000

 1994 13:48:44.828989  IOAPIC: vector 0x10 value 0x00000000 0x00010000

 1995 13:48:44.832602  IOAPIC: vector 0x11 value 0x00000000 0x00010000

 1996 13:48:44.839316  IOAPIC: vector 0x12 value 0x00000000 0x00010000

 1997 13:48:44.842226  IOAPIC: vector 0x13 value 0x00000000 0x00010000

 1998 13:48:44.848820  IOAPIC: vector 0x14 value 0x00000000 0x00010000

 1999 13:48:44.852092  IOAPIC: vector 0x15 value 0x00000000 0x00010000

 2000 13:48:44.858824  IOAPIC: vector 0x16 value 0x00000000 0x00010000

 2001 13:48:44.862286  IOAPIC: vector 0x17 value 0x00000000 0x00010000

 2002 13:48:44.868660  IOAPIC: vector 0x18 value 0x00000000 0x00010000

 2003 13:48:44.872200  IOAPIC: vector 0x19 value 0x00000000 0x00010000

 2004 13:48:44.875270  IOAPIC: vector 0x1a value 0x00000000 0x00010000

 2005 13:48:44.882173  IOAPIC: vector 0x1b value 0x00000000 0x00010000

 2006 13:48:44.885220  IOAPIC: vector 0x1c value 0x00000000 0x00010000

 2007 13:48:44.892092  IOAPIC: vector 0x1d value 0x00000000 0x00010000

 2008 13:48:44.895225  IOAPIC: vector 0x1e value 0x00000000 0x00010000

 2009 13:48:44.902047  IOAPIC: vector 0x1f value 0x00000000 0x00010000

 2010 13:48:44.905283  IOAPIC: vector 0x20 value 0x00000000 0x00010000

 2011 13:48:44.912273  IOAPIC: vector 0x21 value 0x00000000 0x00010000

 2012 13:48:44.915171  IOAPIC: vector 0x22 value 0x00000000 0x00010000

 2013 13:48:44.918422  IOAPIC: vector 0x23 value 0x00000000 0x00010000

 2014 13:48:44.925392  IOAPIC: vector 0x24 value 0x00000000 0x00010000

 2015 13:48:44.928578  IOAPIC: vector 0x25 value 0x00000000 0x00010000

 2016 13:48:44.935246  IOAPIC: vector 0x26 value 0x00000000 0x00010000

 2017 13:48:44.938608  IOAPIC: vector 0x27 value 0x00000000 0x00010000

 2018 13:48:44.945167  IOAPIC: vector 0x28 value 0x00000000 0x00010000

 2019 13:48:44.948411  IOAPIC: vector 0x29 value 0x00000000 0x00010000

 2020 13:48:44.955185  IOAPIC: vector 0x2a value 0x00000000 0x00010000

 2021 13:48:44.958541  IOAPIC: vector 0x2b value 0x00000000 0x00010000

 2022 13:48:44.961639  IOAPIC: vector 0x2c value 0x00000000 0x00010000

 2023 13:48:44.968360  IOAPIC: vector 0x2d value 0x00000000 0x00010000

 2024 13:48:44.971531  IOAPIC: vector 0x2e value 0x00000000 0x00010000

 2025 13:48:44.978253  IOAPIC: vector 0x2f value 0x00000000 0x00010000

 2026 13:48:44.981679  IOAPIC: vector 0x30 value 0x00000000 0x00010000

 2027 13:48:44.988155  IOAPIC: vector 0x31 value 0x00000000 0x00010000

 2028 13:48:44.991581  IOAPIC: vector 0x32 value 0x00000000 0x00010000

 2029 13:48:44.998436  IOAPIC: vector 0x33 value 0x00000000 0x00010000

 2030 13:48:45.001504  IOAPIC: vector 0x34 value 0x00000000 0x00010000

 2031 13:48:45.005238  IOAPIC: vector 0x35 value 0x00000000 0x00010000

 2032 13:48:45.012165  IOAPIC: vector 0x36 value 0x00000000 0x00010000

 2033 13:48:45.015120  IOAPIC: vector 0x37 value 0x00000000 0x00010000

 2034 13:48:45.021362  IOAPIC: vector 0x38 value 0x00000000 0x00010000

 2035 13:48:45.024975  IOAPIC: vector 0x39 value 0x00000000 0x00010000

 2036 13:48:45.031631  IOAPIC: vector 0x3a value 0x00000000 0x00010000

 2037 13:48:45.034859  IOAPIC: vector 0x3b value 0x00000000 0x00010000

 2038 13:48:45.041711  IOAPIC: vector 0x3c value 0x00000000 0x00010000

 2039 13:48:45.045273  IOAPIC: vector 0x3d value 0x00000000 0x00010000

 2040 13:48:45.048111  IOAPIC: vector 0x3e value 0x00000000 0x00010000

 2041 13:48:45.055368  IOAPIC: vector 0x3f value 0x00000000 0x00010000

 2042 13:48:45.058317  IOAPIC: vector 0x40 value 0x00000000 0x00010000

 2043 13:48:45.065017  IOAPIC: vector 0x41 value 0x00000000 0x00010000

 2044 13:48:45.068020  IOAPIC: vector 0x42 value 0x00000000 0x00010000

 2045 13:48:45.075032  IOAPIC: vector 0x43 value 0x00000000 0x00010000

 2046 13:48:45.078076  IOAPIC: vector 0x44 value 0x00000000 0x00010000

 2047 13:48:45.081213  IOAPIC: vector 0x45 value 0x00000000 0x00010000

 2048 13:48:45.088326  IOAPIC: vector 0x46 value 0x00000000 0x00010000

 2049 13:48:45.092058  IOAPIC: vector 0x47 value 0x00000000 0x00010000

 2050 13:48:45.098004  IOAPIC: vector 0x48 value 0x00000000 0x00010000

 2051 13:48:45.101441  IOAPIC: vector 0x49 value 0x00000000 0x00010000

 2052 13:48:45.108092  IOAPIC: vector 0x4a value 0x00000000 0x00010000

 2053 13:48:45.111678  IOAPIC: vector 0x4b value 0x00000000 0x00010000

 2054 13:48:45.118054  IOAPIC: vector 0x4c value 0x00000000 0x00010000

 2055 13:48:45.121620  IOAPIC: vector 0x4d value 0x00000000 0x00010000

 2056 13:48:45.124934  IOAPIC: vector 0x4e value 0x00000000 0x00010000

 2057 13:48:45.131710  IOAPIC: vector 0x4f value 0x00000000 0x00010000

 2058 13:48:45.134822  IOAPIC: vector 0x50 value 0x00000000 0x00010000

 2059 13:48:45.141436  IOAPIC: vector 0x51 value 0x00000000 0x00010000

 2060 13:48:45.144476  IOAPIC: vector 0x52 value 0x00000000 0x00010000

 2061 13:48:45.151401  IOAPIC: vector 0x53 value 0x00000000 0x00010000

 2062 13:48:45.154993  IOAPIC: vector 0x54 value 0x00000000 0x00010000

 2063 13:48:45.161471  IOAPIC: vector 0x55 value 0x00000000 0x00010000

 2064 13:48:45.164565  IOAPIC: vector 0x56 value 0x00000000 0x00010000

 2065 13:48:45.168237  IOAPIC: vector 0x57 value 0x00000000 0x00010000

 2066 13:48:45.174822  IOAPIC: vector 0x58 value 0x00000000 0x00010000

 2067 13:48:45.177830  IOAPIC: vector 0x59 value 0x00000000 0x00010000

 2068 13:48:45.184716  IOAPIC: vector 0x5a value 0x00000000 0x00010000

 2069 13:48:45.188303  IOAPIC: vector 0x5b value 0x00000000 0x00010000

 2070 13:48:45.194587  IOAPIC: vector 0x5c value 0x00000000 0x00010000

 2071 13:48:45.198005  IOAPIC: vector 0x5d value 0x00000000 0x00010000

 2072 13:48:45.204823  IOAPIC: vector 0x5e value 0x00000000 0x00010000

 2073 13:48:45.208234  IOAPIC: vector 0x5f value 0x00000000 0x00010000

 2074 13:48:45.210973  IOAPIC: vector 0x60 value 0x00000000 0x00010000

 2075 13:48:45.217805  IOAPIC: vector 0x61 value 0x00000000 0x00010000

 2076 13:48:45.220925  IOAPIC: vector 0x62 value 0x00000000 0x00010000

 2077 13:48:45.227930  IOAPIC: vector 0x63 value 0x00000000 0x00010000

 2078 13:48:45.231177  IOAPIC: vector 0x64 value 0x00000000 0x00010000

 2079 13:48:45.237983  IOAPIC: vector 0x65 value 0x00000000 0x00010000

 2080 13:48:45.241180  IOAPIC: vector 0x66 value 0x00000000 0x00010000

 2081 13:48:45.244808  IOAPIC: vector 0x67 value 0x00000000 0x00010000

 2082 13:48:45.251103  IOAPIC: vector 0x68 value 0x00000000 0x00010000

 2083 13:48:45.254299  IOAPIC: vector 0x69 value 0x00000000 0x00010000

 2084 13:48:45.260794  IOAPIC: vector 0x6a value 0x00000000 0x00010000

 2085 13:48:45.264349  IOAPIC: vector 0x6b value 0x00000000 0x00010000

 2086 13:48:45.271157  IOAPIC: vector 0x6c value 0x00000000 0x00010000

 2087 13:48:45.274177  IOAPIC: vector 0x6d value 0x00000000 0x00010000

 2088 13:48:45.280939  IOAPIC: vector 0x6e value 0x00000000 0x00010000

 2089 13:48:45.284183  IOAPIC: vector 0x6f value 0x00000000 0x00010000

 2090 13:48:45.287562  IOAPIC: vector 0x70 value 0x00000000 0x00010000

 2091 13:48:45.294196  IOAPIC: vector 0x71 value 0x00000000 0x00010000

 2092 13:48:45.297702  IOAPIC: vector 0x72 value 0x00000000 0x00010000

 2093 13:48:45.304350  IOAPIC: vector 0x73 value 0x00000000 0x00010000

 2094 13:48:45.307594  IOAPIC: vector 0x74 value 0x00000000 0x00010000

 2095 13:48:45.314286  IOAPIC: vector 0x75 value 0x00000000 0x00010000

 2096 13:48:45.318000  IOAPIC: vector 0x76 value 0x00000000 0x00010000

 2097 13:48:45.324560  IOAPIC: vector 0x77 value 0x00000000 0x00010000

 2098 13:48:45.327936  IOAPIC: Bootstrap Processor Local APIC = 0x00

 2099 13:48:45.330923  IOAPIC: vector 0x00 value 0x00000000 0x00000700

 2100 13:48:45.337350  PCI: 00:1f.0 init finished in 607 msecs

 2101 13:48:45.337873  PCI: 00:1f.2 init

 2102 13:48:45.340623  apm_control: Disabling ACPI.

 2103 13:48:45.346301  APMC done.

 2104 13:48:45.349840  PCI: 00:1f.2 init finished in 7 msecs

 2105 13:48:45.353160  PCI: 00:1f.3 init

 2106 13:48:45.356575  PCI: 00:1f.3 init finished in 0 msecs

 2107 13:48:45.357003  PCI: 01:00.0 init

 2108 13:48:45.359866  PCI: 01:00.0 init finished in 0 msecs

 2109 13:48:45.363114  PNP: 0c09.0 init

 2110 13:48:45.366368  Google Chrome EC uptime: 12.064 seconds

 2111 13:48:45.373468  Google Chrome AP resets since EC boot: 1

 2112 13:48:45.376473  Google Chrome most recent AP reset causes:

 2113 13:48:45.379583  	0.341: 32775 shutdown: entering G3

 2114 13:48:45.386308  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 2115 13:48:45.389604  PNP: 0c09.0 init finished in 23 msecs

 2116 13:48:45.393322  GENERIC: 0.0 init

 2117 13:48:45.396647  GENERIC: 0.0 init finished in 0 msecs

 2118 13:48:45.397073  GENERIC: 1.0 init

 2119 13:48:45.399658  GENERIC: 1.0 init finished in 0 msecs

 2120 13:48:45.402846  Devices initialized

 2121 13:48:45.406446  Show all devs... After init.

 2122 13:48:45.409500  Root Device: enabled 1

 2123 13:48:45.410025  CPU_CLUSTER: 0: enabled 1

 2124 13:48:45.412782  DOMAIN: 0000: enabled 1

 2125 13:48:45.416688  GPIO: 0: enabled 1

 2126 13:48:45.419505  PCI: 00:00.0: enabled 1

 2127 13:48:45.419932  PCI: 00:01.0: enabled 0

 2128 13:48:45.423063  PCI: 00:01.1: enabled 0

 2129 13:48:45.426210  PCI: 00:02.0: enabled 1

 2130 13:48:45.426713  PCI: 00:04.0: enabled 1

 2131 13:48:45.429495  PCI: 00:05.0: enabled 0

 2132 13:48:45.432848  PCI: 00:06.0: enabled 1

 2133 13:48:45.436527  PCI: 00:06.2: enabled 0

 2134 13:48:45.436957  PCI: 00:07.0: enabled 0

 2135 13:48:45.439816  PCI: 00:07.1: enabled 0

 2136 13:48:45.442825  PCI: 00:07.2: enabled 0

 2137 13:48:45.446155  PCI: 00:07.3: enabled 0

 2138 13:48:45.446584  PCI: 00:08.0: enabled 0

 2139 13:48:45.449475  PCI: 00:09.0: enabled 0

 2140 13:48:45.453377  PCI: 00:0a.0: enabled 1

 2141 13:48:45.456366  PCI: 00:0d.0: enabled 1

 2142 13:48:45.456902  PCI: 00:0d.1: enabled 0

 2143 13:48:45.459895  PCI: 00:0d.2: enabled 0

 2144 13:48:45.462681  PCI: 00:0d.3: enabled 0

 2145 13:48:45.466027  PCI: 00:0e.0: enabled 0

 2146 13:48:45.466455  PCI: 00:10.0: enabled 0

 2147 13:48:45.469213  PCI: 00:10.1: enabled 0

 2148 13:48:45.472832  PCI: 00:10.6: enabled 0

 2149 13:48:45.473297  PCI: 00:10.7: enabled 0

 2150 13:48:45.476417  PCI: 00:12.0: enabled 0

 2151 13:48:45.479517  PCI: 00:12.6: enabled 0

 2152 13:48:45.482862  PCI: 00:12.7: enabled 0

 2153 13:48:45.483290  PCI: 00:13.0: enabled 0

 2154 13:48:45.485919  PCI: 00:14.0: enabled 1

 2155 13:48:45.489319  PCI: 00:14.1: enabled 0

 2156 13:48:45.492928  PCI: 00:14.2: enabled 1

 2157 13:48:45.493519  PCI: 00:14.3: enabled 1

 2158 13:48:45.496085  PCI: 00:15.0: enabled 1

 2159 13:48:45.499386  PCI: 00:15.1: enabled 1

 2160 13:48:45.503003  PCI: 00:15.2: enabled 0

 2161 13:48:45.503520  PCI: 00:15.3: enabled 1

 2162 13:48:45.506286  PCI: 00:16.0: enabled 1

 2163 13:48:45.509640  PCI: 00:16.1: enabled 0

 2164 13:48:45.510053  PCI: 00:16.2: enabled 0

 2165 13:48:45.512926  PCI: 00:16.3: enabled 0

 2166 13:48:45.516593  PCI: 00:16.4: enabled 0

 2167 13:48:45.519330  PCI: 00:16.5: enabled 0

 2168 13:48:45.519849  PCI: 00:17.0: enabled 0

 2169 13:48:45.522971  PCI: 00:19.0: enabled 0

 2170 13:48:45.525930  PCI: 00:19.1: enabled 1

 2171 13:48:45.529649  PCI: 00:19.2: enabled 0

 2172 13:48:45.530166  PCI: 00:1a.0: enabled 0

 2173 13:48:45.532788  PCI: 00:1c.0: enabled 0

 2174 13:48:45.536064  PCI: 00:1c.1: enabled 0

 2175 13:48:45.539354  PCI: 00:1c.2: enabled 0

 2176 13:48:45.539872  PCI: 00:1c.3: enabled 0

 2177 13:48:45.542864  PCI: 00:1c.4: enabled 0

 2178 13:48:45.545645  PCI: 00:1c.5: enabled 0

 2179 13:48:45.549054  PCI: 00:1c.6: enabled 0

 2180 13:48:45.549492  PCI: 00:1c.7: enabled 0

 2181 13:48:45.552436  PCI: 00:1d.0: enabled 0

 2182 13:48:45.555635  PCI: 00:1d.1: enabled 0

 2183 13:48:45.556058  PCI: 00:1d.2: enabled 0

 2184 13:48:45.559409  PCI: 00:1d.3: enabled 0

 2185 13:48:45.562396  PCI: 00:1e.0: enabled 1

 2186 13:48:45.565775  PCI: 00:1e.1: enabled 0

 2187 13:48:45.566203  PCI: 00:1e.2: enabled 0

 2188 13:48:45.569204  PCI: 00:1e.3: enabled 1

 2189 13:48:45.572628  PCI: 00:1f.0: enabled 1

 2190 13:48:45.575899  PCI: 00:1f.1: enabled 0

 2191 13:48:45.576409  PCI: 00:1f.2: enabled 1

 2192 13:48:45.578716  PCI: 00:1f.3: enabled 1

 2193 13:48:45.582361  PCI: 00:1f.4: enabled 0

 2194 13:48:45.585711  PCI: 00:1f.5: enabled 1

 2195 13:48:45.586135  PCI: 00:1f.6: enabled 0

 2196 13:48:45.589219  PCI: 00:1f.7: enabled 0

 2197 13:48:45.592189  GENERIC: 0.0: enabled 1

 2198 13:48:45.592614  GENERIC: 0.0: enabled 1

 2199 13:48:45.595620  GENERIC: 1.0: enabled 1

 2200 13:48:45.598943  GENERIC: 0.0: enabled 1

 2201 13:48:45.602236  GENERIC: 1.0: enabled 1

 2202 13:48:45.602657  USB0 port 0: enabled 1

 2203 13:48:45.605636  USB0 port 0: enabled 1

 2204 13:48:45.609132  GENERIC: 0.0: enabled 1

 2205 13:48:45.612433  I2C: 00:1a: enabled 1

 2206 13:48:45.612941  I2C: 00:31: enabled 1

 2207 13:48:45.615445  I2C: 00:32: enabled 1

 2208 13:48:45.618878  I2C: 00:50: enabled 1

 2209 13:48:45.619377  I2C: 00:10: enabled 1

 2210 13:48:45.622498  I2C: 00:15: enabled 1

 2211 13:48:45.625609  I2C: 00:2c: enabled 1

 2212 13:48:45.626029  GENERIC: 0.0: enabled 1

 2213 13:48:45.629192  SPI: 00: enabled 1

 2214 13:48:45.632286  PNP: 0c09.0: enabled 1

 2215 13:48:45.632794  GENERIC: 0.0: enabled 1

 2216 13:48:45.635583  USB3 port 0: enabled 1

 2217 13:48:45.638861  USB3 port 1: enabled 0

 2218 13:48:45.639373  USB3 port 2: enabled 1

 2219 13:48:45.642225  USB3 port 3: enabled 0

 2220 13:48:45.645480  USB2 port 0: enabled 1

 2221 13:48:45.648812  USB2 port 1: enabled 0

 2222 13:48:45.649267  USB2 port 2: enabled 1

 2223 13:48:45.652058  USB2 port 3: enabled 0

 2224 13:48:45.655357  USB2 port 4: enabled 0

 2225 13:48:45.655781  USB2 port 5: enabled 1

 2226 13:48:45.658668  USB2 port 6: enabled 0

 2227 13:48:45.662046  USB2 port 7: enabled 0

 2228 13:48:45.665425  USB2 port 8: enabled 1

 2229 13:48:45.665846  USB2 port 9: enabled 1

 2230 13:48:45.668886  USB3 port 0: enabled 1

 2231 13:48:45.672186  USB3 port 1: enabled 0

 2232 13:48:45.672610  USB3 port 2: enabled 0

 2233 13:48:45.675312  USB3 port 3: enabled 0

 2234 13:48:45.678681  GENERIC: 0.0: enabled 1

 2235 13:48:45.681850  GENERIC: 1.0: enabled 1

 2236 13:48:45.682323  APIC: 00: enabled 1

 2237 13:48:45.685460  APIC: 16: enabled 1

 2238 13:48:45.685977  APIC: 10: enabled 1

 2239 13:48:45.688674  APIC: 12: enabled 1

 2240 13:48:45.692184  APIC: 14: enabled 1

 2241 13:48:45.692692  APIC: 09: enabled 1

 2242 13:48:45.695051  APIC: 01: enabled 1

 2243 13:48:45.695474  APIC: 08: enabled 1

 2244 13:48:45.698700  PCI: 01:00.0: enabled 1

 2245 13:48:45.705031  BS: BS_DEV_INIT run times (exec / console): 14 / 1133 ms

 2246 13:48:45.708682  FMAP: area RW_ELOG found @ f20000 (16384 bytes)

 2247 13:48:45.711710  ELOG: NV offset 0xf20000 size 0x4000

 2248 13:48:45.720430  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 2249 13:48:45.727626  ELOG: Event(17) added with size 13 at 2023-08-16 13:48:55 UTC

 2250 13:48:45.734197  ELOG: Event(9E) added with size 10 at 2023-08-16 13:48:55 UTC

 2251 13:48:45.740950  ELOG: Event(9F) added with size 14 at 2023-08-16 13:48:55 UTC

 2252 13:48:45.747342  BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms

 2253 13:48:45.753801  ELOG: Event(A0) added with size 9 at 2023-08-16 13:48:55 UTC

 2254 13:48:45.757209  elog_add_boot_reason: Logged dev mode boot

 2255 13:48:45.763751  BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms

 2256 13:48:45.764233  Finalize devices...

 2257 13:48:45.766907  PCI: 00:16.0 final

 2258 13:48:45.770675  PCI: 00:1f.2 final

 2259 13:48:45.771195  GENERIC: 0.0 final

 2260 13:48:45.777267  added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0

 2261 13:48:45.780357  GENERIC: 1.0 final

 2262 13:48:45.783783  added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0

 2263 13:48:45.787080  Devices finalized

 2264 13:48:45.793891  BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms

 2265 13:48:45.797072  FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)

 2266 13:48:45.803467  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 2267 13:48:45.807244  ME: HFSTS1                      : 0x90000245

 2268 13:48:45.813600  ME: HFSTS2                      : 0x82100116

 2269 13:48:45.816813  ME: HFSTS3                      : 0x00000050

 2270 13:48:45.823811  ME: HFSTS4                      : 0x00004000

 2271 13:48:45.827369  ME: HFSTS5                      : 0x00000000

 2272 13:48:45.830483  ME: HFSTS6                      : 0x40600006

 2273 13:48:45.833377  ME: Manufacturing Mode          : NO

 2274 13:48:45.836700  ME: SPI Protection Mode Enabled : YES

 2275 13:48:45.843485  ME: FPFs Committed              : YES

 2276 13:48:45.846903  ME: Manufacturing Vars Locked   : YES

 2277 13:48:45.850001  ME: FW Partition Table          : OK

 2278 13:48:45.853379  ME: Bringup Loader Failure      : NO

 2279 13:48:45.856685  ME: Firmware Init Complete      : YES

 2280 13:48:45.859919  ME: Boot Options Present        : NO

 2281 13:48:45.863679  ME: Update In Progress          : NO

 2282 13:48:45.870113  ME: D0i3 Support                : YES

 2283 13:48:45.873428  ME: Low Power State Enabled     : NO

 2284 13:48:45.876520  ME: CPU Replaced                : YES

 2285 13:48:45.880198  ME: CPU Replacement Valid       : YES

 2286 13:48:45.883258  ME: Current Working State       : 5

 2287 13:48:45.886584  ME: Current Operation State     : 1

 2288 13:48:45.890149  ME: Current Operation Mode      : 0

 2289 13:48:45.893450  ME: Error Code                  : 0

 2290 13:48:45.896704  ME: Enhanced Debug Mode         : NO

 2291 13:48:45.903213  ME: CPU Debug Disabled          : YES

 2292 13:48:45.906366  ME: TXT Support                 : NO

 2293 13:48:45.909670  ME: WP for RO is enabled        : YES

 2294 13:48:45.916585  ME: RO write protection scope - Start=0x1000, End=0x15AFFF

 2295 13:48:45.919764  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms

 2296 13:48:45.926634  Ramoops buffer: 0x100000@0x76899000.

 2297 13:48:45.929638  BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms

 2298 13:48:45.939889  CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c

 2299 13:48:45.943657  CBFS: 'fallback/slic' not found.

 2300 13:48:45.946446  ACPI: Writing ACPI tables at 7686d000.

 2301 13:48:45.946967  ACPI:    * FACS

 2302 13:48:45.949855  ACPI:    * DSDT

 2303 13:48:45.956549  PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000

 2304 13:48:45.960038  ACPI:    * FADT

 2305 13:48:45.960555  SCI is IRQ9

 2306 13:48:45.962819  ACPI: added table 1/32, length now 40

 2307 13:48:45.966107  ACPI:     * SSDT

 2308 13:48:45.973299  Found 1 CPU(s) with 6/8 physical/logical core(s) each.

 2309 13:48:45.976309  \_SB.PCI0.PEPD: Intel Power Engine Plug-in

 2310 13:48:45.982967  \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2

 2311 13:48:45.986112  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 2312 13:48:45.992703  CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4

 2313 13:48:45.996253  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 2314 13:48:46.002730  \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0

 2315 13:48:46.009595  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 2316 13:48:46.012597  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 2317 13:48:46.019658  \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50

 2318 13:48:46.022493  \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10

 2319 13:48:46.029587  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 2320 13:48:46.032775  \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c

 2321 13:48:46.036200  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 2322 13:48:46.044767  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 2323 13:48:46.047994  PS2K: Passing 80 keymaps to kernel

 2324 13:48:46.054447  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 2325 13:48:46.061314  \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2

 2326 13:48:46.067792  \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0

 2327 13:48:46.074254  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 2328 13:48:46.080971  \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5

 2329 13:48:46.087934  \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8

 2330 13:48:46.091160  \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9

 2331 13:48:46.097635  \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0

 2332 13:48:46.104171  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 2333 13:48:46.110943  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 2334 13:48:46.113964  ACPI: added table 2/32, length now 44

 2335 13:48:46.117460  ACPI:    * MCFG

 2336 13:48:46.120971  ACPI: added table 3/32, length now 48

 2337 13:48:46.121453  ACPI:    * TPM2

 2338 13:48:46.123937  TPM2 log created at 0x7685d000

 2339 13:48:46.130644  ACPI: added table 4/32, length now 52

 2340 13:48:46.131065  ACPI:     * LPIT

 2341 13:48:46.133718  ACPI: added table 5/32, length now 56

 2342 13:48:46.137457  ACPI:    * MADT

 2343 13:48:46.137979  SCI is IRQ9

 2344 13:48:46.141085  ACPI: added table 6/32, length now 60

 2345 13:48:46.144336  cmd_reg from pmc_make_ipc_cmd 1052838

 2346 13:48:46.150708  CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc

 2347 13:48:46.157632  CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200

 2348 13:48:46.164036  CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00

 2349 13:48:46.167780  PMC CrashLog size in discovery mode: 0xC00

 2350 13:48:46.170408  cpu crashlog bar addr: 0x80640000

 2351 13:48:46.174181  cpu discovery table offset: 0x6030

 2352 13:48:46.180514  cpu_crashlog_discovery_table buffer count: 0x3

 2353 13:48:46.187505  cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0

 2354 13:48:46.194051  cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000

 2355 13:48:46.200412  cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000

 2356 13:48:46.204079  PMC crashLog size in discovery mode : 0xC00

 2357 13:48:46.210432  Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.

 2358 13:48:46.217439  discover mode PMC crashlog size adjusted to: 0x200

 2359 13:48:46.223658  Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.

 2360 13:48:46.227237  discover mode PMC crashlog size adjusted to: 0x0

 2361 13:48:46.230556  m_cpu_crashLog_size : 0x3480 bytes

 2362 13:48:46.233598  CPU crashLog present.

 2363 13:48:46.237183  CPU crash data size: 0x3480 bytes in 0x3 region(s).

 2364 13:48:46.243772  Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.

 2365 13:48:46.247348  current = 76876550

 2366 13:48:46.250569  ACPI:    * DMAR

 2367 13:48:46.253456  ACPI: added table 7/32, length now 64

 2368 13:48:46.256801  ACPI: added table 8/32, length now 68

 2369 13:48:46.257270  ACPI:    * HPET

 2370 13:48:46.263850  ACPI: added table 9/32, length now 72

 2371 13:48:46.264352  ACPI: done.

 2372 13:48:46.266859  ACPI tables: 38528 bytes.

 2373 13:48:46.270886  smbios_write_tables: 76857000

 2374 13:48:46.273843  EC returned error result code 3

 2375 13:48:46.277588  Couldn't obtain OEM name from CBI

 2376 13:48:46.280688  Create SMBIOS type 16

 2377 13:48:46.281153  Create SMBIOS type 17

 2378 13:48:46.283849  Create SMBIOS type 20

 2379 13:48:46.287630  GENERIC: 0.0 (WIFI Device)

 2380 13:48:46.290667  SMBIOS tables: 2156 bytes.

 2381 13:48:46.294246  Writing table forward entry at 0x00000500

 2382 13:48:46.300673  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955

 2383 13:48:46.304056  Writing coreboot table at 0x76891000

 2384 13:48:46.310810   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 2385 13:48:46.313675   1. 0000000000001000-000000000009ffff: RAM

 2386 13:48:46.317302   2. 00000000000a0000-00000000000fffff: RESERVED

 2387 13:48:46.323835   3. 0000000000100000-0000000076856fff: RAM

 2388 13:48:46.327474   4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES

 2389 13:48:46.333950   5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE

 2390 13:48:46.340272   6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES

 2391 13:48:46.343630   7. 0000000077000000-00000000803fffff: RESERVED

 2392 13:48:46.350626   8. 00000000c0000000-00000000cfffffff: RESERVED

 2393 13:48:46.353655   9. 00000000f8000000-00000000f9ffffff: RESERVED

 2394 13:48:46.357463  10. 00000000fb000000-00000000fb000fff: RESERVED

 2395 13:48:46.363420  11. 00000000fc800000-00000000fe7fffff: RESERVED

 2396 13:48:46.367379  12. 00000000feb00000-00000000feb7ffff: RESERVED

 2397 13:48:46.373529  13. 00000000fec00000-00000000fecfffff: RESERVED

 2398 13:48:46.376646  14. 00000000fed40000-00000000fed6ffff: RESERVED

 2399 13:48:46.383367  15. 00000000fed80000-00000000fed87fff: RESERVED

 2400 13:48:46.387250  16. 00000000fed90000-00000000fed92fff: RESERVED

 2401 13:48:46.393723  17. 00000000feda0000-00000000feda1fff: RESERVED

 2402 13:48:46.397515  18. 00000000fedc0000-00000000feddffff: RESERVED

 2403 13:48:46.400539  19. 0000000100000000-000000027fbfffff: RAM

 2404 13:48:46.403743  Passing 4 GPIOs to payload:

 2405 13:48:46.410107              NAME |       PORT | POLARITY |     VALUE

 2406 13:48:46.413853               lid |  undefined |     high |      high

 2407 13:48:46.420177             power |  undefined |     high |       low

 2408 13:48:46.427115             oprom |  undefined |     high |       low

 2409 13:48:46.430506          EC in RW | 0x00000151 |     high |      high

 2410 13:48:46.431019  Board ID: 3

 2411 13:48:46.433246  FW config: 0x131

 2412 13:48:46.439863  Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum f243

 2413 13:48:46.443650  coreboot table: 1748 bytes.

 2414 13:48:46.446871  IMD ROOT    0. 0x76fff000 0x00001000

 2415 13:48:46.449870  IMD SMALL   1. 0x76ffe000 0x00001000

 2416 13:48:46.453679  FSP MEMORY  2. 0x76afe000 0x00500000

 2417 13:48:46.456837  CONSOLE     3. 0x76ade000 0x00020000

 2418 13:48:46.460045  RW MCACHE   4. 0x76add000 0x0000043c

 2419 13:48:46.463810  RO MCACHE   5. 0x76adc000 0x00000fd8

 2420 13:48:46.470203  FMAP        6. 0x76adb000 0x0000064a

 2421 13:48:46.473683  TIME STAMP  7. 0x76ada000 0x00000910

 2422 13:48:46.476898  VBOOT WORK  8. 0x76ac6000 0x00014000

 2423 13:48:46.480134  MEM INFO    9. 0x76ac5000 0x000003b8

 2424 13:48:46.483140  ROMSTG STCK10. 0x76ac4000 0x00001000

 2425 13:48:46.486602  AFTER CAR  11. 0x76ab8000 0x0000c000

 2426 13:48:46.490159  RAMSTAGE   12. 0x76a2e000 0x0008a000

 2427 13:48:46.493446  ACPI BERT  13. 0x76a1e000 0x00010000

 2428 13:48:46.500419  CHROMEOS NVS14. 0x76a1d000 0x00000f00

 2429 13:48:46.503672  REFCODE    15. 0x769ae000 0x0006f000

 2430 13:48:46.506736  SMM BACKUP 16. 0x7699e000 0x00010000

 2431 13:48:46.509966  IGD OPREGION17. 0x76999000 0x00004203

 2432 13:48:46.513244  RAMOOPS    18. 0x76899000 0x00100000

 2433 13:48:46.516993  COREBOOT   19. 0x76891000 0x00008000

 2434 13:48:46.520193  ACPI       20. 0x7686d000 0x00024000

 2435 13:48:46.523791  TPM2 TCGLOG21. 0x7685d000 0x00010000

 2436 13:48:46.530319  PMC CRASHLOG22. 0x7685c000 0x00000c00

 2437 13:48:46.533429  CPU CRASHLOG23. 0x76858000 0x00003480

 2438 13:48:46.536672  SMBIOS     24. 0x76857000 0x00001000

 2439 13:48:46.537090  IMD small region:

 2440 13:48:46.543522    IMD ROOT    0. 0x76ffec00 0x00000400

 2441 13:48:46.547073    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 2442 13:48:46.550398    POWER STATE 2. 0x76ffeb80 0x00000044

 2443 13:48:46.553931    ROMSTAGE    3. 0x76ffeb60 0x00000004

 2444 13:48:46.556684    ACPI GNVS   4. 0x76ffeb00 0x00000048

 2445 13:48:46.559814    TYPE_C INFO 5. 0x76ffeae0 0x0000000c

 2446 13:48:46.566840  BS: BS_WRITE_TABLES run times (exec / console): 6 / 624 ms

 2447 13:48:46.570191  MTRR: Physical address space:

 2448 13:48:46.576706  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 2449 13:48:46.583186  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 2450 13:48:46.589998  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 2451 13:48:46.596573  0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0

 2452 13:48:46.603014  0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1

 2453 13:48:46.606786  0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0

 2454 13:48:46.613401  0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6

 2455 13:48:46.619899  MTRR: Fixed MSR 0x250 0x0606060606060606

 2456 13:48:46.623174  MTRR: Fixed MSR 0x258 0x0606060606060606

 2457 13:48:46.626585  MTRR: Fixed MSR 0x259 0x0000000000000000

 2458 13:48:46.629743  MTRR: Fixed MSR 0x268 0x0606060606060606

 2459 13:48:46.636610  MTRR: Fixed MSR 0x269 0x0606060606060606

 2460 13:48:46.639853  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2461 13:48:46.643334  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2462 13:48:46.646656  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2463 13:48:46.649536  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2464 13:48:46.655970  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2465 13:48:46.659797  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2466 13:48:46.662670  call enable_fixed_mtrr()

 2467 13:48:46.665874  CPU physical address size: 39 bits

 2468 13:48:46.672650  MTRR: default type WB/UC MTRR counts: 6/6.

 2469 13:48:46.676194  MTRR: UC selected as default type.

 2470 13:48:46.679233  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2471 13:48:46.686297  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2472 13:48:46.692890  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2473 13:48:46.699502  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1

 2474 13:48:46.705910  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2475 13:48:46.712396  MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 2476 13:48:46.719319  MTRR: Fixed MSR 0x250 0x0606060606060606

 2477 13:48:46.722639  MTRR: Fixed MSR 0x258 0x0606060606060606

 2478 13:48:46.725916  MTRR: Fixed MSR 0x259 0x0000000000000000

 2479 13:48:46.729008  MTRR: Fixed MSR 0x268 0x0606060606060606

 2480 13:48:46.735834  MTRR: Fixed MSR 0x269 0x0606060606060606

 2481 13:48:46.739202  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2482 13:48:46.742691  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2483 13:48:46.745705  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2484 13:48:46.748886  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2485 13:48:46.755703  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2486 13:48:46.758705  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2487 13:48:46.762319  MTRR: Fixed MSR 0x250 0x0606060606060606

 2488 13:48:46.765476  MTRR: Fixed MSR 0x250 0x0606060606060606

 2489 13:48:46.768686  call enable_fixed_mtrr()

 2490 13:48:46.772014  MTRR: Fixed MSR 0x250 0x0606060606060606

 2491 13:48:46.778800  MTRR: Fixed MSR 0x258 0x0606060606060606

 2492 13:48:46.782079  MTRR: Fixed MSR 0x259 0x0000000000000000

 2493 13:48:46.785295  MTRR: Fixed MSR 0x268 0x0606060606060606

 2494 13:48:46.789174  MTRR: Fixed MSR 0x269 0x0606060606060606

 2495 13:48:46.795742  MTRR: Fixed MSR 0x250 0x0606060606060606

 2496 13:48:46.799164  MTRR: Fixed MSR 0x250 0x0606060606060606

 2497 13:48:46.802053  MTRR: Fixed MSR 0x250 0x0606060606060606

 2498 13:48:46.805161  CPU physical address size: 39 bits

 2499 13:48:46.808598  MTRR: Fixed MSR 0x258 0x0606060606060606

 2500 13:48:46.815169  MTRR: Fixed MSR 0x258 0x0606060606060606

 2501 13:48:46.818576  MTRR: Fixed MSR 0x259 0x0000000000000000

 2502 13:48:46.821726  MTRR: Fixed MSR 0x268 0x0606060606060606

 2503 13:48:46.825460  MTRR: Fixed MSR 0x269 0x0606060606060606

 2504 13:48:46.831988  MTRR: Fixed MSR 0x258 0x0606060606060606

 2505 13:48:46.835517  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2506 13:48:46.838647  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2507 13:48:46.842061  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2508 13:48:46.845239  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2509 13:48:46.851930  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2510 13:48:46.855252  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2511 13:48:46.858234  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2512 13:48:46.861975  call enable_fixed_mtrr()

 2513 13:48:46.865250  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2514 13:48:46.868247  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2515 13:48:46.874745  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2516 13:48:46.878066  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2517 13:48:46.881629  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2518 13:48:46.884707  CPU physical address size: 39 bits

 2519 13:48:46.888117  call enable_fixed_mtrr()

 2520 13:48:46.891328  MTRR: Fixed MSR 0x259 0x0000000000000000

 2521 13:48:46.895354  MTRR: Fixed MSR 0x259 0x0000000000000000

 2522 13:48:46.901382  MTRR: Fixed MSR 0x258 0x0606060606060606

 2523 13:48:46.904800  CPU physical address size: 39 bits

 2524 13:48:46.907831  MTRR: Fixed MSR 0x268 0x0606060606060606

 2525 13:48:46.911350  MTRR: Fixed MSR 0x259 0x0000000000000000

 2526 13:48:46.914732  MTRR: Fixed MSR 0x268 0x0606060606060606

 2527 13:48:46.921468  MTRR: Fixed MSR 0x269 0x0606060606060606

 2528 13:48:46.924550  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2529 13:48:46.927851  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2530 13:48:46.931561  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2531 13:48:46.937804  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2532 13:48:46.941410  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2533 13:48:46.944528  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2534 13:48:46.947822  MTRR: Fixed MSR 0x269 0x0606060606060606

 2535 13:48:46.951297  call enable_fixed_mtrr()

 2536 13:48:46.954469  MTRR: Fixed MSR 0x268 0x0606060606060606

 2537 13:48:46.958079  CPU physical address size: 39 bits

 2538 13:48:46.964720  MTRR: Fixed MSR 0x269 0x0606060606060606

 2539 13:48:46.967822  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2540 13:48:46.971541  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2541 13:48:46.974323  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2542 13:48:46.980987  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2543 13:48:46.984247  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2544 13:48:46.987660  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2545 13:48:46.991057  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2546 13:48:46.994248  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2547 13:48:47.000970  MTRR: Fixed MSR 0x258 0x0606060606060606

 2548 13:48:47.004338  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2549 13:48:47.007952  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2550 13:48:47.010788  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2551 13:48:47.017511  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2552 13:48:47.021200  MTRR: Fixed MSR 0x259 0x0000000000000000

 2553 13:48:47.023886  call enable_fixed_mtrr()

 2554 13:48:47.027334  MTRR: Fixed MSR 0x268 0x0606060606060606

 2555 13:48:47.030652  MTRR: Fixed MSR 0x269 0x0606060606060606

 2556 13:48:47.034254  CPU physical address size: 39 bits

 2557 13:48:47.037270  call enable_fixed_mtrr()

 2558 13:48:47.040975  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2559 13:48:47.044140  CPU physical address size: 39 bits

 2560 13:48:47.047377  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2561 13:48:47.053756  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2562 13:48:47.057244  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2563 13:48:47.060837  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2564 13:48:47.063751  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2565 13:48:47.068642  call enable_fixed_mtrr()

 2566 13:48:47.071889  CPU physical address size: 39 bits

 2567 13:48:47.076019  

 2568 13:48:47.076480  MTRR check

 2569 13:48:47.079394  Fixed MTRRs   : Enabled

 2570 13:48:47.079874  Variable MTRRs: Enabled

 2571 13:48:47.080209  

 2572 13:48:47.086126  BS: BS_WRITE_TABLES exit times (exec / console): 253 / 150 ms

 2573 13:48:47.089414  Checking cr50 for pending updates

 2574 13:48:47.101749  Reading cr50 TPM mode

 2575 13:48:47.116781  BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms

 2576 13:48:47.126774  CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c

 2577 13:48:47.130249  Checking segment from ROM address 0xf96cbe6c

 2578 13:48:47.133785  Checking segment from ROM address 0xf96cbe88

 2579 13:48:47.140369  Loading segment from ROM address 0xf96cbe6c

 2580 13:48:47.140846    code (compression=1)

 2581 13:48:47.150465    New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca

 2582 13:48:47.157260  Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca

 2583 13:48:47.160346  using LZMA

 2584 13:48:47.182123  [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4

 2585 13:48:47.188743  Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c

 2586 13:48:47.197439  Loading segment from ROM address 0xf96cbe88

 2587 13:48:47.200277    Entry Point 0x30000000

 2588 13:48:47.200688  Loaded segments

 2589 13:48:47.206891  BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms

 2590 13:48:47.213695  BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms

 2591 13:48:47.216797  Finalizing chipset.

 2592 13:48:47.217253  apm_control: Finalizing SMM.

 2593 13:48:47.220482  APMC done.

 2594 13:48:47.223854  HECI: CSE device 16.1 is disabled

 2595 13:48:47.226962  HECI: CSE device 16.2 is disabled

 2596 13:48:47.230327  HECI: CSE device 16.3 is disabled

 2597 13:48:47.233772  HECI: CSE device 16.4 is disabled

 2598 13:48:47.237045  HECI: CSE device 16.5 is disabled

 2599 13:48:47.240065  HECI: Sending End-of-Post

 2600 13:48:47.248667  CSE: EOP requested action: continue boot

 2601 13:48:47.251519  CSE EOP successful, continuing boot

 2602 13:48:47.258352  BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms

 2603 13:48:47.261977  mp_park_aps done after 0 msecs.

 2604 13:48:47.265147  Jumping to boot code at 0x30000000(0x76891000)

 2605 13:48:47.275221  CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes

 2606 13:48:47.279445  

 2607 13:48:47.279931  

 2608 13:48:47.280257  

 2609 13:48:47.282335  Starting depthcharge on Volmar...

 2610 13:48:47.282771  

 2611 13:48:47.284399  end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
 2612 13:48:47.284902  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2613 13:48:47.285341  Setting prompt string to ['brya:']
 2614 13:48:47.285815  bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
 2615 13:48:47.288929  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2616 13:48:47.289378  

 2617 13:48:47.295528  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2618 13:48:47.296099  

 2619 13:48:47.302234  Looking for NVMe Controller 0x300653d8 @ 00:06:00

 2620 13:48:47.302820  

 2621 13:48:47.305655  configure_storage: Failed to remap 1C:2

 2622 13:48:47.306098  

 2623 13:48:47.309039  Wipe memory regions:

 2624 13:48:47.309585  

 2625 13:48:47.312069  	[0x00000000001000, 0x000000000a0000)

 2626 13:48:47.312520  

 2627 13:48:47.315543  	[0x00000000100000, 0x00000030000000)

 2628 13:48:47.418749  

 2629 13:48:47.422097  	[0x00000032668e60, 0x00000076857000)

 2630 13:48:47.566168  

 2631 13:48:47.569316  	[0x00000100000000, 0x0000027fc00000)

 2632 13:48:48.379724  

 2633 13:48:48.382991  ec_init: CrosEC protocol v3 supported (256, 256)

 2634 13:48:48.991285  

 2635 13:48:48.991758  R8152: Initializing

 2636 13:48:48.992089  

 2637 13:48:48.994629  Version 9 (ocp_data = 6010)

 2638 13:48:48.995039  

 2639 13:48:48.997999  R8152: Done initializing

 2640 13:48:48.998489  

 2641 13:48:49.001265  Adding net device

 2642 13:48:49.302187  

 2643 13:48:49.305571  [firmware-brya-14505.B-collabora] Feb  7 2023 16:06:26

 2644 13:48:49.306084  

 2645 13:48:49.306414  

 2646 13:48:49.306718  

 2647 13:48:49.307493  Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2649 13:48:49.408690  brya: tftpboot 192.168.201.1 11299547/tftp-deploy-maozvy8_/kernel/bzImage 11299547/tftp-deploy-maozvy8_/kernel/cmdline 11299547/tftp-deploy-maozvy8_/ramdisk/ramdisk.cpio.gz

 2650 13:48:49.409363  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2651 13:48:49.409762  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2652 13:48:49.414054  tftpboot 192.168.201.1 11299547/tftp-deploy-maozvy8_/kernel/bzImploy-maozvy8_/kernel/cmdline 11299547/tftp-deploy-maozvy8_/ramdisk/ramdisk.cpio.gz

 2653 13:48:49.414596  

 2654 13:48:49.414925  Waiting for link

 2655 13:48:49.616814  

 2656 13:48:49.617465  done.

 2657 13:48:49.617813  

 2658 13:48:49.618303  MAC: 00:e0:4c:68:02:be

 2659 13:48:49.618653  

 2660 13:48:49.620035  Sending DHCP discover... done.

 2661 13:48:49.620472  

 2662 13:48:49.623743  Waiting for reply... done.

 2663 13:48:49.624333  

 2664 13:48:49.626495  Sending DHCP request... done.

 2665 13:48:49.626923  

 2666 13:48:49.633417  Waiting for reply... done.

 2667 13:48:49.633884  

 2668 13:48:49.634236  My ip is 192.168.201.17

 2669 13:48:49.634546  

 2670 13:48:49.636810  The DHCP server ip is 192.168.201.1

 2671 13:48:49.640163  

 2672 13:48:49.643729  TFTP server IP predefined by user: 192.168.201.1

 2673 13:48:49.644280  

 2674 13:48:49.650111  Bootfile predefined by user: 11299547/tftp-deploy-maozvy8_/kernel/bzImage

 2675 13:48:49.650695  

 2676 13:48:49.653300  Sending tftp read request... done.

 2677 13:48:49.653726  

 2678 13:48:49.661790  Waiting for the transfer... 

 2679 13:48:49.662304  

 2680 13:48:50.039307  00000000 ################################################################

 2681 13:48:50.039437  

 2682 13:48:50.323354  00080000 ################################################################

 2683 13:48:50.323505  

 2684 13:48:50.602262  00100000 ################################################################

 2685 13:48:50.602386  

 2686 13:48:50.882755  00180000 ################################################################

 2687 13:48:50.882882  

 2688 13:48:51.163258  00200000 ################################################################

 2689 13:48:51.163384  

 2690 13:48:51.442264  00280000 ################################################################

 2691 13:48:51.442393  

 2692 13:48:51.701158  00300000 ################################################################

 2693 13:48:51.701283  

 2694 13:48:51.949186  00380000 ################################################################

 2695 13:48:51.949308  

 2696 13:48:52.208704  00400000 ################################################################

 2697 13:48:52.208836  

 2698 13:48:52.462040  00480000 ################################################################

 2699 13:48:52.462184  

 2700 13:48:52.717085  00500000 ################################################################

 2701 13:48:52.717220  

 2702 13:48:52.965382  00580000 ################################################################

 2703 13:48:52.965528  

 2704 13:48:53.214696  00600000 ################################################################

 2705 13:48:53.214842  

 2706 13:48:53.475063  00680000 ################################################################

 2707 13:48:53.475225  

 2708 13:48:53.735735  00700000 ################################################################

 2709 13:48:53.735884  

 2710 13:48:53.989988  00780000 ################################################################

 2711 13:48:53.990142  

 2712 13:48:54.041325  00800000 ############## done.

 2713 13:48:54.041416  

 2714 13:48:54.045324  The bootfile was 8499088 bytes long.

 2715 13:48:54.045840  

 2716 13:48:54.048465  Sending tftp read request... done.

 2717 13:48:54.048881  

 2718 13:48:54.051864  Waiting for the transfer... 

 2719 13:48:54.052280  

 2720 13:48:54.455990  00000000 ################################################################

 2721 13:48:54.456481  

 2722 13:48:54.853416  00080000 ################################################################

 2723 13:48:54.853926  

 2724 13:48:55.256222  00100000 ################################################################

 2725 13:48:55.256715  

 2726 13:48:55.636344  00180000 ################################################################

 2727 13:48:55.636479  

 2728 13:48:55.897760  00200000 ################################################################

 2729 13:48:55.897888  

 2730 13:48:56.146026  00280000 ################################################################

 2731 13:48:56.146148  

 2732 13:48:56.394539  00300000 ################################################################

 2733 13:48:56.394668  

 2734 13:48:56.642561  00380000 ################################################################

 2735 13:48:56.642682  

 2736 13:48:56.890965  00400000 ################################################################

 2737 13:48:56.891088  

 2738 13:48:57.139633  00480000 ################################################################

 2739 13:48:57.139750  

 2740 13:48:57.387898  00500000 ################################################################

 2741 13:48:57.388024  

 2742 13:48:57.653498  00580000 ################################################################

 2743 13:48:57.653636  

 2744 13:48:57.901613  00600000 ################################################################

 2745 13:48:57.901739  

 2746 13:48:58.150442  00680000 ################################################################

 2747 13:48:58.150569  

 2748 13:48:58.402059  00700000 ################################################################

 2749 13:48:58.402191  

 2750 13:48:58.655812  00780000 ################################################################

 2751 13:48:58.655944  

 2752 13:48:58.865547  00800000 ####################################################### done.

 2753 13:48:58.865668  

 2754 13:48:58.868805  Sending tftp read request... done.

 2755 13:48:58.868902  

 2756 13:48:58.872225  Waiting for the transfer... 

 2757 13:48:58.872317  

 2758 13:48:58.872409  00000000 # done.

 2759 13:48:58.872498  

 2760 13:48:58.882517  Command line loaded dynamically from TFTP file: 11299547/tftp-deploy-maozvy8_/kernel/cmdline

 2761 13:48:58.883064  

 2762 13:48:58.899098  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2763 13:48:58.903325  

 2764 13:48:58.906697  Shutting down all USB controllers.

 2765 13:48:58.907201  

 2766 13:48:58.907637  Removing current net device

 2767 13:48:58.908120  

 2768 13:48:58.910156  Finalizing coreboot

 2769 13:48:58.910576  

 2770 13:48:58.916681  Exiting depthcharge with code 4 at timestamp: 21871736

 2771 13:48:58.917134  

 2772 13:48:58.917475  

 2773 13:48:58.917787  Starting kernel ...

 2774 13:48:58.918084  

 2775 13:48:58.918374  

 2776 13:48:58.919534  end: 2.2.4 bootloader-commands (duration 00:00:12) [common]
 2777 13:48:58.920060  start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
 2778 13:48:58.920482  Setting prompt string to ['Linux version [0-9]']
 2779 13:48:58.920919  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2780 13:48:58.921382  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2782 13:53:27.921130  end: 2.2.5 auto-login-action (duration 00:04:29) [common]
 2784 13:53:27.922742  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
 2786 13:53:27.923990  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2789 13:53:27.925658  end: 2 depthcharge-action (duration 00:05:00) [common]
 2791 13:53:27.925882  Cleaning after the job
 2792 13:53:27.925973  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299547/tftp-deploy-maozvy8_/ramdisk
 2793 13:53:27.927284  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299547/tftp-deploy-maozvy8_/kernel
 2794 13:53:27.928621  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299547/tftp-deploy-maozvy8_/modules
 2795 13:53:27.928959  start: 5.1 power-off (timeout 00:00:30) [common]
 2796 13:53:27.929128  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-6' '--port=1' '--command=off'
 2797 13:53:28.009373  >> Command sent successfully.

 2798 13:53:28.013806  Returned 0 in 0 seconds
 2799 13:53:28.114693  end: 5.1 power-off (duration 00:00:00) [common]
 2801 13:53:28.116182  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2802 13:53:28.117481  Listened to connection for namespace 'common' for up to 1s
 2804 13:53:28.118791  Listened to connection for namespace 'common' for up to 1s
 2805 13:53:29.117231  Finalising connection for namespace 'common'
 2806 13:53:29.117503  Disconnecting from shell: Finalise
 2807 13:53:29.117641  
 2808 13:53:29.218289  end: 5.2 read-feedback (duration 00:00:01) [common]
 2809 13:53:29.218853  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11299547
 2810 13:53:29.259325  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11299547
 2811 13:53:29.259586  JobError: Your job cannot terminate cleanly.