Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 13:49:44.727548 lava-dispatcher, installed at version: 2023.06
2 13:49:44.727821 start: 0 validate
3 13:49:44.727966 Start time: 2023-08-16 13:49:44.727957+00:00 (UTC)
4 13:49:44.728112 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:49:44.728270 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 13:49:44.979542 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:49:44.980018 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2312-g74888f4b13f0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:49:49.488870 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:49:49.489610 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2312-g74888f4b13f0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 13:49:49.749337 validate duration: 5.02
12 13:49:49.750613 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 13:49:49.751149 start: 1.1 download-retry (timeout 00:10:00) [common]
14 13:49:49.751674 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 13:49:49.752390 Not decompressing ramdisk as can be used compressed.
16 13:49:49.752870 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 13:49:49.753261 saving as /var/lib/lava/dispatcher/tmp/11299535/tftp-deploy-zrcize2z/ramdisk/rootfs.cpio.gz
18 13:49:49.753624 total size: 8418130 (8 MB)
19 13:49:50.244049 progress 0 % (0 MB)
20 13:49:50.257736 progress 5 % (0 MB)
21 13:49:50.270591 progress 10 % (0 MB)
22 13:49:50.279620 progress 15 % (1 MB)
23 13:49:50.285469 progress 20 % (1 MB)
24 13:49:50.290195 progress 25 % (2 MB)
25 13:49:50.294361 progress 30 % (2 MB)
26 13:49:50.297670 progress 35 % (2 MB)
27 13:49:50.300982 progress 40 % (3 MB)
28 13:49:50.304189 progress 45 % (3 MB)
29 13:49:50.307000 progress 50 % (4 MB)
30 13:49:50.309714 progress 55 % (4 MB)
31 13:49:50.312383 progress 60 % (4 MB)
32 13:49:50.314735 progress 65 % (5 MB)
33 13:49:50.317050 progress 70 % (5 MB)
34 13:49:50.319308 progress 75 % (6 MB)
35 13:49:50.321518 progress 80 % (6 MB)
36 13:49:50.323764 progress 85 % (6 MB)
37 13:49:50.325954 progress 90 % (7 MB)
38 13:49:50.328215 progress 95 % (7 MB)
39 13:49:50.330227 progress 100 % (8 MB)
40 13:49:50.330525 8 MB downloaded in 0.58 s (13.92 MB/s)
41 13:49:50.330683 end: 1.1.1 http-download (duration 00:00:01) [common]
43 13:49:50.330918 end: 1.1 download-retry (duration 00:00:01) [common]
44 13:49:50.331004 start: 1.2 download-retry (timeout 00:09:59) [common]
45 13:49:50.331090 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 13:49:50.331233 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2312-g74888f4b13f0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 13:49:50.331306 saving as /var/lib/lava/dispatcher/tmp/11299535/tftp-deploy-zrcize2z/kernel/bzImage
48 13:49:50.331368 total size: 8499088 (8 MB)
49 13:49:50.331428 No compression specified
50 13:49:50.332688 progress 0 % (0 MB)
51 13:49:50.334990 progress 5 % (0 MB)
52 13:49:50.337354 progress 10 % (0 MB)
53 13:49:50.339740 progress 15 % (1 MB)
54 13:49:50.342029 progress 20 % (1 MB)
55 13:49:50.344433 progress 25 % (2 MB)
56 13:49:50.346696 progress 30 % (2 MB)
57 13:49:50.349029 progress 35 % (2 MB)
58 13:49:50.351282 progress 40 % (3 MB)
59 13:49:50.353601 progress 45 % (3 MB)
60 13:49:50.355915 progress 50 % (4 MB)
61 13:49:50.358288 progress 55 % (4 MB)
62 13:49:50.360592 progress 60 % (4 MB)
63 13:49:50.362806 progress 65 % (5 MB)
64 13:49:50.365021 progress 70 % (5 MB)
65 13:49:50.367249 progress 75 % (6 MB)
66 13:49:50.369465 progress 80 % (6 MB)
67 13:49:50.371709 progress 85 % (6 MB)
68 13:49:50.373924 progress 90 % (7 MB)
69 13:49:50.376142 progress 95 % (7 MB)
70 13:49:50.378365 progress 100 % (8 MB)
71 13:49:50.378519 8 MB downloaded in 0.05 s (171.91 MB/s)
72 13:49:50.378667 end: 1.2.1 http-download (duration 00:00:00) [common]
74 13:49:50.378897 end: 1.2 download-retry (duration 00:00:00) [common]
75 13:49:50.378985 start: 1.3 download-retry (timeout 00:09:59) [common]
76 13:49:50.379070 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 13:49:50.379220 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2312-g74888f4b13f0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 13:49:50.379293 saving as /var/lib/lava/dispatcher/tmp/11299535/tftp-deploy-zrcize2z/modules/modules.tar
79 13:49:50.379355 total size: 253616 (0 MB)
80 13:49:50.379416 Using unxz to decompress xz
81 13:49:50.383833 progress 12 % (0 MB)
82 13:49:50.384254 progress 25 % (0 MB)
83 13:49:50.384497 progress 38 % (0 MB)
84 13:49:50.386094 progress 51 % (0 MB)
85 13:49:50.388056 progress 64 % (0 MB)
86 13:49:50.389850 progress 77 % (0 MB)
87 13:49:50.391742 progress 90 % (0 MB)
88 13:49:50.393472 progress 100 % (0 MB)
89 13:49:50.399153 0 MB downloaded in 0.02 s (12.22 MB/s)
90 13:49:50.399401 end: 1.3.1 http-download (duration 00:00:00) [common]
92 13:49:50.399715 end: 1.3 download-retry (duration 00:00:00) [common]
93 13:49:50.399812 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 13:49:50.399909 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 13:49:50.399992 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 13:49:50.400077 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 13:49:50.400304 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf
98 13:49:50.400442 makedir: /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin
99 13:49:50.400552 makedir: /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/tests
100 13:49:50.400654 makedir: /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/results
101 13:49:50.400774 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-add-keys
102 13:49:50.400927 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-add-sources
103 13:49:50.401063 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-background-process-start
104 13:49:50.401203 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-background-process-stop
105 13:49:50.401332 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-common-functions
106 13:49:50.401468 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-echo-ipv4
107 13:49:50.401660 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-install-packages
108 13:49:50.401848 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-installed-packages
109 13:49:50.401985 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-os-build
110 13:49:50.402115 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-probe-channel
111 13:49:50.402242 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-probe-ip
112 13:49:50.402369 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-target-ip
113 13:49:50.402496 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-target-mac
114 13:49:50.402655 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-target-storage
115 13:49:50.402790 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-test-case
116 13:49:50.402920 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-test-event
117 13:49:50.403046 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-test-feedback
118 13:49:50.403178 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-test-raise
119 13:49:50.403307 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-test-reference
120 13:49:50.403437 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-test-runner
121 13:49:50.403565 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-test-set
122 13:49:50.403730 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-test-shell
123 13:49:50.403861 Updating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-install-packages (oe)
124 13:49:50.404031 Updating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/bin/lava-installed-packages (oe)
125 13:49:50.404167 Creating /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/environment
126 13:49:50.404271 LAVA metadata
127 13:49:50.404347 - LAVA_JOB_ID=11299535
128 13:49:50.404414 - LAVA_DISPATCHER_IP=192.168.201.1
129 13:49:50.404522 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 13:49:50.404593 skipped lava-vland-overlay
131 13:49:50.404672 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 13:49:50.404754 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 13:49:50.404817 skipped lava-multinode-overlay
134 13:49:50.404911 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 13:49:50.404995 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 13:49:50.405069 Loading test definitions
137 13:49:50.405160 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 13:49:50.405241 Using /lava-11299535 at stage 0
139 13:49:50.405554 uuid=11299535_1.4.2.3.1 testdef=None
140 13:49:50.405643 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 13:49:50.405731 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 13:49:50.406273 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 13:49:50.406495 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 13:49:50.407167 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 13:49:50.407405 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 13:49:50.408100 runner path: /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/0/tests/0_dmesg test_uuid 11299535_1.4.2.3.1
149 13:49:50.408259 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 13:49:50.408489 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 13:49:50.408562 Using /lava-11299535 at stage 1
153 13:49:50.408867 uuid=11299535_1.4.2.3.5 testdef=None
154 13:49:50.408956 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 13:49:50.409039 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 13:49:50.409517 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 13:49:50.409735 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 13:49:50.410408 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 13:49:50.410634 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 13:49:50.411286 runner path: /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/1/tests/1_bootrr test_uuid 11299535_1.4.2.3.5
163 13:49:50.411443 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 13:49:50.411698 Creating lava-test-runner.conf files
166 13:49:50.411762 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/0 for stage 0
167 13:49:50.411853 - 0_dmesg
168 13:49:50.411932 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299535/lava-overlay-0xn08zjf/lava-11299535/1 for stage 1
169 13:49:50.412023 - 1_bootrr
170 13:49:50.412118 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 13:49:50.412202 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 13:49:50.420831 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 13:49:50.420950 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 13:49:50.421037 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 13:49:50.421123 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 13:49:50.421209 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 13:49:50.682913 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 13:49:50.683323 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 13:49:50.683484 extracting modules file /var/lib/lava/dispatcher/tmp/11299535/tftp-deploy-zrcize2z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299535/extract-overlay-ramdisk-loghmwfl/ramdisk
180 13:49:50.700254 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 13:49:50.700426 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 13:49:50.700606 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299535/compress-overlay-zyp2ioqa/overlay-1.4.2.4.tar.gz to ramdisk
183 13:49:50.700725 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299535/compress-overlay-zyp2ioqa/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11299535/extract-overlay-ramdisk-loghmwfl/ramdisk
184 13:49:50.710613 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 13:49:50.710792 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 13:49:50.710908 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 13:49:50.710998 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 13:49:50.711082 Building ramdisk /var/lib/lava/dispatcher/tmp/11299535/extract-overlay-ramdisk-loghmwfl/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11299535/extract-overlay-ramdisk-loghmwfl/ramdisk
189 13:49:50.867754 >> 49825 blocks
190 13:49:51.764498 rename /var/lib/lava/dispatcher/tmp/11299535/extract-overlay-ramdisk-loghmwfl/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11299535/tftp-deploy-zrcize2z/ramdisk/ramdisk.cpio.gz
191 13:49:51.765111 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 13:49:51.765313 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 13:49:51.765480 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 13:49:51.765623 No mkimage arch provided, not using FIT.
195 13:49:51.765757 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 13:49:51.765888 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 13:49:51.766043 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 13:49:51.766182 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 13:49:51.766301 No LXC device requested
200 13:49:51.766428 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 13:49:51.766555 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 13:49:51.766673 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 13:49:51.766784 Checking files for TFTP limit of 4294967296 bytes.
204 13:49:51.767337 end: 1 tftp-deploy (duration 00:00:02) [common]
205 13:49:51.767481 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 13:49:51.767622 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 13:49:51.767793 substitutions:
208 13:49:51.767895 - {DTB}: None
209 13:49:51.767994 - {INITRD}: 11299535/tftp-deploy-zrcize2z/ramdisk/ramdisk.cpio.gz
210 13:49:51.768091 - {KERNEL}: 11299535/tftp-deploy-zrcize2z/kernel/bzImage
211 13:49:51.768183 - {LAVA_MAC}: None
212 13:49:51.768272 - {PRESEED_CONFIG}: None
213 13:49:51.768362 - {PRESEED_LOCAL}: None
214 13:49:51.768452 - {RAMDISK}: 11299535/tftp-deploy-zrcize2z/ramdisk/ramdisk.cpio.gz
215 13:49:51.768545 - {ROOT_PART}: None
216 13:49:51.768639 - {ROOT}: None
217 13:49:51.768729 - {SERVER_IP}: 192.168.201.1
218 13:49:51.768819 - {TEE}: None
219 13:49:51.768908 Parsed boot commands:
220 13:49:51.768998 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 13:49:51.769238 Parsed boot commands: tftpboot 192.168.201.1 11299535/tftp-deploy-zrcize2z/kernel/bzImage 11299535/tftp-deploy-zrcize2z/kernel/cmdline 11299535/tftp-deploy-zrcize2z/ramdisk/ramdisk.cpio.gz
222 13:49:51.769369 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 13:49:51.769496 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 13:49:51.769642 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 13:49:51.769774 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 13:49:51.769880 Not connected, no need to disconnect.
227 13:49:51.769995 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 13:49:51.770258 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 13:49:51.770361 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
230 13:49:51.775296 Setting prompt string to ['lava-test: # ']
231 13:49:51.775801 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 13:49:51.775968 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 13:49:51.776113 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 13:49:51.776245 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 13:49:51.776566 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
236 13:49:56.911908 >> Command sent successfully.
237 13:49:56.914614 Returned 0 in 5 seconds
238 13:49:57.015025 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 13:49:57.015457 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 13:49:57.015568 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 13:49:57.015692 Setting prompt string to 'Starting depthcharge on Helios...'
243 13:49:57.015763 Changing prompt to 'Starting depthcharge on Helios...'
244 13:49:57.015833 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
245 13:49:57.016134 [Enter `^Ec?' for help]
246 13:49:57.635307
247 13:49:57.635467
248 13:49:57.645920 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
249 13:49:57.649894 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
250 13:49:57.653308 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
251 13:49:57.659583 CPU: AES supported, TXT NOT supported, VT supported
252 13:49:57.666472 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
253 13:49:57.669797 PCH: device id 0284 (rev 00) is Cometlake-U Premium
254 13:49:57.676344 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
255 13:49:57.679825 VBOOT: Loading verstage.
256 13:49:57.683488 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 13:49:57.689835 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
258 13:49:57.693058 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 13:49:57.696667 CBFS @ c08000 size 3f8000
260 13:49:57.703397 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
261 13:49:57.706603 CBFS: Locating 'fallback/verstage'
262 13:49:57.709643 CBFS: Found @ offset 10fb80 size 1072c
263 13:49:57.709763
264 13:49:57.709862
265 13:49:57.723073 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
266 13:49:57.736598 Probing TPM: . done!
267 13:49:57.740281 TPM ready after 0 ms
268 13:49:57.743328 Connected to device vid:did:rid of 1ae0:0028:00
269 13:49:57.753396 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
270 13:49:57.792213 Initialized TPM device CR50 revision 0
271 13:49:57.801457 tlcl_send_startup: Startup return code is 0
272 13:49:57.801613 TPM: setup succeeded
273 13:49:57.813942 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
274 13:49:57.817654 Chrome EC: UHEPI supported
275 13:49:57.821483 Phase 1
276 13:49:57.824494 FMAP: area GBB found @ c05000 (12288 bytes)
277 13:49:57.831140 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
278 13:49:57.831267 Phase 2
279 13:49:57.834554 Phase 3
280 13:49:57.837569 FMAP: area GBB found @ c05000 (12288 bytes)
281 13:49:57.844364 VB2:vb2_report_dev_firmware() This is developer signed firmware
282 13:49:57.851060 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
283 13:49:57.854470 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
284 13:49:57.861152 VB2:vb2_verify_keyblock() Checking keyblock signature...
285 13:49:57.876541 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
286 13:49:57.879767 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
287 13:49:57.886395 VB2:vb2_verify_fw_preamble() Verifying preamble.
288 13:49:57.890820 Phase 4
289 13:49:57.893755 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
290 13:49:57.900714 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
291 13:49:58.079936 VB2:vb2_rsa_verify_digest() Digest check failed!
292 13:49:58.086995 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
293 13:49:58.087157 Saving nvdata
294 13:49:58.090273 Reboot requested (10020007)
295 13:49:58.093930 board_reset() called!
296 13:49:58.094046 full_reset() called!
297 13:50:02.602405
298 13:50:02.602686
299 13:50:02.612832 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 13:50:02.615912 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 13:50:02.623053 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 13:50:02.626755 CPU: AES supported, TXT NOT supported, VT supported
303 13:50:02.633185 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 13:50:02.636861 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 13:50:02.642982 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 13:50:02.645968 VBOOT: Loading verstage.
307 13:50:02.649448 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 13:50:02.656054 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 13:50:02.659206 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 13:50:02.662994 CBFS @ c08000 size 3f8000
311 13:50:02.669313 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 13:50:02.672601 CBFS: Locating 'fallback/verstage'
313 13:50:02.676104 CBFS: Found @ offset 10fb80 size 1072c
314 13:50:02.679646
315 13:50:02.680182
316 13:50:02.689683 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 13:50:02.704078 Probing TPM: . done!
318 13:50:02.707727 TPM ready after 0 ms
319 13:50:02.710765 Connected to device vid:did:rid of 1ae0:0028:00
320 13:50:02.721060 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
321 13:50:02.724656 Initialized TPM device CR50 revision 0
322 13:50:02.768535 tlcl_send_startup: Startup return code is 0
323 13:50:02.769174 TPM: setup succeeded
324 13:50:02.781211 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 13:50:02.785207 Chrome EC: UHEPI supported
326 13:50:02.788603 Phase 1
327 13:50:02.791691 FMAP: area GBB found @ c05000 (12288 bytes)
328 13:50:02.798370 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
329 13:50:02.805203 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
330 13:50:02.808698 Recovery requested (1009000e)
331 13:50:02.813971 Saving nvdata
332 13:50:02.820378 tlcl_extend: response is 0
333 13:50:02.829135 tlcl_extend: response is 0
334 13:50:02.836294 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
335 13:50:02.839477 CBFS @ c08000 size 3f8000
336 13:50:02.846555 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
337 13:50:02.850015 CBFS: Locating 'fallback/romstage'
338 13:50:02.852904 CBFS: Found @ offset 80 size 145fc
339 13:50:02.856501 Accumulated console time in verstage 98 ms
340 13:50:02.857045
341 13:50:02.857388
342 13:50:02.869640 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
343 13:50:02.876122 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
344 13:50:02.879655 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
345 13:50:02.882636 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 13:50:02.889222 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
347 13:50:02.892169 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
348 13:50:02.895708 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
349 13:50:02.898667 TCO_STS: 0000 0000
350 13:50:02.902078 GEN_PMCON: e0015238 00000200
351 13:50:02.905266 GBLRST_CAUSE: 00000000 00000000
352 13:50:02.905702 prev_sleep_state 5
353 13:50:02.908876 Boot Count incremented to 62513
354 13:50:02.915749 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 13:50:02.919043 CBFS @ c08000 size 3f8000
356 13:50:02.925817 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
357 13:50:02.926362 CBFS: Locating 'fspm.bin'
358 13:50:02.932551 CBFS: Found @ offset 5ffc0 size 71000
359 13:50:02.935776 Chrome EC: UHEPI supported
360 13:50:02.942774 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
361 13:50:02.945846 Probing TPM: done!
362 13:50:02.952611 Connected to device vid:did:rid of 1ae0:0028:00
363 13:50:02.962671 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
364 13:50:02.968371 Initialized TPM device CR50 revision 0
365 13:50:02.977363 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
366 13:50:02.983703 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
367 13:50:02.987099 MRC cache found, size 1948
368 13:50:02.990585 bootmode is set to: 2
369 13:50:02.993599 PRMRR disabled by config.
370 13:50:02.994031 SPD INDEX = 1
371 13:50:03.000527 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 13:50:03.004046 CBFS @ c08000 size 3f8000
373 13:50:03.010436 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 13:50:03.010976 CBFS: Locating 'spd.bin'
375 13:50:03.013721 CBFS: Found @ offset 5fb80 size 400
376 13:50:03.017075 SPD: module type is LPDDR3
377 13:50:03.020039 SPD: module part is
378 13:50:03.027395 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
379 13:50:03.030383 SPD: device width 4 bits, bus width 8 bits
380 13:50:03.033439 SPD: module size is 4096 MB (per channel)
381 13:50:03.036980 memory slot: 0 configuration done.
382 13:50:03.039978 memory slot: 2 configuration done.
383 13:50:03.090927 CBMEM:
384 13:50:03.094320 IMD: root @ 99fff000 254 entries.
385 13:50:03.101343 IMD: root @ 99ffec00 62 entries.
386 13:50:03.101794 External stage cache:
387 13:50:03.104179 IMD: root @ 9abff000 254 entries.
388 13:50:03.107730 IMD: root @ 9abfec00 62 entries.
389 13:50:03.114140 Chrome EC: clear events_b mask to 0x0000000020004000
390 13:50:03.127341 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
391 13:50:03.140479 tlcl_write: response is 0
392 13:50:03.149778 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
393 13:50:03.155949 MRC: TPM MRC hash updated successfully.
394 13:50:03.156402 2 DIMMs found
395 13:50:03.159221 SMM Memory Map
396 13:50:03.162713 SMRAM : 0x9a000000 0x1000000
397 13:50:03.166022 Subregion 0: 0x9a000000 0xa00000
398 13:50:03.169449 Subregion 1: 0x9aa00000 0x200000
399 13:50:03.172691 Subregion 2: 0x9ac00000 0x400000
400 13:50:03.176255 top_of_ram = 0x9a000000
401 13:50:03.179670 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
402 13:50:03.186069 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
403 13:50:03.189421 MTRR Range: Start=ff000000 End=0 (Size 1000000)
404 13:50:03.195735 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
405 13:50:03.199493 CBFS @ c08000 size 3f8000
406 13:50:03.202512 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
407 13:50:03.205988 CBFS: Locating 'fallback/postcar'
408 13:50:03.212344 CBFS: Found @ offset 107000 size 4b44
409 13:50:03.215943 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
410 13:50:03.228561 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
411 13:50:03.232269 Processing 180 relocs. Offset value of 0x97c0c000
412 13:50:03.240157 Accumulated console time in romstage 286 ms
413 13:50:03.240636
414 13:50:03.240982
415 13:50:03.250315 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
416 13:50:03.256809 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
417 13:50:03.260367 CBFS @ c08000 size 3f8000
418 13:50:03.263722 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
419 13:50:03.270092 CBFS: Locating 'fallback/ramstage'
420 13:50:03.273413 CBFS: Found @ offset 43380 size 1b9e8
421 13:50:03.279910 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
422 13:50:03.311777 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
423 13:50:03.315543 Processing 3976 relocs. Offset value of 0x98db0000
424 13:50:03.321685 Accumulated console time in postcar 52 ms
425 13:50:03.322211
426 13:50:03.322549
427 13:50:03.331718 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
428 13:50:03.338319 FMAP: area RO_VPD found @ c00000 (16384 bytes)
429 13:50:03.341913 WARNING: RO_VPD is uninitialized or empty.
430 13:50:03.345101 FMAP: area RW_VPD found @ af8000 (8192 bytes)
431 13:50:03.351629 FMAP: area RW_VPD found @ af8000 (8192 bytes)
432 13:50:03.352181 Normal boot.
433 13:50:03.358314 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
434 13:50:03.361855 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
435 13:50:03.365332 CBFS @ c08000 size 3f8000
436 13:50:03.371908 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
437 13:50:03.375021 CBFS: Locating 'cpu_microcode_blob.bin'
438 13:50:03.378304 CBFS: Found @ offset 14700 size 2ec00
439 13:50:03.381550 microcode: sig=0x806ec pf=0x4 revision=0xc9
440 13:50:03.385074 Skip microcode update
441 13:50:03.391536 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 13:50:03.392113 CBFS @ c08000 size 3f8000
443 13:50:03.398257 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 13:50:03.401083 CBFS: Locating 'fsps.bin'
445 13:50:03.404917 CBFS: Found @ offset d1fc0 size 35000
446 13:50:03.430549 Detected 4 core, 8 thread CPU.
447 13:50:03.433666 Setting up SMI for CPU
448 13:50:03.436655 IED base = 0x9ac00000
449 13:50:03.437095 IED size = 0x00400000
450 13:50:03.439870 Will perform SMM setup.
451 13:50:03.446892 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
452 13:50:03.453689 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
453 13:50:03.456625 Processing 16 relocs. Offset value of 0x00030000
454 13:50:03.460523 Attempting to start 7 APs
455 13:50:03.463991 Waiting for 10ms after sending INIT.
456 13:50:03.480120 Waiting for 1st SIPI to complete...done.
457 13:50:03.480646 AP: slot 1 apic_id 1.
458 13:50:03.486999 Waiting for 2nd SIPI to complete...done.
459 13:50:03.487544 AP: slot 7 apic_id 4.
460 13:50:03.489786 AP: slot 6 apic_id 5.
461 13:50:03.493105 AP: slot 4 apic_id 3.
462 13:50:03.493542 AP: slot 5 apic_id 2.
463 13:50:03.496980 AP: slot 3 apic_id 7.
464 13:50:03.499895 AP: slot 2 apic_id 6.
465 13:50:03.506923 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
466 13:50:03.509804 Processing 13 relocs. Offset value of 0x00038000
467 13:50:03.516417 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
468 13:50:03.523136 Installing SMM handler to 0x9a000000
469 13:50:03.529743 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
470 13:50:03.533262 Processing 658 relocs. Offset value of 0x9a010000
471 13:50:03.543293 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
472 13:50:03.546648 Processing 13 relocs. Offset value of 0x9a008000
473 13:50:03.552662 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
474 13:50:03.559652 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
475 13:50:03.562945 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
476 13:50:03.569257 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
477 13:50:03.576048 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
478 13:50:03.582432 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
479 13:50:03.586286 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
480 13:50:03.592687 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
481 13:50:03.596236 Clearing SMI status registers
482 13:50:03.599783 SMI_STS: PM1
483 13:50:03.600321 PM1_STS: PWRBTN
484 13:50:03.602383 TCO_STS: SECOND_TO
485 13:50:03.605920 New SMBASE 0x9a000000
486 13:50:03.609774 In relocation handler: CPU 0
487 13:50:03.612582 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
488 13:50:03.615657 Writing SMRR. base = 0x9a000006, mask=0xff000800
489 13:50:03.619478 Relocation complete.
490 13:50:03.622694 New SMBASE 0x99fffc00
491 13:50:03.623123 In relocation handler: CPU 1
492 13:50:03.629228 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
493 13:50:03.632670 Writing SMRR. base = 0x9a000006, mask=0xff000800
494 13:50:03.636032 Relocation complete.
495 13:50:03.639207 New SMBASE 0x99fff000
496 13:50:03.639837 In relocation handler: CPU 4
497 13:50:03.645934 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
498 13:50:03.649343 Writing SMRR. base = 0x9a000006, mask=0xff000800
499 13:50:03.652790 Relocation complete.
500 13:50:03.653313 New SMBASE 0x99ffec00
501 13:50:03.656129 In relocation handler: CPU 5
502 13:50:03.662396 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
503 13:50:03.665647 Writing SMRR. base = 0x9a000006, mask=0xff000800
504 13:50:03.669171 Relocation complete.
505 13:50:03.669869 New SMBASE 0x99ffe400
506 13:50:03.672651 In relocation handler: CPU 7
507 13:50:03.675878 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
508 13:50:03.682477 Writing SMRR. base = 0x9a000006, mask=0xff000800
509 13:50:03.685878 Relocation complete.
510 13:50:03.686419 New SMBASE 0x99ffe800
511 13:50:03.689185 In relocation handler: CPU 6
512 13:50:03.692168 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
513 13:50:03.699119 Writing SMRR. base = 0x9a000006, mask=0xff000800
514 13:50:03.702691 Relocation complete.
515 13:50:03.703231 New SMBASE 0x99fff400
516 13:50:03.705622 In relocation handler: CPU 3
517 13:50:03.709310 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
518 13:50:03.715504 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 13:50:03.716079 Relocation complete.
520 13:50:03.718971 New SMBASE 0x99fff800
521 13:50:03.722029 In relocation handler: CPU 2
522 13:50:03.725698 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
523 13:50:03.732388 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 13:50:03.732977 Relocation complete.
525 13:50:03.735712 Initializing CPU #0
526 13:50:03.738781 CPU: vendor Intel device 806ec
527 13:50:03.742139 CPU: family 06, model 8e, stepping 0c
528 13:50:03.745430 Clearing out pending MCEs
529 13:50:03.749086 Setting up local APIC...
530 13:50:03.749941 apic_id: 0x00 done.
531 13:50:03.752172 Turbo is available but hidden
532 13:50:03.755137 Turbo is available and visible
533 13:50:03.759013 VMX status: enabled
534 13:50:03.762324 IA32_FEATURE_CONTROL status: locked
535 13:50:03.765297 Skip microcode update
536 13:50:03.765733 CPU #0 initialized
537 13:50:03.768671 Initializing CPU #1
538 13:50:03.769106 Initializing CPU #2
539 13:50:03.771805 Initializing CPU #3
540 13:50:03.775271 CPU: vendor Intel device 806ec
541 13:50:03.778311 CPU: family 06, model 8e, stepping 0c
542 13:50:03.781869 CPU: vendor Intel device 806ec
543 13:50:03.785337 CPU: family 06, model 8e, stepping 0c
544 13:50:03.788713 Clearing out pending MCEs
545 13:50:03.791572 Clearing out pending MCEs
546 13:50:03.795204 Setting up local APIC...
547 13:50:03.795882 Initializing CPU #4
548 13:50:03.798352 Initializing CPU #5
549 13:50:03.801643 CPU: vendor Intel device 806ec
550 13:50:03.804821 CPU: family 06, model 8e, stepping 0c
551 13:50:03.808285 CPU: vendor Intel device 806ec
552 13:50:03.812136 CPU: family 06, model 8e, stepping 0c
553 13:50:03.815045 Clearing out pending MCEs
554 13:50:03.815838 apic_id: 0x06 done.
555 13:50:03.818223 Setting up local APIC...
556 13:50:03.821715 CPU: vendor Intel device 806ec
557 13:50:03.825113 CPU: family 06, model 8e, stepping 0c
558 13:50:03.828429 Clearing out pending MCEs
559 13:50:03.831272 Clearing out pending MCEs
560 13:50:03.834794 Setting up local APIC...
561 13:50:03.835551 Setting up local APIC...
562 13:50:03.838355 Setting up local APIC...
563 13:50:03.841390 apic_id: 0x07 done.
564 13:50:03.842144 VMX status: enabled
565 13:50:03.845128 VMX status: enabled
566 13:50:03.848317 IA32_FEATURE_CONTROL status: locked
567 13:50:03.851769 IA32_FEATURE_CONTROL status: locked
568 13:50:03.855152 Skip microcode update
569 13:50:03.858050 Skip microcode update
570 13:50:03.858768 CPU #2 initialized
571 13:50:03.861936 CPU #3 initialized
572 13:50:03.862472 apic_id: 0x02 done.
573 13:50:03.865292 apic_id: 0x03 done.
574 13:50:03.868067 VMX status: enabled
575 13:50:03.868501 VMX status: enabled
576 13:50:03.871450 IA32_FEATURE_CONTROL status: locked
577 13:50:03.874584 IA32_FEATURE_CONTROL status: locked
578 13:50:03.877971 Skip microcode update
579 13:50:03.881594 Skip microcode update
580 13:50:03.882166 CPU #5 initialized
581 13:50:03.884562 CPU #4 initialized
582 13:50:03.888223 apic_id: 0x01 done.
583 13:50:03.888653 Initializing CPU #6
584 13:50:03.891042 Initializing CPU #7
585 13:50:03.894792 CPU: vendor Intel device 806ec
586 13:50:03.898542 CPU: family 06, model 8e, stepping 0c
587 13:50:03.901400 CPU: vendor Intel device 806ec
588 13:50:03.904917 CPU: family 06, model 8e, stepping 0c
589 13:50:03.908202 Clearing out pending MCEs
590 13:50:03.911233 Clearing out pending MCEs
591 13:50:03.911796 Setting up local APIC...
592 13:50:03.915045 VMX status: enabled
593 13:50:03.917835 Setting up local APIC...
594 13:50:03.921217 IA32_FEATURE_CONTROL status: locked
595 13:50:03.921655 apic_id: 0x04 done.
596 13:50:03.924323 apic_id: 0x05 done.
597 13:50:03.927662 VMX status: enabled
598 13:50:03.928205 VMX status: enabled
599 13:50:03.931186 IA32_FEATURE_CONTROL status: locked
600 13:50:03.934192 IA32_FEATURE_CONTROL status: locked
601 13:50:03.937911 Skip microcode update
602 13:50:03.941177 Skip microcode update
603 13:50:03.941726 CPU #7 initialized
604 13:50:03.944626 CPU #6 initialized
605 13:50:03.948317 Skip microcode update
606 13:50:03.948847 CPU #1 initialized
607 13:50:03.954735 bsp_do_flight_plan done after 465 msecs.
608 13:50:03.955281 CPU: frequency set to 4200 MHz
609 13:50:03.958099 Enabling SMIs.
610 13:50:03.958660 Locking SMM.
611 13:50:03.974305 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
612 13:50:03.977852 CBFS @ c08000 size 3f8000
613 13:50:03.984083 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
614 13:50:03.984617 CBFS: Locating 'vbt.bin'
615 13:50:03.987462 CBFS: Found @ offset 5f5c0 size 499
616 13:50:03.993527 Found a VBT of 4608 bytes after decompression
617 13:50:04.179901 Display FSP Version Info HOB
618 13:50:04.182904 Reference Code - CPU = 9.0.1e.30
619 13:50:04.186098 uCode Version = 0.0.0.ca
620 13:50:04.189526 TXT ACM version = ff.ff.ff.ffff
621 13:50:04.192932 Display FSP Version Info HOB
622 13:50:04.196232 Reference Code - ME = 9.0.1e.30
623 13:50:04.198958 MEBx version = 0.0.0.0
624 13:50:04.202741 ME Firmware Version = Consumer SKU
625 13:50:04.205510 Display FSP Version Info HOB
626 13:50:04.208991 Reference Code - CML PCH = 9.0.1e.30
627 13:50:04.212621 PCH-CRID Status = Disabled
628 13:50:04.215866 PCH-CRID Original Value = ff.ff.ff.ffff
629 13:50:04.219080 PCH-CRID New Value = ff.ff.ff.ffff
630 13:50:04.222251 OPROM - RST - RAID = ff.ff.ff.ffff
631 13:50:04.225678 ChipsetInit Base Version = ff.ff.ff.ffff
632 13:50:04.229311 ChipsetInit Oem Version = ff.ff.ff.ffff
633 13:50:04.232627 Display FSP Version Info HOB
634 13:50:04.239443 Reference Code - SA - System Agent = 9.0.1e.30
635 13:50:04.242381 Reference Code - MRC = 0.7.1.6c
636 13:50:04.242953 SA - PCIe Version = 9.0.1e.30
637 13:50:04.245920 SA-CRID Status = Disabled
638 13:50:04.248878 SA-CRID Original Value = 0.0.0.c
639 13:50:04.252234 SA-CRID New Value = 0.0.0.c
640 13:50:04.255689 OPROM - VBIOS = ff.ff.ff.ffff
641 13:50:04.258543 RTC Init
642 13:50:04.261943 Set power on after power failure.
643 13:50:04.262421 Disabling Deep S3
644 13:50:04.265450 Disabling Deep S3
645 13:50:04.265879 Disabling Deep S4
646 13:50:04.268873 Disabling Deep S4
647 13:50:04.269385 Disabling Deep S5
648 13:50:04.272345 Disabling Deep S5
649 13:50:04.279314 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
650 13:50:04.279991 Enumerating buses...
651 13:50:04.285454 Show all devs... Before device enumeration.
652 13:50:04.285885 Root Device: enabled 1
653 13:50:04.288423 CPU_CLUSTER: 0: enabled 1
654 13:50:04.292020 DOMAIN: 0000: enabled 1
655 13:50:04.295634 APIC: 00: enabled 1
656 13:50:04.296181 PCI: 00:00.0: enabled 1
657 13:50:04.298924 PCI: 00:02.0: enabled 1
658 13:50:04.302216 PCI: 00:04.0: enabled 0
659 13:50:04.305227 PCI: 00:05.0: enabled 0
660 13:50:04.305752 PCI: 00:12.0: enabled 1
661 13:50:04.309080 PCI: 00:12.5: enabled 0
662 13:50:04.312177 PCI: 00:12.6: enabled 0
663 13:50:04.312736 PCI: 00:14.0: enabled 1
664 13:50:04.315556 PCI: 00:14.1: enabled 0
665 13:50:04.318653 PCI: 00:14.3: enabled 1
666 13:50:04.321845 PCI: 00:14.5: enabled 0
667 13:50:04.322295 PCI: 00:15.0: enabled 1
668 13:50:04.325277 PCI: 00:15.1: enabled 1
669 13:50:04.328547 PCI: 00:15.2: enabled 0
670 13:50:04.331745 PCI: 00:15.3: enabled 0
671 13:50:04.332286 PCI: 00:16.0: enabled 1
672 13:50:04.334952 PCI: 00:16.1: enabled 0
673 13:50:04.338643 PCI: 00:16.2: enabled 0
674 13:50:04.341592 PCI: 00:16.3: enabled 0
675 13:50:04.342265 PCI: 00:16.4: enabled 0
676 13:50:04.344950 PCI: 00:16.5: enabled 0
677 13:50:04.348685 PCI: 00:17.0: enabled 1
678 13:50:04.349118 PCI: 00:19.0: enabled 1
679 13:50:04.351857 PCI: 00:19.1: enabled 0
680 13:50:04.355241 PCI: 00:19.2: enabled 0
681 13:50:04.358262 PCI: 00:1a.0: enabled 0
682 13:50:04.358796 PCI: 00:1c.0: enabled 0
683 13:50:04.361849 PCI: 00:1c.1: enabled 0
684 13:50:04.365340 PCI: 00:1c.2: enabled 0
685 13:50:04.368726 PCI: 00:1c.3: enabled 0
686 13:50:04.369344 PCI: 00:1c.4: enabled 0
687 13:50:04.371714 PCI: 00:1c.5: enabled 0
688 13:50:04.375169 PCI: 00:1c.6: enabled 0
689 13:50:04.378586 PCI: 00:1c.7: enabled 0
690 13:50:04.379166 PCI: 00:1d.0: enabled 1
691 13:50:04.381071 PCI: 00:1d.1: enabled 0
692 13:50:04.384897 PCI: 00:1d.2: enabled 0
693 13:50:04.387829 PCI: 00:1d.3: enabled 0
694 13:50:04.388257 PCI: 00:1d.4: enabled 0
695 13:50:04.391688 PCI: 00:1d.5: enabled 1
696 13:50:04.395143 PCI: 00:1e.0: enabled 1
697 13:50:04.395716 PCI: 00:1e.1: enabled 0
698 13:50:04.397985 PCI: 00:1e.2: enabled 1
699 13:50:04.401560 PCI: 00:1e.3: enabled 1
700 13:50:04.404960 PCI: 00:1f.0: enabled 1
701 13:50:04.405496 PCI: 00:1f.1: enabled 1
702 13:50:04.407985 PCI: 00:1f.2: enabled 1
703 13:50:04.411415 PCI: 00:1f.3: enabled 1
704 13:50:04.414734 PCI: 00:1f.4: enabled 1
705 13:50:04.415277 PCI: 00:1f.5: enabled 1
706 13:50:04.417828 PCI: 00:1f.6: enabled 0
707 13:50:04.420813 USB0 port 0: enabled 1
708 13:50:04.421242 I2C: 00:15: enabled 1
709 13:50:04.424307 I2C: 00:5d: enabled 1
710 13:50:04.427783 GENERIC: 0.0: enabled 1
711 13:50:04.430695 I2C: 00:1a: enabled 1
712 13:50:04.431125 I2C: 00:38: enabled 1
713 13:50:04.434314 I2C: 00:39: enabled 1
714 13:50:04.437939 I2C: 00:3a: enabled 1
715 13:50:04.438476 I2C: 00:3b: enabled 1
716 13:50:04.440885 PCI: 00:00.0: enabled 1
717 13:50:04.444180 SPI: 00: enabled 1
718 13:50:04.444720 SPI: 01: enabled 1
719 13:50:04.447270 PNP: 0c09.0: enabled 1
720 13:50:04.450814 USB2 port 0: enabled 1
721 13:50:04.451374 USB2 port 1: enabled 1
722 13:50:04.454032 USB2 port 2: enabled 0
723 13:50:04.457502 USB2 port 3: enabled 0
724 13:50:04.457933 USB2 port 5: enabled 0
725 13:50:04.460536 USB2 port 6: enabled 1
726 13:50:04.464294 USB2 port 9: enabled 1
727 13:50:04.467617 USB3 port 0: enabled 1
728 13:50:04.468157 USB3 port 1: enabled 1
729 13:50:04.470613 USB3 port 2: enabled 1
730 13:50:04.473883 USB3 port 3: enabled 1
731 13:50:04.474473 USB3 port 4: enabled 0
732 13:50:04.477136 APIC: 01: enabled 1
733 13:50:04.480563 APIC: 06: enabled 1
734 13:50:04.481099 APIC: 07: enabled 1
735 13:50:04.483536 APIC: 03: enabled 1
736 13:50:04.483992 APIC: 02: enabled 1
737 13:50:04.486940 APIC: 05: enabled 1
738 13:50:04.490499 APIC: 04: enabled 1
739 13:50:04.490925 Compare with tree...
740 13:50:04.493795 Root Device: enabled 1
741 13:50:04.497270 CPU_CLUSTER: 0: enabled 1
742 13:50:04.500769 APIC: 00: enabled 1
743 13:50:04.501304 APIC: 01: enabled 1
744 13:50:04.503617 APIC: 06: enabled 1
745 13:50:04.507300 APIC: 07: enabled 1
746 13:50:04.507884 APIC: 03: enabled 1
747 13:50:04.509773 APIC: 02: enabled 1
748 13:50:04.513360 APIC: 05: enabled 1
749 13:50:04.513786 APIC: 04: enabled 1
750 13:50:04.516878 DOMAIN: 0000: enabled 1
751 13:50:04.520256 PCI: 00:00.0: enabled 1
752 13:50:04.523199 PCI: 00:02.0: enabled 1
753 13:50:04.523651 PCI: 00:04.0: enabled 0
754 13:50:04.526944 PCI: 00:05.0: enabled 0
755 13:50:04.530551 PCI: 00:12.0: enabled 1
756 13:50:04.533139 PCI: 00:12.5: enabled 0
757 13:50:04.536858 PCI: 00:12.6: enabled 0
758 13:50:04.537388 PCI: 00:14.0: enabled 1
759 13:50:04.540484 USB0 port 0: enabled 1
760 13:50:04.543498 USB2 port 0: enabled 1
761 13:50:04.546950 USB2 port 1: enabled 1
762 13:50:04.550396 USB2 port 2: enabled 0
763 13:50:04.553291 USB2 port 3: enabled 0
764 13:50:04.553824 USB2 port 5: enabled 0
765 13:50:04.556795 USB2 port 6: enabled 1
766 13:50:04.560063 USB2 port 9: enabled 1
767 13:50:04.563740 USB3 port 0: enabled 1
768 13:50:04.567057 USB3 port 1: enabled 1
769 13:50:04.567583 USB3 port 2: enabled 1
770 13:50:04.570108 USB3 port 3: enabled 1
771 13:50:04.573386 USB3 port 4: enabled 0
772 13:50:04.576168 PCI: 00:14.1: enabled 0
773 13:50:04.579558 PCI: 00:14.3: enabled 1
774 13:50:04.580034 PCI: 00:14.5: enabled 0
775 13:50:04.583040 PCI: 00:15.0: enabled 1
776 13:50:04.586387 I2C: 00:15: enabled 1
777 13:50:04.590085 PCI: 00:15.1: enabled 1
778 13:50:04.593182 I2C: 00:5d: enabled 1
779 13:50:04.593820 GENERIC: 0.0: enabled 1
780 13:50:04.596384 PCI: 00:15.2: enabled 0
781 13:50:04.599545 PCI: 00:15.3: enabled 0
782 13:50:04.602884 PCI: 00:16.0: enabled 1
783 13:50:04.606368 PCI: 00:16.1: enabled 0
784 13:50:04.606903 PCI: 00:16.2: enabled 0
785 13:50:04.609445 PCI: 00:16.3: enabled 0
786 13:50:04.612710 PCI: 00:16.4: enabled 0
787 13:50:04.615970 PCI: 00:16.5: enabled 0
788 13:50:04.619884 PCI: 00:17.0: enabled 1
789 13:50:04.620412 PCI: 00:19.0: enabled 1
790 13:50:04.622489 I2C: 00:1a: enabled 1
791 13:50:04.625829 I2C: 00:38: enabled 1
792 13:50:04.629299 I2C: 00:39: enabled 1
793 13:50:04.629828 I2C: 00:3a: enabled 1
794 13:50:04.632852 I2C: 00:3b: enabled 1
795 13:50:04.635850 PCI: 00:19.1: enabled 0
796 13:50:04.639262 PCI: 00:19.2: enabled 0
797 13:50:04.643036 PCI: 00:1a.0: enabled 0
798 13:50:04.643570 PCI: 00:1c.0: enabled 0
799 13:50:04.645964 PCI: 00:1c.1: enabled 0
800 13:50:04.649595 PCI: 00:1c.2: enabled 0
801 13:50:04.652543 PCI: 00:1c.3: enabled 0
802 13:50:04.655661 PCI: 00:1c.4: enabled 0
803 13:50:04.656211 PCI: 00:1c.5: enabled 0
804 13:50:04.659243 PCI: 00:1c.6: enabled 0
805 13:50:04.662861 PCI: 00:1c.7: enabled 0
806 13:50:04.665847 PCI: 00:1d.0: enabled 1
807 13:50:04.666426 PCI: 00:1d.1: enabled 0
808 13:50:04.669348 PCI: 00:1d.2: enabled 0
809 13:50:04.672760 PCI: 00:1d.3: enabled 0
810 13:50:04.675783 PCI: 00:1d.4: enabled 0
811 13:50:04.679004 PCI: 00:1d.5: enabled 1
812 13:50:04.679550 PCI: 00:00.0: enabled 1
813 13:50:04.681861 PCI: 00:1e.0: enabled 1
814 13:50:04.685456 PCI: 00:1e.1: enabled 0
815 13:50:04.689184 PCI: 00:1e.2: enabled 1
816 13:50:04.692544 SPI: 00: enabled 1
817 13:50:04.693013 PCI: 00:1e.3: enabled 1
818 13:50:04.695372 SPI: 01: enabled 1
819 13:50:04.699309 PCI: 00:1f.0: enabled 1
820 13:50:04.702184 PNP: 0c09.0: enabled 1
821 13:50:04.702718 PCI: 00:1f.1: enabled 1
822 13:50:04.705726 PCI: 00:1f.2: enabled 1
823 13:50:04.708690 PCI: 00:1f.3: enabled 1
824 13:50:04.712057 PCI: 00:1f.4: enabled 1
825 13:50:04.715207 PCI: 00:1f.5: enabled 1
826 13:50:04.715814 PCI: 00:1f.6: enabled 0
827 13:50:04.718756 Root Device scanning...
828 13:50:04.722253 scan_static_bus for Root Device
829 13:50:04.725261 CPU_CLUSTER: 0 enabled
830 13:50:04.728795 DOMAIN: 0000 enabled
831 13:50:04.729329 DOMAIN: 0000 scanning...
832 13:50:04.731795 PCI: pci_scan_bus for bus 00
833 13:50:04.735126 PCI: 00:00.0 [8086/0000] ops
834 13:50:04.738788 PCI: 00:00.0 [8086/9b61] enabled
835 13:50:04.742173 PCI: 00:02.0 [8086/0000] bus ops
836 13:50:04.745000 PCI: 00:02.0 [8086/9b41] enabled
837 13:50:04.748820 PCI: 00:04.0 [8086/1903] disabled
838 13:50:04.751896 PCI: 00:08.0 [8086/1911] enabled
839 13:50:04.755521 PCI: 00:12.0 [8086/02f9] enabled
840 13:50:04.758305 PCI: 00:14.0 [8086/0000] bus ops
841 13:50:04.761973 PCI: 00:14.0 [8086/02ed] enabled
842 13:50:04.764937 PCI: 00:14.2 [8086/02ef] enabled
843 13:50:04.768507 PCI: 00:14.3 [8086/02f0] enabled
844 13:50:04.771469 PCI: 00:15.0 [8086/0000] bus ops
845 13:50:04.774931 PCI: 00:15.0 [8086/02e8] enabled
846 13:50:04.778521 PCI: 00:15.1 [8086/0000] bus ops
847 13:50:04.781694 PCI: 00:15.1 [8086/02e9] enabled
848 13:50:04.785002 PCI: 00:16.0 [8086/0000] ops
849 13:50:04.788321 PCI: 00:16.0 [8086/02e0] enabled
850 13:50:04.792171 PCI: 00:17.0 [8086/0000] ops
851 13:50:04.795101 PCI: 00:17.0 [8086/02d3] enabled
852 13:50:04.798626 PCI: 00:19.0 [8086/0000] bus ops
853 13:50:04.801600 PCI: 00:19.0 [8086/02c5] enabled
854 13:50:04.805202 PCI: 00:1d.0 [8086/0000] bus ops
855 13:50:04.808605 PCI: 00:1d.0 [8086/02b0] enabled
856 13:50:04.815143 PCI: Static device PCI: 00:1d.5 not found, disabling it.
857 13:50:04.818403 PCI: 00:1e.0 [8086/0000] ops
858 13:50:04.821874 PCI: 00:1e.0 [8086/02a8] enabled
859 13:50:04.824745 PCI: 00:1e.2 [8086/0000] bus ops
860 13:50:04.828001 PCI: 00:1e.2 [8086/02aa] enabled
861 13:50:04.831534 PCI: 00:1e.3 [8086/0000] bus ops
862 13:50:04.834811 PCI: 00:1e.3 [8086/02ab] enabled
863 13:50:04.838018 PCI: 00:1f.0 [8086/0000] bus ops
864 13:50:04.841281 PCI: 00:1f.0 [8086/0284] enabled
865 13:50:04.844690 PCI: Static device PCI: 00:1f.1 not found, disabling it.
866 13:50:04.850922 PCI: Static device PCI: 00:1f.2 not found, disabling it.
867 13:50:04.854546 PCI: 00:1f.3 [8086/0000] bus ops
868 13:50:04.858000 PCI: 00:1f.3 [8086/02c8] enabled
869 13:50:04.861214 PCI: 00:1f.4 [8086/0000] bus ops
870 13:50:04.864738 PCI: 00:1f.4 [8086/02a3] enabled
871 13:50:04.867645 PCI: 00:1f.5 [8086/0000] bus ops
872 13:50:04.871468 PCI: 00:1f.5 [8086/02a4] enabled
873 13:50:04.874392 PCI: Leftover static devices:
874 13:50:04.874935 PCI: 00:05.0
875 13:50:04.877833 PCI: 00:12.5
876 13:50:04.878279 PCI: 00:12.6
877 13:50:04.881346 PCI: 00:14.1
878 13:50:04.882010 PCI: 00:14.5
879 13:50:04.882462 PCI: 00:15.2
880 13:50:04.884288 PCI: 00:15.3
881 13:50:04.884736 PCI: 00:16.1
882 13:50:04.887627 PCI: 00:16.2
883 13:50:04.888086 PCI: 00:16.3
884 13:50:04.891035 PCI: 00:16.4
885 13:50:04.891576 PCI: 00:16.5
886 13:50:04.892088 PCI: 00:19.1
887 13:50:04.894674 PCI: 00:19.2
888 13:50:04.895219 PCI: 00:1a.0
889 13:50:04.897563 PCI: 00:1c.0
890 13:50:04.898011 PCI: 00:1c.1
891 13:50:04.898466 PCI: 00:1c.2
892 13:50:04.901142 PCI: 00:1c.3
893 13:50:04.901689 PCI: 00:1c.4
894 13:50:04.904561 PCI: 00:1c.5
895 13:50:04.905103 PCI: 00:1c.6
896 13:50:04.905562 PCI: 00:1c.7
897 13:50:04.908249 PCI: 00:1d.1
898 13:50:04.908793 PCI: 00:1d.2
899 13:50:04.910928 PCI: 00:1d.3
900 13:50:04.911375 PCI: 00:1d.4
901 13:50:04.914405 PCI: 00:1d.5
902 13:50:04.914850 PCI: 00:1e.1
903 13:50:04.915304 PCI: 00:1f.1
904 13:50:04.917329 PCI: 00:1f.2
905 13:50:04.917775 PCI: 00:1f.6
906 13:50:04.920960 PCI: Check your devicetree.cb.
907 13:50:04.924137 PCI: 00:02.0 scanning...
908 13:50:04.927690 scan_generic_bus for PCI: 00:02.0
909 13:50:04.931207 scan_generic_bus for PCI: 00:02.0 done
910 13:50:04.937069 scan_bus: scanning of bus PCI: 00:02.0 took 10181 usecs
911 13:50:04.940565 PCI: 00:14.0 scanning...
912 13:50:04.944112 scan_static_bus for PCI: 00:14.0
913 13:50:04.944539 USB0 port 0 enabled
914 13:50:04.947836 USB0 port 0 scanning...
915 13:50:04.950988 scan_static_bus for USB0 port 0
916 13:50:04.954549 USB2 port 0 enabled
917 13:50:04.955075 USB2 port 1 enabled
918 13:50:04.957152 USB2 port 2 disabled
919 13:50:04.960813 USB2 port 3 disabled
920 13:50:04.961346 USB2 port 5 disabled
921 13:50:04.964207 USB2 port 6 enabled
922 13:50:04.967629 USB2 port 9 enabled
923 13:50:04.968165 USB3 port 0 enabled
924 13:50:04.971176 USB3 port 1 enabled
925 13:50:04.971863 USB3 port 2 enabled
926 13:50:04.973775 USB3 port 3 enabled
927 13:50:04.976945 USB3 port 4 disabled
928 13:50:04.977560 USB2 port 0 scanning...
929 13:50:04.980581 scan_static_bus for USB2 port 0
930 13:50:04.987409 scan_static_bus for USB2 port 0 done
931 13:50:04.990433 scan_bus: scanning of bus USB2 port 0 took 9709 usecs
932 13:50:04.993983 USB2 port 1 scanning...
933 13:50:04.997042 scan_static_bus for USB2 port 1
934 13:50:05.000423 scan_static_bus for USB2 port 1 done
935 13:50:05.007500 scan_bus: scanning of bus USB2 port 1 took 9709 usecs
936 13:50:05.008238 USB2 port 6 scanning...
937 13:50:05.011009 scan_static_bus for USB2 port 6
938 13:50:05.017349 scan_static_bus for USB2 port 6 done
939 13:50:05.020083 scan_bus: scanning of bus USB2 port 6 took 9709 usecs
940 13:50:05.023671 USB2 port 9 scanning...
941 13:50:05.026992 scan_static_bus for USB2 port 9
942 13:50:05.030660 scan_static_bus for USB2 port 9 done
943 13:50:05.037475 scan_bus: scanning of bus USB2 port 9 took 9700 usecs
944 13:50:05.038008 USB3 port 0 scanning...
945 13:50:05.040691 scan_static_bus for USB3 port 0
946 13:50:05.047096 scan_static_bus for USB3 port 0 done
947 13:50:05.050544 scan_bus: scanning of bus USB3 port 0 took 9699 usecs
948 13:50:05.053700 USB3 port 1 scanning...
949 13:50:05.057080 scan_static_bus for USB3 port 1
950 13:50:05.060576 scan_static_bus for USB3 port 1 done
951 13:50:05.067074 scan_bus: scanning of bus USB3 port 1 took 9690 usecs
952 13:50:05.067684 USB3 port 2 scanning...
953 13:50:05.070829 scan_static_bus for USB3 port 2
954 13:50:05.077054 scan_static_bus for USB3 port 2 done
955 13:50:05.080590 scan_bus: scanning of bus USB3 port 2 took 9705 usecs
956 13:50:05.083550 USB3 port 3 scanning...
957 13:50:05.087229 scan_static_bus for USB3 port 3
958 13:50:05.090843 scan_static_bus for USB3 port 3 done
959 13:50:05.097011 scan_bus: scanning of bus USB3 port 3 took 9708 usecs
960 13:50:05.100525 scan_static_bus for USB0 port 0 done
961 13:50:05.106787 scan_bus: scanning of bus USB0 port 0 took 155398 usecs
962 13:50:05.110460 scan_static_bus for PCI: 00:14.0 done
963 13:50:05.113786 scan_bus: scanning of bus PCI: 00:14.0 took 173031 usecs
964 13:50:05.117097 PCI: 00:15.0 scanning...
965 13:50:05.120209 scan_generic_bus for PCI: 00:15.0
966 13:50:05.123401 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
967 13:50:05.130158 scan_generic_bus for PCI: 00:15.0 done
968 13:50:05.133448 scan_bus: scanning of bus PCI: 00:15.0 took 14308 usecs
969 13:50:05.136721 PCI: 00:15.1 scanning...
970 13:50:05.140313 scan_generic_bus for PCI: 00:15.1
971 13:50:05.143749 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
972 13:50:05.149961 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
973 13:50:05.153508 scan_generic_bus for PCI: 00:15.1 done
974 13:50:05.159809 scan_bus: scanning of bus PCI: 00:15.1 took 18610 usecs
975 13:50:05.160329 PCI: 00:19.0 scanning...
976 13:50:05.163443 scan_generic_bus for PCI: 00:19.0
977 13:50:05.169731 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
978 13:50:05.173026 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
979 13:50:05.176613 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
980 13:50:05.180111 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
981 13:50:05.186678 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
982 13:50:05.189898 scan_generic_bus for PCI: 00:19.0 done
983 13:50:05.192661 scan_bus: scanning of bus PCI: 00:19.0 took 30739 usecs
984 13:50:05.196387 PCI: 00:1d.0 scanning...
985 13:50:05.200137 do_pci_scan_bridge for PCI: 00:1d.0
986 13:50:05.203691 PCI: pci_scan_bus for bus 01
987 13:50:05.206415 PCI: 01:00.0 [1c5c/1327] enabled
988 13:50:05.209599 Enabling Common Clock Configuration
989 13:50:05.216565 L1 Sub-State supported from root port 29
990 13:50:05.219984 L1 Sub-State Support = 0xf
991 13:50:05.220514 CommonModeRestoreTime = 0x28
992 13:50:05.226458 Power On Value = 0x16, Power On Scale = 0x0
993 13:50:05.226991 ASPM: Enabled L1
994 13:50:05.233310 scan_bus: scanning of bus PCI: 00:1d.0 took 32793 usecs
995 13:50:05.236175 PCI: 00:1e.2 scanning...
996 13:50:05.239732 scan_generic_bus for PCI: 00:1e.2
997 13:50:05.242780 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
998 13:50:05.246651 scan_generic_bus for PCI: 00:1e.2 done
999 13:50:05.253129 scan_bus: scanning of bus PCI: 00:1e.2 took 14003 usecs
1000 13:50:05.256218 PCI: 00:1e.3 scanning...
1001 13:50:05.259167 scan_generic_bus for PCI: 00:1e.3
1002 13:50:05.263368 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1003 13:50:05.266346 scan_generic_bus for PCI: 00:1e.3 done
1004 13:50:05.272372 scan_bus: scanning of bus PCI: 00:1e.3 took 14006 usecs
1005 13:50:05.272859 PCI: 00:1f.0 scanning...
1006 13:50:05.276171 scan_static_bus for PCI: 00:1f.0
1007 13:50:05.279802 PNP: 0c09.0 enabled
1008 13:50:05.282770 scan_static_bus for PCI: 00:1f.0 done
1009 13:50:05.289478 scan_bus: scanning of bus PCI: 00:1f.0 took 12049 usecs
1010 13:50:05.293142 PCI: 00:1f.3 scanning...
1011 13:50:05.296366 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1012 13:50:05.299587 PCI: 00:1f.4 scanning...
1013 13:50:05.303271 scan_generic_bus for PCI: 00:1f.4
1014 13:50:05.306610 scan_generic_bus for PCI: 00:1f.4 done
1015 13:50:05.312981 scan_bus: scanning of bus PCI: 00:1f.4 took 10195 usecs
1016 13:50:05.316669 PCI: 00:1f.5 scanning...
1017 13:50:05.320065 scan_generic_bus for PCI: 00:1f.5
1018 13:50:05.323118 scan_generic_bus for PCI: 00:1f.5 done
1019 13:50:05.330122 scan_bus: scanning of bus PCI: 00:1f.5 took 10196 usecs
1020 13:50:05.336354 scan_bus: scanning of bus DOMAIN: 0000 took 605137 usecs
1021 13:50:05.339943 scan_static_bus for Root Device done
1022 13:50:05.343355 scan_bus: scanning of bus Root Device took 624994 usecs
1023 13:50:05.346509 done
1024 13:50:05.347073 Chrome EC: UHEPI supported
1025 13:50:05.353180 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1026 13:50:05.359350 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1027 13:50:05.365984 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1028 13:50:05.372618 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1029 13:50:05.376382 SPI flash protection: WPSW=0 SRP0=0
1030 13:50:05.382746 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1031 13:50:05.386135 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1032 13:50:05.388966 found VGA at PCI: 00:02.0
1033 13:50:05.392483 Setting up VGA for PCI: 00:02.0
1034 13:50:05.399305 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1035 13:50:05.402800 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1036 13:50:05.405978 Allocating resources...
1037 13:50:05.406515 Reading resources...
1038 13:50:05.412865 Root Device read_resources bus 0 link: 0
1039 13:50:05.415785 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1040 13:50:05.422753 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1041 13:50:05.426014 DOMAIN: 0000 read_resources bus 0 link: 0
1042 13:50:05.432551 PCI: 00:14.0 read_resources bus 0 link: 0
1043 13:50:05.435801 USB0 port 0 read_resources bus 0 link: 0
1044 13:50:05.444335 USB0 port 0 read_resources bus 0 link: 0 done
1045 13:50:05.447046 PCI: 00:14.0 read_resources bus 0 link: 0 done
1046 13:50:05.454909 PCI: 00:15.0 read_resources bus 1 link: 0
1047 13:50:05.457796 PCI: 00:15.0 read_resources bus 1 link: 0 done
1048 13:50:05.464266 PCI: 00:15.1 read_resources bus 2 link: 0
1049 13:50:05.467952 PCI: 00:15.1 read_resources bus 2 link: 0 done
1050 13:50:05.475649 PCI: 00:19.0 read_resources bus 3 link: 0
1051 13:50:05.481649 PCI: 00:19.0 read_resources bus 3 link: 0 done
1052 13:50:05.485180 PCI: 00:1d.0 read_resources bus 1 link: 0
1053 13:50:05.491838 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1054 13:50:05.495047 PCI: 00:1e.2 read_resources bus 4 link: 0
1055 13:50:05.501944 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1056 13:50:05.505275 PCI: 00:1e.3 read_resources bus 5 link: 0
1057 13:50:05.511913 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1058 13:50:05.515551 PCI: 00:1f.0 read_resources bus 0 link: 0
1059 13:50:05.521773 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1060 13:50:05.525465 DOMAIN: 0000 read_resources bus 0 link: 0 done
1061 13:50:05.531699 Root Device read_resources bus 0 link: 0 done
1062 13:50:05.535341 Done reading resources.
1063 13:50:05.539194 Show resources in subtree (Root Device)...After reading.
1064 13:50:05.545462 Root Device child on link 0 CPU_CLUSTER: 0
1065 13:50:05.548545 CPU_CLUSTER: 0 child on link 0 APIC: 00
1066 13:50:05.549020 APIC: 00
1067 13:50:05.552186 APIC: 01
1068 13:50:05.552753 APIC: 06
1069 13:50:05.553126 APIC: 07
1070 13:50:05.555967 APIC: 03
1071 13:50:05.556541 APIC: 02
1072 13:50:05.558870 APIC: 05
1073 13:50:05.559442 APIC: 04
1074 13:50:05.562378 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1075 13:50:05.572596 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1076 13:50:05.621747 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1077 13:50:05.622306 PCI: 00:00.0
1078 13:50:05.623001 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1079 13:50:05.623393 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1080 13:50:05.623794 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1081 13:50:05.624185 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1082 13:50:05.652908 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1083 13:50:05.653505 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1084 13:50:05.654225 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1085 13:50:05.659873 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1086 13:50:05.666843 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1087 13:50:05.677111 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1088 13:50:05.687060 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1089 13:50:05.696749 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1090 13:50:05.706161 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1091 13:50:05.716351 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1092 13:50:05.723357 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1093 13:50:05.732962 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1094 13:50:05.736591 PCI: 00:02.0
1095 13:50:05.746167 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1096 13:50:05.756010 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1097 13:50:05.762911 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1098 13:50:05.766496 PCI: 00:04.0
1099 13:50:05.767087 PCI: 00:08.0
1100 13:50:05.775810 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1101 13:50:05.779392 PCI: 00:12.0
1102 13:50:05.789302 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1103 13:50:05.792526 PCI: 00:14.0 child on link 0 USB0 port 0
1104 13:50:05.802866 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1105 13:50:05.809030 USB0 port 0 child on link 0 USB2 port 0
1106 13:50:05.809609 USB2 port 0
1107 13:50:05.812217 USB2 port 1
1108 13:50:05.812681 USB2 port 2
1109 13:50:05.815575 USB2 port 3
1110 13:50:05.816206 USB2 port 5
1111 13:50:05.819112 USB2 port 6
1112 13:50:05.819732 USB2 port 9
1113 13:50:05.822613 USB3 port 0
1114 13:50:05.823180 USB3 port 1
1115 13:50:05.825137 USB3 port 2
1116 13:50:05.825603 USB3 port 3
1117 13:50:05.828589 USB3 port 4
1118 13:50:05.829067 PCI: 00:14.2
1119 13:50:05.838448 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1120 13:50:05.848433 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1121 13:50:05.851716 PCI: 00:14.3
1122 13:50:05.862195 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1123 13:50:05.864772 PCI: 00:15.0 child on link 0 I2C: 01:15
1124 13:50:05.875028 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 13:50:05.878185 I2C: 01:15
1126 13:50:05.881471 PCI: 00:15.1 child on link 0 I2C: 02:5d
1127 13:50:05.891779 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1128 13:50:05.894733 I2C: 02:5d
1129 13:50:05.895209 GENERIC: 0.0
1130 13:50:05.898415 PCI: 00:16.0
1131 13:50:05.907970 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 13:50:05.908452 PCI: 00:17.0
1133 13:50:05.918195 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1134 13:50:05.927776 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1135 13:50:05.935271 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1136 13:50:05.944488 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1137 13:50:05.950987 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1138 13:50:05.960918 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1139 13:50:05.964215 PCI: 00:19.0 child on link 0 I2C: 03:1a
1140 13:50:05.974468 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1141 13:50:05.977621 I2C: 03:1a
1142 13:50:05.978423 I2C: 03:38
1143 13:50:05.978948 I2C: 03:39
1144 13:50:05.980951 I2C: 03:3a
1145 13:50:05.981755 I2C: 03:3b
1146 13:50:05.987100 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1147 13:50:05.994336 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1148 13:50:06.003939 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1149 13:50:06.014032 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1150 13:50:06.017152 PCI: 01:00.0
1151 13:50:06.027118 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 13:50:06.027696 PCI: 00:1e.0
1153 13:50:06.040241 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1154 13:50:06.050790 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1155 13:50:06.053741 PCI: 00:1e.2 child on link 0 SPI: 00
1156 13:50:06.063681 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 13:50:06.064265 SPI: 00
1158 13:50:06.067152 PCI: 00:1e.3 child on link 0 SPI: 01
1159 13:50:06.076676 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1160 13:50:06.080206 SPI: 01
1161 13:50:06.083487 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1162 13:50:06.093440 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1163 13:50:06.099571 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1164 13:50:06.103114 PNP: 0c09.0
1165 13:50:06.109699 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1166 13:50:06.113398 PCI: 00:1f.3
1167 13:50:06.122933 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1168 13:50:06.133370 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1169 13:50:06.133900 PCI: 00:1f.4
1170 13:50:06.143361 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1171 13:50:06.152542 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1172 13:50:06.156072 PCI: 00:1f.5
1173 13:50:06.163184 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1174 13:50:06.169666 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1175 13:50:06.176553 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1176 13:50:06.182768 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1177 13:50:06.186112 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1178 13:50:06.189413 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1179 13:50:06.196408 PCI: 00:17.0 18 * [0x60 - 0x67] io
1180 13:50:06.199851 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1181 13:50:06.205934 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1182 13:50:06.212516 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1183 13:50:06.219779 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1184 13:50:06.229379 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1185 13:50:06.235770 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1186 13:50:06.239045 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1187 13:50:06.245978 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1188 13:50:06.252554 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1189 13:50:06.256039 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1190 13:50:06.262355 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1191 13:50:06.265823 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1192 13:50:06.268964 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1193 13:50:06.275646 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1194 13:50:06.279019 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1195 13:50:06.285666 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1196 13:50:06.289013 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1197 13:50:06.295300 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1198 13:50:06.298498 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1199 13:50:06.305376 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1200 13:50:06.308407 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1201 13:50:06.315673 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1202 13:50:06.318376 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1203 13:50:06.325567 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1204 13:50:06.328402 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1205 13:50:06.334999 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1206 13:50:06.338543 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1207 13:50:06.341689 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1208 13:50:06.348610 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1209 13:50:06.352140 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1210 13:50:06.358242 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1211 13:50:06.364903 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1212 13:50:06.371152 avoid_fixed_resources: DOMAIN: 0000
1213 13:50:06.374806 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1214 13:50:06.381913 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1215 13:50:06.388035 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1216 13:50:06.397988 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1217 13:50:06.404388 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1218 13:50:06.411460 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1219 13:50:06.421091 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1220 13:50:06.427790 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1221 13:50:06.434192 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1222 13:50:06.444134 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1223 13:50:06.450775 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1224 13:50:06.457413 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1225 13:50:06.460883 Setting resources...
1226 13:50:06.467394 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1227 13:50:06.471228 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1228 13:50:06.473923 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1229 13:50:06.477557 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1230 13:50:06.480838 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1231 13:50:06.487081 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1232 13:50:06.494180 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1233 13:50:06.500505 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1234 13:50:06.507137 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1235 13:50:06.514327 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1236 13:50:06.517565 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1237 13:50:06.524045 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1238 13:50:06.527051 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1239 13:50:06.534165 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1240 13:50:06.537028 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1241 13:50:06.543709 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1242 13:50:06.547311 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1243 13:50:06.554051 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1244 13:50:06.556920 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1245 13:50:06.563674 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1246 13:50:06.567154 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1247 13:50:06.573606 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1248 13:50:06.576598 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1249 13:50:06.580200 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1250 13:50:06.586981 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1251 13:50:06.589992 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1252 13:50:06.596899 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1253 13:50:06.600128 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1254 13:50:06.607006 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1255 13:50:06.610130 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1256 13:50:06.616693 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1257 13:50:06.620152 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1258 13:50:06.626429 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1259 13:50:06.636743 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1260 13:50:06.643254 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1261 13:50:06.650137 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1262 13:50:06.656038 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1263 13:50:06.662867 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1264 13:50:06.666440 Root Device assign_resources, bus 0 link: 0
1265 13:50:06.673293 DOMAIN: 0000 assign_resources, bus 0 link: 0
1266 13:50:06.679848 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1267 13:50:06.689375 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1268 13:50:06.695725 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1269 13:50:06.706207 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1270 13:50:06.712016 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1271 13:50:06.722374 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1272 13:50:06.725262 PCI: 00:14.0 assign_resources, bus 0 link: 0
1273 13:50:06.729274 PCI: 00:14.0 assign_resources, bus 0 link: 0
1274 13:50:06.738881 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1275 13:50:06.745876 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1276 13:50:06.755869 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1277 13:50:06.762243 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1278 13:50:06.768982 PCI: 00:15.0 assign_resources, bus 1 link: 0
1279 13:50:06.772342 PCI: 00:15.0 assign_resources, bus 1 link: 0
1280 13:50:06.782478 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1281 13:50:06.785655 PCI: 00:15.1 assign_resources, bus 2 link: 0
1282 13:50:06.789231 PCI: 00:15.1 assign_resources, bus 2 link: 0
1283 13:50:06.798560 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1284 13:50:06.805403 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1285 13:50:06.815294 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1286 13:50:06.822283 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1287 13:50:06.828358 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1288 13:50:06.838487 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1289 13:50:06.845186 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1290 13:50:06.851884 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1291 13:50:06.858407 PCI: 00:19.0 assign_resources, bus 3 link: 0
1292 13:50:06.862005 PCI: 00:19.0 assign_resources, bus 3 link: 0
1293 13:50:06.871473 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1294 13:50:06.881280 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1295 13:50:06.888198 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1296 13:50:06.891648 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1297 13:50:06.901477 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1298 13:50:06.904751 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1299 13:50:06.914613 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1300 13:50:06.921083 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1301 13:50:06.928066 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1302 13:50:06.931330 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1303 13:50:06.940951 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1304 13:50:06.944602 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1305 13:50:06.947670 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1306 13:50:06.954736 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1307 13:50:06.958128 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1308 13:50:06.964311 LPC: Trying to open IO window from 800 size 1ff
1309 13:50:06.971206 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1310 13:50:06.981061 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1311 13:50:06.988078 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1312 13:50:06.997942 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1313 13:50:07.000852 DOMAIN: 0000 assign_resources, bus 0 link: 0
1314 13:50:07.007825 Root Device assign_resources, bus 0 link: 0
1315 13:50:07.008252 Done setting resources.
1316 13:50:07.014668 Show resources in subtree (Root Device)...After assigning values.
1317 13:50:07.021011 Root Device child on link 0 CPU_CLUSTER: 0
1318 13:50:07.024204 CPU_CLUSTER: 0 child on link 0 APIC: 00
1319 13:50:07.024632 APIC: 00
1320 13:50:07.027388 APIC: 01
1321 13:50:07.027947 APIC: 06
1322 13:50:07.028304 APIC: 07
1323 13:50:07.031003 APIC: 03
1324 13:50:07.031477 APIC: 02
1325 13:50:07.031860 APIC: 05
1326 13:50:07.034290 APIC: 04
1327 13:50:07.037970 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1328 13:50:07.047083 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1329 13:50:07.057487 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1330 13:50:07.060752 PCI: 00:00.0
1331 13:50:07.071083 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1332 13:50:07.080764 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1333 13:50:07.090522 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1334 13:50:07.096767 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1335 13:50:07.106697 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1336 13:50:07.116986 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1337 13:50:07.126972 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1338 13:50:07.136518 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1339 13:50:07.146729 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1340 13:50:07.153357 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1341 13:50:07.163075 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1342 13:50:07.172680 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1343 13:50:07.182746 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1344 13:50:07.192841 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1345 13:50:07.202989 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1346 13:50:07.209863 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1347 13:50:07.212494 PCI: 00:02.0
1348 13:50:07.222636 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1349 13:50:07.232682 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1350 13:50:07.242529 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1351 13:50:07.245384 PCI: 00:04.0
1352 13:50:07.245824 PCI: 00:08.0
1353 13:50:07.255493 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1354 13:50:07.258899 PCI: 00:12.0
1355 13:50:07.268796 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1356 13:50:07.271980 PCI: 00:14.0 child on link 0 USB0 port 0
1357 13:50:07.282155 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1358 13:50:07.288924 USB0 port 0 child on link 0 USB2 port 0
1359 13:50:07.289487 USB2 port 0
1360 13:50:07.292185 USB2 port 1
1361 13:50:07.292781 USB2 port 2
1362 13:50:07.295077 USB2 port 3
1363 13:50:07.295508 USB2 port 5
1364 13:50:07.298366 USB2 port 6
1365 13:50:07.298935 USB2 port 9
1366 13:50:07.301680 USB3 port 0
1367 13:50:07.302116 USB3 port 1
1368 13:50:07.305180 USB3 port 2
1369 13:50:07.305614 USB3 port 3
1370 13:50:07.308431 USB3 port 4
1371 13:50:07.308864 PCI: 00:14.2
1372 13:50:07.322113 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1373 13:50:07.331523 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1374 13:50:07.332100 PCI: 00:14.3
1375 13:50:07.341725 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1376 13:50:07.348535 PCI: 00:15.0 child on link 0 I2C: 01:15
1377 13:50:07.358874 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1378 13:50:07.359458 I2C: 01:15
1379 13:50:07.361527 PCI: 00:15.1 child on link 0 I2C: 02:5d
1380 13:50:07.374758 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1381 13:50:07.375343 I2C: 02:5d
1382 13:50:07.377858 GENERIC: 0.0
1383 13:50:07.378417 PCI: 00:16.0
1384 13:50:07.388217 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1385 13:50:07.391370 PCI: 00:17.0
1386 13:50:07.401051 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1387 13:50:07.411236 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1388 13:50:07.420811 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1389 13:50:07.427562 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1390 13:50:07.437469 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1391 13:50:07.447396 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1392 13:50:07.450733 PCI: 00:19.0 child on link 0 I2C: 03:1a
1393 13:50:07.463710 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1394 13:50:07.464238 I2C: 03:1a
1395 13:50:07.467497 I2C: 03:38
1396 13:50:07.468490 I2C: 03:39
1397 13:50:07.469059 I2C: 03:3a
1398 13:50:07.470722 I2C: 03:3b
1399 13:50:07.473653 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1400 13:50:07.484086 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1401 13:50:07.493542 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1402 13:50:07.503507 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1403 13:50:07.507116 PCI: 01:00.0
1404 13:50:07.516992 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1405 13:50:07.517509 PCI: 00:1e.0
1406 13:50:07.530168 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1407 13:50:07.539720 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1408 13:50:07.543283 PCI: 00:1e.2 child on link 0 SPI: 00
1409 13:50:07.552977 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1410 13:50:07.556666 SPI: 00
1411 13:50:07.559427 PCI: 00:1e.3 child on link 0 SPI: 01
1412 13:50:07.569692 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1413 13:50:07.570238 SPI: 01
1414 13:50:07.575998 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1415 13:50:07.583017 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1416 13:50:07.592639 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1417 13:50:07.593253 PNP: 0c09.0
1418 13:50:07.602932 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1419 13:50:07.606268 PCI: 00:1f.3
1420 13:50:07.616157 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1421 13:50:07.626389 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1422 13:50:07.626913 PCI: 00:1f.4
1423 13:50:07.635696 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1424 13:50:07.645500 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1425 13:50:07.648986 PCI: 00:1f.5
1426 13:50:07.659028 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1427 13:50:07.662359 Done allocating resources.
1428 13:50:07.666013 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1429 13:50:07.668721 Enabling resources...
1430 13:50:07.675445 PCI: 00:00.0 subsystem <- 8086/9b61
1431 13:50:07.676152 PCI: 00:00.0 cmd <- 06
1432 13:50:07.678809 PCI: 00:02.0 subsystem <- 8086/9b41
1433 13:50:07.682469 PCI: 00:02.0 cmd <- 03
1434 13:50:07.685316 PCI: 00:08.0 cmd <- 06
1435 13:50:07.688712 PCI: 00:12.0 subsystem <- 8086/02f9
1436 13:50:07.692320 PCI: 00:12.0 cmd <- 02
1437 13:50:07.695253 PCI: 00:14.0 subsystem <- 8086/02ed
1438 13:50:07.698529 PCI: 00:14.0 cmd <- 02
1439 13:50:07.698950 PCI: 00:14.2 cmd <- 02
1440 13:50:07.705924 PCI: 00:14.3 subsystem <- 8086/02f0
1441 13:50:07.706470 PCI: 00:14.3 cmd <- 02
1442 13:50:07.709148 PCI: 00:15.0 subsystem <- 8086/02e8
1443 13:50:07.712086 PCI: 00:15.0 cmd <- 02
1444 13:50:07.715557 PCI: 00:15.1 subsystem <- 8086/02e9
1445 13:50:07.718994 PCI: 00:15.1 cmd <- 02
1446 13:50:07.722075 PCI: 00:16.0 subsystem <- 8086/02e0
1447 13:50:07.725654 PCI: 00:16.0 cmd <- 02
1448 13:50:07.728699 PCI: 00:17.0 subsystem <- 8086/02d3
1449 13:50:07.732179 PCI: 00:17.0 cmd <- 03
1450 13:50:07.735576 PCI: 00:19.0 subsystem <- 8086/02c5
1451 13:50:07.738480 PCI: 00:19.0 cmd <- 02
1452 13:50:07.742289 PCI: 00:1d.0 bridge ctrl <- 0013
1453 13:50:07.745542 PCI: 00:1d.0 subsystem <- 8086/02b0
1454 13:50:07.748999 PCI: 00:1d.0 cmd <- 06
1455 13:50:07.751813 PCI: 00:1e.0 subsystem <- 8086/02a8
1456 13:50:07.755425 PCI: 00:1e.0 cmd <- 06
1457 13:50:07.758406 PCI: 00:1e.2 subsystem <- 8086/02aa
1458 13:50:07.758827 PCI: 00:1e.2 cmd <- 06
1459 13:50:07.765497 PCI: 00:1e.3 subsystem <- 8086/02ab
1460 13:50:07.766021 PCI: 00:1e.3 cmd <- 02
1461 13:50:07.771822 PCI: 00:1f.0 subsystem <- 8086/0284
1462 13:50:07.772381 PCI: 00:1f.0 cmd <- 407
1463 13:50:07.774895 PCI: 00:1f.3 subsystem <- 8086/02c8
1464 13:50:07.778679 PCI: 00:1f.3 cmd <- 02
1465 13:50:07.781927 PCI: 00:1f.4 subsystem <- 8086/02a3
1466 13:50:07.784996 PCI: 00:1f.4 cmd <- 03
1467 13:50:07.788212 PCI: 00:1f.5 subsystem <- 8086/02a4
1468 13:50:07.791890 PCI: 00:1f.5 cmd <- 406
1469 13:50:07.800325 PCI: 01:00.0 cmd <- 02
1470 13:50:07.805939 done.
1471 13:50:07.818630 ME: Version: 14.0.39.1367
1472 13:50:07.824764 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1473 13:50:07.828178 Initializing devices...
1474 13:50:07.828698 Root Device init ...
1475 13:50:07.834630 Chrome EC: Set SMI mask to 0x0000000000000000
1476 13:50:07.838615 Chrome EC: clear events_b mask to 0x0000000000000000
1477 13:50:07.844998 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1478 13:50:07.851775 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1479 13:50:07.858350 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1480 13:50:07.861190 Chrome EC: Set WAKE mask to 0x0000000000000000
1481 13:50:07.864841 Root Device init finished in 35191 usecs
1482 13:50:07.868336 CPU_CLUSTER: 0 init ...
1483 13:50:07.875147 CPU_CLUSTER: 0 init finished in 2446 usecs
1484 13:50:07.878988 PCI: 00:00.0 init ...
1485 13:50:07.882590 CPU TDP: 15 Watts
1486 13:50:07.885517 CPU PL2 = 64 Watts
1487 13:50:07.888988 PCI: 00:00.0 init finished in 7080 usecs
1488 13:50:07.892379 PCI: 00:02.0 init ...
1489 13:50:07.895848 PCI: 00:02.0 init finished in 2253 usecs
1490 13:50:07.899023 PCI: 00:08.0 init ...
1491 13:50:07.902676 PCI: 00:08.0 init finished in 2252 usecs
1492 13:50:07.905808 PCI: 00:12.0 init ...
1493 13:50:07.909232 PCI: 00:12.0 init finished in 2252 usecs
1494 13:50:07.912117 PCI: 00:14.0 init ...
1495 13:50:07.915917 PCI: 00:14.0 init finished in 2253 usecs
1496 13:50:07.918688 PCI: 00:14.2 init ...
1497 13:50:07.922123 PCI: 00:14.2 init finished in 2244 usecs
1498 13:50:07.925660 PCI: 00:14.3 init ...
1499 13:50:07.929052 PCI: 00:14.3 init finished in 2271 usecs
1500 13:50:07.932309 PCI: 00:15.0 init ...
1501 13:50:07.935753 DW I2C bus 0 at 0xd121f000 (400 KHz)
1502 13:50:07.938822 PCI: 00:15.0 init finished in 5978 usecs
1503 13:50:07.942339 PCI: 00:15.1 init ...
1504 13:50:07.945247 DW I2C bus 1 at 0xd1220000 (400 KHz)
1505 13:50:07.948903 PCI: 00:15.1 init finished in 5968 usecs
1506 13:50:07.952654 PCI: 00:16.0 init ...
1507 13:50:07.955442 PCI: 00:16.0 init finished in 2252 usecs
1508 13:50:07.959858 PCI: 00:19.0 init ...
1509 13:50:07.963364 DW I2C bus 4 at 0xd1222000 (400 KHz)
1510 13:50:07.966362 PCI: 00:19.0 init finished in 5977 usecs
1511 13:50:07.970185 PCI: 00:1d.0 init ...
1512 13:50:07.973668 Initializing PCH PCIe bridge.
1513 13:50:07.976744 PCI: 00:1d.0 init finished in 5284 usecs
1514 13:50:07.980854 PCI: 00:1f.0 init ...
1515 13:50:07.984247 IOAPIC: Initializing IOAPIC at 0xfec00000
1516 13:50:07.990890 IOAPIC: Bootstrap Processor Local APIC = 0x00
1517 13:50:07.991582 IOAPIC: ID = 0x02
1518 13:50:07.993951 IOAPIC: Dumping registers
1519 13:50:07.997328 reg 0x0000: 0x02000000
1520 13:50:08.000930 reg 0x0001: 0x00770020
1521 13:50:08.001458 reg 0x0002: 0x00000000
1522 13:50:08.008081 PCI: 00:1f.0 init finished in 23538 usecs
1523 13:50:08.011339 PCI: 00:1f.4 init ...
1524 13:50:08.014384 PCI: 00:1f.4 init finished in 2261 usecs
1525 13:50:08.025148 PCI: 01:00.0 init ...
1526 13:50:08.028967 PCI: 01:00.0 init finished in 2253 usecs
1527 13:50:08.032946 PNP: 0c09.0 init ...
1528 13:50:08.036278 Google Chrome EC uptime: 11.091 seconds
1529 13:50:08.042815 Google Chrome AP resets since EC boot: 0
1530 13:50:08.046240 Google Chrome most recent AP reset causes:
1531 13:50:08.052656 Google Chrome EC reset flags at last EC boot: reset-pin
1532 13:50:08.056521 PNP: 0c09.0 init finished in 20582 usecs
1533 13:50:08.059125 Devices initialized
1534 13:50:08.059811 Show all devs... After init.
1535 13:50:08.062598 Root Device: enabled 1
1536 13:50:08.066145 CPU_CLUSTER: 0: enabled 1
1537 13:50:08.069069 DOMAIN: 0000: enabled 1
1538 13:50:08.069614 APIC: 00: enabled 1
1539 13:50:08.072978 PCI: 00:00.0: enabled 1
1540 13:50:08.076029 PCI: 00:02.0: enabled 1
1541 13:50:08.079459 PCI: 00:04.0: enabled 0
1542 13:50:08.080151 PCI: 00:05.0: enabled 0
1543 13:50:08.082899 PCI: 00:12.0: enabled 1
1544 13:50:08.086270 PCI: 00:12.5: enabled 0
1545 13:50:08.086829 PCI: 00:12.6: enabled 0
1546 13:50:08.088883 PCI: 00:14.0: enabled 1
1547 13:50:08.092516 PCI: 00:14.1: enabled 0
1548 13:50:08.096020 PCI: 00:14.3: enabled 1
1549 13:50:08.096448 PCI: 00:14.5: enabled 0
1550 13:50:08.099048 PCI: 00:15.0: enabled 1
1551 13:50:08.102486 PCI: 00:15.1: enabled 1
1552 13:50:08.106031 PCI: 00:15.2: enabled 0
1553 13:50:08.106559 PCI: 00:15.3: enabled 0
1554 13:50:08.109058 PCI: 00:16.0: enabled 1
1555 13:50:08.112198 PCI: 00:16.1: enabled 0
1556 13:50:08.115488 PCI: 00:16.2: enabled 0
1557 13:50:08.116216 PCI: 00:16.3: enabled 0
1558 13:50:08.118879 PCI: 00:16.4: enabled 0
1559 13:50:08.122249 PCI: 00:16.5: enabled 0
1560 13:50:08.125855 PCI: 00:17.0: enabled 1
1561 13:50:08.126294 PCI: 00:19.0: enabled 1
1562 13:50:08.128552 PCI: 00:19.1: enabled 0
1563 13:50:08.131925 PCI: 00:19.2: enabled 0
1564 13:50:08.132369 PCI: 00:1a.0: enabled 0
1565 13:50:08.135154 PCI: 00:1c.0: enabled 0
1566 13:50:08.138825 PCI: 00:1c.1: enabled 0
1567 13:50:08.141939 PCI: 00:1c.2: enabled 0
1568 13:50:08.142379 PCI: 00:1c.3: enabled 0
1569 13:50:08.145308 PCI: 00:1c.4: enabled 0
1570 13:50:08.148785 PCI: 00:1c.5: enabled 0
1571 13:50:08.151789 PCI: 00:1c.6: enabled 0
1572 13:50:08.152230 PCI: 00:1c.7: enabled 0
1573 13:50:08.155313 PCI: 00:1d.0: enabled 1
1574 13:50:08.158684 PCI: 00:1d.1: enabled 0
1575 13:50:08.161691 PCI: 00:1d.2: enabled 0
1576 13:50:08.162206 PCI: 00:1d.3: enabled 0
1577 13:50:08.165208 PCI: 00:1d.4: enabled 0
1578 13:50:08.168654 PCI: 00:1d.5: enabled 0
1579 13:50:08.169100 PCI: 00:1e.0: enabled 1
1580 13:50:08.171686 PCI: 00:1e.1: enabled 0
1581 13:50:08.175147 PCI: 00:1e.2: enabled 1
1582 13:50:08.178238 PCI: 00:1e.3: enabled 1
1583 13:50:08.178752 PCI: 00:1f.0: enabled 1
1584 13:50:08.181836 PCI: 00:1f.1: enabled 0
1585 13:50:08.185546 PCI: 00:1f.2: enabled 0
1586 13:50:08.188419 PCI: 00:1f.3: enabled 1
1587 13:50:08.188955 PCI: 00:1f.4: enabled 1
1588 13:50:08.191766 PCI: 00:1f.5: enabled 1
1589 13:50:08.195250 PCI: 00:1f.6: enabled 0
1590 13:50:08.198284 USB0 port 0: enabled 1
1591 13:50:08.198708 I2C: 01:15: enabled 1
1592 13:50:08.201732 I2C: 02:5d: enabled 1
1593 13:50:08.204583 GENERIC: 0.0: enabled 1
1594 13:50:08.205008 I2C: 03:1a: enabled 1
1595 13:50:08.208135 I2C: 03:38: enabled 1
1596 13:50:08.211655 I2C: 03:39: enabled 1
1597 13:50:08.212146 I2C: 03:3a: enabled 1
1598 13:50:08.214924 I2C: 03:3b: enabled 1
1599 13:50:08.218171 PCI: 00:00.0: enabled 1
1600 13:50:08.218599 SPI: 00: enabled 1
1601 13:50:08.221490 SPI: 01: enabled 1
1602 13:50:08.224629 PNP: 0c09.0: enabled 1
1603 13:50:08.225176 USB2 port 0: enabled 1
1604 13:50:08.228009 USB2 port 1: enabled 1
1605 13:50:08.231353 USB2 port 2: enabled 0
1606 13:50:08.231814 USB2 port 3: enabled 0
1607 13:50:08.234769 USB2 port 5: enabled 0
1608 13:50:08.238074 USB2 port 6: enabled 1
1609 13:50:08.241251 USB2 port 9: enabled 1
1610 13:50:08.241675 USB3 port 0: enabled 1
1611 13:50:08.244597 USB3 port 1: enabled 1
1612 13:50:08.248546 USB3 port 2: enabled 1
1613 13:50:08.248972 USB3 port 3: enabled 1
1614 13:50:08.251911 USB3 port 4: enabled 0
1615 13:50:08.254274 APIC: 01: enabled 1
1616 13:50:08.254722 APIC: 06: enabled 1
1617 13:50:08.257800 APIC: 07: enabled 1
1618 13:50:08.261789 APIC: 03: enabled 1
1619 13:50:08.262334 APIC: 02: enabled 1
1620 13:50:08.264716 APIC: 05: enabled 1
1621 13:50:08.265248 APIC: 04: enabled 1
1622 13:50:08.267670 PCI: 00:08.0: enabled 1
1623 13:50:08.271041 PCI: 00:14.2: enabled 1
1624 13:50:08.274205 PCI: 01:00.0: enabled 1
1625 13:50:08.278602 Disabling ACPI via APMC:
1626 13:50:08.279131 done.
1627 13:50:08.285095 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1628 13:50:08.287830 ELOG: NV offset 0xaf0000 size 0x4000
1629 13:50:08.294485 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1630 13:50:08.301333 ELOG: Event(17) added with size 13 at 2023-08-16 13:49:02 UTC
1631 13:50:08.307830 POST: Unexpected post code in previous boot: 0x73
1632 13:50:08.314145 ELOG: Event(A3) added with size 11 at 2023-08-16 13:49:02 UTC
1633 13:50:08.321116 ELOG: Event(A6) added with size 13 at 2023-08-16 13:49:02 UTC
1634 13:50:08.327728 ELOG: Event(92) added with size 9 at 2023-08-16 13:49:02 UTC
1635 13:50:08.331085 ELOG: Event(93) added with size 9 at 2023-08-16 13:49:02 UTC
1636 13:50:08.337469 ELOG: Event(16) added with size 11 at 2023-08-16 13:49:02 UTC
1637 13:50:08.340833 Erasing flash addr af0000 + 4 KiB
1638 13:50:08.413921 ELOG: Event(9A) added with size 9 at 2023-08-16 13:49:02 UTC
1639 13:50:08.420376 ELOG: Event(9E) added with size 10 at 2023-08-16 13:49:02 UTC
1640 13:50:08.426699 ELOG: Event(9F) added with size 14 at 2023-08-16 13:49:02 UTC
1641 13:50:08.434068 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 63
1642 13:50:08.440488 ELOG: Event(A1) added with size 10 at 2023-08-16 13:49:02 UTC
1643 13:50:08.447093 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1644 13:50:08.453735 ELOG: Event(A0) added with size 9 at 2023-08-16 13:49:02 UTC
1645 13:50:08.457204 elog_add_boot_reason: Logged dev mode boot
1646 13:50:08.460067 Finalize devices...
1647 13:50:08.463169 PCI: 00:17.0 final
1648 13:50:08.463663 Devices finalized
1649 13:50:08.470051 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1650 13:50:08.473309 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1651 13:50:08.479727 ME: HFSTS1 : 0x90000245
1652 13:50:08.483174 ME: HFSTS2 : 0x3B850126
1653 13:50:08.486736 ME: HFSTS3 : 0x00000020
1654 13:50:08.490353 ME: HFSTS4 : 0x00004800
1655 13:50:08.496427 ME: HFSTS5 : 0x00000000
1656 13:50:08.499482 ME: HFSTS6 : 0x40400006
1657 13:50:08.502930 ME: Manufacturing Mode : NO
1658 13:50:08.506587 ME: FW Partition Table : OK
1659 13:50:08.509537 ME: Bringup Loader Failure : NO
1660 13:50:08.513377 ME: Firmware Init Complete : YES
1661 13:50:08.516659 ME: Boot Options Present : NO
1662 13:50:08.519374 ME: Update In Progress : NO
1663 13:50:08.522992 ME: D0i3 Support : YES
1664 13:50:08.526049 ME: Low Power State Enabled : NO
1665 13:50:08.529451 ME: CPU Replaced : NO
1666 13:50:08.533159 ME: CPU Replacement Valid : YES
1667 13:50:08.536132 ME: Current Working State : 5
1668 13:50:08.539804 ME: Current Operation State : 1
1669 13:50:08.542671 ME: Current Operation Mode : 0
1670 13:50:08.546203 ME: Error Code : 0
1671 13:50:08.549650 ME: CPU Debug Disabled : YES
1672 13:50:08.552688 ME: TXT Support : NO
1673 13:50:08.556348 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1674 13:50:08.562490 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1675 13:50:08.566065 CBFS @ c08000 size 3f8000
1676 13:50:08.572460 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1677 13:50:08.575969 CBFS: Locating 'fallback/dsdt.aml'
1678 13:50:08.579441 CBFS: Found @ offset 10bb80 size 3fa5
1679 13:50:08.582634 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1680 13:50:08.586083 CBFS @ c08000 size 3f8000
1681 13:50:08.592167 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1682 13:50:08.595666 CBFS: Locating 'fallback/slic'
1683 13:50:08.599108 CBFS: 'fallback/slic' not found.
1684 13:50:08.605685 ACPI: Writing ACPI tables at 99b3e000.
1685 13:50:08.606108 ACPI: * FACS
1686 13:50:08.608739 ACPI: * DSDT
1687 13:50:08.612323 Ramoops buffer: 0x100000@0x99a3d000.
1688 13:50:08.615766 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1689 13:50:08.622263 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1690 13:50:08.625800 Google Chrome EC: version:
1691 13:50:08.628978 ro: helios_v2.0.2659-56403530b
1692 13:50:08.632098 rw: helios_v2.0.2849-c41de27e7d
1693 13:50:08.632516 running image: 1
1694 13:50:08.636439 ACPI: * FADT
1695 13:50:08.636904 SCI is IRQ9
1696 13:50:08.643118 ACPI: added table 1/32, length now 40
1697 13:50:08.643676 ACPI: * SSDT
1698 13:50:08.646200 Found 1 CPU(s) with 8 core(s) each.
1699 13:50:08.649625 Error: Could not locate 'wifi_sar' in VPD.
1700 13:50:08.656885 Checking CBFS for default SAR values
1701 13:50:08.659562 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1702 13:50:08.663075 CBFS @ c08000 size 3f8000
1703 13:50:08.669744 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1704 13:50:08.673067 CBFS: Locating 'wifi_sar_defaults.hex'
1705 13:50:08.675868 CBFS: Found @ offset 5fac0 size 77
1706 13:50:08.679341 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1707 13:50:08.686028 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1708 13:50:08.689450 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1709 13:50:08.695901 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1710 13:50:08.698847 failed to find key in VPD: dsm_calib_r0_0
1711 13:50:08.708875 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1712 13:50:08.712440 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1713 13:50:08.719195 failed to find key in VPD: dsm_calib_r0_1
1714 13:50:08.725479 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1715 13:50:08.732126 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1716 13:50:08.735248 failed to find key in VPD: dsm_calib_r0_2
1717 13:50:08.745619 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1718 13:50:08.748622 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1719 13:50:08.755180 failed to find key in VPD: dsm_calib_r0_3
1720 13:50:08.761520 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1721 13:50:08.768318 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1722 13:50:08.771500 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1723 13:50:08.778684 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1724 13:50:08.782158 EC returned error result code 1
1725 13:50:08.785564 EC returned error result code 1
1726 13:50:08.789103 EC returned error result code 1
1727 13:50:08.792835 PS2K: Bad resp from EC. Vivaldi disabled!
1728 13:50:08.798829 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1729 13:50:08.805959 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1730 13:50:08.809073 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1731 13:50:08.815517 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1732 13:50:08.818916 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1733 13:50:08.825589 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1734 13:50:08.832045 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1735 13:50:08.838969 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1736 13:50:08.842046 ACPI: added table 2/32, length now 44
1737 13:50:08.842582 ACPI: * MCFG
1738 13:50:08.848286 ACPI: added table 3/32, length now 48
1739 13:50:08.848709 ACPI: * TPM2
1740 13:50:08.851826 TPM2 log created at 99a2d000
1741 13:50:08.855027 ACPI: added table 4/32, length now 52
1742 13:50:08.858606 ACPI: * MADT
1743 13:50:08.859120 SCI is IRQ9
1744 13:50:08.862019 ACPI: added table 5/32, length now 56
1745 13:50:08.865005 current = 99b43ac0
1746 13:50:08.865497 ACPI: * DMAR
1747 13:50:08.868873 ACPI: added table 6/32, length now 60
1748 13:50:08.872212 ACPI: * IGD OpRegion
1749 13:50:08.875373 GMA: Found VBT in CBFS
1750 13:50:08.878603 GMA: Found valid VBT in CBFS
1751 13:50:08.881777 ACPI: added table 7/32, length now 64
1752 13:50:08.882353 ACPI: * HPET
1753 13:50:08.885126 ACPI: added table 8/32, length now 68
1754 13:50:08.888206 ACPI: done.
1755 13:50:08.891787 ACPI tables: 31744 bytes.
1756 13:50:08.894812 smbios_write_tables: 99a2c000
1757 13:50:08.898230 EC returned error result code 3
1758 13:50:08.901741 Couldn't obtain OEM name from CBI
1759 13:50:08.904655 Create SMBIOS type 17
1760 13:50:08.907998 PCI: 00:00.0 (Intel Cannonlake)
1761 13:50:08.908443 PCI: 00:14.3 (Intel WiFi)
1762 13:50:08.911503 SMBIOS tables: 939 bytes.
1763 13:50:08.914488 Writing table forward entry at 0x00000500
1764 13:50:08.921504 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1765 13:50:08.924928 Writing coreboot table at 0x99b62000
1766 13:50:08.931238 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1767 13:50:08.934627 1. 0000000000001000-000000000009ffff: RAM
1768 13:50:08.941258 2. 00000000000a0000-00000000000fffff: RESERVED
1769 13:50:08.944804 3. 0000000000100000-0000000099a2bfff: RAM
1770 13:50:08.951026 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1771 13:50:08.954730 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1772 13:50:08.961071 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1773 13:50:08.967510 7. 000000009a000000-000000009f7fffff: RESERVED
1774 13:50:08.970890 8. 00000000e0000000-00000000efffffff: RESERVED
1775 13:50:08.974784 9. 00000000fc000000-00000000fc000fff: RESERVED
1776 13:50:08.980950 10. 00000000fe000000-00000000fe00ffff: RESERVED
1777 13:50:08.984118 11. 00000000fed10000-00000000fed17fff: RESERVED
1778 13:50:08.991185 12. 00000000fed80000-00000000fed83fff: RESERVED
1779 13:50:08.994563 13. 00000000fed90000-00000000fed91fff: RESERVED
1780 13:50:09.000701 14. 00000000feda0000-00000000feda1fff: RESERVED
1781 13:50:09.004350 15. 0000000100000000-000000045e7fffff: RAM
1782 13:50:09.007866 Graphics framebuffer located at 0xc0000000
1783 13:50:09.010845 Passing 5 GPIOs to payload:
1784 13:50:09.017482 NAME | PORT | POLARITY | VALUE
1785 13:50:09.020741 write protect | undefined | high | low
1786 13:50:09.027143 lid | undefined | high | high
1787 13:50:09.030663 power | undefined | high | low
1788 13:50:09.037098 oprom | undefined | high | low
1789 13:50:09.043950 EC in RW | 0x000000cb | high | low
1790 13:50:09.044462 Board ID: 4
1791 13:50:09.050329 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1792 13:50:09.050773 CBFS @ c08000 size 3f8000
1793 13:50:09.057545 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1794 13:50:09.064184 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1795 13:50:09.067486 coreboot table: 1492 bytes.
1796 13:50:09.070378 IMD ROOT 0. 99fff000 00001000
1797 13:50:09.074033 IMD SMALL 1. 99ffe000 00001000
1798 13:50:09.077247 FSP MEMORY 2. 99c4e000 003b0000
1799 13:50:09.080444 CONSOLE 3. 99c2e000 00020000
1800 13:50:09.083926 FMAP 4. 99c2d000 0000054e
1801 13:50:09.087496 TIME STAMP 5. 99c2c000 00000910
1802 13:50:09.090991 VBOOT WORK 6. 99c18000 00014000
1803 13:50:09.093676 MRC DATA 7. 99c16000 00001958
1804 13:50:09.096966 ROMSTG STCK 8. 99c15000 00001000
1805 13:50:09.100375 AFTER CAR 9. 99c0b000 0000a000
1806 13:50:09.104039 RAMSTAGE 10. 99baf000 0005c000
1807 13:50:09.107007 REFCODE 11. 99b7a000 00035000
1808 13:50:09.110734 SMM BACKUP 12. 99b6a000 00010000
1809 13:50:09.114024 COREBOOT 13. 99b62000 00008000
1810 13:50:09.117226 ACPI 14. 99b3e000 00024000
1811 13:50:09.120494 ACPI GNVS 15. 99b3d000 00001000
1812 13:50:09.123830 RAMOOPS 16. 99a3d000 00100000
1813 13:50:09.127332 TPM2 TCGLOG17. 99a2d000 00010000
1814 13:50:09.130386 SMBIOS 18. 99a2c000 00000800
1815 13:50:09.130825 IMD small region:
1816 13:50:09.134151 IMD ROOT 0. 99ffec00 00000400
1817 13:50:09.137028 FSP RUNTIME 1. 99ffebe0 00000004
1818 13:50:09.143878 EC HOSTEVENT 2. 99ffebc0 00000008
1819 13:50:09.147165 POWER STATE 3. 99ffeb80 00000040
1820 13:50:09.150602 ROMSTAGE 4. 99ffeb60 00000004
1821 13:50:09.153524 MEM INFO 5. 99ffe9a0 000001b9
1822 13:50:09.156675 VPD 6. 99ffe920 0000006c
1823 13:50:09.160476 MTRR: Physical address space:
1824 13:50:09.166938 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1825 13:50:09.170208 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1826 13:50:09.176899 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1827 13:50:09.183362 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1828 13:50:09.190416 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1829 13:50:09.196516 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1830 13:50:09.203387 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1831 13:50:09.207000 MTRR: Fixed MSR 0x250 0x0606060606060606
1832 13:50:09.209949 MTRR: Fixed MSR 0x258 0x0606060606060606
1833 13:50:09.216928 MTRR: Fixed MSR 0x259 0x0000000000000000
1834 13:50:09.219697 MTRR: Fixed MSR 0x268 0x0606060606060606
1835 13:50:09.223425 MTRR: Fixed MSR 0x269 0x0606060606060606
1836 13:50:09.226408 MTRR: Fixed MSR 0x26a 0x0606060606060606
1837 13:50:09.232894 MTRR: Fixed MSR 0x26b 0x0606060606060606
1838 13:50:09.236180 MTRR: Fixed MSR 0x26c 0x0606060606060606
1839 13:50:09.239427 MTRR: Fixed MSR 0x26d 0x0606060606060606
1840 13:50:09.242636 MTRR: Fixed MSR 0x26e 0x0606060606060606
1841 13:50:09.246032 MTRR: Fixed MSR 0x26f 0x0606060606060606
1842 13:50:09.250476 call enable_fixed_mtrr()
1843 13:50:09.253502 CPU physical address size: 39 bits
1844 13:50:09.260497 MTRR: default type WB/UC MTRR counts: 6/8.
1845 13:50:09.263865 MTRR: WB selected as default type.
1846 13:50:09.270297 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1847 13:50:09.273277 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1848 13:50:09.280098 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1849 13:50:09.286741 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1850 13:50:09.293605 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1851 13:50:09.300112 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1852 13:50:09.306793 MTRR: Fixed MSR 0x250 0x0606060606060606
1853 13:50:09.309842 MTRR: Fixed MSR 0x258 0x0606060606060606
1854 13:50:09.313280 MTRR: Fixed MSR 0x259 0x0000000000000000
1855 13:50:09.316760 MTRR: Fixed MSR 0x268 0x0606060606060606
1856 13:50:09.319799 MTRR: Fixed MSR 0x269 0x0606060606060606
1857 13:50:09.326207 MTRR: Fixed MSR 0x26a 0x0606060606060606
1858 13:50:09.329900 MTRR: Fixed MSR 0x26b 0x0606060606060606
1859 13:50:09.332935 MTRR: Fixed MSR 0x26c 0x0606060606060606
1860 13:50:09.336217 MTRR: Fixed MSR 0x26d 0x0606060606060606
1861 13:50:09.342822 MTRR: Fixed MSR 0x26e 0x0606060606060606
1862 13:50:09.346172 MTRR: Fixed MSR 0x26f 0x0606060606060606
1863 13:50:09.349469 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 13:50:09.352650 call enable_fixed_mtrr()
1865 13:50:09.356419 MTRR: Fixed MSR 0x258 0x0606060606060606
1866 13:50:09.360139 MTRR: Fixed MSR 0x259 0x0000000000000000
1867 13:50:09.366717 MTRR: Fixed MSR 0x268 0x0606060606060606
1868 13:50:09.369837 MTRR: Fixed MSR 0x269 0x0606060606060606
1869 13:50:09.372804 MTRR: Fixed MSR 0x26a 0x0606060606060606
1870 13:50:09.376382 MTRR: Fixed MSR 0x26b 0x0606060606060606
1871 13:50:09.382584 MTRR: Fixed MSR 0x26c 0x0606060606060606
1872 13:50:09.385925 MTRR: Fixed MSR 0x26d 0x0606060606060606
1873 13:50:09.389373 MTRR: Fixed MSR 0x26e 0x0606060606060606
1874 13:50:09.392854 MTRR: Fixed MSR 0x26f 0x0606060606060606
1875 13:50:09.399130 CPU physical address size: 39 bits
1876 13:50:09.399749 call enable_fixed_mtrr()
1877 13:50:09.405479 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 13:50:09.408933 MTRR: Fixed MSR 0x250 0x0606060606060606
1879 13:50:09.412279 MTRR: Fixed MSR 0x258 0x0606060606060606
1880 13:50:09.415734 MTRR: Fixed MSR 0x259 0x0000000000000000
1881 13:50:09.422325 MTRR: Fixed MSR 0x268 0x0606060606060606
1882 13:50:09.425291 MTRR: Fixed MSR 0x269 0x0606060606060606
1883 13:50:09.428888 MTRR: Fixed MSR 0x26a 0x0606060606060606
1884 13:50:09.432124 MTRR: Fixed MSR 0x26b 0x0606060606060606
1885 13:50:09.438915 MTRR: Fixed MSR 0x26c 0x0606060606060606
1886 13:50:09.442655 MTRR: Fixed MSR 0x26d 0x0606060606060606
1887 13:50:09.445183 MTRR: Fixed MSR 0x26e 0x0606060606060606
1888 13:50:09.448845 MTRR: Fixed MSR 0x26f 0x0606060606060606
1889 13:50:09.455212 MTRR: Fixed MSR 0x258 0x0606060606060606
1890 13:50:09.455687 call enable_fixed_mtrr()
1891 13:50:09.462341 MTRR: Fixed MSR 0x259 0x0000000000000000
1892 13:50:09.465476 MTRR: Fixed MSR 0x268 0x0606060606060606
1893 13:50:09.469018 MTRR: Fixed MSR 0x269 0x0606060606060606
1894 13:50:09.471800 MTRR: Fixed MSR 0x26a 0x0606060606060606
1895 13:50:09.475355 MTRR: Fixed MSR 0x26b 0x0606060606060606
1896 13:50:09.482075 MTRR: Fixed MSR 0x26c 0x0606060606060606
1897 13:50:09.484851 MTRR: Fixed MSR 0x26d 0x0606060606060606
1898 13:50:09.488153 MTRR: Fixed MSR 0x26e 0x0606060606060606
1899 13:50:09.491371 MTRR: Fixed MSR 0x26f 0x0606060606060606
1900 13:50:09.498371 CPU physical address size: 39 bits
1901 13:50:09.501562 call enable_fixed_mtrr()
1902 13:50:09.504871 CPU physical address size: 39 bits
1903 13:50:09.508183 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 13:50:09.511501 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 13:50:09.514611 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 13:50:09.520983 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 13:50:09.524475 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 13:50:09.528176 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 13:50:09.531050 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 13:50:09.537641 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 13:50:09.541005 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 13:50:09.544816 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 13:50:09.547682 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 13:50:09.551389 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 13:50:09.558207 MTRR: Fixed MSR 0x258 0x0606060606060606
1916 13:50:09.560989 call enable_fixed_mtrr()
1917 13:50:09.564244 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 13:50:09.567723 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 13:50:09.570561 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 13:50:09.578042 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 13:50:09.580674 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 13:50:09.584278 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 13:50:09.587139 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 13:50:09.590653 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 13:50:09.597642 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 13:50:09.600443 CPU physical address size: 39 bits
1927 13:50:09.603744 call enable_fixed_mtrr()
1928 13:50:09.604245
1929 13:50:09.604598 MTRR check
1930 13:50:09.606995 MTRR: Fixed MSR 0x250 0x0606060606060606
1931 13:50:09.610711 Fixed MTRRs : Enabled
1932 13:50:09.613578 Variable MTRRs: Enabled
1933 13:50:09.614000
1934 13:50:09.616824 CPU physical address size: 39 bits
1935 13:50:09.620300 CPU physical address size: 39 bits
1936 13:50:09.626877 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1937 13:50:09.630266 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 13:50:09.633768 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 13:50:09.636518 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 13:50:09.643689 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 13:50:09.646513 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 13:50:09.650363 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 13:50:09.653151 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 13:50:09.660026 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 13:50:09.663155 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 13:50:09.667129 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 13:50:09.672984 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1948 13:50:09.673459 call enable_fixed_mtrr()
1949 13:50:09.676503 CBFS @ c08000 size 3f8000
1950 13:50:09.682927 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1951 13:50:09.686466 CPU physical address size: 39 bits
1952 13:50:09.689380 CBFS: Locating 'fallback/payload'
1953 13:50:09.696541 CBFS: Found @ offset 1c96c0 size 3f798
1954 13:50:09.699662 Checking segment from ROM address 0xffdd16f8
1955 13:50:09.703119 Checking segment from ROM address 0xffdd1714
1956 13:50:09.709571 Loading segment from ROM address 0xffdd16f8
1957 13:50:09.709941 code (compression=0)
1958 13:50:09.719497 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1959 13:50:09.729530 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1960 13:50:09.730100 it's not compressed!
1961 13:50:09.822998 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1962 13:50:09.829136 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1963 13:50:09.832450 Loading segment from ROM address 0xffdd1714
1964 13:50:09.835416 Entry Point 0x30000000
1965 13:50:09.838729 Loaded segments
1966 13:50:09.845070 Finalizing chipset.
1967 13:50:09.848014 Finalizing SMM.
1968 13:50:09.851384 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1969 13:50:09.854552 mp_park_aps done after 0 msecs.
1970 13:50:09.861178 Jumping to boot code at 30000000(99b62000)
1971 13:50:09.867643 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1972 13:50:09.868071
1973 13:50:09.868404
1974 13:50:09.868719
1975 13:50:09.870803 Starting depthcharge on Helios...
1976 13:50:09.871226
1977 13:50:09.872225 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1978 13:50:09.872724 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1979 13:50:09.873127 Setting prompt string to ['hatch:']
1980 13:50:09.873616 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1981 13:50:09.881159 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1982 13:50:09.881616
1983 13:50:09.887708 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1984 13:50:09.888135
1985 13:50:09.894373 board_setup: Info: eMMC controller not present; skipping
1986 13:50:09.894798
1987 13:50:09.897365 New NVMe Controller 0x30053ac0 @ 00:1d:00
1988 13:50:09.897787
1989 13:50:09.904204 board_setup: Info: SDHCI controller not present; skipping
1990 13:50:09.904772
1991 13:50:09.910625 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1992 13:50:09.911363
1993 13:50:09.911862 Wipe memory regions:
1994 13:50:09.912188
1995 13:50:09.914303 [0x00000000001000, 0x000000000a0000)
1996 13:50:09.914805
1997 13:50:09.917149 [0x00000000100000, 0x00000030000000)
1998 13:50:09.983417
1999 13:50:09.986572 [0x00000030657430, 0x00000099a2c000)
2000 13:50:10.124581
2001 13:50:10.128140 [0x00000100000000, 0x0000045e800000)
2002 13:50:11.509601
2003 13:50:11.510087 R8152: Initializing
2004 13:50:11.510423
2005 13:50:11.513050 Version 9 (ocp_data = 6010)
2006 13:50:11.517280
2007 13:50:11.517826 R8152: Done initializing
2008 13:50:11.518171
2009 13:50:11.520854 Adding net device
2010 13:50:12.003200
2011 13:50:12.003761 R8152: Initializing
2012 13:50:12.004130
2013 13:50:12.006840 Version 6 (ocp_data = 5c30)
2014 13:50:12.007397
2015 13:50:12.009999 R8152: Done initializing
2016 13:50:12.010583
2017 13:50:12.012905 net_add_device: Attemp to include the same device
2018 13:50:12.016417
2019 13:50:12.023579 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2020 13:50:12.024043
2021 13:50:12.024380
2022 13:50:12.024697
2023 13:50:12.025497 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2025 13:50:12.126620 hatch: tftpboot 192.168.201.1 11299535/tftp-deploy-zrcize2z/kernel/bzImage 11299535/tftp-deploy-zrcize2z/kernel/cmdline 11299535/tftp-deploy-zrcize2z/ramdisk/ramdisk.cpio.gz
2026 13:50:12.127338 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2027 13:50:12.127922 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2028 13:50:12.132799 tftpboot 192.168.201.1 11299535/tftp-deploy-zrcize2z/kernel/bzIploy-zrcize2z/kernel/cmdline 11299535/tftp-deploy-zrcize2z/ramdisk/ramdisk.cpio.gz
2029 13:50:12.133277
2030 13:50:12.133616 Waiting for link
2031 13:50:12.332942
2032 13:50:12.333438 done.
2033 13:50:12.333779
2034 13:50:12.334095 MAC: 00:24:32:50:19:be
2035 13:50:12.334404
2036 13:50:12.336117 Sending DHCP discover... done.
2037 13:50:12.336541
2038 13:50:12.339663 Waiting for reply... done.
2039 13:50:12.340106
2040 13:50:12.342592 Sending DHCP request... done.
2041 13:50:12.343019
2042 13:50:12.346323 Waiting for reply... done.
2043 13:50:12.346748
2044 13:50:12.349335 My ip is 192.168.201.15
2045 13:50:12.349759
2046 13:50:12.352788 The DHCP server ip is 192.168.201.1
2047 13:50:12.353283
2048 13:50:12.356192 TFTP server IP predefined by user: 192.168.201.1
2049 13:50:12.356621
2050 13:50:12.363022 Bootfile predefined by user: 11299535/tftp-deploy-zrcize2z/kernel/bzImage
2051 13:50:12.363564
2052 13:50:12.366000 Sending tftp read request... done.
2053 13:50:12.366546
2054 13:50:12.376082 Waiting for the transfer...
2055 13:50:12.376518
2056 13:50:13.066526 00000000 ################################################################
2057 13:50:13.067018
2058 13:50:13.745637 00080000 ################################################################
2059 13:50:13.746142
2060 13:50:14.445676 00100000 ################################################################
2061 13:50:14.446192
2062 13:50:15.095381 00180000 ################################################################
2063 13:50:15.095913
2064 13:50:15.787580 00200000 ################################################################
2065 13:50:15.788126
2066 13:50:16.486935 00280000 ################################################################
2067 13:50:16.487099
2068 13:50:17.034915 00300000 ################################################################
2069 13:50:17.035052
2070 13:50:17.593582 00380000 ################################################################
2071 13:50:17.593718
2072 13:50:18.138660 00400000 ################################################################
2073 13:50:18.138800
2074 13:50:18.677994 00480000 ################################################################
2075 13:50:18.678135
2076 13:50:19.223497 00500000 ################################################################
2077 13:50:19.223679
2078 13:50:19.762115 00580000 ################################################################
2079 13:50:19.762245
2080 13:50:20.297558 00600000 ################################################################
2081 13:50:20.297769
2082 13:50:20.816664 00680000 ################################################################
2083 13:50:20.816832
2084 13:50:21.341085 00700000 ################################################################
2085 13:50:21.341345
2086 13:50:21.901660 00780000 ################################################################
2087 13:50:21.901842
2088 13:50:21.973603 00800000 ############## done.
2089 13:50:21.973762
2090 13:50:21.977053 The bootfile was 8499088 bytes long.
2091 13:50:21.977139
2092 13:50:21.980073 Sending tftp read request... done.
2093 13:50:21.980158
2094 13:50:21.983399 Waiting for the transfer...
2095 13:50:21.983538
2096 13:50:22.505587 00000000 ################################################################
2097 13:50:22.505727
2098 13:50:23.034377 00080000 ################################################################
2099 13:50:23.034546
2100 13:50:23.548579 00100000 ################################################################
2101 13:50:23.548762
2102 13:50:24.061439 00180000 ################################################################
2103 13:50:24.061620
2104 13:50:24.579996 00200000 ################################################################
2105 13:50:24.580199
2106 13:50:25.099366 00280000 ################################################################
2107 13:50:25.099540
2108 13:50:25.617333 00300000 ################################################################
2109 13:50:25.617508
2110 13:50:26.135195 00380000 ################################################################
2111 13:50:26.135360
2112 13:50:26.644064 00400000 ################################################################
2113 13:50:26.644217
2114 13:50:28.278418 00480000 ################################################################
2115 13:50:28.278612
2116 13:50:28.278725 00500000 ################################################################
2117 13:50:28.278822
2118 13:50:28.278917 00580000 ################################################################
2119 13:50:28.279032
2120 13:50:28.692324 00600000 ################################################################
2121 13:50:28.692456
2122 13:50:29.233233 00680000 ################################################################
2123 13:50:29.233368
2124 13:50:29.774595 00700000 ################################################################
2125 13:50:29.774738
2126 13:50:30.310016 00780000 ################################################################
2127 13:50:30.310183
2128 13:50:30.759130 00800000 ####################################################### done.
2129 13:50:30.759279
2130 13:50:30.762595 Sending tftp read request... done.
2131 13:50:30.762684
2132 13:50:30.765581 Waiting for the transfer...
2133 13:50:30.765674
2134 13:50:30.765745 00000000 # done.
2135 13:50:30.765811
2136 13:50:30.775427 Command line loaded dynamically from TFTP file: 11299535/tftp-deploy-zrcize2z/kernel/cmdline
2137 13:50:30.775543
2138 13:50:30.795469 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2139 13:50:30.795628
2140 13:50:30.798881 ec_init(0): CrosEC protocol v3 supported (256, 256)
2141 13:50:30.805432
2142 13:50:30.808924 Shutting down all USB controllers.
2143 13:50:30.809006
2144 13:50:30.809071 Removing current net device
2145 13:50:30.813085
2146 13:50:30.813162 Finalizing coreboot
2147 13:50:30.813235
2148 13:50:30.820093 Exiting depthcharge with code 4 at timestamp: 28391868
2149 13:50:30.820176
2150 13:50:30.820240
2151 13:50:30.820301 Starting kernel ...
2152 13:50:30.820367
2153 13:50:30.820434
2154 13:50:30.820803 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2155 13:50:30.820914 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2156 13:50:30.820991 Setting prompt string to ['Linux version [0-9]']
2157 13:50:30.821064 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2158 13:50:30.821134 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2160 13:54:51.821859 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2162 13:54:51.823020 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2164 13:54:51.824020 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2167 13:54:51.825437 end: 2 depthcharge-action (duration 00:05:00) [common]
2169 13:54:51.826948 Cleaning after the job
2170 13:54:51.827447 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299535/tftp-deploy-zrcize2z/ramdisk
2171 13:54:51.834096 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299535/tftp-deploy-zrcize2z/kernel
2172 13:54:51.841068 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299535/tftp-deploy-zrcize2z/modules
2173 13:54:51.842910 start: 5.1 power-off (timeout 00:00:30) [common]
2174 13:54:51.843877 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2175 13:54:51.935726 >> Command sent successfully.
2176 13:54:51.947132 Returned 0 in 0 seconds
2177 13:54:52.048534 end: 5.1 power-off (duration 00:00:00) [common]
2179 13:54:52.050104 start: 5.2 read-feedback (timeout 00:10:00) [common]
2180 13:54:52.051434 Listened to connection for namespace 'common' for up to 1s
2182 13:54:52.052867 Listened to connection for namespace 'common' for up to 1s
2183 13:54:53.051677 Finalising connection for namespace 'common'
2184 13:54:53.051893 Disconnecting from shell: Finalise
2185 13:54:53.052001
2186 13:54:53.152689 end: 5.2 read-feedback (duration 00:00:01) [common]
2187 13:54:53.153338 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11299535
2188 13:54:53.207099 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11299535
2189 13:54:53.207341 JobError: Your job cannot terminate cleanly.