Boot log: dell-latitude-5400-8665U-sarien
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 13:48:14.176898 lava-dispatcher, installed at version: 2023.06
2 13:48:14.177103 start: 0 validate
3 13:48:14.177237 Start time: 2023-08-16 13:48:14.177228+00:00 (UTC)
4 13:48:14.177361 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:48:14.177516 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 13:48:14.428986 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:48:14.429186 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2312-g74888f4b13f0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:48:14.688330 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:48:14.689075 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2312-g74888f4b13f0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 13:48:24.985092 validate duration: 10.81
12 13:48:24.985799 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 13:48:24.986083 start: 1.1 download-retry (timeout 00:10:00) [common]
14 13:48:24.986329 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 13:48:24.986454 Not decompressing ramdisk as can be used compressed.
16 13:48:24.986537 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 13:48:24.986601 saving as /var/lib/lava/dispatcher/tmp/11299501/tftp-deploy-h652b98g/ramdisk/rootfs.cpio.gz
18 13:48:24.986664 total size: 8418130 (8 MB)
19 13:48:25.745371 progress 0 % (0 MB)
20 13:48:25.750987 progress 5 % (0 MB)
21 13:48:25.753251 progress 10 % (0 MB)
22 13:48:25.755526 progress 15 % (1 MB)
23 13:48:25.757739 progress 20 % (1 MB)
24 13:48:25.760045 progress 25 % (2 MB)
25 13:48:25.762271 progress 30 % (2 MB)
26 13:48:25.764396 progress 35 % (2 MB)
27 13:48:25.766605 progress 40 % (3 MB)
28 13:48:25.768869 progress 45 % (3 MB)
29 13:48:25.771078 progress 50 % (4 MB)
30 13:48:25.773423 progress 55 % (4 MB)
31 13:48:25.775697 progress 60 % (4 MB)
32 13:48:25.777746 progress 65 % (5 MB)
33 13:48:25.780083 progress 70 % (5 MB)
34 13:48:25.782356 progress 75 % (6 MB)
35 13:48:25.784609 progress 80 % (6 MB)
36 13:48:25.786952 progress 85 % (6 MB)
37 13:48:25.789194 progress 90 % (7 MB)
38 13:48:25.791533 progress 95 % (7 MB)
39 13:48:25.793631 progress 100 % (8 MB)
40 13:48:25.793860 8 MB downloaded in 0.81 s (9.95 MB/s)
41 13:48:25.794016 end: 1.1.1 http-download (duration 00:00:01) [common]
43 13:48:25.794248 end: 1.1 download-retry (duration 00:00:01) [common]
44 13:48:25.794331 start: 1.2 download-retry (timeout 00:09:59) [common]
45 13:48:25.794415 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 13:48:25.794557 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2312-g74888f4b13f0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 13:48:25.794627 saving as /var/lib/lava/dispatcher/tmp/11299501/tftp-deploy-h652b98g/kernel/bzImage
48 13:48:25.794685 total size: 8499088 (8 MB)
49 13:48:25.794745 No compression specified
50 13:48:26.046258 progress 0 % (0 MB)
51 13:48:26.059533 progress 5 % (0 MB)
52 13:48:26.073161 progress 10 % (0 MB)
53 13:48:26.084001 progress 15 % (1 MB)
54 13:48:26.090153 progress 20 % (1 MB)
55 13:48:26.095049 progress 25 % (2 MB)
56 13:48:26.099333 progress 30 % (2 MB)
57 13:48:26.103069 progress 35 % (2 MB)
58 13:48:26.106401 progress 40 % (3 MB)
59 13:48:26.109549 progress 45 % (3 MB)
60 13:48:26.112439 progress 50 % (4 MB)
61 13:48:26.115126 progress 55 % (4 MB)
62 13:48:26.117748 progress 60 % (4 MB)
63 13:48:26.120130 progress 65 % (5 MB)
64 13:48:26.122450 progress 70 % (5 MB)
65 13:48:26.124725 progress 75 % (6 MB)
66 13:48:26.126930 progress 80 % (6 MB)
67 13:48:26.129159 progress 85 % (6 MB)
68 13:48:26.131404 progress 90 % (7 MB)
69 13:48:26.133613 progress 95 % (7 MB)
70 13:48:26.135858 progress 100 % (8 MB)
71 13:48:26.136009 8 MB downloaded in 0.34 s (23.75 MB/s)
72 13:48:26.136155 end: 1.2.1 http-download (duration 00:00:00) [common]
74 13:48:26.136382 end: 1.2 download-retry (duration 00:00:00) [common]
75 13:48:26.136468 start: 1.3 download-retry (timeout 00:09:59) [common]
76 13:48:26.136556 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 13:48:26.136696 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2312-g74888f4b13f0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 13:48:26.136769 saving as /var/lib/lava/dispatcher/tmp/11299501/tftp-deploy-h652b98g/modules/modules.tar
79 13:48:26.136831 total size: 253616 (0 MB)
80 13:48:26.136892 Using unxz to decompress xz
81 13:48:26.141233 progress 12 % (0 MB)
82 13:48:26.141636 progress 25 % (0 MB)
83 13:48:26.141870 progress 38 % (0 MB)
84 13:48:26.143571 progress 51 % (0 MB)
85 13:48:26.145466 progress 64 % (0 MB)
86 13:48:26.147264 progress 77 % (0 MB)
87 13:48:26.149152 progress 90 % (0 MB)
88 13:48:26.150879 progress 100 % (0 MB)
89 13:48:26.156559 0 MB downloaded in 0.02 s (12.26 MB/s)
90 13:48:26.156788 end: 1.3.1 http-download (duration 00:00:00) [common]
92 13:48:26.157052 end: 1.3 download-retry (duration 00:00:00) [common]
93 13:48:26.157144 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 13:48:26.157242 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 13:48:26.157323 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 13:48:26.157404 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 13:48:26.157630 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm
98 13:48:26.157768 makedir: /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin
99 13:48:26.157874 makedir: /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/tests
100 13:48:26.157973 makedir: /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/results
101 13:48:26.158092 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-add-keys
102 13:48:26.158242 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-add-sources
103 13:48:26.158373 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-background-process-start
104 13:48:26.158502 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-background-process-stop
105 13:48:26.158627 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-common-functions
106 13:48:26.158753 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-echo-ipv4
107 13:48:26.158878 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-install-packages
108 13:48:26.159002 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-installed-packages
109 13:48:26.159133 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-os-build
110 13:48:26.159262 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-probe-channel
111 13:48:26.159397 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-probe-ip
112 13:48:26.159524 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-target-ip
113 13:48:26.159650 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-target-mac
114 13:48:26.159778 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-target-storage
115 13:48:26.159908 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-test-case
116 13:48:26.160033 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-test-event
117 13:48:26.160157 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-test-feedback
118 13:48:26.160281 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-test-raise
119 13:48:26.160407 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-test-reference
120 13:48:26.160534 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-test-runner
121 13:48:26.160657 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-test-set
122 13:48:26.160783 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-test-shell
123 13:48:26.160910 Updating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-install-packages (oe)
124 13:48:26.161064 Updating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/bin/lava-installed-packages (oe)
125 13:48:26.161189 Creating /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/environment
126 13:48:26.161289 LAVA metadata
127 13:48:26.161362 - LAVA_JOB_ID=11299501
128 13:48:26.161427 - LAVA_DISPATCHER_IP=192.168.201.1
129 13:48:26.161529 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 13:48:26.161593 skipped lava-vland-overlay
131 13:48:26.161669 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 13:48:26.161747 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 13:48:26.161811 skipped lava-multinode-overlay
134 13:48:26.161884 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 13:48:26.161962 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 13:48:26.162035 Loading test definitions
137 13:48:26.162125 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 13:48:26.162200 Using /lava-11299501 at stage 0
139 13:48:26.162518 uuid=11299501_1.4.2.3.1 testdef=None
140 13:48:26.162605 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 13:48:26.162690 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 13:48:26.163225 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 13:48:26.163456 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 13:48:26.164098 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 13:48:26.164324 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 13:48:26.164943 runner path: /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/0/tests/0_dmesg test_uuid 11299501_1.4.2.3.1
149 13:48:26.165098 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 13:48:26.165323 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 13:48:26.165393 Using /lava-11299501 at stage 1
153 13:48:26.165691 uuid=11299501_1.4.2.3.5 testdef=None
154 13:48:26.165779 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 13:48:26.165861 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 13:48:26.166331 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 13:48:26.166545 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 13:48:26.167187 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 13:48:26.167419 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 13:48:26.168052 runner path: /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/1/tests/1_bootrr test_uuid 11299501_1.4.2.3.5
163 13:48:26.168204 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 13:48:26.168408 Creating lava-test-runner.conf files
166 13:48:26.168470 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/0 for stage 0
167 13:48:26.168558 - 0_dmesg
168 13:48:26.168638 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299501/lava-overlay-jpf2yygm/lava-11299501/1 for stage 1
169 13:48:26.168727 - 1_bootrr
170 13:48:26.168819 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 13:48:26.168903 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 13:48:26.177509 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 13:48:26.177613 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 13:48:26.177698 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 13:48:26.177784 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 13:48:26.177866 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 13:48:26.433979 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 13:48:26.434371 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 13:48:26.434491 extracting modules file /var/lib/lava/dispatcher/tmp/11299501/tftp-deploy-h652b98g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299501/extract-overlay-ramdisk-svku0ch3/ramdisk
180 13:48:26.448735 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 13:48:26.448869 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 13:48:26.448963 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299501/compress-overlay-f2lzr92k/overlay-1.4.2.4.tar.gz to ramdisk
183 13:48:26.449033 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299501/compress-overlay-f2lzr92k/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11299501/extract-overlay-ramdisk-svku0ch3/ramdisk
184 13:48:26.458299 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 13:48:26.458416 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 13:48:26.458508 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 13:48:26.458596 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 13:48:26.458675 Building ramdisk /var/lib/lava/dispatcher/tmp/11299501/extract-overlay-ramdisk-svku0ch3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11299501/extract-overlay-ramdisk-svku0ch3/ramdisk
189 13:48:26.593594 >> 49825 blocks
190 13:48:27.433043 rename /var/lib/lava/dispatcher/tmp/11299501/extract-overlay-ramdisk-svku0ch3/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11299501/tftp-deploy-h652b98g/ramdisk/ramdisk.cpio.gz
191 13:48:27.433505 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 13:48:27.433633 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 13:48:27.433734 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 13:48:27.433831 No mkimage arch provided, not using FIT.
195 13:48:27.433921 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 13:48:27.434001 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 13:48:27.434106 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 13:48:27.434202 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 13:48:27.434283 No LXC device requested
200 13:48:27.434359 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 13:48:27.434443 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 13:48:27.434519 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 13:48:27.434588 Checking files for TFTP limit of 4294967296 bytes.
204 13:48:27.435010 end: 1 tftp-deploy (duration 00:00:02) [common]
205 13:48:27.435118 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 13:48:27.435210 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 13:48:27.435333 substitutions:
208 13:48:27.435445 - {DTB}: None
209 13:48:27.435509 - {INITRD}: 11299501/tftp-deploy-h652b98g/ramdisk/ramdisk.cpio.gz
210 13:48:27.435568 - {KERNEL}: 11299501/tftp-deploy-h652b98g/kernel/bzImage
211 13:48:27.435624 - {LAVA_MAC}: None
212 13:48:27.435679 - {PRESEED_CONFIG}: None
213 13:48:27.435733 - {PRESEED_LOCAL}: None
214 13:48:27.435787 - {RAMDISK}: 11299501/tftp-deploy-h652b98g/ramdisk/ramdisk.cpio.gz
215 13:48:27.435840 - {ROOT_PART}: None
216 13:48:27.435892 - {ROOT}: None
217 13:48:27.435945 - {SERVER_IP}: 192.168.201.1
218 13:48:27.435997 - {TEE}: None
219 13:48:27.436050 Parsed boot commands:
220 13:48:27.436103 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 13:48:27.436271 Parsed boot commands: tftpboot 192.168.201.1 11299501/tftp-deploy-h652b98g/kernel/bzImage 11299501/tftp-deploy-h652b98g/kernel/cmdline 11299501/tftp-deploy-h652b98g/ramdisk/ramdisk.cpio.gz
222 13:48:27.436356 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 13:48:27.436440 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 13:48:27.436534 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 13:48:27.436619 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 13:48:27.436689 Not connected, no need to disconnect.
227 13:48:27.436761 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 13:48:27.436951 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 13:48:27.437018 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-8665U-sarien-cbg-4'
230 13:48:27.441100 Setting prompt string to ['lava-test: # ']
231 13:48:27.441458 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 13:48:27.441564 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 13:48:27.441663 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 13:48:27.441756 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 13:48:27.442000 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-4' '--port=1' '--command=reboot'
236 13:48:44.344408 >> Command sent successfully.
237 13:48:44.347065 Returned 0 in 16 seconds
238 13:48:44.447461 end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
240 13:48:44.447785 end: 2.2.2 reset-device (duration 00:00:17) [common]
241 13:48:44.447890 start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
242 13:48:44.447978 Setting prompt string to 'Starting depthcharge on sarien...'
243 13:48:44.448046 Changing prompt to 'Starting depthcharge on sarien...'
244 13:48:44.448115 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
245 13:48:44.448389 [Enter `^Ec?' for help]
246 13:48:44.448465
247 13:48:44.448542
248 13:48:44.448606 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
249 13:48:44.448665 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
250 13:48:44.448721 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
251 13:48:44.448776 CPU: AES supported, TXT supported, VT supported
252 13:48:44.448830 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
253 13:48:44.448885 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
254 13:48:44.448939 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
255 13:48:44.448993 VBOOT: Loading verstage.
256 13:48:44.449049 CBFS @ 1d00000 size 300000
257 13:48:44.449102 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
258 13:48:44.449156 CBFS: Locating 'fallback/verstage'
259 13:48:44.449210 CBFS: Found @ offset 10f6c0 size 1435c
260 13:48:44.449263
261 13:48:44.449315
262 13:48:44.449366 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
263 13:48:44.449420 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
264 13:48:44.449474 done! DID_VID 0x00281ae0
265 13:48:44.449527 TPM ready after 0 ms
266 13:48:44.449581 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
267 13:48:44.449637 tlcl_send_startup: Startup return code is 0
268 13:48:44.449691 TPM: setup succeeded
269 13:48:44.449744 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
270 13:48:44.449797 Checking cr50 for recovery request
271 13:48:44.449849 Phase 1
272 13:48:44.449902 FMAP: Found "FLASH" version 1.1 at 1c10000.
273 13:48:44.449955 FMAP: base = fe000000 size = 2000000 #areas = 37
274 13:48:44.450009 FMAP: area GBB found @ 1c11000 (978944 bytes)
275 13:48:44.450062 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
276 13:48:44.450115 Phase 2
277 13:48:44.450167 Phase 3
278 13:48:44.450219 FMAP: area GBB found @ 1c11000 (978944 bytes)
279 13:48:44.450272 VB2:vb2_report_dev_firmware() This is developer signed firmware
280 13:48:44.450325 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
281 13:48:44.450377 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
282 13:48:44.450430 VB2:vb2_verify_keyblock() Checking key block signature...
283 13:48:44.450484 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
284 13:48:44.450537 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
285 13:48:44.450589 VB2:vb2_verify_fw_preamble() Verifying preamble.
286 13:48:44.450642 Phase 4
287 13:48:44.450694 FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)
288 13:48:44.450747 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
289 13:48:44.450800 VB2:vb2_rsa_verify_digest() Digest check failed!
290 13:48:44.450853 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
291 13:48:44.450905 Saving nvdata
292 13:48:44.450957 Reboot requested (10020007)
293 13:48:44.451010 board_reset() called!
294 13:48:44.451062 full_reset() called!
295 13:48:48.645607
296 13:48:48.646354
297 13:48:48.654305 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
298 13:48:48.658780 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
299 13:48:48.663745 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
300 13:48:48.668577 CPU: AES supported, TXT supported, VT supported
301 13:48:48.673817 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
302 13:48:48.678880 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
303 13:48:48.684313 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
304 13:48:48.687741 VBOOT: Loading verstage.
305 13:48:48.690726 CBFS @ 1d00000 size 300000
306 13:48:48.697213 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
307 13:48:48.700475 CBFS: Locating 'fallback/verstage'
308 13:48:48.704575 CBFS: Found @ offset 10f6c0 size 1435c
309 13:48:48.719277
310 13:48:48.719394
311 13:48:48.727264 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
312 13:48:48.734485 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
313 13:48:48.855633 .done! DID_VID 0x00281ae0
314 13:48:48.857885 TPM ready after 0 ms
315 13:48:48.861589 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
316 13:48:48.930020 tlcl_send_startup: Startup return code is 0
317 13:48:48.932241 TPM: setup succeeded
318 13:48:48.949658 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
319 13:48:48.953247 Checking cr50 for recovery request
320 13:48:48.963301 Phase 1
321 13:48:48.967959 FMAP: Found "FLASH" version 1.1 at 1c10000.
322 13:48:48.972533 FMAP: base = fe000000 size = 2000000 #areas = 37
323 13:48:48.977700 FMAP: area GBB found @ 1c11000 (978944 bytes)
324 13:48:48.984279 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
325 13:48:48.990834 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
326 13:48:48.993601 Recovery requested (1009000e)
327 13:48:48.994984 Saving nvdata
328 13:48:49.012031 tlcl_extend: response is 0
329 13:48:49.027237 tlcl_extend: response is 0
330 13:48:49.030970 CBFS @ 1d00000 size 300000
331 13:48:49.037049 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
332 13:48:49.040356 CBFS: Locating 'fallback/romstage'
333 13:48:49.044110 CBFS: Found @ offset 80 size 15b2c
334 13:48:49.045211
335 13:48:49.046092
336 13:48:49.054530 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
337 13:48:49.059398 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
338 13:48:49.063181 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
339 13:48:49.068250 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
340 13:48:49.071840 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
341 13:48:49.076668 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
342 13:48:49.078181 TCO_STS: 0000 0004
343 13:48:49.081447 GEN_PMCON: d0015209 00002200
344 13:48:49.084339 GBLRST_CAUSE: 00000000 00000000
345 13:48:49.086918 prev_sleep_state 5
346 13:48:49.090314 Boot Count incremented to 34853
347 13:48:49.093049 CBFS @ 1d00000 size 300000
348 13:48:49.100135 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
349 13:48:49.102261 CBFS: Locating 'fspm.bin'
350 13:48:49.106111 CBFS: Found @ offset 60fc0 size 70000
351 13:48:49.111427 FMAP: Found "FLASH" version 1.1 at 1c10000.
352 13:48:49.116891 FMAP: base = fe000000 size = 2000000 #areas = 37
353 13:48:49.122375 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
354 13:48:49.129070 Probing TPM I2C: done! DID_VID 0x00281ae0
355 13:48:49.131465 Locality already claimed
356 13:48:49.134490 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
357 13:48:49.153274 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
358 13:48:49.159808 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
359 13:48:49.162570 MRC cache found, size 18e0
360 13:48:49.164866 bootmode is set to :2
361 13:48:49.256554 CBMEM:
362 13:48:49.260330 IMD: root @ 89fff000 254 entries.
363 13:48:49.263467 IMD: root @ 89ffec00 62 entries.
364 13:48:49.266349 External stage cache:
365 13:48:49.269795 IMD: root @ 8abff000 254 entries.
366 13:48:49.272765 IMD: root @ 8abfec00 62 entries.
367 13:48:49.279626 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
368 13:48:49.283154 creating vboot_handoff structure
369 13:48:49.303961 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
370 13:48:49.319568 tlcl_write: response is 0
371 13:48:49.338643 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
372 13:48:49.342631 MRC: TPM MRC hash updated successfully.
373 13:48:49.343809 1 DIMMs found
374 13:48:49.346701 top_of_ram = 0x8a000000
375 13:48:49.351530 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
376 13:48:49.356230 MTRR Range: Start=ff000000 End=0 (Size 1000000)
377 13:48:49.359247 CBFS @ 1d00000 size 300000
378 13:48:49.365293 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
379 13:48:49.369010 CBFS: Locating 'fallback/postcar'
380 13:48:49.372476 CBFS: Found @ offset 107000 size 41a4
381 13:48:49.378811 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
382 13:48:49.389110 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
383 13:48:49.394595 Processing 126 relocs. Offset value of 0x87cdd000
384 13:48:49.396837
385 13:48:49.396920
386 13:48:49.405006 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
387 13:48:49.408625 CBFS @ 1d00000 size 300000
388 13:48:49.414625 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
389 13:48:49.418101 CBFS: Locating 'fallback/ramstage'
390 13:48:49.421899 CBFS: Found @ offset 458c0 size 1a8a8
391 13:48:49.428573 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
392 13:48:49.457736 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
393 13:48:49.463146 Processing 3754 relocs. Offset value of 0x88e81000
394 13:48:49.469008
395 13:48:49.469098
396 13:48:49.477265 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
397 13:48:49.481638 FMAP: Found "FLASH" version 1.1 at 1c10000.
398 13:48:49.486593 FMAP: base = fe000000 size = 2000000 #areas = 37
399 13:48:49.492027 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
400 13:48:49.496573 WARNING: RO_VPD is uninitialized or empty.
401 13:48:49.501272 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
402 13:48:49.505322 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
403 13:48:49.506816 Normal boot.
404 13:48:49.513273 BS: BS_PRE_DEVICE times (us): entry 0 run 59 exit 1161
405 13:48:49.516475 CBFS @ 1d00000 size 300000
406 13:48:49.522749 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
407 13:48:49.527007 CBFS: Locating 'cpu_microcode_blob.bin'
408 13:48:49.530223 CBFS: Found @ offset 15c40 size 2fc00
409 13:48:49.534741 microcode: sig=0x806ec pf=0x80 revision=0xb7
410 13:48:49.537831 Skip microcode update
411 13:48:49.540022 CBFS @ 1d00000 size 300000
412 13:48:49.545945 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
413 13:48:49.549399 CBFS: Locating 'fsps.bin'
414 13:48:49.552596 CBFS: Found @ offset d1fc0 size 35000
415 13:48:49.587157 Detected 4 core, 8 thread CPU.
416 13:48:49.589460 Setting up SMI for CPU
417 13:48:49.592356 IED base = 0x8ac00000
418 13:48:49.594225 IED size = 0x00400000
419 13:48:49.597071 Will perform SMM setup.
420 13:48:49.601543 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.
421 13:48:49.609966 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
422 13:48:49.614207 Processing 16 relocs. Offset value of 0x00030000
423 13:48:49.617686 Attempting to start 7 APs
424 13:48:49.621637 Waiting for 10ms after sending INIT.
425 13:48:49.636483 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
426 13:48:49.637344 done.
427 13:48:49.639734 AP: slot 7 apic_id 4.
428 13:48:49.641859 AP: slot 6 apic_id 5.
429 13:48:49.644714 AP: slot 2 apic_id 7.
430 13:48:49.646237 AP: slot 5 apic_id 6.
431 13:48:49.650471 Waiting for 2nd SIPI to complete...done.
432 13:48:49.652667 AP: slot 1 apic_id 2.
433 13:48:49.655312 AP: slot 4 apic_id 3.
434 13:48:49.663296 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
435 13:48:49.667394 Processing 13 relocs. Offset value of 0x00038000
436 13:48:49.674080 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
437 13:48:49.677912 Installing SMM handler to 0x8a000000
438 13:48:49.685692 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
439 13:48:49.692025 Processing 867 relocs. Offset value of 0x8a010000
440 13:48:49.699315 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
441 13:48:49.704229 Processing 13 relocs. Offset value of 0x8a008000
442 13:48:49.710595 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
443 13:48:49.716580 SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd
444 13:48:49.721426 SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd
445 13:48:49.727309 SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd
446 13:48:49.733044 SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd
447 13:48:49.739051 SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd
448 13:48:49.744194 SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd
449 13:48:49.750649 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
450 13:48:49.754701 Clearing SMI status registers
451 13:48:49.756236 SMI_STS: PM1
452 13:48:49.758489 PM1_STS: WAK PWRBTN
453 13:48:49.760394 TCO_STS: BOOT SECOND_TO
454 13:48:49.762432 GPE0 STD STS: eSPI
455 13:48:49.764468 New SMBASE 0x8a000000
456 13:48:49.767687 In relocation handler: CPU 0
457 13:48:49.772212 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
458 13:48:49.777181 Writing SMRR. base = 0x8a000006, mask=0xff000800
459 13:48:49.779567 Relocation complete.
460 13:48:49.781752 New SMBASE 0x89fff400
461 13:48:49.784149 In relocation handler: CPU 3
462 13:48:49.788173 New SMBASE=0x89fff400 IEDBASE=0x8ac00000
463 13:48:49.792889 Writing SMRR. base = 0x8a000006, mask=0xff000800
464 13:48:49.795345 Relocation complete.
465 13:48:49.797446 New SMBASE 0x89fff800
466 13:48:49.800397 In relocation handler: CPU 2
467 13:48:49.804498 New SMBASE=0x89fff800 IEDBASE=0x8ac00000
468 13:48:49.809117 Writing SMRR. base = 0x8a000006, mask=0xff000800
469 13:48:49.811560 Relocation complete.
470 13:48:49.813652 New SMBASE 0x89ffec00
471 13:48:49.816676 In relocation handler: CPU 5
472 13:48:49.821421 New SMBASE=0x89ffec00 IEDBASE=0x8ac00000
473 13:48:49.825688 Writing SMRR. base = 0x8a000006, mask=0xff000800
474 13:48:49.828310 Relocation complete.
475 13:48:49.830774 New SMBASE 0x89ffe400
476 13:48:49.832905 In relocation handler: CPU 7
477 13:48:49.837285 New SMBASE=0x89ffe400 IEDBASE=0x8ac00000
478 13:48:49.842050 Writing SMRR. base = 0x8a000006, mask=0xff000800
479 13:48:49.843976 Relocation complete.
480 13:48:49.846331 New SMBASE 0x89ffe800
481 13:48:49.849069 In relocation handler: CPU 6
482 13:48:49.853258 New SMBASE=0x89ffe800 IEDBASE=0x8ac00000
483 13:48:49.858183 Writing SMRR. base = 0x8a000006, mask=0xff000800
484 13:48:49.860837 Relocation complete.
485 13:48:49.862977 New SMBASE 0x89fff000
486 13:48:49.865930 In relocation handler: CPU 4
487 13:48:49.870049 New SMBASE=0x89fff000 IEDBASE=0x8ac00000
488 13:48:49.874685 Writing SMRR. base = 0x8a000006, mask=0xff000800
489 13:48:49.876485 Relocation complete.
490 13:48:49.878937 New SMBASE 0x89fffc00
491 13:48:49.881539 In relocation handler: CPU 1
492 13:48:49.886627 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
493 13:48:49.891212 Writing SMRR. base = 0x8a000006, mask=0xff000800
494 13:48:49.892894 Relocation complete.
495 13:48:49.894810 Initializing CPU #0
496 13:48:49.898338 CPU: vendor Intel device 806ec
497 13:48:49.901956 CPU: family 06, model 8e, stepping 0c
498 13:48:49.904654 Clearing out pending MCEs
499 13:48:49.909560 Setting up local APIC... apic_id: 0x00 done.
500 13:48:49.911908 Turbo is available but hidden
501 13:48:49.915263 Turbo has been enabled
502 13:48:49.916933 VMX status: enabled
503 13:48:49.920146 IA32_FEATURE_CONTROL status: locked
504 13:48:49.922706 Skip microcode update
505 13:48:49.924268 CPU #0 initialized
506 13:48:49.926974 Initializing CPU #3
507 13:48:49.928530 Initializing CPU #2
508 13:48:49.931081 Initializing CPU #5
509 13:48:49.933625 CPU: vendor Intel device 806ec
510 13:48:49.937954 CPU: family 06, model 8e, stepping 0c
511 13:48:49.940990 CPU: vendor Intel device 806ec
512 13:48:49.945077 CPU: family 06, model 8e, stepping 0c
513 13:48:49.947714 Clearing out pending MCEs
514 13:48:49.950005 Clearing out pending MCEs
515 13:48:49.955016 Setting up local APIC...Initializing CPU #1
516 13:48:49.956727 Initializing CPU #4
517 13:48:49.959896 CPU: vendor Intel device 806ec
518 13:48:49.963380 CPU: family 06, model 8e, stepping 0c
519 13:48:49.966244 CPU: vendor Intel device 806ec
520 13:48:49.970575 CPU: family 06, model 8e, stepping 0c
521 13:48:49.972902 Clearing out pending MCEs
522 13:48:49.975001 Clearing out pending MCEs
523 13:48:49.979794 Setting up local APIC... apic_id: 0x07 done.
524 13:48:49.985010 Setting up local APIC...CPU: vendor Intel device 806ec
525 13:48:49.989139 CPU: family 06, model 8e, stepping 0c
526 13:48:49.991398 Clearing out pending MCEs
527 13:48:49.993555 VMX status: enabled
528 13:48:49.996004 apic_id: 0x06 done.
529 13:48:49.999557 IA32_FEATURE_CONTROL status: locked
530 13:48:50.001598 VMX status: enabled
531 13:48:50.003908 Skip microcode update
532 13:48:50.007400 IA32_FEATURE_CONTROL status: locked
533 13:48:50.009007 CPU #2 initialized
534 13:48:50.011407 Skip microcode update
535 13:48:50.015906 Setting up local APIC...CPU #5 initialized
536 13:48:50.017531 Initializing CPU #6
537 13:48:50.019715 Initializing CPU #7
538 13:48:50.022632 CPU: vendor Intel device 806ec
539 13:48:50.026559 CPU: family 06, model 8e, stepping 0c
540 13:48:50.029630 CPU: vendor Intel device 806ec
541 13:48:50.034216 CPU: family 06, model 8e, stepping 0c
542 13:48:50.035858 Clearing out pending MCEs
543 13:48:50.038865 Clearing out pending MCEs
544 13:48:50.043689 Setting up local APIC... apic_id: 0x03 done.
545 13:48:50.045654 apic_id: 0x02 done.
546 13:48:50.047470 VMX status: enabled
547 13:48:50.049751 VMX status: enabled
548 13:48:50.053516 IA32_FEATURE_CONTROL status: locked
549 13:48:50.056445 IA32_FEATURE_CONTROL status: locked
550 13:48:50.058806 Skip microcode update
551 13:48:50.061151 Skip microcode update
552 13:48:50.063381 CPU #4 initialized
553 13:48:50.065252 CPU #1 initialized
554 13:48:50.067590 apic_id: 0x05 done.
555 13:48:50.073912 Setting up local APIC...Setting up local APIC...VMX status: enabled
556 13:48:50.076440 apic_id: 0x04 done.
557 13:48:50.080027 IA32_FEATURE_CONTROL status: locked
558 13:48:50.082353 VMX status: enabled
559 13:48:50.084215 Skip microcode update
560 13:48:50.087406 IA32_FEATURE_CONTROL status: locked
561 13:48:50.089803 CPU #6 initialized
562 13:48:50.091948 Skip microcode update
563 13:48:50.094284 apic_id: 0x01 done.
564 13:48:50.095567 CPU #7 initialized
565 13:48:50.098536 VMX status: enabled
566 13:48:50.101473 IA32_FEATURE_CONTROL status: locked
567 13:48:50.103953 Skip microcode update
568 13:48:50.105600 CPU #3 initialized
569 13:48:50.110088 bsp_do_flight_plan done after 455 msecs.
570 13:48:50.113270 CPU: frequency set to 4800 MHz
571 13:48:50.114720 Enabling SMIs.
572 13:48:50.116611 Locking SMM.
573 13:48:50.119218 CBFS @ 1d00000 size 300000
574 13:48:50.126054 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
575 13:48:50.127866 CBFS: Locating 'vbt.bin'
576 13:48:50.131671 CBFS: Found @ offset 60a40 size 4a0
577 13:48:50.137199 Found a VBT of 4608 bytes after decompression
578 13:48:50.149791 FMAP: area GBB found @ 1c11000 (978944 bytes)
579 13:48:50.210977 Detected 4 core, 8 thread CPU.
580 13:48:50.213737 Detected 4 core, 8 thread CPU.
581 13:48:50.440845 Display FSP Version Info HOB
582 13:48:50.444324 Reference Code - CPU = 7.0.5e.40
583 13:48:50.447175 uCode Version = 0.0.0.b8
584 13:48:50.449207 Display FSP Version Info HOB
585 13:48:50.452296 Reference Code - ME = 7.0.5e.40
586 13:48:50.455507 MEBx version = 0.0.0.0
587 13:48:50.458710 ME Firmware Version = Consumer SKU
588 13:48:50.461189 Display FSP Version Info HOB
589 13:48:50.465385 Reference Code - CNL PCH = 7.0.5e.40
590 13:48:50.467489 PCH-CRID Status = Disabled
591 13:48:50.471256 CNL PCH H A0 Hsio Version = 2.0.0.0
592 13:48:50.475413 CNL PCH H Ax Hsio Version = 9.0.0.0
593 13:48:50.478487 CNL PCH H Bx Hsio Version = a.0.0.0
594 13:48:50.482345 CNL PCH LP B0 Hsio Version = 7.0.0.0
595 13:48:50.486420 CNL PCH LP Bx Hsio Version = 6.0.0.0
596 13:48:50.490161 CNL PCH LP Dx Hsio Version = 7.0.0.0
597 13:48:50.492685 Display FSP Version Info HOB
598 13:48:50.497756 Reference Code - SA - System Agent = 7.0.5e.40
599 13:48:50.500541 Reference Code - MRC = 0.7.1.68
600 13:48:50.503759 SA - PCIe Version = 7.0.5e.40
601 13:48:50.506504 SA-CRID Status = Disabled
602 13:48:50.509270 SA-CRID Original Value = 0.0.0.c
603 13:48:50.512557 SA-CRID New Value = 0.0.0.c
604 13:48:50.530539 RTC Init
605 13:48:50.534515 Set power off after power failure.
606 13:48:50.537376 Disabling Deep S3
607 13:48:50.538222 Disabling Deep S3
608 13:48:50.540500 Disabling Deep S4
609 13:48:50.542139 Disabling Deep S4
610 13:48:50.543982 Disabling Deep S5
611 13:48:50.546100 Disabling Deep S5
612 13:48:50.552907 BS: BS_DEV_INIT_CHIPS times (us): entry 602536 run 413507 exit 16226
613 13:48:50.554699 Enumerating buses...
614 13:48:50.559973 Show all devs... Before device enumeration.
615 13:48:50.561419 Root Device: enabled 1
616 13:48:50.564512 CPU_CLUSTER: 0: enabled 1
617 13:48:50.567190 DOMAIN: 0000: enabled 1
618 13:48:50.568918 APIC: 00: enabled 1
619 13:48:50.571269 PCI: 00:00.0: enabled 1
620 13:48:50.573224 PCI: 00:02.0: enabled 1
621 13:48:50.576164 PCI: 00:04.0: enabled 1
622 13:48:50.578568 PCI: 00:12.0: enabled 1
623 13:48:50.580530 PCI: 00:12.5: enabled 0
624 13:48:50.583366 PCI: 00:12.6: enabled 0
625 13:48:50.586318 PCI: 00:13.0: enabled 0
626 13:48:50.588539 PCI: 00:14.0: enabled 1
627 13:48:50.590582 PCI: 00:14.1: enabled 0
628 13:48:50.593109 PCI: 00:14.3: enabled 1
629 13:48:50.595628 PCI: 00:14.5: enabled 0
630 13:48:50.597944 PCI: 00:15.0: enabled 1
631 13:48:50.600763 PCI: 00:15.1: enabled 1
632 13:48:50.602901 PCI: 00:15.2: enabled 0
633 13:48:50.604920 PCI: 00:15.3: enabled 0
634 13:48:50.607401 PCI: 00:16.0: enabled 1
635 13:48:50.609765 PCI: 00:16.1: enabled 0
636 13:48:50.612208 PCI: 00:16.2: enabled 0
637 13:48:50.615333 PCI: 00:16.3: enabled 0
638 13:48:50.617266 PCI: 00:16.4: enabled 0
639 13:48:50.619384 PCI: 00:16.5: enabled 0
640 13:48:50.622328 PCI: 00:17.0: enabled 1
641 13:48:50.624946 PCI: 00:19.0: enabled 1
642 13:48:50.626615 PCI: 00:19.1: enabled 0
643 13:48:50.629464 PCI: 00:19.2: enabled 1
644 13:48:50.631843 PCI: 00:1a.0: enabled 0
645 13:48:50.634799 PCI: 00:1c.0: enabled 1
646 13:48:50.637262 PCI: 00:1c.1: enabled 0
647 13:48:50.639300 PCI: 00:1c.2: enabled 0
648 13:48:50.641470 PCI: 00:1c.3: enabled 0
649 13:48:50.643846 PCI: 00:1c.4: enabled 0
650 13:48:50.646190 PCI: 00:1c.5: enabled 0
651 13:48:50.649095 PCI: 00:1c.6: enabled 0
652 13:48:50.651497 PCI: 00:1c.7: enabled 1
653 13:48:50.653982 PCI: 00:1d.0: enabled 1
654 13:48:50.655859 PCI: 00:1d.1: enabled 1
655 13:48:50.659104 PCI: 00:1d.2: enabled 0
656 13:48:50.661426 PCI: 00:1d.3: enabled 0
657 13:48:50.663161 PCI: 00:1d.4: enabled 1
658 13:48:50.666589 PCI: 00:1e.0: enabled 0
659 13:48:50.668576 PCI: 00:1e.1: enabled 0
660 13:48:50.670379 PCI: 00:1e.2: enabled 0
661 13:48:50.673039 PCI: 00:1e.3: enabled 0
662 13:48:50.675318 PCI: 00:1f.0: enabled 1
663 13:48:50.677867 PCI: 00:1f.1: enabled 1
664 13:48:50.680582 PCI: 00:1f.2: enabled 1
665 13:48:50.683694 PCI: 00:1f.3: enabled 1
666 13:48:50.684854 PCI: 00:1f.4: enabled 1
667 13:48:50.687550 PCI: 00:1f.5: enabled 1
668 13:48:50.689893 PCI: 00:1f.6: enabled 1
669 13:48:50.692902 USB0 port 0: enabled 1
670 13:48:50.695303 I2C: 00:10: enabled 1
671 13:48:50.697357 I2C: 00:10: enabled 1
672 13:48:50.699301 I2C: 00:34: enabled 1
673 13:48:50.701545 I2C: 00:2c: enabled 1
674 13:48:50.703989 I2C: 00:50: enabled 1
675 13:48:50.705805 PNP: 0c09.0: enabled 1
676 13:48:50.708495 USB2 port 0: enabled 1
677 13:48:50.710941 USB2 port 1: enabled 1
678 13:48:50.713305 USB2 port 2: enabled 1
679 13:48:50.715270 USB2 port 4: enabled 1
680 13:48:50.717992 USB2 port 5: enabled 1
681 13:48:50.719797 USB2 port 6: enabled 1
682 13:48:50.722138 USB2 port 7: enabled 1
683 13:48:50.724591 USB2 port 8: enabled 1
684 13:48:50.727453 USB2 port 9: enabled 1
685 13:48:50.729764 USB3 port 0: enabled 1
686 13:48:50.731575 USB3 port 1: enabled 1
687 13:48:50.733920 USB3 port 2: enabled 1
688 13:48:50.736391 USB3 port 3: enabled 1
689 13:48:50.738971 USB3 port 4: enabled 1
690 13:48:50.740314 APIC: 02: enabled 1
691 13:48:50.743029 APIC: 07: enabled 1
692 13:48:50.745276 APIC: 01: enabled 1
693 13:48:50.746782 APIC: 03: enabled 1
694 13:48:50.749420 APIC: 06: enabled 1
695 13:48:50.750752 APIC: 05: enabled 1
696 13:48:50.752825 APIC: 04: enabled 1
697 13:48:50.755102 Compare with tree...
698 13:48:50.757219 Root Device: enabled 1
699 13:48:50.760174 CPU_CLUSTER: 0: enabled 1
700 13:48:50.762295 APIC: 00: enabled 1
701 13:48:50.764528 APIC: 02: enabled 1
702 13:48:50.767403 APIC: 07: enabled 1
703 13:48:50.769453 APIC: 01: enabled 1
704 13:48:50.771253 APIC: 03: enabled 1
705 13:48:50.773266 APIC: 06: enabled 1
706 13:48:50.776305 APIC: 05: enabled 1
707 13:48:50.777980 APIC: 04: enabled 1
708 13:48:50.781010 DOMAIN: 0000: enabled 1
709 13:48:50.783705 PCI: 00:00.0: enabled 1
710 13:48:50.786050 PCI: 00:02.0: enabled 1
711 13:48:50.788633 PCI: 00:04.0: enabled 1
712 13:48:50.791215 PCI: 00:12.0: enabled 1
713 13:48:50.793964 PCI: 00:12.5: enabled 0
714 13:48:50.796152 PCI: 00:12.6: enabled 0
715 13:48:50.798890 PCI: 00:13.0: enabled 0
716 13:48:50.801758 PCI: 00:14.0: enabled 1
717 13:48:50.804200 USB0 port 0: enabled 1
718 13:48:50.807163 USB2 port 0: enabled 1
719 13:48:50.809472 USB2 port 1: enabled 1
720 13:48:50.812811 USB2 port 2: enabled 1
721 13:48:50.815503 USB2 port 4: enabled 1
722 13:48:50.818377 USB2 port 5: enabled 1
723 13:48:50.820242 USB2 port 6: enabled 1
724 13:48:50.822998 USB2 port 7: enabled 1
725 13:48:50.825650 USB2 port 8: enabled 1
726 13:48:50.828945 USB2 port 9: enabled 1
727 13:48:50.831793 USB3 port 0: enabled 1
728 13:48:50.834392 USB3 port 1: enabled 1
729 13:48:50.836502 USB3 port 2: enabled 1
730 13:48:50.839244 USB3 port 3: enabled 1
731 13:48:50.842647 USB3 port 4: enabled 1
732 13:48:50.844768 PCI: 00:14.1: enabled 0
733 13:48:50.847512 PCI: 00:14.3: enabled 1
734 13:48:50.850130 PCI: 00:14.5: enabled 0
735 13:48:50.853153 PCI: 00:15.0: enabled 1
736 13:48:50.855469 I2C: 00:10: enabled 1
737 13:48:50.857537 I2C: 00:10: enabled 1
738 13:48:50.860293 I2C: 00:34: enabled 1
739 13:48:50.862731 PCI: 00:15.1: enabled 1
740 13:48:50.865363 I2C: 00:2c: enabled 1
741 13:48:50.868746 PCI: 00:15.2: enabled 0
742 13:48:50.870763 PCI: 00:15.3: enabled 0
743 13:48:50.873460 PCI: 00:16.0: enabled 1
744 13:48:50.875810 PCI: 00:16.1: enabled 0
745 13:48:50.878841 PCI: 00:16.2: enabled 0
746 13:48:50.881470 PCI: 00:16.3: enabled 0
747 13:48:50.883846 PCI: 00:16.4: enabled 0
748 13:48:50.886528 PCI: 00:16.5: enabled 0
749 13:48:50.888818 PCI: 00:17.0: enabled 1
750 13:48:50.891819 PCI: 00:19.0: enabled 1
751 13:48:50.894682 I2C: 00:50: enabled 1
752 13:48:50.897164 PCI: 00:19.1: enabled 0
753 13:48:50.899959 PCI: 00:19.2: enabled 1
754 13:48:50.902276 PCI: 00:1a.0: enabled 0
755 13:48:50.904906 PCI: 00:1c.0: enabled 1
756 13:48:50.907550 PCI: 00:1c.1: enabled 0
757 13:48:50.909897 PCI: 00:1c.2: enabled 0
758 13:48:50.913108 PCI: 00:1c.3: enabled 0
759 13:48:50.915309 PCI: 00:1c.4: enabled 0
760 13:48:50.917753 PCI: 00:1c.5: enabled 0
761 13:48:50.920896 PCI: 00:1c.6: enabled 0
762 13:48:50.923435 PCI: 00:1c.7: enabled 1
763 13:48:50.925950 PCI: 00:1d.0: enabled 1
764 13:48:50.928088 PCI: 00:1d.1: enabled 1
765 13:48:50.930894 PCI: 00:1d.2: enabled 0
766 13:48:50.933972 PCI: 00:1d.3: enabled 0
767 13:48:50.936248 PCI: 00:1d.4: enabled 1
768 13:48:50.939235 PCI: 00:1e.0: enabled 0
769 13:48:50.941321 PCI: 00:1e.1: enabled 0
770 13:48:50.944588 PCI: 00:1e.2: enabled 0
771 13:48:50.947048 PCI: 00:1e.3: enabled 0
772 13:48:50.949213 PCI: 00:1f.0: enabled 1
773 13:48:50.952005 PNP: 0c09.0: enabled 1
774 13:48:50.954363 PCI: 00:1f.1: enabled 1
775 13:48:50.957487 PCI: 00:1f.2: enabled 1
776 13:48:50.960415 PCI: 00:1f.3: enabled 1
777 13:48:50.962311 PCI: 00:1f.4: enabled 1
778 13:48:50.964758 PCI: 00:1f.5: enabled 1
779 13:48:50.967552 PCI: 00:1f.6: enabled 1
780 13:48:50.969919 Root Device scanning...
781 13:48:50.974341 root_dev_scan_bus for Root Device
782 13:48:50.976654 CPU_CLUSTER: 0 enabled
783 13:48:50.978621 DOMAIN: 0000 enabled
784 13:48:50.980976 DOMAIN: 0000 scanning...
785 13:48:50.985039 PCI: pci_scan_bus for bus 00
786 13:48:50.987452 PCI: 00:00.0 [8086/0000] ops
787 13:48:50.990942 PCI: 00:00.0 [8086/3e34] enabled
788 13:48:50.993883 PCI: 00:02.0 [8086/0000] ops
789 13:48:50.997335 PCI: 00:02.0 [8086/3ea0] enabled
790 13:48:50.999801 PCI: 00:04.0 [8086/1903] enabled
791 13:48:51.003011 PCI: 00:08.0 [8086/1911] enabled
792 13:48:51.006577 PCI: 00:12.0 [8086/9df9] enabled
793 13:48:51.009743 PCI: 00:14.0 [8086/0000] bus ops
794 13:48:51.013404 PCI: 00:14.0 [8086/9ded] enabled
795 13:48:51.016984 PCI: 00:14.2 [8086/9def] enabled
796 13:48:51.020108 PCI: 00:14.3 [8086/9df0] enabled
797 13:48:51.023025 PCI: 00:15.0 [8086/0000] bus ops
798 13:48:51.026738 PCI: 00:15.0 [8086/9de8] enabled
799 13:48:51.030041 PCI: 00:15.1 [8086/0000] bus ops
800 13:48:51.033742 PCI: 00:15.1 [8086/9de9] enabled
801 13:48:51.035745 PCI: 00:16.0 [8086/0000] ops
802 13:48:51.039934 PCI: 00:16.0 [8086/9de0] enabled
803 13:48:51.042243 PCI: 00:17.0 [8086/0000] ops
804 13:48:51.045492 PCI: 00:17.0 [8086/9dd3] enabled
805 13:48:51.048921 PCI: 00:19.0 [8086/0000] bus ops
806 13:48:51.052473 PCI: 00:19.0 [8086/9dc5] enabled
807 13:48:51.055095 PCI: 00:19.2 [8086/0000] ops
808 13:48:51.059281 PCI: 00:19.2 [8086/9dc7] enabled
809 13:48:51.061839 PCI: 00:1c.0 [8086/0000] bus ops
810 13:48:51.065765 PCI: 00:1c.0 [8086/9dbf] enabled
811 13:48:51.071128 PCI: Static device PCI: 00:1c.7 not found, disabling it.
812 13:48:51.073859 PCI: 00:1d.0 [8086/0000] bus ops
813 13:48:51.077372 PCI: 00:1d.0 [8086/9db4] enabled
814 13:48:51.083484 PCI: Static device PCI: 00:1d.1 not found, disabling it.
815 13:48:51.088807 PCI: Static device PCI: 00:1d.4 not found, disabling it.
816 13:48:51.092477 PCI: 00:1f.0 [8086/0000] bus ops
817 13:48:51.095536 PCI: 00:1f.0 [8086/9d84] enabled
818 13:48:51.100923 PCI: Static device PCI: 00:1f.1 not found, disabling it.
819 13:48:51.106714 PCI: Static device PCI: 00:1f.2 not found, disabling it.
820 13:48:51.110502 PCI: 00:1f.3 [8086/0000] bus ops
821 13:48:51.113442 PCI: 00:1f.3 [8086/9dc8] enabled
822 13:48:51.116823 PCI: 00:1f.4 [8086/0000] bus ops
823 13:48:51.119751 PCI: 00:1f.4 [8086/9da3] enabled
824 13:48:51.123256 PCI: 00:1f.5 [8086/0000] bus ops
825 13:48:51.126527 PCI: 00:1f.5 [8086/9da4] enabled
826 13:48:51.129730 PCI: 00:1f.6 [8086/15be] enabled
827 13:48:51.133778 PCI: Leftover static devices:
828 13:48:51.134795 PCI: 00:12.5
829 13:48:51.136250 PCI: 00:12.6
830 13:48:51.137133 PCI: 00:13.0
831 13:48:51.138658 PCI: 00:14.1
832 13:48:51.139563 PCI: 00:14.5
833 13:48:51.141549 PCI: 00:15.2
834 13:48:51.142912 PCI: 00:15.3
835 13:48:51.144324 PCI: 00:16.1
836 13:48:51.145263 PCI: 00:16.2
837 13:48:51.146811 PCI: 00:16.3
838 13:48:51.148014 PCI: 00:16.4
839 13:48:51.149365 PCI: 00:16.5
840 13:48:51.150790 PCI: 00:19.1
841 13:48:51.152667 PCI: 00:1a.0
842 13:48:51.153667 PCI: 00:1c.1
843 13:48:51.155986 PCI: 00:1c.2
844 13:48:51.156257 PCI: 00:1c.3
845 13:48:51.157428 PCI: 00:1c.4
846 13:48:51.158621 PCI: 00:1c.5
847 13:48:51.160415 PCI: 00:1c.6
848 13:48:51.161952 PCI: 00:1c.7
849 13:48:51.163226 PCI: 00:1d.1
850 13:48:51.164962 PCI: 00:1d.2
851 13:48:51.166216 PCI: 00:1d.3
852 13:48:51.166958 PCI: 00:1d.4
853 13:48:51.169084 PCI: 00:1e.0
854 13:48:51.169897 PCI: 00:1e.1
855 13:48:51.171098 PCI: 00:1e.2
856 13:48:51.172465 PCI: 00:1e.3
857 13:48:51.173816 PCI: 00:1f.1
858 13:48:51.174994 PCI: 00:1f.2
859 13:48:51.178157 PCI: Check your devicetree.cb.
860 13:48:51.180825 PCI: 00:14.0 scanning...
861 13:48:51.184555 scan_usb_bus for PCI: 00:14.0
862 13:48:51.185952 USB0 port 0 enabled
863 13:48:51.188556 USB0 port 0 scanning...
864 13:48:51.191775 scan_usb_bus for USB0 port 0
865 13:48:51.193818 USB2 port 0 enabled
866 13:48:51.195934 USB2 port 1 enabled
867 13:48:51.197955 USB2 port 2 enabled
868 13:48:51.199784 USB2 port 4 enabled
869 13:48:51.201976 USB2 port 5 enabled
870 13:48:51.204220 USB2 port 6 enabled
871 13:48:51.206407 USB2 port 7 enabled
872 13:48:51.208423 USB2 port 8 enabled
873 13:48:51.210674 USB2 port 9 enabled
874 13:48:51.212165 USB3 port 0 enabled
875 13:48:51.214414 USB3 port 1 enabled
876 13:48:51.216632 USB3 port 2 enabled
877 13:48:51.218726 USB3 port 3 enabled
878 13:48:51.220987 USB3 port 4 enabled
879 13:48:51.222699 USB2 port 0 scanning...
880 13:48:51.226007 scan_usb_bus for USB2 port 0
881 13:48:51.229915 scan_usb_bus for USB2 port 0 done
882 13:48:51.234926 scan_bus: scanning of bus USB2 port 0 took 9058 usecs
883 13:48:51.237355 USB2 port 1 scanning...
884 13:48:51.241134 scan_usb_bus for USB2 port 1
885 13:48:51.244323 scan_usb_bus for USB2 port 1 done
886 13:48:51.249375 scan_bus: scanning of bus USB2 port 1 took 9058 usecs
887 13:48:51.251936 USB2 port 2 scanning...
888 13:48:51.255245 scan_usb_bus for USB2 port 2
889 13:48:51.258530 scan_usb_bus for USB2 port 2 done
890 13:48:51.263568 scan_bus: scanning of bus USB2 port 2 took 9059 usecs
891 13:48:51.265988 USB2 port 4 scanning...
892 13:48:51.269505 scan_usb_bus for USB2 port 4
893 13:48:51.272339 scan_usb_bus for USB2 port 4 done
894 13:48:51.278520 scan_bus: scanning of bus USB2 port 4 took 9059 usecs
895 13:48:51.280856 USB2 port 5 scanning...
896 13:48:51.283396 scan_usb_bus for USB2 port 5
897 13:48:51.286999 scan_usb_bus for USB2 port 5 done
898 13:48:51.293347 scan_bus: scanning of bus USB2 port 5 took 9058 usecs
899 13:48:51.294625 USB2 port 6 scanning...
900 13:48:51.297928 scan_usb_bus for USB2 port 6
901 13:48:51.302124 scan_usb_bus for USB2 port 6 done
902 13:48:51.307056 scan_bus: scanning of bus USB2 port 6 took 9058 usecs
903 13:48:51.309603 USB2 port 7 scanning...
904 13:48:51.312829 scan_usb_bus for USB2 port 7
905 13:48:51.316841 scan_usb_bus for USB2 port 7 done
906 13:48:51.321645 scan_bus: scanning of bus USB2 port 7 took 9059 usecs
907 13:48:51.323824 USB2 port 8 scanning...
908 13:48:51.326835 scan_usb_bus for USB2 port 8
909 13:48:51.329953 scan_usb_bus for USB2 port 8 done
910 13:48:51.335693 scan_bus: scanning of bus USB2 port 8 took 9058 usecs
911 13:48:51.337696 USB2 port 9 scanning...
912 13:48:51.340979 scan_usb_bus for USB2 port 9
913 13:48:51.344692 scan_usb_bus for USB2 port 9 done
914 13:48:51.349711 scan_bus: scanning of bus USB2 port 9 took 9059 usecs
915 13:48:51.352552 USB3 port 0 scanning...
916 13:48:51.362133 scan_usb_bus for USB3 port 0
917 13:48:51.362252 scan_usb_bus for USB3 port 0 done
918 13:48:51.364183 scan_bus: scanning of bus USB3 port 0 took 9058 usecs
919 13:48:51.367726 USB3 port 1 scanning...
920 13:48:51.370418 scan_usb_bus for USB3 port 1
921 13:48:51.374134 scan_usb_bus for USB3 port 1 done
922 13:48:51.378713 scan_bus: scanning of bus USB3 port 1 took 9055 usecs
923 13:48:51.381300 USB3 port 2 scanning...
924 13:48:51.384544 scan_usb_bus for USB3 port 2
925 13:48:51.388142 scan_usb_bus for USB3 port 2 done
926 13:48:51.393021 scan_bus: scanning of bus USB3 port 2 took 9057 usecs
927 13:48:51.395635 USB3 port 3 scanning...
928 13:48:51.398661 scan_usb_bus for USB3 port 3
929 13:48:51.402013 scan_usb_bus for USB3 port 3 done
930 13:48:51.408471 scan_bus: scanning of bus USB3 port 3 took 9058 usecs
931 13:48:51.410103 USB3 port 4 scanning...
932 13:48:51.413377 scan_usb_bus for USB3 port 4
933 13:48:51.416587 scan_usb_bus for USB3 port 4 done
934 13:48:51.422031 scan_bus: scanning of bus USB3 port 4 took 9060 usecs
935 13:48:51.425828 scan_usb_bus for USB0 port 0 done
936 13:48:51.430938 scan_bus: scanning of bus USB0 port 0 took 239238 usecs
937 13:48:51.434859 scan_usb_bus for PCI: 00:14.0 done
938 13:48:51.440449 scan_bus: scanning of bus PCI: 00:14.0 took 256166 usecs
939 13:48:51.443192 PCI: 00:15.0 scanning...
940 13:48:51.446582 scan_generic_bus for PCI: 00:15.0
941 13:48:51.451150 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
942 13:48:51.454595 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
943 13:48:51.458741 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
944 13:48:51.462677 scan_generic_bus for PCI: 00:15.0 done
945 13:48:51.468164 scan_bus: scanning of bus PCI: 00:15.0 took 22375 usecs
946 13:48:51.470436 PCI: 00:15.1 scanning...
947 13:48:51.474792 scan_generic_bus for PCI: 00:15.1
948 13:48:51.478565 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
949 13:48:51.482158 scan_generic_bus for PCI: 00:15.1 done
950 13:48:51.488080 scan_bus: scanning of bus PCI: 00:15.1 took 14210 usecs
951 13:48:51.490512 PCI: 00:19.0 scanning...
952 13:48:51.494334 scan_generic_bus for PCI: 00:19.0
953 13:48:51.498255 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
954 13:48:51.502327 scan_generic_bus for PCI: 00:19.0 done
955 13:48:51.508311 scan_bus: scanning of bus PCI: 00:19.0 took 14211 usecs
956 13:48:51.509834 PCI: 00:1c.0 scanning...
957 13:48:51.513969 do_pci_scan_bridge for PCI: 00:1c.0
958 13:48:51.517285 PCI: pci_scan_bus for bus 01
959 13:48:51.520924 PCI: 01:00.0 [10ec/525a] enabled
960 13:48:51.523808 Capability: type 0x01 @ 0x80
961 13:48:51.526484 Capability: type 0x05 @ 0x90
962 13:48:51.529680 Capability: type 0x10 @ 0xb0
963 13:48:51.532671 Capability: type 0x10 @ 0x40
964 13:48:51.535727 Enabling Common Clock Configuration
965 13:48:51.540035 L1 Sub-State supported from root port 28
966 13:48:51.542870 L1 Sub-State Support = 0xf
967 13:48:51.545683 CommonModeRestoreTime = 0x3c
968 13:48:51.549871 Power On Value = 0x6, Power On Scale = 0x1
969 13:48:51.552777 ASPM: Enabled L0s and L1
970 13:48:51.555512 Capability: type 0x01 @ 0x80
971 13:48:51.558468 Capability: type 0x05 @ 0x90
972 13:48:51.561744 Capability: type 0x10 @ 0xb0
973 13:48:51.566951 scan_bus: scanning of bus PCI: 00:1c.0 took 53659 usecs
974 13:48:51.569545 PCI: 00:1d.0 scanning...
975 13:48:51.573288 do_pci_scan_bridge for PCI: 00:1d.0
976 13:48:51.576167 PCI: pci_scan_bus for bus 02
977 13:48:51.579672 PCI: 02:00.0 [1217/8620] enabled
978 13:48:51.582697 Capability: type 0x01 @ 0x6c
979 13:48:51.585828 Capability: type 0x05 @ 0x48
980 13:48:51.589103 Capability: type 0x10 @ 0x80
981 13:48:51.592044 Capability: type 0x10 @ 0x40
982 13:48:51.595546 L1 Sub-State supported from root port 29
983 13:48:51.598642 L1 Sub-State Support = 0xf
984 13:48:51.601350 CommonModeRestoreTime = 0x78
985 13:48:51.605805 Power On Value = 0x16, Power On Scale = 0x0
986 13:48:51.607168 ASPM: Enabled L1
987 13:48:51.611986 Capability: type 0x01 @ 0x6c
988 13:48:51.616512 Capability: type 0x05 @ 0x48
989 13:48:51.621479 Capability: type 0x10 @ 0x80
990 13:48:51.628115 scan_bus: scanning of bus PCI: 00:1d.0 took 56011 usecs
991 13:48:51.630925 PCI: 00:1f.0 scanning...
992 13:48:51.634265 scan_lpc_bus for PCI: 00:1f.0
993 13:48:51.636593 PNP: 0c09.0 enabled
994 13:48:51.640036 scan_lpc_bus for PCI: 00:1f.0 done
995 13:48:51.645237 scan_bus: scanning of bus PCI: 00:1f.0 took 11450 usecs
996 13:48:51.647463 PCI: 00:1f.3 scanning...
997 13:48:51.653487 scan_bus: scanning of bus PCI: 00:1f.3 took 2842 usecs
998 13:48:51.655953 PCI: 00:1f.4 scanning...
999 13:48:51.659671 scan_generic_bus for PCI: 00:1f.4
1000 13:48:51.663288 scan_generic_bus for PCI: 00:1f.4 done
1001 13:48:51.669277 scan_bus: scanning of bus PCI: 00:1f.4 took 10130 usecs
1002 13:48:51.671714 PCI: 00:1f.5 scanning...
1003 13:48:51.675199 scan_generic_bus for PCI: 00:1f.5
1004 13:48:51.679500 scan_generic_bus for PCI: 00:1f.5 done
1005 13:48:51.685058 scan_bus: scanning of bus PCI: 00:1f.5 took 10129 usecs
1006 13:48:51.691086 scan_bus: scanning of bus DOMAIN: 0000 took 706646 usecs
1007 13:48:51.694437 root_dev_scan_bus for Root Device done
1008 13:48:51.700691 scan_bus: scanning of bus Root Device took 726784 usecs
1009 13:48:51.701335 done
1010 13:48:51.707331 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
1011 13:48:51.712694 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1012 13:48:51.720727 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
1013 13:48:51.727399 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
1014 13:48:51.731042 SPI flash protection: WPSW=1 SRP0=1
1015 13:48:51.738575 fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff
1016 13:48:51.743601 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
1017 13:48:51.749767 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1148422 exit 42654
1018 13:48:51.752501 found VGA at PCI: 00:02.0
1019 13:48:51.755747 Setting up VGA for PCI: 00:02.0
1020 13:48:51.761062 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1021 13:48:51.766101 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1022 13:48:51.768166 Allocating resources...
1023 13:48:51.770163 Reading resources...
1024 13:48:51.774665 Root Device read_resources bus 0 link: 0
1025 13:48:51.779660 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1026 13:48:51.785116 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1027 13:48:51.789146 DOMAIN: 0000 read_resources bus 0 link: 0
1028 13:48:51.795722 PCI: 00:14.0 read_resources bus 0 link: 0
1029 13:48:51.799275 USB0 port 0 read_resources bus 0 link: 0
1030 13:48:51.808594 USB0 port 0 read_resources bus 0 link: 0 done
1031 13:48:51.814147 PCI: 00:14.0 read_resources bus 0 link: 0 done
1032 13:48:51.818998 PCI: 00:15.0 read_resources bus 1 link: 0
1033 13:48:51.825589 PCI: 00:15.0 read_resources bus 1 link: 0 done
1034 13:48:51.829569 PCI: 00:15.1 read_resources bus 2 link: 0
1035 13:48:51.834762 PCI: 00:15.1 read_resources bus 2 link: 0 done
1036 13:48:51.840107 PCI: 00:19.0 read_resources bus 3 link: 0
1037 13:48:51.845584 PCI: 00:19.0 read_resources bus 3 link: 0 done
1038 13:48:51.850251 PCI: 00:1c.0 read_resources bus 1 link: 0
1039 13:48:51.855294 PCI: 00:1c.0 read_resources bus 1 link: 0 done
1040 13:48:51.860006 PCI: 00:1d.0 read_resources bus 2 link: 0
1041 13:48:51.867142 PCI: 00:1d.0 read_resources bus 2 link: 0 done
1042 13:48:51.871870 PCI: 00:1f.0 read_resources bus 0 link: 0
1043 13:48:51.876987 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1044 13:48:51.883516 DOMAIN: 0000 read_resources bus 0 link: 0 done
1045 13:48:51.888365 Root Device read_resources bus 0 link: 0 done
1046 13:48:51.891161 Done reading resources.
1047 13:48:51.896162 Show resources in subtree (Root Device)...After reading.
1048 13:48:51.900487 Root Device child on link 0 CPU_CLUSTER: 0
1049 13:48:51.905001 CPU_CLUSTER: 0 child on link 0 APIC: 00
1050 13:48:51.906128 APIC: 00
1051 13:48:51.908169 APIC: 02
1052 13:48:51.908736 APIC: 07
1053 13:48:51.910033 APIC: 01
1054 13:48:51.911226 APIC: 03
1055 13:48:51.912491 APIC: 06
1056 13:48:51.914143 APIC: 05
1057 13:48:51.915269 APIC: 04
1058 13:48:51.920064 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1059 13:48:51.928825 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1060 13:48:51.938829 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1061 13:48:51.940423 PCI: 00:00.0
1062 13:48:51.950339 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1063 13:48:51.959096 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1064 13:48:51.968331 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1065 13:48:51.977887 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1066 13:48:51.987041 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1067 13:48:51.996090 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1068 13:48:52.005764 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1069 13:48:52.014269 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1070 13:48:52.024544 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1071 13:48:52.033413 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1072 13:48:52.043401 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1073 13:48:52.053059 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1074 13:48:52.062868 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1075 13:48:52.071928 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1076 13:48:52.073167 PCI: 00:02.0
1077 13:48:52.083139 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1078 13:48:52.093390 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1079 13:48:52.102078 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1080 13:48:52.104211 PCI: 00:04.0
1081 13:48:52.113508 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1082 13:48:52.115170 PCI: 00:08.0
1083 13:48:52.125343 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1084 13:48:52.127559 PCI: 00:12.0
1085 13:48:52.136555 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1086 13:48:52.140648 PCI: 00:14.0 child on link 0 USB0 port 0
1087 13:48:52.151380 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1088 13:48:52.155159 USB0 port 0 child on link 0 USB2 port 0
1089 13:48:52.157070 USB2 port 0
1090 13:48:52.159288 USB2 port 1
1091 13:48:52.160754 USB2 port 2
1092 13:48:52.162407 USB2 port 4
1093 13:48:52.164427 USB2 port 5
1094 13:48:52.166681 USB2 port 6
1095 13:48:52.167422 USB2 port 7
1096 13:48:52.169716 USB2 port 8
1097 13:48:52.171177 USB2 port 9
1098 13:48:52.173317 USB3 port 0
1099 13:48:52.174789 USB3 port 1
1100 13:48:52.176586 USB3 port 2
1101 13:48:52.178463 USB3 port 3
1102 13:48:52.179510 USB3 port 4
1103 13:48:52.181883 PCI: 00:14.2
1104 13:48:52.191397 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1105 13:48:52.201903 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1106 13:48:52.202749 PCI: 00:14.3
1107 13:48:52.213259 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1108 13:48:52.217506 PCI: 00:15.0 child on link 0 I2C: 01:10
1109 13:48:52.227417 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 13:48:52.228604 I2C: 01:10
1111 13:48:52.229936 I2C: 01:10
1112 13:48:52.231677 I2C: 01:34
1113 13:48:52.236413 PCI: 00:15.1 child on link 0 I2C: 02:2c
1114 13:48:52.246693 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1115 13:48:52.247879 I2C: 02:2c
1116 13:48:52.249259 PCI: 00:16.0
1117 13:48:52.259093 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1118 13:48:52.260784 PCI: 00:17.0
1119 13:48:52.269749 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1120 13:48:52.279038 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1121 13:48:52.287386 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1122 13:48:52.295285 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1123 13:48:52.304039 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1124 13:48:52.312519 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1125 13:48:52.317689 PCI: 00:19.0 child on link 0 I2C: 03:50
1126 13:48:52.326792 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1127 13:48:52.337007 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 13:48:52.338587 I2C: 03:50
1129 13:48:52.340297 PCI: 00:19.2
1130 13:48:52.351790 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1131 13:48:52.361499 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1132 13:48:52.365489 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1133 13:48:52.374510 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1134 13:48:52.384568 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1135 13:48:52.392851 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1136 13:48:52.395066 PCI: 01:00.0
1137 13:48:52.404074 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1138 13:48:52.408424 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1139 13:48:52.416969 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1140 13:48:52.426746 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1141 13:48:52.435982 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1142 13:48:52.437957 PCI: 02:00.0
1143 13:48:52.447088 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1144 13:48:52.455920 PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14
1145 13:48:52.460546 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1146 13:48:52.469655 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1147 13:48:52.478202 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1148 13:48:52.479638 PNP: 0c09.0
1149 13:48:52.488198 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1150 13:48:52.496674 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1151 13:48:52.505324 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1152 13:48:52.507776 PCI: 00:1f.3
1153 13:48:52.516912 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1154 13:48:52.527726 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1155 13:48:52.528655 PCI: 00:1f.4
1156 13:48:52.538163 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1157 13:48:52.548310 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1158 13:48:52.549856 PCI: 00:1f.5
1159 13:48:52.558168 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1160 13:48:52.560053 PCI: 00:1f.6
1161 13:48:52.569580 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1162 13:48:52.576158 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1163 13:48:52.582202 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1164 13:48:52.588853 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1165 13:48:52.595473 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1166 13:48:52.602189 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1167 13:48:52.605626 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1168 13:48:52.609250 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1169 13:48:52.613149 PCI: 00:17.0 18 * [0x60 - 0x67] io
1170 13:48:52.616222 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1171 13:48:52.622888 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1172 13:48:52.630356 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1173 13:48:52.637735 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1174 13:48:52.645900 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1175 13:48:52.653295 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1176 13:48:52.656611 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1177 13:48:52.664941 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1178 13:48:52.672986 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1179 13:48:52.681032 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1180 13:48:52.687991 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1181 13:48:52.691490 PCI: 02:00.0 10 * [0x0 - 0xfff] mem
1182 13:48:52.695872 PCI: 02:00.0 14 * [0x1000 - 0x17ff] mem
1183 13:48:52.703492 PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done
1184 13:48:52.708466 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1185 13:48:52.712796 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1186 13:48:52.718133 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1187 13:48:52.723111 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1188 13:48:52.728181 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1189 13:48:52.732466 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1190 13:48:52.737236 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1191 13:48:52.742071 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1192 13:48:52.746949 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1193 13:48:52.751751 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1194 13:48:52.757069 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1195 13:48:52.761711 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1196 13:48:52.766646 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1197 13:48:52.771164 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1198 13:48:52.776234 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1199 13:48:52.780953 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1200 13:48:52.786071 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1201 13:48:52.790813 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1202 13:48:52.795409 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1203 13:48:52.800562 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1204 13:48:52.805700 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1205 13:48:52.810157 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1206 13:48:52.815741 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1207 13:48:52.819805 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1208 13:48:52.824987 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1209 13:48:52.833520 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1210 13:48:52.837212 avoid_fixed_resources: DOMAIN: 0000
1211 13:48:52.843210 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1212 13:48:52.849084 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1213 13:48:52.856184 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1214 13:48:52.863889 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1215 13:48:52.872032 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1216 13:48:52.879468 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1217 13:48:52.887059 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1218 13:48:52.894394 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1219 13:48:52.902531 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1220 13:48:52.909747 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1221 13:48:52.917208 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1222 13:48:52.924494 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1223 13:48:52.926485 Setting resources...
1224 13:48:52.933494 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1225 13:48:52.937179 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1226 13:48:52.940866 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1227 13:48:52.945561 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1228 13:48:52.948769 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1229 13:48:52.955112 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1230 13:48:52.961427 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1231 13:48:52.967807 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1232 13:48:52.973780 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1233 13:48:52.980188 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1234 13:48:52.988309 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1235 13:48:52.993295 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1236 13:48:52.998228 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1237 13:48:53.002642 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1238 13:48:53.007460 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1239 13:48:53.012635 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1240 13:48:53.017388 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1241 13:48:53.022092 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1242 13:48:53.027147 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1243 13:48:53.031955 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1244 13:48:53.037132 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1245 13:48:53.041750 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1246 13:48:53.046597 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1247 13:48:53.051311 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1248 13:48:53.056327 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1249 13:48:53.061131 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1250 13:48:53.065776 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1251 13:48:53.070636 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1252 13:48:53.075425 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1253 13:48:53.081107 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1254 13:48:53.085397 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1255 13:48:53.090235 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1256 13:48:53.095189 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1257 13:48:53.099870 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1258 13:48:53.105363 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1259 13:48:53.110015 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1260 13:48:53.117693 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1261 13:48:53.124890 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1262 13:48:53.132300 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1263 13:48:53.139779 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1264 13:48:53.144418 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1265 13:48:53.152009 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1266 13:48:53.159517 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 13:48:53.166399 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 13:48:53.173945 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1269 13:48:53.178833 PCI: 02:00.0 10 * [0xd1100000 - 0xd1100fff] mem
1270 13:48:53.183845 PCI: 02:00.0 14 * [0xd1101000 - 0xd11017ff] mem
1271 13:48:53.190726 PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done
1272 13:48:53.195641 Root Device assign_resources, bus 0 link: 0
1273 13:48:53.199687 DOMAIN: 0000 assign_resources, bus 0 link: 0
1274 13:48:53.208768 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1275 13:48:53.217562 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1276 13:48:53.224371 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1277 13:48:53.232830 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1278 13:48:53.241017 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1279 13:48:53.249484 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1280 13:48:53.258114 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1281 13:48:53.263176 PCI: 00:14.0 assign_resources, bus 0 link: 0
1282 13:48:53.266946 PCI: 00:14.0 assign_resources, bus 0 link: 0
1283 13:48:53.275491 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1284 13:48:53.283088 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1285 13:48:53.291715 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1286 13:48:53.299825 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1287 13:48:53.304315 PCI: 00:15.0 assign_resources, bus 1 link: 0
1288 13:48:53.309269 PCI: 00:15.0 assign_resources, bus 1 link: 0
1289 13:48:53.317559 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1290 13:48:53.322256 PCI: 00:15.1 assign_resources, bus 2 link: 0
1291 13:48:53.326959 PCI: 00:15.1 assign_resources, bus 2 link: 0
1292 13:48:53.335069 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1293 13:48:53.342981 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1294 13:48:53.351180 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1295 13:48:53.358373 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1296 13:48:53.366126 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1297 13:48:53.374166 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1298 13:48:53.381406 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1299 13:48:53.389623 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1300 13:48:53.398301 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1301 13:48:53.402739 PCI: 00:19.0 assign_resources, bus 3 link: 0
1302 13:48:53.407028 PCI: 00:19.0 assign_resources, bus 3 link: 0
1303 13:48:53.415115 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1304 13:48:53.423944 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1305 13:48:53.433249 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1306 13:48:53.441808 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1307 13:48:53.445705 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1308 13:48:53.454391 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1309 13:48:53.458995 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1310 13:48:53.467560 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1311 13:48:53.476568 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1312 13:48:53.484615 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1313 13:48:53.490008 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1314 13:48:53.499299 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem
1315 13:48:53.508173 PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem
1316 13:48:53.515012 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1317 13:48:53.519466 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1318 13:48:53.525098 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1319 13:48:53.530181 LPC: Trying to open IO window from 930 size 8
1320 13:48:53.534081 LPC: Trying to open IO window from 940 size 8
1321 13:48:53.538350 LPC: Trying to open IO window from 950 size 10
1322 13:48:53.547189 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1323 13:48:53.554480 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1324 13:48:53.562883 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1325 13:48:53.571919 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1326 13:48:53.579402 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1327 13:48:53.584267 DOMAIN: 0000 assign_resources, bus 0 link: 0
1328 13:48:53.588681 Root Device assign_resources, bus 0 link: 0
1329 13:48:53.591321 Done setting resources.
1330 13:48:53.597981 Show resources in subtree (Root Device)...After assigning values.
1331 13:48:53.601801 Root Device child on link 0 CPU_CLUSTER: 0
1332 13:48:53.606662 CPU_CLUSTER: 0 child on link 0 APIC: 00
1333 13:48:53.607892 APIC: 00
1334 13:48:53.608754 APIC: 02
1335 13:48:53.610714 APIC: 07
1336 13:48:53.611585 APIC: 01
1337 13:48:53.612315 APIC: 03
1338 13:48:53.614060 APIC: 06
1339 13:48:53.615097 APIC: 05
1340 13:48:53.616274 APIC: 04
1341 13:48:53.620721 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1342 13:48:53.630604 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1343 13:48:53.642255 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1344 13:48:53.643004 PCI: 00:00.0
1345 13:48:53.653123 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1346 13:48:53.662613 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1347 13:48:53.671480 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1348 13:48:53.681604 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1349 13:48:53.690220 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1350 13:48:53.700051 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1351 13:48:53.709495 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1352 13:48:53.717398 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1353 13:48:53.726964 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1354 13:48:53.736519 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1355 13:48:53.746247 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1356 13:48:53.756583 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1357 13:48:53.765458 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1358 13:48:53.774736 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1359 13:48:53.776704 PCI: 00:02.0
1360 13:48:53.786581 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1361 13:48:53.798142 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1362 13:48:53.806972 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1363 13:48:53.808355 PCI: 00:04.0
1364 13:48:53.819044 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1365 13:48:53.820779 PCI: 00:08.0
1366 13:48:53.830781 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1367 13:48:53.832643 PCI: 00:12.0
1368 13:48:53.842525 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1369 13:48:53.847145 PCI: 00:14.0 child on link 0 USB0 port 0
1370 13:48:53.857143 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1371 13:48:53.861595 USB0 port 0 child on link 0 USB2 port 0
1372 13:48:53.863184 USB2 port 0
1373 13:48:53.865183 USB2 port 1
1374 13:48:53.866594 USB2 port 2
1375 13:48:53.868200 USB2 port 4
1376 13:48:53.870322 USB2 port 5
1377 13:48:53.872156 USB2 port 6
1378 13:48:53.873893 USB2 port 7
1379 13:48:53.876184 USB2 port 8
1380 13:48:53.877473 USB2 port 9
1381 13:48:53.878824 USB3 port 0
1382 13:48:53.880927 USB3 port 1
1383 13:48:53.882815 USB3 port 2
1384 13:48:53.884088 USB3 port 3
1385 13:48:53.885839 USB3 port 4
1386 13:48:53.887550 PCI: 00:14.2
1387 13:48:53.897908 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1388 13:48:53.908598 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1389 13:48:53.910162 PCI: 00:14.3
1390 13:48:53.920747 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1391 13:48:53.924625 PCI: 00:15.0 child on link 0 I2C: 01:10
1392 13:48:53.935421 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1393 13:48:53.936244 I2C: 01:10
1394 13:48:53.938408 I2C: 01:10
1395 13:48:53.939566 I2C: 01:34
1396 13:48:53.944089 PCI: 00:15.1 child on link 0 I2C: 02:2c
1397 13:48:53.953957 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1398 13:48:53.956291 I2C: 02:2c
1399 13:48:53.957533 PCI: 00:16.0
1400 13:48:53.967766 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1401 13:48:53.969624 PCI: 00:17.0
1402 13:48:53.979462 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1403 13:48:53.989846 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1404 13:48:53.998790 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1405 13:48:54.008255 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1406 13:48:54.016643 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1407 13:48:54.027040 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1408 13:48:54.031109 PCI: 00:19.0 child on link 0 I2C: 03:50
1409 13:48:54.042038 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1410 13:48:54.052092 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1411 13:48:54.053737 I2C: 03:50
1412 13:48:54.055016 PCI: 00:19.2
1413 13:48:54.066923 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 13:48:54.076832 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1415 13:48:54.081443 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1416 13:48:54.090443 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1417 13:48:54.100096 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1418 13:48:54.110886 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1419 13:48:54.112331 PCI: 01:00.0
1420 13:48:54.123270 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1421 13:48:54.127927 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1422 13:48:54.136749 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1423 13:48:54.146188 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1424 13:48:54.156953 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1425 13:48:54.159288 PCI: 02:00.0
1426 13:48:54.169522 PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10
1427 13:48:54.180202 PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14
1428 13:48:54.184574 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1429 13:48:54.192376 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1430 13:48:54.201662 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1431 13:48:54.203464 PNP: 0c09.0
1432 13:48:54.211757 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1433 13:48:54.220219 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1434 13:48:54.228931 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1435 13:48:54.230324 PCI: 00:1f.3
1436 13:48:54.241187 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1437 13:48:54.251751 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1438 13:48:54.252855 PCI: 00:1f.4
1439 13:48:54.262035 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1440 13:48:54.272590 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1441 13:48:54.273900 PCI: 00:1f.5
1442 13:48:54.284157 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1443 13:48:54.285741 PCI: 00:1f.6
1444 13:48:54.296112 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1445 13:48:54.299006 Done allocating resources.
1446 13:48:54.305504 BS: BS_DEV_RESOURCES times (us): entry 0 run 2549014 exit 14
1447 13:48:54.308421 Enabling resources...
1448 13:48:54.312209 PCI: 00:00.0 subsystem <- 1028/3e34
1449 13:48:54.314492 PCI: 00:00.0 cmd <- 06
1450 13:48:54.318262 PCI: 00:02.0 subsystem <- 1028/3ea0
1451 13:48:54.320531 PCI: 00:02.0 cmd <- 03
1452 13:48:54.325110 PCI: 00:04.0 subsystem <- 1028/1903
1453 13:48:54.327361 PCI: 00:04.0 cmd <- 02
1454 13:48:54.329888 PCI: 00:08.0 cmd <- 06
1455 13:48:54.333774 PCI: 00:12.0 subsystem <- 1028/9df9
1456 13:48:54.335855 PCI: 00:12.0 cmd <- 02
1457 13:48:54.340238 PCI: 00:14.0 subsystem <- 1028/9ded
1458 13:48:54.342786 PCI: 00:14.0 cmd <- 02
1459 13:48:54.344891 PCI: 00:14.2 cmd <- 02
1460 13:48:54.348900 PCI: 00:14.3 subsystem <- 1028/9df0
1461 13:48:54.351401 PCI: 00:14.3 cmd <- 02
1462 13:48:54.355210 PCI: 00:15.0 subsystem <- 1028/9de8
1463 13:48:54.357487 PCI: 00:15.0 cmd <- 02
1464 13:48:54.361585 PCI: 00:15.1 subsystem <- 1028/9de9
1465 13:48:54.363879 PCI: 00:15.1 cmd <- 02
1466 13:48:54.368260 PCI: 00:16.0 subsystem <- 1028/9de0
1467 13:48:54.370103 PCI: 00:16.0 cmd <- 02
1468 13:48:54.374147 PCI: 00:17.0 subsystem <- 1028/9dd3
1469 13:48:54.376619 PCI: 00:17.0 cmd <- 03
1470 13:48:54.379854 PCI: 00:19.0 subsystem <- 1028/9dc5
1471 13:48:54.382517 PCI: 00:19.0 cmd <- 06
1472 13:48:54.386914 PCI: 00:19.2 subsystem <- 1028/9dc7
1473 13:48:54.389051 PCI: 00:19.2 cmd <- 06
1474 13:48:54.391962 PCI: 00:1c.0 bridge ctrl <- 0003
1475 13:48:54.396119 PCI: 00:1c.0 subsystem <- 1028/9dbf
1476 13:48:54.398585 Capability: type 0x10 @ 0x40
1477 13:48:54.402184 Capability: type 0x05 @ 0x80
1478 13:48:54.404584 Capability: type 0x0d @ 0x90
1479 13:48:54.407196 PCI: 00:1c.0 cmd <- 06
1480 13:48:54.411144 PCI: 00:1d.0 bridge ctrl <- 0003
1481 13:48:54.414862 PCI: 00:1d.0 subsystem <- 1028/9db4
1482 13:48:54.417207 Capability: type 0x10 @ 0x40
1483 13:48:54.420300 Capability: type 0x05 @ 0x80
1484 13:48:54.422623 Capability: type 0x0d @ 0x90
1485 13:48:54.425793 PCI: 00:1d.0 cmd <- 06
1486 13:48:54.429718 PCI: 00:1f.0 subsystem <- 1028/9d84
1487 13:48:54.431467 PCI: 00:1f.0 cmd <- 407
1488 13:48:54.435399 PCI: 00:1f.3 subsystem <- 1028/9dc8
1489 13:48:54.438133 PCI: 00:1f.3 cmd <- 02
1490 13:48:54.441703 PCI: 00:1f.4 subsystem <- 1028/9da3
1491 13:48:54.444291 PCI: 00:1f.4 cmd <- 03
1492 13:48:54.448793 PCI: 00:1f.5 subsystem <- 1028/9da4
1493 13:48:54.450490 PCI: 00:1f.5 cmd <- 406
1494 13:48:54.454780 PCI: 00:1f.6 subsystem <- 1028/15be
1495 13:48:54.456954 PCI: 00:1f.6 cmd <- 02
1496 13:48:54.467477 PCI: 01:00.0 cmd <- 02
1497 13:48:54.471879 PCI: 02:00.0 cmd <- 06
1498 13:48:54.475995 done.
1499 13:48:54.482104 BS: BS_DEV_ENABLE times (us): entry 399 run 170544 exit 0
1500 13:48:54.483927 Initializing devices...
1501 13:48:54.486724 Root Device init ...
1502 13:48:54.490353 Root Device init finished in 2139 usecs
1503 13:48:54.492977 CPU_CLUSTER: 0 init ...
1504 13:48:54.497220 CPU_CLUSTER: 0 init finished in 2430 usecs
1505 13:48:54.503668 PCI: 00:00.0 init ...
1506 13:48:54.506678 CPU TDP: 15 Watts
1507 13:48:54.509012 CPU PL2 = 51 Watts
1508 13:48:54.512951 PCI: 00:00.0 init finished in 7038 usecs
1509 13:48:54.515362 PCI: 00:02.0 init ...
1510 13:48:54.519242 PCI: 00:02.0 init finished in 2236 usecs
1511 13:48:54.522655 PCI: 00:04.0 init ...
1512 13:48:54.526887 PCI: 00:04.0 init finished in 2236 usecs
1513 13:48:54.529057 PCI: 00:08.0 init ...
1514 13:48:54.532724 PCI: 00:08.0 init finished in 2237 usecs
1515 13:48:54.535067 PCI: 00:12.0 init ...
1516 13:48:54.539360 PCI: 00:12.0 init finished in 2237 usecs
1517 13:48:54.542512 PCI: 00:14.0 init ...
1518 13:48:54.546854 PCI: 00:14.0 init finished in 2236 usecs
1519 13:48:54.548806 PCI: 00:14.2 init ...
1520 13:48:54.552929 PCI: 00:14.2 init finished in 2237 usecs
1521 13:48:54.555846 PCI: 00:14.3 init ...
1522 13:48:54.560002 PCI: 00:14.3 init finished in 2234 usecs
1523 13:48:54.563157 PCI: 00:15.0 init ...
1524 13:48:54.566100 DW I2C bus 0 at 0xd1347000 (400 KHz)
1525 13:48:54.570610 PCI: 00:15.0 init finished in 5935 usecs
1526 13:48:54.572936 PCI: 00:15.1 init ...
1527 13:48:54.576993 DW I2C bus 1 at 0xd1348000 (400 KHz)
1528 13:48:54.580644 PCI: 00:15.1 init finished in 5926 usecs
1529 13:48:54.582974 PCI: 00:16.0 init ...
1530 13:48:54.587033 PCI: 00:16.0 init finished in 2236 usecs
1531 13:48:54.590543 PCI: 00:19.0 init ...
1532 13:48:54.594125 DW I2C bus 4 at 0xd134a000 (400 KHz)
1533 13:48:54.598274 PCI: 00:19.0 init finished in 5934 usecs
1534 13:48:54.601312 PCI: 00:1c.0 init ...
1535 13:48:54.604238 Initializing PCH PCIe bridge.
1536 13:48:54.608011 PCI: 00:1c.0 init finished in 5250 usecs
1537 13:48:54.611152 PCI: 00:1d.0 init ...
1538 13:48:54.614331 Initializing PCH PCIe bridge.
1539 13:48:54.618124 PCI: 00:1d.0 init finished in 5250 usecs
1540 13:48:54.620414 PCI: 00:1f.0 init ...
1541 13:48:54.624524 IOAPIC: Initializing IOAPIC at 0xfec00000
1542 13:48:54.629691 IOAPIC: Bootstrap Processor Local APIC = 0x00
1543 13:48:54.631166 IOAPIC: ID = 0x02
1544 13:48:54.634025 IOAPIC: Dumping registers
1545 13:48:54.636474 reg 0x0000: 0x02000000
1546 13:48:54.638785 reg 0x0001: 0x00770020
1547 13:48:54.641314 reg 0x0002: 0x00000000
1548 13:48:54.647792 PCI: 00:1f.0 init finished in 25031 usecs
1549 13:48:54.649958 PCI: 00:1f.3 init ...
1550 13:48:54.655642 HDA: codec_mask = 05
1551 13:48:54.658247 HDA: Initializing codec #2
1552 13:48:54.661064 HDA: codec viddid: 8086280b
1553 13:48:54.664013 HDA: No verb table entry found
1554 13:48:54.667080 HDA: Initializing codec #0
1555 13:48:54.669401 HDA: codec viddid: 10ec0236
1556 13:48:54.676028 HDA: verb loaded.
1557 13:48:54.681518 PCI: 00:1f.3 init finished in 28834 usecs
1558 13:48:54.683679 PCI: 00:1f.4 init ...
1559 13:48:54.687840 PCI: 00:1f.4 init finished in 2247 usecs
1560 13:48:54.690548 PCI: 00:1f.6 init ...
1561 13:48:54.694972 PCI: 00:1f.6 init finished in 2238 usecs
1562 13:48:54.705841 PCI: 01:00.0 init ...
1563 13:48:54.710059 PCI: 01:00.0 init finished in 2236 usecs
1564 13:48:54.712427 PCI: 02:00.0 init ...
1565 13:48:54.716574 PCI: 02:00.0 init finished in 2237 usecs
1566 13:48:54.718882 PNP: 0c09.0 init ...
1567 13:48:54.723146 EC Label : 00.00.20
1568 13:48:54.727188 EC Revision : 9ca674bba
1569 13:48:54.730604 EC Model Num : 08B9
1570 13:48:54.733951 EC Build Date : 05/10/19
1571 13:48:54.742781 PNP: 0c09.0 init finished in 21754 usecs
1572 13:48:54.745598 Devices initialized
1573 13:48:54.748561 Show all devs... After init.
1574 13:48:54.750393 Root Device: enabled 1
1575 13:48:54.752718 CPU_CLUSTER: 0: enabled 1
1576 13:48:54.755557 DOMAIN: 0000: enabled 1
1577 13:48:54.757378 APIC: 00: enabled 1
1578 13:48:54.760021 PCI: 00:00.0: enabled 1
1579 13:48:54.762494 PCI: 00:02.0: enabled 1
1580 13:48:54.764836 PCI: 00:04.0: enabled 1
1581 13:48:54.766920 PCI: 00:12.0: enabled 1
1582 13:48:54.769500 PCI: 00:12.5: enabled 0
1583 13:48:54.771927 PCI: 00:12.6: enabled 0
1584 13:48:54.774010 PCI: 00:13.0: enabled 0
1585 13:48:54.777426 PCI: 00:14.0: enabled 1
1586 13:48:54.779462 PCI: 00:14.1: enabled 0
1587 13:48:54.781680 PCI: 00:14.3: enabled 1
1588 13:48:54.784211 PCI: 00:14.5: enabled 0
1589 13:48:54.786603 PCI: 00:15.0: enabled 1
1590 13:48:54.789420 PCI: 00:15.1: enabled 1
1591 13:48:54.791720 PCI: 00:15.2: enabled 0
1592 13:48:54.794016 PCI: 00:15.3: enabled 0
1593 13:48:54.796545 PCI: 00:16.0: enabled 1
1594 13:48:54.799220 PCI: 00:16.1: enabled 0
1595 13:48:54.801311 PCI: 00:16.2: enabled 0
1596 13:48:54.804066 PCI: 00:16.3: enabled 0
1597 13:48:54.806012 PCI: 00:16.4: enabled 0
1598 13:48:54.808437 PCI: 00:16.5: enabled 0
1599 13:48:54.810790 PCI: 00:17.0: enabled 1
1600 13:48:54.813821 PCI: 00:19.0: enabled 1
1601 13:48:54.815627 PCI: 00:19.1: enabled 0
1602 13:48:54.818569 PCI: 00:19.2: enabled 1
1603 13:48:54.820790 PCI: 00:1a.0: enabled 0
1604 13:48:54.823164 PCI: 00:1c.0: enabled 1
1605 13:48:54.825577 PCI: 00:1c.1: enabled 0
1606 13:48:54.828665 PCI: 00:1c.2: enabled 0
1607 13:48:54.830216 PCI: 00:1c.3: enabled 0
1608 13:48:54.832572 PCI: 00:1c.4: enabled 0
1609 13:48:54.834998 PCI: 00:1c.5: enabled 0
1610 13:48:54.837470 PCI: 00:1c.6: enabled 0
1611 13:48:54.840041 PCI: 00:1c.7: enabled 0
1612 13:48:54.842565 PCI: 00:1d.0: enabled 1
1613 13:48:54.845551 PCI: 00:1d.1: enabled 0
1614 13:48:54.847412 PCI: 00:1d.2: enabled 0
1615 13:48:54.850383 PCI: 00:1d.3: enabled 0
1616 13:48:54.852394 PCI: 00:1d.4: enabled 0
1617 13:48:54.854630 PCI: 00:1e.0: enabled 0
1618 13:48:54.856799 PCI: 00:1e.1: enabled 0
1619 13:48:54.859616 PCI: 00:1e.2: enabled 0
1620 13:48:54.861802 PCI: 00:1e.3: enabled 0
1621 13:48:54.864210 PCI: 00:1f.0: enabled 1
1622 13:48:54.867593 PCI: 00:1f.1: enabled 0
1623 13:48:54.868936 PCI: 00:1f.2: enabled 0
1624 13:48:54.871927 PCI: 00:1f.3: enabled 1
1625 13:48:54.874214 PCI: 00:1f.4: enabled 1
1626 13:48:54.876652 PCI: 00:1f.5: enabled 1
1627 13:48:54.879071 PCI: 00:1f.6: enabled 1
1628 13:48:54.881315 USB0 port 0: enabled 1
1629 13:48:54.883623 I2C: 01:10: enabled 1
1630 13:48:54.885527 I2C: 01:10: enabled 1
1631 13:48:54.887796 I2C: 01:34: enabled 1
1632 13:48:54.890181 I2C: 02:2c: enabled 1
1633 13:48:54.893023 I2C: 03:50: enabled 1
1634 13:48:54.894696 PNP: 0c09.0: enabled 1
1635 13:48:54.897706 USB2 port 0: enabled 1
1636 13:48:54.899525 USB2 port 1: enabled 1
1637 13:48:54.902110 USB2 port 2: enabled 1
1638 13:48:54.904479 USB2 port 4: enabled 1
1639 13:48:54.906182 USB2 port 5: enabled 1
1640 13:48:54.908718 USB2 port 6: enabled 1
1641 13:48:54.911548 USB2 port 7: enabled 1
1642 13:48:54.913400 USB2 port 8: enabled 1
1643 13:48:54.915740 USB2 port 9: enabled 1
1644 13:48:54.918504 USB3 port 0: enabled 1
1645 13:48:54.920413 USB3 port 1: enabled 1
1646 13:48:54.923062 USB3 port 2: enabled 1
1647 13:48:54.925383 USB3 port 3: enabled 1
1648 13:48:54.927559 USB3 port 4: enabled 1
1649 13:48:54.929774 APIC: 02: enabled 1
1650 13:48:54.931818 APIC: 07: enabled 1
1651 13:48:54.933602 APIC: 01: enabled 1
1652 13:48:54.935397 APIC: 03: enabled 1
1653 13:48:54.937392 APIC: 06: enabled 1
1654 13:48:54.939720 APIC: 05: enabled 1
1655 13:48:54.941944 APIC: 04: enabled 1
1656 13:48:54.943902 PCI: 00:08.0: enabled 1
1657 13:48:54.946575 PCI: 00:14.2: enabled 1
1658 13:48:54.948930 PCI: 01:00.0: enabled 1
1659 13:48:54.951220 PCI: 02:00.0: enabled 1
1660 13:48:54.956660 Disabling ACPI via APMC:
1661 13:48:54.958583 done.
1662 13:48:54.963608 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1663 13:48:54.967653 ELOG: NV offset 0x1bf0000 size 0x4000
1664 13:48:54.975391 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1665 13:48:54.981316 ELOG: Event(17) added with size 13 at 2023-08-16 13:48:55 UTC
1666 13:48:54.986853 POST: Unexpected post code in previous boot: 0x72
1667 13:48:54.992840 ELOG: Event(A3) added with size 11 at 2023-08-16 13:48:55 UTC
1668 13:48:54.999359 ELOG: Event(92) added with size 9 at 2023-08-16 13:48:55 UTC
1669 13:48:55.005216 ELOG: Event(93) added with size 9 at 2023-08-16 13:48:55 UTC
1670 13:48:55.011386 ELOG: Event(9A) added with size 9 at 2023-08-16 13:48:55 UTC
1671 13:48:55.018473 ELOG: Event(9E) added with size 10 at 2023-08-16 13:48:55 UTC
1672 13:48:55.024651 ELOG: Event(9F) added with size 14 at 2023-08-16 13:48:55 UTC
1673 13:48:55.030006 BS: BS_DEV_INIT times (us): entry 0 run 469772 exit 72526
1674 13:48:55.036417 ELOG: Event(A1) added with size 10 at 2023-08-16 13:48:55 UTC
1675 13:48:55.044579 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 13:48:55.050469 ELOG: Event(A0) added with size 9 at 2023-08-16 13:48:55 UTC
1677 13:48:55.054544 elog_add_boot_reason: Logged dev mode boot
1678 13:48:55.056934 Finalize devices...
1679 13:48:55.059464 PCI: 00:17.0 final
1680 13:48:55.061235 Devices finalized
1681 13:48:55.066400 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1682 13:48:55.072455 BS: BS_POST_DEVICE times (us): entry 24787 run 5938 exit 5386
1683 13:48:55.077955 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1684 13:48:55.086269 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1685 13:48:55.091390 disable_unused_touchscreen: Disable ACPI0C50
1686 13:48:55.095355 disable_unused_touchscreen: Enable ELAN900C
1687 13:48:55.098196 CBFS @ 1d00000 size 300000
1688 13:48:55.104969 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1689 13:48:55.108394 CBFS: Locating 'fallback/dsdt.aml'
1690 13:48:55.111749 CBFS: Found @ offset 10b200 size 4448
1691 13:48:55.114597 CBFS @ 1d00000 size 300000
1692 13:48:55.120957 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1693 13:48:55.124703 CBFS: Locating 'fallback/slic'
1694 13:48:55.129316 CBFS: 'fallback/slic' not found.
1695 13:48:55.133429 ACPI: Writing ACPI tables at 89c0f000.
1696 13:48:55.134769 ACPI: * FACS
1697 13:48:55.136575 ACPI: * DSDT
1698 13:48:55.140637 Ramoops buffer: 0x100000@0x89b0e000.
1699 13:48:55.145050 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1700 13:48:55.150210 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1701 13:48:55.154055 ACPI: * FADT
1702 13:48:55.155256 SCI is IRQ9
1703 13:48:55.159335 ACPI: added table 1/32, length now 40
1704 13:48:55.160532 ACPI: * SSDT
1705 13:48:55.164052 Found 1 CPU(s) with 8 core(s) each.
1706 13:48:55.168322 Error: Could not locate 'wifi_sar' in VPD.
1707 13:48:55.172517 Error: failed from getting SAR limits!
1708 13:48:55.176558 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1709 13:48:55.180656 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1710 13:48:55.184505 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1711 13:48:55.188372 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1712 13:48:55.193370 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1713 13:48:55.199399 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1714 13:48:55.204300 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1715 13:48:55.208122 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1716 13:48:55.213837 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1717 13:48:55.220041 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1718 13:48:55.225427 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1719 13:48:55.231742 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1720 13:48:55.236766 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1721 13:48:55.240892 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1722 13:48:55.245554 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1723 13:48:55.250535 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1724 13:48:55.255779 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1725 13:48:55.261457 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1726 13:48:55.267636 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1727 13:48:55.273270 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1728 13:48:55.278910 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1729 13:48:55.284099 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1730 13:48:55.287295 ACPI: added table 2/32, length now 44
1731 13:48:55.289522 ACPI: * MCFG
1732 13:48:55.293230 ACPI: added table 3/32, length now 48
1733 13:48:55.294920 ACPI: * TPM2
1734 13:48:55.297232 TPM2 log created at 89afe000
1735 13:48:55.301793 ACPI: added table 4/32, length now 52
1736 13:48:55.303542 ACPI: * MADT
1737 13:48:55.304811 SCI is IRQ9
1738 13:48:55.308401 ACPI: added table 5/32, length now 56
1739 13:48:55.310305 current = 89c14bd0
1740 13:48:55.312317 ACPI: * IGD OpRegion
1741 13:48:55.314567 GMA: Found VBT in CBFS
1742 13:48:55.317589 GMA: Found valid VBT in CBFS
1743 13:48:55.321524 ACPI: added table 6/32, length now 60
1744 13:48:55.323061 ACPI: * HPET
1745 13:48:55.326968 ACPI: added table 7/32, length now 64
1746 13:48:55.329057 ACPI: done.
1747 13:48:55.331183 ACPI tables: 31872 bytes.
1748 13:48:55.334574 smbios_write_tables: 89afd000
1749 13:48:55.335985 recv_ec_data: 0x01
1750 13:48:55.338633 Create SMBIOS type 17
1751 13:48:55.341095 PCI: 00:14.3 (Intel WiFi)
1752 13:48:55.344034 SMBIOS tables: 708 bytes.
1753 13:48:55.347976 Writing table forward entry at 0x00000500
1754 13:48:55.354215 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1755 13:48:55.358316 Writing coreboot table at 0x89c33000
1756 13:48:55.363347 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1757 13:48:55.368187 1. 0000000000001000-000000000009ffff: RAM
1758 13:48:55.372977 2. 00000000000a0000-00000000000fffff: RESERVED
1759 13:48:55.376674 3. 0000000000100000-0000000089afcfff: RAM
1760 13:48:55.383011 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1761 13:48:55.388325 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1762 13:48:55.393412 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1763 13:48:55.398028 7. 000000008a000000-000000008f7fffff: RESERVED
1764 13:48:55.403035 8. 00000000e0000000-00000000efffffff: RESERVED
1765 13:48:55.408370 9. 00000000fc000000-00000000fc000fff: RESERVED
1766 13:48:55.412456 10. 00000000fe000000-00000000fe00ffff: RESERVED
1767 13:48:55.417154 11. 00000000fed10000-00000000fed17fff: RESERVED
1768 13:48:55.422720 12. 00000000fed80000-00000000fed83fff: RESERVED
1769 13:48:55.426600 13. 00000000feda0000-00000000feda1fff: RESERVED
1770 13:48:55.431332 14. 0000000100000000-000000026e7fffff: RAM
1771 13:48:55.435291 Graphics framebuffer located at 0xc0000000
1772 13:48:55.438505 Passing 6 GPIOs to payload:
1773 13:48:55.443360 NAME | PORT | POLARITY | VALUE
1774 13:48:55.449231 write protect | 0x000000dc | high | high
1775 13:48:55.454262 recovery | 0x000000d5 | low | high
1776 13:48:55.459716 lid | undefined | high | high
1777 13:48:55.465175 power | undefined | high | low
1778 13:48:55.469306 oprom | undefined | high | low
1779 13:48:55.475302 EC in RW | undefined | high | low
1780 13:48:55.477539 recv_ec_data: 0x01
1781 13:48:55.478576 SKU ID: 3
1782 13:48:55.481659 CBFS @ 1d00000 size 300000
1783 13:48:55.487735 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1784 13:48:55.494218 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum a38e
1785 13:48:55.496231 coreboot table: 1484 bytes.
1786 13:48:55.499581 IMD ROOT 0. 89fff000 00001000
1787 13:48:55.502950 IMD SMALL 1. 89ffe000 00001000
1788 13:48:55.506194 FSP MEMORY 2. 89d0e000 002f0000
1789 13:48:55.509524 CONSOLE 3. 89cee000 00020000
1790 13:48:55.512875 TIME STAMP 4. 89ced000 00000910
1791 13:48:55.516472 VBOOT WORK 5. 89cea000 00003000
1792 13:48:55.520105 VBOOT 6. 89ce9000 00000c0c
1793 13:48:55.523344 MRC DATA 7. 89ce7000 000018f0
1794 13:48:55.526763 ROMSTG STCK 8. 89ce6000 00000400
1795 13:48:55.529345 AFTER CAR 9. 89cdc000 0000a000
1796 13:48:55.532544 RAMSTAGE 10. 89c80000 0005c000
1797 13:48:55.536537 REFCODE 11. 89c4b000 00035000
1798 13:48:55.539140 SMM BACKUP 12. 89c3b000 00010000
1799 13:48:55.543184 COREBOOT 13. 89c33000 00008000
1800 13:48:55.546552 ACPI 14. 89c0f000 00024000
1801 13:48:55.549057 ACPI GNVS 15. 89c0e000 00001000
1802 13:48:55.552915 RAMOOPS 16. 89b0e000 00100000
1803 13:48:55.556444 TPM2 TCGLOG17. 89afe000 00010000
1804 13:48:55.559196 SMBIOS 18. 89afd000 00000800
1805 13:48:55.561654 IMD small region:
1806 13:48:55.564679 IMD ROOT 0. 89ffec00 00000400
1807 13:48:55.568549 FSP RUNTIME 1. 89ffebe0 00000004
1808 13:48:55.571825 POWER STATE 2. 89ffeba0 00000040
1809 13:48:55.574993 ROMSTAGE 3. 89ffeb80 00000004
1810 13:48:55.578618 MEM INFO 4. 89ffe9c0 000001a9
1811 13:48:55.582235 VPD 5. 89ffe960 00000047
1812 13:48:55.585483 COREBOOTFWD 6. 89ffe920 00000028
1813 13:48:55.589042 MTRR: Physical address space:
1814 13:48:55.595128 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1815 13:48:55.601473 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1816 13:48:55.607293 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1817 13:48:55.613323 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1818 13:48:55.619655 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1819 13:48:55.626602 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1820 13:48:55.632101 0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6
1821 13:48:55.636213 MTRR: Fixed MSR 0x250 0x0606060606060606
1822 13:48:55.640418 MTRR: Fixed MSR 0x258 0x0606060606060606
1823 13:48:55.644572 MTRR: Fixed MSR 0x259 0x0000000000000000
1824 13:48:55.648928 MTRR: Fixed MSR 0x268 0x0606060606060606
1825 13:48:55.652874 MTRR: Fixed MSR 0x269 0x0606060606060606
1826 13:48:55.656827 MTRR: Fixed MSR 0x26a 0x0606060606060606
1827 13:48:55.660731 MTRR: Fixed MSR 0x26b 0x0606060606060606
1828 13:48:55.665490 MTRR: Fixed MSR 0x26c 0x0606060606060606
1829 13:48:55.669410 MTRR: Fixed MSR 0x26d 0x0606060606060606
1830 13:48:55.672762 MTRR: Fixed MSR 0x26e 0x0606060606060606
1831 13:48:55.678126 MTRR: Fixed MSR 0x26f 0x0606060606060606
1832 13:48:55.680560 call enable_fixed_mtrr()
1833 13:48:55.684495 CPU physical address size: 39 bits
1834 13:48:55.688442 MTRR: default type WB/UC MTRR counts: 7/7.
1835 13:48:55.692386 MTRR: UC selected as default type.
1836 13:48:55.698382 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1837 13:48:55.704185 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1838 13:48:55.711064 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1839 13:48:55.716958 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1840 13:48:55.722943 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1841 13:48:55.729667 MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1842 13:48:55.735603 MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6
1843 13:48:55.736319
1844 13:48:55.737628 MTRR check
1845 13:48:55.740477 Fixed MTRRs : Enabled
1846 13:48:55.742546 Variable MTRRs: Enabled
1847 13:48:55.743026
1848 13:48:55.746668 MTRR: Fixed MSR 0x250 0x0606060606060606
1849 13:48:55.750709 MTRR: Fixed MSR 0x258 0x0606060606060606
1850 13:48:55.754771 MTRR: Fixed MSR 0x259 0x0000000000000000
1851 13:48:55.758950 MTRR: Fixed MSR 0x268 0x0606060606060606
1852 13:48:55.763027 MTRR: Fixed MSR 0x269 0x0606060606060606
1853 13:48:55.767177 MTRR: Fixed MSR 0x26a 0x0606060606060606
1854 13:48:55.771553 MTRR: Fixed MSR 0x26b 0x0606060606060606
1855 13:48:55.775444 MTRR: Fixed MSR 0x26c 0x0606060606060606
1856 13:48:55.779113 MTRR: Fixed MSR 0x26d 0x0606060606060606
1857 13:48:55.783280 MTRR: Fixed MSR 0x26e 0x0606060606060606
1858 13:48:55.787724 MTRR: Fixed MSR 0x26f 0x0606060606060606
1859 13:48:55.794710 BS: BS_WRITE_TABLES times (us): entry 17202 run 490402 exit 157175
1860 13:48:55.796794 call enable_fixed_mtrr()
1861 13:48:55.800513 CBFS @ 1d00000 size 300000
1862 13:48:55.803658 CPU physical address size: 39 bits
1863 13:48:55.809687 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1864 13:48:55.814138 MTRR: Fixed MSR 0x250 0x0606060606060606
1865 13:48:55.818210 MTRR: Fixed MSR 0x250 0x0606060606060606
1866 13:48:55.821950 MTRR: Fixed MSR 0x258 0x0606060606060606
1867 13:48:55.826512 MTRR: Fixed MSR 0x259 0x0000000000000000
1868 13:48:55.830303 MTRR: Fixed MSR 0x268 0x0606060606060606
1869 13:48:55.834896 MTRR: Fixed MSR 0x269 0x0606060606060606
1870 13:48:55.838472 MTRR: Fixed MSR 0x26a 0x0606060606060606
1871 13:48:55.843113 MTRR: Fixed MSR 0x26b 0x0606060606060606
1872 13:48:55.846978 MTRR: Fixed MSR 0x26c 0x0606060606060606
1873 13:48:55.850831 MTRR: Fixed MSR 0x26d 0x0606060606060606
1874 13:48:55.855258 MTRR: Fixed MSR 0x26e 0x0606060606060606
1875 13:48:55.858941 MTRR: Fixed MSR 0x26f 0x0606060606060606
1876 13:48:55.863993 MTRR: Fixed MSR 0x258 0x0606060606060606
1877 13:48:55.865835 call enable_fixed_mtrr()
1878 13:48:55.869908 MTRR: Fixed MSR 0x259 0x0000000000000000
1879 13:48:55.873801 MTRR: Fixed MSR 0x268 0x0606060606060606
1880 13:48:55.878335 MTRR: Fixed MSR 0x269 0x0606060606060606
1881 13:48:55.882611 MTRR: Fixed MSR 0x26a 0x0606060606060606
1882 13:48:55.885900 MTRR: Fixed MSR 0x26b 0x0606060606060606
1883 13:48:55.890611 MTRR: Fixed MSR 0x26c 0x0606060606060606
1884 13:48:55.894374 MTRR: Fixed MSR 0x26d 0x0606060606060606
1885 13:48:55.898603 MTRR: Fixed MSR 0x26e 0x0606060606060606
1886 13:48:55.902830 MTRR: Fixed MSR 0x26f 0x0606060606060606
1887 13:48:55.906291 CPU physical address size: 39 bits
1888 13:48:55.909037 call enable_fixed_mtrr()
1889 13:48:55.913984 MTRR: Fixed MSR 0x250 0x0606060606060606
1890 13:48:55.917100 MTRR: Fixed MSR 0x250 0x0606060606060606
1891 13:48:55.921325 MTRR: Fixed MSR 0x258 0x0606060606060606
1892 13:48:55.925685 MTRR: Fixed MSR 0x259 0x0000000000000000
1893 13:48:55.929634 MTRR: Fixed MSR 0x268 0x0606060606060606
1894 13:48:55.934426 MTRR: Fixed MSR 0x269 0x0606060606060606
1895 13:48:55.938341 MTRR: Fixed MSR 0x26a 0x0606060606060606
1896 13:48:55.941912 MTRR: Fixed MSR 0x26b 0x0606060606060606
1897 13:48:55.946392 MTRR: Fixed MSR 0x26c 0x0606060606060606
1898 13:48:55.950409 MTRR: Fixed MSR 0x26d 0x0606060606060606
1899 13:48:55.954510 MTRR: Fixed MSR 0x26e 0x0606060606060606
1900 13:48:55.958476 MTRR: Fixed MSR 0x26f 0x0606060606060606
1901 13:48:55.962353 MTRR: Fixed MSR 0x258 0x0606060606060606
1902 13:48:55.965023 call enable_fixed_mtrr()
1903 13:48:55.968969 MTRR: Fixed MSR 0x259 0x0000000000000000
1904 13:48:55.973454 MTRR: Fixed MSR 0x268 0x0606060606060606
1905 13:48:55.977368 MTRR: Fixed MSR 0x269 0x0606060606060606
1906 13:48:55.981667 MTRR: Fixed MSR 0x26a 0x0606060606060606
1907 13:48:55.985398 MTRR: Fixed MSR 0x26b 0x0606060606060606
1908 13:48:55.989650 MTRR: Fixed MSR 0x26c 0x0606060606060606
1909 13:48:55.994074 MTRR: Fixed MSR 0x26d 0x0606060606060606
1910 13:48:55.997902 MTRR: Fixed MSR 0x26e 0x0606060606060606
1911 13:48:56.002317 MTRR: Fixed MSR 0x26f 0x0606060606060606
1912 13:48:56.006334 CPU physical address size: 39 bits
1913 13:48:56.008588 call enable_fixed_mtrr()
1914 13:48:56.012533 CPU physical address size: 39 bits
1915 13:48:56.015544 CPU physical address size: 39 bits
1916 13:48:56.019546 MTRR: Fixed MSR 0x250 0x0606060606060606
1917 13:48:56.023720 MTRR: Fixed MSR 0x258 0x0606060606060606
1918 13:48:56.028037 MTRR: Fixed MSR 0x259 0x0000000000000000
1919 13:48:56.032109 MTRR: Fixed MSR 0x268 0x0606060606060606
1920 13:48:56.035768 MTRR: Fixed MSR 0x269 0x0606060606060606
1921 13:48:56.039957 MTRR: Fixed MSR 0x26a 0x0606060606060606
1922 13:48:56.043992 MTRR: Fixed MSR 0x26b 0x0606060606060606
1923 13:48:56.048094 MTRR: Fixed MSR 0x26c 0x0606060606060606
1924 13:48:56.052545 MTRR: Fixed MSR 0x26d 0x0606060606060606
1925 13:48:56.056226 MTRR: Fixed MSR 0x26e 0x0606060606060606
1926 13:48:56.061298 MTRR: Fixed MSR 0x26f 0x0606060606060606
1927 13:48:56.064598 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 13:48:56.068860 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 13:48:56.073346 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 13:48:56.076923 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 13:48:56.081554 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 13:48:56.085205 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 13:48:56.089258 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 13:48:56.093018 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 13:48:56.097579 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 13:48:56.101353 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 13:48:56.105434 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 13:48:56.108668 call enable_fixed_mtrr()
1939 13:48:56.111001 call enable_fixed_mtrr()
1940 13:48:56.114588 CBFS: Locating 'fallback/payload'
1941 13:48:56.117754 CPU physical address size: 39 bits
1942 13:48:56.121518 CPU physical address size: 39 bits
1943 13:48:56.125411 CBFS: Found @ offset 1cf4c0 size 3a954
1944 13:48:56.130585 Checking segment from ROM address 0xffecf4f8
1945 13:48:56.134829 Checking segment from ROM address 0xffecf514
1946 13:48:56.139050 Loading segment from ROM address 0xffecf4f8
1947 13:48:56.141609 code (compression=0)
1948 13:48:56.150235 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1949 13:48:56.158356 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1950 13:48:56.160989 it's not compressed!
1951 13:48:56.242082 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1952 13:48:56.248820 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1953 13:48:56.256859 Loading segment from ROM address 0xffecf514
1954 13:48:56.259821 Entry Point 0x30100018
1955 13:48:56.261726 Loaded segments
1956 13:48:56.270770 Finalizing chipset.
1957 13:48:56.272400 Finalizing SMM.
1958 13:48:56.278678 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 466625 exit 11557
1959 13:48:56.282514 mp_park_aps done after 0 msecs.
1960 13:48:56.286376 Jumping to boot code at 30100018(89c33000)
1961 13:48:56.295212 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1962 13:48:56.295334
1963 13:48:56.295423
1964 13:48:56.295795
1965 13:48:56.298884 Starting depthcharge on sarien...
1966 13:48:56.298993
1967 13:48:56.299759 end: 2.2.3 depthcharge-start (duration 00:00:12) [common]
1968 13:48:56.299865 start: 2.2.4 bootloader-commands (timeout 00:04:31) [common]
1969 13:48:56.299950 Setting prompt string to ['sarien:']
1970 13:48:56.300029 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:31)
1971 13:48:56.306117 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1972 13:48:56.307219
1973 13:48:56.314098 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1974 13:48:56.314207
1975 13:48:56.321786 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1976 13:48:56.321904
1977 13:48:56.324246 BIOS MMAP details:
1978 13:48:56.324320
1979 13:48:56.326739 IFD Base Offset : 0x1000000
1980 13:48:56.326848
1981 13:48:56.330178 IFD End Offset : 0x2000000
1982 13:48:56.330262
1983 13:48:56.332879 MMAP Size : 0x1000000
1984 13:48:56.332970
1985 13:48:56.336300 MMAP Start : 0xff000000
1986 13:48:56.336559
1987 13:48:56.342562 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1988 13:48:56.346684
1989 13:48:56.351496 New NVMe Controller 0x3214e110 @ 00:1d:04
1990 13:48:56.351583
1991 13:48:56.355225 New NVMe Controller 0x3214e1d8 @ 00:1d:00
1992 13:48:56.355498
1993 13:48:56.361331 The GBB signature is at 0x30000014 and is: 24 47 42 42
1994 13:48:56.364968
1995 13:48:56.367080 Wipe memory regions:
1996 13:48:56.367350
1997 13:48:56.370412 [0x00000000001000, 0x000000000a0000)
1998 13:48:56.370684
1999 13:48:56.374261 [0x00000000100000, 0x00000030000000)
2000 13:48:56.456811
2001 13:48:56.460182 [0x00000032751910, 0x00000089afd000)
2002 13:48:56.610775
2003 13:48:56.614009 [0x00000100000000, 0x0000026e800000)
2004 13:48:57.624419
2005 13:48:57.626511 R8152: Initializing
2006 13:48:57.626655
2007 13:48:57.629732 Version 6 (ocp_data = 5c30)
2008 13:48:57.630120
2009 13:48:57.632681 R8152: Done initializing
2010 13:48:57.632756
2011 13:48:57.634188 Adding net device
2012 13:48:57.635001
2013 13:48:57.640910 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
2014 13:48:57.641387
2015 13:48:57.641456
2016 13:48:57.641515
2017 13:48:57.642221 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2019 13:48:57.742580 sarien: tftpboot 192.168.201.1 11299501/tftp-deploy-h652b98g/kernel/bzImage 11299501/tftp-deploy-h652b98g/kernel/cmdline 11299501/tftp-deploy-h652b98g/ramdisk/ramdisk.cpio.gz
2020 13:48:57.742756 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2021 13:48:57.742891 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:30)
2022 13:48:57.787464 tftpboot 192.168.201.1 11299501/tftp-deploy-h652b98g/kernel/bzImage 11299501/tftp-deploy-h652b98g/kernel/cmdline 11299501/tftp-deploy-h652b98g/ramdisk/ramdisk.cpio.gz
2023 13:48:57.787561
2024 13:48:57.787807 Waiting for link
2025 13:48:57.945492
2026 13:48:57.946560 done.
2027 13:48:57.946842
2028 13:48:57.948066 MAC: 00:24:32:30:79:bd
2029 13:48:57.948930
2030 13:48:57.951241 Sending DHCP discover... done.
2031 13:48:57.951893
2032 13:48:57.954342 Waiting for reply... done.
2033 13:48:57.954442
2034 13:48:57.957387 Sending DHCP request... done.
2035 13:48:57.957493
2036 13:48:57.961764 Waiting for reply... done.
2037 13:48:57.961843
2038 13:48:57.964092 My ip is 192.168.201.166
2039 13:48:57.964470
2040 13:48:57.967876 The DHCP server ip is 192.168.201.1
2041 13:48:57.968136
2042 13:48:57.972408 TFTP server IP predefined by user: 192.168.201.1
2043 13:48:57.973328
2044 13:48:57.979851 Bootfile predefined by user: 11299501/tftp-deploy-h652b98g/kernel/bzImage
2045 13:48:57.980756
2046 13:48:57.983595 Sending tftp read request... done.
2047 13:48:57.983683
2048 13:48:57.987718 Waiting for the transfer...
2049 13:48:57.987799
2050 13:48:58.542311 00000000 ################################################################
2051 13:48:58.542672
2052 13:48:59.064711 00080000 ################################################################
2053 13:48:59.065593
2054 13:48:59.577317 00100000 ################################################################
2055 13:48:59.577701
2056 13:49:00.089193 00180000 ################################################################
2057 13:49:00.089738
2058 13:49:00.625856 00200000 ################################################################
2059 13:49:00.626194
2060 13:49:01.137902 00280000 ################################################################
2061 13:49:01.138257
2062 13:49:01.654765 00300000 ################################################################
2063 13:49:01.655344
2064 13:49:02.174303 00380000 ################################################################
2065 13:49:02.174898
2066 13:49:02.683751 00400000 ################################################################
2067 13:49:02.683994
2068 13:49:03.201751 00480000 ################################################################
2069 13:49:03.202288
2070 13:49:03.736417 00500000 ################################################################
2071 13:49:03.736782
2072 13:49:04.278383 00580000 ################################################################
2073 13:49:04.279106
2074 13:49:04.822394 00600000 ################################################################
2075 13:49:04.822775
2076 13:49:05.358069 00680000 ################################################################
2077 13:49:05.358412
2078 13:49:05.899705 00700000 ################################################################
2079 13:49:05.900598
2080 13:49:06.436805 00780000 ################################################################
2081 13:49:06.436933
2082 13:49:06.552378 00800000 ############## done.
2083 13:49:06.552781
2084 13:49:06.555907 The bootfile was 8499088 bytes long.
2085 13:49:06.555990
2086 13:49:06.559235 Sending tftp read request... done.
2087 13:49:06.559317
2088 13:49:06.562286 Waiting for the transfer...
2089 13:49:06.562367
2090 13:49:07.098062 00000000 ################################################################
2091 13:49:07.098454
2092 13:49:07.633321 00080000 ################################################################
2093 13:49:07.633450
2094 13:49:08.165554 00100000 ################################################################
2095 13:49:08.165917
2096 13:49:08.703345 00180000 ################################################################
2097 13:49:08.704006
2098 13:49:09.242634 00200000 ################################################################
2099 13:49:09.243366
2100 13:49:09.776635 00280000 ################################################################
2101 13:49:09.776784
2102 13:49:10.306018 00300000 ################################################################
2103 13:49:10.306174
2104 13:49:10.837862 00380000 ################################################################
2105 13:49:10.838277
2106 13:49:11.366940 00400000 ################################################################
2107 13:49:11.367337
2108 13:49:11.897442 00480000 ################################################################
2109 13:49:11.897982
2110 13:49:12.426190 00500000 ################################################################
2111 13:49:12.426880
2112 13:49:12.948015 00580000 ################################################################
2113 13:49:12.948388
2114 13:49:13.478857 00600000 ################################################################
2115 13:49:13.479309
2116 13:49:14.008694 00680000 ################################################################
2117 13:49:14.008873
2118 13:49:14.536744 00700000 ################################################################
2119 13:49:14.537168
2120 13:49:15.066004 00780000 ################################################################
2121 13:49:15.066536
2122 13:49:15.507232 00800000 ###################################################### done.
2123 13:49:15.507610
2124 13:49:15.510303 Sending tftp read request... done.
2125 13:49:15.511066
2126 13:49:15.513788 Waiting for the transfer...
2127 13:49:15.513866
2128 13:49:15.515226 00000000 # done.
2129 13:49:15.515559
2130 13:49:15.524476 Command line loaded dynamically from TFTP file: 11299501/tftp-deploy-h652b98g/kernel/cmdline
2131 13:49:15.524568
2132 13:49:15.544159 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2133 13:49:15.548411
2134 13:49:15.552265 Shutting down all USB controllers.
2135 13:49:15.552347
2136 13:49:15.554351 Removing current net device
2137 13:49:15.556418
2138 13:49:15.558603 EC: exit firmware mode
2139 13:49:15.559536
2140 13:49:15.561500 Finalizing coreboot
2141 13:49:15.562998
2142 13:49:15.568517 Exiting depthcharge with code 4 at timestamp: 26942787
2143 13:49:15.568598
2144 13:49:15.568661
2145 13:49:15.570125 Starting kernel ...
2146 13:49:15.570609 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2147 13:49:15.570744 start: 2.2.5 auto-login-action (timeout 00:04:12) [common]
2148 13:49:15.570826 Setting prompt string to ['Linux version [0-9]']
2149 13:49:15.570896 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2150 13:49:15.570962 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2151 13:49:15.571137
2152 13:49:15.571613
2154 13:53:27.571691 end: 2.2.5 auto-login-action (duration 00:04:12) [common]
2156 13:53:27.572851 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 252 seconds'
2158 13:53:27.573739 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2161 13:53:27.575118 end: 2 depthcharge-action (duration 00:05:00) [common]
2163 13:53:27.576338 Cleaning after the job
2164 13:53:27.577097 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299501/tftp-deploy-h652b98g/ramdisk
2165 13:53:27.583721 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299501/tftp-deploy-h652b98g/kernel
2166 13:53:27.589813 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299501/tftp-deploy-h652b98g/modules
2167 13:53:27.591901 start: 5.1 power-off (timeout 00:00:30) [common]
2168 13:53:27.592706 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-4' '--port=1' '--command=off'
2169 13:53:32.746108 >> Command sent successfully.
2170 13:53:32.752040 Returned 0 in 5 seconds
2171 13:53:32.852947 end: 5.1 power-off (duration 00:00:05) [common]
2173 13:53:32.854538 start: 5.2 read-feedback (timeout 00:09:55) [common]
2174 13:53:32.856099 Listened to connection for namespace 'common' for up to 1s
2175 13:53:33.855824 Finalising connection for namespace 'common'
2176 13:53:33.856456 Disconnecting from shell: Finalise
2177 13:53:33.856860
2178 13:53:33.957940 end: 5.2 read-feedback (duration 00:00:01) [common]
2179 13:53:33.958555 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11299501
2180 13:53:33.977912 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11299501
2181 13:53:33.978040 JobError: Your job cannot terminate cleanly.