Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 13:48:36.936288 lava-dispatcher, installed at version: 2023.06
2 13:48:36.936544 start: 0 validate
3 13:48:36.936700 Start time: 2023-08-16 13:48:36.936691+00:00 (UTC)
4 13:48:36.936863 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:48:36.937028 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 13:48:37.195438 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:48:37.195639 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2312-g74888f4b13f0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:48:37.196841 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:48:37.196972 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:48:37.445606 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:48:37.445781 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2312-g74888f4b13f0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 13:48:37.448382 validate duration: 0.51
14 13:48:37.448631 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:48:37.448737 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:48:37.448832 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:48:37.448974 Not decompressing ramdisk as can be used compressed.
18 13:48:37.449069 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 13:48:37.449139 saving as /var/lib/lava/dispatcher/tmp/11299532/tftp-deploy-493evphv/ramdisk/initrd.cpio.gz
20 13:48:37.449212 total size: 5432690 (5 MB)
21 13:48:37.450296 progress 0 % (0 MB)
22 13:48:37.452447 progress 5 % (0 MB)
23 13:48:37.454299 progress 10 % (0 MB)
24 13:48:37.456175 progress 15 % (0 MB)
25 13:48:37.458201 progress 20 % (1 MB)
26 13:48:37.459983 progress 25 % (1 MB)
27 13:48:37.461742 progress 30 % (1 MB)
28 13:48:37.463673 progress 35 % (1 MB)
29 13:48:37.465411 progress 40 % (2 MB)
30 13:48:37.467067 progress 45 % (2 MB)
31 13:48:37.468738 progress 50 % (2 MB)
32 13:48:37.470573 progress 55 % (2 MB)
33 13:48:37.472230 progress 60 % (3 MB)
34 13:48:37.473873 progress 65 % (3 MB)
35 13:48:37.475741 progress 70 % (3 MB)
36 13:48:37.477323 progress 75 % (3 MB)
37 13:48:37.478896 progress 80 % (4 MB)
38 13:48:37.480475 progress 85 % (4 MB)
39 13:48:37.482210 progress 90 % (4 MB)
40 13:48:37.483804 progress 95 % (4 MB)
41 13:48:37.485381 progress 100 % (5 MB)
42 13:48:37.485617 5 MB downloaded in 0.04 s (142.31 MB/s)
43 13:48:37.485797 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:48:37.486067 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:48:37.486163 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:48:37.486255 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:48:37.486400 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2312-g74888f4b13f0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 13:48:37.486483 saving as /var/lib/lava/dispatcher/tmp/11299532/tftp-deploy-493evphv/kernel/bzImage
50 13:48:37.486551 total size: 8499088 (8 MB)
51 13:48:37.486618 No compression specified
52 13:48:37.487841 progress 0 % (0 MB)
53 13:48:37.490251 progress 5 % (0 MB)
54 13:48:37.492848 progress 10 % (0 MB)
55 13:48:37.495398 progress 15 % (1 MB)
56 13:48:37.497929 progress 20 % (1 MB)
57 13:48:37.500499 progress 25 % (2 MB)
58 13:48:37.503058 progress 30 % (2 MB)
59 13:48:37.505609 progress 35 % (2 MB)
60 13:48:37.508160 progress 40 % (3 MB)
61 13:48:37.510693 progress 45 % (3 MB)
62 13:48:37.513249 progress 50 % (4 MB)
63 13:48:37.515787 progress 55 % (4 MB)
64 13:48:37.518288 progress 60 % (4 MB)
65 13:48:37.521248 progress 65 % (5 MB)
66 13:48:37.525265 progress 70 % (5 MB)
67 13:48:37.529243 progress 75 % (6 MB)
68 13:48:37.533353 progress 80 % (6 MB)
69 13:48:37.537523 progress 85 % (6 MB)
70 13:48:37.541690 progress 90 % (7 MB)
71 13:48:37.545865 progress 95 % (7 MB)
72 13:48:37.550040 progress 100 % (8 MB)
73 13:48:37.550304 8 MB downloaded in 0.06 s (127.15 MB/s)
74 13:48:37.550537 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:48:37.550948 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:48:37.551101 start: 1.3 download-retry (timeout 00:10:00) [common]
78 13:48:37.551242 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 13:48:37.551439 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 13:48:37.551547 saving as /var/lib/lava/dispatcher/tmp/11299532/tftp-deploy-493evphv/nfsrootfs/full.rootfs.tar
81 13:48:37.551657 total size: 133380384 (127 MB)
82 13:48:37.551767 Using unxz to decompress xz
83 13:48:37.557538 progress 0 % (0 MB)
84 13:48:37.950323 progress 5 % (6 MB)
85 13:48:38.352193 progress 10 % (12 MB)
86 13:48:38.680808 progress 15 % (19 MB)
87 13:48:38.894190 progress 20 % (25 MB)
88 13:48:39.175633 progress 25 % (31 MB)
89 13:48:39.562074 progress 30 % (38 MB)
90 13:48:39.946335 progress 35 % (44 MB)
91 13:48:40.394996 progress 40 % (50 MB)
92 13:48:40.831424 progress 45 % (57 MB)
93 13:48:41.249086 progress 50 % (63 MB)
94 13:48:41.683579 progress 55 % (69 MB)
95 13:48:42.091686 progress 60 % (76 MB)
96 13:48:42.499337 progress 65 % (82 MB)
97 13:48:42.908883 progress 70 % (89 MB)
98 13:48:43.318585 progress 75 % (95 MB)
99 13:48:43.817155 progress 80 % (101 MB)
100 13:48:44.311131 progress 85 % (108 MB)
101 13:48:44.610933 progress 90 % (114 MB)
102 13:48:45.001219 progress 95 % (120 MB)
103 13:48:45.441242 progress 100 % (127 MB)
104 13:48:45.447470 127 MB downloaded in 7.90 s (16.11 MB/s)
105 13:48:45.447851 end: 1.3.1 http-download (duration 00:00:08) [common]
107 13:48:45.448309 end: 1.3 download-retry (duration 00:00:08) [common]
108 13:48:45.448457 start: 1.4 download-retry (timeout 00:09:52) [common]
109 13:48:45.448600 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 13:48:45.448843 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2312-g74888f4b13f0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 13:48:45.448965 saving as /var/lib/lava/dispatcher/tmp/11299532/tftp-deploy-493evphv/modules/modules.tar
112 13:48:45.449076 total size: 253616 (0 MB)
113 13:48:45.449192 Using unxz to decompress xz
114 13:48:45.702277 progress 12 % (0 MB)
115 13:48:45.702785 progress 25 % (0 MB)
116 13:48:45.703065 progress 38 % (0 MB)
117 13:48:45.704841 progress 51 % (0 MB)
118 13:48:45.706966 progress 64 % (0 MB)
119 13:48:45.709010 progress 77 % (0 MB)
120 13:48:45.711105 progress 90 % (0 MB)
121 13:48:45.713066 progress 100 % (0 MB)
122 13:48:45.719414 0 MB downloaded in 0.27 s (0.89 MB/s)
123 13:48:45.719685 end: 1.4.1 http-download (duration 00:00:00) [common]
125 13:48:45.719984 end: 1.4 download-retry (duration 00:00:00) [common]
126 13:48:45.720093 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 13:48:45.720201 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 13:48:48.193539 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11299532/extract-nfsrootfs-b3rv1pll
129 13:48:48.193742 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 13:48:48.193859 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
131 13:48:48.194061 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7
132 13:48:48.194211 makedir: /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin
133 13:48:48.194327 makedir: /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/tests
134 13:48:48.194437 makedir: /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/results
135 13:48:48.194554 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-add-keys
136 13:48:48.194717 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-add-sources
137 13:48:48.194863 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-background-process-start
138 13:48:48.195008 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-background-process-stop
139 13:48:48.195151 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-common-functions
140 13:48:48.195447 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-echo-ipv4
141 13:48:48.195593 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-install-packages
142 13:48:48.195734 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-installed-packages
143 13:48:48.195874 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-os-build
144 13:48:48.196015 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-probe-channel
145 13:48:48.196157 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-probe-ip
146 13:48:48.196296 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-target-ip
147 13:48:48.196438 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-target-mac
148 13:48:48.196576 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-target-storage
149 13:48:48.196716 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-test-case
150 13:48:48.196858 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-test-event
151 13:48:48.196996 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-test-feedback
152 13:48:48.197134 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-test-raise
153 13:48:48.197272 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-test-reference
154 13:48:48.197413 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-test-runner
155 13:48:48.197553 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-test-set
156 13:48:48.197702 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-test-shell
157 13:48:48.197848 Updating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-install-packages (oe)
158 13:48:48.198020 Updating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/bin/lava-installed-packages (oe)
159 13:48:48.198158 Creating /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/environment
160 13:48:48.198264 LAVA metadata
161 13:48:48.198342 - LAVA_JOB_ID=11299532
162 13:48:48.198412 - LAVA_DISPATCHER_IP=192.168.201.1
163 13:48:48.198529 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
164 13:48:48.198602 skipped lava-vland-overlay
165 13:48:48.198684 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 13:48:48.198771 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
167 13:48:48.198838 skipped lava-multinode-overlay
168 13:48:48.198917 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 13:48:48.199003 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
170 13:48:48.199101 Loading test definitions
171 13:48:48.199244 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
172 13:48:48.199326 Using /lava-11299532 at stage 0
173 13:48:48.199674 uuid=11299532_1.5.2.3.1 testdef=None
174 13:48:48.199772 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 13:48:48.199865 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
176 13:48:48.200431 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 13:48:48.200683 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
179 13:48:48.201427 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 13:48:48.201679 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
182 13:48:48.202402 runner path: /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/0/tests/0_dmesg test_uuid 11299532_1.5.2.3.1
183 13:48:48.202577 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 13:48:48.202826 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
186 13:48:48.202906 Using /lava-11299532 at stage 1
187 13:48:48.203376 uuid=11299532_1.5.2.3.5 testdef=None
188 13:48:48.203477 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 13:48:48.203570 start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
190 13:48:48.204113 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 13:48:48.204360 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
193 13:48:48.205098 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 13:48:48.205353 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
196 13:48:48.206082 runner path: /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/1/tests/1_bootrr test_uuid 11299532_1.5.2.3.5
197 13:48:48.206253 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 13:48:48.206479 Creating lava-test-runner.conf files
200 13:48:48.206549 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/0 for stage 0
201 13:48:48.206649 - 0_dmesg
202 13:48:48.206737 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299532/lava-overlay-l32makn7/lava-11299532/1 for stage 1
203 13:48:48.206838 - 1_bootrr
204 13:48:48.206942 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 13:48:48.207040 start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
206 13:48:48.215377 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 13:48:48.215494 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
208 13:48:48.215590 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 13:48:48.215686 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 13:48:48.215780 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
211 13:48:48.368780 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 13:48:48.369210 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
213 13:48:48.369375 extracting modules file /var/lib/lava/dispatcher/tmp/11299532/tftp-deploy-493evphv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299532/extract-nfsrootfs-b3rv1pll
214 13:48:48.385959 extracting modules file /var/lib/lava/dispatcher/tmp/11299532/tftp-deploy-493evphv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299532/extract-overlay-ramdisk-8qo735py/ramdisk
215 13:48:48.402045 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 13:48:48.402207 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
217 13:48:48.402311 [common] Applying overlay to NFS
218 13:48:48.402391 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299532/compress-overlay-bw36a5do/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11299532/extract-nfsrootfs-b3rv1pll
219 13:48:48.411549 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 13:48:48.411680 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
221 13:48:48.411779 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 13:48:48.411872 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
223 13:48:48.411958 Building ramdisk /var/lib/lava/dispatcher/tmp/11299532/extract-overlay-ramdisk-8qo735py/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11299532/extract-overlay-ramdisk-8qo735py/ramdisk
224 13:48:48.498535 >> 26197 blocks
225 13:48:49.095905 rename /var/lib/lava/dispatcher/tmp/11299532/extract-overlay-ramdisk-8qo735py/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11299532/tftp-deploy-493evphv/ramdisk/ramdisk.cpio.gz
226 13:48:49.096384 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 13:48:49.096530 start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
228 13:48:49.096648 start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
229 13:48:49.096757 No mkimage arch provided, not using FIT.
230 13:48:49.096858 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 13:48:49.096954 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 13:48:49.097071 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 13:48:49.097179 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:48) [common]
234 13:48:49.097277 No LXC device requested
235 13:48:49.097370 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 13:48:49.097465 start: 1.7 deploy-device-env (timeout 00:09:48) [common]
237 13:48:49.097552 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 13:48:49.097637 Checking files for TFTP limit of 4294967296 bytes.
239 13:48:49.098089 end: 1 tftp-deploy (duration 00:00:12) [common]
240 13:48:49.098205 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 13:48:49.098305 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 13:48:49.098444 substitutions:
243 13:48:49.098519 - {DTB}: None
244 13:48:49.098587 - {INITRD}: 11299532/tftp-deploy-493evphv/ramdisk/ramdisk.cpio.gz
245 13:48:49.098654 - {KERNEL}: 11299532/tftp-deploy-493evphv/kernel/bzImage
246 13:48:49.098719 - {LAVA_MAC}: None
247 13:48:49.098781 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11299532/extract-nfsrootfs-b3rv1pll
248 13:48:49.098874 - {NFS_SERVER_IP}: 192.168.201.1
249 13:48:49.098940 - {PRESEED_CONFIG}: None
250 13:48:49.099003 - {PRESEED_LOCAL}: None
251 13:48:49.099064 - {RAMDISK}: 11299532/tftp-deploy-493evphv/ramdisk/ramdisk.cpio.gz
252 13:48:49.099126 - {ROOT_PART}: None
253 13:48:49.099187 - {ROOT}: None
254 13:48:49.099259 - {SERVER_IP}: 192.168.201.1
255 13:48:49.099323 - {TEE}: None
256 13:48:49.099385 Parsed boot commands:
257 13:48:49.099444 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 13:48:49.099645 Parsed boot commands: tftpboot 192.168.201.1 11299532/tftp-deploy-493evphv/kernel/bzImage 11299532/tftp-deploy-493evphv/kernel/cmdline 11299532/tftp-deploy-493evphv/ramdisk/ramdisk.cpio.gz
259 13:48:49.099748 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 13:48:49.099842 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 13:48:49.099949 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 13:48:49.100047 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 13:48:49.100123 Not connected, no need to disconnect.
264 13:48:49.100207 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 13:48:49.100305 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 13:48:49.100382 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
267 13:48:49.104848 Setting prompt string to ['lava-test: # ']
268 13:48:49.105296 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 13:48:49.105423 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 13:48:49.105531 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 13:48:49.105636 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 13:48:49.105896 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
273 13:48:54.242306 >> Command sent successfully.
274 13:48:54.245017 Returned 0 in 5 seconds
275 13:48:54.345433 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 13:48:54.345803 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 13:48:54.345912 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 13:48:54.346037 Setting prompt string to 'Starting depthcharge on Helios...'
280 13:48:54.346116 Changing prompt to 'Starting depthcharge on Helios...'
281 13:48:54.346192 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 13:48:54.346492 [Enter `^Ec?' for help]
283 13:48:54.966890
284 13:48:54.967053
285 13:48:54.976847 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 13:48:54.980081 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 13:48:54.987332 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 13:48:54.990383 CPU: AES supported, TXT NOT supported, VT supported
289 13:48:54.996874 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 13:48:55.000382 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 13:48:55.007081 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 13:48:55.010322 VBOOT: Loading verstage.
293 13:48:55.013706 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 13:48:55.020333 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 13:48:55.023568 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 13:48:55.026739 CBFS @ c08000 size 3f8000
297 13:48:55.033688 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 13:48:55.036823 CBFS: Locating 'fallback/verstage'
299 13:48:55.040124 CBFS: Found @ offset 10fb80 size 1072c
300 13:48:55.043771
301 13:48:55.043863
302 13:48:55.053562 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 13:48:55.067799 Probing TPM: . done!
304 13:48:55.071776 TPM ready after 0 ms
305 13:48:55.074460 Connected to device vid:did:rid of 1ae0:0028:00
306 13:48:55.085127 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
307 13:48:55.123425 Initialized TPM device CR50 revision 0
308 13:48:55.132686 tlcl_send_startup: Startup return code is 0
309 13:48:55.132791 TPM: setup succeeded
310 13:48:55.145426 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 13:48:55.149355 Chrome EC: UHEPI supported
312 13:48:55.152740 Phase 1
313 13:48:55.155953 FMAP: area GBB found @ c05000 (12288 bytes)
314 13:48:55.162681 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 13:48:55.162776 Phase 2
316 13:48:55.166040 Phase 3
317 13:48:55.169138 FMAP: area GBB found @ c05000 (12288 bytes)
318 13:48:55.176039 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 13:48:55.182634 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
320 13:48:55.185811 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
321 13:48:55.192201 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 13:48:55.208142 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
323 13:48:55.211497 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
324 13:48:55.217872 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 13:48:55.222206 Phase 4
326 13:48:55.225458 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
327 13:48:55.231942 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 13:48:55.411638 VB2:vb2_rsa_verify_digest() Digest check failed!
329 13:48:55.418050 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 13:48:55.418153 Saving nvdata
331 13:48:55.421807 Reboot requested (10020007)
332 13:48:55.424966 board_reset() called!
333 13:48:55.425061 full_reset() called!
334 13:48:59.934200
335 13:48:59.934347
336 13:48:59.944197 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
337 13:48:59.947266 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
338 13:48:59.953995 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
339 13:48:59.957537 CPU: AES supported, TXT NOT supported, VT supported
340 13:48:59.964254 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
341 13:48:59.967268 PCH: device id 0284 (rev 00) is Cometlake-U Premium
342 13:48:59.974025 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
343 13:48:59.977217 VBOOT: Loading verstage.
344 13:48:59.980895 FMAP: Found "FLASH" version 1.1 at 0xc04000.
345 13:48:59.987426 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
346 13:48:59.990452 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
347 13:48:59.993665 CBFS @ c08000 size 3f8000
348 13:49:00.000576 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
349 13:49:00.003831 CBFS: Locating 'fallback/verstage'
350 13:49:00.007336 CBFS: Found @ offset 10fb80 size 1072c
351 13:49:00.010966
352 13:49:00.011051
353 13:49:00.020789 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
354 13:49:00.034836 Probing TPM: . done!
355 13:49:00.038130 TPM ready after 0 ms
356 13:49:00.041798 Connected to device vid:did:rid of 1ae0:0028:00
357 13:49:00.051681 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
358 13:49:00.055223 Initialized TPM device CR50 revision 0
359 13:49:00.098894 tlcl_send_startup: Startup return code is 0
360 13:49:00.098997 TPM: setup succeeded
361 13:49:00.111172 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
362 13:49:00.115357 Chrome EC: UHEPI supported
363 13:49:00.118543 Phase 1
364 13:49:00.121755 FMAP: area GBB found @ c05000 (12288 bytes)
365 13:49:00.128616 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
366 13:49:00.135113 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
367 13:49:00.138727 Recovery requested (1009000e)
368 13:49:00.144162 Saving nvdata
369 13:49:00.150412 tlcl_extend: response is 0
370 13:49:00.159410 tlcl_extend: response is 0
371 13:49:00.166176 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 13:49:00.169209 CBFS @ c08000 size 3f8000
373 13:49:00.176417 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 13:49:00.179265 CBFS: Locating 'fallback/romstage'
375 13:49:00.183007 CBFS: Found @ offset 80 size 145fc
376 13:49:00.186159 Accumulated console time in verstage 98 ms
377 13:49:00.186252
378 13:49:00.186325
379 13:49:00.199121 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
380 13:49:00.205605 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
381 13:49:00.209037 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 13:49:00.212924 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 13:49:00.219446 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
384 13:49:00.222205 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 13:49:00.225747 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
386 13:49:00.229178 TCO_STS: 0000 0000
387 13:49:00.232290 GEN_PMCON: e0015238 00000200
388 13:49:00.235936 GBLRST_CAUSE: 00000000 00000000
389 13:49:00.236064 prev_sleep_state 5
390 13:49:00.238830 Boot Count incremented to 63125
391 13:49:00.245944 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 13:49:00.249224 CBFS @ c08000 size 3f8000
393 13:49:00.255463 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 13:49:00.255556 CBFS: Locating 'fspm.bin'
395 13:49:00.262216 CBFS: Found @ offset 5ffc0 size 71000
396 13:49:00.265448 Chrome EC: UHEPI supported
397 13:49:00.272016 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
398 13:49:00.275790 Probing TPM: done!
399 13:49:00.282636 Connected to device vid:did:rid of 1ae0:0028:00
400 13:49:00.292643 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
401 13:49:00.298335 Initialized TPM device CR50 revision 0
402 13:49:00.307543 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
403 13:49:00.314149 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
404 13:49:00.317320 MRC cache found, size 1948
405 13:49:00.320480 bootmode is set to: 2
406 13:49:00.323750 PRMRR disabled by config.
407 13:49:00.323834 SPD INDEX = 1
408 13:49:00.330466 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
409 13:49:00.333825 CBFS @ c08000 size 3f8000
410 13:49:00.340799 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
411 13:49:00.340888 CBFS: Locating 'spd.bin'
412 13:49:00.344268 CBFS: Found @ offset 5fb80 size 400
413 13:49:00.347216 SPD: module type is LPDDR3
414 13:49:00.350548 SPD: module part is
415 13:49:00.357439 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
416 13:49:00.360587 SPD: device width 4 bits, bus width 8 bits
417 13:49:00.363796 SPD: module size is 4096 MB (per channel)
418 13:49:00.367169 memory slot: 0 configuration done.
419 13:49:00.370368 memory slot: 2 configuration done.
420 13:49:00.421421 CBMEM:
421 13:49:00.424809 IMD: root @ 99fff000 254 entries.
422 13:49:00.428002 IMD: root @ 99ffec00 62 entries.
423 13:49:00.431207 External stage cache:
424 13:49:00.434603 IMD: root @ 9abff000 254 entries.
425 13:49:00.438059 IMD: root @ 9abfec00 62 entries.
426 13:49:00.441581 Chrome EC: clear events_b mask to 0x0000000020004000
427 13:49:00.457600 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 13:49:00.471221 tlcl_write: response is 0
429 13:49:00.480586 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
430 13:49:00.486752 MRC: TPM MRC hash updated successfully.
431 13:49:00.487441 2 DIMMs found
432 13:49:00.489944 SMM Memory Map
433 13:49:00.493407 SMRAM : 0x9a000000 0x1000000
434 13:49:00.496679 Subregion 0: 0x9a000000 0xa00000
435 13:49:00.499914 Subregion 1: 0x9aa00000 0x200000
436 13:49:00.503358 Subregion 2: 0x9ac00000 0x400000
437 13:49:00.506640 top_of_ram = 0x9a000000
438 13:49:00.509962 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
439 13:49:00.516754 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
440 13:49:00.519657 MTRR Range: Start=ff000000 End=0 (Size 1000000)
441 13:49:00.526358 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 13:49:00.529485 CBFS @ c08000 size 3f8000
443 13:49:00.532697 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 13:49:00.535834 CBFS: Locating 'fallback/postcar'
445 13:49:00.542759 CBFS: Found @ offset 107000 size 4b44
446 13:49:00.545919 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
447 13:49:00.558808 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
448 13:49:00.561973 Processing 180 relocs. Offset value of 0x97c0c000
449 13:49:00.570410 Accumulated console time in romstage 286 ms
450 13:49:00.570502
451 13:49:00.570574
452 13:49:00.580033 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
453 13:49:00.586785 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 13:49:00.590403 CBFS @ c08000 size 3f8000
455 13:49:00.593545 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 13:49:00.596986 CBFS: Locating 'fallback/ramstage'
457 13:49:00.603821 CBFS: Found @ offset 43380 size 1b9e8
458 13:49:00.610418 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 13:49:00.641731 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 13:49:00.645433 Processing 3976 relocs. Offset value of 0x98db0000
461 13:49:00.652205 Accumulated console time in postcar 52 ms
462 13:49:00.652297
463 13:49:00.652369
464 13:49:00.662173 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 13:49:00.665385 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 13:49:00.672104 WARNING: RO_VPD is uninitialized or empty.
467 13:49:00.675697 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 13:49:00.682309 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 13:49:00.682401 Normal boot.
470 13:49:00.688824 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 13:49:00.692251 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 13:49:00.695567 CBFS @ c08000 size 3f8000
473 13:49:00.701876 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 13:49:00.705391 CBFS: Locating 'cpu_microcode_blob.bin'
475 13:49:00.708730 CBFS: Found @ offset 14700 size 2ec00
476 13:49:00.711827 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 13:49:00.715512 Skip microcode update
478 13:49:00.718631 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 13:49:00.721803 CBFS @ c08000 size 3f8000
480 13:49:00.728626 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 13:49:00.731838 CBFS: Locating 'fsps.bin'
482 13:49:00.734999 CBFS: Found @ offset d1fc0 size 35000
483 13:49:00.760004 Detected 4 core, 8 thread CPU.
484 13:49:00.763686 Setting up SMI for CPU
485 13:49:00.767017 IED base = 0x9ac00000
486 13:49:00.767211 IED size = 0x00400000
487 13:49:00.769961 Will perform SMM setup.
488 13:49:00.777109 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 13:49:00.783685 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 13:49:00.787079 Processing 16 relocs. Offset value of 0x00030000
491 13:49:00.790530 Attempting to start 7 APs
492 13:49:00.793923 Waiting for 10ms after sending INIT.
493 13:49:00.810002 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
494 13:49:00.810485 done.
495 13:49:00.813832 AP: slot 2 apic_id 7.
496 13:49:00.816949 AP: slot 3 apic_id 6.
497 13:49:00.817538 AP: slot 7 apic_id 4.
498 13:49:00.820211 AP: slot 6 apic_id 5.
499 13:49:00.823351 Waiting for 2nd SIPI to complete...done.
500 13:49:00.826826 AP: slot 5 apic_id 3.
501 13:49:00.829803 AP: slot 4 apic_id 2.
502 13:49:00.836881 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 13:49:00.840150 Processing 13 relocs. Offset value of 0x00038000
504 13:49:00.846999 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
505 13:49:00.849846 Installing SMM handler to 0x9a000000
506 13:49:00.859834 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
507 13:49:00.863630 Processing 658 relocs. Offset value of 0x9a010000
508 13:49:00.873360 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
509 13:49:00.876539 Processing 13 relocs. Offset value of 0x9a008000
510 13:49:00.883215 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
511 13:49:00.889725 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
512 13:49:00.893495 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
513 13:49:00.899808 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
514 13:49:00.906285 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
515 13:49:00.913210 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
516 13:49:00.916108 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
517 13:49:00.922681 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
518 13:49:00.925965 Clearing SMI status registers
519 13:49:00.929633 SMI_STS: PM1
520 13:49:00.929736 PM1_STS: PWRBTN
521 13:49:00.932869 TCO_STS: SECOND_TO
522 13:49:00.936257 New SMBASE 0x9a000000
523 13:49:00.936368 In relocation handler: CPU 0
524 13:49:00.942682 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 13:49:00.946446 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 13:49:00.949665 Relocation complete.
527 13:49:00.949815 New SMBASE 0x99fffc00
528 13:49:00.952987 In relocation handler: CPU 1
529 13:49:00.959802 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
530 13:49:00.963061 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 13:49:00.966468 Relocation complete.
532 13:49:00.966670 New SMBASE 0x99fff400
533 13:49:00.969517 In relocation handler: CPU 3
534 13:49:00.976136 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
535 13:49:00.979382 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 13:49:00.982871 Relocation complete.
537 13:49:00.983077 New SMBASE 0x99fff800
538 13:49:00.986036 In relocation handler: CPU 2
539 13:49:00.989649 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
540 13:49:00.996386 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 13:49:00.999597 Relocation complete.
542 13:49:00.999959 New SMBASE 0x99ffe800
543 13:49:01.003278 In relocation handler: CPU 6
544 13:49:01.006303 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
545 13:49:01.012980 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 13:49:01.013408 Relocation complete.
547 13:49:01.016577 New SMBASE 0x99ffe400
548 13:49:01.019935 In relocation handler: CPU 7
549 13:49:01.023473 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
550 13:49:01.029477 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 13:49:01.029904 Relocation complete.
552 13:49:01.033292 New SMBASE 0x99fff000
553 13:49:01.036677 In relocation handler: CPU 4
554 13:49:01.039769 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
555 13:49:01.046558 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 13:49:01.047141 Relocation complete.
557 13:49:01.049575 New SMBASE 0x99ffec00
558 13:49:01.053287 In relocation handler: CPU 5
559 13:49:01.056556 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
560 13:49:01.063300 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 13:49:01.063807 Relocation complete.
562 13:49:01.066468 Initializing CPU #0
563 13:49:01.069676 CPU: vendor Intel device 806ec
564 13:49:01.072845 CPU: family 06, model 8e, stepping 0c
565 13:49:01.076357 Clearing out pending MCEs
566 13:49:01.079383 Setting up local APIC...
567 13:49:01.079902 apic_id: 0x00 done.
568 13:49:01.082870 Turbo is available but hidden
569 13:49:01.086065 Turbo is available and visible
570 13:49:01.089221 VMX status: enabled
571 13:49:01.092777 IA32_FEATURE_CONTROL status: locked
572 13:49:01.093239 Skip microcode update
573 13:49:01.095972 CPU #0 initialized
574 13:49:01.099184 Initializing CPU #1
575 13:49:01.099739 Initializing CPU #6
576 13:49:01.102592 Initializing CPU #7
577 13:49:01.105795 CPU: vendor Intel device 806ec
578 13:49:01.109412 CPU: family 06, model 8e, stepping 0c
579 13:49:01.112565 Initializing CPU #4
580 13:49:01.112995 Initializing CPU #5
581 13:49:01.116069 CPU: vendor Intel device 806ec
582 13:49:01.119165 CPU: family 06, model 8e, stepping 0c
583 13:49:01.122644 CPU: vendor Intel device 806ec
584 13:49:01.125630 CPU: family 06, model 8e, stepping 0c
585 13:49:01.128718 Clearing out pending MCEs
586 13:49:01.132260 Clearing out pending MCEs
587 13:49:01.135700 Setting up local APIC...
588 13:49:01.139068 Clearing out pending MCEs
589 13:49:01.139159 CPU: vendor Intel device 806ec
590 13:49:01.145781 CPU: family 06, model 8e, stepping 0c
591 13:49:01.145875 Setting up local APIC...
592 13:49:01.148805 Initializing CPU #2
593 13:49:01.152337 Initializing CPU #3
594 13:49:01.152446 CPU: vendor Intel device 806ec
595 13:49:01.159253 CPU: family 06, model 8e, stepping 0c
596 13:49:01.162222 CPU: vendor Intel device 806ec
597 13:49:01.165488 CPU: family 06, model 8e, stepping 0c
598 13:49:01.165586 Clearing out pending MCEs
599 13:49:01.169369 Clearing out pending MCEs
600 13:49:01.172146 Setting up local APIC...
601 13:49:01.175481 Setting up local APIC...
602 13:49:01.175569 apic_id: 0x07 done.
603 13:49:01.178875 CPU: vendor Intel device 806ec
604 13:49:01.185397 CPU: family 06, model 8e, stepping 0c
605 13:49:01.185491 Clearing out pending MCEs
606 13:49:01.188799 Setting up local APIC...
607 13:49:01.192075 apic_id: 0x03 done.
608 13:49:01.192163 apic_id: 0x02 done.
609 13:49:01.195288 VMX status: enabled
610 13:49:01.199100 VMX status: enabled
611 13:49:01.202455 IA32_FEATURE_CONTROL status: locked
612 13:49:01.205793 IA32_FEATURE_CONTROL status: locked
613 13:49:01.205882 Skip microcode update
614 13:49:01.209258 Skip microcode update
615 13:49:01.212325 CPU #5 initialized
616 13:49:01.212410 CPU #4 initialized
617 13:49:01.215838 VMX status: enabled
618 13:49:01.219018 apic_id: 0x06 done.
619 13:49:01.222441 IA32_FEATURE_CONTROL status: locked
620 13:49:01.222532 VMX status: enabled
621 13:49:01.225711 Skip microcode update
622 13:49:01.228925 IA32_FEATURE_CONTROL status: locked
623 13:49:01.232034 CPU #2 initialized
624 13:49:01.232119 Skip microcode update
625 13:49:01.235974 Setting up local APIC...
626 13:49:01.238893 Clearing out pending MCEs
627 13:49:01.238978 apic_id: 0x05 done.
628 13:49:01.242068 Setting up local APIC...
629 13:49:01.245292 apic_id: 0x01 done.
630 13:49:01.245378 CPU #3 initialized
631 13:49:01.248710 VMX status: enabled
632 13:49:01.252060 VMX status: enabled
633 13:49:01.252146 apic_id: 0x04 done.
634 13:49:01.255377 IA32_FEATURE_CONTROL status: locked
635 13:49:01.258584 VMX status: enabled
636 13:49:01.262038 Skip microcode update
637 13:49:01.265566 IA32_FEATURE_CONTROL status: locked
638 13:49:01.265688 CPU #6 initialized
639 13:49:01.268834 Skip microcode update
640 13:49:01.272243 IA32_FEATURE_CONTROL status: locked
641 13:49:01.275303 CPU #7 initialized
642 13:49:01.275431 Skip microcode update
643 13:49:01.278849 CPU #1 initialized
644 13:49:01.282118 bsp_do_flight_plan done after 457 msecs.
645 13:49:01.285302 CPU: frequency set to 4200 MHz
646 13:49:01.288507 Enabling SMIs.
647 13:49:01.288601 Locking SMM.
648 13:49:01.303724 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 13:49:01.306925 CBFS @ c08000 size 3f8000
650 13:49:01.313956 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 13:49:01.314051 CBFS: Locating 'vbt.bin'
652 13:49:01.317360 CBFS: Found @ offset 5f5c0 size 499
653 13:49:01.323732 Found a VBT of 4608 bytes after decompression
654 13:49:01.506247 Display FSP Version Info HOB
655 13:49:01.509545 Reference Code - CPU = 9.0.1e.30
656 13:49:01.512773 uCode Version = 0.0.0.ca
657 13:49:01.516267 TXT ACM version = ff.ff.ff.ffff
658 13:49:01.519622 Display FSP Version Info HOB
659 13:49:01.522668 Reference Code - ME = 9.0.1e.30
660 13:49:01.526488 MEBx version = 0.0.0.0
661 13:49:01.529564 ME Firmware Version = Consumer SKU
662 13:49:01.533029 Display FSP Version Info HOB
663 13:49:01.536200 Reference Code - CML PCH = 9.0.1e.30
664 13:49:01.539333 PCH-CRID Status = Disabled
665 13:49:01.543046 PCH-CRID Original Value = ff.ff.ff.ffff
666 13:49:01.546162 PCH-CRID New Value = ff.ff.ff.ffff
667 13:49:01.549391 OPROM - RST - RAID = ff.ff.ff.ffff
668 13:49:01.553121 ChipsetInit Base Version = ff.ff.ff.ffff
669 13:49:01.556304 ChipsetInit Oem Version = ff.ff.ff.ffff
670 13:49:01.559419 Display FSP Version Info HOB
671 13:49:01.566148 Reference Code - SA - System Agent = 9.0.1e.30
672 13:49:01.569512 Reference Code - MRC = 0.7.1.6c
673 13:49:01.569934 SA - PCIe Version = 9.0.1e.30
674 13:49:01.572560 SA-CRID Status = Disabled
675 13:49:01.576144 SA-CRID Original Value = 0.0.0.c
676 13:49:01.579442 SA-CRID New Value = 0.0.0.c
677 13:49:01.582712 OPROM - VBIOS = ff.ff.ff.ffff
678 13:49:01.585892 RTC Init
679 13:49:01.589062 Set power on after power failure.
680 13:49:01.589497 Disabling Deep S3
681 13:49:01.592453 Disabling Deep S3
682 13:49:01.592891 Disabling Deep S4
683 13:49:01.596107 Disabling Deep S4
684 13:49:01.596580 Disabling Deep S5
685 13:49:01.599415 Disabling Deep S5
686 13:49:01.605847 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
687 13:49:01.606286 Enumerating buses...
688 13:49:01.612848 Show all devs... Before device enumeration.
689 13:49:01.613282 Root Device: enabled 1
690 13:49:01.616008 CPU_CLUSTER: 0: enabled 1
691 13:49:01.619044 DOMAIN: 0000: enabled 1
692 13:49:01.622536 APIC: 00: enabled 1
693 13:49:01.622987 PCI: 00:00.0: enabled 1
694 13:49:01.625795 PCI: 00:02.0: enabled 1
695 13:49:01.629213 PCI: 00:04.0: enabled 0
696 13:49:01.629637 PCI: 00:05.0: enabled 0
697 13:49:01.632727 PCI: 00:12.0: enabled 1
698 13:49:01.635865 PCI: 00:12.5: enabled 0
699 13:49:01.638905 PCI: 00:12.6: enabled 0
700 13:49:01.639490 PCI: 00:14.0: enabled 1
701 13:49:01.642483 PCI: 00:14.1: enabled 0
702 13:49:01.645613 PCI: 00:14.3: enabled 1
703 13:49:01.649124 PCI: 00:14.5: enabled 0
704 13:49:01.649679 PCI: 00:15.0: enabled 1
705 13:49:01.652612 PCI: 00:15.1: enabled 1
706 13:49:01.655871 PCI: 00:15.2: enabled 0
707 13:49:01.659379 PCI: 00:15.3: enabled 0
708 13:49:01.659799 PCI: 00:16.0: enabled 1
709 13:49:01.662466 PCI: 00:16.1: enabled 0
710 13:49:01.665564 PCI: 00:16.2: enabled 0
711 13:49:01.665930 PCI: 00:16.3: enabled 0
712 13:49:01.668962 PCI: 00:16.4: enabled 0
713 13:49:01.672484 PCI: 00:16.5: enabled 0
714 13:49:01.675587 PCI: 00:17.0: enabled 1
715 13:49:01.675849 PCI: 00:19.0: enabled 1
716 13:49:01.678764 PCI: 00:19.1: enabled 0
717 13:49:01.682064 PCI: 00:19.2: enabled 0
718 13:49:01.685355 PCI: 00:1a.0: enabled 0
719 13:49:01.685582 PCI: 00:1c.0: enabled 0
720 13:49:01.688664 PCI: 00:1c.1: enabled 0
721 13:49:01.692416 PCI: 00:1c.2: enabled 0
722 13:49:01.692642 PCI: 00:1c.3: enabled 0
723 13:49:01.695463 PCI: 00:1c.4: enabled 0
724 13:49:01.698555 PCI: 00:1c.5: enabled 0
725 13:49:01.701938 PCI: 00:1c.6: enabled 0
726 13:49:01.702030 PCI: 00:1c.7: enabled 0
727 13:49:01.705254 PCI: 00:1d.0: enabled 1
728 13:49:01.708440 PCI: 00:1d.1: enabled 0
729 13:49:01.712018 PCI: 00:1d.2: enabled 0
730 13:49:01.712109 PCI: 00:1d.3: enabled 0
731 13:49:01.715221 PCI: 00:1d.4: enabled 0
732 13:49:01.718634 PCI: 00:1d.5: enabled 1
733 13:49:01.721829 PCI: 00:1e.0: enabled 1
734 13:49:01.721922 PCI: 00:1e.1: enabled 0
735 13:49:01.725600 PCI: 00:1e.2: enabled 1
736 13:49:01.728851 PCI: 00:1e.3: enabled 1
737 13:49:01.728977 PCI: 00:1f.0: enabled 1
738 13:49:01.732246 PCI: 00:1f.1: enabled 1
739 13:49:01.735351 PCI: 00:1f.2: enabled 1
740 13:49:01.738490 PCI: 00:1f.3: enabled 1
741 13:49:01.738624 PCI: 00:1f.4: enabled 1
742 13:49:01.741745 PCI: 00:1f.5: enabled 1
743 13:49:01.745231 PCI: 00:1f.6: enabled 0
744 13:49:01.748429 USB0 port 0: enabled 1
745 13:49:01.748523 I2C: 00:15: enabled 1
746 13:49:01.751752 I2C: 00:5d: enabled 1
747 13:49:01.755214 GENERIC: 0.0: enabled 1
748 13:49:01.755318 I2C: 00:1a: enabled 1
749 13:49:01.758317 I2C: 00:38: enabled 1
750 13:49:01.762053 I2C: 00:39: enabled 1
751 13:49:01.762148 I2C: 00:3a: enabled 1
752 13:49:01.765211 I2C: 00:3b: enabled 1
753 13:49:01.768406 PCI: 00:00.0: enabled 1
754 13:49:01.768518 SPI: 00: enabled 1
755 13:49:01.772083 SPI: 01: enabled 1
756 13:49:01.775345 PNP: 0c09.0: enabled 1
757 13:49:01.775466 USB2 port 0: enabled 1
758 13:49:01.778660 USB2 port 1: enabled 1
759 13:49:01.781868 USB2 port 2: enabled 0
760 13:49:01.781953 USB2 port 3: enabled 0
761 13:49:01.785094 USB2 port 5: enabled 0
762 13:49:01.788326 USB2 port 6: enabled 1
763 13:49:01.791671 USB2 port 9: enabled 1
764 13:49:01.791764 USB3 port 0: enabled 1
765 13:49:01.794921 USB3 port 1: enabled 1
766 13:49:01.798094 USB3 port 2: enabled 1
767 13:49:01.798186 USB3 port 3: enabled 1
768 13:49:01.801704 USB3 port 4: enabled 0
769 13:49:01.804980 APIC: 01: enabled 1
770 13:49:01.805072 APIC: 07: enabled 1
771 13:49:01.808397 APIC: 06: enabled 1
772 13:49:01.811732 APIC: 02: enabled 1
773 13:49:01.811836 APIC: 03: enabled 1
774 13:49:01.814736 APIC: 05: enabled 1
775 13:49:01.814832 APIC: 04: enabled 1
776 13:49:01.818068 Compare with tree...
777 13:49:01.821615 Root Device: enabled 1
778 13:49:01.824976 CPU_CLUSTER: 0: enabled 1
779 13:49:01.825070 APIC: 00: enabled 1
780 13:49:01.828341 APIC: 01: enabled 1
781 13:49:01.831616 APIC: 07: enabled 1
782 13:49:01.831711 APIC: 06: enabled 1
783 13:49:01.835040 APIC: 02: enabled 1
784 13:49:01.838219 APIC: 03: enabled 1
785 13:49:01.838312 APIC: 05: enabled 1
786 13:49:01.841407 APIC: 04: enabled 1
787 13:49:01.844663 DOMAIN: 0000: enabled 1
788 13:49:01.844756 PCI: 00:00.0: enabled 1
789 13:49:01.848911 PCI: 00:02.0: enabled 1
790 13:49:01.851776 PCI: 00:04.0: enabled 0
791 13:49:01.855206 PCI: 00:05.0: enabled 0
792 13:49:01.858400 PCI: 00:12.0: enabled 1
793 13:49:01.858485 PCI: 00:12.5: enabled 0
794 13:49:01.861477 PCI: 00:12.6: enabled 0
795 13:49:01.864765 PCI: 00:14.0: enabled 1
796 13:49:01.867906 USB0 port 0: enabled 1
797 13:49:01.871722 USB2 port 0: enabled 1
798 13:49:01.871852 USB2 port 1: enabled 1
799 13:49:01.874794 USB2 port 2: enabled 0
800 13:49:01.878397 USB2 port 3: enabled 0
801 13:49:01.881431 USB2 port 5: enabled 0
802 13:49:01.884614 USB2 port 6: enabled 1
803 13:49:01.888163 USB2 port 9: enabled 1
804 13:49:01.888289 USB3 port 0: enabled 1
805 13:49:01.891234 USB3 port 1: enabled 1
806 13:49:01.894581 USB3 port 2: enabled 1
807 13:49:01.897892 USB3 port 3: enabled 1
808 13:49:01.901307 USB3 port 4: enabled 0
809 13:49:01.901400 PCI: 00:14.1: enabled 0
810 13:49:01.904992 PCI: 00:14.3: enabled 1
811 13:49:01.908011 PCI: 00:14.5: enabled 0
812 13:49:01.911475 PCI: 00:15.0: enabled 1
813 13:49:01.914687 I2C: 00:15: enabled 1
814 13:49:01.914784 PCI: 00:15.1: enabled 1
815 13:49:01.918457 I2C: 00:5d: enabled 1
816 13:49:01.921250 GENERIC: 0.0: enabled 1
817 13:49:01.925022 PCI: 00:15.2: enabled 0
818 13:49:01.925148 PCI: 00:15.3: enabled 0
819 13:49:01.928396 PCI: 00:16.0: enabled 1
820 13:49:01.931194 PCI: 00:16.1: enabled 0
821 13:49:01.934504 PCI: 00:16.2: enabled 0
822 13:49:01.937908 PCI: 00:16.3: enabled 0
823 13:49:01.938031 PCI: 00:16.4: enabled 0
824 13:49:01.941874 PCI: 00:16.5: enabled 0
825 13:49:01.945088 PCI: 00:17.0: enabled 1
826 13:49:01.948411 PCI: 00:19.0: enabled 1
827 13:49:01.951665 I2C: 00:1a: enabled 1
828 13:49:01.951757 I2C: 00:38: enabled 1
829 13:49:01.954770 I2C: 00:39: enabled 1
830 13:49:01.958009 I2C: 00:3a: enabled 1
831 13:49:01.961275 I2C: 00:3b: enabled 1
832 13:49:01.961362 PCI: 00:19.1: enabled 0
833 13:49:01.964564 PCI: 00:19.2: enabled 0
834 13:49:01.968218 PCI: 00:1a.0: enabled 0
835 13:49:01.971371 PCI: 00:1c.0: enabled 0
836 13:49:01.974738 PCI: 00:1c.1: enabled 0
837 13:49:01.974832 PCI: 00:1c.2: enabled 0
838 13:49:01.978057 PCI: 00:1c.3: enabled 0
839 13:49:01.981313 PCI: 00:1c.4: enabled 0
840 13:49:01.984523 PCI: 00:1c.5: enabled 0
841 13:49:01.984621 PCI: 00:1c.6: enabled 0
842 13:49:01.987838 PCI: 00:1c.7: enabled 0
843 13:49:01.991149 PCI: 00:1d.0: enabled 1
844 13:49:01.994782 PCI: 00:1d.1: enabled 0
845 13:49:01.998196 PCI: 00:1d.2: enabled 0
846 13:49:01.998290 PCI: 00:1d.3: enabled 0
847 13:49:02.001176 PCI: 00:1d.4: enabled 0
848 13:49:02.004722 PCI: 00:1d.5: enabled 1
849 13:49:02.007621 PCI: 00:00.0: enabled 1
850 13:49:02.011118 PCI: 00:1e.0: enabled 1
851 13:49:02.011247 PCI: 00:1e.1: enabled 0
852 13:49:02.014344 PCI: 00:1e.2: enabled 1
853 13:49:02.017941 SPI: 00: enabled 1
854 13:49:02.021313 PCI: 00:1e.3: enabled 1
855 13:49:02.021404 SPI: 01: enabled 1
856 13:49:02.024249 PCI: 00:1f.0: enabled 1
857 13:49:02.027845 PNP: 0c09.0: enabled 1
858 13:49:02.031102 PCI: 00:1f.1: enabled 1
859 13:49:02.034543 PCI: 00:1f.2: enabled 1
860 13:49:02.034636 PCI: 00:1f.3: enabled 1
861 13:49:02.037936 PCI: 00:1f.4: enabled 1
862 13:49:02.040711 PCI: 00:1f.5: enabled 1
863 13:49:02.043954 PCI: 00:1f.6: enabled 0
864 13:49:02.047341 Root Device scanning...
865 13:49:02.051112 scan_static_bus for Root Device
866 13:49:02.051241 CPU_CLUSTER: 0 enabled
867 13:49:02.054580 DOMAIN: 0000 enabled
868 13:49:02.057310 DOMAIN: 0000 scanning...
869 13:49:02.061107 PCI: pci_scan_bus for bus 00
870 13:49:02.064286 PCI: 00:00.0 [8086/0000] ops
871 13:49:02.067728 PCI: 00:00.0 [8086/9b61] enabled
872 13:49:02.070942 PCI: 00:02.0 [8086/0000] bus ops
873 13:49:02.074108 PCI: 00:02.0 [8086/9b41] enabled
874 13:49:02.077240 PCI: 00:04.0 [8086/1903] disabled
875 13:49:02.080561 PCI: 00:08.0 [8086/1911] enabled
876 13:49:02.083897 PCI: 00:12.0 [8086/02f9] enabled
877 13:49:02.087559 PCI: 00:14.0 [8086/0000] bus ops
878 13:49:02.090478 PCI: 00:14.0 [8086/02ed] enabled
879 13:49:02.093830 PCI: 00:14.2 [8086/02ef] enabled
880 13:49:02.097618 PCI: 00:14.3 [8086/02f0] enabled
881 13:49:02.100609 PCI: 00:15.0 [8086/0000] bus ops
882 13:49:02.104239 PCI: 00:15.0 [8086/02e8] enabled
883 13:49:02.106929 PCI: 00:15.1 [8086/0000] bus ops
884 13:49:02.110185 PCI: 00:15.1 [8086/02e9] enabled
885 13:49:02.113710 PCI: 00:16.0 [8086/0000] ops
886 13:49:02.116958 PCI: 00:16.0 [8086/02e0] enabled
887 13:49:02.117051 PCI: 00:17.0 [8086/0000] ops
888 13:49:02.120682 PCI: 00:17.0 [8086/02d3] enabled
889 13:49:02.123616 PCI: 00:19.0 [8086/0000] bus ops
890 13:49:02.127186 PCI: 00:19.0 [8086/02c5] enabled
891 13:49:02.130666 PCI: 00:1d.0 [8086/0000] bus ops
892 13:49:02.133547 PCI: 00:1d.0 [8086/02b0] enabled
893 13:49:02.140137 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 13:49:02.143795 PCI: 00:1e.0 [8086/0000] ops
895 13:49:02.146942 PCI: 00:1e.0 [8086/02a8] enabled
896 13:49:02.150283 PCI: 00:1e.2 [8086/0000] bus ops
897 13:49:02.153540 PCI: 00:1e.2 [8086/02aa] enabled
898 13:49:02.156997 PCI: 00:1e.3 [8086/0000] bus ops
899 13:49:02.160298 PCI: 00:1e.3 [8086/02ab] enabled
900 13:49:02.163593 PCI: 00:1f.0 [8086/0000] bus ops
901 13:49:02.166773 PCI: 00:1f.0 [8086/0284] enabled
902 13:49:02.173746 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 13:49:02.176928 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 13:49:02.180425 PCI: 00:1f.3 [8086/0000] bus ops
905 13:49:02.183694 PCI: 00:1f.3 [8086/02c8] enabled
906 13:49:02.187200 PCI: 00:1f.4 [8086/0000] bus ops
907 13:49:02.190411 PCI: 00:1f.4 [8086/02a3] enabled
908 13:49:02.193817 PCI: 00:1f.5 [8086/0000] bus ops
909 13:49:02.197100 PCI: 00:1f.5 [8086/02a4] enabled
910 13:49:02.200496 PCI: Leftover static devices:
911 13:49:02.203644 PCI: 00:05.0
912 13:49:02.203750 PCI: 00:12.5
913 13:49:02.206757 PCI: 00:12.6
914 13:49:02.206863 PCI: 00:14.1
915 13:49:02.206944 PCI: 00:14.5
916 13:49:02.210039 PCI: 00:15.2
917 13:49:02.210131 PCI: 00:15.3
918 13:49:02.213402 PCI: 00:16.1
919 13:49:02.213501 PCI: 00:16.2
920 13:49:02.213575 PCI: 00:16.3
921 13:49:02.217231 PCI: 00:16.4
922 13:49:02.217327 PCI: 00:16.5
923 13:49:02.220377 PCI: 00:19.1
924 13:49:02.220469 PCI: 00:19.2
925 13:49:02.220543 PCI: 00:1a.0
926 13:49:02.223503 PCI: 00:1c.0
927 13:49:02.223591 PCI: 00:1c.1
928 13:49:02.226852 PCI: 00:1c.2
929 13:49:02.226979 PCI: 00:1c.3
930 13:49:02.230122 PCI: 00:1c.4
931 13:49:02.230264 PCI: 00:1c.5
932 13:49:02.230343 PCI: 00:1c.6
933 13:49:02.233581 PCI: 00:1c.7
934 13:49:02.233724 PCI: 00:1d.1
935 13:49:02.236953 PCI: 00:1d.2
936 13:49:02.237062 PCI: 00:1d.3
937 13:49:02.237138 PCI: 00:1d.4
938 13:49:02.240424 PCI: 00:1d.5
939 13:49:02.240506 PCI: 00:1e.1
940 13:49:02.243418 PCI: 00:1f.1
941 13:49:02.243504 PCI: 00:1f.2
942 13:49:02.243586 PCI: 00:1f.6
943 13:49:02.246771 PCI: Check your devicetree.cb.
944 13:49:02.250112 PCI: 00:02.0 scanning...
945 13:49:02.253496 scan_generic_bus for PCI: 00:02.0
946 13:49:02.256678 scan_generic_bus for PCI: 00:02.0 done
947 13:49:02.263709 scan_bus: scanning of bus PCI: 00:02.0 took 10181 usecs
948 13:49:02.266978 PCI: 00:14.0 scanning...
949 13:49:02.270141 scan_static_bus for PCI: 00:14.0
950 13:49:02.273395 USB0 port 0 enabled
951 13:49:02.273528 USB0 port 0 scanning...
952 13:49:02.276882 scan_static_bus for USB0 port 0
953 13:49:02.280277 USB2 port 0 enabled
954 13:49:02.283180 USB2 port 1 enabled
955 13:49:02.283312 USB2 port 2 disabled
956 13:49:02.286732 USB2 port 3 disabled
957 13:49:02.289983 USB2 port 5 disabled
958 13:49:02.290116 USB2 port 6 enabled
959 13:49:02.293271 USB2 port 9 enabled
960 13:49:02.293383 USB3 port 0 enabled
961 13:49:02.297046 USB3 port 1 enabled
962 13:49:02.300387 USB3 port 2 enabled
963 13:49:02.300480 USB3 port 3 enabled
964 13:49:02.303702 USB3 port 4 disabled
965 13:49:02.306538 USB2 port 0 scanning...
966 13:49:02.310221 scan_static_bus for USB2 port 0
967 13:49:02.313533 scan_static_bus for USB2 port 0 done
968 13:49:02.316964 scan_bus: scanning of bus USB2 port 0 took 9702 usecs
969 13:49:02.320280 USB2 port 1 scanning...
970 13:49:02.323557 scan_static_bus for USB2 port 1
971 13:49:02.326726 scan_static_bus for USB2 port 1 done
972 13:49:02.333397 scan_bus: scanning of bus USB2 port 1 took 9701 usecs
973 13:49:02.336622 USB2 port 6 scanning...
974 13:49:02.340512 scan_static_bus for USB2 port 6
975 13:49:02.343359 scan_static_bus for USB2 port 6 done
976 13:49:02.346639 scan_bus: scanning of bus USB2 port 6 took 9710 usecs
977 13:49:02.349872 USB2 port 9 scanning...
978 13:49:02.353275 scan_static_bus for USB2 port 9
979 13:49:02.356684 scan_static_bus for USB2 port 9 done
980 13:49:02.363450 scan_bus: scanning of bus USB2 port 9 took 9709 usecs
981 13:49:02.366634 USB3 port 0 scanning...
982 13:49:02.370018 scan_static_bus for USB3 port 0
983 13:49:02.373506 scan_static_bus for USB3 port 0 done
984 13:49:02.376522 scan_bus: scanning of bus USB3 port 0 took 9701 usecs
985 13:49:02.379848 USB3 port 1 scanning...
986 13:49:02.383650 scan_static_bus for USB3 port 1
987 13:49:02.386796 scan_static_bus for USB3 port 1 done
988 13:49:02.393402 scan_bus: scanning of bus USB3 port 1 took 9695 usecs
989 13:49:02.396847 USB3 port 2 scanning...
990 13:49:02.400385 scan_static_bus for USB3 port 2
991 13:49:02.403467 scan_static_bus for USB3 port 2 done
992 13:49:02.406783 scan_bus: scanning of bus USB3 port 2 took 9710 usecs
993 13:49:02.410100 USB3 port 3 scanning...
994 13:49:02.413213 scan_static_bus for USB3 port 3
995 13:49:02.416968 scan_static_bus for USB3 port 3 done
996 13:49:02.423377 scan_bus: scanning of bus USB3 port 3 took 9702 usecs
997 13:49:02.426701 scan_static_bus for USB0 port 0 done
998 13:49:02.433312 scan_bus: scanning of bus USB0 port 0 took 155382 usecs
999 13:49:02.436529 scan_static_bus for PCI: 00:14.0 done
1000 13:49:02.443197 scan_bus: scanning of bus PCI: 00:14.0 took 173008 usecs
1001 13:49:02.443299 PCI: 00:15.0 scanning...
1002 13:49:02.446388 scan_generic_bus for PCI: 00:15.0
1003 13:49:02.453188 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 13:49:02.456379 scan_generic_bus for PCI: 00:15.0 done
1005 13:49:02.460111 scan_bus: scanning of bus PCI: 00:15.0 took 14298 usecs
1006 13:49:02.463186 PCI: 00:15.1 scanning...
1007 13:49:02.466644 scan_generic_bus for PCI: 00:15.1
1008 13:49:02.473074 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 13:49:02.476513 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 13:49:02.479824 scan_generic_bus for PCI: 00:15.1 done
1011 13:49:02.486657 scan_bus: scanning of bus PCI: 00:15.1 took 18665 usecs
1012 13:49:02.486750 PCI: 00:19.0 scanning...
1013 13:49:02.493400 scan_generic_bus for PCI: 00:19.0
1014 13:49:02.496746 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 13:49:02.500048 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 13:49:02.503586 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 13:49:02.506923 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 13:49:02.513176 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 13:49:02.516949 scan_generic_bus for PCI: 00:19.0 done
1020 13:49:02.520416 scan_bus: scanning of bus PCI: 00:19.0 took 30732 usecs
1021 13:49:02.523323 PCI: 00:1d.0 scanning...
1022 13:49:02.526725 do_pci_scan_bridge for PCI: 00:1d.0
1023 13:49:02.530027 PCI: pci_scan_bus for bus 01
1024 13:49:02.533444 PCI: 01:00.0 [1c5c/1327] enabled
1025 13:49:02.536706 Enabling Common Clock Configuration
1026 13:49:02.543270 L1 Sub-State supported from root port 29
1027 13:49:02.546571 L1 Sub-State Support = 0xf
1028 13:49:02.546684 CommonModeRestoreTime = 0x28
1029 13:49:02.553353 Power On Value = 0x16, Power On Scale = 0x0
1030 13:49:02.553445 ASPM: Enabled L1
1031 13:49:02.559754 scan_bus: scanning of bus PCI: 00:1d.0 took 32797 usecs
1032 13:49:02.563207 PCI: 00:1e.2 scanning...
1033 13:49:02.566436 scan_generic_bus for PCI: 00:1e.2
1034 13:49:02.569862 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1035 13:49:02.573266 scan_generic_bus for PCI: 00:1e.2 done
1036 13:49:02.579679 scan_bus: scanning of bus PCI: 00:1e.2 took 14010 usecs
1037 13:49:02.583139 PCI: 00:1e.3 scanning...
1038 13:49:02.586553 scan_generic_bus for PCI: 00:1e.3
1039 13:49:02.589782 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1040 13:49:02.593291 scan_generic_bus for PCI: 00:1e.3 done
1041 13:49:02.599667 scan_bus: scanning of bus PCI: 00:1e.3 took 14008 usecs
1042 13:49:02.599761 PCI: 00:1f.0 scanning...
1043 13:49:02.603163 scan_static_bus for PCI: 00:1f.0
1044 13:49:02.606342 PNP: 0c09.0 enabled
1045 13:49:02.609983 scan_static_bus for PCI: 00:1f.0 done
1046 13:49:02.617018 scan_bus: scanning of bus PCI: 00:1f.0 took 12056 usecs
1047 13:49:02.620231 PCI: 00:1f.3 scanning...
1048 13:49:02.623208 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1049 13:49:02.626583 PCI: 00:1f.4 scanning...
1050 13:49:02.629792 scan_generic_bus for PCI: 00:1f.4
1051 13:49:02.632967 scan_generic_bus for PCI: 00:1f.4 done
1052 13:49:02.639829 scan_bus: scanning of bus PCI: 00:1f.4 took 10199 usecs
1053 13:49:02.643107 PCI: 00:1f.5 scanning...
1054 13:49:02.646506 scan_generic_bus for PCI: 00:1f.5
1055 13:49:02.650111 scan_generic_bus for PCI: 00:1f.5 done
1056 13:49:02.656410 scan_bus: scanning of bus PCI: 00:1f.5 took 10197 usecs
1057 13:49:02.663030 scan_bus: scanning of bus DOMAIN: 0000 took 605257 usecs
1058 13:49:02.666397 scan_static_bus for Root Device done
1059 13:49:02.669961 scan_bus: scanning of bus Root Device took 625178 usecs
1060 13:49:02.673273 done
1061 13:49:02.673362 Chrome EC: UHEPI supported
1062 13:49:02.679893 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1063 13:49:02.686516 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1064 13:49:02.693214 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1065 13:49:02.700222 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1066 13:49:02.703512 SPI flash protection: WPSW=0 SRP0=0
1067 13:49:02.710142 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 13:49:02.713394 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1069 13:49:02.716686 found VGA at PCI: 00:02.0
1070 13:49:02.719720 Setting up VGA for PCI: 00:02.0
1071 13:49:02.723202 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 13:49:02.729895 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 13:49:02.733247 Allocating resources...
1074 13:49:02.733345 Reading resources...
1075 13:49:02.739665 Root Device read_resources bus 0 link: 0
1076 13:49:02.742859 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 13:49:02.749514 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 13:49:02.752845 DOMAIN: 0000 read_resources bus 0 link: 0
1079 13:49:02.759625 PCI: 00:14.0 read_resources bus 0 link: 0
1080 13:49:02.762721 USB0 port 0 read_resources bus 0 link: 0
1081 13:49:02.770690 USB0 port 0 read_resources bus 0 link: 0 done
1082 13:49:02.774038 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 13:49:02.781567 PCI: 00:15.0 read_resources bus 1 link: 0
1084 13:49:02.785156 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 13:49:02.791668 PCI: 00:15.1 read_resources bus 2 link: 0
1086 13:49:02.795042 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 13:49:02.802169 PCI: 00:19.0 read_resources bus 3 link: 0
1088 13:49:02.809254 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 13:49:02.812434 PCI: 00:1d.0 read_resources bus 1 link: 0
1090 13:49:02.819331 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1091 13:49:02.822540 PCI: 00:1e.2 read_resources bus 4 link: 0
1092 13:49:02.829068 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1093 13:49:02.832460 PCI: 00:1e.3 read_resources bus 5 link: 0
1094 13:49:02.838940 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1095 13:49:02.842367 PCI: 00:1f.0 read_resources bus 0 link: 0
1096 13:49:02.848914 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1097 13:49:02.855538 DOMAIN: 0000 read_resources bus 0 link: 0 done
1098 13:49:02.858893 Root Device read_resources bus 0 link: 0 done
1099 13:49:02.862271 Done reading resources.
1100 13:49:02.865322 Show resources in subtree (Root Device)...After reading.
1101 13:49:02.871797 Root Device child on link 0 CPU_CLUSTER: 0
1102 13:49:02.875012 CPU_CLUSTER: 0 child on link 0 APIC: 00
1103 13:49:02.875104 APIC: 00
1104 13:49:02.878901 APIC: 01
1105 13:49:02.878993 APIC: 07
1106 13:49:02.881884 APIC: 06
1107 13:49:02.881975 APIC: 02
1108 13:49:02.882047 APIC: 03
1109 13:49:02.885017 APIC: 05
1110 13:49:02.885108 APIC: 04
1111 13:49:02.888810 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 13:49:02.898549 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 13:49:02.955052 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1114 13:49:02.955190 PCI: 00:00.0
1115 13:49:02.955962 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 13:49:02.956231 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 13:49:02.956551 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 13:49:02.957031 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 13:49:02.984337 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 13:49:02.984637 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 13:49:02.984720 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 13:49:02.988099 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 13:49:02.994619 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 13:49:03.004357 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1125 13:49:03.014756 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1126 13:49:03.021527 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1127 13:49:03.031305 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1128 13:49:03.041451 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1129 13:49:03.051222 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1130 13:49:03.061114 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1131 13:49:03.061216 PCI: 00:02.0
1132 13:49:03.071162 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1133 13:49:03.081492 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1134 13:49:03.091269 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1135 13:49:03.094454 PCI: 00:04.0
1136 13:49:03.094546 PCI: 00:08.0
1137 13:49:03.104567 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 13:49:03.104663 PCI: 00:12.0
1139 13:49:03.114418 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 13:49:03.121141 PCI: 00:14.0 child on link 0 USB0 port 0
1141 13:49:03.131075 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1142 13:49:03.134662 USB0 port 0 child on link 0 USB2 port 0
1143 13:49:03.137704 USB2 port 0
1144 13:49:03.137797 USB2 port 1
1145 13:49:03.141032 USB2 port 2
1146 13:49:03.141133 USB2 port 3
1147 13:49:03.144352 USB2 port 5
1148 13:49:03.144465 USB2 port 6
1149 13:49:03.147682 USB2 port 9
1150 13:49:03.147799 USB3 port 0
1151 13:49:03.151118 USB3 port 1
1152 13:49:03.151245 USB3 port 2
1153 13:49:03.154964 USB3 port 3
1154 13:49:03.155052 USB3 port 4
1155 13:49:03.157525 PCI: 00:14.2
1156 13:49:03.167621 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 13:49:03.177609 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 13:49:03.177755 PCI: 00:14.3
1159 13:49:03.187363 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 13:49:03.194063 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 13:49:03.204614 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 13:49:03.204714 I2C: 01:15
1163 13:49:03.207742 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 13:49:03.217484 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 13:49:03.220673 I2C: 02:5d
1166 13:49:03.220769 GENERIC: 0.0
1167 13:49:03.224405 PCI: 00:16.0
1168 13:49:03.234478 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 13:49:03.234605 PCI: 00:17.0
1170 13:49:03.244435 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 13:49:03.254381 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 13:49:03.261008 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 13:49:03.270810 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 13:49:03.277539 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 13:49:03.287429 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 13:49:03.291098 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 13:49:03.301015 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 13:49:03.304291 I2C: 03:1a
1179 13:49:03.304388 I2C: 03:38
1180 13:49:03.307500 I2C: 03:39
1181 13:49:03.307590 I2C: 03:3a
1182 13:49:03.310886 I2C: 03:3b
1183 13:49:03.314126 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 13:49:03.323941 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 13:49:03.330706 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 13:49:03.340812 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 13:49:03.343852 PCI: 01:00.0
1188 13:49:03.354067 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 13:49:03.354165 PCI: 00:1e.0
1190 13:49:03.367565 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 13:49:03.377377 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 13:49:03.380734 PCI: 00:1e.2 child on link 0 SPI: 00
1193 13:49:03.390642 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 13:49:03.390742 SPI: 00
1195 13:49:03.394039 PCI: 00:1e.3 child on link 0 SPI: 01
1196 13:49:03.403954 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 13:49:03.407409 SPI: 01
1198 13:49:03.410570 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 13:49:03.420409 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 13:49:03.427122 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1201 13:49:03.430704 PNP: 0c09.0
1202 13:49:03.437052 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1203 13:49:03.440668 PCI: 00:1f.3
1204 13:49:03.450489 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 13:49:03.460652 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1206 13:49:03.460772 PCI: 00:1f.4
1207 13:49:03.470356 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1208 13:49:03.479917 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1209 13:49:03.483785 PCI: 00:1f.5
1210 13:49:03.489941 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1211 13:49:03.497278 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 13:49:03.503581 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 13:49:03.510411 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 13:49:03.513522 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1215 13:49:03.516635 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1216 13:49:03.523649 PCI: 00:17.0 18 * [0x60 - 0x67] io
1217 13:49:03.526815 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1218 13:49:03.533405 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1219 13:49:03.539972 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1220 13:49:03.547041 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1221 13:49:03.556602 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1222 13:49:03.563614 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1223 13:49:03.567006 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1224 13:49:03.573422 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1225 13:49:03.579981 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1226 13:49:03.583239 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1227 13:49:03.586389 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1228 13:49:03.593285 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1229 13:49:03.596493 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1230 13:49:03.603548 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1231 13:49:03.606317 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1232 13:49:03.613396 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1233 13:49:03.616950 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1234 13:49:03.623079 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1235 13:49:03.626651 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1236 13:49:03.633157 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1237 13:49:03.636377 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1238 13:49:03.643357 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1239 13:49:03.646184 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1240 13:49:03.653079 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1241 13:49:03.656276 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1242 13:49:03.660371 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1243 13:49:03.666360 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1244 13:49:03.670301 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1245 13:49:03.676289 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1246 13:49:03.679608 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1247 13:49:03.686665 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1248 13:49:03.693011 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1249 13:49:03.696202 avoid_fixed_resources: DOMAIN: 0000
1250 13:49:03.702882 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1251 13:49:03.709641 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1252 13:49:03.716395 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1253 13:49:03.726563 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1254 13:49:03.733083 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1255 13:49:03.739627 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1256 13:49:03.746325 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1257 13:49:03.756367 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 13:49:03.763131 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1259 13:49:03.769634 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1260 13:49:03.776440 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1261 13:49:03.786597 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1262 13:49:03.786708 Setting resources...
1263 13:49:03.793072 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1264 13:49:03.796380 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1265 13:49:03.802955 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1266 13:49:03.806324 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1267 13:49:03.809569 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1268 13:49:03.815791 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1269 13:49:03.822646 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 13:49:03.829670 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 13:49:03.835799 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1272 13:49:03.842559 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 13:49:03.845984 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 13:49:03.852405 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 13:49:03.856013 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1276 13:49:03.859452 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1277 13:49:03.865702 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1278 13:49:03.869211 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1279 13:49:03.875729 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1280 13:49:03.879207 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1281 13:49:03.885949 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1282 13:49:03.889079 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1283 13:49:03.895870 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1284 13:49:03.899128 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1285 13:49:03.905646 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1286 13:49:03.908894 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1287 13:49:03.915596 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1288 13:49:03.918828 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1289 13:49:03.925634 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1290 13:49:03.928836 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1291 13:49:03.932081 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1292 13:49:03.939574 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1293 13:49:03.942607 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1294 13:49:03.949222 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1295 13:49:03.955681 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1296 13:49:03.961931 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1297 13:49:03.971903 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1298 13:49:03.978795 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1299 13:49:03.982196 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1300 13:49:03.988724 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1301 13:49:03.995512 Root Device assign_resources, bus 0 link: 0
1302 13:49:03.998766 DOMAIN: 0000 assign_resources, bus 0 link: 0
1303 13:49:04.008524 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1304 13:49:04.015250 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1305 13:49:04.025639 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1306 13:49:04.031877 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1307 13:49:04.042323 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1308 13:49:04.048780 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1309 13:49:04.052240 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 13:49:04.058914 PCI: 00:14.0 assign_resources, bus 0 link: 0
1311 13:49:04.065278 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1312 13:49:04.075307 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1313 13:49:04.082256 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1314 13:49:04.092481 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1315 13:49:04.095577 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 13:49:04.098821 PCI: 00:15.0 assign_resources, bus 1 link: 0
1317 13:49:04.108747 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1318 13:49:04.112343 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 13:49:04.119025 PCI: 00:15.1 assign_resources, bus 2 link: 0
1320 13:49:04.125672 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1321 13:49:04.135970 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1322 13:49:04.142513 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1323 13:49:04.149142 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1324 13:49:04.159181 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1325 13:49:04.165908 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1326 13:49:04.172436 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1327 13:49:04.182391 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1328 13:49:04.185682 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 13:49:04.188930 PCI: 00:19.0 assign_resources, bus 3 link: 0
1330 13:49:04.198886 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1331 13:49:04.209164 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1332 13:49:04.215643 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1333 13:49:04.222270 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 13:49:04.228882 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1335 13:49:04.235625 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1336 13:49:04.242197 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1337 13:49:04.251878 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1338 13:49:04.255158 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 13:49:04.258446 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1340 13:49:04.268256 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1341 13:49:04.271936 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 13:49:04.278260 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1343 13:49:04.281513 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 13:49:04.288400 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1345 13:49:04.291637 LPC: Trying to open IO window from 800 size 1ff
1346 13:49:04.301403 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1347 13:49:04.308115 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1348 13:49:04.318030 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1349 13:49:04.324670 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1350 13:49:04.328285 DOMAIN: 0000 assign_resources, bus 0 link: 0
1351 13:49:04.334703 Root Device assign_resources, bus 0 link: 0
1352 13:49:04.337884 Done setting resources.
1353 13:49:04.344604 Show resources in subtree (Root Device)...After assigning values.
1354 13:49:04.348303 Root Device child on link 0 CPU_CLUSTER: 0
1355 13:49:04.351277 CPU_CLUSTER: 0 child on link 0 APIC: 00
1356 13:49:04.351385 APIC: 00
1357 13:49:04.354851 APIC: 01
1358 13:49:04.354939 APIC: 07
1359 13:49:04.358194 APIC: 06
1360 13:49:04.358328 APIC: 02
1361 13:49:04.358434 APIC: 03
1362 13:49:04.361210 APIC: 05
1363 13:49:04.361291 APIC: 04
1364 13:49:04.364527 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1365 13:49:04.374685 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1366 13:49:04.387620 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1367 13:49:04.387747 PCI: 00:00.0
1368 13:49:04.397960 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1369 13:49:04.407774 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1370 13:49:04.417881 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1371 13:49:04.427703 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1372 13:49:04.434253 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1373 13:49:04.444228 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1374 13:49:04.454152 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1375 13:49:04.464046 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1376 13:49:04.473944 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1377 13:49:04.480283 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1378 13:49:04.490194 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1379 13:49:04.500633 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1380 13:49:04.510573 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1381 13:49:04.520067 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1382 13:49:04.530258 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1383 13:49:04.540013 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1384 13:49:04.540125 PCI: 00:02.0
1385 13:49:04.549826 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1386 13:49:04.563197 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1387 13:49:04.569952 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1388 13:49:04.573345 PCI: 00:04.0
1389 13:49:04.573442 PCI: 00:08.0
1390 13:49:04.582861 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1391 13:49:04.586394 PCI: 00:12.0
1392 13:49:04.596445 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1393 13:49:04.599708 PCI: 00:14.0 child on link 0 USB0 port 0
1394 13:49:04.609781 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1395 13:49:04.616082 USB0 port 0 child on link 0 USB2 port 0
1396 13:49:04.616185 USB2 port 0
1397 13:49:04.619641 USB2 port 1
1398 13:49:04.619727 USB2 port 2
1399 13:49:04.622984 USB2 port 3
1400 13:49:04.623067 USB2 port 5
1401 13:49:04.626328 USB2 port 6
1402 13:49:04.629524 USB2 port 9
1403 13:49:04.629640 USB3 port 0
1404 13:49:04.633448 USB3 port 1
1405 13:49:04.633572 USB3 port 2
1406 13:49:04.636460 USB3 port 3
1407 13:49:04.636578 USB3 port 4
1408 13:49:04.639263 PCI: 00:14.2
1409 13:49:04.649566 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1410 13:49:04.659297 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1411 13:49:04.659397 PCI: 00:14.3
1412 13:49:04.669158 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1413 13:49:04.676083 PCI: 00:15.0 child on link 0 I2C: 01:15
1414 13:49:04.685579 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1415 13:49:04.685670 I2C: 01:15
1416 13:49:04.692423 PCI: 00:15.1 child on link 0 I2C: 02:5d
1417 13:49:04.702352 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1418 13:49:04.702452 I2C: 02:5d
1419 13:49:04.705631 GENERIC: 0.0
1420 13:49:04.705710 PCI: 00:16.0
1421 13:49:04.715672 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1422 13:49:04.718941 PCI: 00:17.0
1423 13:49:04.728854 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1424 13:49:04.739114 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1425 13:49:04.748601 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1426 13:49:04.755546 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1427 13:49:04.765262 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1428 13:49:04.775364 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1429 13:49:04.782024 PCI: 00:19.0 child on link 0 I2C: 03:1a
1430 13:49:04.791840 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1431 13:49:04.791953 I2C: 03:1a
1432 13:49:04.794995 I2C: 03:38
1433 13:49:04.795105 I2C: 03:39
1434 13:49:04.798305 I2C: 03:3a
1435 13:49:04.798402 I2C: 03:3b
1436 13:49:04.801703 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1437 13:49:04.811860 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1438 13:49:04.821862 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1439 13:49:04.831483 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1440 13:49:04.834740 PCI: 01:00.0
1441 13:49:04.844970 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1442 13:49:04.848263 PCI: 00:1e.0
1443 13:49:04.858198 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1444 13:49:04.867821 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1445 13:49:04.871682 PCI: 00:1e.2 child on link 0 SPI: 00
1446 13:49:04.881311 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1447 13:49:04.884839 SPI: 00
1448 13:49:04.887804 PCI: 00:1e.3 child on link 0 SPI: 01
1449 13:49:04.897895 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1450 13:49:04.898017 SPI: 01
1451 13:49:04.904947 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1452 13:49:04.911381 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1453 13:49:04.920797 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1454 13:49:04.924289 PNP: 0c09.0
1455 13:49:04.930933 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1456 13:49:04.934752 PCI: 00:1f.3
1457 13:49:04.944437 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1458 13:49:04.953956 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1459 13:49:04.954085 PCI: 00:1f.4
1460 13:49:04.964054 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1461 13:49:04.973804 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1462 13:49:04.977665 PCI: 00:1f.5
1463 13:49:04.987284 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1464 13:49:04.990652 Done allocating resources.
1465 13:49:04.993727 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1466 13:49:04.997403 Enabling resources...
1467 13:49:05.003933 PCI: 00:00.0 subsystem <- 8086/9b61
1468 13:49:05.004032 PCI: 00:00.0 cmd <- 06
1469 13:49:05.007667 PCI: 00:02.0 subsystem <- 8086/9b41
1470 13:49:05.010456 PCI: 00:02.0 cmd <- 03
1471 13:49:05.013852 PCI: 00:08.0 cmd <- 06
1472 13:49:05.017305 PCI: 00:12.0 subsystem <- 8086/02f9
1473 13:49:05.020578 PCI: 00:12.0 cmd <- 02
1474 13:49:05.024014 PCI: 00:14.0 subsystem <- 8086/02ed
1475 13:49:05.027145 PCI: 00:14.0 cmd <- 02
1476 13:49:05.027266 PCI: 00:14.2 cmd <- 02
1477 13:49:05.034167 PCI: 00:14.3 subsystem <- 8086/02f0
1478 13:49:05.034293 PCI: 00:14.3 cmd <- 02
1479 13:49:05.037503 PCI: 00:15.0 subsystem <- 8086/02e8
1480 13:49:05.040804 PCI: 00:15.0 cmd <- 02
1481 13:49:05.044613 PCI: 00:15.1 subsystem <- 8086/02e9
1482 13:49:05.047456 PCI: 00:15.1 cmd <- 02
1483 13:49:05.050752 PCI: 00:16.0 subsystem <- 8086/02e0
1484 13:49:05.054215 PCI: 00:16.0 cmd <- 02
1485 13:49:05.057537 PCI: 00:17.0 subsystem <- 8086/02d3
1486 13:49:05.061161 PCI: 00:17.0 cmd <- 03
1487 13:49:05.064108 PCI: 00:19.0 subsystem <- 8086/02c5
1488 13:49:05.067802 PCI: 00:19.0 cmd <- 02
1489 13:49:05.070719 PCI: 00:1d.0 bridge ctrl <- 0013
1490 13:49:05.074127 PCI: 00:1d.0 subsystem <- 8086/02b0
1491 13:49:05.077319 PCI: 00:1d.0 cmd <- 06
1492 13:49:05.080751 PCI: 00:1e.0 subsystem <- 8086/02a8
1493 13:49:05.080838 PCI: 00:1e.0 cmd <- 06
1494 13:49:05.087411 PCI: 00:1e.2 subsystem <- 8086/02aa
1495 13:49:05.087527 PCI: 00:1e.2 cmd <- 06
1496 13:49:05.090740 PCI: 00:1e.3 subsystem <- 8086/02ab
1497 13:49:05.094493 PCI: 00:1e.3 cmd <- 02
1498 13:49:05.097708 PCI: 00:1f.0 subsystem <- 8086/0284
1499 13:49:05.101016 PCI: 00:1f.0 cmd <- 407
1500 13:49:05.104350 PCI: 00:1f.3 subsystem <- 8086/02c8
1501 13:49:05.107689 PCI: 00:1f.3 cmd <- 02
1502 13:49:05.111098 PCI: 00:1f.4 subsystem <- 8086/02a3
1503 13:49:05.114339 PCI: 00:1f.4 cmd <- 03
1504 13:49:05.117647 PCI: 00:1f.5 subsystem <- 8086/02a4
1505 13:49:05.120821 PCI: 00:1f.5 cmd <- 406
1506 13:49:05.129011 PCI: 01:00.0 cmd <- 02
1507 13:49:05.134327 done.
1508 13:49:05.145562 ME: Version: 14.0.39.1367
1509 13:49:05.151963 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
1510 13:49:05.155527 Initializing devices...
1511 13:49:05.155626 Root Device init ...
1512 13:49:05.161841 Chrome EC: Set SMI mask to 0x0000000000000000
1513 13:49:05.164842 Chrome EC: clear events_b mask to 0x0000000000000000
1514 13:49:05.171713 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1515 13:49:05.178504 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1516 13:49:05.185241 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1517 13:49:05.188084 Chrome EC: Set WAKE mask to 0x0000000000000000
1518 13:49:05.192004 Root Device init finished in 35182 usecs
1519 13:49:05.195146 CPU_CLUSTER: 0 init ...
1520 13:49:05.201561 CPU_CLUSTER: 0 init finished in 2449 usecs
1521 13:49:05.205910 PCI: 00:00.0 init ...
1522 13:49:05.209239 CPU TDP: 15 Watts
1523 13:49:05.212438 CPU PL2 = 64 Watts
1524 13:49:05.216226 PCI: 00:00.0 init finished in 7079 usecs
1525 13:49:05.219480 PCI: 00:02.0 init ...
1526 13:49:05.222827 PCI: 00:02.0 init finished in 2254 usecs
1527 13:49:05.226077 PCI: 00:08.0 init ...
1528 13:49:05.229393 PCI: 00:08.0 init finished in 2252 usecs
1529 13:49:05.232754 PCI: 00:12.0 init ...
1530 13:49:05.235914 PCI: 00:12.0 init finished in 2244 usecs
1531 13:49:05.239049 PCI: 00:14.0 init ...
1532 13:49:05.242293 PCI: 00:14.0 init finished in 2253 usecs
1533 13:49:05.245716 PCI: 00:14.2 init ...
1534 13:49:05.249088 PCI: 00:14.2 init finished in 2252 usecs
1535 13:49:05.252276 PCI: 00:14.3 init ...
1536 13:49:05.255892 PCI: 00:14.3 init finished in 2272 usecs
1537 13:49:05.259321 PCI: 00:15.0 init ...
1538 13:49:05.262598 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 13:49:05.265883 PCI: 00:15.0 init finished in 5979 usecs
1540 13:49:05.268979 PCI: 00:15.1 init ...
1541 13:49:05.272255 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 13:49:05.276032 PCI: 00:15.1 init finished in 5979 usecs
1543 13:49:05.279419 PCI: 00:16.0 init ...
1544 13:49:05.282793 PCI: 00:16.0 init finished in 2253 usecs
1545 13:49:05.286558 PCI: 00:19.0 init ...
1546 13:49:05.289821 DW I2C bus 4 at 0xd1222000 (400 KHz)
1547 13:49:05.296513 PCI: 00:19.0 init finished in 5975 usecs
1548 13:49:05.296680 PCI: 00:1d.0 init ...
1549 13:49:05.299948 Initializing PCH PCIe bridge.
1550 13:49:05.303169 PCI: 00:1d.0 init finished in 5285 usecs
1551 13:49:05.307981 PCI: 00:1f.0 init ...
1552 13:49:05.311508 IOAPIC: Initializing IOAPIC at 0xfec00000
1553 13:49:05.317946 IOAPIC: Bootstrap Processor Local APIC = 0x00
1554 13:49:05.318255 IOAPIC: ID = 0x02
1555 13:49:05.320885 IOAPIC: Dumping registers
1556 13:49:05.324252 reg 0x0000: 0x02000000
1557 13:49:05.327458 reg 0x0001: 0x00770020
1558 13:49:05.327544 reg 0x0002: 0x00000000
1559 13:49:05.334739 PCI: 00:1f.0 init finished in 23542 usecs
1560 13:49:05.338064 PCI: 00:1f.4 init ...
1561 13:49:05.341280 PCI: 00:1f.4 init finished in 2262 usecs
1562 13:49:05.352050 PCI: 01:00.0 init ...
1563 13:49:05.355343 PCI: 01:00.0 init finished in 2251 usecs
1564 13:49:05.359838 PNP: 0c09.0 init ...
1565 13:49:05.363244 Google Chrome EC uptime: 11.051 seconds
1566 13:49:05.369827 Google Chrome AP resets since EC boot: 0
1567 13:49:05.373258 Google Chrome most recent AP reset causes:
1568 13:49:05.379497 Google Chrome EC reset flags at last EC boot: reset-pin
1569 13:49:05.382846 PNP: 0c09.0 init finished in 20563 usecs
1570 13:49:05.386475 Devices initialized
1571 13:49:05.386595 Show all devs... After init.
1572 13:49:05.389185 Root Device: enabled 1
1573 13:49:05.392709 CPU_CLUSTER: 0: enabled 1
1574 13:49:05.396314 DOMAIN: 0000: enabled 1
1575 13:49:05.396436 APIC: 00: enabled 1
1576 13:49:05.399253 PCI: 00:00.0: enabled 1
1577 13:49:05.402434 PCI: 00:02.0: enabled 1
1578 13:49:05.405797 PCI: 00:04.0: enabled 0
1579 13:49:05.405934 PCI: 00:05.0: enabled 0
1580 13:49:05.409541 PCI: 00:12.0: enabled 1
1581 13:49:05.412325 PCI: 00:12.5: enabled 0
1582 13:49:05.412451 PCI: 00:12.6: enabled 0
1583 13:49:05.416066 PCI: 00:14.0: enabled 1
1584 13:49:05.419399 PCI: 00:14.1: enabled 0
1585 13:49:05.422527 PCI: 00:14.3: enabled 1
1586 13:49:05.422639 PCI: 00:14.5: enabled 0
1587 13:49:05.425702 PCI: 00:15.0: enabled 1
1588 13:49:05.429049 PCI: 00:15.1: enabled 1
1589 13:49:05.432321 PCI: 00:15.2: enabled 0
1590 13:49:05.432407 PCI: 00:15.3: enabled 0
1591 13:49:05.435721 PCI: 00:16.0: enabled 1
1592 13:49:05.439062 PCI: 00:16.1: enabled 0
1593 13:49:05.442395 PCI: 00:16.2: enabled 0
1594 13:49:05.442484 PCI: 00:16.3: enabled 0
1595 13:49:05.445572 PCI: 00:16.4: enabled 0
1596 13:49:05.449247 PCI: 00:16.5: enabled 0
1597 13:49:05.452258 PCI: 00:17.0: enabled 1
1598 13:49:05.452342 PCI: 00:19.0: enabled 1
1599 13:49:05.455562 PCI: 00:19.1: enabled 0
1600 13:49:05.458909 PCI: 00:19.2: enabled 0
1601 13:49:05.458991 PCI: 00:1a.0: enabled 0
1602 13:49:05.462219 PCI: 00:1c.0: enabled 0
1603 13:49:05.465567 PCI: 00:1c.1: enabled 0
1604 13:49:05.468902 PCI: 00:1c.2: enabled 0
1605 13:49:05.468985 PCI: 00:1c.3: enabled 0
1606 13:49:05.472340 PCI: 00:1c.4: enabled 0
1607 13:49:05.475613 PCI: 00:1c.5: enabled 0
1608 13:49:05.478568 PCI: 00:1c.6: enabled 0
1609 13:49:05.478665 PCI: 00:1c.7: enabled 0
1610 13:49:05.482311 PCI: 00:1d.0: enabled 1
1611 13:49:05.485426 PCI: 00:1d.1: enabled 0
1612 13:49:05.488979 PCI: 00:1d.2: enabled 0
1613 13:49:05.489069 PCI: 00:1d.3: enabled 0
1614 13:49:05.492175 PCI: 00:1d.4: enabled 0
1615 13:49:05.495854 PCI: 00:1d.5: enabled 0
1616 13:49:05.495943 PCI: 00:1e.0: enabled 1
1617 13:49:05.498648 PCI: 00:1e.1: enabled 0
1618 13:49:05.501950 PCI: 00:1e.2: enabled 1
1619 13:49:05.505243 PCI: 00:1e.3: enabled 1
1620 13:49:05.505331 PCI: 00:1f.0: enabled 1
1621 13:49:05.508587 PCI: 00:1f.1: enabled 0
1622 13:49:05.511930 PCI: 00:1f.2: enabled 0
1623 13:49:05.514980 PCI: 00:1f.3: enabled 1
1624 13:49:05.515099 PCI: 00:1f.4: enabled 1
1625 13:49:05.518392 PCI: 00:1f.5: enabled 1
1626 13:49:05.521654 PCI: 00:1f.6: enabled 0
1627 13:49:05.525008 USB0 port 0: enabled 1
1628 13:49:05.525130 I2C: 01:15: enabled 1
1629 13:49:05.528375 I2C: 02:5d: enabled 1
1630 13:49:05.532085 GENERIC: 0.0: enabled 1
1631 13:49:05.532211 I2C: 03:1a: enabled 1
1632 13:49:05.534936 I2C: 03:38: enabled 1
1633 13:49:05.538317 I2C: 03:39: enabled 1
1634 13:49:05.538421 I2C: 03:3a: enabled 1
1635 13:49:05.541576 I2C: 03:3b: enabled 1
1636 13:49:05.544991 PCI: 00:00.0: enabled 1
1637 13:49:05.545073 SPI: 00: enabled 1
1638 13:49:05.548419 SPI: 01: enabled 1
1639 13:49:05.551517 PNP: 0c09.0: enabled 1
1640 13:49:05.551602 USB2 port 0: enabled 1
1641 13:49:05.555029 USB2 port 1: enabled 1
1642 13:49:05.558283 USB2 port 2: enabled 0
1643 13:49:05.558398 USB2 port 3: enabled 0
1644 13:49:05.561692 USB2 port 5: enabled 0
1645 13:49:05.565018 USB2 port 6: enabled 1
1646 13:49:05.568494 USB2 port 9: enabled 1
1647 13:49:05.568615 USB3 port 0: enabled 1
1648 13:49:05.571672 USB3 port 1: enabled 1
1649 13:49:05.574785 USB3 port 2: enabled 1
1650 13:49:05.574871 USB3 port 3: enabled 1
1651 13:49:05.578204 USB3 port 4: enabled 0
1652 13:49:05.581716 APIC: 01: enabled 1
1653 13:49:05.581801 APIC: 07: enabled 1
1654 13:49:05.584867 APIC: 06: enabled 1
1655 13:49:05.588257 APIC: 02: enabled 1
1656 13:49:05.588370 APIC: 03: enabled 1
1657 13:49:05.591642 APIC: 05: enabled 1
1658 13:49:05.591737 APIC: 04: enabled 1
1659 13:49:05.594946 PCI: 00:08.0: enabled 1
1660 13:49:05.598381 PCI: 00:14.2: enabled 1
1661 13:49:05.601500 PCI: 01:00.0: enabled 1
1662 13:49:05.605356 Disabling ACPI via APMC:
1663 13:49:05.605454 done.
1664 13:49:05.611744 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 13:49:05.614831 ELOG: NV offset 0xaf0000 size 0x4000
1666 13:49:05.621688 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 13:49:05.627972 ELOG: Event(17) added with size 13 at 2023-08-16 13:48:52 UTC
1668 13:49:05.634795 ELOG: Event(92) added with size 9 at 2023-08-16 13:48:52 UTC
1669 13:49:05.641287 ELOG: Event(93) added with size 9 at 2023-08-16 13:48:52 UTC
1670 13:49:05.648003 ELOG: Event(9A) added with size 9 at 2023-08-16 13:48:52 UTC
1671 13:49:05.654572 ELOG: Event(9E) added with size 10 at 2023-08-16 13:48:52 UTC
1672 13:49:05.661563 ELOG: Event(9F) added with size 14 at 2023-08-16 13:48:52 UTC
1673 13:49:05.664508 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1674 13:49:05.671857 ELOG: Event(A1) added with size 10 at 2023-08-16 13:48:52 UTC
1675 13:49:05.681422 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 13:49:05.688046 ELOG: Event(A0) added with size 9 at 2023-08-16 13:48:52 UTC
1677 13:49:05.691507 elog_add_boot_reason: Logged dev mode boot
1678 13:49:05.691593 Finalize devices...
1679 13:49:05.694678 PCI: 00:17.0 final
1680 13:49:05.698043 Devices finalized
1681 13:49:05.701428 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1682 13:49:05.708064 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1683 13:49:05.711364 ME: HFSTS1 : 0x90000245
1684 13:49:05.714557 ME: HFSTS2 : 0x3B850126
1685 13:49:05.721171 ME: HFSTS3 : 0x00000020
1686 13:49:05.724659 ME: HFSTS4 : 0x00004800
1687 13:49:05.727821 ME: HFSTS5 : 0x00000000
1688 13:49:05.731165 ME: HFSTS6 : 0x40400006
1689 13:49:05.734344 ME: Manufacturing Mode : NO
1690 13:49:05.737699 ME: FW Partition Table : OK
1691 13:49:05.741450 ME: Bringup Loader Failure : NO
1692 13:49:05.744599 ME: Firmware Init Complete : YES
1693 13:49:05.747841 ME: Boot Options Present : NO
1694 13:49:05.750908 ME: Update In Progress : NO
1695 13:49:05.754275 ME: D0i3 Support : YES
1696 13:49:05.757624 ME: Low Power State Enabled : NO
1697 13:49:05.761411 ME: CPU Replaced : NO
1698 13:49:05.764269 ME: CPU Replacement Valid : YES
1699 13:49:05.767759 ME: Current Working State : 5
1700 13:49:05.770974 ME: Current Operation State : 1
1701 13:49:05.774465 ME: Current Operation Mode : 0
1702 13:49:05.777634 ME: Error Code : 0
1703 13:49:05.780844 ME: CPU Debug Disabled : YES
1704 13:49:05.784209 ME: TXT Support : NO
1705 13:49:05.790730 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1706 13:49:05.794230 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 13:49:05.797609 CBFS @ c08000 size 3f8000
1708 13:49:05.803997 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 13:49:05.807786 CBFS: Locating 'fallback/dsdt.aml'
1710 13:49:05.810620 CBFS: Found @ offset 10bb80 size 3fa5
1711 13:49:05.817470 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1712 13:49:05.820931 CBFS @ c08000 size 3f8000
1713 13:49:05.824283 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1714 13:49:05.827186 CBFS: Locating 'fallback/slic'
1715 13:49:05.832074 CBFS: 'fallback/slic' not found.
1716 13:49:05.838508 ACPI: Writing ACPI tables at 99b3e000.
1717 13:49:05.838603 ACPI: * FACS
1718 13:49:05.841642 ACPI: * DSDT
1719 13:49:05.845484 Ramoops buffer: 0x100000@0x99a3d000.
1720 13:49:05.848616 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1721 13:49:05.854940 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1722 13:49:05.858603 Google Chrome EC: version:
1723 13:49:05.861596 ro: helios_v2.0.2659-56403530b
1724 13:49:05.865017 rw: helios_v2.0.2849-c41de27e7d
1725 13:49:05.865134 running image: 1
1726 13:49:05.869531 ACPI: * FADT
1727 13:49:05.869648 SCI is IRQ9
1728 13:49:05.875695 ACPI: added table 1/32, length now 40
1729 13:49:05.875810 ACPI: * SSDT
1730 13:49:05.879159 Found 1 CPU(s) with 8 core(s) each.
1731 13:49:05.882362 Error: Could not locate 'wifi_sar' in VPD.
1732 13:49:05.889210 Checking CBFS for default SAR values
1733 13:49:05.892447 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1734 13:49:05.895800 CBFS @ c08000 size 3f8000
1735 13:49:05.902410 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1736 13:49:05.905689 CBFS: Locating 'wifi_sar_defaults.hex'
1737 13:49:05.908981 CBFS: Found @ offset 5fac0 size 77
1738 13:49:05.912339 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1739 13:49:05.919132 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1740 13:49:05.922337 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1741 13:49:05.929148 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1742 13:49:05.932280 failed to find key in VPD: dsm_calib_r0_0
1743 13:49:05.942471 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1744 13:49:05.945378 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1745 13:49:05.948832 failed to find key in VPD: dsm_calib_r0_1
1746 13:49:05.958619 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1747 13:49:05.965325 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1748 13:49:05.968416 failed to find key in VPD: dsm_calib_r0_2
1749 13:49:05.978338 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1750 13:49:05.981651 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1751 13:49:05.988372 failed to find key in VPD: dsm_calib_r0_3
1752 13:49:05.994963 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1753 13:49:06.001311 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1754 13:49:06.004862 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1755 13:49:06.008291 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1756 13:49:06.012034 EC returned error result code 1
1757 13:49:06.015951 EC returned error result code 1
1758 13:49:06.019708 EC returned error result code 1
1759 13:49:06.026302 PS2K: Bad resp from EC. Vivaldi disabled!
1760 13:49:06.029534 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1761 13:49:06.036235 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1762 13:49:06.042770 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1763 13:49:06.046164 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1764 13:49:06.052726 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1765 13:49:06.059195 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1766 13:49:06.065995 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1767 13:49:06.069598 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1768 13:49:06.075980 ACPI: added table 2/32, length now 44
1769 13:49:06.076122 ACPI: * MCFG
1770 13:49:06.079066 ACPI: added table 3/32, length now 48
1771 13:49:06.082445 ACPI: * TPM2
1772 13:49:06.085678 TPM2 log created at 99a2d000
1773 13:49:06.089360 ACPI: added table 4/32, length now 52
1774 13:49:06.089489 ACPI: * MADT
1775 13:49:06.092714 SCI is IRQ9
1776 13:49:06.096025 ACPI: added table 5/32, length now 56
1777 13:49:06.096117 current = 99b43ac0
1778 13:49:06.099211 ACPI: * DMAR
1779 13:49:06.102509 ACPI: added table 6/32, length now 60
1780 13:49:06.105759 ACPI: * IGD OpRegion
1781 13:49:06.105840 GMA: Found VBT in CBFS
1782 13:49:06.109220 GMA: Found valid VBT in CBFS
1783 13:49:06.112473 ACPI: added table 7/32, length now 64
1784 13:49:06.115653 ACPI: * HPET
1785 13:49:06.119150 ACPI: added table 8/32, length now 68
1786 13:49:06.119272 ACPI: done.
1787 13:49:06.122427 ACPI tables: 31744 bytes.
1788 13:49:06.126250 smbios_write_tables: 99a2c000
1789 13:49:06.129787 EC returned error result code 3
1790 13:49:06.132970 Couldn't obtain OEM name from CBI
1791 13:49:06.136208 Create SMBIOS type 17
1792 13:49:06.139615 PCI: 00:00.0 (Intel Cannonlake)
1793 13:49:06.143157 PCI: 00:14.3 (Intel WiFi)
1794 13:49:06.146462 SMBIOS tables: 939 bytes.
1795 13:49:06.149756 Writing table forward entry at 0x00000500
1796 13:49:06.156307 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1797 13:49:06.159368 Writing coreboot table at 0x99b62000
1798 13:49:06.165877 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1799 13:49:06.169635 1. 0000000000001000-000000000009ffff: RAM
1800 13:49:06.172483 2. 00000000000a0000-00000000000fffff: RESERVED
1801 13:49:06.179250 3. 0000000000100000-0000000099a2bfff: RAM
1802 13:49:06.183009 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1803 13:49:06.189362 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1804 13:49:06.195867 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1805 13:49:06.199051 7. 000000009a000000-000000009f7fffff: RESERVED
1806 13:49:06.202718 8. 00000000e0000000-00000000efffffff: RESERVED
1807 13:49:06.209177 9. 00000000fc000000-00000000fc000fff: RESERVED
1808 13:49:06.212583 10. 00000000fe000000-00000000fe00ffff: RESERVED
1809 13:49:06.218997 11. 00000000fed10000-00000000fed17fff: RESERVED
1810 13:49:06.222565 12. 00000000fed80000-00000000fed83fff: RESERVED
1811 13:49:06.229162 13. 00000000fed90000-00000000fed91fff: RESERVED
1812 13:49:06.232539 14. 00000000feda0000-00000000feda1fff: RESERVED
1813 13:49:06.235600 15. 0000000100000000-000000045e7fffff: RAM
1814 13:49:06.242174 Graphics framebuffer located at 0xc0000000
1815 13:49:06.245758 Passing 5 GPIOs to payload:
1816 13:49:06.248671 NAME | PORT | POLARITY | VALUE
1817 13:49:06.255237 write protect | undefined | high | low
1818 13:49:06.258468 lid | undefined | high | high
1819 13:49:06.265527 power | undefined | high | low
1820 13:49:06.268456 oprom | undefined | high | low
1821 13:49:06.275266 EC in RW | 0x000000cb | high | low
1822 13:49:06.275386 Board ID: 4
1823 13:49:06.281784 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1824 13:49:06.285310 CBFS @ c08000 size 3f8000
1825 13:49:06.292001 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1826 13:49:06.295269 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1827 13:49:06.298492 coreboot table: 1492 bytes.
1828 13:49:06.301953 IMD ROOT 0. 99fff000 00001000
1829 13:49:06.305389 IMD SMALL 1. 99ffe000 00001000
1830 13:49:06.308369 FSP MEMORY 2. 99c4e000 003b0000
1831 13:49:06.311602 CONSOLE 3. 99c2e000 00020000
1832 13:49:06.315018 FMAP 4. 99c2d000 0000054e
1833 13:49:06.318769 TIME STAMP 5. 99c2c000 00000910
1834 13:49:06.321926 VBOOT WORK 6. 99c18000 00014000
1835 13:49:06.325125 MRC DATA 7. 99c16000 00001958
1836 13:49:06.328457 ROMSTG STCK 8. 99c15000 00001000
1837 13:49:06.331759 AFTER CAR 9. 99c0b000 0000a000
1838 13:49:06.335154 RAMSTAGE 10. 99baf000 0005c000
1839 13:49:06.338436 REFCODE 11. 99b7a000 00035000
1840 13:49:06.341846 SMM BACKUP 12. 99b6a000 00010000
1841 13:49:06.345320 COREBOOT 13. 99b62000 00008000
1842 13:49:06.348670 ACPI 14. 99b3e000 00024000
1843 13:49:06.351808 ACPI GNVS 15. 99b3d000 00001000
1844 13:49:06.355373 RAMOOPS 16. 99a3d000 00100000
1845 13:49:06.358591 TPM2 TCGLOG17. 99a2d000 00010000
1846 13:49:06.361635 SMBIOS 18. 99a2c000 00000800
1847 13:49:06.364942 IMD small region:
1848 13:49:06.368430 IMD ROOT 0. 99ffec00 00000400
1849 13:49:06.371660 FSP RUNTIME 1. 99ffebe0 00000004
1850 13:49:06.375295 EC HOSTEVENT 2. 99ffebc0 00000008
1851 13:49:06.378187 POWER STATE 3. 99ffeb80 00000040
1852 13:49:06.382177 ROMSTAGE 4. 99ffeb60 00000004
1853 13:49:06.384954 MEM INFO 5. 99ffe9a0 000001b9
1854 13:49:06.388065 VPD 6. 99ffe920 0000006c
1855 13:49:06.391609 MTRR: Physical address space:
1856 13:49:06.398003 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1857 13:49:06.405013 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1858 13:49:06.411483 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1859 13:49:06.418164 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1860 13:49:06.424728 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1861 13:49:06.427873 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1862 13:49:06.434898 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1863 13:49:06.441544 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 13:49:06.444924 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 13:49:06.448172 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 13:49:06.450998 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 13:49:06.454352 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 13:49:06.461255 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 13:49:06.464663 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 13:49:06.467815 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 13:49:06.471269 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 13:49:06.477745 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 13:49:06.481011 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 13:49:06.484406 call enable_fixed_mtrr()
1875 13:49:06.487575 CPU physical address size: 39 bits
1876 13:49:06.490815 MTRR: default type WB/UC MTRR counts: 6/8.
1877 13:49:06.494134 MTRR: WB selected as default type.
1878 13:49:06.500931 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1879 13:49:06.507451 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1880 13:49:06.514272 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1881 13:49:06.520898 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1882 13:49:06.527153 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1883 13:49:06.533758 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1884 13:49:06.537478 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 13:49:06.540784 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 13:49:06.547394 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 13:49:06.550260 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 13:49:06.553631 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 13:49:06.556780 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 13:49:06.563707 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 13:49:06.567061 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 13:49:06.570313 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 13:49:06.573489 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 13:49:06.576820 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 13:49:06.583806 MTRR: Fixed MSR 0x250 0x0606060606060606
1896 13:49:06.586628 call enable_fixed_mtrr()
1897 13:49:06.590046 MTRR: Fixed MSR 0x258 0x0606060606060606
1898 13:49:06.593774 MTRR: Fixed MSR 0x259 0x0000000000000000
1899 13:49:06.596634 MTRR: Fixed MSR 0x268 0x0606060606060606
1900 13:49:06.603394 MTRR: Fixed MSR 0x269 0x0606060606060606
1901 13:49:06.606881 MTRR: Fixed MSR 0x26a 0x0606060606060606
1902 13:49:06.610086 MTRR: Fixed MSR 0x26b 0x0606060606060606
1903 13:49:06.613265 MTRR: Fixed MSR 0x26c 0x0606060606060606
1904 13:49:06.616746 MTRR: Fixed MSR 0x26d 0x0606060606060606
1905 13:49:06.623613 MTRR: Fixed MSR 0x26e 0x0606060606060606
1906 13:49:06.626490 MTRR: Fixed MSR 0x26f 0x0606060606060606
1907 13:49:06.629944 CPU physical address size: 39 bits
1908 13:49:06.633222 call enable_fixed_mtrr()
1909 13:49:06.636491 MTRR: Fixed MSR 0x250 0x0606060606060606
1910 13:49:06.639790 MTRR: Fixed MSR 0x258 0x0606060606060606
1911 13:49:06.646675 MTRR: Fixed MSR 0x259 0x0000000000000000
1912 13:49:06.649865 MTRR: Fixed MSR 0x268 0x0606060606060606
1913 13:49:06.653387 MTRR: Fixed MSR 0x269 0x0606060606060606
1914 13:49:06.656693 MTRR: Fixed MSR 0x26a 0x0606060606060606
1915 13:49:06.663200 MTRR: Fixed MSR 0x26b 0x0606060606060606
1916 13:49:06.666451 MTRR: Fixed MSR 0x26c 0x0606060606060606
1917 13:49:06.669641 MTRR: Fixed MSR 0x26d 0x0606060606060606
1918 13:49:06.673419 MTRR: Fixed MSR 0x26e 0x0606060606060606
1919 13:49:06.676705 MTRR: Fixed MSR 0x26f 0x0606060606060606
1920 13:49:06.683047 MTRR: Fixed MSR 0x250 0x0606060606060606
1921 13:49:06.686086 call enable_fixed_mtrr()
1922 13:49:06.689370 MTRR: Fixed MSR 0x258 0x0606060606060606
1923 13:49:06.693357 MTRR: Fixed MSR 0x259 0x0000000000000000
1924 13:49:06.696560 MTRR: Fixed MSR 0x268 0x0606060606060606
1925 13:49:06.699835 MTRR: Fixed MSR 0x269 0x0606060606060606
1926 13:49:06.706325 MTRR: Fixed MSR 0x26a 0x0606060606060606
1927 13:49:06.709633 MTRR: Fixed MSR 0x26b 0x0606060606060606
1928 13:49:06.712912 MTRR: Fixed MSR 0x26c 0x0606060606060606
1929 13:49:06.716237 MTRR: Fixed MSR 0x26d 0x0606060606060606
1930 13:49:06.722641 MTRR: Fixed MSR 0x26e 0x0606060606060606
1931 13:49:06.726321 MTRR: Fixed MSR 0x26f 0x0606060606060606
1932 13:49:06.729464 CPU physical address size: 39 bits
1933 13:49:06.732654 call enable_fixed_mtrr()
1934 13:49:06.735987 MTRR: Fixed MSR 0x250 0x0606060606060606
1935 13:49:06.739664 MTRR: Fixed MSR 0x250 0x0606060606060606
1936 13:49:06.745984 MTRR: Fixed MSR 0x258 0x0606060606060606
1937 13:49:06.749125 MTRR: Fixed MSR 0x259 0x0000000000000000
1938 13:49:06.752667 MTRR: Fixed MSR 0x268 0x0606060606060606
1939 13:49:06.755959 MTRR: Fixed MSR 0x269 0x0606060606060606
1940 13:49:06.762276 MTRR: Fixed MSR 0x26a 0x0606060606060606
1941 13:49:06.766100 MTRR: Fixed MSR 0x26b 0x0606060606060606
1942 13:49:06.769102 MTRR: Fixed MSR 0x26c 0x0606060606060606
1943 13:49:06.772736 MTRR: Fixed MSR 0x26d 0x0606060606060606
1944 13:49:06.775646 MTRR: Fixed MSR 0x26e 0x0606060606060606
1945 13:49:06.782752 MTRR: Fixed MSR 0x26f 0x0606060606060606
1946 13:49:06.785574 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 13:49:06.789245 call enable_fixed_mtrr()
1948 13:49:06.792415 MTRR: Fixed MSR 0x259 0x0000000000000000
1949 13:49:06.795868 MTRR: Fixed MSR 0x268 0x0606060606060606
1950 13:49:06.798759 MTRR: Fixed MSR 0x269 0x0606060606060606
1951 13:49:06.805609 MTRR: Fixed MSR 0x26a 0x0606060606060606
1952 13:49:06.809016 MTRR: Fixed MSR 0x26b 0x0606060606060606
1953 13:49:06.812102 MTRR: Fixed MSR 0x26c 0x0606060606060606
1954 13:49:06.815406 MTRR: Fixed MSR 0x26d 0x0606060606060606
1955 13:49:06.821954 MTRR: Fixed MSR 0x26e 0x0606060606060606
1956 13:49:06.825320 MTRR: Fixed MSR 0x26f 0x0606060606060606
1957 13:49:06.828984 CPU physical address size: 39 bits
1958 13:49:06.831929 call enable_fixed_mtrr()
1959 13:49:06.832047
1960 13:49:06.832149 MTRR check
1961 13:49:06.835513 Fixed MTRRs : Enabled
1962 13:49:06.838707 Variable MTRRs: Enabled
1963 13:49:06.838823
1964 13:49:06.842074 MTRR: Fixed MSR 0x250 0x0606060606060606
1965 13:49:06.848807 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 3
1966 13:49:06.851826 MTRR: Fixed MSR 0x258 0x0606060606060606
1967 13:49:06.855191 MTRR: Fixed MSR 0x259 0x0000000000000000
1968 13:49:06.858799 MTRR: Fixed MSR 0x268 0x0606060606060606
1969 13:49:06.864967 MTRR: Fixed MSR 0x269 0x0606060606060606
1970 13:49:06.868459 MTRR: Fixed MSR 0x26a 0x0606060606060606
1971 13:49:06.871724 MTRR: Fixed MSR 0x26b 0x0606060606060606
1972 13:49:06.875103 MTRR: Fixed MSR 0x26c 0x0606060606060606
1973 13:49:06.881744 MTRR: Fixed MSR 0x26d 0x0606060606060606
1974 13:49:06.885347 MTRR: Fixed MSR 0x26e 0x0606060606060606
1975 13:49:06.888289 MTRR: Fixed MSR 0x26f 0x0606060606060606
1976 13:49:06.894682 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1977 13:49:06.894778 call enable_fixed_mtrr()
1978 13:49:06.898514 CBFS @ c08000 size 3f8000
1979 13:49:06.905073 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1980 13:49:06.907905 CPU physical address size: 39 bits
1981 13:49:06.911629 CBFS: Locating 'fallback/payload'
1982 13:49:06.914861 CPU physical address size: 39 bits
1983 13:49:06.917968 CPU physical address size: 39 bits
1984 13:49:06.921070 CBFS: Found @ offset 1c96c0 size 3f798
1985 13:49:06.928239 CPU physical address size: 39 bits
1986 13:49:06.931084 Checking segment from ROM address 0xffdd16f8
1987 13:49:06.935046 Checking segment from ROM address 0xffdd1714
1988 13:49:06.941019 Loading segment from ROM address 0xffdd16f8
1989 13:49:06.941142 code (compression=0)
1990 13:49:06.951348 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1991 13:49:06.957853 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1992 13:49:06.961277 it's not compressed!
1993 13:49:07.053791 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1994 13:49:07.060627 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1995 13:49:07.063921 Loading segment from ROM address 0xffdd1714
1996 13:49:07.067196 Entry Point 0x30000000
1997 13:49:07.070612 Loaded segments
1998 13:49:07.075952 Finalizing chipset.
1999 13:49:07.079328 Finalizing SMM.
2000 13:49:07.082564 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2001 13:49:07.085921 mp_park_aps done after 0 msecs.
2002 13:49:07.092399 Jumping to boot code at 30000000(99b62000)
2003 13:49:07.099304 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2004 13:49:07.099861
2005 13:49:07.100212
2006 13:49:07.100618
2007 13:49:07.102640 Starting depthcharge on Helios...
2008 13:49:07.103285
2009 13:49:07.104668 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2010 13:49:07.105332 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2011 13:49:07.105923 Setting prompt string to ['hatch:']
2012 13:49:07.106525 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2013 13:49:07.112583 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2014 13:49:07.113276
2015 13:49:07.119218 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2016 13:49:07.119684
2017 13:49:07.125933 board_setup: Info: eMMC controller not present; skipping
2018 13:49:07.126366
2019 13:49:07.129236 New NVMe Controller 0x30053ac0 @ 00:1d:00
2020 13:49:07.129886
2021 13:49:07.135860 board_setup: Info: SDHCI controller not present; skipping
2022 13:49:07.136306
2023 13:49:07.139169 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2024 13:49:07.142606
2025 13:49:07.143197 Wipe memory regions:
2026 13:49:07.143661
2027 13:49:07.145792 [0x00000000001000, 0x000000000a0000)
2028 13:49:07.146327
2029 13:49:07.149013 [0x00000000100000, 0x00000030000000)
2030 13:49:07.215124
2031 13:49:07.218329 [0x00000030657430, 0x00000099a2c000)
2032 13:49:07.364997
2033 13:49:07.368130 [0x00000100000000, 0x0000045e800000)
2034 13:49:08.823932
2035 13:49:08.824161 R8152: Initializing
2036 13:49:08.824302
2037 13:49:08.827191 Version 9 (ocp_data = 6010)
2038 13:49:08.831632
2039 13:49:08.831755 R8152: Done initializing
2040 13:49:08.831859
2041 13:49:08.834831 Adding net device
2042 13:49:09.317360
2043 13:49:09.317542 R8152: Initializing
2044 13:49:09.317664
2045 13:49:09.320627 Version 6 (ocp_data = 5c30)
2046 13:49:09.320761
2047 13:49:09.324260 R8152: Done initializing
2048 13:49:09.324369
2049 13:49:09.327483 net_add_device: Attemp to include the same device
2050 13:49:09.331150
2051 13:49:09.338110 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2052 13:49:09.338227
2053 13:49:09.338324
2054 13:49:09.338393
2055 13:49:09.338686 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 13:49:09.439080 hatch: tftpboot 192.168.201.1 11299532/tftp-deploy-493evphv/kernel/bzImage 11299532/tftp-deploy-493evphv/kernel/cmdline 11299532/tftp-deploy-493evphv/ramdisk/ramdisk.cpio.gz
2058 13:49:09.439293 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 13:49:09.439425 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2060 13:49:09.443634 tftpboot 192.168.201.1 11299532/tftp-deploy-493evphv/kernel/bzImloy-493evphv/kernel/cmdline 11299532/tftp-deploy-493evphv/ramdisk/ramdisk.cpio.gz
2061 13:49:09.443755
2062 13:49:09.443870 Waiting for link
2063 13:49:09.644636
2064 13:49:09.644810 done.
2065 13:49:09.644919
2066 13:49:09.645021 MAC: 00:24:32:50:1a:59
2067 13:49:09.645116
2068 13:49:09.647805 Sending DHCP discover... done.
2069 13:49:09.647916
2070 13:49:09.650900 Waiting for reply... done.
2071 13:49:09.651029
2072 13:49:09.654226 Sending DHCP request... done.
2073 13:49:09.654341
2074 13:49:09.657587 Waiting for reply... done.
2075 13:49:09.657698
2076 13:49:09.661264 My ip is 192.168.201.14
2077 13:49:09.661383
2078 13:49:09.664289 The DHCP server ip is 192.168.201.1
2079 13:49:09.664380
2080 13:49:09.667703 TFTP server IP predefined by user: 192.168.201.1
2081 13:49:09.667792
2082 13:49:09.673944 Bootfile predefined by user: 11299532/tftp-deploy-493evphv/kernel/bzImage
2083 13:49:09.674057
2084 13:49:09.677304 Sending tftp read request... done.
2085 13:49:09.677411
2086 13:49:09.684740 Waiting for the transfer...
2087 13:49:09.684858
2088 13:49:10.196231 00000000 ################################################################
2089 13:49:10.196387
2090 13:49:10.706978 00080000 ################################################################
2091 13:49:10.707139
2092 13:49:11.217067 00100000 ################################################################
2093 13:49:11.217213
2094 13:49:11.730649 00180000 ################################################################
2095 13:49:11.730795
2096 13:49:12.242055 00200000 ################################################################
2097 13:49:12.242203
2098 13:49:12.754155 00280000 ################################################################
2099 13:49:12.754330
2100 13:49:13.265665 00300000 ################################################################
2101 13:49:13.265827
2102 13:49:13.776685 00380000 ################################################################
2103 13:49:13.776836
2104 13:49:14.288787 00400000 ################################################################
2105 13:49:14.288933
2106 13:49:14.801684 00480000 ################################################################
2107 13:49:14.801827
2108 13:49:15.312094 00500000 ################################################################
2109 13:49:15.312243
2110 13:49:15.821701 00580000 ################################################################
2111 13:49:15.821859
2112 13:49:16.332211 00600000 ################################################################
2113 13:49:16.332366
2114 13:49:16.858305 00680000 ################################################################
2115 13:49:16.858472
2116 13:49:17.370048 00700000 ################################################################
2117 13:49:17.370203
2118 13:49:17.880274 00780000 ################################################################
2119 13:49:17.880464
2120 13:49:17.987410 00800000 ############## done.
2121 13:49:17.987612
2122 13:49:17.990992 The bootfile was 8499088 bytes long.
2123 13:49:17.991083
2124 13:49:17.994116 Sending tftp read request... done.
2125 13:49:17.994205
2126 13:49:17.997165 Waiting for the transfer...
2127 13:49:17.997255
2128 13:49:18.520952 00000000 ################################################################
2129 13:49:18.521104
2130 13:49:19.036339 00080000 ################################################################
2131 13:49:19.036485
2132 13:49:19.544998 00100000 ################################################################
2133 13:49:19.545175
2134 13:49:20.049817 00180000 ################################################################
2135 13:49:20.049971
2136 13:49:20.562275 00200000 ################################################################
2137 13:49:20.562433
2138 13:49:21.086850 00280000 ################################################################
2139 13:49:21.086997
2140 13:49:21.621182 00300000 ################################################################
2141 13:49:21.621323
2142 13:49:22.138528 00380000 ################################################################
2143 13:49:22.138698
2144 13:49:22.649769 00400000 ################################################################
2145 13:49:22.649916
2146 13:49:23.167144 00480000 ################################################################
2147 13:49:23.167323
2148 13:49:23.677731 00500000 ################################################################ done.
2149 13:49:23.677919
2150 13:49:23.681545 Sending tftp read request... done.
2151 13:49:23.681661
2152 13:49:23.684455 Waiting for the transfer...
2153 13:49:23.684550
2154 13:49:23.687938 00000000 # done.
2155 13:49:23.688021
2156 13:49:23.694569 Command line loaded dynamically from TFTP file: 11299532/tftp-deploy-493evphv/kernel/cmdline
2157 13:49:23.694690
2158 13:49:23.724530 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11299532/extract-nfsrootfs-b3rv1pll,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2159 13:49:23.724675
2160 13:49:23.730956 ec_init(0): CrosEC protocol v3 supported (256, 256)
2161 13:49:23.735079
2162 13:49:23.738490 Shutting down all USB controllers.
2163 13:49:23.738603
2164 13:49:23.738703 Removing current net device
2165 13:49:23.742208
2166 13:49:23.742301 Finalizing coreboot
2167 13:49:23.742373
2168 13:49:23.749089 Exiting depthcharge with code 4 at timestamp: 23964411
2169 13:49:23.749180
2170 13:49:23.749252
2171 13:49:23.749319 Starting kernel ...
2172 13:49:23.749383
2173 13:49:23.749446
2174 13:49:23.749824 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2175 13:49:23.749936 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2176 13:49:23.750020 Setting prompt string to ['Linux version [0-9]']
2177 13:49:23.750094 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2178 13:49:23.750171 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2180 13:53:48.750817 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2182 13:53:48.751877 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2184 13:53:48.752700 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2187 13:53:48.754102 end: 2 depthcharge-action (duration 00:05:00) [common]
2189 13:53:48.755690 Cleaning after the job
2190 13:53:48.755795 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299532/tftp-deploy-493evphv/ramdisk
2191 13:53:48.758377 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299532/tftp-deploy-493evphv/kernel
2192 13:53:48.760231 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299532/tftp-deploy-493evphv/nfsrootfs
2193 13:53:48.845219 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299532/tftp-deploy-493evphv/modules
2194 13:53:48.845742 start: 5.1 power-off (timeout 00:00:30) [common]
2195 13:53:48.845937 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2196 13:53:48.926646 >> Command sent successfully.
2197 13:53:48.933116 Returned 0 in 0 seconds
2198 13:53:49.034266 end: 5.1 power-off (duration 00:00:00) [common]
2200 13:53:49.035876 start: 5.2 read-feedback (timeout 00:10:00) [common]
2201 13:53:49.037154 Listened to connection for namespace 'common' for up to 1s
2202 13:53:50.037875 Finalising connection for namespace 'common'
2203 13:53:50.038606 Disconnecting from shell: Finalise
2204 13:53:50.039099
2205 13:53:50.140313 end: 5.2 read-feedback (duration 00:00:01) [common]
2206 13:53:50.140958 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11299532
2207 13:53:50.487387 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11299532
2208 13:53:50.487605 JobError: Your job cannot terminate cleanly.