Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 13:49:44.542733 lava-dispatcher, installed at version: 2023.06
2 13:49:44.542961 start: 0 validate
3 13:49:44.543110 Start time: 2023-08-16 13:49:44.543102+00:00 (UTC)
4 13:49:44.543257 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:49:44.543411 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 13:49:44.794511 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:49:44.794699 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2312-g74888f4b13f0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:49:49.796305 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:49:49.796551 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:49:49.798049 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:49:49.798226 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2312-g74888f4b13f0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 13:49:50.298868 validate duration: 5.76
14 13:49:50.299234 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:49:50.299368 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:49:50.299486 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:49:50.299669 Not decompressing ramdisk as can be used compressed.
18 13:49:50.299789 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 13:49:50.299878 saving as /var/lib/lava/dispatcher/tmp/11299543/tftp-deploy-2wyjt3es/ramdisk/initrd.cpio.gz
20 13:49:50.299967 total size: 5432690 (5 MB)
21 13:49:50.301380 progress 0 % (0 MB)
22 13:49:50.303751 progress 5 % (0 MB)
23 13:49:50.305563 progress 10 % (0 MB)
24 13:49:50.307326 progress 15 % (0 MB)
25 13:49:50.309273 progress 20 % (1 MB)
26 13:49:50.310956 progress 25 % (1 MB)
27 13:49:50.312544 progress 30 % (1 MB)
28 13:49:50.314283 progress 35 % (1 MB)
29 13:49:50.315715 progress 40 % (2 MB)
30 13:49:50.317155 progress 45 % (2 MB)
31 13:49:50.318590 progress 50 % (2 MB)
32 13:49:50.320195 progress 55 % (2 MB)
33 13:49:50.321563 progress 60 % (3 MB)
34 13:49:50.322949 progress 65 % (3 MB)
35 13:49:50.324557 progress 70 % (3 MB)
36 13:49:50.325908 progress 75 % (3 MB)
37 13:49:50.327323 progress 80 % (4 MB)
38 13:49:50.328730 progress 85 % (4 MB)
39 13:49:50.330264 progress 90 % (4 MB)
40 13:49:50.331866 progress 95 % (4 MB)
41 13:49:50.333450 progress 100 % (5 MB)
42 13:49:50.333692 5 MB downloaded in 0.03 s (153.61 MB/s)
43 13:49:50.333888 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:49:50.334126 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:49:50.334211 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:49:50.334293 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:49:50.334430 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2312-g74888f4b13f0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 13:49:50.334532 saving as /var/lib/lava/dispatcher/tmp/11299543/tftp-deploy-2wyjt3es/kernel/bzImage
50 13:49:50.334596 total size: 8499088 (8 MB)
51 13:49:50.334658 No compression specified
52 13:49:50.335755 progress 0 % (0 MB)
53 13:49:50.337924 progress 5 % (0 MB)
54 13:49:50.340364 progress 10 % (0 MB)
55 13:49:50.342663 progress 15 % (1 MB)
56 13:49:50.344968 progress 20 % (1 MB)
57 13:49:50.347221 progress 25 % (2 MB)
58 13:49:50.349538 progress 30 % (2 MB)
59 13:49:50.351834 progress 35 % (2 MB)
60 13:49:50.354090 progress 40 % (3 MB)
61 13:49:50.356536 progress 45 % (3 MB)
62 13:49:50.358820 progress 50 % (4 MB)
63 13:49:50.361122 progress 55 % (4 MB)
64 13:49:50.363322 progress 60 % (4 MB)
65 13:49:50.365528 progress 65 % (5 MB)
66 13:49:50.367748 progress 70 % (5 MB)
67 13:49:50.369944 progress 75 % (6 MB)
68 13:49:50.372190 progress 80 % (6 MB)
69 13:49:50.374399 progress 85 % (6 MB)
70 13:49:50.376597 progress 90 % (7 MB)
71 13:49:50.378790 progress 95 % (7 MB)
72 13:49:50.381057 progress 100 % (8 MB)
73 13:49:50.381209 8 MB downloaded in 0.05 s (173.90 MB/s)
74 13:49:50.381351 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:49:50.381585 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:49:50.381671 start: 1.3 download-retry (timeout 00:10:00) [common]
78 13:49:50.381758 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 13:49:50.381878 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 13:49:50.381972 saving as /var/lib/lava/dispatcher/tmp/11299543/tftp-deploy-2wyjt3es/nfsrootfs/full.rootfs.tar
81 13:49:50.382078 total size: 133380384 (127 MB)
82 13:49:50.382156 Using unxz to decompress xz
83 13:49:50.386327 progress 0 % (0 MB)
84 13:49:50.752728 progress 5 % (6 MB)
85 13:49:51.137807 progress 10 % (12 MB)
86 13:49:51.447425 progress 15 % (19 MB)
87 13:49:51.640687 progress 20 % (25 MB)
88 13:49:51.898756 progress 25 % (31 MB)
89 13:49:52.263574 progress 30 % (38 MB)
90 13:49:52.624528 progress 35 % (44 MB)
91 13:49:53.048675 progress 40 % (50 MB)
92 13:49:53.450099 progress 45 % (57 MB)
93 13:49:53.821274 progress 50 % (63 MB)
94 13:49:54.212857 progress 55 % (69 MB)
95 13:49:54.587345 progress 60 % (76 MB)
96 13:49:54.972346 progress 65 % (82 MB)
97 13:49:55.356712 progress 70 % (89 MB)
98 13:49:55.749037 progress 75 % (95 MB)
99 13:49:56.214455 progress 80 % (101 MB)
100 13:49:56.663285 progress 85 % (108 MB)
101 13:49:56.942424 progress 90 % (114 MB)
102 13:49:57.303560 progress 95 % (120 MB)
103 13:49:57.709371 progress 100 % (127 MB)
104 13:49:57.714911 127 MB downloaded in 7.33 s (17.35 MB/s)
105 13:49:57.715183 end: 1.3.1 http-download (duration 00:00:07) [common]
107 13:49:57.715455 end: 1.3 download-retry (duration 00:00:07) [common]
108 13:49:57.715545 start: 1.4 download-retry (timeout 00:09:53) [common]
109 13:49:57.715668 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 13:49:57.715827 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2312-g74888f4b13f0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 13:49:57.715901 saving as /var/lib/lava/dispatcher/tmp/11299543/tftp-deploy-2wyjt3es/modules/modules.tar
112 13:49:57.715962 total size: 253616 (0 MB)
113 13:49:57.716027 Using unxz to decompress xz
114 13:49:57.720583 progress 12 % (0 MB)
115 13:49:57.721062 progress 25 % (0 MB)
116 13:49:57.721314 progress 38 % (0 MB)
117 13:49:57.723060 progress 51 % (0 MB)
118 13:49:57.725050 progress 64 % (0 MB)
119 13:49:57.726910 progress 77 % (0 MB)
120 13:49:57.729002 progress 90 % (0 MB)
121 13:49:57.730875 progress 100 % (0 MB)
122 13:49:57.736645 0 MB downloaded in 0.02 s (11.70 MB/s)
123 13:49:57.736924 end: 1.4.1 http-download (duration 00:00:00) [common]
125 13:49:57.737197 end: 1.4 download-retry (duration 00:00:00) [common]
126 13:49:57.737290 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 13:49:57.737388 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 13:49:59.926927 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11299543/extract-nfsrootfs-ppconxeo
129 13:49:59.927136 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 13:49:59.927236 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 13:49:59.927395 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e
132 13:49:59.927525 makedir: /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin
133 13:49:59.927671 makedir: /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/tests
134 13:49:59.927770 makedir: /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/results
135 13:49:59.927871 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-add-keys
136 13:49:59.928017 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-add-sources
137 13:49:59.928147 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-background-process-start
138 13:49:59.928276 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-background-process-stop
139 13:49:59.928402 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-common-functions
140 13:49:59.928530 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-echo-ipv4
141 13:49:59.928664 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-install-packages
142 13:49:59.928789 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-installed-packages
143 13:49:59.928912 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-os-build
144 13:49:59.929037 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-probe-channel
145 13:49:59.929160 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-probe-ip
146 13:49:59.929286 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-target-ip
147 13:49:59.929408 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-target-mac
148 13:49:59.929531 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-target-storage
149 13:49:59.929660 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-test-case
150 13:49:59.929826 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-test-event
151 13:49:59.929951 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-test-feedback
152 13:49:59.930076 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-test-raise
153 13:49:59.930199 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-test-reference
154 13:49:59.930324 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-test-runner
155 13:49:59.930448 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-test-set
156 13:49:59.930587 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-test-shell
157 13:49:59.930799 Updating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-install-packages (oe)
158 13:49:59.930965 Updating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/bin/lava-installed-packages (oe)
159 13:49:59.931087 Creating /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/environment
160 13:49:59.931181 LAVA metadata
161 13:49:59.931252 - LAVA_JOB_ID=11299543
162 13:49:59.931315 - LAVA_DISPATCHER_IP=192.168.201.1
163 13:49:59.931419 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 13:49:59.931485 skipped lava-vland-overlay
165 13:49:59.931561 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 13:49:59.931899 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 13:49:59.931965 skipped lava-multinode-overlay
168 13:49:59.932041 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 13:49:59.932120 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 13:49:59.932195 Loading test definitions
171 13:49:59.932284 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 13:49:59.932357 Using /lava-11299543 at stage 0
173 13:49:59.932670 uuid=11299543_1.5.2.3.1 testdef=None
174 13:49:59.932758 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 13:49:59.932843 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 13:49:59.933355 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 13:49:59.933576 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 13:49:59.934215 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 13:49:59.934441 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 13:49:59.935058 runner path: /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/0/tests/0_dmesg test_uuid 11299543_1.5.2.3.1
183 13:49:59.935214 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 13:49:59.935435 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 13:49:59.935507 Using /lava-11299543 at stage 1
187 13:49:59.935827 uuid=11299543_1.5.2.3.5 testdef=None
188 13:49:59.935915 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 13:49:59.935998 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 13:49:59.936465 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 13:49:59.936678 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 13:49:59.937316 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 13:49:59.937540 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 13:49:59.938160 runner path: /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/1/tests/1_bootrr test_uuid 11299543_1.5.2.3.5
197 13:49:59.938318 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 13:49:59.938518 Creating lava-test-runner.conf files
200 13:49:59.938580 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/0 for stage 0
201 13:49:59.938669 - 0_dmesg
202 13:49:59.938747 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299543/lava-overlay-00bksx1e/lava-11299543/1 for stage 1
203 13:49:59.938837 - 1_bootrr
204 13:49:59.938931 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 13:49:59.939015 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 13:49:59.946253 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 13:49:59.946380 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 13:49:59.946467 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 13:49:59.946563 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 13:49:59.946646 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 13:50:00.084890 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 13:50:00.085286 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 13:50:00.085409 extracting modules file /var/lib/lava/dispatcher/tmp/11299543/tftp-deploy-2wyjt3es/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299543/extract-nfsrootfs-ppconxeo
214 13:50:00.099318 extracting modules file /var/lib/lava/dispatcher/tmp/11299543/tftp-deploy-2wyjt3es/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299543/extract-overlay-ramdisk-kkwtwrco/ramdisk
215 13:50:00.113103 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 13:50:00.113270 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 13:50:00.113364 [common] Applying overlay to NFS
218 13:50:00.113436 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299543/compress-overlay-7qlo5a33/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11299543/extract-nfsrootfs-ppconxeo
219 13:50:00.122026 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 13:50:00.122182 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 13:50:00.122275 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 13:50:00.122363 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 13:50:00.122439 Building ramdisk /var/lib/lava/dispatcher/tmp/11299543/extract-overlay-ramdisk-kkwtwrco/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11299543/extract-overlay-ramdisk-kkwtwrco/ramdisk
224 13:50:00.193542 >> 26197 blocks
225 13:50:00.742186 rename /var/lib/lava/dispatcher/tmp/11299543/extract-overlay-ramdisk-kkwtwrco/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11299543/tftp-deploy-2wyjt3es/ramdisk/ramdisk.cpio.gz
226 13:50:00.742646 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 13:50:00.742783 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
228 13:50:00.742880 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
229 13:50:00.742977 No mkimage arch provided, not using FIT.
230 13:50:00.743067 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 13:50:00.743150 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 13:50:00.743250 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 13:50:00.743339 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
234 13:50:00.743420 No LXC device requested
235 13:50:00.743495 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 13:50:00.743577 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
237 13:50:00.743708 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 13:50:00.743787 Checking files for TFTP limit of 4294967296 bytes.
239 13:50:00.744199 end: 1 tftp-deploy (duration 00:00:10) [common]
240 13:50:00.744307 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 13:50:00.744395 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 13:50:00.744514 substitutions:
243 13:50:00.744581 - {DTB}: None
244 13:50:00.744643 - {INITRD}: 11299543/tftp-deploy-2wyjt3es/ramdisk/ramdisk.cpio.gz
245 13:50:00.744702 - {KERNEL}: 11299543/tftp-deploy-2wyjt3es/kernel/bzImage
246 13:50:00.744758 - {LAVA_MAC}: None
247 13:50:00.744814 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11299543/extract-nfsrootfs-ppconxeo
248 13:50:00.744870 - {NFS_SERVER_IP}: 192.168.201.1
249 13:50:00.744924 - {PRESEED_CONFIG}: None
250 13:50:00.744977 - {PRESEED_LOCAL}: None
251 13:50:00.745030 - {RAMDISK}: 11299543/tftp-deploy-2wyjt3es/ramdisk/ramdisk.cpio.gz
252 13:50:00.745083 - {ROOT_PART}: None
253 13:50:00.745136 - {ROOT}: None
254 13:50:00.745189 - {SERVER_IP}: 192.168.201.1
255 13:50:00.745242 - {TEE}: None
256 13:50:00.745294 Parsed boot commands:
257 13:50:00.745346 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 13:50:00.745520 Parsed boot commands: tftpboot 192.168.201.1 11299543/tftp-deploy-2wyjt3es/kernel/bzImage 11299543/tftp-deploy-2wyjt3es/kernel/cmdline 11299543/tftp-deploy-2wyjt3es/ramdisk/ramdisk.cpio.gz
259 13:50:00.745611 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 13:50:00.745696 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 13:50:00.745790 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 13:50:00.745872 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 13:50:00.745952 Not connected, no need to disconnect.
264 13:50:00.746035 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 13:50:00.746117 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 13:50:00.746182 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-14'
267 13:50:00.750509 Setting prompt string to ['lava-test: # ']
268 13:50:00.750891 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 13:50:00.751004 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 13:50:00.751099 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 13:50:00.751234 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 13:50:00.751447 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=reboot'
273 13:50:05.900121 >> Command sent successfully.
274 13:50:05.911216 Returned 0 in 5 seconds
275 13:50:06.012539 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 13:50:06.013977 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 13:50:06.014469 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 13:50:06.014909 Setting prompt string to 'Starting depthcharge on Voema...'
280 13:50:06.015247 Changing prompt to 'Starting depthcharge on Voema...'
281 13:50:06.015653 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 13:50:06.017295 [Enter `^Ec?' for help]
283 13:50:07.566927
284 13:50:07.567447
285 13:50:07.577037 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 13:50:07.583571 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
287 13:50:07.587746 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 13:50:07.590889 CPU: AES supported, TXT NOT supported, VT supported
289 13:50:07.598190 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 13:50:07.600953 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 13:50:07.607873 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 13:50:07.611209 VBOOT: Loading verstage.
293 13:50:07.614317 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 13:50:07.620790 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 13:50:07.624362 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 13:50:07.634047 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 13:50:07.641346 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 13:50:07.641781
299 13:50:07.642117
300 13:50:07.651252 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 13:50:07.668320 Probing TPM: . done!
302 13:50:07.671518 TPM ready after 0 ms
303 13:50:07.674739 Connected to device vid:did:rid of 1ae0:0028:00
304 13:50:07.685868 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
305 13:50:07.692327 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 13:50:07.695768 Initialized TPM device CR50 revision 0
307 13:50:07.761050 tlcl_send_startup: Startup return code is 0
308 13:50:07.761538 TPM: setup succeeded
309 13:50:07.776046 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 13:50:07.790454 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 13:50:07.803120 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 13:50:07.812653 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 13:50:07.816200 Chrome EC: UHEPI supported
314 13:50:07.819697 Phase 1
315 13:50:07.823147 FMAP: area GBB found @ 1805000 (458752 bytes)
316 13:50:07.832969 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 13:50:07.839466 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 13:50:07.845922 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 13:50:07.853023 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 13:50:07.856311 Recovery requested (1009000e)
321 13:50:07.859728 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 13:50:07.871043 tlcl_extend: response is 0
323 13:50:07.877710 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 13:50:07.887847 tlcl_extend: response is 0
325 13:50:07.894010 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 13:50:07.901036 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 13:50:07.907455 BS: verstage times (exec / console): total (unknown) / 142 ms
328 13:50:07.907930
329 13:50:07.908266
330 13:50:07.921121 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 13:50:07.927290 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 13:50:07.931086 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 13:50:07.933924 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 13:50:07.941250 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 13:50:07.944010 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 13:50:07.947662 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
337 13:50:07.950831 TCO_STS: 0000 0000
338 13:50:07.954272 GEN_PMCON: d0015038 00002200
339 13:50:07.957174 GBLRST_CAUSE: 00000000 00000000
340 13:50:07.957599 HPR_CAUSE0: 00000000
341 13:50:07.960687 prev_sleep_state 5
342 13:50:07.964237 Boot Count incremented to 10822
343 13:50:07.970699 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 13:50:07.977385 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 13:50:07.983737 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 13:50:07.990662 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 13:50:07.994959 Chrome EC: UHEPI supported
348 13:50:08.001814 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 13:50:08.014649 Probing TPM: done!
350 13:50:08.021339 Connected to device vid:did:rid of 1ae0:0028:00
351 13:50:08.031049 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
352 13:50:08.034793 Initialized TPM device CR50 revision 0
353 13:50:08.049767 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 13:50:08.056855 MRC: Hash idx 0x100b comparison successful.
355 13:50:08.059665 MRC cache found, size faa8
356 13:50:08.060123 bootmode is set to: 2
357 13:50:08.063143 SPD index = 2
358 13:50:08.069658 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 13:50:08.072977 SPD: module type is LPDDR4X
360 13:50:08.076265 SPD: module part number is MT53D1G64D4NW-046
361 13:50:08.084286 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
362 13:50:08.087265 SPD: device width 16 bits, bus width 16 bits
363 13:50:08.090609 SPD: module size is 2048 MB (per channel)
364 13:50:08.522420 CBMEM:
365 13:50:08.525869 IMD: root @ 0x76fff000 254 entries.
366 13:50:08.528761 IMD: root @ 0x76ffec00 62 entries.
367 13:50:08.532746 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 13:50:08.539180 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 13:50:08.542145 External stage cache:
370 13:50:08.545475 IMD: root @ 0x7b3ff000 254 entries.
371 13:50:08.549000 IMD: root @ 0x7b3fec00 62 entries.
372 13:50:08.563845 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 13:50:08.570053 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 13:50:08.577062 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 13:50:08.590610 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 13:50:08.597046 cse_lite: Skip switching to RW in the recovery path
377 13:50:08.597501 8 DIMMs found
378 13:50:08.598063 SMM Memory Map
379 13:50:08.603689 SMRAM : 0x7b000000 0x800000
380 13:50:08.607198 Subregion 0: 0x7b000000 0x200000
381 13:50:08.610490 Subregion 1: 0x7b200000 0x200000
382 13:50:08.613932 Subregion 2: 0x7b400000 0x400000
383 13:50:08.614355 top_of_ram = 0x77000000
384 13:50:08.620512 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 13:50:08.626780 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 13:50:08.630219 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 13:50:08.636756 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 13:50:08.643670 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 13:50:08.650075 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 13:50:08.661242 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 13:50:08.664809 Processing 211 relocs. Offset value of 0x74c0b000
392 13:50:08.673539 BS: romstage times (exec / console): total (unknown) / 277 ms
393 13:50:08.679344
394 13:50:08.679800
395 13:50:08.689091 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 13:50:08.692205 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 13:50:08.702297 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 13:50:08.708422 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 13:50:08.715459 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 13:50:08.721984 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 13:50:08.766263 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 13:50:08.772580 Processing 5008 relocs. Offset value of 0x75d98000
403 13:50:08.776216 BS: postcar times (exec / console): total (unknown) / 59 ms
404 13:50:08.779685
405 13:50:08.780169
406 13:50:08.789644 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 13:50:08.790135 Normal boot
408 13:50:08.792834 FW_CONFIG value is 0x804c02
409 13:50:08.796024 PCI: 00:07.0 disabled by fw_config
410 13:50:08.799528 PCI: 00:07.1 disabled by fw_config
411 13:50:08.802327 PCI: 00:0d.2 disabled by fw_config
412 13:50:08.809300 PCI: 00:1c.7 disabled by fw_config
413 13:50:08.812801 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 13:50:08.819246 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 13:50:08.822346 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 13:50:08.829021 GENERIC: 0.0 disabled by fw_config
417 13:50:08.832119 GENERIC: 1.0 disabled by fw_config
418 13:50:08.835568 fw_config match found: DB_USB=USB3_ACTIVE
419 13:50:08.838952 fw_config match found: DB_USB=USB3_ACTIVE
420 13:50:08.842403 fw_config match found: DB_USB=USB3_ACTIVE
421 13:50:08.848819 fw_config match found: DB_USB=USB3_ACTIVE
422 13:50:08.852471 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 13:50:08.858984 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 13:50:08.869113 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 13:50:08.875775 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 13:50:08.879402 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 13:50:08.885745 microcode: Update skipped, already up-to-date
428 13:50:08.892596 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 13:50:08.919784 Detected 4 core, 8 thread CPU.
430 13:50:08.923047 Setting up SMI for CPU
431 13:50:08.926406 IED base = 0x7b400000
432 13:50:08.926901 IED size = 0x00400000
433 13:50:08.929440 Will perform SMM setup.
434 13:50:08.936395 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
435 13:50:08.942610 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 13:50:08.949996 Processing 16 relocs. Offset value of 0x00030000
437 13:50:08.952753 Attempting to start 7 APs
438 13:50:08.956099 Waiting for 10ms after sending INIT.
439 13:50:08.971541 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
440 13:50:08.972065 done.
441 13:50:08.975166 AP: slot 3 apic_id 3.
442 13:50:08.977970 AP: slot 6 apic_id 2.
443 13:50:08.978397 AP: slot 7 apic_id 4.
444 13:50:08.981608 AP: slot 1 apic_id 5.
445 13:50:08.984973 AP: slot 4 apic_id 6.
446 13:50:08.985416 AP: slot 5 apic_id 7.
447 13:50:08.991576 Waiting for 2nd SIPI to complete...done.
448 13:50:08.997947 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 13:50:09.004816 Processing 13 relocs. Offset value of 0x00038000
450 13:50:09.005251 Unable to locate Global NVS
451 13:50:09.014848 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 13:50:09.018036 Installing permanent SMM handler to 0x7b000000
453 13:50:09.028262 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 13:50:09.030982 Processing 794 relocs. Offset value of 0x7b010000
455 13:50:09.041363 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 13:50:09.044451 Processing 13 relocs. Offset value of 0x7b008000
457 13:50:09.051321 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 13:50:09.057724 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 13:50:09.061171 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 13:50:09.068061 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 13:50:09.074536 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 13:50:09.080866 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 13:50:09.088011 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 13:50:09.088433 Unable to locate Global NVS
465 13:50:09.097471 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 13:50:09.100975 Clearing SMI status registers
467 13:50:09.101398 SMI_STS: PM1
468 13:50:09.103992 PM1_STS: PWRBTN
469 13:50:09.111059 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 13:50:09.114001 In relocation handler: CPU 0
471 13:50:09.117180 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 13:50:09.124213 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 13:50:09.124634 Relocation complete.
474 13:50:09.133876 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
475 13:50:09.134408 In relocation handler: CPU 2
476 13:50:09.140621 New SMBASE=0x7afff800 IEDBASE=0x7b400000
477 13:50:09.141140 Relocation complete.
478 13:50:09.150474 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
479 13:50:09.151134 In relocation handler: CPU 6
480 13:50:09.156671 New SMBASE=0x7affe800 IEDBASE=0x7b400000
481 13:50:09.160345 Writing SMRR. base = 0x7b000006, mask=0xff800c00
482 13:50:09.163974 Relocation complete.
483 13:50:09.170599 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
484 13:50:09.173972 In relocation handler: CPU 3
485 13:50:09.177265 New SMBASE=0x7afff400 IEDBASE=0x7b400000
486 13:50:09.180313 Relocation complete.
487 13:50:09.186926 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
488 13:50:09.190404 In relocation handler: CPU 4
489 13:50:09.193127 New SMBASE=0x7afff000 IEDBASE=0x7b400000
490 13:50:09.199938 Writing SMRR. base = 0x7b000006, mask=0xff800c00
491 13:50:09.200483 Relocation complete.
492 13:50:09.206374 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
493 13:50:09.209950 In relocation handler: CPU 7
494 13:50:09.216927 New SMBASE=0x7affe400 IEDBASE=0x7b400000
495 13:50:09.219773 Writing SMRR. base = 0x7b000006, mask=0xff800c00
496 13:50:09.223436 Relocation complete.
497 13:50:09.229458 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
498 13:50:09.232912 In relocation handler: CPU 1
499 13:50:09.236224 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
500 13:50:09.239563 Relocation complete.
501 13:50:09.246033 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
502 13:50:09.249424 In relocation handler: CPU 5
503 13:50:09.252499 New SMBASE=0x7affec00 IEDBASE=0x7b400000
504 13:50:09.255886 Relocation complete.
505 13:50:09.256307 Initializing CPU #0
506 13:50:09.259537 CPU: vendor Intel device 806c1
507 13:50:09.265906 CPU: family 06, model 8c, stepping 01
508 13:50:09.266359 Clearing out pending MCEs
509 13:50:09.269047 Setting up local APIC...
510 13:50:09.272643 apic_id: 0x00 done.
511 13:50:09.275702 Turbo is available but hidden
512 13:50:09.278993 Turbo is available and visible
513 13:50:09.282219 microcode: Update skipped, already up-to-date
514 13:50:09.285992 CPU #0 initialized
515 13:50:09.286695 Initializing CPU #6
516 13:50:09.289157 Initializing CPU #5
517 13:50:09.292389 Initializing CPU #2
518 13:50:09.292824 Initializing CPU #3
519 13:50:09.295627 CPU: vendor Intel device 806c1
520 13:50:09.298743 CPU: family 06, model 8c, stepping 01
521 13:50:09.302210 CPU: vendor Intel device 806c1
522 13:50:09.305559 CPU: family 06, model 8c, stepping 01
523 13:50:09.309387 Clearing out pending MCEs
524 13:50:09.312095 Clearing out pending MCEs
525 13:50:09.315564 Setting up local APIC...
526 13:50:09.318978 CPU: vendor Intel device 806c1
527 13:50:09.323224 CPU: family 06, model 8c, stepping 01
528 13:50:09.326831 CPU: vendor Intel device 806c1
529 13:50:09.327379 CPU: family 06, model 8c, stepping 01
530 13:50:09.330417 Initializing CPU #4
531 13:50:09.333344 apic_id: 0x02 done.
532 13:50:09.337502 Setting up local APIC...
533 13:50:09.337949 Clearing out pending MCEs
534 13:50:09.339929 Initializing CPU #7
535 13:50:09.343393 Initializing CPU #1
536 13:50:09.343969 CPU: vendor Intel device 806c1
537 13:50:09.350383 CPU: family 06, model 8c, stepping 01
538 13:50:09.353272 CPU: vendor Intel device 806c1
539 13:50:09.356782 CPU: family 06, model 8c, stepping 01
540 13:50:09.360391 Clearing out pending MCEs
541 13:50:09.360977 Clearing out pending MCEs
542 13:50:09.363243 Setting up local APIC...
543 13:50:09.366758 Setting up local APIC...
544 13:50:09.370061 microcode: Update skipped, already up-to-date
545 13:50:09.373621 apic_id: 0x03 done.
546 13:50:09.374147 CPU #6 initialized
547 13:50:09.380038 microcode: Update skipped, already up-to-date
548 13:50:09.380494 apic_id: 0x01 done.
549 13:50:09.383284 CPU: vendor Intel device 806c1
550 13:50:09.389790 CPU: family 06, model 8c, stepping 01
551 13:50:09.390360 Clearing out pending MCEs
552 13:50:09.393206 Clearing out pending MCEs
553 13:50:09.396726 Setting up local APIC...
554 13:50:09.400182 microcode: Update skipped, already up-to-date
555 13:50:09.402973 Setting up local APIC...
556 13:50:09.406601 CPU #2 initialized
557 13:50:09.407142 apic_id: 0x06 done.
558 13:50:09.409966 apic_id: 0x07 done.
559 13:50:09.413345 microcode: Update skipped, already up-to-date
560 13:50:09.419918 microcode: Update skipped, already up-to-date
561 13:50:09.420357 CPU #4 initialized
562 13:50:09.423390 CPU #5 initialized
563 13:50:09.423987 CPU #3 initialized
564 13:50:09.426445 Setting up local APIC...
565 13:50:09.429973 apic_id: 0x04 done.
566 13:50:09.433537 apic_id: 0x05 done.
567 13:50:09.436412 microcode: Update skipped, already up-to-date
568 13:50:09.439799 microcode: Update skipped, already up-to-date
569 13:50:09.443460 CPU #7 initialized
570 13:50:09.443988 CPU #1 initialized
571 13:50:09.449920 bsp_do_flight_plan done after 454 msecs.
572 13:50:09.453320 CPU: frequency set to 4400 MHz
573 13:50:09.453746 Enabling SMIs.
574 13:50:09.459759 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 346 / 317 ms
575 13:50:09.475889 SATAXPCIE1 indicates PCIe NVMe is present
576 13:50:09.479308 Probing TPM: done!
577 13:50:09.482450 Connected to device vid:did:rid of 1ae0:0028:00
578 13:50:09.493063 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
579 13:50:09.496467 Initialized TPM device CR50 revision 0
580 13:50:09.499550 Enabling S0i3.4
581 13:50:09.506404 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 13:50:09.509572 Found a VBT of 8704 bytes after decompression
583 13:50:09.516169 cse_lite: CSE RO boot. HybridStorageMode disabled
584 13:50:09.522831 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 13:50:09.598776 FSPS returned 0
586 13:50:09.602154 Executing Phase 1 of FspMultiPhaseSiInit
587 13:50:09.611753 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 13:50:09.615404 port C0 DISC req: usage 1 usb3 1 usb2 5
589 13:50:09.618641 Raw Buffer output 0 00000511
590 13:50:09.621424 Raw Buffer output 1 00000000
591 13:50:09.625986 pmc_send_ipc_cmd succeeded
592 13:50:09.632191 port C1 DISC req: usage 1 usb3 2 usb2 3
593 13:50:09.632683 Raw Buffer output 0 00000321
594 13:50:09.635374 Raw Buffer output 1 00000000
595 13:50:09.639542 pmc_send_ipc_cmd succeeded
596 13:50:09.644889 Detected 4 core, 8 thread CPU.
597 13:50:09.648123 Detected 4 core, 8 thread CPU.
598 13:50:09.848206 Display FSP Version Info HOB
599 13:50:09.851741 Reference Code - CPU = a.0.4c.31
600 13:50:09.854608 uCode Version = 0.0.0.86
601 13:50:09.858283 TXT ACM version = ff.ff.ff.ffff
602 13:50:09.861709 Reference Code - ME = a.0.4c.31
603 13:50:09.865218 MEBx version = 0.0.0.0
604 13:50:09.867949 ME Firmware Version = Consumer SKU
605 13:50:09.871300 Reference Code - PCH = a.0.4c.31
606 13:50:09.874870 PCH-CRID Status = Disabled
607 13:50:09.878084 PCH-CRID Original Value = ff.ff.ff.ffff
608 13:50:09.881639 PCH-CRID New Value = ff.ff.ff.ffff
609 13:50:09.885278 OPROM - RST - RAID = ff.ff.ff.ffff
610 13:50:09.888071 PCH Hsio Version = 4.0.0.0
611 13:50:09.891533 Reference Code - SA - System Agent = a.0.4c.31
612 13:50:09.894640 Reference Code - MRC = 2.0.0.1
613 13:50:09.898046 SA - PCIe Version = a.0.4c.31
614 13:50:09.902232 SA-CRID Status = Disabled
615 13:50:09.905891 SA-CRID Original Value = 0.0.0.1
616 13:50:09.906333 SA-CRID New Value = 0.0.0.1
617 13:50:09.909431 OPROM - VBIOS = ff.ff.ff.ffff
618 13:50:09.915915 IO Manageability Engine FW Version = 11.1.4.0
619 13:50:09.918926 PHY Build Version = 0.0.0.e0
620 13:50:09.922379 Thunderbolt(TM) FW Version = 0.0.0.0
621 13:50:09.925555 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
622 13:50:09.928982 ITSS IRQ Polarities Before:
623 13:50:09.932559 IPC0: 0xffffffff
624 13:50:09.933016 IPC1: 0xffffffff
625 13:50:09.935868 IPC2: 0xffffffff
626 13:50:09.936295 IPC3: 0xffffffff
627 13:50:09.939230 ITSS IRQ Polarities After:
628 13:50:09.942147 IPC0: 0xffffffff
629 13:50:09.942567 IPC1: 0xffffffff
630 13:50:09.945812 IPC2: 0xffffffff
631 13:50:09.946238 IPC3: 0xffffffff
632 13:50:09.952177 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 13:50:09.962488 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 13:50:09.976085 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 13:50:09.989012 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 13:50:09.995444 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
637 13:50:09.995921 Enumerating buses...
638 13:50:10.001765 Show all devs... Before device enumeration.
639 13:50:10.002238 Root Device: enabled 1
640 13:50:10.005169 DOMAIN: 0000: enabled 1
641 13:50:10.008443 CPU_CLUSTER: 0: enabled 1
642 13:50:10.008866 PCI: 00:00.0: enabled 1
643 13:50:10.011759 PCI: 00:02.0: enabled 1
644 13:50:10.015867 PCI: 00:04.0: enabled 1
645 13:50:10.018411 PCI: 00:05.0: enabled 1
646 13:50:10.018939 PCI: 00:06.0: enabled 0
647 13:50:10.022049 PCI: 00:07.0: enabled 0
648 13:50:10.024996 PCI: 00:07.1: enabled 0
649 13:50:10.028435 PCI: 00:07.2: enabled 0
650 13:50:10.028860 PCI: 00:07.3: enabled 0
651 13:50:10.031506 PCI: 00:08.0: enabled 1
652 13:50:10.035245 PCI: 00:09.0: enabled 0
653 13:50:10.038438 PCI: 00:0a.0: enabled 0
654 13:50:10.038959 PCI: 00:0d.0: enabled 1
655 13:50:10.041586 PCI: 00:0d.1: enabled 0
656 13:50:10.044943 PCI: 00:0d.2: enabled 0
657 13:50:10.048173 PCI: 00:0d.3: enabled 0
658 13:50:10.048594 PCI: 00:0e.0: enabled 0
659 13:50:10.051793 PCI: 00:10.2: enabled 1
660 13:50:10.055261 PCI: 00:10.6: enabled 0
661 13:50:10.055807 PCI: 00:10.7: enabled 0
662 13:50:10.058458 PCI: 00:12.0: enabled 0
663 13:50:10.061471 PCI: 00:12.6: enabled 0
664 13:50:10.064988 PCI: 00:13.0: enabled 0
665 13:50:10.065410 PCI: 00:14.0: enabled 1
666 13:50:10.068483 PCI: 00:14.1: enabled 0
667 13:50:10.071888 PCI: 00:14.2: enabled 1
668 13:50:10.074878 PCI: 00:14.3: enabled 1
669 13:50:10.075399 PCI: 00:15.0: enabled 1
670 13:50:10.078091 PCI: 00:15.1: enabled 1
671 13:50:10.081610 PCI: 00:15.2: enabled 1
672 13:50:10.084894 PCI: 00:15.3: enabled 1
673 13:50:10.085528 PCI: 00:16.0: enabled 1
674 13:50:10.088029 PCI: 00:16.1: enabled 0
675 13:50:10.091495 PCI: 00:16.2: enabled 0
676 13:50:10.092017 PCI: 00:16.3: enabled 0
677 13:50:10.095199 PCI: 00:16.4: enabled 0
678 13:50:10.098663 PCI: 00:16.5: enabled 0
679 13:50:10.102110 PCI: 00:17.0: enabled 1
680 13:50:10.102663 PCI: 00:19.0: enabled 0
681 13:50:10.104711 PCI: 00:19.1: enabled 1
682 13:50:10.108156 PCI: 00:19.2: enabled 0
683 13:50:10.111207 PCI: 00:1c.0: enabled 1
684 13:50:10.111652 PCI: 00:1c.1: enabled 0
685 13:50:10.114595 PCI: 00:1c.2: enabled 0
686 13:50:10.118233 PCI: 00:1c.3: enabled 0
687 13:50:10.121128 PCI: 00:1c.4: enabled 0
688 13:50:10.121547 PCI: 00:1c.5: enabled 0
689 13:50:10.124412 PCI: 00:1c.6: enabled 1
690 13:50:10.127789 PCI: 00:1c.7: enabled 0
691 13:50:10.130987 PCI: 00:1d.0: enabled 1
692 13:50:10.131405 PCI: 00:1d.1: enabled 0
693 13:50:10.134672 PCI: 00:1d.2: enabled 1
694 13:50:10.137967 PCI: 00:1d.3: enabled 0
695 13:50:10.141423 PCI: 00:1e.0: enabled 1
696 13:50:10.142142 PCI: 00:1e.1: enabled 0
697 13:50:10.144127 PCI: 00:1e.2: enabled 1
698 13:50:10.148052 PCI: 00:1e.3: enabled 1
699 13:50:10.150832 PCI: 00:1f.0: enabled 1
700 13:50:10.151256 PCI: 00:1f.1: enabled 0
701 13:50:10.154188 PCI: 00:1f.2: enabled 1
702 13:50:10.157451 PCI: 00:1f.3: enabled 1
703 13:50:10.157875 PCI: 00:1f.4: enabled 0
704 13:50:10.160730 PCI: 00:1f.5: enabled 1
705 13:50:10.164210 PCI: 00:1f.6: enabled 0
706 13:50:10.167977 PCI: 00:1f.7: enabled 0
707 13:50:10.168506 APIC: 00: enabled 1
708 13:50:10.170552 GENERIC: 0.0: enabled 1
709 13:50:10.174517 GENERIC: 0.0: enabled 1
710 13:50:10.175103 GENERIC: 1.0: enabled 1
711 13:50:10.177779 GENERIC: 0.0: enabled 1
712 13:50:10.180685 GENERIC: 1.0: enabled 1
713 13:50:10.184601 USB0 port 0: enabled 1
714 13:50:10.185117 GENERIC: 0.0: enabled 1
715 13:50:10.188023 USB0 port 0: enabled 1
716 13:50:10.190688 GENERIC: 0.0: enabled 1
717 13:50:10.194301 I2C: 00:1a: enabled 1
718 13:50:10.194986 I2C: 00:31: enabled 1
719 13:50:10.197083 I2C: 00:32: enabled 1
720 13:50:10.200718 I2C: 00:10: enabled 1
721 13:50:10.201142 I2C: 00:15: enabled 1
722 13:50:10.204544 GENERIC: 0.0: enabled 0
723 13:50:10.207202 GENERIC: 1.0: enabled 0
724 13:50:10.207674 GENERIC: 0.0: enabled 1
725 13:50:10.210740 SPI: 00: enabled 1
726 13:50:10.214327 SPI: 00: enabled 1
727 13:50:10.214901 PNP: 0c09.0: enabled 1
728 13:50:10.217675 GENERIC: 0.0: enabled 1
729 13:50:10.220457 USB3 port 0: enabled 1
730 13:50:10.220880 USB3 port 1: enabled 1
731 13:50:10.223910 USB3 port 2: enabled 0
732 13:50:10.227270 USB3 port 3: enabled 0
733 13:50:10.231069 USB2 port 0: enabled 0
734 13:50:10.231820 USB2 port 1: enabled 1
735 13:50:10.233657 USB2 port 2: enabled 1
736 13:50:10.237054 USB2 port 3: enabled 0
737 13:50:10.237476 USB2 port 4: enabled 1
738 13:50:10.240442 USB2 port 5: enabled 0
739 13:50:10.243773 USB2 port 6: enabled 0
740 13:50:10.247079 USB2 port 7: enabled 0
741 13:50:10.247501 USB2 port 8: enabled 0
742 13:50:10.250282 USB2 port 9: enabled 0
743 13:50:10.253644 USB3 port 0: enabled 0
744 13:50:10.254242 USB3 port 1: enabled 1
745 13:50:10.257283 USB3 port 2: enabled 0
746 13:50:10.260271 USB3 port 3: enabled 0
747 13:50:10.264127 GENERIC: 0.0: enabled 1
748 13:50:10.264659 GENERIC: 1.0: enabled 1
749 13:50:10.266882 APIC: 05: enabled 1
750 13:50:10.267305 APIC: 01: enabled 1
751 13:50:10.270498 APIC: 03: enabled 1
752 13:50:10.273495 APIC: 06: enabled 1
753 13:50:10.273987 APIC: 07: enabled 1
754 13:50:10.277198 APIC: 02: enabled 1
755 13:50:10.280275 APIC: 04: enabled 1
756 13:50:10.280700 Compare with tree...
757 13:50:10.284016 Root Device: enabled 1
758 13:50:10.286638 DOMAIN: 0000: enabled 1
759 13:50:10.287063 PCI: 00:00.0: enabled 1
760 13:50:10.290472 PCI: 00:02.0: enabled 1
761 13:50:10.293328 PCI: 00:04.0: enabled 1
762 13:50:10.297127 GENERIC: 0.0: enabled 1
763 13:50:10.300406 PCI: 00:05.0: enabled 1
764 13:50:10.300832 PCI: 00:06.0: enabled 0
765 13:50:10.303631 PCI: 00:07.0: enabled 0
766 13:50:10.307000 GENERIC: 0.0: enabled 1
767 13:50:10.310686 PCI: 00:07.1: enabled 0
768 13:50:10.313693 GENERIC: 1.0: enabled 1
769 13:50:10.317195 PCI: 00:07.2: enabled 0
770 13:50:10.317741 GENERIC: 0.0: enabled 1
771 13:50:10.320412 PCI: 00:07.3: enabled 0
772 13:50:10.323267 GENERIC: 1.0: enabled 1
773 13:50:10.326863 PCI: 00:08.0: enabled 1
774 13:50:10.330249 PCI: 00:09.0: enabled 0
775 13:50:10.330734 PCI: 00:0a.0: enabled 0
776 13:50:10.333297 PCI: 00:0d.0: enabled 1
777 13:50:10.336905 USB0 port 0: enabled 1
778 13:50:10.339776 USB3 port 0: enabled 1
779 13:50:10.343015 USB3 port 1: enabled 1
780 13:50:10.343448 USB3 port 2: enabled 0
781 13:50:10.346406 USB3 port 3: enabled 0
782 13:50:10.349851 PCI: 00:0d.1: enabled 0
783 13:50:10.353498 PCI: 00:0d.2: enabled 0
784 13:50:10.356578 GENERIC: 0.0: enabled 1
785 13:50:10.357110 PCI: 00:0d.3: enabled 0
786 13:50:10.360148 PCI: 00:0e.0: enabled 0
787 13:50:10.362886 PCI: 00:10.2: enabled 1
788 13:50:10.366365 PCI: 00:10.6: enabled 0
789 13:50:10.369989 PCI: 00:10.7: enabled 0
790 13:50:10.370428 PCI: 00:12.0: enabled 0
791 13:50:10.373595 PCI: 00:12.6: enabled 0
792 13:50:10.377069 PCI: 00:13.0: enabled 0
793 13:50:10.379768 PCI: 00:14.0: enabled 1
794 13:50:10.383779 USB0 port 0: enabled 1
795 13:50:10.384367 USB2 port 0: enabled 0
796 13:50:10.386501 USB2 port 1: enabled 1
797 13:50:10.390418 USB2 port 2: enabled 1
798 13:50:10.393478 USB2 port 3: enabled 0
799 13:50:10.396714 USB2 port 4: enabled 1
800 13:50:10.397284 USB2 port 5: enabled 0
801 13:50:10.399905 USB2 port 6: enabled 0
802 13:50:10.403475 USB2 port 7: enabled 0
803 13:50:10.406241 USB2 port 8: enabled 0
804 13:50:10.409601 USB2 port 9: enabled 0
805 13:50:10.413031 USB3 port 0: enabled 0
806 13:50:10.413556 USB3 port 1: enabled 1
807 13:50:10.416060 USB3 port 2: enabled 0
808 13:50:10.419740 USB3 port 3: enabled 0
809 13:50:10.423005 PCI: 00:14.1: enabled 0
810 13:50:10.425984 PCI: 00:14.2: enabled 1
811 13:50:10.426406 PCI: 00:14.3: enabled 1
812 13:50:10.429591 GENERIC: 0.0: enabled 1
813 13:50:10.433297 PCI: 00:15.0: enabled 1
814 13:50:10.435966 I2C: 00:1a: enabled 1
815 13:50:10.439676 I2C: 00:31: enabled 1
816 13:50:10.440191 I2C: 00:32: enabled 1
817 13:50:10.443088 PCI: 00:15.1: enabled 1
818 13:50:10.445858 I2C: 00:10: enabled 1
819 13:50:10.449252 PCI: 00:15.2: enabled 1
820 13:50:10.453014 PCI: 00:15.3: enabled 1
821 13:50:10.453437 PCI: 00:16.0: enabled 1
822 13:50:10.456104 PCI: 00:16.1: enabled 0
823 13:50:10.459564 PCI: 00:16.2: enabled 0
824 13:50:10.463066 PCI: 00:16.3: enabled 0
825 13:50:10.466278 PCI: 00:16.4: enabled 0
826 13:50:10.466838 PCI: 00:16.5: enabled 0
827 13:50:10.469411 PCI: 00:17.0: enabled 1
828 13:50:10.472990 PCI: 00:19.0: enabled 0
829 13:50:10.476219 PCI: 00:19.1: enabled 1
830 13:50:10.476743 I2C: 00:15: enabled 1
831 13:50:10.479351 PCI: 00:19.2: enabled 0
832 13:50:10.483077 PCI: 00:1d.0: enabled 1
833 13:50:10.486002 GENERIC: 0.0: enabled 1
834 13:50:10.489324 PCI: 00:1e.0: enabled 1
835 13:50:10.489750 PCI: 00:1e.1: enabled 0
836 13:50:10.492655 PCI: 00:1e.2: enabled 1
837 13:50:10.495826 SPI: 00: enabled 1
838 13:50:10.499221 PCI: 00:1e.3: enabled 1
839 13:50:10.499693 SPI: 00: enabled 1
840 13:50:10.502869 PCI: 00:1f.0: enabled 1
841 13:50:10.506442 PNP: 0c09.0: enabled 1
842 13:50:10.557416 PCI: 00:1f.1: enabled 0
843 13:50:10.558035 PCI: 00:1f.2: enabled 1
844 13:50:10.558430 GENERIC: 0.0: enabled 1
845 13:50:10.558784 GENERIC: 0.0: enabled 1
846 13:50:10.559120 GENERIC: 1.0: enabled 1
847 13:50:10.559446 PCI: 00:1f.3: enabled 1
848 13:50:10.559874 PCI: 00:1f.4: enabled 0
849 13:50:10.560536 PCI: 00:1f.5: enabled 1
850 13:50:10.561042 PCI: 00:1f.6: enabled 0
851 13:50:10.561388 PCI: 00:1f.7: enabled 0
852 13:50:10.561705 CPU_CLUSTER: 0: enabled 1
853 13:50:10.562017 APIC: 00: enabled 1
854 13:50:10.562322 APIC: 05: enabled 1
855 13:50:10.562627 APIC: 01: enabled 1
856 13:50:10.562930 APIC: 03: enabled 1
857 13:50:10.563236 APIC: 06: enabled 1
858 13:50:10.563539 APIC: 07: enabled 1
859 13:50:10.563909 APIC: 02: enabled 1
860 13:50:10.564215 APIC: 04: enabled 1
861 13:50:10.564698 Root Device scanning...
862 13:50:10.588997 scan_static_bus for Root Device
863 13:50:10.589504 DOMAIN: 0000 enabled
864 13:50:10.589847 CPU_CLUSTER: 0 enabled
865 13:50:10.590163 DOMAIN: 0000 scanning...
866 13:50:10.590469 PCI: pci_scan_bus for bus 00
867 13:50:10.591108 PCI: 00:00.0 [8086/0000] ops
868 13:50:10.591450 PCI: 00:00.0 [8086/9a12] enabled
869 13:50:10.591813 PCI: 00:02.0 [8086/0000] bus ops
870 13:50:10.592117 PCI: 00:02.0 [8086/9a40] enabled
871 13:50:10.592407 PCI: 00:04.0 [8086/0000] bus ops
872 13:50:10.592691 PCI: 00:04.0 [8086/9a03] enabled
873 13:50:10.593030 PCI: 00:05.0 [8086/9a19] enabled
874 13:50:10.595860 PCI: 00:07.0 [0000/0000] hidden
875 13:50:10.599495 PCI: 00:08.0 [8086/9a11] enabled
876 13:50:10.602591 PCI: 00:0a.0 [8086/9a0d] disabled
877 13:50:10.606103 PCI: 00:0d.0 [8086/0000] bus ops
878 13:50:10.609587 PCI: 00:0d.0 [8086/9a13] enabled
879 13:50:10.613074 PCI: 00:14.0 [8086/0000] bus ops
880 13:50:10.615872 PCI: 00:14.0 [8086/a0ed] enabled
881 13:50:10.619229 PCI: 00:14.2 [8086/a0ef] enabled
882 13:50:10.622637 PCI: 00:14.3 [8086/0000] bus ops
883 13:50:10.626283 PCI: 00:14.3 [8086/a0f0] enabled
884 13:50:10.629596 PCI: 00:15.0 [8086/0000] bus ops
885 13:50:10.632426 PCI: 00:15.0 [8086/a0e8] enabled
886 13:50:10.636247 PCI: 00:15.1 [8086/0000] bus ops
887 13:50:10.639392 PCI: 00:15.1 [8086/a0e9] enabled
888 13:50:10.642794 PCI: 00:15.2 [8086/0000] bus ops
889 13:50:10.645799 PCI: 00:15.2 [8086/a0ea] enabled
890 13:50:10.649596 PCI: 00:15.3 [8086/0000] bus ops
891 13:50:10.652386 PCI: 00:15.3 [8086/a0eb] enabled
892 13:50:10.655710 PCI: 00:16.0 [8086/0000] ops
893 13:50:10.659655 PCI: 00:16.0 [8086/a0e0] enabled
894 13:50:10.666228 PCI: Static device PCI: 00:17.0 not found, disabling it.
895 13:50:10.669652 PCI: 00:19.0 [8086/0000] bus ops
896 13:50:10.672933 PCI: 00:19.0 [8086/a0c5] disabled
897 13:50:10.675581 PCI: 00:19.1 [8086/0000] bus ops
898 13:50:10.679003 PCI: 00:19.1 [8086/a0c6] enabled
899 13:50:10.682203 PCI: 00:1d.0 [8086/0000] bus ops
900 13:50:10.685742 PCI: 00:1d.0 [8086/a0b0] enabled
901 13:50:10.689301 PCI: 00:1e.0 [8086/0000] ops
902 13:50:10.692156 PCI: 00:1e.0 [8086/a0a8] enabled
903 13:50:10.695498 PCI: 00:1e.2 [8086/0000] bus ops
904 13:50:10.698830 PCI: 00:1e.2 [8086/a0aa] enabled
905 13:50:10.702087 PCI: 00:1e.3 [8086/0000] bus ops
906 13:50:10.705820 PCI: 00:1e.3 [8086/a0ab] enabled
907 13:50:10.708804 PCI: 00:1f.0 [8086/0000] bus ops
908 13:50:10.712337 PCI: 00:1f.0 [8086/a087] enabled
909 13:50:10.712763 RTC Init
910 13:50:10.715889 Set power on after power failure.
911 13:50:10.718857 Disabling Deep S3
912 13:50:10.722292 Disabling Deep S3
913 13:50:10.722803 Disabling Deep S4
914 13:50:10.725194 Disabling Deep S4
915 13:50:10.725616 Disabling Deep S5
916 13:50:10.728720 Disabling Deep S5
917 13:50:10.732126 PCI: 00:1f.2 [0000/0000] hidden
918 13:50:10.735081 PCI: 00:1f.3 [8086/0000] bus ops
919 13:50:10.738580 PCI: 00:1f.3 [8086/a0c8] enabled
920 13:50:10.741881 PCI: 00:1f.5 [8086/0000] bus ops
921 13:50:10.745634 PCI: 00:1f.5 [8086/a0a4] enabled
922 13:50:10.748757 PCI: Leftover static devices:
923 13:50:10.749181 PCI: 00:10.2
924 13:50:10.751975 PCI: 00:10.6
925 13:50:10.752396 PCI: 00:10.7
926 13:50:10.752730 PCI: 00:06.0
927 13:50:10.754904 PCI: 00:07.1
928 13:50:10.755322 PCI: 00:07.2
929 13:50:10.758548 PCI: 00:07.3
930 13:50:10.758968 PCI: 00:09.0
931 13:50:10.759298 PCI: 00:0d.1
932 13:50:10.761634 PCI: 00:0d.2
933 13:50:10.762050 PCI: 00:0d.3
934 13:50:10.764887 PCI: 00:0e.0
935 13:50:10.765301 PCI: 00:12.0
936 13:50:10.768435 PCI: 00:12.6
937 13:50:10.768851 PCI: 00:13.0
938 13:50:10.769182 PCI: 00:14.1
939 13:50:10.771904 PCI: 00:16.1
940 13:50:10.772319 PCI: 00:16.2
941 13:50:10.775266 PCI: 00:16.3
942 13:50:10.775712 PCI: 00:16.4
943 13:50:10.776041 PCI: 00:16.5
944 13:50:10.778194 PCI: 00:17.0
945 13:50:10.778610 PCI: 00:19.2
946 13:50:10.781744 PCI: 00:1e.1
947 13:50:10.782160 PCI: 00:1f.1
948 13:50:10.784905 PCI: 00:1f.4
949 13:50:10.785200 PCI: 00:1f.6
950 13:50:10.785434 PCI: 00:1f.7
951 13:50:10.788344 PCI: Check your devicetree.cb.
952 13:50:10.791256 PCI: 00:02.0 scanning...
953 13:50:10.794787 scan_generic_bus for PCI: 00:02.0
954 13:50:10.798285 scan_generic_bus for PCI: 00:02.0 done
955 13:50:10.804546 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
956 13:50:10.808156 PCI: 00:04.0 scanning...
957 13:50:10.811307 scan_generic_bus for PCI: 00:04.0
958 13:50:10.811762 GENERIC: 0.0 enabled
959 13:50:10.818042 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
960 13:50:10.824696 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
961 13:50:10.825115 PCI: 00:0d.0 scanning...
962 13:50:10.828138 scan_static_bus for PCI: 00:0d.0
963 13:50:10.831511 USB0 port 0 enabled
964 13:50:10.834397 USB0 port 0 scanning...
965 13:50:10.837850 scan_static_bus for USB0 port 0
966 13:50:10.838269 USB3 port 0 enabled
967 13:50:10.841290 USB3 port 1 enabled
968 13:50:10.844176 USB3 port 2 disabled
969 13:50:10.844593 USB3 port 3 disabled
970 13:50:10.847736 USB3 port 0 scanning...
971 13:50:10.851136 scan_static_bus for USB3 port 0
972 13:50:10.854445 scan_static_bus for USB3 port 0 done
973 13:50:10.861154 scan_bus: bus USB3 port 0 finished in 6 msecs
974 13:50:10.861644 USB3 port 1 scanning...
975 13:50:10.864219 scan_static_bus for USB3 port 1
976 13:50:10.870969 scan_static_bus for USB3 port 1 done
977 13:50:10.874498 scan_bus: bus USB3 port 1 finished in 6 msecs
978 13:50:10.877352 scan_static_bus for USB0 port 0 done
979 13:50:10.881196 scan_bus: bus USB0 port 0 finished in 43 msecs
980 13:50:10.887499 scan_static_bus for PCI: 00:0d.0 done
981 13:50:10.891246 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
982 13:50:10.894303 PCI: 00:14.0 scanning...
983 13:50:10.897325 scan_static_bus for PCI: 00:14.0
984 13:50:10.897748 USB0 port 0 enabled
985 13:50:10.900908 USB0 port 0 scanning...
986 13:50:10.904106 scan_static_bus for USB0 port 0
987 13:50:10.907670 USB2 port 0 disabled
988 13:50:10.910279 USB2 port 1 enabled
989 13:50:10.910739 USB2 port 2 enabled
990 13:50:10.913859 USB2 port 3 disabled
991 13:50:10.914402 USB2 port 4 enabled
992 13:50:10.917216 USB2 port 5 disabled
993 13:50:10.920700 USB2 port 6 disabled
994 13:50:10.921142 USB2 port 7 disabled
995 13:50:10.924049 USB2 port 8 disabled
996 13:50:10.927530 USB2 port 9 disabled
997 13:50:10.928086 USB3 port 0 disabled
998 13:50:10.930761 USB3 port 1 enabled
999 13:50:10.933773 USB3 port 2 disabled
1000 13:50:10.934464 USB3 port 3 disabled
1001 13:50:10.937310 USB2 port 1 scanning...
1002 13:50:10.940764 scan_static_bus for USB2 port 1
1003 13:50:10.943878 scan_static_bus for USB2 port 1 done
1004 13:50:10.950035 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 13:50:10.950623 USB2 port 2 scanning...
1006 13:50:10.953562 scan_static_bus for USB2 port 2
1007 13:50:10.957142 scan_static_bus for USB2 port 2 done
1008 13:50:10.963237 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 13:50:10.966933 USB2 port 4 scanning...
1010 13:50:10.970513 scan_static_bus for USB2 port 4
1011 13:50:10.973619 scan_static_bus for USB2 port 4 done
1012 13:50:10.976854 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 13:50:10.979978 USB3 port 1 scanning...
1014 13:50:10.983439 scan_static_bus for USB3 port 1
1015 13:50:10.987119 scan_static_bus for USB3 port 1 done
1016 13:50:10.990003 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 13:50:10.996792 scan_static_bus for USB0 port 0 done
1018 13:50:10.999948 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 13:50:11.003399 scan_static_bus for PCI: 00:14.0 done
1020 13:50:11.009905 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1021 13:50:11.010355 PCI: 00:14.3 scanning...
1022 13:50:11.013390 scan_static_bus for PCI: 00:14.3
1023 13:50:11.016380 GENERIC: 0.0 enabled
1024 13:50:11.019853 scan_static_bus for PCI: 00:14.3 done
1025 13:50:11.026749 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1026 13:50:11.027330 PCI: 00:15.0 scanning...
1027 13:50:11.029649 scan_static_bus for PCI: 00:15.0
1028 13:50:11.033213 I2C: 00:1a enabled
1029 13:50:11.036645 I2C: 00:31 enabled
1030 13:50:11.037081 I2C: 00:32 enabled
1031 13:50:11.039529 scan_static_bus for PCI: 00:15.0 done
1032 13:50:11.046807 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1033 13:50:11.049480 PCI: 00:15.1 scanning...
1034 13:50:11.053397 scan_static_bus for PCI: 00:15.1
1035 13:50:11.053938 I2C: 00:10 enabled
1036 13:50:11.056590 scan_static_bus for PCI: 00:15.1 done
1037 13:50:11.062901 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1038 13:50:11.066236 PCI: 00:15.2 scanning...
1039 13:50:11.069635 scan_static_bus for PCI: 00:15.2
1040 13:50:11.073239 scan_static_bus for PCI: 00:15.2 done
1041 13:50:11.076381 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1042 13:50:11.079311 PCI: 00:15.3 scanning...
1043 13:50:11.082923 scan_static_bus for PCI: 00:15.3
1044 13:50:11.086246 scan_static_bus for PCI: 00:15.3 done
1045 13:50:11.092400 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1046 13:50:11.092866 PCI: 00:19.1 scanning...
1047 13:50:11.096089 scan_static_bus for PCI: 00:19.1
1048 13:50:11.099151 I2C: 00:15 enabled
1049 13:50:11.102607 scan_static_bus for PCI: 00:19.1 done
1050 13:50:11.109246 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1051 13:50:11.109720 PCI: 00:1d.0 scanning...
1052 13:50:11.115664 do_pci_scan_bridge for PCI: 00:1d.0
1053 13:50:11.116117 PCI: pci_scan_bus for bus 01
1054 13:50:11.119053 PCI: 01:00.0 [15b7/5009] enabled
1055 13:50:11.122478 GENERIC: 0.0 enabled
1056 13:50:11.125841 Enabling Common Clock Configuration
1057 13:50:11.132451 L1 Sub-State supported from root port 29
1058 13:50:11.132985 L1 Sub-State Support = 0x5
1059 13:50:11.135885 CommonModeRestoreTime = 0x28
1060 13:50:11.142962 Power On Value = 0x16, Power On Scale = 0x0
1061 13:50:11.143462 ASPM: Enabled L1
1062 13:50:11.146389 PCIe: Max_Payload_Size adjusted to 128
1063 13:50:11.149860 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1064 13:50:11.153540 PCI: 00:1e.2 scanning...
1065 13:50:11.156381 scan_generic_bus for PCI: 00:1e.2
1066 13:50:11.159849 SPI: 00 enabled
1067 13:50:11.166413 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1068 13:50:11.169827 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1069 13:50:11.172911 PCI: 00:1e.3 scanning...
1070 13:50:11.176683 scan_generic_bus for PCI: 00:1e.3
1071 13:50:11.177182 SPI: 00 enabled
1072 13:50:11.183053 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1073 13:50:11.189802 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1074 13:50:11.192843 PCI: 00:1f.0 scanning...
1075 13:50:11.196296 scan_static_bus for PCI: 00:1f.0
1076 13:50:11.196789 PNP: 0c09.0 enabled
1077 13:50:11.199320 PNP: 0c09.0 scanning...
1078 13:50:11.202664 scan_static_bus for PNP: 0c09.0
1079 13:50:11.205917 scan_static_bus for PNP: 0c09.0 done
1080 13:50:11.209841 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1081 13:50:11.216148 scan_static_bus for PCI: 00:1f.0 done
1082 13:50:11.219550 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1083 13:50:11.222861 PCI: 00:1f.2 scanning...
1084 13:50:11.226352 scan_static_bus for PCI: 00:1f.2
1085 13:50:11.229187 GENERIC: 0.0 enabled
1086 13:50:11.229887 GENERIC: 0.0 scanning...
1087 13:50:11.232721 scan_static_bus for GENERIC: 0.0
1088 13:50:11.236111 GENERIC: 0.0 enabled
1089 13:50:11.239104 GENERIC: 1.0 enabled
1090 13:50:11.242488 scan_static_bus for GENERIC: 0.0 done
1091 13:50:11.246099 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1092 13:50:11.249228 scan_static_bus for PCI: 00:1f.2 done
1093 13:50:11.255877 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1094 13:50:11.259476 PCI: 00:1f.3 scanning...
1095 13:50:11.262582 scan_static_bus for PCI: 00:1f.3
1096 13:50:11.265845 scan_static_bus for PCI: 00:1f.3 done
1097 13:50:11.268956 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1098 13:50:11.272445 PCI: 00:1f.5 scanning...
1099 13:50:11.275347 scan_generic_bus for PCI: 00:1f.5
1100 13:50:11.279254 scan_generic_bus for PCI: 00:1f.5 done
1101 13:50:11.285582 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1102 13:50:11.288979 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1103 13:50:11.292097 scan_static_bus for Root Device done
1104 13:50:11.298924 scan_bus: bus Root Device finished in 735 msecs
1105 13:50:11.299416 done
1106 13:50:11.305615 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1107 13:50:11.309176 Chrome EC: UHEPI supported
1108 13:50:11.315462 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1109 13:50:11.319135 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1110 13:50:11.325655 SPI flash protection: WPSW=0 SRP0=0
1111 13:50:11.328724 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1112 13:50:11.335345 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1113 13:50:11.338983 found VGA at PCI: 00:02.0
1114 13:50:11.341836 Setting up VGA for PCI: 00:02.0
1115 13:50:11.345472 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1116 13:50:11.351750 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1117 13:50:11.352173 Allocating resources...
1118 13:50:11.355536 Reading resources...
1119 13:50:11.358841 Root Device read_resources bus 0 link: 0
1120 13:50:11.365399 DOMAIN: 0000 read_resources bus 0 link: 0
1121 13:50:11.368283 PCI: 00:04.0 read_resources bus 1 link: 0
1122 13:50:11.374885 PCI: 00:04.0 read_resources bus 1 link: 0 done
1123 13:50:11.378409 PCI: 00:0d.0 read_resources bus 0 link: 0
1124 13:50:11.384734 USB0 port 0 read_resources bus 0 link: 0
1125 13:50:11.388146 USB0 port 0 read_resources bus 0 link: 0 done
1126 13:50:11.395111 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1127 13:50:11.398087 PCI: 00:14.0 read_resources bus 0 link: 0
1128 13:50:11.401626 USB0 port 0 read_resources bus 0 link: 0
1129 13:50:11.408516 USB0 port 0 read_resources bus 0 link: 0 done
1130 13:50:11.411802 PCI: 00:14.0 read_resources bus 0 link: 0 done
1131 13:50:11.418889 PCI: 00:14.3 read_resources bus 0 link: 0
1132 13:50:11.421916 PCI: 00:14.3 read_resources bus 0 link: 0 done
1133 13:50:11.428467 PCI: 00:15.0 read_resources bus 0 link: 0
1134 13:50:11.431717 PCI: 00:15.0 read_resources bus 0 link: 0 done
1135 13:50:11.438295 PCI: 00:15.1 read_resources bus 0 link: 0
1136 13:50:11.441564 PCI: 00:15.1 read_resources bus 0 link: 0 done
1137 13:50:11.449177 PCI: 00:19.1 read_resources bus 0 link: 0
1138 13:50:11.452277 PCI: 00:19.1 read_resources bus 0 link: 0 done
1139 13:50:11.459327 PCI: 00:1d.0 read_resources bus 1 link: 0
1140 13:50:11.462302 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1141 13:50:11.469048 PCI: 00:1e.2 read_resources bus 2 link: 0
1142 13:50:11.472451 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1143 13:50:11.479013 PCI: 00:1e.3 read_resources bus 3 link: 0
1144 13:50:11.482297 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1145 13:50:11.488685 PCI: 00:1f.0 read_resources bus 0 link: 0
1146 13:50:11.492107 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1147 13:50:11.495473 PCI: 00:1f.2 read_resources bus 0 link: 0
1148 13:50:11.502447 GENERIC: 0.0 read_resources bus 0 link: 0
1149 13:50:11.505413 GENERIC: 0.0 read_resources bus 0 link: 0 done
1150 13:50:11.511971 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1151 13:50:11.518340 DOMAIN: 0000 read_resources bus 0 link: 0 done
1152 13:50:11.521927 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1153 13:50:11.528670 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1154 13:50:11.531685 Root Device read_resources bus 0 link: 0 done
1155 13:50:11.534895 Done reading resources.
1156 13:50:11.538568 Show resources in subtree (Root Device)...After reading.
1157 13:50:11.544810 Root Device child on link 0 DOMAIN: 0000
1158 13:50:11.548201 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1159 13:50:11.558392 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1160 13:50:11.568075 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1161 13:50:11.568584 PCI: 00:00.0
1162 13:50:11.578532 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1163 13:50:11.587999 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1164 13:50:11.598004 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1165 13:50:11.608048 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1166 13:50:11.618043 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1167 13:50:11.624322 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1168 13:50:11.634760 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1169 13:50:11.644238 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1170 13:50:11.654655 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1171 13:50:11.664528 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1172 13:50:11.674322 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1173 13:50:11.680855 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1174 13:50:11.691254 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1175 13:50:11.700819 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1176 13:50:11.710897 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1177 13:50:11.721161 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1178 13:50:11.730851 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1179 13:50:11.737634 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1180 13:50:11.747548 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1181 13:50:11.757337 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1182 13:50:11.760762 PCI: 00:02.0
1183 13:50:11.770155 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1184 13:50:11.780577 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1185 13:50:11.787154 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1186 13:50:11.793797 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 13:50:11.803621 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1188 13:50:11.804057 GENERIC: 0.0
1189 13:50:11.807139 PCI: 00:05.0
1190 13:50:11.816628 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 13:50:11.820442 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1192 13:50:11.823532 GENERIC: 0.0
1193 13:50:11.824076 PCI: 00:08.0
1194 13:50:11.833493 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 13:50:11.836425 PCI: 00:0a.0
1196 13:50:11.839829 PCI: 00:0d.0 child on link 0 USB0 port 0
1197 13:50:11.849910 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1198 13:50:11.856260 USB0 port 0 child on link 0 USB3 port 0
1199 13:50:11.856725 USB3 port 0
1200 13:50:11.859933 USB3 port 1
1201 13:50:11.860392 USB3 port 2
1202 13:50:11.863309 USB3 port 3
1203 13:50:11.866999 PCI: 00:14.0 child on link 0 USB0 port 0
1204 13:50:11.876594 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 13:50:11.879975 USB0 port 0 child on link 0 USB2 port 0
1206 13:50:11.883127 USB2 port 0
1207 13:50:11.883633 USB2 port 1
1208 13:50:11.886284 USB2 port 2
1209 13:50:11.886745 USB2 port 3
1210 13:50:11.889588 USB2 port 4
1211 13:50:11.893134 USB2 port 5
1212 13:50:11.893592 USB2 port 6
1213 13:50:11.896355 USB2 port 7
1214 13:50:11.896816 USB2 port 8
1215 13:50:11.899456 USB2 port 9
1216 13:50:11.899954 USB3 port 0
1217 13:50:11.902828 USB3 port 1
1218 13:50:11.903289 USB3 port 2
1219 13:50:11.906363 USB3 port 3
1220 13:50:11.906822 PCI: 00:14.2
1221 13:50:11.916179 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 13:50:11.925889 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 13:50:11.932559 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1224 13:50:11.942904 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 13:50:11.943673 GENERIC: 0.0
1226 13:50:11.946143 PCI: 00:15.0 child on link 0 I2C: 00:1a
1227 13:50:11.956161 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 13:50:11.958990 I2C: 00:1a
1229 13:50:11.959410 I2C: 00:31
1230 13:50:11.962607 I2C: 00:32
1231 13:50:11.966301 PCI: 00:15.1 child on link 0 I2C: 00:10
1232 13:50:11.976172 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 13:50:11.979447 I2C: 00:10
1234 13:50:11.979909 PCI: 00:15.2
1235 13:50:11.989148 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 13:50:11.992712 PCI: 00:15.3
1237 13:50:12.002537 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 13:50:12.003094 PCI: 00:16.0
1239 13:50:12.012252 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 13:50:12.015865 PCI: 00:19.0
1241 13:50:12.018940 PCI: 00:19.1 child on link 0 I2C: 00:15
1242 13:50:12.028923 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 13:50:12.029354 I2C: 00:15
1244 13:50:12.035928 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1245 13:50:12.042348 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1246 13:50:12.052482 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1247 13:50:12.061906 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1248 13:50:12.065470 GENERIC: 0.0
1249 13:50:12.065949 PCI: 01:00.0
1250 13:50:12.075769 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 13:50:12.085526 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1252 13:50:12.088513 PCI: 00:1e.0
1253 13:50:12.098776 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1254 13:50:12.102284 PCI: 00:1e.2 child on link 0 SPI: 00
1255 13:50:12.111993 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1256 13:50:12.115202 SPI: 00
1257 13:50:12.118466 PCI: 00:1e.3 child on link 0 SPI: 00
1258 13:50:12.128277 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 13:50:12.128769 SPI: 00
1260 13:50:12.135336 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1261 13:50:12.142093 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1262 13:50:12.144874 PNP: 0c09.0
1263 13:50:12.151492 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1264 13:50:12.158435 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1265 13:50:12.168149 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1266 13:50:12.174832 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1267 13:50:12.181420 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1268 13:50:12.182013 GENERIC: 0.0
1269 13:50:12.184833 GENERIC: 1.0
1270 13:50:12.185253 PCI: 00:1f.3
1271 13:50:12.194606 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1272 13:50:12.204898 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1273 13:50:12.207875 PCI: 00:1f.5
1274 13:50:12.218132 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1275 13:50:12.221611 CPU_CLUSTER: 0 child on link 0 APIC: 00
1276 13:50:12.222029 APIC: 00
1277 13:50:12.224824 APIC: 05
1278 13:50:12.225236 APIC: 01
1279 13:50:12.225566 APIC: 03
1280 13:50:12.227893 APIC: 06
1281 13:50:12.228449 APIC: 07
1282 13:50:12.230887 APIC: 02
1283 13:50:12.231419 APIC: 04
1284 13:50:12.238123 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1285 13:50:12.244485 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1286 13:50:12.251023 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1287 13:50:12.257695 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1288 13:50:12.261270 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1289 13:50:12.264568 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1290 13:50:12.271139 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1291 13:50:12.280725 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1292 13:50:12.287737 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1293 13:50:12.294246 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1294 13:50:12.300722 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1295 13:50:12.307678 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1296 13:50:12.317255 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1297 13:50:12.324245 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1298 13:50:12.327106 DOMAIN: 0000: Resource ranges:
1299 13:50:12.330562 * Base: 1000, Size: 800, Tag: 100
1300 13:50:12.333903 * Base: 1900, Size: e700, Tag: 100
1301 13:50:12.340673 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1302 13:50:12.347469 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1303 13:50:12.353738 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1304 13:50:12.360982 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1305 13:50:12.367371 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1306 13:50:12.377117 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1307 13:50:12.383428 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1308 13:50:12.390557 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1309 13:50:12.400199 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1310 13:50:12.407022 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1311 13:50:12.413827 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1312 13:50:12.423268 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1313 13:50:12.429889 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1314 13:50:12.436873 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1315 13:50:12.443307 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1316 13:50:12.453522 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1317 13:50:12.459722 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1318 13:50:12.466760 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1319 13:50:12.476746 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1320 13:50:12.483093 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1321 13:50:12.489974 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1322 13:50:12.499704 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1323 13:50:12.506252 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1324 13:50:12.513228 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1325 13:50:12.522949 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1326 13:50:12.526273 DOMAIN: 0000: Resource ranges:
1327 13:50:12.529538 * Base: 7fc00000, Size: 40400000, Tag: 200
1328 13:50:12.532936 * Base: d0000000, Size: 28000000, Tag: 200
1329 13:50:12.539444 * Base: fa000000, Size: 1000000, Tag: 200
1330 13:50:12.542643 * Base: fb001000, Size: 2fff000, Tag: 200
1331 13:50:12.545918 * Base: fe010000, Size: 2e000, Tag: 200
1332 13:50:12.549549 * Base: fe03f000, Size: d41000, Tag: 200
1333 13:50:12.556453 * Base: fed88000, Size: 8000, Tag: 200
1334 13:50:12.559295 * Base: fed93000, Size: d000, Tag: 200
1335 13:50:12.562968 * Base: feda2000, Size: 1e000, Tag: 200
1336 13:50:12.566268 * Base: fede0000, Size: 1220000, Tag: 200
1337 13:50:12.572451 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1338 13:50:12.579538 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1339 13:50:12.586160 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1340 13:50:12.592466 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1341 13:50:12.599072 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1342 13:50:12.605947 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1343 13:50:12.612279 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1344 13:50:12.619237 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1345 13:50:12.625667 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1346 13:50:12.632157 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1347 13:50:12.638946 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1348 13:50:12.645359 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1349 13:50:12.652350 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1350 13:50:12.658856 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1351 13:50:12.665440 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1352 13:50:12.672484 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1353 13:50:12.678591 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1354 13:50:12.685415 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1355 13:50:12.692114 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1356 13:50:12.698741 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1357 13:50:12.705177 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1358 13:50:12.711776 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1359 13:50:12.718719 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1360 13:50:12.725282 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1361 13:50:12.735097 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1362 13:50:12.738298 PCI: 00:1d.0: Resource ranges:
1363 13:50:12.741780 * Base: 7fc00000, Size: 100000, Tag: 200
1364 13:50:12.748086 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1365 13:50:12.754971 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1366 13:50:12.765000 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1367 13:50:12.771394 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1368 13:50:12.774481 Root Device assign_resources, bus 0 link: 0
1369 13:50:12.777670 DOMAIN: 0000 assign_resources, bus 0 link: 0
1370 13:50:12.788134 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1371 13:50:12.794485 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1372 13:50:12.804628 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1373 13:50:12.811220 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1374 13:50:12.817813 PCI: 00:04.0 assign_resources, bus 1 link: 0
1375 13:50:12.821162 PCI: 00:04.0 assign_resources, bus 1 link: 0
1376 13:50:12.831008 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1377 13:50:12.837857 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1378 13:50:12.844208 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1379 13:50:12.851117 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1380 13:50:12.853931 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1381 13:50:12.864385 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1382 13:50:12.867514 PCI: 00:14.0 assign_resources, bus 0 link: 0
1383 13:50:12.874261 PCI: 00:14.0 assign_resources, bus 0 link: 0
1384 13:50:12.880929 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1385 13:50:12.886973 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1386 13:50:12.897140 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1387 13:50:12.900599 PCI: 00:14.3 assign_resources, bus 0 link: 0
1388 13:50:12.906975 PCI: 00:14.3 assign_resources, bus 0 link: 0
1389 13:50:12.914429 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1390 13:50:12.920532 PCI: 00:15.0 assign_resources, bus 0 link: 0
1391 13:50:12.923702 PCI: 00:15.0 assign_resources, bus 0 link: 0
1392 13:50:12.930430 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1393 13:50:12.936852 PCI: 00:15.1 assign_resources, bus 0 link: 0
1394 13:50:12.939913 PCI: 00:15.1 assign_resources, bus 0 link: 0
1395 13:50:12.949786 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1396 13:50:12.956818 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1397 13:50:12.966541 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1398 13:50:12.972997 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1399 13:50:12.980086 PCI: 00:19.1 assign_resources, bus 0 link: 0
1400 13:50:12.982886 PCI: 00:19.1 assign_resources, bus 0 link: 0
1401 13:50:12.992788 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1402 13:50:13.002683 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1403 13:50:13.009738 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1404 13:50:13.016956 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1405 13:50:13.022810 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1406 13:50:13.029524 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1407 13:50:13.036202 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1408 13:50:13.042907 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1409 13:50:13.049387 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1410 13:50:13.052875 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1411 13:50:13.062456 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1412 13:50:13.065842 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1413 13:50:13.072126 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1414 13:50:13.075722 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1415 13:50:13.079186 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1416 13:50:13.085459 LPC: Trying to open IO window from 800 size 1ff
1417 13:50:13.092430 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1418 13:50:13.102355 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1419 13:50:13.108714 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1420 13:50:13.114944 DOMAIN: 0000 assign_resources, bus 0 link: 0
1421 13:50:13.118297 Root Device assign_resources, bus 0 link: 0
1422 13:50:13.121743 Done setting resources.
1423 13:50:13.128739 Show resources in subtree (Root Device)...After assigning values.
1424 13:50:13.131710 Root Device child on link 0 DOMAIN: 0000
1425 13:50:13.135362 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1426 13:50:13.144851 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1427 13:50:13.154577 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1428 13:50:13.158344 PCI: 00:00.0
1429 13:50:13.168226 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1430 13:50:13.177861 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1431 13:50:13.184498 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1432 13:50:13.194473 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1433 13:50:13.204586 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1434 13:50:13.214646 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1435 13:50:13.224332 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1436 13:50:13.231343 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1437 13:50:13.241243 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1438 13:50:13.251123 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1439 13:50:13.260791 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1440 13:50:13.271137 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1441 13:50:13.281110 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1442 13:50:13.287476 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1443 13:50:13.297559 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1444 13:50:13.307105 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1445 13:50:13.317621 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1446 13:50:13.327467 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1447 13:50:13.337115 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1448 13:50:13.346958 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1449 13:50:13.347340 PCI: 00:02.0
1450 13:50:13.357080 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1451 13:50:13.370436 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1452 13:50:13.377003 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1453 13:50:13.383411 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1454 13:50:13.393990 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1455 13:50:13.394368 GENERIC: 0.0
1456 13:50:13.397111 PCI: 00:05.0
1457 13:50:13.406763 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1458 13:50:13.410135 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1459 13:50:13.413532 GENERIC: 0.0
1460 13:50:13.413940 PCI: 00:08.0
1461 13:50:13.426904 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1462 13:50:13.427390 PCI: 00:0a.0
1463 13:50:13.430175 PCI: 00:0d.0 child on link 0 USB0 port 0
1464 13:50:13.443134 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1465 13:50:13.446527 USB0 port 0 child on link 0 USB3 port 0
1466 13:50:13.446946 USB3 port 0
1467 13:50:13.449512 USB3 port 1
1468 13:50:13.449931 USB3 port 2
1469 13:50:13.452969 USB3 port 3
1470 13:50:13.456508 PCI: 00:14.0 child on link 0 USB0 port 0
1471 13:50:13.469452 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1472 13:50:13.473130 USB0 port 0 child on link 0 USB2 port 0
1473 13:50:13.473550 USB2 port 0
1474 13:50:13.476011 USB2 port 1
1475 13:50:13.476425 USB2 port 2
1476 13:50:13.479463 USB2 port 3
1477 13:50:13.479938 USB2 port 4
1478 13:50:13.482907 USB2 port 5
1479 13:50:13.486312 USB2 port 6
1480 13:50:13.486725 USB2 port 7
1481 13:50:13.489636 USB2 port 8
1482 13:50:13.490052 USB2 port 9
1483 13:50:13.492638 USB3 port 0
1484 13:50:13.493052 USB3 port 1
1485 13:50:13.496550 USB3 port 2
1486 13:50:13.497023 USB3 port 3
1487 13:50:13.499690 PCI: 00:14.2
1488 13:50:13.509671 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1489 13:50:13.519364 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1490 13:50:13.522854 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1491 13:50:13.532685 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1492 13:50:13.536232 GENERIC: 0.0
1493 13:50:13.539385 PCI: 00:15.0 child on link 0 I2C: 00:1a
1494 13:50:13.549262 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1495 13:50:13.552162 I2C: 00:1a
1496 13:50:13.552583 I2C: 00:31
1497 13:50:13.555687 I2C: 00:32
1498 13:50:13.559130 PCI: 00:15.1 child on link 0 I2C: 00:10
1499 13:50:13.568919 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1500 13:50:13.572671 I2C: 00:10
1501 13:50:13.573241 PCI: 00:15.2
1502 13:50:13.582696 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1503 13:50:13.585526 PCI: 00:15.3
1504 13:50:13.595384 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1505 13:50:13.595941 PCI: 00:16.0
1506 13:50:13.609261 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1507 13:50:13.609686 PCI: 00:19.0
1508 13:50:13.611916 PCI: 00:19.1 child on link 0 I2C: 00:15
1509 13:50:13.625267 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1510 13:50:13.625948 I2C: 00:15
1511 13:50:13.628647 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1512 13:50:13.638588 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1513 13:50:13.652099 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1514 13:50:13.661942 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1515 13:50:13.662371 GENERIC: 0.0
1516 13:50:13.665788 PCI: 01:00.0
1517 13:50:13.675314 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1518 13:50:13.685159 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1519 13:50:13.688153 PCI: 00:1e.0
1520 13:50:13.698547 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1521 13:50:13.701844 PCI: 00:1e.2 child on link 0 SPI: 00
1522 13:50:13.711765 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1523 13:50:13.714986 SPI: 00
1524 13:50:13.718121 PCI: 00:1e.3 child on link 0 SPI: 00
1525 13:50:13.728092 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1526 13:50:13.728526 SPI: 00
1527 13:50:13.734758 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1528 13:50:13.741049 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1529 13:50:13.744468 PNP: 0c09.0
1530 13:50:13.754421 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1531 13:50:13.757483 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1532 13:50:13.767455 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1533 13:50:13.777586 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1534 13:50:13.781242 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1535 13:50:13.781693 GENERIC: 0.0
1536 13:50:13.784047 GENERIC: 1.0
1537 13:50:13.787630 PCI: 00:1f.3
1538 13:50:13.797824 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1539 13:50:13.807991 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1540 13:50:13.808432 PCI: 00:1f.5
1541 13:50:13.817449 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1542 13:50:13.823855 CPU_CLUSTER: 0 child on link 0 APIC: 00
1543 13:50:13.824289 APIC: 00
1544 13:50:13.824726 APIC: 05
1545 13:50:13.827324 APIC: 01
1546 13:50:13.827800 APIC: 03
1547 13:50:13.830885 APIC: 06
1548 13:50:13.831316 APIC: 07
1549 13:50:13.831844 APIC: 02
1550 13:50:13.833963 APIC: 04
1551 13:50:13.837418 Done allocating resources.
1552 13:50:13.840401 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1553 13:50:13.847742 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1554 13:50:13.851112 Configure GPIOs for I2S audio on UP4.
1555 13:50:13.858290 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1556 13:50:13.861410 Enabling resources...
1557 13:50:13.864647 PCI: 00:00.0 subsystem <- 8086/9a12
1558 13:50:13.868027 PCI: 00:00.0 cmd <- 06
1559 13:50:13.871313 PCI: 00:02.0 subsystem <- 8086/9a40
1560 13:50:13.874344 PCI: 00:02.0 cmd <- 03
1561 13:50:13.877676 PCI: 00:04.0 subsystem <- 8086/9a03
1562 13:50:13.881317 PCI: 00:04.0 cmd <- 02
1563 13:50:13.884392 PCI: 00:05.0 subsystem <- 8086/9a19
1564 13:50:13.884820 PCI: 00:05.0 cmd <- 02
1565 13:50:13.891296 PCI: 00:08.0 subsystem <- 8086/9a11
1566 13:50:13.891773 PCI: 00:08.0 cmd <- 06
1567 13:50:13.894803 PCI: 00:0d.0 subsystem <- 8086/9a13
1568 13:50:13.897727 PCI: 00:0d.0 cmd <- 02
1569 13:50:13.901178 PCI: 00:14.0 subsystem <- 8086/a0ed
1570 13:50:13.904506 PCI: 00:14.0 cmd <- 02
1571 13:50:13.907882 PCI: 00:14.2 subsystem <- 8086/a0ef
1572 13:50:13.911176 PCI: 00:14.2 cmd <- 02
1573 13:50:13.914351 PCI: 00:14.3 subsystem <- 8086/a0f0
1574 13:50:13.917554 PCI: 00:14.3 cmd <- 02
1575 13:50:13.920870 PCI: 00:15.0 subsystem <- 8086/a0e8
1576 13:50:13.923915 PCI: 00:15.0 cmd <- 02
1577 13:50:13.927866 PCI: 00:15.1 subsystem <- 8086/a0e9
1578 13:50:13.930640 PCI: 00:15.1 cmd <- 02
1579 13:50:13.934241 PCI: 00:15.2 subsystem <- 8086/a0ea
1580 13:50:13.934660 PCI: 00:15.2 cmd <- 02
1581 13:50:13.940657 PCI: 00:15.3 subsystem <- 8086/a0eb
1582 13:50:13.941088 PCI: 00:15.3 cmd <- 02
1583 13:50:13.944137 PCI: 00:16.0 subsystem <- 8086/a0e0
1584 13:50:13.947160 PCI: 00:16.0 cmd <- 02
1585 13:50:13.950737 PCI: 00:19.1 subsystem <- 8086/a0c6
1586 13:50:13.954247 PCI: 00:19.1 cmd <- 02
1587 13:50:13.956959 PCI: 00:1d.0 bridge ctrl <- 0013
1588 13:50:13.960507 PCI: 00:1d.0 subsystem <- 8086/a0b0
1589 13:50:13.964064 PCI: 00:1d.0 cmd <- 06
1590 13:50:13.967522 PCI: 00:1e.0 subsystem <- 8086/a0a8
1591 13:50:13.970567 PCI: 00:1e.0 cmd <- 06
1592 13:50:13.973873 PCI: 00:1e.2 subsystem <- 8086/a0aa
1593 13:50:13.977339 PCI: 00:1e.2 cmd <- 06
1594 13:50:13.980268 PCI: 00:1e.3 subsystem <- 8086/a0ab
1595 13:50:13.983725 PCI: 00:1e.3 cmd <- 02
1596 13:50:13.986748 PCI: 00:1f.0 subsystem <- 8086/a087
1597 13:50:13.987186 PCI: 00:1f.0 cmd <- 407
1598 13:50:13.993807 PCI: 00:1f.3 subsystem <- 8086/a0c8
1599 13:50:13.994246 PCI: 00:1f.3 cmd <- 02
1600 13:50:14.000148 PCI: 00:1f.5 subsystem <- 8086/a0a4
1601 13:50:14.000583 PCI: 00:1f.5 cmd <- 406
1602 13:50:14.005312 PCI: 01:00.0 cmd <- 02
1603 13:50:14.009893 done.
1604 13:50:14.013227 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1605 13:50:14.016229 Initializing devices...
1606 13:50:14.019634 Root Device init
1607 13:50:14.022786 Chrome EC: Set SMI mask to 0x0000000000000000
1608 13:50:14.030096 Chrome EC: clear events_b mask to 0x0000000000000000
1609 13:50:14.036563 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1610 13:50:14.043469 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1611 13:50:14.050010 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1612 13:50:14.053492 Chrome EC: Set WAKE mask to 0x0000000000000000
1613 13:50:14.061536 fw_config match found: DB_USB=USB3_ACTIVE
1614 13:50:14.064866 Configure Right Type-C port orientation for retimer
1615 13:50:14.067715 Root Device init finished in 46 msecs
1616 13:50:14.072264 PCI: 00:00.0 init
1617 13:50:14.075166 CPU TDP = 9 Watts
1618 13:50:14.075587 CPU PL1 = 9 Watts
1619 13:50:14.078655 CPU PL2 = 40 Watts
1620 13:50:14.082284 CPU PL4 = 83 Watts
1621 13:50:14.085216 PCI: 00:00.0 init finished in 8 msecs
1622 13:50:14.085732 PCI: 00:02.0 init
1623 13:50:14.088536 GMA: Found VBT in CBFS
1624 13:50:14.091824 GMA: Found valid VBT in CBFS
1625 13:50:14.098346 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1626 13:50:14.105040 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1627 13:50:14.108532 PCI: 00:02.0 init finished in 18 msecs
1628 13:50:14.112128 PCI: 00:05.0 init
1629 13:50:14.115099 PCI: 00:05.0 init finished in 0 msecs
1630 13:50:14.118342 PCI: 00:08.0 init
1631 13:50:14.121697 PCI: 00:08.0 init finished in 0 msecs
1632 13:50:14.125023 PCI: 00:14.0 init
1633 13:50:14.128440 PCI: 00:14.0 init finished in 0 msecs
1634 13:50:14.131247 PCI: 00:14.2 init
1635 13:50:14.134881 PCI: 00:14.2 init finished in 0 msecs
1636 13:50:14.138105 PCI: 00:15.0 init
1637 13:50:14.141522 I2C bus 0 version 0x3230302a
1638 13:50:14.144878 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1639 13:50:14.148249 PCI: 00:15.0 init finished in 6 msecs
1640 13:50:14.148698 PCI: 00:15.1 init
1641 13:50:14.151193 I2C bus 1 version 0x3230302a
1642 13:50:14.154883 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1643 13:50:14.161353 PCI: 00:15.1 init finished in 6 msecs
1644 13:50:14.161873 PCI: 00:15.2 init
1645 13:50:14.164774 I2C bus 2 version 0x3230302a
1646 13:50:14.168072 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1647 13:50:14.171021 PCI: 00:15.2 init finished in 6 msecs
1648 13:50:14.174435 PCI: 00:15.3 init
1649 13:50:14.178032 I2C bus 3 version 0x3230302a
1650 13:50:14.181088 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1651 13:50:14.184528 PCI: 00:15.3 init finished in 6 msecs
1652 13:50:14.188037 PCI: 00:16.0 init
1653 13:50:14.190901 PCI: 00:16.0 init finished in 0 msecs
1654 13:50:14.194551 PCI: 00:19.1 init
1655 13:50:14.198090 I2C bus 5 version 0x3230302a
1656 13:50:14.200946 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1657 13:50:14.204317 PCI: 00:19.1 init finished in 6 msecs
1658 13:50:14.207673 PCI: 00:1d.0 init
1659 13:50:14.208112 Initializing PCH PCIe bridge.
1660 13:50:14.214410 PCI: 00:1d.0 init finished in 3 msecs
1661 13:50:14.217584 PCI: 00:1f.0 init
1662 13:50:14.220826 IOAPIC: Initializing IOAPIC at 0xfec00000
1663 13:50:14.224561 IOAPIC: Bootstrap Processor Local APIC = 0x00
1664 13:50:14.227530 IOAPIC: ID = 0x02
1665 13:50:14.230799 IOAPIC: Dumping registers
1666 13:50:14.231225 reg 0x0000: 0x02000000
1667 13:50:14.234260 reg 0x0001: 0x00770020
1668 13:50:14.237465 reg 0x0002: 0x00000000
1669 13:50:14.240859 PCI: 00:1f.0 init finished in 21 msecs
1670 13:50:14.243993 PCI: 00:1f.2 init
1671 13:50:14.247582 Disabling ACPI via APMC.
1672 13:50:14.250744 APMC done.
1673 13:50:14.254415 PCI: 00:1f.2 init finished in 6 msecs
1674 13:50:14.265594 PCI: 01:00.0 init
1675 13:50:14.268878 PCI: 01:00.0 init finished in 0 msecs
1676 13:50:14.271629 PNP: 0c09.0 init
1677 13:50:14.278708 Google Chrome EC uptime: 8.307 seconds
1678 13:50:14.282190 Google Chrome AP resets since EC boot: 1
1679 13:50:14.285798 Google Chrome most recent AP reset causes:
1680 13:50:14.288726 0.453: 32775 shutdown: entering G3
1681 13:50:14.295624 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1682 13:50:14.298848 PNP: 0c09.0 init finished in 24 msecs
1683 13:50:14.305559 Devices initialized
1684 13:50:14.309074 Show all devs... After init.
1685 13:50:14.312552 Root Device: enabled 1
1686 13:50:14.313020 DOMAIN: 0000: enabled 1
1687 13:50:14.315711 CPU_CLUSTER: 0: enabled 1
1688 13:50:14.319099 PCI: 00:00.0: enabled 1
1689 13:50:14.322321 PCI: 00:02.0: enabled 1
1690 13:50:14.322746 PCI: 00:04.0: enabled 1
1691 13:50:14.325663 PCI: 00:05.0: enabled 1
1692 13:50:14.328592 PCI: 00:06.0: enabled 0
1693 13:50:14.332472 PCI: 00:07.0: enabled 0
1694 13:50:14.332905 PCI: 00:07.1: enabled 0
1695 13:50:14.335449 PCI: 00:07.2: enabled 0
1696 13:50:14.338839 PCI: 00:07.3: enabled 0
1697 13:50:14.342402 PCI: 00:08.0: enabled 1
1698 13:50:14.342845 PCI: 00:09.0: enabled 0
1699 13:50:14.345474 PCI: 00:0a.0: enabled 0
1700 13:50:14.348535 PCI: 00:0d.0: enabled 1
1701 13:50:14.352294 PCI: 00:0d.1: enabled 0
1702 13:50:14.352830 PCI: 00:0d.2: enabled 0
1703 13:50:14.355516 PCI: 00:0d.3: enabled 0
1704 13:50:14.358287 PCI: 00:0e.0: enabled 0
1705 13:50:14.358715 PCI: 00:10.2: enabled 1
1706 13:50:14.361738 PCI: 00:10.6: enabled 0
1707 13:50:14.365313 PCI: 00:10.7: enabled 0
1708 13:50:14.368667 PCI: 00:12.0: enabled 0
1709 13:50:14.369261 PCI: 00:12.6: enabled 0
1710 13:50:14.372102 PCI: 00:13.0: enabled 0
1711 13:50:14.375154 PCI: 00:14.0: enabled 1
1712 13:50:14.378385 PCI: 00:14.1: enabled 0
1713 13:50:14.378932 PCI: 00:14.2: enabled 1
1714 13:50:14.381794 PCI: 00:14.3: enabled 1
1715 13:50:14.385440 PCI: 00:15.0: enabled 1
1716 13:50:14.388477 PCI: 00:15.1: enabled 1
1717 13:50:14.388894 PCI: 00:15.2: enabled 1
1718 13:50:14.392188 PCI: 00:15.3: enabled 1
1719 13:50:14.395065 PCI: 00:16.0: enabled 1
1720 13:50:14.398571 PCI: 00:16.1: enabled 0
1721 13:50:14.399003 PCI: 00:16.2: enabled 0
1722 13:50:14.401439 PCI: 00:16.3: enabled 0
1723 13:50:14.405028 PCI: 00:16.4: enabled 0
1724 13:50:14.405472 PCI: 00:16.5: enabled 0
1725 13:50:14.408700 PCI: 00:17.0: enabled 0
1726 13:50:14.411536 PCI: 00:19.0: enabled 0
1727 13:50:14.415218 PCI: 00:19.1: enabled 1
1728 13:50:14.415664 PCI: 00:19.2: enabled 0
1729 13:50:14.418673 PCI: 00:1c.0: enabled 1
1730 13:50:14.421520 PCI: 00:1c.1: enabled 0
1731 13:50:14.425034 PCI: 00:1c.2: enabled 0
1732 13:50:14.425463 PCI: 00:1c.3: enabled 0
1733 13:50:14.428284 PCI: 00:1c.4: enabled 0
1734 13:50:14.431644 PCI: 00:1c.5: enabled 0
1735 13:50:14.434841 PCI: 00:1c.6: enabled 1
1736 13:50:14.435281 PCI: 00:1c.7: enabled 0
1737 13:50:14.438085 PCI: 00:1d.0: enabled 1
1738 13:50:14.441537 PCI: 00:1d.1: enabled 0
1739 13:50:14.441963 PCI: 00:1d.2: enabled 1
1740 13:50:14.445124 PCI: 00:1d.3: enabled 0
1741 13:50:14.448005 PCI: 00:1e.0: enabled 1
1742 13:50:14.451434 PCI: 00:1e.1: enabled 0
1743 13:50:14.451933 PCI: 00:1e.2: enabled 1
1744 13:50:14.454925 PCI: 00:1e.3: enabled 1
1745 13:50:14.458126 PCI: 00:1f.0: enabled 1
1746 13:50:14.461183 PCI: 00:1f.1: enabled 0
1747 13:50:14.461738 PCI: 00:1f.2: enabled 1
1748 13:50:14.464682 PCI: 00:1f.3: enabled 1
1749 13:50:14.468241 PCI: 00:1f.4: enabled 0
1750 13:50:14.471535 PCI: 00:1f.5: enabled 1
1751 13:50:14.472009 PCI: 00:1f.6: enabled 0
1752 13:50:14.475050 PCI: 00:1f.7: enabled 0
1753 13:50:14.477776 APIC: 00: enabled 1
1754 13:50:14.478204 GENERIC: 0.0: enabled 1
1755 13:50:14.481584 GENERIC: 0.0: enabled 1
1756 13:50:14.484447 GENERIC: 1.0: enabled 1
1757 13:50:14.487820 GENERIC: 0.0: enabled 1
1758 13:50:14.488252 GENERIC: 1.0: enabled 1
1759 13:50:14.491774 USB0 port 0: enabled 1
1760 13:50:14.494693 GENERIC: 0.0: enabled 1
1761 13:50:14.498026 USB0 port 0: enabled 1
1762 13:50:14.498445 GENERIC: 0.0: enabled 1
1763 13:50:14.501416 I2C: 00:1a: enabled 1
1764 13:50:14.504576 I2C: 00:31: enabled 1
1765 13:50:14.504993 I2C: 00:32: enabled 1
1766 13:50:14.508115 I2C: 00:10: enabled 1
1767 13:50:14.511101 I2C: 00:15: enabled 1
1768 13:50:14.511515 GENERIC: 0.0: enabled 0
1769 13:50:14.514667 GENERIC: 1.0: enabled 0
1770 13:50:14.517598 GENERIC: 0.0: enabled 1
1771 13:50:14.518018 SPI: 00: enabled 1
1772 13:50:14.520932 SPI: 00: enabled 1
1773 13:50:14.524397 PNP: 0c09.0: enabled 1
1774 13:50:14.524811 GENERIC: 0.0: enabled 1
1775 13:50:14.527833 USB3 port 0: enabled 1
1776 13:50:14.531330 USB3 port 1: enabled 1
1777 13:50:14.534268 USB3 port 2: enabled 0
1778 13:50:14.534686 USB3 port 3: enabled 0
1779 13:50:14.537760 USB2 port 0: enabled 0
1780 13:50:14.541214 USB2 port 1: enabled 1
1781 13:50:14.541649 USB2 port 2: enabled 1
1782 13:50:14.544305 USB2 port 3: enabled 0
1783 13:50:14.547340 USB2 port 4: enabled 1
1784 13:50:14.551375 USB2 port 5: enabled 0
1785 13:50:14.551822 USB2 port 6: enabled 0
1786 13:50:14.554153 USB2 port 7: enabled 0
1787 13:50:14.557754 USB2 port 8: enabled 0
1788 13:50:14.558170 USB2 port 9: enabled 0
1789 13:50:14.561080 USB3 port 0: enabled 0
1790 13:50:14.564245 USB3 port 1: enabled 1
1791 13:50:14.564662 USB3 port 2: enabled 0
1792 13:50:14.567540 USB3 port 3: enabled 0
1793 13:50:14.571054 GENERIC: 0.0: enabled 1
1794 13:50:14.573923 GENERIC: 1.0: enabled 1
1795 13:50:14.574339 APIC: 05: enabled 1
1796 13:50:14.577401 APIC: 01: enabled 1
1797 13:50:14.580381 APIC: 03: enabled 1
1798 13:50:14.580798 APIC: 06: enabled 1
1799 13:50:14.583869 APIC: 07: enabled 1
1800 13:50:14.584306 APIC: 02: enabled 1
1801 13:50:14.587395 APIC: 04: enabled 1
1802 13:50:14.590627 PCI: 01:00.0: enabled 1
1803 13:50:14.593908 BS: BS_DEV_INIT run times (exec / console): 35 / 540 ms
1804 13:50:14.600592 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1805 13:50:14.603863 ELOG: NV offset 0xf30000 size 0x1000
1806 13:50:14.611115 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1807 13:50:14.617551 ELOG: Event(17) added with size 13 at 2023-08-16 13:49:08 UTC
1808 13:50:14.624285 ELOG: Event(92) added with size 9 at 2023-08-16 13:49:08 UTC
1809 13:50:14.630752 ELOG: Event(93) added with size 9 at 2023-08-16 13:49:08 UTC
1810 13:50:14.637086 ELOG: Event(9E) added with size 10 at 2023-08-16 13:49:08 UTC
1811 13:50:14.644026 ELOG: Event(9F) added with size 14 at 2023-08-16 13:49:08 UTC
1812 13:50:14.650490 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1813 13:50:14.657054 ELOG: Event(A1) added with size 10 at 2023-08-16 13:49:08 UTC
1814 13:50:14.663413 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1815 13:50:14.670207 ELOG: Event(A0) added with size 9 at 2023-08-16 13:49:08 UTC
1816 13:50:14.673691 elog_add_boot_reason: Logged dev mode boot
1817 13:50:14.680303 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1818 13:50:14.680724 Finalize devices...
1819 13:50:14.683286 Devices finalized
1820 13:50:14.689889 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1821 13:50:14.693308 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1822 13:50:14.700086 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1823 13:50:14.703120 ME: HFSTS1 : 0x80030055
1824 13:50:14.710132 ME: HFSTS2 : 0x30280116
1825 13:50:14.712871 ME: HFSTS3 : 0x00000050
1826 13:50:14.716270 ME: HFSTS4 : 0x00004000
1827 13:50:14.723138 ME: HFSTS5 : 0x00000000
1828 13:50:14.726460 ME: HFSTS6 : 0x40400006
1829 13:50:14.729877 ME: Manufacturing Mode : YES
1830 13:50:14.732919 ME: SPI Protection Mode Enabled : NO
1831 13:50:14.739692 ME: FW Partition Table : OK
1832 13:50:14.742770 ME: Bringup Loader Failure : NO
1833 13:50:14.746585 ME: Firmware Init Complete : NO
1834 13:50:14.749642 ME: Boot Options Present : NO
1835 13:50:14.752958 ME: Update In Progress : NO
1836 13:50:14.756424 ME: D0i3 Support : YES
1837 13:50:14.759877 ME: Low Power State Enabled : NO
1838 13:50:14.763183 ME: CPU Replaced : YES
1839 13:50:14.769424 ME: CPU Replacement Valid : YES
1840 13:50:14.772956 ME: Current Working State : 5
1841 13:50:14.776343 ME: Current Operation State : 1
1842 13:50:14.779543 ME: Current Operation Mode : 3
1843 13:50:14.783198 ME: Error Code : 0
1844 13:50:14.786139 ME: Enhanced Debug Mode : NO
1845 13:50:14.789621 ME: CPU Debug Disabled : YES
1846 13:50:14.792509 ME: TXT Support : NO
1847 13:50:14.799667 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1848 13:50:14.806173 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1849 13:50:14.809339 CBFS: 'fallback/slic' not found.
1850 13:50:14.815874 ACPI: Writing ACPI tables at 76b01000.
1851 13:50:14.816353 ACPI: * FACS
1852 13:50:14.819151 ACPI: * DSDT
1853 13:50:14.822901 Ramoops buffer: 0x100000@0x76a00000.
1854 13:50:14.825954 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1855 13:50:14.832647 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1856 13:50:14.835916 Google Chrome EC: version:
1857 13:50:14.839346 ro: voema_v2.0.10114-a447f03e46
1858 13:50:14.842239 rw: voema_v2.0.10132-7b2059e3bc
1859 13:50:14.842619 running image: 2
1860 13:50:14.849046 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1861 13:50:14.854171 ACPI: * FADT
1862 13:50:14.854356 SCI is IRQ9
1863 13:50:14.860492 ACPI: added table 1/32, length now 40
1864 13:50:14.860667 ACPI: * SSDT
1865 13:50:14.863918 Found 1 CPU(s) with 8 core(s) each.
1866 13:50:14.870067 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1867 13:50:14.873390 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1868 13:50:14.876822 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1869 13:50:14.880134 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1870 13:50:14.886614 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1871 13:50:14.893741 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1872 13:50:14.896642 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1873 13:50:14.903119 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1874 13:50:14.910010 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1875 13:50:14.913186 \_SB.PCI0.RP09: Added StorageD3Enable property
1876 13:50:14.920129 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1877 13:50:14.923503 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1878 13:50:14.930307 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1879 13:50:14.933230 PS2K: Passing 80 keymaps to kernel
1880 13:50:14.940315 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1881 13:50:14.946634 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1882 13:50:14.953574 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1883 13:50:14.960015 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1884 13:50:14.966214 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1885 13:50:14.973473 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1886 13:50:14.979813 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1887 13:50:14.986621 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1888 13:50:14.989641 ACPI: added table 2/32, length now 44
1889 13:50:14.993067 ACPI: * MCFG
1890 13:50:14.996613 ACPI: added table 3/32, length now 48
1891 13:50:14.996714 ACPI: * TPM2
1892 13:50:14.999666 TPM2 log created at 0x769f0000
1893 13:50:15.003230 ACPI: added table 4/32, length now 52
1894 13:50:15.006675 ACPI: * MADT
1895 13:50:15.006756 SCI is IRQ9
1896 13:50:15.009686 ACPI: added table 5/32, length now 56
1897 13:50:15.013124 current = 76b09850
1898 13:50:15.013210 ACPI: * DMAR
1899 13:50:15.019698 ACPI: added table 6/32, length now 60
1900 13:50:15.023077 ACPI: added table 7/32, length now 64
1901 13:50:15.023179 ACPI: * HPET
1902 13:50:15.026443 ACPI: added table 8/32, length now 68
1903 13:50:15.029817 ACPI: done.
1904 13:50:15.032677 ACPI tables: 35216 bytes.
1905 13:50:15.032798 smbios_write_tables: 769ef000
1906 13:50:15.036703 EC returned error result code 3
1907 13:50:15.039645 Couldn't obtain OEM name from CBI
1908 13:50:15.044952 Create SMBIOS type 16
1909 13:50:15.047835 Create SMBIOS type 17
1910 13:50:15.051324 GENERIC: 0.0 (WIFI Device)
1911 13:50:15.054794 SMBIOS tables: 1734 bytes.
1912 13:50:15.058239 Writing table forward entry at 0x00000500
1913 13:50:15.064808 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1914 13:50:15.067948 Writing coreboot table at 0x76b25000
1915 13:50:15.074991 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1916 13:50:15.078421 1. 0000000000001000-000000000009ffff: RAM
1917 13:50:15.081305 2. 00000000000a0000-00000000000fffff: RESERVED
1918 13:50:15.088225 3. 0000000000100000-00000000769eefff: RAM
1919 13:50:15.091628 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1920 13:50:15.098063 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1921 13:50:15.105028 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1922 13:50:15.107928 7. 0000000077000000-000000007fbfffff: RESERVED
1923 13:50:15.111369 8. 00000000c0000000-00000000cfffffff: RESERVED
1924 13:50:15.118299 9. 00000000f8000000-00000000f9ffffff: RESERVED
1925 13:50:15.121266 10. 00000000fb000000-00000000fb000fff: RESERVED
1926 13:50:15.127970 11. 00000000fe000000-00000000fe00ffff: RESERVED
1927 13:50:15.131140 12. 00000000fed80000-00000000fed87fff: RESERVED
1928 13:50:15.137878 13. 00000000fed90000-00000000fed92fff: RESERVED
1929 13:50:15.141413 14. 00000000feda0000-00000000feda1fff: RESERVED
1930 13:50:15.148046 15. 00000000fedc0000-00000000feddffff: RESERVED
1931 13:50:15.151293 16. 0000000100000000-00000004803fffff: RAM
1932 13:50:15.154471 Passing 4 GPIOs to payload:
1933 13:50:15.157754 NAME | PORT | POLARITY | VALUE
1934 13:50:15.164566 lid | undefined | high | high
1935 13:50:15.170987 power | undefined | high | low
1936 13:50:15.173884 oprom | undefined | high | low
1937 13:50:15.180951 EC in RW | 0x000000e5 | high | high
1938 13:50:15.187181 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7e26
1939 13:50:15.190586 coreboot table: 1576 bytes.
1940 13:50:15.193517 IMD ROOT 0. 0x76fff000 0x00001000
1941 13:50:15.197009 IMD SMALL 1. 0x76ffe000 0x00001000
1942 13:50:15.200601 FSP MEMORY 2. 0x76c4e000 0x003b0000
1943 13:50:15.204016 VPD 3. 0x76c4d000 0x00000367
1944 13:50:15.207384 RO MCACHE 4. 0x76c4c000 0x00000fdc
1945 13:50:15.210629 CONSOLE 5. 0x76c2c000 0x00020000
1946 13:50:15.213972 FMAP 6. 0x76c2b000 0x00000578
1947 13:50:15.220484 TIME STAMP 7. 0x76c2a000 0x00000910
1948 13:50:15.223970 VBOOT WORK 8. 0x76c16000 0x00014000
1949 13:50:15.226937 ROMSTG STCK 9. 0x76c15000 0x00001000
1950 13:50:15.230390 AFTER CAR 10. 0x76c0a000 0x0000b000
1951 13:50:15.233638 RAMSTAGE 11. 0x76b97000 0x00073000
1952 13:50:15.237107 REFCODE 12. 0x76b42000 0x00055000
1953 13:50:15.240691 SMM BACKUP 13. 0x76b32000 0x00010000
1954 13:50:15.243538 4f444749 14. 0x76b30000 0x00002000
1955 13:50:15.247120 EXT VBT15. 0x76b2d000 0x0000219f
1956 13:50:15.253868 COREBOOT 16. 0x76b25000 0x00008000
1957 13:50:15.257106 ACPI 17. 0x76b01000 0x00024000
1958 13:50:15.260297 ACPI GNVS 18. 0x76b00000 0x00001000
1959 13:50:15.263854 RAMOOPS 19. 0x76a00000 0x00100000
1960 13:50:15.267171 TPM2 TCGLOG20. 0x769f0000 0x00010000
1961 13:50:15.270457 SMBIOS 21. 0x769ef000 0x00000800
1962 13:50:15.273301 IMD small region:
1963 13:50:15.276749 IMD ROOT 0. 0x76ffec00 0x00000400
1964 13:50:15.280375 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1965 13:50:15.283795 POWER STATE 2. 0x76ffeb80 0x00000044
1966 13:50:15.286849 ROMSTAGE 3. 0x76ffeb60 0x00000004
1967 13:50:15.293796 MEM INFO 4. 0x76ffe980 0x000001e0
1968 13:50:15.296638 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1969 13:50:15.300051 MTRR: Physical address space:
1970 13:50:15.307078 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1971 13:50:15.313352 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1972 13:50:15.320242 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1973 13:50:15.326821 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1974 13:50:15.333464 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1975 13:50:15.340148 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1976 13:50:15.346833 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1977 13:50:15.350055 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 13:50:15.353225 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 13:50:15.356547 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 13:50:15.360324 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 13:50:15.366783 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 13:50:15.369490 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 13:50:15.373126 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 13:50:15.376743 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 13:50:15.382855 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 13:50:15.386412 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 13:50:15.389470 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 13:50:15.393724 call enable_fixed_mtrr()
1989 13:50:15.397023 CPU physical address size: 39 bits
1990 13:50:15.403544 MTRR: default type WB/UC MTRR counts: 6/7.
1991 13:50:15.406927 MTRR: WB selected as default type.
1992 13:50:15.413782 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1993 13:50:15.417018 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1994 13:50:15.423434 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1995 13:50:15.430408 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1996 13:50:15.436944 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1997 13:50:15.443393 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1998 13:50:15.446983
1999 13:50:15.447550 MTRR check
2000 13:50:15.450487 Fixed MTRRs : Enabled
2001 13:50:15.450932 Variable MTRRs: Enabled
2002 13:50:15.451349
2003 13:50:15.457054 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 13:50:15.460145 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 13:50:15.463549 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 13:50:15.467099 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 13:50:15.473423 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 13:50:15.476770 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 13:50:15.480080 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 13:50:15.483385 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 13:50:15.490591 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 13:50:15.493653 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 13:50:15.496466 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 13:50:15.504135 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 13:50:15.504554 call enable_fixed_mtrr()
2016 13:50:15.510562 MTRR: Fixed MSR 0x258 0x0606060606060606
2017 13:50:15.513427 MTRR: Fixed MSR 0x259 0x0000000000000000
2018 13:50:15.517166 MTRR: Fixed MSR 0x268 0x0606060606060606
2019 13:50:15.520593 MTRR: Fixed MSR 0x269 0x0606060606060606
2020 13:50:15.526936 MTRR: Fixed MSR 0x26a 0x0606060606060606
2021 13:50:15.530302 MTRR: Fixed MSR 0x26b 0x0606060606060606
2022 13:50:15.533727 MTRR: Fixed MSR 0x26c 0x0606060606060606
2023 13:50:15.537205 MTRR: Fixed MSR 0x26d 0x0606060606060606
2024 13:50:15.543669 MTRR: Fixed MSR 0x26e 0x0606060606060606
2025 13:50:15.547039 MTRR: Fixed MSR 0x26f 0x0606060606060606
2026 13:50:15.549993 CPU physical address size: 39 bits
2027 13:50:15.555374 call enable_fixed_mtrr()
2028 13:50:15.558071 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 13:50:15.565084 MTRR: Fixed MSR 0x250 0x0606060606060606
2030 13:50:15.568444 MTRR: Fixed MSR 0x258 0x0606060606060606
2031 13:50:15.571673 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 13:50:15.575015 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 13:50:15.581465 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 13:50:15.585037 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 13:50:15.588036 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 13:50:15.591705 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 13:50:15.598438 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 13:50:15.601712 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 13:50:15.604761 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 13:50:15.611714 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 13:50:15.612142 call enable_fixed_mtrr()
2042 13:50:15.618511 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 13:50:15.622369 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 13:50:15.624858 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 13:50:15.628299 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 13:50:15.634724 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 13:50:15.638150 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 13:50:15.641676 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 13:50:15.644970 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 13:50:15.651139 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 13:50:15.654676 CPU physical address size: 39 bits
2052 13:50:15.658251 MTRR: Fixed MSR 0x250 0x0606060606060606
2053 13:50:15.664692 MTRR: Fixed MSR 0x250 0x0606060606060606
2054 13:50:15.667697 MTRR: Fixed MSR 0x258 0x0606060606060606
2055 13:50:15.671137 MTRR: Fixed MSR 0x259 0x0000000000000000
2056 13:50:15.674725 MTRR: Fixed MSR 0x268 0x0606060606060606
2057 13:50:15.680941 MTRR: Fixed MSR 0x269 0x0606060606060606
2058 13:50:15.684402 MTRR: Fixed MSR 0x26a 0x0606060606060606
2059 13:50:15.688072 MTRR: Fixed MSR 0x26b 0x0606060606060606
2060 13:50:15.690858 MTRR: Fixed MSR 0x26c 0x0606060606060606
2061 13:50:15.697998 MTRR: Fixed MSR 0x26d 0x0606060606060606
2062 13:50:15.700982 MTRR: Fixed MSR 0x26e 0x0606060606060606
2063 13:50:15.704488 MTRR: Fixed MSR 0x26f 0x0606060606060606
2064 13:50:15.711480 MTRR: Fixed MSR 0x258 0x0606060606060606
2065 13:50:15.711941 call enable_fixed_mtrr()
2066 13:50:15.717675 MTRR: Fixed MSR 0x259 0x0000000000000000
2067 13:50:15.721326 MTRR: Fixed MSR 0x268 0x0606060606060606
2068 13:50:15.724749 MTRR: Fixed MSR 0x269 0x0606060606060606
2069 13:50:15.727825 MTRR: Fixed MSR 0x26a 0x0606060606060606
2070 13:50:15.734463 MTRR: Fixed MSR 0x26b 0x0606060606060606
2071 13:50:15.738140 MTRR: Fixed MSR 0x26c 0x0606060606060606
2072 13:50:15.741116 MTRR: Fixed MSR 0x26d 0x0606060606060606
2073 13:50:15.744679 MTRR: Fixed MSR 0x26e 0x0606060606060606
2074 13:50:15.750940 MTRR: Fixed MSR 0x26f 0x0606060606060606
2075 13:50:15.754437 CPU physical address size: 39 bits
2076 13:50:15.758761 call enable_fixed_mtrr()
2077 13:50:15.765054 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2078 13:50:15.768758 MTRR: Fixed MSR 0x250 0x0606060606060606
2079 13:50:15.772939 Checking cr50 for pending updates
2080 13:50:15.776857 MTRR: Fixed MSR 0x258 0x0606060606060606
2081 13:50:15.779575 MTRR: Fixed MSR 0x259 0x0000000000000000
2082 13:50:15.786831 MTRR: Fixed MSR 0x268 0x0606060606060606
2083 13:50:15.789709 MTRR: Fixed MSR 0x269 0x0606060606060606
2084 13:50:15.793503 MTRR: Fixed MSR 0x26a 0x0606060606060606
2085 13:50:15.796396 MTRR: Fixed MSR 0x26b 0x0606060606060606
2086 13:50:15.799951 MTRR: Fixed MSR 0x26c 0x0606060606060606
2087 13:50:15.806654 MTRR: Fixed MSR 0x26d 0x0606060606060606
2088 13:50:15.809729 MTRR: Fixed MSR 0x26e 0x0606060606060606
2089 13:50:15.813077 MTRR: Fixed MSR 0x26f 0x0606060606060606
2090 13:50:15.816722 CPU physical address size: 39 bits
2091 13:50:15.819509 call enable_fixed_mtrr()
2092 13:50:15.823487 Reading cr50 TPM mode
2093 13:50:15.827715 CPU physical address size: 39 bits
2094 13:50:15.828131 call enable_fixed_mtrr()
2095 13:50:15.831254 CPU physical address size: 39 bits
2096 13:50:15.837433 BS: BS_PAYLOAD_LOAD entry times (exec / console): 58 / 6 ms
2097 13:50:15.841124 CPU physical address size: 39 bits
2098 13:50:15.847355 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2099 13:50:15.854227 Checking segment from ROM address 0xffc02b38
2100 13:50:15.857449 Checking segment from ROM address 0xffc02b54
2101 13:50:15.861125 Loading segment from ROM address 0xffc02b38
2102 13:50:15.864370 code (compression=0)
2103 13:50:15.873809 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2104 13:50:15.880961 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2105 13:50:15.883855 it's not compressed!
2106 13:50:16.023889 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2107 13:50:16.030198 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2108 13:50:16.037383 Loading segment from ROM address 0xffc02b54
2109 13:50:16.040579 Entry Point 0x30000000
2110 13:50:16.041274 Loaded segments
2111 13:50:16.047078 BS: BS_PAYLOAD_LOAD run times (exec / console): 140 / 63 ms
2112 13:50:16.092172 Finalizing chipset.
2113 13:50:16.095393 Finalizing SMM.
2114 13:50:16.095907 APMC done.
2115 13:50:16.102032 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2116 13:50:16.105378 mp_park_aps done after 0 msecs.
2117 13:50:16.108571 Jumping to boot code at 0x30000000(0x76b25000)
2118 13:50:16.119159 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2119 13:50:16.119758
2120 13:50:16.120128
2121 13:50:16.120473
2122 13:50:16.122373 Starting depthcharge on Voema...
2123 13:50:16.122997
2124 13:50:16.124213 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2125 13:50:16.124752 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2126 13:50:16.125356 Setting prompt string to ['volteer:']
2127 13:50:16.125835 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2128 13:50:16.132017 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2129 13:50:16.132443
2130 13:50:16.138285 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2131 13:50:16.138706
2132 13:50:16.144909 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2133 13:50:16.145351
2134 13:50:16.148530 Failed to find eMMC card reader
2135 13:50:16.148990
2136 13:50:16.149323 Wipe memory regions:
2137 13:50:16.149628
2138 13:50:16.154816 [0x00000000001000, 0x000000000a0000)
2139 13:50:16.155401
2140 13:50:16.158368 [0x00000000100000, 0x00000030000000)
2141 13:50:16.192120
2142 13:50:16.195512 [0x00000032662db0, 0x000000769ef000)
2143 13:50:16.243180
2144 13:50:16.246335 [0x00000100000000, 0x00000480400000)
2145 13:50:16.850480
2146 13:50:16.853818 ec_init: CrosEC protocol v3 supported (256, 256)
2147 13:50:17.285166
2148 13:50:17.285303 R8152: Initializing
2149 13:50:17.285370
2150 13:50:17.288102 Version 6 (ocp_data = 5c30)
2151 13:50:17.288184
2152 13:50:17.291827 R8152: Done initializing
2153 13:50:17.291909
2154 13:50:17.294721 Adding net device
2155 13:50:17.595955
2156 13:50:17.599304 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2157 13:50:17.599392
2158 13:50:17.599457
2159 13:50:17.599518
2160 13:50:17.602803 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2162 13:50:17.703149 volteer: tftpboot 192.168.201.1 11299543/tftp-deploy-2wyjt3es/kernel/bzImage 11299543/tftp-deploy-2wyjt3es/kernel/cmdline 11299543/tftp-deploy-2wyjt3es/ramdisk/ramdisk.cpio.gz
2163 13:50:17.703295 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2164 13:50:17.703375 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2165 13:50:17.707186 tftpboot 192.168.201.1 11299543/tftp-deploy-2wyjt3es/kernel/bzIploy-2wyjt3es/kernel/cmdline 11299543/tftp-deploy-2wyjt3es/ramdisk/ramdisk.cpio.gz
2166 13:50:17.707273
2167 13:50:17.707337 Waiting for link
2168 13:50:17.910362
2169 13:50:17.910499 done.
2170 13:50:17.910568
2171 13:50:17.910629 MAC: 00:24:32:30:7e:22
2172 13:50:17.910688
2173 13:50:17.913705 Sending DHCP discover... done.
2174 13:50:17.913790
2175 13:50:17.916963 Waiting for reply... done.
2176 13:50:17.917045
2177 13:50:17.920061 Sending DHCP request... done.
2178 13:50:17.920146
2179 13:50:17.923431 Waiting for reply... done.
2180 13:50:17.923560
2181 13:50:17.926694 My ip is 192.168.201.21
2182 13:50:17.926772
2183 13:50:17.930292 The DHCP server ip is 192.168.201.1
2184 13:50:17.930394
2185 13:50:17.933237 TFTP server IP predefined by user: 192.168.201.1
2186 13:50:17.933312
2187 13:50:17.943249 Bootfile predefined by user: 11299543/tftp-deploy-2wyjt3es/kernel/bzImage
2188 13:50:17.943352
2189 13:50:17.946728 Sending tftp read request... done.
2190 13:50:17.946832
2191 13:50:17.950283 Waiting for the transfer...
2192 13:50:17.950357
2193 13:50:18.477914 00000000 ################################################################
2194 13:50:18.478043
2195 13:50:18.997433 00080000 ################################################################
2196 13:50:18.997600
2197 13:50:19.519214 00100000 ################################################################
2198 13:50:19.519345
2199 13:50:20.041829 00180000 ################################################################
2200 13:50:20.041986
2201 13:50:20.566124 00200000 ################################################################
2202 13:50:20.566258
2203 13:50:21.077645 00280000 ################################################################
2204 13:50:21.077810
2205 13:50:21.596083 00300000 ################################################################
2206 13:50:21.596234
2207 13:50:22.109032 00380000 ################################################################
2208 13:50:22.109209
2209 13:50:22.645002 00400000 ################################################################
2210 13:50:22.645189
2211 13:50:23.172118 00480000 ################################################################
2212 13:50:23.172263
2213 13:50:23.696811 00500000 ################################################################
2214 13:50:23.696970
2215 13:50:24.227699 00580000 ################################################################
2216 13:50:24.227853
2217 13:50:24.776818 00600000 ################################################################
2218 13:50:24.776961
2219 13:50:25.319685 00680000 ################################################################
2220 13:50:25.319857
2221 13:50:25.848922 00700000 ################################################################
2222 13:50:25.849074
2223 13:50:26.373210 00780000 ################################################################
2224 13:50:26.373441
2225 13:50:26.483228 00800000 ############## done.
2226 13:50:26.483364
2227 13:50:26.486346 The bootfile was 8499088 bytes long.
2228 13:50:26.486432
2229 13:50:26.489901 Sending tftp read request... done.
2230 13:50:26.490002
2231 13:50:26.492781 Waiting for the transfer...
2232 13:50:26.492863
2233 13:50:28.278224 00000000 ################################################################
2234 13:50:28.278361
2235 13:50:28.278435 00080000 ################################################################
2236 13:50:28.278502
2237 13:50:28.278595 00100000 ################################################################
2238 13:50:28.278660
2239 13:50:28.607866 00180000 ################################################################
2240 13:50:28.608029
2241 13:50:29.154103 00200000 ################################################################
2242 13:50:29.154259
2243 13:50:29.696977 00280000 ################################################################
2244 13:50:29.697124
2245 13:50:30.233286 00300000 ################################################################
2246 13:50:30.233504
2247 13:50:30.763169 00380000 ################################################################
2248 13:50:30.763331
2249 13:50:31.313947 00400000 ################################################################
2250 13:50:31.314089
2251 13:50:31.871579 00480000 ################################################################
2252 13:50:31.871789
2253 13:50:32.415985 00500000 ################################################################ done.
2254 13:50:32.416131
2255 13:50:32.418919 Sending tftp read request... done.
2256 13:50:32.419017
2257 13:50:32.422397 Waiting for the transfer...
2258 13:50:32.422496
2259 13:50:32.422587 00000000 # done.
2260 13:50:32.422677
2261 13:50:32.432227 Command line loaded dynamically from TFTP file: 11299543/tftp-deploy-2wyjt3es/kernel/cmdline
2262 13:50:32.432313
2263 13:50:32.454939 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11299543/extract-nfsrootfs-ppconxeo,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2264 13:50:32.461528
2265 13:50:32.464489 Shutting down all USB controllers.
2266 13:50:32.464579
2267 13:50:32.464643 Removing current net device
2268 13:50:32.464702
2269 13:50:32.467971 Finalizing coreboot
2270 13:50:32.468053
2271 13:50:32.474561 Exiting depthcharge with code 4 at timestamp: 24934734
2272 13:50:32.474642
2273 13:50:32.474706
2274 13:50:32.474765 Starting kernel ...
2275 13:50:32.474822
2276 13:50:32.474876
2277 13:50:32.475248 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2278 13:50:32.475350 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2279 13:50:32.475423 Setting prompt string to ['Linux version [0-9]']
2280 13:50:32.475489 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2281 13:50:32.475554 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2283 13:55:00.476305 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2285 13:55:00.477384 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2287 13:55:00.478251 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2290 13:55:00.480061 end: 2 depthcharge-action (duration 00:05:00) [common]
2292 13:55:00.481111 Cleaning after the job
2293 13:55:00.481201 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299543/tftp-deploy-2wyjt3es/ramdisk
2294 13:55:00.482113 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299543/tftp-deploy-2wyjt3es/kernel
2295 13:55:00.483415 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299543/tftp-deploy-2wyjt3es/nfsrootfs
2296 13:55:00.560137 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299543/tftp-deploy-2wyjt3es/modules
2297 13:55:00.560582 start: 5.1 power-off (timeout 00:00:30) [common]
2298 13:55:00.560756 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=off'
2299 13:55:00.638918 >> Command sent successfully.
2300 13:55:00.643913 Returned 0 in 0 seconds
2301 13:55:00.744470 end: 5.1 power-off (duration 00:00:00) [common]
2303 13:55:00.744850 start: 5.2 read-feedback (timeout 00:10:00) [common]
2304 13:55:00.745134 Listened to connection for namespace 'common' for up to 1s
2305 13:55:01.746381 Finalising connection for namespace 'common'
2306 13:55:01.747095 Disconnecting from shell: Finalise
2307 13:55:01.747542
2308 13:55:01.848725 end: 5.2 read-feedback (duration 00:00:01) [common]
2309 13:55:01.849363 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11299543
2310 13:55:02.206915 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11299543
2311 13:55:02.207108 JobError: Your job cannot terminate cleanly.