Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 13:48:35.645120 lava-dispatcher, installed at version: 2023.06
2 13:48:35.645350 start: 0 validate
3 13:48:35.645486 Start time: 2023-08-16 13:48:35.645477+00:00 (UTC)
4 13:48:35.645665 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:48:35.645819 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
6 13:48:35.908211 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:48:35.909014 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2312-g74888f4b13f0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:48:36.170977 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:48:36.171689 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2312-g74888f4b13f0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 13:48:39.242596 validate duration: 3.60
12 13:48:39.242854 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 13:48:39.242950 start: 1.1 download-retry (timeout 00:10:00) [common]
14 13:48:39.243038 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 13:48:39.243160 Not decompressing ramdisk as can be used compressed.
16 13:48:39.243247 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
17 13:48:39.243311 saving as /var/lib/lava/dispatcher/tmp/11299515/tftp-deploy-6wkde56s/ramdisk/rootfs.cpio.gz
18 13:48:39.243379 total size: 35760064 (34 MB)
19 13:48:39.742019 progress 0 % (0 MB)
20 13:48:39.783772 progress 5 % (1 MB)
21 13:48:39.799200 progress 10 % (3 MB)
22 13:48:39.810146 progress 15 % (5 MB)
23 13:48:39.819584 progress 20 % (6 MB)
24 13:48:39.828846 progress 25 % (8 MB)
25 13:48:39.838693 progress 30 % (10 MB)
26 13:48:39.847811 progress 35 % (11 MB)
27 13:48:39.857044 progress 40 % (13 MB)
28 13:48:39.866415 progress 45 % (15 MB)
29 13:48:39.875656 progress 50 % (17 MB)
30 13:48:39.885101 progress 55 % (18 MB)
31 13:48:39.894297 progress 60 % (20 MB)
32 13:48:39.903641 progress 65 % (22 MB)
33 13:48:39.912684 progress 70 % (23 MB)
34 13:48:39.921910 progress 75 % (25 MB)
35 13:48:39.931560 progress 80 % (27 MB)
36 13:48:39.940717 progress 85 % (29 MB)
37 13:48:39.950131 progress 90 % (30 MB)
38 13:48:39.958997 progress 95 % (32 MB)
39 13:48:39.968015 progress 100 % (34 MB)
40 13:48:39.968166 34 MB downloaded in 0.72 s (47.05 MB/s)
41 13:48:39.968328 end: 1.1.1 http-download (duration 00:00:01) [common]
43 13:48:39.968578 end: 1.1 download-retry (duration 00:00:01) [common]
44 13:48:39.968665 start: 1.2 download-retry (timeout 00:09:59) [common]
45 13:48:39.968748 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 13:48:39.968887 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2312-g74888f4b13f0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 13:48:39.968960 saving as /var/lib/lava/dispatcher/tmp/11299515/tftp-deploy-6wkde56s/kernel/bzImage
48 13:48:39.969021 total size: 8499088 (8 MB)
49 13:48:39.969082 No compression specified
50 13:48:39.970337 progress 0 % (0 MB)
51 13:48:39.972683 progress 5 % (0 MB)
52 13:48:39.975039 progress 10 % (0 MB)
53 13:48:39.977263 progress 15 % (1 MB)
54 13:48:39.979503 progress 20 % (1 MB)
55 13:48:39.981848 progress 25 % (2 MB)
56 13:48:39.984079 progress 30 % (2 MB)
57 13:48:39.986423 progress 35 % (2 MB)
58 13:48:39.988713 progress 40 % (3 MB)
59 13:48:39.990935 progress 45 % (3 MB)
60 13:48:39.993301 progress 50 % (4 MB)
61 13:48:39.995803 progress 55 % (4 MB)
62 13:48:39.998244 progress 60 % (4 MB)
63 13:48:40.000602 progress 65 % (5 MB)
64 13:48:40.002907 progress 70 % (5 MB)
65 13:48:40.005271 progress 75 % (6 MB)
66 13:48:40.007630 progress 80 % (6 MB)
67 13:48:40.010239 progress 85 % (6 MB)
68 13:48:40.012713 progress 90 % (7 MB)
69 13:48:40.015316 progress 95 % (7 MB)
70 13:48:40.017805 progress 100 % (8 MB)
71 13:48:40.017964 8 MB downloaded in 0.05 s (165.62 MB/s)
72 13:48:40.018109 end: 1.2.1 http-download (duration 00:00:00) [common]
74 13:48:40.018340 end: 1.2 download-retry (duration 00:00:00) [common]
75 13:48:40.018424 start: 1.3 download-retry (timeout 00:09:59) [common]
76 13:48:40.018513 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 13:48:40.018633 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2312-g74888f4b13f0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 13:48:40.018727 saving as /var/lib/lava/dispatcher/tmp/11299515/tftp-deploy-6wkde56s/modules/modules.tar
79 13:48:40.018818 total size: 253616 (0 MB)
80 13:48:40.018895 Using unxz to decompress xz
81 13:48:40.023256 progress 12 % (0 MB)
82 13:48:40.023650 progress 25 % (0 MB)
83 13:48:40.023915 progress 38 % (0 MB)
84 13:48:40.025555 progress 51 % (0 MB)
85 13:48:40.027599 progress 64 % (0 MB)
86 13:48:40.029513 progress 77 % (0 MB)
87 13:48:40.031653 progress 90 % (0 MB)
88 13:48:40.033434 progress 100 % (0 MB)
89 13:48:40.039401 0 MB downloaded in 0.02 s (11.75 MB/s)
90 13:48:40.039642 end: 1.3.1 http-download (duration 00:00:00) [common]
92 13:48:40.039911 end: 1.3 download-retry (duration 00:00:00) [common]
93 13:48:40.040024 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 13:48:40.040136 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 13:48:40.040218 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 13:48:40.040302 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 13:48:40.040522 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6
98 13:48:40.040656 makedir: /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin
99 13:48:40.040762 makedir: /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/tests
100 13:48:40.040863 makedir: /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/results
101 13:48:40.040981 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-add-keys
102 13:48:40.041129 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-add-sources
103 13:48:40.041262 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-background-process-start
104 13:48:40.041397 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-background-process-stop
105 13:48:40.041526 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-common-functions
106 13:48:40.041716 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-echo-ipv4
107 13:48:40.041845 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-install-packages
108 13:48:40.041972 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-installed-packages
109 13:48:40.042098 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-os-build
110 13:48:40.042224 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-probe-channel
111 13:48:40.042352 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-probe-ip
112 13:48:40.042509 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-target-ip
113 13:48:40.042636 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-target-mac
114 13:48:40.042761 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-target-storage
115 13:48:40.042889 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-test-case
116 13:48:40.043015 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-test-event
117 13:48:40.043141 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-test-feedback
118 13:48:40.043274 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-test-raise
119 13:48:40.043401 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-test-reference
120 13:48:40.043532 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-test-runner
121 13:48:40.043662 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-test-set
122 13:48:40.043790 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-test-shell
123 13:48:40.043921 Updating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-install-packages (oe)
124 13:48:40.044080 Updating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/bin/lava-installed-packages (oe)
125 13:48:40.044208 Creating /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/environment
126 13:48:40.044309 LAVA metadata
127 13:48:40.044383 - LAVA_JOB_ID=11299515
128 13:48:40.044450 - LAVA_DISPATCHER_IP=192.168.201.1
129 13:48:40.044553 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 13:48:40.044620 skipped lava-vland-overlay
131 13:48:40.044697 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 13:48:40.044811 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 13:48:40.044873 skipped lava-multinode-overlay
134 13:48:40.044944 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 13:48:40.045023 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 13:48:40.045102 Loading test definitions
137 13:48:40.045195 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 13:48:40.045270 Using /lava-11299515 at stage 0
139 13:48:40.045666 uuid=11299515_1.4.2.3.1 testdef=None
140 13:48:40.045754 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 13:48:40.045842 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 13:48:40.046363 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 13:48:40.046584 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 13:48:40.047194 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 13:48:40.047421 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 13:48:40.048097 runner path: /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/0/tests/0_cros-ec test_uuid 11299515_1.4.2.3.1
149 13:48:40.048283 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 13:48:40.048490 Creating lava-test-runner.conf files
152 13:48:40.048554 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299515/lava-overlay-jzuaunc6/lava-11299515/0 for stage 0
153 13:48:40.048643 - 0_cros-ec
154 13:48:40.048740 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
155 13:48:40.048825 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
156 13:48:40.055643 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
157 13:48:40.055751 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
158 13:48:40.055836 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
159 13:48:40.055923 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
160 13:48:40.056029 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
161 13:48:41.069870 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
162 13:48:41.070277 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
163 13:48:41.070395 extracting modules file /var/lib/lava/dispatcher/tmp/11299515/tftp-deploy-6wkde56s/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299515/extract-overlay-ramdisk-274qwqxk/ramdisk
164 13:48:41.085129 end: 1.4.4 extract-modules (duration 00:00:00) [common]
165 13:48:41.085267 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
166 13:48:41.085361 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299515/compress-overlay-zrhu47wj/overlay-1.4.2.4.tar.gz to ramdisk
167 13:48:41.085432 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299515/compress-overlay-zrhu47wj/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11299515/extract-overlay-ramdisk-274qwqxk/ramdisk
168 13:48:41.092799 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
169 13:48:41.092919 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
170 13:48:41.093009 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
171 13:48:41.093097 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
172 13:48:41.093176 Building ramdisk /var/lib/lava/dispatcher/tmp/11299515/extract-overlay-ramdisk-274qwqxk/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11299515/extract-overlay-ramdisk-274qwqxk/ramdisk
173 13:48:41.603479 >> 184120 blocks
174 13:48:45.004110 rename /var/lib/lava/dispatcher/tmp/11299515/extract-overlay-ramdisk-274qwqxk/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11299515/tftp-deploy-6wkde56s/ramdisk/ramdisk.cpio.gz
175 13:48:45.004561 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
176 13:48:45.004689 start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
177 13:48:45.004787 start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
178 13:48:45.004890 No mkimage arch provided, not using FIT.
179 13:48:45.004983 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
180 13:48:45.005075 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
181 13:48:45.005181 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
182 13:48:45.005274 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
183 13:48:45.005355 No LXC device requested
184 13:48:45.005432 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
185 13:48:45.005521 start: 1.6 deploy-device-env (timeout 00:09:54) [common]
186 13:48:45.005649 end: 1.6 deploy-device-env (duration 00:00:00) [common]
187 13:48:45.005722 Checking files for TFTP limit of 4294967296 bytes.
188 13:48:45.006128 end: 1 tftp-deploy (duration 00:00:06) [common]
189 13:48:45.006234 start: 2 depthcharge-action (timeout 00:05:00) [common]
190 13:48:45.006326 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
191 13:48:45.006445 substitutions:
192 13:48:45.006512 - {DTB}: None
193 13:48:45.006574 - {INITRD}: 11299515/tftp-deploy-6wkde56s/ramdisk/ramdisk.cpio.gz
194 13:48:45.006634 - {KERNEL}: 11299515/tftp-deploy-6wkde56s/kernel/bzImage
195 13:48:45.006692 - {LAVA_MAC}: None
196 13:48:45.006748 - {PRESEED_CONFIG}: None
197 13:48:45.006804 - {PRESEED_LOCAL}: None
198 13:48:45.006892 - {RAMDISK}: 11299515/tftp-deploy-6wkde56s/ramdisk/ramdisk.cpio.gz
199 13:48:45.006948 - {ROOT_PART}: None
200 13:48:45.007003 - {ROOT}: None
201 13:48:45.007058 - {SERVER_IP}: 192.168.201.1
202 13:48:45.007112 - {TEE}: None
203 13:48:45.007166 Parsed boot commands:
204 13:48:45.007220 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
205 13:48:45.007397 Parsed boot commands: tftpboot 192.168.201.1 11299515/tftp-deploy-6wkde56s/kernel/bzImage 11299515/tftp-deploy-6wkde56s/kernel/cmdline 11299515/tftp-deploy-6wkde56s/ramdisk/ramdisk.cpio.gz
206 13:48:45.007487 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
207 13:48:45.007571 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
208 13:48:45.007664 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
209 13:48:45.007751 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
210 13:48:45.007822 Not connected, no need to disconnect.
211 13:48:45.007898 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
212 13:48:45.007978 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
213 13:48:45.008043 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-12'
214 13:48:45.012172 Setting prompt string to ['lava-test: # ']
215 13:48:45.012514 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
216 13:48:45.012619 end: 2.2.1 reset-connection (duration 00:00:00) [common]
217 13:48:45.012721 start: 2.2.2 reset-device (timeout 00:05:00) [common]
218 13:48:45.012811 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
219 13:48:45.013078 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=reboot'
220 13:48:50.154379 >> Command sent successfully.
221 13:48:50.157725 Returned 0 in 5 seconds
222 13:48:50.258488 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
224 13:48:50.259899 end: 2.2.2 reset-device (duration 00:00:05) [common]
225 13:48:50.260276 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
226 13:48:50.260586 Setting prompt string to 'Starting depthcharge on Voema...'
227 13:48:50.260838 Changing prompt to 'Starting depthcharge on Voema...'
228 13:48:50.261080 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
229 13:48:50.261960 [Enter `^Ec?' for help]
230 13:48:51.819948
231 13:48:51.820107
232 13:48:51.829845 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
233 13:48:51.833468 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
234 13:48:51.840040 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
235 13:48:51.844342 CPU: AES supported, TXT NOT supported, VT supported
236 13:48:51.850601 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
237 13:48:51.854078 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
238 13:48:51.860708 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
239 13:48:51.864465 VBOOT: Loading verstage.
240 13:48:51.867776 FMAP: Found "FLASH" version 1.1 at 0x1804000.
241 13:48:51.873899 FMAP: base = 0x0 size = 0x2000000 #areas = 32
242 13:48:51.877554 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
243 13:48:51.887537 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
244 13:48:51.894086 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
245 13:48:51.894169
246 13:48:51.894234
247 13:48:51.904219 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
248 13:48:51.920951 Probing TPM: . done!
249 13:48:51.923887 TPM ready after 0 ms
250 13:48:51.927525 Connected to device vid:did:rid of 1ae0:0028:00
251 13:48:51.938661 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
252 13:48:51.945035 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
253 13:48:51.948406 Initialized TPM device CR50 revision 0
254 13:48:52.006418 tlcl_send_startup: Startup return code is 0
255 13:48:52.006543 TPM: setup succeeded
256 13:48:52.021695 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
257 13:48:52.036027 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
258 13:48:52.048521 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
259 13:48:52.058656 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
260 13:48:52.062172 Chrome EC: UHEPI supported
261 13:48:52.065519 Phase 1
262 13:48:52.069024 FMAP: area GBB found @ 1805000 (458752 bytes)
263 13:48:52.078814 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
264 13:48:52.085400 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
265 13:48:52.092367 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
266 13:48:52.098821 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
267 13:48:52.101822 Recovery requested (1009000e)
268 13:48:52.105845 TPM: Extending digest for VBOOT: boot mode into PCR 0
269 13:48:52.116796 tlcl_extend: response is 0
270 13:48:52.123723 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
271 13:48:52.133756 tlcl_extend: response is 0
272 13:48:52.140494 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
273 13:48:52.146854 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
274 13:48:52.153463 BS: verstage times (exec / console): total (unknown) / 142 ms
275 13:48:52.153548
276 13:48:52.153651
277 13:48:52.166649 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
278 13:48:52.173433 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
279 13:48:52.176800 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
280 13:48:52.180086 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
281 13:48:52.187870 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
282 13:48:52.189878 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
283 13:48:52.193210 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
284 13:48:52.196615 TCO_STS: 0000 0000
285 13:48:52.200236 GEN_PMCON: d0015038 00002200
286 13:48:52.203048 GBLRST_CAUSE: 00000000 00000000
287 13:48:52.203130 HPR_CAUSE0: 00000000
288 13:48:52.206452 prev_sleep_state 5
289 13:48:52.209946 Boot Count incremented to 20634
290 13:48:52.216833 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 13:48:52.223229 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 13:48:52.230288 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 13:48:52.236909 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
294 13:48:52.240788 Chrome EC: UHEPI supported
295 13:48:52.247722 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
296 13:48:52.260722 Probing TPM: done!
297 13:48:52.267589 Connected to device vid:did:rid of 1ae0:0028:00
298 13:48:52.277412 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
299 13:48:52.281741 Initialized TPM device CR50 revision 0
300 13:48:52.296079 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
301 13:48:52.302949 MRC: Hash idx 0x100b comparison successful.
302 13:48:52.306002 MRC cache found, size faa8
303 13:48:52.306087 bootmode is set to: 2
304 13:48:52.309029 SPD index = 2
305 13:48:52.316524 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
306 13:48:52.318768 SPD: module type is LPDDR4X
307 13:48:52.323130 SPD: module part number is MT53D1G64D4NW-046
308 13:48:52.328912 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
309 13:48:52.332095 SPD: device width 16 bits, bus width 16 bits
310 13:48:52.339302 SPD: module size is 2048 MB (per channel)
311 13:48:52.767218 CBMEM:
312 13:48:52.770715 IMD: root @ 0x76fff000 254 entries.
313 13:48:52.773868 IMD: root @ 0x76ffec00 62 entries.
314 13:48:52.777243 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
315 13:48:52.784345 FMAP: area RW_VPD found @ f35000 (8192 bytes)
316 13:48:52.787269 External stage cache:
317 13:48:52.790605 IMD: root @ 0x7b3ff000 254 entries.
318 13:48:52.793677 IMD: root @ 0x7b3fec00 62 entries.
319 13:48:52.808899 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
320 13:48:52.815213 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
321 13:48:52.821762 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
322 13:48:52.835725 MRC: 'RECOVERY_MRC_CACHE' does not need update.
323 13:48:52.842547 cse_lite: Skip switching to RW in the recovery path
324 13:48:52.842630 8 DIMMs found
325 13:48:52.842697 SMM Memory Map
326 13:48:52.848635 SMRAM : 0x7b000000 0x800000
327 13:48:52.851983 Subregion 0: 0x7b000000 0x200000
328 13:48:52.855393 Subregion 1: 0x7b200000 0x200000
329 13:48:52.858601 Subregion 2: 0x7b400000 0x400000
330 13:48:52.858695 top_of_ram = 0x77000000
331 13:48:52.865431 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
332 13:48:52.872939 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
333 13:48:52.875167 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
334 13:48:52.882055 MTRR Range: Start=ff000000 End=0 (Size 1000000)
335 13:48:52.888897 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
336 13:48:52.895492 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
337 13:48:52.905361 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
338 13:48:52.912149 Processing 211 relocs. Offset value of 0x74c0b000
339 13:48:52.918969 BS: romstage times (exec / console): total (unknown) / 277 ms
340 13:48:52.924138
341 13:48:52.924248
342 13:48:52.934233 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
343 13:48:52.937534 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 13:48:52.947391 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 13:48:52.954188 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 13:48:52.960681 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
347 13:48:52.967528 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
348 13:48:53.010772 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
349 13:48:53.017560 Processing 5008 relocs. Offset value of 0x75d98000
350 13:48:53.020752 BS: postcar times (exec / console): total (unknown) / 59 ms
351 13:48:53.023919
352 13:48:53.024027
353 13:48:53.034134 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
354 13:48:53.034249 Normal boot
355 13:48:53.037771 FW_CONFIG value is 0x804c02
356 13:48:53.041152 PCI: 00:07.0 disabled by fw_config
357 13:48:53.044498 PCI: 00:07.1 disabled by fw_config
358 13:48:53.047626 PCI: 00:0d.2 disabled by fw_config
359 13:48:53.050879 PCI: 00:1c.7 disabled by fw_config
360 13:48:53.057307 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 13:48:53.064016 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 13:48:53.067571 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
363 13:48:53.070613 GENERIC: 0.0 disabled by fw_config
364 13:48:53.074203 GENERIC: 1.0 disabled by fw_config
365 13:48:53.081086 fw_config match found: DB_USB=USB3_ACTIVE
366 13:48:53.084274 fw_config match found: DB_USB=USB3_ACTIVE
367 13:48:53.087594 fw_config match found: DB_USB=USB3_ACTIVE
368 13:48:53.094166 fw_config match found: DB_USB=USB3_ACTIVE
369 13:48:53.097174 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 13:48:53.103788 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
371 13:48:53.114109 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
372 13:48:53.120530 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
373 13:48:53.124342 microcode: sig=0x806c1 pf=0x80 revision=0x86
374 13:48:53.130410 microcode: Update skipped, already up-to-date
375 13:48:53.137182 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
376 13:48:53.164397 Detected 4 core, 8 thread CPU.
377 13:48:53.167765 Setting up SMI for CPU
378 13:48:53.170902 IED base = 0x7b400000
379 13:48:53.171008 IED size = 0x00400000
380 13:48:53.174216 Will perform SMM setup.
381 13:48:53.180738 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
382 13:48:53.188791 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
383 13:48:53.193954 Processing 16 relocs. Offset value of 0x00030000
384 13:48:53.197364 Attempting to start 7 APs
385 13:48:53.201293 Waiting for 10ms after sending INIT.
386 13:48:53.216416 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
387 13:48:53.219546 AP: slot 5 apic_id 6.
388 13:48:53.223064 AP: slot 2 apic_id 7.
389 13:48:53.223182 AP: slot 3 apic_id 3.
390 13:48:53.226196 AP: slot 6 apic_id 2.
391 13:48:53.226308 done.
392 13:48:53.229985 AP: slot 7 apic_id 5.
393 13:48:53.230098 AP: slot 4 apic_id 4.
394 13:48:53.236075 Waiting for 2nd SIPI to complete...done.
395 13:48:53.243264 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 13:48:53.249544 Processing 13 relocs. Offset value of 0x00038000
397 13:48:53.249684 Unable to locate Global NVS
398 13:48:53.259215 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
399 13:48:53.262615 Installing permanent SMM handler to 0x7b000000
400 13:48:53.273120 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
401 13:48:53.276150 Processing 794 relocs. Offset value of 0x7b010000
402 13:48:53.286094 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
403 13:48:53.289354 Processing 13 relocs. Offset value of 0x7b008000
404 13:48:53.296721 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
405 13:48:53.303136 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
406 13:48:53.305922 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
407 13:48:53.312557 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
408 13:48:53.319118 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
409 13:48:53.325720 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
410 13:48:53.332356 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
411 13:48:53.332468 Unable to locate Global NVS
412 13:48:53.342825 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
413 13:48:53.345377 Clearing SMI status registers
414 13:48:53.345485 SMI_STS: PM1
415 13:48:53.348729 PM1_STS: PWRBTN
416 13:48:53.356226 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
417 13:48:53.360539 In relocation handler: CPU 0
418 13:48:53.362383 New SMBASE=0x7b000000 IEDBASE=0x7b400000
419 13:48:53.368670 Writing SMRR. base = 0x7b000006, mask=0xff800c00
420 13:48:53.368797 Relocation complete.
421 13:48:53.378330 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
422 13:48:53.381876 In relocation handler: CPU 1
423 13:48:53.384978 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
424 13:48:53.385090 Relocation complete.
425 13:48:53.394814 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
426 13:48:53.398093 In relocation handler: CPU 3
427 13:48:53.401577 New SMBASE=0x7afff400 IEDBASE=0x7b400000
428 13:48:53.401722 Relocation complete.
429 13:48:53.411594 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
430 13:48:53.414964 In relocation handler: CPU 5
431 13:48:53.418952 New SMBASE=0x7affec00 IEDBASE=0x7b400000
432 13:48:53.421754 Writing SMRR. base = 0x7b000006, mask=0xff800c00
433 13:48:53.425146 Relocation complete.
434 13:48:53.431453 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
435 13:48:53.434766 In relocation handler: CPU 2
436 13:48:53.437838 New SMBASE=0x7afff800 IEDBASE=0x7b400000
437 13:48:53.441489 Relocation complete.
438 13:48:53.447645 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
439 13:48:53.451220 In relocation handler: CPU 6
440 13:48:53.454321 New SMBASE=0x7affe800 IEDBASE=0x7b400000
441 13:48:53.461262 Writing SMRR. base = 0x7b000006, mask=0xff800c00
442 13:48:53.461349 Relocation complete.
443 13:48:53.468778 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
444 13:48:53.471758 In relocation handler: CPU 4
445 13:48:53.477907 New SMBASE=0x7afff000 IEDBASE=0x7b400000
446 13:48:53.481048 Writing SMRR. base = 0x7b000006, mask=0xff800c00
447 13:48:53.484977 Relocation complete.
448 13:48:53.491116 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
449 13:48:53.494724 In relocation handler: CPU 7
450 13:48:53.498523 New SMBASE=0x7affe400 IEDBASE=0x7b400000
451 13:48:53.501311 Relocation complete.
452 13:48:53.501395 Initializing CPU #0
453 13:48:53.504446 CPU: vendor Intel device 806c1
454 13:48:53.508151 CPU: family 06, model 8c, stepping 01
455 13:48:53.510956 Clearing out pending MCEs
456 13:48:53.515050 Setting up local APIC...
457 13:48:53.518002 apic_id: 0x00 done.
458 13:48:53.521019 Turbo is available but hidden
459 13:48:53.524438 Turbo is available and visible
460 13:48:53.528231 microcode: Update skipped, already up-to-date
461 13:48:53.531209 CPU #0 initialized
462 13:48:53.531293 Initializing CPU #4
463 13:48:53.534483 Initializing CPU #7
464 13:48:53.537820 CPU: vendor Intel device 806c1
465 13:48:53.541518 CPU: family 06, model 8c, stepping 01
466 13:48:53.541608 Initializing CPU #3
467 13:48:53.545002 Initializing CPU #6
468 13:48:53.547575 CPU: vendor Intel device 806c1
469 13:48:53.550965 CPU: family 06, model 8c, stepping 01
470 13:48:53.554257 CPU: vendor Intel device 806c1
471 13:48:53.557919 CPU: family 06, model 8c, stepping 01
472 13:48:53.561100 Clearing out pending MCEs
473 13:48:53.564293 Clearing out pending MCEs
474 13:48:53.567992 Clearing out pending MCEs
475 13:48:53.571166 CPU: vendor Intel device 806c1
476 13:48:53.574531 CPU: family 06, model 8c, stepping 01
477 13:48:53.574613 Initializing CPU #2
478 13:48:53.578318 Initializing CPU #5
479 13:48:53.581168 CPU: vendor Intel device 806c1
480 13:48:53.584693 CPU: family 06, model 8c, stepping 01
481 13:48:53.588188 CPU: vendor Intel device 806c1
482 13:48:53.592048 CPU: family 06, model 8c, stepping 01
483 13:48:53.595263 Clearing out pending MCEs
484 13:48:53.595346 Clearing out pending MCEs
485 13:48:53.598753 Setting up local APIC...
486 13:48:53.601990 Setting up local APIC...
487 13:48:53.605488 Setting up local APIC...
488 13:48:53.605591 Setting up local APIC...
489 13:48:53.608923 apic_id: 0x04 done.
490 13:48:53.612155 Clearing out pending MCEs
491 13:48:53.615607 microcode: Update skipped, already up-to-date
492 13:48:53.618630 Initializing CPU #1
493 13:48:53.621949 apic_id: 0x03 done.
494 13:48:53.622032 apic_id: 0x02 done.
495 13:48:53.625677 Setting up local APIC...
496 13:48:53.629341 microcode: Update skipped, already up-to-date
497 13:48:53.635356 microcode: Update skipped, already up-to-date
498 13:48:53.635439 CPU #6 initialized
499 13:48:53.638414 apic_id: 0x07 done.
500 13:48:53.642171 CPU #3 initialized
501 13:48:53.642254 apic_id: 0x05 done.
502 13:48:53.645166 CPU #4 initialized
503 13:48:53.648241 microcode: Update skipped, already up-to-date
504 13:48:53.655670 microcode: Update skipped, already up-to-date
505 13:48:53.655754 Setting up local APIC...
506 13:48:53.658568 CPU: vendor Intel device 806c1
507 13:48:53.661808 CPU: family 06, model 8c, stepping 01
508 13:48:53.665248 Clearing out pending MCEs
509 13:48:53.668710 CPU #2 initialized
510 13:48:53.668793 apic_id: 0x06 done.
511 13:48:53.672216 CPU #7 initialized
512 13:48:53.675067 microcode: Update skipped, already up-to-date
513 13:48:53.678186 Setting up local APIC...
514 13:48:53.681772 CPU #5 initialized
515 13:48:53.681856 apic_id: 0x01 done.
516 13:48:53.688194 microcode: Update skipped, already up-to-date
517 13:48:53.688278 CPU #1 initialized
518 13:48:53.695465 bsp_do_flight_plan done after 454 msecs.
519 13:48:53.698783 CPU: frequency set to 4400 MHz
520 13:48:53.698866 Enabling SMIs.
521 13:48:53.704951 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
522 13:48:53.720978 SATAXPCIE1 indicates PCIe NVMe is present
523 13:48:53.724465 Probing TPM: done!
524 13:48:53.728393 Connected to device vid:did:rid of 1ae0:0028:00
525 13:48:53.738502 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
526 13:48:53.741709 Initialized TPM device CR50 revision 0
527 13:48:53.745468 Enabling S0i3.4
528 13:48:53.751999 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
529 13:48:53.755252 Found a VBT of 8704 bytes after decompression
530 13:48:53.761428 cse_lite: CSE RO boot. HybridStorageMode disabled
531 13:48:53.768626 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
532 13:48:53.843963 FSPS returned 0
533 13:48:53.847135 Executing Phase 1 of FspMultiPhaseSiInit
534 13:48:53.857309 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
535 13:48:53.860001 port C0 DISC req: usage 1 usb3 1 usb2 5
536 13:48:53.862950 Raw Buffer output 0 00000511
537 13:48:53.866446 Raw Buffer output 1 00000000
538 13:48:53.870546 pmc_send_ipc_cmd succeeded
539 13:48:53.877212 port C1 DISC req: usage 1 usb3 2 usb2 3
540 13:48:53.877296 Raw Buffer output 0 00000321
541 13:48:53.880753 Raw Buffer output 1 00000000
542 13:48:53.884409 pmc_send_ipc_cmd succeeded
543 13:48:53.889267 Detected 4 core, 8 thread CPU.
544 13:48:53.892569 Detected 4 core, 8 thread CPU.
545 13:48:54.093290 Display FSP Version Info HOB
546 13:48:54.096570 Reference Code - CPU = a.0.4c.31
547 13:48:54.099686 uCode Version = 0.0.0.86
548 13:48:54.103360 TXT ACM version = ff.ff.ff.ffff
549 13:48:54.106797 Reference Code - ME = a.0.4c.31
550 13:48:54.109790 MEBx version = 0.0.0.0
551 13:48:54.113028 ME Firmware Version = Consumer SKU
552 13:48:54.116683 Reference Code - PCH = a.0.4c.31
553 13:48:54.119529 PCH-CRID Status = Disabled
554 13:48:54.123418 PCH-CRID Original Value = ff.ff.ff.ffff
555 13:48:54.126320 PCH-CRID New Value = ff.ff.ff.ffff
556 13:48:54.129978 OPROM - RST - RAID = ff.ff.ff.ffff
557 13:48:54.132951 PCH Hsio Version = 4.0.0.0
558 13:48:54.136368 Reference Code - SA - System Agent = a.0.4c.31
559 13:48:54.140586 Reference Code - MRC = 2.0.0.1
560 13:48:54.143249 SA - PCIe Version = a.0.4c.31
561 13:48:54.146605 SA-CRID Status = Disabled
562 13:48:54.149791 SA-CRID Original Value = 0.0.0.1
563 13:48:54.153039 SA-CRID New Value = 0.0.0.1
564 13:48:54.156526 OPROM - VBIOS = ff.ff.ff.ffff
565 13:48:54.159457 IO Manageability Engine FW Version = 11.1.4.0
566 13:48:54.163593 PHY Build Version = 0.0.0.e0
567 13:48:54.167318 Thunderbolt(TM) FW Version = 0.0.0.0
568 13:48:54.170628 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
569 13:48:54.174399 ITSS IRQ Polarities Before:
570 13:48:54.177762 IPC0: 0xffffffff
571 13:48:54.177868 IPC1: 0xffffffff
572 13:48:54.181135 IPC2: 0xffffffff
573 13:48:54.181245 IPC3: 0xffffffff
574 13:48:54.184019 ITSS IRQ Polarities After:
575 13:48:54.187542 IPC0: 0xffffffff
576 13:48:54.187649 IPC1: 0xffffffff
577 13:48:54.191034 IPC2: 0xffffffff
578 13:48:54.191139 IPC3: 0xffffffff
579 13:48:54.197542 Found PCIe Root Port #9 at PCI: 00:1d.0.
580 13:48:54.207641 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
581 13:48:54.220682 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
582 13:48:54.230597 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
583 13:48:54.237413 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
584 13:48:54.240703 Enumerating buses...
585 13:48:54.243746 Show all devs... Before device enumeration.
586 13:48:54.247091 Root Device: enabled 1
587 13:48:54.250745 DOMAIN: 0000: enabled 1
588 13:48:54.253876 CPU_CLUSTER: 0: enabled 1
589 13:48:54.253989 PCI: 00:00.0: enabled 1
590 13:48:54.256906 PCI: 00:02.0: enabled 1
591 13:48:54.260706 PCI: 00:04.0: enabled 1
592 13:48:54.263968 PCI: 00:05.0: enabled 1
593 13:48:54.264078 PCI: 00:06.0: enabled 0
594 13:48:54.267003 PCI: 00:07.0: enabled 0
595 13:48:54.270176 PCI: 00:07.1: enabled 0
596 13:48:54.273839 PCI: 00:07.2: enabled 0
597 13:48:54.273946 PCI: 00:07.3: enabled 0
598 13:48:54.276831 PCI: 00:08.0: enabled 1
599 13:48:54.280813 PCI: 00:09.0: enabled 0
600 13:48:54.280926 PCI: 00:0a.0: enabled 0
601 13:48:54.283679 PCI: 00:0d.0: enabled 1
602 13:48:54.286772 PCI: 00:0d.1: enabled 0
603 13:48:54.290515 PCI: 00:0d.2: enabled 0
604 13:48:54.290625 PCI: 00:0d.3: enabled 0
605 13:48:54.293550 PCI: 00:0e.0: enabled 0
606 13:48:54.296743 PCI: 00:10.2: enabled 1
607 13:48:54.300525 PCI: 00:10.6: enabled 0
608 13:48:54.300637 PCI: 00:10.7: enabled 0
609 13:48:54.303603 PCI: 00:12.0: enabled 0
610 13:48:54.307253 PCI: 00:12.6: enabled 0
611 13:48:54.310105 PCI: 00:13.0: enabled 0
612 13:48:54.310211 PCI: 00:14.0: enabled 1
613 13:48:54.313556 PCI: 00:14.1: enabled 0
614 13:48:54.317034 PCI: 00:14.2: enabled 1
615 13:48:54.317144 PCI: 00:14.3: enabled 1
616 13:48:54.320369 PCI: 00:15.0: enabled 1
617 13:48:54.323639 PCI: 00:15.1: enabled 1
618 13:48:54.326985 PCI: 00:15.2: enabled 1
619 13:48:54.327095 PCI: 00:15.3: enabled 1
620 13:48:54.329933 PCI: 00:16.0: enabled 1
621 13:48:54.333274 PCI: 00:16.1: enabled 0
622 13:48:54.336685 PCI: 00:16.2: enabled 0
623 13:48:54.336800 PCI: 00:16.3: enabled 0
624 13:48:54.340502 PCI: 00:16.4: enabled 0
625 13:48:54.343638 PCI: 00:16.5: enabled 0
626 13:48:54.346825 PCI: 00:17.0: enabled 1
627 13:48:54.346929 PCI: 00:19.0: enabled 0
628 13:48:54.350053 PCI: 00:19.1: enabled 1
629 13:48:54.353575 PCI: 00:19.2: enabled 0
630 13:48:54.356809 PCI: 00:1c.0: enabled 1
631 13:48:54.356918 PCI: 00:1c.1: enabled 0
632 13:48:54.360665 PCI: 00:1c.2: enabled 0
633 13:48:54.363633 PCI: 00:1c.3: enabled 0
634 13:48:54.363737 PCI: 00:1c.4: enabled 0
635 13:48:54.366723 PCI: 00:1c.5: enabled 0
636 13:48:54.369779 PCI: 00:1c.6: enabled 1
637 13:48:54.373214 PCI: 00:1c.7: enabled 0
638 13:48:54.373323 PCI: 00:1d.0: enabled 1
639 13:48:54.376503 PCI: 00:1d.1: enabled 0
640 13:48:54.379963 PCI: 00:1d.2: enabled 1
641 13:48:54.384538 PCI: 00:1d.3: enabled 0
642 13:48:54.384641 PCI: 00:1e.0: enabled 1
643 13:48:54.386448 PCI: 00:1e.1: enabled 0
644 13:48:54.389761 PCI: 00:1e.2: enabled 1
645 13:48:54.393169 PCI: 00:1e.3: enabled 1
646 13:48:54.393288 PCI: 00:1f.0: enabled 1
647 13:48:54.396882 PCI: 00:1f.1: enabled 0
648 13:48:54.399972 PCI: 00:1f.2: enabled 1
649 13:48:54.400093 PCI: 00:1f.3: enabled 1
650 13:48:54.403089 PCI: 00:1f.4: enabled 0
651 13:48:54.406527 PCI: 00:1f.5: enabled 1
652 13:48:54.409963 PCI: 00:1f.6: enabled 0
653 13:48:54.410077 PCI: 00:1f.7: enabled 0
654 13:48:54.413015 APIC: 00: enabled 1
655 13:48:54.416662 GENERIC: 0.0: enabled 1
656 13:48:54.416767 GENERIC: 0.0: enabled 1
657 13:48:54.419854 GENERIC: 1.0: enabled 1
658 13:48:54.423393 GENERIC: 0.0: enabled 1
659 13:48:54.426965 GENERIC: 1.0: enabled 1
660 13:48:54.427077 USB0 port 0: enabled 1
661 13:48:54.429907 GENERIC: 0.0: enabled 1
662 13:48:54.433526 USB0 port 0: enabled 1
663 13:48:54.436543 GENERIC: 0.0: enabled 1
664 13:48:54.436652 I2C: 00:1a: enabled 1
665 13:48:54.439816 I2C: 00:31: enabled 1
666 13:48:54.443200 I2C: 00:32: enabled 1
667 13:48:54.443310 I2C: 00:10: enabled 1
668 13:48:54.446341 I2C: 00:15: enabled 1
669 13:48:54.450316 GENERIC: 0.0: enabled 0
670 13:48:54.450424 GENERIC: 1.0: enabled 0
671 13:48:54.453261 GENERIC: 0.0: enabled 1
672 13:48:54.456824 SPI: 00: enabled 1
673 13:48:54.456935 SPI: 00: enabled 1
674 13:48:54.459557 PNP: 0c09.0: enabled 1
675 13:48:54.463191 GENERIC: 0.0: enabled 1
676 13:48:54.463303 USB3 port 0: enabled 1
677 13:48:54.466612 USB3 port 1: enabled 1
678 13:48:54.469531 USB3 port 2: enabled 0
679 13:48:54.473297 USB3 port 3: enabled 0
680 13:48:54.473413 USB2 port 0: enabled 0
681 13:48:54.476341 USB2 port 1: enabled 1
682 13:48:54.479824 USB2 port 2: enabled 1
683 13:48:54.479930 USB2 port 3: enabled 0
684 13:48:54.483480 USB2 port 4: enabled 1
685 13:48:54.486367 USB2 port 5: enabled 0
686 13:48:54.489763 USB2 port 6: enabled 0
687 13:48:54.489874 USB2 port 7: enabled 0
688 13:48:54.493155 USB2 port 8: enabled 0
689 13:48:54.496253 USB2 port 9: enabled 0
690 13:48:54.496366 USB3 port 0: enabled 0
691 13:48:54.499462 USB3 port 1: enabled 1
692 13:48:54.503187 USB3 port 2: enabled 0
693 13:48:54.503296 USB3 port 3: enabled 0
694 13:48:54.506289 GENERIC: 0.0: enabled 1
695 13:48:54.509378 GENERIC: 1.0: enabled 1
696 13:48:54.512990 APIC: 01: enabled 1
697 13:48:54.513100 APIC: 07: enabled 1
698 13:48:54.516347 APIC: 03: enabled 1
699 13:48:54.516458 APIC: 04: enabled 1
700 13:48:54.519517 APIC: 06: enabled 1
701 13:48:54.522824 APIC: 02: enabled 1
702 13:48:54.522940 APIC: 05: enabled 1
703 13:48:54.526324 Compare with tree...
704 13:48:54.529730 Root Device: enabled 1
705 13:48:54.529841 DOMAIN: 0000: enabled 1
706 13:48:54.532606 PCI: 00:00.0: enabled 1
707 13:48:54.536023 PCI: 00:02.0: enabled 1
708 13:48:54.539620 PCI: 00:04.0: enabled 1
709 13:48:54.542910 GENERIC: 0.0: enabled 1
710 13:48:54.543021 PCI: 00:05.0: enabled 1
711 13:48:54.546072 PCI: 00:06.0: enabled 0
712 13:48:54.549208 PCI: 00:07.0: enabled 0
713 13:48:54.552649 GENERIC: 0.0: enabled 1
714 13:48:54.555785 PCI: 00:07.1: enabled 0
715 13:48:54.555919 GENERIC: 1.0: enabled 1
716 13:48:54.559146 PCI: 00:07.2: enabled 0
717 13:48:54.562769 GENERIC: 0.0: enabled 1
718 13:48:54.566370 PCI: 00:07.3: enabled 0
719 13:48:54.569529 GENERIC: 1.0: enabled 1
720 13:48:54.569653 PCI: 00:08.0: enabled 1
721 13:48:54.572474 PCI: 00:09.0: enabled 0
722 13:48:54.575962 PCI: 00:0a.0: enabled 0
723 13:48:54.579164 PCI: 00:0d.0: enabled 1
724 13:48:54.582727 USB0 port 0: enabled 1
725 13:48:54.582811 USB3 port 0: enabled 1
726 13:48:54.585759 USB3 port 1: enabled 1
727 13:48:54.589522 USB3 port 2: enabled 0
728 13:48:54.592469 USB3 port 3: enabled 0
729 13:48:54.596001 PCI: 00:0d.1: enabled 0
730 13:48:54.596086 PCI: 00:0d.2: enabled 0
731 13:48:54.599498 GENERIC: 0.0: enabled 1
732 13:48:54.603371 PCI: 00:0d.3: enabled 0
733 13:48:54.605925 PCI: 00:0e.0: enabled 0
734 13:48:54.609059 PCI: 00:10.2: enabled 1
735 13:48:54.609143 PCI: 00:10.6: enabled 0
736 13:48:54.612514 PCI: 00:10.7: enabled 0
737 13:48:54.615761 PCI: 00:12.0: enabled 0
738 13:48:54.619270 PCI: 00:12.6: enabled 0
739 13:48:54.622486 PCI: 00:13.0: enabled 0
740 13:48:54.622571 PCI: 00:14.0: enabled 1
741 13:48:54.625837 USB0 port 0: enabled 1
742 13:48:54.629182 USB2 port 0: enabled 0
743 13:48:54.632504 USB2 port 1: enabled 1
744 13:48:54.635390 USB2 port 2: enabled 1
745 13:48:54.639381 USB2 port 3: enabled 0
746 13:48:54.639466 USB2 port 4: enabled 1
747 13:48:54.642217 USB2 port 5: enabled 0
748 13:48:54.645388 USB2 port 6: enabled 0
749 13:48:54.649288 USB2 port 7: enabled 0
750 13:48:54.652049 USB2 port 8: enabled 0
751 13:48:54.655598 USB2 port 9: enabled 0
752 13:48:54.655682 USB3 port 0: enabled 0
753 13:48:54.659222 USB3 port 1: enabled 1
754 13:48:54.662315 USB3 port 2: enabled 0
755 13:48:54.665718 USB3 port 3: enabled 0
756 13:48:54.668692 PCI: 00:14.1: enabled 0
757 13:48:54.668805 PCI: 00:14.2: enabled 1
758 13:48:54.672519 PCI: 00:14.3: enabled 1
759 13:48:54.675498 GENERIC: 0.0: enabled 1
760 13:48:54.678594 PCI: 00:15.0: enabled 1
761 13:48:54.682017 I2C: 00:1a: enabled 1
762 13:48:54.682129 I2C: 00:31: enabled 1
763 13:48:54.685314 I2C: 00:32: enabled 1
764 13:48:54.688641 PCI: 00:15.1: enabled 1
765 13:48:54.691977 I2C: 00:10: enabled 1
766 13:48:54.692086 PCI: 00:15.2: enabled 1
767 13:48:54.695406 PCI: 00:15.3: enabled 1
768 13:48:54.698486 PCI: 00:16.0: enabled 1
769 13:48:54.701825 PCI: 00:16.1: enabled 0
770 13:48:54.705088 PCI: 00:16.2: enabled 0
771 13:48:54.705199 PCI: 00:16.3: enabled 0
772 13:48:54.708358 PCI: 00:16.4: enabled 0
773 13:48:54.711579 PCI: 00:16.5: enabled 0
774 13:48:54.714933 PCI: 00:17.0: enabled 1
775 13:48:54.718298 PCI: 00:19.0: enabled 0
776 13:48:54.718403 PCI: 00:19.1: enabled 1
777 13:48:54.721829 I2C: 00:15: enabled 1
778 13:48:54.724980 PCI: 00:19.2: enabled 0
779 13:48:54.728633 PCI: 00:1d.0: enabled 1
780 13:48:54.731668 GENERIC: 0.0: enabled 1
781 13:48:54.731780 PCI: 00:1e.0: enabled 1
782 13:48:54.735013 PCI: 00:1e.1: enabled 0
783 13:48:54.738703 PCI: 00:1e.2: enabled 1
784 13:48:54.741720 SPI: 00: enabled 1
785 13:48:54.741832 PCI: 00:1e.3: enabled 1
786 13:48:54.744899 SPI: 00: enabled 1
787 13:48:54.748188 PCI: 00:1f.0: enabled 1
788 13:48:54.751828 PNP: 0c09.0: enabled 1
789 13:48:54.754797 PCI: 00:1f.1: enabled 0
790 13:48:54.754912 PCI: 00:1f.2: enabled 1
791 13:48:54.758264 GENERIC: 0.0: enabled 1
792 13:48:54.761439 GENERIC: 0.0: enabled 1
793 13:48:54.765160 GENERIC: 1.0: enabled 1
794 13:48:54.768207 PCI: 00:1f.3: enabled 1
795 13:48:54.768289 PCI: 00:1f.4: enabled 0
796 13:48:54.771791 PCI: 00:1f.5: enabled 1
797 13:48:54.823476 PCI: 00:1f.6: enabled 0
798 13:48:54.823559 PCI: 00:1f.7: enabled 0
799 13:48:54.823842 CPU_CLUSTER: 0: enabled 1
800 13:48:54.823911 APIC: 00: enabled 1
801 13:48:54.823971 APIC: 01: enabled 1
802 13:48:54.824286 APIC: 07: enabled 1
803 13:48:54.824353 APIC: 03: enabled 1
804 13:48:54.824410 APIC: 04: enabled 1
805 13:48:54.824698 APIC: 06: enabled 1
806 13:48:54.824773 APIC: 02: enabled 1
807 13:48:54.825181 APIC: 05: enabled 1
808 13:48:54.825278 Root Device scanning...
809 13:48:54.825392 scan_static_bus for Root Device
810 13:48:54.825662 DOMAIN: 0000 enabled
811 13:48:54.825784 CPU_CLUSTER: 0 enabled
812 13:48:54.825881 DOMAIN: 0000 scanning...
813 13:48:54.825940 PCI: pci_scan_bus for bus 00
814 13:48:54.826000 PCI: 00:00.0 [8086/0000] ops
815 13:48:54.826627 PCI: 00:00.0 [8086/9a12] enabled
816 13:48:54.859544 PCI: 00:02.0 [8086/0000] bus ops
817 13:48:54.859654 PCI: 00:02.0 [8086/9a40] enabled
818 13:48:54.859923 PCI: 00:04.0 [8086/0000] bus ops
819 13:48:54.860033 PCI: 00:04.0 [8086/9a03] enabled
820 13:48:54.860125 PCI: 00:05.0 [8086/9a19] enabled
821 13:48:54.860185 PCI: 00:07.0 [0000/0000] hidden
822 13:48:54.860600 PCI: 00:08.0 [8086/9a11] enabled
823 13:48:54.860680 PCI: 00:0a.0 [8086/9a0d] disabled
824 13:48:54.860752 PCI: 00:0d.0 [8086/0000] bus ops
825 13:48:54.860840 PCI: 00:0d.0 [8086/9a13] enabled
826 13:48:54.864334 PCI: 00:14.0 [8086/0000] bus ops
827 13:48:54.864417 PCI: 00:14.0 [8086/a0ed] enabled
828 13:48:54.867047 PCI: 00:14.2 [8086/a0ef] enabled
829 13:48:54.870410 PCI: 00:14.3 [8086/0000] bus ops
830 13:48:54.873928 PCI: 00:14.3 [8086/a0f0] enabled
831 13:48:54.876929 PCI: 00:15.0 [8086/0000] bus ops
832 13:48:54.880216 PCI: 00:15.0 [8086/a0e8] enabled
833 13:48:54.883650 PCI: 00:15.1 [8086/0000] bus ops
834 13:48:54.887259 PCI: 00:15.1 [8086/a0e9] enabled
835 13:48:54.890050 PCI: 00:15.2 [8086/0000] bus ops
836 13:48:54.893559 PCI: 00:15.2 [8086/a0ea] enabled
837 13:48:54.896607 PCI: 00:15.3 [8086/0000] bus ops
838 13:48:54.900142 PCI: 00:15.3 [8086/a0eb] enabled
839 13:48:54.900226 PCI: 00:16.0 [8086/0000] ops
840 13:48:54.903649 PCI: 00:16.0 [8086/a0e0] enabled
841 13:48:54.910323 PCI: Static device PCI: 00:17.0 not found, disabling it.
842 13:48:54.913351 PCI: 00:19.0 [8086/0000] bus ops
843 13:48:54.916755 PCI: 00:19.0 [8086/a0c5] disabled
844 13:48:54.920507 PCI: 00:19.1 [8086/0000] bus ops
845 13:48:54.924098 PCI: 00:19.1 [8086/a0c6] enabled
846 13:48:54.926884 PCI: 00:1d.0 [8086/0000] bus ops
847 13:48:54.930084 PCI: 00:1d.0 [8086/a0b0] enabled
848 13:48:54.933524 PCI: 00:1e.0 [8086/0000] ops
849 13:48:54.936563 PCI: 00:1e.0 [8086/a0a8] enabled
850 13:48:54.940407 PCI: 00:1e.2 [8086/0000] bus ops
851 13:48:54.943331 PCI: 00:1e.2 [8086/a0aa] enabled
852 13:48:54.946551 PCI: 00:1e.3 [8086/0000] bus ops
853 13:48:54.950184 PCI: 00:1e.3 [8086/a0ab] enabled
854 13:48:54.953544 PCI: 00:1f.0 [8086/0000] bus ops
855 13:48:54.956546 PCI: 00:1f.0 [8086/a087] enabled
856 13:48:54.956661 RTC Init
857 13:48:54.963546 Set power on after power failure.
858 13:48:54.963659 Disabling Deep S3
859 13:48:54.966439 Disabling Deep S3
860 13:48:54.966541 Disabling Deep S4
861 13:48:54.970650 Disabling Deep S4
862 13:48:54.970731 Disabling Deep S5
863 13:48:54.973741 Disabling Deep S5
864 13:48:54.976678 PCI: 00:1f.2 [0000/0000] hidden
865 13:48:54.980222 PCI: 00:1f.3 [8086/0000] bus ops
866 13:48:54.983403 PCI: 00:1f.3 [8086/a0c8] enabled
867 13:48:54.986807 PCI: 00:1f.5 [8086/0000] bus ops
868 13:48:54.989721 PCI: 00:1f.5 [8086/a0a4] enabled
869 13:48:54.993401 PCI: Leftover static devices:
870 13:48:54.993482 PCI: 00:10.2
871 13:48:54.997317 PCI: 00:10.6
872 13:48:54.997398 PCI: 00:10.7
873 13:48:54.997463 PCI: 00:06.0
874 13:48:54.999733 PCI: 00:07.1
875 13:48:54.999814 PCI: 00:07.2
876 13:48:55.003496 PCI: 00:07.3
877 13:48:55.003577 PCI: 00:09.0
878 13:48:55.006442 PCI: 00:0d.1
879 13:48:55.006522 PCI: 00:0d.2
880 13:48:55.006587 PCI: 00:0d.3
881 13:48:55.009668 PCI: 00:0e.0
882 13:48:55.009749 PCI: 00:12.0
883 13:48:55.013503 PCI: 00:12.6
884 13:48:55.013590 PCI: 00:13.0
885 13:48:55.013690 PCI: 00:14.1
886 13:48:55.016936 PCI: 00:16.1
887 13:48:55.017017 PCI: 00:16.2
888 13:48:55.019861 PCI: 00:16.3
889 13:48:55.019945 PCI: 00:16.4
890 13:48:55.020010 PCI: 00:16.5
891 13:48:55.023660 PCI: 00:17.0
892 13:48:55.023747 PCI: 00:19.2
893 13:48:55.026502 PCI: 00:1e.1
894 13:48:55.026583 PCI: 00:1f.1
895 13:48:55.029852 PCI: 00:1f.4
896 13:48:55.029932 PCI: 00:1f.6
897 13:48:55.029995 PCI: 00:1f.7
898 13:48:55.033134 PCI: Check your devicetree.cb.
899 13:48:55.036528 PCI: 00:02.0 scanning...
900 13:48:55.040094 scan_generic_bus for PCI: 00:02.0
901 13:48:55.043204 scan_generic_bus for PCI: 00:02.0 done
902 13:48:55.049890 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
903 13:48:55.049972 PCI: 00:04.0 scanning...
904 13:48:55.057026 scan_generic_bus for PCI: 00:04.0
905 13:48:55.057121 GENERIC: 0.0 enabled
906 13:48:55.063262 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
907 13:48:55.066638 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
908 13:48:55.069951 PCI: 00:0d.0 scanning...
909 13:48:55.073839 scan_static_bus for PCI: 00:0d.0
910 13:48:55.076922 USB0 port 0 enabled
911 13:48:55.080225 USB0 port 0 scanning...
912 13:48:55.083559 scan_static_bus for USB0 port 0
913 13:48:55.083642 USB3 port 0 enabled
914 13:48:55.086539 USB3 port 1 enabled
915 13:48:55.090286 USB3 port 2 disabled
916 13:48:55.090369 USB3 port 3 disabled
917 13:48:55.093069 USB3 port 0 scanning...
918 13:48:55.096414 scan_static_bus for USB3 port 0
919 13:48:55.099833 scan_static_bus for USB3 port 0 done
920 13:48:55.102929 scan_bus: bus USB3 port 0 finished in 6 msecs
921 13:48:55.107259 USB3 port 1 scanning...
922 13:48:55.109581 scan_static_bus for USB3 port 1
923 13:48:55.113491 scan_static_bus for USB3 port 1 done
924 13:48:55.119613 scan_bus: bus USB3 port 1 finished in 6 msecs
925 13:48:55.123440 scan_static_bus for USB0 port 0 done
926 13:48:55.126192 scan_bus: bus USB0 port 0 finished in 43 msecs
927 13:48:55.129685 scan_static_bus for PCI: 00:0d.0 done
928 13:48:55.136175 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
929 13:48:55.139334 PCI: 00:14.0 scanning...
930 13:48:55.142909 scan_static_bus for PCI: 00:14.0
931 13:48:55.142993 USB0 port 0 enabled
932 13:48:55.145951 USB0 port 0 scanning...
933 13:48:55.149457 scan_static_bus for USB0 port 0
934 13:48:55.152850 USB2 port 0 disabled
935 13:48:55.152960 USB2 port 1 enabled
936 13:48:55.155962 USB2 port 2 enabled
937 13:48:55.159299 USB2 port 3 disabled
938 13:48:55.159382 USB2 port 4 enabled
939 13:48:55.162497 USB2 port 5 disabled
940 13:48:55.165984 USB2 port 6 disabled
941 13:48:55.166065 USB2 port 7 disabled
942 13:48:55.169521 USB2 port 8 disabled
943 13:48:55.172907 USB2 port 9 disabled
944 13:48:55.172988 USB3 port 0 disabled
945 13:48:55.176169 USB3 port 1 enabled
946 13:48:55.176251 USB3 port 2 disabled
947 13:48:55.179999 USB3 port 3 disabled
948 13:48:55.183026 USB2 port 1 scanning...
949 13:48:55.186529 scan_static_bus for USB2 port 1
950 13:48:55.189309 scan_static_bus for USB2 port 1 done
951 13:48:55.193179 scan_bus: bus USB2 port 1 finished in 6 msecs
952 13:48:55.195718 USB2 port 2 scanning...
953 13:48:55.199324 scan_static_bus for USB2 port 2
954 13:48:55.202608 scan_static_bus for USB2 port 2 done
955 13:48:55.209498 scan_bus: bus USB2 port 2 finished in 6 msecs
956 13:48:55.209609 USB2 port 4 scanning...
957 13:48:55.213164 scan_static_bus for USB2 port 4
958 13:48:55.218958 scan_static_bus for USB2 port 4 done
959 13:48:55.222782 scan_bus: bus USB2 port 4 finished in 6 msecs
960 13:48:55.225932 USB3 port 1 scanning...
961 13:48:55.229025 scan_static_bus for USB3 port 1
962 13:48:55.232755 scan_static_bus for USB3 port 1 done
963 13:48:55.236110 scan_bus: bus USB3 port 1 finished in 6 msecs
964 13:48:55.239568 scan_static_bus for USB0 port 0 done
965 13:48:55.245840 scan_bus: bus USB0 port 0 finished in 93 msecs
966 13:48:55.248934 scan_static_bus for PCI: 00:14.0 done
967 13:48:55.252470 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
968 13:48:55.255747 PCI: 00:14.3 scanning...
969 13:48:55.258993 scan_static_bus for PCI: 00:14.3
970 13:48:55.262284 GENERIC: 0.0 enabled
971 13:48:55.265579 scan_static_bus for PCI: 00:14.3 done
972 13:48:55.269039 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
973 13:48:55.272138 PCI: 00:15.0 scanning...
974 13:48:55.275736 scan_static_bus for PCI: 00:15.0
975 13:48:55.279004 I2C: 00:1a enabled
976 13:48:55.279112 I2C: 00:31 enabled
977 13:48:55.282457 I2C: 00:32 enabled
978 13:48:55.285930 scan_static_bus for PCI: 00:15.0 done
979 13:48:55.292433 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
980 13:48:55.292543 PCI: 00:15.1 scanning...
981 13:48:55.295991 scan_static_bus for PCI: 00:15.1
982 13:48:55.299124 I2C: 00:10 enabled
983 13:48:55.302499 scan_static_bus for PCI: 00:15.1 done
984 13:48:55.305847 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
985 13:48:55.309403 PCI: 00:15.2 scanning...
986 13:48:55.312404 scan_static_bus for PCI: 00:15.2
987 13:48:55.315796 scan_static_bus for PCI: 00:15.2 done
988 13:48:55.322718 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
989 13:48:55.325310 PCI: 00:15.3 scanning...
990 13:48:55.328916 scan_static_bus for PCI: 00:15.3
991 13:48:55.332140 scan_static_bus for PCI: 00:15.3 done
992 13:48:55.335557 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
993 13:48:55.338514 PCI: 00:19.1 scanning...
994 13:48:55.342349 scan_static_bus for PCI: 00:19.1
995 13:48:55.345121 I2C: 00:15 enabled
996 13:48:55.348575 scan_static_bus for PCI: 00:19.1 done
997 13:48:55.352150 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
998 13:48:55.355257 PCI: 00:1d.0 scanning...
999 13:48:55.358653 do_pci_scan_bridge for PCI: 00:1d.0
1000 13:48:55.362592 PCI: pci_scan_bus for bus 01
1001 13:48:55.365365 PCI: 01:00.0 [15b7/5009] enabled
1002 13:48:55.368782 GENERIC: 0.0 enabled
1003 13:48:55.372097 Enabling Common Clock Configuration
1004 13:48:55.375060 L1 Sub-State supported from root port 29
1005 13:48:55.378715 L1 Sub-State Support = 0x5
1006 13:48:55.382348 CommonModeRestoreTime = 0x28
1007 13:48:55.385080 Power On Value = 0x16, Power On Scale = 0x0
1008 13:48:55.388412 ASPM: Enabled L1
1009 13:48:55.392214 PCIe: Max_Payload_Size adjusted to 128
1010 13:48:55.395302 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1011 13:48:55.399084 PCI: 00:1e.2 scanning...
1012 13:48:55.402194 scan_generic_bus for PCI: 00:1e.2
1013 13:48:55.405258 SPI: 00 enabled
1014 13:48:55.412291 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1015 13:48:55.416216 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1016 13:48:55.416329 PCI: 00:1e.3 scanning...
1017 13:48:55.423534 scan_generic_bus for PCI: 00:1e.3
1018 13:48:55.423647 SPI: 00 enabled
1019 13:48:55.429930 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1020 13:48:55.432787 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1021 13:48:55.436116 PCI: 00:1f.0 scanning...
1022 13:48:55.439270 scan_static_bus for PCI: 00:1f.0
1023 13:48:55.442810 PNP: 0c09.0 enabled
1024 13:48:55.442890 PNP: 0c09.0 scanning...
1025 13:48:55.446362 scan_static_bus for PNP: 0c09.0
1026 13:48:55.452847 scan_static_bus for PNP: 0c09.0 done
1027 13:48:55.456334 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1028 13:48:55.459771 scan_static_bus for PCI: 00:1f.0 done
1029 13:48:55.467086 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1030 13:48:55.467204 PCI: 00:1f.2 scanning...
1031 13:48:55.469785 scan_static_bus for PCI: 00:1f.2
1032 13:48:55.473067 GENERIC: 0.0 enabled
1033 13:48:55.476266 GENERIC: 0.0 scanning...
1034 13:48:55.479448 scan_static_bus for GENERIC: 0.0
1035 13:48:55.479528 GENERIC: 0.0 enabled
1036 13:48:55.482896 GENERIC: 1.0 enabled
1037 13:48:55.486139 scan_static_bus for GENERIC: 0.0 done
1038 13:48:55.492808 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1039 13:48:55.496239 scan_static_bus for PCI: 00:1f.2 done
1040 13:48:55.500222 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1041 13:48:55.502543 PCI: 00:1f.3 scanning...
1042 13:48:55.506130 scan_static_bus for PCI: 00:1f.3
1043 13:48:55.510276 scan_static_bus for PCI: 00:1f.3 done
1044 13:48:55.515975 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1045 13:48:55.516109 PCI: 00:1f.5 scanning...
1046 13:48:55.523354 scan_generic_bus for PCI: 00:1f.5
1047 13:48:55.526058 scan_generic_bus for PCI: 00:1f.5 done
1048 13:48:55.529248 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1049 13:48:55.536195 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1050 13:48:55.539414 scan_static_bus for Root Device done
1051 13:48:55.542623 scan_bus: bus Root Device finished in 735 msecs
1052 13:48:55.542703 done
1053 13:48:55.549749 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1054 13:48:55.552304 Chrome EC: UHEPI supported
1055 13:48:55.559075 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1056 13:48:55.565912 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1057 13:48:55.569173 SPI flash protection: WPSW=0 SRP0=0
1058 13:48:55.572311 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1059 13:48:55.579138 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1060 13:48:55.582616 found VGA at PCI: 00:02.0
1061 13:48:55.586016 Setting up VGA for PCI: 00:02.0
1062 13:48:55.592519 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1063 13:48:55.596041 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1064 13:48:55.599034 Allocating resources...
1065 13:48:55.599115 Reading resources...
1066 13:48:55.605992 Root Device read_resources bus 0 link: 0
1067 13:48:55.609214 DOMAIN: 0000 read_resources bus 0 link: 0
1068 13:48:55.616208 PCI: 00:04.0 read_resources bus 1 link: 0
1069 13:48:55.618906 PCI: 00:04.0 read_resources bus 1 link: 0 done
1070 13:48:55.625174 PCI: 00:0d.0 read_resources bus 0 link: 0
1071 13:48:55.628671 USB0 port 0 read_resources bus 0 link: 0
1072 13:48:55.635823 USB0 port 0 read_resources bus 0 link: 0 done
1073 13:48:55.638704 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1074 13:48:55.641928 PCI: 00:14.0 read_resources bus 0 link: 0
1075 13:48:55.648560 USB0 port 0 read_resources bus 0 link: 0
1076 13:48:55.652127 USB0 port 0 read_resources bus 0 link: 0 done
1077 13:48:55.658585 PCI: 00:14.0 read_resources bus 0 link: 0 done
1078 13:48:55.661892 PCI: 00:14.3 read_resources bus 0 link: 0
1079 13:48:55.668924 PCI: 00:14.3 read_resources bus 0 link: 0 done
1080 13:48:55.671943 PCI: 00:15.0 read_resources bus 0 link: 0
1081 13:48:55.678924 PCI: 00:15.0 read_resources bus 0 link: 0 done
1082 13:48:55.682063 PCI: 00:15.1 read_resources bus 0 link: 0
1083 13:48:55.689211 PCI: 00:15.1 read_resources bus 0 link: 0 done
1084 13:48:55.691861 PCI: 00:19.1 read_resources bus 0 link: 0
1085 13:48:55.699486 PCI: 00:19.1 read_resources bus 0 link: 0 done
1086 13:48:55.702887 PCI: 00:1d.0 read_resources bus 1 link: 0
1087 13:48:55.709014 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1088 13:48:55.712353 PCI: 00:1e.2 read_resources bus 2 link: 0
1089 13:48:55.718693 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1090 13:48:55.722083 PCI: 00:1e.3 read_resources bus 3 link: 0
1091 13:48:55.728534 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1092 13:48:55.732087 PCI: 00:1f.0 read_resources bus 0 link: 0
1093 13:48:55.739525 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1094 13:48:55.742402 PCI: 00:1f.2 read_resources bus 0 link: 0
1095 13:48:55.745046 GENERIC: 0.0 read_resources bus 0 link: 0
1096 13:48:55.752691 GENERIC: 0.0 read_resources bus 0 link: 0 done
1097 13:48:55.755494 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1098 13:48:55.762688 DOMAIN: 0000 read_resources bus 0 link: 0 done
1099 13:48:55.766411 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1100 13:48:55.772803 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1101 13:48:55.776005 Root Device read_resources bus 0 link: 0 done
1102 13:48:55.779322 Done reading resources.
1103 13:48:55.786201 Show resources in subtree (Root Device)...After reading.
1104 13:48:55.789227 Root Device child on link 0 DOMAIN: 0000
1105 13:48:55.792776 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 13:48:55.802660 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 13:48:55.812668 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1108 13:48:55.815845 PCI: 00:00.0
1109 13:48:55.822882 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 13:48:55.832617 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 13:48:55.843761 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 13:48:55.852212 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 13:48:55.862241 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 13:48:55.872065 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 13:48:55.881940 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 13:48:55.888895 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 13:48:55.899087 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 13:48:55.908538 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1119 13:48:55.918522 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1120 13:48:55.928550 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1121 13:48:55.935358 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1122 13:48:55.945902 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1123 13:48:55.955118 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1124 13:48:55.965357 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1125 13:48:55.974807 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1126 13:48:55.985082 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1127 13:48:55.991576 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1128 13:48:56.001598 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1129 13:48:56.004542 PCI: 00:02.0
1130 13:48:56.014481 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1131 13:48:56.024634 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1132 13:48:56.034545 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1133 13:48:56.037848 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1134 13:48:56.047608 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1135 13:48:56.051007 GENERIC: 0.0
1136 13:48:56.051114 PCI: 00:05.0
1137 13:48:56.061055 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 13:48:56.067781 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1139 13:48:56.067863 GENERIC: 0.0
1140 13:48:56.071236 PCI: 00:08.0
1141 13:48:56.081618 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1142 13:48:56.081735 PCI: 00:0a.0
1143 13:48:56.084298 PCI: 00:0d.0 child on link 0 USB0 port 0
1144 13:48:56.094036 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1145 13:48:56.100941 USB0 port 0 child on link 0 USB3 port 0
1146 13:48:56.101052 USB3 port 0
1147 13:48:56.104329 USB3 port 1
1148 13:48:56.104432 USB3 port 2
1149 13:48:56.107308 USB3 port 3
1150 13:48:56.110697 PCI: 00:14.0 child on link 0 USB0 port 0
1151 13:48:56.120615 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 13:48:56.127299 USB0 port 0 child on link 0 USB2 port 0
1153 13:48:56.127411 USB2 port 0
1154 13:48:56.131317 USB2 port 1
1155 13:48:56.131427 USB2 port 2
1156 13:48:56.133911 USB2 port 3
1157 13:48:56.134020 USB2 port 4
1158 13:48:56.137605 USB2 port 5
1159 13:48:56.137727 USB2 port 6
1160 13:48:56.140856 USB2 port 7
1161 13:48:56.140965 USB2 port 8
1162 13:48:56.144138 USB2 port 9
1163 13:48:56.144247 USB3 port 0
1164 13:48:56.147414 USB3 port 1
1165 13:48:56.147522 USB3 port 2
1166 13:48:56.151108 USB3 port 3
1167 13:48:56.151218 PCI: 00:14.2
1168 13:48:56.160988 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1169 13:48:56.171028 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 13:48:56.177304 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1171 13:48:56.187205 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1172 13:48:56.187317 GENERIC: 0.0
1173 13:48:56.193824 PCI: 00:15.0 child on link 0 I2C: 00:1a
1174 13:48:56.203638 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 13:48:56.203750 I2C: 00:1a
1176 13:48:56.206960 I2C: 00:31
1177 13:48:56.207060 I2C: 00:32
1178 13:48:56.210406 PCI: 00:15.1 child on link 0 I2C: 00:10
1179 13:48:56.220513 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 13:48:56.223651 I2C: 00:10
1181 13:48:56.223758 PCI: 00:15.2
1182 13:48:56.233589 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 13:48:56.237016 PCI: 00:15.3
1184 13:48:56.247102 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 13:48:56.247213 PCI: 00:16.0
1186 13:48:56.257174 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 13:48:56.260160 PCI: 00:19.0
1188 13:48:56.263780 PCI: 00:19.1 child on link 0 I2C: 00:15
1189 13:48:56.273684 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 13:48:56.277078 I2C: 00:15
1191 13:48:56.280936 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1192 13:48:56.290351 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1193 13:48:56.297016 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1194 13:48:56.306850 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1195 13:48:56.310345 GENERIC: 0.0
1196 13:48:56.310452 PCI: 01:00.0
1197 13:48:56.319930 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 13:48:56.330677 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1199 13:48:56.333671 PCI: 00:1e.0
1200 13:48:56.344124 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1201 13:48:56.347009 PCI: 00:1e.2 child on link 0 SPI: 00
1202 13:48:56.357277 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 13:48:56.359804 SPI: 00
1204 13:48:56.363091 PCI: 00:1e.3 child on link 0 SPI: 00
1205 13:48:56.373243 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 13:48:56.373355 SPI: 00
1207 13:48:56.379877 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1208 13:48:56.386574 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1209 13:48:56.390263 PNP: 0c09.0
1210 13:48:56.396566 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1211 13:48:56.403326 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1212 13:48:56.413315 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1213 13:48:56.419675 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1214 13:48:56.426408 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1215 13:48:56.426518 GENERIC: 0.0
1216 13:48:56.430684 GENERIC: 1.0
1217 13:48:56.430794 PCI: 00:1f.3
1218 13:48:56.439982 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 13:48:56.449365 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 13:48:56.452846 PCI: 00:1f.5
1221 13:48:56.463251 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1222 13:48:56.466023 CPU_CLUSTER: 0 child on link 0 APIC: 00
1223 13:48:56.466127 APIC: 00
1224 13:48:56.469481 APIC: 01
1225 13:48:56.469631 APIC: 07
1226 13:48:56.469738 APIC: 03
1227 13:48:56.472762 APIC: 04
1228 13:48:56.472869 APIC: 06
1229 13:48:56.476295 APIC: 02
1230 13:48:56.476413 APIC: 05
1231 13:48:56.482623 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1232 13:48:56.489771 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1233 13:48:56.495927 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1234 13:48:56.502561 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1235 13:48:56.505823 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1236 13:48:56.509344 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1237 13:48:56.516009 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1238 13:48:56.525981 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1239 13:48:56.532580 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1240 13:48:56.539031 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1241 13:48:56.545550 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1242 13:48:56.552807 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1243 13:48:56.562639 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1244 13:48:56.569021 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1245 13:48:56.572446 DOMAIN: 0000: Resource ranges:
1246 13:48:56.575519 * Base: 1000, Size: 800, Tag: 100
1247 13:48:56.579343 * Base: 1900, Size: e700, Tag: 100
1248 13:48:56.585606 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1249 13:48:56.592312 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1250 13:48:56.599025 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1251 13:48:56.605590 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1252 13:48:56.612484 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1253 13:48:56.622042 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1254 13:48:56.628550 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1255 13:48:56.635314 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1256 13:48:56.645752 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1257 13:48:56.651869 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1258 13:48:56.658536 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1259 13:48:56.668713 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1260 13:48:56.675749 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1261 13:48:56.681762 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1262 13:48:56.689402 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1263 13:48:56.698966 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1264 13:48:56.704849 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1265 13:48:56.711724 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1266 13:48:56.721716 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1267 13:48:56.728042 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1268 13:48:56.738232 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1269 13:48:56.744894 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1270 13:48:56.751123 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1271 13:48:56.761405 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1272 13:48:56.767801 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1273 13:48:56.770800 DOMAIN: 0000: Resource ranges:
1274 13:48:56.774236 * Base: 7fc00000, Size: 40400000, Tag: 200
1275 13:48:56.777796 * Base: d0000000, Size: 28000000, Tag: 200
1276 13:48:56.784368 * Base: fa000000, Size: 1000000, Tag: 200
1277 13:48:56.787834 * Base: fb001000, Size: 2fff000, Tag: 200
1278 13:48:56.791160 * Base: fe010000, Size: 2e000, Tag: 200
1279 13:48:56.797430 * Base: fe03f000, Size: d41000, Tag: 200
1280 13:48:56.800695 * Base: fed88000, Size: 8000, Tag: 200
1281 13:48:56.804354 * Base: fed93000, Size: d000, Tag: 200
1282 13:48:56.807974 * Base: feda2000, Size: 1e000, Tag: 200
1283 13:48:56.814112 * Base: fede0000, Size: 1220000, Tag: 200
1284 13:48:56.817806 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1285 13:48:56.824021 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1286 13:48:56.830976 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1287 13:48:56.838127 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1288 13:48:56.844118 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1289 13:48:56.850665 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1290 13:48:56.857384 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1291 13:48:56.864144 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1292 13:48:56.870370 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1293 13:48:56.877527 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1294 13:48:56.883988 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1295 13:48:56.890351 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1296 13:48:56.896839 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1297 13:48:56.903511 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1298 13:48:56.910191 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1299 13:48:56.916964 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1300 13:48:56.923411 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1301 13:48:56.930280 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1302 13:48:56.936934 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1303 13:48:56.943636 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1304 13:48:56.950164 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1305 13:48:56.957130 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1306 13:48:56.963369 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1307 13:48:56.969802 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1308 13:48:56.980062 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1309 13:48:56.983166 PCI: 00:1d.0: Resource ranges:
1310 13:48:56.986726 * Base: 7fc00000, Size: 100000, Tag: 200
1311 13:48:56.993524 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1312 13:48:56.999878 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1313 13:48:57.009835 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1314 13:48:57.016813 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1315 13:48:57.020095 Root Device assign_resources, bus 0 link: 0
1316 13:48:57.022956 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 13:48:57.033207 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1318 13:48:57.040189 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1319 13:48:57.049548 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1320 13:48:57.056650 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1321 13:48:57.063295 PCI: 00:04.0 assign_resources, bus 1 link: 0
1322 13:48:57.066596 PCI: 00:04.0 assign_resources, bus 1 link: 0
1323 13:48:57.073832 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1324 13:48:57.083138 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1325 13:48:57.089880 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1326 13:48:57.096535 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1327 13:48:57.099856 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1328 13:48:57.109796 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1329 13:48:57.113071 PCI: 00:14.0 assign_resources, bus 0 link: 0
1330 13:48:57.116579 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 13:48:57.126083 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1332 13:48:57.133302 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1333 13:48:57.142999 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1334 13:48:57.146635 PCI: 00:14.3 assign_resources, bus 0 link: 0
1335 13:48:57.153084 PCI: 00:14.3 assign_resources, bus 0 link: 0
1336 13:48:57.159437 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1337 13:48:57.162954 PCI: 00:15.0 assign_resources, bus 0 link: 0
1338 13:48:57.169402 PCI: 00:15.0 assign_resources, bus 0 link: 0
1339 13:48:57.176362 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1340 13:48:57.182744 PCI: 00:15.1 assign_resources, bus 0 link: 0
1341 13:48:57.186142 PCI: 00:15.1 assign_resources, bus 0 link: 0
1342 13:48:57.196496 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1343 13:48:57.202479 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1344 13:48:57.212472 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1345 13:48:57.219262 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1346 13:48:57.222741 PCI: 00:19.1 assign_resources, bus 0 link: 0
1347 13:48:57.228884 PCI: 00:19.1 assign_resources, bus 0 link: 0
1348 13:48:57.235561 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1349 13:48:57.245674 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1350 13:48:57.255630 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1351 13:48:57.258658 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1352 13:48:57.268653 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1353 13:48:57.275788 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1354 13:48:57.282053 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 13:48:57.288575 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1356 13:48:57.296171 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1357 13:48:57.298961 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1358 13:48:57.306236 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1359 13:48:57.311999 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1360 13:48:57.315774 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1361 13:48:57.321930 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1362 13:48:57.325378 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1363 13:48:57.332041 LPC: Trying to open IO window from 800 size 1ff
1364 13:48:57.338736 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1365 13:48:57.349054 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1366 13:48:57.355214 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1367 13:48:57.358317 DOMAIN: 0000 assign_resources, bus 0 link: 0
1368 13:48:57.366252 Root Device assign_resources, bus 0 link: 0
1369 13:48:57.366363 Done setting resources.
1370 13:48:57.371881 Show resources in subtree (Root Device)...After assigning values.
1371 13:48:57.378573 Root Device child on link 0 DOMAIN: 0000
1372 13:48:57.381802 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1373 13:48:57.391585 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1374 13:48:57.402248 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1375 13:48:57.402329 PCI: 00:00.0
1376 13:48:57.411455 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1377 13:48:57.421493 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1378 13:48:57.431604 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1379 13:48:57.441434 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1380 13:48:57.451136 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1381 13:48:57.458197 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1382 13:48:57.467949 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1383 13:48:57.477977 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1384 13:48:57.487493 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1385 13:48:57.498127 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1386 13:48:57.507694 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1387 13:48:57.514442 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1388 13:48:57.524352 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1389 13:48:57.533915 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1390 13:48:57.544206 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1391 13:48:57.554129 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1392 13:48:57.563993 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1393 13:48:57.570584 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1394 13:48:57.581002 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1395 13:48:57.590749 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1396 13:48:57.593786 PCI: 00:02.0
1397 13:48:57.603909 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1398 13:48:57.613774 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1399 13:48:57.623516 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1400 13:48:57.627665 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1401 13:48:57.636892 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1402 13:48:57.640105 GENERIC: 0.0
1403 13:48:57.640214 PCI: 00:05.0
1404 13:48:57.653673 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1405 13:48:57.656651 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1406 13:48:57.659859 GENERIC: 0.0
1407 13:48:57.659967 PCI: 00:08.0
1408 13:48:57.669777 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1409 13:48:57.673348 PCI: 00:0a.0
1410 13:48:57.676378 PCI: 00:0d.0 child on link 0 USB0 port 0
1411 13:48:57.687182 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1412 13:48:57.689840 USB0 port 0 child on link 0 USB3 port 0
1413 13:48:57.693232 USB3 port 0
1414 13:48:57.696148 USB3 port 1
1415 13:48:57.696239 USB3 port 2
1416 13:48:57.699491 USB3 port 3
1417 13:48:57.702992 PCI: 00:14.0 child on link 0 USB0 port 0
1418 13:48:57.713134 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1419 13:48:57.716260 USB0 port 0 child on link 0 USB2 port 0
1420 13:48:57.719583 USB2 port 0
1421 13:48:57.719694 USB2 port 1
1422 13:48:57.723219 USB2 port 2
1423 13:48:57.726262 USB2 port 3
1424 13:48:57.726370 USB2 port 4
1425 13:48:57.729727 USB2 port 5
1426 13:48:57.729835 USB2 port 6
1427 13:48:57.732730 USB2 port 7
1428 13:48:57.732838 USB2 port 8
1429 13:48:57.736089 USB2 port 9
1430 13:48:57.736199 USB3 port 0
1431 13:48:57.739347 USB3 port 1
1432 13:48:57.739462 USB3 port 2
1433 13:48:57.742921 USB3 port 3
1434 13:48:57.743033 PCI: 00:14.2
1435 13:48:57.752989 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1436 13:48:57.765958 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1437 13:48:57.769114 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1438 13:48:57.779144 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1439 13:48:57.782543 GENERIC: 0.0
1440 13:48:57.786215 PCI: 00:15.0 child on link 0 I2C: 00:1a
1441 13:48:57.795784 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1442 13:48:57.795898 I2C: 00:1a
1443 13:48:57.799179 I2C: 00:31
1444 13:48:57.799288 I2C: 00:32
1445 13:48:57.806199 PCI: 00:15.1 child on link 0 I2C: 00:10
1446 13:48:57.815689 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1447 13:48:57.815806 I2C: 00:10
1448 13:48:57.819166 PCI: 00:15.2
1449 13:48:57.829197 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1450 13:48:57.829285 PCI: 00:15.3
1451 13:48:57.839212 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1452 13:48:57.842352 PCI: 00:16.0
1453 13:48:57.852142 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1454 13:48:57.855406 PCI: 00:19.0
1455 13:48:57.858989 PCI: 00:19.1 child on link 0 I2C: 00:15
1456 13:48:57.869250 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1457 13:48:57.869331 I2C: 00:15
1458 13:48:57.875693 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1459 13:48:57.885307 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1460 13:48:57.895704 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1461 13:48:57.905563 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1462 13:48:57.909026 GENERIC: 0.0
1463 13:48:57.909105 PCI: 01:00.0
1464 13:48:57.921815 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1465 13:48:57.931746 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1466 13:48:57.931826 PCI: 00:1e.0
1467 13:48:57.942152 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1468 13:48:57.948447 PCI: 00:1e.2 child on link 0 SPI: 00
1469 13:48:57.958376 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1470 13:48:57.958457 SPI: 00
1471 13:48:57.961869 PCI: 00:1e.3 child on link 0 SPI: 00
1472 13:48:57.972383 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1473 13:48:57.975424 SPI: 00
1474 13:48:57.978236 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1475 13:48:57.988368 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1476 13:48:57.988453 PNP: 0c09.0
1477 13:48:57.998924 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1478 13:48:58.001883 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1479 13:48:58.011704 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1480 13:48:58.021764 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1481 13:48:58.024916 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1482 13:48:58.028085 GENERIC: 0.0
1483 13:48:58.028164 GENERIC: 1.0
1484 13:48:58.031899 PCI: 00:1f.3
1485 13:48:58.041490 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1486 13:48:58.051398 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1487 13:48:58.055250 PCI: 00:1f.5
1488 13:48:58.064767 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1489 13:48:58.068293 CPU_CLUSTER: 0 child on link 0 APIC: 00
1490 13:48:58.068373 APIC: 00
1491 13:48:58.071381 APIC: 01
1492 13:48:58.071460 APIC: 07
1493 13:48:58.074828 APIC: 03
1494 13:48:58.074908 APIC: 04
1495 13:48:58.074971 APIC: 06
1496 13:48:58.078335 APIC: 02
1497 13:48:58.078415 APIC: 05
1498 13:48:58.081476 Done allocating resources.
1499 13:48:58.087868 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1500 13:48:58.094666 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1501 13:48:58.097930 Configure GPIOs for I2S audio on UP4.
1502 13:48:58.104853 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1503 13:48:58.107555 Enabling resources...
1504 13:48:58.111242 PCI: 00:00.0 subsystem <- 8086/9a12
1505 13:48:58.111322 PCI: 00:00.0 cmd <- 06
1506 13:48:58.117678 PCI: 00:02.0 subsystem <- 8086/9a40
1507 13:48:58.117757 PCI: 00:02.0 cmd <- 03
1508 13:48:58.121044 PCI: 00:04.0 subsystem <- 8086/9a03
1509 13:48:58.124296 PCI: 00:04.0 cmd <- 02
1510 13:48:58.127583 PCI: 00:05.0 subsystem <- 8086/9a19
1511 13:48:58.131049 PCI: 00:05.0 cmd <- 02
1512 13:48:58.134326 PCI: 00:08.0 subsystem <- 8086/9a11
1513 13:48:58.137478 PCI: 00:08.0 cmd <- 06
1514 13:48:58.141125 PCI: 00:0d.0 subsystem <- 8086/9a13
1515 13:48:58.144301 PCI: 00:0d.0 cmd <- 02
1516 13:48:58.147788 PCI: 00:14.0 subsystem <- 8086/a0ed
1517 13:48:58.151202 PCI: 00:14.0 cmd <- 02
1518 13:48:58.154126 PCI: 00:14.2 subsystem <- 8086/a0ef
1519 13:48:58.157346 PCI: 00:14.2 cmd <- 02
1520 13:48:58.160759 PCI: 00:14.3 subsystem <- 8086/a0f0
1521 13:48:58.160841 PCI: 00:14.3 cmd <- 02
1522 13:48:58.168190 PCI: 00:15.0 subsystem <- 8086/a0e8
1523 13:48:58.168270 PCI: 00:15.0 cmd <- 02
1524 13:48:58.170765 PCI: 00:15.1 subsystem <- 8086/a0e9
1525 13:48:58.174142 PCI: 00:15.1 cmd <- 02
1526 13:48:58.177514 PCI: 00:15.2 subsystem <- 8086/a0ea
1527 13:48:58.180660 PCI: 00:15.2 cmd <- 02
1528 13:48:58.184638 PCI: 00:15.3 subsystem <- 8086/a0eb
1529 13:48:58.187578 PCI: 00:15.3 cmd <- 02
1530 13:48:58.191044 PCI: 00:16.0 subsystem <- 8086/a0e0
1531 13:48:58.194193 PCI: 00:16.0 cmd <- 02
1532 13:48:58.197575 PCI: 00:19.1 subsystem <- 8086/a0c6
1533 13:48:58.201865 PCI: 00:19.1 cmd <- 02
1534 13:48:58.204267 PCI: 00:1d.0 bridge ctrl <- 0013
1535 13:48:58.207376 PCI: 00:1d.0 subsystem <- 8086/a0b0
1536 13:48:58.207456 PCI: 00:1d.0 cmd <- 06
1537 13:48:58.214555 PCI: 00:1e.0 subsystem <- 8086/a0a8
1538 13:48:58.214634 PCI: 00:1e.0 cmd <- 06
1539 13:48:58.217508 PCI: 00:1e.2 subsystem <- 8086/a0aa
1540 13:48:58.220854 PCI: 00:1e.2 cmd <- 06
1541 13:48:58.223830 PCI: 00:1e.3 subsystem <- 8086/a0ab
1542 13:48:58.227269 PCI: 00:1e.3 cmd <- 02
1543 13:48:58.231100 PCI: 00:1f.0 subsystem <- 8086/a087
1544 13:48:58.234153 PCI: 00:1f.0 cmd <- 407
1545 13:48:58.237287 PCI: 00:1f.3 subsystem <- 8086/a0c8
1546 13:48:58.240436 PCI: 00:1f.3 cmd <- 02
1547 13:48:58.243950 PCI: 00:1f.5 subsystem <- 8086/a0a4
1548 13:48:58.247097 PCI: 00:1f.5 cmd <- 406
1549 13:48:58.250995 PCI: 01:00.0 cmd <- 02
1550 13:48:58.255207 done.
1551 13:48:58.258685 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1552 13:48:58.261492 Initializing devices...
1553 13:48:58.264759 Root Device init
1554 13:48:58.267988 Chrome EC: Set SMI mask to 0x0000000000000000
1555 13:48:58.275255 Chrome EC: clear events_b mask to 0x0000000000000000
1556 13:48:58.281495 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1557 13:48:58.284551 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1558 13:48:58.291426 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1559 13:48:58.298413 Chrome EC: Set WAKE mask to 0x0000000000000000
1560 13:48:58.301222 fw_config match found: DB_USB=USB3_ACTIVE
1561 13:48:58.308983 Configure Right Type-C port orientation for retimer
1562 13:48:58.311561 Root Device init finished in 43 msecs
1563 13:48:58.314870 PCI: 00:00.0 init
1564 13:48:58.317955 CPU TDP = 9 Watts
1565 13:48:58.318035 CPU PL1 = 9 Watts
1566 13:48:58.321509 CPU PL2 = 40 Watts
1567 13:48:58.321652 CPU PL4 = 83 Watts
1568 13:48:58.325491 PCI: 00:00.0 init finished in 8 msecs
1569 13:48:58.328322 PCI: 00:02.0 init
1570 13:48:58.331413 GMA: Found VBT in CBFS
1571 13:48:58.334497 GMA: Found valid VBT in CBFS
1572 13:48:58.338027 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1573 13:48:58.348400 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1574 13:48:58.351382 PCI: 00:02.0 init finished in 18 msecs
1575 13:48:58.354511 PCI: 00:05.0 init
1576 13:48:58.357872 PCI: 00:05.0 init finished in 0 msecs
1577 13:48:58.357953 PCI: 00:08.0 init
1578 13:48:58.364734 PCI: 00:08.0 init finished in 0 msecs
1579 13:48:58.364816 PCI: 00:14.0 init
1580 13:48:58.371030 PCI: 00:14.0 init finished in 0 msecs
1581 13:48:58.371111 PCI: 00:14.2 init
1582 13:48:58.374950 PCI: 00:14.2 init finished in 0 msecs
1583 13:48:58.378157 PCI: 00:15.0 init
1584 13:48:58.381481 I2C bus 0 version 0x3230302a
1585 13:48:58.385118 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1586 13:48:58.387918 PCI: 00:15.0 init finished in 6 msecs
1587 13:48:58.391460 PCI: 00:15.1 init
1588 13:48:58.395700 I2C bus 1 version 0x3230302a
1589 13:48:58.398187 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1590 13:48:58.401340 PCI: 00:15.1 init finished in 6 msecs
1591 13:48:58.404807 PCI: 00:15.2 init
1592 13:48:58.408350 I2C bus 2 version 0x3230302a
1593 13:48:58.411238 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1594 13:48:58.414509 PCI: 00:15.2 init finished in 6 msecs
1595 13:48:58.414590 PCI: 00:15.3 init
1596 13:48:58.418718 I2C bus 3 version 0x3230302a
1597 13:48:58.421246 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1598 13:48:58.427923 PCI: 00:15.3 init finished in 6 msecs
1599 13:48:58.428004 PCI: 00:16.0 init
1600 13:48:58.431207 PCI: 00:16.0 init finished in 0 msecs
1601 13:48:58.434976 PCI: 00:19.1 init
1602 13:48:58.438227 I2C bus 5 version 0x3230302a
1603 13:48:58.441357 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1604 13:48:58.445031 PCI: 00:19.1 init finished in 6 msecs
1605 13:48:58.448004 PCI: 00:1d.0 init
1606 13:48:58.451901 Initializing PCH PCIe bridge.
1607 13:48:58.454917 PCI: 00:1d.0 init finished in 3 msecs
1608 13:48:58.458596 PCI: 00:1f.0 init
1609 13:48:58.461528 IOAPIC: Initializing IOAPIC at 0xfec00000
1610 13:48:58.464835 IOAPIC: Bootstrap Processor Local APIC = 0x00
1611 13:48:58.467983 IOAPIC: ID = 0x02
1612 13:48:58.471446 IOAPIC: Dumping registers
1613 13:48:58.474924 reg 0x0000: 0x02000000
1614 13:48:58.475006 reg 0x0001: 0x00770020
1615 13:48:58.477864 reg 0x0002: 0x00000000
1616 13:48:58.481326 PCI: 00:1f.0 init finished in 21 msecs
1617 13:48:58.485074 PCI: 00:1f.2 init
1618 13:48:58.488371 Disabling ACPI via APMC.
1619 13:48:58.491771 APMC done.
1620 13:48:58.494688 PCI: 00:1f.2 init finished in 5 msecs
1621 13:48:58.505587 PCI: 01:00.0 init
1622 13:48:58.508632 PCI: 01:00.0 init finished in 0 msecs
1623 13:48:58.512159 PNP: 0c09.0 init
1624 13:48:58.517013 Google Chrome EC uptime: 8.265 seconds
1625 13:48:58.522319 Google Chrome AP resets since EC boot: 1
1626 13:48:58.525464 Google Chrome most recent AP reset causes:
1627 13:48:58.528842 0.456: 32775 shutdown: entering G3
1628 13:48:58.535752 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1629 13:48:58.538598 PNP: 0c09.0 init finished in 22 msecs
1630 13:48:58.544151 Devices initialized
1631 13:48:58.547853 Show all devs... After init.
1632 13:48:58.550886 Root Device: enabled 1
1633 13:48:58.550966 DOMAIN: 0000: enabled 1
1634 13:48:58.554340 CPU_CLUSTER: 0: enabled 1
1635 13:48:58.557914 PCI: 00:00.0: enabled 1
1636 13:48:58.561283 PCI: 00:02.0: enabled 1
1637 13:48:58.561390 PCI: 00:04.0: enabled 1
1638 13:48:58.564010 PCI: 00:05.0: enabled 1
1639 13:48:58.567566 PCI: 00:06.0: enabled 0
1640 13:48:58.570766 PCI: 00:07.0: enabled 0
1641 13:48:58.570845 PCI: 00:07.1: enabled 0
1642 13:48:58.574190 PCI: 00:07.2: enabled 0
1643 13:48:58.577282 PCI: 00:07.3: enabled 0
1644 13:48:58.580696 PCI: 00:08.0: enabled 1
1645 13:48:58.580776 PCI: 00:09.0: enabled 0
1646 13:48:58.584327 PCI: 00:0a.0: enabled 0
1647 13:48:58.587415 PCI: 00:0d.0: enabled 1
1648 13:48:58.590930 PCI: 00:0d.1: enabled 0
1649 13:48:58.591009 PCI: 00:0d.2: enabled 0
1650 13:48:58.594625 PCI: 00:0d.3: enabled 0
1651 13:48:58.597491 PCI: 00:0e.0: enabled 0
1652 13:48:58.597636 PCI: 00:10.2: enabled 1
1653 13:48:58.600739 PCI: 00:10.6: enabled 0
1654 13:48:58.604496 PCI: 00:10.7: enabled 0
1655 13:48:58.607358 PCI: 00:12.0: enabled 0
1656 13:48:58.607437 PCI: 00:12.6: enabled 0
1657 13:48:58.610821 PCI: 00:13.0: enabled 0
1658 13:48:58.614251 PCI: 00:14.0: enabled 1
1659 13:48:58.617933 PCI: 00:14.1: enabled 0
1660 13:48:58.618013 PCI: 00:14.2: enabled 1
1661 13:48:58.620948 PCI: 00:14.3: enabled 1
1662 13:48:58.624083 PCI: 00:15.0: enabled 1
1663 13:48:58.627294 PCI: 00:15.1: enabled 1
1664 13:48:58.627374 PCI: 00:15.2: enabled 1
1665 13:48:58.630691 PCI: 00:15.3: enabled 1
1666 13:48:58.633845 PCI: 00:16.0: enabled 1
1667 13:48:58.633924 PCI: 00:16.1: enabled 0
1668 13:48:58.637532 PCI: 00:16.2: enabled 0
1669 13:48:58.641081 PCI: 00:16.3: enabled 0
1670 13:48:58.644110 PCI: 00:16.4: enabled 0
1671 13:48:58.644188 PCI: 00:16.5: enabled 0
1672 13:48:58.647456 PCI: 00:17.0: enabled 0
1673 13:48:58.650424 PCI: 00:19.0: enabled 0
1674 13:48:58.653800 PCI: 00:19.1: enabled 1
1675 13:48:58.653880 PCI: 00:19.2: enabled 0
1676 13:48:58.657427 PCI: 00:1c.0: enabled 1
1677 13:48:58.660401 PCI: 00:1c.1: enabled 0
1678 13:48:58.663916 PCI: 00:1c.2: enabled 0
1679 13:48:58.663997 PCI: 00:1c.3: enabled 0
1680 13:48:58.667422 PCI: 00:1c.4: enabled 0
1681 13:48:58.670557 PCI: 00:1c.5: enabled 0
1682 13:48:58.673904 PCI: 00:1c.6: enabled 1
1683 13:48:58.673984 PCI: 00:1c.7: enabled 0
1684 13:48:58.677238 PCI: 00:1d.0: enabled 1
1685 13:48:58.680325 PCI: 00:1d.1: enabled 0
1686 13:48:58.680406 PCI: 00:1d.2: enabled 1
1687 13:48:58.683823 PCI: 00:1d.3: enabled 0
1688 13:48:58.687051 PCI: 00:1e.0: enabled 1
1689 13:48:58.690339 PCI: 00:1e.1: enabled 0
1690 13:48:58.690420 PCI: 00:1e.2: enabled 1
1691 13:48:58.693525 PCI: 00:1e.3: enabled 1
1692 13:48:58.697116 PCI: 00:1f.0: enabled 1
1693 13:48:58.700718 PCI: 00:1f.1: enabled 0
1694 13:48:58.700799 PCI: 00:1f.2: enabled 1
1695 13:48:58.704769 PCI: 00:1f.3: enabled 1
1696 13:48:58.707440 PCI: 00:1f.4: enabled 0
1697 13:48:58.710209 PCI: 00:1f.5: enabled 1
1698 13:48:58.710290 PCI: 00:1f.6: enabled 0
1699 13:48:58.713665 PCI: 00:1f.7: enabled 0
1700 13:48:58.716718 APIC: 00: enabled 1
1701 13:48:58.716798 GENERIC: 0.0: enabled 1
1702 13:48:58.720382 GENERIC: 0.0: enabled 1
1703 13:48:58.723937 GENERIC: 1.0: enabled 1
1704 13:48:58.726715 GENERIC: 0.0: enabled 1
1705 13:48:58.726796 GENERIC: 1.0: enabled 1
1706 13:48:58.730216 USB0 port 0: enabled 1
1707 13:48:58.733906 GENERIC: 0.0: enabled 1
1708 13:48:58.733986 USB0 port 0: enabled 1
1709 13:48:58.736844 GENERIC: 0.0: enabled 1
1710 13:48:58.740022 I2C: 00:1a: enabled 1
1711 13:48:58.743897 I2C: 00:31: enabled 1
1712 13:48:58.743978 I2C: 00:32: enabled 1
1713 13:48:58.747039 I2C: 00:10: enabled 1
1714 13:48:58.750105 I2C: 00:15: enabled 1
1715 13:48:58.750186 GENERIC: 0.0: enabled 0
1716 13:48:58.753396 GENERIC: 1.0: enabled 0
1717 13:48:58.756882 GENERIC: 0.0: enabled 1
1718 13:48:58.756956 SPI: 00: enabled 1
1719 13:48:58.760645 SPI: 00: enabled 1
1720 13:48:58.763481 PNP: 0c09.0: enabled 1
1721 13:48:58.763561 GENERIC: 0.0: enabled 1
1722 13:48:58.766627 USB3 port 0: enabled 1
1723 13:48:58.769892 USB3 port 1: enabled 1
1724 13:48:58.773648 USB3 port 2: enabled 0
1725 13:48:58.773727 USB3 port 3: enabled 0
1726 13:48:58.776772 USB2 port 0: enabled 0
1727 13:48:58.779916 USB2 port 1: enabled 1
1728 13:48:58.779998 USB2 port 2: enabled 1
1729 13:48:58.783547 USB2 port 3: enabled 0
1730 13:48:58.786597 USB2 port 4: enabled 1
1731 13:48:58.786676 USB2 port 5: enabled 0
1732 13:48:58.789796 USB2 port 6: enabled 0
1733 13:48:58.793279 USB2 port 7: enabled 0
1734 13:48:58.796603 USB2 port 8: enabled 0
1735 13:48:58.796683 USB2 port 9: enabled 0
1736 13:48:58.800315 USB3 port 0: enabled 0
1737 13:48:58.803517 USB3 port 1: enabled 1
1738 13:48:58.803597 USB3 port 2: enabled 0
1739 13:48:58.806693 USB3 port 3: enabled 0
1740 13:48:58.809970 GENERIC: 0.0: enabled 1
1741 13:48:58.813555 GENERIC: 1.0: enabled 1
1742 13:48:58.813654 APIC: 01: enabled 1
1743 13:48:58.816585 APIC: 07: enabled 1
1744 13:48:58.816665 APIC: 03: enabled 1
1745 13:48:58.819906 APIC: 04: enabled 1
1746 13:48:58.823228 APIC: 06: enabled 1
1747 13:48:58.823307 APIC: 02: enabled 1
1748 13:48:58.826602 APIC: 05: enabled 1
1749 13:48:58.829766 PCI: 01:00.0: enabled 1
1750 13:48:58.833142 BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
1751 13:48:58.839881 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1752 13:48:58.843132 ELOG: NV offset 0xf30000 size 0x1000
1753 13:48:58.849940 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1754 13:48:58.856170 ELOG: Event(17) added with size 13 at 2023-08-16 13:48:59 UTC
1755 13:48:58.862629 ELOG: Event(92) added with size 9 at 2023-08-16 13:48:59 UTC
1756 13:48:58.869393 ELOG: Event(93) added with size 9 at 2023-08-16 13:48:59 UTC
1757 13:48:58.875900 ELOG: Event(9E) added with size 10 at 2023-08-16 13:48:59 UTC
1758 13:48:58.882754 ELOG: Event(9F) added with size 14 at 2023-08-16 13:48:59 UTC
1759 13:48:58.889296 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1760 13:48:58.895888 ELOG: Event(A1) added with size 10 at 2023-08-16 13:48:59 UTC
1761 13:48:58.902231 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1762 13:48:58.909458 ELOG: Event(A0) added with size 9 at 2023-08-16 13:48:59 UTC
1763 13:48:58.912221 elog_add_boot_reason: Logged dev mode boot
1764 13:48:58.918846 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1765 13:48:58.918931 Finalize devices...
1766 13:48:58.922188 Devices finalized
1767 13:48:58.929285 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1768 13:48:58.932093 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1769 13:48:58.938721 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1770 13:48:58.942228 ME: HFSTS1 : 0x80030055
1771 13:48:58.948997 ME: HFSTS2 : 0x30280116
1772 13:48:58.952260 ME: HFSTS3 : 0x00000050
1773 13:48:58.955540 ME: HFSTS4 : 0x00004000
1774 13:48:58.961858 ME: HFSTS5 : 0x00000000
1775 13:48:58.965453 ME: HFSTS6 : 0x40400006
1776 13:48:58.969332 ME: Manufacturing Mode : YES
1777 13:48:58.972211 ME: SPI Protection Mode Enabled : NO
1778 13:48:58.975613 ME: FW Partition Table : OK
1779 13:48:58.981859 ME: Bringup Loader Failure : NO
1780 13:48:58.985440 ME: Firmware Init Complete : NO
1781 13:48:58.988731 ME: Boot Options Present : NO
1782 13:48:58.991761 ME: Update In Progress : NO
1783 13:48:58.995317 ME: D0i3 Support : YES
1784 13:48:58.998698 ME: Low Power State Enabled : NO
1785 13:48:59.001979 ME: CPU Replaced : YES
1786 13:48:59.008968 ME: CPU Replacement Valid : YES
1787 13:48:59.011956 ME: Current Working State : 5
1788 13:48:59.015309 ME: Current Operation State : 1
1789 13:48:59.018907 ME: Current Operation Mode : 3
1790 13:48:59.021771 ME: Error Code : 0
1791 13:48:59.024954 ME: Enhanced Debug Mode : NO
1792 13:48:59.028385 ME: CPU Debug Disabled : YES
1793 13:48:59.031624 ME: TXT Support : NO
1794 13:48:59.038670 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1795 13:48:59.044941 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1796 13:48:59.048282 CBFS: 'fallback/slic' not found.
1797 13:48:59.055012 ACPI: Writing ACPI tables at 76b01000.
1798 13:48:59.055092 ACPI: * FACS
1799 13:48:59.058106 ACPI: * DSDT
1800 13:48:59.062047 Ramoops buffer: 0x100000@0x76a00000.
1801 13:48:59.064776 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1802 13:48:59.071733 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1803 13:48:59.074682 Google Chrome EC: version:
1804 13:48:59.078203 ro: voema_v2.0.10114-a447f03e46
1805 13:48:59.082044 rw: voema_v2.0.10114-a447f03e46
1806 13:48:59.082126 running image: 2
1807 13:48:59.088676 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1808 13:48:59.092221 ACPI: * FADT
1809 13:48:59.092303 SCI is IRQ9
1810 13:48:59.098730 ACPI: added table 1/32, length now 40
1811 13:48:59.098812 ACPI: * SSDT
1812 13:48:59.102685 Found 1 CPU(s) with 8 core(s) each.
1813 13:48:59.108943 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1814 13:48:59.112661 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1815 13:48:59.115574 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1816 13:48:59.118962 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1817 13:48:59.125313 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1818 13:48:59.132434 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1819 13:48:59.135548 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1820 13:48:59.142353 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1821 13:48:59.149195 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1822 13:48:59.152139 \_SB.PCI0.RP09: Added StorageD3Enable property
1823 13:48:59.155758 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1824 13:48:59.161753 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1825 13:48:59.168531 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1826 13:48:59.171875 PS2K: Passing 80 keymaps to kernel
1827 13:48:59.178809 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1828 13:48:59.185195 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1829 13:48:59.192177 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1830 13:48:59.198877 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1831 13:48:59.204893 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1832 13:48:59.211561 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1833 13:48:59.218239 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1834 13:48:59.225059 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1835 13:48:59.228161 ACPI: added table 2/32, length now 44
1836 13:48:59.231618 ACPI: * MCFG
1837 13:48:59.235683 ACPI: added table 3/32, length now 48
1838 13:48:59.235764 ACPI: * TPM2
1839 13:48:59.238735 TPM2 log created at 0x769f0000
1840 13:48:59.242432 ACPI: added table 4/32, length now 52
1841 13:48:59.244815 ACPI: * MADT
1842 13:48:59.244896 SCI is IRQ9
1843 13:48:59.248381 ACPI: added table 5/32, length now 56
1844 13:48:59.251397 current = 76b09850
1845 13:48:59.251478 ACPI: * DMAR
1846 13:48:59.258365 ACPI: added table 6/32, length now 60
1847 13:48:59.261469 ACPI: added table 7/32, length now 64
1848 13:48:59.261551 ACPI: * HPET
1849 13:48:59.264704 ACPI: added table 8/32, length now 68
1850 13:48:59.268338 ACPI: done.
1851 13:48:59.268419 ACPI tables: 35216 bytes.
1852 13:48:59.271492 smbios_write_tables: 769ef000
1853 13:48:59.274642 EC returned error result code 3
1854 13:48:59.278029 Couldn't obtain OEM name from CBI
1855 13:48:59.283332 Create SMBIOS type 16
1856 13:48:59.286521 Create SMBIOS type 17
1857 13:48:59.289931 GENERIC: 0.0 (WIFI Device)
1858 13:48:59.290012 SMBIOS tables: 1734 bytes.
1859 13:48:59.296777 Writing table forward entry at 0x00000500
1860 13:48:59.303069 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1861 13:48:59.306579 Writing coreboot table at 0x76b25000
1862 13:48:59.313480 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1863 13:48:59.316774 1. 0000000000001000-000000000009ffff: RAM
1864 13:48:59.320361 2. 00000000000a0000-00000000000fffff: RESERVED
1865 13:48:59.326725 3. 0000000000100000-00000000769eefff: RAM
1866 13:48:59.329871 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1867 13:48:59.336719 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1868 13:48:59.343183 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1869 13:48:59.346763 7. 0000000077000000-000000007fbfffff: RESERVED
1870 13:48:59.349553 8. 00000000c0000000-00000000cfffffff: RESERVED
1871 13:48:59.356395 9. 00000000f8000000-00000000f9ffffff: RESERVED
1872 13:48:59.359949 10. 00000000fb000000-00000000fb000fff: RESERVED
1873 13:48:59.366289 11. 00000000fe000000-00000000fe00ffff: RESERVED
1874 13:48:59.369443 12. 00000000fed80000-00000000fed87fff: RESERVED
1875 13:48:59.376278 13. 00000000fed90000-00000000fed92fff: RESERVED
1876 13:48:59.379412 14. 00000000feda0000-00000000feda1fff: RESERVED
1877 13:48:59.386871 15. 00000000fedc0000-00000000feddffff: RESERVED
1878 13:48:59.389706 16. 0000000100000000-00000004803fffff: RAM
1879 13:48:59.392891 Passing 4 GPIOs to payload:
1880 13:48:59.396250 NAME | PORT | POLARITY | VALUE
1881 13:48:59.403037 lid | undefined | high | high
1882 13:48:59.406369 power | undefined | high | low
1883 13:48:59.412773 oprom | undefined | high | low
1884 13:48:59.419472 EC in RW | 0x000000e5 | high | high
1885 13:48:59.426236 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e94e
1886 13:48:59.426318 coreboot table: 1576 bytes.
1887 13:48:59.433180 IMD ROOT 0. 0x76fff000 0x00001000
1888 13:48:59.435988 IMD SMALL 1. 0x76ffe000 0x00001000
1889 13:48:59.439343 FSP MEMORY 2. 0x76c4e000 0x003b0000
1890 13:48:59.442685 VPD 3. 0x76c4d000 0x00000367
1891 13:48:59.446449 RO MCACHE 4. 0x76c4c000 0x00000fdc
1892 13:48:59.449589 CONSOLE 5. 0x76c2c000 0x00020000
1893 13:48:59.453074 FMAP 6. 0x76c2b000 0x00000578
1894 13:48:59.456120 TIME STAMP 7. 0x76c2a000 0x00000910
1895 13:48:59.462644 VBOOT WORK 8. 0x76c16000 0x00014000
1896 13:48:59.466199 ROMSTG STCK 9. 0x76c15000 0x00001000
1897 13:48:59.469268 AFTER CAR 10. 0x76c0a000 0x0000b000
1898 13:48:59.472722 RAMSTAGE 11. 0x76b97000 0x00073000
1899 13:48:59.476099 REFCODE 12. 0x76b42000 0x00055000
1900 13:48:59.479572 SMM BACKUP 13. 0x76b32000 0x00010000
1901 13:48:59.482790 4f444749 14. 0x76b30000 0x00002000
1902 13:48:59.485865 EXT VBT15. 0x76b2d000 0x0000219f
1903 13:48:59.489449 COREBOOT 16. 0x76b25000 0x00008000
1904 13:48:59.492451 ACPI 17. 0x76b01000 0x00024000
1905 13:48:59.499132 ACPI GNVS 18. 0x76b00000 0x00001000
1906 13:48:59.502903 RAMOOPS 19. 0x76a00000 0x00100000
1907 13:48:59.505840 TPM2 TCGLOG20. 0x769f0000 0x00010000
1908 13:48:59.509379 SMBIOS 21. 0x769ef000 0x00000800
1909 13:48:59.509484 IMD small region:
1910 13:48:59.516074 IMD ROOT 0. 0x76ffec00 0x00000400
1911 13:48:59.519491 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1912 13:48:59.522861 POWER STATE 2. 0x76ffeb80 0x00000044
1913 13:48:59.525881 ROMSTAGE 3. 0x76ffeb60 0x00000004
1914 13:48:59.529304 MEM INFO 4. 0x76ffe980 0x000001e0
1915 13:48:59.535957 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1916 13:48:59.539717 MTRR: Physical address space:
1917 13:48:59.546099 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1918 13:48:59.552505 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1919 13:48:59.558995 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1920 13:48:59.565656 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1921 13:48:59.573175 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1922 13:48:59.575651 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1923 13:48:59.582683 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1924 13:48:59.588934 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 13:48:59.592186 MTRR: Fixed MSR 0x258 0x0606060606060606
1926 13:48:59.595601 MTRR: Fixed MSR 0x259 0x0000000000000000
1927 13:48:59.599399 MTRR: Fixed MSR 0x268 0x0606060606060606
1928 13:48:59.602219 MTRR: Fixed MSR 0x269 0x0606060606060606
1929 13:48:59.608620 MTRR: Fixed MSR 0x26a 0x0606060606060606
1930 13:48:59.611854 MTRR: Fixed MSR 0x26b 0x0606060606060606
1931 13:48:59.615244 MTRR: Fixed MSR 0x26c 0x0606060606060606
1932 13:48:59.618836 MTRR: Fixed MSR 0x26d 0x0606060606060606
1933 13:48:59.625365 MTRR: Fixed MSR 0x26e 0x0606060606060606
1934 13:48:59.628428 MTRR: Fixed MSR 0x26f 0x0606060606060606
1935 13:48:59.632206 call enable_fixed_mtrr()
1936 13:48:59.635533 CPU physical address size: 39 bits
1937 13:48:59.642046 MTRR: default type WB/UC MTRR counts: 6/7.
1938 13:48:59.645267 MTRR: WB selected as default type.
1939 13:48:59.651919 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1940 13:48:59.655304 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1941 13:48:59.661996 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1942 13:48:59.668879 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1943 13:48:59.675068 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1944 13:48:59.682247 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1945 13:48:59.685212
1946 13:48:59.685317 MTRR check
1947 13:48:59.688484 Fixed MTRRs : Enabled
1948 13:48:59.688571 Variable MTRRs: Enabled
1949 13:48:59.688634
1950 13:48:59.695383 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 13:48:59.698705 MTRR: Fixed MSR 0x258 0x0606060606060606
1952 13:48:59.701914 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 13:48:59.705487 MTRR: Fixed MSR 0x268 0x0606060606060606
1954 13:48:59.711839 MTRR: Fixed MSR 0x269 0x0606060606060606
1955 13:48:59.715451 MTRR: Fixed MSR 0x26a 0x0606060606060606
1956 13:48:59.718594 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 13:48:59.721761 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 13:48:59.728362 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 13:48:59.731897 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 13:48:59.735821 MTRR: Fixed MSR 0x26f 0x0606060606060606
1961 13:48:59.742114 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
1962 13:48:59.745458 call enable_fixed_mtrr()
1963 13:48:59.749001 Checking cr50 for pending updates
1964 13:48:59.752482 CPU physical address size: 39 bits
1965 13:48:59.756135 MTRR: Fixed MSR 0x250 0x0606060606060606
1966 13:48:59.759905 MTRR: Fixed MSR 0x250 0x0606060606060606
1967 13:48:59.765774 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 13:48:59.769358 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 13:48:59.772554 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 13:48:59.776171 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 13:48:59.782733 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 13:48:59.785796 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 13:48:59.789099 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 13:48:59.792443 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 13:48:59.795994 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 13:48:59.802589 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 13:48:59.805874 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 13:48:59.812688 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 13:48:59.815735 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 13:48:59.819632 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 13:48:59.822557 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 13:48:59.829148 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 13:48:59.832277 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 13:48:59.835736 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 13:48:59.839117 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 13:48:59.845742 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 13:48:59.849259 call enable_fixed_mtrr()
1988 13:48:59.853541 call enable_fixed_mtrr()
1989 13:48:59.853651 Reading cr50 TPM mode
1990 13:48:59.857089 MTRR: Fixed MSR 0x250 0x0606060606060606
1991 13:48:59.860382 MTRR: Fixed MSR 0x250 0x0606060606060606
1992 13:48:59.867063 MTRR: Fixed MSR 0x258 0x0606060606060606
1993 13:48:59.870525 MTRR: Fixed MSR 0x259 0x0000000000000000
1994 13:48:59.874784 MTRR: Fixed MSR 0x268 0x0606060606060606
1995 13:48:59.876824 MTRR: Fixed MSR 0x269 0x0606060606060606
1996 13:48:59.883839 MTRR: Fixed MSR 0x26a 0x0606060606060606
1997 13:48:59.887736 MTRR: Fixed MSR 0x26b 0x0606060606060606
1998 13:48:59.890482 MTRR: Fixed MSR 0x26c 0x0606060606060606
1999 13:48:59.894269 MTRR: Fixed MSR 0x26d 0x0606060606060606
2000 13:48:59.897514 MTRR: Fixed MSR 0x26e 0x0606060606060606
2001 13:48:59.903665 MTRR: Fixed MSR 0x26f 0x0606060606060606
2002 13:48:59.907039 MTRR: Fixed MSR 0x258 0x0606060606060606
2003 13:48:59.910260 call enable_fixed_mtrr()
2004 13:48:59.913476 MTRR: Fixed MSR 0x259 0x0000000000000000
2005 13:48:59.920149 MTRR: Fixed MSR 0x268 0x0606060606060606
2006 13:48:59.923230 MTRR: Fixed MSR 0x269 0x0606060606060606
2007 13:48:59.926809 MTRR: Fixed MSR 0x26a 0x0606060606060606
2008 13:48:59.929860 MTRR: Fixed MSR 0x26b 0x0606060606060606
2009 13:48:59.937318 MTRR: Fixed MSR 0x26c 0x0606060606060606
2010 13:48:59.939801 MTRR: Fixed MSR 0x26d 0x0606060606060606
2011 13:48:59.943692 MTRR: Fixed MSR 0x26e 0x0606060606060606
2012 13:48:59.946704 MTRR: Fixed MSR 0x26f 0x0606060606060606
2013 13:48:59.951453 CPU physical address size: 39 bits
2014 13:48:59.957789 call enable_fixed_mtrr()
2015 13:48:59.961003 CPU physical address size: 39 bits
2016 13:48:59.964255 CPU physical address size: 39 bits
2017 13:48:59.971145 CPU physical address size: 39 bits
2018 13:48:59.974391 BS: BS_PAYLOAD_LOAD entry times (exec / console): 109 / 6 ms
2019 13:48:59.981176 MTRR: Fixed MSR 0x250 0x0606060606060606
2020 13:48:59.984711 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 13:48:59.987583 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 13:48:59.990838 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 13:48:59.997538 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 13:49:00.001081 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 13:49:00.004195 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 13:49:00.007720 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 13:49:00.011399 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 13:49:00.017364 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 13:49:00.020703 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 13:49:00.024160 MTRR: Fixed MSR 0x26f 0x0606060606060606
2031 13:49:00.032057 MTRR: Fixed MSR 0x258 0x0606060606060606
2032 13:49:00.034983 MTRR: Fixed MSR 0x259 0x0000000000000000
2033 13:49:00.038838 MTRR: Fixed MSR 0x268 0x0606060606060606
2034 13:49:00.041966 MTRR: Fixed MSR 0x269 0x0606060606060606
2035 13:49:00.048425 MTRR: Fixed MSR 0x26a 0x0606060606060606
2036 13:49:00.051724 MTRR: Fixed MSR 0x26b 0x0606060606060606
2037 13:49:00.054759 MTRR: Fixed MSR 0x26c 0x0606060606060606
2038 13:49:00.058064 MTRR: Fixed MSR 0x26d 0x0606060606060606
2039 13:49:00.064733 MTRR: Fixed MSR 0x26e 0x0606060606060606
2040 13:49:00.068190 MTRR: Fixed MSR 0x26f 0x0606060606060606
2041 13:49:00.071686 call enable_fixed_mtrr()
2042 13:49:00.075353 call enable_fixed_mtrr()
2043 13:49:00.081626 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2044 13:49:00.085092 CPU physical address size: 39 bits
2045 13:49:00.088986 CPU physical address size: 39 bits
2046 13:49:00.095439 Checking segment from ROM address 0xffc02b38
2047 13:49:00.098604 Checking segment from ROM address 0xffc02b54
2048 13:49:00.105467 Loading segment from ROM address 0xffc02b38
2049 13:49:00.105579 code (compression=0)
2050 13:49:00.115756 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2051 13:49:00.121759 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2052 13:49:00.125320 it's not compressed!
2053 13:49:00.265998 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2054 13:49:00.272043 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2055 13:49:00.278901 Loading segment from ROM address 0xffc02b54
2056 13:49:00.282215 Entry Point 0x30000000
2057 13:49:00.282296 Loaded segments
2058 13:49:00.288960 BS: BS_PAYLOAD_LOAD run times (exec / console): 244 / 63 ms
2059 13:49:00.333792 Finalizing chipset.
2060 13:49:00.337372 Finalizing SMM.
2061 13:49:00.337452 APMC done.
2062 13:49:00.343754 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2063 13:49:00.347221 mp_park_aps done after 0 msecs.
2064 13:49:00.350929 Jumping to boot code at 0x30000000(0x76b25000)
2065 13:49:00.361195 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2066 13:49:00.361277
2067 13:49:00.361339
2068 13:49:00.361397
2069 13:49:00.364262 Starting depthcharge on Voema...
2070 13:49:00.364342
2071 13:49:00.364674 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2072 13:49:00.364768 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2073 13:49:00.364848 Setting prompt string to ['volteer:']
2074 13:49:00.364925 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2075 13:49:00.373539 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2076 13:49:00.373666
2077 13:49:00.380374 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2078 13:49:00.380455
2079 13:49:00.387056 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2080 13:49:00.387138
2081 13:49:00.390053 Failed to find eMMC card reader
2082 13:49:00.390133
2083 13:49:00.390196 Wipe memory regions:
2084 13:49:00.390254
2085 13:49:00.396914 [0x00000000001000, 0x000000000a0000)
2086 13:49:00.396994
2087 13:49:00.400327 [0x00000000100000, 0x00000030000000)
2088 13:49:00.434166
2089 13:49:00.437521 [0x00000032662db0, 0x000000769ef000)
2090 13:49:00.484899
2091 13:49:00.488148 [0x00000100000000, 0x00000480400000)
2092 13:49:01.103672
2093 13:49:01.107121 ec_init: CrosEC protocol v3 supported (256, 256)
2094 13:49:01.540128
2095 13:49:01.540279 R8152: Initializing
2096 13:49:01.540348
2097 13:49:01.542861 Version 6 (ocp_data = 5c30)
2098 13:49:01.542941
2099 13:49:01.546188 R8152: Done initializing
2100 13:49:01.546268
2101 13:49:01.549448 Adding net device
2102 13:49:01.850646
2103 13:49:01.853910 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2104 13:49:01.853999
2105 13:49:01.854063
2106 13:49:01.854124
2107 13:49:01.857576 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2109 13:49:01.957949 volteer: tftpboot 192.168.201.1 11299515/tftp-deploy-6wkde56s/kernel/bzImage 11299515/tftp-deploy-6wkde56s/kernel/cmdline 11299515/tftp-deploy-6wkde56s/ramdisk/ramdisk.cpio.gz
2110 13:49:01.958073 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2111 13:49:01.958217 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2112 13:49:01.962589 tftpboot 192.168.201.1 11299515/tftp-deploy-6wkde56s/kernel/bzImploy-6wkde56s/kernel/cmdline 11299515/tftp-deploy-6wkde56s/ramdisk/ramdisk.cpio.gz
2113 13:49:01.962673
2114 13:49:01.962736 Waiting for link
2115 13:49:02.165185
2116 13:49:02.165317 done.
2117 13:49:02.165419
2118 13:49:02.165525 MAC: 00:24:32:30:78:e4
2119 13:49:02.165656
2120 13:49:02.168827 Sending DHCP discover... done.
2121 13:49:02.168907
2122 13:49:02.171921 Waiting for reply... done.
2123 13:49:02.172000
2124 13:49:02.175114 Sending DHCP request... done.
2125 13:49:02.175219
2126 13:49:02.178493 Waiting for reply... done.
2127 13:49:02.178573
2128 13:49:02.182139 My ip is 192.168.201.13
2129 13:49:02.182218
2130 13:49:02.185059 The DHCP server ip is 192.168.201.1
2131 13:49:02.185139
2132 13:49:02.191916 TFTP server IP predefined by user: 192.168.201.1
2133 13:49:02.192010
2134 13:49:02.199020 Bootfile predefined by user: 11299515/tftp-deploy-6wkde56s/kernel/bzImage
2135 13:49:02.199101
2136 13:49:02.201901 Sending tftp read request... done.
2137 13:49:02.201981
2138 13:49:02.205084 Waiting for the transfer...
2139 13:49:02.205164
2140 13:49:02.792084 00000000 ################################################################
2141 13:49:02.792266
2142 13:49:03.387182 00080000 ################################################################
2143 13:49:03.387336
2144 13:49:03.999193 00100000 ################################################################
2145 13:49:03.999680
2146 13:49:04.720238 00180000 ################################################################
2147 13:49:04.720765
2148 13:49:05.419916 00200000 ################################################################
2149 13:49:05.420434
2150 13:49:06.106965 00280000 ################################################################
2151 13:49:06.107513
2152 13:49:06.816477 00300000 ################################################################
2153 13:49:06.817000
2154 13:49:07.507116 00380000 ################################################################
2155 13:49:07.507634
2156 13:49:08.211518 00400000 ################################################################
2157 13:49:08.212104
2158 13:49:08.928428 00480000 ################################################################
2159 13:49:08.929080
2160 13:49:09.611845 00500000 ################################################################
2161 13:49:09.612355
2162 13:49:10.308949 00580000 ################################################################
2163 13:49:10.309517
2164 13:49:11.020372 00600000 ################################################################
2165 13:49:11.020987
2166 13:49:11.695237 00680000 ################################################################
2167 13:49:11.695832
2168 13:49:12.426362 00700000 ################################################################
2169 13:49:12.426950
2170 13:49:13.150732 00780000 ################################################################
2171 13:49:13.151304
2172 13:49:13.304768 00800000 ############## done.
2173 13:49:13.305348
2174 13:49:13.308150 The bootfile was 8499088 bytes long.
2175 13:49:13.308730
2176 13:49:13.311269 Sending tftp read request... done.
2177 13:49:13.311740
2178 13:49:13.314536 Waiting for the transfer...
2179 13:49:13.314995
2180 13:49:13.987206 00000000 ################################################################
2181 13:49:13.987758
2182 13:49:14.641166 00080000 ################################################################
2183 13:49:14.641766
2184 13:49:15.312572 00100000 ################################################################
2185 13:49:15.313159
2186 13:49:15.982125 00180000 ################################################################
2187 13:49:15.982695
2188 13:49:16.609228 00200000 ################################################################
2189 13:49:16.609366
2190 13:49:17.197902 00280000 ################################################################
2191 13:49:17.198042
2192 13:49:17.780744 00300000 ################################################################
2193 13:49:17.780880
2194 13:49:18.370605 00380000 ################################################################
2195 13:49:18.370752
2196 13:49:18.984261 00400000 ################################################################
2197 13:49:18.984398
2198 13:49:19.578854 00480000 ################################################################
2199 13:49:19.579016
2200 13:49:20.143085 00500000 ################################################################
2201 13:49:20.143218
2202 13:49:20.719480 00580000 ################################################################
2203 13:49:20.719616
2204 13:49:21.297062 00600000 ################################################################
2205 13:49:21.297217
2206 13:49:21.903849 00680000 ################################################################
2207 13:49:21.904396
2208 13:49:22.513649 00700000 ################################################################
2209 13:49:22.513782
2210 13:49:23.174677 00780000 ################################################################
2211 13:49:23.175265
2212 13:49:23.832553 00800000 ################################################################
2213 13:49:23.833100
2214 13:49:24.441631 00880000 ################################################################
2215 13:49:24.441773
2216 13:49:24.999521 00900000 ################################################################
2217 13:49:24.999666
2218 13:49:25.563093 00980000 ################################################################
2219 13:49:25.563264
2220 13:49:26.119504 00a00000 ################################################################
2221 13:49:26.119643
2222 13:49:26.671838 00a80000 ################################################################
2223 13:49:26.672008
2224 13:49:27.219297 00b00000 ################################################################
2225 13:49:27.219443
2226 13:49:27.751828 00b80000 ################################################################
2227 13:49:27.751965
2228 13:49:28.296722 00c00000 ################################################################
2229 13:49:28.296859
2230 13:49:28.852840 00c80000 ################################################################
2231 13:49:28.852979
2232 13:49:29.408930 00d00000 ################################################################
2233 13:49:29.409069
2234 13:49:29.962973 00d80000 ################################################################
2235 13:49:29.963118
2236 13:49:30.510252 00e00000 ################################################################
2237 13:49:30.510386
2238 13:49:31.056398 00e80000 ################################################################
2239 13:49:31.056539
2240 13:49:31.596309 00f00000 ################################################################
2241 13:49:31.596456
2242 13:49:32.135051 00f80000 ################################################################
2243 13:49:32.135190
2244 13:49:32.664384 01000000 ################################################################
2245 13:49:32.664515
2246 13:49:33.209354 01080000 ################################################################
2247 13:49:33.209497
2248 13:49:33.753493 01100000 ################################################################
2249 13:49:33.753660
2250 13:49:34.310587 01180000 ################################################################
2251 13:49:34.310722
2252 13:49:34.843041 01200000 ################################################################
2253 13:49:34.843173
2254 13:49:35.381201 01280000 ################################################################
2255 13:49:35.381338
2256 13:49:35.915945 01300000 ################################################################
2257 13:49:35.916085
2258 13:49:36.434312 01380000 ################################################################
2259 13:49:36.434490
2260 13:49:36.959739 01400000 ################################################################
2261 13:49:36.959883
2262 13:49:37.513098 01480000 ################################################################
2263 13:49:37.513229
2264 13:49:38.068790 01500000 ################################################################
2265 13:49:38.068935
2266 13:49:38.627858 01580000 ################################################################
2267 13:49:38.628000
2268 13:49:39.178400 01600000 ################################################################
2269 13:49:39.178545
2270 13:49:39.721169 01680000 ################################################################
2271 13:49:39.721332
2272 13:49:40.268295 01700000 ################################################################
2273 13:49:40.268443
2274 13:49:40.825162 01780000 ################################################################
2275 13:49:40.825308
2276 13:49:41.380233 01800000 ################################################################
2277 13:49:41.380366
2278 13:49:41.938230 01880000 ################################################################
2279 13:49:41.938370
2280 13:49:42.491199 01900000 ################################################################
2281 13:49:42.491409
2282 13:49:43.049775 01980000 ################################################################
2283 13:49:43.049910
2284 13:49:43.586912 01a00000 ################################################################
2285 13:49:43.587044
2286 13:49:44.130218 01a80000 ################################################################
2287 13:49:44.130359
2288 13:49:44.686715 01b00000 ################################################################
2289 13:49:44.686888
2290 13:49:45.242989 01b80000 ################################################################
2291 13:49:45.243150
2292 13:49:45.795785 01c00000 ################################################################
2293 13:49:45.795953
2294 13:49:46.348364 01c80000 ################################################################
2295 13:49:46.348535
2296 13:49:46.901545 01d00000 ################################################################
2297 13:49:46.901747
2298 13:49:47.455672 01d80000 ################################################################
2299 13:49:47.455814
2300 13:49:48.001038 01e00000 ################################################################
2301 13:49:48.001177
2302 13:49:48.557789 01e80000 ################################################################
2303 13:49:48.557935
2304 13:49:49.115906 01f00000 ################################################################
2305 13:49:49.116053
2306 13:49:49.676213 01f80000 ################################################################
2307 13:49:49.676346
2308 13:49:50.234828 02000000 ################################################################
2309 13:49:50.234967
2310 13:49:50.792154 02080000 ################################################################
2311 13:49:50.792298
2312 13:49:51.350376 02100000 ################################################################
2313 13:49:51.350515
2314 13:49:51.902104 02180000 ################################################################
2315 13:49:51.902246
2316 13:49:52.359738 02200000 ###################################################### done.
2317 13:49:52.359878
2318 13:49:52.363362 Sending tftp read request... done.
2319 13:49:52.363447
2320 13:49:52.366212 Waiting for the transfer...
2321 13:49:52.366295
2322 13:49:52.369725 00000000 # done.
2323 13:49:52.369810
2324 13:49:52.376085 Command line loaded dynamically from TFTP file: 11299515/tftp-deploy-6wkde56s/kernel/cmdline
2325 13:49:52.376169
2326 13:49:52.392524 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2327 13:49:52.399635
2328 13:49:52.403188 Shutting down all USB controllers.
2329 13:49:52.403269
2330 13:49:52.403333 Removing current net device
2331 13:49:52.403393
2332 13:49:52.406490 Finalizing coreboot
2333 13:49:52.406573
2334 13:49:52.413496 Exiting depthcharge with code 4 at timestamp: 60619902
2335 13:49:52.413641
2336 13:49:52.413707
2337 13:49:52.413769 Starting kernel ...
2338 13:49:52.413827
2339 13:49:52.413884
2340 13:49:52.414274 end: 2.2.4 bootloader-commands (duration 00:00:52) [common]
2341 13:49:52.414370 start: 2.2.5 auto-login-action (timeout 00:03:53) [common]
2342 13:49:52.414446 Setting prompt string to ['Linux version [0-9]']
2343 13:49:52.414514 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2344 13:49:52.414580 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2346 13:53:45.415320 end: 2.2.5 auto-login-action (duration 00:03:53) [common]
2348 13:53:45.416416 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 233 seconds'
2350 13:53:45.417361 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2353 13:53:45.418794 end: 2 depthcharge-action (duration 00:05:00) [common]
2355 13:53:45.419931 Cleaning after the job
2356 13:53:45.420081 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299515/tftp-deploy-6wkde56s/ramdisk
2357 13:53:45.425256 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299515/tftp-deploy-6wkde56s/kernel
2358 13:53:45.426456 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299515/tftp-deploy-6wkde56s/modules
2359 13:53:45.426988 start: 4.1 power-off (timeout 00:00:30) [common]
2360 13:53:45.427144 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=off'
2361 13:53:45.507559 >> Command sent successfully.
2362 13:53:45.519706 Returned 0 in 0 seconds
2363 13:53:45.621089 end: 4.1 power-off (duration 00:00:00) [common]
2365 13:53:45.623029 start: 4.2 read-feedback (timeout 00:10:00) [common]
2366 13:53:45.624349 Listened to connection for namespace 'common' for up to 1s
2367 13:53:46.625113 Finalising connection for namespace 'common'
2368 13:53:46.625837 Disconnecting from shell: Finalise
2369 13:53:46.626251
2370 13:53:46.727511 end: 4.2 read-feedback (duration 00:00:01) [common]
2371 13:53:46.728098 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11299515
2372 13:53:46.819768 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11299515
2373 13:53:46.819973 JobError: Your job cannot terminate cleanly.