Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 13:48:35.965827 lava-dispatcher, installed at version: 2023.06
2 13:48:35.966064 start: 0 validate
3 13:48:35.966198 Start time: 2023-08-16 13:48:35.966189+00:00 (UTC)
4 13:48:35.966348 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:48:35.966498 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 13:48:36.230386 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:48:36.231184 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2312-g74888f4b13f0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:48:36.487510 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:48:36.488285 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:48:45.454364 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:48:45.455073 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2312-g74888f4b13f0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 13:48:46.461439 validate duration: 10.50
14 13:48:46.461714 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:48:46.461812 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:48:46.461902 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:48:46.462025 Not decompressing ramdisk as can be used compressed.
18 13:48:46.462113 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
19 13:48:46.462178 saving as /var/lib/lava/dispatcher/tmp/11299526/tftp-deploy-jg2o9r_s/ramdisk/initrd.cpio.gz
20 13:48:46.462244 total size: 5671549 (5 MB)
21 13:48:46.463337 progress 0 % (0 MB)
22 13:48:46.465179 progress 5 % (0 MB)
23 13:48:46.466897 progress 10 % (0 MB)
24 13:48:46.468349 progress 15 % (0 MB)
25 13:48:46.469926 progress 20 % (1 MB)
26 13:48:46.471507 progress 25 % (1 MB)
27 13:48:46.472944 progress 30 % (1 MB)
28 13:48:46.474478 progress 35 % (1 MB)
29 13:48:46.476063 progress 40 % (2 MB)
30 13:48:46.477445 progress 45 % (2 MB)
31 13:48:46.479023 progress 50 % (2 MB)
32 13:48:46.480617 progress 55 % (3 MB)
33 13:48:46.481990 progress 60 % (3 MB)
34 13:48:46.483517 progress 65 % (3 MB)
35 13:48:46.485128 progress 70 % (3 MB)
36 13:48:46.486496 progress 75 % (4 MB)
37 13:48:46.488128 progress 80 % (4 MB)
38 13:48:46.489657 progress 85 % (4 MB)
39 13:48:46.491036 progress 90 % (4 MB)
40 13:48:46.492623 progress 95 % (5 MB)
41 13:48:46.494255 progress 100 % (5 MB)
42 13:48:46.494364 5 MB downloaded in 0.03 s (168.38 MB/s)
43 13:48:46.494520 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:48:46.494755 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:48:46.494841 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:48:46.494925 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:48:46.495046 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2312-g74888f4b13f0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 13:48:46.495165 saving as /var/lib/lava/dispatcher/tmp/11299526/tftp-deploy-jg2o9r_s/kernel/bzImage
50 13:48:46.495269 total size: 8499088 (8 MB)
51 13:48:46.495331 No compression specified
52 13:48:46.496463 progress 0 % (0 MB)
53 13:48:46.498585 progress 5 % (0 MB)
54 13:48:46.500868 progress 10 % (0 MB)
55 13:48:46.503115 progress 15 % (1 MB)
56 13:48:46.505437 progress 20 % (1 MB)
57 13:48:46.507739 progress 25 % (2 MB)
58 13:48:46.510009 progress 30 % (2 MB)
59 13:48:46.512314 progress 35 % (2 MB)
60 13:48:46.514541 progress 40 % (3 MB)
61 13:48:46.516807 progress 45 % (3 MB)
62 13:48:46.519098 progress 50 % (4 MB)
63 13:48:46.521344 progress 55 % (4 MB)
64 13:48:46.523519 progress 60 % (4 MB)
65 13:48:46.525742 progress 65 % (5 MB)
66 13:48:46.528053 progress 70 % (5 MB)
67 13:48:46.530292 progress 75 % (6 MB)
68 13:48:46.532542 progress 80 % (6 MB)
69 13:48:46.534755 progress 85 % (6 MB)
70 13:48:46.536962 progress 90 % (7 MB)
71 13:48:46.539204 progress 95 % (7 MB)
72 13:48:46.541492 progress 100 % (8 MB)
73 13:48:46.541645 8 MB downloaded in 0.05 s (174.79 MB/s)
74 13:48:46.541794 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:48:46.542048 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:48:46.542149 start: 1.3 download-retry (timeout 00:10:00) [common]
78 13:48:46.542239 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 13:48:46.542362 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
80 13:48:46.542432 saving as /var/lib/lava/dispatcher/tmp/11299526/tftp-deploy-jg2o9r_s/nfsrootfs/full.rootfs.tar
81 13:48:46.542492 total size: 126031368 (120 MB)
82 13:48:46.542554 Using unxz to decompress xz
83 13:48:46.546842 progress 0 % (0 MB)
84 13:48:47.032221 progress 5 % (6 MB)
85 13:48:47.519911 progress 10 % (12 MB)
86 13:48:48.015990 progress 15 % (18 MB)
87 13:48:48.528820 progress 20 % (24 MB)
88 13:48:48.865729 progress 25 % (30 MB)
89 13:48:49.200252 progress 30 % (36 MB)
90 13:48:49.464704 progress 35 % (42 MB)
91 13:48:49.648449 progress 40 % (48 MB)
92 13:48:50.020215 progress 45 % (54 MB)
93 13:48:50.385775 progress 50 % (60 MB)
94 13:48:50.717458 progress 55 % (66 MB)
95 13:48:51.068489 progress 60 % (72 MB)
96 13:48:51.400091 progress 65 % (78 MB)
97 13:48:51.779005 progress 70 % (84 MB)
98 13:48:52.189040 progress 75 % (90 MB)
99 13:48:52.612109 progress 80 % (96 MB)
100 13:48:52.710259 progress 85 % (102 MB)
101 13:48:52.872555 progress 90 % (108 MB)
102 13:48:53.211015 progress 95 % (114 MB)
103 13:48:53.588402 progress 100 % (120 MB)
104 13:48:53.593411 120 MB downloaded in 7.05 s (17.05 MB/s)
105 13:48:53.593686 end: 1.3.1 http-download (duration 00:00:07) [common]
107 13:48:53.593955 end: 1.3 download-retry (duration 00:00:07) [common]
108 13:48:53.594048 start: 1.4 download-retry (timeout 00:09:53) [common]
109 13:48:53.594142 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 13:48:53.594305 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2312-g74888f4b13f0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 13:48:53.594379 saving as /var/lib/lava/dispatcher/tmp/11299526/tftp-deploy-jg2o9r_s/modules/modules.tar
112 13:48:53.594443 total size: 253616 (0 MB)
113 13:48:53.594509 Using unxz to decompress xz
114 13:48:53.598776 progress 12 % (0 MB)
115 13:48:53.599186 progress 25 % (0 MB)
116 13:48:53.599429 progress 38 % (0 MB)
117 13:48:53.601039 progress 51 % (0 MB)
118 13:48:53.602908 progress 64 % (0 MB)
119 13:48:53.604746 progress 77 % (0 MB)
120 13:48:53.606592 progress 90 % (0 MB)
121 13:48:53.608357 progress 100 % (0 MB)
122 13:48:53.614010 0 MB downloaded in 0.02 s (12.36 MB/s)
123 13:48:53.614245 end: 1.4.1 http-download (duration 00:00:00) [common]
125 13:48:53.614512 end: 1.4 download-retry (duration 00:00:00) [common]
126 13:48:53.614607 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 13:48:53.614704 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 13:48:56.565483 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11299526/extract-nfsrootfs-n3yohqxt
129 13:48:56.565672 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 13:48:56.565773 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 13:48:56.565953 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws
132 13:48:56.566092 makedir: /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin
133 13:48:56.566196 makedir: /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/tests
134 13:48:56.566296 makedir: /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/results
135 13:48:56.566398 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-add-keys
136 13:48:56.566544 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-add-sources
137 13:48:56.566674 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-background-process-start
138 13:48:56.566802 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-background-process-stop
139 13:48:56.566929 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-common-functions
140 13:48:56.567056 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-echo-ipv4
141 13:48:56.567183 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-install-packages
142 13:48:56.567310 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-installed-packages
143 13:48:56.567436 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-os-build
144 13:48:56.567563 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-probe-channel
145 13:48:56.567909 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-probe-ip
146 13:48:56.568041 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-target-ip
147 13:48:56.568169 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-target-mac
148 13:48:56.568306 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-target-storage
149 13:48:56.568437 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-test-case
150 13:48:56.568567 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-test-event
151 13:48:56.568695 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-test-feedback
152 13:48:56.568822 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-test-raise
153 13:48:56.568949 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-test-reference
154 13:48:56.569075 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-test-runner
155 13:48:56.569200 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-test-set
156 13:48:56.569327 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-test-shell
157 13:48:56.569454 Updating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-install-packages (oe)
158 13:48:56.569608 Updating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/bin/lava-installed-packages (oe)
159 13:48:56.569732 Creating /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/environment
160 13:48:56.569830 LAVA metadata
161 13:48:56.569901 - LAVA_JOB_ID=11299526
162 13:48:56.569964 - LAVA_DISPATCHER_IP=192.168.201.1
163 13:48:56.570064 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 13:48:56.570133 skipped lava-vland-overlay
165 13:48:56.570209 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 13:48:56.570290 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 13:48:56.570352 skipped lava-multinode-overlay
168 13:48:56.570425 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 13:48:56.570502 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 13:48:56.570576 Loading test definitions
171 13:48:56.570666 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
172 13:48:56.570736 Using /lava-11299526 at stage 0
173 13:48:56.570846 Fetching tests from https://github.com/kernelci/test-definitions
174 13:48:56.570932 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/0/tests/0_ltp-ipc'
175 13:49:08.280008 Running '/usr/bin/git checkout kernelci.org
176 13:49:08.426438 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
177 13:49:08.427255 uuid=11299526_1.5.2.3.1 testdef=None
178 13:49:08.427417 end: 1.5.2.3.1 git-repo-action (duration 00:00:12) [common]
180 13:49:08.427682 start: 1.5.2.3.2 test-overlay (timeout 00:09:38) [common]
181 13:49:08.428509 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 13:49:08.428744 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:38) [common]
184 13:49:08.429817 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 13:49:08.430063 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:38) [common]
187 13:49:08.431117 runner path: /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/0/tests/0_ltp-ipc test_uuid 11299526_1.5.2.3.1
188 13:49:08.431206 SKIPFILE='skipfile-lkft.yaml'
189 13:49:08.431271 SKIP_INSTALL='true'
190 13:49:08.431331 TST_CMDFILES='ipc'
191 13:49:08.431474 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 13:49:08.431704 Creating lava-test-runner.conf files
194 13:49:08.431770 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11299526/lava-overlay-2fj0dvws/lava-11299526/0 for stage 0
195 13:49:08.431865 - 0_ltp-ipc
196 13:49:08.431968 end: 1.5.2.3 test-definition (duration 00:00:12) [common]
197 13:49:08.432055 start: 1.5.2.4 compress-overlay (timeout 00:09:38) [common]
198 13:49:15.861703 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
199 13:49:15.861858 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:31) [common]
200 13:49:15.861948 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
201 13:49:15.862050 end: 1.5.2 lava-overlay (duration 00:00:19) [common]
202 13:49:15.862142 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:31) [common]
203 13:49:16.004280 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
204 13:49:16.004684 start: 1.5.4 extract-modules (timeout 00:09:30) [common]
205 13:49:16.004811 extracting modules file /var/lib/lava/dispatcher/tmp/11299526/tftp-deploy-jg2o9r_s/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299526/extract-nfsrootfs-n3yohqxt
206 13:49:16.018511 extracting modules file /var/lib/lava/dispatcher/tmp/11299526/tftp-deploy-jg2o9r_s/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11299526/extract-overlay-ramdisk-57j1b8hh/ramdisk
207 13:49:16.031921 end: 1.5.4 extract-modules (duration 00:00:00) [common]
208 13:49:16.032040 start: 1.5.5 apply-overlay-tftp (timeout 00:09:30) [common]
209 13:49:16.032130 [common] Applying overlay to NFS
210 13:49:16.032199 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11299526/compress-overlay-tombbzmr/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11299526/extract-nfsrootfs-n3yohqxt
211 13:49:16.944692 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
212 13:49:16.944866 start: 1.5.6 configure-preseed-file (timeout 00:09:30) [common]
213 13:49:16.944959 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
214 13:49:16.945047 start: 1.5.7 compress-ramdisk (timeout 00:09:30) [common]
215 13:49:16.945127 Building ramdisk /var/lib/lava/dispatcher/tmp/11299526/extract-overlay-ramdisk-57j1b8hh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11299526/extract-overlay-ramdisk-57j1b8hh/ramdisk
216 13:49:17.041227 >> 27215 blocks
217 13:49:17.632867 rename /var/lib/lava/dispatcher/tmp/11299526/extract-overlay-ramdisk-57j1b8hh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11299526/tftp-deploy-jg2o9r_s/ramdisk/ramdisk.cpio.gz
218 13:49:17.633324 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
219 13:49:17.633456 start: 1.5.8 prepare-kernel (timeout 00:09:29) [common]
220 13:49:17.633554 start: 1.5.8.1 prepare-fit (timeout 00:09:29) [common]
221 13:49:17.633652 No mkimage arch provided, not using FIT.
222 13:49:17.633744 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
223 13:49:17.633829 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
224 13:49:17.633928 end: 1.5 prepare-tftp-overlay (duration 00:00:24) [common]
225 13:49:17.634023 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:29) [common]
226 13:49:17.634103 No LXC device requested
227 13:49:17.634179 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
228 13:49:17.634260 start: 1.7 deploy-device-env (timeout 00:09:29) [common]
229 13:49:17.634336 end: 1.7 deploy-device-env (duration 00:00:00) [common]
230 13:49:17.634406 Checking files for TFTP limit of 4294967296 bytes.
231 13:49:17.634802 end: 1 tftp-deploy (duration 00:00:31) [common]
232 13:49:17.634904 start: 2 depthcharge-action (timeout 00:05:00) [common]
233 13:49:17.634995 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
234 13:49:17.635120 substitutions:
235 13:49:17.635190 - {DTB}: None
236 13:49:17.635251 - {INITRD}: 11299526/tftp-deploy-jg2o9r_s/ramdisk/ramdisk.cpio.gz
237 13:49:17.635310 - {KERNEL}: 11299526/tftp-deploy-jg2o9r_s/kernel/bzImage
238 13:49:17.635367 - {LAVA_MAC}: None
239 13:49:17.635439 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11299526/extract-nfsrootfs-n3yohqxt
240 13:49:17.635509 - {NFS_SERVER_IP}: 192.168.201.1
241 13:49:17.635565 - {PRESEED_CONFIG}: None
242 13:49:17.635618 - {PRESEED_LOCAL}: None
243 13:49:17.635705 - {RAMDISK}: 11299526/tftp-deploy-jg2o9r_s/ramdisk/ramdisk.cpio.gz
244 13:49:17.635759 - {ROOT_PART}: None
245 13:49:17.635813 - {ROOT}: None
246 13:49:17.635866 - {SERVER_IP}: 192.168.201.1
247 13:49:17.635918 - {TEE}: None
248 13:49:17.635971 Parsed boot commands:
249 13:49:17.636025 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
250 13:49:17.636202 Parsed boot commands: tftpboot 192.168.201.1 11299526/tftp-deploy-jg2o9r_s/kernel/bzImage 11299526/tftp-deploy-jg2o9r_s/kernel/cmdline 11299526/tftp-deploy-jg2o9r_s/ramdisk/ramdisk.cpio.gz
251 13:49:17.636292 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
252 13:49:17.636379 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
253 13:49:17.636470 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
254 13:49:17.636555 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
255 13:49:17.636629 Not connected, no need to disconnect.
256 13:49:17.636702 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
257 13:49:17.636787 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
258 13:49:17.636854 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
259 13:49:17.641066 Setting prompt string to ['lava-test: # ']
260 13:49:17.641496 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
261 13:49:17.641611 end: 2.2.1 reset-connection (duration 00:00:00) [common]
262 13:49:17.641728 start: 2.2.2 reset-device (timeout 00:05:00) [common]
263 13:49:17.641849 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
264 13:49:17.642105 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
265 13:49:22.785698 >> Command sent successfully.
266 13:49:22.796794 Returned 0 in 5 seconds
267 13:49:22.898094 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
269 13:49:22.899808 end: 2.2.2 reset-device (duration 00:00:05) [common]
270 13:49:22.900621 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
271 13:49:22.901160 Setting prompt string to 'Starting depthcharge on Helios...'
272 13:49:22.901578 Changing prompt to 'Starting depthcharge on Helios...'
273 13:49:22.902131 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
274 13:49:22.903119 [Enter `^Ec?' for help]
275 13:49:23.510767
276 13:49:23.511335
277 13:49:23.519975 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
278 13:49:23.523890 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
279 13:49:23.529680 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
280 13:49:23.533367 CPU: AES supported, TXT NOT supported, VT supported
281 13:49:23.540382 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
282 13:49:23.543439 PCH: device id 0284 (rev 00) is Cometlake-U Premium
283 13:49:23.550121 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
284 13:49:23.553844 VBOOT: Loading verstage.
285 13:49:23.556674 FMAP: Found "FLASH" version 1.1 at 0xc04000.
286 13:49:23.563387 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
287 13:49:23.566976 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
288 13:49:23.570788 CBFS @ c08000 size 3f8000
289 13:49:23.576952 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
290 13:49:23.580124 CBFS: Locating 'fallback/verstage'
291 13:49:23.583718 CBFS: Found @ offset 10fb80 size 1072c
292 13:49:23.584159
293 13:49:23.586788
294 13:49:23.597064 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
295 13:49:23.610771 Probing TPM: . done!
296 13:49:23.614014 TPM ready after 0 ms
297 13:49:23.617772 Connected to device vid:did:rid of 1ae0:0028:00
298 13:49:23.627994 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
299 13:49:23.631207 Initialized TPM device CR50 revision 0
300 13:49:23.678419 tlcl_send_startup: Startup return code is 0
301 13:49:23.679037 TPM: setup succeeded
302 13:49:23.691078 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
303 13:49:23.695373 Chrome EC: UHEPI supported
304 13:49:23.698263 Phase 1
305 13:49:23.701622 FMAP: area GBB found @ c05000 (12288 bytes)
306 13:49:23.708194 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
307 13:49:23.708685 Phase 2
308 13:49:23.711413 Phase 3
309 13:49:23.714630 FMAP: area GBB found @ c05000 (12288 bytes)
310 13:49:23.721341 VB2:vb2_report_dev_firmware() This is developer signed firmware
311 13:49:23.727838 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
312 13:49:23.731465 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
313 13:49:23.737800 VB2:vb2_verify_keyblock() Checking keyblock signature...
314 13:49:23.753686 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
315 13:49:23.757201 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
316 13:49:23.763584 VB2:vb2_verify_fw_preamble() Verifying preamble.
317 13:49:23.767684 Phase 4
318 13:49:23.770859 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
319 13:49:23.777466 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
320 13:49:23.957182 VB2:vb2_rsa_verify_digest() Digest check failed!
321 13:49:23.963798 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
322 13:49:23.964411 Saving nvdata
323 13:49:23.967130 Reboot requested (10020007)
324 13:49:23.970488 board_reset() called!
325 13:49:23.970965 full_reset() called!
326 13:49:28.476972
327 13:49:28.477603
328 13:49:28.487028 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
329 13:49:28.490381 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
330 13:49:28.496725 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
331 13:49:28.500123 CPU: AES supported, TXT NOT supported, VT supported
332 13:49:28.506973 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
333 13:49:28.510090 PCH: device id 0284 (rev 00) is Cometlake-U Premium
334 13:49:28.516981 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
335 13:49:28.520187 VBOOT: Loading verstage.
336 13:49:28.523880 FMAP: Found "FLASH" version 1.1 at 0xc04000.
337 13:49:28.530270 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
338 13:49:28.536902 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
339 13:49:28.537469 CBFS @ c08000 size 3f8000
340 13:49:28.543105 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
341 13:49:28.546591 CBFS: Locating 'fallback/verstage'
342 13:49:28.550021 CBFS: Found @ offset 10fb80 size 1072c
343 13:49:28.554611
344 13:49:28.555195
345 13:49:28.563695 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
346 13:49:28.578025 Probing TPM: . done!
347 13:49:28.581800 TPM ready after 0 ms
348 13:49:28.584734 Connected to device vid:did:rid of 1ae0:0028:00
349 13:49:28.595047 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
350 13:49:28.598907 Initialized TPM device CR50 revision 0
351 13:49:28.645795 tlcl_send_startup: Startup return code is 0
352 13:49:28.646376 TPM: setup succeeded
353 13:49:28.658688 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
354 13:49:28.661846 Chrome EC: UHEPI supported
355 13:49:28.665500 Phase 1
356 13:49:28.669111 FMAP: area GBB found @ c05000 (12288 bytes)
357 13:49:28.675489 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
358 13:49:28.682016 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
359 13:49:28.685565 Recovery requested (1009000e)
360 13:49:28.686049 Saving nvdata
361 13:49:28.697064 tlcl_extend: response is 0
362 13:49:28.706143 tlcl_extend: response is 0
363 13:49:28.713147 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
364 13:49:28.716414 CBFS @ c08000 size 3f8000
365 13:49:28.723469 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
366 13:49:28.726672 CBFS: Locating 'fallback/romstage'
367 13:49:28.729679 CBFS: Found @ offset 80 size 145fc
368 13:49:28.732849 Accumulated console time in verstage 99 ms
369 13:49:28.733448
370 13:49:28.733903
371 13:49:28.745850 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
372 13:49:28.752244 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
373 13:49:28.756155 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
374 13:49:28.759062 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
375 13:49:28.766045 gpe0_sts[1]: 00300000 gpe0_en[1]: 00000000
376 13:49:28.769265 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
377 13:49:28.772575 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
378 13:49:28.775948 TCO_STS: 0000 0000
379 13:49:28.779128 GEN_PMCON: e0015238 00000200
380 13:49:28.782608 GBLRST_CAUSE: 00000000 00000000
381 13:49:28.783188 prev_sleep_state 5
382 13:49:28.786214 Boot Count incremented to 68021
383 13:49:28.792501 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 13:49:28.796016 CBFS @ c08000 size 3f8000
385 13:49:28.803433 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
386 13:49:28.804063 CBFS: Locating 'fspm.bin'
387 13:49:28.806102 CBFS: Found @ offset 5ffc0 size 71000
388 13:49:28.810747 Chrome EC: UHEPI supported
389 13:49:28.817905 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
390 13:49:28.822853 Probing TPM: done!
391 13:49:28.829648 Connected to device vid:did:rid of 1ae0:0028:00
392 13:49:28.839353 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
393 13:49:28.845362 Initialized TPM device CR50 revision 0
394 13:49:28.854163 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
395 13:49:28.861214 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
396 13:49:28.864305 MRC cache found, size 1948
397 13:49:28.867387 bootmode is set to: 2
398 13:49:28.870776 PRMRR disabled by config.
399 13:49:28.874161 SPD INDEX = 1
400 13:49:28.877437 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
401 13:49:28.880365 CBFS @ c08000 size 3f8000
402 13:49:28.887362 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
403 13:49:28.887986 CBFS: Locating 'spd.bin'
404 13:49:28.890812 CBFS: Found @ offset 5fb80 size 400
405 13:49:28.894077 SPD: module type is LPDDR3
406 13:49:28.897506 SPD: module part is
407 13:49:28.904289 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
408 13:49:28.907726 SPD: device width 4 bits, bus width 8 bits
409 13:49:28.910798 SPD: module size is 4096 MB (per channel)
410 13:49:28.913977 memory slot: 0 configuration done.
411 13:49:28.917457 memory slot: 2 configuration done.
412 13:49:28.968619 CBMEM:
413 13:49:28.971792 IMD: root @ 99fff000 254 entries.
414 13:49:28.974691 IMD: root @ 99ffec00 62 entries.
415 13:49:28.978051 External stage cache:
416 13:49:28.981415 IMD: root @ 9abff000 254 entries.
417 13:49:28.984805 IMD: root @ 9abfec00 62 entries.
418 13:49:28.991446 Chrome EC: clear events_b mask to 0x0000000020004000
419 13:49:29.004843 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
420 13:49:29.017846 tlcl_write: response is 0
421 13:49:29.026847 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
422 13:49:29.033881 MRC: TPM MRC hash updated successfully.
423 13:49:29.034454 2 DIMMs found
424 13:49:29.036775 SMM Memory Map
425 13:49:29.039960 SMRAM : 0x9a000000 0x1000000
426 13:49:29.043675 Subregion 0: 0x9a000000 0xa00000
427 13:49:29.046756 Subregion 1: 0x9aa00000 0x200000
428 13:49:29.050167 Subregion 2: 0x9ac00000 0x400000
429 13:49:29.053517 top_of_ram = 0x9a000000
430 13:49:29.056998 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
431 13:49:29.063597 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
432 13:49:29.066850 MTRR Range: Start=ff000000 End=0 (Size 1000000)
433 13:49:29.073531 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
434 13:49:29.077099 CBFS @ c08000 size 3f8000
435 13:49:29.080274 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
436 13:49:29.083484 CBFS: Locating 'fallback/postcar'
437 13:49:29.090373 CBFS: Found @ offset 107000 size 4b44
438 13:49:29.093085 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
439 13:49:29.105495 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
440 13:49:29.109121 Processing 180 relocs. Offset value of 0x97c0c000
441 13:49:29.117288 Accumulated console time in romstage 286 ms
442 13:49:29.117879
443 13:49:29.118265
444 13:49:29.127870 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
445 13:49:29.133614 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
446 13:49:29.137176 CBFS @ c08000 size 3f8000
447 13:49:29.144023 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
448 13:49:29.147078 CBFS: Locating 'fallback/ramstage'
449 13:49:29.150786 CBFS: Found @ offset 43380 size 1b9e8
450 13:49:29.156996 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
451 13:49:29.189400 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
452 13:49:29.192637 Processing 3976 relocs. Offset value of 0x98db0000
453 13:49:29.199393 Accumulated console time in postcar 52 ms
454 13:49:29.200022
455 13:49:29.200466
456 13:49:29.209397 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
457 13:49:29.216730 FMAP: area RO_VPD found @ c00000 (16384 bytes)
458 13:49:29.219115 WARNING: RO_VPD is uninitialized or empty.
459 13:49:29.222835 FMAP: area RW_VPD found @ af8000 (8192 bytes)
460 13:49:29.229470 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 13:49:29.230049 Normal boot.
462 13:49:29.235866 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
463 13:49:29.239173 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
464 13:49:29.242628 CBFS @ c08000 size 3f8000
465 13:49:29.249132 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
466 13:49:29.252672 CBFS: Locating 'cpu_microcode_blob.bin'
467 13:49:29.256329 CBFS: Found @ offset 14700 size 2ec00
468 13:49:29.259456 microcode: sig=0x806ec pf=0x4 revision=0xc9
469 13:49:29.262632 Skip microcode update
470 13:49:29.266157 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 13:49:29.269363 CBFS @ c08000 size 3f8000
472 13:49:29.276499 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 13:49:29.279494 CBFS: Locating 'fsps.bin'
474 13:49:29.282400 CBFS: Found @ offset d1fc0 size 35000
475 13:49:29.307933 Detected 4 core, 8 thread CPU.
476 13:49:29.311136 Setting up SMI for CPU
477 13:49:29.314234 IED base = 0x9ac00000
478 13:49:29.314808 IED size = 0x00400000
479 13:49:29.317356 Will perform SMM setup.
480 13:49:29.324144 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
481 13:49:29.330836 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
482 13:49:29.333943 Processing 16 relocs. Offset value of 0x00030000
483 13:49:29.337459 Attempting to start 7 APs
484 13:49:29.341041 Waiting for 10ms after sending INIT.
485 13:49:29.357385 Waiting for 1st SIPI to complete...done.
486 13:49:29.357969 AP: slot 1 apic_id 1.
487 13:49:29.363965 Waiting for 2nd SIPI to complete...done.
488 13:49:29.364550 AP: slot 3 apic_id 6.
489 13:49:29.367304 AP: slot 6 apic_id 4.
490 13:49:29.370903 AP: slot 7 apic_id 5.
491 13:49:29.371484 AP: slot 2 apic_id 7.
492 13:49:29.374541 AP: slot 5 apic_id 2.
493 13:49:29.377551 AP: slot 4 apic_id 3.
494 13:49:29.384186 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
495 13:49:29.387173 Processing 13 relocs. Offset value of 0x00038000
496 13:49:29.393636 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
497 13:49:29.400594 Installing SMM handler to 0x9a000000
498 13:49:29.406915 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
499 13:49:29.410291 Processing 658 relocs. Offset value of 0x9a010000
500 13:49:29.420243 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
501 13:49:29.423470 Processing 13 relocs. Offset value of 0x9a008000
502 13:49:29.430461 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
503 13:49:29.436908 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
504 13:49:29.440255 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
505 13:49:29.446591 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
506 13:49:29.453551 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
507 13:49:29.460194 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
508 13:49:29.463152 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
509 13:49:29.470931 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
510 13:49:29.473312 Clearing SMI status registers
511 13:49:29.476882 SMI_STS: PM1
512 13:49:29.477626 PM1_STS: PWRBTN
513 13:49:29.480294 TCO_STS: SECOND_TO
514 13:49:29.483723 New SMBASE 0x9a000000
515 13:49:29.487283 In relocation handler: CPU 0
516 13:49:29.490527 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
517 13:49:29.493563 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 13:49:29.496598 Relocation complete.
519 13:49:29.500549 New SMBASE 0x99fffc00
520 13:49:29.501136 In relocation handler: CPU 1
521 13:49:29.507056 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
522 13:49:29.510070 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 13:49:29.513283 Relocation complete.
524 13:49:29.513868 New SMBASE 0x99ffec00
525 13:49:29.516543 In relocation handler: CPU 5
526 13:49:29.523986 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
527 13:49:29.526643 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 13:49:29.529770 Relocation complete.
529 13:49:29.530351 New SMBASE 0x99fff000
530 13:49:29.532995 In relocation handler: CPU 4
531 13:49:29.539863 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
532 13:49:29.542811 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 13:49:29.546683 Relocation complete.
534 13:49:29.547269 New SMBASE 0x99fff400
535 13:49:29.549750 In relocation handler: CPU 3
536 13:49:29.553251 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
537 13:49:29.559733 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 13:49:29.563212 Relocation complete.
539 13:49:29.563836 New SMBASE 0x99fff800
540 13:49:29.566562 In relocation handler: CPU 2
541 13:49:29.569634 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
542 13:49:29.576392 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 13:49:29.576965 Relocation complete.
544 13:49:29.580117 New SMBASE 0x99ffe400
545 13:49:29.582883 In relocation handler: CPU 7
546 13:49:29.586097 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
547 13:49:29.593251 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 13:49:29.593839 Relocation complete.
549 13:49:29.596779 New SMBASE 0x99ffe800
550 13:49:29.600025 In relocation handler: CPU 6
551 13:49:29.603377 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
552 13:49:29.609749 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 13:49:29.610339 Relocation complete.
554 13:49:29.614037 Initializing CPU #0
555 13:49:29.616340 CPU: vendor Intel device 806ec
556 13:49:29.619589 CPU: family 06, model 8e, stepping 0c
557 13:49:29.623212 Clearing out pending MCEs
558 13:49:29.626006 Setting up local APIC...
559 13:49:29.626485 apic_id: 0x00 done.
560 13:49:29.629763 Turbo is available but hidden
561 13:49:29.632842 Turbo is available and visible
562 13:49:29.636517 VMX status: enabled
563 13:49:29.639478 IA32_FEATURE_CONTROL status: locked
564 13:49:29.643007 Skip microcode update
565 13:49:29.643681 CPU #0 initialized
566 13:49:29.646163 Initializing CPU #1
567 13:49:29.646642 Initializing CPU #6
568 13:49:29.649561 Initializing CPU #7
569 13:49:29.652983 CPU: vendor Intel device 806ec
570 13:49:29.656198 CPU: family 06, model 8e, stepping 0c
571 13:49:29.659792 CPU: vendor Intel device 806ec
572 13:49:29.662841 CPU: family 06, model 8e, stepping 0c
573 13:49:29.666630 Clearing out pending MCEs
574 13:49:29.669768 Clearing out pending MCEs
575 13:49:29.672970 Setting up local APIC...
576 13:49:29.673450 Initializing CPU #2
577 13:49:29.676021 Initializing CPU #3
578 13:49:29.679787 CPU: vendor Intel device 806ec
579 13:49:29.683001 CPU: family 06, model 8e, stepping 0c
580 13:49:29.685815 CPU: vendor Intel device 806ec
581 13:49:29.689204 CPU: family 06, model 8e, stepping 0c
582 13:49:29.692542 Clearing out pending MCEs
583 13:49:29.695730 Clearing out pending MCEs
584 13:49:29.696210 Setting up local APIC...
585 13:49:29.699299 Initializing CPU #4
586 13:49:29.702483 Initializing CPU #5
587 13:49:29.702964 CPU: vendor Intel device 806ec
588 13:49:29.709713 CPU: family 06, model 8e, stepping 0c
589 13:49:29.712466 CPU: vendor Intel device 806ec
590 13:49:29.715987 CPU: family 06, model 8e, stepping 0c
591 13:49:29.716467 Clearing out pending MCEs
592 13:49:29.719398 Clearing out pending MCEs
593 13:49:29.722859 Setting up local APIC...
594 13:49:29.726130 CPU: vendor Intel device 806ec
595 13:49:29.729079 CPU: family 06, model 8e, stepping 0c
596 13:49:29.732834 Clearing out pending MCEs
597 13:49:29.735795 Setting up local APIC...
598 13:49:29.736332 Setting up local APIC...
599 13:49:29.739214 apic_id: 0x02 done.
600 13:49:29.742539 Setting up local APIC...
601 13:49:29.743080 apic_id: 0x07 done.
602 13:49:29.745768 apic_id: 0x06 done.
603 13:49:29.749228 VMX status: enabled
604 13:49:29.749661 VMX status: enabled
605 13:49:29.752192 IA32_FEATURE_CONTROL status: locked
606 13:49:29.759237 IA32_FEATURE_CONTROL status: locked
607 13:49:29.759861 Skip microcode update
608 13:49:29.762527 Setting up local APIC...
609 13:49:29.765764 apic_id: 0x03 done.
610 13:49:29.766340 VMX status: enabled
611 13:49:29.768946 VMX status: enabled
612 13:49:29.772389 IA32_FEATURE_CONTROL status: locked
613 13:49:29.775974 IA32_FEATURE_CONTROL status: locked
614 13:49:29.779588 Skip microcode update
615 13:49:29.780210 Skip microcode update
616 13:49:29.782584 CPU #5 initialized
617 13:49:29.785756 CPU #4 initialized
618 13:49:29.786346 apic_id: 0x04 done.
619 13:49:29.789127 apic_id: 0x05 done.
620 13:49:29.789708 VMX status: enabled
621 13:49:29.792578 VMX status: enabled
622 13:49:29.795982 IA32_FEATURE_CONTROL status: locked
623 13:49:29.798956 IA32_FEATURE_CONTROL status: locked
624 13:49:29.802490 Skip microcode update
625 13:49:29.805310 Skip microcode update
626 13:49:29.805798 CPU #6 initialized
627 13:49:29.809124 CPU #7 initialized
628 13:49:29.809698 Skip microcode update
629 13:49:29.812376 CPU #2 initialized
630 13:49:29.815487 CPU #3 initialized
631 13:49:29.816090 apic_id: 0x01 done.
632 13:49:29.818810 VMX status: enabled
633 13:49:29.822495 IA32_FEATURE_CONTROL status: locked
634 13:49:29.825742 Skip microcode update
635 13:49:29.826318 CPU #1 initialized
636 13:49:29.831812 bsp_do_flight_plan done after 466 msecs.
637 13:49:29.832290 CPU: frequency set to 4200 MHz
638 13:49:29.835482 Enabling SMIs.
639 13:49:29.836110 Locking SMM.
640 13:49:29.851842 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
641 13:49:29.855118 CBFS @ c08000 size 3f8000
642 13:49:29.861605 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
643 13:49:29.862185 CBFS: Locating 'vbt.bin'
644 13:49:29.864761 CBFS: Found @ offset 5f5c0 size 499
645 13:49:29.871854 Found a VBT of 4608 bytes after decompression
646 13:49:30.056501 Display FSP Version Info HOB
647 13:49:30.060457 Reference Code - CPU = 9.0.1e.30
648 13:49:30.063076 uCode Version = 0.0.0.ca
649 13:49:30.066563 TXT ACM version = ff.ff.ff.ffff
650 13:49:30.069996 Display FSP Version Info HOB
651 13:49:30.072940 Reference Code - ME = 9.0.1e.30
652 13:49:30.076609 MEBx version = 0.0.0.0
653 13:49:30.079688 ME Firmware Version = Consumer SKU
654 13:49:30.082933 Display FSP Version Info HOB
655 13:49:30.086850 Reference Code - CML PCH = 9.0.1e.30
656 13:49:30.089700 PCH-CRID Status = Disabled
657 13:49:30.092964 PCH-CRID Original Value = ff.ff.ff.ffff
658 13:49:30.096279 PCH-CRID New Value = ff.ff.ff.ffff
659 13:49:30.099413 OPROM - RST - RAID = ff.ff.ff.ffff
660 13:49:30.102943 ChipsetInit Base Version = ff.ff.ff.ffff
661 13:49:30.106363 ChipsetInit Oem Version = ff.ff.ff.ffff
662 13:49:30.110105 Display FSP Version Info HOB
663 13:49:30.116462 Reference Code - SA - System Agent = 9.0.1e.30
664 13:49:30.117051 Reference Code - MRC = 0.7.1.6c
665 13:49:30.119595 SA - PCIe Version = 9.0.1e.30
666 13:49:30.123148 SA-CRID Status = Disabled
667 13:49:30.126292 SA-CRID Original Value = 0.0.0.c
668 13:49:30.129801 SA-CRID New Value = 0.0.0.c
669 13:49:30.133034 OPROM - VBIOS = ff.ff.ff.ffff
670 13:49:30.133619 RTC Init
671 13:49:30.139564 Set power on after power failure.
672 13:49:30.140280 Disabling Deep S3
673 13:49:30.143010 Disabling Deep S3
674 13:49:30.143589 Disabling Deep S4
675 13:49:30.146017 Disabling Deep S4
676 13:49:30.146539 Disabling Deep S5
677 13:49:30.149385 Disabling Deep S5
678 13:49:30.156422 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 195 exit 1
679 13:49:30.156923 Enumerating buses...
680 13:49:30.163096 Show all devs... Before device enumeration.
681 13:49:30.163756 Root Device: enabled 1
682 13:49:30.166222 CPU_CLUSTER: 0: enabled 1
683 13:49:30.170209 DOMAIN: 0000: enabled 1
684 13:49:30.170816 APIC: 00: enabled 1
685 13:49:30.173028 PCI: 00:00.0: enabled 1
686 13:49:30.176384 PCI: 00:02.0: enabled 1
687 13:49:30.180403 PCI: 00:04.0: enabled 0
688 13:49:30.181011 PCI: 00:05.0: enabled 0
689 13:49:30.183308 PCI: 00:12.0: enabled 1
690 13:49:30.186692 PCI: 00:12.5: enabled 0
691 13:49:30.190121 PCI: 00:12.6: enabled 0
692 13:49:30.190719 PCI: 00:14.0: enabled 1
693 13:49:30.193370 PCI: 00:14.1: enabled 0
694 13:49:30.196545 PCI: 00:14.3: enabled 1
695 13:49:30.197147 PCI: 00:14.5: enabled 0
696 13:49:30.199301 PCI: 00:15.0: enabled 1
697 13:49:30.203401 PCI: 00:15.1: enabled 1
698 13:49:30.206480 PCI: 00:15.2: enabled 0
699 13:49:30.207083 PCI: 00:15.3: enabled 0
700 13:49:30.209637 PCI: 00:16.0: enabled 1
701 13:49:30.212732 PCI: 00:16.1: enabled 0
702 13:49:30.216415 PCI: 00:16.2: enabled 0
703 13:49:30.217021 PCI: 00:16.3: enabled 0
704 13:49:30.219707 PCI: 00:16.4: enabled 0
705 13:49:30.222435 PCI: 00:16.5: enabled 0
706 13:49:30.226362 PCI: 00:17.0: enabled 1
707 13:49:30.226968 PCI: 00:19.0: enabled 1
708 13:49:30.229305 PCI: 00:19.1: enabled 0
709 13:49:30.232604 PCI: 00:19.2: enabled 0
710 13:49:30.236017 PCI: 00:1a.0: enabled 0
711 13:49:30.236618 PCI: 00:1c.0: enabled 0
712 13:49:30.239275 PCI: 00:1c.1: enabled 0
713 13:49:30.242771 PCI: 00:1c.2: enabled 0
714 13:49:30.243371 PCI: 00:1c.3: enabled 0
715 13:49:30.246087 PCI: 00:1c.4: enabled 0
716 13:49:30.249135 PCI: 00:1c.5: enabled 0
717 13:49:30.253897 PCI: 00:1c.6: enabled 0
718 13:49:30.254501 PCI: 00:1c.7: enabled 0
719 13:49:30.256300 PCI: 00:1d.0: enabled 1
720 13:49:30.259236 PCI: 00:1d.1: enabled 0
721 13:49:30.262624 PCI: 00:1d.2: enabled 0
722 13:49:30.263228 PCI: 00:1d.3: enabled 0
723 13:49:30.266195 PCI: 00:1d.4: enabled 0
724 13:49:30.269774 PCI: 00:1d.5: enabled 1
725 13:49:30.272504 PCI: 00:1e.0: enabled 1
726 13:49:30.273001 PCI: 00:1e.1: enabled 0
727 13:49:30.275855 PCI: 00:1e.2: enabled 1
728 13:49:30.279699 PCI: 00:1e.3: enabled 1
729 13:49:30.280357 PCI: 00:1f.0: enabled 1
730 13:49:30.282506 PCI: 00:1f.1: enabled 1
731 13:49:30.286251 PCI: 00:1f.2: enabled 1
732 13:49:30.289489 PCI: 00:1f.3: enabled 1
733 13:49:30.290096 PCI: 00:1f.4: enabled 1
734 13:49:30.292281 PCI: 00:1f.5: enabled 1
735 13:49:30.295984 PCI: 00:1f.6: enabled 0
736 13:49:30.299278 USB0 port 0: enabled 1
737 13:49:30.299928 I2C: 00:15: enabled 1
738 13:49:30.302296 I2C: 00:5d: enabled 1
739 13:49:30.305342 GENERIC: 0.0: enabled 1
740 13:49:30.305843 I2C: 00:1a: enabled 1
741 13:49:30.309298 I2C: 00:38: enabled 1
742 13:49:30.311880 I2C: 00:39: enabled 1
743 13:49:30.312379 I2C: 00:3a: enabled 1
744 13:49:30.315806 I2C: 00:3b: enabled 1
745 13:49:30.318915 PCI: 00:00.0: enabled 1
746 13:49:30.319520 SPI: 00: enabled 1
747 13:49:30.322387 SPI: 01: enabled 1
748 13:49:30.325641 PNP: 0c09.0: enabled 1
749 13:49:30.326243 USB2 port 0: enabled 1
750 13:49:30.328769 USB2 port 1: enabled 1
751 13:49:30.332079 USB2 port 2: enabled 0
752 13:49:30.332577 USB2 port 3: enabled 0
753 13:49:30.335512 USB2 port 5: enabled 0
754 13:49:30.338775 USB2 port 6: enabled 1
755 13:49:30.342903 USB2 port 9: enabled 1
756 13:49:30.343480 USB3 port 0: enabled 1
757 13:49:30.345604 USB3 port 1: enabled 1
758 13:49:30.348652 USB3 port 2: enabled 1
759 13:49:30.349129 USB3 port 3: enabled 1
760 13:49:30.351843 USB3 port 4: enabled 0
761 13:49:30.354990 APIC: 01: enabled 1
762 13:49:30.355468 APIC: 07: enabled 1
763 13:49:30.359042 APIC: 06: enabled 1
764 13:49:30.362177 APIC: 03: enabled 1
765 13:49:30.362778 APIC: 02: enabled 1
766 13:49:30.365335 APIC: 04: enabled 1
767 13:49:30.365935 APIC: 05: enabled 1
768 13:49:30.369322 Compare with tree...
769 13:49:30.371973 Root Device: enabled 1
770 13:49:30.375291 CPU_CLUSTER: 0: enabled 1
771 13:49:30.375927 APIC: 00: enabled 1
772 13:49:30.378916 APIC: 01: enabled 1
773 13:49:30.382683 APIC: 07: enabled 1
774 13:49:30.383288 APIC: 06: enabled 1
775 13:49:30.385565 APIC: 03: enabled 1
776 13:49:30.388668 APIC: 02: enabled 1
777 13:49:30.389358 APIC: 04: enabled 1
778 13:49:30.391615 APIC: 05: enabled 1
779 13:49:30.395342 DOMAIN: 0000: enabled 1
780 13:49:30.395999 PCI: 00:00.0: enabled 1
781 13:49:30.398502 PCI: 00:02.0: enabled 1
782 13:49:30.401836 PCI: 00:04.0: enabled 0
783 13:49:30.406407 PCI: 00:05.0: enabled 0
784 13:49:30.408855 PCI: 00:12.0: enabled 1
785 13:49:30.409458 PCI: 00:12.5: enabled 0
786 13:49:30.412370 PCI: 00:12.6: enabled 0
787 13:49:30.415222 PCI: 00:14.0: enabled 1
788 13:49:30.418695 USB0 port 0: enabled 1
789 13:49:30.421353 USB2 port 0: enabled 1
790 13:49:30.421851 USB2 port 1: enabled 1
791 13:49:30.424998 USB2 port 2: enabled 0
792 13:49:30.428333 USB2 port 3: enabled 0
793 13:49:30.431858 USB2 port 5: enabled 0
794 13:49:30.434699 USB2 port 6: enabled 1
795 13:49:30.438706 USB2 port 9: enabled 1
796 13:49:30.439389 USB3 port 0: enabled 1
797 13:49:30.441599 USB3 port 1: enabled 1
798 13:49:30.445628 USB3 port 2: enabled 1
799 13:49:30.448089 USB3 port 3: enabled 1
800 13:49:30.451153 USB3 port 4: enabled 0
801 13:49:30.451626 PCI: 00:14.1: enabled 0
802 13:49:30.454625 PCI: 00:14.3: enabled 1
803 13:49:30.457903 PCI: 00:14.5: enabled 0
804 13:49:30.461907 PCI: 00:15.0: enabled 1
805 13:49:30.464730 I2C: 00:15: enabled 1
806 13:49:30.465207 PCI: 00:15.1: enabled 1
807 13:49:30.468089 I2C: 00:5d: enabled 1
808 13:49:30.471428 GENERIC: 0.0: enabled 1
809 13:49:30.474842 PCI: 00:15.2: enabled 0
810 13:49:30.478045 PCI: 00:15.3: enabled 0
811 13:49:30.478630 PCI: 00:16.0: enabled 1
812 13:49:30.481348 PCI: 00:16.1: enabled 0
813 13:49:30.484652 PCI: 00:16.2: enabled 0
814 13:49:30.488240 PCI: 00:16.3: enabled 0
815 13:49:30.491492 PCI: 00:16.4: enabled 0
816 13:49:30.492141 PCI: 00:16.5: enabled 0
817 13:49:30.494760 PCI: 00:17.0: enabled 1
818 13:49:30.498134 PCI: 00:19.0: enabled 1
819 13:49:30.501756 I2C: 00:1a: enabled 1
820 13:49:30.502379 I2C: 00:38: enabled 1
821 13:49:30.504580 I2C: 00:39: enabled 1
822 13:49:30.507821 I2C: 00:3a: enabled 1
823 13:49:30.511675 I2C: 00:3b: enabled 1
824 13:49:30.514678 PCI: 00:19.1: enabled 0
825 13:49:30.515259 PCI: 00:19.2: enabled 0
826 13:49:30.518021 PCI: 00:1a.0: enabled 0
827 13:49:30.521327 PCI: 00:1c.0: enabled 0
828 13:49:30.524744 PCI: 00:1c.1: enabled 0
829 13:49:30.525347 PCI: 00:1c.2: enabled 0
830 13:49:30.528116 PCI: 00:1c.3: enabled 0
831 13:49:30.531319 PCI: 00:1c.4: enabled 0
832 13:49:30.534330 PCI: 00:1c.5: enabled 0
833 13:49:30.538391 PCI: 00:1c.6: enabled 0
834 13:49:30.539124 PCI: 00:1c.7: enabled 0
835 13:49:30.540925 PCI: 00:1d.0: enabled 1
836 13:49:30.544436 PCI: 00:1d.1: enabled 0
837 13:49:30.548617 PCI: 00:1d.2: enabled 0
838 13:49:30.551456 PCI: 00:1d.3: enabled 0
839 13:49:30.552114 PCI: 00:1d.4: enabled 0
840 13:49:30.554245 PCI: 00:1d.5: enabled 1
841 13:49:30.557867 PCI: 00:00.0: enabled 1
842 13:49:30.560959 PCI: 00:1e.0: enabled 1
843 13:49:30.564615 PCI: 00:1e.1: enabled 0
844 13:49:30.565200 PCI: 00:1e.2: enabled 1
845 13:49:30.567390 SPI: 00: enabled 1
846 13:49:30.570844 PCI: 00:1e.3: enabled 1
847 13:49:30.571438 SPI: 01: enabled 1
848 13:49:30.574345 PCI: 00:1f.0: enabled 1
849 13:49:30.578020 PNP: 0c09.0: enabled 1
850 13:49:30.580899 PCI: 00:1f.1: enabled 1
851 13:49:30.584624 PCI: 00:1f.2: enabled 1
852 13:49:30.585209 PCI: 00:1f.3: enabled 1
853 13:49:30.587969 PCI: 00:1f.4: enabled 1
854 13:49:30.590989 PCI: 00:1f.5: enabled 1
855 13:49:30.594299 PCI: 00:1f.6: enabled 0
856 13:49:30.597598 Root Device scanning...
857 13:49:30.600896 scan_static_bus for Root Device
858 13:49:30.601480 CPU_CLUSTER: 0 enabled
859 13:49:30.604978 DOMAIN: 0000 enabled
860 13:49:30.607729 DOMAIN: 0000 scanning...
861 13:49:30.611055 PCI: pci_scan_bus for bus 00
862 13:49:30.614323 PCI: 00:00.0 [8086/0000] ops
863 13:49:30.617613 PCI: 00:00.0 [8086/9b61] enabled
864 13:49:30.621006 PCI: 00:02.0 [8086/0000] bus ops
865 13:49:30.624057 PCI: 00:02.0 [8086/9b41] enabled
866 13:49:30.627885 PCI: 00:04.0 [8086/1903] disabled
867 13:49:30.631415 PCI: 00:08.0 [8086/1911] enabled
868 13:49:30.634575 PCI: 00:12.0 [8086/02f9] enabled
869 13:49:30.637561 PCI: 00:14.0 [8086/0000] bus ops
870 13:49:30.640578 PCI: 00:14.0 [8086/02ed] enabled
871 13:49:30.644356 PCI: 00:14.2 [8086/02ef] enabled
872 13:49:30.647445 PCI: 00:14.3 [8086/02f0] enabled
873 13:49:30.650677 PCI: 00:15.0 [8086/0000] bus ops
874 13:49:30.654431 PCI: 00:15.0 [8086/02e8] enabled
875 13:49:30.657384 PCI: 00:15.1 [8086/0000] bus ops
876 13:49:30.660830 PCI: 00:15.1 [8086/02e9] enabled
877 13:49:30.664148 PCI: 00:16.0 [8086/0000] ops
878 13:49:30.667600 PCI: 00:16.0 [8086/02e0] enabled
879 13:49:30.668133 PCI: 00:17.0 [8086/0000] ops
880 13:49:30.670663 PCI: 00:17.0 [8086/02d3] enabled
881 13:49:30.673999 PCI: 00:19.0 [8086/0000] bus ops
882 13:49:30.677511 PCI: 00:19.0 [8086/02c5] enabled
883 13:49:30.680503 PCI: 00:1d.0 [8086/0000] bus ops
884 13:49:30.684029 PCI: 00:1d.0 [8086/02b0] enabled
885 13:49:30.690970 PCI: Static device PCI: 00:1d.5 not found, disabling it.
886 13:49:30.694352 PCI: 00:1e.0 [8086/0000] ops
887 13:49:30.697247 PCI: 00:1e.0 [8086/02a8] enabled
888 13:49:30.701137 PCI: 00:1e.2 [8086/0000] bus ops
889 13:49:30.704339 PCI: 00:1e.2 [8086/02aa] enabled
890 13:49:30.707128 PCI: 00:1e.3 [8086/0000] bus ops
891 13:49:30.710469 PCI: 00:1e.3 [8086/02ab] enabled
892 13:49:30.713852 PCI: 00:1f.0 [8086/0000] bus ops
893 13:49:30.717407 PCI: 00:1f.0 [8086/0284] enabled
894 13:49:30.723685 PCI: Static device PCI: 00:1f.1 not found, disabling it.
895 13:49:30.727283 PCI: Static device PCI: 00:1f.2 not found, disabling it.
896 13:49:30.730594 PCI: 00:1f.3 [8086/0000] bus ops
897 13:49:30.733601 PCI: 00:1f.3 [8086/02c8] enabled
898 13:49:30.737340 PCI: 00:1f.4 [8086/0000] bus ops
899 13:49:30.740361 PCI: 00:1f.4 [8086/02a3] enabled
900 13:49:30.743865 PCI: 00:1f.5 [8086/0000] bus ops
901 13:49:30.747127 PCI: 00:1f.5 [8086/02a4] enabled
902 13:49:30.750440 PCI: Leftover static devices:
903 13:49:30.753619 PCI: 00:05.0
904 13:49:30.754117 PCI: 00:12.5
905 13:49:30.756513 PCI: 00:12.6
906 13:49:30.757011 PCI: 00:14.1
907 13:49:30.757509 PCI: 00:14.5
908 13:49:30.760243 PCI: 00:15.2
909 13:49:30.760691 PCI: 00:15.3
910 13:49:30.763483 PCI: 00:16.1
911 13:49:30.763973 PCI: 00:16.2
912 13:49:30.766863 PCI: 00:16.3
913 13:49:30.767422 PCI: 00:16.4
914 13:49:30.767924 PCI: 00:16.5
915 13:49:30.769982 PCI: 00:19.1
916 13:49:30.770542 PCI: 00:19.2
917 13:49:30.773969 PCI: 00:1a.0
918 13:49:30.774547 PCI: 00:1c.0
919 13:49:30.775010 PCI: 00:1c.1
920 13:49:30.776406 PCI: 00:1c.2
921 13:49:30.776853 PCI: 00:1c.3
922 13:49:30.779740 PCI: 00:1c.4
923 13:49:30.780190 PCI: 00:1c.5
924 13:49:30.780640 PCI: 00:1c.6
925 13:49:30.783108 PCI: 00:1c.7
926 13:49:30.783556 PCI: 00:1d.1
927 13:49:30.786747 PCI: 00:1d.2
928 13:49:30.787304 PCI: 00:1d.3
929 13:49:30.790076 PCI: 00:1d.4
930 13:49:30.790635 PCI: 00:1d.5
931 13:49:30.791098 PCI: 00:1e.1
932 13:49:30.793426 PCI: 00:1f.1
933 13:49:30.793928 PCI: 00:1f.2
934 13:49:30.796935 PCI: 00:1f.6
935 13:49:30.797495 PCI: Check your devicetree.cb.
936 13:49:30.799832 PCI: 00:02.0 scanning...
937 13:49:30.803603 scan_generic_bus for PCI: 00:02.0
938 13:49:30.810222 scan_generic_bus for PCI: 00:02.0 done
939 13:49:30.813327 scan_bus: scanning of bus PCI: 00:02.0 took 10186 usecs
940 13:49:30.816967 PCI: 00:14.0 scanning...
941 13:49:30.820477 scan_static_bus for PCI: 00:14.0
942 13:49:30.823783 USB0 port 0 enabled
943 13:49:30.824331 USB0 port 0 scanning...
944 13:49:30.826691 scan_static_bus for USB0 port 0
945 13:49:30.829889 USB2 port 0 enabled
946 13:49:30.833306 USB2 port 1 enabled
947 13:49:30.833861 USB2 port 2 disabled
948 13:49:30.837004 USB2 port 3 disabled
949 13:49:30.840554 USB2 port 5 disabled
950 13:49:30.841113 USB2 port 6 enabled
951 13:49:30.844227 USB2 port 9 enabled
952 13:49:30.844784 USB3 port 0 enabled
953 13:49:30.846210 USB3 port 1 enabled
954 13:49:30.849790 USB3 port 2 enabled
955 13:49:30.850587 USB3 port 3 enabled
956 13:49:30.853407 USB3 port 4 disabled
957 13:49:30.856856 USB2 port 0 scanning...
958 13:49:30.859801 scan_static_bus for USB2 port 0
959 13:49:30.863343 scan_static_bus for USB2 port 0 done
960 13:49:30.866412 scan_bus: scanning of bus USB2 port 0 took 9705 usecs
961 13:49:30.869758 USB2 port 1 scanning...
962 13:49:30.872942 scan_static_bus for USB2 port 1
963 13:49:30.876908 scan_static_bus for USB2 port 1 done
964 13:49:30.883034 scan_bus: scanning of bus USB2 port 1 took 9703 usecs
965 13:49:30.886217 USB2 port 6 scanning...
966 13:49:30.889342 scan_static_bus for USB2 port 6
967 13:49:30.892661 scan_static_bus for USB2 port 6 done
968 13:49:30.899753 scan_bus: scanning of bus USB2 port 6 took 9703 usecs
969 13:49:30.900333 USB2 port 9 scanning...
970 13:49:30.903041 scan_static_bus for USB2 port 9
971 13:49:30.906574 scan_static_bus for USB2 port 9 done
972 13:49:30.913039 scan_bus: scanning of bus USB2 port 9 took 9699 usecs
973 13:49:30.916097 USB3 port 0 scanning...
974 13:49:30.919530 scan_static_bus for USB3 port 0
975 13:49:30.923337 scan_static_bus for USB3 port 0 done
976 13:49:30.929463 scan_bus: scanning of bus USB3 port 0 took 9705 usecs
977 13:49:30.930028 USB3 port 1 scanning...
978 13:49:30.932598 scan_static_bus for USB3 port 1
979 13:49:30.936100 scan_static_bus for USB3 port 1 done
980 13:49:30.943076 scan_bus: scanning of bus USB3 port 1 took 9705 usecs
981 13:49:30.946305 USB3 port 2 scanning...
982 13:49:30.949675 scan_static_bus for USB3 port 2
983 13:49:30.952512 scan_static_bus for USB3 port 2 done
984 13:49:30.959382 scan_bus: scanning of bus USB3 port 2 took 9706 usecs
985 13:49:30.960018 USB3 port 3 scanning...
986 13:49:30.962609 scan_static_bus for USB3 port 3
987 13:49:30.969158 scan_static_bus for USB3 port 3 done
988 13:49:30.972346 scan_bus: scanning of bus USB3 port 3 took 9689 usecs
989 13:49:30.976133 scan_static_bus for USB0 port 0 done
990 13:49:30.982300 scan_bus: scanning of bus USB0 port 0 took 155342 usecs
991 13:49:30.986247 scan_static_bus for PCI: 00:14.0 done
992 13:49:30.992962 scan_bus: scanning of bus PCI: 00:14.0 took 172962 usecs
993 13:49:30.995842 PCI: 00:15.0 scanning...
994 13:49:30.999628 scan_generic_bus for PCI: 00:15.0
995 13:49:31.002272 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
996 13:49:31.005728 scan_generic_bus for PCI: 00:15.0 done
997 13:49:31.013072 scan_bus: scanning of bus PCI: 00:15.0 took 14310 usecs
998 13:49:31.015475 PCI: 00:15.1 scanning...
999 13:49:31.018817 scan_generic_bus for PCI: 00:15.1
1000 13:49:31.022765 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1001 13:49:31.025889 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1002 13:49:31.028885 scan_generic_bus for PCI: 00:15.1 done
1003 13:49:31.035739 scan_bus: scanning of bus PCI: 00:15.1 took 18614 usecs
1004 13:49:31.038649 PCI: 00:19.0 scanning...
1005 13:49:31.042021 scan_generic_bus for PCI: 00:19.0
1006 13:49:31.045062 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1007 13:49:31.049060 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1008 13:49:31.055224 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1009 13:49:31.058747 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1010 13:49:31.062714 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1011 13:49:31.065430 scan_generic_bus for PCI: 00:19.0 done
1012 13:49:31.071979 scan_bus: scanning of bus PCI: 00:19.0 took 30725 usecs
1013 13:49:31.075194 PCI: 00:1d.0 scanning...
1014 13:49:31.078358 do_pci_scan_bridge for PCI: 00:1d.0
1015 13:49:31.082499 PCI: pci_scan_bus for bus 01
1016 13:49:31.085786 PCI: 01:00.0 [1c5c/1327] enabled
1017 13:49:31.088607 Enabling Common Clock Configuration
1018 13:49:31.092123 L1 Sub-State supported from root port 29
1019 13:49:31.095013 L1 Sub-State Support = 0xf
1020 13:49:31.098433 CommonModeRestoreTime = 0x28
1021 13:49:31.102014 Power On Value = 0x16, Power On Scale = 0x0
1022 13:49:31.105037 ASPM: Enabled L1
1023 13:49:31.108552 scan_bus: scanning of bus PCI: 00:1d.0 took 32776 usecs
1024 13:49:31.111623 PCI: 00:1e.2 scanning...
1025 13:49:31.114981 scan_generic_bus for PCI: 00:1e.2
1026 13:49:31.117947 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1027 13:49:31.124962 scan_generic_bus for PCI: 00:1e.2 done
1028 13:49:31.127947 scan_bus: scanning of bus PCI: 00:1e.2 took 14053 usecs
1029 13:49:31.131469 PCI: 00:1e.3 scanning...
1030 13:49:31.135189 scan_generic_bus for PCI: 00:1e.3
1031 13:49:31.138151 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1032 13:49:31.144712 scan_generic_bus for PCI: 00:1e.3 done
1033 13:49:31.148159 scan_bus: scanning of bus PCI: 00:1e.3 took 14012 usecs
1034 13:49:31.151138 PCI: 00:1f.0 scanning...
1035 13:49:31.155114 scan_static_bus for PCI: 00:1f.0
1036 13:49:31.157906 PNP: 0c09.0 enabled
1037 13:49:31.161236 scan_static_bus for PCI: 00:1f.0 done
1038 13:49:31.167895 scan_bus: scanning of bus PCI: 00:1f.0 took 12040 usecs
1039 13:49:31.168472 PCI: 00:1f.3 scanning...
1040 13:49:31.174948 scan_bus: scanning of bus PCI: 00:1f.3 took 2852 usecs
1041 13:49:31.177727 PCI: 00:1f.4 scanning...
1042 13:49:31.181288 scan_generic_bus for PCI: 00:1f.4
1043 13:49:31.184254 scan_generic_bus for PCI: 00:1f.4 done
1044 13:49:31.191285 scan_bus: scanning of bus PCI: 00:1f.4 took 10185 usecs
1045 13:49:31.194484 PCI: 00:1f.5 scanning...
1046 13:49:31.198132 scan_generic_bus for PCI: 00:1f.5
1047 13:49:31.201362 scan_generic_bus for PCI: 00:1f.5 done
1048 13:49:31.204680 scan_bus: scanning of bus PCI: 00:1f.5 took 10194 usecs
1049 13:49:31.210993 scan_bus: scanning of bus DOMAIN: 0000 took 605118 usecs
1050 13:49:31.214419 scan_static_bus for Root Device done
1051 13:49:31.220998 scan_bus: scanning of bus Root Device took 624990 usecs
1052 13:49:31.221592 done
1053 13:49:31.224043 Chrome EC: UHEPI supported
1054 13:49:31.230947 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1055 13:49:31.237547 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1056 13:49:31.244583 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1057 13:49:31.250845 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1058 13:49:31.254511 SPI flash protection: WPSW=1 SRP0=0
1059 13:49:31.257201 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1060 13:49:31.264218 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1061 13:49:31.267508 found VGA at PCI: 00:02.0
1062 13:49:31.270722 Setting up VGA for PCI: 00:02.0
1063 13:49:31.274406 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1064 13:49:31.280838 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1065 13:49:31.281429 Allocating resources...
1066 13:49:31.284200 Reading resources...
1067 13:49:31.287369 Root Device read_resources bus 0 link: 0
1068 13:49:31.293996 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1069 13:49:31.297334 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1070 13:49:31.304543 DOMAIN: 0000 read_resources bus 0 link: 0
1071 13:49:31.307569 PCI: 00:14.0 read_resources bus 0 link: 0
1072 13:49:31.314286 USB0 port 0 read_resources bus 0 link: 0
1073 13:49:31.321810 USB0 port 0 read_resources bus 0 link: 0 done
1074 13:49:31.324855 PCI: 00:14.0 read_resources bus 0 link: 0 done
1075 13:49:31.331784 PCI: 00:15.0 read_resources bus 1 link: 0
1076 13:49:31.335066 PCI: 00:15.0 read_resources bus 1 link: 0 done
1077 13:49:31.341889 PCI: 00:15.1 read_resources bus 2 link: 0
1078 13:49:31.344640 PCI: 00:15.1 read_resources bus 2 link: 0 done
1079 13:49:31.352448 PCI: 00:19.0 read_resources bus 3 link: 0
1080 13:49:31.359232 PCI: 00:19.0 read_resources bus 3 link: 0 done
1081 13:49:31.362342 PCI: 00:1d.0 read_resources bus 1 link: 0
1082 13:49:31.368905 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1083 13:49:31.372104 PCI: 00:1e.2 read_resources bus 4 link: 0
1084 13:49:31.379187 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1085 13:49:31.382212 PCI: 00:1e.3 read_resources bus 5 link: 0
1086 13:49:31.389530 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1087 13:49:31.392150 PCI: 00:1f.0 read_resources bus 0 link: 0
1088 13:49:31.398707 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1089 13:49:31.405480 DOMAIN: 0000 read_resources bus 0 link: 0 done
1090 13:49:31.408410 Root Device read_resources bus 0 link: 0 done
1091 13:49:31.412331 Done reading resources.
1092 13:49:31.415325 Show resources in subtree (Root Device)...After reading.
1093 13:49:31.422188 Root Device child on link 0 CPU_CLUSTER: 0
1094 13:49:31.425321 CPU_CLUSTER: 0 child on link 0 APIC: 00
1095 13:49:31.425934 APIC: 00
1096 13:49:31.428623 APIC: 01
1097 13:49:31.429108 APIC: 07
1098 13:49:31.431891 APIC: 06
1099 13:49:31.432378 APIC: 03
1100 13:49:31.432869 APIC: 02
1101 13:49:31.435198 APIC: 04
1102 13:49:31.435835 APIC: 05
1103 13:49:31.438806 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1104 13:49:31.448621 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1105 13:49:31.498141 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1106 13:49:31.498806 PCI: 00:00.0
1107 13:49:31.499712 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1108 13:49:31.500160 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1109 13:49:31.500640 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1110 13:49:31.501194 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1111 13:49:31.540207 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1112 13:49:31.541162 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1113 13:49:31.541614 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1114 13:49:31.542184 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1115 13:49:31.548112 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1116 13:49:31.554036 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1117 13:49:31.564325 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1118 13:49:31.574530 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1119 13:49:31.584441 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1120 13:49:31.594167 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1121 13:49:31.600553 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1122 13:49:31.610751 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1123 13:49:31.613822 PCI: 00:02.0
1124 13:49:31.623876 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1125 13:49:31.634249 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1126 13:49:31.640342 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1127 13:49:31.643401 PCI: 00:04.0
1128 13:49:31.643977 PCI: 00:08.0
1129 13:49:31.653278 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1130 13:49:31.656255 PCI: 00:12.0
1131 13:49:31.666570 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 13:49:31.669986 PCI: 00:14.0 child on link 0 USB0 port 0
1133 13:49:31.679629 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1134 13:49:31.686253 USB0 port 0 child on link 0 USB2 port 0
1135 13:49:31.686826 USB2 port 0
1136 13:49:31.690034 USB2 port 1
1137 13:49:31.690596 USB2 port 2
1138 13:49:31.693310 USB2 port 3
1139 13:49:31.693871 USB2 port 5
1140 13:49:31.696299 USB2 port 6
1141 13:49:31.696864 USB2 port 9
1142 13:49:31.699953 USB3 port 0
1143 13:49:31.700510 USB3 port 1
1144 13:49:31.703390 USB3 port 2
1145 13:49:31.704012 USB3 port 3
1146 13:49:31.706077 USB3 port 4
1147 13:49:31.706640 PCI: 00:14.2
1148 13:49:31.716329 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1149 13:49:31.726231 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1150 13:49:31.729395 PCI: 00:14.3
1151 13:49:31.739474 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 13:49:31.742529 PCI: 00:15.0 child on link 0 I2C: 01:15
1153 13:49:31.753167 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 13:49:31.756030 I2C: 01:15
1155 13:49:31.758942 PCI: 00:15.1 child on link 0 I2C: 02:5d
1156 13:49:31.769595 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 13:49:31.770308 I2C: 02:5d
1158 13:49:31.772820 GENERIC: 0.0
1159 13:49:31.773288 PCI: 00:16.0
1160 13:49:31.782198 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 13:49:31.785372 PCI: 00:17.0
1162 13:49:31.795765 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1163 13:49:31.801851 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1164 13:49:31.812162 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1165 13:49:31.818919 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1166 13:49:31.829135 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1167 13:49:31.838952 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1168 13:49:31.842475 PCI: 00:19.0 child on link 0 I2C: 03:1a
1169 13:49:31.851989 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1170 13:49:31.852556 I2C: 03:1a
1171 13:49:31.855712 I2C: 03:38
1172 13:49:31.856411 I2C: 03:39
1173 13:49:31.858539 I2C: 03:3a
1174 13:49:31.859000 I2C: 03:3b
1175 13:49:31.865320 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1176 13:49:31.871970 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1177 13:49:31.881695 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1178 13:49:31.891702 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1179 13:49:31.892313 PCI: 01:00.0
1180 13:49:31.901520 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 13:49:31.904977 PCI: 00:1e.0
1182 13:49:31.915484 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1183 13:49:31.925130 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1184 13:49:31.928189 PCI: 00:1e.2 child on link 0 SPI: 00
1185 13:49:31.938176 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 13:49:31.941216 SPI: 00
1187 13:49:31.945080 PCI: 00:1e.3 child on link 0 SPI: 01
1188 13:49:31.955044 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 13:49:31.955616 SPI: 01
1190 13:49:31.961566 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1191 13:49:31.968209 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1192 13:49:31.978517 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1193 13:49:31.979087 PNP: 0c09.0
1194 13:49:31.987949 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1195 13:49:31.991542 PCI: 00:1f.3
1196 13:49:32.001303 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1197 13:49:32.011542 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1198 13:49:32.012165 PCI: 00:1f.4
1199 13:49:32.021685 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1200 13:49:32.031195 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1201 13:49:32.031812 PCI: 00:1f.5
1202 13:49:32.041327 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1203 13:49:32.048326 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1204 13:49:32.054829 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1205 13:49:32.061400 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1206 13:49:32.064925 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1207 13:49:32.068042 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1208 13:49:32.071165 PCI: 00:17.0 18 * [0x60 - 0x67] io
1209 13:49:32.074734 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1210 13:49:32.081333 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1211 13:49:32.087931 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1212 13:49:32.098131 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1213 13:49:32.104448 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1214 13:49:32.110860 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1215 13:49:32.114566 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1216 13:49:32.124322 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1217 13:49:32.127437 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1218 13:49:32.134331 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1219 13:49:32.137304 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1220 13:49:32.144582 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1221 13:49:32.147148 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1222 13:49:32.154007 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1223 13:49:32.157252 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1224 13:49:32.163498 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1225 13:49:32.167298 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1226 13:49:32.170641 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1227 13:49:32.176876 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1228 13:49:32.180332 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1229 13:49:32.186982 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1230 13:49:32.190379 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1231 13:49:32.197002 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1232 13:49:32.200704 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1233 13:49:32.207013 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1234 13:49:32.210069 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1235 13:49:32.216539 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1236 13:49:32.220004 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1237 13:49:32.226923 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1238 13:49:32.229929 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1239 13:49:32.236330 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1240 13:49:32.243131 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1241 13:49:32.246608 avoid_fixed_resources: DOMAIN: 0000
1242 13:49:32.253069 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1243 13:49:32.260047 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1244 13:49:32.267022 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1245 13:49:32.273548 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1246 13:49:32.283210 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1247 13:49:32.289695 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1248 13:49:32.296247 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1249 13:49:32.306450 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1250 13:49:32.313275 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1251 13:49:32.319722 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1252 13:49:32.326416 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1253 13:49:32.335980 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1254 13:49:32.336552 Setting resources...
1255 13:49:32.342840 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1256 13:49:32.346104 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1257 13:49:32.353137 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1258 13:49:32.356309 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1259 13:49:32.359260 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1260 13:49:32.365781 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1261 13:49:32.372991 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1262 13:49:32.379284 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1263 13:49:32.386168 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1264 13:49:32.392524 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1265 13:49:32.395880 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1266 13:49:32.402598 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1267 13:49:32.405655 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1268 13:49:32.409111 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1269 13:49:32.416309 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1270 13:49:32.418935 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1271 13:49:32.425840 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1272 13:49:32.429214 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1273 13:49:32.435382 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1274 13:49:32.438760 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1275 13:49:32.446097 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1276 13:49:32.448954 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1277 13:49:32.455366 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1278 13:49:32.458788 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1279 13:49:32.465507 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1280 13:49:32.468136 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1281 13:49:32.475367 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1282 13:49:32.478556 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1283 13:49:32.482568 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1284 13:49:32.488238 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1285 13:49:32.491886 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1286 13:49:32.498539 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1287 13:49:32.505301 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1288 13:49:32.511816 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1289 13:49:32.522016 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1290 13:49:32.528342 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1291 13:49:32.531856 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1292 13:49:32.538394 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1293 13:49:32.545161 Root Device assign_resources, bus 0 link: 0
1294 13:49:32.548153 DOMAIN: 0000 assign_resources, bus 0 link: 0
1295 13:49:32.557952 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1296 13:49:32.564479 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1297 13:49:32.575044 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1298 13:49:32.581123 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1299 13:49:32.591328 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1300 13:49:32.597963 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1301 13:49:32.601326 PCI: 00:14.0 assign_resources, bus 0 link: 0
1302 13:49:32.608605 PCI: 00:14.0 assign_resources, bus 0 link: 0
1303 13:49:32.615034 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1304 13:49:32.625923 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1305 13:49:32.631953 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1306 13:49:32.641783 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1307 13:49:32.644821 PCI: 00:15.0 assign_resources, bus 1 link: 0
1308 13:49:32.648254 PCI: 00:15.0 assign_resources, bus 1 link: 0
1309 13:49:32.658770 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1310 13:49:32.661757 PCI: 00:15.1 assign_resources, bus 2 link: 0
1311 13:49:32.668592 PCI: 00:15.1 assign_resources, bus 2 link: 0
1312 13:49:32.675032 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1313 13:49:32.685173 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1314 13:49:32.691416 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1315 13:49:32.699368 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1316 13:49:32.708116 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1317 13:49:32.715419 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1318 13:49:32.721671 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1319 13:49:32.731671 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1320 13:49:32.734462 PCI: 00:19.0 assign_resources, bus 3 link: 0
1321 13:49:32.741201 PCI: 00:19.0 assign_resources, bus 3 link: 0
1322 13:49:32.748132 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1323 13:49:32.757665 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1324 13:49:32.764402 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1325 13:49:32.771062 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1326 13:49:32.777495 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1327 13:49:32.783803 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1328 13:49:32.790455 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1329 13:49:32.800155 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1330 13:49:32.803375 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1331 13:49:32.811033 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1332 13:49:32.817032 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1333 13:49:32.823367 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1334 13:49:32.827117 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1335 13:49:32.829691 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1336 13:49:32.837168 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1337 13:49:32.840201 LPC: Trying to open IO window from 800 size 1ff
1338 13:49:32.850204 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1339 13:49:32.856894 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1340 13:49:32.866591 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1341 13:49:32.873441 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1342 13:49:32.880120 DOMAIN: 0000 assign_resources, bus 0 link: 0
1343 13:49:32.883417 Root Device assign_resources, bus 0 link: 0
1344 13:49:32.886520 Done setting resources.
1345 13:49:32.893352 Show resources in subtree (Root Device)...After assigning values.
1346 13:49:32.896174 Root Device child on link 0 CPU_CLUSTER: 0
1347 13:49:32.900216 CPU_CLUSTER: 0 child on link 0 APIC: 00
1348 13:49:32.903191 APIC: 00
1349 13:49:32.903840 APIC: 01
1350 13:49:32.904218 APIC: 07
1351 13:49:32.906657 APIC: 06
1352 13:49:32.907216 APIC: 03
1353 13:49:32.909442 APIC: 02
1354 13:49:32.909838 APIC: 04
1355 13:49:32.910179 APIC: 05
1356 13:49:32.917043 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1357 13:49:32.926192 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1358 13:49:32.936027 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1359 13:49:32.939936 PCI: 00:00.0
1360 13:49:32.946646 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1361 13:49:32.956235 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1362 13:49:32.966137 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1363 13:49:32.976200 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1364 13:49:32.985711 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1365 13:49:32.995595 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1366 13:49:33.002308 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1367 13:49:33.012495 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1368 13:49:33.022300 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1369 13:49:33.031879 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1370 13:49:33.041778 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1371 13:49:33.052223 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1372 13:49:33.058559 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1373 13:49:33.068115 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1374 13:49:33.078490 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1375 13:49:33.088034 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1376 13:49:33.088656 PCI: 00:02.0
1377 13:49:33.101068 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1378 13:49:33.111179 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1379 13:49:33.121125 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1380 13:49:33.121698 PCI: 00:04.0
1381 13:49:33.123984 PCI: 00:08.0
1382 13:49:33.134522 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1383 13:49:33.135095 PCI: 00:12.0
1384 13:49:33.144047 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1385 13:49:33.150839 PCI: 00:14.0 child on link 0 USB0 port 0
1386 13:49:33.160152 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1387 13:49:33.163701 USB0 port 0 child on link 0 USB2 port 0
1388 13:49:33.167032 USB2 port 0
1389 13:49:33.167496 USB2 port 1
1390 13:49:33.170888 USB2 port 2
1391 13:49:33.171350 USB2 port 3
1392 13:49:33.173766 USB2 port 5
1393 13:49:33.174231 USB2 port 6
1394 13:49:33.176918 USB2 port 9
1395 13:49:33.180365 USB3 port 0
1396 13:49:33.180930 USB3 port 1
1397 13:49:33.183480 USB3 port 2
1398 13:49:33.183988 USB3 port 3
1399 13:49:33.186676 USB3 port 4
1400 13:49:33.187139 PCI: 00:14.2
1401 13:49:33.196635 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1402 13:49:33.206598 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1403 13:49:33.210078 PCI: 00:14.3
1404 13:49:33.219835 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1405 13:49:33.223286 PCI: 00:15.0 child on link 0 I2C: 01:15
1406 13:49:33.233138 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1407 13:49:33.236181 I2C: 01:15
1408 13:49:33.239598 PCI: 00:15.1 child on link 0 I2C: 02:5d
1409 13:49:33.249554 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1410 13:49:33.252722 I2C: 02:5d
1411 13:49:33.253187 GENERIC: 0.0
1412 13:49:33.256352 PCI: 00:16.0
1413 13:49:33.266138 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1414 13:49:33.266698 PCI: 00:17.0
1415 13:49:33.279372 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1416 13:49:33.289368 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1417 13:49:33.296265 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1418 13:49:33.305943 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1419 13:49:33.315918 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1420 13:49:33.325921 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1421 13:49:33.328760 PCI: 00:19.0 child on link 0 I2C: 03:1a
1422 13:49:33.339076 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1423 13:49:33.342163 I2C: 03:1a
1424 13:49:33.342747 I2C: 03:38
1425 13:49:33.345623 I2C: 03:39
1426 13:49:33.346127 I2C: 03:3a
1427 13:49:33.348517 I2C: 03:3b
1428 13:49:33.352044 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1429 13:49:33.362229 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1430 13:49:33.371867 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1431 13:49:33.382010 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1432 13:49:33.385178 PCI: 01:00.0
1433 13:49:33.395299 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1434 13:49:33.395935 PCI: 00:1e.0
1435 13:49:33.408155 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1436 13:49:33.418176 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1437 13:49:33.421430 PCI: 00:1e.2 child on link 0 SPI: 00
1438 13:49:33.431517 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1439 13:49:33.432128 SPI: 00
1440 13:49:33.438028 PCI: 00:1e.3 child on link 0 SPI: 01
1441 13:49:33.447810 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1442 13:49:33.448374 SPI: 01
1443 13:49:33.451002 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1444 13:49:33.460972 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1445 13:49:33.471541 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1446 13:49:33.472049 PNP: 0c09.0
1447 13:49:33.481907 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1448 13:49:33.482483 PCI: 00:1f.3
1449 13:49:33.491264 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1450 13:49:33.504268 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1451 13:49:33.504844 PCI: 00:1f.4
1452 13:49:33.514573 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1453 13:49:33.524381 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1454 13:49:33.524949 PCI: 00:1f.5
1455 13:49:33.537315 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1456 13:49:33.537888 Done allocating resources.
1457 13:49:33.544187 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1458 13:49:33.547159 Enabling resources...
1459 13:49:33.550116 PCI: 00:00.0 subsystem <- 8086/9b61
1460 13:49:33.553912 PCI: 00:00.0 cmd <- 06
1461 13:49:33.556915 PCI: 00:02.0 subsystem <- 8086/9b41
1462 13:49:33.560589 PCI: 00:02.0 cmd <- 03
1463 13:49:33.563769 PCI: 00:08.0 cmd <- 06
1464 13:49:33.567283 PCI: 00:12.0 subsystem <- 8086/02f9
1465 13:49:33.570283 PCI: 00:12.0 cmd <- 02
1466 13:49:33.573671 PCI: 00:14.0 subsystem <- 8086/02ed
1467 13:49:33.574245 PCI: 00:14.0 cmd <- 02
1468 13:49:33.577061 PCI: 00:14.2 cmd <- 02
1469 13:49:33.580722 PCI: 00:14.3 subsystem <- 8086/02f0
1470 13:49:33.584408 PCI: 00:14.3 cmd <- 02
1471 13:49:33.587668 PCI: 00:15.0 subsystem <- 8086/02e8
1472 13:49:33.590690 PCI: 00:15.0 cmd <- 02
1473 13:49:33.593392 PCI: 00:15.1 subsystem <- 8086/02e9
1474 13:49:33.596975 PCI: 00:15.1 cmd <- 02
1475 13:49:33.600541 PCI: 00:16.0 subsystem <- 8086/02e0
1476 13:49:33.604166 PCI: 00:16.0 cmd <- 02
1477 13:49:33.606912 PCI: 00:17.0 subsystem <- 8086/02d3
1478 13:49:33.610486 PCI: 00:17.0 cmd <- 03
1479 13:49:33.613882 PCI: 00:19.0 subsystem <- 8086/02c5
1480 13:49:33.617023 PCI: 00:19.0 cmd <- 02
1481 13:49:33.620563 PCI: 00:1d.0 bridge ctrl <- 0013
1482 13:49:33.623444 PCI: 00:1d.0 subsystem <- 8086/02b0
1483 13:49:33.624070 PCI: 00:1d.0 cmd <- 06
1484 13:49:33.630434 PCI: 00:1e.0 subsystem <- 8086/02a8
1485 13:49:33.631010 PCI: 00:1e.0 cmd <- 06
1486 13:49:33.633697 PCI: 00:1e.2 subsystem <- 8086/02aa
1487 13:49:33.636846 PCI: 00:1e.2 cmd <- 06
1488 13:49:33.640631 PCI: 00:1e.3 subsystem <- 8086/02ab
1489 13:49:33.644126 PCI: 00:1e.3 cmd <- 02
1490 13:49:33.646865 PCI: 00:1f.0 subsystem <- 8086/0284
1491 13:49:33.650243 PCI: 00:1f.0 cmd <- 407
1492 13:49:33.653476 PCI: 00:1f.3 subsystem <- 8086/02c8
1493 13:49:33.657221 PCI: 00:1f.3 cmd <- 02
1494 13:49:33.660555 PCI: 00:1f.4 subsystem <- 8086/02a3
1495 13:49:33.663425 PCI: 00:1f.4 cmd <- 03
1496 13:49:33.667152 PCI: 00:1f.5 subsystem <- 8086/02a4
1497 13:49:33.669898 PCI: 00:1f.5 cmd <- 406
1498 13:49:33.678175 PCI: 01:00.0 cmd <- 02
1499 13:49:33.683613 done.
1500 13:49:33.696107 ME: Version: 14.0.39.1367
1501 13:49:33.702946 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1502 13:49:33.706590 Initializing devices...
1503 13:49:33.707167 Root Device init ...
1504 13:49:33.712641 Chrome EC: Set SMI mask to 0x0000000000000000
1505 13:49:33.716287 Chrome EC: clear events_b mask to 0x0000000000000000
1506 13:49:33.722800 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1507 13:49:33.729166 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1508 13:49:33.736283 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1509 13:49:33.739326 Chrome EC: Set WAKE mask to 0x0000000000000000
1510 13:49:33.742967 Root Device init finished in 35177 usecs
1511 13:49:33.746011 CPU_CLUSTER: 0 init ...
1512 13:49:33.752564 CPU_CLUSTER: 0 init finished in 2439 usecs
1513 13:49:33.756926 PCI: 00:00.0 init ...
1514 13:49:33.760216 CPU TDP: 15 Watts
1515 13:49:33.763263 CPU PL2 = 64 Watts
1516 13:49:33.766535 PCI: 00:00.0 init finished in 7075 usecs
1517 13:49:33.769703 PCI: 00:02.0 init ...
1518 13:49:33.773338 PCI: 00:02.0 init finished in 2254 usecs
1519 13:49:33.776760 PCI: 00:08.0 init ...
1520 13:49:33.779838 PCI: 00:08.0 init finished in 2254 usecs
1521 13:49:33.783549 PCI: 00:12.0 init ...
1522 13:49:33.786989 PCI: 00:12.0 init finished in 2252 usecs
1523 13:49:33.790634 PCI: 00:14.0 init ...
1524 13:49:33.793214 PCI: 00:14.0 init finished in 2245 usecs
1525 13:49:33.796462 PCI: 00:14.2 init ...
1526 13:49:33.800461 PCI: 00:14.2 init finished in 2253 usecs
1527 13:49:33.802994 PCI: 00:14.3 init ...
1528 13:49:33.806806 PCI: 00:14.3 init finished in 2271 usecs
1529 13:49:33.810050 PCI: 00:15.0 init ...
1530 13:49:33.813330 DW I2C bus 0 at 0xd121f000 (400 KHz)
1531 13:49:33.817095 PCI: 00:15.0 init finished in 5980 usecs
1532 13:49:33.820191 PCI: 00:15.1 init ...
1533 13:49:33.823749 DW I2C bus 1 at 0xd1220000 (400 KHz)
1534 13:49:33.829854 PCI: 00:15.1 init finished in 5972 usecs
1535 13:49:33.830433 PCI: 00:16.0 init ...
1536 13:49:33.836582 PCI: 00:16.0 init finished in 2254 usecs
1537 13:49:33.837160 PCI: 00:19.0 init ...
1538 13:49:33.843078 DW I2C bus 4 at 0xd1222000 (400 KHz)
1539 13:49:33.846580 PCI: 00:19.0 init finished in 5980 usecs
1540 13:49:33.849688 PCI: 00:1d.0 init ...
1541 13:49:33.853013 Initializing PCH PCIe bridge.
1542 13:49:33.855883 PCI: 00:1d.0 init finished in 5289 usecs
1543 13:49:33.859129 PCI: 00:1f.0 init ...
1544 13:49:33.863173 IOAPIC: Initializing IOAPIC at 0xfec00000
1545 13:49:33.869056 IOAPIC: Bootstrap Processor Local APIC = 0x00
1546 13:49:33.869797 IOAPIC: ID = 0x02
1547 13:49:33.872549 IOAPIC: Dumping registers
1548 13:49:33.875671 reg 0x0000: 0x02000000
1549 13:49:33.879212 reg 0x0001: 0x00770020
1550 13:49:33.879718 reg 0x0002: 0x00000000
1551 13:49:33.885847 PCI: 00:1f.0 init finished in 23554 usecs
1552 13:49:33.889371 PCI: 00:1f.4 init ...
1553 13:49:33.892256 PCI: 00:1f.4 init finished in 2262 usecs
1554 13:49:33.903133 PCI: 01:00.0 init ...
1555 13:49:33.906493 PCI: 01:00.0 init finished in 2245 usecs
1556 13:49:33.910714 PNP: 0c09.0 init ...
1557 13:49:33.914211 Google Chrome EC uptime: 11.108 seconds
1558 13:49:33.920806 Google Chrome AP resets since EC boot: 0
1559 13:49:33.923925 Google Chrome most recent AP reset causes:
1560 13:49:33.930809 Google Chrome EC reset flags at last EC boot: reset-pin
1561 13:49:33.933635 PNP: 0c09.0 init finished in 20606 usecs
1562 13:49:33.936855 Devices initialized
1563 13:49:33.940465 Show all devs... After init.
1564 13:49:33.941031 Root Device: enabled 1
1565 13:49:33.943885 CPU_CLUSTER: 0: enabled 1
1566 13:49:33.946974 DOMAIN: 0000: enabled 1
1567 13:49:33.947439 APIC: 00: enabled 1
1568 13:49:33.950459 PCI: 00:00.0: enabled 1
1569 13:49:33.953870 PCI: 00:02.0: enabled 1
1570 13:49:33.957020 PCI: 00:04.0: enabled 0
1571 13:49:33.957584 PCI: 00:05.0: enabled 0
1572 13:49:33.960191 PCI: 00:12.0: enabled 1
1573 13:49:33.963482 PCI: 00:12.5: enabled 0
1574 13:49:33.966654 PCI: 00:12.6: enabled 0
1575 13:49:33.967279 PCI: 00:14.0: enabled 1
1576 13:49:33.969801 PCI: 00:14.1: enabled 0
1577 13:49:33.973794 PCI: 00:14.3: enabled 1
1578 13:49:33.976574 PCI: 00:14.5: enabled 0
1579 13:49:33.977042 PCI: 00:15.0: enabled 1
1580 13:49:33.979951 PCI: 00:15.1: enabled 1
1581 13:49:33.983164 PCI: 00:15.2: enabled 0
1582 13:49:33.983628 PCI: 00:15.3: enabled 0
1583 13:49:33.986560 PCI: 00:16.0: enabled 1
1584 13:49:33.989466 PCI: 00:16.1: enabled 0
1585 13:49:33.992973 PCI: 00:16.2: enabled 0
1586 13:49:33.993535 PCI: 00:16.3: enabled 0
1587 13:49:33.996259 PCI: 00:16.4: enabled 0
1588 13:49:33.999732 PCI: 00:16.5: enabled 0
1589 13:49:34.003679 PCI: 00:17.0: enabled 1
1590 13:49:34.004247 PCI: 00:19.0: enabled 1
1591 13:49:34.006088 PCI: 00:19.1: enabled 0
1592 13:49:34.009824 PCI: 00:19.2: enabled 0
1593 13:49:34.013397 PCI: 00:1a.0: enabled 0
1594 13:49:34.013962 PCI: 00:1c.0: enabled 0
1595 13:49:34.016034 PCI: 00:1c.1: enabled 0
1596 13:49:34.019925 PCI: 00:1c.2: enabled 0
1597 13:49:34.020492 PCI: 00:1c.3: enabled 0
1598 13:49:34.023082 PCI: 00:1c.4: enabled 0
1599 13:49:34.026599 PCI: 00:1c.5: enabled 0
1600 13:49:34.029929 PCI: 00:1c.6: enabled 0
1601 13:49:34.030495 PCI: 00:1c.7: enabled 0
1602 13:49:34.033065 PCI: 00:1d.0: enabled 1
1603 13:49:34.036087 PCI: 00:1d.1: enabled 0
1604 13:49:34.039614 PCI: 00:1d.2: enabled 0
1605 13:49:34.040220 PCI: 00:1d.3: enabled 0
1606 13:49:34.042935 PCI: 00:1d.4: enabled 0
1607 13:49:34.046032 PCI: 00:1d.5: enabled 0
1608 13:49:34.049505 PCI: 00:1e.0: enabled 1
1609 13:49:34.050073 PCI: 00:1e.1: enabled 0
1610 13:49:34.052878 PCI: 00:1e.2: enabled 1
1611 13:49:34.056630 PCI: 00:1e.3: enabled 1
1612 13:49:34.057198 PCI: 00:1f.0: enabled 1
1613 13:49:34.059434 PCI: 00:1f.1: enabled 0
1614 13:49:34.063129 PCI: 00:1f.2: enabled 0
1615 13:49:34.066241 PCI: 00:1f.3: enabled 1
1616 13:49:34.066806 PCI: 00:1f.4: enabled 1
1617 13:49:34.069080 PCI: 00:1f.5: enabled 1
1618 13:49:34.072594 PCI: 00:1f.6: enabled 0
1619 13:49:34.076385 USB0 port 0: enabled 1
1620 13:49:34.076952 I2C: 01:15: enabled 1
1621 13:49:34.079958 I2C: 02:5d: enabled 1
1622 13:49:34.082731 GENERIC: 0.0: enabled 1
1623 13:49:34.083301 I2C: 03:1a: enabled 1
1624 13:49:34.085845 I2C: 03:38: enabled 1
1625 13:49:34.089233 I2C: 03:39: enabled 1
1626 13:49:34.089799 I2C: 03:3a: enabled 1
1627 13:49:34.092645 I2C: 03:3b: enabled 1
1628 13:49:34.095916 PCI: 00:00.0: enabled 1
1629 13:49:34.096477 SPI: 00: enabled 1
1630 13:49:34.099377 SPI: 01: enabled 1
1631 13:49:34.102095 PNP: 0c09.0: enabled 1
1632 13:49:34.102579 USB2 port 0: enabled 1
1633 13:49:34.105969 USB2 port 1: enabled 1
1634 13:49:34.109309 USB2 port 2: enabled 0
1635 13:49:34.112346 USB2 port 3: enabled 0
1636 13:49:34.112941 USB2 port 5: enabled 0
1637 13:49:34.115533 USB2 port 6: enabled 1
1638 13:49:34.118877 USB2 port 9: enabled 1
1639 13:49:34.119340 USB3 port 0: enabled 1
1640 13:49:34.121979 USB3 port 1: enabled 1
1641 13:49:34.125805 USB3 port 2: enabled 1
1642 13:49:34.126368 USB3 port 3: enabled 1
1643 13:49:34.129040 USB3 port 4: enabled 0
1644 13:49:34.132330 APIC: 01: enabled 1
1645 13:49:34.132897 APIC: 07: enabled 1
1646 13:49:34.135558 APIC: 06: enabled 1
1647 13:49:34.139159 APIC: 03: enabled 1
1648 13:49:34.139772 APIC: 02: enabled 1
1649 13:49:34.141849 APIC: 04: enabled 1
1650 13:49:34.142376 APIC: 05: enabled 1
1651 13:49:34.145231 PCI: 00:08.0: enabled 1
1652 13:49:34.148876 PCI: 00:14.2: enabled 1
1653 13:49:34.153170 PCI: 01:00.0: enabled 1
1654 13:49:34.155779 Disabling ACPI via APMC:
1655 13:49:34.156340 done.
1656 13:49:34.162544 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1657 13:49:34.165892 ELOG: NV offset 0xaf0000 size 0x4000
1658 13:49:34.172465 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1659 13:49:34.179400 ELOG: Event(17) added with size 13 at 2023-08-16 13:49:34 UTC
1660 13:49:34.185742 ELOG: Event(92) added with size 9 at 2023-08-16 13:49:34 UTC
1661 13:49:34.192379 ELOG: Event(93) added with size 9 at 2023-08-16 13:49:34 UTC
1662 13:49:34.198959 ELOG: Event(9A) added with size 9 at 2023-08-16 13:49:34 UTC
1663 13:49:34.205751 ELOG: Event(9E) added with size 10 at 2023-08-16 13:49:34 UTC
1664 13:49:34.212241 ELOG: Event(9F) added with size 14 at 2023-08-16 13:49:34 UTC
1665 13:49:34.215874 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1666 13:49:34.222775 ELOG: Event(A1) added with size 10 at 2023-08-16 13:49:34 UTC
1667 13:49:34.232662 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1668 13:49:34.239194 ELOG: Event(A0) added with size 9 at 2023-08-16 13:49:34 UTC
1669 13:49:34.242469 elog_add_boot_reason: Logged dev mode boot
1670 13:49:34.242936 Finalize devices...
1671 13:49:34.246156 PCI: 00:17.0 final
1672 13:49:34.249248 Devices finalized
1673 13:49:34.252428 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1674 13:49:34.259469 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1675 13:49:34.262777 ME: HFSTS1 : 0x90000245
1676 13:49:34.265642 ME: HFSTS2 : 0x3B850126
1677 13:49:34.272349 ME: HFSTS3 : 0x00000020
1678 13:49:34.275736 ME: HFSTS4 : 0x00004800
1679 13:49:34.279510 ME: HFSTS5 : 0x00000000
1680 13:49:34.282713 ME: HFSTS6 : 0x40400006
1681 13:49:34.285870 ME: Manufacturing Mode : NO
1682 13:49:34.289477 ME: FW Partition Table : OK
1683 13:49:34.292401 ME: Bringup Loader Failure : NO
1684 13:49:34.295620 ME: Firmware Init Complete : YES
1685 13:49:34.298986 ME: Boot Options Present : NO
1686 13:49:34.302826 ME: Update In Progress : NO
1687 13:49:34.305917 ME: D0i3 Support : YES
1688 13:49:34.309355 ME: Low Power State Enabled : NO
1689 13:49:34.312349 ME: CPU Replaced : NO
1690 13:49:34.316165 ME: CPU Replacement Valid : YES
1691 13:49:34.319354 ME: Current Working State : 5
1692 13:49:34.322364 ME: Current Operation State : 1
1693 13:49:34.326089 ME: Current Operation Mode : 0
1694 13:49:34.328452 ME: Error Code : 0
1695 13:49:34.332088 ME: CPU Debug Disabled : YES
1696 13:49:34.335536 ME: TXT Support : NO
1697 13:49:34.342816 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1698 13:49:34.348602 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1699 13:49:34.349176 CBFS @ c08000 size 3f8000
1700 13:49:34.355161 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1701 13:49:34.358464 CBFS: Locating 'fallback/dsdt.aml'
1702 13:49:34.364876 CBFS: Found @ offset 10bb80 size 3fa5
1703 13:49:34.368095 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 13:49:34.371369 CBFS @ c08000 size 3f8000
1705 13:49:34.378089 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 13:49:34.381663 CBFS: Locating 'fallback/slic'
1707 13:49:34.384790 CBFS: 'fallback/slic' not found.
1708 13:49:34.387956 ACPI: Writing ACPI tables at 99b3e000.
1709 13:49:34.391240 ACPI: * FACS
1710 13:49:34.391880 ACPI: * DSDT
1711 13:49:34.394564 Ramoops buffer: 0x100000@0x99a3d000.
1712 13:49:34.401109 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1713 13:49:34.404604 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1714 13:49:34.407705 Google Chrome EC: version:
1715 13:49:34.411819 ro: helios_v2.0.2659-56403530b
1716 13:49:34.414614 rw: helios_v2.0.2849-c41de27e7d
1717 13:49:34.417751 running image: 1
1718 13:49:34.421206 ACPI: * FADT
1719 13:49:34.421791 SCI is IRQ9
1720 13:49:34.424228 ACPI: added table 1/32, length now 40
1721 13:49:34.428236 ACPI: * SSDT
1722 13:49:34.431245 Found 1 CPU(s) with 8 core(s) each.
1723 13:49:34.434312 Error: Could not locate 'wifi_sar' in VPD.
1724 13:49:34.441128 Checking CBFS for default SAR values
1725 13:49:34.444117 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 13:49:34.447449 CBFS @ c08000 size 3f8000
1727 13:49:34.454085 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 13:49:34.457422 CBFS: Locating 'wifi_sar_defaults.hex'
1729 13:49:34.460645 CBFS: Found @ offset 5fac0 size 77
1730 13:49:34.463629 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1731 13:49:34.467319 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1732 13:49:34.473829 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1733 13:49:34.480605 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1734 13:49:34.483845 failed to find key in VPD: dsm_calib_r0_0
1735 13:49:34.494164 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1736 13:49:34.497717 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1737 13:49:34.500365 failed to find key in VPD: dsm_calib_r0_1
1738 13:49:34.510681 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1739 13:49:34.516872 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1740 13:49:34.520397 failed to find key in VPD: dsm_calib_r0_2
1741 13:49:34.530511 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1742 13:49:34.533211 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1743 13:49:34.540117 failed to find key in VPD: dsm_calib_r0_3
1744 13:49:34.546808 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1745 13:49:34.553591 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1746 13:49:34.556692 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1747 13:49:34.560331 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1748 13:49:34.564113 EC returned error result code 1
1749 13:49:34.567794 EC returned error result code 1
1750 13:49:34.571102 EC returned error result code 1
1751 13:49:34.577997 PS2K: Bad resp from EC. Vivaldi disabled!
1752 13:49:34.581951 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1753 13:49:34.588118 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1754 13:49:34.594895 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1755 13:49:34.598099 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1756 13:49:34.604390 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1757 13:49:34.611090 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1758 13:49:34.617832 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1759 13:49:34.620919 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1760 13:49:34.623986 ACPI: added table 2/32, length now 44
1761 13:49:34.627805 ACPI: * MCFG
1762 13:49:34.631166 ACPI: added table 3/32, length now 48
1763 13:49:34.634394 ACPI: * TPM2
1764 13:49:34.637958 TPM2 log created at 99a2d000
1765 13:49:34.641179 ACPI: added table 4/32, length now 52
1766 13:49:34.641749 ACPI: * MADT
1767 13:49:34.644342 SCI is IRQ9
1768 13:49:34.647747 ACPI: added table 5/32, length now 56
1769 13:49:34.648465 current = 99b43ac0
1770 13:49:34.651204 ACPI: * DMAR
1771 13:49:34.654195 ACPI: added table 6/32, length now 60
1772 13:49:34.657652 ACPI: * IGD OpRegion
1773 13:49:34.658216 GMA: Found VBT in CBFS
1774 13:49:34.660697 GMA: Found valid VBT in CBFS
1775 13:49:34.664073 ACPI: added table 7/32, length now 64
1776 13:49:34.667392 ACPI: * HPET
1777 13:49:34.671526 ACPI: added table 8/32, length now 68
1778 13:49:34.672185 ACPI: done.
1779 13:49:34.674128 ACPI tables: 31744 bytes.
1780 13:49:34.677690 smbios_write_tables: 99a2c000
1781 13:49:34.680976 EC returned error result code 3
1782 13:49:34.684443 Couldn't obtain OEM name from CBI
1783 13:49:34.687589 Create SMBIOS type 17
1784 13:49:34.690961 PCI: 00:00.0 (Intel Cannonlake)
1785 13:49:34.694218 PCI: 00:14.3 (Intel WiFi)
1786 13:49:34.697387 SMBIOS tables: 939 bytes.
1787 13:49:34.700995 Writing table forward entry at 0x00000500
1788 13:49:34.707340 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1789 13:49:34.710318 Writing coreboot table at 0x99b62000
1790 13:49:34.717223 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1791 13:49:34.720629 1. 0000000000001000-000000000009ffff: RAM
1792 13:49:34.723806 2. 00000000000a0000-00000000000fffff: RESERVED
1793 13:49:34.730477 3. 0000000000100000-0000000099a2bfff: RAM
1794 13:49:34.737197 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1795 13:49:34.740193 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1796 13:49:34.747259 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1797 13:49:34.750404 7. 000000009a000000-000000009f7fffff: RESERVED
1798 13:49:34.757226 8. 00000000e0000000-00000000efffffff: RESERVED
1799 13:49:34.760567 9. 00000000fc000000-00000000fc000fff: RESERVED
1800 13:49:34.763560 10. 00000000fe000000-00000000fe00ffff: RESERVED
1801 13:49:34.770312 11. 00000000fed10000-00000000fed17fff: RESERVED
1802 13:49:34.773229 12. 00000000fed80000-00000000fed83fff: RESERVED
1803 13:49:34.780401 13. 00000000fed90000-00000000fed91fff: RESERVED
1804 13:49:34.783141 14. 00000000feda0000-00000000feda1fff: RESERVED
1805 13:49:34.790357 15. 0000000100000000-000000045e7fffff: RAM
1806 13:49:34.793250 Graphics framebuffer located at 0xc0000000
1807 13:49:34.796388 Passing 5 GPIOs to payload:
1808 13:49:34.799764 NAME | PORT | POLARITY | VALUE
1809 13:49:34.806601 write protect | undefined | high | high
1810 13:49:34.813493 lid | undefined | high | high
1811 13:49:34.816261 power | undefined | high | low
1812 13:49:34.822729 oprom | undefined | high | low
1813 13:49:34.826126 EC in RW | 0x000000cb | high | low
1814 13:49:34.829677 Board ID: 4
1815 13:49:34.832761 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1816 13:49:34.836463 CBFS @ c08000 size 3f8000
1817 13:49:34.842539 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1818 13:49:34.849186 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6ba9
1819 13:49:34.849763 coreboot table: 1492 bytes.
1820 13:49:34.852401 IMD ROOT 0. 99fff000 00001000
1821 13:49:34.859206 IMD SMALL 1. 99ffe000 00001000
1822 13:49:34.862590 FSP MEMORY 2. 99c4e000 003b0000
1823 13:49:34.865806 CONSOLE 3. 99c2e000 00020000
1824 13:49:34.869112 FMAP 4. 99c2d000 0000054e
1825 13:49:34.872555 TIME STAMP 5. 99c2c000 00000910
1826 13:49:34.875405 VBOOT WORK 6. 99c18000 00014000
1827 13:49:34.879192 MRC DATA 7. 99c16000 00001958
1828 13:49:34.882552 ROMSTG STCK 8. 99c15000 00001000
1829 13:49:34.886228 AFTER CAR 9. 99c0b000 0000a000
1830 13:49:34.888831 RAMSTAGE 10. 99baf000 0005c000
1831 13:49:34.892277 REFCODE 11. 99b7a000 00035000
1832 13:49:34.895700 SMM BACKUP 12. 99b6a000 00010000
1833 13:49:34.898806 COREBOOT 13. 99b62000 00008000
1834 13:49:34.901955 ACPI 14. 99b3e000 00024000
1835 13:49:34.905415 ACPI GNVS 15. 99b3d000 00001000
1836 13:49:34.908853 RAMOOPS 16. 99a3d000 00100000
1837 13:49:34.912021 TPM2 TCGLOG17. 99a2d000 00010000
1838 13:49:34.916270 SMBIOS 18. 99a2c000 00000800
1839 13:49:34.916977 IMD small region:
1840 13:49:34.918748 IMD ROOT 0. 99ffec00 00000400
1841 13:49:34.921683 FSP RUNTIME 1. 99ffebe0 00000004
1842 13:49:34.925661 EC HOSTEVENT 2. 99ffebc0 00000008
1843 13:49:34.931972 POWER STATE 3. 99ffeb80 00000040
1844 13:49:34.935547 ROMSTAGE 4. 99ffeb60 00000004
1845 13:49:34.938729 MEM INFO 5. 99ffe9a0 000001b9
1846 13:49:34.941650 VPD 6. 99ffe920 0000006c
1847 13:49:34.945058 MTRR: Physical address space:
1848 13:49:34.952085 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1849 13:49:34.954780 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1850 13:49:34.961383 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1851 13:49:34.968155 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1852 13:49:34.974551 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1853 13:49:34.981661 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1854 13:49:34.988278 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1855 13:49:34.991616 MTRR: Fixed MSR 0x250 0x0606060606060606
1856 13:49:34.994845 MTRR: Fixed MSR 0x258 0x0606060606060606
1857 13:49:35.001076 MTRR: Fixed MSR 0x259 0x0000000000000000
1858 13:49:35.004402 MTRR: Fixed MSR 0x268 0x0606060606060606
1859 13:49:35.007799 MTRR: Fixed MSR 0x269 0x0606060606060606
1860 13:49:35.011323 MTRR: Fixed MSR 0x26a 0x0606060606060606
1861 13:49:35.017569 MTRR: Fixed MSR 0x26b 0x0606060606060606
1862 13:49:35.020887 MTRR: Fixed MSR 0x26c 0x0606060606060606
1863 13:49:35.024437 MTRR: Fixed MSR 0x26d 0x0606060606060606
1864 13:49:35.027561 MTRR: Fixed MSR 0x26e 0x0606060606060606
1865 13:49:35.034925 MTRR: Fixed MSR 0x26f 0x0606060606060606
1866 13:49:35.037355 call enable_fixed_mtrr()
1867 13:49:35.040596 CPU physical address size: 39 bits
1868 13:49:35.044079 MTRR: default type WB/UC MTRR counts: 6/8.
1869 13:49:35.047519 MTRR: WB selected as default type.
1870 13:49:35.053970 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1871 13:49:35.060699 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1872 13:49:35.067168 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1873 13:49:35.070623 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1874 13:49:35.077269 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1875 13:49:35.084196 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1876 13:49:35.091098 MTRR: Fixed MSR 0x250 0x0606060606060606
1877 13:49:35.093824 MTRR: Fixed MSR 0x258 0x0606060606060606
1878 13:49:35.097252 MTRR: Fixed MSR 0x259 0x0000000000000000
1879 13:49:35.100239 MTRR: Fixed MSR 0x268 0x0606060606060606
1880 13:49:35.107125 MTRR: Fixed MSR 0x269 0x0606060606060606
1881 13:49:35.110208 MTRR: Fixed MSR 0x26a 0x0606060606060606
1882 13:49:35.113494 MTRR: Fixed MSR 0x26b 0x0606060606060606
1883 13:49:35.117014 MTRR: Fixed MSR 0x26c 0x0606060606060606
1884 13:49:35.123907 MTRR: Fixed MSR 0x26d 0x0606060606060606
1885 13:49:35.126927 MTRR: Fixed MSR 0x26e 0x0606060606060606
1886 13:49:35.130313 MTRR: Fixed MSR 0x26f 0x0606060606060606
1887 13:49:35.130895
1888 13:49:35.133718 MTRR check
1889 13:49:35.134311 Fixed MTRRs : Enabled
1890 13:49:35.137138 Variable MTRRs: Enabled
1891 13:49:35.137680
1892 13:49:35.140527 call enable_fixed_mtrr()
1893 13:49:35.143868 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1894 13:49:35.150032 CPU physical address size: 39 bits
1895 13:49:35.153213 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1896 13:49:35.157039 CBFS @ c08000 size 3f8000
1897 13:49:35.163700 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1898 13:49:35.166878 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 13:49:35.169864 MTRR: Fixed MSR 0x250 0x0606060606060606
1900 13:49:35.173289 MTRR: Fixed MSR 0x258 0x0606060606060606
1901 13:49:35.180243 MTRR: Fixed MSR 0x259 0x0000000000000000
1902 13:49:35.183041 MTRR: Fixed MSR 0x268 0x0606060606060606
1903 13:49:35.187102 MTRR: Fixed MSR 0x269 0x0606060606060606
1904 13:49:35.189891 MTRR: Fixed MSR 0x26a 0x0606060606060606
1905 13:49:35.196492 MTRR: Fixed MSR 0x26b 0x0606060606060606
1906 13:49:35.200451 MTRR: Fixed MSR 0x26c 0x0606060606060606
1907 13:49:35.203384 MTRR: Fixed MSR 0x26d 0x0606060606060606
1908 13:49:35.206740 MTRR: Fixed MSR 0x26e 0x0606060606060606
1909 13:49:35.213428 MTRR: Fixed MSR 0x26f 0x0606060606060606
1910 13:49:35.216763 MTRR: Fixed MSR 0x258 0x0606060606060606
1911 13:49:35.219846 MTRR: Fixed MSR 0x259 0x0000000000000000
1912 13:49:35.223135 MTRR: Fixed MSR 0x268 0x0606060606060606
1913 13:49:35.229644 MTRR: Fixed MSR 0x269 0x0606060606060606
1914 13:49:35.232936 MTRR: Fixed MSR 0x26a 0x0606060606060606
1915 13:49:35.236317 MTRR: Fixed MSR 0x26b 0x0606060606060606
1916 13:49:35.239481 MTRR: Fixed MSR 0x26c 0x0606060606060606
1917 13:49:35.246647 MTRR: Fixed MSR 0x26d 0x0606060606060606
1918 13:49:35.249776 MTRR: Fixed MSR 0x26e 0x0606060606060606
1919 13:49:35.252756 MTRR: Fixed MSR 0x26f 0x0606060606060606
1920 13:49:35.256145 call enable_fixed_mtrr()
1921 13:49:35.259460 call enable_fixed_mtrr()
1922 13:49:35.262726 CPU physical address size: 39 bits
1923 13:49:35.265937 CPU physical address size: 39 bits
1924 13:49:35.269297 CBFS: Locating 'fallback/payload'
1925 13:49:35.272741 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 13:49:35.275942 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 13:49:35.282908 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 13:49:35.286223 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 13:49:35.289404 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 13:49:35.292277 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 13:49:35.299430 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 13:49:35.302376 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 13:49:35.305844 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 13:49:35.308862 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 13:49:35.312970 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 13:49:35.319239 MTRR: Fixed MSR 0x250 0x0606060606060606
1937 13:49:35.322616 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 13:49:35.325863 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 13:49:35.332528 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 13:49:35.335669 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 13:49:35.339736 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 13:49:35.342117 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 13:49:35.345615 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 13:49:35.352401 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 13:49:35.355778 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 13:49:35.358676 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 13:49:35.362216 call enable_fixed_mtrr()
1948 13:49:35.365755 CBFS: Found @ offset 1c96c0 size 3f798
1949 13:49:35.368332 MTRR: Fixed MSR 0x250 0x0606060606060606
1950 13:49:35.375288 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 13:49:35.378264 MTRR: Fixed MSR 0x258 0x0606060606060606
1952 13:49:35.381905 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 13:49:35.384959 MTRR: Fixed MSR 0x268 0x0606060606060606
1954 13:49:35.392049 MTRR: Fixed MSR 0x269 0x0606060606060606
1955 13:49:35.395201 MTRR: Fixed MSR 0x26a 0x0606060606060606
1956 13:49:35.398603 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 13:49:35.401722 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 13:49:35.408628 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 13:49:35.411390 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 13:49:35.415165 MTRR: Fixed MSR 0x26f 0x0606060606060606
1961 13:49:35.418360 MTRR: Fixed MSR 0x258 0x0606060606060606
1962 13:49:35.424966 MTRR: Fixed MSR 0x259 0x0000000000000000
1963 13:49:35.428177 MTRR: Fixed MSR 0x268 0x0606060606060606
1964 13:49:35.431830 MTRR: Fixed MSR 0x269 0x0606060606060606
1965 13:49:35.435193 MTRR: Fixed MSR 0x26a 0x0606060606060606
1966 13:49:35.441563 MTRR: Fixed MSR 0x26b 0x0606060606060606
1967 13:49:35.444595 MTRR: Fixed MSR 0x26c 0x0606060606060606
1968 13:49:35.448318 MTRR: Fixed MSR 0x26d 0x0606060606060606
1969 13:49:35.451520 MTRR: Fixed MSR 0x26e 0x0606060606060606
1970 13:49:35.458486 MTRR: Fixed MSR 0x26f 0x0606060606060606
1971 13:49:35.459071 call enable_fixed_mtrr()
1972 13:49:35.461344 call enable_fixed_mtrr()
1973 13:49:35.468081 Checking segment from ROM address 0xffdd16f8
1974 13:49:35.471215 CPU physical address size: 39 bits
1975 13:49:35.474417 CPU physical address size: 39 bits
1976 13:49:35.477809 CPU physical address size: 39 bits
1977 13:49:35.481224 call enable_fixed_mtrr()
1978 13:49:35.484428 Checking segment from ROM address 0xffdd1714
1979 13:49:35.487712 CPU physical address size: 39 bits
1980 13:49:35.491296 Loading segment from ROM address 0xffdd16f8
1981 13:49:35.494161 code (compression=0)
1982 13:49:35.504252 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1983 13:49:35.510825 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1984 13:49:35.514078 it's not compressed!
1985 13:49:35.605863 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1986 13:49:35.613277 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1987 13:49:35.616552 Loading segment from ROM address 0xffdd1714
1988 13:49:35.619067 Entry Point 0x30000000
1989 13:49:35.622811 Loaded segments
1990 13:49:35.628328 Finalizing chipset.
1991 13:49:35.631519 Finalizing SMM.
1992 13:49:35.635078 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1993 13:49:35.638622 mp_park_aps done after 0 msecs.
1994 13:49:35.644774 Jumping to boot code at 30000000(99b62000)
1995 13:49:35.651811 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1996 13:49:35.652395
1997 13:49:35.652894
1998 13:49:35.653364
1999 13:49:35.654703 Starting depthcharge on Helios...
2000 13:49:35.655209
2001 13:49:35.656528 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2002 13:49:35.657154 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2003 13:49:35.657695 Setting prompt string to ['hatch:']
2004 13:49:35.658285 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2005 13:49:35.664693 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2006 13:49:35.665279
2007 13:49:35.671519 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2008 13:49:35.672162
2009 13:49:35.678371 board_setup: Info: eMMC controller not present; skipping
2010 13:49:35.679081
2011 13:49:35.681071 New NVMe Controller 0x30053aa8 @ 00:1d:00
2012 13:49:35.681537
2013 13:49:35.688128 board_setup: Info: SDHCI controller not present; skipping
2014 13:49:35.688693
2015 13:49:35.694629 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2016 13:49:35.695219
2017 13:49:35.695586 Wipe memory regions:
2018 13:49:35.695976
2019 13:49:35.697404 [0x00000000001000, 0x000000000a0000)
2020 13:49:35.697864
2021 13:49:35.701217 [0x00000000100000, 0x00000030000000)
2022 13:49:35.767349
2023 13:49:35.769894 [0x00000030657430, 0x00000099a2c000)
2024 13:49:35.907684
2025 13:49:35.910414 [0x00000100000000, 0x0000045e800000)
2026 13:49:37.293100
2027 13:49:37.293677 R8152: Initializing
2028 13:49:37.294050
2029 13:49:37.296010 Version 9 (ocp_data = 6010)
2030 13:49:37.300249
2031 13:49:37.300708 R8152: Done initializing
2032 13:49:37.301074
2033 13:49:37.303145 Adding net device
2034 13:49:37.912917
2035 13:49:37.913479 R8152: Initializing
2036 13:49:37.913849
2037 13:49:37.916202 Version 6 (ocp_data = 5c30)
2038 13:49:37.916666
2039 13:49:37.919111 R8152: Done initializing
2040 13:49:37.919191
2041 13:49:37.922635 net_add_device: Attemp to include the same device
2042 13:49:37.926094
2043 13:49:37.932908 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2044 13:49:37.933081
2045 13:49:37.933160
2046 13:49:37.933231
2047 13:49:37.933536 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2049 13:49:38.034175 hatch: tftpboot 192.168.201.1 11299526/tftp-deploy-jg2o9r_s/kernel/bzImage 11299526/tftp-deploy-jg2o9r_s/kernel/cmdline 11299526/tftp-deploy-jg2o9r_s/ramdisk/ramdisk.cpio.gz
2050 13:49:38.034852 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2051 13:49:38.035438 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2052 13:49:38.040147 tftpboot 192.168.201.1 11299526/tftp-deploy-jg2o9r_s/kernel/bzImploy-jg2o9r_s/kernel/cmdline 11299526/tftp-deploy-jg2o9r_s/ramdisk/ramdisk.cpio.gz
2053 13:49:38.040847
2054 13:49:38.041471 Waiting for link
2055 13:49:38.241148
2056 13:49:38.241710 done.
2057 13:49:38.242079
2058 13:49:38.242423 MAC: 00:24:32:50:1a:5f
2059 13:49:38.242815
2060 13:49:38.243945 Sending DHCP discover... done.
2061 13:49:38.244408
2062 13:49:38.247795 Waiting for reply... done.
2063 13:49:38.248377
2064 13:49:38.250826 Sending DHCP request... done.
2065 13:49:38.251291
2066 13:49:38.254489 Waiting for reply... done.
2067 13:49:38.255054
2068 13:49:38.257488 My ip is 192.168.201.21
2069 13:49:38.257953
2070 13:49:38.260945 The DHCP server ip is 192.168.201.1
2071 13:49:38.261409
2072 13:49:38.263758 TFTP server IP predefined by user: 192.168.201.1
2073 13:49:38.264225
2074 13:49:38.270584 Bootfile predefined by user: 11299526/tftp-deploy-jg2o9r_s/kernel/bzImage
2075 13:49:38.271153
2076 13:49:38.274058 Sending tftp read request... done.
2077 13:49:38.276927
2078 13:49:38.284344 Waiting for the transfer...
2079 13:49:38.284814
2080 13:49:38.994391 00000000 ################################################################
2081 13:49:38.994984
2082 13:49:39.714990 00080000 ################################################################
2083 13:49:39.715574
2084 13:49:40.435785 00100000 ################################################################
2085 13:49:40.436376
2086 13:49:41.143776 00180000 ################################################################
2087 13:49:41.144389
2088 13:49:41.849296 00200000 ################################################################
2089 13:49:41.849913
2090 13:49:42.551239 00280000 ################################################################
2091 13:49:42.551885
2092 13:49:43.267982 00300000 ################################################################
2093 13:49:43.268623
2094 13:49:43.989514 00380000 ################################################################
2095 13:49:43.990180
2096 13:49:44.704839 00400000 ################################################################
2097 13:49:44.705423
2098 13:49:45.427856 00480000 ################################################################
2099 13:49:45.428438
2100 13:49:46.154134 00500000 ################################################################
2101 13:49:46.154704
2102 13:49:46.872277 00580000 ################################################################
2103 13:49:46.872887
2104 13:49:47.611440 00600000 ################################################################
2105 13:49:47.612060
2106 13:49:48.323703 00680000 ################################################################
2107 13:49:48.324375
2108 13:49:49.043803 00700000 ################################################################
2109 13:49:49.044385
2110 13:49:49.748862 00780000 ################################################################
2111 13:49:49.749422
2112 13:49:49.896690 00800000 ############## done.
2113 13:49:49.897249
2114 13:49:49.900152 The bootfile was 8499088 bytes long.
2115 13:49:49.900615
2116 13:49:49.902962 Sending tftp read request... done.
2117 13:49:49.903435
2118 13:49:49.906381 Waiting for the transfer...
2119 13:49:49.906841
2120 13:49:50.625115 00000000 ################################################################
2121 13:49:50.625699
2122 13:49:51.357258 00080000 ################################################################
2123 13:49:51.357842
2124 13:49:52.076051 00100000 ################################################################
2125 13:49:52.076628
2126 13:49:52.802591 00180000 ################################################################
2127 13:49:52.803156
2128 13:49:53.534907 00200000 ################################################################
2129 13:49:53.535485
2130 13:49:54.262904 00280000 ################################################################
2131 13:49:54.263485
2132 13:49:54.996439 00300000 ################################################################
2133 13:49:54.997003
2134 13:49:55.723602 00380000 ################################################################
2135 13:49:55.724259
2136 13:49:56.446458 00400000 ################################################################
2137 13:49:56.447042
2138 13:49:57.186823 00480000 ################################################################
2139 13:49:57.187419
2140 13:49:57.914427 00500000 ################################################################
2141 13:49:57.915081
2142 13:49:58.247384 00580000 ############################# done.
2143 13:49:58.248009
2144 13:49:58.250587 Sending tftp read request... done.
2145 13:49:58.251049
2146 13:49:58.253678 Waiting for the transfer...
2147 13:49:58.254140
2148 13:49:58.254667 00000000 # done.
2149 13:49:58.255215
2150 13:49:58.263715 Command line loaded dynamically from TFTP file: 11299526/tftp-deploy-jg2o9r_s/kernel/cmdline
2151 13:49:58.264285
2152 13:49:58.293500 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11299526/extract-nfsrootfs-n3yohqxt,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2153 13:49:58.294095
2154 13:49:58.299934 ec_init(0): CrosEC protocol v3 supported (256, 256)
2155 13:49:58.303780
2156 13:49:58.306890 Shutting down all USB controllers.
2157 13:49:58.307355
2158 13:49:58.307781 Removing current net device
2159 13:49:58.315068
2160 13:49:58.315697 Finalizing coreboot
2161 13:49:58.316088
2162 13:49:58.321422 Exiting depthcharge with code 4 at timestamp: 30028294
2163 13:49:58.321888
2164 13:49:58.322251
2165 13:49:58.322589 Starting kernel ...
2166 13:49:58.323047
2167 13:49:58.323403
2168 13:49:58.324807 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2169 13:49:58.325611 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2170 13:49:58.326042 Setting prompt string to ['Linux version [0-9]']
2171 13:49:58.326438 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2172 13:49:58.326822 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2174 13:54:17.326519 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2176 13:54:17.327597 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2178 13:54:17.328524 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2181 13:54:17.330000 end: 2 depthcharge-action (duration 00:05:00) [common]
2183 13:54:17.331294 Cleaning after the job
2184 13:54:17.331659 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299526/tftp-deploy-jg2o9r_s/ramdisk
2185 13:54:17.332616 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299526/tftp-deploy-jg2o9r_s/kernel
2186 13:54:17.333921 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299526/tftp-deploy-jg2o9r_s/nfsrootfs
2187 13:54:17.450447 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11299526/tftp-deploy-jg2o9r_s/modules
2188 13:54:17.450909 start: 4.1 power-off (timeout 00:00:30) [common]
2189 13:54:17.451077 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2190 13:54:17.529287 >> Command sent successfully.
2191 13:54:17.534106 Returned 0 in 0 seconds
2192 13:54:17.635250 end: 4.1 power-off (duration 00:00:00) [common]
2194 13:54:17.636901 start: 4.2 read-feedback (timeout 00:10:00) [common]
2195 13:54:17.637360 Listened to connection for namespace 'common' for up to 1s
2197 13:54:17.637739 Listened to connection for namespace 'common' for up to 1s
2198 13:54:18.638714 Finalising connection for namespace 'common'
2199 13:54:18.639432 Disconnecting from shell: Finalise
2200 13:54:18.639915
2201 13:54:18.741102 end: 4.2 read-feedback (duration 00:00:01) [common]
2202 13:54:18.741735 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11299526
2203 13:54:19.248002 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11299526
2204 13:54:19.248199 JobError: Your job cannot terminate cleanly.