Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 16:14:30.551358 lava-dispatcher, installed at version: 2023.08
2 16:14:30.551562 start: 0 validate
3 16:14:30.551750 Start time: 2023-10-20 16:14:30.551742+00:00 (UTC)
4 16:14:30.551865 Using caching service: 'http://localhost/cache/?uri=%s'
5 16:14:30.551994 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 16:14:30.819396 Using caching service: 'http://localhost/cache/?uri=%s'
7 16:14:30.820124 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2644-g8c47415283df%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 16:14:31.089627 Using caching service: 'http://localhost/cache/?uri=%s'
9 16:14:31.090351 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 16:14:31.356820 Using caching service: 'http://localhost/cache/?uri=%s'
11 16:14:31.357501 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2644-g8c47415283df%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 16:14:31.618887 validate duration: 1.07
14 16:14:31.620225 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 16:14:31.620733 start: 1.1 download-retry (timeout 00:10:00) [common]
16 16:14:31.621172 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 16:14:31.621780 Not decompressing ramdisk as can be used compressed.
18 16:14:31.622216 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 16:14:31.622613 saving as /var/lib/lava/dispatcher/tmp/11830987/tftp-deploy-hdvhw1vj/ramdisk/initrd.cpio.gz
20 16:14:31.622947 total size: 5432690 (5 MB)
21 16:14:31.627756 progress 0 % (0 MB)
22 16:14:31.636537 progress 5 % (0 MB)
23 16:14:31.644001 progress 10 % (0 MB)
24 16:14:31.649338 progress 15 % (0 MB)
25 16:14:31.653837 progress 20 % (1 MB)
26 16:14:31.657214 progress 25 % (1 MB)
27 16:14:31.660334 progress 30 % (1 MB)
28 16:14:31.663298 progress 35 % (1 MB)
29 16:14:31.665737 progress 40 % (2 MB)
30 16:14:31.667972 progress 45 % (2 MB)
31 16:14:31.670150 progress 50 % (2 MB)
32 16:14:31.672329 progress 55 % (2 MB)
33 16:14:31.674263 progress 60 % (3 MB)
34 16:14:31.676058 progress 65 % (3 MB)
35 16:14:31.678001 progress 70 % (3 MB)
36 16:14:31.679778 progress 75 % (3 MB)
37 16:14:31.681336 progress 80 % (4 MB)
38 16:14:31.682890 progress 85 % (4 MB)
39 16:14:31.684643 progress 90 % (4 MB)
40 16:14:31.686116 progress 95 % (4 MB)
41 16:14:31.687557 progress 100 % (5 MB)
42 16:14:31.687784 5 MB downloaded in 0.06 s (79.88 MB/s)
43 16:14:31.687949 end: 1.1.1 http-download (duration 00:00:00) [common]
45 16:14:31.688204 end: 1.1 download-retry (duration 00:00:00) [common]
46 16:14:31.688337 start: 1.2 download-retry (timeout 00:10:00) [common]
47 16:14:31.688462 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 16:14:31.688609 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2644-g8c47415283df/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 16:14:31.688685 saving as /var/lib/lava/dispatcher/tmp/11830987/tftp-deploy-hdvhw1vj/kernel/bzImage
50 16:14:31.688747 total size: 8515472 (8 MB)
51 16:14:31.688810 No compression specified
52 16:14:31.689984 progress 0 % (0 MB)
53 16:14:31.692196 progress 5 % (0 MB)
54 16:14:31.694470 progress 10 % (0 MB)
55 16:14:31.696763 progress 15 % (1 MB)
56 16:14:31.699017 progress 20 % (1 MB)
57 16:14:31.701328 progress 25 % (2 MB)
58 16:14:31.703573 progress 30 % (2 MB)
59 16:14:31.705836 progress 35 % (2 MB)
60 16:14:31.708115 progress 40 % (3 MB)
61 16:14:31.710364 progress 45 % (3 MB)
62 16:14:31.712621 progress 50 % (4 MB)
63 16:14:31.714864 progress 55 % (4 MB)
64 16:14:31.717084 progress 60 % (4 MB)
65 16:14:31.719341 progress 65 % (5 MB)
66 16:14:31.721574 progress 70 % (5 MB)
67 16:14:31.723798 progress 75 % (6 MB)
68 16:14:31.726007 progress 80 % (6 MB)
69 16:14:31.728214 progress 85 % (6 MB)
70 16:14:31.730414 progress 90 % (7 MB)
71 16:14:31.732626 progress 95 % (7 MB)
72 16:14:31.734839 progress 100 % (8 MB)
73 16:14:31.735062 8 MB downloaded in 0.05 s (175.36 MB/s)
74 16:14:31.735205 end: 1.2.1 http-download (duration 00:00:00) [common]
76 16:14:31.735431 end: 1.2 download-retry (duration 00:00:00) [common]
77 16:14:31.735517 start: 1.3 download-retry (timeout 00:10:00) [common]
78 16:14:31.735605 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 16:14:31.735776 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 16:14:31.735844 saving as /var/lib/lava/dispatcher/tmp/11830987/tftp-deploy-hdvhw1vj/nfsrootfs/full.rootfs.tar
81 16:14:31.735906 total size: 133380384 (127 MB)
82 16:14:31.735967 Using unxz to decompress xz
83 16:14:31.740199 progress 0 % (0 MB)
84 16:14:32.078775 progress 5 % (6 MB)
85 16:14:32.430469 progress 10 % (12 MB)
86 16:14:32.719679 progress 15 % (19 MB)
87 16:14:32.904221 progress 20 % (25 MB)
88 16:14:33.144910 progress 25 % (31 MB)
89 16:14:33.488849 progress 30 % (38 MB)
90 16:14:33.835841 progress 35 % (44 MB)
91 16:14:34.237804 progress 40 % (50 MB)
92 16:14:34.625255 progress 45 % (57 MB)
93 16:14:34.984314 progress 50 % (63 MB)
94 16:14:35.358998 progress 55 % (69 MB)
95 16:14:35.725981 progress 60 % (76 MB)
96 16:14:36.093299 progress 65 % (82 MB)
97 16:14:36.466636 progress 70 % (89 MB)
98 16:14:36.847284 progress 75 % (95 MB)
99 16:14:37.290882 progress 80 % (101 MB)
100 16:14:37.732928 progress 85 % (108 MB)
101 16:14:38.004387 progress 90 % (114 MB)
102 16:14:38.355045 progress 95 % (120 MB)
103 16:14:38.750091 progress 100 % (127 MB)
104 16:14:38.755427 127 MB downloaded in 7.02 s (18.12 MB/s)
105 16:14:38.755691 end: 1.3.1 http-download (duration 00:00:07) [common]
107 16:14:38.755954 end: 1.3 download-retry (duration 00:00:07) [common]
108 16:14:38.756044 start: 1.4 download-retry (timeout 00:09:53) [common]
109 16:14:38.756129 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 16:14:38.756285 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2644-g8c47415283df/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 16:14:38.756357 saving as /var/lib/lava/dispatcher/tmp/11830987/tftp-deploy-hdvhw1vj/modules/modules.tar
112 16:14:38.756417 total size: 253800 (0 MB)
113 16:14:38.756479 Using unxz to decompress xz
114 16:14:38.760866 progress 12 % (0 MB)
115 16:14:38.761282 progress 25 % (0 MB)
116 16:14:38.761521 progress 38 % (0 MB)
117 16:14:38.763143 progress 51 % (0 MB)
118 16:14:38.765144 progress 64 % (0 MB)
119 16:14:38.767013 progress 77 % (0 MB)
120 16:14:38.768824 progress 90 % (0 MB)
121 16:14:38.770736 progress 100 % (0 MB)
122 16:14:38.776447 0 MB downloaded in 0.02 s (12.09 MB/s)
123 16:14:38.776686 end: 1.4.1 http-download (duration 00:00:00) [common]
125 16:14:38.776943 end: 1.4 download-retry (duration 00:00:00) [common]
126 16:14:38.777039 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 16:14:38.777132 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 16:14:40.995814 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11830987/extract-nfsrootfs-29nq87ml
129 16:14:40.996017 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 16:14:40.996124 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
131 16:14:40.996297 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y
132 16:14:40.996435 makedir: /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin
133 16:14:40.996551 makedir: /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/tests
134 16:14:40.996662 makedir: /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/results
135 16:14:40.996763 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-add-keys
136 16:14:40.996910 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-add-sources
137 16:14:40.997047 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-background-process-start
138 16:14:40.997178 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-background-process-stop
139 16:14:40.997307 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-common-functions
140 16:14:40.997434 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-echo-ipv4
141 16:14:40.997562 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-install-packages
142 16:14:40.997689 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-installed-packages
143 16:14:40.997816 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-os-build
144 16:14:40.997944 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-probe-channel
145 16:14:40.998071 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-probe-ip
146 16:14:40.998197 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-target-ip
147 16:14:40.998323 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-target-mac
148 16:14:40.998448 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-target-storage
149 16:14:40.998578 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-test-case
150 16:14:40.998705 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-test-event
151 16:14:40.998830 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-test-feedback
152 16:14:40.998956 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-test-raise
153 16:14:40.999085 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-test-reference
154 16:14:40.999213 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-test-runner
155 16:14:40.999352 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-test-set
156 16:14:40.999480 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-test-shell
157 16:14:40.999608 Updating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-install-packages (oe)
158 16:14:40.999940 Updating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/bin/lava-installed-packages (oe)
159 16:14:41.000075 Creating /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/environment
160 16:14:41.000178 LAVA metadata
161 16:14:41.000249 - LAVA_JOB_ID=11830987
162 16:14:41.000313 - LAVA_DISPATCHER_IP=192.168.201.1
163 16:14:41.000414 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
164 16:14:41.000482 skipped lava-vland-overlay
165 16:14:41.000557 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 16:14:41.000636 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
167 16:14:41.000697 skipped lava-multinode-overlay
168 16:14:41.000769 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 16:14:41.000846 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
170 16:14:41.000918 Loading test definitions
171 16:14:41.001007 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
172 16:14:41.001079 Using /lava-11830987 at stage 0
173 16:14:41.001391 uuid=11830987_1.5.2.3.1 testdef=None
174 16:14:41.001479 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 16:14:41.001564 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
176 16:14:41.002115 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 16:14:41.002335 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
179 16:14:41.002981 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 16:14:41.003208 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
182 16:14:41.003871 runner path: /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/0/tests/0_dmesg test_uuid 11830987_1.5.2.3.1
183 16:14:41.004029 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 16:14:41.004248 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
186 16:14:41.004321 Using /lava-11830987 at stage 1
187 16:14:41.004629 uuid=11830987_1.5.2.3.5 testdef=None
188 16:14:41.004716 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 16:14:41.004798 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
190 16:14:41.005265 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 16:14:41.005476 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
193 16:14:41.006115 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 16:14:41.006338 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
196 16:14:41.006959 runner path: /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/1/tests/1_bootrr test_uuid 11830987_1.5.2.3.5
197 16:14:41.007111 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 16:14:41.007310 Creating lava-test-runner.conf files
200 16:14:41.007372 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/0 for stage 0
201 16:14:41.007461 - 0_dmesg
202 16:14:41.007544 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11830987/lava-overlay-ci_dqb8y/lava-11830987/1 for stage 1
203 16:14:41.007873 - 1_bootrr
204 16:14:41.007975 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 16:14:41.008061 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
206 16:14:41.015613 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 16:14:41.015769 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
208 16:14:41.015853 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 16:14:41.015937 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 16:14:41.016020 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
211 16:14:41.153545 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 16:14:41.153946 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 16:14:41.154056 extracting modules file /var/lib/lava/dispatcher/tmp/11830987/tftp-deploy-hdvhw1vj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11830987/extract-nfsrootfs-29nq87ml
214 16:14:41.168166 extracting modules file /var/lib/lava/dispatcher/tmp/11830987/tftp-deploy-hdvhw1vj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11830987/extract-overlay-ramdisk-x5z60sk8/ramdisk
215 16:14:41.182018 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 16:14:41.182143 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 16:14:41.182233 [common] Applying overlay to NFS
218 16:14:41.182303 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11830987/compress-overlay-8v2si27_/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11830987/extract-nfsrootfs-29nq87ml
219 16:14:41.190602 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 16:14:41.190727 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 16:14:41.190819 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 16:14:41.190910 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 16:14:41.190985 Building ramdisk /var/lib/lava/dispatcher/tmp/11830987/extract-overlay-ramdisk-x5z60sk8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11830987/extract-overlay-ramdisk-x5z60sk8/ramdisk
224 16:14:41.261918 >> 26197 blocks
225 16:14:41.790237 rename /var/lib/lava/dispatcher/tmp/11830987/extract-overlay-ramdisk-x5z60sk8/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11830987/tftp-deploy-hdvhw1vj/ramdisk/ramdisk.cpio.gz
226 16:14:41.790694 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 16:14:41.790816 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
228 16:14:41.790913 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
229 16:14:41.791008 No mkimage arch provided, not using FIT.
230 16:14:41.791097 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 16:14:41.791180 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 16:14:41.791292 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 16:14:41.791384 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
234 16:14:41.791459 No LXC device requested
235 16:14:41.791537 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 16:14:41.791623 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
237 16:14:41.791751 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 16:14:41.791826 Checking files for TFTP limit of 4294967296 bytes.
239 16:14:41.792235 end: 1 tftp-deploy (duration 00:00:10) [common]
240 16:14:41.792344 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 16:14:41.792439 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 16:14:41.792563 substitutions:
243 16:14:41.792629 - {DTB}: None
244 16:14:41.792689 - {INITRD}: 11830987/tftp-deploy-hdvhw1vj/ramdisk/ramdisk.cpio.gz
245 16:14:41.792748 - {KERNEL}: 11830987/tftp-deploy-hdvhw1vj/kernel/bzImage
246 16:14:41.792805 - {LAVA_MAC}: None
247 16:14:41.792860 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11830987/extract-nfsrootfs-29nq87ml
248 16:14:41.792929 - {NFS_SERVER_IP}: 192.168.201.1
249 16:14:41.792989 - {PRESEED_CONFIG}: None
250 16:14:41.793045 - {PRESEED_LOCAL}: None
251 16:14:41.793100 - {RAMDISK}: 11830987/tftp-deploy-hdvhw1vj/ramdisk/ramdisk.cpio.gz
252 16:14:41.793154 - {ROOT_PART}: None
253 16:14:41.793208 - {ROOT}: None
254 16:14:41.793261 - {SERVER_IP}: 192.168.201.1
255 16:14:41.793314 - {TEE}: None
256 16:14:41.793366 Parsed boot commands:
257 16:14:41.793418 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 16:14:41.793597 Parsed boot commands: tftpboot 192.168.201.1 11830987/tftp-deploy-hdvhw1vj/kernel/bzImage 11830987/tftp-deploy-hdvhw1vj/kernel/cmdline 11830987/tftp-deploy-hdvhw1vj/ramdisk/ramdisk.cpio.gz
259 16:14:41.793687 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 16:14:41.793773 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 16:14:41.793865 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 16:14:41.793948 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 16:14:41.794016 Not connected, no need to disconnect.
264 16:14:41.794090 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 16:14:41.794170 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 16:14:41.794237 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-14'
267 16:14:41.798328 Setting prompt string to ['lava-test: # ']
268 16:14:41.798682 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 16:14:41.798791 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 16:14:41.798889 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 16:14:41.798981 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 16:14:41.799174 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=reboot'
273 16:14:46.952680 >> Command sent successfully.
274 16:14:46.963114 Returned 0 in 5 seconds
275 16:14:47.064320 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 16:14:47.065756 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 16:14:47.066263 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 16:14:47.066704 Setting prompt string to 'Starting depthcharge on Voema...'
280 16:14:47.067036 Changing prompt to 'Starting depthcharge on Voema...'
281 16:14:47.067374 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 16:14:47.068566 [Enter `^Ec?' for help]
283 16:14:48.619888
284 16:14:48.620627
285 16:14:48.630034 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 16:14:48.636268 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
287 16:14:48.639705 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 16:14:48.643297 CPU: AES supported, TXT NOT supported, VT supported
289 16:14:48.650007 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 16:14:48.653426 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 16:14:48.660097 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 16:14:48.662911 VBOOT: Loading verstage.
293 16:14:48.666436 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 16:14:48.672930 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 16:14:48.676650 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 16:14:48.686965 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 16:14:48.693298 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 16:14:48.693819
299 16:14:48.694152
300 16:14:48.707309 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 16:14:48.720422 Probing TPM: . done!
302 16:14:48.723377 TPM ready after 0 ms
303 16:14:48.727015 Connected to device vid:did:rid of 1ae0:0028:00
304 16:14:48.738524 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
305 16:14:48.744604 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 16:14:48.748301 Initialized TPM device CR50 revision 0
307 16:14:48.804454 tlcl_send_startup: Startup return code is 0
308 16:14:48.804957 TPM: setup succeeded
309 16:14:48.819079 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 16:14:48.833231 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 16:14:48.846170 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 16:14:48.856400 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 16:14:48.859476 Chrome EC: UHEPI supported
314 16:14:48.863028 Phase 1
315 16:14:48.866103 FMAP: area GBB found @ 1805000 (458752 bytes)
316 16:14:48.876078 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 16:14:48.882638 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 16:14:48.889256 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 16:14:48.896049 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 16:14:48.899557 Recovery requested (1009000e)
321 16:14:48.902799 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 16:14:48.914193 tlcl_extend: response is 0
323 16:14:48.920517 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 16:14:48.930940 tlcl_extend: response is 0
325 16:14:48.937938 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 16:14:48.944220 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 16:14:48.950999 BS: verstage times (exec / console): total (unknown) / 142 ms
328 16:14:48.951426
329 16:14:48.951971
330 16:14:48.963842 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 16:14:48.971017 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 16:14:48.974387 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 16:14:48.977547 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 16:14:48.984232 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 16:14:48.986769 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 16:14:48.990520 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
337 16:14:48.993938 TCO_STS: 0000 0000
338 16:14:48.996804 GEN_PMCON: d0015038 00002200
339 16:14:49.000563 GBLRST_CAUSE: 00000000 00000000
340 16:14:49.003409 HPR_CAUSE0: 00000000
341 16:14:49.003963 prev_sleep_state 5
342 16:14:49.006978 Boot Count incremented to 12845
343 16:14:49.013218 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 16:14:49.019925 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 16:14:49.030601 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 16:14:49.036556 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 16:14:49.039982 Chrome EC: UHEPI supported
348 16:14:49.046923 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 16:14:49.057830 Probing TPM: done!
350 16:14:49.064215 Connected to device vid:did:rid of 1ae0:0028:00
351 16:14:49.073762 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
352 16:14:49.077345 Initialized TPM device CR50 revision 0
353 16:14:49.093101 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 16:14:49.099478 MRC: Hash idx 0x100b comparison successful.
355 16:14:49.102998 MRC cache found, size faa8
356 16:14:49.103736 bootmode is set to: 2
357 16:14:49.106242 SPD index = 2
358 16:14:49.112699 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 16:14:49.115900 SPD: module type is LPDDR4X
360 16:14:49.119182 SPD: module part number is MT53D1G64D4NW-046
361 16:14:49.125422 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
362 16:14:49.128741 SPD: device width 16 bits, bus width 16 bits
363 16:14:49.135885 SPD: module size is 2048 MB (per channel)
364 16:14:49.565729 CBMEM:
365 16:14:49.569064 IMD: root @ 0x76fff000 254 entries.
366 16:14:49.572474 IMD: root @ 0x76ffec00 62 entries.
367 16:14:49.576170 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 16:14:49.582094 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 16:14:49.585803 External stage cache:
370 16:14:49.589375 IMD: root @ 0x7b3ff000 254 entries.
371 16:14:49.592014 IMD: root @ 0x7b3fec00 62 entries.
372 16:14:49.607720 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 16:14:49.613983 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 16:14:49.620220 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 16:14:49.634227 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 16:14:49.640818 cse_lite: Skip switching to RW in the recovery path
377 16:14:49.641242 8 DIMMs found
378 16:14:49.641584 SMM Memory Map
379 16:14:49.647313 SMRAM : 0x7b000000 0x800000
380 16:14:49.650609 Subregion 0: 0x7b000000 0x200000
381 16:14:49.654401 Subregion 1: 0x7b200000 0x200000
382 16:14:49.657659 Subregion 2: 0x7b400000 0x400000
383 16:14:49.658234 top_of_ram = 0x77000000
384 16:14:49.663812 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 16:14:49.670351 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 16:14:49.673749 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 16:14:49.680484 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 16:14:49.686605 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 16:14:49.693510 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 16:14:49.703829 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 16:14:49.710955 Processing 211 relocs. Offset value of 0x74c0b000
392 16:14:49.717704 BS: romstage times (exec / console): total (unknown) / 277 ms
393 16:14:49.722647
394 16:14:49.723308
395 16:14:49.732302 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 16:14:49.735505 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 16:14:49.745501 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 16:14:49.752000 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 16:14:49.758526 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 16:14:49.765176 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 16:14:49.809558 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 16:14:49.815749 Processing 5008 relocs. Offset value of 0x75d98000
403 16:14:49.819432 BS: postcar times (exec / console): total (unknown) / 59 ms
404 16:14:49.822444
405 16:14:49.823120
406 16:14:49.832299 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 16:14:49.832737 Normal boot
408 16:14:49.835982 FW_CONFIG value is 0x804c02
409 16:14:49.839415 PCI: 00:07.0 disabled by fw_config
410 16:14:49.842555 PCI: 00:07.1 disabled by fw_config
411 16:14:49.846222 PCI: 00:0d.2 disabled by fw_config
412 16:14:49.852608 PCI: 00:1c.7 disabled by fw_config
413 16:14:49.855367 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 16:14:49.862505 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 16:14:49.869245 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 16:14:49.872517 GENERIC: 0.0 disabled by fw_config
417 16:14:49.875517 GENERIC: 1.0 disabled by fw_config
418 16:14:49.878808 fw_config match found: DB_USB=USB3_ACTIVE
419 16:14:49.882093 fw_config match found: DB_USB=USB3_ACTIVE
420 16:14:49.885419 fw_config match found: DB_USB=USB3_ACTIVE
421 16:14:49.892005 fw_config match found: DB_USB=USB3_ACTIVE
422 16:14:49.895584 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 16:14:49.905340 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 16:14:49.911421 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 16:14:49.918586 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 16:14:49.924739 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 16:14:49.928013 microcode: Update skipped, already up-to-date
428 16:14:49.935332 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 16:14:49.963430 Detected 4 core, 8 thread CPU.
430 16:14:49.966757 Setting up SMI for CPU
431 16:14:49.969279 IED base = 0x7b400000
432 16:14:49.972765 IED size = 0x00400000
433 16:14:49.973283 Will perform SMM setup.
434 16:14:49.979327 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
435 16:14:49.986671 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 16:14:49.992439 Processing 16 relocs. Offset value of 0x00030000
437 16:14:49.996280 Attempting to start 7 APs
438 16:14:49.999797 Waiting for 10ms after sending INIT.
439 16:14:50.014742 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
440 16:14:50.015271 done.
441 16:14:50.018549 AP: slot 3 apic_id 3.
442 16:14:50.021514 AP: slot 6 apic_id 2.
443 16:14:50.022126 AP: slot 2 apic_id 7.
444 16:14:50.024669 AP: slot 7 apic_id 5.
445 16:14:50.028240 AP: slot 5 apic_id 6.
446 16:14:50.028669 AP: slot 4 apic_id 4.
447 16:14:50.034615 Waiting for 2nd SIPI to complete...done.
448 16:14:50.041174 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 16:14:50.048299 Processing 13 relocs. Offset value of 0x00038000
450 16:14:50.052069 Unable to locate Global NVS
451 16:14:50.057662 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 16:14:50.061049 Installing permanent SMM handler to 0x7b000000
453 16:14:50.071539 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 16:14:50.074324 Processing 794 relocs. Offset value of 0x7b010000
455 16:14:50.084123 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 16:14:50.087679 Processing 13 relocs. Offset value of 0x7b008000
457 16:14:50.094745 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 16:14:50.100612 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 16:14:50.104046 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 16:14:50.110849 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 16:14:50.117515 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 16:14:50.123509 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 16:14:50.130384 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 16:14:50.133927 Unable to locate Global NVS
465 16:14:50.140956 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 16:14:50.143619 Clearing SMI status registers
467 16:14:50.144178 SMI_STS: PM1
468 16:14:50.147070 PM1_STS: PWRBTN
469 16:14:50.153573 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 16:14:50.157236 In relocation handler: CPU 0
471 16:14:50.160380 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 16:14:50.166474 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 16:14:50.169832 Relocation complete.
474 16:14:50.176472 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 16:14:50.179990 In relocation handler: CPU 1
476 16:14:50.183254 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 16:14:50.186767 Relocation complete.
478 16:14:50.193210 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
479 16:14:50.196821 In relocation handler: CPU 7
480 16:14:50.199828 New SMBASE=0x7affe400 IEDBASE=0x7b400000
481 16:14:50.202889 Relocation complete.
482 16:14:50.209679 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
483 16:14:50.212261 In relocation handler: CPU 4
484 16:14:50.215749 New SMBASE=0x7afff000 IEDBASE=0x7b400000
485 16:14:50.219192 Writing SMRR. base = 0x7b000006, mask=0xff800c00
486 16:14:50.222515 Relocation complete.
487 16:14:50.229151 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
488 16:14:50.232382 In relocation handler: CPU 6
489 16:14:50.235776 New SMBASE=0x7affe800 IEDBASE=0x7b400000
490 16:14:50.242001 Writing SMRR. base = 0x7b000006, mask=0xff800c00
491 16:14:50.245259 Relocation complete.
492 16:14:50.252282 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
493 16:14:50.255467 In relocation handler: CPU 3
494 16:14:50.258941 New SMBASE=0x7afff400 IEDBASE=0x7b400000
495 16:14:50.262207 Relocation complete.
496 16:14:50.268368 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
497 16:14:50.271698 In relocation handler: CPU 2
498 16:14:50.274863 New SMBASE=0x7afff800 IEDBASE=0x7b400000
499 16:14:50.278457 Relocation complete.
500 16:14:50.284967 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
501 16:14:50.288035 In relocation handler: CPU 5
502 16:14:50.291155 New SMBASE=0x7affec00 IEDBASE=0x7b400000
503 16:14:50.295020 Writing SMRR. base = 0x7b000006, mask=0xff800c00
504 16:14:50.298018 Relocation complete.
505 16:14:50.301093 Initializing CPU #0
506 16:14:50.304555 CPU: vendor Intel device 806c1
507 16:14:50.308150 CPU: family 06, model 8c, stepping 01
508 16:14:50.310997 Clearing out pending MCEs
509 16:14:50.311411 Setting up local APIC...
510 16:14:50.314433 apic_id: 0x00 done.
511 16:14:50.317972 Turbo is available but hidden
512 16:14:50.320966 Turbo is available and visible
513 16:14:50.324355 microcode: Update skipped, already up-to-date
514 16:14:50.327627 CPU #0 initialized
515 16:14:50.331007 Initializing CPU #7
516 16:14:50.331457 Initializing CPU #5
517 16:14:50.334209 Initializing CPU #2
518 16:14:50.337573 CPU: vendor Intel device 806c1
519 16:14:50.341071 CPU: family 06, model 8c, stepping 01
520 16:14:50.344599 CPU: vendor Intel device 806c1
521 16:14:50.348037 CPU: family 06, model 8c, stepping 01
522 16:14:50.350780 Clearing out pending MCEs
523 16:14:50.354427 Clearing out pending MCEs
524 16:14:50.354808 Setting up local APIC...
525 16:14:50.357964 Initializing CPU #4
526 16:14:50.361179 CPU: vendor Intel device 806c1
527 16:14:50.364573 CPU: family 06, model 8c, stepping 01
528 16:14:50.367967 CPU: vendor Intel device 806c1
529 16:14:50.370697 CPU: family 06, model 8c, stepping 01
530 16:14:50.374224 Initializing CPU #3
531 16:14:50.378300 Initializing CPU #6
532 16:14:50.378790 Initializing CPU #1
533 16:14:50.381563 CPU: vendor Intel device 806c1
534 16:14:50.385077 CPU: family 06, model 8c, stepping 01
535 16:14:50.388463 CPU: vendor Intel device 806c1
536 16:14:50.391726 CPU: family 06, model 8c, stepping 01
537 16:14:50.394835 Clearing out pending MCEs
538 16:14:50.398412 CPU: vendor Intel device 806c1
539 16:14:50.401648 CPU: family 06, model 8c, stepping 01
540 16:14:50.404844 Setting up local APIC...
541 16:14:50.405299 apic_id: 0x06 done.
542 16:14:50.408223 Setting up local APIC...
543 16:14:50.411592 Clearing out pending MCEs
544 16:14:50.414760 apic_id: 0x02 done.
545 16:14:50.415181 Setting up local APIC...
546 16:14:50.421176 microcode: Update skipped, already up-to-date
547 16:14:50.421696 apic_id: 0x03 done.
548 16:14:50.424960 CPU #6 initialized
549 16:14:50.428223 microcode: Update skipped, already up-to-date
550 16:14:50.435052 microcode: Update skipped, already up-to-date
551 16:14:50.435669 apic_id: 0x07 done.
552 16:14:50.437794 CPU #5 initialized
553 16:14:50.441393 microcode: Update skipped, already up-to-date
554 16:14:50.444758 Clearing out pending MCEs
555 16:14:50.448150 Clearing out pending MCEs
556 16:14:50.451624 Clearing out pending MCEs
557 16:14:50.452052 Setting up local APIC...
558 16:14:50.455176 CPU #3 initialized
559 16:14:50.458058 apic_id: 0x04 done.
560 16:14:50.461064 Setting up local APIC...
561 16:14:50.461488 CPU #2 initialized
562 16:14:50.464491 Setting up local APIC...
563 16:14:50.468169 apic_id: 0x05 done.
564 16:14:50.470746 microcode: Update skipped, already up-to-date
565 16:14:50.474240 microcode: Update skipped, already up-to-date
566 16:14:50.477645 CPU #4 initialized
567 16:14:50.481362 apic_id: 0x01 done.
568 16:14:50.481894 CPU #7 initialized
569 16:14:50.487478 microcode: Update skipped, already up-to-date
570 16:14:50.488078 CPU #1 initialized
571 16:14:50.490785 bsp_do_flight_plan done after 454 msecs.
572 16:14:50.494407 CPU: frequency set to 4400 MHz
573 16:14:50.497551 Enabling SMIs.
574 16:14:50.504290 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
575 16:14:50.519364 SATAXPCIE1 indicates PCIe NVMe is present
576 16:14:50.522778 Probing TPM: done!
577 16:14:50.526034 Connected to device vid:did:rid of 1ae0:0028:00
578 16:14:50.536616 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
579 16:14:50.540059 Initialized TPM device CR50 revision 0
580 16:14:50.543495 Enabling S0i3.4
581 16:14:50.550598 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 16:14:50.553544 Found a VBT of 8704 bytes after decompression
583 16:14:50.560619 cse_lite: CSE RO boot. HybridStorageMode disabled
584 16:14:50.566799 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 16:14:50.641780 FSPS returned 0
586 16:14:50.645225 Executing Phase 1 of FspMultiPhaseSiInit
587 16:14:50.655352 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 16:14:50.658762 port C0 DISC req: usage 1 usb3 1 usb2 5
589 16:14:50.662136 Raw Buffer output 0 00000511
590 16:14:50.665294 Raw Buffer output 1 00000000
591 16:14:50.668631 pmc_send_ipc_cmd succeeded
592 16:14:50.675723 port C1 DISC req: usage 1 usb3 2 usb2 3
593 16:14:50.676243 Raw Buffer output 0 00000321
594 16:14:50.678915 Raw Buffer output 1 00000000
595 16:14:50.683083 pmc_send_ipc_cmd succeeded
596 16:14:50.688068 Detected 4 core, 8 thread CPU.
597 16:14:50.691502 Detected 4 core, 8 thread CPU.
598 16:14:50.892115 Display FSP Version Info HOB
599 16:14:50.894881 Reference Code - CPU = a.0.4c.31
600 16:14:50.898132 uCode Version = 0.0.0.86
601 16:14:50.901346 TXT ACM version = ff.ff.ff.ffff
602 16:14:50.905101 Reference Code - ME = a.0.4c.31
603 16:14:50.908344 MEBx version = 0.0.0.0
604 16:14:50.911029 ME Firmware Version = Consumer SKU
605 16:14:50.914334 Reference Code - PCH = a.0.4c.31
606 16:14:50.917547 PCH-CRID Status = Disabled
607 16:14:50.921131 PCH-CRID Original Value = ff.ff.ff.ffff
608 16:14:50.924099 PCH-CRID New Value = ff.ff.ff.ffff
609 16:14:50.928043 OPROM - RST - RAID = ff.ff.ff.ffff
610 16:14:50.930885 PCH Hsio Version = 4.0.0.0
611 16:14:50.934516 Reference Code - SA - System Agent = a.0.4c.31
612 16:14:50.937921 Reference Code - MRC = 2.0.0.1
613 16:14:50.941064 SA - PCIe Version = a.0.4c.31
614 16:14:50.944498 SA-CRID Status = Disabled
615 16:14:50.948002 SA-CRID Original Value = 0.0.0.1
616 16:14:50.951353 SA-CRID New Value = 0.0.0.1
617 16:14:50.954761 OPROM - VBIOS = ff.ff.ff.ffff
618 16:14:50.959320 IO Manageability Engine FW Version = 11.1.4.0
619 16:14:50.962643 PHY Build Version = 0.0.0.e0
620 16:14:50.966502 Thunderbolt(TM) FW Version = 0.0.0.0
621 16:14:50.968870 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
622 16:14:50.972898 ITSS IRQ Polarities Before:
623 16:14:50.976110 IPC0: 0xffffffff
624 16:14:50.976542 IPC1: 0xffffffff
625 16:14:50.979097 IPC2: 0xffffffff
626 16:14:50.979525 IPC3: 0xffffffff
627 16:14:50.982755 ITSS IRQ Polarities After:
628 16:14:50.985315 IPC0: 0xffffffff
629 16:14:50.985779 IPC1: 0xffffffff
630 16:14:50.988679 IPC2: 0xffffffff
631 16:14:50.989111 IPC3: 0xffffffff
632 16:14:50.995626 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 16:14:51.005689 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 16:14:51.018545 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 16:14:51.032114 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 16:14:51.038205 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
637 16:14:51.038633 Enumerating buses...
638 16:14:51.045636 Show all devs... Before device enumeration.
639 16:14:51.046271 Root Device: enabled 1
640 16:14:51.048259 DOMAIN: 0000: enabled 1
641 16:14:51.051845 CPU_CLUSTER: 0: enabled 1
642 16:14:51.054620 PCI: 00:00.0: enabled 1
643 16:14:51.055042 PCI: 00:02.0: enabled 1
644 16:14:51.058310 PCI: 00:04.0: enabled 1
645 16:14:51.061540 PCI: 00:05.0: enabled 1
646 16:14:51.061964 PCI: 00:06.0: enabled 0
647 16:14:51.064627 PCI: 00:07.0: enabled 0
648 16:14:51.068271 PCI: 00:07.1: enabled 0
649 16:14:51.071502 PCI: 00:07.2: enabled 0
650 16:14:51.071962 PCI: 00:07.3: enabled 0
651 16:14:51.074985 PCI: 00:08.0: enabled 1
652 16:14:51.078363 PCI: 00:09.0: enabled 0
653 16:14:51.081946 PCI: 00:0a.0: enabled 0
654 16:14:51.082472 PCI: 00:0d.0: enabled 1
655 16:14:51.084718 PCI: 00:0d.1: enabled 0
656 16:14:51.088097 PCI: 00:0d.2: enabled 0
657 16:14:51.091481 PCI: 00:0d.3: enabled 0
658 16:14:51.092093 PCI: 00:0e.0: enabled 0
659 16:14:51.094326 PCI: 00:10.2: enabled 1
660 16:14:51.097666 PCI: 00:10.6: enabled 0
661 16:14:51.101379 PCI: 00:10.7: enabled 0
662 16:14:51.101801 PCI: 00:12.0: enabled 0
663 16:14:51.104595 PCI: 00:12.6: enabled 0
664 16:14:51.107422 PCI: 00:13.0: enabled 0
665 16:14:51.110915 PCI: 00:14.0: enabled 1
666 16:14:51.111334 PCI: 00:14.1: enabled 0
667 16:14:51.114220 PCI: 00:14.2: enabled 1
668 16:14:51.117709 PCI: 00:14.3: enabled 1
669 16:14:51.118287 PCI: 00:15.0: enabled 1
670 16:14:51.121281 PCI: 00:15.1: enabled 1
671 16:14:51.124184 PCI: 00:15.2: enabled 1
672 16:14:51.127747 PCI: 00:15.3: enabled 1
673 16:14:51.128296 PCI: 00:16.0: enabled 1
674 16:14:51.130998 PCI: 00:16.1: enabled 0
675 16:14:51.134454 PCI: 00:16.2: enabled 0
676 16:14:51.137636 PCI: 00:16.3: enabled 0
677 16:14:51.138108 PCI: 00:16.4: enabled 0
678 16:14:51.140554 PCI: 00:16.5: enabled 0
679 16:14:51.143969 PCI: 00:17.0: enabled 1
680 16:14:51.147317 PCI: 00:19.0: enabled 0
681 16:14:51.147803 PCI: 00:19.1: enabled 1
682 16:14:51.150551 PCI: 00:19.2: enabled 0
683 16:14:51.154045 PCI: 00:1c.0: enabled 1
684 16:14:51.156870 PCI: 00:1c.1: enabled 0
685 16:14:51.157293 PCI: 00:1c.2: enabled 0
686 16:14:51.160769 PCI: 00:1c.3: enabled 0
687 16:14:51.163562 PCI: 00:1c.4: enabled 0
688 16:14:51.166873 PCI: 00:1c.5: enabled 0
689 16:14:51.167293 PCI: 00:1c.6: enabled 1
690 16:14:51.170734 PCI: 00:1c.7: enabled 0
691 16:14:51.173834 PCI: 00:1d.0: enabled 1
692 16:14:51.174254 PCI: 00:1d.1: enabled 0
693 16:14:51.176741 PCI: 00:1d.2: enabled 1
694 16:14:51.180355 PCI: 00:1d.3: enabled 0
695 16:14:51.183367 PCI: 00:1e.0: enabled 1
696 16:14:51.186808 PCI: 00:1e.1: enabled 0
697 16:14:51.187318 PCI: 00:1e.2: enabled 1
698 16:14:51.189972 PCI: 00:1e.3: enabled 1
699 16:14:51.193250 PCI: 00:1f.0: enabled 1
700 16:14:51.193679 PCI: 00:1f.1: enabled 0
701 16:14:51.196933 PCI: 00:1f.2: enabled 1
702 16:14:51.199615 PCI: 00:1f.3: enabled 1
703 16:14:51.203254 PCI: 00:1f.4: enabled 0
704 16:14:51.203830 PCI: 00:1f.5: enabled 1
705 16:14:51.206208 PCI: 00:1f.6: enabled 0
706 16:14:51.209775 PCI: 00:1f.7: enabled 0
707 16:14:51.213367 APIC: 00: enabled 1
708 16:14:51.213795 GENERIC: 0.0: enabled 1
709 16:14:51.216347 GENERIC: 0.0: enabled 1
710 16:14:51.219538 GENERIC: 1.0: enabled 1
711 16:14:51.220009 GENERIC: 0.0: enabled 1
712 16:14:51.222980 GENERIC: 1.0: enabled 1
713 16:14:51.226415 USB0 port 0: enabled 1
714 16:14:51.229884 GENERIC: 0.0: enabled 1
715 16:14:51.230305 USB0 port 0: enabled 1
716 16:14:51.233265 GENERIC: 0.0: enabled 1
717 16:14:51.236148 I2C: 00:1a: enabled 1
718 16:14:51.236569 I2C: 00:31: enabled 1
719 16:14:51.239698 I2C: 00:32: enabled 1
720 16:14:51.243127 I2C: 00:10: enabled 1
721 16:14:51.246261 I2C: 00:15: enabled 1
722 16:14:51.246686 GENERIC: 0.0: enabled 0
723 16:14:51.250007 GENERIC: 1.0: enabled 0
724 16:14:51.253453 GENERIC: 0.0: enabled 1
725 16:14:51.253991 SPI: 00: enabled 1
726 16:14:51.255879 SPI: 00: enabled 1
727 16:14:51.259533 PNP: 0c09.0: enabled 1
728 16:14:51.259991 GENERIC: 0.0: enabled 1
729 16:14:51.263133 USB3 port 0: enabled 1
730 16:14:51.265869 USB3 port 1: enabled 1
731 16:14:51.266293 USB3 port 2: enabled 0
732 16:14:51.269222 USB3 port 3: enabled 0
733 16:14:51.272685 USB2 port 0: enabled 0
734 16:14:51.276121 USB2 port 1: enabled 1
735 16:14:51.276541 USB2 port 2: enabled 1
736 16:14:51.279425 USB2 port 3: enabled 0
737 16:14:51.282898 USB2 port 4: enabled 1
738 16:14:51.283444 USB2 port 5: enabled 0
739 16:14:51.286063 USB2 port 6: enabled 0
740 16:14:51.289270 USB2 port 7: enabled 0
741 16:14:51.292366 USB2 port 8: enabled 0
742 16:14:51.292860 USB2 port 9: enabled 0
743 16:14:51.295832 USB3 port 0: enabled 0
744 16:14:51.299180 USB3 port 1: enabled 1
745 16:14:51.299748 USB3 port 2: enabled 0
746 16:14:51.302433 USB3 port 3: enabled 0
747 16:14:51.305698 GENERIC: 0.0: enabled 1
748 16:14:51.308736 GENERIC: 1.0: enabled 1
749 16:14:51.309161 APIC: 01: enabled 1
750 16:14:51.312518 APIC: 07: enabled 1
751 16:14:51.312937 APIC: 03: enabled 1
752 16:14:51.315765 APIC: 04: enabled 1
753 16:14:51.319105 APIC: 06: enabled 1
754 16:14:51.319686 APIC: 02: enabled 1
755 16:14:51.322401 APIC: 05: enabled 1
756 16:14:51.325259 Compare with tree...
757 16:14:51.325680 Root Device: enabled 1
758 16:14:51.328652 DOMAIN: 0000: enabled 1
759 16:14:51.331919 PCI: 00:00.0: enabled 1
760 16:14:51.335568 PCI: 00:02.0: enabled 1
761 16:14:51.336030 PCI: 00:04.0: enabled 1
762 16:14:51.338565 GENERIC: 0.0: enabled 1
763 16:14:51.341666 PCI: 00:05.0: enabled 1
764 16:14:51.345177 PCI: 00:06.0: enabled 0
765 16:14:51.348443 PCI: 00:07.0: enabled 0
766 16:14:51.351850 GENERIC: 0.0: enabled 1
767 16:14:51.352281 PCI: 00:07.1: enabled 0
768 16:14:51.355162 GENERIC: 1.0: enabled 1
769 16:14:51.358626 PCI: 00:07.2: enabled 0
770 16:14:51.362056 GENERIC: 0.0: enabled 1
771 16:14:51.364943 PCI: 00:07.3: enabled 0
772 16:14:51.365370 GENERIC: 1.0: enabled 1
773 16:14:51.368219 PCI: 00:08.0: enabled 1
774 16:14:51.371774 PCI: 00:09.0: enabled 0
775 16:14:51.374943 PCI: 00:0a.0: enabled 0
776 16:14:51.378055 PCI: 00:0d.0: enabled 1
777 16:14:51.378527 USB0 port 0: enabled 1
778 16:14:51.381876 USB3 port 0: enabled 1
779 16:14:51.384947 USB3 port 1: enabled 1
780 16:14:51.388190 USB3 port 2: enabled 0
781 16:14:51.391611 USB3 port 3: enabled 0
782 16:14:51.395287 PCI: 00:0d.1: enabled 0
783 16:14:51.396048 PCI: 00:0d.2: enabled 0
784 16:14:51.398078 GENERIC: 0.0: enabled 1
785 16:14:51.401075 PCI: 00:0d.3: enabled 0
786 16:14:51.404593 PCI: 00:0e.0: enabled 0
787 16:14:51.407993 PCI: 00:10.2: enabled 1
788 16:14:51.408512 PCI: 00:10.6: enabled 0
789 16:14:51.411460 PCI: 00:10.7: enabled 0
790 16:14:51.414681 PCI: 00:12.0: enabled 0
791 16:14:51.418176 PCI: 00:12.6: enabled 0
792 16:14:51.420983 PCI: 00:13.0: enabled 0
793 16:14:51.421408 PCI: 00:14.0: enabled 1
794 16:14:51.424376 USB0 port 0: enabled 1
795 16:14:51.428011 USB2 port 0: enabled 0
796 16:14:51.431707 USB2 port 1: enabled 1
797 16:14:51.434706 USB2 port 2: enabled 1
798 16:14:51.435317 USB2 port 3: enabled 0
799 16:14:51.438168 USB2 port 4: enabled 1
800 16:14:51.440906 USB2 port 5: enabled 0
801 16:14:51.444090 USB2 port 6: enabled 0
802 16:14:51.447556 USB2 port 7: enabled 0
803 16:14:51.451083 USB2 port 8: enabled 0
804 16:14:51.451608 USB2 port 9: enabled 0
805 16:14:51.454375 USB3 port 0: enabled 0
806 16:14:51.458099 USB3 port 1: enabled 1
807 16:14:51.461137 USB3 port 2: enabled 0
808 16:14:51.464541 USB3 port 3: enabled 0
809 16:14:51.467175 PCI: 00:14.1: enabled 0
810 16:14:51.467761 PCI: 00:14.2: enabled 1
811 16:14:51.470465 PCI: 00:14.3: enabled 1
812 16:14:51.473678 GENERIC: 0.0: enabled 1
813 16:14:51.476874 PCI: 00:15.0: enabled 1
814 16:14:51.480616 I2C: 00:1a: enabled 1
815 16:14:51.481234 I2C: 00:31: enabled 1
816 16:14:51.484086 I2C: 00:32: enabled 1
817 16:14:51.487150 PCI: 00:15.1: enabled 1
818 16:14:51.490895 I2C: 00:10: enabled 1
819 16:14:51.491436 PCI: 00:15.2: enabled 1
820 16:14:51.493722 PCI: 00:15.3: enabled 1
821 16:14:51.497091 PCI: 00:16.0: enabled 1
822 16:14:51.500711 PCI: 00:16.1: enabled 0
823 16:14:51.504101 PCI: 00:16.2: enabled 0
824 16:14:51.504622 PCI: 00:16.3: enabled 0
825 16:14:51.507110 PCI: 00:16.4: enabled 0
826 16:14:51.510618 PCI: 00:16.5: enabled 0
827 16:14:51.513671 PCI: 00:17.0: enabled 1
828 16:14:51.517356 PCI: 00:19.0: enabled 0
829 16:14:51.517933 PCI: 00:19.1: enabled 1
830 16:14:51.519935 I2C: 00:15: enabled 1
831 16:14:51.523560 PCI: 00:19.2: enabled 0
832 16:14:51.526593 PCI: 00:1d.0: enabled 1
833 16:14:51.530341 GENERIC: 0.0: enabled 1
834 16:14:51.530813 PCI: 00:1e.0: enabled 1
835 16:14:51.532987 PCI: 00:1e.1: enabled 0
836 16:14:51.536356 PCI: 00:1e.2: enabled 1
837 16:14:51.539818 SPI: 00: enabled 1
838 16:14:51.543089 PCI: 00:1e.3: enabled 1
839 16:14:51.543615 SPI: 00: enabled 1
840 16:14:51.546306 PCI: 00:1f.0: enabled 1
841 16:14:51.549678 PNP: 0c09.0: enabled 1
842 16:14:51.552929 PCI: 00:1f.1: enabled 0
843 16:14:51.553176 PCI: 00:1f.2: enabled 1
844 16:14:51.595765 GENERIC: 0.0: enabled 1
845 16:14:51.596553 GENERIC: 0.0: enabled 1
846 16:14:51.597289 GENERIC: 1.0: enabled 1
847 16:14:51.597654 PCI: 00:1f.3: enabled 1
848 16:14:51.597971 PCI: 00:1f.4: enabled 0
849 16:14:51.598272 PCI: 00:1f.5: enabled 1
850 16:14:51.598567 PCI: 00:1f.6: enabled 0
851 16:14:51.598860 PCI: 00:1f.7: enabled 0
852 16:14:51.599146 CPU_CLUSTER: 0: enabled 1
853 16:14:51.599432 APIC: 00: enabled 1
854 16:14:51.599771 APIC: 01: enabled 1
855 16:14:51.600069 APIC: 07: enabled 1
856 16:14:51.600350 APIC: 03: enabled 1
857 16:14:51.600707 APIC: 04: enabled 1
858 16:14:51.601050 APIC: 06: enabled 1
859 16:14:51.604432 APIC: 02: enabled 1
860 16:14:51.604859 APIC: 05: enabled 1
861 16:14:51.607898 Root Device scanning...
862 16:14:51.608319 scan_static_bus for Root Device
863 16:14:51.608657 DOMAIN: 0000 enabled
864 16:14:51.611196 CPU_CLUSTER: 0 enabled
865 16:14:51.611617 DOMAIN: 0000 scanning...
866 16:14:51.614138 PCI: pci_scan_bus for bus 00
867 16:14:51.617395 PCI: 00:00.0 [8086/0000] ops
868 16:14:51.621630 PCI: 00:00.0 [8086/9a12] enabled
869 16:14:51.625383 PCI: 00:02.0 [8086/0000] bus ops
870 16:14:51.628612 PCI: 00:02.0 [8086/9a40] enabled
871 16:14:51.631319 PCI: 00:04.0 [8086/0000] bus ops
872 16:14:51.634808 PCI: 00:04.0 [8086/9a03] enabled
873 16:14:51.638173 PCI: 00:05.0 [8086/9a19] enabled
874 16:14:51.641036 PCI: 00:07.0 [0000/0000] hidden
875 16:14:51.644573 PCI: 00:08.0 [8086/9a11] enabled
876 16:14:51.647985 PCI: 00:0a.0 [8086/9a0d] disabled
877 16:14:51.651352 PCI: 00:0d.0 [8086/0000] bus ops
878 16:14:51.654684 PCI: 00:0d.0 [8086/9a13] enabled
879 16:14:51.658023 PCI: 00:14.0 [8086/0000] bus ops
880 16:14:51.661162 PCI: 00:14.0 [8086/a0ed] enabled
881 16:14:51.664560 PCI: 00:14.2 [8086/a0ef] enabled
882 16:14:51.667306 PCI: 00:14.3 [8086/0000] bus ops
883 16:14:51.671078 PCI: 00:14.3 [8086/a0f0] enabled
884 16:14:51.674202 PCI: 00:15.0 [8086/0000] bus ops
885 16:14:51.678006 PCI: 00:15.0 [8086/a0e8] enabled
886 16:14:51.680969 PCI: 00:15.1 [8086/0000] bus ops
887 16:14:51.684022 PCI: 00:15.1 [8086/a0e9] enabled
888 16:14:51.687466 PCI: 00:15.2 [8086/0000] bus ops
889 16:14:51.690966 PCI: 00:15.2 [8086/a0ea] enabled
890 16:14:51.693789 PCI: 00:15.3 [8086/0000] bus ops
891 16:14:51.697192 PCI: 00:15.3 [8086/a0eb] enabled
892 16:14:51.701054 PCI: 00:16.0 [8086/0000] ops
893 16:14:51.703571 PCI: 00:16.0 [8086/a0e0] enabled
894 16:14:51.710473 PCI: Static device PCI: 00:17.0 not found, disabling it.
895 16:14:51.713629 PCI: 00:19.0 [8086/0000] bus ops
896 16:14:51.716819 PCI: 00:19.0 [8086/a0c5] disabled
897 16:14:51.720133 PCI: 00:19.1 [8086/0000] bus ops
898 16:14:51.723392 PCI: 00:19.1 [8086/a0c6] enabled
899 16:14:51.726666 PCI: 00:1d.0 [8086/0000] bus ops
900 16:14:51.730352 PCI: 00:1d.0 [8086/a0b0] enabled
901 16:14:51.733180 PCI: 00:1e.0 [8086/0000] ops
902 16:14:51.736537 PCI: 00:1e.0 [8086/a0a8] enabled
903 16:14:51.740255 PCI: 00:1e.2 [8086/0000] bus ops
904 16:14:51.743598 PCI: 00:1e.2 [8086/a0aa] enabled
905 16:14:51.746615 PCI: 00:1e.3 [8086/0000] bus ops
906 16:14:51.750458 PCI: 00:1e.3 [8086/a0ab] enabled
907 16:14:51.753287 PCI: 00:1f.0 [8086/0000] bus ops
908 16:14:51.755888 PCI: 00:1f.0 [8086/a087] enabled
909 16:14:51.756291 RTC Init
910 16:14:51.759460 Set power on after power failure.
911 16:14:51.763109 Disabling Deep S3
912 16:14:51.763628 Disabling Deep S3
913 16:14:51.766247 Disabling Deep S4
914 16:14:51.766752 Disabling Deep S4
915 16:14:51.769691 Disabling Deep S5
916 16:14:51.772975 Disabling Deep S5
917 16:14:51.773396 PCI: 00:1f.2 [0000/0000] hidden
918 16:14:51.776402 PCI: 00:1f.3 [8086/0000] bus ops
919 16:14:51.779909 PCI: 00:1f.3 [8086/a0c8] enabled
920 16:14:51.785890 PCI: 00:1f.5 [8086/0000] bus ops
921 16:14:51.789754 PCI: 00:1f.5 [8086/a0a4] enabled
922 16:14:51.790269 PCI: Leftover static devices:
923 16:14:51.793223 PCI: 00:10.2
924 16:14:51.793774 PCI: 00:10.6
925 16:14:51.795918 PCI: 00:10.7
926 16:14:51.796333 PCI: 00:06.0
927 16:14:51.799494 PCI: 00:07.1
928 16:14:51.799930 PCI: 00:07.2
929 16:14:51.800261 PCI: 00:07.3
930 16:14:51.802317 PCI: 00:09.0
931 16:14:51.802777 PCI: 00:0d.1
932 16:14:51.805511 PCI: 00:0d.2
933 16:14:51.805929 PCI: 00:0d.3
934 16:14:51.806261 PCI: 00:0e.0
935 16:14:51.808905 PCI: 00:12.0
936 16:14:51.809468 PCI: 00:12.6
937 16:14:51.812353 PCI: 00:13.0
938 16:14:51.812770 PCI: 00:14.1
939 16:14:51.815923 PCI: 00:16.1
940 16:14:51.816434 PCI: 00:16.2
941 16:14:51.816765 PCI: 00:16.3
942 16:14:51.819362 PCI: 00:16.4
943 16:14:51.819846 PCI: 00:16.5
944 16:14:51.822020 PCI: 00:17.0
945 16:14:51.822507 PCI: 00:19.2
946 16:14:51.822845 PCI: 00:1e.1
947 16:14:51.825486 PCI: 00:1f.1
948 16:14:51.825905 PCI: 00:1f.4
949 16:14:51.828756 PCI: 00:1f.6
950 16:14:51.829193 PCI: 00:1f.7
951 16:14:51.832272 PCI: Check your devicetree.cb.
952 16:14:51.835125 PCI: 00:02.0 scanning...
953 16:14:51.838451 scan_generic_bus for PCI: 00:02.0
954 16:14:51.842051 scan_generic_bus for PCI: 00:02.0 done
955 16:14:51.848963 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
956 16:14:51.849388 PCI: 00:04.0 scanning...
957 16:14:51.852153 scan_generic_bus for PCI: 00:04.0
958 16:14:51.854954 GENERIC: 0.0 enabled
959 16:14:51.861525 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
960 16:14:51.865080 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
961 16:14:51.868122 PCI: 00:0d.0 scanning...
962 16:14:51.871623 scan_static_bus for PCI: 00:0d.0
963 16:14:51.874990 USB0 port 0 enabled
964 16:14:51.878813 USB0 port 0 scanning...
965 16:14:51.881633 scan_static_bus for USB0 port 0
966 16:14:51.882058 USB3 port 0 enabled
967 16:14:51.884995 USB3 port 1 enabled
968 16:14:51.885416 USB3 port 2 disabled
969 16:14:51.888499 USB3 port 3 disabled
970 16:14:51.891892 USB3 port 0 scanning...
971 16:14:51.895334 scan_static_bus for USB3 port 0
972 16:14:51.897851 scan_static_bus for USB3 port 0 done
973 16:14:51.901467 scan_bus: bus USB3 port 0 finished in 6 msecs
974 16:14:51.904587 USB3 port 1 scanning...
975 16:14:51.907778 scan_static_bus for USB3 port 1
976 16:14:51.911827 scan_static_bus for USB3 port 1 done
977 16:14:51.917791 scan_bus: bus USB3 port 1 finished in 6 msecs
978 16:14:51.921193 scan_static_bus for USB0 port 0 done
979 16:14:51.924709 scan_bus: bus USB0 port 0 finished in 43 msecs
980 16:14:51.928064 scan_static_bus for PCI: 00:0d.0 done
981 16:14:51.934949 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
982 16:14:51.938181 PCI: 00:14.0 scanning...
983 16:14:51.941067 scan_static_bus for PCI: 00:14.0
984 16:14:51.941491 USB0 port 0 enabled
985 16:14:51.944401 USB0 port 0 scanning...
986 16:14:51.948043 scan_static_bus for USB0 port 0
987 16:14:51.951295 USB2 port 0 disabled
988 16:14:51.951744 USB2 port 1 enabled
989 16:14:51.954655 USB2 port 2 enabled
990 16:14:51.958147 USB2 port 3 disabled
991 16:14:51.958659 USB2 port 4 enabled
992 16:14:51.961248 USB2 port 5 disabled
993 16:14:51.964085 USB2 port 6 disabled
994 16:14:51.964506 USB2 port 7 disabled
995 16:14:51.967718 USB2 port 8 disabled
996 16:14:51.971128 USB2 port 9 disabled
997 16:14:51.971548 USB3 port 0 disabled
998 16:14:51.973791 USB3 port 1 enabled
999 16:14:51.974229 USB3 port 2 disabled
1000 16:14:51.977379 USB3 port 3 disabled
1001 16:14:51.980817 USB2 port 1 scanning...
1002 16:14:51.984014 scan_static_bus for USB2 port 1
1003 16:14:51.987623 scan_static_bus for USB2 port 1 done
1004 16:14:51.990631 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 16:14:51.994023 USB2 port 2 scanning...
1006 16:14:51.997296 scan_static_bus for USB2 port 2
1007 16:14:52.000914 scan_static_bus for USB2 port 2 done
1008 16:14:52.006996 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 16:14:52.007436 USB2 port 4 scanning...
1010 16:14:52.010418 scan_static_bus for USB2 port 4
1011 16:14:52.017224 scan_static_bus for USB2 port 4 done
1012 16:14:52.020391 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 16:14:52.023716 USB3 port 1 scanning...
1014 16:14:52.027052 scan_static_bus for USB3 port 1
1015 16:14:52.030501 scan_static_bus for USB3 port 1 done
1016 16:14:52.033806 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 16:14:52.036979 scan_static_bus for USB0 port 0 done
1018 16:14:52.043753 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 16:14:52.047319 scan_static_bus for PCI: 00:14.0 done
1020 16:14:52.050152 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1021 16:14:52.053318 PCI: 00:14.3 scanning...
1022 16:14:52.056861 scan_static_bus for PCI: 00:14.3
1023 16:14:52.060373 GENERIC: 0.0 enabled
1024 16:14:52.063996 scan_static_bus for PCI: 00:14.3 done
1025 16:14:52.067142 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1026 16:14:52.070259 PCI: 00:15.0 scanning...
1027 16:14:52.073673 scan_static_bus for PCI: 00:15.0
1028 16:14:52.077243 I2C: 00:1a enabled
1029 16:14:52.077743 I2C: 00:31 enabled
1030 16:14:52.080126 I2C: 00:32 enabled
1031 16:14:52.083763 scan_static_bus for PCI: 00:15.0 done
1032 16:14:52.090193 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1033 16:14:52.090694 PCI: 00:15.1 scanning...
1034 16:14:52.093938 scan_static_bus for PCI: 00:15.1
1035 16:14:52.096935 I2C: 00:10 enabled
1036 16:14:52.100593 scan_static_bus for PCI: 00:15.1 done
1037 16:14:52.106583 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1038 16:14:52.107090 PCI: 00:15.2 scanning...
1039 16:14:52.110456 scan_static_bus for PCI: 00:15.2
1040 16:14:52.116399 scan_static_bus for PCI: 00:15.2 done
1041 16:14:52.119999 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1042 16:14:52.123180 PCI: 00:15.3 scanning...
1043 16:14:52.126346 scan_static_bus for PCI: 00:15.3
1044 16:14:52.129742 scan_static_bus for PCI: 00:15.3 done
1045 16:14:52.132971 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1046 16:14:52.136195 PCI: 00:19.1 scanning...
1047 16:14:52.139582 scan_static_bus for PCI: 00:19.1
1048 16:14:52.142786 I2C: 00:15 enabled
1049 16:14:52.146671 scan_static_bus for PCI: 00:19.1 done
1050 16:14:52.150288 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1051 16:14:52.153571 PCI: 00:1d.0 scanning...
1052 16:14:52.155966 do_pci_scan_bridge for PCI: 00:1d.0
1053 16:14:52.159371 PCI: pci_scan_bus for bus 01
1054 16:14:52.163141 PCI: 01:00.0 [15b7/5009] enabled
1055 16:14:52.166131 GENERIC: 0.0 enabled
1056 16:14:52.169190 Enabling Common Clock Configuration
1057 16:14:52.172496 L1 Sub-State supported from root port 29
1058 16:14:52.176194 L1 Sub-State Support = 0x5
1059 16:14:52.179050 CommonModeRestoreTime = 0x28
1060 16:14:52.182410 Power On Value = 0x16, Power On Scale = 0x0
1061 16:14:52.185890 ASPM: Enabled L1
1062 16:14:52.189005 PCIe: Max_Payload_Size adjusted to 128
1063 16:14:52.195922 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1064 16:14:52.196594 PCI: 00:1e.2 scanning...
1065 16:14:52.199624 scan_generic_bus for PCI: 00:1e.2
1066 16:14:52.203437 SPI: 00 enabled
1067 16:14:52.210223 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1068 16:14:52.213097 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1069 16:14:52.217034 PCI: 00:1e.3 scanning...
1070 16:14:52.220096 scan_generic_bus for PCI: 00:1e.3
1071 16:14:52.220728 SPI: 00 enabled
1072 16:14:52.226898 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1073 16:14:52.233309 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1074 16:14:52.234129 PCI: 00:1f.0 scanning...
1075 16:14:52.236556 scan_static_bus for PCI: 00:1f.0
1076 16:14:52.239736 PNP: 0c09.0 enabled
1077 16:14:52.243127 PNP: 0c09.0 scanning...
1078 16:14:52.246493 scan_static_bus for PNP: 0c09.0
1079 16:14:52.249682 scan_static_bus for PNP: 0c09.0 done
1080 16:14:52.252843 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1081 16:14:52.259311 scan_static_bus for PCI: 00:1f.0 done
1082 16:14:52.262875 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1083 16:14:52.265833 PCI: 00:1f.2 scanning...
1084 16:14:52.269345 scan_static_bus for PCI: 00:1f.2
1085 16:14:52.272722 GENERIC: 0.0 enabled
1086 16:14:52.273129 GENERIC: 0.0 scanning...
1087 16:14:52.276261 scan_static_bus for GENERIC: 0.0
1088 16:14:52.279078 GENERIC: 0.0 enabled
1089 16:14:52.282913 GENERIC: 1.0 enabled
1090 16:14:52.285819 scan_static_bus for GENERIC: 0.0 done
1091 16:14:52.289395 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1092 16:14:52.292153 scan_static_bus for PCI: 00:1f.2 done
1093 16:14:52.298802 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1094 16:14:52.302313 PCI: 00:1f.3 scanning...
1095 16:14:52.305663 scan_static_bus for PCI: 00:1f.3
1096 16:14:52.308932 scan_static_bus for PCI: 00:1f.3 done
1097 16:14:52.312338 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1098 16:14:52.315886 PCI: 00:1f.5 scanning...
1099 16:14:52.318942 scan_generic_bus for PCI: 00:1f.5
1100 16:14:52.322171 scan_generic_bus for PCI: 00:1f.5 done
1101 16:14:52.329171 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1102 16:14:52.331880 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1103 16:14:52.335115 scan_static_bus for Root Device done
1104 16:14:52.342044 scan_bus: bus Root Device finished in 735 msecs
1105 16:14:52.342456 done
1106 16:14:52.348579 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1107 16:14:52.352282 Chrome EC: UHEPI supported
1108 16:14:52.358277 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1109 16:14:52.365369 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1110 16:14:52.368534 SPI flash protection: WPSW=0 SRP0=0
1111 16:14:52.371983 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1112 16:14:52.378161 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1113 16:14:52.381883 found VGA at PCI: 00:02.0
1114 16:14:52.385325 Setting up VGA for PCI: 00:02.0
1115 16:14:52.388764 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1116 16:14:52.395254 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1117 16:14:52.397905 Allocating resources...
1118 16:14:52.398315 Reading resources...
1119 16:14:52.401184 Root Device read_resources bus 0 link: 0
1120 16:14:52.408260 DOMAIN: 0000 read_resources bus 0 link: 0
1121 16:14:52.411399 PCI: 00:04.0 read_resources bus 1 link: 0
1122 16:14:52.418291 PCI: 00:04.0 read_resources bus 1 link: 0 done
1123 16:14:52.421399 PCI: 00:0d.0 read_resources bus 0 link: 0
1124 16:14:52.428024 USB0 port 0 read_resources bus 0 link: 0
1125 16:14:52.431222 USB0 port 0 read_resources bus 0 link: 0 done
1126 16:14:52.437507 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1127 16:14:52.440947 PCI: 00:14.0 read_resources bus 0 link: 0
1128 16:14:52.444202 USB0 port 0 read_resources bus 0 link: 0
1129 16:14:52.452118 USB0 port 0 read_resources bus 0 link: 0 done
1130 16:14:52.455531 PCI: 00:14.0 read_resources bus 0 link: 0 done
1131 16:14:52.462627 PCI: 00:14.3 read_resources bus 0 link: 0
1132 16:14:52.465348 PCI: 00:14.3 read_resources bus 0 link: 0 done
1133 16:14:52.471524 PCI: 00:15.0 read_resources bus 0 link: 0
1134 16:14:52.474757 PCI: 00:15.0 read_resources bus 0 link: 0 done
1135 16:14:52.481411 PCI: 00:15.1 read_resources bus 0 link: 0
1136 16:14:52.484657 PCI: 00:15.1 read_resources bus 0 link: 0 done
1137 16:14:52.491879 PCI: 00:19.1 read_resources bus 0 link: 0
1138 16:14:52.495405 PCI: 00:19.1 read_resources bus 0 link: 0 done
1139 16:14:52.501713 PCI: 00:1d.0 read_resources bus 1 link: 0
1140 16:14:52.505267 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1141 16:14:52.512253 PCI: 00:1e.2 read_resources bus 2 link: 0
1142 16:14:52.515128 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1143 16:14:52.521808 PCI: 00:1e.3 read_resources bus 3 link: 0
1144 16:14:52.524975 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1145 16:14:52.531478 PCI: 00:1f.0 read_resources bus 0 link: 0
1146 16:14:52.535443 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1147 16:14:52.541464 PCI: 00:1f.2 read_resources bus 0 link: 0
1148 16:14:52.545288 GENERIC: 0.0 read_resources bus 0 link: 0
1149 16:14:52.551843 GENERIC: 0.0 read_resources bus 0 link: 0 done
1150 16:14:52.555035 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1151 16:14:52.561096 DOMAIN: 0000 read_resources bus 0 link: 0 done
1152 16:14:52.564416 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1153 16:14:52.571292 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1154 16:14:52.574803 Root Device read_resources bus 0 link: 0 done
1155 16:14:52.577496 Done reading resources.
1156 16:14:52.584705 Show resources in subtree (Root Device)...After reading.
1157 16:14:52.587616 Root Device child on link 0 DOMAIN: 0000
1158 16:14:52.590568 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1159 16:14:52.600972 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1160 16:14:52.610929 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1161 16:14:52.611161 PCI: 00:00.0
1162 16:14:52.620787 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1163 16:14:52.630488 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1164 16:14:52.640454 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1165 16:14:52.650632 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1166 16:14:52.660570 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1167 16:14:52.671162 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1168 16:14:52.677825 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1169 16:14:52.687364 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1170 16:14:52.697415 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1171 16:14:52.707140 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1172 16:14:52.717160 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1173 16:14:52.727014 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1174 16:14:52.733416 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1175 16:14:52.743835 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1176 16:14:52.753393 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1177 16:14:52.763677 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1178 16:14:52.773576 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1179 16:14:52.783093 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1180 16:14:52.789658 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1181 16:14:52.800049 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1182 16:14:52.803450 PCI: 00:02.0
1183 16:14:52.813007 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1184 16:14:52.822428 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1185 16:14:52.832412 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1186 16:14:52.835968 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 16:14:52.846285 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1188 16:14:52.849742 GENERIC: 0.0
1189 16:14:52.850275 PCI: 00:05.0
1190 16:14:52.858807 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 16:14:52.866152 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1192 16:14:52.866668 GENERIC: 0.0
1193 16:14:52.869352 PCI: 00:08.0
1194 16:14:52.879153 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 16:14:52.879721 PCI: 00:0a.0
1196 16:14:52.882166 PCI: 00:0d.0 child on link 0 USB0 port 0
1197 16:14:52.895161 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1198 16:14:52.899098 USB0 port 0 child on link 0 USB3 port 0
1199 16:14:52.899701 USB3 port 0
1200 16:14:52.902439 USB3 port 1
1201 16:14:52.902948 USB3 port 2
1202 16:14:52.905555 USB3 port 3
1203 16:14:52.909138 PCI: 00:14.0 child on link 0 USB0 port 0
1204 16:14:52.919009 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 16:14:52.925343 USB0 port 0 child on link 0 USB2 port 0
1206 16:14:52.925853 USB2 port 0
1207 16:14:52.928658 USB2 port 1
1208 16:14:52.929178 USB2 port 2
1209 16:14:52.931968 USB2 port 3
1210 16:14:52.932376 USB2 port 4
1211 16:14:52.935446 USB2 port 5
1212 16:14:52.935998 USB2 port 6
1213 16:14:52.938325 USB2 port 7
1214 16:14:52.941495 USB2 port 8
1215 16:14:52.941943 USB2 port 9
1216 16:14:52.944824 USB3 port 0
1217 16:14:52.945394 USB3 port 1
1218 16:14:52.947829 USB3 port 2
1219 16:14:52.948241 USB3 port 3
1220 16:14:52.951235 PCI: 00:14.2
1221 16:14:52.961310 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 16:14:52.971286 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 16:14:52.974427 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1224 16:14:52.984754 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 16:14:52.988193 GENERIC: 0.0
1226 16:14:52.990995 PCI: 00:15.0 child on link 0 I2C: 00:1a
1227 16:14:53.001754 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 16:14:53.002265 I2C: 00:1a
1229 16:14:53.004998 I2C: 00:31
1230 16:14:53.005675 I2C: 00:32
1231 16:14:53.011372 PCI: 00:15.1 child on link 0 I2C: 00:10
1232 16:14:53.020903 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 16:14:53.021404 I2C: 00:10
1234 16:14:53.024441 PCI: 00:15.2
1235 16:14:53.034272 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 16:14:53.034767 PCI: 00:15.3
1237 16:14:53.044414 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 16:14:53.047890 PCI: 00:16.0
1239 16:14:53.057675 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 16:14:53.058127 PCI: 00:19.0
1241 16:14:53.061163 PCI: 00:19.1 child on link 0 I2C: 00:15
1242 16:14:53.071270 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 16:14:53.074417 I2C: 00:15
1244 16:14:53.077600 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1245 16:14:53.087437 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1246 16:14:53.097368 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1247 16:14:53.107408 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1248 16:14:53.107870 GENERIC: 0.0
1249 16:14:53.110849 PCI: 01:00.0
1250 16:14:53.120197 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 16:14:53.130331 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1252 16:14:53.130829 PCI: 00:1e.0
1253 16:14:53.140637 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1254 16:14:53.146972 PCI: 00:1e.2 child on link 0 SPI: 00
1255 16:14:53.157051 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1256 16:14:53.157572 SPI: 00
1257 16:14:53.159988 PCI: 00:1e.3 child on link 0 SPI: 00
1258 16:14:53.169959 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 16:14:53.173172 SPI: 00
1260 16:14:53.176595 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1261 16:14:53.186316 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1262 16:14:53.186778 PNP: 0c09.0
1263 16:14:53.196540 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1264 16:14:53.199611 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1265 16:14:53.209915 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1266 16:14:53.219523 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1267 16:14:53.223087 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1268 16:14:53.226344 GENERIC: 0.0
1269 16:14:53.226753 GENERIC: 1.0
1270 16:14:53.229766 PCI: 00:1f.3
1271 16:14:53.239339 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1272 16:14:53.249631 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1273 16:14:53.250060 PCI: 00:1f.5
1274 16:14:53.259232 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1275 16:14:53.262508 CPU_CLUSTER: 0 child on link 0 APIC: 00
1276 16:14:53.265854 APIC: 00
1277 16:14:53.266306 APIC: 01
1278 16:14:53.269106 APIC: 07
1279 16:14:53.269532 APIC: 03
1280 16:14:53.269859 APIC: 04
1281 16:14:53.272507 APIC: 06
1282 16:14:53.272980 APIC: 02
1283 16:14:53.273312 APIC: 05
1284 16:14:53.283007 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1285 16:14:53.286083 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1286 16:14:53.293150 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1287 16:14:53.299117 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1288 16:14:53.302722 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1289 16:14:53.309489 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1290 16:14:53.315758 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1291 16:14:53.322727 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1292 16:14:53.329721 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1293 16:14:53.339015 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1294 16:14:53.342259 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1295 16:14:53.352146 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1296 16:14:53.358672 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1297 16:14:53.365421 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1298 16:14:53.369178 DOMAIN: 0000: Resource ranges:
1299 16:14:53.372358 * Base: 1000, Size: 800, Tag: 100
1300 16:14:53.375706 * Base: 1900, Size: e700, Tag: 100
1301 16:14:53.382105 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1302 16:14:53.388407 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1303 16:14:53.395223 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1304 16:14:53.401970 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1305 16:14:53.412127 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1306 16:14:53.418643 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1307 16:14:53.428261 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1308 16:14:53.434614 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1309 16:14:53.441650 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1310 16:14:53.448342 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1311 16:14:53.458195 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1312 16:14:53.465197 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1313 16:14:53.471494 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1314 16:14:53.481710 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1315 16:14:53.487872 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1316 16:14:53.494192 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1317 16:14:53.504186 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1318 16:14:53.511273 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1319 16:14:53.517796 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1320 16:14:53.528192 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1321 16:14:53.534343 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1322 16:14:53.540552 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1323 16:14:53.551018 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1324 16:14:53.557368 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1325 16:14:53.564608 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1326 16:14:53.567787 DOMAIN: 0000: Resource ranges:
1327 16:14:53.574144 * Base: 7fc00000, Size: 40400000, Tag: 200
1328 16:14:53.577284 * Base: d0000000, Size: 28000000, Tag: 200
1329 16:14:53.580327 * Base: fa000000, Size: 1000000, Tag: 200
1330 16:14:53.587020 * Base: fb001000, Size: 2fff000, Tag: 200
1331 16:14:53.590283 * Base: fe010000, Size: 2e000, Tag: 200
1332 16:14:53.593623 * Base: fe03f000, Size: d41000, Tag: 200
1333 16:14:53.597209 * Base: fed88000, Size: 8000, Tag: 200
1334 16:14:53.603942 * Base: fed93000, Size: d000, Tag: 200
1335 16:14:53.607387 * Base: feda2000, Size: 1e000, Tag: 200
1336 16:14:53.610415 * Base: fede0000, Size: 1220000, Tag: 200
1337 16:14:53.616493 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1338 16:14:53.623577 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1339 16:14:53.630380 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1340 16:14:53.636483 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1341 16:14:53.643047 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1342 16:14:53.650160 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1343 16:14:53.656814 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1344 16:14:53.663481 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1345 16:14:53.670080 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1346 16:14:53.676892 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1347 16:14:53.683162 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1348 16:14:53.689483 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1349 16:14:53.696225 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1350 16:14:53.702941 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1351 16:14:53.709259 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1352 16:14:53.716082 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1353 16:14:53.722867 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1354 16:14:53.729291 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1355 16:14:53.736311 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1356 16:14:53.743001 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1357 16:14:53.749508 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1358 16:14:53.756189 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1359 16:14:53.762471 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1360 16:14:53.769362 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1361 16:14:53.775878 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1362 16:14:53.779478 PCI: 00:1d.0: Resource ranges:
1363 16:14:53.785988 * Base: 7fc00000, Size: 100000, Tag: 200
1364 16:14:53.792797 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1365 16:14:53.798674 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1366 16:14:53.805725 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1367 16:14:53.812396 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1368 16:14:53.818979 Root Device assign_resources, bus 0 link: 0
1369 16:14:53.822222 DOMAIN: 0000 assign_resources, bus 0 link: 0
1370 16:14:53.831879 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1371 16:14:53.838801 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1372 16:14:53.848197 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1373 16:14:53.854864 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1374 16:14:53.858108 PCI: 00:04.0 assign_resources, bus 1 link: 0
1375 16:14:53.865195 PCI: 00:04.0 assign_resources, bus 1 link: 0
1376 16:14:53.871695 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1377 16:14:53.881494 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1378 16:14:53.888348 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1379 16:14:53.894900 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1380 16:14:53.898200 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1381 16:14:53.908578 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1382 16:14:53.911049 PCI: 00:14.0 assign_resources, bus 0 link: 0
1383 16:14:53.914394 PCI: 00:14.0 assign_resources, bus 0 link: 0
1384 16:14:53.924191 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1385 16:14:53.931328 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1386 16:14:53.941091 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1387 16:14:53.944427 PCI: 00:14.3 assign_resources, bus 0 link: 0
1388 16:14:53.951007 PCI: 00:14.3 assign_resources, bus 0 link: 0
1389 16:14:53.957781 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1390 16:14:53.961084 PCI: 00:15.0 assign_resources, bus 0 link: 0
1391 16:14:53.967576 PCI: 00:15.0 assign_resources, bus 0 link: 0
1392 16:14:53.974423 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1393 16:14:53.980780 PCI: 00:15.1 assign_resources, bus 0 link: 0
1394 16:14:53.984247 PCI: 00:15.1 assign_resources, bus 0 link: 0
1395 16:14:53.993825 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1396 16:14:54.000894 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1397 16:14:54.010587 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1398 16:14:54.017287 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1399 16:14:54.020899 PCI: 00:19.1 assign_resources, bus 0 link: 0
1400 16:14:54.027787 PCI: 00:19.1 assign_resources, bus 0 link: 0
1401 16:14:54.034214 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1402 16:14:54.043706 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1403 16:14:54.053277 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1404 16:14:54.056527 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1405 16:14:54.066553 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1406 16:14:54.073578 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1407 16:14:54.080522 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1408 16:14:54.087368 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1409 16:14:54.094049 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1410 16:14:54.096331 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1411 16:14:54.106727 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1412 16:14:54.109780 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1413 16:14:54.113019 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1414 16:14:54.119605 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1415 16:14:54.122980 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1416 16:14:54.130160 LPC: Trying to open IO window from 800 size 1ff
1417 16:14:54.136168 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1418 16:14:54.146709 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1419 16:14:54.153083 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1420 16:14:54.159602 DOMAIN: 0000 assign_resources, bus 0 link: 0
1421 16:14:54.162885 Root Device assign_resources, bus 0 link: 0
1422 16:14:54.166530 Done setting resources.
1423 16:14:54.172836 Show resources in subtree (Root Device)...After assigning values.
1424 16:14:54.176379 Root Device child on link 0 DOMAIN: 0000
1425 16:14:54.179293 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1426 16:14:54.189683 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1427 16:14:54.199194 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1428 16:14:54.202667 PCI: 00:00.0
1429 16:14:54.212646 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1430 16:14:54.219227 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1431 16:14:54.228717 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1432 16:14:54.238537 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1433 16:14:54.248950 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1434 16:14:54.259314 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1435 16:14:54.268639 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1436 16:14:54.275238 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1437 16:14:54.285478 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1438 16:14:54.294867 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1439 16:14:54.304900 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1440 16:14:54.315399 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1441 16:14:54.325108 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1442 16:14:54.331148 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1443 16:14:54.341420 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1444 16:14:54.351167 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1445 16:14:54.361196 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1446 16:14:54.371129 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1447 16:14:54.381441 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1448 16:14:54.391059 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1449 16:14:54.391612 PCI: 00:02.0
1450 16:14:54.400733 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1451 16:14:54.414016 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1452 16:14:54.420679 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1453 16:14:54.427392 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1454 16:14:54.437040 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1455 16:14:54.437598 GENERIC: 0.0
1456 16:14:54.440809 PCI: 00:05.0
1457 16:14:54.450407 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1458 16:14:54.453788 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1459 16:14:54.456532 GENERIC: 0.0
1460 16:14:54.456944 PCI: 00:08.0
1461 16:14:54.470275 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1462 16:14:54.470797 PCI: 00:0a.0
1463 16:14:54.474381 PCI: 00:0d.0 child on link 0 USB0 port 0
1464 16:14:54.486951 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1465 16:14:54.490024 USB0 port 0 child on link 0 USB3 port 0
1466 16:14:54.490539 USB3 port 0
1467 16:14:54.493050 USB3 port 1
1468 16:14:54.496627 USB3 port 2
1469 16:14:54.497135 USB3 port 3
1470 16:14:54.500105 PCI: 00:14.0 child on link 0 USB0 port 0
1471 16:14:54.513235 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1472 16:14:54.516608 USB0 port 0 child on link 0 USB2 port 0
1473 16:14:54.517121 USB2 port 0
1474 16:14:54.520060 USB2 port 1
1475 16:14:54.523367 USB2 port 2
1476 16:14:54.523992 USB2 port 3
1477 16:14:54.526181 USB2 port 4
1478 16:14:54.526588 USB2 port 5
1479 16:14:54.530010 USB2 port 6
1480 16:14:54.530517 USB2 port 7
1481 16:14:54.532734 USB2 port 8
1482 16:14:54.533143 USB2 port 9
1483 16:14:54.536129 USB3 port 0
1484 16:14:54.536540 USB3 port 1
1485 16:14:54.539547 USB3 port 2
1486 16:14:54.540016 USB3 port 3
1487 16:14:54.542921 PCI: 00:14.2
1488 16:14:54.552558 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1489 16:14:54.562787 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1490 16:14:54.569126 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1491 16:14:54.579386 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1492 16:14:54.579927 GENERIC: 0.0
1493 16:14:54.585608 PCI: 00:15.0 child on link 0 I2C: 00:1a
1494 16:14:54.596267 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1495 16:14:54.596779 I2C: 00:1a
1496 16:14:54.598731 I2C: 00:31
1497 16:14:54.599238 I2C: 00:32
1498 16:14:54.602236 PCI: 00:15.1 child on link 0 I2C: 00:10
1499 16:14:54.611900 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1500 16:14:54.615520 I2C: 00:10
1501 16:14:54.616080 PCI: 00:15.2
1502 16:14:54.628322 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1503 16:14:54.628825 PCI: 00:15.3
1504 16:14:54.638844 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1505 16:14:54.641511 PCI: 00:16.0
1506 16:14:54.651926 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1507 16:14:54.652428 PCI: 00:19.0
1508 16:14:54.658449 PCI: 00:19.1 child on link 0 I2C: 00:15
1509 16:14:54.668407 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1510 16:14:54.668825 I2C: 00:15
1511 16:14:54.674503 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1512 16:14:54.681443 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1513 16:14:54.694795 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1514 16:14:54.704619 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1515 16:14:54.707937 GENERIC: 0.0
1516 16:14:54.708347 PCI: 01:00.0
1517 16:14:54.717376 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1518 16:14:54.727550 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1519 16:14:54.730919 PCI: 00:1e.0
1520 16:14:54.740313 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1521 16:14:54.747257 PCI: 00:1e.2 child on link 0 SPI: 00
1522 16:14:54.757318 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1523 16:14:54.757729 SPI: 00
1524 16:14:54.760563 PCI: 00:1e.3 child on link 0 SPI: 00
1525 16:14:54.770335 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1526 16:14:54.774187 SPI: 00
1527 16:14:54.777088 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1528 16:14:54.787006 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1529 16:14:54.787506 PNP: 0c09.0
1530 16:14:54.797011 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1531 16:14:54.800027 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1532 16:14:54.809963 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1533 16:14:54.820365 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1534 16:14:54.823367 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1535 16:14:54.826420 GENERIC: 0.0
1536 16:14:54.826857 GENERIC: 1.0
1537 16:14:54.830159 PCI: 00:1f.3
1538 16:14:54.840165 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1539 16:14:54.849392 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1540 16:14:54.852904 PCI: 00:1f.5
1541 16:14:54.863112 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1542 16:14:54.865981 CPU_CLUSTER: 0 child on link 0 APIC: 00
1543 16:14:54.869013 APIC: 00
1544 16:14:54.869099 APIC: 01
1545 16:14:54.869184 APIC: 07
1546 16:14:54.872212 APIC: 03
1547 16:14:54.872296 APIC: 04
1548 16:14:54.876189 APIC: 06
1549 16:14:54.876349 APIC: 02
1550 16:14:54.876451 APIC: 05
1551 16:14:54.879006 Done allocating resources.
1552 16:14:54.885487 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1553 16:14:54.892358 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1554 16:14:54.895400 Configure GPIOs for I2S audio on UP4.
1555 16:14:54.902103 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1556 16:14:54.905229 Enabling resources...
1557 16:14:54.908985 PCI: 00:00.0 subsystem <- 8086/9a12
1558 16:14:54.912113 PCI: 00:00.0 cmd <- 06
1559 16:14:54.915601 PCI: 00:02.0 subsystem <- 8086/9a40
1560 16:14:54.918578 PCI: 00:02.0 cmd <- 03
1561 16:14:54.922136 PCI: 00:04.0 subsystem <- 8086/9a03
1562 16:14:54.922394 PCI: 00:04.0 cmd <- 02
1563 16:14:54.928913 PCI: 00:05.0 subsystem <- 8086/9a19
1564 16:14:54.929259 PCI: 00:05.0 cmd <- 02
1565 16:14:54.931835 PCI: 00:08.0 subsystem <- 8086/9a11
1566 16:14:54.934977 PCI: 00:08.0 cmd <- 06
1567 16:14:54.938454 PCI: 00:0d.0 subsystem <- 8086/9a13
1568 16:14:54.942332 PCI: 00:0d.0 cmd <- 02
1569 16:14:54.945493 PCI: 00:14.0 subsystem <- 8086/a0ed
1570 16:14:54.948784 PCI: 00:14.0 cmd <- 02
1571 16:14:54.952032 PCI: 00:14.2 subsystem <- 8086/a0ef
1572 16:14:54.955191 PCI: 00:14.2 cmd <- 02
1573 16:14:54.958302 PCI: 00:14.3 subsystem <- 8086/a0f0
1574 16:14:54.962034 PCI: 00:14.3 cmd <- 02
1575 16:14:54.965282 PCI: 00:15.0 subsystem <- 8086/a0e8
1576 16:14:54.968521 PCI: 00:15.0 cmd <- 02
1577 16:14:54.971501 PCI: 00:15.1 subsystem <- 8086/a0e9
1578 16:14:54.972047 PCI: 00:15.1 cmd <- 02
1579 16:14:54.978858 PCI: 00:15.2 subsystem <- 8086/a0ea
1580 16:14:54.979347 PCI: 00:15.2 cmd <- 02
1581 16:14:54.981561 PCI: 00:15.3 subsystem <- 8086/a0eb
1582 16:14:54.984885 PCI: 00:15.3 cmd <- 02
1583 16:14:54.988103 PCI: 00:16.0 subsystem <- 8086/a0e0
1584 16:14:54.991439 PCI: 00:16.0 cmd <- 02
1585 16:14:54.994986 PCI: 00:19.1 subsystem <- 8086/a0c6
1586 16:14:54.998252 PCI: 00:19.1 cmd <- 02
1587 16:14:55.001840 PCI: 00:1d.0 bridge ctrl <- 0013
1588 16:14:55.004629 PCI: 00:1d.0 subsystem <- 8086/a0b0
1589 16:14:55.008031 PCI: 00:1d.0 cmd <- 06
1590 16:14:55.011290 PCI: 00:1e.0 subsystem <- 8086/a0a8
1591 16:14:55.014491 PCI: 00:1e.0 cmd <- 06
1592 16:14:55.018073 PCI: 00:1e.2 subsystem <- 8086/a0aa
1593 16:14:55.021328 PCI: 00:1e.2 cmd <- 06
1594 16:14:55.024821 PCI: 00:1e.3 subsystem <- 8086/a0ab
1595 16:14:55.025234 PCI: 00:1e.3 cmd <- 02
1596 16:14:55.031250 PCI: 00:1f.0 subsystem <- 8086/a087
1597 16:14:55.031797 PCI: 00:1f.0 cmd <- 407
1598 16:14:55.035050 PCI: 00:1f.3 subsystem <- 8086/a0c8
1599 16:14:55.037744 PCI: 00:1f.3 cmd <- 02
1600 16:14:55.041524 PCI: 00:1f.5 subsystem <- 8086/a0a4
1601 16:14:55.044772 PCI: 00:1f.5 cmd <- 406
1602 16:14:55.048883 PCI: 01:00.0 cmd <- 02
1603 16:14:55.053502 done.
1604 16:14:55.056643 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1605 16:14:55.060173 Initializing devices...
1606 16:14:55.063579 Root Device init
1607 16:14:55.066581 Chrome EC: Set SMI mask to 0x0000000000000000
1608 16:14:55.073947 Chrome EC: clear events_b mask to 0x0000000000000000
1609 16:14:55.080246 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1610 16:14:55.083834 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1611 16:14:55.089704 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1612 16:14:55.097314 Chrome EC: Set WAKE mask to 0x0000000000000000
1613 16:14:55.099831 fw_config match found: DB_USB=USB3_ACTIVE
1614 16:14:55.106617 Configure Right Type-C port orientation for retimer
1615 16:14:55.110072 Root Device init finished in 42 msecs
1616 16:14:55.113111 PCI: 00:00.0 init
1617 16:14:55.116780 CPU TDP = 9 Watts
1618 16:14:55.117273 CPU PL1 = 9 Watts
1619 16:14:55.120040 CPU PL2 = 40 Watts
1620 16:14:55.120519 CPU PL4 = 83 Watts
1621 16:14:55.123367 PCI: 00:00.0 init finished in 8 msecs
1622 16:14:55.126573 PCI: 00:02.0 init
1623 16:14:55.130345 GMA: Found VBT in CBFS
1624 16:14:55.133199 GMA: Found valid VBT in CBFS
1625 16:14:55.136321 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1626 16:14:55.146525 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1627 16:14:55.149654 PCI: 00:02.0 init finished in 18 msecs
1628 16:14:55.152769 PCI: 00:05.0 init
1629 16:14:55.156007 PCI: 00:05.0 init finished in 0 msecs
1630 16:14:55.159811 PCI: 00:08.0 init
1631 16:14:55.163231 PCI: 00:08.0 init finished in 0 msecs
1632 16:14:55.166393 PCI: 00:14.0 init
1633 16:14:55.169805 PCI: 00:14.0 init finished in 0 msecs
1634 16:14:55.170361 PCI: 00:14.2 init
1635 16:14:55.176270 PCI: 00:14.2 init finished in 0 msecs
1636 16:14:55.176738 PCI: 00:15.0 init
1637 16:14:55.179138 I2C bus 0 version 0x3230302a
1638 16:14:55.182571 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1639 16:14:55.186354 PCI: 00:15.0 init finished in 6 msecs
1640 16:14:55.189549 PCI: 00:15.1 init
1641 16:14:55.192301 I2C bus 1 version 0x3230302a
1642 16:14:55.195851 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1643 16:14:55.199305 PCI: 00:15.1 init finished in 6 msecs
1644 16:14:55.202484 PCI: 00:15.2 init
1645 16:14:55.205664 I2C bus 2 version 0x3230302a
1646 16:14:55.209077 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1647 16:14:55.212224 PCI: 00:15.2 init finished in 6 msecs
1648 16:14:55.215875 PCI: 00:15.3 init
1649 16:14:55.219096 I2C bus 3 version 0x3230302a
1650 16:14:55.222246 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1651 16:14:55.226027 PCI: 00:15.3 init finished in 6 msecs
1652 16:14:55.228862 PCI: 00:16.0 init
1653 16:14:55.231985 PCI: 00:16.0 init finished in 0 msecs
1654 16:14:55.232472 PCI: 00:19.1 init
1655 16:14:55.235515 I2C bus 5 version 0x3230302a
1656 16:14:55.238993 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1657 16:14:55.245098 PCI: 00:19.1 init finished in 6 msecs
1658 16:14:55.245530 PCI: 00:1d.0 init
1659 16:14:55.249015 Initializing PCH PCIe bridge.
1660 16:14:55.252165 PCI: 00:1d.0 init finished in 3 msecs
1661 16:14:55.256200 PCI: 00:1f.0 init
1662 16:14:55.259209 IOAPIC: Initializing IOAPIC at 0xfec00000
1663 16:14:55.265928 IOAPIC: Bootstrap Processor Local APIC = 0x00
1664 16:14:55.266612 IOAPIC: ID = 0x02
1665 16:14:55.269674 IOAPIC: Dumping registers
1666 16:14:55.272967 reg 0x0000: 0x02000000
1667 16:14:55.275751 reg 0x0001: 0x00770020
1668 16:14:55.276185 reg 0x0002: 0x00000000
1669 16:14:55.282668 PCI: 00:1f.0 init finished in 21 msecs
1670 16:14:55.283204 PCI: 00:1f.2 init
1671 16:14:55.285709 Disabling ACPI via APMC.
1672 16:14:55.290448 APMC done.
1673 16:14:55.293898 PCI: 00:1f.2 init finished in 6 msecs
1674 16:14:55.305786 PCI: 01:00.0 init
1675 16:14:55.308655 PCI: 01:00.0 init finished in 0 msecs
1676 16:14:55.312430 PNP: 0c09.0 init
1677 16:14:55.319262 Google Chrome EC uptime: 8.287 seconds
1678 16:14:55.321908 Google Chrome AP resets since EC boot: 1
1679 16:14:55.325339 Google Chrome most recent AP reset causes:
1680 16:14:55.328776 0.453: 32775 shutdown: entering G3
1681 16:14:55.335580 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1682 16:14:55.338796 PNP: 0c09.0 init finished in 24 msecs
1683 16:14:55.345295 Devices initialized
1684 16:14:55.349310 Show all devs... After init.
1685 16:14:55.352157 Root Device: enabled 1
1686 16:14:55.352563 DOMAIN: 0000: enabled 1
1687 16:14:55.355551 CPU_CLUSTER: 0: enabled 1
1688 16:14:55.358959 PCI: 00:00.0: enabled 1
1689 16:14:55.362020 PCI: 00:02.0: enabled 1
1690 16:14:55.362465 PCI: 00:04.0: enabled 1
1691 16:14:55.365260 PCI: 00:05.0: enabled 1
1692 16:14:55.368435 PCI: 00:06.0: enabled 0
1693 16:14:55.372341 PCI: 00:07.0: enabled 0
1694 16:14:55.372752 PCI: 00:07.1: enabled 0
1695 16:14:55.375525 PCI: 00:07.2: enabled 0
1696 16:14:55.378990 PCI: 00:07.3: enabled 0
1697 16:14:55.382340 PCI: 00:08.0: enabled 1
1698 16:14:55.382987 PCI: 00:09.0: enabled 0
1699 16:14:55.385330 PCI: 00:0a.0: enabled 0
1700 16:14:55.388450 PCI: 00:0d.0: enabled 1
1701 16:14:55.392223 PCI: 00:0d.1: enabled 0
1702 16:14:55.392653 PCI: 00:0d.2: enabled 0
1703 16:14:55.395066 PCI: 00:0d.3: enabled 0
1704 16:14:55.399043 PCI: 00:0e.0: enabled 0
1705 16:14:55.402001 PCI: 00:10.2: enabled 1
1706 16:14:55.402512 PCI: 00:10.6: enabled 0
1707 16:14:55.405104 PCI: 00:10.7: enabled 0
1708 16:14:55.408281 PCI: 00:12.0: enabled 0
1709 16:14:55.411749 PCI: 00:12.6: enabled 0
1710 16:14:55.412161 PCI: 00:13.0: enabled 0
1711 16:14:55.415145 PCI: 00:14.0: enabled 1
1712 16:14:55.418311 PCI: 00:14.1: enabled 0
1713 16:14:55.418884 PCI: 00:14.2: enabled 1
1714 16:14:55.421680 PCI: 00:14.3: enabled 1
1715 16:14:55.424939 PCI: 00:15.0: enabled 1
1716 16:14:55.428375 PCI: 00:15.1: enabled 1
1717 16:14:55.428806 PCI: 00:15.2: enabled 1
1718 16:14:55.432009 PCI: 00:15.3: enabled 1
1719 16:14:55.435284 PCI: 00:16.0: enabled 1
1720 16:14:55.437725 PCI: 00:16.1: enabled 0
1721 16:14:55.438154 PCI: 00:16.2: enabled 0
1722 16:14:55.441148 PCI: 00:16.3: enabled 0
1723 16:14:55.444586 PCI: 00:16.4: enabled 0
1724 16:14:55.447981 PCI: 00:16.5: enabled 0
1725 16:14:55.448497 PCI: 00:17.0: enabled 0
1726 16:14:55.451218 PCI: 00:19.0: enabled 0
1727 16:14:55.454269 PCI: 00:19.1: enabled 1
1728 16:14:55.457499 PCI: 00:19.2: enabled 0
1729 16:14:55.457918 PCI: 00:1c.0: enabled 1
1730 16:14:55.460926 PCI: 00:1c.1: enabled 0
1731 16:14:55.464328 PCI: 00:1c.2: enabled 0
1732 16:14:55.467770 PCI: 00:1c.3: enabled 0
1733 16:14:55.468287 PCI: 00:1c.4: enabled 0
1734 16:14:55.471171 PCI: 00:1c.5: enabled 0
1735 16:14:55.474736 PCI: 00:1c.6: enabled 1
1736 16:14:55.475239 PCI: 00:1c.7: enabled 0
1737 16:14:55.478262 PCI: 00:1d.0: enabled 1
1738 16:14:55.480766 PCI: 00:1d.1: enabled 0
1739 16:14:55.484015 PCI: 00:1d.2: enabled 1
1740 16:14:55.484422 PCI: 00:1d.3: enabled 0
1741 16:14:55.487789 PCI: 00:1e.0: enabled 1
1742 16:14:55.491076 PCI: 00:1e.1: enabled 0
1743 16:14:55.493983 PCI: 00:1e.2: enabled 1
1744 16:14:55.494399 PCI: 00:1e.3: enabled 1
1745 16:14:55.497548 PCI: 00:1f.0: enabled 1
1746 16:14:55.501096 PCI: 00:1f.1: enabled 0
1747 16:14:55.504018 PCI: 00:1f.2: enabled 1
1748 16:14:55.504430 PCI: 00:1f.3: enabled 1
1749 16:14:55.507023 PCI: 00:1f.4: enabled 0
1750 16:14:55.510531 PCI: 00:1f.5: enabled 1
1751 16:14:55.514363 PCI: 00:1f.6: enabled 0
1752 16:14:55.514769 PCI: 00:1f.7: enabled 0
1753 16:14:55.517206 APIC: 00: enabled 1
1754 16:14:55.520383 GENERIC: 0.0: enabled 1
1755 16:14:55.520794 GENERIC: 0.0: enabled 1
1756 16:14:55.524036 GENERIC: 1.0: enabled 1
1757 16:14:55.526852 GENERIC: 0.0: enabled 1
1758 16:14:55.530060 GENERIC: 1.0: enabled 1
1759 16:14:55.530469 USB0 port 0: enabled 1
1760 16:14:55.533668 GENERIC: 0.0: enabled 1
1761 16:14:55.537262 USB0 port 0: enabled 1
1762 16:14:55.540117 GENERIC: 0.0: enabled 1
1763 16:14:55.540524 I2C: 00:1a: enabled 1
1764 16:14:55.544018 I2C: 00:31: enabled 1
1765 16:14:55.547396 I2C: 00:32: enabled 1
1766 16:14:55.548021 I2C: 00:10: enabled 1
1767 16:14:55.550493 I2C: 00:15: enabled 1
1768 16:14:55.553874 GENERIC: 0.0: enabled 0
1769 16:14:55.554353 GENERIC: 1.0: enabled 0
1770 16:14:55.556667 GENERIC: 0.0: enabled 1
1771 16:14:55.560264 SPI: 00: enabled 1
1772 16:14:55.560773 SPI: 00: enabled 1
1773 16:14:55.564095 PNP: 0c09.0: enabled 1
1774 16:14:55.566581 GENERIC: 0.0: enabled 1
1775 16:14:55.566987 USB3 port 0: enabled 1
1776 16:14:55.570027 USB3 port 1: enabled 1
1777 16:14:55.573597 USB3 port 2: enabled 0
1778 16:14:55.577121 USB3 port 3: enabled 0
1779 16:14:55.577630 USB2 port 0: enabled 0
1780 16:14:55.580338 USB2 port 1: enabled 1
1781 16:14:55.583342 USB2 port 2: enabled 1
1782 16:14:55.583910 USB2 port 3: enabled 0
1783 16:14:55.586548 USB2 port 4: enabled 1
1784 16:14:55.589880 USB2 port 5: enabled 0
1785 16:14:55.593477 USB2 port 6: enabled 0
1786 16:14:55.593939 USB2 port 7: enabled 0
1787 16:14:55.597094 USB2 port 8: enabled 0
1788 16:14:55.600092 USB2 port 9: enabled 0
1789 16:14:55.600618 USB3 port 0: enabled 0
1790 16:14:55.603306 USB3 port 1: enabled 1
1791 16:14:55.606806 USB3 port 2: enabled 0
1792 16:14:55.610045 USB3 port 3: enabled 0
1793 16:14:55.610451 GENERIC: 0.0: enabled 1
1794 16:14:55.612887 GENERIC: 1.0: enabled 1
1795 16:14:55.616297 APIC: 01: enabled 1
1796 16:14:55.616702 APIC: 07: enabled 1
1797 16:14:55.620082 APIC: 03: enabled 1
1798 16:14:55.620619 APIC: 04: enabled 1
1799 16:14:55.623206 APIC: 06: enabled 1
1800 16:14:55.626473 APIC: 02: enabled 1
1801 16:14:55.626883 APIC: 05: enabled 1
1802 16:14:55.629599 PCI: 01:00.0: enabled 1
1803 16:14:55.636362 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1804 16:14:55.639406 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1805 16:14:55.642389 ELOG: NV offset 0xf30000 size 0x1000
1806 16:14:55.650890 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1807 16:14:55.657186 ELOG: Event(17) added with size 13 at 2023-10-20 16:13:21 UTC
1808 16:14:55.664054 ELOG: Event(92) added with size 9 at 2023-10-20 16:13:21 UTC
1809 16:14:55.671202 ELOG: Event(93) added with size 9 at 2023-10-20 16:13:21 UTC
1810 16:14:55.677592 ELOG: Event(9E) added with size 10 at 2023-10-20 16:13:21 UTC
1811 16:14:55.683795 ELOG: Event(9F) added with size 14 at 2023-10-20 16:13:21 UTC
1812 16:14:55.690356 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1813 16:14:55.697484 ELOG: Event(A1) added with size 10 at 2023-10-20 16:13:21 UTC
1814 16:14:55.703580 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1815 16:14:55.709989 ELOG: Event(A0) added with size 9 at 2023-10-20 16:13:21 UTC
1816 16:14:55.713544 elog_add_boot_reason: Logged dev mode boot
1817 16:14:55.720628 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1818 16:14:55.721140 Finalize devices...
1819 16:14:55.724108 Devices finalized
1820 16:14:55.730381 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1821 16:14:55.733542 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1822 16:14:55.739718 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1823 16:14:55.742987 ME: HFSTS1 : 0x80030055
1824 16:14:55.749721 ME: HFSTS2 : 0x30280116
1825 16:14:55.752816 ME: HFSTS3 : 0x00000050
1826 16:14:55.756150 ME: HFSTS4 : 0x00004000
1827 16:14:55.762797 ME: HFSTS5 : 0x00000000
1828 16:14:55.766050 ME: HFSTS6 : 0x40400006
1829 16:14:55.769591 ME: Manufacturing Mode : YES
1830 16:14:55.773085 ME: SPI Protection Mode Enabled : NO
1831 16:14:55.779996 ME: FW Partition Table : OK
1832 16:14:55.783265 ME: Bringup Loader Failure : NO
1833 16:14:55.786187 ME: Firmware Init Complete : NO
1834 16:14:55.789625 ME: Boot Options Present : NO
1835 16:14:55.793069 ME: Update In Progress : NO
1836 16:14:55.796371 ME: D0i3 Support : YES
1837 16:14:55.799359 ME: Low Power State Enabled : NO
1838 16:14:55.806004 ME: CPU Replaced : YES
1839 16:14:55.809040 ME: CPU Replacement Valid : YES
1840 16:14:55.812867 ME: Current Working State : 5
1841 16:14:55.816117 ME: Current Operation State : 1
1842 16:14:55.819460 ME: Current Operation Mode : 3
1843 16:14:55.822785 ME: Error Code : 0
1844 16:14:55.826302 ME: Enhanced Debug Mode : NO
1845 16:14:55.829804 ME: CPU Debug Disabled : YES
1846 16:14:55.832525 ME: TXT Support : NO
1847 16:14:55.839072 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1848 16:14:55.848544 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1849 16:14:55.852364 CBFS: 'fallback/slic' not found.
1850 16:14:55.855255 ACPI: Writing ACPI tables at 76b01000.
1851 16:14:55.855714 ACPI: * FACS
1852 16:14:55.858458 ACPI: * DSDT
1853 16:14:55.862151 Ramoops buffer: 0x100000@0x76a00000.
1854 16:14:55.865404 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1855 16:14:55.871965 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1856 16:14:55.875730 Google Chrome EC: version:
1857 16:14:55.878789 ro: voema_v2.0.10114-a447f03e46
1858 16:14:55.881675 rw: voema_v2.0.10132-7b2059e3bc
1859 16:14:55.885306 running image: 2
1860 16:14:55.891780 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1861 16:14:55.895273 ACPI: * FADT
1862 16:14:55.895855 SCI is IRQ9
1863 16:14:55.898660 ACPI: added table 1/32, length now 40
1864 16:14:55.902022 ACPI: * SSDT
1865 16:14:55.904863 Found 1 CPU(s) with 8 core(s) each.
1866 16:14:55.908445 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1867 16:14:55.915393 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1868 16:14:55.918163 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1869 16:14:55.921434 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1870 16:14:55.928045 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1871 16:14:55.934994 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1872 16:14:55.938113 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1873 16:14:55.944861 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1874 16:14:55.951137 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1875 16:14:55.954652 \_SB.PCI0.RP09: Added StorageD3Enable property
1876 16:14:55.957753 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1877 16:14:55.963983 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1878 16:14:55.971161 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1879 16:14:55.974673 PS2K: Passing 80 keymaps to kernel
1880 16:14:55.980918 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1881 16:14:55.987994 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1882 16:14:55.993888 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1883 16:14:56.000761 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1884 16:14:56.007509 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1885 16:14:56.014229 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1886 16:14:56.020760 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1887 16:14:56.027160 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1888 16:14:56.030279 ACPI: added table 2/32, length now 44
1889 16:14:56.033503 ACPI: * MCFG
1890 16:14:56.036952 ACPI: added table 3/32, length now 48
1891 16:14:56.037598 ACPI: * TPM2
1892 16:14:56.039930 TPM2 log created at 0x769f0000
1893 16:14:56.043280 ACPI: added table 4/32, length now 52
1894 16:14:56.046691 ACPI: * MADT
1895 16:14:56.047291 SCI is IRQ9
1896 16:14:56.050009 ACPI: added table 5/32, length now 56
1897 16:14:56.053176 current = 76b09850
1898 16:14:56.053705 ACPI: * DMAR
1899 16:14:56.059965 ACPI: added table 6/32, length now 60
1900 16:14:56.063434 ACPI: added table 7/32, length now 64
1901 16:14:56.064014 ACPI: * HPET
1902 16:14:56.067082 ACPI: added table 8/32, length now 68
1903 16:14:56.070304 ACPI: done.
1904 16:14:56.073540 ACPI tables: 35216 bytes.
1905 16:14:56.074063 smbios_write_tables: 769ef000
1906 16:14:56.076902 EC returned error result code 3
1907 16:14:56.083001 Couldn't obtain OEM name from CBI
1908 16:14:56.086518 Create SMBIOS type 16
1909 16:14:56.086948 Create SMBIOS type 17
1910 16:14:56.089872 GENERIC: 0.0 (WIFI Device)
1911 16:14:56.093202 SMBIOS tables: 1734 bytes.
1912 16:14:56.096628 Writing table forward entry at 0x00000500
1913 16:14:56.103153 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1914 16:14:56.106509 Writing coreboot table at 0x76b25000
1915 16:14:56.113032 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1916 16:14:56.119374 1. 0000000000001000-000000000009ffff: RAM
1917 16:14:56.122942 2. 00000000000a0000-00000000000fffff: RESERVED
1918 16:14:56.126117 3. 0000000000100000-00000000769eefff: RAM
1919 16:14:56.132627 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1920 16:14:56.139626 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1921 16:14:56.142502 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1922 16:14:56.149361 7. 0000000077000000-000000007fbfffff: RESERVED
1923 16:14:56.152267 8. 00000000c0000000-00000000cfffffff: RESERVED
1924 16:14:56.158924 9. 00000000f8000000-00000000f9ffffff: RESERVED
1925 16:14:56.162678 10. 00000000fb000000-00000000fb000fff: RESERVED
1926 16:14:56.168680 11. 00000000fe000000-00000000fe00ffff: RESERVED
1927 16:14:56.172017 12. 00000000fed80000-00000000fed87fff: RESERVED
1928 16:14:56.175456 13. 00000000fed90000-00000000fed92fff: RESERVED
1929 16:14:56.182170 14. 00000000feda0000-00000000feda1fff: RESERVED
1930 16:14:56.185683 15. 00000000fedc0000-00000000feddffff: RESERVED
1931 16:14:56.192040 16. 0000000100000000-00000004803fffff: RAM
1932 16:14:56.195313 Passing 4 GPIOs to payload:
1933 16:14:56.198916 NAME | PORT | POLARITY | VALUE
1934 16:14:56.205147 lid | undefined | high | high
1935 16:14:56.208318 power | undefined | high | low
1936 16:14:56.215270 oprom | undefined | high | low
1937 16:14:56.221439 EC in RW | 0x000000e5 | high | high
1938 16:14:56.224800 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7e26
1939 16:14:56.228300 coreboot table: 1576 bytes.
1940 16:14:56.231726 IMD ROOT 0. 0x76fff000 0x00001000
1941 16:14:56.238382 IMD SMALL 1. 0x76ffe000 0x00001000
1942 16:14:56.241545 FSP MEMORY 2. 0x76c4e000 0x003b0000
1943 16:14:56.244688 VPD 3. 0x76c4d000 0x00000367
1944 16:14:56.248087 RO MCACHE 4. 0x76c4c000 0x00000fdc
1945 16:14:56.251298 CONSOLE 5. 0x76c2c000 0x00020000
1946 16:14:56.254533 FMAP 6. 0x76c2b000 0x00000578
1947 16:14:56.258216 TIME STAMP 7. 0x76c2a000 0x00000910
1948 16:14:56.261326 VBOOT WORK 8. 0x76c16000 0x00014000
1949 16:14:56.267975 ROMSTG STCK 9. 0x76c15000 0x00001000
1950 16:14:56.271226 AFTER CAR 10. 0x76c0a000 0x0000b000
1951 16:14:56.274202 RAMSTAGE 11. 0x76b97000 0x00073000
1952 16:14:56.277996 REFCODE 12. 0x76b42000 0x00055000
1953 16:14:56.281130 SMM BACKUP 13. 0x76b32000 0x00010000
1954 16:14:56.284712 4f444749 14. 0x76b30000 0x00002000
1955 16:14:56.287458 EXT VBT15. 0x76b2d000 0x0000219f
1956 16:14:56.291056 COREBOOT 16. 0x76b25000 0x00008000
1957 16:14:56.298057 ACPI 17. 0x76b01000 0x00024000
1958 16:14:56.300653 ACPI GNVS 18. 0x76b00000 0x00001000
1959 16:14:56.304089 RAMOOPS 19. 0x76a00000 0x00100000
1960 16:14:56.307687 TPM2 TCGLOG20. 0x769f0000 0x00010000
1961 16:14:56.311331 SMBIOS 21. 0x769ef000 0x00000800
1962 16:14:56.314314 IMD small region:
1963 16:14:56.316971 IMD ROOT 0. 0x76ffec00 0x00000400
1964 16:14:56.321266 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1965 16:14:56.324143 POWER STATE 2. 0x76ffeb80 0x00000044
1966 16:14:56.327692 ROMSTAGE 3. 0x76ffeb60 0x00000004
1967 16:14:56.333868 MEM INFO 4. 0x76ffe980 0x000001e0
1968 16:14:56.337179 BS: BS_WRITE_TABLES run times (exec / console): 9 / 484 ms
1969 16:14:56.340308 MTRR: Physical address space:
1970 16:14:56.346813 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1971 16:14:56.354055 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1972 16:14:56.360238 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1973 16:14:56.367181 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1974 16:14:56.373732 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1975 16:14:56.380495 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1976 16:14:56.387021 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1977 16:14:56.390243 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 16:14:56.393919 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 16:14:56.396831 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 16:14:56.400448 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 16:14:56.407251 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 16:14:56.410368 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 16:14:56.414159 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 16:14:56.416877 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 16:14:56.424101 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 16:14:56.426852 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 16:14:56.430227 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 16:14:56.434280 call enable_fixed_mtrr()
1989 16:14:56.437773 CPU physical address size: 39 bits
1990 16:14:56.444073 MTRR: default type WB/UC MTRR counts: 6/7.
1991 16:14:56.447577 MTRR: WB selected as default type.
1992 16:14:56.454477 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1993 16:14:56.460296 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1994 16:14:56.463814 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1995 16:14:56.470059 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1996 16:14:56.476600 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1997 16:14:56.483258 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1998 16:14:56.487712
1999 16:14:56.488210 MTRR check
2000 16:14:56.491291 Fixed MTRRs : Enabled
2001 16:14:56.491842 Variable MTRRs: Enabled
2002 16:14:56.492268
2003 16:14:56.497158 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 16:14:56.500801 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 16:14:56.504141 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 16:14:56.507573 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 16:14:56.514085 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 16:14:56.518002 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 16:14:56.520554 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 16:14:56.523824 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 16:14:56.530437 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 16:14:56.533698 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 16:14:56.537109 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 16:14:56.540663 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 16:14:56.547246 MTRR: Fixed MSR 0x250 0x0606060606060606
2016 16:14:56.550211 MTRR: Fixed MSR 0x258 0x0606060606060606
2017 16:14:56.553541 MTRR: Fixed MSR 0x259 0x0000000000000000
2018 16:14:56.556745 MTRR: Fixed MSR 0x268 0x0606060606060606
2019 16:14:56.563757 MTRR: Fixed MSR 0x269 0x0606060606060606
2020 16:14:56.567059 MTRR: Fixed MSR 0x26a 0x0606060606060606
2021 16:14:56.569850 MTRR: Fixed MSR 0x26b 0x0606060606060606
2022 16:14:56.573317 MTRR: Fixed MSR 0x26c 0x0606060606060606
2023 16:14:56.577194 MTRR: Fixed MSR 0x26d 0x0606060606060606
2024 16:14:56.583589 MTRR: Fixed MSR 0x26e 0x0606060606060606
2025 16:14:56.587289 MTRR: Fixed MSR 0x26f 0x0606060606060606
2026 16:14:56.593710 MTRR: Fixed MSR 0x258 0x0606060606060606
2027 16:14:56.594435 call enable_fixed_mtrr()
2028 16:14:56.600222 MTRR: Fixed MSR 0x259 0x0000000000000000
2029 16:14:56.603627 MTRR: Fixed MSR 0x268 0x0606060606060606
2030 16:14:56.606969 MTRR: Fixed MSR 0x269 0x0606060606060606
2031 16:14:56.610366 MTRR: Fixed MSR 0x26a 0x0606060606060606
2032 16:14:56.616900 MTRR: Fixed MSR 0x26b 0x0606060606060606
2033 16:14:56.620497 MTRR: Fixed MSR 0x26c 0x0606060606060606
2034 16:14:56.623778 MTRR: Fixed MSR 0x26d 0x0606060606060606
2035 16:14:56.627056 MTRR: Fixed MSR 0x26e 0x0606060606060606
2036 16:14:56.633155 MTRR: Fixed MSR 0x26f 0x0606060606060606
2037 16:14:56.636377 CPU physical address size: 39 bits
2038 16:14:56.640785 call enable_fixed_mtrr()
2039 16:14:56.644192 call enable_fixed_mtrr()
2040 16:14:56.651013 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2041 16:14:56.654431 CPU physical address size: 39 bits
2042 16:14:56.657934 MTRR: Fixed MSR 0x250 0x0606060606060606
2043 16:14:56.661088 MTRR: Fixed MSR 0x250 0x0606060606060606
2044 16:14:56.667287 MTRR: Fixed MSR 0x258 0x0606060606060606
2045 16:14:56.670657 MTRR: Fixed MSR 0x259 0x0000000000000000
2046 16:14:56.674115 MTRR: Fixed MSR 0x268 0x0606060606060606
2047 16:14:56.677453 MTRR: Fixed MSR 0x269 0x0606060606060606
2048 16:14:56.681303 MTRR: Fixed MSR 0x26a 0x0606060606060606
2049 16:14:56.687579 MTRR: Fixed MSR 0x26b 0x0606060606060606
2050 16:14:56.690541 MTRR: Fixed MSR 0x26c 0x0606060606060606
2051 16:14:56.694026 MTRR: Fixed MSR 0x26d 0x0606060606060606
2052 16:14:56.697514 MTRR: Fixed MSR 0x26e 0x0606060606060606
2053 16:14:56.704234 MTRR: Fixed MSR 0x26f 0x0606060606060606
2054 16:14:56.707483 MTRR: Fixed MSR 0x258 0x0606060606060606
2055 16:14:56.710837 call enable_fixed_mtrr()
2056 16:14:56.714432 MTRR: Fixed MSR 0x259 0x0000000000000000
2057 16:14:56.720710 MTRR: Fixed MSR 0x268 0x0606060606060606
2058 16:14:56.724121 MTRR: Fixed MSR 0x269 0x0606060606060606
2059 16:14:56.727609 MTRR: Fixed MSR 0x26a 0x0606060606060606
2060 16:14:56.730312 MTRR: Fixed MSR 0x26b 0x0606060606060606
2061 16:14:56.737124 MTRR: Fixed MSR 0x26c 0x0606060606060606
2062 16:14:56.740392 MTRR: Fixed MSR 0x26d 0x0606060606060606
2063 16:14:56.743811 MTRR: Fixed MSR 0x26e 0x0606060606060606
2064 16:14:56.746867 MTRR: Fixed MSR 0x26f 0x0606060606060606
2065 16:14:56.752291 CPU physical address size: 39 bits
2066 16:14:56.758553 call enable_fixed_mtrr()
2067 16:14:56.761705 MTRR: Fixed MSR 0x250 0x0606060606060606
2068 16:14:56.765794 MTRR: Fixed MSR 0x250 0x0606060606060606
2069 16:14:56.772156 MTRR: Fixed MSR 0x258 0x0606060606060606
2070 16:14:56.775541 MTRR: Fixed MSR 0x259 0x0000000000000000
2071 16:14:56.778633 MTRR: Fixed MSR 0x268 0x0606060606060606
2072 16:14:56.781914 MTRR: Fixed MSR 0x269 0x0606060606060606
2073 16:14:56.788199 MTRR: Fixed MSR 0x26a 0x0606060606060606
2074 16:14:56.791536 MTRR: Fixed MSR 0x26b 0x0606060606060606
2075 16:14:56.794949 MTRR: Fixed MSR 0x26c 0x0606060606060606
2076 16:14:56.798200 MTRR: Fixed MSR 0x26d 0x0606060606060606
2077 16:14:56.801760 MTRR: Fixed MSR 0x26e 0x0606060606060606
2078 16:14:56.808029 MTRR: Fixed MSR 0x26f 0x0606060606060606
2079 16:14:56.814365 MTRR: Fixed MSR 0x258 0x0606060606060606
2080 16:14:56.817743 MTRR: Fixed MSR 0x259 0x0000000000000000
2081 16:14:56.821106 MTRR: Fixed MSR 0x268 0x0606060606060606
2082 16:14:56.824273 MTRR: Fixed MSR 0x269 0x0606060606060606
2083 16:14:56.830930 MTRR: Fixed MSR 0x26a 0x0606060606060606
2084 16:14:56.834099 MTRR: Fixed MSR 0x26b 0x0606060606060606
2085 16:14:56.837640 MTRR: Fixed MSR 0x26c 0x0606060606060606
2086 16:14:56.840866 MTRR: Fixed MSR 0x26d 0x0606060606060606
2087 16:14:56.847191 MTRR: Fixed MSR 0x26e 0x0606060606060606
2088 16:14:56.850649 MTRR: Fixed MSR 0x26f 0x0606060606060606
2089 16:14:56.853429 call enable_fixed_mtrr()
2090 16:14:56.856769 call enable_fixed_mtrr()
2091 16:14:56.860629 Checking cr50 for pending updates
2092 16:14:56.864229 CPU physical address size: 39 bits
2093 16:14:56.867467 CPU physical address size: 39 bits
2094 16:14:56.870746 CPU physical address size: 39 bits
2095 16:14:56.874578 Reading cr50 TPM mode
2096 16:14:56.878590 CPU physical address size: 39 bits
2097 16:14:56.885048 BS: BS_PAYLOAD_LOAD entry times (exec / console): 223 / 6 ms
2098 16:14:56.895274 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2099 16:14:56.898522 Checking segment from ROM address 0xffc02b38
2100 16:14:56.901936 Checking segment from ROM address 0xffc02b54
2101 16:14:56.908258 Loading segment from ROM address 0xffc02b38
2102 16:14:56.908497 code (compression=0)
2103 16:14:56.918383 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2104 16:14:56.928253 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2105 16:14:56.928681 it's not compressed!
2106 16:14:57.068612 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2107 16:14:57.075126 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2108 16:14:57.082383 Loading segment from ROM address 0xffc02b54
2109 16:14:57.085397 Entry Point 0x30000000
2110 16:14:57.085816 Loaded segments
2111 16:14:57.091480 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2112 16:14:57.137245 Finalizing chipset.
2113 16:14:57.139873 Finalizing SMM.
2114 16:14:57.140297 APMC done.
2115 16:14:57.146825 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2116 16:14:57.150354 mp_park_aps done after 0 msecs.
2117 16:14:57.153781 Jumping to boot code at 0x30000000(0x76b25000)
2118 16:14:57.163326 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2119 16:14:57.163911
2120 16:14:57.166751
2121 16:14:57.167163
2122 16:14:57.168229 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2123 16:14:57.168720 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2124 16:14:57.169133 Setting prompt string to ['volteer:']
2125 16:14:57.169525 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2126 16:14:57.170187 Starting depthcharge on Voema...
2127 16:14:57.170549
2128 16:14:57.176416 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2129 16:14:57.176922
2130 16:14:57.183556 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2131 16:14:57.184159
2132 16:14:57.190248 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2133 16:14:57.190762
2134 16:14:57.193351 Failed to find eMMC card reader
2135 16:14:57.193769
2136 16:14:57.196557 Wipe memory regions:
2137 16:14:57.196990
2138 16:14:57.199757 [0x00000000001000, 0x000000000a0000)
2139 16:14:57.200176
2140 16:14:57.202892 [0x00000000100000, 0x00000030000000)
2141 16:14:57.238739
2142 16:14:57.241983 [0x00000032662db0, 0x000000769ef000)
2143 16:14:57.291964
2144 16:14:57.295282 [0x00000100000000, 0x00000480400000)
2145 16:14:57.918991
2146 16:14:57.922464 ec_init: CrosEC protocol v3 supported (256, 256)
2147 16:14:58.353440
2148 16:14:58.353956 R8152: Initializing
2149 16:14:58.354294
2150 16:14:58.357156 Version 6 (ocp_data = 5c30)
2151 16:14:58.357676
2152 16:14:58.360433 R8152: Done initializing
2153 16:14:58.360951
2154 16:14:58.362949 Adding net device
2155 16:14:58.664470
2156 16:14:58.668596 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2157 16:14:58.669108
2158 16:14:58.669442
2159 16:14:58.669752
2160 16:14:58.671455 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2162 16:14:58.772735 volteer: tftpboot 192.168.201.1 11830987/tftp-deploy-hdvhw1vj/kernel/bzImage 11830987/tftp-deploy-hdvhw1vj/kernel/cmdline 11830987/tftp-deploy-hdvhw1vj/ramdisk/ramdisk.cpio.gz
2163 16:14:58.773423 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2164 16:14:58.773932 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2165 16:14:58.777943 tftpboot 192.168.201.1 11830987/tftp-deploy-hdvhw1vj/kernel/bzIploy-hdvhw1vj/kernel/cmdline 11830987/tftp-deploy-hdvhw1vj/ramdisk/ramdisk.cpio.gz
2166 16:14:58.778616
2167 16:14:58.779061 Waiting for link
2168 16:14:58.981338
2169 16:14:58.981848 done.
2170 16:14:58.982180
2171 16:14:58.982487 MAC: 00:24:32:30:7e:22
2172 16:14:58.982804
2173 16:14:58.984386 Sending DHCP discover... done.
2174 16:14:58.984799
2175 16:14:58.987688 Waiting for reply... done.
2176 16:14:58.988370
2177 16:14:58.991210 Sending DHCP request... done.
2178 16:14:58.991735
2179 16:14:58.994772 Waiting for reply... done.
2180 16:14:58.995293
2181 16:14:58.997685 My ip is 192.168.201.21
2182 16:14:58.998093
2183 16:14:59.000847 The DHCP server ip is 192.168.201.1
2184 16:14:59.001340
2185 16:14:59.007790 TFTP server IP predefined by user: 192.168.201.1
2186 16:14:59.008206
2187 16:14:59.014229 Bootfile predefined by user: 11830987/tftp-deploy-hdvhw1vj/kernel/bzImage
2188 16:14:59.014749
2189 16:14:59.017291 Sending tftp read request... done.
2190 16:14:59.017702
2191 16:14:59.025710 Waiting for the transfer...
2192 16:14:59.026226
2193 16:14:59.730644 00000000 ################################################################
2194 16:14:59.731157
2195 16:15:00.443674 00080000 ################################################################
2196 16:15:00.444178
2197 16:15:01.162754 00100000 ################################################################
2198 16:15:01.163397
2199 16:15:01.885315 00180000 ################################################################
2200 16:15:01.885838
2201 16:15:02.588061 00200000 ################################################################
2202 16:15:02.588456
2203 16:15:03.300857 00280000 ################################################################
2204 16:15:03.301351
2205 16:15:04.015545 00300000 ################################################################
2206 16:15:04.016120
2207 16:15:04.728208 00380000 ################################################################
2208 16:15:04.728705
2209 16:15:05.449304 00400000 ################################################################
2210 16:15:05.449818
2211 16:15:06.160259 00480000 ################################################################
2212 16:15:06.160956
2213 16:15:06.865481 00500000 ################################################################
2214 16:15:06.865966
2215 16:15:07.573961 00580000 ################################################################
2216 16:15:07.574486
2217 16:15:08.271793 00600000 ################################################################
2218 16:15:08.272370
2219 16:15:08.980887 00680000 ################################################################
2220 16:15:08.981379
2221 16:15:09.659802 00700000 ################################################################
2222 16:15:09.660365
2223 16:15:10.399730 00780000 ################################################################
2224 16:15:10.400231
2225 16:15:10.580214 00800000 ################ done.
2226 16:15:10.580720
2227 16:15:10.583194 The bootfile was 8515472 bytes long.
2228 16:15:10.583603
2229 16:15:10.586055 Sending tftp read request... done.
2230 16:15:10.586484
2231 16:15:10.589514 Waiting for the transfer...
2232 16:15:10.589938
2233 16:15:11.184835 00000000 ################################################################
2234 16:15:11.185408
2235 16:15:11.919555 00080000 ################################################################
2236 16:15:11.920090
2237 16:15:12.622202 00100000 ################################################################
2238 16:15:12.622704
2239 16:15:13.333677 00180000 ################################################################
2240 16:15:13.334236
2241 16:15:14.061494 00200000 ################################################################
2242 16:15:14.062012
2243 16:15:14.731161 00280000 ################################################################
2244 16:15:14.731691
2245 16:15:15.450979 00300000 ################################################################
2246 16:15:15.451485
2247 16:15:16.161760 00380000 ################################################################
2248 16:15:16.162262
2249 16:15:16.877854 00400000 ################################################################
2250 16:15:16.878360
2251 16:15:17.600204 00480000 ################################################################
2252 16:15:17.600714
2253 16:15:18.308041 00500000 ################################################################ done.
2254 16:15:18.308554
2255 16:15:18.311243 Sending tftp read request... done.
2256 16:15:18.311706
2257 16:15:18.314672 Waiting for the transfer...
2258 16:15:18.315084
2259 16:15:18.315409 00000000 # done.
2260 16:15:18.315776
2261 16:15:18.324905 Command line loaded dynamically from TFTP file: 11830987/tftp-deploy-hdvhw1vj/kernel/cmdline
2262 16:15:18.325324
2263 16:15:18.351059 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11830987/extract-nfsrootfs-29nq87ml,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2264 16:15:18.353900
2265 16:15:18.357232 Shutting down all USB controllers.
2266 16:15:18.357645
2267 16:15:18.357964 Removing current net device
2268 16:15:18.358258
2269 16:15:18.360675 Finalizing coreboot
2270 16:15:18.361082
2271 16:15:18.367461 Exiting depthcharge with code 4 at timestamp: 29774386
2272 16:15:18.368018
2273 16:15:18.368352
2274 16:15:18.368656 Starting kernel ...
2275 16:15:18.368960
2276 16:15:18.369247
2277 16:15:18.370366 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2278 16:15:18.370839 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2279 16:15:18.371202 Setting prompt string to ['Linux version [0-9]']
2280 16:15:18.371534 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2281 16:15:18.371996 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2283 16:19:41.371845 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2285 16:19:41.372934 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2287 16:19:41.373787 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2290 16:19:41.375523 end: 2 depthcharge-action (duration 00:05:00) [common]
2292 16:19:41.376813 Cleaning after the job
2293 16:19:41.377454 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11830987/tftp-deploy-hdvhw1vj/ramdisk
2294 16:19:41.382455 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11830987/tftp-deploy-hdvhw1vj/kernel
2295 16:19:41.388835 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11830987/tftp-deploy-hdvhw1vj/nfsrootfs
2296 16:19:41.492583 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11830987/tftp-deploy-hdvhw1vj/modules
2297 16:19:41.493054 start: 5.1 power-off (timeout 00:00:30) [common]
2298 16:19:41.493220 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=off'
2299 16:19:41.576604 >> Command sent successfully.
2300 16:19:41.587470 Returned 0 in 0 seconds
2301 16:19:41.688859 end: 5.1 power-off (duration 00:00:00) [common]
2303 16:19:41.690371 start: 5.2 read-feedback (timeout 00:10:00) [common]
2304 16:19:41.691743 Listened to connection for namespace 'common' for up to 1s
2305 16:19:42.691749 Finalising connection for namespace 'common'
2306 16:19:42.691917 Disconnecting from shell: Finalise
2307 16:19:42.691998
2308 16:19:42.792322 end: 5.2 read-feedback (duration 00:00:01) [common]
2309 16:19:42.792471 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11830987
2310 16:19:43.110430 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11830987
2311 16:19:43.110623 JobError: Your job cannot terminate cleanly.