Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 11:31:00.088298 lava-dispatcher, installed at version: 2024.01
2 11:31:00.088556 start: 0 validate
3 11:31:00.088687 Start time: 2024-03-18 11:31:00.088680+00:00 (UTC)
4 11:31:00.088811 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:31:00.088940 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 11:31:00.339080 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:31:00.339260 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-3115-g0a25e06c1d85%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:31:03.354314 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:31:03.354993 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-3115-g0a25e06c1d85%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 11:31:03.617326 validate duration: 3.53
12 11:31:03.618919 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:31:03.619475 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:31:03.619994 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:31:03.620624 Not decompressing ramdisk as can be used compressed.
16 11:31:03.621101 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 11:31:03.621470 saving as /var/lib/lava/dispatcher/tmp/13086407/tftp-deploy-2uxwlu71/ramdisk/rootfs.cpio.gz
18 11:31:03.621889 total size: 8418130 (8 MB)
19 11:31:04.105740 progress 0 % (0 MB)
20 11:31:04.119451 progress 5 % (0 MB)
21 11:31:04.132513 progress 10 % (0 MB)
22 11:31:04.141126 progress 15 % (1 MB)
23 11:31:04.146929 progress 20 % (1 MB)
24 11:31:04.151621 progress 25 % (2 MB)
25 11:31:04.155666 progress 30 % (2 MB)
26 11:31:04.159068 progress 35 % (2 MB)
27 11:31:04.162336 progress 40 % (3 MB)
28 11:31:04.165476 progress 45 % (3 MB)
29 11:31:04.168482 progress 50 % (4 MB)
30 11:31:04.171114 progress 55 % (4 MB)
31 11:31:04.173724 progress 60 % (4 MB)
32 11:31:04.175865 progress 65 % (5 MB)
33 11:31:04.178186 progress 70 % (5 MB)
34 11:31:04.180478 progress 75 % (6 MB)
35 11:31:04.182681 progress 80 % (6 MB)
36 11:31:04.184933 progress 85 % (6 MB)
37 11:31:04.187150 progress 90 % (7 MB)
38 11:31:04.189399 progress 95 % (7 MB)
39 11:31:04.191459 progress 100 % (8 MB)
40 11:31:04.191696 8 MB downloaded in 0.57 s (14.09 MB/s)
41 11:31:04.191855 end: 1.1.1 http-download (duration 00:00:01) [common]
43 11:31:04.192093 end: 1.1 download-retry (duration 00:00:01) [common]
44 11:31:04.192181 start: 1.2 download-retry (timeout 00:09:59) [common]
45 11:31:04.192265 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 11:31:04.192435 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-3115-g0a25e06c1d85/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 11:31:04.192508 saving as /var/lib/lava/dispatcher/tmp/13086407/tftp-deploy-2uxwlu71/kernel/bzImage
48 11:31:04.192569 total size: 9375632 (8 MB)
49 11:31:04.192631 No compression specified
50 11:31:04.193698 progress 0 % (0 MB)
51 11:31:04.196212 progress 5 % (0 MB)
52 11:31:04.198643 progress 10 % (0 MB)
53 11:31:04.201120 progress 15 % (1 MB)
54 11:31:04.203716 progress 20 % (1 MB)
55 11:31:04.206174 progress 25 % (2 MB)
56 11:31:04.208659 progress 30 % (2 MB)
57 11:31:04.211253 progress 35 % (3 MB)
58 11:31:04.213789 progress 40 % (3 MB)
59 11:31:04.216211 progress 45 % (4 MB)
60 11:31:04.218883 progress 50 % (4 MB)
61 11:31:04.221366 progress 55 % (4 MB)
62 11:31:04.223838 progress 60 % (5 MB)
63 11:31:04.226264 progress 65 % (5 MB)
64 11:31:04.228861 progress 70 % (6 MB)
65 11:31:04.231304 progress 75 % (6 MB)
66 11:31:04.233748 progress 80 % (7 MB)
67 11:31:04.236484 progress 85 % (7 MB)
68 11:31:04.238863 progress 90 % (8 MB)
69 11:31:04.241421 progress 95 % (8 MB)
70 11:31:04.243978 progress 100 % (8 MB)
71 11:31:04.244096 8 MB downloaded in 0.05 s (173.54 MB/s)
72 11:31:04.244242 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:31:04.244544 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:31:04.244637 start: 1.3 download-retry (timeout 00:09:59) [common]
76 11:31:04.244721 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 11:31:04.244871 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-3115-g0a25e06c1d85/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 11:31:04.244939 saving as /var/lib/lava/dispatcher/tmp/13086407/tftp-deploy-2uxwlu71/modules/modules.tar
79 11:31:04.244999 total size: 253492 (0 MB)
80 11:31:04.245061 Using unxz to decompress xz
81 11:31:04.249438 progress 12 % (0 MB)
82 11:31:04.249865 progress 25 % (0 MB)
83 11:31:04.250108 progress 38 % (0 MB)
84 11:31:04.251644 progress 51 % (0 MB)
85 11:31:04.253601 progress 64 % (0 MB)
86 11:31:04.255460 progress 77 % (0 MB)
87 11:31:04.257338 progress 90 % (0 MB)
88 11:31:04.259121 progress 100 % (0 MB)
89 11:31:04.264933 0 MB downloaded in 0.02 s (12.13 MB/s)
90 11:31:04.265220 end: 1.3.1 http-download (duration 00:00:00) [common]
92 11:31:04.265555 end: 1.3 download-retry (duration 00:00:00) [common]
93 11:31:04.265652 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 11:31:04.265745 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 11:31:04.265826 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 11:31:04.265914 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 11:31:04.266128 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43
98 11:31:04.266278 makedir: /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin
99 11:31:04.266390 makedir: /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/tests
100 11:31:04.266495 makedir: /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/results
101 11:31:04.266611 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-add-keys
102 11:31:04.266760 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-add-sources
103 11:31:04.266894 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-background-process-start
104 11:31:04.267060 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-background-process-stop
105 11:31:04.267349 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-common-functions
106 11:31:04.267481 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-echo-ipv4
107 11:31:04.267610 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-install-packages
108 11:31:04.267738 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-installed-packages
109 11:31:04.267864 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-os-build
110 11:31:04.267990 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-probe-channel
111 11:31:04.268117 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-probe-ip
112 11:31:04.268270 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-target-ip
113 11:31:04.268460 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-target-mac
114 11:31:04.268588 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-target-storage
115 11:31:04.268723 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-test-case
116 11:31:04.268852 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-test-event
117 11:31:04.268979 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-test-feedback
118 11:31:04.269140 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-test-raise
119 11:31:04.269272 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-test-reference
120 11:31:04.269404 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-test-runner
121 11:31:04.269531 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-test-set
122 11:31:04.269681 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-test-shell
123 11:31:04.269834 Updating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-install-packages (oe)
124 11:31:04.270011 Updating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/bin/lava-installed-packages (oe)
125 11:31:04.270137 Creating /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/environment
126 11:31:04.270240 LAVA metadata
127 11:31:04.270334 - LAVA_JOB_ID=13086407
128 11:31:04.270415 - LAVA_DISPATCHER_IP=192.168.201.1
129 11:31:04.270524 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 11:31:04.270589 skipped lava-vland-overlay
131 11:31:04.270666 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 11:31:04.270749 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 11:31:04.270823 skipped lava-multinode-overlay
134 11:31:04.270906 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 11:31:04.270988 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 11:31:04.271095 Loading test definitions
137 11:31:04.271190 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 11:31:04.271269 Using /lava-13086407 at stage 0
139 11:31:04.271595 uuid=13086407_1.4.2.3.1 testdef=None
140 11:31:04.271683 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 11:31:04.271769 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 11:31:04.272351 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 11:31:04.272574 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 11:31:04.273269 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 11:31:04.273501 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 11:31:04.274116 runner path: /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/0/tests/0_dmesg test_uuid 13086407_1.4.2.3.1
149 11:31:04.274275 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 11:31:04.274498 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 11:31:04.274570 Using /lava-13086407 at stage 1
153 11:31:04.274881 uuid=13086407_1.4.2.3.5 testdef=None
154 11:31:04.274969 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 11:31:04.275053 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 11:31:04.275520 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 11:31:04.275739 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 11:31:04.276421 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 11:31:04.276644 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 11:31:04.277370 runner path: /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/1/tests/1_bootrr test_uuid 13086407_1.4.2.3.5
163 11:31:04.277521 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 11:31:04.277728 Creating lava-test-runner.conf files
166 11:31:04.277792 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/0 for stage 0
167 11:31:04.277882 - 0_dmesg
168 11:31:04.277964 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13086407/lava-overlay-2vpils43/lava-13086407/1 for stage 1
169 11:31:04.278054 - 1_bootrr
170 11:31:04.278148 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 11:31:04.278231 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 11:31:04.286514 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 11:31:04.286651 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 11:31:04.286740 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 11:31:04.286826 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 11:31:04.286912 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 11:31:04.581750 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 11:31:04.582246 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 11:31:04.582426 extracting modules file /var/lib/lava/dispatcher/tmp/13086407/tftp-deploy-2uxwlu71/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13086407/extract-overlay-ramdisk-tue8lmzh/ramdisk
180 11:31:04.598723 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 11:31:04.598890 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 11:31:04.598989 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13086407/compress-overlay-kaui569k/overlay-1.4.2.4.tar.gz to ramdisk
183 11:31:04.599063 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13086407/compress-overlay-kaui569k/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13086407/extract-overlay-ramdisk-tue8lmzh/ramdisk
184 11:31:04.607972 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 11:31:04.608136 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 11:31:04.608235 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 11:31:04.608352 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 11:31:04.608436 Building ramdisk /var/lib/lava/dispatcher/tmp/13086407/extract-overlay-ramdisk-tue8lmzh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13086407/extract-overlay-ramdisk-tue8lmzh/ramdisk
189 11:31:04.772225 >> 49825 blocks
190 11:31:05.674568 rename /var/lib/lava/dispatcher/tmp/13086407/extract-overlay-ramdisk-tue8lmzh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13086407/tftp-deploy-2uxwlu71/ramdisk/ramdisk.cpio.gz
191 11:31:05.675135 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 11:31:05.675301 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 11:31:05.675444 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 11:31:05.675573 No mkimage arch provided, not using FIT.
195 11:31:05.675700 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 11:31:05.675829 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 11:31:05.675986 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 11:31:05.676143 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 11:31:05.676267 No LXC device requested
200 11:31:05.676406 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 11:31:05.676540 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 11:31:05.676666 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 11:31:05.676779 Checking files for TFTP limit of 4294967296 bytes.
204 11:31:05.677330 end: 1 tftp-deploy (duration 00:00:02) [common]
205 11:31:05.677481 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 11:31:05.677615 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 11:31:05.677790 substitutions:
208 11:31:05.677892 - {DTB}: None
209 11:31:05.677992 - {INITRD}: 13086407/tftp-deploy-2uxwlu71/ramdisk/ramdisk.cpio.gz
210 11:31:05.678086 - {KERNEL}: 13086407/tftp-deploy-2uxwlu71/kernel/bzImage
211 11:31:05.678176 - {LAVA_MAC}: None
212 11:31:05.678266 - {PRESEED_CONFIG}: None
213 11:31:05.678356 - {PRESEED_LOCAL}: None
214 11:31:05.678449 - {RAMDISK}: 13086407/tftp-deploy-2uxwlu71/ramdisk/ramdisk.cpio.gz
215 11:31:05.678542 - {ROOT_PART}: None
216 11:31:05.678633 - {ROOT}: None
217 11:31:05.678722 - {SERVER_IP}: 192.168.201.1
218 11:31:05.678811 - {TEE}: None
219 11:31:05.678900 Parsed boot commands:
220 11:31:05.678989 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 11:31:05.679266 Parsed boot commands: tftpboot 192.168.201.1 13086407/tftp-deploy-2uxwlu71/kernel/bzImage 13086407/tftp-deploy-2uxwlu71/kernel/cmdline 13086407/tftp-deploy-2uxwlu71/ramdisk/ramdisk.cpio.gz
222 11:31:05.679402 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 11:31:05.679534 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 11:31:05.679671 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 11:31:05.679797 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 11:31:05.680044 Not connected, no need to disconnect.
227 11:31:05.680170 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 11:31:05.680327 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 11:31:05.680433 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
230 11:31:05.685429 Setting prompt string to ['lava-test: # ']
231 11:31:05.685924 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 11:31:05.686094 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 11:31:05.686233 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 11:31:05.686372 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 11:31:05.686674 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
236 11:31:10.822604 >> Command sent successfully.
237 11:31:10.825695 Returned 0 in 5 seconds
238 11:31:10.926167 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 11:31:10.926625 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 11:31:10.926768 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 11:31:10.926897 Setting prompt string to 'Starting depthcharge on Helios...'
243 11:31:10.927006 Changing prompt to 'Starting depthcharge on Helios...'
244 11:31:10.927113 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
245 11:31:10.927497 [Enter `^Ec?' for help]
246 11:31:11.547379
247 11:31:11.547585
248 11:31:11.557469 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
249 11:31:11.560548 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
250 11:31:11.567139 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
251 11:31:11.570244 CPU: AES supported, TXT NOT supported, VT supported
252 11:31:11.577636 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
253 11:31:11.581133 PCH: device id 0284 (rev 00) is Cometlake-U Premium
254 11:31:11.587638 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
255 11:31:11.590984 VBOOT: Loading verstage.
256 11:31:11.594397 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 11:31:11.601304 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
258 11:31:11.603921 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 11:31:11.607604 CBFS @ c08000 size 3f8000
260 11:31:11.614120 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
261 11:31:11.617565 CBFS: Locating 'fallback/verstage'
262 11:31:11.620877 CBFS: Found @ offset 10fb80 size 1072c
263 11:31:11.624170
264 11:31:11.624303
265 11:31:11.634338 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
266 11:31:11.648303 Probing TPM: . done!
267 11:31:11.652048 TPM ready after 0 ms
268 11:31:11.655065 Connected to device vid:did:rid of 1ae0:0028:00
269 11:31:11.665318 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
270 11:31:11.668623 Initialized TPM device CR50 revision 0
271 11:31:11.713396 tlcl_send_startup: Startup return code is 0
272 11:31:11.713584 TPM: setup succeeded
273 11:31:11.726120 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
274 11:31:11.729387 Chrome EC: UHEPI supported
275 11:31:11.732720 Phase 1
276 11:31:11.736254 FMAP: area GBB found @ c05000 (12288 bytes)
277 11:31:11.742792 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
278 11:31:11.746403 Phase 2
279 11:31:11.746536 Phase 3
280 11:31:11.749420 FMAP: area GBB found @ c05000 (12288 bytes)
281 11:31:11.756593 VB2:vb2_report_dev_firmware() This is developer signed firmware
282 11:31:11.762856 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
283 11:31:11.766364 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
284 11:31:11.772879 VB2:vb2_verify_keyblock() Checking keyblock signature...
285 11:31:11.788706 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
286 11:31:11.791953 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
287 11:31:11.798932 VB2:vb2_verify_fw_preamble() Verifying preamble.
288 11:31:11.802643 Phase 4
289 11:31:11.806346 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
290 11:31:11.812384 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
291 11:31:11.992201 VB2:vb2_rsa_verify_digest() Digest check failed!
292 11:31:11.998846 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
293 11:31:11.998992 Saving nvdata
294 11:31:12.002267 Reboot requested (10020007)
295 11:31:12.005738 board_reset() called!
296 11:31:12.005861 full_reset() called!
297 11:31:16.513877
298 11:31:16.514043
299 11:31:16.523999 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 11:31:16.527418 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 11:31:16.533871 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 11:31:16.537414 CPU: AES supported, TXT NOT supported, VT supported
303 11:31:16.543910 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 11:31:16.547104 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 11:31:16.553833 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 11:31:16.557166 VBOOT: Loading verstage.
307 11:31:16.560493 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 11:31:16.567191 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 11:31:16.570634 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 11:31:16.573827 CBFS @ c08000 size 3f8000
311 11:31:16.580242 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 11:31:16.583377 CBFS: Locating 'fallback/verstage'
313 11:31:16.586953 CBFS: Found @ offset 10fb80 size 1072c
314 11:31:16.590758
315 11:31:16.590856
316 11:31:16.600772 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 11:31:16.614817 Probing TPM: . done!
318 11:31:16.618813 TPM ready after 0 ms
319 11:31:16.622137 Connected to device vid:did:rid of 1ae0:0028:00
320 11:31:16.632418 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
321 11:31:16.670972 Initialized TPM device CR50 revision 0
322 11:31:16.680172 tlcl_send_startup: Startup return code is 0
323 11:31:16.680381 TPM: setup succeeded
324 11:31:16.692722 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 11:31:16.696667 Chrome EC: UHEPI supported
326 11:31:16.699635 Phase 1
327 11:31:16.702984 FMAP: area GBB found @ c05000 (12288 bytes)
328 11:31:16.709850 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
329 11:31:16.716101 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
330 11:31:16.719650 Recovery requested (1009000e)
331 11:31:16.724872 Saving nvdata
332 11:31:16.731761 tlcl_extend: response is 0
333 11:31:16.740093 tlcl_extend: response is 0
334 11:31:16.747534 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
335 11:31:16.750842 CBFS @ c08000 size 3f8000
336 11:31:16.757092 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
337 11:31:16.760389 CBFS: Locating 'fallback/romstage'
338 11:31:16.763699 CBFS: Found @ offset 80 size 145fc
339 11:31:16.766853 Accumulated console time in verstage 98 ms
340 11:31:16.766945
341 11:31:16.767028
342 11:31:16.780487 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
343 11:31:16.787372 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
344 11:31:16.790007 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
345 11:31:16.793233 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 11:31:16.799938 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
347 11:31:16.803483 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
348 11:31:16.806836 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
349 11:31:16.810115 TCO_STS: 0000 0000
350 11:31:16.813706 GEN_PMCON: e0015238 00000200
351 11:31:16.816575 GBLRST_CAUSE: 00000000 00000000
352 11:31:16.816650 prev_sleep_state 5
353 11:31:16.819737 Boot Count incremented to 7746
354 11:31:16.827110 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 11:31:16.830084 CBFS @ c08000 size 3f8000
356 11:31:16.836468 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
357 11:31:16.836544 CBFS: Locating 'fspm.bin'
358 11:31:16.842975 CBFS: Found @ offset 5ffc0 size 71000
359 11:31:16.846272 Chrome EC: UHEPI supported
360 11:31:16.853260 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
361 11:31:16.856547 Probing TPM: done!
362 11:31:16.863480 Connected to device vid:did:rid of 1ae0:0028:00
363 11:31:16.873557 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
364 11:31:16.878801 Initialized TPM device CR50 revision 0
365 11:31:16.888105 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
366 11:31:16.894981 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
367 11:31:16.898516 MRC cache found, size 1948
368 11:31:16.901173 bootmode is set to: 2
369 11:31:16.904614 PRMRR disabled by config.
370 11:31:16.904687 SPD INDEX = 1
371 11:31:16.911310 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 11:31:16.914616 CBFS @ c08000 size 3f8000
373 11:31:16.921609 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 11:31:16.921713 CBFS: Locating 'spd.bin'
375 11:31:16.924237 CBFS: Found @ offset 5fb80 size 400
376 11:31:16.927891 SPD: module type is LPDDR3
377 11:31:16.931149 SPD: module part is
378 11:31:16.937907 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
379 11:31:16.941307 SPD: device width 4 bits, bus width 8 bits
380 11:31:16.944698 SPD: module size is 4096 MB (per channel)
381 11:31:16.948212 memory slot: 0 configuration done.
382 11:31:16.951234 memory slot: 2 configuration done.
383 11:31:17.002101 CBMEM:
384 11:31:17.005699 IMD: root @ 99fff000 254 entries.
385 11:31:17.008448 IMD: root @ 99ffec00 62 entries.
386 11:31:17.011854 External stage cache:
387 11:31:17.015331 IMD: root @ 9abff000 254 entries.
388 11:31:17.018808 IMD: root @ 9abfec00 62 entries.
389 11:31:17.022097 Chrome EC: clear events_b mask to 0x0000000020004000
390 11:31:17.037982 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
391 11:31:17.051091 tlcl_write: response is 0
392 11:31:17.060096 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
393 11:31:17.066652 MRC: TPM MRC hash updated successfully.
394 11:31:17.066791 2 DIMMs found
395 11:31:17.070109 SMM Memory Map
396 11:31:17.073232 SMRAM : 0x9a000000 0x1000000
397 11:31:17.076614 Subregion 0: 0x9a000000 0xa00000
398 11:31:17.080645 Subregion 1: 0x9aa00000 0x200000
399 11:31:17.083070 Subregion 2: 0x9ac00000 0x400000
400 11:31:17.087048 top_of_ram = 0x9a000000
401 11:31:17.090321 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
402 11:31:17.096735 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
403 11:31:17.100085 MTRR Range: Start=ff000000 End=0 (Size 1000000)
404 11:31:17.106789 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
405 11:31:17.109682 CBFS @ c08000 size 3f8000
406 11:31:17.113143 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
407 11:31:17.116541 CBFS: Locating 'fallback/postcar'
408 11:31:17.123240 CBFS: Found @ offset 107000 size 4b44
409 11:31:17.126622 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
410 11:31:17.138674 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
411 11:31:17.141976 Processing 180 relocs. Offset value of 0x97c0c000
412 11:31:17.150427 Accumulated console time in romstage 285 ms
413 11:31:17.150518
414 11:31:17.150588
415 11:31:17.160631 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
416 11:31:17.166975 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
417 11:31:17.170208 CBFS @ c08000 size 3f8000
418 11:31:17.177357 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
419 11:31:17.180360 CBFS: Locating 'fallback/ramstage'
420 11:31:17.183619 CBFS: Found @ offset 43380 size 1b9e8
421 11:31:17.189964 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
422 11:31:17.222248 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
423 11:31:17.225589 Processing 3976 relocs. Offset value of 0x98db0000
424 11:31:17.232583 Accumulated console time in postcar 52 ms
425 11:31:17.232701
426 11:31:17.232795
427 11:31:17.242194 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
428 11:31:17.248920 FMAP: area RO_VPD found @ c00000 (16384 bytes)
429 11:31:17.252161 WARNING: RO_VPD is uninitialized or empty.
430 11:31:17.255842 FMAP: area RW_VPD found @ af8000 (8192 bytes)
431 11:31:17.262124 FMAP: area RW_VPD found @ af8000 (8192 bytes)
432 11:31:17.262215 Normal boot.
433 11:31:17.269146 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
434 11:31:17.271807 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
435 11:31:17.275467 CBFS @ c08000 size 3f8000
436 11:31:17.282068 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
437 11:31:17.285710 CBFS: Locating 'cpu_microcode_blob.bin'
438 11:31:17.288903 CBFS: Found @ offset 14700 size 2ec00
439 11:31:17.292235 microcode: sig=0x806ec pf=0x4 revision=0xc9
440 11:31:17.295361 Skip microcode update
441 11:31:17.302105 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 11:31:17.302200 CBFS @ c08000 size 3f8000
443 11:31:17.308731 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 11:31:17.312384 CBFS: Locating 'fsps.bin'
445 11:31:17.315043 CBFS: Found @ offset d1fc0 size 35000
446 11:31:17.340639 Detected 4 core, 8 thread CPU.
447 11:31:17.344077 Setting up SMI for CPU
448 11:31:17.346680 IED base = 0x9ac00000
449 11:31:17.346860 IED size = 0x00400000
450 11:31:17.350229 Will perform SMM setup.
451 11:31:17.357153 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
452 11:31:17.363640 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
453 11:31:17.366752 Processing 16 relocs. Offset value of 0x00030000
454 11:31:17.370698 Attempting to start 7 APs
455 11:31:17.374013 Waiting for 10ms after sending INIT.
456 11:31:17.390036 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
457 11:31:17.390244 done.
458 11:31:17.393388 AP: slot 7 apic_id 4.
459 11:31:17.396817 AP: slot 6 apic_id 5.
460 11:31:17.396904 AP: slot 2 apic_id 6.
461 11:31:17.399950 AP: slot 5 apic_id 7.
462 11:31:17.403225 Waiting for 2nd SIPI to complete...done.
463 11:31:17.406862 AP: slot 4 apic_id 2.
464 11:31:17.415715 AP: slot 1 apic_id 3.
465 11:31:17.416747 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
466 11:31:17.423352 Processing 13 relocs. Offset value of 0x00038000
467 11:31:17.426720 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
468 11:31:17.433365 Installing SMM handler to 0x9a000000
469 11:31:17.440114 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
470 11:31:17.446152 Processing 658 relocs. Offset value of 0x9a010000
471 11:31:17.452743 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
472 11:31:17.456142 Processing 13 relocs. Offset value of 0x9a008000
473 11:31:17.463281 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
474 11:31:17.470010 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
475 11:31:17.473178 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
476 11:31:17.479499 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
477 11:31:17.486084 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
478 11:31:17.492893 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
479 11:31:17.495898 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
480 11:31:17.502951 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
481 11:31:17.506022 Clearing SMI status registers
482 11:31:17.509955 SMI_STS: PM1
483 11:31:17.510077 PM1_STS: PWRBTN
484 11:31:17.512646 TCO_STS: SECOND_TO
485 11:31:17.516015 New SMBASE 0x9a000000
486 11:31:17.519541 In relocation handler: CPU 0
487 11:31:17.522800 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
488 11:31:17.526508 Writing SMRR. base = 0x9a000006, mask=0xff000800
489 11:31:17.529199 Relocation complete.
490 11:31:17.533079 New SMBASE 0x99fff400
491 11:31:17.535860 In relocation handler: CPU 3
492 11:31:17.539084 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
493 11:31:17.542462 Writing SMRR. base = 0x9a000006, mask=0xff000800
494 11:31:17.545823 Relocation complete.
495 11:31:17.549119 New SMBASE 0x99ffec00
496 11:31:17.549274 In relocation handler: CPU 5
497 11:31:17.556051 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
498 11:31:17.559724 Writing SMRR. base = 0x9a000006, mask=0xff000800
499 11:31:17.562521 Relocation complete.
500 11:31:17.562633 New SMBASE 0x99fff800
501 11:31:17.565771 In relocation handler: CPU 2
502 11:31:17.572840 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
503 11:31:17.576327 Writing SMRR. base = 0x9a000006, mask=0xff000800
504 11:31:17.579141 Relocation complete.
505 11:31:17.579258 New SMBASE 0x99ffe800
506 11:31:17.582706 In relocation handler: CPU 6
507 11:31:17.589193 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
508 11:31:17.592600 Writing SMRR. base = 0x9a000006, mask=0xff000800
509 11:31:17.595625 Relocation complete.
510 11:31:17.595738 New SMBASE 0x99ffe400
511 11:31:17.599156 In relocation handler: CPU 7
512 11:31:17.602454 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
513 11:31:17.609259 Writing SMRR. base = 0x9a000006, mask=0xff000800
514 11:31:17.612593 Relocation complete.
515 11:31:17.612712 New SMBASE 0x99fffc00
516 11:31:17.615993 In relocation handler: CPU 1
517 11:31:17.618864 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
518 11:31:17.626242 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 11:31:17.629054 Relocation complete.
520 11:31:17.629177 New SMBASE 0x99fff000
521 11:31:17.632559 In relocation handler: CPU 4
522 11:31:17.635823 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
523 11:31:17.642440 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 11:31:17.642571 Relocation complete.
525 11:31:17.646005 Initializing CPU #0
526 11:31:17.648788 CPU: vendor Intel device 806ec
527 11:31:17.652130 CPU: family 06, model 8e, stepping 0c
528 11:31:17.655390 Clearing out pending MCEs
529 11:31:17.658749 Setting up local APIC...
530 11:31:17.658865 apic_id: 0x00 done.
531 11:31:17.662230 Turbo is available but hidden
532 11:31:17.665505 Turbo is available and visible
533 11:31:17.668679 VMX status: enabled
534 11:31:17.672348 IA32_FEATURE_CONTROL status: locked
535 11:31:17.675443 Skip microcode update
536 11:31:17.675571 CPU #0 initialized
537 11:31:17.678897 Initializing CPU #3
538 11:31:17.682168 Initializing CPU #6
539 11:31:17.682300 Initializing CPU #7
540 11:31:17.685788 Initializing CPU #4
541 11:31:17.685922 Initializing CPU #1
542 11:31:17.688670 CPU: vendor Intel device 806ec
543 11:31:17.691932 CPU: family 06, model 8e, stepping 0c
544 11:31:17.695305 CPU: vendor Intel device 806ec
545 11:31:17.702280 CPU: family 06, model 8e, stepping 0c
546 11:31:17.702408 Clearing out pending MCEs
547 11:31:17.705452 Clearing out pending MCEs
548 11:31:17.708816 Setting up local APIC...
549 11:31:17.711587 CPU: vendor Intel device 806ec
550 11:31:17.714962 CPU: family 06, model 8e, stepping 0c
551 11:31:17.718820 CPU: vendor Intel device 806ec
552 11:31:17.721971 CPU: family 06, model 8e, stepping 0c
553 11:31:17.724825 Clearing out pending MCEs
554 11:31:17.728210 Clearing out pending MCEs
555 11:31:17.728387 Setting up local APIC...
556 11:31:17.731791 CPU: vendor Intel device 806ec
557 11:31:17.738288 CPU: family 06, model 8e, stepping 0c
558 11:31:17.738377 Clearing out pending MCEs
559 11:31:17.741634 apic_id: 0x02 done.
560 11:31:17.744819 Setting up local APIC...
561 11:31:17.744901 Setting up local APIC...
562 11:31:17.748297 Setting up local APIC...
563 11:31:17.751838 apic_id: 0x03 done.
564 11:31:17.751920 VMX status: enabled
565 11:31:17.755201 VMX status: enabled
566 11:31:17.757995 IA32_FEATURE_CONTROL status: locked
567 11:31:17.761384 IA32_FEATURE_CONTROL status: locked
568 11:31:17.764751 Skip microcode update
569 11:31:17.768280 Skip microcode update
570 11:31:17.768417 CPU #4 initialized
571 11:31:17.771645 CPU #1 initialized
572 11:31:17.771726 apic_id: 0x05 done.
573 11:31:17.775162 apic_id: 0x04 done.
574 11:31:17.778162 VMX status: enabled
575 11:31:17.778244 VMX status: enabled
576 11:31:17.781314 IA32_FEATURE_CONTROL status: locked
577 11:31:17.788127 IA32_FEATURE_CONTROL status: locked
578 11:31:17.788238 Skip microcode update
579 11:31:17.791158 Initializing CPU #2
580 11:31:17.791242 Initializing CPU #5
581 11:31:17.794624 CPU: vendor Intel device 806ec
582 11:31:17.801062 CPU: family 06, model 8e, stepping 0c
583 11:31:17.801149 apic_id: 0x01 done.
584 11:31:17.804566 CPU #6 initialized
585 11:31:17.804648 Skip microcode update
586 11:31:17.807959 VMX status: enabled
587 11:31:17.811453 CPU: vendor Intel device 806ec
588 11:31:17.814947 CPU: family 06, model 8e, stepping 0c
589 11:31:17.817708 Clearing out pending MCEs
590 11:31:17.821059 Clearing out pending MCEs
591 11:31:17.821142 Setting up local APIC...
592 11:31:17.824479 CPU #7 initialized
593 11:31:17.827810 apic_id: 0x06 done.
594 11:31:17.827918 Setting up local APIC...
595 11:31:17.834499 IA32_FEATURE_CONTROL status: locked
596 11:31:17.834619 apic_id: 0x07 done.
597 11:31:17.837703 VMX status: enabled
598 11:31:17.837786 VMX status: enabled
599 11:31:17.844021 IA32_FEATURE_CONTROL status: locked
600 11:31:17.847682 IA32_FEATURE_CONTROL status: locked
601 11:31:17.847782 Skip microcode update
602 11:31:17.850794 Skip microcode update
603 11:31:17.854023 CPU #2 initialized
604 11:31:17.854114 CPU #5 initialized
605 11:31:17.857744 Skip microcode update
606 11:31:17.857830 CPU #3 initialized
607 11:31:17.864500 bsp_do_flight_plan done after 457 msecs.
608 11:31:17.867320 CPU: frequency set to 4200 MHz
609 11:31:17.867407 Enabling SMIs.
610 11:31:17.870782 Locking SMM.
611 11:31:17.884070 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
612 11:31:17.887449 CBFS @ c08000 size 3f8000
613 11:31:17.894186 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
614 11:31:17.894281 CBFS: Locating 'vbt.bin'
615 11:31:17.897561 CBFS: Found @ offset 5f5c0 size 499
616 11:31:17.904121 Found a VBT of 4608 bytes after decompression
617 11:31:18.086149 Display FSP Version Info HOB
618 11:31:18.089155 Reference Code - CPU = 9.0.1e.30
619 11:31:18.092868 uCode Version = 0.0.0.ca
620 11:31:18.096215 TXT ACM version = ff.ff.ff.ffff
621 11:31:18.099425 Display FSP Version Info HOB
622 11:31:18.102766 Reference Code - ME = 9.0.1e.30
623 11:31:18.106386 MEBx version = 0.0.0.0
624 11:31:18.109100 ME Firmware Version = Consumer SKU
625 11:31:18.112728 Display FSP Version Info HOB
626 11:31:18.116212 Reference Code - CML PCH = 9.0.1e.30
627 11:31:18.119011 PCH-CRID Status = Disabled
628 11:31:18.122492 PCH-CRID Original Value = ff.ff.ff.ffff
629 11:31:18.126091 PCH-CRID New Value = ff.ff.ff.ffff
630 11:31:18.129388 OPROM - RST - RAID = ff.ff.ff.ffff
631 11:31:18.132823 ChipsetInit Base Version = ff.ff.ff.ffff
632 11:31:18.135950 ChipsetInit Oem Version = ff.ff.ff.ffff
633 11:31:18.139113 Display FSP Version Info HOB
634 11:31:18.145721 Reference Code - SA - System Agent = 9.0.1e.30
635 11:31:18.149456 Reference Code - MRC = 0.7.1.6c
636 11:31:18.149542 SA - PCIe Version = 9.0.1e.30
637 11:31:18.152439 SA-CRID Status = Disabled
638 11:31:18.156117 SA-CRID Original Value = 0.0.0.c
639 11:31:18.158915 SA-CRID New Value = 0.0.0.c
640 11:31:18.162425 OPROM - VBIOS = ff.ff.ff.ffff
641 11:31:18.165711 RTC Init
642 11:31:18.169078 Set power on after power failure.
643 11:31:18.169161 Disabling Deep S3
644 11:31:18.172123 Disabling Deep S3
645 11:31:18.172231 Disabling Deep S4
646 11:31:18.175465 Disabling Deep S4
647 11:31:18.175547 Disabling Deep S5
648 11:31:18.178930 Disabling Deep S5
649 11:31:18.185656 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
650 11:31:18.185816 Enumerating buses...
651 11:31:18.191993 Show all devs... Before device enumeration.
652 11:31:18.192081 Root Device: enabled 1
653 11:31:18.195768 CPU_CLUSTER: 0: enabled 1
654 11:31:18.199157 DOMAIN: 0000: enabled 1
655 11:31:18.202249 APIC: 00: enabled 1
656 11:31:18.202331 PCI: 00:00.0: enabled 1
657 11:31:18.205325 PCI: 00:02.0: enabled 1
658 11:31:18.208798 PCI: 00:04.0: enabled 0
659 11:31:18.212095 PCI: 00:05.0: enabled 0
660 11:31:18.212177 PCI: 00:12.0: enabled 1
661 11:31:18.215561 PCI: 00:12.5: enabled 0
662 11:31:18.218998 PCI: 00:12.6: enabled 0
663 11:31:18.219080 PCI: 00:14.0: enabled 1
664 11:31:18.221800 PCI: 00:14.1: enabled 0
665 11:31:18.225224 PCI: 00:14.3: enabled 1
666 11:31:18.228701 PCI: 00:14.5: enabled 0
667 11:31:18.228784 PCI: 00:15.0: enabled 1
668 11:31:18.231872 PCI: 00:15.1: enabled 1
669 11:31:18.234870 PCI: 00:15.2: enabled 0
670 11:31:18.238043 PCI: 00:15.3: enabled 0
671 11:31:18.238125 PCI: 00:16.0: enabled 1
672 11:31:18.241699 PCI: 00:16.1: enabled 0
673 11:31:18.245162 PCI: 00:16.2: enabled 0
674 11:31:18.248444 PCI: 00:16.3: enabled 0
675 11:31:18.248527 PCI: 00:16.4: enabled 0
676 11:31:18.251859 PCI: 00:16.5: enabled 0
677 11:31:18.255073 PCI: 00:17.0: enabled 1
678 11:31:18.258462 PCI: 00:19.0: enabled 1
679 11:31:18.258545 PCI: 00:19.1: enabled 0
680 11:31:18.261656 PCI: 00:19.2: enabled 0
681 11:31:18.265046 PCI: 00:1a.0: enabled 0
682 11:31:18.265130 PCI: 00:1c.0: enabled 0
683 11:31:18.268297 PCI: 00:1c.1: enabled 0
684 11:31:18.271464 PCI: 00:1c.2: enabled 0
685 11:31:18.274723 PCI: 00:1c.3: enabled 0
686 11:31:18.274812 PCI: 00:1c.4: enabled 0
687 11:31:18.278168 PCI: 00:1c.5: enabled 0
688 11:31:18.281624 PCI: 00:1c.6: enabled 0
689 11:31:18.284941 PCI: 00:1c.7: enabled 0
690 11:31:18.285051 PCI: 00:1d.0: enabled 1
691 11:31:18.287877 PCI: 00:1d.1: enabled 0
692 11:31:18.291517 PCI: 00:1d.2: enabled 0
693 11:31:18.294657 PCI: 00:1d.3: enabled 0
694 11:31:18.294742 PCI: 00:1d.4: enabled 0
695 11:31:18.298032 PCI: 00:1d.5: enabled 1
696 11:31:18.301450 PCI: 00:1e.0: enabled 1
697 11:31:18.304737 PCI: 00:1e.1: enabled 0
698 11:31:18.304818 PCI: 00:1e.2: enabled 1
699 11:31:18.308181 PCI: 00:1e.3: enabled 1
700 11:31:18.311442 PCI: 00:1f.0: enabled 1
701 11:31:18.311525 PCI: 00:1f.1: enabled 1
702 11:31:18.314615 PCI: 00:1f.2: enabled 1
703 11:31:18.317533 PCI: 00:1f.3: enabled 1
704 11:31:18.320930 PCI: 00:1f.4: enabled 1
705 11:31:18.321022 PCI: 00:1f.5: enabled 1
706 11:31:18.324616 PCI: 00:1f.6: enabled 0
707 11:31:18.327488 USB0 port 0: enabled 1
708 11:31:18.330954 I2C: 00:15: enabled 1
709 11:31:18.331036 I2C: 00:5d: enabled 1
710 11:31:18.334477 GENERIC: 0.0: enabled 1
711 11:31:18.337842 I2C: 00:1a: enabled 1
712 11:31:18.337924 I2C: 00:38: enabled 1
713 11:31:18.341215 I2C: 00:39: enabled 1
714 11:31:18.344927 I2C: 00:3a: enabled 1
715 11:31:18.345008 I2C: 00:3b: enabled 1
716 11:31:18.347402 PCI: 00:00.0: enabled 1
717 11:31:18.350832 SPI: 00: enabled 1
718 11:31:18.350913 SPI: 01: enabled 1
719 11:31:18.354185 PNP: 0c09.0: enabled 1
720 11:31:18.357430 USB2 port 0: enabled 1
721 11:31:18.357513 USB2 port 1: enabled 1
722 11:31:18.360693 USB2 port 2: enabled 0
723 11:31:18.363935 USB2 port 3: enabled 0
724 11:31:18.364016 USB2 port 5: enabled 0
725 11:31:18.367268 USB2 port 6: enabled 1
726 11:31:18.370899 USB2 port 9: enabled 1
727 11:31:18.374394 USB3 port 0: enabled 1
728 11:31:18.374476 USB3 port 1: enabled 1
729 11:31:18.377711 USB3 port 2: enabled 1
730 11:31:18.380537 USB3 port 3: enabled 1
731 11:31:18.380619 USB3 port 4: enabled 0
732 11:31:18.383977 APIC: 03: enabled 1
733 11:31:18.387457 APIC: 06: enabled 1
734 11:31:18.387539 APIC: 01: enabled 1
735 11:31:18.390140 APIC: 02: enabled 1
736 11:31:18.393981 APIC: 07: enabled 1
737 11:31:18.394064 APIC: 05: enabled 1
738 11:31:18.397150 APIC: 04: enabled 1
739 11:31:18.397231 Compare with tree...
740 11:31:18.400317 Root Device: enabled 1
741 11:31:18.403934 CPU_CLUSTER: 0: enabled 1
742 11:31:18.406913 APIC: 00: enabled 1
743 11:31:18.406998 APIC: 03: enabled 1
744 11:31:18.410276 APIC: 06: enabled 1
745 11:31:18.413306 APIC: 01: enabled 1
746 11:31:18.413387 APIC: 02: enabled 1
747 11:31:18.417028 APIC: 07: enabled 1
748 11:31:18.420161 APIC: 05: enabled 1
749 11:31:18.420248 APIC: 04: enabled 1
750 11:31:18.423141 DOMAIN: 0000: enabled 1
751 11:31:18.427016 PCI: 00:00.0: enabled 1
752 11:31:18.430042 PCI: 00:02.0: enabled 1
753 11:31:18.433301 PCI: 00:04.0: enabled 0
754 11:31:18.433384 PCI: 00:05.0: enabled 0
755 11:31:18.437000 PCI: 00:12.0: enabled 1
756 11:31:18.440235 PCI: 00:12.5: enabled 0
757 11:31:18.443297 PCI: 00:12.6: enabled 0
758 11:31:18.443379 PCI: 00:14.0: enabled 1
759 11:31:18.446631 USB0 port 0: enabled 1
760 11:31:18.450203 USB2 port 0: enabled 1
761 11:31:18.453472 USB2 port 1: enabled 1
762 11:31:18.457138 USB2 port 2: enabled 0
763 11:31:18.460121 USB2 port 3: enabled 0
764 11:31:18.460202 USB2 port 5: enabled 0
765 11:31:18.462982 USB2 port 6: enabled 1
766 11:31:18.466695 USB2 port 9: enabled 1
767 11:31:18.469958 USB3 port 0: enabled 1
768 11:31:18.473621 USB3 port 1: enabled 1
769 11:31:18.473703 USB3 port 2: enabled 1
770 11:31:18.476785 USB3 port 3: enabled 1
771 11:31:18.480245 USB3 port 4: enabled 0
772 11:31:18.483115 PCI: 00:14.1: enabled 0
773 11:31:18.486423 PCI: 00:14.3: enabled 1
774 11:31:18.490055 PCI: 00:14.5: enabled 0
775 11:31:18.490137 PCI: 00:15.0: enabled 1
776 11:31:18.493596 I2C: 00:15: enabled 1
777 11:31:18.496082 PCI: 00:15.1: enabled 1
778 11:31:18.499573 I2C: 00:5d: enabled 1
779 11:31:18.499656 GENERIC: 0.0: enabled 1
780 11:31:18.502981 PCI: 00:15.2: enabled 0
781 11:31:18.506392 PCI: 00:15.3: enabled 0
782 11:31:18.509610 PCI: 00:16.0: enabled 1
783 11:31:18.513063 PCI: 00:16.1: enabled 0
784 11:31:18.513146 PCI: 00:16.2: enabled 0
785 11:31:18.516434 PCI: 00:16.3: enabled 0
786 11:31:18.519754 PCI: 00:16.4: enabled 0
787 11:31:18.522952 PCI: 00:16.5: enabled 0
788 11:31:18.526172 PCI: 00:17.0: enabled 1
789 11:31:18.526253 PCI: 00:19.0: enabled 1
790 11:31:18.529320 I2C: 00:1a: enabled 1
791 11:31:18.533170 I2C: 00:38: enabled 1
792 11:31:18.536165 I2C: 00:39: enabled 1
793 11:31:18.536300 I2C: 00:3a: enabled 1
794 11:31:18.539899 I2C: 00:3b: enabled 1
795 11:31:18.542661 PCI: 00:19.1: enabled 0
796 11:31:18.546204 PCI: 00:19.2: enabled 0
797 11:31:18.549591 PCI: 00:1a.0: enabled 0
798 11:31:18.549678 PCI: 00:1c.0: enabled 0
799 11:31:18.553145 PCI: 00:1c.1: enabled 0
800 11:31:18.556138 PCI: 00:1c.2: enabled 0
801 11:31:18.559604 PCI: 00:1c.3: enabled 0
802 11:31:18.562844 PCI: 00:1c.4: enabled 0
803 11:31:18.562933 PCI: 00:1c.5: enabled 0
804 11:31:18.566258 PCI: 00:1c.6: enabled 0
805 11:31:18.569365 PCI: 00:1c.7: enabled 0
806 11:31:18.572692 PCI: 00:1d.0: enabled 1
807 11:31:18.572776 PCI: 00:1d.1: enabled 0
808 11:31:18.575924 PCI: 00:1d.2: enabled 0
809 11:31:18.579426 PCI: 00:1d.3: enabled 0
810 11:31:18.582792 PCI: 00:1d.4: enabled 0
811 11:31:18.585724 PCI: 00:1d.5: enabled 1
812 11:31:18.585824 PCI: 00:00.0: enabled 1
813 11:31:18.589287 PCI: 00:1e.0: enabled 1
814 11:31:18.593036 PCI: 00:1e.1: enabled 0
815 11:31:18.596275 PCI: 00:1e.2: enabled 1
816 11:31:18.599277 SPI: 00: enabled 1
817 11:31:18.599361 PCI: 00:1e.3: enabled 1
818 11:31:18.602740 SPI: 01: enabled 1
819 11:31:18.605494 PCI: 00:1f.0: enabled 1
820 11:31:18.608991 PNP: 0c09.0: enabled 1
821 11:31:18.609074 PCI: 00:1f.1: enabled 1
822 11:31:18.612422 PCI: 00:1f.2: enabled 1
823 11:31:18.615814 PCI: 00:1f.3: enabled 1
824 11:31:18.619181 PCI: 00:1f.4: enabled 1
825 11:31:18.622393 PCI: 00:1f.5: enabled 1
826 11:31:18.622506 PCI: 00:1f.6: enabled 0
827 11:31:18.625957 Root Device scanning...
828 11:31:18.629216 scan_static_bus for Root Device
829 11:31:18.632607 CPU_CLUSTER: 0 enabled
830 11:31:18.635483 DOMAIN: 0000 enabled
831 11:31:18.635564 DOMAIN: 0000 scanning...
832 11:31:18.638880 PCI: pci_scan_bus for bus 00
833 11:31:18.642238 PCI: 00:00.0 [8086/0000] ops
834 11:31:18.645606 PCI: 00:00.0 [8086/9b61] enabled
835 11:31:18.648830 PCI: 00:02.0 [8086/0000] bus ops
836 11:31:18.652161 PCI: 00:02.0 [8086/9b41] enabled
837 11:31:18.655679 PCI: 00:04.0 [8086/1903] disabled
838 11:31:18.658616 PCI: 00:08.0 [8086/1911] enabled
839 11:31:18.662394 PCI: 00:12.0 [8086/02f9] enabled
840 11:31:18.665362 PCI: 00:14.0 [8086/0000] bus ops
841 11:31:18.668527 PCI: 00:14.0 [8086/02ed] enabled
842 11:31:18.672508 PCI: 00:14.2 [8086/02ef] enabled
843 11:31:18.675337 PCI: 00:14.3 [8086/02f0] enabled
844 11:31:18.678864 PCI: 00:15.0 [8086/0000] bus ops
845 11:31:18.682442 PCI: 00:15.0 [8086/02e8] enabled
846 11:31:18.685171 PCI: 00:15.1 [8086/0000] bus ops
847 11:31:18.688525 PCI: 00:15.1 [8086/02e9] enabled
848 11:31:18.692040 PCI: 00:16.0 [8086/0000] ops
849 11:31:18.695466 PCI: 00:16.0 [8086/02e0] enabled
850 11:31:18.698671 PCI: 00:17.0 [8086/0000] ops
851 11:31:18.701883 PCI: 00:17.0 [8086/02d3] enabled
852 11:31:18.705078 PCI: 00:19.0 [8086/0000] bus ops
853 11:31:18.708851 PCI: 00:19.0 [8086/02c5] enabled
854 11:31:18.712047 PCI: 00:1d.0 [8086/0000] bus ops
855 11:31:18.715622 PCI: 00:1d.0 [8086/02b0] enabled
856 11:31:18.721921 PCI: Static device PCI: 00:1d.5 not found, disabling it.
857 11:31:18.725191 PCI: 00:1e.0 [8086/0000] ops
858 11:31:18.728280 PCI: 00:1e.0 [8086/02a8] enabled
859 11:31:18.731938 PCI: 00:1e.2 [8086/0000] bus ops
860 11:31:18.735296 PCI: 00:1e.2 [8086/02aa] enabled
861 11:31:18.738690 PCI: 00:1e.3 [8086/0000] bus ops
862 11:31:18.742296 PCI: 00:1e.3 [8086/02ab] enabled
863 11:31:18.745482 PCI: 00:1f.0 [8086/0000] bus ops
864 11:31:18.748136 PCI: 00:1f.0 [8086/0284] enabled
865 11:31:18.751727 PCI: Static device PCI: 00:1f.1 not found, disabling it.
866 11:31:18.758683 PCI: Static device PCI: 00:1f.2 not found, disabling it.
867 11:31:18.761734 PCI: 00:1f.3 [8086/0000] bus ops
868 11:31:18.765432 PCI: 00:1f.3 [8086/02c8] enabled
869 11:31:18.768602 PCI: 00:1f.4 [8086/0000] bus ops
870 11:31:18.771654 PCI: 00:1f.4 [8086/02a3] enabled
871 11:31:18.775143 PCI: 00:1f.5 [8086/0000] bus ops
872 11:31:18.778126 PCI: 00:1f.5 [8086/02a4] enabled
873 11:31:18.781539 PCI: Leftover static devices:
874 11:31:18.781622 PCI: 00:05.0
875 11:31:18.784878 PCI: 00:12.5
876 11:31:18.784959 PCI: 00:12.6
877 11:31:18.788204 PCI: 00:14.1
878 11:31:18.788346 PCI: 00:14.5
879 11:31:18.788411 PCI: 00:15.2
880 11:31:18.791669 PCI: 00:15.3
881 11:31:18.791751 PCI: 00:16.1
882 11:31:18.794846 PCI: 00:16.2
883 11:31:18.794928 PCI: 00:16.3
884 11:31:18.794992 PCI: 00:16.4
885 11:31:18.798171 PCI: 00:16.5
886 11:31:18.798252 PCI: 00:19.1
887 11:31:18.801802 PCI: 00:19.2
888 11:31:18.801884 PCI: 00:1a.0
889 11:31:18.804685 PCI: 00:1c.0
890 11:31:18.804766 PCI: 00:1c.1
891 11:31:18.804831 PCI: 00:1c.2
892 11:31:18.808014 PCI: 00:1c.3
893 11:31:18.808095 PCI: 00:1c.4
894 11:31:18.811139 PCI: 00:1c.5
895 11:31:18.811221 PCI: 00:1c.6
896 11:31:18.811285 PCI: 00:1c.7
897 11:31:18.815145 PCI: 00:1d.1
898 11:31:18.815226 PCI: 00:1d.2
899 11:31:18.818047 PCI: 00:1d.3
900 11:31:18.818128 PCI: 00:1d.4
901 11:31:18.818193 PCI: 00:1d.5
902 11:31:18.821782 PCI: 00:1e.1
903 11:31:18.821863 PCI: 00:1f.1
904 11:31:18.824913 PCI: 00:1f.2
905 11:31:18.824995 PCI: 00:1f.6
906 11:31:18.828243 PCI: Check your devicetree.cb.
907 11:31:18.831658 PCI: 00:02.0 scanning...
908 11:31:18.834502 scan_generic_bus for PCI: 00:02.0
909 11:31:18.837959 scan_generic_bus for PCI: 00:02.0 done
910 11:31:18.844825 scan_bus: scanning of bus PCI: 00:02.0 took 10182 usecs
911 11:31:18.848243 PCI: 00:14.0 scanning...
912 11:31:18.851573 scan_static_bus for PCI: 00:14.0
913 11:31:18.851656 USB0 port 0 enabled
914 11:31:18.854282 USB0 port 0 scanning...
915 11:31:18.857932 scan_static_bus for USB0 port 0
916 11:31:18.861473 USB2 port 0 enabled
917 11:31:18.861555 USB2 port 1 enabled
918 11:31:18.864849 USB2 port 2 disabled
919 11:31:18.867838 USB2 port 3 disabled
920 11:31:18.867920 USB2 port 5 disabled
921 11:31:18.871008 USB2 port 6 enabled
922 11:31:18.871089 USB2 port 9 enabled
923 11:31:18.874559 USB3 port 0 enabled
924 11:31:18.877946 USB3 port 1 enabled
925 11:31:18.878028 USB3 port 2 enabled
926 11:31:18.881087 USB3 port 3 enabled
927 11:31:18.884698 USB3 port 4 disabled
928 11:31:18.884779 USB2 port 0 scanning...
929 11:31:18.887716 scan_static_bus for USB2 port 0
930 11:31:18.891406 scan_static_bus for USB2 port 0 done
931 11:31:18.897531 scan_bus: scanning of bus USB2 port 0 took 9704 usecs
932 11:31:18.900911 USB2 port 1 scanning...
933 11:31:18.904360 scan_static_bus for USB2 port 1
934 11:31:18.907885 scan_static_bus for USB2 port 1 done
935 11:31:18.914470 scan_bus: scanning of bus USB2 port 1 took 9722 usecs
936 11:31:18.914552 USB2 port 6 scanning...
937 11:31:18.917587 scan_static_bus for USB2 port 6
938 11:31:18.923996 scan_static_bus for USB2 port 6 done
939 11:31:18.927954 scan_bus: scanning of bus USB2 port 6 took 9706 usecs
940 11:31:18.930838 USB2 port 9 scanning...
941 11:31:18.934068 scan_static_bus for USB2 port 9
942 11:31:18.937530 scan_static_bus for USB2 port 9 done
943 11:31:18.944333 scan_bus: scanning of bus USB2 port 9 took 9708 usecs
944 11:31:18.944429 USB3 port 0 scanning...
945 11:31:18.947374 scan_static_bus for USB3 port 0
946 11:31:18.954397 scan_static_bus for USB3 port 0 done
947 11:31:18.957303 scan_bus: scanning of bus USB3 port 0 took 9711 usecs
948 11:31:18.960770 USB3 port 1 scanning...
949 11:31:18.964229 scan_static_bus for USB3 port 1
950 11:31:18.967585 scan_static_bus for USB3 port 1 done
951 11:31:18.973738 scan_bus: scanning of bus USB3 port 1 took 9708 usecs
952 11:31:18.973820 USB3 port 2 scanning...
953 11:31:18.977315 scan_static_bus for USB3 port 2
954 11:31:18.984204 scan_static_bus for USB3 port 2 done
955 11:31:18.986811 scan_bus: scanning of bus USB3 port 2 took 9705 usecs
956 11:31:18.990475 USB3 port 3 scanning...
957 11:31:18.993819 scan_static_bus for USB3 port 3
958 11:31:18.997349 scan_static_bus for USB3 port 3 done
959 11:31:19.003662 scan_bus: scanning of bus USB3 port 3 took 9702 usecs
960 11:31:19.006796 scan_static_bus for USB0 port 0 done
961 11:31:19.013569 scan_bus: scanning of bus USB0 port 0 took 155449 usecs
962 11:31:19.016877 scan_static_bus for PCI: 00:14.0 done
963 11:31:19.020528 scan_bus: scanning of bus PCI: 00:14.0 took 173068 usecs
964 11:31:19.023899 PCI: 00:15.0 scanning...
965 11:31:19.027128 scan_generic_bus for PCI: 00:15.0
966 11:31:19.033913 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
967 11:31:19.036832 scan_generic_bus for PCI: 00:15.0 done
968 11:31:19.040249 scan_bus: scanning of bus PCI: 00:15.0 took 14310 usecs
969 11:31:19.043789 PCI: 00:15.1 scanning...
970 11:31:19.046519 scan_generic_bus for PCI: 00:15.1
971 11:31:19.053257 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
972 11:31:19.056910 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
973 11:31:19.060208 scan_generic_bus for PCI: 00:15.1 done
974 11:31:19.066525 scan_bus: scanning of bus PCI: 00:15.1 took 18623 usecs
975 11:31:19.066608 PCI: 00:19.0 scanning...
976 11:31:19.073330 scan_generic_bus for PCI: 00:19.0
977 11:31:19.076641 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
978 11:31:19.080076 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
979 11:31:19.083629 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
980 11:31:19.086498 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
981 11:31:19.093137 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
982 11:31:19.096809 scan_generic_bus for PCI: 00:19.0 done
983 11:31:19.103050 scan_bus: scanning of bus PCI: 00:19.0 took 30733 usecs
984 11:31:19.103133 PCI: 00:1d.0 scanning...
985 11:31:19.106510 do_pci_scan_bridge for PCI: 00:1d.0
986 11:31:19.110068 PCI: pci_scan_bus for bus 01
987 11:31:19.113310 PCI: 01:00.0 [1c5c/1327] enabled
988 11:31:19.119442 Enabling Common Clock Configuration
989 11:31:19.122842 L1 Sub-State supported from root port 29
990 11:31:19.126075 L1 Sub-State Support = 0xf
991 11:31:19.129890 CommonModeRestoreTime = 0x28
992 11:31:19.132901 Power On Value = 0x16, Power On Scale = 0x0
993 11:31:19.132983 ASPM: Enabled L1
994 11:31:19.139254 scan_bus: scanning of bus PCI: 00:1d.0 took 32785 usecs
995 11:31:19.142935 PCI: 00:1e.2 scanning...
996 11:31:19.146000 scan_generic_bus for PCI: 00:1e.2
997 11:31:19.149284 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
998 11:31:19.152661 scan_generic_bus for PCI: 00:1e.2 done
999 11:31:19.159352 scan_bus: scanning of bus PCI: 00:1e.2 took 14019 usecs
1000 11:31:19.162869 PCI: 00:1e.3 scanning...
1001 11:31:19.166071 scan_generic_bus for PCI: 00:1e.3
1002 11:31:19.169067 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1003 11:31:19.172240 scan_generic_bus for PCI: 00:1e.3 done
1004 11:31:19.178957 scan_bus: scanning of bus PCI: 00:1e.3 took 14000 usecs
1005 11:31:19.182371 PCI: 00:1f.0 scanning...
1006 11:31:19.185610 scan_static_bus for PCI: 00:1f.0
1007 11:31:19.185717 PNP: 0c09.0 enabled
1008 11:31:19.189146 scan_static_bus for PCI: 00:1f.0 done
1009 11:31:19.195457 scan_bus: scanning of bus PCI: 00:1f.0 took 12053 usecs
1010 11:31:19.198955 PCI: 00:1f.3 scanning...
1011 11:31:19.205702 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1012 11:31:19.205790 PCI: 00:1f.4 scanning...
1013 11:31:19.212714 scan_generic_bus for PCI: 00:1f.4
1014 11:31:19.216051 scan_generic_bus for PCI: 00:1f.4 done
1015 11:31:19.219370 scan_bus: scanning of bus PCI: 00:1f.4 took 10187 usecs
1016 11:31:19.222227 PCI: 00:1f.5 scanning...
1017 11:31:19.225584 scan_generic_bus for PCI: 00:1f.5
1018 11:31:19.229027 scan_generic_bus for PCI: 00:1f.5 done
1019 11:31:19.235355 scan_bus: scanning of bus PCI: 00:1f.5 took 10187 usecs
1020 11:31:19.242035 scan_bus: scanning of bus DOMAIN: 0000 took 605258 usecs
1021 11:31:19.246087 scan_static_bus for Root Device done
1022 11:31:19.252021 scan_bus: scanning of bus Root Device took 625143 usecs
1023 11:31:19.252103 done
1024 11:31:19.255768 Chrome EC: UHEPI supported
1025 11:31:19.262331 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1026 11:31:19.265664 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1027 11:31:19.272183 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1028 11:31:19.279335 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1029 11:31:19.282594 SPI flash protection: WPSW=0 SRP0=0
1030 11:31:19.289246 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1031 11:31:19.292295 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1032 11:31:19.295834 found VGA at PCI: 00:02.0
1033 11:31:19.298946 Setting up VGA for PCI: 00:02.0
1034 11:31:19.305613 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1035 11:31:19.309092 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1036 11:31:19.312603 Allocating resources...
1037 11:31:19.315439 Reading resources...
1038 11:31:19.318991 Root Device read_resources bus 0 link: 0
1039 11:31:19.322275 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1040 11:31:19.328728 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1041 11:31:19.331984 DOMAIN: 0000 read_resources bus 0 link: 0
1042 11:31:19.339680 PCI: 00:14.0 read_resources bus 0 link: 0
1043 11:31:19.342871 USB0 port 0 read_resources bus 0 link: 0
1044 11:31:19.350849 USB0 port 0 read_resources bus 0 link: 0 done
1045 11:31:19.354373 PCI: 00:14.0 read_resources bus 0 link: 0 done
1046 11:31:19.361290 PCI: 00:15.0 read_resources bus 1 link: 0
1047 11:31:19.365238 PCI: 00:15.0 read_resources bus 1 link: 0 done
1048 11:31:19.371416 PCI: 00:15.1 read_resources bus 2 link: 0
1049 11:31:19.374948 PCI: 00:15.1 read_resources bus 2 link: 0 done
1050 11:31:19.382279 PCI: 00:19.0 read_resources bus 3 link: 0
1051 11:31:19.388845 PCI: 00:19.0 read_resources bus 3 link: 0 done
1052 11:31:19.392035 PCI: 00:1d.0 read_resources bus 1 link: 0
1053 11:31:19.399016 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1054 11:31:19.402290 PCI: 00:1e.2 read_resources bus 4 link: 0
1055 11:31:19.409094 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1056 11:31:19.412241 PCI: 00:1e.3 read_resources bus 5 link: 0
1057 11:31:19.418744 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1058 11:31:19.422250 PCI: 00:1f.0 read_resources bus 0 link: 0
1059 11:31:19.428469 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1060 11:31:19.435214 DOMAIN: 0000 read_resources bus 0 link: 0 done
1061 11:31:19.438762 Root Device read_resources bus 0 link: 0 done
1062 11:31:19.442241 Done reading resources.
1063 11:31:19.445710 Show resources in subtree (Root Device)...After reading.
1064 11:31:19.452077 Root Device child on link 0 CPU_CLUSTER: 0
1065 11:31:19.455296 CPU_CLUSTER: 0 child on link 0 APIC: 00
1066 11:31:19.455378 APIC: 00
1067 11:31:19.458535 APIC: 03
1068 11:31:19.458616 APIC: 06
1069 11:31:19.462207 APIC: 01
1070 11:31:19.462289 APIC: 02
1071 11:31:19.462353 APIC: 07
1072 11:31:19.465459 APIC: 05
1073 11:31:19.465541 APIC: 04
1074 11:31:19.468283 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1075 11:31:19.478852 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1076 11:31:19.523250 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1077 11:31:19.523368 PCI: 00:00.0
1078 11:31:19.523628 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1079 11:31:19.523723 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1080 11:31:19.524169 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1081 11:31:19.527391 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1082 11:31:19.537557 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1083 11:31:19.547174 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1084 11:31:19.557155 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1085 11:31:19.566921 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1086 11:31:19.573869 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1087 11:31:19.583896 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1088 11:31:19.593522 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1089 11:31:19.603814 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1090 11:31:19.613226 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1091 11:31:19.623464 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1092 11:31:19.630155 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1093 11:31:19.639995 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1094 11:31:19.643436 PCI: 00:02.0
1095 11:31:19.653457 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1096 11:31:19.663079 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1097 11:31:19.669689 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1098 11:31:19.672962 PCI: 00:04.0
1099 11:31:19.673043 PCI: 00:08.0
1100 11:31:19.682771 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1101 11:31:19.686328 PCI: 00:12.0
1102 11:31:19.696432 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1103 11:31:19.699207 PCI: 00:14.0 child on link 0 USB0 port 0
1104 11:31:19.709321 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1105 11:31:19.716478 USB0 port 0 child on link 0 USB2 port 0
1106 11:31:19.716559 USB2 port 0
1107 11:31:19.719523 USB2 port 1
1108 11:31:19.719604 USB2 port 2
1109 11:31:19.722473 USB2 port 3
1110 11:31:19.722552 USB2 port 5
1111 11:31:19.726640 USB2 port 6
1112 11:31:19.726720 USB2 port 9
1113 11:31:19.729106 USB3 port 0
1114 11:31:19.729186 USB3 port 1
1115 11:31:19.732533 USB3 port 2
1116 11:31:19.732616 USB3 port 3
1117 11:31:19.736095 USB3 port 4
1118 11:31:19.736175 PCI: 00:14.2
1119 11:31:19.746010 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1120 11:31:19.756163 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1121 11:31:19.759240 PCI: 00:14.3
1122 11:31:19.768949 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1123 11:31:19.772485 PCI: 00:15.0 child on link 0 I2C: 01:15
1124 11:31:19.782362 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 11:31:19.785524 I2C: 01:15
1126 11:31:19.788934 PCI: 00:15.1 child on link 0 I2C: 02:5d
1127 11:31:19.798790 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1128 11:31:19.798881 I2C: 02:5d
1129 11:31:19.802385 GENERIC: 0.0
1130 11:31:19.802467 PCI: 00:16.0
1131 11:31:19.811880 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 11:31:19.815481 PCI: 00:17.0
1133 11:31:19.825705 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1134 11:31:19.831911 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1135 11:31:19.842281 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1136 11:31:19.848424 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1137 11:31:19.858378 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1138 11:31:19.868781 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1139 11:31:19.872017 PCI: 00:19.0 child on link 0 I2C: 03:1a
1140 11:31:19.881721 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1141 11:31:19.881805 I2C: 03:1a
1142 11:31:19.884754 I2C: 03:38
1143 11:31:19.884836 I2C: 03:39
1144 11:31:19.888416 I2C: 03:3a
1145 11:31:19.888537 I2C: 03:3b
1146 11:31:19.894591 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1147 11:31:19.901908 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1148 11:31:19.911133 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1149 11:31:19.921485 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1150 11:31:19.925170 PCI: 01:00.0
1151 11:31:19.934617 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 11:31:19.934700 PCI: 00:1e.0
1153 11:31:19.944266 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1154 11:31:19.954745 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1155 11:31:19.960774 PCI: 00:1e.2 child on link 0 SPI: 00
1156 11:31:19.971191 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 11:31:19.971276 SPI: 00
1158 11:31:19.974605 PCI: 00:1e.3 child on link 0 SPI: 01
1159 11:31:19.984221 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1160 11:31:19.987512 SPI: 01
1161 11:31:19.990708 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1162 11:31:20.000512 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1163 11:31:20.007685 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1164 11:31:20.011102 PNP: 0c09.0
1165 11:31:20.017304 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1166 11:31:20.020509 PCI: 00:1f.3
1167 11:31:20.030694 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1168 11:31:20.040183 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1169 11:31:20.040267 PCI: 00:1f.4
1170 11:31:20.050354 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1171 11:31:20.060265 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1172 11:31:20.063688 PCI: 00:1f.5
1173 11:31:20.070491 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1174 11:31:20.076733 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1175 11:31:20.083574 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1176 11:31:20.090372 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1177 11:31:20.093867 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1178 11:31:20.096951 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1179 11:31:20.103642 PCI: 00:17.0 18 * [0x60 - 0x67] io
1180 11:31:20.106949 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1181 11:31:20.113129 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1182 11:31:20.119829 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1183 11:31:20.126689 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1184 11:31:20.136559 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1185 11:31:20.143037 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1186 11:31:20.146432 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1187 11:31:20.152776 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1188 11:31:20.159585 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1189 11:31:20.163204 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1190 11:31:20.169231 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1191 11:31:20.172474 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1192 11:31:20.179260 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1193 11:31:20.182699 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1194 11:31:20.186203 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1195 11:31:20.192256 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1196 11:31:20.195701 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1197 11:31:20.202726 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1198 11:31:20.205869 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1199 11:31:20.212670 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1200 11:31:20.215840 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1201 11:31:20.222242 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1202 11:31:20.225403 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1203 11:31:20.232865 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1204 11:31:20.235396 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1205 11:31:20.242244 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1206 11:31:20.245328 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1207 11:31:20.252228 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1208 11:31:20.255659 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1209 11:31:20.259013 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1210 11:31:20.265793 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1211 11:31:20.275402 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1212 11:31:20.278926 avoid_fixed_resources: DOMAIN: 0000
1213 11:31:20.282326 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1214 11:31:20.288719 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1215 11:31:20.298858 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1216 11:31:20.305563 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1217 11:31:20.311474 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1218 11:31:20.321889 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1219 11:31:20.328428 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1220 11:31:20.334666 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1221 11:31:20.341644 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1222 11:31:20.351361 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1223 11:31:20.357931 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1224 11:31:20.364733 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1225 11:31:20.367925 Setting resources...
1226 11:31:20.374530 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1227 11:31:20.377944 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1228 11:31:20.380814 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1229 11:31:20.384425 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1230 11:31:20.390666 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1231 11:31:20.394037 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1232 11:31:20.400672 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1233 11:31:20.407676 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1234 11:31:20.417229 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1235 11:31:20.420727 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1236 11:31:20.427671 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1237 11:31:20.431006 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1238 11:31:20.437406 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1239 11:31:20.440868 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1240 11:31:20.444103 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1241 11:31:20.450498 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1242 11:31:20.453974 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1243 11:31:20.460704 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1244 11:31:20.463305 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1245 11:31:20.470339 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1246 11:31:20.473866 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1247 11:31:20.479830 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1248 11:31:20.483126 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1249 11:31:20.489975 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1250 11:31:20.493651 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1251 11:31:20.499725 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1252 11:31:20.503260 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1253 11:31:20.509985 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1254 11:31:20.513154 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1255 11:31:20.520082 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1256 11:31:20.523131 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1257 11:31:20.526667 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1258 11:31:20.536270 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1259 11:31:20.542854 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1260 11:31:20.549751 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1261 11:31:20.556208 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1262 11:31:20.562922 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1263 11:31:20.569665 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1264 11:31:20.575694 Root Device assign_resources, bus 0 link: 0
1265 11:31:20.579138 DOMAIN: 0000 assign_resources, bus 0 link: 0
1266 11:31:20.589268 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1267 11:31:20.595750 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1268 11:31:20.602144 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1269 11:31:20.612363 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1270 11:31:20.618830 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1271 11:31:20.629064 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1272 11:31:20.632405 PCI: 00:14.0 assign_resources, bus 0 link: 0
1273 11:31:20.638956 PCI: 00:14.0 assign_resources, bus 0 link: 0
1274 11:31:20.644998 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1275 11:31:20.655495 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1276 11:31:20.662384 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1277 11:31:20.672007 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1278 11:31:20.675301 PCI: 00:15.0 assign_resources, bus 1 link: 0
1279 11:31:20.678681 PCI: 00:15.0 assign_resources, bus 1 link: 0
1280 11:31:20.688408 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1281 11:31:20.691840 PCI: 00:15.1 assign_resources, bus 2 link: 0
1282 11:31:20.698799 PCI: 00:15.1 assign_resources, bus 2 link: 0
1283 11:31:20.705328 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1284 11:31:20.715152 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1285 11:31:20.721907 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1286 11:31:20.728242 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1287 11:31:20.737999 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1288 11:31:20.745076 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1289 11:31:20.751670 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1290 11:31:20.761219 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1291 11:31:20.765080 PCI: 00:19.0 assign_resources, bus 3 link: 0
1292 11:31:20.771658 PCI: 00:19.0 assign_resources, bus 3 link: 0
1293 11:31:20.777590 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1294 11:31:20.787732 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1295 11:31:20.794706 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1296 11:31:20.801434 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1297 11:31:20.807606 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1298 11:31:20.814763 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1299 11:31:20.820889 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1300 11:31:20.831185 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1301 11:31:20.833933 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1302 11:31:20.840754 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1303 11:31:20.847763 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1304 11:31:20.850684 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1305 11:31:20.857679 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1306 11:31:20.861039 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1307 11:31:20.866966 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1308 11:31:20.870822 LPC: Trying to open IO window from 800 size 1ff
1309 11:31:20.880693 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1310 11:31:20.887610 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1311 11:31:20.897308 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1312 11:31:20.903792 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1313 11:31:20.910415 DOMAIN: 0000 assign_resources, bus 0 link: 0
1314 11:31:20.913742 Root Device assign_resources, bus 0 link: 0
1315 11:31:20.917247 Done setting resources.
1316 11:31:20.923379 Show resources in subtree (Root Device)...After assigning values.
1317 11:31:20.926861 Root Device child on link 0 CPU_CLUSTER: 0
1318 11:31:20.930339 CPU_CLUSTER: 0 child on link 0 APIC: 00
1319 11:31:20.933760 APIC: 00
1320 11:31:20.933888 APIC: 03
1321 11:31:20.933952 APIC: 06
1322 11:31:20.936920 APIC: 01
1323 11:31:20.937000 APIC: 02
1324 11:31:20.939955 APIC: 07
1325 11:31:20.940034 APIC: 05
1326 11:31:20.940097 APIC: 04
1327 11:31:20.946740 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1328 11:31:20.956546 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1329 11:31:20.966840 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1330 11:31:20.966949 PCI: 00:00.0
1331 11:31:20.976914 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1332 11:31:20.986321 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1333 11:31:20.996671 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1334 11:31:21.006646 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1335 11:31:21.016192 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1336 11:31:21.022506 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1337 11:31:21.032446 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1338 11:31:21.042683 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1339 11:31:21.052493 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1340 11:31:21.062399 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1341 11:31:21.069324 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1342 11:31:21.079342 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1343 11:31:21.088778 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1344 11:31:21.098783 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1345 11:31:21.109013 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1346 11:31:21.118638 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1347 11:31:21.118744 PCI: 00:02.0
1348 11:31:21.131979 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1349 11:31:21.142127 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1350 11:31:21.151596 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1351 11:31:21.151682 PCI: 00:04.0
1352 11:31:21.154994 PCI: 00:08.0
1353 11:31:21.164799 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1354 11:31:21.164882 PCI: 00:12.0
1355 11:31:21.174799 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1356 11:31:21.181703 PCI: 00:14.0 child on link 0 USB0 port 0
1357 11:31:21.191446 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1358 11:31:21.194765 USB0 port 0 child on link 0 USB2 port 0
1359 11:31:21.198087 USB2 port 0
1360 11:31:21.198172 USB2 port 1
1361 11:31:21.201019 USB2 port 2
1362 11:31:21.201100 USB2 port 3
1363 11:31:21.205000 USB2 port 5
1364 11:31:21.205081 USB2 port 6
1365 11:31:21.207771 USB2 port 9
1366 11:31:21.207852 USB3 port 0
1367 11:31:21.211429 USB3 port 1
1368 11:31:21.211509 USB3 port 2
1369 11:31:21.214936 USB3 port 3
1370 11:31:21.215018 USB3 port 4
1371 11:31:21.218263 PCI: 00:14.2
1372 11:31:21.227979 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1373 11:31:21.237724 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1374 11:31:21.241067 PCI: 00:14.3
1375 11:31:21.250797 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1376 11:31:21.254068 PCI: 00:15.0 child on link 0 I2C: 01:15
1377 11:31:21.264211 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1378 11:31:21.267289 I2C: 01:15
1379 11:31:21.270913 PCI: 00:15.1 child on link 0 I2C: 02:5d
1380 11:31:21.281124 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1381 11:31:21.283921 I2C: 02:5d
1382 11:31:21.284001 GENERIC: 0.0
1383 11:31:21.287494 PCI: 00:16.0
1384 11:31:21.297183 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1385 11:31:21.297265 PCI: 00:17.0
1386 11:31:21.307296 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1387 11:31:21.317376 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1388 11:31:21.327372 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1389 11:31:21.336740 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1390 11:31:21.346591 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1391 11:31:21.356955 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1392 11:31:21.359731 PCI: 00:19.0 child on link 0 I2C: 03:1a
1393 11:31:21.369652 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1394 11:31:21.372946 I2C: 03:1a
1395 11:31:21.373047 I2C: 03:38
1396 11:31:21.376415 I2C: 03:39
1397 11:31:21.376498 I2C: 03:3a
1398 11:31:21.376568 I2C: 03:3b
1399 11:31:21.383608 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1400 11:31:21.393011 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1401 11:31:21.402918 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1402 11:31:21.412763 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1403 11:31:21.412846 PCI: 01:00.0
1404 11:31:21.423015 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1405 11:31:21.426053 PCI: 00:1e.0
1406 11:31:21.436478 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1407 11:31:21.446290 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1408 11:31:21.452863 PCI: 00:1e.2 child on link 0 SPI: 00
1409 11:31:21.462297 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1410 11:31:21.462379 SPI: 00
1411 11:31:21.465644 PCI: 00:1e.3 child on link 0 SPI: 01
1412 11:31:21.475793 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1413 11:31:21.479413 SPI: 01
1414 11:31:21.482971 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1415 11:31:21.492216 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1416 11:31:21.502415 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1417 11:31:21.502498 PNP: 0c09.0
1418 11:31:21.512502 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1419 11:31:21.512582 PCI: 00:1f.3
1420 11:31:21.521835 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1421 11:31:21.531962 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1422 11:31:21.535603 PCI: 00:1f.4
1423 11:31:21.545114 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1424 11:31:21.555240 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1425 11:31:21.555349 PCI: 00:1f.5
1426 11:31:21.565262 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1427 11:31:21.568231 Done allocating resources.
1428 11:31:21.574911 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1429 11:31:21.578381 Enabling resources...
1430 11:31:21.581684 PCI: 00:00.0 subsystem <- 8086/9b61
1431 11:31:21.584625 PCI: 00:00.0 cmd <- 06
1432 11:31:21.587999 PCI: 00:02.0 subsystem <- 8086/9b41
1433 11:31:21.591377 PCI: 00:02.0 cmd <- 03
1434 11:31:21.591457 PCI: 00:08.0 cmd <- 06
1435 11:31:21.598243 PCI: 00:12.0 subsystem <- 8086/02f9
1436 11:31:21.598324 PCI: 00:12.0 cmd <- 02
1437 11:31:21.601513 PCI: 00:14.0 subsystem <- 8086/02ed
1438 11:31:21.605172 PCI: 00:14.0 cmd <- 02
1439 11:31:21.607943 PCI: 00:14.2 cmd <- 02
1440 11:31:21.611134 PCI: 00:14.3 subsystem <- 8086/02f0
1441 11:31:21.614482 PCI: 00:14.3 cmd <- 02
1442 11:31:21.617736 PCI: 00:15.0 subsystem <- 8086/02e8
1443 11:31:21.621162 PCI: 00:15.0 cmd <- 02
1444 11:31:21.624621 PCI: 00:15.1 subsystem <- 8086/02e9
1445 11:31:21.627964 PCI: 00:15.1 cmd <- 02
1446 11:31:21.631463 PCI: 00:16.0 subsystem <- 8086/02e0
1447 11:31:21.634876 PCI: 00:16.0 cmd <- 02
1448 11:31:21.637659 PCI: 00:17.0 subsystem <- 8086/02d3
1449 11:31:21.637739 PCI: 00:17.0 cmd <- 03
1450 11:31:21.644911 PCI: 00:19.0 subsystem <- 8086/02c5
1451 11:31:21.644991 PCI: 00:19.0 cmd <- 02
1452 11:31:21.647707 PCI: 00:1d.0 bridge ctrl <- 0013
1453 11:31:21.651224 PCI: 00:1d.0 subsystem <- 8086/02b0
1454 11:31:21.654440 PCI: 00:1d.0 cmd <- 06
1455 11:31:21.658142 PCI: 00:1e.0 subsystem <- 8086/02a8
1456 11:31:21.661457 PCI: 00:1e.0 cmd <- 06
1457 11:31:21.664710 PCI: 00:1e.2 subsystem <- 8086/02aa
1458 11:31:21.668167 PCI: 00:1e.2 cmd <- 06
1459 11:31:21.671364 PCI: 00:1e.3 subsystem <- 8086/02ab
1460 11:31:21.674853 PCI: 00:1e.3 cmd <- 02
1461 11:31:21.677882 PCI: 00:1f.0 subsystem <- 8086/0284
1462 11:31:21.681305 PCI: 00:1f.0 cmd <- 407
1463 11:31:21.684593 PCI: 00:1f.3 subsystem <- 8086/02c8
1464 11:31:21.687883 PCI: 00:1f.3 cmd <- 02
1465 11:31:21.690899 PCI: 00:1f.4 subsystem <- 8086/02a3
1466 11:31:21.694097 PCI: 00:1f.4 cmd <- 03
1467 11:31:21.697888 PCI: 00:1f.5 subsystem <- 8086/02a4
1468 11:31:21.697993 PCI: 00:1f.5 cmd <- 406
1469 11:31:21.707839 PCI: 01:00.0 cmd <- 02
1470 11:31:21.713534 done.
1471 11:31:21.725639 ME: Version: 14.0.39.1367
1472 11:31:21.732445 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1473 11:31:21.735879 Initializing devices...
1474 11:31:21.735985 Root Device init ...
1475 11:31:21.742585 Chrome EC: Set SMI mask to 0x0000000000000000
1476 11:31:21.745364 Chrome EC: clear events_b mask to 0x0000000000000000
1477 11:31:21.752637 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1478 11:31:21.758884 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1479 11:31:21.765900 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1480 11:31:21.768771 Chrome EC: Set WAKE mask to 0x0000000000000000
1481 11:31:21.772226 Root Device init finished in 35170 usecs
1482 11:31:21.775670 CPU_CLUSTER: 0 init ...
1483 11:31:21.782530 CPU_CLUSTER: 0 init finished in 2446 usecs
1484 11:31:21.786572 PCI: 00:00.0 init ...
1485 11:31:21.789849 CPU TDP: 15 Watts
1486 11:31:21.793232 CPU PL2 = 64 Watts
1487 11:31:21.796592 PCI: 00:00.0 init finished in 7078 usecs
1488 11:31:21.799575 PCI: 00:02.0 init ...
1489 11:31:21.803278 PCI: 00:02.0 init finished in 2252 usecs
1490 11:31:21.806639 PCI: 00:08.0 init ...
1491 11:31:21.809921 PCI: 00:08.0 init finished in 2251 usecs
1492 11:31:21.813112 PCI: 00:12.0 init ...
1493 11:31:21.816433 PCI: 00:12.0 init finished in 2250 usecs
1494 11:31:21.819679 PCI: 00:14.0 init ...
1495 11:31:21.822974 PCI: 00:14.0 init finished in 2252 usecs
1496 11:31:21.826343 PCI: 00:14.2 init ...
1497 11:31:21.829778 PCI: 00:14.2 init finished in 2251 usecs
1498 11:31:21.832889 PCI: 00:14.3 init ...
1499 11:31:21.836686 PCI: 00:14.3 init finished in 2269 usecs
1500 11:31:21.839938 PCI: 00:15.0 init ...
1501 11:31:21.842942 DW I2C bus 0 at 0xd121f000 (400 KHz)
1502 11:31:21.846330 PCI: 00:15.0 init finished in 5974 usecs
1503 11:31:21.849446 PCI: 00:15.1 init ...
1504 11:31:21.852627 DW I2C bus 1 at 0xd1220000 (400 KHz)
1505 11:31:21.856420 PCI: 00:15.1 init finished in 5966 usecs
1506 11:31:21.859744 PCI: 00:16.0 init ...
1507 11:31:21.863072 PCI: 00:16.0 init finished in 2251 usecs
1508 11:31:21.866603 PCI: 00:19.0 init ...
1509 11:31:21.869921 DW I2C bus 4 at 0xd1222000 (400 KHz)
1510 11:31:21.877058 PCI: 00:19.0 init finished in 5973 usecs
1511 11:31:21.877173 PCI: 00:1d.0 init ...
1512 11:31:21.879916 Initializing PCH PCIe bridge.
1513 11:31:21.886618 PCI: 00:1d.0 init finished in 5282 usecs
1514 11:31:21.889894 PCI: 00:1f.0 init ...
1515 11:31:21.893248 IOAPIC: Initializing IOAPIC at 0xfec00000
1516 11:31:21.896707 IOAPIC: Bootstrap Processor Local APIC = 0x00
1517 11:31:21.899472 IOAPIC: ID = 0x02
1518 11:31:21.903002 IOAPIC: Dumping registers
1519 11:31:21.903105 reg 0x0000: 0x02000000
1520 11:31:21.906389 reg 0x0001: 0x00770020
1521 11:31:21.909702 reg 0x0002: 0x00000000
1522 11:31:21.912943 PCI: 00:1f.0 init finished in 23531 usecs
1523 11:31:21.916978 PCI: 00:1f.4 init ...
1524 11:31:21.920508 PCI: 00:1f.4 init finished in 2262 usecs
1525 11:31:21.932464 PCI: 01:00.0 init ...
1526 11:31:21.935797 PCI: 01:00.0 init finished in 2251 usecs
1527 11:31:21.939897 PNP: 0c09.0 init ...
1528 11:31:21.943323 Google Chrome EC uptime: 11.095 seconds
1529 11:31:21.949842 Google Chrome AP resets since EC boot: 0
1530 11:31:21.953488 Google Chrome most recent AP reset causes:
1531 11:31:21.959879 Google Chrome EC reset flags at last EC boot: reset-pin
1532 11:31:21.963594 PNP: 0c09.0 init finished in 20639 usecs
1533 11:31:21.967018 Devices initialized
1534 11:31:21.969960 Show all devs... After init.
1535 11:31:21.970041 Root Device: enabled 1
1536 11:31:21.973408 CPU_CLUSTER: 0: enabled 1
1537 11:31:21.976559 DOMAIN: 0000: enabled 1
1538 11:31:21.976639 APIC: 00: enabled 1
1539 11:31:21.979983 PCI: 00:00.0: enabled 1
1540 11:31:21.982832 PCI: 00:02.0: enabled 1
1541 11:31:21.986356 PCI: 00:04.0: enabled 0
1542 11:31:21.986437 PCI: 00:05.0: enabled 0
1543 11:31:21.989843 PCI: 00:12.0: enabled 1
1544 11:31:21.993512 PCI: 00:12.5: enabled 0
1545 11:31:21.996682 PCI: 00:12.6: enabled 0
1546 11:31:21.996763 PCI: 00:14.0: enabled 1
1547 11:31:21.999895 PCI: 00:14.1: enabled 0
1548 11:31:22.002682 PCI: 00:14.3: enabled 1
1549 11:31:22.002788 PCI: 00:14.5: enabled 0
1550 11:31:22.006224 PCI: 00:15.0: enabled 1
1551 11:31:22.009697 PCI: 00:15.1: enabled 1
1552 11:31:22.013046 PCI: 00:15.2: enabled 0
1553 11:31:22.013126 PCI: 00:15.3: enabled 0
1554 11:31:22.016484 PCI: 00:16.0: enabled 1
1555 11:31:22.019612 PCI: 00:16.1: enabled 0
1556 11:31:22.022985 PCI: 00:16.2: enabled 0
1557 11:31:22.023080 PCI: 00:16.3: enabled 0
1558 11:31:22.026406 PCI: 00:16.4: enabled 0
1559 11:31:22.029139 PCI: 00:16.5: enabled 0
1560 11:31:22.032678 PCI: 00:17.0: enabled 1
1561 11:31:22.032775 PCI: 00:19.0: enabled 1
1562 11:31:22.035917 PCI: 00:19.1: enabled 0
1563 11:31:22.039687 PCI: 00:19.2: enabled 0
1564 11:31:22.039768 PCI: 00:1a.0: enabled 0
1565 11:31:22.043086 PCI: 00:1c.0: enabled 0
1566 11:31:22.046267 PCI: 00:1c.1: enabled 0
1567 11:31:22.049072 PCI: 00:1c.2: enabled 0
1568 11:31:22.049153 PCI: 00:1c.3: enabled 0
1569 11:31:22.052644 PCI: 00:1c.4: enabled 0
1570 11:31:22.055854 PCI: 00:1c.5: enabled 0
1571 11:31:22.059407 PCI: 00:1c.6: enabled 0
1572 11:31:22.059519 PCI: 00:1c.7: enabled 0
1573 11:31:22.062570 PCI: 00:1d.0: enabled 1
1574 11:31:22.066202 PCI: 00:1d.1: enabled 0
1575 11:31:22.069435 PCI: 00:1d.2: enabled 0
1576 11:31:22.069546 PCI: 00:1d.3: enabled 0
1577 11:31:22.072331 PCI: 00:1d.4: enabled 0
1578 11:31:22.075793 PCI: 00:1d.5: enabled 0
1579 11:31:22.075894 PCI: 00:1e.0: enabled 1
1580 11:31:22.079051 PCI: 00:1e.1: enabled 0
1581 11:31:22.082288 PCI: 00:1e.2: enabled 1
1582 11:31:22.085855 PCI: 00:1e.3: enabled 1
1583 11:31:22.085959 PCI: 00:1f.0: enabled 1
1584 11:31:22.089033 PCI: 00:1f.1: enabled 0
1585 11:31:22.092186 PCI: 00:1f.2: enabled 0
1586 11:31:22.095429 PCI: 00:1f.3: enabled 1
1587 11:31:22.095524 PCI: 00:1f.4: enabled 1
1588 11:31:22.099158 PCI: 00:1f.5: enabled 1
1589 11:31:22.102381 PCI: 00:1f.6: enabled 0
1590 11:31:22.105723 USB0 port 0: enabled 1
1591 11:31:22.105830 I2C: 01:15: enabled 1
1592 11:31:22.108813 I2C: 02:5d: enabled 1
1593 11:31:22.112398 GENERIC: 0.0: enabled 1
1594 11:31:22.112498 I2C: 03:1a: enabled 1
1595 11:31:22.115764 I2C: 03:38: enabled 1
1596 11:31:22.119167 I2C: 03:39: enabled 1
1597 11:31:22.119265 I2C: 03:3a: enabled 1
1598 11:31:22.122474 I2C: 03:3b: enabled 1
1599 11:31:22.125172 PCI: 00:00.0: enabled 1
1600 11:31:22.125246 SPI: 00: enabled 1
1601 11:31:22.128568 SPI: 01: enabled 1
1602 11:31:22.131936 PNP: 0c09.0: enabled 1
1603 11:31:22.132038 USB2 port 0: enabled 1
1604 11:31:22.135213 USB2 port 1: enabled 1
1605 11:31:22.138562 USB2 port 2: enabled 0
1606 11:31:22.138664 USB2 port 3: enabled 0
1607 11:31:22.141951 USB2 port 5: enabled 0
1608 11:31:22.144887 USB2 port 6: enabled 1
1609 11:31:22.148339 USB2 port 9: enabled 1
1610 11:31:22.148438 USB3 port 0: enabled 1
1611 11:31:22.151700 USB3 port 1: enabled 1
1612 11:31:22.155011 USB3 port 2: enabled 1
1613 11:31:22.155111 USB3 port 3: enabled 1
1614 11:31:22.158295 USB3 port 4: enabled 0
1615 11:31:22.162032 APIC: 03: enabled 1
1616 11:31:22.162107 APIC: 06: enabled 1
1617 11:31:22.164777 APIC: 01: enabled 1
1618 11:31:22.168292 APIC: 02: enabled 1
1619 11:31:22.168382 APIC: 07: enabled 1
1620 11:31:22.171206 APIC: 05: enabled 1
1621 11:31:22.171304 APIC: 04: enabled 1
1622 11:31:22.175026 PCI: 00:08.0: enabled 1
1623 11:31:22.178427 PCI: 00:14.2: enabled 1
1624 11:31:22.181301 PCI: 01:00.0: enabled 1
1625 11:31:22.185478 Disabling ACPI via APMC:
1626 11:31:22.188304 done.
1627 11:31:22.191412 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1628 11:31:22.194768 ELOG: NV offset 0xaf0000 size 0x4000
1629 11:31:22.202185 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1630 11:31:22.208228 ELOG: Event(17) added with size 13 at 2024-03-18 11:28:30 UTC
1631 11:31:22.215515 ELOG: Event(92) added with size 9 at 2024-03-18 11:28:30 UTC
1632 11:31:22.221699 ELOG: Event(93) added with size 9 at 2024-03-18 11:28:30 UTC
1633 11:31:22.228458 ELOG: Event(9A) added with size 9 at 2024-03-18 11:28:30 UTC
1634 11:31:22.234959 ELOG: Event(9E) added with size 10 at 2024-03-18 11:28:30 UTC
1635 11:31:22.241554 ELOG: Event(9F) added with size 14 at 2024-03-18 11:28:30 UTC
1636 11:31:22.244938 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1637 11:31:22.252478 ELOG: Event(A1) added with size 10 at 2024-03-18 11:28:30 UTC
1638 11:31:22.262160 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1639 11:31:22.268836 ELOG: Event(A0) added with size 9 at 2024-03-18 11:28:30 UTC
1640 11:31:22.272101 elog_add_boot_reason: Logged dev mode boot
1641 11:31:22.272200 Finalize devices...
1642 11:31:22.275379 PCI: 00:17.0 final
1643 11:31:22.278698 Devices finalized
1644 11:31:22.281756 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1645 11:31:22.288704 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1646 11:31:22.292048 ME: HFSTS1 : 0x90000245
1647 11:31:22.295197 ME: HFSTS2 : 0x3B850126
1648 11:31:22.302013 ME: HFSTS3 : 0x00000020
1649 11:31:22.304798 ME: HFSTS4 : 0x00004800
1650 11:31:22.308205 ME: HFSTS5 : 0x00000000
1651 11:31:22.311478 ME: HFSTS6 : 0x40400006
1652 11:31:22.315150 ME: Manufacturing Mode : NO
1653 11:31:22.318716 ME: FW Partition Table : OK
1654 11:31:22.321352 ME: Bringup Loader Failure : NO
1655 11:31:22.324678 ME: Firmware Init Complete : YES
1656 11:31:22.327987 ME: Boot Options Present : NO
1657 11:31:22.331417 ME: Update In Progress : NO
1658 11:31:22.334620 ME: D0i3 Support : YES
1659 11:31:22.338443 ME: Low Power State Enabled : NO
1660 11:31:22.341215 ME: CPU Replaced : NO
1661 11:31:22.345009 ME: CPU Replacement Valid : YES
1662 11:31:22.347904 ME: Current Working State : 5
1663 11:31:22.351508 ME: Current Operation State : 1
1664 11:31:22.354781 ME: Current Operation Mode : 0
1665 11:31:22.357828 ME: Error Code : 0
1666 11:31:22.361160 ME: CPU Debug Disabled : YES
1667 11:31:22.364281 ME: TXT Support : NO
1668 11:31:22.371406 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1669 11:31:22.377540 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1670 11:31:22.377637 CBFS @ c08000 size 3f8000
1671 11:31:22.384518 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1672 11:31:22.387398 CBFS: Locating 'fallback/dsdt.aml'
1673 11:31:22.390746 CBFS: Found @ offset 10bb80 size 3fa5
1674 11:31:22.397809 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1675 11:31:22.400819 CBFS @ c08000 size 3f8000
1676 11:31:22.404077 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1677 11:31:22.407689 CBFS: Locating 'fallback/slic'
1678 11:31:22.412632 CBFS: 'fallback/slic' not found.
1679 11:31:22.418867 ACPI: Writing ACPI tables at 99b3e000.
1680 11:31:22.418972 ACPI: * FACS
1681 11:31:22.422541 ACPI: * DSDT
1682 11:31:22.425645 Ramoops buffer: 0x100000@0x99a3d000.
1683 11:31:22.429148 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1684 11:31:22.435197 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1685 11:31:22.438867 Google Chrome EC: version:
1686 11:31:22.442337 ro: helios_v2.0.2659-56403530b
1687 11:31:22.445089 rw: helios_v2.0.2849-c41de27e7d
1688 11:31:22.445185 running image: 1
1689 11:31:22.449930 ACPI: * FADT
1690 11:31:22.450047 SCI is IRQ9
1691 11:31:22.456579 ACPI: added table 1/32, length now 40
1692 11:31:22.456729 ACPI: * SSDT
1693 11:31:22.459923 Found 1 CPU(s) with 8 core(s) each.
1694 11:31:22.463033 Error: Could not locate 'wifi_sar' in VPD.
1695 11:31:22.469570 Checking CBFS for default SAR values
1696 11:31:22.472530 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1697 11:31:22.476398 CBFS @ c08000 size 3f8000
1698 11:31:22.482682 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1699 11:31:22.486253 CBFS: Locating 'wifi_sar_defaults.hex'
1700 11:31:22.489657 CBFS: Found @ offset 5fac0 size 77
1701 11:31:22.492627 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1702 11:31:22.499536 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1703 11:31:22.502992 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1704 11:31:22.509499 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1705 11:31:22.512966 failed to find key in VPD: dsm_calib_r0_0
1706 11:31:22.522647 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1707 11:31:22.525940 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1708 11:31:22.529480 failed to find key in VPD: dsm_calib_r0_1
1709 11:31:22.539215 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1710 11:31:22.545482 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1711 11:31:22.549152 failed to find key in VPD: dsm_calib_r0_2
1712 11:31:22.558664 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1713 11:31:22.562098 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1714 11:31:22.569102 failed to find key in VPD: dsm_calib_r0_3
1715 11:31:22.575543 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1716 11:31:22.581949 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1717 11:31:22.585304 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1718 11:31:22.588634 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1719 11:31:22.592635 EC returned error result code 1
1720 11:31:22.596178 EC returned error result code 1
1721 11:31:22.600162 EC returned error result code 1
1722 11:31:22.607093 PS2K: Bad resp from EC. Vivaldi disabled!
1723 11:31:22.610414 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1724 11:31:22.617279 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1725 11:31:22.623225 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1726 11:31:22.626417 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1727 11:31:22.632814 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1728 11:31:22.639771 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1729 11:31:22.646054 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1730 11:31:22.650124 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1731 11:31:22.653033 ACPI: added table 2/32, length now 44
1732 11:31:22.656530 ACPI: * MCFG
1733 11:31:22.659932 ACPI: added table 3/32, length now 48
1734 11:31:22.662710 ACPI: * TPM2
1735 11:31:22.666147 TPM2 log created at 99a2d000
1736 11:31:22.669804 ACPI: added table 4/32, length now 52
1737 11:31:22.669878 ACPI: * MADT
1738 11:31:22.673260 SCI is IRQ9
1739 11:31:22.676049 ACPI: added table 5/32, length now 56
1740 11:31:22.676120 current = 99b43ac0
1741 11:31:22.679318 ACPI: * DMAR
1742 11:31:22.682659 ACPI: added table 6/32, length now 60
1743 11:31:22.686034 ACPI: * IGD OpRegion
1744 11:31:22.686105 GMA: Found VBT in CBFS
1745 11:31:22.689447 GMA: Found valid VBT in CBFS
1746 11:31:22.692411 ACPI: added table 7/32, length now 64
1747 11:31:22.695800 ACPI: * HPET
1748 11:31:22.699346 ACPI: added table 8/32, length now 68
1749 11:31:22.699438 ACPI: done.
1750 11:31:22.702614 ACPI tables: 31744 bytes.
1751 11:31:22.705906 smbios_write_tables: 99a2c000
1752 11:31:22.709822 EC returned error result code 3
1753 11:31:22.712895 Couldn't obtain OEM name from CBI
1754 11:31:22.716175 Create SMBIOS type 17
1755 11:31:22.719169 PCI: 00:00.0 (Intel Cannonlake)
1756 11:31:22.722908 PCI: 00:14.3 (Intel WiFi)
1757 11:31:22.725947 SMBIOS tables: 939 bytes.
1758 11:31:22.729498 Writing table forward entry at 0x00000500
1759 11:31:22.735928 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1760 11:31:22.739532 Writing coreboot table at 0x99b62000
1761 11:31:22.745613 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1762 11:31:22.748980 1. 0000000000001000-000000000009ffff: RAM
1763 11:31:22.752717 2. 00000000000a0000-00000000000fffff: RESERVED
1764 11:31:22.758833 3. 0000000000100000-0000000099a2bfff: RAM
1765 11:31:22.762174 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1766 11:31:22.769204 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1767 11:31:22.775705 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1768 11:31:22.779065 7. 000000009a000000-000000009f7fffff: RESERVED
1769 11:31:22.785386 8. 00000000e0000000-00000000efffffff: RESERVED
1770 11:31:22.788796 9. 00000000fc000000-00000000fc000fff: RESERVED
1771 11:31:22.792183 10. 00000000fe000000-00000000fe00ffff: RESERVED
1772 11:31:22.798957 11. 00000000fed10000-00000000fed17fff: RESERVED
1773 11:31:22.802134 12. 00000000fed80000-00000000fed83fff: RESERVED
1774 11:31:22.808720 13. 00000000fed90000-00000000fed91fff: RESERVED
1775 11:31:22.812132 14. 00000000feda0000-00000000feda1fff: RESERVED
1776 11:31:22.818837 15. 0000000100000000-000000045e7fffff: RAM
1777 11:31:22.821624 Graphics framebuffer located at 0xc0000000
1778 11:31:22.824955 Passing 5 GPIOs to payload:
1779 11:31:22.828546 NAME | PORT | POLARITY | VALUE
1780 11:31:22.835508 write protect | undefined | high | low
1781 11:31:22.838539 lid | undefined | high | high
1782 11:31:22.845105 power | undefined | high | low
1783 11:31:22.851747 oprom | undefined | high | low
1784 11:31:22.855089 EC in RW | 0x000000cb | high | low
1785 11:31:22.858128 Board ID: 4
1786 11:31:22.861642 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1787 11:31:22.864621 CBFS @ c08000 size 3f8000
1788 11:31:22.871664 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1789 11:31:22.877881 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1790 11:31:22.878034 coreboot table: 1492 bytes.
1791 11:31:22.881202 IMD ROOT 0. 99fff000 00001000
1792 11:31:22.884727 IMD SMALL 1. 99ffe000 00001000
1793 11:31:22.887638 FSP MEMORY 2. 99c4e000 003b0000
1794 11:31:22.891102 CONSOLE 3. 99c2e000 00020000
1795 11:31:22.894386 FMAP 4. 99c2d000 0000054e
1796 11:31:22.898037 TIME STAMP 5. 99c2c000 00000910
1797 11:31:22.901560 VBOOT WORK 6. 99c18000 00014000
1798 11:31:22.904250 MRC DATA 7. 99c16000 00001958
1799 11:31:22.907537 ROMSTG STCK 8. 99c15000 00001000
1800 11:31:22.911094 AFTER CAR 9. 99c0b000 0000a000
1801 11:31:22.914445 RAMSTAGE 10. 99baf000 0005c000
1802 11:31:22.917806 REFCODE 11. 99b7a000 00035000
1803 11:31:22.921347 SMM BACKUP 12. 99b6a000 00010000
1804 11:31:22.924656 COREBOOT 13. 99b62000 00008000
1805 11:31:22.927950 ACPI 14. 99b3e000 00024000
1806 11:31:22.931381 ACPI GNVS 15. 99b3d000 00001000
1807 11:31:22.934132 RAMOOPS 16. 99a3d000 00100000
1808 11:31:22.937545 TPM2 TCGLOG17. 99a2d000 00010000
1809 11:31:22.941178 SMBIOS 18. 99a2c000 00000800
1810 11:31:22.944529 IMD small region:
1811 11:31:22.947969 IMD ROOT 0. 99ffec00 00000400
1812 11:31:22.951482 FSP RUNTIME 1. 99ffebe0 00000004
1813 11:31:22.954095 EC HOSTEVENT 2. 99ffebc0 00000008
1814 11:31:22.957513 POWER STATE 3. 99ffeb80 00000040
1815 11:31:22.960698 ROMSTAGE 4. 99ffeb60 00000004
1816 11:31:22.964576 MEM INFO 5. 99ffe9a0 000001b9
1817 11:31:22.967931 VPD 6. 99ffe920 0000006c
1818 11:31:22.970817 MTRR: Physical address space:
1819 11:31:22.977448 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1820 11:31:22.984415 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1821 11:31:22.990574 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1822 11:31:22.997195 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1823 11:31:23.004073 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1824 11:31:23.010846 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1825 11:31:23.016985 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1826 11:31:23.020889 MTRR: Fixed MSR 0x250 0x0606060606060606
1827 11:31:23.024259 MTRR: Fixed MSR 0x258 0x0606060606060606
1828 11:31:23.027036 MTRR: Fixed MSR 0x259 0x0000000000000000
1829 11:31:23.030324 MTRR: Fixed MSR 0x268 0x0606060606060606
1830 11:31:23.037094 MTRR: Fixed MSR 0x269 0x0606060606060606
1831 11:31:23.040172 MTRR: Fixed MSR 0x26a 0x0606060606060606
1832 11:31:23.043687 MTRR: Fixed MSR 0x26b 0x0606060606060606
1833 11:31:23.047319 MTRR: Fixed MSR 0x26c 0x0606060606060606
1834 11:31:23.053805 MTRR: Fixed MSR 0x26d 0x0606060606060606
1835 11:31:23.057250 MTRR: Fixed MSR 0x26e 0x0606060606060606
1836 11:31:23.059916 MTRR: Fixed MSR 0x26f 0x0606060606060606
1837 11:31:23.063221 call enable_fixed_mtrr()
1838 11:31:23.066668 CPU physical address size: 39 bits
1839 11:31:23.073168 MTRR: default type WB/UC MTRR counts: 6/8.
1840 11:31:23.077250 MTRR: WB selected as default type.
1841 11:31:23.079987 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1842 11:31:23.086751 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1843 11:31:23.093130 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1844 11:31:23.099925 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1845 11:31:23.106565 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1846 11:31:23.113232 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1847 11:31:23.116644 MTRR: Fixed MSR 0x250 0x0606060606060606
1848 11:31:23.122908 MTRR: Fixed MSR 0x258 0x0606060606060606
1849 11:31:23.126428 MTRR: Fixed MSR 0x259 0x0000000000000000
1850 11:31:23.129775 MTRR: Fixed MSR 0x268 0x0606060606060606
1851 11:31:23.133185 MTRR: Fixed MSR 0x269 0x0606060606060606
1852 11:31:23.139365 MTRR: Fixed MSR 0x26a 0x0606060606060606
1853 11:31:23.142678 MTRR: Fixed MSR 0x26b 0x0606060606060606
1854 11:31:23.145909 MTRR: Fixed MSR 0x26c 0x0606060606060606
1855 11:31:23.149261 MTRR: Fixed MSR 0x26d 0x0606060606060606
1856 11:31:23.156196 MTRR: Fixed MSR 0x26e 0x0606060606060606
1857 11:31:23.159823 MTRR: Fixed MSR 0x26f 0x0606060606060606
1858 11:31:23.159907
1859 11:31:23.159993 MTRR check
1860 11:31:23.162647 call enable_fixed_mtrr()
1861 11:31:23.166067 Fixed MTRRs : Enabled
1862 11:31:23.169596 Variable MTRRs: Enabled
1863 11:31:23.169680
1864 11:31:23.172202 CPU physical address size: 39 bits
1865 11:31:23.175619 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1866 11:31:23.182313 MTRR: Fixed MSR 0x250 0x0606060606060606
1867 11:31:23.185683 MTRR: Fixed MSR 0x250 0x0606060606060606
1868 11:31:23.189088 MTRR: Fixed MSR 0x258 0x0606060606060606
1869 11:31:23.192332 MTRR: Fixed MSR 0x259 0x0000000000000000
1870 11:31:23.199058 MTRR: Fixed MSR 0x268 0x0606060606060606
1871 11:31:23.202306 MTRR: Fixed MSR 0x269 0x0606060606060606
1872 11:31:23.205858 MTRR: Fixed MSR 0x26a 0x0606060606060606
1873 11:31:23.208615 MTRR: Fixed MSR 0x26b 0x0606060606060606
1874 11:31:23.215453 MTRR: Fixed MSR 0x26c 0x0606060606060606
1875 11:31:23.218862 MTRR: Fixed MSR 0x26d 0x0606060606060606
1876 11:31:23.221998 MTRR: Fixed MSR 0x26e 0x0606060606060606
1877 11:31:23.225658 MTRR: Fixed MSR 0x26f 0x0606060606060606
1878 11:31:23.232349 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 11:31:23.232450 call enable_fixed_mtrr()
1880 11:31:23.239033 MTRR: Fixed MSR 0x259 0x0000000000000000
1881 11:31:23.241730 MTRR: Fixed MSR 0x268 0x0606060606060606
1882 11:31:23.245368 MTRR: Fixed MSR 0x269 0x0606060606060606
1883 11:31:23.248844 MTRR: Fixed MSR 0x26a 0x0606060606060606
1884 11:31:23.252020 MTRR: Fixed MSR 0x26b 0x0606060606060606
1885 11:31:23.258383 MTRR: Fixed MSR 0x26c 0x0606060606060606
1886 11:31:23.261633 MTRR: Fixed MSR 0x26d 0x0606060606060606
1887 11:31:23.265200 MTRR: Fixed MSR 0x26e 0x0606060606060606
1888 11:31:23.268669 MTRR: Fixed MSR 0x26f 0x0606060606060606
1889 11:31:23.275026 CPU physical address size: 39 bits
1890 11:31:23.275111 call enable_fixed_mtrr()
1891 11:31:23.281331 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 11:31:23.284909 MTRR: Fixed MSR 0x250 0x0606060606060606
1893 11:31:23.288190 MTRR: Fixed MSR 0x258 0x0606060606060606
1894 11:31:23.291617 MTRR: Fixed MSR 0x259 0x0000000000000000
1895 11:31:23.298144 MTRR: Fixed MSR 0x268 0x0606060606060606
1896 11:31:23.301485 MTRR: Fixed MSR 0x269 0x0606060606060606
1897 11:31:23.304565 MTRR: Fixed MSR 0x26a 0x0606060606060606
1898 11:31:23.307751 MTRR: Fixed MSR 0x26b 0x0606060606060606
1899 11:31:23.314705 MTRR: Fixed MSR 0x26c 0x0606060606060606
1900 11:31:23.318360 MTRR: Fixed MSR 0x26d 0x0606060606060606
1901 11:31:23.320992 MTRR: Fixed MSR 0x26e 0x0606060606060606
1902 11:31:23.324494 MTRR: Fixed MSR 0x26f 0x0606060606060606
1903 11:31:23.331353 MTRR: Fixed MSR 0x258 0x0606060606060606
1904 11:31:23.334805 MTRR: Fixed MSR 0x259 0x0000000000000000
1905 11:31:23.338109 MTRR: Fixed MSR 0x268 0x0606060606060606
1906 11:31:23.341337 MTRR: Fixed MSR 0x269 0x0606060606060606
1907 11:31:23.344431 MTRR: Fixed MSR 0x26a 0x0606060606060606
1908 11:31:23.351375 MTRR: Fixed MSR 0x26b 0x0606060606060606
1909 11:31:23.354787 MTRR: Fixed MSR 0x26c 0x0606060606060606
1910 11:31:23.358039 MTRR: Fixed MSR 0x26d 0x0606060606060606
1911 11:31:23.361623 MTRR: Fixed MSR 0x26e 0x0606060606060606
1912 11:31:23.367693 MTRR: Fixed MSR 0x26f 0x0606060606060606
1913 11:31:23.371194 call enable_fixed_mtrr()
1914 11:31:23.374307 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1915 11:31:23.377588 call enable_fixed_mtrr()
1916 11:31:23.380921 MTRR: Fixed MSR 0x250 0x0606060606060606
1917 11:31:23.384511 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 11:31:23.390731 MTRR: Fixed MSR 0x258 0x0606060606060606
1919 11:31:23.394300 MTRR: Fixed MSR 0x259 0x0000000000000000
1920 11:31:23.397764 MTRR: Fixed MSR 0x268 0x0606060606060606
1921 11:31:23.400632 MTRR: Fixed MSR 0x269 0x0606060606060606
1922 11:31:23.407456 MTRR: Fixed MSR 0x26a 0x0606060606060606
1923 11:31:23.410606 MTRR: Fixed MSR 0x26b 0x0606060606060606
1924 11:31:23.413751 MTRR: Fixed MSR 0x26c 0x0606060606060606
1925 11:31:23.417463 MTRR: Fixed MSR 0x26d 0x0606060606060606
1926 11:31:23.420377 MTRR: Fixed MSR 0x26e 0x0606060606060606
1927 11:31:23.427683 MTRR: Fixed MSR 0x26f 0x0606060606060606
1928 11:31:23.430498 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 11:31:23.433892 call enable_fixed_mtrr()
1930 11:31:23.437438 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 11:31:23.440324 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 11:31:23.447393 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 11:31:23.450765 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 11:31:23.453936 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 11:31:23.457198 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 11:31:23.460246 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 11:31:23.467266 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 11:31:23.470464 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 11:31:23.473708 CPU physical address size: 39 bits
1940 11:31:23.476872 call enable_fixed_mtrr()
1941 11:31:23.479963 CPU physical address size: 39 bits
1942 11:31:23.483685 CPU physical address size: 39 bits
1943 11:31:23.486672 CPU physical address size: 39 bits
1944 11:31:23.490121 CBFS @ c08000 size 3f8000
1945 11:31:23.496953 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1946 11:31:23.499801 CBFS: Locating 'fallback/payload'
1947 11:31:23.503107 CPU physical address size: 39 bits
1948 11:31:23.506848 CBFS: Found @ offset 1c96c0 size 3f798
1949 11:31:23.509721 Checking segment from ROM address 0xffdd16f8
1950 11:31:23.516860 Checking segment from ROM address 0xffdd1714
1951 11:31:23.520112 Loading segment from ROM address 0xffdd16f8
1952 11:31:23.522939 code (compression=0)
1953 11:31:23.529482 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1954 11:31:23.539365 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1955 11:31:23.543004 it's not compressed!
1956 11:31:23.633665 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1957 11:31:23.640561 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1958 11:31:23.643887 Loading segment from ROM address 0xffdd1714
1959 11:31:23.646980 Entry Point 0x30000000
1960 11:31:23.650112 Loaded segments
1961 11:31:23.655838 Finalizing chipset.
1962 11:31:23.659242 Finalizing SMM.
1963 11:31:23.662857 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1964 11:31:23.665650 mp_park_aps done after 0 msecs.
1965 11:31:23.672404 Jumping to boot code at 30000000(99b62000)
1966 11:31:23.678631 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1967 11:31:23.678709
1968 11:31:23.678772
1969 11:31:23.678830
1970 11:31:23.682070 Starting depthcharge on Helios...
1971 11:31:23.682143
1972 11:31:23.682475 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1973 11:31:23.682575 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1974 11:31:23.682658 Setting prompt string to ['hatch:']
1975 11:31:23.682739 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1976 11:31:23.691866 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1977 11:31:23.691973
1978 11:31:23.698700 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1979 11:31:23.698786
1980 11:31:23.705453 board_setup: Info: eMMC controller not present; skipping
1981 11:31:23.705554
1982 11:31:23.708537 New NVMe Controller 0x30053ac0 @ 00:1d:00
1983 11:31:23.708609
1984 11:31:23.715501 board_setup: Info: SDHCI controller not present; skipping
1985 11:31:23.715583
1986 11:31:23.722010 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1987 11:31:23.722128
1988 11:31:23.722195 Wipe memory regions:
1989 11:31:23.722256
1990 11:31:23.725427 [0x00000000001000, 0x000000000a0000)
1991 11:31:23.725518
1992 11:31:23.728829 [0x00000000100000, 0x00000030000000)
1993 11:31:23.795127
1994 11:31:23.798494 [0x00000030657430, 0x00000099a2c000)
1995 11:31:23.935573
1996 11:31:23.939016 [0x00000100000000, 0x0000045e800000)
1997 11:31:25.322366
1998 11:31:25.322501 R8152: Initializing
1999 11:31:25.322568
2000 11:31:25.325520 Version 9 (ocp_data = 6010)
2001 11:31:25.329568
2002 11:31:25.329711 R8152: Done initializing
2003 11:31:25.329802
2004 11:31:25.332739 Adding net device
2005 11:31:25.815602
2006 11:31:25.815751 R8152: Initializing
2007 11:31:25.815909
2008 11:31:25.818831 Version 6 (ocp_data = 5c30)
2009 11:31:25.818929
2010 11:31:25.821807 R8152: Done initializing
2011 11:31:25.821893
2012 11:31:25.825246 net_add_device: Attemp to include the same device
2013 11:31:25.829015
2014 11:31:25.836306 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2015 11:31:25.836416
2016 11:31:25.836482
2017 11:31:25.836542
2018 11:31:25.836844 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2020 11:31:25.937172 hatch: tftpboot 192.168.201.1 13086407/tftp-deploy-2uxwlu71/kernel/bzImage 13086407/tftp-deploy-2uxwlu71/kernel/cmdline 13086407/tftp-deploy-2uxwlu71/ramdisk/ramdisk.cpio.gz
2021 11:31:25.937317 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2022 11:31:25.937405 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2023 11:31:25.941471 tftpboot 192.168.201.1 13086407/tftp-deploy-2uxwlu71/kernel/bzImploy-2uxwlu71/kernel/cmdline 13086407/tftp-deploy-2uxwlu71/ramdisk/ramdisk.cpio.gz
2024 11:31:25.941591
2025 11:31:25.941691 Waiting for link
2026 11:31:26.142455
2027 11:31:26.142588 done.
2028 11:31:26.142664
2029 11:31:26.142725 MAC: 00:24:32:50:19:be
2030 11:31:26.142785
2031 11:31:26.145344 Sending DHCP discover... done.
2032 11:31:26.145417
2033 11:31:26.148794 Waiting for reply... done.
2034 11:31:26.148864
2035 11:31:26.152119 Sending DHCP request... done.
2036 11:31:26.152213
2037 11:31:26.155653 Waiting for reply... done.
2038 11:31:26.155738
2039 11:31:26.159051 My ip is 192.168.201.15
2040 11:31:26.159125
2041 11:31:26.161806 The DHCP server ip is 192.168.201.1
2042 11:31:26.161888
2043 11:31:26.165058 TFTP server IP predefined by user: 192.168.201.1
2044 11:31:26.168489
2045 11:31:26.175318 Bootfile predefined by user: 13086407/tftp-deploy-2uxwlu71/kernel/bzImage
2046 11:31:26.175402
2047 11:31:26.178784 Sending tftp read request... done.
2048 11:31:26.178870
2049 11:31:26.181575 Waiting for the transfer...
2050 11:31:26.181655
2051 11:31:26.728136 00000000 ################################################################
2052 11:31:26.728321
2053 11:31:27.278459 00080000 ################################################################
2054 11:31:27.278605
2055 11:31:27.822625 00100000 ################################################################
2056 11:31:27.822777
2057 11:31:28.426240 00180000 ################################################################
2058 11:31:28.426735
2059 11:31:29.065751 00200000 ################################################################
2060 11:31:29.065878
2061 11:31:29.620697 00280000 ################################################################
2062 11:31:29.620865
2063 11:31:30.157876 00300000 ################################################################
2064 11:31:30.158012
2065 11:31:30.698652 00380000 ################################################################
2066 11:31:30.698789
2067 11:31:31.227838 00400000 ################################################################
2068 11:31:31.227975
2069 11:31:31.759963 00480000 ################################################################
2070 11:31:31.760127
2071 11:31:32.294775 00500000 ################################################################
2072 11:31:32.294912
2073 11:31:32.826286 00580000 ################################################################
2074 11:31:32.826420
2075 11:31:33.356468 00600000 ################################################################
2076 11:31:33.356619
2077 11:31:33.889983 00680000 ################################################################
2078 11:31:33.890118
2079 11:31:34.419872 00700000 ################################################################
2080 11:31:34.420008
2081 11:31:34.945674 00780000 ################################################################
2082 11:31:34.945819
2083 11:31:35.454177 00800000 ################################################################
2084 11:31:35.454362
2085 11:31:35.907397 00880000 ######################################################### done.
2086 11:31:35.907561
2087 11:31:35.910669 The bootfile was 9375632 bytes long.
2088 11:31:35.910769
2089 11:31:35.913851 Sending tftp read request... done.
2090 11:31:35.913945
2091 11:31:36.016790 Waiting for the transfer...
2092 11:31:36.016938
2093 11:31:36.531655 00000000 ################################################################
2094 11:31:36.531831
2095 11:31:37.062333 00080000 ################################################################
2096 11:31:37.062491
2097 11:31:37.589847 00100000 ################################################################
2098 11:31:37.589985
2099 11:31:38.122876 00180000 ################################################################
2100 11:31:38.123014
2101 11:31:38.649725 00200000 ################################################################
2102 11:31:38.649883
2103 11:31:39.178369 00280000 ################################################################
2104 11:31:39.178503
2105 11:31:39.696113 00300000 ################################################################
2106 11:31:39.696250
2107 11:31:40.221357 00380000 ################################################################
2108 11:31:40.221495
2109 11:31:40.739454 00400000 ################################################################
2110 11:31:40.739598
2111 11:31:41.254864 00480000 ################################################################
2112 11:31:41.255001
2113 11:31:41.777050 00500000 ################################################################
2114 11:31:41.777210
2115 11:31:42.286675 00580000 ################################################################
2116 11:31:42.286827
2117 11:31:42.818315 00600000 ################################################################
2118 11:31:42.818472
2119 11:31:43.350210 00680000 ################################################################
2120 11:31:43.350368
2121 11:31:43.872835 00700000 ################################################################
2122 11:31:43.872999
2123 11:31:44.413983 00780000 ################################################################
2124 11:31:44.414141
2125 11:31:44.874171 00800000 ####################################################### done.
2126 11:31:44.874307
2127 11:31:44.877922 Sending tftp read request... done.
2128 11:31:44.878008
2129 11:31:44.881132 Waiting for the transfer...
2130 11:31:44.881216
2131 11:31:44.881282 00000000 # done.
2132 11:31:44.881346
2133 11:31:44.890640 Command line loaded dynamically from TFTP file: 13086407/tftp-deploy-2uxwlu71/kernel/cmdline
2134 11:31:44.890757
2135 11:31:44.911014 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2136 11:31:44.911135
2137 11:31:44.914081 ec_init(0): CrosEC protocol v3 supported (256, 256)
2138 11:31:44.921129
2139 11:31:44.924713 Shutting down all USB controllers.
2140 11:31:44.924816
2141 11:31:44.924910 Removing current net device
2142 11:31:44.928831
2143 11:31:44.928932 Finalizing coreboot
2144 11:31:44.929024
2145 11:31:44.934986 Exiting depthcharge with code 4 at timestamp: 28596334
2146 11:31:44.935092
2147 11:31:44.935186
2148 11:31:44.935278 Starting kernel ...
2149 11:31:44.935365
2150 11:31:44.935441
2151 11:31:44.936055 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2152 11:31:44.936181 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2153 11:31:44.936295 Setting prompt string to ['Linux version [0-9]']
2154 11:31:44.936395 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2155 11:31:44.936495 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2157 11:36:05.936456 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2159 11:36:05.936658 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2161 11:36:05.936819 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2164 11:36:05.937102 end: 2 depthcharge-action (duration 00:05:00) [common]
2166 11:36:05.937324 Cleaning after the job
2167 11:36:05.937411 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086407/tftp-deploy-2uxwlu71/ramdisk
2168 11:36:05.938804 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086407/tftp-deploy-2uxwlu71/kernel
2169 11:36:05.940441 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086407/tftp-deploy-2uxwlu71/modules
2170 11:36:05.940850 start: 5.1 power-off (timeout 00:00:30) [common]
2171 11:36:05.941021 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2172 11:36:06.017920 >> Command sent successfully.
2173 11:36:06.020345 Returned 0 in 0 seconds
2174 11:36:06.120741 end: 5.1 power-off (duration 00:00:00) [common]
2176 11:36:06.121074 start: 5.2 read-feedback (timeout 00:10:00) [common]
2177 11:36:06.121331 Listened to connection for namespace 'common' for up to 1s
2179 11:36:06.121701 Listened to connection for namespace 'common' for up to 1s
2180 11:36:07.122295 Finalising connection for namespace 'common'
2181 11:36:07.122498 Disconnecting from shell: Finalise
2182 11:36:07.122611
2183 11:36:07.222985 end: 5.2 read-feedback (duration 00:00:01) [common]
2184 11:36:07.223172 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13086407
2185 11:36:07.240672 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13086407
2186 11:36:07.240846 JobError: Your job cannot terminate cleanly.