Boot log: acer-cb317-1h-c3z6-dedede
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 11:28:02.956519 lava-dispatcher, installed at version: 2024.01
2 11:28:02.956736 start: 0 validate
3 11:28:02.956880 Start time: 2024-03-18 11:28:02.956872+00:00 (UTC)
4 11:28:02.957008 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:28:02.957137 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Finitrd.cpio.gz exists
6 11:28:03.217523 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:28:03.217711 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-3115-g0a25e06c1d85%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:28:03.485961 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:28:03.486688 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:28:06.608020 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:28:06.608802 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-3115-g0a25e06c1d85%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 11:28:07.613867 validate duration: 4.66
14 11:28:07.614153 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:28:07.614252 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:28:07.614337 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:28:07.614520 Not decompressing ramdisk as can be used compressed.
18 11:28:07.614605 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/initrd.cpio.gz
19 11:28:07.614667 saving as /var/lib/lava/dispatcher/tmp/13086420/tftp-deploy-noi6ha1g/ramdisk/initrd.cpio.gz
20 11:28:07.614729 total size: 5431448 (5 MB)
21 11:28:07.615776 progress 0 % (0 MB)
22 11:28:07.617424 progress 5 % (0 MB)
23 11:28:07.618979 progress 10 % (0 MB)
24 11:28:07.620401 progress 15 % (0 MB)
25 11:28:07.621989 progress 20 % (1 MB)
26 11:28:07.623479 progress 25 % (1 MB)
27 11:28:07.624916 progress 30 % (1 MB)
28 11:28:07.626527 progress 35 % (1 MB)
29 11:28:07.627928 progress 40 % (2 MB)
30 11:28:07.629335 progress 45 % (2 MB)
31 11:28:07.630868 progress 50 % (2 MB)
32 11:28:07.632432 progress 55 % (2 MB)
33 11:28:07.633832 progress 60 % (3 MB)
34 11:28:07.635314 progress 65 % (3 MB)
35 11:28:07.636927 progress 70 % (3 MB)
36 11:28:07.638315 progress 75 % (3 MB)
37 11:28:07.639839 progress 80 % (4 MB)
38 11:28:07.641306 progress 85 % (4 MB)
39 11:28:07.643013 progress 90 % (4 MB)
40 11:28:07.644480 progress 95 % (4 MB)
41 11:28:07.645896 progress 100 % (5 MB)
42 11:28:07.646141 5 MB downloaded in 0.03 s (164.90 MB/s)
43 11:28:07.646321 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:28:07.646611 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:28:07.646697 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:28:07.646783 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:28:07.646958 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-3115-g0a25e06c1d85/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 11:28:07.647029 saving as /var/lib/lava/dispatcher/tmp/13086420/tftp-deploy-noi6ha1g/kernel/bzImage
50 11:28:07.647089 total size: 9375632 (8 MB)
51 11:28:07.647148 No compression specified
52 11:28:07.648288 progress 0 % (0 MB)
53 11:28:07.650835 progress 5 % (0 MB)
54 11:28:07.653287 progress 10 % (0 MB)
55 11:28:07.656054 progress 15 % (1 MB)
56 11:28:07.658704 progress 20 % (1 MB)
57 11:28:07.661239 progress 25 % (2 MB)
58 11:28:07.663819 progress 30 % (2 MB)
59 11:28:07.666509 progress 35 % (3 MB)
60 11:28:07.669023 progress 40 % (3 MB)
61 11:28:07.671535 progress 45 % (4 MB)
62 11:28:07.674154 progress 50 % (4 MB)
63 11:28:07.676715 progress 55 % (4 MB)
64 11:28:07.679205 progress 60 % (5 MB)
65 11:28:07.681601 progress 65 % (5 MB)
66 11:28:07.684359 progress 70 % (6 MB)
67 11:28:07.686847 progress 75 % (6 MB)
68 11:28:07.689270 progress 80 % (7 MB)
69 11:28:07.691903 progress 85 % (7 MB)
70 11:28:07.694303 progress 90 % (8 MB)
71 11:28:07.696724 progress 95 % (8 MB)
72 11:28:07.699393 progress 100 % (8 MB)
73 11:28:07.699515 8 MB downloaded in 0.05 s (170.56 MB/s)
74 11:28:07.699663 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:28:07.699896 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:28:07.699982 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:28:07.700065 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:28:07.700203 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/full.rootfs.tar.xz
80 11:28:07.700270 saving as /var/lib/lava/dispatcher/tmp/13086420/tftp-deploy-noi6ha1g/nfsrootfs/full.rootfs.tar
81 11:28:07.700329 total size: 133429172 (127 MB)
82 11:28:07.700394 Using unxz to decompress xz
83 11:28:07.704682 progress 0 % (0 MB)
84 11:28:08.052391 progress 5 % (6 MB)
85 11:28:08.429371 progress 10 % (12 MB)
86 11:28:08.754133 progress 15 % (19 MB)
87 11:28:08.950361 progress 20 % (25 MB)
88 11:28:09.220093 progress 25 % (31 MB)
89 11:28:09.601660 progress 30 % (38 MB)
90 11:28:09.957142 progress 35 % (44 MB)
91 11:28:10.375649 progress 40 % (50 MB)
92 11:28:10.789266 progress 45 % (57 MB)
93 11:28:11.177375 progress 50 % (63 MB)
94 11:28:11.587432 progress 55 % (70 MB)
95 11:28:11.989786 progress 60 % (76 MB)
96 11:28:12.396245 progress 65 % (82 MB)
97 11:28:12.774905 progress 70 % (89 MB)
98 11:28:13.147360 progress 75 % (95 MB)
99 11:28:13.594642 progress 80 % (101 MB)
100 11:28:14.037427 progress 85 % (108 MB)
101 11:28:14.308033 progress 90 % (114 MB)
102 11:28:14.667187 progress 95 % (120 MB)
103 11:28:15.062784 progress 100 % (127 MB)
104 11:28:15.069124 127 MB downloaded in 7.37 s (17.27 MB/s)
105 11:28:15.069393 end: 1.3.1 http-download (duration 00:00:07) [common]
107 11:28:15.069661 end: 1.3 download-retry (duration 00:00:07) [common]
108 11:28:15.069750 start: 1.4 download-retry (timeout 00:09:53) [common]
109 11:28:15.069838 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 11:28:15.069990 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-3115-g0a25e06c1d85/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 11:28:15.070062 saving as /var/lib/lava/dispatcher/tmp/13086420/tftp-deploy-noi6ha1g/modules/modules.tar
112 11:28:15.070123 total size: 253492 (0 MB)
113 11:28:15.070186 Using unxz to decompress xz
114 11:28:15.074737 progress 12 % (0 MB)
115 11:28:15.075159 progress 25 % (0 MB)
116 11:28:15.075404 progress 38 % (0 MB)
117 11:28:15.076910 progress 51 % (0 MB)
118 11:28:15.078883 progress 64 % (0 MB)
119 11:28:15.080730 progress 77 % (0 MB)
120 11:28:15.082613 progress 90 % (0 MB)
121 11:28:15.084327 progress 100 % (0 MB)
122 11:28:15.089951 0 MB downloaded in 0.02 s (12.20 MB/s)
123 11:28:15.090191 end: 1.4.1 http-download (duration 00:00:00) [common]
125 11:28:15.090498 end: 1.4 download-retry (duration 00:00:00) [common]
126 11:28:15.090597 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 11:28:15.090693 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 11:28:17.339972 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/13086420/extract-nfsrootfs-jr1wqrh8
129 11:28:17.340172 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 11:28:17.340273 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 11:28:17.340444 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9
132 11:28:17.340576 makedir: /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin
133 11:28:17.340677 makedir: /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/tests
134 11:28:17.340774 makedir: /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/results
135 11:28:17.340874 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-add-keys
136 11:28:17.341015 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-add-sources
137 11:28:17.341158 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-background-process-start
138 11:28:17.341320 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-background-process-stop
139 11:28:17.341454 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-common-functions
140 11:28:17.341580 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-echo-ipv4
141 11:28:17.341705 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-install-packages
142 11:28:17.341828 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-installed-packages
143 11:28:17.341952 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-os-build
144 11:28:17.342076 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-probe-channel
145 11:28:17.342199 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-probe-ip
146 11:28:17.342323 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-target-ip
147 11:28:17.342501 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-target-mac
148 11:28:17.342643 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-target-storage
149 11:28:17.342788 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-test-case
150 11:28:17.342933 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-test-event
151 11:28:17.343074 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-test-feedback
152 11:28:17.343273 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-test-raise
153 11:28:17.343445 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-test-reference
154 11:28:17.343615 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-test-runner
155 11:28:17.343782 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-test-set
156 11:28:17.343924 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-test-shell
157 11:28:17.344068 Updating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-install-packages (oe)
158 11:28:17.359000 Updating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/bin/lava-installed-packages (oe)
159 11:28:17.359162 Creating /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/environment
160 11:28:17.359283 LAVA metadata
161 11:28:17.359364 - LAVA_JOB_ID=13086420
162 11:28:17.359443 - LAVA_DISPATCHER_IP=192.168.201.1
163 11:28:17.359574 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 11:28:17.359648 skipped lava-vland-overlay
165 11:28:17.359748 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 11:28:17.359870 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 11:28:17.359964 skipped lava-multinode-overlay
168 11:28:17.360083 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 11:28:17.360208 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 11:28:17.360321 Loading test definitions
171 11:28:17.360452 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 11:28:17.360558 Using /lava-13086420 at stage 0
173 11:28:17.360995 uuid=13086420_1.5.2.3.1 testdef=None
174 11:28:17.361119 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 11:28:17.361242 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 11:28:17.361972 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 11:28:17.362334 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 11:28:17.363290 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 11:28:17.363569 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 11:28:17.390360 runner path: /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/0/tests/0_dmesg test_uuid 13086420_1.5.2.3.1
183 11:28:17.390596 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 11:28:17.390863 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 11:28:17.390946 Using /lava-13086420 at stage 1
187 11:28:17.391285 uuid=13086420_1.5.2.3.5 testdef=None
188 11:28:17.391381 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 11:28:17.391479 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 11:28:17.392179 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 11:28:17.392534 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 11:28:17.393161 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 11:28:17.393381 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 11:28:17.402062 runner path: /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/1/tests/1_bootrr test_uuid 13086420_1.5.2.3.5
197 11:28:17.402226 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 11:28:17.402472 Creating lava-test-runner.conf files
200 11:28:17.402534 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/0 for stage 0
201 11:28:17.402627 - 0_dmesg
202 11:28:17.402708 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13086420/lava-overlay-qc4f7oc9/lava-13086420/1 for stage 1
203 11:28:17.402845 - 1_bootrr
204 11:28:17.402970 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 11:28:17.403068 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 11:28:17.410579 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 11:28:17.410684 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 11:28:17.410768 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 11:28:17.410860 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 11:28:17.410943 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 11:28:17.550670 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 11:28:17.551071 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 11:28:17.551189 extracting modules file /var/lib/lava/dispatcher/tmp/13086420/tftp-deploy-noi6ha1g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13086420/extract-nfsrootfs-jr1wqrh8
214 11:28:17.565033 extracting modules file /var/lib/lava/dispatcher/tmp/13086420/tftp-deploy-noi6ha1g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13086420/extract-overlay-ramdisk-tcn0h6el/ramdisk
215 11:28:17.578907 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 11:28:17.579039 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 11:28:17.579123 [common] Applying overlay to NFS
218 11:28:17.579189 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13086420/compress-overlay-6sc0_lor/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13086420/extract-nfsrootfs-jr1wqrh8
219 11:28:17.587258 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 11:28:17.587366 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 11:28:17.587456 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 11:28:17.587543 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 11:28:17.587621 Building ramdisk /var/lib/lava/dispatcher/tmp/13086420/extract-overlay-ramdisk-tcn0h6el/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13086420/extract-overlay-ramdisk-tcn0h6el/ramdisk
224 11:28:17.658593 >> 26189 blocks
225 11:28:18.200346 rename /var/lib/lava/dispatcher/tmp/13086420/extract-overlay-ramdisk-tcn0h6el/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13086420/tftp-deploy-noi6ha1g/ramdisk/ramdisk.cpio.gz
226 11:28:18.200796 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 11:28:18.200927 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
228 11:28:18.201028 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
229 11:28:18.201126 No mkimage arch provided, not using FIT.
230 11:28:18.201218 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 11:28:18.201302 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 11:28:18.201402 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 11:28:18.201488 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
234 11:28:18.201566 No LXC device requested
235 11:28:18.201641 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 11:28:18.201729 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
237 11:28:18.201813 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 11:28:18.201887 Checking files for TFTP limit of 4294967296 bytes.
239 11:28:18.202294 end: 1 tftp-deploy (duration 00:00:11) [common]
240 11:28:18.202399 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 11:28:18.202534 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 11:28:18.202662 substitutions:
243 11:28:18.202727 - {DTB}: None
244 11:28:18.202788 - {INITRD}: 13086420/tftp-deploy-noi6ha1g/ramdisk/ramdisk.cpio.gz
245 11:28:18.202845 - {KERNEL}: 13086420/tftp-deploy-noi6ha1g/kernel/bzImage
246 11:28:18.202901 - {LAVA_MAC}: None
247 11:28:18.202955 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/13086420/extract-nfsrootfs-jr1wqrh8
248 11:28:18.203007 - {NFS_SERVER_IP}: 192.168.201.1
249 11:28:18.203060 - {PRESEED_CONFIG}: None
250 11:28:18.203112 - {PRESEED_LOCAL}: None
251 11:28:18.203163 - {RAMDISK}: 13086420/tftp-deploy-noi6ha1g/ramdisk/ramdisk.cpio.gz
252 11:28:18.203215 - {ROOT_PART}: None
253 11:28:18.203266 - {ROOT}: None
254 11:28:18.203317 - {SERVER_IP}: 192.168.201.1
255 11:28:18.203369 - {TEE}: None
256 11:28:18.203420 Parsed boot commands:
257 11:28:18.203471 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 11:28:18.203641 Parsed boot commands: tftpboot 192.168.201.1 13086420/tftp-deploy-noi6ha1g/kernel/bzImage 13086420/tftp-deploy-noi6ha1g/kernel/cmdline 13086420/tftp-deploy-noi6ha1g/ramdisk/ramdisk.cpio.gz
259 11:28:18.203728 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 11:28:18.203815 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 11:28:18.203903 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 11:28:18.203987 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 11:28:18.204057 Not connected, no need to disconnect.
264 11:28:18.204130 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 11:28:18.204210 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 11:28:18.204278 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-3'
267 11:28:18.208584 Setting prompt string to ['lava-test: # ']
268 11:28:18.208944 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 11:28:18.209050 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 11:28:18.209144 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 11:28:18.209233 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 11:28:18.209441 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-3' '--port=1' '--command=reboot'
273 11:28:23.340096 >> Command sent successfully.
274 11:28:23.342587 Returned 0 in 5 seconds
275 11:28:23.442997 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 11:28:23.443327 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 11:28:23.443428 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 11:28:23.443513 Setting prompt string to 'Starting depthcharge on Magolor...'
280 11:28:23.443583 Changing prompt to 'Starting depthcharge on Magolor...'
281 11:28:23.443651 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
282 11:28:23.443922 [Enter `^Ec?' for help]
283 11:28:24.615107
284 11:28:24.615267
285 11:28:24.625767 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
286 11:28:24.628893 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
287 11:28:24.632116 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
288 11:28:24.638894 CPU: AES supported, TXT NOT supported, VT supported
289 11:28:24.642362 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
290 11:28:24.648629 PCH: device id 4d87 (rev 01) is Jasperlake Super
291 11:28:24.651928 IGD: device id 4e55 (rev 01) is Jasperlake GT4
292 11:28:24.655598 VBOOT: Loading verstage.
293 11:28:24.662690 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 11:28:24.665798 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
295 11:28:24.673086 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 11:28:24.676568 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
297 11:28:24.676656
298 11:28:24.679995
299 11:28:24.689377 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
300 11:28:24.703965 Probing TPM: . done!
301 11:28:24.706989 TPM ready after 0 ms
302 11:28:24.710337 Connected to device vid:did:rid of 1ae0:0028:00
303 11:28:24.721826 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
304 11:28:24.728114 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
305 11:28:24.731911 Initialized TPM device CR50 revision 0
306 11:28:24.789970 tlcl_send_startup: Startup return code is 0
307 11:28:24.790071 TPM: setup succeeded
308 11:28:24.804466 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
309 11:28:24.819742 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
310 11:28:24.835122 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
311 11:28:24.843285 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
312 11:28:24.846735 Chrome EC: UHEPI supported
313 11:28:24.850105 Phase 1
314 11:28:24.853177 FMAP: area GBB found @ c05000 (12288 bytes)
315 11:28:24.860865 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
316 11:28:24.867869 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
317 11:28:24.870628 Recovery requested (1009000e)
318 11:28:24.874523 TPM: Extending digest for VBOOT: boot mode into PCR 0
319 11:28:24.885742 tlcl_extend: response is 0
320 11:28:24.892237 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
321 11:28:24.901814 tlcl_extend: response is 0
322 11:28:24.908347 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
323 11:28:24.912113 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
324 11:28:24.919472 BS: verstage times (exec / console): total (unknown) / 124 ms
325 11:28:24.919558
326 11:28:24.919624
327 11:28:24.929843 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
328 11:28:24.936641 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
329 11:28:24.943396 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
330 11:28:24.946538 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
331 11:28:24.949694 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
332 11:28:24.956198 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
333 11:28:24.959730 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
334 11:28:24.962681 TCO_STS: 0000 0001
335 11:28:24.962765 GEN_PMCON: d0015038 00002200
336 11:28:24.966154 GBLRST_CAUSE: 00000000 00000000
337 11:28:24.969924 prev_sleep_state 5
338 11:28:24.972690 Boot Count incremented to 10134
339 11:28:24.979547 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
340 11:28:24.982631 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
341 11:28:24.986425 Chrome EC: UHEPI supported
342 11:28:24.993296 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
343 11:28:24.999543 Probing TPM: done!
344 11:28:25.006632 Connected to device vid:did:rid of 1ae0:0028:00
345 11:28:25.015886 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
346 11:28:25.027260 Initialized TPM device CR50 revision 0
347 11:28:25.038329 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 11:28:25.044864 MRC: Hash idx 0x100b comparison successful.
349 11:28:25.044952 MRC cache found, size 5458
350 11:28:25.048479 bootmode is set to: 2
351 11:28:25.051360 SPD INDEX = 0
352 11:28:25.055121 CBFS: Found 'spd.bin' @0x40c40 size 0x600
353 11:28:25.058226 SPD: module type is LPDDR4X
354 11:28:25.064866 SPD: module part number is MT53E512M32D2NP-046 WT:E
355 11:28:25.067979 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
356 11:28:25.074632 SPD: device width 16 bits, bus width 32 bits
357 11:28:25.078357 SPD: module size is 4096 MB (per channel)
358 11:28:25.081230 meminit_channels: DRAM half-populated
359 11:28:25.164054 CBMEM:
360 11:28:25.167174 IMD: root @ 0x76fff000 254 entries.
361 11:28:25.170556 IMD: root @ 0x76ffec00 62 entries.
362 11:28:25.173716 FMAP: area RO_VPD found @ c00000 (16384 bytes)
363 11:28:25.180711 WARNING: RO_VPD is uninitialized or empty.
364 11:28:25.184045 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
365 11:28:25.187716 External stage cache:
366 11:28:25.190759 IMD: root @ 0x7b3ff000 254 entries.
367 11:28:25.194269 IMD: root @ 0x7b3fec00 62 entries.
368 11:28:25.203779 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
369 11:28:25.210720 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
370 11:28:25.217336 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
371 11:28:25.225452 MRC: 'RECOVERY_MRC_CACHE' does not need update.
372 11:28:25.231966 cse_lite: Skip switching to RW in the recovery path
373 11:28:25.232050 1 DIMMs found
374 11:28:25.232122 SMM Memory Map
375 11:28:25.235542 SMRAM : 0x7b000000 0x800000
376 11:28:25.242465 Subregion 0: 0x7b000000 0x200000
377 11:28:25.245447 Subregion 1: 0x7b200000 0x200000
378 11:28:25.248597 Subregion 2: 0x7b400000 0x400000
379 11:28:25.248680 top_of_ram = 0x77000000
380 11:28:25.255444 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
381 11:28:25.261920 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
382 11:28:25.265164 MTRR Range: Start=ff000000 End=0 (Size 1000000)
383 11:28:25.272096 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
384 11:28:25.278364 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
385 11:28:25.288284 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
386 11:28:25.291617 Processing 188 relocs. Offset value of 0x74c0e000
387 11:28:25.300678 BS: romstage times (exec / console): total (unknown) / 255 ms
388 11:28:25.305326
389 11:28:25.305408
390 11:28:25.315324 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
391 11:28:25.318792 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 11:28:25.325837 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
393 11:28:25.331839 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
394 11:28:25.387777 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
395 11:28:25.394276 Processing 4805 relocs. Offset value of 0x75da8000
396 11:28:25.397953 BS: postcar times (exec / console): total (unknown) / 42 ms
397 11:28:25.400849
398 11:28:25.400932
399 11:28:25.410952 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
400 11:28:25.411037 Normal boot
401 11:28:25.414707 EC returned error result code 3
402 11:28:25.418258 FW_CONFIG value is 0x204
403 11:28:25.421340 GENERIC: 0.0 disabled by fw_config
404 11:28:25.428250 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
405 11:28:25.430981 I2C: 00:10 disabled by fw_config
406 11:28:25.434508 I2C: 00:10 disabled by fw_config
407 11:28:25.437768 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
408 11:28:25.444576 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
409 11:28:25.447688 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
410 11:28:25.454584 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
411 11:28:25.457698 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
412 11:28:25.461117 I2C: 00:10 disabled by fw_config
413 11:28:25.468090 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
414 11:28:25.474025 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
415 11:28:25.477663 I2C: 00:1a disabled by fw_config
416 11:28:25.480719 I2C: 00:1a disabled by fw_config
417 11:28:25.487389 fw_config match found: AUDIO_AMP=UNPROVISIONED
418 11:28:25.491094 fw_config match found: AUDIO_AMP=UNPROVISIONED
419 11:28:25.494241 GENERIC: 0.0 disabled by fw_config
420 11:28:25.500474 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
421 11:28:25.503794 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
422 11:28:25.510702 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
423 11:28:25.514241 microcode: Update skipped, already up-to-date
424 11:28:25.520345 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
425 11:28:25.547143 Detected 2 core, 2 thread CPU.
426 11:28:25.549585 Setting up SMI for CPU
427 11:28:25.553186 IED base = 0x7b400000
428 11:28:25.553269 IED size = 0x00400000
429 11:28:25.556553 Will perform SMM setup.
430 11:28:25.559741 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
431 11:28:25.569764 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
432 11:28:25.573159 Processing 16 relocs. Offset value of 0x00030000
433 11:28:25.576890 Attempting to start 1 APs
434 11:28:25.580014 Waiting for 10ms after sending INIT.
435 11:28:25.596774 Waiting for 1st SIPI to complete...done.
436 11:28:25.596869 AP: slot 1 apic_id 2.
437 11:28:25.602892 Waiting for 2nd SIPI to complete...done.
438 11:28:25.609872 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
439 11:28:25.616097 Processing 13 relocs. Offset value of 0x00038000
440 11:28:25.616191 Unable to locate Global NVS
441 11:28:25.626777 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
442 11:28:25.629370 Installing permanent SMM handler to 0x7b000000
443 11:28:25.639636 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
444 11:28:25.642432 Processing 704 relocs. Offset value of 0x7b010000
445 11:28:25.652850 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
446 11:28:25.655793 Processing 13 relocs. Offset value of 0x7b008000
447 11:28:25.663005 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
448 11:28:25.665611 Unable to locate Global NVS
449 11:28:25.672316 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
450 11:28:25.675778 Clearing SMI status registers
451 11:28:25.675878 SMI_STS: PM1
452 11:28:25.679290 PM1_STS: PWRBTN
453 11:28:25.679379 TCO_STS: INTRD_DET
454 11:28:25.689272 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
455 11:28:25.689359 In relocation handler: CPU 0
456 11:28:25.695736 New SMBASE=0x7b000000 IEDBASE=0x7b400000
457 11:28:25.699506 Writing SMRR. base = 0x7b000006, mask=0xff800800
458 11:28:25.703016 Relocation complete.
459 11:28:25.709855 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
460 11:28:25.713343 In relocation handler: CPU 1
461 11:28:25.716908 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
462 11:28:25.720366 Writing SMRR. base = 0x7b000006, mask=0xff800800
463 11:28:25.723597 Relocation complete.
464 11:28:25.726469 Initializing CPU #0
465 11:28:25.729741 CPU: vendor Intel device 906c0
466 11:28:25.733215 CPU: family 06, model 9c, stepping 00
467 11:28:25.736654 Clearing out pending MCEs
468 11:28:25.736737 Setting up local APIC...
469 11:28:25.739921 apic_id: 0x00 done.
470 11:28:25.743092 Turbo is available but hidden
471 11:28:25.746586 Turbo is available and visible
472 11:28:25.750126 microcode: Update skipped, already up-to-date
473 11:28:25.753066 CPU #0 initialized
474 11:28:25.753149 Initializing CPU #1
475 11:28:25.756521 CPU: vendor Intel device 906c0
476 11:28:25.763110 CPU: family 06, model 9c, stepping 00
477 11:28:25.763194 Clearing out pending MCEs
478 11:28:25.766544 Setting up local APIC...
479 11:28:25.769654 apic_id: 0x02 done.
480 11:28:25.773067 microcode: Update skipped, already up-to-date
481 11:28:25.776306 CPU #1 initialized
482 11:28:25.779544 bsp_do_flight_plan done after 173 msecs.
483 11:28:25.782719 CPU: frequency set to 2800 MHz
484 11:28:25.782802 Enabling SMIs.
485 11:28:25.789820 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 287 ms
486 11:28:25.800808 Probing TPM: done!
487 11:28:25.807599 Connected to device vid:did:rid of 1ae0:0028:00
488 11:28:25.817176 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
489 11:28:25.821026 Initialized TPM device CR50 revision 0
490 11:28:25.823989 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
491 11:28:25.830653 Found a VBT of 7680 bytes after decompression
492 11:28:25.837872 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
493 11:28:25.873173 Detected 2 core, 2 thread CPU.
494 11:28:25.876309 Detected 2 core, 2 thread CPU.
495 11:28:26.238047 Display FSP Version Info HOB
496 11:28:26.241211 Reference Code - CPU = 8.7.22.30
497 11:28:26.244807 uCode Version = 24.0.0.1f
498 11:28:26.248117 TXT ACM version = ff.ff.ff.ffff
499 11:28:26.251624 Reference Code - ME = 8.7.22.30
500 11:28:26.254683 MEBx version = 0.0.0.0
501 11:28:26.258037 ME Firmware Version = Consumer SKU
502 11:28:26.261226 Reference Code - PCH = 8.7.22.30
503 11:28:26.264708 PCH-CRID Status = Disabled
504 11:28:26.267486 PCH-CRID Original Value = ff.ff.ff.ffff
505 11:28:26.271168 PCH-CRID New Value = ff.ff.ff.ffff
506 11:28:26.274608 OPROM - RST - RAID = ff.ff.ff.ffff
507 11:28:26.277913 PCH Hsio Version = 4.0.0.0
508 11:28:26.281545 Reference Code - SA - System Agent = 8.7.22.30
509 11:28:26.285731 Reference Code - MRC = 0.0.4.68
510 11:28:26.289105 SA - PCIe Version = 8.7.22.30
511 11:28:26.292638 SA-CRID Status = Disabled
512 11:28:26.296093 SA-CRID Original Value = 0.0.0.0
513 11:28:26.296451 SA-CRID New Value = 0.0.0.0
514 11:28:26.299992 OPROM - VBIOS = ff.ff.ff.ffff
515 11:28:26.306581 IO Manageability Engine FW Version = ff.ff.ff.ffff
516 11:28:26.309683 PHY Build Version = ff.ff.ff.ffff
517 11:28:26.313424 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
518 11:28:26.319324 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
519 11:28:26.322745 ITSS IRQ Polarities Before:
520 11:28:26.323145 IPC0: 0xffffffff
521 11:28:26.326257 IPC1: 0xffffffff
522 11:28:26.326818 IPC2: 0xffffffff
523 11:28:26.329528 IPC3: 0xffffffff
524 11:28:26.332736 ITSS IRQ Polarities After:
525 11:28:26.333106 IPC0: 0xffffffff
526 11:28:26.335842 IPC1: 0xffffffff
527 11:28:26.336170 IPC2: 0xffffffff
528 11:28:26.339955 IPC3: 0xffffffff
529 11:28:26.349522 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
530 11:28:26.355915 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
531 11:28:26.359690 Enumerating buses...
532 11:28:26.362489 Show all devs... Before device enumeration.
533 11:28:26.366014 Root Device: enabled 1
534 11:28:26.369427 CPU_CLUSTER: 0: enabled 1
535 11:28:26.369940 DOMAIN: 0000: enabled 1
536 11:28:26.372636 PCI: 00:00.0: enabled 1
537 11:28:26.376062 PCI: 00:02.0: enabled 1
538 11:28:26.379181 PCI: 00:04.0: enabled 1
539 11:28:26.379587 PCI: 00:05.0: enabled 1
540 11:28:26.382298 PCI: 00:09.0: enabled 0
541 11:28:26.385870 PCI: 00:12.6: enabled 0
542 11:28:26.389117 PCI: 00:14.0: enabled 1
543 11:28:26.389516 PCI: 00:14.1: enabled 0
544 11:28:26.392440 PCI: 00:14.2: enabled 0
545 11:28:26.395542 PCI: 00:14.3: enabled 1
546 11:28:26.399074 PCI: 00:14.5: enabled 1
547 11:28:26.399546 PCI: 00:15.0: enabled 1
548 11:28:26.402559 PCI: 00:15.1: enabled 1
549 11:28:26.405814 PCI: 00:15.2: enabled 1
550 11:28:26.409027 PCI: 00:15.3: enabled 1
551 11:28:26.409400 PCI: 00:16.0: enabled 1
552 11:28:26.412612 PCI: 00:16.1: enabled 0
553 11:28:26.415952 PCI: 00:16.4: enabled 0
554 11:28:26.416342 PCI: 00:16.5: enabled 0
555 11:28:26.419020 PCI: 00:17.0: enabled 0
556 11:28:26.422288 PCI: 00:19.0: enabled 1
557 11:28:26.426123 PCI: 00:19.1: enabled 0
558 11:28:26.426749 PCI: 00:19.2: enabled 1
559 11:28:26.428754 PCI: 00:1a.0: enabled 1
560 11:28:26.432202 PCI: 00:1c.0: enabled 0
561 11:28:26.435518 PCI: 00:1c.1: enabled 0
562 11:28:26.435991 PCI: 00:1c.2: enabled 0
563 11:28:26.438649 PCI: 00:1c.3: enabled 0
564 11:28:26.442215 PCI: 00:1c.4: enabled 0
565 11:28:26.445553 PCI: 00:1c.5: enabled 0
566 11:28:26.445923 PCI: 00:1c.6: enabled 0
567 11:28:26.448888 PCI: 00:1c.7: enabled 1
568 11:28:26.451760 PCI: 00:1e.0: enabled 0
569 11:28:26.452125 PCI: 00:1e.1: enabled 0
570 11:28:26.455348 PCI: 00:1e.2: enabled 1
571 11:28:26.458970 PCI: 00:1e.3: enabled 0
572 11:28:26.462164 PCI: 00:1f.0: enabled 1
573 11:28:26.462589 PCI: 00:1f.1: enabled 1
574 11:28:26.465066 PCI: 00:1f.2: enabled 1
575 11:28:26.469227 PCI: 00:1f.3: enabled 1
576 11:28:26.471984 PCI: 00:1f.4: enabled 0
577 11:28:26.472371 PCI: 00:1f.5: enabled 1
578 11:28:26.475462 PCI: 00:1f.7: enabled 0
579 11:28:26.478728 GENERIC: 0.0: enabled 1
580 11:28:26.482088 GENERIC: 0.0: enabled 1
581 11:28:26.482654 USB0 port 0: enabled 1
582 11:28:26.485211 GENERIC: 0.0: enabled 1
583 11:28:26.488242 I2C: 00:2c: enabled 1
584 11:28:26.488634 I2C: 00:15: enabled 1
585 11:28:26.491830 GENERIC: 0.0: enabled 0
586 11:28:26.495045 I2C: 00:15: enabled 1
587 11:28:26.495439 I2C: 00:10: enabled 0
588 11:28:26.498485 I2C: 00:10: enabled 0
589 11:28:26.501766 I2C: 00:2c: enabled 1
590 11:28:26.502154 I2C: 00:40: enabled 1
591 11:28:26.505388 I2C: 00:10: enabled 1
592 11:28:26.508851 I2C: 00:39: enabled 1
593 11:28:26.509350 I2C: 00:36: enabled 1
594 11:28:26.511873 I2C: 00:10: enabled 0
595 11:28:26.515013 I2C: 00:0c: enabled 1
596 11:28:26.515620 I2C: 00:50: enabled 1
597 11:28:26.518213 I2C: 00:1a: enabled 1
598 11:28:26.521488 I2C: 00:1a: enabled 0
599 11:28:26.525053 I2C: 00:1a: enabled 0
600 11:28:26.525468 I2C: 00:28: enabled 1
601 11:28:26.527971 I2C: 00:29: enabled 1
602 11:28:26.531563 PCI: 00:00.0: enabled 1
603 11:28:26.531955 SPI: 00: enabled 1
604 11:28:26.534972 PNP: 0c09.0: enabled 1
605 11:28:26.538482 GENERIC: 0.0: enabled 0
606 11:28:26.538907 USB2 port 0: enabled 1
607 11:28:26.541807 USB2 port 1: enabled 1
608 11:28:26.544950 USB2 port 2: enabled 1
609 11:28:26.545345 USB2 port 3: enabled 1
610 11:28:26.548694 USB2 port 4: enabled 0
611 11:28:26.551591 USB2 port 5: enabled 1
612 11:28:26.554573 USB2 port 6: enabled 0
613 11:28:26.555133 USB2 port 7: enabled 1
614 11:28:26.558095 USB3 port 0: enabled 1
615 11:28:26.561441 USB3 port 1: enabled 1
616 11:28:26.561834 USB3 port 2: enabled 1
617 11:28:26.564483 USB3 port 3: enabled 1
618 11:28:26.568298 APIC: 00: enabled 1
619 11:28:26.568865 APIC: 02: enabled 1
620 11:28:26.571389 Compare with tree...
621 11:28:26.575248 Root Device: enabled 1
622 11:28:26.575649 CPU_CLUSTER: 0: enabled 1
623 11:28:26.577883 APIC: 00: enabled 1
624 11:28:26.580824 APIC: 02: enabled 1
625 11:28:26.584271 DOMAIN: 0000: enabled 1
626 11:28:26.584662 PCI: 00:00.0: enabled 1
627 11:28:26.587951 PCI: 00:02.0: enabled 1
628 11:28:26.591201 PCI: 00:04.0: enabled 1
629 11:28:26.594375 GENERIC: 0.0: enabled 1
630 11:28:26.597998 PCI: 00:05.0: enabled 1
631 11:28:26.598384 GENERIC: 0.0: enabled 1
632 11:28:26.601265 PCI: 00:09.0: enabled 0
633 11:28:26.604569 PCI: 00:12.6: enabled 0
634 11:28:26.607892 PCI: 00:14.0: enabled 1
635 11:28:26.611193 USB0 port 0: enabled 1
636 11:28:26.611583 USB2 port 0: enabled 1
637 11:28:26.614481 USB2 port 1: enabled 1
638 11:28:26.618000 USB2 port 2: enabled 1
639 11:28:26.620883 USB2 port 3: enabled 1
640 11:28:26.624185 USB2 port 4: enabled 0
641 11:28:26.627655 USB2 port 5: enabled 1
642 11:28:26.628043 USB2 port 6: enabled 0
643 11:28:26.631150 USB2 port 7: enabled 1
644 11:28:26.634025 USB3 port 0: enabled 1
645 11:28:26.637575 USB3 port 1: enabled 1
646 11:28:26.641166 USB3 port 2: enabled 1
647 11:28:26.641554 USB3 port 3: enabled 1
648 11:28:26.644044 PCI: 00:14.1: enabled 0
649 11:28:26.647544 PCI: 00:14.2: enabled 0
650 11:28:26.651025 PCI: 00:14.3: enabled 1
651 11:28:26.653847 GENERIC: 0.0: enabled 1
652 11:28:26.654235 PCI: 00:14.5: enabled 1
653 11:28:26.657321 PCI: 00:15.0: enabled 1
654 11:28:26.660653 I2C: 00:2c: enabled 1
655 11:28:26.663736 I2C: 00:15: enabled 1
656 11:28:26.667378 PCI: 00:15.1: enabled 1
657 11:28:26.667735 PCI: 00:15.2: enabled 1
658 11:28:26.670490 GENERIC: 0.0: enabled 0
659 11:28:26.673811 I2C: 00:15: enabled 1
660 11:28:26.677427 I2C: 00:10: enabled 0
661 11:28:26.677929 I2C: 00:10: enabled 0
662 11:28:26.680853 I2C: 00:2c: enabled 1
663 11:28:26.683876 I2C: 00:40: enabled 1
664 11:28:26.687323 I2C: 00:10: enabled 1
665 11:28:26.690296 I2C: 00:39: enabled 1
666 11:28:26.690693 PCI: 00:15.3: enabled 1
667 11:28:26.693788 I2C: 00:36: enabled 1
668 11:28:26.697109 I2C: 00:10: enabled 0
669 11:28:26.700051 I2C: 00:0c: enabled 1
670 11:28:26.700405 I2C: 00:50: enabled 1
671 11:28:26.703432 PCI: 00:16.0: enabled 1
672 11:28:26.707184 PCI: 00:16.1: enabled 0
673 11:28:26.710111 PCI: 00:16.4: enabled 0
674 11:28:26.713818 PCI: 00:16.5: enabled 0
675 11:28:26.714176 PCI: 00:17.0: enabled 0
676 11:28:26.716655 PCI: 00:19.0: enabled 1
677 11:28:26.719994 I2C: 00:1a: enabled 1
678 11:28:26.723201 I2C: 00:1a: enabled 0
679 11:28:26.723573 I2C: 00:1a: enabled 0
680 11:28:26.726723 I2C: 00:28: enabled 1
681 11:28:26.729977 I2C: 00:29: enabled 1
682 11:28:26.733341 PCI: 00:19.1: enabled 0
683 11:28:26.736545 PCI: 00:19.2: enabled 1
684 11:28:26.736935 PCI: 00:1a.0: enabled 1
685 11:28:26.740051 PCI: 00:1e.0: enabled 0
686 11:28:26.743061 PCI: 00:1e.1: enabled 0
687 11:28:26.746483 PCI: 00:1e.2: enabled 1
688 11:28:26.746841 SPI: 00: enabled 1
689 11:28:26.749998 PCI: 00:1e.3: enabled 0
690 11:28:26.752927 PCI: 00:1f.0: enabled 1
691 11:28:26.756538 PNP: 0c09.0: enabled 1
692 11:28:26.759783 PCI: 00:1f.1: enabled 1
693 11:28:26.760284 PCI: 00:1f.2: enabled 1
694 11:28:26.763127 PCI: 00:1f.3: enabled 1
695 11:28:26.766284 GENERIC: 0.0: enabled 0
696 11:28:26.769741 PCI: 00:1f.4: enabled 0
697 11:28:26.772884 PCI: 00:1f.5: enabled 1
698 11:28:26.773331 PCI: 00:1f.7: enabled 0
699 11:28:26.776779 Root Device scanning...
700 11:28:26.779277 scan_static_bus for Root Device
701 11:28:26.782540 CPU_CLUSTER: 0 enabled
702 11:28:26.786166 DOMAIN: 0000 enabled
703 11:28:26.786588 DOMAIN: 0000 scanning...
704 11:28:26.789310 PCI: pci_scan_bus for bus 00
705 11:28:26.792750 PCI: 00:00.0 [8086/0000] ops
706 11:28:26.796192 PCI: 00:00.0 [8086/4e22] enabled
707 11:28:26.799294 PCI: 00:02.0 [8086/0000] bus ops
708 11:28:26.802531 PCI: 00:02.0 [8086/4e55] enabled
709 11:28:26.805834 PCI: 00:04.0 [8086/0000] bus ops
710 11:28:26.809330 PCI: 00:04.0 [8086/4e03] enabled
711 11:28:26.812723 PCI: 00:05.0 [8086/0000] bus ops
712 11:28:26.816112 PCI: 00:05.0 [8086/4e19] enabled
713 11:28:26.819226 PCI: 00:08.0 [8086/4e11] enabled
714 11:28:26.822679 PCI: 00:14.0 [8086/0000] bus ops
715 11:28:26.826019 PCI: 00:14.0 [8086/4ded] enabled
716 11:28:26.829490 PCI: 00:14.2 [8086/4def] disabled
717 11:28:26.832452 PCI: 00:14.3 [8086/0000] bus ops
718 11:28:26.836018 PCI: 00:14.3 [8086/4df0] enabled
719 11:28:26.839328 PCI: 00:14.5 [8086/0000] ops
720 11:28:26.842226 PCI: 00:14.5 [8086/4df8] enabled
721 11:28:26.845537 PCI: 00:15.0 [8086/0000] bus ops
722 11:28:26.849240 PCI: 00:15.0 [8086/4de8] enabled
723 11:28:26.852222 PCI: 00:15.1 [8086/0000] bus ops
724 11:28:26.855646 PCI: 00:15.1 [8086/4de9] enabled
725 11:28:26.858770 PCI: 00:15.2 [8086/0000] bus ops
726 11:28:26.862298 PCI: 00:15.2 [8086/4dea] enabled
727 11:28:26.866000 PCI: 00:15.3 [8086/0000] bus ops
728 11:28:26.868744 PCI: 00:15.3 [8086/4deb] enabled
729 11:28:26.872199 PCI: 00:16.0 [8086/0000] ops
730 11:28:26.875754 PCI: 00:16.0 [8086/4de0] enabled
731 11:28:26.878899 PCI: 00:19.0 [8086/0000] bus ops
732 11:28:26.882185 PCI: 00:19.0 [8086/4dc5] enabled
733 11:28:26.885501 PCI: 00:19.2 [8086/0000] ops
734 11:28:26.888960 PCI: 00:19.2 [8086/4dc7] enabled
735 11:28:26.891919 PCI: 00:1a.0 [8086/0000] ops
736 11:28:26.895509 PCI: 00:1a.0 [8086/4dc4] enabled
737 11:28:26.898698 PCI: 00:1e.0 [8086/0000] ops
738 11:28:26.901971 PCI: 00:1e.0 [8086/4da8] disabled
739 11:28:26.905064 PCI: 00:1e.2 [8086/0000] bus ops
740 11:28:26.908341 PCI: 00:1e.2 [8086/4daa] enabled
741 11:28:26.911877 PCI: 00:1f.0 [8086/0000] bus ops
742 11:28:26.914858 PCI: 00:1f.0 [8086/4d87] enabled
743 11:28:26.918764 PCI: Static device PCI: 00:1f.1 not found, disabling it.
744 11:28:26.922012 RTC Init
745 11:28:26.924938 Set power on after power failure.
746 11:28:26.925331 Disabling Deep S3
747 11:28:26.928522 Disabling Deep S3
748 11:28:26.931519 Disabling Deep S4
749 11:28:26.931911 Disabling Deep S4
750 11:28:26.934940 Disabling Deep S5
751 11:28:26.935330 Disabling Deep S5
752 11:28:26.938500 PCI: 00:1f.2 [0000/0000] hidden
753 11:28:26.941768 PCI: 00:1f.3 [8086/0000] bus ops
754 11:28:26.945021 PCI: 00:1f.3 [8086/4dc8] enabled
755 11:28:26.948027 PCI: 00:1f.5 [8086/0000] bus ops
756 11:28:26.951817 PCI: 00:1f.5 [8086/4da4] enabled
757 11:28:26.954968 PCI: Leftover static devices:
758 11:28:26.958495 PCI: 00:12.6
759 11:28:26.958887 PCI: 00:09.0
760 11:28:26.959202 PCI: 00:14.1
761 11:28:26.962390 PCI: 00:16.1
762 11:28:26.962996 PCI: 00:16.4
763 11:28:26.963349 PCI: 00:16.5
764 11:28:26.966006 PCI: 00:17.0
765 11:28:26.966561 PCI: 00:19.1
766 11:28:26.966891 PCI: 00:1e.1
767 11:28:26.969595 PCI: 00:1e.3
768 11:28:26.969987 PCI: 00:1f.1
769 11:28:26.972873 PCI: 00:1f.4
770 11:28:26.973373 PCI: 00:1f.7
771 11:28:26.976414 PCI: Check your devicetree.cb.
772 11:28:26.979217 PCI: 00:02.0 scanning...
773 11:28:26.982655 scan_generic_bus for PCI: 00:02.0
774 11:28:26.985921 scan_generic_bus for PCI: 00:02.0 done
775 11:28:26.989506 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
776 11:28:26.992731 PCI: 00:04.0 scanning...
777 11:28:26.996142 scan_generic_bus for PCI: 00:04.0
778 11:28:26.999127 GENERIC: 0.0 enabled
779 11:28:27.005822 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
780 11:28:27.009384 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
781 11:28:27.012760 PCI: 00:05.0 scanning...
782 11:28:27.015849 scan_generic_bus for PCI: 00:05.0
783 11:28:27.018988 GENERIC: 0.0 enabled
784 11:28:27.025768 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
785 11:28:27.029229 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
786 11:28:27.032754 PCI: 00:14.0 scanning...
787 11:28:27.035870 scan_static_bus for PCI: 00:14.0
788 11:28:27.036403 USB0 port 0 enabled
789 11:28:27.039198 USB0 port 0 scanning...
790 11:28:27.042578 scan_static_bus for USB0 port 0
791 11:28:27.045560 USB2 port 0 enabled
792 11:28:27.045993 USB2 port 1 enabled
793 11:28:27.048981 USB2 port 2 enabled
794 11:28:27.052392 USB2 port 3 enabled
795 11:28:27.052930 USB2 port 4 disabled
796 11:28:27.055772 USB2 port 5 enabled
797 11:28:27.058538 USB2 port 6 disabled
798 11:28:27.058993 USB2 port 7 enabled
799 11:28:27.062016 USB3 port 0 enabled
800 11:28:27.062610 USB3 port 1 enabled
801 11:28:27.065497 USB3 port 2 enabled
802 11:28:27.068836 USB3 port 3 enabled
803 11:28:27.069385 USB2 port 0 scanning...
804 11:28:27.072378 scan_static_bus for USB2 port 0
805 11:28:27.078461 scan_static_bus for USB2 port 0 done
806 11:28:27.081852 scan_bus: bus USB2 port 0 finished in 6 msecs
807 11:28:27.085358 USB2 port 1 scanning...
808 11:28:27.088395 scan_static_bus for USB2 port 1
809 11:28:27.091774 scan_static_bus for USB2 port 1 done
810 11:28:27.094945 scan_bus: bus USB2 port 1 finished in 6 msecs
811 11:28:27.098535 USB2 port 2 scanning...
812 11:28:27.101932 scan_static_bus for USB2 port 2
813 11:28:27.105273 scan_static_bus for USB2 port 2 done
814 11:28:27.108646 scan_bus: bus USB2 port 2 finished in 6 msecs
815 11:28:27.111677 USB2 port 3 scanning...
816 11:28:27.115095 scan_static_bus for USB2 port 3
817 11:28:27.118517 scan_static_bus for USB2 port 3 done
818 11:28:27.125078 scan_bus: bus USB2 port 3 finished in 6 msecs
819 11:28:27.125509 USB2 port 5 scanning...
820 11:28:27.128528 scan_static_bus for USB2 port 5
821 11:28:27.134672 scan_static_bus for USB2 port 5 done
822 11:28:27.138079 scan_bus: bus USB2 port 5 finished in 6 msecs
823 11:28:27.141798 USB2 port 7 scanning...
824 11:28:27.145014 scan_static_bus for USB2 port 7
825 11:28:27.148221 scan_static_bus for USB2 port 7 done
826 11:28:27.151655 scan_bus: bus USB2 port 7 finished in 6 msecs
827 11:28:27.154963 USB3 port 0 scanning...
828 11:28:27.158202 scan_static_bus for USB3 port 0
829 11:28:27.161542 scan_static_bus for USB3 port 0 done
830 11:28:27.164524 scan_bus: bus USB3 port 0 finished in 6 msecs
831 11:28:27.167805 USB3 port 1 scanning...
832 11:28:27.171325 scan_static_bus for USB3 port 1
833 11:28:27.174515 scan_static_bus for USB3 port 1 done
834 11:28:27.181424 scan_bus: bus USB3 port 1 finished in 6 msecs
835 11:28:27.181854 USB3 port 2 scanning...
836 11:28:27.184407 scan_static_bus for USB3 port 2
837 11:28:27.190965 scan_static_bus for USB3 port 2 done
838 11:28:27.194509 scan_bus: bus USB3 port 2 finished in 6 msecs
839 11:28:27.197885 USB3 port 3 scanning...
840 11:28:27.201766 scan_static_bus for USB3 port 3
841 11:28:27.204431 scan_static_bus for USB3 port 3 done
842 11:28:27.207872 scan_bus: bus USB3 port 3 finished in 6 msecs
843 11:28:27.210971 scan_static_bus for USB0 port 0 done
844 11:28:27.218220 scan_bus: bus USB0 port 0 finished in 172 msecs
845 11:28:27.221385 scan_static_bus for PCI: 00:14.0 done
846 11:28:27.224386 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
847 11:28:27.227809 PCI: 00:14.3 scanning...
848 11:28:27.231312 scan_static_bus for PCI: 00:14.3
849 11:28:27.234203 GENERIC: 0.0 enabled
850 11:28:27.237613 scan_static_bus for PCI: 00:14.3 done
851 11:28:27.241204 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
852 11:28:27.244437 PCI: 00:15.0 scanning...
853 11:28:27.247601 scan_static_bus for PCI: 00:15.0
854 11:28:27.250725 I2C: 00:2c enabled
855 11:28:27.251149 I2C: 00:15 enabled
856 11:28:27.257357 scan_static_bus for PCI: 00:15.0 done
857 11:28:27.261177 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
858 11:28:27.264395 PCI: 00:15.1 scanning...
859 11:28:27.267580 scan_static_bus for PCI: 00:15.1
860 11:28:27.271094 scan_static_bus for PCI: 00:15.1 done
861 11:28:27.273848 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
862 11:28:27.277339 PCI: 00:15.2 scanning...
863 11:28:27.280854 scan_static_bus for PCI: 00:15.2
864 11:28:27.283792 GENERIC: 0.0 disabled
865 11:28:27.284185 I2C: 00:15 enabled
866 11:28:27.287405 I2C: 00:10 disabled
867 11:28:27.290250 I2C: 00:10 disabled
868 11:28:27.290679 I2C: 00:2c enabled
869 11:28:27.293625 I2C: 00:40 enabled
870 11:28:27.294017 I2C: 00:10 enabled
871 11:28:27.296936 I2C: 00:39 enabled
872 11:28:27.300284 scan_static_bus for PCI: 00:15.2 done
873 11:28:27.306976 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
874 11:28:27.307379 PCI: 00:15.3 scanning...
875 11:28:27.310205 scan_static_bus for PCI: 00:15.3
876 11:28:27.313687 I2C: 00:36 enabled
877 11:28:27.317393 I2C: 00:10 disabled
878 11:28:27.317949 I2C: 00:0c enabled
879 11:28:27.320716 I2C: 00:50 enabled
880 11:28:27.323803 scan_static_bus for PCI: 00:15.3 done
881 11:28:27.327301 scan_bus: bus PCI: 00:15.3 finished in 15 msecs
882 11:28:27.330493 PCI: 00:19.0 scanning...
883 11:28:27.333844 scan_static_bus for PCI: 00:19.0
884 11:28:27.337720 I2C: 00:1a enabled
885 11:28:27.338347 I2C: 00:1a disabled
886 11:28:27.340538 I2C: 00:1a disabled
887 11:28:27.344070 I2C: 00:28 enabled
888 11:28:27.344667 I2C: 00:29 enabled
889 11:28:27.347266 scan_static_bus for PCI: 00:19.0 done
890 11:28:27.353384 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
891 11:28:27.357189 PCI: 00:1e.2 scanning...
892 11:28:27.360107 scan_generic_bus for PCI: 00:1e.2
893 11:28:27.360536 SPI: 00 enabled
894 11:28:27.366698 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
895 11:28:27.370120 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
896 11:28:27.373450 PCI: 00:1f.0 scanning...
897 11:28:27.376837 scan_static_bus for PCI: 00:1f.0
898 11:28:27.380215 PNP: 0c09.0 enabled
899 11:28:27.384062 PNP: 0c09.0 scanning...
900 11:28:27.387181 scan_static_bus for PNP: 0c09.0
901 11:28:27.390077 scan_static_bus for PNP: 0c09.0 done
902 11:28:27.393848 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
903 11:28:27.396773 scan_static_bus for PCI: 00:1f.0 done
904 11:28:27.403388 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
905 11:28:27.403851 PCI: 00:1f.3 scanning...
906 11:28:27.406940 scan_static_bus for PCI: 00:1f.3
907 11:28:27.409819 GENERIC: 0.0 disabled
908 11:28:27.413370 scan_static_bus for PCI: 00:1f.3 done
909 11:28:27.419745 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
910 11:28:27.420255 PCI: 00:1f.5 scanning...
911 11:28:27.426836 scan_generic_bus for PCI: 00:1f.5
912 11:28:27.430325 scan_generic_bus for PCI: 00:1f.5 done
913 11:28:27.433174 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
914 11:28:27.439892 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
915 11:28:27.443346 scan_static_bus for Root Device done
916 11:28:27.446533 scan_bus: bus Root Device finished in 665 msecs
917 11:28:27.446973 done
918 11:28:27.452994 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1085 ms
919 11:28:27.456596 Chrome EC: UHEPI supported
920 11:28:27.462928 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
921 11:28:27.469513 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
922 11:28:27.472999 SPI flash protection: WPSW=0 SRP0=0
923 11:28:27.476342 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
924 11:28:27.482984 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
925 11:28:27.485947 found VGA at PCI: 00:02.0
926 11:28:27.489402 Setting up VGA for PCI: 00:02.0
927 11:28:27.493006 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
928 11:28:27.499326 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
929 11:28:27.502338 Allocating resources...
930 11:28:27.502913 Reading resources...
931 11:28:27.509266 Root Device read_resources bus 0 link: 0
932 11:28:27.513110 CPU_CLUSTER: 0 read_resources bus 0 link: 0
933 11:28:27.516502 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
934 11:28:27.522758 DOMAIN: 0000 read_resources bus 0 link: 0
935 11:28:27.526012 PCI: 00:04.0 read_resources bus 1 link: 0
936 11:28:27.532894 PCI: 00:04.0 read_resources bus 1 link: 0 done
937 11:28:27.536731 PCI: 00:05.0 read_resources bus 2 link: 0
938 11:28:27.539675 PCI: 00:05.0 read_resources bus 2 link: 0 done
939 11:28:27.547564 PCI: 00:14.0 read_resources bus 0 link: 0
940 11:28:27.550357 USB0 port 0 read_resources bus 0 link: 0
941 11:28:27.558478 USB0 port 0 read_resources bus 0 link: 0 done
942 11:28:27.561942 PCI: 00:14.0 read_resources bus 0 link: 0 done
943 11:28:27.564972 PCI: 00:14.3 read_resources bus 0 link: 0
944 11:28:27.620902 PCI: 00:14.3 read_resources bus 0 link: 0 done
945 11:28:27.621980 PCI: 00:15.0 read_resources bus 0 link: 0
946 11:28:27.622383 PCI: 00:15.0 read_resources bus 0 link: 0 done
947 11:28:27.622984 PCI: 00:15.2 read_resources bus 0 link: 0
948 11:28:27.623328 PCI: 00:15.2 read_resources bus 0 link: 0 done
949 11:28:27.623640 PCI: 00:15.3 read_resources bus 0 link: 0
950 11:28:27.624008 PCI: 00:15.3 read_resources bus 0 link: 0 done
951 11:28:27.624317 PCI: 00:19.0 read_resources bus 0 link: 0
952 11:28:27.624611 PCI: 00:19.0 read_resources bus 0 link: 0 done
953 11:28:27.624901 PCI: 00:1e.2 read_resources bus 3 link: 0
954 11:28:27.625187 PCI: 00:1e.2 read_resources bus 3 link: 0 done
955 11:28:27.641654 PCI: 00:1f.0 read_resources bus 0 link: 0
956 11:28:27.642498 PCI: 00:1f.0 read_resources bus 0 link: 0 done
957 11:28:27.642927 PCI: 00:1f.3 read_resources bus 0 link: 0
958 11:28:27.643292 PCI: 00:1f.3 read_resources bus 0 link: 0 done
959 11:28:27.645180 DOMAIN: 0000 read_resources bus 0 link: 0 done
960 11:28:27.648459 Root Device read_resources bus 0 link: 0 done
961 11:28:27.651799 Done reading resources.
962 11:28:27.658442 Show resources in subtree (Root Device)...After reading.
963 11:28:27.661798 Root Device child on link 0 CPU_CLUSTER: 0
964 11:28:27.665056 CPU_CLUSTER: 0 child on link 0 APIC: 00
965 11:28:27.668591 APIC: 00
966 11:28:27.669014 APIC: 02
967 11:28:27.675195 DOMAIN: 0000 child on link 0 PCI: 00:00.0
968 11:28:27.681495 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
969 11:28:27.691792 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
970 11:28:27.694750 PCI: 00:00.0
971 11:28:27.704968 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
972 11:28:27.715013 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
973 11:28:27.721394 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
974 11:28:27.731501 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
975 11:28:27.741169 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
976 11:28:27.751185 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
977 11:28:27.761788 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
978 11:28:27.771056 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
979 11:28:27.777921 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
980 11:28:27.788209 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
981 11:28:27.797803 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
982 11:28:27.807675 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
983 11:28:27.817572 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
984 11:28:27.824213 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
985 11:28:27.833755 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
986 11:28:27.843986 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
987 11:28:27.853779 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
988 11:28:27.863491 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
989 11:28:27.873465 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
990 11:28:27.873782 PCI: 00:02.0
991 11:28:27.883570 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
992 11:28:27.893334 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
993 11:28:27.903313 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
994 11:28:27.907090 PCI: 00:04.0 child on link 0 GENERIC: 0.0
995 11:28:27.917075 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
996 11:28:27.919940 GENERIC: 0.0
997 11:28:27.923428 PCI: 00:05.0 child on link 0 GENERIC: 0.0
998 11:28:27.933424 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
999 11:28:27.936317 GENERIC: 0.0
1000 11:28:27.936874 PCI: 00:08.0
1001 11:28:27.946659 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1002 11:28:27.953102 PCI: 00:14.0 child on link 0 USB0 port 0
1003 11:28:27.963092 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1004 11:28:27.966272 USB0 port 0 child on link 0 USB2 port 0
1005 11:28:27.966746 USB2 port 0
1006 11:28:27.969784 USB2 port 1
1007 11:28:27.970203 USB2 port 2
1008 11:28:27.973359 USB2 port 3
1009 11:28:27.973777 USB2 port 4
1010 11:28:27.976399 USB2 port 5
1011 11:28:27.979783 USB2 port 6
1012 11:28:27.980255 USB2 port 7
1013 11:28:27.983219 USB3 port 0
1014 11:28:27.983632 USB3 port 1
1015 11:28:27.986000 USB3 port 2
1016 11:28:27.986586 USB3 port 3
1017 11:28:27.989230 PCI: 00:14.2
1018 11:28:27.993002 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1019 11:28:28.002789 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1020 11:28:28.006117 GENERIC: 0.0
1021 11:28:28.006580 PCI: 00:14.5
1022 11:28:28.015891 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1023 11:28:28.019490 PCI: 00:15.0 child on link 0 I2C: 00:2c
1024 11:28:28.029110 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1025 11:28:28.032375 I2C: 00:2c
1026 11:28:28.032854 I2C: 00:15
1027 11:28:28.036263 PCI: 00:15.1
1028 11:28:28.045923 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1029 11:28:28.049181 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1030 11:28:28.059025 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1031 11:28:28.062201 GENERIC: 0.0
1032 11:28:28.062706 I2C: 00:15
1033 11:28:28.065775 I2C: 00:10
1034 11:28:28.066181 I2C: 00:10
1035 11:28:28.069336 I2C: 00:2c
1036 11:28:28.069741 I2C: 00:40
1037 11:28:28.070063 I2C: 00:10
1038 11:28:28.072726 I2C: 00:39
1039 11:28:28.075746 PCI: 00:15.3 child on link 0 I2C: 00:36
1040 11:28:28.085840 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1041 11:28:28.089205 I2C: 00:36
1042 11:28:28.089718 I2C: 00:10
1043 11:28:28.092012 I2C: 00:0c
1044 11:28:28.092423 I2C: 00:50
1045 11:28:28.095470 PCI: 00:16.0
1046 11:28:28.105598 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1047 11:28:28.109004 PCI: 00:19.0 child on link 0 I2C: 00:1a
1048 11:28:28.118673 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1049 11:28:28.119086 I2C: 00:1a
1050 11:28:28.121948 I2C: 00:1a
1051 11:28:28.122355 I2C: 00:1a
1052 11:28:28.125517 I2C: 00:28
1053 11:28:28.125993 I2C: 00:29
1054 11:28:28.128726 PCI: 00:19.2
1055 11:28:28.138478 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1056 11:28:28.148729 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1057 11:28:28.152236 PCI: 00:1a.0
1058 11:28:28.162054 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1059 11:28:28.162516 PCI: 00:1e.0
1060 11:28:28.165299 PCI: 00:1e.2 child on link 0 SPI: 00
1061 11:28:28.175253 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1062 11:28:28.178203 SPI: 00
1063 11:28:28.181638 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1064 11:28:28.191810 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1065 11:28:28.192323 PNP: 0c09.0
1066 11:28:28.201920 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1067 11:28:28.202423 PCI: 00:1f.2
1068 11:28:28.211443 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1069 11:28:28.222671 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1070 11:28:28.225849 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1071 11:28:28.236084 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1072 11:28:28.246190 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1073 11:28:28.246726 GENERIC: 0.0
1074 11:28:28.249290 PCI: 00:1f.5
1075 11:28:28.259057 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1076 11:28:28.265661 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1077 11:28:28.272287 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1078 11:28:28.279095 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1079 11:28:28.285624 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1080 11:28:28.295791 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1081 11:28:28.302097 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1082 11:28:28.305347 DOMAIN: 0000: Resource ranges:
1083 11:28:28.309051 * Base: 1000, Size: 800, Tag: 100
1084 11:28:28.311927 * Base: 1900, Size: e700, Tag: 100
1085 11:28:28.318390 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1086 11:28:28.325408 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1087 11:28:28.331678 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1088 11:28:28.338209 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1089 11:28:28.344981 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1090 11:28:28.354700 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1091 11:28:28.361837 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1092 11:28:28.368084 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1093 11:28:28.377936 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1094 11:28:28.384875 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1095 11:28:28.391862 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1096 11:28:28.401507 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1097 11:28:28.407630 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1098 11:28:28.414594 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1099 11:28:28.424357 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1100 11:28:28.431128 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1101 11:28:28.437753 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1102 11:28:28.448019 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1103 11:28:28.454102 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1104 11:28:28.460420 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1105 11:28:28.470320 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1106 11:28:28.477219 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1107 11:28:28.483720 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1108 11:28:28.490562 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1109 11:28:28.493878 DOMAIN: 0000: Resource ranges:
1110 11:28:28.500340 * Base: 7fc00000, Size: 40400000, Tag: 200
1111 11:28:28.503960 * Base: d0000000, Size: 2b000000, Tag: 200
1112 11:28:28.506780 * Base: fb001000, Size: 2fff000, Tag: 200
1113 11:28:28.513596 * Base: fe010000, Size: 22000, Tag: 200
1114 11:28:28.517073 * Base: fe033000, Size: a4d000, Tag: 200
1115 11:28:28.520040 * Base: fea88000, Size: 2f8000, Tag: 200
1116 11:28:28.523477 * Base: fed88000, Size: 8000, Tag: 200
1117 11:28:28.530106 * Base: fed93000, Size: d000, Tag: 200
1118 11:28:28.533684 * Base: feda2000, Size: 125e000, Tag: 200
1119 11:28:28.537254 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1120 11:28:28.543557 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1121 11:28:28.550123 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1122 11:28:28.556597 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1123 11:28:28.563276 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1124 11:28:28.570004 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1125 11:28:28.576491 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1126 11:28:28.583075 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1127 11:28:28.589376 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1128 11:28:28.596524 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1129 11:28:28.602717 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1130 11:28:28.609630 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1131 11:28:28.615963 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1132 11:28:28.622874 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1133 11:28:28.629008 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1134 11:28:28.636195 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1135 11:28:28.642520 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1136 11:28:28.649807 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1137 11:28:28.655989 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1138 11:28:28.662323 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1139 11:28:28.669359 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1140 11:28:28.679679 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1141 11:28:28.685770 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1142 11:28:28.688983 Root Device assign_resources, bus 0 link: 0
1143 11:28:28.695640 DOMAIN: 0000 assign_resources, bus 0 link: 0
1144 11:28:28.701912 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1145 11:28:28.712236 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1146 11:28:28.718578 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1147 11:28:28.725460 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1148 11:28:28.731984 PCI: 00:04.0 assign_resources, bus 1 link: 0
1149 11:28:28.735227 PCI: 00:04.0 assign_resources, bus 1 link: 0
1150 11:28:28.744980 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1151 11:28:28.748724 PCI: 00:05.0 assign_resources, bus 2 link: 0
1152 11:28:28.751618 PCI: 00:05.0 assign_resources, bus 2 link: 0
1153 11:28:28.761635 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1154 11:28:28.768380 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1155 11:28:28.774955 PCI: 00:14.0 assign_resources, bus 0 link: 0
1156 11:28:28.778226 PCI: 00:14.0 assign_resources, bus 0 link: 0
1157 11:28:28.788360 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1158 11:28:28.791523 PCI: 00:14.3 assign_resources, bus 0 link: 0
1159 11:28:28.795039 PCI: 00:14.3 assign_resources, bus 0 link: 0
1160 11:28:28.805696 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1161 11:28:28.812377 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1162 11:28:28.815195 PCI: 00:15.0 assign_resources, bus 0 link: 0
1163 11:28:28.822173 PCI: 00:15.0 assign_resources, bus 0 link: 0
1164 11:28:28.828716 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1165 11:28:28.838170 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1166 11:28:28.841527 PCI: 00:15.2 assign_resources, bus 0 link: 0
1167 11:28:28.848438 PCI: 00:15.2 assign_resources, bus 0 link: 0
1168 11:28:28.855113 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1169 11:28:28.858222 PCI: 00:15.3 assign_resources, bus 0 link: 0
1170 11:28:28.864814 PCI: 00:15.3 assign_resources, bus 0 link: 0
1171 11:28:28.871109 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1172 11:28:28.881576 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1173 11:28:28.884549 PCI: 00:19.0 assign_resources, bus 0 link: 0
1174 11:28:28.887961 PCI: 00:19.0 assign_resources, bus 0 link: 0
1175 11:28:28.897970 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1176 11:28:28.904675 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1177 11:28:28.914547 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1178 11:28:28.918185 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1179 11:28:28.924598 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1180 11:28:28.927822 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1181 11:28:28.931427 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1182 11:28:28.937444 LPC: Trying to open IO window from 800 size 1ff
1183 11:28:28.944013 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1184 11:28:28.954192 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1185 11:28:28.957279 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1186 11:28:28.964088 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1187 11:28:28.970346 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1188 11:28:28.974281 DOMAIN: 0000 assign_resources, bus 0 link: 0
1189 11:28:28.980566 Root Device assign_resources, bus 0 link: 0
1190 11:28:28.983714 Done setting resources.
1191 11:28:28.987028 Show resources in subtree (Root Device)...After assigning values.
1192 11:28:28.993892 Root Device child on link 0 CPU_CLUSTER: 0
1193 11:28:28.997250 CPU_CLUSTER: 0 child on link 0 APIC: 00
1194 11:28:28.997665 APIC: 00
1195 11:28:29.000668 APIC: 02
1196 11:28:29.003617 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1197 11:28:29.013770 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1198 11:28:29.023241 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1199 11:28:29.023657 PCI: 00:00.0
1200 11:28:29.033596 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1201 11:28:29.043788 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1202 11:28:29.053391 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1203 11:28:29.063622 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1204 11:28:29.072900 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1205 11:28:29.080056 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1206 11:28:29.089879 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1207 11:28:29.099640 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1208 11:28:29.109163 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1209 11:28:29.119585 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1210 11:28:29.129344 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1211 11:28:29.136201 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1212 11:28:29.145951 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1213 11:28:29.155713 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1214 11:28:29.165414 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1215 11:28:29.175437 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1216 11:28:29.186063 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1217 11:28:29.191805 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1218 11:28:29.201621 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1219 11:28:29.205147 PCI: 00:02.0
1220 11:28:29.215309 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1221 11:28:29.225003 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1222 11:28:29.234708 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1223 11:28:29.238101 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1224 11:28:29.247741 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1225 11:28:29.251551 GENERIC: 0.0
1226 11:28:29.254461 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1227 11:28:29.268040 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1228 11:28:29.268559 GENERIC: 0.0
1229 11:28:29.271492 PCI: 00:08.0
1230 11:28:29.281184 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1231 11:28:29.284163 PCI: 00:14.0 child on link 0 USB0 port 0
1232 11:28:29.294156 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1233 11:28:29.300936 USB0 port 0 child on link 0 USB2 port 0
1234 11:28:29.301416 USB2 port 0
1235 11:28:29.303700 USB2 port 1
1236 11:28:29.304105 USB2 port 2
1237 11:28:29.307461 USB2 port 3
1238 11:28:29.307869 USB2 port 4
1239 11:28:29.311075 USB2 port 5
1240 11:28:29.311482 USB2 port 6
1241 11:28:29.313756 USB2 port 7
1242 11:28:29.314181 USB3 port 0
1243 11:28:29.317560 USB3 port 1
1244 11:28:29.317969 USB3 port 2
1245 11:28:29.320572 USB3 port 3
1246 11:28:29.320981 PCI: 00:14.2
1247 11:28:29.327397 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1248 11:28:29.337278 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1249 11:28:29.337810 GENERIC: 0.0
1250 11:28:29.340394 PCI: 00:14.5
1251 11:28:29.350637 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1252 11:28:29.353740 PCI: 00:15.0 child on link 0 I2C: 00:2c
1253 11:28:29.363810 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1254 11:28:29.366617 I2C: 00:2c
1255 11:28:29.367027 I2C: 00:15
1256 11:28:29.370010 PCI: 00:15.1
1257 11:28:29.380089 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1258 11:28:29.384001 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1259 11:28:29.393269 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1260 11:28:29.396444 GENERIC: 0.0
1261 11:28:29.396856 I2C: 00:15
1262 11:28:29.400102 I2C: 00:10
1263 11:28:29.400507 I2C: 00:10
1264 11:28:29.403380 I2C: 00:2c
1265 11:28:29.403787 I2C: 00:40
1266 11:28:29.406345 I2C: 00:10
1267 11:28:29.406784 I2C: 00:39
1268 11:28:29.413591 PCI: 00:15.3 child on link 0 I2C: 00:36
1269 11:28:29.423364 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1270 11:28:29.423905 I2C: 00:36
1271 11:28:29.426516 I2C: 00:10
1272 11:28:29.426927 I2C: 00:0c
1273 11:28:29.429865 I2C: 00:50
1274 11:28:29.430335 PCI: 00:16.0
1275 11:28:29.439553 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1276 11:28:29.445836 PCI: 00:19.0 child on link 0 I2C: 00:1a
1277 11:28:29.456036 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1278 11:28:29.456507 I2C: 00:1a
1279 11:28:29.459428 I2C: 00:1a
1280 11:28:29.459834 I2C: 00:1a
1281 11:28:29.462466 I2C: 00:28
1282 11:28:29.462873 I2C: 00:29
1283 11:28:29.466175 PCI: 00:19.2
1284 11:28:29.475684 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1285 11:28:29.485653 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1286 11:28:29.486111 PCI: 00:1a.0
1287 11:28:29.499032 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1288 11:28:29.499443 PCI: 00:1e.0
1289 11:28:29.502561 PCI: 00:1e.2 child on link 0 SPI: 00
1290 11:28:29.512161 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1291 11:28:29.515172 SPI: 00
1292 11:28:29.518883 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1293 11:28:29.528660 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1294 11:28:29.529121 PNP: 0c09.0
1295 11:28:29.538494 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1296 11:28:29.539078 PCI: 00:1f.2
1297 11:28:29.548460 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1298 11:28:29.558389 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1299 11:28:29.561900 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1300 11:28:29.571435 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1301 11:28:29.584662 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1302 11:28:29.585212 GENERIC: 0.0
1303 11:28:29.587942 PCI: 00:1f.5
1304 11:28:29.597922 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1305 11:28:29.601562 Done allocating resources.
1306 11:28:29.604611 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2097 ms
1307 11:28:29.608664 Enabling resources...
1308 11:28:29.611346 PCI: 00:00.0 subsystem <- 8086/4e22
1309 11:28:29.614747 PCI: 00:00.0 cmd <- 06
1310 11:28:29.618351 PCI: 00:02.0 subsystem <- 8086/4e55
1311 11:28:29.621504 PCI: 00:02.0 cmd <- 03
1312 11:28:29.625017 PCI: 00:04.0 subsystem <- 8086/4e03
1313 11:28:29.628420 PCI: 00:04.0 cmd <- 02
1314 11:28:29.631634 PCI: 00:05.0 bridge ctrl <- 0003
1315 11:28:29.634729 PCI: 00:05.0 subsystem <- 8086/4e19
1316 11:28:29.638118 PCI: 00:05.0 cmd <- 02
1317 11:28:29.638570 PCI: 00:08.0 cmd <- 06
1318 11:28:29.644429 PCI: 00:14.0 subsystem <- 8086/4ded
1319 11:28:29.644835 PCI: 00:14.0 cmd <- 02
1320 11:28:29.648150 PCI: 00:14.3 subsystem <- 8086/4df0
1321 11:28:29.651733 PCI: 00:14.3 cmd <- 02
1322 11:28:29.654585 PCI: 00:14.5 subsystem <- 8086/4df8
1323 11:28:29.658120 PCI: 00:14.5 cmd <- 06
1324 11:28:29.661159 PCI: 00:15.0 subsystem <- 8086/4de8
1325 11:28:29.664546 PCI: 00:15.0 cmd <- 02
1326 11:28:29.668075 PCI: 00:15.1 subsystem <- 8086/4de9
1327 11:28:29.671033 PCI: 00:15.1 cmd <- 02
1328 11:28:29.674851 PCI: 00:15.2 subsystem <- 8086/4dea
1329 11:28:29.677792 PCI: 00:15.2 cmd <- 02
1330 11:28:29.681061 PCI: 00:15.3 subsystem <- 8086/4deb
1331 11:28:29.681602 PCI: 00:15.3 cmd <- 02
1332 11:28:29.684283 PCI: 00:16.0 subsystem <- 8086/4de0
1333 11:28:29.687934 PCI: 00:16.0 cmd <- 02
1334 11:28:29.690950 PCI: 00:19.0 subsystem <- 8086/4dc5
1335 11:28:29.694299 PCI: 00:19.0 cmd <- 02
1336 11:28:29.697751 PCI: 00:19.2 subsystem <- 8086/4dc7
1337 11:28:29.700817 PCI: 00:19.2 cmd <- 06
1338 11:28:29.703988 PCI: 00:1a.0 subsystem <- 8086/4dc4
1339 11:28:29.707659 PCI: 00:1a.0 cmd <- 06
1340 11:28:29.710646 PCI: 00:1e.2 subsystem <- 8086/4daa
1341 11:28:29.713875 PCI: 00:1e.2 cmd <- 06
1342 11:28:29.717406 PCI: 00:1f.0 subsystem <- 8086/4d87
1343 11:28:29.717813 PCI: 00:1f.0 cmd <- 407
1344 11:28:29.724475 PCI: 00:1f.3 subsystem <- 8086/4dc8
1345 11:28:29.724959 PCI: 00:1f.3 cmd <- 02
1346 11:28:29.727937 PCI: 00:1f.5 subsystem <- 8086/4da4
1347 11:28:29.730698 PCI: 00:1f.5 cmd <- 406
1348 11:28:29.735729 done.
1349 11:28:29.739108 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1350 11:28:29.741971 Initializing devices...
1351 11:28:29.745752 Root Device init
1352 11:28:29.746159 mainboard: EC init
1353 11:28:29.752272 Chrome EC: Set SMI mask to 0x0000000000000000
1354 11:28:29.756016 Chrome EC: clear events_b mask to 0x0000000000000000
1355 11:28:29.762077 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1356 11:28:29.768912 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1357 11:28:29.775210 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1358 11:28:29.778961 Chrome EC: Set WAKE mask to 0x0000000000000000
1359 11:28:29.781869 Root Device init finished in 35 msecs
1360 11:28:29.786021 PCI: 00:00.0 init
1361 11:28:29.789797 CPU TDP = 6 Watts
1362 11:28:29.790348 CPU PL1 = 7 Watts
1363 11:28:29.792678 CPU PL2 = 12 Watts
1364 11:28:29.796099 PCI: 00:00.0 init finished in 6 msecs
1365 11:28:29.799246 PCI: 00:02.0 init
1366 11:28:29.802801 GMA: Found VBT in CBFS
1367 11:28:29.803225 GMA: Found valid VBT in CBFS
1368 11:28:29.809364 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1369 11:28:29.815924 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1370 11:28:29.822756 PCI: 00:02.0 init finished in 18 msecs
1371 11:28:29.823258 PCI: 00:08.0 init
1372 11:28:29.829666 PCI: 00:08.0 init finished in 0 msecs
1373 11:28:29.830217 PCI: 00:14.0 init
1374 11:28:29.836007 XHCI: Updated LFPS sampling OFF time to 9 ms
1375 11:28:29.839529 PCI: 00:14.0 init finished in 4 msecs
1376 11:28:29.842532 PCI: 00:15.0 init
1377 11:28:29.842988 I2C bus 0 version 0x3230302a
1378 11:28:29.849333 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1379 11:28:29.852789 PCI: 00:15.0 init finished in 6 msecs
1380 11:28:29.853200 PCI: 00:15.1 init
1381 11:28:29.856327 I2C bus 1 version 0x3230302a
1382 11:28:29.859047 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1383 11:28:29.862449 PCI: 00:15.1 init finished in 6 msecs
1384 11:28:29.865959 PCI: 00:15.2 init
1385 11:28:29.869733 I2C bus 2 version 0x3230302a
1386 11:28:29.872660 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1387 11:28:29.876239 PCI: 00:15.2 init finished in 6 msecs
1388 11:28:29.879117 PCI: 00:15.3 init
1389 11:28:29.882872 I2C bus 3 version 0x3230302a
1390 11:28:29.885708 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1391 11:28:29.888857 PCI: 00:15.3 init finished in 6 msecs
1392 11:28:29.892500 PCI: 00:16.0 init
1393 11:28:29.895712 PCI: 00:16.0 init finished in 0 msecs
1394 11:28:29.896148 PCI: 00:19.0 init
1395 11:28:29.899384 I2C bus 4 version 0x3230302a
1396 11:28:29.902258 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1397 11:28:29.905786 PCI: 00:19.0 init finished in 6 msecs
1398 11:28:29.909637 PCI: 00:1a.0 init
1399 11:28:29.912567 PCI: 00:1a.0 init finished in 0 msecs
1400 11:28:29.916294 PCI: 00:1f.0 init
1401 11:28:29.919564 IOAPIC: Initializing IOAPIC at 0xfec00000
1402 11:28:29.926076 IOAPIC: Bootstrap Processor Local APIC = 0x00
1403 11:28:29.926538 IOAPIC: ID = 0x02
1404 11:28:29.929649 IOAPIC: Dumping registers
1405 11:28:29.932814 reg 0x0000: 0x02000000
1406 11:28:29.936444 reg 0x0001: 0x00770020
1407 11:28:29.936965 reg 0x0002: 0x00000000
1408 11:28:29.942279 PCI: 00:1f.0 init finished in 21 msecs
1409 11:28:29.942738 PCI: 00:1f.2 init
1410 11:28:29.945784 Disabling ACPI via APMC.
1411 11:28:29.949545 APMC done.
1412 11:28:29.952258 PCI: 00:1f.2 init finished in 5 msecs
1413 11:28:29.964190 PNP: 0c09.0 init
1414 11:28:29.967246 Google Chrome EC uptime: 6.577 seconds
1415 11:28:29.973868 Google Chrome AP resets since EC boot: 0
1416 11:28:29.976858 Google Chrome most recent AP reset causes:
1417 11:28:29.983511 Google Chrome EC reset flags at last EC boot: reset-pin
1418 11:28:29.986749 PNP: 0c09.0 init finished in 18 msecs
1419 11:28:29.987166 Devices initialized
1420 11:28:29.990420 Show all devs... After init.
1421 11:28:29.993406 Root Device: enabled 1
1422 11:28:29.997078 CPU_CLUSTER: 0: enabled 1
1423 11:28:30.000591 DOMAIN: 0000: enabled 1
1424 11:28:30.001138 PCI: 00:00.0: enabled 1
1425 11:28:30.003299 PCI: 00:02.0: enabled 1
1426 11:28:30.006907 PCI: 00:04.0: enabled 1
1427 11:28:30.007443 PCI: 00:05.0: enabled 1
1428 11:28:30.010249 PCI: 00:09.0: enabled 0
1429 11:28:30.013372 PCI: 00:12.6: enabled 0
1430 11:28:30.016804 PCI: 00:14.0: enabled 1
1431 11:28:30.017219 PCI: 00:14.1: enabled 0
1432 11:28:30.020108 PCI: 00:14.2: enabled 0
1433 11:28:30.023528 PCI: 00:14.3: enabled 1
1434 11:28:30.026838 PCI: 00:14.5: enabled 1
1435 11:28:30.027253 PCI: 00:15.0: enabled 1
1436 11:28:30.029659 PCI: 00:15.1: enabled 1
1437 11:28:30.033481 PCI: 00:15.2: enabled 1
1438 11:28:30.036689 PCI: 00:15.3: enabled 1
1439 11:28:30.037179 PCI: 00:16.0: enabled 1
1440 11:28:30.040058 PCI: 00:16.1: enabled 0
1441 11:28:30.043233 PCI: 00:16.4: enabled 0
1442 11:28:30.043649 PCI: 00:16.5: enabled 0
1443 11:28:30.046222 PCI: 00:17.0: enabled 0
1444 11:28:30.049944 PCI: 00:19.0: enabled 1
1445 11:28:30.053178 PCI: 00:19.1: enabled 0
1446 11:28:30.053590 PCI: 00:19.2: enabled 1
1447 11:28:30.056277 PCI: 00:1a.0: enabled 1
1448 11:28:30.059507 PCI: 00:1c.0: enabled 0
1449 11:28:30.063093 PCI: 00:1c.1: enabled 0
1450 11:28:30.063510 PCI: 00:1c.2: enabled 0
1451 11:28:30.066291 PCI: 00:1c.3: enabled 0
1452 11:28:30.069888 PCI: 00:1c.4: enabled 0
1453 11:28:30.072953 PCI: 00:1c.5: enabled 0
1454 11:28:30.073446 PCI: 00:1c.6: enabled 0
1455 11:28:30.075926 PCI: 00:1c.7: enabled 1
1456 11:28:30.079061 PCI: 00:1e.0: enabled 0
1457 11:28:30.082867 PCI: 00:1e.1: enabled 0
1458 11:28:30.083275 PCI: 00:1e.2: enabled 1
1459 11:28:30.085769 PCI: 00:1e.3: enabled 0
1460 11:28:30.089517 PCI: 00:1f.0: enabled 1
1461 11:28:30.092700 PCI: 00:1f.1: enabled 0
1462 11:28:30.093120 PCI: 00:1f.2: enabled 1
1463 11:28:30.095968 PCI: 00:1f.3: enabled 1
1464 11:28:30.099014 PCI: 00:1f.4: enabled 0
1465 11:28:30.099580 PCI: 00:1f.5: enabled 1
1466 11:28:30.102216 PCI: 00:1f.7: enabled 0
1467 11:28:30.105859 GENERIC: 0.0: enabled 1
1468 11:28:30.109306 GENERIC: 0.0: enabled 1
1469 11:28:30.109715 USB0 port 0: enabled 1
1470 11:28:30.112282 GENERIC: 0.0: enabled 1
1471 11:28:30.115880 I2C: 00:2c: enabled 1
1472 11:28:30.116440 I2C: 00:15: enabled 1
1473 11:28:30.118943 GENERIC: 0.0: enabled 0
1474 11:28:30.122445 I2C: 00:15: enabled 1
1475 11:28:30.125970 I2C: 00:10: enabled 0
1476 11:28:30.126380 I2C: 00:10: enabled 0
1477 11:28:30.128927 I2C: 00:2c: enabled 1
1478 11:28:30.131854 I2C: 00:40: enabled 1
1479 11:28:30.132263 I2C: 00:10: enabled 1
1480 11:28:30.135364 I2C: 00:39: enabled 1
1481 11:28:30.139160 I2C: 00:36: enabled 1
1482 11:28:30.139584 I2C: 00:10: enabled 0
1483 11:28:30.142035 I2C: 00:0c: enabled 1
1484 11:28:30.145313 I2C: 00:50: enabled 1
1485 11:28:30.145721 I2C: 00:1a: enabled 1
1486 11:28:30.148426 I2C: 00:1a: enabled 0
1487 11:28:30.152024 I2C: 00:1a: enabled 0
1488 11:28:30.152440 I2C: 00:28: enabled 1
1489 11:28:30.155130 I2C: 00:29: enabled 1
1490 11:28:30.158139 PCI: 00:00.0: enabled 1
1491 11:28:30.158224 SPI: 00: enabled 1
1492 11:28:30.161794 PNP: 0c09.0: enabled 1
1493 11:28:30.164696 GENERIC: 0.0: enabled 0
1494 11:28:30.168258 USB2 port 0: enabled 1
1495 11:28:30.168339 USB2 port 1: enabled 1
1496 11:28:30.171627 USB2 port 2: enabled 1
1497 11:28:30.174948 USB2 port 3: enabled 1
1498 11:28:30.175029 USB2 port 4: enabled 0
1499 11:28:30.178100 USB2 port 5: enabled 1
1500 11:28:30.181248 USB2 port 6: enabled 0
1501 11:28:30.184656 USB2 port 7: enabled 1
1502 11:28:30.184754 USB3 port 0: enabled 1
1503 11:28:30.187955 USB3 port 1: enabled 1
1504 11:28:30.190767 USB3 port 2: enabled 1
1505 11:28:30.190853 USB3 port 3: enabled 1
1506 11:28:30.194414 APIC: 00: enabled 1
1507 11:28:30.197952 APIC: 02: enabled 1
1508 11:28:30.198045 PCI: 00:08.0: enabled 1
1509 11:28:30.204759 BS: BS_DEV_INIT run times (exec / console): 22 / 437 ms
1510 11:28:30.208076 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1511 11:28:30.210913 ELOG: NV offset 0xbfa000 size 0x1000
1512 11:28:30.219229 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1513 11:28:30.226346 ELOG: Event(17) added with size 13 at 2024-03-18 11:28:27 UTC
1514 11:28:30.232991 ELOG: Event(92) added with size 9 at 2024-03-18 11:28:27 UTC
1515 11:28:30.239400 ELOG: Event(93) added with size 9 at 2024-03-18 11:28:27 UTC
1516 11:28:30.245832 ELOG: Event(9E) added with size 10 at 2024-03-18 11:28:27 UTC
1517 11:28:30.252750 ELOG: Event(9F) added with size 14 at 2024-03-18 11:28:27 UTC
1518 11:28:30.259778 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1519 11:28:30.262593 ELOG: Event(A1) added with size 10 at 2024-03-18 11:28:27 UTC
1520 11:28:30.272651 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1521 11:28:30.279192 ELOG: Event(A0) added with size 9 at 2024-03-18 11:28:27 UTC
1522 11:28:30.283078 elog_add_boot_reason: Logged dev mode boot
1523 11:28:30.289168 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1524 11:28:30.289468 Finalize devices...
1525 11:28:30.292371 Devices finalized
1526 11:28:30.298928 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1527 11:28:30.302292 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1528 11:28:30.309308 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1529 11:28:30.312321 ME: HFSTS1 : 0x80030045
1530 11:28:30.315804 ME: HFSTS2 : 0x30280136
1531 11:28:30.322306 ME: HFSTS3 : 0x00000050
1532 11:28:30.325682 ME: HFSTS4 : 0x00004000
1533 11:28:30.329012 ME: HFSTS5 : 0x00000000
1534 11:28:30.332019 ME: HFSTS6 : 0x40400006
1535 11:28:30.335589 ME: Manufacturing Mode : NO
1536 11:28:30.338393 ME: FW Partition Table : OK
1537 11:28:30.342145 ME: Bringup Loader Failure : NO
1538 11:28:30.345728 ME: Firmware Init Complete : NO
1539 11:28:30.348742 ME: Boot Options Present : NO
1540 11:28:30.352041 ME: Update In Progress : NO
1541 11:28:30.355270 ME: D0i3 Support : YES
1542 11:28:30.358505 ME: Low Power State Enabled : NO
1543 11:28:30.362031 ME: CPU Replaced : YES
1544 11:28:30.365268 ME: CPU Replacement Valid : YES
1545 11:28:30.368435 ME: Current Working State : 5
1546 11:28:30.372090 ME: Current Operation State : 1
1547 11:28:30.375339 ME: Current Operation Mode : 3
1548 11:28:30.378699 ME: Error Code : 0
1549 11:28:30.381603 ME: CPU Debug Disabled : YES
1550 11:28:30.384971 ME: TXT Support : NO
1551 11:28:30.391787 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1552 11:28:30.398178 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1553 11:28:30.401383 ACPI: Writing ACPI tables at 76b27000.
1554 11:28:30.401726 ACPI: * FACS
1555 11:28:30.405075 ACPI: * DSDT
1556 11:28:30.408707 Ramoops buffer: 0x100000@0x76a26000.
1557 11:28:30.415055 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1558 11:28:30.418232 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1559 11:28:30.421733 Google Chrome EC: version:
1560 11:28:30.425296 ro: magolor_1.1.9999-103b6f9
1561 11:28:30.428982 rw: magolor_1.1.9999-103b6f9
1562 11:28:30.431718 running image: 1
1563 11:28:30.438287 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1564 11:28:30.441544 ACPI: * FADT
1565 11:28:30.441983 SCI is IRQ9
1566 11:28:30.445106 ACPI: added table 1/32, length now 40
1567 11:28:30.448416 ACPI: * SSDT
1568 11:28:30.451919 Found 1 CPU(s) with 2 core(s) each.
1569 11:28:30.454982 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1570 11:28:30.461901 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1571 11:28:30.464853 Could not locate 'wifi_sar' in VPD.
1572 11:28:30.468473 Checking CBFS for default SAR values
1573 11:28:30.471566 wifi_sar_defaults.hex has bad len in CBFS
1574 11:28:30.475090 failed from getting SAR limits!
1575 11:28:30.478301 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1576 11:28:30.485176 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1577 11:28:30.491377 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1578 11:28:30.494745 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1579 11:28:30.501488 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1580 11:28:30.504563 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1581 11:28:30.511660 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1582 11:28:30.515136 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1583 11:28:30.521060 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1584 11:28:30.528411 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1585 11:28:30.534456 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1586 11:28:30.541522 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1587 11:28:30.544891 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1588 11:28:30.551102 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1589 11:28:30.554562 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1590 11:28:30.561552 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1591 11:28:30.564659 PS2K: Passing 101 keymaps to kernel
1592 11:28:30.571528 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1593 11:28:30.578132 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1594 11:28:30.581529 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1595 11:28:30.587961 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1596 11:28:30.591101 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1597 11:28:30.597832 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1598 11:28:30.604848 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1599 11:28:30.611147 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1600 11:28:30.614611 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1601 11:28:30.621398 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1602 11:28:30.624509 ACPI: added table 2/32, length now 44
1603 11:28:30.627963 ACPI: * MCFG
1604 11:28:30.631352 ACPI: added table 3/32, length now 48
1605 11:28:30.631863 ACPI: * TPM2
1606 11:28:30.634281 TPM2 log created at 0x76a16000
1607 11:28:30.637656 ACPI: added table 4/32, length now 52
1608 11:28:30.641214 ACPI: * MADT
1609 11:28:30.641621 SCI is IRQ9
1610 11:28:30.644396 ACPI: added table 5/32, length now 56
1611 11:28:30.647837 current = 76b2d580
1612 11:28:30.648293 ACPI: * DMAR
1613 11:28:30.654431 ACPI: added table 6/32, length now 60
1614 11:28:30.657460 ACPI: added table 7/32, length now 64
1615 11:28:30.657865 ACPI: * HPET
1616 11:28:30.661123 ACPI: added table 8/32, length now 68
1617 11:28:30.664362 ACPI: done.
1618 11:28:30.667456 ACPI tables: 26304 bytes.
1619 11:28:30.670724 smbios_write_tables: 76a15000
1620 11:28:30.674361 EC returned error result code 3
1621 11:28:30.677368 Couldn't obtain OEM name from CBI
1622 11:28:30.677828 Create SMBIOS type 16
1623 11:28:30.681027 Create SMBIOS type 17
1624 11:28:30.684316 GENERIC: 0.0 (WIFI Device)
1625 11:28:30.687307 SMBIOS tables: 913 bytes.
1626 11:28:30.690901 Writing table forward entry at 0x00000500
1627 11:28:30.697761 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1628 11:28:30.700953 Writing coreboot table at 0x76b4b000
1629 11:28:30.707560 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1630 11:28:30.710903 1. 0000000000001000-000000000009ffff: RAM
1631 11:28:30.717203 2. 00000000000a0000-00000000000fffff: RESERVED
1632 11:28:30.720648 3. 0000000000100000-0000000076a14fff: RAM
1633 11:28:30.727673 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1634 11:28:30.730588 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1635 11:28:30.737532 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1636 11:28:30.740419 7. 0000000077000000-000000007fbfffff: RESERVED
1637 11:28:30.747244 8. 00000000c0000000-00000000cfffffff: RESERVED
1638 11:28:30.750859 9. 00000000fb000000-00000000fb000fff: RESERVED
1639 11:28:30.757214 10. 00000000fe000000-00000000fe00ffff: RESERVED
1640 11:28:30.760272 11. 00000000fea80000-00000000fea87fff: RESERVED
1641 11:28:30.763669 12. 00000000fed80000-00000000fed87fff: RESERVED
1642 11:28:30.770219 13. 00000000fed90000-00000000fed92fff: RESERVED
1643 11:28:30.774183 14. 00000000feda0000-00000000feda1fff: RESERVED
1644 11:28:30.779868 15. 0000000100000000-00000001803fffff: RAM
1645 11:28:30.783550 Passing 4 GPIOs to payload:
1646 11:28:30.787196 NAME | PORT | POLARITY | VALUE
1647 11:28:30.793655 lid | undefined | high | high
1648 11:28:30.796510 power | undefined | high | low
1649 11:28:30.803085 oprom | undefined | high | low
1650 11:28:30.806798 EC in RW | 0x000000b9 | high | low
1651 11:28:30.813453 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum bb1f
1652 11:28:30.816921 coreboot table: 1504 bytes.
1653 11:28:30.819587 IMD ROOT 0. 0x76fff000 0x00001000
1654 11:28:30.823574 IMD SMALL 1. 0x76ffe000 0x00001000
1655 11:28:30.829959 FSP MEMORY 2. 0x76c4e000 0x003b0000
1656 11:28:30.833126 CONSOLE 3. 0x76c2e000 0x00020000
1657 11:28:30.836357 FMAP 4. 0x76c2d000 0x00000578
1658 11:28:30.840086 TIME STAMP 5. 0x76c2c000 0x00000910
1659 11:28:30.843003 VBOOT WORK 6. 0x76c18000 0x00014000
1660 11:28:30.846557 ROMSTG STCK 7. 0x76c17000 0x00001000
1661 11:28:30.849773 AFTER CAR 8. 0x76c0d000 0x0000a000
1662 11:28:30.852934 RAMSTAGE 9. 0x76ba7000 0x00066000
1663 11:28:30.859720 REFCODE 10. 0x76b67000 0x00040000
1664 11:28:30.863006 SMM BACKUP 11. 0x76b57000 0x00010000
1665 11:28:30.866697 4f444749 12. 0x76b55000 0x00002000
1666 11:28:30.869787 EXT VBT13. 0x76b53000 0x00001c43
1667 11:28:30.872764 COREBOOT 14. 0x76b4b000 0x00008000
1668 11:28:30.876126 ACPI 15. 0x76b27000 0x00024000
1669 11:28:30.879342 ACPI GNVS 16. 0x76b26000 0x00001000
1670 11:28:30.883163 RAMOOPS 17. 0x76a26000 0x00100000
1671 11:28:30.886505 TPM2 TCGLOG18. 0x76a16000 0x00010000
1672 11:28:30.889331 SMBIOS 19. 0x76a15000 0x00000800
1673 11:28:30.892945 IMD small region:
1674 11:28:30.896273 IMD ROOT 0. 0x76ffec00 0x00000400
1675 11:28:30.899395 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1676 11:28:30.906120 VPD 2. 0x76ffeb60 0x0000006c
1677 11:28:30.909598 POWER STATE 3. 0x76ffeb20 0x00000040
1678 11:28:30.912866 ROMSTAGE 4. 0x76ffeb00 0x00000004
1679 11:28:30.916425 MEM INFO 5. 0x76ffe920 0x000001e0
1680 11:28:30.923034 BS: BS_WRITE_TABLES run times (exec / console): 8 / 517 ms
1681 11:28:30.925917 MTRR: Physical address space:
1682 11:28:30.933048 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1683 11:28:30.936088 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1684 11:28:30.942797 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1685 11:28:30.949606 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1686 11:28:30.956115 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1687 11:28:30.962596 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1688 11:28:30.969914 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1689 11:28:30.972467 MTRR: Fixed MSR 0x250 0x0606060606060606
1690 11:28:30.975978 MTRR: Fixed MSR 0x258 0x0606060606060606
1691 11:28:30.983017 MTRR: Fixed MSR 0x259 0x0000000000000000
1692 11:28:30.985645 MTRR: Fixed MSR 0x268 0x0606060606060606
1693 11:28:30.989244 MTRR: Fixed MSR 0x269 0x0606060606060606
1694 11:28:30.992872 MTRR: Fixed MSR 0x26a 0x0606060606060606
1695 11:28:30.998992 MTRR: Fixed MSR 0x26b 0x0606060606060606
1696 11:28:31.002585 MTRR: Fixed MSR 0x26c 0x0606060606060606
1697 11:28:31.005793 MTRR: Fixed MSR 0x26d 0x0606060606060606
1698 11:28:31.008993 MTRR: Fixed MSR 0x26e 0x0606060606060606
1699 11:28:31.012303 MTRR: Fixed MSR 0x26f 0x0606060606060606
1700 11:28:31.016269 call enable_fixed_mtrr()
1701 11:28:31.019380 CPU physical address size: 39 bits
1702 11:28:31.025669 MTRR: default type WB/UC MTRR counts: 6/5.
1703 11:28:31.029320 MTRR: UC selected as default type.
1704 11:28:31.036077 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1705 11:28:31.039057 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1706 11:28:31.046044 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1707 11:28:31.052431 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1708 11:28:31.059090 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1709 11:28:31.059523
1710 11:28:31.062039 MTRR check
1711 11:28:31.062476 Fixed MTRRs : Enabled
1712 11:28:31.065424 Variable MTRRs: Enabled
1713 11:28:31.065954
1714 11:28:31.069159 MTRR: Fixed MSR 0x250 0x0606060606060606
1715 11:28:31.075172 MTRR: Fixed MSR 0x258 0x0606060606060606
1716 11:28:31.078604 MTRR: Fixed MSR 0x259 0x0000000000000000
1717 11:28:31.082017 MTRR: Fixed MSR 0x268 0x0606060606060606
1718 11:28:31.085267 MTRR: Fixed MSR 0x269 0x0606060606060606
1719 11:28:31.092225 MTRR: Fixed MSR 0x26a 0x0606060606060606
1720 11:28:31.095325 MTRR: Fixed MSR 0x26b 0x0606060606060606
1721 11:28:31.098794 MTRR: Fixed MSR 0x26c 0x0606060606060606
1722 11:28:31.101655 MTRR: Fixed MSR 0x26d 0x0606060606060606
1723 11:28:31.108119 MTRR: Fixed MSR 0x26e 0x0606060606060606
1724 11:28:31.111564 MTRR: Fixed MSR 0x26f 0x0606060606060606
1725 11:28:31.117971 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1726 11:28:31.118536 call enable_fixed_mtrr()
1727 11:28:31.122297 Checking cr50 for pending updates
1728 11:28:31.126508 CPU physical address size: 39 bits
1729 11:28:31.129715 Reading cr50 TPM mode
1730 11:28:31.140010 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1731 11:28:31.147258 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1732 11:28:31.150893 Checking segment from ROM address 0xfff9d5b8
1733 11:28:31.157011 Checking segment from ROM address 0xfff9d5d4
1734 11:28:31.160403 Loading segment from ROM address 0xfff9d5b8
1735 11:28:31.164265 code (compression=0)
1736 11:28:31.170697 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1737 11:28:31.180428 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1738 11:28:31.183957 it's not compressed!
1739 11:28:31.308888 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1740 11:28:31.315961 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1741 11:28:31.322770 Loading segment from ROM address 0xfff9d5d4
1742 11:28:31.326501 Entry Point 0x30000000
1743 11:28:31.326924 Loaded segments
1744 11:28:31.333037 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1745 11:28:31.348838 Finalizing chipset.
1746 11:28:31.352304 Finalizing SMM.
1747 11:28:31.352725 APMC done.
1748 11:28:31.358712 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1749 11:28:31.362003 mp_park_aps done after 0 msecs.
1750 11:28:31.365504 Jumping to boot code at 0x30000000(0x76b4b000)
1751 11:28:31.375355 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1752 11:28:31.375859
1753 11:28:31.376214
1754 11:28:31.376548
1755 11:28:31.378884 Starting depthcharge on Magolor...
1756 11:28:31.379314
1757 11:28:31.380377 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1758 11:28:31.380925 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1759 11:28:31.381363 Setting prompt string to ['dedede:']
1760 11:28:31.381795 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1761 11:28:31.388695 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1762 11:28:31.389119
1763 11:28:31.395313 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1764 11:28:31.395732
1765 11:28:31.398547 fw_config match found: AUDIO_AMP=UNPROVISIONED
1766 11:28:31.398961
1767 11:28:31.401712 Wipe memory regions:
1768 11:28:31.402090
1769 11:28:31.405530 [0x00000000001000, 0x000000000a0000)
1770 11:28:31.406054
1771 11:28:31.408347 [0x00000000100000, 0x00000030000000)
1772 11:28:31.537375
1773 11:28:31.540249 [0x00000031062170, 0x00000076a15000)
1774 11:28:31.710221
1775 11:28:31.713115 [0x00000100000000, 0x00000180400000)
1776 11:28:32.776341
1777 11:28:32.776918 R8152: Initializing
1778 11:28:32.777278
1779 11:28:32.780338 Version 9 (ocp_data = 6010)
1780 11:28:32.780882
1781 11:28:32.782762 R8152: Done initializing
1782 11:28:32.783216
1783 11:28:32.786157 Adding net device
1784 11:28:32.786662
1785 11:28:32.789548 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1786 11:28:32.790048
1787 11:28:32.793005
1788 11:28:32.793452
1789 11:28:32.794280 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1791 11:28:32.895686 dedede: tftpboot 192.168.201.1 13086420/tftp-deploy-noi6ha1g/kernel/bzImage 13086420/tftp-deploy-noi6ha1g/kernel/cmdline 13086420/tftp-deploy-noi6ha1g/ramdisk/ramdisk.cpio.gz
1792 11:28:32.896326 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1793 11:28:32.896745 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1794 11:28:32.901912 tftpboot 192.168.201.1 13086420/tftp-deploy-noi6ha1g/kernel/bzImploy-noi6ha1g/kernel/cmdline 13086420/tftp-deploy-noi6ha1g/ramdisk/ramdisk.cpio.gz
1795 11:28:32.902533
1796 11:28:32.902897 Waiting for link
1797 11:28:33.103776
1798 11:28:33.104293 done.
1799 11:28:33.104648
1800 11:28:33.105112 MAC: 00:e0:4c:75:0d:b4
1801 11:28:33.105457
1802 11:28:33.106746 Sending DHCP discover... done.
1803 11:28:33.107192
1804 11:28:33.110112 Waiting for reply... done.
1805 11:28:33.110607
1806 11:28:33.113797 Sending DHCP request... done.
1807 11:28:33.114345
1808 11:28:33.119944 Waiting for reply... done.
1809 11:28:33.120401
1810 11:28:33.120762 My ip is 192.168.201.20
1811 11:28:33.121098
1812 11:28:33.123607 The DHCP server ip is 192.168.201.1
1813 11:28:33.124187
1814 11:28:33.130262 TFTP server IP predefined by user: 192.168.201.1
1815 11:28:33.131104
1816 11:28:33.137106 Bootfile predefined by user: 13086420/tftp-deploy-noi6ha1g/kernel/bzImage
1817 11:28:33.137666
1818 11:28:33.140008 Sending tftp read request... done.
1819 11:28:33.140483
1820 11:28:33.148747 Waiting for the transfer...
1821 11:28:33.149207
1822 11:28:33.442916 00000000 ################################################################
1823 11:28:33.443049
1824 11:28:33.701676 00080000 ################################################################
1825 11:28:33.701831
1826 11:28:33.959626 00100000 ################################################################
1827 11:28:33.959763
1828 11:28:34.217673 00180000 ################################################################
1829 11:28:34.217827
1830 11:28:34.473419 00200000 ################################################################
1831 11:28:34.473553
1832 11:28:34.732198 00280000 ################################################################
1833 11:28:34.732332
1834 11:28:34.988427 00300000 ################################################################
1835 11:28:34.988580
1836 11:28:35.256899 00380000 ################################################################
1837 11:28:35.257032
1838 11:28:35.512282 00400000 ################################################################
1839 11:28:35.512422
1840 11:28:35.766560 00480000 ################################################################
1841 11:28:35.766722
1842 11:28:36.021476 00500000 ################################################################
1843 11:28:36.021609
1844 11:28:36.277907 00580000 ################################################################
1845 11:28:36.278038
1846 11:28:36.536733 00600000 ################################################################
1847 11:28:36.536958
1848 11:28:36.792234 00680000 ################################################################
1849 11:28:36.792414
1850 11:28:37.047718 00700000 ################################################################
1851 11:28:37.047846
1852 11:28:37.304967 00780000 ################################################################
1853 11:28:37.305091
1854 11:28:37.561750 00800000 ################################################################
1855 11:28:37.561906
1856 11:28:37.785231 00880000 ######################################################### done.
1857 11:28:37.785360
1858 11:28:37.788629 The bootfile was 9375632 bytes long.
1859 11:28:37.788711
1860 11:28:37.792143 Sending tftp read request... done.
1861 11:28:37.792225
1862 11:28:37.794934 Waiting for the transfer...
1863 11:28:37.795012
1864 11:28:38.059255 00000000 ################################################################
1865 11:28:38.059387
1866 11:28:38.317060 00080000 ################################################################
1867 11:28:38.317221
1868 11:28:38.572227 00100000 ################################################################
1869 11:28:38.572363
1870 11:28:38.828818 00180000 ################################################################
1871 11:28:38.828972
1872 11:28:39.086536 00200000 ################################################################
1873 11:28:39.086694
1874 11:28:39.343578 00280000 ################################################################
1875 11:28:39.343702
1876 11:28:39.599077 00300000 ################################################################
1877 11:28:39.599240
1878 11:28:39.857942 00380000 ################################################################
1879 11:28:39.858097
1880 11:28:40.116865 00400000 ################################################################
1881 11:28:40.116992
1882 11:28:40.373640 00480000 ################################################################
1883 11:28:40.373799
1884 11:28:40.626009 00500000 ############################################################### done.
1885 11:28:40.626153
1886 11:28:40.629073 Sending tftp read request... done.
1887 11:28:40.629153
1888 11:28:40.632449 Waiting for the transfer...
1889 11:28:40.632565
1890 11:28:40.632628 00000000 # done.
1891 11:28:40.632688
1892 11:28:40.642025 Command line loaded dynamically from TFTP file: 13086420/tftp-deploy-noi6ha1g/kernel/cmdline
1893 11:28:40.642134
1894 11:28:40.665395 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13086420/extract-nfsrootfs-jr1wqrh8,tcp,hard ip=dhcp tftpserverip=192.168.201.1
1895 11:28:40.665520
1896 11:28:40.671776 ec_init: CrosEC protocol v3 supported (256, 256)
1897 11:28:40.677893
1898 11:28:40.681155 Shutting down all USB controllers.
1899 11:28:40.681250
1900 11:28:40.681344 Removing current net device
1901 11:28:40.681432
1902 11:28:40.684171 Finalizing coreboot
1903 11:28:40.684253
1904 11:28:40.691371 Exiting depthcharge with code 4 at timestamp: 16112308
1905 11:28:40.691479
1906 11:28:40.691569
1907 11:28:40.691657 Starting kernel ...
1908 11:28:40.691742
1909 11:28:40.691826
1910 11:28:40.692417 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
1911 11:28:40.692542 start: 2.2.5 auto-login-action (timeout 00:04:38) [common]
1912 11:28:40.692645 Setting prompt string to ['Linux version [0-9]']
1913 11:28:40.692740 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1914 11:28:40.692833 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1916 11:33:18.693568 end: 2.2.5 auto-login-action (duration 00:04:38) [common]
1918 11:33:18.694710 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 278 seconds'
1920 11:33:18.695549 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1923 11:33:18.696934 end: 2 depthcharge-action (duration 00:05:00) [common]
1925 11:33:18.698114 Cleaning after the job
1926 11:33:18.698632 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086420/tftp-deploy-noi6ha1g/ramdisk
1927 11:33:18.703299 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086420/tftp-deploy-noi6ha1g/kernel
1928 11:33:18.710378 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086420/tftp-deploy-noi6ha1g/nfsrootfs
1929 11:33:18.791369 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086420/tftp-deploy-noi6ha1g/modules
1930 11:33:18.791892 start: 5.1 power-off (timeout 00:00:30) [common]
1931 11:33:18.792059 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-3' '--port=1' '--command=off'
1932 11:33:18.868628 >> Command sent successfully.
1933 11:33:18.872977 Returned 0 in 0 seconds
1934 11:33:18.973959 end: 5.1 power-off (duration 00:00:00) [common]
1936 11:33:18.975558 start: 5.2 read-feedback (timeout 00:10:00) [common]
1937 11:33:18.977152 Listened to connection for namespace 'common' for up to 1s
1939 11:33:18.978558 Listened to connection for namespace 'common' for up to 1s
1940 11:33:19.977710 Finalising connection for namespace 'common'
1941 11:33:19.978381 Disconnecting from shell: Finalise
1942 11:33:19.978851
1943 11:33:20.079964 end: 5.2 read-feedback (duration 00:00:01) [common]
1944 11:33:20.080565 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13086420
1945 11:33:20.433993 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13086420
1946 11:33:20.434192 JobError: Your job cannot terminate cleanly.