Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 11:29:20.048359 lava-dispatcher, installed at version: 2024.01
2 11:29:20.048605 start: 0 validate
3 11:29:20.048755 Start time: 2024-03-18 11:29:20.048746+00:00 (UTC)
4 11:29:20.048903 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:29:20.049047 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Finitrd.cpio.gz exists
6 11:29:20.307807 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:29:20.307994 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-3115-g0a25e06c1d85%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:29:20.556605 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:29:20.556785 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:29:20.824241 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:29:20.824436 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-3115-g0a25e06c1d85%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 11:29:21.082606 validate duration: 1.03
14 11:29:21.082913 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:29:21.083020 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:29:21.083114 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:29:21.083255 Not decompressing ramdisk as can be used compressed.
18 11:29:21.083349 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/initrd.cpio.gz
19 11:29:21.083420 saving as /var/lib/lava/dispatcher/tmp/13086481/tftp-deploy-ph24o8l6/ramdisk/initrd.cpio.gz
20 11:29:21.083490 total size: 5431448 (5 MB)
21 11:29:21.084616 progress 0 % (0 MB)
22 11:29:21.086571 progress 5 % (0 MB)
23 11:29:21.088169 progress 10 % (0 MB)
24 11:29:21.089770 progress 15 % (0 MB)
25 11:29:21.091560 progress 20 % (1 MB)
26 11:29:21.093185 progress 25 % (1 MB)
27 11:29:21.094803 progress 30 % (1 MB)
28 11:29:21.096560 progress 35 % (1 MB)
29 11:29:21.098142 progress 40 % (2 MB)
30 11:29:21.099734 progress 45 % (2 MB)
31 11:29:21.101321 progress 50 % (2 MB)
32 11:29:21.103078 progress 55 % (2 MB)
33 11:29:21.104654 progress 60 % (3 MB)
34 11:29:21.106227 progress 65 % (3 MB)
35 11:29:21.107987 progress 70 % (3 MB)
36 11:29:21.109554 progress 75 % (3 MB)
37 11:29:21.111115 progress 80 % (4 MB)
38 11:29:21.112679 progress 85 % (4 MB)
39 11:29:21.114434 progress 90 % (4 MB)
40 11:29:21.115983 progress 95 % (4 MB)
41 11:29:21.117562 progress 100 % (5 MB)
42 11:29:21.117793 5 MB downloaded in 0.03 s (151.00 MB/s)
43 11:29:21.117973 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:29:21.118243 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:29:21.118353 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:29:21.118451 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:29:21.118598 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-3115-g0a25e06c1d85/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 11:29:21.118681 saving as /var/lib/lava/dispatcher/tmp/13086481/tftp-deploy-ph24o8l6/kernel/bzImage
50 11:29:21.118750 total size: 9375632 (8 MB)
51 11:29:21.118818 No compression specified
52 11:29:21.120015 progress 0 % (0 MB)
53 11:29:21.122810 progress 5 % (0 MB)
54 11:29:21.125546 progress 10 % (0 MB)
55 11:29:21.128272 progress 15 % (1 MB)
56 11:29:21.131184 progress 20 % (1 MB)
57 11:29:21.133913 progress 25 % (2 MB)
58 11:29:21.136656 progress 30 % (2 MB)
59 11:29:21.139634 progress 35 % (3 MB)
60 11:29:21.142443 progress 40 % (3 MB)
61 11:29:21.145162 progress 45 % (4 MB)
62 11:29:21.148084 progress 50 % (4 MB)
63 11:29:21.150813 progress 55 % (4 MB)
64 11:29:21.153516 progress 60 % (5 MB)
65 11:29:21.156164 progress 65 % (5 MB)
66 11:29:21.159054 progress 70 % (6 MB)
67 11:29:21.161832 progress 75 % (6 MB)
68 11:29:21.164487 progress 80 % (7 MB)
69 11:29:21.167390 progress 85 % (7 MB)
70 11:29:21.170047 progress 90 % (8 MB)
71 11:29:21.172719 progress 95 % (8 MB)
72 11:29:21.175709 progress 100 % (8 MB)
73 11:29:21.175855 8 MB downloaded in 0.06 s (156.59 MB/s)
74 11:29:21.176057 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:29:21.176337 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:29:21.176436 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:29:21.176531 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:29:21.176680 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/full.rootfs.tar.xz
80 11:29:21.176756 saving as /var/lib/lava/dispatcher/tmp/13086481/tftp-deploy-ph24o8l6/nfsrootfs/full.rootfs.tar
81 11:29:21.176824 total size: 133429172 (127 MB)
82 11:29:21.176893 Using unxz to decompress xz
83 11:29:21.181413 progress 0 % (0 MB)
84 11:29:21.562094 progress 5 % (6 MB)
85 11:29:21.956719 progress 10 % (12 MB)
86 11:29:22.280593 progress 15 % (19 MB)
87 11:29:22.483195 progress 20 % (25 MB)
88 11:29:22.755388 progress 25 % (31 MB)
89 11:29:23.148932 progress 30 % (38 MB)
90 11:29:23.548815 progress 35 % (44 MB)
91 11:29:24.017649 progress 40 % (50 MB)
92 11:29:24.472137 progress 45 % (57 MB)
93 11:29:24.895995 progress 50 % (63 MB)
94 11:29:25.342368 progress 55 % (70 MB)
95 11:29:25.770600 progress 60 % (76 MB)
96 11:29:26.204152 progress 65 % (82 MB)
97 11:29:26.639405 progress 70 % (89 MB)
98 11:29:27.074393 progress 75 % (95 MB)
99 11:29:27.603572 progress 80 % (101 MB)
100 11:29:28.112588 progress 85 % (108 MB)
101 11:29:28.414304 progress 90 % (114 MB)
102 11:29:28.815239 progress 95 % (120 MB)
103 11:29:29.256873 progress 100 % (127 MB)
104 11:29:29.263879 127 MB downloaded in 8.09 s (15.73 MB/s)
105 11:29:29.264228 end: 1.3.1 http-download (duration 00:00:08) [common]
107 11:29:29.264570 end: 1.3 download-retry (duration 00:00:08) [common]
108 11:29:29.264673 start: 1.4 download-retry (timeout 00:09:52) [common]
109 11:29:29.264774 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 11:29:29.264960 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-3115-g0a25e06c1d85/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 11:29:29.265072 saving as /var/lib/lava/dispatcher/tmp/13086481/tftp-deploy-ph24o8l6/modules/modules.tar
112 11:29:29.265183 total size: 253492 (0 MB)
113 11:29:29.265289 Using unxz to decompress xz
114 11:29:29.269994 progress 12 % (0 MB)
115 11:29:29.270499 progress 25 % (0 MB)
116 11:29:29.270803 progress 38 % (0 MB)
117 11:29:29.272506 progress 51 % (0 MB)
118 11:29:29.274671 progress 64 % (0 MB)
119 11:29:29.276778 progress 77 % (0 MB)
120 11:29:29.278893 progress 90 % (0 MB)
121 11:29:29.280925 progress 100 % (0 MB)
122 11:29:29.287303 0 MB downloaded in 0.02 s (10.93 MB/s)
123 11:29:29.287649 end: 1.4.1 http-download (duration 00:00:00) [common]
125 11:29:29.288160 end: 1.4 download-retry (duration 00:00:00) [common]
126 11:29:29.288351 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 11:29:29.288533 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 11:29:32.185391 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/13086481/extract-nfsrootfs-gzwobq0_
129 11:29:32.185643 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 11:29:32.185796 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
131 11:29:32.186026 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l
132 11:29:32.186213 makedir: /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin
133 11:29:32.186368 makedir: /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/tests
134 11:29:32.186517 makedir: /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/results
135 11:29:32.186662 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-add-keys
136 11:29:32.186858 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-add-sources
137 11:29:32.187015 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-background-process-start
138 11:29:32.187161 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-background-process-stop
139 11:29:32.187306 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-common-functions
140 11:29:32.187447 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-echo-ipv4
141 11:29:32.187602 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-install-packages
142 11:29:32.187746 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-installed-packages
143 11:29:32.187890 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-os-build
144 11:29:32.188036 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-probe-channel
145 11:29:32.188210 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-probe-ip
146 11:29:32.188380 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-target-ip
147 11:29:32.188523 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-target-mac
148 11:29:32.188671 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-target-storage
149 11:29:32.188823 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-test-case
150 11:29:32.188973 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-test-event
151 11:29:32.189115 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-test-feedback
152 11:29:32.189261 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-test-raise
153 11:29:32.189409 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-test-reference
154 11:29:32.189552 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-test-runner
155 11:29:32.189697 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-test-set
156 11:29:32.189840 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-test-shell
157 11:29:32.189989 Updating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-install-packages (oe)
158 11:29:32.190191 Updating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/bin/lava-installed-packages (oe)
159 11:29:32.190332 Creating /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/environment
160 11:29:32.190440 LAVA metadata
161 11:29:32.190518 - LAVA_JOB_ID=13086481
162 11:29:32.190589 - LAVA_DISPATCHER_IP=192.168.201.1
163 11:29:32.190706 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
164 11:29:32.190782 skipped lava-vland-overlay
165 11:29:32.190866 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 11:29:32.190955 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
167 11:29:32.191032 skipped lava-multinode-overlay
168 11:29:32.191115 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 11:29:32.191204 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
170 11:29:32.191286 Loading test definitions
171 11:29:32.191384 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
172 11:29:32.191463 Using /lava-13086481 at stage 0
173 11:29:32.191810 uuid=13086481_1.5.2.3.1 testdef=None
174 11:29:32.191911 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 11:29:32.192006 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
176 11:29:32.192600 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 11:29:32.192845 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
179 11:29:32.193563 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 11:29:32.193822 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
182 11:29:32.194526 runner path: /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/0/tests/0_dmesg test_uuid 13086481_1.5.2.3.1
183 11:29:32.194708 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 11:29:32.194958 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
186 11:29:32.195038 Using /lava-13086481 at stage 1
187 11:29:32.195375 uuid=13086481_1.5.2.3.5 testdef=None
188 11:29:32.195474 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 11:29:32.195568 start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
190 11:29:32.196136 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 11:29:32.196578 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
193 11:29:32.197304 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 11:29:32.197556 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
196 11:29:32.198254 runner path: /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/1/tests/1_bootrr test_uuid 13086481_1.5.2.3.5
197 11:29:32.198427 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 11:29:32.198651 Creating lava-test-runner.conf files
200 11:29:32.198721 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/0 for stage 0
201 11:29:32.198826 - 0_dmesg
202 11:29:32.198915 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13086481/lava-overlay-3k1x1l3l/lava-13086481/1 for stage 1
203 11:29:32.199019 - 1_bootrr
204 11:29:32.199125 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 11:29:32.199221 start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
206 11:29:32.207390 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 11:29:32.207507 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
208 11:29:32.207603 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 11:29:32.207702 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 11:29:32.207798 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
211 11:29:32.363645 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 11:29:32.364051 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
213 11:29:32.364179 extracting modules file /var/lib/lava/dispatcher/tmp/13086481/tftp-deploy-ph24o8l6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13086481/extract-nfsrootfs-gzwobq0_
214 11:29:32.379732 extracting modules file /var/lib/lava/dispatcher/tmp/13086481/tftp-deploy-ph24o8l6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13086481/extract-overlay-ramdisk-prkon8oa/ramdisk
215 11:29:32.394941 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 11:29:32.395088 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
217 11:29:32.395189 [common] Applying overlay to NFS
218 11:29:32.395267 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13086481/compress-overlay-bluefm3h/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13086481/extract-nfsrootfs-gzwobq0_
219 11:29:32.404470 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 11:29:32.404601 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
221 11:29:32.404705 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 11:29:32.404807 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
223 11:29:32.404897 Building ramdisk /var/lib/lava/dispatcher/tmp/13086481/extract-overlay-ramdisk-prkon8oa/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13086481/extract-overlay-ramdisk-prkon8oa/ramdisk
224 11:29:32.484976 >> 26189 blocks
225 11:29:33.096665 rename /var/lib/lava/dispatcher/tmp/13086481/extract-overlay-ramdisk-prkon8oa/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13086481/tftp-deploy-ph24o8l6/ramdisk/ramdisk.cpio.gz
226 11:29:33.097173 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 11:29:33.097356 start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
228 11:29:33.097509 start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
229 11:29:33.097654 No mkimage arch provided, not using FIT.
230 11:29:33.097794 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 11:29:33.097942 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 11:29:33.098104 end: 1.5 prepare-tftp-overlay (duration 00:00:04) [common]
233 11:29:33.098242 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:48) [common]
234 11:29:33.098363 No LXC device requested
235 11:29:33.098489 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 11:29:33.098633 start: 1.7 deploy-device-env (timeout 00:09:48) [common]
237 11:29:33.098732 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 11:29:33.098819 Checking files for TFTP limit of 4294967296 bytes.
239 11:29:33.099354 end: 1 tftp-deploy (duration 00:00:12) [common]
240 11:29:33.099480 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 11:29:33.099585 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 11:29:33.099729 substitutions:
243 11:29:33.099821 - {DTB}: None
244 11:29:33.099896 - {INITRD}: 13086481/tftp-deploy-ph24o8l6/ramdisk/ramdisk.cpio.gz
245 11:29:33.099966 - {KERNEL}: 13086481/tftp-deploy-ph24o8l6/kernel/bzImage
246 11:29:33.100032 - {LAVA_MAC}: None
247 11:29:33.100097 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/13086481/extract-nfsrootfs-gzwobq0_
248 11:29:33.100164 - {NFS_SERVER_IP}: 192.168.201.1
249 11:29:33.100227 - {PRESEED_CONFIG}: None
250 11:29:33.100306 - {PRESEED_LOCAL}: None
251 11:29:33.100371 - {RAMDISK}: 13086481/tftp-deploy-ph24o8l6/ramdisk/ramdisk.cpio.gz
252 11:29:33.100434 - {ROOT_PART}: None
253 11:29:33.100518 - {ROOT}: None
254 11:29:33.100581 - {SERVER_IP}: 192.168.201.1
255 11:29:33.100643 - {TEE}: None
256 11:29:33.100703 Parsed boot commands:
257 11:29:33.100765 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 11:29:33.100972 Parsed boot commands: tftpboot 192.168.201.1 13086481/tftp-deploy-ph24o8l6/kernel/bzImage 13086481/tftp-deploy-ph24o8l6/kernel/cmdline 13086481/tftp-deploy-ph24o8l6/ramdisk/ramdisk.cpio.gz
259 11:29:33.101080 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 11:29:33.101194 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 11:29:33.101298 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 11:29:33.101397 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 11:29:33.101481 Not connected, no need to disconnect.
264 11:29:33.101568 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 11:29:33.101663 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 11:29:33.101766 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
267 11:29:33.106096 Setting prompt string to ['lava-test: # ']
268 11:29:33.106561 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 11:29:33.106726 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 11:29:33.106874 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 11:29:33.106986 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 11:29:33.107213 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
273 11:29:38.246143 >> Command sent successfully.
274 11:29:38.248930 Returned 0 in 5 seconds
275 11:29:38.349351 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 11:29:38.349812 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 11:29:38.349958 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 11:29:38.350090 Setting prompt string to 'Starting depthcharge on Helios...'
280 11:29:38.350210 Changing prompt to 'Starting depthcharge on Helios...'
281 11:29:38.350322 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 11:29:38.350730 [Enter `^Ec?' for help]
283 11:29:38.970561
284 11:29:38.970716
285 11:29:38.980908 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 11:29:38.983875 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 11:29:38.990621 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 11:29:38.993835 CPU: AES supported, TXT NOT supported, VT supported
289 11:29:39.000423 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 11:29:39.004303 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 11:29:39.010772 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 11:29:39.014139 VBOOT: Loading verstage.
293 11:29:39.017433 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 11:29:39.023927 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 11:29:39.027529 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 11:29:39.030650 CBFS @ c08000 size 3f8000
297 11:29:39.037426 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 11:29:39.040877 CBFS: Locating 'fallback/verstage'
299 11:29:39.043945 CBFS: Found @ offset 10fb80 size 1072c
300 11:29:39.047723
301 11:29:39.047820
302 11:29:39.057253 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 11:29:39.071481 Probing TPM: . done!
304 11:29:39.074853 TPM ready after 0 ms
305 11:29:39.078643 Connected to device vid:did:rid of 1ae0:0028:00
306 11:29:39.089037 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
307 11:29:39.092109 Initialized TPM device CR50 revision 0
308 11:29:39.136899 tlcl_send_startup: Startup return code is 0
309 11:29:39.137011 TPM: setup succeeded
310 11:29:39.149512 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 11:29:39.153480 Chrome EC: UHEPI supported
312 11:29:39.156699 Phase 1
313 11:29:39.159866 FMAP: area GBB found @ c05000 (12288 bytes)
314 11:29:39.166239 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 11:29:39.170132 Phase 2
316 11:29:39.170258 Phase 3
317 11:29:39.173340 FMAP: area GBB found @ c05000 (12288 bytes)
318 11:29:39.180082 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 11:29:39.186731 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
320 11:29:39.189919 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
321 11:29:39.196410 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 11:29:39.212352 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
323 11:29:39.214952 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
324 11:29:39.222153 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 11:29:39.226132 Phase 4
326 11:29:39.229462 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
327 11:29:39.235923 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 11:29:39.415374 VB2:vb2_rsa_verify_digest() Digest check failed!
329 11:29:39.422328 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 11:29:39.422442 Saving nvdata
331 11:29:39.425628 Reboot requested (10020007)
332 11:29:39.428840 board_reset() called!
333 11:29:39.428935 full_reset() called!
334 11:29:43.946649 ���6ȶevel: 8)...
335 11:29:43.950757 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
336 11:29:43.957394 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
337 11:29:43.960637 CPU: AES supported, TXT NOT supported, VT supported
338 11:29:43.968512 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
339 11:29:43.971709 PCH: device id 0284 (rev 00) is Cometlake-U Premium
340 11:29:43.975462 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
341 11:29:43.980540 VBOOT: Loading verstage.
342 11:29:43.984090 FMAP: Found "FLASH" version 1.1 at 0xc04000.
343 11:29:43.991216 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
344 11:29:43.995123 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
345 11:29:43.998509 CBFS @ c08000 size 3f8000
346 11:29:44.002490 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
347 11:29:44.006307 CBFS: Locating 'fallback/verstage'
348 11:29:44.010303 CBFS: Found @ offset 10fb80 size 1072c
349 11:29:44.014636
350 11:29:44.014729
351 11:29:44.022317 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
352 11:29:44.039318 Probing TPM: . done!
353 11:29:44.039429 TPM ready after 0 ms
354 11:29:44.048158 Connected to device vid:did:rid of 1ae0:0028:00
355 11:29:44.056814 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
356 11:29:44.111118 Initialized TPM device CR50 revision 0
357 11:29:44.120155 tlcl_send_startup: Startup return code is 0
358 11:29:44.120263 TPM: setup succeeded
359 11:29:44.132880 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
360 11:29:44.136839 Chrome EC: UHEPI supported
361 11:29:44.139637 Phase 1
362 11:29:44.143123 FMAP: area GBB found @ c05000 (12288 bytes)
363 11:29:44.150289 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
364 11:29:44.156335 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
365 11:29:44.159691 Recovery requested (1009000e)
366 11:29:44.159818 Saving nvdata
367 11:29:44.171596 tlcl_extend: response is 0
368 11:29:44.180423 tlcl_extend: response is 0
369 11:29:44.187505 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
370 11:29:44.190776 CBFS @ c08000 size 3f8000
371 11:29:44.197466 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
372 11:29:44.200696 CBFS: Locating 'fallback/romstage'
373 11:29:44.203939 CBFS: Found @ offset 80 size 145fc
374 11:29:44.207258 Accumulated console time in verstage 98 ms
375 11:29:44.207352
376 11:29:44.207426
377 11:29:44.220977 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
378 11:29:44.227307 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
379 11:29:44.230390 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
380 11:29:44.233552 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
381 11:29:44.240954 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
382 11:29:44.244004 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
383 11:29:44.247196 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
384 11:29:44.250636 TCO_STS: 0000 0000
385 11:29:44.253891 GEN_PMCON: e0015238 00000200
386 11:29:44.256917 GBLRST_CAUSE: 00000000 00000000
387 11:29:44.257013 prev_sleep_state 5
388 11:29:44.260096 Boot Count incremented to 72693
389 11:29:44.267066 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
390 11:29:44.270310 CBFS @ c08000 size 3f8000
391 11:29:44.276918 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
392 11:29:44.277018 CBFS: Locating 'fspm.bin'
393 11:29:44.280177 CBFS: Found @ offset 5ffc0 size 71000
394 11:29:44.284956 Chrome EC: UHEPI supported
395 11:29:44.292124 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
396 11:29:44.297152 Probing TPM: done!
397 11:29:44.303572 Connected to device vid:did:rid of 1ae0:0028:00
398 11:29:44.314064 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
399 11:29:44.319243 Initialized TPM device CR50 revision 0
400 11:29:44.328298 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
401 11:29:44.335388 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
402 11:29:44.338572 MRC cache found, size 1948
403 11:29:44.341820 bootmode is set to: 2
404 11:29:44.345109 PRMRR disabled by config.
405 11:29:44.345203 SPD INDEX = 1
406 11:29:44.351765 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
407 11:29:44.355033 CBFS @ c08000 size 3f8000
408 11:29:44.361805 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
409 11:29:44.361901 CBFS: Locating 'spd.bin'
410 11:29:44.365120 CBFS: Found @ offset 5fb80 size 400
411 11:29:44.368387 SPD: module type is LPDDR3
412 11:29:44.371766 SPD: module part is
413 11:29:44.378044 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
414 11:29:44.381463 SPD: device width 4 bits, bus width 8 bits
415 11:29:44.384841 SPD: module size is 4096 MB (per channel)
416 11:29:44.388081 memory slot: 0 configuration done.
417 11:29:44.391118 memory slot: 2 configuration done.
418 11:29:44.443240 CBMEM:
419 11:29:44.446490 IMD: root @ 99fff000 254 entries.
420 11:29:44.449774 IMD: root @ 99ffec00 62 entries.
421 11:29:44.453016 External stage cache:
422 11:29:44.456531 IMD: root @ 9abff000 254 entries.
423 11:29:44.460000 IMD: root @ 9abfec00 62 entries.
424 11:29:44.462771 Chrome EC: clear events_b mask to 0x0000000020004000
425 11:29:44.479353 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
426 11:29:44.492774 tlcl_write: response is 0
427 11:29:44.501647 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 11:29:44.508171 MRC: TPM MRC hash updated successfully.
429 11:29:44.508282 2 DIMMs found
430 11:29:44.511397 SMM Memory Map
431 11:29:44.514885 SMRAM : 0x9a000000 0x1000000
432 11:29:44.518044 Subregion 0: 0x9a000000 0xa00000
433 11:29:44.521565 Subregion 1: 0x9aa00000 0x200000
434 11:29:44.524930 Subregion 2: 0x9ac00000 0x400000
435 11:29:44.528081 top_of_ram = 0x9a000000
436 11:29:44.531257 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
437 11:29:44.537965 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
438 11:29:44.541110 MTRR Range: Start=ff000000 End=0 (Size 1000000)
439 11:29:44.547961 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 11:29:44.551451 CBFS @ c08000 size 3f8000
441 11:29:44.554481 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 11:29:44.558313 CBFS: Locating 'fallback/postcar'
443 11:29:44.561734 CBFS: Found @ offset 107000 size 4b44
444 11:29:44.567914 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
445 11:29:44.579957 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
446 11:29:44.583423 Processing 180 relocs. Offset value of 0x97c0c000
447 11:29:44.592105 Accumulated console time in romstage 285 ms
448 11:29:44.592202
449 11:29:44.592290
450 11:29:44.601566 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
451 11:29:44.608184 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
452 11:29:44.612159 CBFS @ c08000 size 3f8000
453 11:29:44.615454 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
454 11:29:44.621742 CBFS: Locating 'fallback/ramstage'
455 11:29:44.625284 CBFS: Found @ offset 43380 size 1b9e8
456 11:29:44.631982 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
457 11:29:44.663887 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
458 11:29:44.666955 Processing 3976 relocs. Offset value of 0x98db0000
459 11:29:44.673659 Accumulated console time in postcar 52 ms
460 11:29:44.673780
461 11:29:44.673885
462 11:29:44.683339 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
463 11:29:44.690018 FMAP: area RO_VPD found @ c00000 (16384 bytes)
464 11:29:44.693359 WARNING: RO_VPD is uninitialized or empty.
465 11:29:44.696858 FMAP: area RW_VPD found @ af8000 (8192 bytes)
466 11:29:44.703313 FMAP: area RW_VPD found @ af8000 (8192 bytes)
467 11:29:44.703407 Normal boot.
468 11:29:44.709872 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
469 11:29:44.713173 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
470 11:29:44.716567 CBFS @ c08000 size 3f8000
471 11:29:44.723179 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
472 11:29:44.726459 CBFS: Locating 'cpu_microcode_blob.bin'
473 11:29:44.730355 CBFS: Found @ offset 14700 size 2ec00
474 11:29:44.733485 microcode: sig=0x806ec pf=0x4 revision=0xc9
475 11:29:44.736803 Skip microcode update
476 11:29:44.739979 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
477 11:29:44.743285 CBFS @ c08000 size 3f8000
478 11:29:44.750239 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
479 11:29:44.753285 CBFS: Locating 'fsps.bin'
480 11:29:44.756860 CBFS: Found @ offset d1fc0 size 35000
481 11:29:44.781537 Detected 4 core, 8 thread CPU.
482 11:29:44.785161 Setting up SMI for CPU
483 11:29:44.788665 IED base = 0x9ac00000
484 11:29:44.788754 IED size = 0x00400000
485 11:29:44.791600 Will perform SMM setup.
486 11:29:44.798127 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
487 11:29:44.805106 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
488 11:29:44.808327 Processing 16 relocs. Offset value of 0x00030000
489 11:29:44.812208 Attempting to start 7 APs
490 11:29:44.815693 Waiting for 10ms after sending INIT.
491 11:29:44.831718 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
492 11:29:44.831814 done.
493 11:29:44.835179 AP: slot 5 apic_id 7.
494 11:29:44.838486 AP: slot 2 apic_id 6.
495 11:29:44.838581 AP: slot 7 apic_id 4.
496 11:29:44.841872 AP: slot 6 apic_id 5.
497 11:29:44.844831 Waiting for 2nd SIPI to complete...done.
498 11:29:44.848420 AP: slot 1 apic_id 2.
499 11:29:44.851633 AP: slot 4 apic_id 3.
500 11:29:44.858206 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
501 11:29:44.861396 Processing 13 relocs. Offset value of 0x00038000
502 11:29:44.868282 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
503 11:29:44.874929 Installing SMM handler to 0x9a000000
504 11:29:44.881546 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
505 11:29:44.884802 Processing 658 relocs. Offset value of 0x9a010000
506 11:29:44.894962 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
507 11:29:44.898134 Processing 13 relocs. Offset value of 0x9a008000
508 11:29:44.904811 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
509 11:29:44.911317 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
510 11:29:44.914286 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
511 11:29:44.921307 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
512 11:29:44.927692 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
513 11:29:44.934389 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
514 11:29:44.937577 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
515 11:29:44.944266 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
516 11:29:44.947607 Clearing SMI status registers
517 11:29:44.951399 SMI_STS: PM1
518 11:29:44.951493 PM1_STS: PWRBTN
519 11:29:44.954681 TCO_STS: SECOND_TO
520 11:29:44.957566 New SMBASE 0x9a000000
521 11:29:44.957662 In relocation handler: CPU 0
522 11:29:44.964778 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
523 11:29:44.967575 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 11:29:44.970956 Relocation complete.
525 11:29:44.974393 New SMBASE 0x99fff400
526 11:29:44.974489 In relocation handler: CPU 3
527 11:29:44.981169 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
528 11:29:44.984775 Writing SMRR. base = 0x9a000006, mask=0xff000800
529 11:29:44.988078 Relocation complete.
530 11:29:44.988176 New SMBASE 0x99fff000
531 11:29:44.991284 In relocation handler: CPU 4
532 11:29:44.997519 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
533 11:29:45.000843 Writing SMRR. base = 0x9a000006, mask=0xff000800
534 11:29:45.004166 Relocation complete.
535 11:29:45.004270 New SMBASE 0x99fffc00
536 11:29:45.008108 In relocation handler: CPU 1
537 11:29:45.011435 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
538 11:29:45.017773 Writing SMRR. base = 0x9a000006, mask=0xff000800
539 11:29:45.020865 Relocation complete.
540 11:29:45.020959 New SMBASE 0x99ffe400
541 11:29:45.024628 In relocation handler: CPU 7
542 11:29:45.028042 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
543 11:29:45.034490 Writing SMRR. base = 0x9a000006, mask=0xff000800
544 11:29:45.034583 Relocation complete.
545 11:29:45.037863 New SMBASE 0x99ffe800
546 11:29:45.041077 In relocation handler: CPU 6
547 11:29:45.044349 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
548 11:29:45.051011 Writing SMRR. base = 0x9a000006, mask=0xff000800
549 11:29:45.051105 Relocation complete.
550 11:29:45.054437 New SMBASE 0x99ffec00
551 11:29:45.057750 In relocation handler: CPU 5
552 11:29:45.061020 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
553 11:29:45.067645 Writing SMRR. base = 0x9a000006, mask=0xff000800
554 11:29:45.067739 Relocation complete.
555 11:29:45.071164 New SMBASE 0x99fff800
556 11:29:45.074457 In relocation handler: CPU 2
557 11:29:45.077875 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
558 11:29:45.084664 Writing SMRR. base = 0x9a000006, mask=0xff000800
559 11:29:45.084759 Relocation complete.
560 11:29:45.087913 Initializing CPU #0
561 11:29:45.091296 CPU: vendor Intel device 806ec
562 11:29:45.094517 CPU: family 06, model 8e, stepping 0c
563 11:29:45.097417 Clearing out pending MCEs
564 11:29:45.100774 Setting up local APIC...
565 11:29:45.100867 apic_id: 0x00 done.
566 11:29:45.104109 Turbo is available but hidden
567 11:29:45.107549 Turbo is available and visible
568 11:29:45.110670 VMX status: enabled
569 11:29:45.114021 IA32_FEATURE_CONTROL status: locked
570 11:29:45.114114 Skip microcode update
571 11:29:45.117414 CPU #0 initialized
572 11:29:45.121195 Initializing CPU #3
573 11:29:45.121288 Initializing CPU #7
574 11:29:45.124324 Initializing CPU #6
575 11:29:45.127457 CPU: vendor Intel device 806ec
576 11:29:45.130559 CPU: family 06, model 8e, stepping 0c
577 11:29:45.133912 CPU: vendor Intel device 806ec
578 11:29:45.137214 CPU: family 06, model 8e, stepping 0c
579 11:29:45.141014 Clearing out pending MCEs
580 11:29:45.144058 Clearing out pending MCEs
581 11:29:45.144151 Setting up local APIC...
582 11:29:45.147595 Initializing CPU #1
583 11:29:45.150970 Initializing CPU #4
584 11:29:45.154346 CPU: vendor Intel device 806ec
585 11:29:45.157701 CPU: family 06, model 8e, stepping 0c
586 11:29:45.161120 CPU: vendor Intel device 806ec
587 11:29:45.163817 CPU: family 06, model 8e, stepping 0c
588 11:29:45.167044 Clearing out pending MCEs
589 11:29:45.167137 Clearing out pending MCEs
590 11:29:45.170426 Setting up local APIC...
591 11:29:45.174232 CPU: vendor Intel device 806ec
592 11:29:45.177280 CPU: family 06, model 8e, stepping 0c
593 11:29:45.180636 Clearing out pending MCEs
594 11:29:45.183850 Setting up local APIC...
595 11:29:45.187156 Setting up local APIC...
596 11:29:45.187249 apic_id: 0x02 done.
597 11:29:45.190523 apic_id: 0x03 done.
598 11:29:45.190616 VMX status: enabled
599 11:29:45.193866 VMX status: enabled
600 11:29:45.197252 IA32_FEATURE_CONTROL status: locked
601 11:29:45.200605 IA32_FEATURE_CONTROL status: locked
602 11:29:45.203827 Skip microcode update
603 11:29:45.207143 Skip microcode update
604 11:29:45.207266 CPU #1 initialized
605 11:29:45.210577 CPU #4 initialized
606 11:29:45.210671 apic_id: 0x04 done.
607 11:29:45.213783 Setting up local APIC...
608 11:29:45.217234 apic_id: 0x01 done.
609 11:29:45.217328 Initializing CPU #5
610 11:29:45.220627 Initializing CPU #2
611 11:29:45.224091 CPU: vendor Intel device 806ec
612 11:29:45.226728 CPU: family 06, model 8e, stepping 0c
613 11:29:45.230403 CPU: vendor Intel device 806ec
614 11:29:45.233442 CPU: family 06, model 8e, stepping 0c
615 11:29:45.236968 Clearing out pending MCEs
616 11:29:45.240199 Clearing out pending MCEs
617 11:29:45.240303 VMX status: enabled
618 11:29:45.243456 apic_id: 0x05 done.
619 11:29:45.247026 IA32_FEATURE_CONTROL status: locked
620 11:29:45.250179 VMX status: enabled
621 11:29:45.250272 Skip microcode update
622 11:29:45.253712 VMX status: enabled
623 11:29:45.256708 Setting up local APIC...
624 11:29:45.260110 IA32_FEATURE_CONTROL status: locked
625 11:29:45.260220 CPU #7 initialized
626 11:29:45.263857 Skip microcode update
627 11:29:45.266824 Setting up local APIC...
628 11:29:45.266917 CPU #6 initialized
629 11:29:45.270065 apic_id: 0x06 done.
630 11:29:45.273451 apic_id: 0x07 done.
631 11:29:45.273545 VMX status: enabled
632 11:29:45.276860 VMX status: enabled
633 11:29:45.280171 IA32_FEATURE_CONTROL status: locked
634 11:29:45.283233 IA32_FEATURE_CONTROL status: locked
635 11:29:45.286715 Skip microcode update
636 11:29:45.290113 Skip microcode update
637 11:29:45.290206 CPU #2 initialized
638 11:29:45.293548 CPU #5 initialized
639 11:29:45.296858 IA32_FEATURE_CONTROL status: locked
640 11:29:45.296951 Skip microcode update
641 11:29:45.300277 CPU #3 initialized
642 11:29:45.303661 bsp_do_flight_plan done after 457 msecs.
643 11:29:45.307163 CPU: frequency set to 4200 MHz
644 11:29:45.309790 Enabling SMIs.
645 11:29:45.309883 Locking SMM.
646 11:29:45.325826 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
647 11:29:45.329151 CBFS @ c08000 size 3f8000
648 11:29:45.335769 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
649 11:29:45.335865 CBFS: Locating 'vbt.bin'
650 11:29:45.339215 CBFS: Found @ offset 5f5c0 size 499
651 11:29:45.345765 Found a VBT of 4608 bytes after decompression
652 11:29:45.527140 Display FSP Version Info HOB
653 11:29:45.530467 Reference Code - CPU = 9.0.1e.30
654 11:29:45.533944 uCode Version = 0.0.0.ca
655 11:29:45.537313 TXT ACM version = ff.ff.ff.ffff
656 11:29:45.540673 Display FSP Version Info HOB
657 11:29:45.543992 Reference Code - ME = 9.0.1e.30
658 11:29:45.547410 MEBx version = 0.0.0.0
659 11:29:45.550985 ME Firmware Version = Consumer SKU
660 11:29:45.554181 Display FSP Version Info HOB
661 11:29:45.557469 Reference Code - CML PCH = 9.0.1e.30
662 11:29:45.560862 PCH-CRID Status = Disabled
663 11:29:45.564355 PCH-CRID Original Value = ff.ff.ff.ffff
664 11:29:45.567730 PCH-CRID New Value = ff.ff.ff.ffff
665 11:29:45.570396 OPROM - RST - RAID = ff.ff.ff.ffff
666 11:29:45.573920 ChipsetInit Base Version = ff.ff.ff.ffff
667 11:29:45.577164 ChipsetInit Oem Version = ff.ff.ff.ffff
668 11:29:45.580725 Display FSP Version Info HOB
669 11:29:45.587062 Reference Code - SA - System Agent = 9.0.1e.30
670 11:29:45.587157 Reference Code - MRC = 0.7.1.6c
671 11:29:45.590513 SA - PCIe Version = 9.0.1e.30
672 11:29:45.593839 SA-CRID Status = Disabled
673 11:29:45.597703 SA-CRID Original Value = 0.0.0.c
674 11:29:45.600483 SA-CRID New Value = 0.0.0.c
675 11:29:45.603922 OPROM - VBIOS = ff.ff.ff.ffff
676 11:29:45.604017 RTC Init
677 11:29:45.610677 Set power on after power failure.
678 11:29:45.610786 Disabling Deep S3
679 11:29:45.613959 Disabling Deep S3
680 11:29:45.614085 Disabling Deep S4
681 11:29:45.617269 Disabling Deep S4
682 11:29:45.617362 Disabling Deep S5
683 11:29:45.620598 Disabling Deep S5
684 11:29:45.627657 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
685 11:29:45.627792 Enumerating buses...
686 11:29:45.633933 Show all devs... Before device enumeration.
687 11:29:45.634034 Root Device: enabled 1
688 11:29:45.637403 CPU_CLUSTER: 0: enabled 1
689 11:29:45.640395 DOMAIN: 0000: enabled 1
690 11:29:45.640503 APIC: 00: enabled 1
691 11:29:45.644188 PCI: 00:00.0: enabled 1
692 11:29:45.647408 PCI: 00:02.0: enabled 1
693 11:29:45.650941 PCI: 00:04.0: enabled 0
694 11:29:45.651038 PCI: 00:05.0: enabled 0
695 11:29:45.654266 PCI: 00:12.0: enabled 1
696 11:29:45.657235 PCI: 00:12.5: enabled 0
697 11:29:45.660550 PCI: 00:12.6: enabled 0
698 11:29:45.660701 PCI: 00:14.0: enabled 1
699 11:29:45.663776 PCI: 00:14.1: enabled 0
700 11:29:45.667338 PCI: 00:14.3: enabled 1
701 11:29:45.667455 PCI: 00:14.5: enabled 0
702 11:29:45.670588 PCI: 00:15.0: enabled 1
703 11:29:45.674087 PCI: 00:15.1: enabled 1
704 11:29:45.677392 PCI: 00:15.2: enabled 0
705 11:29:45.677543 PCI: 00:15.3: enabled 0
706 11:29:45.680807 PCI: 00:16.0: enabled 1
707 11:29:45.683937 PCI: 00:16.1: enabled 0
708 11:29:45.687137 PCI: 00:16.2: enabled 0
709 11:29:45.687239 PCI: 00:16.3: enabled 0
710 11:29:45.690426 PCI: 00:16.4: enabled 0
711 11:29:45.693768 PCI: 00:16.5: enabled 0
712 11:29:45.697046 PCI: 00:17.0: enabled 1
713 11:29:45.697143 PCI: 00:19.0: enabled 1
714 11:29:45.700186 PCI: 00:19.1: enabled 0
715 11:29:45.703469 PCI: 00:19.2: enabled 0
716 11:29:45.703582 PCI: 00:1a.0: enabled 0
717 11:29:45.706835 PCI: 00:1c.0: enabled 0
718 11:29:45.710176 PCI: 00:1c.1: enabled 0
719 11:29:45.713588 PCI: 00:1c.2: enabled 0
720 11:29:45.713699 PCI: 00:1c.3: enabled 0
721 11:29:45.717016 PCI: 00:1c.4: enabled 0
722 11:29:45.720291 PCI: 00:1c.5: enabled 0
723 11:29:45.723700 PCI: 00:1c.6: enabled 0
724 11:29:45.723797 PCI: 00:1c.7: enabled 0
725 11:29:45.727058 PCI: 00:1d.0: enabled 1
726 11:29:45.729750 PCI: 00:1d.1: enabled 0
727 11:29:45.733094 PCI: 00:1d.2: enabled 0
728 11:29:45.733214 PCI: 00:1d.3: enabled 0
729 11:29:45.736855 PCI: 00:1d.4: enabled 0
730 11:29:45.740163 PCI: 00:1d.5: enabled 1
731 11:29:45.743673 PCI: 00:1e.0: enabled 1
732 11:29:45.743799 PCI: 00:1e.1: enabled 0
733 11:29:45.746761 PCI: 00:1e.2: enabled 1
734 11:29:45.749958 PCI: 00:1e.3: enabled 1
735 11:29:45.750077 PCI: 00:1f.0: enabled 1
736 11:29:45.753538 PCI: 00:1f.1: enabled 1
737 11:29:45.756590 PCI: 00:1f.2: enabled 1
738 11:29:45.759887 PCI: 00:1f.3: enabled 1
739 11:29:45.760013 PCI: 00:1f.4: enabled 1
740 11:29:45.763148 PCI: 00:1f.5: enabled 1
741 11:29:45.766916 PCI: 00:1f.6: enabled 0
742 11:29:45.769890 USB0 port 0: enabled 1
743 11:29:45.770015 I2C: 00:15: enabled 1
744 11:29:45.772933 I2C: 00:5d: enabled 1
745 11:29:45.776491 GENERIC: 0.0: enabled 1
746 11:29:45.776622 I2C: 00:1a: enabled 1
747 11:29:45.779668 I2C: 00:38: enabled 1
748 11:29:45.783116 I2C: 00:39: enabled 1
749 11:29:45.783220 I2C: 00:3a: enabled 1
750 11:29:45.786609 I2C: 00:3b: enabled 1
751 11:29:45.789612 PCI: 00:00.0: enabled 1
752 11:29:45.789713 SPI: 00: enabled 1
753 11:29:45.793369 SPI: 01: enabled 1
754 11:29:45.796534 PNP: 0c09.0: enabled 1
755 11:29:45.796627 USB2 port 0: enabled 1
756 11:29:45.799782 USB2 port 1: enabled 1
757 11:29:45.803160 USB2 port 2: enabled 0
758 11:29:45.806269 USB2 port 3: enabled 0
759 11:29:45.806390 USB2 port 5: enabled 0
760 11:29:45.809746 USB2 port 6: enabled 1
761 11:29:45.813215 USB2 port 9: enabled 1
762 11:29:45.813338 USB3 port 0: enabled 1
763 11:29:45.816028 USB3 port 1: enabled 1
764 11:29:45.819325 USB3 port 2: enabled 1
765 11:29:45.819450 USB3 port 3: enabled 1
766 11:29:45.822714 USB3 port 4: enabled 0
767 11:29:45.826105 APIC: 02: enabled 1
768 11:29:45.826199 APIC: 06: enabled 1
769 11:29:45.829451 APIC: 01: enabled 1
770 11:29:45.832752 APIC: 03: enabled 1
771 11:29:45.832881 APIC: 07: enabled 1
772 11:29:45.836126 APIC: 05: enabled 1
773 11:29:45.836235 APIC: 04: enabled 1
774 11:29:45.839405 Compare with tree...
775 11:29:45.842573 Root Device: enabled 1
776 11:29:45.845733 CPU_CLUSTER: 0: enabled 1
777 11:29:45.845826 APIC: 00: enabled 1
778 11:29:45.849173 APIC: 02: enabled 1
779 11:29:45.852854 APIC: 06: enabled 1
780 11:29:45.852948 APIC: 01: enabled 1
781 11:29:45.856061 APIC: 03: enabled 1
782 11:29:45.859366 APIC: 07: enabled 1
783 11:29:45.859460 APIC: 05: enabled 1
784 11:29:45.862757 APIC: 04: enabled 1
785 11:29:45.866039 DOMAIN: 0000: enabled 1
786 11:29:45.869427 PCI: 00:00.0: enabled 1
787 11:29:45.869559 PCI: 00:02.0: enabled 1
788 11:29:45.872590 PCI: 00:04.0: enabled 0
789 11:29:45.875954 PCI: 00:05.0: enabled 0
790 11:29:45.879138 PCI: 00:12.0: enabled 1
791 11:29:45.882479 PCI: 00:12.5: enabled 0
792 11:29:45.882615 PCI: 00:12.6: enabled 0
793 11:29:45.885584 PCI: 00:14.0: enabled 1
794 11:29:45.889012 USB0 port 0: enabled 1
795 11:29:45.892110 USB2 port 0: enabled 1
796 11:29:45.895467 USB2 port 1: enabled 1
797 11:29:45.895595 USB2 port 2: enabled 0
798 11:29:45.899067 USB2 port 3: enabled 0
799 11:29:45.902340 USB2 port 5: enabled 0
800 11:29:45.905520 USB2 port 6: enabled 1
801 11:29:45.908981 USB2 port 9: enabled 1
802 11:29:45.909112 USB3 port 0: enabled 1
803 11:29:45.912535 USB3 port 1: enabled 1
804 11:29:45.915780 USB3 port 2: enabled 1
805 11:29:45.918989 USB3 port 3: enabled 1
806 11:29:45.922331 USB3 port 4: enabled 0
807 11:29:45.925692 PCI: 00:14.1: enabled 0
808 11:29:45.925814 PCI: 00:14.3: enabled 1
809 11:29:45.929152 PCI: 00:14.5: enabled 0
810 11:29:45.932599 PCI: 00:15.0: enabled 1
811 11:29:45.935878 I2C: 00:15: enabled 1
812 11:29:45.935998 PCI: 00:15.1: enabled 1
813 11:29:45.938691 I2C: 00:5d: enabled 1
814 11:29:45.942020 GENERIC: 0.0: enabled 1
815 11:29:45.945396 PCI: 00:15.2: enabled 0
816 11:29:45.949133 PCI: 00:15.3: enabled 0
817 11:29:45.949226 PCI: 00:16.0: enabled 1
818 11:29:45.952394 PCI: 00:16.1: enabled 0
819 11:29:45.955589 PCI: 00:16.2: enabled 0
820 11:29:45.958654 PCI: 00:16.3: enabled 0
821 11:29:45.961959 PCI: 00:16.4: enabled 0
822 11:29:45.962080 PCI: 00:16.5: enabled 0
823 11:29:45.965076 PCI: 00:17.0: enabled 1
824 11:29:45.968891 PCI: 00:19.0: enabled 1
825 11:29:45.971652 I2C: 00:1a: enabled 1
826 11:29:45.975513 I2C: 00:38: enabled 1
827 11:29:45.975610 I2C: 00:39: enabled 1
828 11:29:45.978279 I2C: 00:3a: enabled 1
829 11:29:45.981725 I2C: 00:3b: enabled 1
830 11:29:45.985057 PCI: 00:19.1: enabled 0
831 11:29:45.985179 PCI: 00:19.2: enabled 0
832 11:29:45.989009 PCI: 00:1a.0: enabled 0
833 11:29:45.991932 PCI: 00:1c.0: enabled 0
834 11:29:45.995041 PCI: 00:1c.1: enabled 0
835 11:29:45.998226 PCI: 00:1c.2: enabled 0
836 11:29:45.998345 PCI: 00:1c.3: enabled 0
837 11:29:46.001840 PCI: 00:1c.4: enabled 0
838 11:29:46.005031 PCI: 00:1c.5: enabled 0
839 11:29:46.008210 PCI: 00:1c.6: enabled 0
840 11:29:46.012205 PCI: 00:1c.7: enabled 0
841 11:29:46.012327 PCI: 00:1d.0: enabled 1
842 11:29:46.015074 PCI: 00:1d.1: enabled 0
843 11:29:46.018042 PCI: 00:1d.2: enabled 0
844 11:29:46.021671 PCI: 00:1d.3: enabled 0
845 11:29:46.024661 PCI: 00:1d.4: enabled 0
846 11:29:46.024777 PCI: 00:1d.5: enabled 1
847 11:29:46.028566 PCI: 00:00.0: enabled 1
848 11:29:46.032135 PCI: 00:1e.0: enabled 1
849 11:29:46.034680 PCI: 00:1e.1: enabled 0
850 11:29:46.037925 PCI: 00:1e.2: enabled 1
851 11:29:46.038027 SPI: 00: enabled 1
852 11:29:46.041256 PCI: 00:1e.3: enabled 1
853 11:29:46.044733 SPI: 01: enabled 1
854 11:29:46.044838 PCI: 00:1f.0: enabled 1
855 11:29:46.048287 PNP: 0c09.0: enabled 1
856 11:29:46.051773 PCI: 00:1f.1: enabled 1
857 11:29:46.054671 PCI: 00:1f.2: enabled 1
858 11:29:46.058170 PCI: 00:1f.3: enabled 1
859 11:29:46.058275 PCI: 00:1f.4: enabled 1
860 11:29:46.061231 PCI: 00:1f.5: enabled 1
861 11:29:46.064375 PCI: 00:1f.6: enabled 0
862 11:29:46.067696 Root Device scanning...
863 11:29:46.071174 scan_static_bus for Root Device
864 11:29:46.074389 CPU_CLUSTER: 0 enabled
865 11:29:46.074520 DOMAIN: 0000 enabled
866 11:29:46.078157 DOMAIN: 0000 scanning...
867 11:29:46.081521 PCI: pci_scan_bus for bus 00
868 11:29:46.085087 PCI: 00:00.0 [8086/0000] ops
869 11:29:46.087817 PCI: 00:00.0 [8086/9b61] enabled
870 11:29:46.091342 PCI: 00:02.0 [8086/0000] bus ops
871 11:29:46.094753 PCI: 00:02.0 [8086/9b41] enabled
872 11:29:46.098200 PCI: 00:04.0 [8086/1903] disabled
873 11:29:46.100991 PCI: 00:08.0 [8086/1911] enabled
874 11:29:46.104457 PCI: 00:12.0 [8086/02f9] enabled
875 11:29:46.107676 PCI: 00:14.0 [8086/0000] bus ops
876 11:29:46.111482 PCI: 00:14.0 [8086/02ed] enabled
877 11:29:46.114464 PCI: 00:14.2 [8086/02ef] enabled
878 11:29:46.117690 PCI: 00:14.3 [8086/02f0] enabled
879 11:29:46.121590 PCI: 00:15.0 [8086/0000] bus ops
880 11:29:46.124768 PCI: 00:15.0 [8086/02e8] enabled
881 11:29:46.127964 PCI: 00:15.1 [8086/0000] bus ops
882 11:29:46.131183 PCI: 00:15.1 [8086/02e9] enabled
883 11:29:46.134399 PCI: 00:16.0 [8086/0000] ops
884 11:29:46.138188 PCI: 00:16.0 [8086/02e0] enabled
885 11:29:46.141030 PCI: 00:17.0 [8086/0000] ops
886 11:29:46.144426 PCI: 00:17.0 [8086/02d3] enabled
887 11:29:46.147718 PCI: 00:19.0 [8086/0000] bus ops
888 11:29:46.151271 PCI: 00:19.0 [8086/02c5] enabled
889 11:29:46.154648 PCI: 00:1d.0 [8086/0000] bus ops
890 11:29:46.157981 PCI: 00:1d.0 [8086/02b0] enabled
891 11:29:46.161349 PCI: Static device PCI: 00:1d.5 not found, disabling it.
892 11:29:46.164711 PCI: 00:1e.0 [8086/0000] ops
893 11:29:46.167526 PCI: 00:1e.0 [8086/02a8] enabled
894 11:29:46.170776 PCI: 00:1e.2 [8086/0000] bus ops
895 11:29:46.174093 PCI: 00:1e.2 [8086/02aa] enabled
896 11:29:46.177868 PCI: 00:1e.3 [8086/0000] bus ops
897 11:29:46.180900 PCI: 00:1e.3 [8086/02ab] enabled
898 11:29:46.184438 PCI: 00:1f.0 [8086/0000] bus ops
899 11:29:46.187409 PCI: 00:1f.0 [8086/0284] enabled
900 11:29:46.194021 PCI: Static device PCI: 00:1f.1 not found, disabling it.
901 11:29:46.201273 PCI: Static device PCI: 00:1f.2 not found, disabling it.
902 11:29:46.204494 PCI: 00:1f.3 [8086/0000] bus ops
903 11:29:46.207360 PCI: 00:1f.3 [8086/02c8] enabled
904 11:29:46.210855 PCI: 00:1f.4 [8086/0000] bus ops
905 11:29:46.214185 PCI: 00:1f.4 [8086/02a3] enabled
906 11:29:46.217363 PCI: 00:1f.5 [8086/0000] bus ops
907 11:29:46.220528 PCI: 00:1f.5 [8086/02a4] enabled
908 11:29:46.223839 PCI: Leftover static devices:
909 11:29:46.223960 PCI: 00:05.0
910 11:29:46.224085 PCI: 00:12.5
911 11:29:46.227359 PCI: 00:12.6
912 11:29:46.227454 PCI: 00:14.1
913 11:29:46.230456 PCI: 00:14.5
914 11:29:46.230546 PCI: 00:15.2
915 11:29:46.230625 PCI: 00:15.3
916 11:29:46.233747 PCI: 00:16.1
917 11:29:46.233832 PCI: 00:16.2
918 11:29:46.237224 PCI: 00:16.3
919 11:29:46.237317 PCI: 00:16.4
920 11:29:46.240846 PCI: 00:16.5
921 11:29:46.240937 PCI: 00:19.1
922 11:29:46.241009 PCI: 00:19.2
923 11:29:46.243820 PCI: 00:1a.0
924 11:29:46.243902 PCI: 00:1c.0
925 11:29:46.247552 PCI: 00:1c.1
926 11:29:46.247640 PCI: 00:1c.2
927 11:29:46.247718 PCI: 00:1c.3
928 11:29:46.250917 PCI: 00:1c.4
929 11:29:46.251001 PCI: 00:1c.5
930 11:29:46.253707 PCI: 00:1c.6
931 11:29:46.253786 PCI: 00:1c.7
932 11:29:46.253859 PCI: 00:1d.1
933 11:29:46.257005 PCI: 00:1d.2
934 11:29:46.257092 PCI: 00:1d.3
935 11:29:46.260353 PCI: 00:1d.4
936 11:29:46.260438 PCI: 00:1d.5
937 11:29:46.260527 PCI: 00:1e.1
938 11:29:46.264207 PCI: 00:1f.1
939 11:29:46.264296 PCI: 00:1f.2
940 11:29:46.267420 PCI: 00:1f.6
941 11:29:46.270733 PCI: Check your devicetree.cb.
942 11:29:46.270819 PCI: 00:02.0 scanning...
943 11:29:46.277373 scan_generic_bus for PCI: 00:02.0
944 11:29:46.280654 scan_generic_bus for PCI: 00:02.0 done
945 11:29:46.284161 scan_bus: scanning of bus PCI: 00:02.0 took 10197 usecs
946 11:29:46.287532 PCI: 00:14.0 scanning...
947 11:29:46.290608 scan_static_bus for PCI: 00:14.0
948 11:29:46.293713 USB0 port 0 enabled
949 11:29:46.297490 USB0 port 0 scanning...
950 11:29:46.300380 scan_static_bus for USB0 port 0
951 11:29:46.300471 USB2 port 0 enabled
952 11:29:46.303503 USB2 port 1 enabled
953 11:29:46.303589 USB2 port 2 disabled
954 11:29:46.307284 USB2 port 3 disabled
955 11:29:46.310536 USB2 port 5 disabled
956 11:29:46.310652 USB2 port 6 enabled
957 11:29:46.313769 USB2 port 9 enabled
958 11:29:46.317123 USB3 port 0 enabled
959 11:29:46.317211 USB3 port 1 enabled
960 11:29:46.320511 USB3 port 2 enabled
961 11:29:46.320598 USB3 port 3 enabled
962 11:29:46.323801 USB3 port 4 disabled
963 11:29:46.327083 USB2 port 0 scanning...
964 11:29:46.330419 scan_static_bus for USB2 port 0
965 11:29:46.333743 scan_static_bus for USB2 port 0 done
966 11:29:46.340675 scan_bus: scanning of bus USB2 port 0 took 9698 usecs
967 11:29:46.340767 USB2 port 1 scanning...
968 11:29:46.343655 scan_static_bus for USB2 port 1
969 11:29:46.347355 scan_static_bus for USB2 port 1 done
970 11:29:46.354183 scan_bus: scanning of bus USB2 port 1 took 9708 usecs
971 11:29:46.357094 USB2 port 6 scanning...
972 11:29:46.360717 scan_static_bus for USB2 port 6
973 11:29:46.364110 scan_static_bus for USB2 port 6 done
974 11:29:46.370303 scan_bus: scanning of bus USB2 port 6 took 9718 usecs
975 11:29:46.370402 USB2 port 9 scanning...
976 11:29:46.374142 scan_static_bus for USB2 port 9
977 11:29:46.380150 scan_static_bus for USB2 port 9 done
978 11:29:46.383424 scan_bus: scanning of bus USB2 port 9 took 9708 usecs
979 11:29:46.386952 USB3 port 0 scanning...
980 11:29:46.390269 scan_static_bus for USB3 port 0
981 11:29:46.393502 scan_static_bus for USB3 port 0 done
982 11:29:46.400094 scan_bus: scanning of bus USB3 port 0 took 9698 usecs
983 11:29:46.400189 USB3 port 1 scanning...
984 11:29:46.403316 scan_static_bus for USB3 port 1
985 11:29:46.409950 scan_static_bus for USB3 port 1 done
986 11:29:46.413676 scan_bus: scanning of bus USB3 port 1 took 9688 usecs
987 11:29:46.417022 USB3 port 2 scanning...
988 11:29:46.420138 scan_static_bus for USB3 port 2
989 11:29:46.423367 scan_static_bus for USB3 port 2 done
990 11:29:46.430059 scan_bus: scanning of bus USB3 port 2 took 9706 usecs
991 11:29:46.430157 USB3 port 3 scanning...
992 11:29:46.433572 scan_static_bus for USB3 port 3
993 11:29:46.440066 scan_static_bus for USB3 port 3 done
994 11:29:46.443520 scan_bus: scanning of bus USB3 port 3 took 9706 usecs
995 11:29:46.447008 scan_static_bus for USB0 port 0 done
996 11:29:46.453722 scan_bus: scanning of bus USB0 port 0 took 155398 usecs
997 11:29:46.456947 scan_static_bus for PCI: 00:14.0 done
998 11:29:46.463055 scan_bus: scanning of bus PCI: 00:14.0 took 173018 usecs
999 11:29:46.466515 PCI: 00:15.0 scanning...
1000 11:29:46.470390 scan_generic_bus for PCI: 00:15.0
1001 11:29:46.473358 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1002 11:29:46.476738 scan_generic_bus for PCI: 00:15.0 done
1003 11:29:46.483650 scan_bus: scanning of bus PCI: 00:15.0 took 14285 usecs
1004 11:29:46.486819 PCI: 00:15.1 scanning...
1005 11:29:46.490382 scan_generic_bus for PCI: 00:15.1
1006 11:29:46.493676 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1007 11:29:46.496432 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1008 11:29:46.499699 scan_generic_bus for PCI: 00:15.1 done
1009 11:29:46.506734 scan_bus: scanning of bus PCI: 00:15.1 took 18589 usecs
1010 11:29:46.510226 PCI: 00:19.0 scanning...
1011 11:29:46.513064 scan_generic_bus for PCI: 00:19.0
1012 11:29:46.516942 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1013 11:29:46.520240 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1014 11:29:46.526941 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1015 11:29:46.530139 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1016 11:29:46.533507 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1017 11:29:46.536194 scan_generic_bus for PCI: 00:19.0 done
1018 11:29:46.542966 scan_bus: scanning of bus PCI: 00:19.0 took 30728 usecs
1019 11:29:46.546442 PCI: 00:1d.0 scanning...
1020 11:29:46.549970 do_pci_scan_bridge for PCI: 00:1d.0
1021 11:29:46.552794 PCI: pci_scan_bus for bus 01
1022 11:29:46.556095 PCI: 01:00.0 [1c5c/1327] enabled
1023 11:29:46.559407 Enabling Common Clock Configuration
1024 11:29:46.562821 L1 Sub-State supported from root port 29
1025 11:29:46.566251 L1 Sub-State Support = 0xf
1026 11:29:46.569509 CommonModeRestoreTime = 0x28
1027 11:29:46.572573 Power On Value = 0x16, Power On Scale = 0x0
1028 11:29:46.576393 ASPM: Enabled L1
1029 11:29:46.579894 scan_bus: scanning of bus PCI: 00:1d.0 took 32775 usecs
1030 11:29:46.582456 PCI: 00:1e.2 scanning...
1031 11:29:46.586098 scan_generic_bus for PCI: 00:1e.2
1032 11:29:46.589170 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1033 11:29:46.596162 scan_generic_bus for PCI: 00:1e.2 done
1034 11:29:46.599091 scan_bus: scanning of bus PCI: 00:1e.2 took 14006 usecs
1035 11:29:46.602578 PCI: 00:1e.3 scanning...
1036 11:29:46.606163 scan_generic_bus for PCI: 00:1e.3
1037 11:29:46.609348 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1038 11:29:46.612501 scan_generic_bus for PCI: 00:1e.3 done
1039 11:29:46.619181 scan_bus: scanning of bus PCI: 00:1e.3 took 14001 usecs
1040 11:29:46.622561 PCI: 00:1f.0 scanning...
1041 11:29:46.625829 scan_static_bus for PCI: 00:1f.0
1042 11:29:46.629714 PNP: 0c09.0 enabled
1043 11:29:46.632920 scan_static_bus for PCI: 00:1f.0 done
1044 11:29:46.636253 scan_bus: scanning of bus PCI: 00:1f.0 took 12047 usecs
1045 11:29:46.639342 PCI: 00:1f.3 scanning...
1046 11:29:46.646202 scan_bus: scanning of bus PCI: 00:1f.3 took 2850 usecs
1047 11:29:46.649524 PCI: 00:1f.4 scanning...
1048 11:29:46.652264 scan_generic_bus for PCI: 00:1f.4
1049 11:29:46.655656 scan_generic_bus for PCI: 00:1f.4 done
1050 11:29:46.662710 scan_bus: scanning of bus PCI: 00:1f.4 took 10184 usecs
1051 11:29:46.662801 PCI: 00:1f.5 scanning...
1052 11:29:46.669426 scan_generic_bus for PCI: 00:1f.5
1053 11:29:46.672867 scan_generic_bus for PCI: 00:1f.5 done
1054 11:29:46.675575 scan_bus: scanning of bus PCI: 00:1f.5 took 10192 usecs
1055 11:29:46.682780 scan_bus: scanning of bus DOMAIN: 0000 took 604979 usecs
1056 11:29:46.686279 scan_static_bus for Root Device done
1057 11:29:46.692785 scan_bus: scanning of bus Root Device took 624894 usecs
1058 11:29:46.692882 done
1059 11:29:46.696088 Chrome EC: UHEPI supported
1060 11:29:46.702777 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1061 11:29:46.709494 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1062 11:29:46.712774 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1063 11:29:46.719959 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1064 11:29:46.723790 SPI flash protection: WPSW=0 SRP0=0
1065 11:29:46.730652 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1066 11:29:46.733435 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1067 11:29:46.736790 found VGA at PCI: 00:02.0
1068 11:29:46.740439 Setting up VGA for PCI: 00:02.0
1069 11:29:46.746683 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1070 11:29:46.750403 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1071 11:29:46.753377 Allocating resources...
1072 11:29:46.756557 Reading resources...
1073 11:29:46.759913 Root Device read_resources bus 0 link: 0
1074 11:29:46.763442 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1075 11:29:46.770344 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1076 11:29:46.773181 DOMAIN: 0000 read_resources bus 0 link: 0
1077 11:29:46.780503 PCI: 00:14.0 read_resources bus 0 link: 0
1078 11:29:46.783836 USB0 port 0 read_resources bus 0 link: 0
1079 11:29:46.791728 USB0 port 0 read_resources bus 0 link: 0 done
1080 11:29:46.795184 PCI: 00:14.0 read_resources bus 0 link: 0 done
1081 11:29:46.802284 PCI: 00:15.0 read_resources bus 1 link: 0
1082 11:29:46.805720 PCI: 00:15.0 read_resources bus 1 link: 0 done
1083 11:29:46.812738 PCI: 00:15.1 read_resources bus 2 link: 0
1084 11:29:46.816144 PCI: 00:15.1 read_resources bus 2 link: 0 done
1085 11:29:46.822881 PCI: 00:19.0 read_resources bus 3 link: 0
1086 11:29:46.829662 PCI: 00:19.0 read_resources bus 3 link: 0 done
1087 11:29:46.833330 PCI: 00:1d.0 read_resources bus 1 link: 0
1088 11:29:46.839980 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1089 11:29:46.843278 PCI: 00:1e.2 read_resources bus 4 link: 0
1090 11:29:46.849759 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1091 11:29:46.853015 PCI: 00:1e.3 read_resources bus 5 link: 0
1092 11:29:46.860050 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1093 11:29:46.863147 PCI: 00:1f.0 read_resources bus 0 link: 0
1094 11:29:46.870143 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1095 11:29:46.873353 DOMAIN: 0000 read_resources bus 0 link: 0 done
1096 11:29:46.880225 Root Device read_resources bus 0 link: 0 done
1097 11:29:46.883683 Done reading resources.
1098 11:29:46.887003 Show resources in subtree (Root Device)...After reading.
1099 11:29:46.893298 Root Device child on link 0 CPU_CLUSTER: 0
1100 11:29:46.896670 CPU_CLUSTER: 0 child on link 0 APIC: 00
1101 11:29:46.896776 APIC: 00
1102 11:29:46.899865 APIC: 02
1103 11:29:46.899992 APIC: 06
1104 11:29:46.900100 APIC: 01
1105 11:29:46.903338 APIC: 03
1106 11:29:46.903432 APIC: 07
1107 11:29:46.906662 APIC: 05
1108 11:29:46.906775 APIC: 04
1109 11:29:46.909984 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1110 11:29:46.919752 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1111 11:29:46.969913 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1112 11:29:46.970063 PCI: 00:00.0
1113 11:29:46.970368 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1114 11:29:46.970482 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1115 11:29:46.970600 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1116 11:29:46.970910 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1117 11:29:46.979928 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1118 11:29:46.987246 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1119 11:29:46.996854 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1120 11:29:47.006745 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1121 11:29:47.016775 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1122 11:29:47.023094 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1123 11:29:47.033622 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1124 11:29:47.043543 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1125 11:29:47.053086 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1126 11:29:47.063106 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1127 11:29:47.073395 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1128 11:29:47.079836 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1129 11:29:47.083206 PCI: 00:02.0
1130 11:29:47.093197 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1131 11:29:47.102757 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1132 11:29:47.113189 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1133 11:29:47.113351 PCI: 00:04.0
1134 11:29:47.116485 PCI: 00:08.0
1135 11:29:47.126447 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1136 11:29:47.126575 PCI: 00:12.0
1137 11:29:47.136477 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 11:29:47.139346 PCI: 00:14.0 child on link 0 USB0 port 0
1139 11:29:47.152880 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1140 11:29:47.156438 USB0 port 0 child on link 0 USB2 port 0
1141 11:29:47.156527 USB2 port 0
1142 11:29:47.159823 USB2 port 1
1143 11:29:47.159908 USB2 port 2
1144 11:29:47.162723 USB2 port 3
1145 11:29:47.162822 USB2 port 5
1146 11:29:47.166047 USB2 port 6
1147 11:29:47.169481 USB2 port 9
1148 11:29:47.169585 USB3 port 0
1149 11:29:47.172747 USB3 port 1
1150 11:29:47.172864 USB3 port 2
1151 11:29:47.176114 USB3 port 3
1152 11:29:47.176235 USB3 port 4
1153 11:29:47.179555 PCI: 00:14.2
1154 11:29:47.189883 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1155 11:29:47.199475 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1156 11:29:47.199569 PCI: 00:14.3
1157 11:29:47.209616 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1158 11:29:47.213268 PCI: 00:15.0 child on link 0 I2C: 01:15
1159 11:29:47.222769 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1160 11:29:47.226198 I2C: 01:15
1161 11:29:47.229438 PCI: 00:15.1 child on link 0 I2C: 02:5d
1162 11:29:47.239269 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1163 11:29:47.242830 I2C: 02:5d
1164 11:29:47.242925 GENERIC: 0.0
1165 11:29:47.245903 PCI: 00:16.0
1166 11:29:47.256105 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 11:29:47.256200 PCI: 00:17.0
1168 11:29:47.266033 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1169 11:29:47.276114 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1170 11:29:47.282832 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1171 11:29:47.292268 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1172 11:29:47.299190 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1173 11:29:47.309429 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1174 11:29:47.312888 PCI: 00:19.0 child on link 0 I2C: 03:1a
1175 11:29:47.322590 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 11:29:47.322719 I2C: 03:1a
1177 11:29:47.326136 I2C: 03:38
1178 11:29:47.326261 I2C: 03:39
1179 11:29:47.329412 I2C: 03:3a
1180 11:29:47.329504 I2C: 03:3b
1181 11:29:47.335488 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1182 11:29:47.342423 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1183 11:29:47.352866 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1184 11:29:47.362714 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1185 11:29:47.365633 PCI: 01:00.0
1186 11:29:47.375775 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1187 11:29:47.375893 PCI: 00:1e.0
1188 11:29:47.385365 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1189 11:29:47.395399 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1190 11:29:47.402418 PCI: 00:1e.2 child on link 0 SPI: 00
1191 11:29:47.411920 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 11:29:47.412069 SPI: 00
1193 11:29:47.415441 PCI: 00:1e.3 child on link 0 SPI: 01
1194 11:29:47.425473 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 11:29:47.429040 SPI: 01
1196 11:29:47.432393 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1197 11:29:47.438396 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1198 11:29:47.448520 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1199 11:29:47.451878 PNP: 0c09.0
1200 11:29:47.458577 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1201 11:29:47.461704 PCI: 00:1f.3
1202 11:29:47.471704 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 11:29:47.482177 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1204 11:29:47.482284 PCI: 00:1f.4
1205 11:29:47.491862 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1206 11:29:47.501757 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1207 11:29:47.501854 PCI: 00:1f.5
1208 11:29:47.511866 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1209 11:29:47.518777 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1210 11:29:47.525535 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1211 11:29:47.531671 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1212 11:29:47.535081 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1213 11:29:47.538548 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1214 11:29:47.541751 PCI: 00:17.0 18 * [0x60 - 0x67] io
1215 11:29:47.545160 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1216 11:29:47.551534 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1217 11:29:47.558303 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1218 11:29:47.568061 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1219 11:29:47.575676 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1220 11:29:47.581524 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1221 11:29:47.588263 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1222 11:29:47.594938 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1223 11:29:47.598300 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1224 11:29:47.605065 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1225 11:29:47.607815 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1226 11:29:47.615068 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1227 11:29:47.618170 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1228 11:29:47.624467 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1229 11:29:47.628236 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1230 11:29:47.634490 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1231 11:29:47.637610 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1232 11:29:47.644782 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1233 11:29:47.648203 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1234 11:29:47.651519 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1235 11:29:47.657749 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1236 11:29:47.661170 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1237 11:29:47.667736 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1238 11:29:47.671126 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1239 11:29:47.677858 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1240 11:29:47.681157 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1241 11:29:47.687529 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1242 11:29:47.691357 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1243 11:29:47.697404 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1244 11:29:47.701159 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1245 11:29:47.707863 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1246 11:29:47.714020 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1247 11:29:47.717533 avoid_fixed_resources: DOMAIN: 0000
1248 11:29:47.724251 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1249 11:29:47.730730 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1250 11:29:47.737629 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1251 11:29:47.744022 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1252 11:29:47.753964 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1253 11:29:47.760969 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1254 11:29:47.767154 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1255 11:29:47.777136 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1256 11:29:47.783833 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1257 11:29:47.790458 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1258 11:29:47.796967 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1259 11:29:47.806967 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1260 11:29:47.807063 Setting resources...
1261 11:29:47.813959 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1262 11:29:47.817115 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1263 11:29:47.823794 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1264 11:29:47.827153 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1265 11:29:47.830338 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1266 11:29:47.837444 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1267 11:29:47.844178 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1268 11:29:47.850161 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1269 11:29:47.856810 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1270 11:29:47.860055 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1271 11:29:47.867129 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1272 11:29:47.870037 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1273 11:29:47.876870 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1274 11:29:47.880469 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1275 11:29:47.887223 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1276 11:29:47.890540 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1277 11:29:47.897022 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1278 11:29:47.900393 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1279 11:29:47.906714 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1280 11:29:47.910228 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1281 11:29:47.916755 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1282 11:29:47.920014 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1283 11:29:47.923481 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1284 11:29:47.930273 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1285 11:29:47.933462 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1286 11:29:47.940131 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1287 11:29:47.943540 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1288 11:29:47.950388 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1289 11:29:47.953730 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1290 11:29:47.959855 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1291 11:29:47.963163 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1292 11:29:47.969889 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1293 11:29:47.976413 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1294 11:29:47.982958 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1295 11:29:47.990120 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1296 11:29:47.999725 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1297 11:29:48.002972 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1298 11:29:48.009900 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1299 11:29:48.016717 Root Device assign_resources, bus 0 link: 0
1300 11:29:48.020005 DOMAIN: 0000 assign_resources, bus 0 link: 0
1301 11:29:48.029975 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1302 11:29:48.036408 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1303 11:29:48.043035 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1304 11:29:48.053181 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1305 11:29:48.060019 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1306 11:29:48.069558 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1307 11:29:48.072942 PCI: 00:14.0 assign_resources, bus 0 link: 0
1308 11:29:48.079946 PCI: 00:14.0 assign_resources, bus 0 link: 0
1309 11:29:48.086661 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1310 11:29:48.096321 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1311 11:29:48.102888 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1312 11:29:48.113431 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1313 11:29:48.116762 PCI: 00:15.0 assign_resources, bus 1 link: 0
1314 11:29:48.119540 PCI: 00:15.0 assign_resources, bus 1 link: 0
1315 11:29:48.129472 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1316 11:29:48.132718 PCI: 00:15.1 assign_resources, bus 2 link: 0
1317 11:29:48.139580 PCI: 00:15.1 assign_resources, bus 2 link: 0
1318 11:29:48.146461 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1319 11:29:48.156411 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1320 11:29:48.163185 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1321 11:29:48.169343 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1322 11:29:48.179588 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1323 11:29:48.186240 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1324 11:29:48.192547 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1325 11:29:48.202901 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1326 11:29:48.205679 PCI: 00:19.0 assign_resources, bus 3 link: 0
1327 11:29:48.208985 PCI: 00:19.0 assign_resources, bus 3 link: 0
1328 11:29:48.219529 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1329 11:29:48.229338 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1330 11:29:48.235902 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1331 11:29:48.242565 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1332 11:29:48.249053 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1333 11:29:48.255717 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 11:29:48.262704 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1335 11:29:48.272652 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1336 11:29:48.276044 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1337 11:29:48.278781 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1338 11:29:48.288965 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1339 11:29:48.292522 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1340 11:29:48.298997 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1341 11:29:48.302189 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1342 11:29:48.308866 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1343 11:29:48.312382 LPC: Trying to open IO window from 800 size 1ff
1344 11:29:48.322549 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1345 11:29:48.328987 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1346 11:29:48.335347 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1347 11:29:48.345679 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1348 11:29:48.349125 DOMAIN: 0000 assign_resources, bus 0 link: 0
1349 11:29:48.355592 Root Device assign_resources, bus 0 link: 0
1350 11:29:48.355717 Done setting resources.
1351 11:29:48.361930 Show resources in subtree (Root Device)...After assigning values.
1352 11:29:48.368692 Root Device child on link 0 CPU_CLUSTER: 0
1353 11:29:48.371839 CPU_CLUSTER: 0 child on link 0 APIC: 00
1354 11:29:48.371930 APIC: 00
1355 11:29:48.375175 APIC: 02
1356 11:29:48.375270 APIC: 06
1357 11:29:48.378766 APIC: 01
1358 11:29:48.378893 APIC: 03
1359 11:29:48.378997 APIC: 07
1360 11:29:48.381981 APIC: 05
1361 11:29:48.382094 APIC: 04
1362 11:29:48.385134 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1363 11:29:48.395099 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1364 11:29:48.408184 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1365 11:29:48.408330 PCI: 00:00.0
1366 11:29:48.418108 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1367 11:29:48.428207 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1368 11:29:48.438583 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1369 11:29:48.448558 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1370 11:29:48.455104 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1371 11:29:48.464472 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1372 11:29:48.474631 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1373 11:29:48.484405 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1374 11:29:48.494539 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1375 11:29:48.501000 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1376 11:29:48.511334 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1377 11:29:48.520722 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1378 11:29:48.530609 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1379 11:29:48.540494 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1380 11:29:48.550472 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1381 11:29:48.557277 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1382 11:29:48.560910 PCI: 00:02.0
1383 11:29:48.570726 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1384 11:29:48.580502 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1385 11:29:48.590131 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1386 11:29:48.593747 PCI: 00:04.0
1387 11:29:48.593873 PCI: 00:08.0
1388 11:29:48.603301 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1389 11:29:48.607041 PCI: 00:12.0
1390 11:29:48.616596 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1391 11:29:48.619851 PCI: 00:14.0 child on link 0 USB0 port 0
1392 11:29:48.630247 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1393 11:29:48.636689 USB0 port 0 child on link 0 USB2 port 0
1394 11:29:48.636813 USB2 port 0
1395 11:29:48.640170 USB2 port 1
1396 11:29:48.640282 USB2 port 2
1397 11:29:48.643238 USB2 port 3
1398 11:29:48.643350 USB2 port 5
1399 11:29:48.646463 USB2 port 6
1400 11:29:48.646580 USB2 port 9
1401 11:29:48.649678 USB3 port 0
1402 11:29:48.653215 USB3 port 1
1403 11:29:48.653326 USB3 port 2
1404 11:29:48.656308 USB3 port 3
1405 11:29:48.656398 USB3 port 4
1406 11:29:48.659567 PCI: 00:14.2
1407 11:29:48.669567 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1408 11:29:48.679388 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1409 11:29:48.679572 PCI: 00:14.3
1410 11:29:48.689682 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1411 11:29:48.696145 PCI: 00:15.0 child on link 0 I2C: 01:15
1412 11:29:48.706310 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1413 11:29:48.706434 I2C: 01:15
1414 11:29:48.712556 PCI: 00:15.1 child on link 0 I2C: 02:5d
1415 11:29:48.722586 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1416 11:29:48.722704 I2C: 02:5d
1417 11:29:48.725881 GENERIC: 0.0
1418 11:29:48.725995 PCI: 00:16.0
1419 11:29:48.735803 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1420 11:29:48.739381 PCI: 00:17.0
1421 11:29:48.749278 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1422 11:29:48.759078 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1423 11:29:48.768557 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1424 11:29:48.778382 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1425 11:29:48.785116 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1426 11:29:48.795215 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1427 11:29:48.802157 PCI: 00:19.0 child on link 0 I2C: 03:1a
1428 11:29:48.812157 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1429 11:29:48.812300 I2C: 03:1a
1430 11:29:48.815285 I2C: 03:38
1431 11:29:48.815399 I2C: 03:39
1432 11:29:48.818701 I2C: 03:3a
1433 11:29:48.818816 I2C: 03:3b
1434 11:29:48.822003 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1435 11:29:48.831290 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1436 11:29:48.841492 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1437 11:29:48.851468 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1438 11:29:48.854737 PCI: 01:00.0
1439 11:29:48.864516 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1440 11:29:48.867801 PCI: 00:1e.0
1441 11:29:48.878010 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1442 11:29:48.887924 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1443 11:29:48.890981 PCI: 00:1e.2 child on link 0 SPI: 00
1444 11:29:48.900821 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1445 11:29:48.904130 SPI: 00
1446 11:29:48.907877 PCI: 00:1e.3 child on link 0 SPI: 01
1447 11:29:48.918186 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1448 11:29:48.920644 SPI: 01
1449 11:29:48.923925 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1450 11:29:48.931235 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1451 11:29:48.940575 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1452 11:29:48.944031 PNP: 0c09.0
1453 11:29:48.950420 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1454 11:29:48.953876 PCI: 00:1f.3
1455 11:29:48.963827 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1456 11:29:48.974163 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1457 11:29:48.977526 PCI: 00:1f.4
1458 11:29:48.983925 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1459 11:29:48.993857 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1460 11:29:48.996837 PCI: 00:1f.5
1461 11:29:49.007040 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1462 11:29:49.010361 Done allocating resources.
1463 11:29:49.013797 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1464 11:29:49.017605 Enabling resources...
1465 11:29:49.023809 PCI: 00:00.0 subsystem <- 8086/9b61
1466 11:29:49.023935 PCI: 00:00.0 cmd <- 06
1467 11:29:49.026923 PCI: 00:02.0 subsystem <- 8086/9b41
1468 11:29:49.030724 PCI: 00:02.0 cmd <- 03
1469 11:29:49.033838 PCI: 00:08.0 cmd <- 06
1470 11:29:49.037233 PCI: 00:12.0 subsystem <- 8086/02f9
1471 11:29:49.040538 PCI: 00:12.0 cmd <- 02
1472 11:29:49.043893 PCI: 00:14.0 subsystem <- 8086/02ed
1473 11:29:49.047224 PCI: 00:14.0 cmd <- 02
1474 11:29:49.050649 PCI: 00:14.2 cmd <- 02
1475 11:29:49.053991 PCI: 00:14.3 subsystem <- 8086/02f0
1476 11:29:49.054115 PCI: 00:14.3 cmd <- 02
1477 11:29:49.060591 PCI: 00:15.0 subsystem <- 8086/02e8
1478 11:29:49.060674 PCI: 00:15.0 cmd <- 02
1479 11:29:49.063920 PCI: 00:15.1 subsystem <- 8086/02e9
1480 11:29:49.067214 PCI: 00:15.1 cmd <- 02
1481 11:29:49.070696 PCI: 00:16.0 subsystem <- 8086/02e0
1482 11:29:49.073931 PCI: 00:16.0 cmd <- 02
1483 11:29:49.077298 PCI: 00:17.0 subsystem <- 8086/02d3
1484 11:29:49.080549 PCI: 00:17.0 cmd <- 03
1485 11:29:49.083791 PCI: 00:19.0 subsystem <- 8086/02c5
1486 11:29:49.087085 PCI: 00:19.0 cmd <- 02
1487 11:29:49.090487 PCI: 00:1d.0 bridge ctrl <- 0013
1488 11:29:49.094035 PCI: 00:1d.0 subsystem <- 8086/02b0
1489 11:29:49.096981 PCI: 00:1d.0 cmd <- 06
1490 11:29:49.100433 PCI: 00:1e.0 subsystem <- 8086/02a8
1491 11:29:49.103568 PCI: 00:1e.0 cmd <- 06
1492 11:29:49.106894 PCI: 00:1e.2 subsystem <- 8086/02aa
1493 11:29:49.110161 PCI: 00:1e.2 cmd <- 06
1494 11:29:49.113403 PCI: 00:1e.3 subsystem <- 8086/02ab
1495 11:29:49.113494 PCI: 00:1e.3 cmd <- 02
1496 11:29:49.120297 PCI: 00:1f.0 subsystem <- 8086/0284
1497 11:29:49.120392 PCI: 00:1f.0 cmd <- 407
1498 11:29:49.123283 PCI: 00:1f.3 subsystem <- 8086/02c8
1499 11:29:49.126676 PCI: 00:1f.3 cmd <- 02
1500 11:29:49.129778 PCI: 00:1f.4 subsystem <- 8086/02a3
1501 11:29:49.133882 PCI: 00:1f.4 cmd <- 03
1502 11:29:49.136691 PCI: 00:1f.5 subsystem <- 8086/02a4
1503 11:29:49.140424 PCI: 00:1f.5 cmd <- 406
1504 11:29:49.148805 PCI: 01:00.0 cmd <- 02
1505 11:29:49.154166 done.
1506 11:29:49.166373 ME: Version: 14.0.39.1367
1507 11:29:49.173032 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1508 11:29:49.176304 Initializing devices...
1509 11:29:49.176441 Root Device init ...
1510 11:29:49.182713 Chrome EC: Set SMI mask to 0x0000000000000000
1511 11:29:49.185940 Chrome EC: clear events_b mask to 0x0000000000000000
1512 11:29:49.193321 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1513 11:29:49.199274 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1514 11:29:49.206197 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1515 11:29:49.209460 Chrome EC: Set WAKE mask to 0x0000000000000000
1516 11:29:49.212583 Root Device init finished in 35184 usecs
1517 11:29:49.216027 CPU_CLUSTER: 0 init ...
1518 11:29:49.222740 CPU_CLUSTER: 0 init finished in 2448 usecs
1519 11:29:49.227179 PCI: 00:00.0 init ...
1520 11:29:49.230500 CPU TDP: 15 Watts
1521 11:29:49.233517 CPU PL2 = 64 Watts
1522 11:29:49.237175 PCI: 00:00.0 init finished in 7080 usecs
1523 11:29:49.240272 PCI: 00:02.0 init ...
1524 11:29:49.243417 PCI: 00:02.0 init finished in 2253 usecs
1525 11:29:49.247400 PCI: 00:08.0 init ...
1526 11:29:49.250485 PCI: 00:08.0 init finished in 2252 usecs
1527 11:29:49.253621 PCI: 00:12.0 init ...
1528 11:29:49.256991 PCI: 00:12.0 init finished in 2253 usecs
1529 11:29:49.260186 PCI: 00:14.0 init ...
1530 11:29:49.263722 PCI: 00:14.0 init finished in 2244 usecs
1531 11:29:49.266751 PCI: 00:14.2 init ...
1532 11:29:49.270175 PCI: 00:14.2 init finished in 2253 usecs
1533 11:29:49.273719 PCI: 00:14.3 init ...
1534 11:29:49.277222 PCI: 00:14.3 init finished in 2272 usecs
1535 11:29:49.280236 PCI: 00:15.0 init ...
1536 11:29:49.283480 DW I2C bus 0 at 0xd121f000 (400 KHz)
1537 11:29:49.286861 PCI: 00:15.0 init finished in 5986 usecs
1538 11:29:49.290196 PCI: 00:15.1 init ...
1539 11:29:49.293531 DW I2C bus 1 at 0xd1220000 (400 KHz)
1540 11:29:49.296915 PCI: 00:15.1 init finished in 5979 usecs
1541 11:29:49.300691 PCI: 00:16.0 init ...
1542 11:29:49.303966 PCI: 00:16.0 init finished in 2252 usecs
1543 11:29:49.307409 PCI: 00:19.0 init ...
1544 11:29:49.311110 DW I2C bus 4 at 0xd1222000 (400 KHz)
1545 11:29:49.317484 PCI: 00:19.0 init finished in 5978 usecs
1546 11:29:49.317575 PCI: 00:1d.0 init ...
1547 11:29:49.320741 Initializing PCH PCIe bridge.
1548 11:29:49.324090 PCI: 00:1d.0 init finished in 5284 usecs
1549 11:29:49.328771 PCI: 00:1f.0 init ...
1550 11:29:49.332189 IOAPIC: Initializing IOAPIC at 0xfec00000
1551 11:29:49.338925 IOAPIC: Bootstrap Processor Local APIC = 0x00
1552 11:29:49.339054 IOAPIC: ID = 0x02
1553 11:29:49.342187 IOAPIC: Dumping registers
1554 11:29:49.345283 reg 0x0000: 0x02000000
1555 11:29:49.349085 reg 0x0001: 0x00770020
1556 11:29:49.349167 reg 0x0002: 0x00000000
1557 11:29:49.355960 PCI: 00:1f.0 init finished in 23556 usecs
1558 11:29:49.359034 PCI: 00:1f.4 init ...
1559 11:29:49.362204 PCI: 00:1f.4 init finished in 2264 usecs
1560 11:29:49.373185 PCI: 01:00.0 init ...
1561 11:29:49.376464 PCI: 01:00.0 init finished in 2254 usecs
1562 11:29:49.380935 PNP: 0c09.0 init ...
1563 11:29:49.384387 Google Chrome EC uptime: 11.064 seconds
1564 11:29:49.391019 Google Chrome AP resets since EC boot: 0
1565 11:29:49.394037 Google Chrome most recent AP reset causes:
1566 11:29:49.400773 Google Chrome EC reset flags at last EC boot: reset-pin
1567 11:29:49.404095 PNP: 0c09.0 init finished in 20641 usecs
1568 11:29:49.407432 Devices initialized
1569 11:29:49.410825 Show all devs... After init.
1570 11:29:49.410924 Root Device: enabled 1
1571 11:29:49.414040 CPU_CLUSTER: 0: enabled 1
1572 11:29:49.417432 DOMAIN: 0000: enabled 1
1573 11:29:49.417518 APIC: 00: enabled 1
1574 11:29:49.420671 PCI: 00:00.0: enabled 1
1575 11:29:49.423919 PCI: 00:02.0: enabled 1
1576 11:29:49.427022 PCI: 00:04.0: enabled 0
1577 11:29:49.427147 PCI: 00:05.0: enabled 0
1578 11:29:49.430322 PCI: 00:12.0: enabled 1
1579 11:29:49.433619 PCI: 00:12.5: enabled 0
1580 11:29:49.436837 PCI: 00:12.6: enabled 0
1581 11:29:49.436951 PCI: 00:14.0: enabled 1
1582 11:29:49.440088 PCI: 00:14.1: enabled 0
1583 11:29:49.443486 PCI: 00:14.3: enabled 1
1584 11:29:49.443597 PCI: 00:14.5: enabled 0
1585 11:29:49.446799 PCI: 00:15.0: enabled 1
1586 11:29:49.450107 PCI: 00:15.1: enabled 1
1587 11:29:49.453481 PCI: 00:15.2: enabled 0
1588 11:29:49.453594 PCI: 00:15.3: enabled 0
1589 11:29:49.456648 PCI: 00:16.0: enabled 1
1590 11:29:49.460273 PCI: 00:16.1: enabled 0
1591 11:29:49.463194 PCI: 00:16.2: enabled 0
1592 11:29:49.463319 PCI: 00:16.3: enabled 0
1593 11:29:49.467066 PCI: 00:16.4: enabled 0
1594 11:29:49.470034 PCI: 00:16.5: enabled 0
1595 11:29:49.473241 PCI: 00:17.0: enabled 1
1596 11:29:49.473337 PCI: 00:19.0: enabled 1
1597 11:29:49.476554 PCI: 00:19.1: enabled 0
1598 11:29:49.479726 PCI: 00:19.2: enabled 0
1599 11:29:49.483240 PCI: 00:1a.0: enabled 0
1600 11:29:49.483382 PCI: 00:1c.0: enabled 0
1601 11:29:49.486561 PCI: 00:1c.1: enabled 0
1602 11:29:49.489813 PCI: 00:1c.2: enabled 0
1603 11:29:49.489939 PCI: 00:1c.3: enabled 0
1604 11:29:49.493031 PCI: 00:1c.4: enabled 0
1605 11:29:49.496236 PCI: 00:1c.5: enabled 0
1606 11:29:49.499808 PCI: 00:1c.6: enabled 0
1607 11:29:49.499928 PCI: 00:1c.7: enabled 0
1608 11:29:49.503467 PCI: 00:1d.0: enabled 1
1609 11:29:49.506379 PCI: 00:1d.1: enabled 0
1610 11:29:49.509966 PCI: 00:1d.2: enabled 0
1611 11:29:49.510092 PCI: 00:1d.3: enabled 0
1612 11:29:49.513356 PCI: 00:1d.4: enabled 0
1613 11:29:49.516638 PCI: 00:1d.5: enabled 0
1614 11:29:49.519810 PCI: 00:1e.0: enabled 1
1615 11:29:49.519932 PCI: 00:1e.1: enabled 0
1616 11:29:49.523207 PCI: 00:1e.2: enabled 1
1617 11:29:49.526504 PCI: 00:1e.3: enabled 1
1618 11:29:49.526622 PCI: 00:1f.0: enabled 1
1619 11:29:49.529710 PCI: 00:1f.1: enabled 0
1620 11:29:49.532932 PCI: 00:1f.2: enabled 0
1621 11:29:49.536279 PCI: 00:1f.3: enabled 1
1622 11:29:49.536400 PCI: 00:1f.4: enabled 1
1623 11:29:49.539576 PCI: 00:1f.5: enabled 1
1624 11:29:49.542714 PCI: 00:1f.6: enabled 0
1625 11:29:49.545968 USB0 port 0: enabled 1
1626 11:29:49.546087 I2C: 01:15: enabled 1
1627 11:29:49.549257 I2C: 02:5d: enabled 1
1628 11:29:49.552613 GENERIC: 0.0: enabled 1
1629 11:29:49.552729 I2C: 03:1a: enabled 1
1630 11:29:49.555973 I2C: 03:38: enabled 1
1631 11:29:49.559286 I2C: 03:39: enabled 1
1632 11:29:49.559398 I2C: 03:3a: enabled 1
1633 11:29:49.562674 I2C: 03:3b: enabled 1
1634 11:29:49.565809 PCI: 00:00.0: enabled 1
1635 11:29:49.565930 SPI: 00: enabled 1
1636 11:29:49.569169 SPI: 01: enabled 1
1637 11:29:49.572768 PNP: 0c09.0: enabled 1
1638 11:29:49.572881 USB2 port 0: enabled 1
1639 11:29:49.575756 USB2 port 1: enabled 1
1640 11:29:49.579360 USB2 port 2: enabled 0
1641 11:29:49.582421 USB2 port 3: enabled 0
1642 11:29:49.582543 USB2 port 5: enabled 0
1643 11:29:49.586205 USB2 port 6: enabled 1
1644 11:29:49.588978 USB2 port 9: enabled 1
1645 11:29:49.589087 USB3 port 0: enabled 1
1646 11:29:49.592763 USB3 port 1: enabled 1
1647 11:29:49.596062 USB3 port 2: enabled 1
1648 11:29:49.596174 USB3 port 3: enabled 1
1649 11:29:49.599419 USB3 port 4: enabled 0
1650 11:29:49.602676 APIC: 02: enabled 1
1651 11:29:49.602798 APIC: 06: enabled 1
1652 11:29:49.605770 APIC: 01: enabled 1
1653 11:29:49.609140 APIC: 03: enabled 1
1654 11:29:49.609232 APIC: 07: enabled 1
1655 11:29:49.612445 APIC: 05: enabled 1
1656 11:29:49.612575 APIC: 04: enabled 1
1657 11:29:49.615807 PCI: 00:08.0: enabled 1
1658 11:29:49.618740 PCI: 00:14.2: enabled 1
1659 11:29:49.622388 PCI: 01:00.0: enabled 1
1660 11:29:49.626088 Disabling ACPI via APMC:
1661 11:29:49.629334 done.
1662 11:29:49.632279 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1663 11:29:49.635929 ELOG: NV offset 0xaf0000 size 0x4000
1664 11:29:49.642265 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1665 11:29:49.649437 ELOG: Event(17) added with size 13 at 2024-03-18 11:29:08 UTC
1666 11:29:49.655969 ELOG: Event(92) added with size 9 at 2024-03-18 11:29:08 UTC
1667 11:29:49.662789 ELOG: Event(93) added with size 9 at 2024-03-18 11:29:08 UTC
1668 11:29:49.668883 ELOG: Event(9A) added with size 9 at 2024-03-18 11:29:08 UTC
1669 11:29:49.675571 ELOG: Event(9E) added with size 10 at 2024-03-18 11:29:08 UTC
1670 11:29:49.682340 ELOG: Event(9F) added with size 14 at 2024-03-18 11:29:08 UTC
1671 11:29:49.685971 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1672 11:29:49.692969 ELOG: Event(A1) added with size 10 at 2024-03-18 11:29:08 UTC
1673 11:29:49.702523 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1674 11:29:49.709299 ELOG: Event(A0) added with size 9 at 2024-03-18 11:29:08 UTC
1675 11:29:49.712615 elog_add_boot_reason: Logged dev mode boot
1676 11:29:49.712739 Finalize devices...
1677 11:29:49.715849 PCI: 00:17.0 final
1678 11:29:49.719404 Devices finalized
1679 11:29:49.722685 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1680 11:29:49.729331 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1681 11:29:49.732643 ME: HFSTS1 : 0x90000245
1682 11:29:49.736150 ME: HFSTS2 : 0x3B850126
1683 11:29:49.742316 ME: HFSTS3 : 0x00000020
1684 11:29:49.746123 ME: HFSTS4 : 0x00004800
1685 11:29:49.749343 ME: HFSTS5 : 0x00000000
1686 11:29:49.752517 ME: HFSTS6 : 0x40400006
1687 11:29:49.755545 ME: Manufacturing Mode : NO
1688 11:29:49.759168 ME: FW Partition Table : OK
1689 11:29:49.762203 ME: Bringup Loader Failure : NO
1690 11:29:49.765486 ME: Firmware Init Complete : YES
1691 11:29:49.769385 ME: Boot Options Present : NO
1692 11:29:49.772032 ME: Update In Progress : NO
1693 11:29:49.775513 ME: D0i3 Support : YES
1694 11:29:49.778865 ME: Low Power State Enabled : NO
1695 11:29:49.782017 ME: CPU Replaced : NO
1696 11:29:49.785522 ME: CPU Replacement Valid : YES
1697 11:29:49.789148 ME: Current Working State : 5
1698 11:29:49.792511 ME: Current Operation State : 1
1699 11:29:49.795212 ME: Current Operation Mode : 0
1700 11:29:49.798695 ME: Error Code : 0
1701 11:29:49.801869 ME: CPU Debug Disabled : YES
1702 11:29:49.805699 ME: TXT Support : NO
1703 11:29:49.811858 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1704 11:29:49.818493 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1705 11:29:49.818588 CBFS @ c08000 size 3f8000
1706 11:29:49.825007 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1707 11:29:49.828345 CBFS: Locating 'fallback/dsdt.aml'
1708 11:29:49.831633 CBFS: Found @ offset 10bb80 size 3fa5
1709 11:29:49.838837 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1710 11:29:49.842218 CBFS @ c08000 size 3f8000
1711 11:29:49.844977 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1712 11:29:49.848109 CBFS: Locating 'fallback/slic'
1713 11:29:49.853348 CBFS: 'fallback/slic' not found.
1714 11:29:49.859952 ACPI: Writing ACPI tables at 99b3e000.
1715 11:29:49.860074 ACPI: * FACS
1716 11:29:49.863310 ACPI: * DSDT
1717 11:29:49.866539 Ramoops buffer: 0x100000@0x99a3d000.
1718 11:29:49.870342 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1719 11:29:49.876664 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1720 11:29:49.880262 Google Chrome EC: version:
1721 11:29:49.883509 ro: helios_v2.0.2659-56403530b
1722 11:29:49.886131 rw: helios_v2.0.2849-c41de27e7d
1723 11:29:49.886222 running image: 1
1724 11:29:49.890549 ACPI: * FADT
1725 11:29:49.890642 SCI is IRQ9
1726 11:29:49.897571 ACPI: added table 1/32, length now 40
1727 11:29:49.897696 ACPI: * SSDT
1728 11:29:49.901018 Found 1 CPU(s) with 8 core(s) each.
1729 11:29:49.904065 Error: Could not locate 'wifi_sar' in VPD.
1730 11:29:49.910877 Checking CBFS for default SAR values
1731 11:29:49.913936 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1732 11:29:49.917186 CBFS @ c08000 size 3f8000
1733 11:29:49.923697 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1734 11:29:49.927339 CBFS: Locating 'wifi_sar_defaults.hex'
1735 11:29:49.930534 CBFS: Found @ offset 5fac0 size 77
1736 11:29:49.933805 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1737 11:29:49.937220 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1738 11:29:49.943659 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1739 11:29:49.950437 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1740 11:29:49.953662 failed to find key in VPD: dsm_calib_r0_0
1741 11:29:49.963785 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1742 11:29:49.967011 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1743 11:29:49.970456 failed to find key in VPD: dsm_calib_r0_1
1744 11:29:49.980448 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1745 11:29:49.987049 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1746 11:29:49.990339 failed to find key in VPD: dsm_calib_r0_2
1747 11:29:49.999798 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1748 11:29:50.003484 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1749 11:29:50.010331 failed to find key in VPD: dsm_calib_r0_3
1750 11:29:50.016362 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1751 11:29:50.023087 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1752 11:29:50.026508 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1753 11:29:50.029719 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1754 11:29:50.033658 EC returned error result code 1
1755 11:29:50.037503 EC returned error result code 1
1756 11:29:50.041378 EC returned error result code 1
1757 11:29:50.047423 PS2K: Bad resp from EC. Vivaldi disabled!
1758 11:29:50.050843 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1759 11:29:50.057580 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1760 11:29:50.064273 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1761 11:29:50.067551 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1762 11:29:50.073995 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1763 11:29:50.080546 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1764 11:29:50.087239 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1765 11:29:50.090627 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1766 11:29:50.097120 ACPI: added table 2/32, length now 44
1767 11:29:50.097214 ACPI: * MCFG
1768 11:29:50.100972 ACPI: added table 3/32, length now 48
1769 11:29:50.103719 ACPI: * TPM2
1770 11:29:50.107061 TPM2 log created at 99a2d000
1771 11:29:50.110372 ACPI: added table 4/32, length now 52
1772 11:29:50.110487 ACPI: * MADT
1773 11:29:50.113762 SCI is IRQ9
1774 11:29:50.117135 ACPI: added table 5/32, length now 56
1775 11:29:50.117249 current = 99b43ac0
1776 11:29:50.120821 ACPI: * DMAR
1777 11:29:50.123817 ACPI: added table 6/32, length now 60
1778 11:29:50.127387 ACPI: * IGD OpRegion
1779 11:29:50.127475 GMA: Found VBT in CBFS
1780 11:29:50.130446 GMA: Found valid VBT in CBFS
1781 11:29:50.133716 ACPI: added table 7/32, length now 64
1782 11:29:50.136776 ACPI: * HPET
1783 11:29:50.140199 ACPI: added table 8/32, length now 68
1784 11:29:50.140306 ACPI: done.
1785 11:29:50.143796 ACPI tables: 31744 bytes.
1786 11:29:50.147079 smbios_write_tables: 99a2c000
1787 11:29:50.150539 EC returned error result code 3
1788 11:29:50.154247 Couldn't obtain OEM name from CBI
1789 11:29:50.157715 Create SMBIOS type 17
1790 11:29:50.160596 PCI: 00:00.0 (Intel Cannonlake)
1791 11:29:50.164241 PCI: 00:14.3 (Intel WiFi)
1792 11:29:50.167518 SMBIOS tables: 939 bytes.
1793 11:29:50.170918 Writing table forward entry at 0x00000500
1794 11:29:50.177399 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1795 11:29:50.180650 Writing coreboot table at 0x99b62000
1796 11:29:50.187351 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1797 11:29:50.190594 1. 0000000000001000-000000000009ffff: RAM
1798 11:29:50.194024 2. 00000000000a0000-00000000000fffff: RESERVED
1799 11:29:50.200682 3. 0000000000100000-0000000099a2bfff: RAM
1800 11:29:50.203901 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1801 11:29:50.210427 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1802 11:29:50.217169 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1803 11:29:50.220390 7. 000000009a000000-000000009f7fffff: RESERVED
1804 11:29:50.227090 8. 00000000e0000000-00000000efffffff: RESERVED
1805 11:29:50.230231 9. 00000000fc000000-00000000fc000fff: RESERVED
1806 11:29:50.233425 10. 00000000fe000000-00000000fe00ffff: RESERVED
1807 11:29:50.240516 11. 00000000fed10000-00000000fed17fff: RESERVED
1808 11:29:50.243400 12. 00000000fed80000-00000000fed83fff: RESERVED
1809 11:29:50.250000 13. 00000000fed90000-00000000fed91fff: RESERVED
1810 11:29:50.253413 14. 00000000feda0000-00000000feda1fff: RESERVED
1811 11:29:50.256724 15. 0000000100000000-000000045e7fffff: RAM
1812 11:29:50.263099 Graphics framebuffer located at 0xc0000000
1813 11:29:50.266310 Passing 5 GPIOs to payload:
1814 11:29:50.270146 NAME | PORT | POLARITY | VALUE
1815 11:29:50.276563 write protect | undefined | high | low
1816 11:29:50.279811 lid | undefined | high | high
1817 11:29:50.286173 power | undefined | high | low
1818 11:29:50.292724 oprom | undefined | high | low
1819 11:29:50.296450 EC in RW | 0x000000cb | high | low
1820 11:29:50.299808 Board ID: 4
1821 11:29:50.303155 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1822 11:29:50.306482 CBFS @ c08000 size 3f8000
1823 11:29:50.312970 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1824 11:29:50.316406 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1825 11:29:50.319735 coreboot table: 1492 bytes.
1826 11:29:50.322565 IMD ROOT 0. 99fff000 00001000
1827 11:29:50.325907 IMD SMALL 1. 99ffe000 00001000
1828 11:29:50.329268 FSP MEMORY 2. 99c4e000 003b0000
1829 11:29:50.333075 CONSOLE 3. 99c2e000 00020000
1830 11:29:50.336353 FMAP 4. 99c2d000 0000054e
1831 11:29:50.339671 TIME STAMP 5. 99c2c000 00000910
1832 11:29:50.342834 VBOOT WORK 6. 99c18000 00014000
1833 11:29:50.346135 MRC DATA 7. 99c16000 00001958
1834 11:29:50.349264 ROMSTG STCK 8. 99c15000 00001000
1835 11:29:50.352640 AFTER CAR 9. 99c0b000 0000a000
1836 11:29:50.356176 RAMSTAGE 10. 99baf000 0005c000
1837 11:29:50.359142 REFCODE 11. 99b7a000 00035000
1838 11:29:50.362444 SMM BACKUP 12. 99b6a000 00010000
1839 11:29:50.365670 COREBOOT 13. 99b62000 00008000
1840 11:29:50.369046 ACPI 14. 99b3e000 00024000
1841 11:29:50.372491 ACPI GNVS 15. 99b3d000 00001000
1842 11:29:50.376068 RAMOOPS 16. 99a3d000 00100000
1843 11:29:50.379460 TPM2 TCGLOG17. 99a2d000 00010000
1844 11:29:50.382770 SMBIOS 18. 99a2c000 00000800
1845 11:29:50.385952 IMD small region:
1846 11:29:50.389474 IMD ROOT 0. 99ffec00 00000400
1847 11:29:50.392692 FSP RUNTIME 1. 99ffebe0 00000004
1848 11:29:50.395833 EC HOSTEVENT 2. 99ffebc0 00000008
1849 11:29:50.398990 POWER STATE 3. 99ffeb80 00000040
1850 11:29:50.402536 ROMSTAGE 4. 99ffeb60 00000004
1851 11:29:50.406066 MEM INFO 5. 99ffe9a0 000001b9
1852 11:29:50.409294 VPD 6. 99ffe920 0000006c
1853 11:29:50.412670 MTRR: Physical address space:
1854 11:29:50.418995 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1855 11:29:50.425961 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1856 11:29:50.432946 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1857 11:29:50.438687 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1858 11:29:50.445963 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1859 11:29:50.452394 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1860 11:29:50.455707 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1861 11:29:50.462088 MTRR: Fixed MSR 0x250 0x0606060606060606
1862 11:29:50.465713 MTRR: Fixed MSR 0x258 0x0606060606060606
1863 11:29:50.468665 MTRR: Fixed MSR 0x259 0x0000000000000000
1864 11:29:50.471969 MTRR: Fixed MSR 0x268 0x0606060606060606
1865 11:29:50.478777 MTRR: Fixed MSR 0x269 0x0606060606060606
1866 11:29:50.482035 MTRR: Fixed MSR 0x26a 0x0606060606060606
1867 11:29:50.485321 MTRR: Fixed MSR 0x26b 0x0606060606060606
1868 11:29:50.488657 MTRR: Fixed MSR 0x26c 0x0606060606060606
1869 11:29:50.495103 MTRR: Fixed MSR 0x26d 0x0606060606060606
1870 11:29:50.498480 MTRR: Fixed MSR 0x26e 0x0606060606060606
1871 11:29:50.501934 MTRR: Fixed MSR 0x26f 0x0606060606060606
1872 11:29:50.505388 call enable_fixed_mtrr()
1873 11:29:50.508815 CPU physical address size: 39 bits
1874 11:29:50.512103 MTRR: default type WB/UC MTRR counts: 6/8.
1875 11:29:50.515372 MTRR: WB selected as default type.
1876 11:29:50.521791 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1877 11:29:50.528412 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1878 11:29:50.534809 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1879 11:29:50.541374 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1880 11:29:50.548177 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1881 11:29:50.555175 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1882 11:29:50.558473 MTRR: Fixed MSR 0x250 0x0606060606060606
1883 11:29:50.561815 MTRR: Fixed MSR 0x258 0x0606060606060606
1884 11:29:50.568013 MTRR: Fixed MSR 0x259 0x0000000000000000
1885 11:29:50.571704 MTRR: Fixed MSR 0x268 0x0606060606060606
1886 11:29:50.574539 MTRR: Fixed MSR 0x269 0x0606060606060606
1887 11:29:50.578176 MTRR: Fixed MSR 0x26a 0x0606060606060606
1888 11:29:50.584674 MTRR: Fixed MSR 0x26b 0x0606060606060606
1889 11:29:50.587971 MTRR: Fixed MSR 0x26c 0x0606060606060606
1890 11:29:50.591335 MTRR: Fixed MSR 0x26d 0x0606060606060606
1891 11:29:50.594424 MTRR: Fixed MSR 0x26e 0x0606060606060606
1892 11:29:50.601225 MTRR: Fixed MSR 0x26f 0x0606060606060606
1893 11:29:50.601321
1894 11:29:50.601397 MTRR check
1895 11:29:50.604457 Fixed MTRRs : Enabled
1896 11:29:50.607791 Variable MTRRs: Enabled
1897 11:29:50.607878
1898 11:29:50.607949 call enable_fixed_mtrr()
1899 11:29:50.614704 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1900 11:29:50.617954 CPU physical address size: 39 bits
1901 11:29:50.624740 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1902 11:29:50.628004 MTRR: Fixed MSR 0x250 0x0606060606060606
1903 11:29:50.631211 MTRR: Fixed MSR 0x258 0x0606060606060606
1904 11:29:50.634735 MTRR: Fixed MSR 0x259 0x0000000000000000
1905 11:29:50.641315 MTRR: Fixed MSR 0x268 0x0606060606060606
1906 11:29:50.644202 MTRR: Fixed MSR 0x269 0x0606060606060606
1907 11:29:50.647888 MTRR: Fixed MSR 0x26a 0x0606060606060606
1908 11:29:50.651262 MTRR: Fixed MSR 0x26b 0x0606060606060606
1909 11:29:50.657646 MTRR: Fixed MSR 0x26c 0x0606060606060606
1910 11:29:50.660949 MTRR: Fixed MSR 0x26d 0x0606060606060606
1911 11:29:50.664243 MTRR: Fixed MSR 0x26e 0x0606060606060606
1912 11:29:50.667446 MTRR: Fixed MSR 0x26f 0x0606060606060606
1913 11:29:50.674103 MTRR: Fixed MSR 0x250 0x0606060606060606
1914 11:29:50.674226 call enable_fixed_mtrr()
1915 11:29:50.681241 MTRR: Fixed MSR 0x258 0x0606060606060606
1916 11:29:50.684346 MTRR: Fixed MSR 0x259 0x0000000000000000
1917 11:29:50.687243 MTRR: Fixed MSR 0x268 0x0606060606060606
1918 11:29:50.690755 MTRR: Fixed MSR 0x269 0x0606060606060606
1919 11:29:50.697267 MTRR: Fixed MSR 0x26a 0x0606060606060606
1920 11:29:50.700561 MTRR: Fixed MSR 0x26b 0x0606060606060606
1921 11:29:50.704497 MTRR: Fixed MSR 0x26c 0x0606060606060606
1922 11:29:50.707235 MTRR: Fixed MSR 0x26d 0x0606060606060606
1923 11:29:50.710493 MTRR: Fixed MSR 0x26e 0x0606060606060606
1924 11:29:50.717130 MTRR: Fixed MSR 0x26f 0x0606060606060606
1925 11:29:50.720582 CPU physical address size: 39 bits
1926 11:29:50.723899 call enable_fixed_mtrr()
1927 11:29:50.727090 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 11:29:50.730499 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 11:29:50.733816 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 11:29:50.740400 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 11:29:50.743726 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 11:29:50.747207 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 11:29:50.750465 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 11:29:50.756933 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 11:29:50.760787 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 11:29:50.763981 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 11:29:50.767273 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 11:29:50.773852 MTRR: Fixed MSR 0x250 0x0606060606060606
1939 11:29:50.773940 call enable_fixed_mtrr()
1940 11:29:50.780368 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 11:29:50.783948 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 11:29:50.787184 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 11:29:50.790738 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 11:29:50.794023 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 11:29:50.800558 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 11:29:50.803465 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 11:29:50.807032 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 11:29:50.810409 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 11:29:50.816869 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 11:29:50.820195 CPU physical address size: 39 bits
1951 11:29:50.823401 call enable_fixed_mtrr()
1952 11:29:50.826740 MTRR: Fixed MSR 0x250 0x0606060606060606
1953 11:29:50.830050 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 11:29:50.833405 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 11:29:50.840049 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 11:29:50.843442 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 11:29:50.846547 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 11:29:50.849871 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 11:29:50.856348 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 11:29:50.859802 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 11:29:50.862944 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 11:29:50.866700 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 11:29:50.873203 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 11:29:50.873290 call enable_fixed_mtrr()
1965 11:29:50.876469 CBFS @ c08000 size 3f8000
1966 11:29:50.883098 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1967 11:29:50.886791 CPU physical address size: 39 bits
1968 11:29:50.889874 MTRR: Fixed MSR 0x258 0x0606060606060606
1969 11:29:50.892984 MTRR: Fixed MSR 0x259 0x0000000000000000
1970 11:29:50.899649 MTRR: Fixed MSR 0x268 0x0606060606060606
1971 11:29:50.902905 MTRR: Fixed MSR 0x269 0x0606060606060606
1972 11:29:50.906465 MTRR: Fixed MSR 0x26a 0x0606060606060606
1973 11:29:50.909622 MTRR: Fixed MSR 0x26b 0x0606060606060606
1974 11:29:50.916227 MTRR: Fixed MSR 0x26c 0x0606060606060606
1975 11:29:50.919696 MTRR: Fixed MSR 0x26d 0x0606060606060606
1976 11:29:50.923083 MTRR: Fixed MSR 0x26e 0x0606060606060606
1977 11:29:50.926359 MTRR: Fixed MSR 0x26f 0x0606060606060606
1978 11:29:50.929553 CPU physical address size: 39 bits
1979 11:29:50.932912 call enable_fixed_mtrr()
1980 11:29:50.936266 CPU physical address size: 39 bits
1981 11:29:50.939787 CBFS: Locating 'fallback/payload'
1982 11:29:50.943112 CPU physical address size: 39 bits
1983 11:29:50.945904 CBFS: Found @ offset 1c96c0 size 3f798
1984 11:29:50.952574 Checking segment from ROM address 0xffdd16f8
1985 11:29:50.955874 Checking segment from ROM address 0xffdd1714
1986 11:29:50.962890 Loading segment from ROM address 0xffdd16f8
1987 11:29:50.962978 code (compression=0)
1988 11:29:50.972391 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1989 11:29:50.979017 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1990 11:29:50.982240 it's not compressed!
1991 11:29:51.075114 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1992 11:29:51.081595 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1993 11:29:51.084993 Loading segment from ROM address 0xffdd1714
1994 11:29:51.088284 Entry Point 0x30000000
1995 11:29:51.090974 Loaded segments
1996 11:29:51.096944 Finalizing chipset.
1997 11:29:51.100181 Finalizing SMM.
1998 11:29:51.103476 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1999 11:29:51.107024 mp_park_aps done after 0 msecs.
2000 11:29:51.113705 Jumping to boot code at 30000000(99b62000)
2001 11:29:51.120192 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2002 11:29:51.120309
2003 11:29:51.120390
2004 11:29:51.120495
2005 11:29:51.123601 Starting depthcharge on Helios...
2006 11:29:51.123693
2007 11:29:51.124163 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2008 11:29:51.124311 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2009 11:29:51.124406 Setting prompt string to ['hatch:']
2010 11:29:51.124501 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2011 11:29:51.133208 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2012 11:29:51.133311
2013 11:29:51.139817 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2014 11:29:51.139938
2015 11:29:51.146569 board_setup: Info: eMMC controller not present; skipping
2016 11:29:51.146663
2017 11:29:51.149798 New NVMe Controller 0x30053ac0 @ 00:1d:00
2018 11:29:51.149891
2019 11:29:51.156700 board_setup: Info: SDHCI controller not present; skipping
2020 11:29:51.156792
2021 11:29:51.159733 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2022 11:29:51.163351
2023 11:29:51.163443 Wipe memory regions:
2024 11:29:51.163539
2025 11:29:51.166514 [0x00000000001000, 0x000000000a0000)
2026 11:29:51.166606
2027 11:29:51.169664 [0x00000000100000, 0x00000030000000)
2028 11:29:51.235903
2029 11:29:51.239207 [0x00000030657430, 0x00000099a2c000)
2030 11:29:51.385522
2031 11:29:51.388865 [0x00000100000000, 0x0000045e800000)
2032 11:29:52.846086
2033 11:29:52.846243 R8152: Initializing
2034 11:29:52.846350
2035 11:29:52.849255 Version 9 (ocp_data = 6010)
2036 11:29:52.853835
2037 11:29:52.853926 R8152: Done initializing
2038 11:29:52.854000
2039 11:29:52.857018 Adding net device
2040 11:29:53.339809
2041 11:29:53.339980 R8152: Initializing
2042 11:29:53.340096
2043 11:29:53.342821 Version 6 (ocp_data = 5c30)
2044 11:29:53.342905
2045 11:29:53.346328 R8152: Done initializing
2046 11:29:53.346420
2047 11:29:53.349679 net_add_device: Attemp to include the same device
2048 11:29:53.353382
2049 11:29:53.360581 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2050 11:29:53.360673
2051 11:29:53.360745
2052 11:29:53.360811
2053 11:29:53.361106 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2055 11:29:53.461456 hatch: tftpboot 192.168.201.1 13086481/tftp-deploy-ph24o8l6/kernel/bzImage 13086481/tftp-deploy-ph24o8l6/kernel/cmdline 13086481/tftp-deploy-ph24o8l6/ramdisk/ramdisk.cpio.gz
2056 11:29:53.461606 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 11:29:53.461696 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2058 11:29:53.465883 tftpboot 192.168.201.1 13086481/tftp-deploy-ph24o8l6/kernel/bzIploy-ph24o8l6/kernel/cmdline 13086481/tftp-deploy-ph24o8l6/ramdisk/ramdisk.cpio.gz
2059 11:29:53.465982
2060 11:29:53.466059 Waiting for link
2061 11:29:53.667044
2062 11:29:53.667189 done.
2063 11:29:53.667264
2064 11:29:53.667332 MAC: 00:24:32:50:1a:59
2065 11:29:53.667397
2066 11:29:53.670204 Sending DHCP discover... done.
2067 11:29:53.670296
2068 11:29:53.673413 Waiting for reply... done.
2069 11:29:53.673504
2070 11:29:53.676434 Sending DHCP request... done.
2071 11:29:53.676525
2072 11:29:53.680053 Waiting for reply... done.
2073 11:29:53.680172
2074 11:29:53.683146 My ip is 192.168.201.14
2075 11:29:53.683237
2076 11:29:53.686824 The DHCP server ip is 192.168.201.1
2077 11:29:53.686916
2078 11:29:53.689699 TFTP server IP predefined by user: 192.168.201.1
2079 11:29:53.689791
2080 11:29:53.696191 Bootfile predefined by user: 13086481/tftp-deploy-ph24o8l6/kernel/bzImage
2081 11:29:53.696308
2082 11:29:53.699996 Sending tftp read request... done.
2083 11:29:53.700116
2084 11:29:53.706899 Waiting for the transfer...
2085 11:29:53.706992
2086 11:29:54.237364 00000000 ################################################################
2087 11:29:54.237518
2088 11:29:54.755770 00080000 ################################################################
2089 11:29:54.755959
2090 11:29:55.281511 00100000 ################################################################
2091 11:29:55.281670
2092 11:29:55.799555 00180000 ################################################################
2093 11:29:55.799711
2094 11:29:56.307618 00200000 ################################################################
2095 11:29:56.307780
2096 11:29:56.815535 00280000 ################################################################
2097 11:29:56.815702
2098 11:29:57.328732 00300000 ################################################################
2099 11:29:57.328928
2100 11:29:57.842559 00380000 ################################################################
2101 11:29:57.842724
2102 11:29:58.350418 00400000 ################################################################
2103 11:29:58.350578
2104 11:29:58.872214 00480000 ################################################################
2105 11:29:58.872418
2106 11:29:59.380678 00500000 ################################################################
2107 11:29:59.380818
2108 11:29:59.890454 00580000 ################################################################
2109 11:29:59.890646
2110 11:30:00.396971 00600000 ################################################################
2111 11:30:00.397174
2112 11:30:00.903919 00680000 ################################################################
2113 11:30:00.904131
2114 11:30:01.425940 00700000 ################################################################
2115 11:30:01.426114
2116 11:30:01.934442 00780000 ################################################################
2117 11:30:01.934610
2118 11:30:02.446136 00800000 ################################################################
2119 11:30:02.446302
2120 11:30:02.913664 00880000 ######################################################### done.
2121 11:30:02.913855
2122 11:30:02.917096 The bootfile was 9375632 bytes long.
2123 11:30:02.917225
2124 11:30:02.920236 Sending tftp read request... done.
2125 11:30:02.920364
2126 11:30:02.923619 Waiting for the transfer...
2127 11:30:02.923753
2128 11:30:03.448473 00000000 ################################################################
2129 11:30:03.448632
2130 11:30:03.978228 00080000 ################################################################
2131 11:30:03.978421
2132 11:30:04.501306 00100000 ################################################################
2133 11:30:04.501468
2134 11:30:05.017950 00180000 ################################################################
2135 11:30:05.018121
2136 11:30:05.529642 00200000 ################################################################
2137 11:30:05.529793
2138 11:30:06.061237 00280000 ################################################################
2139 11:30:06.061393
2140 11:30:06.585708 00300000 ################################################################
2141 11:30:06.585863
2142 11:30:07.103570 00380000 ################################################################
2143 11:30:07.103751
2144 11:30:07.617512 00400000 ################################################################
2145 11:30:07.617655
2146 11:30:08.131188 00480000 ################################################################
2147 11:30:08.131349
2148 11:30:08.636483 00500000 ################################################################ done.
2149 11:30:08.636632
2150 11:30:08.639692 Sending tftp read request... done.
2151 11:30:08.639789
2152 11:30:08.642958 Waiting for the transfer...
2153 11:30:08.643053
2154 11:30:08.646683 00000000 # done.
2155 11:30:08.646792
2156 11:30:08.653212 Command line loaded dynamically from TFTP file: 13086481/tftp-deploy-ph24o8l6/kernel/cmdline
2157 11:30:08.653305
2158 11:30:08.683263 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13086481/extract-nfsrootfs-gzwobq0_,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2159 11:30:08.683368
2160 11:30:08.689525 ec_init(0): CrosEC protocol v3 supported (256, 256)
2161 11:30:08.694030
2162 11:30:08.697206 Shutting down all USB controllers.
2163 11:30:08.697328
2164 11:30:08.697433 Removing current net device
2165 11:30:08.701174
2166 11:30:08.701268 Finalizing coreboot
2167 11:30:08.701340
2168 11:30:08.707900 Exiting depthcharge with code 4 at timestamp: 24925030
2169 11:30:08.707987
2170 11:30:08.708056
2171 11:30:08.708123 Starting kernel ...
2172 11:30:08.708189
2173 11:30:08.708295
2174 11:30:08.708933 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2175 11:30:08.709074 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2176 11:30:08.709188 Setting prompt string to ['Linux version [0-9]']
2177 11:30:08.709299 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2178 11:30:08.709406 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2180 11:34:32.709966 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2182 11:34:32.711016 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2184 11:34:32.712008 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2187 11:34:32.713557 end: 2 depthcharge-action (duration 00:05:00) [common]
2189 11:34:32.714669 Cleaning after the job
2190 11:34:32.715004 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086481/tftp-deploy-ph24o8l6/ramdisk
2191 11:34:32.715993 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086481/tftp-deploy-ph24o8l6/kernel
2192 11:34:32.717690 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086481/tftp-deploy-ph24o8l6/nfsrootfs
2193 11:34:32.800728 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086481/tftp-deploy-ph24o8l6/modules
2194 11:34:32.801226 start: 5.1 power-off (timeout 00:00:30) [common]
2195 11:34:32.801415 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2196 11:34:32.882583 >> Command sent successfully.
2197 11:34:32.889032 Returned 0 in 0 seconds
2198 11:34:32.990138 end: 5.1 power-off (duration 00:00:00) [common]
2200 11:34:32.991590 start: 5.2 read-feedback (timeout 00:10:00) [common]
2201 11:34:32.992802 Listened to connection for namespace 'common' for up to 1s
2203 11:34:32.994090 Listened to connection for namespace 'common' for up to 1s
2204 11:34:33.992552 Finalising connection for namespace 'common'
2205 11:34:33.993232 Disconnecting from shell: Finalise
2206 11:34:33.993633
2207 11:34:34.094772 end: 5.2 read-feedback (duration 00:00:01) [common]
2208 11:34:34.095429 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13086481
2209 11:34:34.442471 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13086481
2210 11:34:34.442686 JobError: Your job cannot terminate cleanly.