Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 11:33:48.059387 lava-dispatcher, installed at version: 2024.01
2 11:33:48.059601 start: 0 validate
3 11:33:48.059730 Start time: 2024-03-18 11:33:48.059722+00:00 (UTC)
4 11:33:48.059850 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:33:48.059977 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Finitrd.cpio.gz exists
6 11:33:48.315142 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:33:48.315871 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-3115-g0a25e06c1d85%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:33:48.579831 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:33:48.580663 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:33:48.844132 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:33:48.845105 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-3115-g0a25e06c1d85%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 11:33:49.115917 validate duration: 1.06
14 11:33:49.117396 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:33:49.117941 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:33:49.118430 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:33:49.119075 Not decompressing ramdisk as can be used compressed.
18 11:33:49.119565 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/initrd.cpio.gz
19 11:33:49.119927 saving as /var/lib/lava/dispatcher/tmp/13086466/tftp-deploy-fu09mc18/ramdisk/initrd.cpio.gz
20 11:33:49.120333 total size: 5431448 (5 MB)
21 11:33:49.126491 progress 0 % (0 MB)
22 11:33:49.136124 progress 5 % (0 MB)
23 11:33:49.142493 progress 10 % (0 MB)
24 11:33:49.146884 progress 15 % (0 MB)
25 11:33:49.150900 progress 20 % (1 MB)
26 11:33:49.154140 progress 25 % (1 MB)
27 11:33:49.156927 progress 30 % (1 MB)
28 11:33:49.159745 progress 35 % (1 MB)
29 11:33:49.162155 progress 40 % (2 MB)
30 11:33:49.164385 progress 45 % (2 MB)
31 11:33:49.166433 progress 50 % (2 MB)
32 11:33:49.168666 progress 55 % (2 MB)
33 11:33:49.170448 progress 60 % (3 MB)
34 11:33:49.172242 progress 65 % (3 MB)
35 11:33:49.174204 progress 70 % (3 MB)
36 11:33:49.175807 progress 75 % (3 MB)
37 11:33:49.177415 progress 80 % (4 MB)
38 11:33:49.178970 progress 85 % (4 MB)
39 11:33:49.180603 progress 90 % (4 MB)
40 11:33:49.182070 progress 95 % (4 MB)
41 11:33:49.183567 progress 100 % (5 MB)
42 11:33:49.183777 5 MB downloaded in 0.06 s (81.61 MB/s)
43 11:33:49.183934 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:33:49.184221 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:33:49.184309 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:33:49.184396 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:33:49.184531 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-3115-g0a25e06c1d85/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 11:33:49.184603 saving as /var/lib/lava/dispatcher/tmp/13086466/tftp-deploy-fu09mc18/kernel/bzImage
50 11:33:49.184663 total size: 9375632 (8 MB)
51 11:33:49.184723 No compression specified
52 11:33:49.185818 progress 0 % (0 MB)
53 11:33:49.188340 progress 5 % (0 MB)
54 11:33:49.190782 progress 10 % (0 MB)
55 11:33:49.193215 progress 15 % (1 MB)
56 11:33:49.195797 progress 20 % (1 MB)
57 11:33:49.198235 progress 25 % (2 MB)
58 11:33:49.200704 progress 30 % (2 MB)
59 11:33:49.203296 progress 35 % (3 MB)
60 11:33:49.205767 progress 40 % (3 MB)
61 11:33:49.208221 progress 45 % (4 MB)
62 11:33:49.210818 progress 50 % (4 MB)
63 11:33:49.213247 progress 55 % (4 MB)
64 11:33:49.215720 progress 60 % (5 MB)
65 11:33:49.218156 progress 65 % (5 MB)
66 11:33:49.220740 progress 70 % (6 MB)
67 11:33:49.223180 progress 75 % (6 MB)
68 11:33:49.225665 progress 80 % (7 MB)
69 11:33:49.228302 progress 85 % (7 MB)
70 11:33:49.230685 progress 90 % (8 MB)
71 11:33:49.233148 progress 95 % (8 MB)
72 11:33:49.235712 progress 100 % (8 MB)
73 11:33:49.235830 8 MB downloaded in 0.05 s (174.76 MB/s)
74 11:33:49.235976 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:33:49.236252 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:33:49.236341 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:33:49.236426 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:33:49.236566 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/full.rootfs.tar.xz
80 11:33:49.236634 saving as /var/lib/lava/dispatcher/tmp/13086466/tftp-deploy-fu09mc18/nfsrootfs/full.rootfs.tar
81 11:33:49.236695 total size: 133429172 (127 MB)
82 11:33:49.236761 Using unxz to decompress xz
83 11:33:49.241129 progress 0 % (0 MB)
84 11:33:49.586240 progress 5 % (6 MB)
85 11:33:49.937341 progress 10 % (12 MB)
86 11:33:50.225237 progress 15 % (19 MB)
87 11:33:50.410110 progress 20 % (25 MB)
88 11:33:50.652619 progress 25 % (31 MB)
89 11:33:50.999922 progress 30 % (38 MB)
90 11:33:51.342520 progress 35 % (44 MB)
91 11:33:51.746476 progress 40 % (50 MB)
92 11:33:52.134282 progress 45 % (57 MB)
93 11:33:52.489717 progress 50 % (63 MB)
94 11:33:52.866940 progress 55 % (70 MB)
95 11:33:53.226689 progress 60 % (76 MB)
96 11:33:53.589067 progress 65 % (82 MB)
97 11:33:53.953512 progress 70 % (89 MB)
98 11:33:54.337314 progress 75 % (95 MB)
99 11:33:54.776403 progress 80 % (101 MB)
100 11:33:55.212030 progress 85 % (108 MB)
101 11:33:55.476930 progress 90 % (114 MB)
102 11:33:55.825915 progress 95 % (120 MB)
103 11:33:56.216584 progress 100 % (127 MB)
104 11:33:56.222764 127 MB downloaded in 6.99 s (18.21 MB/s)
105 11:33:56.223041 end: 1.3.1 http-download (duration 00:00:07) [common]
107 11:33:56.223334 end: 1.3 download-retry (duration 00:00:07) [common]
108 11:33:56.223442 start: 1.4 download-retry (timeout 00:09:53) [common]
109 11:33:56.223549 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 11:33:56.223720 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-3115-g0a25e06c1d85/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 11:33:56.223798 saving as /var/lib/lava/dispatcher/tmp/13086466/tftp-deploy-fu09mc18/modules/modules.tar
112 11:33:56.223882 total size: 253492 (0 MB)
113 11:33:56.223990 Using unxz to decompress xz
114 11:33:56.228806 progress 12 % (0 MB)
115 11:33:56.229225 progress 25 % (0 MB)
116 11:33:56.229476 progress 38 % (0 MB)
117 11:33:56.231016 progress 51 % (0 MB)
118 11:33:56.232912 progress 64 % (0 MB)
119 11:33:56.234753 progress 77 % (0 MB)
120 11:33:56.236593 progress 90 % (0 MB)
121 11:33:56.238317 progress 100 % (0 MB)
122 11:33:56.243948 0 MB downloaded in 0.02 s (12.05 MB/s)
123 11:33:56.244200 end: 1.4.1 http-download (duration 00:00:00) [common]
125 11:33:56.244472 end: 1.4 download-retry (duration 00:00:00) [common]
126 11:33:56.244574 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 11:33:56.244675 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 11:33:58.456927 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/13086466/extract-nfsrootfs-raw_siyu
129 11:33:58.457136 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 11:33:58.457240 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
131 11:33:58.457408 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv
132 11:33:58.457541 makedir: /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin
133 11:33:58.457647 makedir: /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/tests
134 11:33:58.457748 makedir: /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/results
135 11:33:58.457850 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-add-keys
136 11:33:58.457998 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-add-sources
137 11:33:58.458132 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-background-process-start
138 11:33:58.458265 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-background-process-stop
139 11:33:58.458395 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-common-functions
140 11:33:58.458524 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-echo-ipv4
141 11:33:58.458654 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-install-packages
142 11:33:58.458782 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-installed-packages
143 11:33:58.458909 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-os-build
144 11:33:58.459039 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-probe-channel
145 11:33:58.459166 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-probe-ip
146 11:33:58.459294 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-target-ip
147 11:33:58.459424 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-target-mac
148 11:33:58.459552 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-target-storage
149 11:33:58.459682 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-test-case
150 11:33:58.459812 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-test-event
151 11:33:58.459938 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-test-feedback
152 11:33:58.460073 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-test-raise
153 11:33:58.460241 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-test-reference
154 11:33:58.460371 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-test-runner
155 11:33:58.460498 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-test-set
156 11:33:58.460626 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-test-shell
157 11:33:58.460756 Updating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-install-packages (oe)
158 11:33:58.460915 Updating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/bin/lava-installed-packages (oe)
159 11:33:58.461041 Creating /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/environment
160 11:33:58.461139 LAVA metadata
161 11:33:58.461209 - LAVA_JOB_ID=13086466
162 11:33:58.461274 - LAVA_DISPATCHER_IP=192.168.201.1
163 11:33:58.461376 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
164 11:33:58.461444 skipped lava-vland-overlay
165 11:33:58.461519 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 11:33:58.461599 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
167 11:33:58.461660 skipped lava-multinode-overlay
168 11:33:58.461732 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 11:33:58.461809 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
170 11:33:58.461883 Loading test definitions
171 11:33:58.461972 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
172 11:33:58.462042 Using /lava-13086466 at stage 0
173 11:33:58.462378 uuid=13086466_1.5.2.3.1 testdef=None
174 11:33:58.462471 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 11:33:58.462556 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
176 11:33:58.463070 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 11:33:58.463310 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
179 11:33:58.463959 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 11:33:58.464241 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
182 11:33:58.464873 runner path: /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/0/tests/0_dmesg test_uuid 13086466_1.5.2.3.1
183 11:33:58.465036 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 11:33:58.465263 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
186 11:33:58.465334 Using /lava-13086466 at stage 1
187 11:33:58.465638 uuid=13086466_1.5.2.3.5 testdef=None
188 11:33:58.465727 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 11:33:58.465811 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
190 11:33:58.466288 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 11:33:58.466505 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
193 11:33:58.467158 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 11:33:58.467387 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
196 11:33:58.468023 runner path: /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/1/tests/1_bootrr test_uuid 13086466_1.5.2.3.5
197 11:33:58.468354 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 11:33:58.468561 Creating lava-test-runner.conf files
200 11:33:58.468624 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/0 for stage 0
201 11:33:58.468715 - 0_dmesg
202 11:33:58.468794 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13086466/lava-overlay-p4ateamv/lava-13086466/1 for stage 1
203 11:33:58.468886 - 1_bootrr
204 11:33:58.468981 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 11:33:58.469066 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
206 11:33:58.476376 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 11:33:58.476477 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
208 11:33:58.476562 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 11:33:58.476645 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 11:33:58.476730 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
211 11:33:58.615341 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 11:33:58.615738 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
213 11:33:58.615860 extracting modules file /var/lib/lava/dispatcher/tmp/13086466/tftp-deploy-fu09mc18/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13086466/extract-nfsrootfs-raw_siyu
214 11:33:58.629941 extracting modules file /var/lib/lava/dispatcher/tmp/13086466/tftp-deploy-fu09mc18/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13086466/extract-overlay-ramdisk-ygkakuqz/ramdisk
215 11:33:58.643973 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 11:33:58.644136 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 11:33:58.644227 [common] Applying overlay to NFS
218 11:33:58.644300 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13086466/compress-overlay-8oev2yuk/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13086466/extract-nfsrootfs-raw_siyu
219 11:33:58.652537 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 11:33:58.652644 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 11:33:58.652741 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 11:33:58.652836 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 11:33:58.652914 Building ramdisk /var/lib/lava/dispatcher/tmp/13086466/extract-overlay-ramdisk-ygkakuqz/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13086466/extract-overlay-ramdisk-ygkakuqz/ramdisk
224 11:33:58.724330 >> 26189 blocks
225 11:33:59.257177 rename /var/lib/lava/dispatcher/tmp/13086466/extract-overlay-ramdisk-ygkakuqz/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13086466/tftp-deploy-fu09mc18/ramdisk/ramdisk.cpio.gz
226 11:33:59.257638 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 11:33:59.257762 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
228 11:33:59.257862 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
229 11:33:59.257955 No mkimage arch provided, not using FIT.
230 11:33:59.258043 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 11:33:59.258129 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 11:33:59.258239 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 11:33:59.258333 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
234 11:33:59.258418 No LXC device requested
235 11:33:59.258500 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 11:33:59.258589 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
237 11:33:59.258674 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 11:33:59.258753 Checking files for TFTP limit of 4294967296 bytes.
239 11:33:59.259169 end: 1 tftp-deploy (duration 00:00:10) [common]
240 11:33:59.259280 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 11:33:59.259372 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 11:33:59.259499 substitutions:
243 11:33:59.259567 - {DTB}: None
244 11:33:59.259629 - {INITRD}: 13086466/tftp-deploy-fu09mc18/ramdisk/ramdisk.cpio.gz
245 11:33:59.259691 - {KERNEL}: 13086466/tftp-deploy-fu09mc18/kernel/bzImage
246 11:33:59.259749 - {LAVA_MAC}: None
247 11:33:59.259805 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/13086466/extract-nfsrootfs-raw_siyu
248 11:33:59.259861 - {NFS_SERVER_IP}: 192.168.201.1
249 11:33:59.259916 - {PRESEED_CONFIG}: None
250 11:33:59.259970 - {PRESEED_LOCAL}: None
251 11:33:59.260025 - {RAMDISK}: 13086466/tftp-deploy-fu09mc18/ramdisk/ramdisk.cpio.gz
252 11:33:59.260137 - {ROOT_PART}: None
253 11:33:59.260192 - {ROOT}: None
254 11:33:59.260246 - {SERVER_IP}: 192.168.201.1
255 11:33:59.260301 - {TEE}: None
256 11:33:59.260355 Parsed boot commands:
257 11:33:59.260409 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 11:33:59.260587 Parsed boot commands: tftpboot 192.168.201.1 13086466/tftp-deploy-fu09mc18/kernel/bzImage 13086466/tftp-deploy-fu09mc18/kernel/cmdline 13086466/tftp-deploy-fu09mc18/ramdisk/ramdisk.cpio.gz
259 11:33:59.260677 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 11:33:59.260765 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 11:33:59.260856 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 11:33:59.260947 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 11:33:59.261017 Not connected, no need to disconnect.
264 11:33:59.261092 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 11:33:59.261176 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 11:33:59.261245 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-10'
267 11:33:59.265580 Setting prompt string to ['lava-test: # ']
268 11:33:59.265942 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 11:33:59.266050 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 11:33:59.266145 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 11:33:59.266260 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 11:33:59.266548 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
273 11:34:04.412279 >> Command sent successfully.
274 11:34:04.423802 Returned 0 in 5 seconds
275 11:34:04.525131 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 11:34:04.526502 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 11:34:04.526992 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 11:34:04.527435 Setting prompt string to 'Starting depthcharge on Voema...'
280 11:34:04.527822 Changing prompt to 'Starting depthcharge on Voema...'
281 11:34:04.528233 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 11:34:04.529504 [Enter `^Ec?' for help]
283 11:34:06.079268
284 11:34:06.079972
285 11:34:06.088879 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 11:34:06.095273 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
287 11:34:06.099092 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 11:34:06.102107 CPU: AES supported, TXT NOT supported, VT supported
289 11:34:06.108725 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 11:34:06.112730 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 11:34:06.119360 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 11:34:06.122557 VBOOT: Loading verstage.
293 11:34:06.125456 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 11:34:06.132796 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 11:34:06.135380 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 11:34:06.145889 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 11:34:06.152848 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 11:34:06.153349
299 11:34:06.153728
300 11:34:06.163019 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 11:34:06.179750 Probing TPM: . done!
302 11:34:06.182911 TPM ready after 0 ms
303 11:34:06.186584 Connected to device vid:did:rid of 1ae0:0028:00
304 11:34:06.197229 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
305 11:34:06.203978 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 11:34:06.207243 Initialized TPM device CR50 revision 0
307 11:34:06.264019 tlcl_send_startup: Startup return code is 0
308 11:34:06.264596 TPM: setup succeeded
309 11:34:06.279558 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 11:34:06.294124 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 11:34:06.306218 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 11:34:06.315948 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 11:34:06.319744 Chrome EC: UHEPI supported
314 11:34:06.323271 Phase 1
315 11:34:06.326681 FMAP: area GBB found @ 1805000 (458752 bytes)
316 11:34:06.336212 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 11:34:06.343256 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 11:34:06.349844 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 11:34:06.356332 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 11:34:06.359346 Recovery requested (1009000e)
321 11:34:06.362453 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 11:34:06.374943 tlcl_extend: response is 0
323 11:34:06.381563 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 11:34:06.390944 tlcl_extend: response is 0
325 11:34:06.397982 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 11:34:06.404379 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 11:34:06.411374 BS: verstage times (exec / console): total (unknown) / 142 ms
328 11:34:06.411957
329 11:34:06.412407
330 11:34:06.424092 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 11:34:06.430667 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 11:34:06.434178 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 11:34:06.440533 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 11:34:06.443379 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 11:34:06.447206 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 11:34:06.449950 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
337 11:34:06.453553 TCO_STS: 0000 0000
338 11:34:06.456541 GEN_PMCON: d0015038 00002200
339 11:34:06.460163 GBLRST_CAUSE: 00000000 00000000
340 11:34:06.463888 HPR_CAUSE0: 00000000
341 11:34:06.464403 prev_sleep_state 5
342 11:34:06.466384 Boot Count incremented to 27839
343 11:34:06.473305 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 11:34:06.480224 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 11:34:06.489828 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 11:34:06.496606 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 11:34:06.499927 Chrome EC: UHEPI supported
348 11:34:06.506569 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 11:34:06.517786 Probing TPM: done!
350 11:34:06.524557 Connected to device vid:did:rid of 1ae0:0028:00
351 11:34:06.534643 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
352 11:34:06.538827 Initialized TPM device CR50 revision 0
353 11:34:06.553074 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 11:34:06.560128 MRC: Hash idx 0x100b comparison successful.
355 11:34:06.562423 MRC cache found, size faa8
356 11:34:06.562905 bootmode is set to: 2
357 11:34:06.566639 SPD index = 2
358 11:34:06.572836 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 11:34:06.576356 SPD: module type is LPDDR4X
360 11:34:06.579080 SPD: module part number is MT53D1G64D4NW-046
361 11:34:06.586098 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
362 11:34:06.589954 SPD: device width 16 bits, bus width 16 bits
363 11:34:06.596503 SPD: module size is 2048 MB (per channel)
364 11:34:07.026095 CBMEM:
365 11:34:07.029414 IMD: root @ 0x76fff000 254 entries.
366 11:34:07.032526 IMD: root @ 0x76ffec00 62 entries.
367 11:34:07.036324 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 11:34:07.042881 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 11:34:07.046039 External stage cache:
370 11:34:07.049470 IMD: root @ 0x7b3ff000 254 entries.
371 11:34:07.052527 IMD: root @ 0x7b3fec00 62 entries.
372 11:34:07.067569 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 11:34:07.074286 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 11:34:07.080338 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 11:34:07.094508 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 11:34:07.100813 cse_lite: Skip switching to RW in the recovery path
377 11:34:07.101353 8 DIMMs found
378 11:34:07.104126 SMM Memory Map
379 11:34:07.107924 SMRAM : 0x7b000000 0x800000
380 11:34:07.111367 Subregion 0: 0x7b000000 0x200000
381 11:34:07.114851 Subregion 1: 0x7b200000 0x200000
382 11:34:07.117672 Subregion 2: 0x7b400000 0x400000
383 11:34:07.118291 top_of_ram = 0x77000000
384 11:34:07.124268 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 11:34:07.130725 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 11:34:07.134018 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 11:34:07.140186 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 11:34:07.146771 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 11:34:07.153338 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 11:34:07.164573 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 11:34:07.170908 Processing 211 relocs. Offset value of 0x74c0b000
392 11:34:07.177511 BS: romstage times (exec / console): total (unknown) / 277 ms
393 11:34:07.182750
394 11:34:07.183232
395 11:34:07.193024 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 11:34:07.195870 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 11:34:07.205661 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 11:34:07.212728 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 11:34:07.218951 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 11:34:07.225455 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 11:34:07.269343 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 11:34:07.275544 Processing 5008 relocs. Offset value of 0x75d98000
403 11:34:07.278969 BS: postcar times (exec / console): total (unknown) / 59 ms
404 11:34:07.282535
405 11:34:07.282640
406 11:34:07.292413 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 11:34:07.292529 Normal boot
408 11:34:07.295620 FW_CONFIG value is 0x804c02
409 11:34:07.298669 PCI: 00:07.0 disabled by fw_config
410 11:34:07.301970 PCI: 00:07.1 disabled by fw_config
411 11:34:07.305434 PCI: 00:0d.2 disabled by fw_config
412 11:34:07.312211 PCI: 00:1c.7 disabled by fw_config
413 11:34:07.315913 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 11:34:07.322136 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 11:34:07.328781 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 11:34:07.331952 GENERIC: 0.0 disabled by fw_config
417 11:34:07.335675 GENERIC: 1.0 disabled by fw_config
418 11:34:07.339117 fw_config match found: DB_USB=USB3_ACTIVE
419 11:34:07.342066 fw_config match found: DB_USB=USB3_ACTIVE
420 11:34:07.345252 fw_config match found: DB_USB=USB3_ACTIVE
421 11:34:07.351930 fw_config match found: DB_USB=USB3_ACTIVE
422 11:34:07.355621 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 11:34:07.365560 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 11:34:07.371793 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 11:34:07.378402 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 11:34:07.385132 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 11:34:07.388230 microcode: Update skipped, already up-to-date
428 11:34:07.395447 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 11:34:07.423338 Detected 4 core, 8 thread CPU.
430 11:34:07.426415 Setting up SMI for CPU
431 11:34:07.429595 IED base = 0x7b400000
432 11:34:07.432684 IED size = 0x00400000
433 11:34:07.432768 Will perform SMM setup.
434 11:34:07.439078 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
435 11:34:07.445831 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 11:34:07.452229 Processing 16 relocs. Offset value of 0x00030000
437 11:34:07.455612 Attempting to start 7 APs
438 11:34:07.459076 Waiting for 10ms after sending INIT.
439 11:34:07.475215 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
440 11:34:07.475395 done.
441 11:34:07.478122 AP: slot 5 apic_id 4.
442 11:34:07.481905 AP: slot 4 apic_id 5.
443 11:34:07.482075 AP: slot 7 apic_id 3.
444 11:34:07.484515 AP: slot 3 apic_id 2.
445 11:34:07.488152 Waiting for 2nd SIPI to complete...done.
446 11:34:07.491238 AP: slot 6 apic_id 6.
447 11:34:07.494797 AP: slot 2 apic_id 7.
448 11:34:07.501464 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 11:34:07.508561 Processing 13 relocs. Offset value of 0x00038000
450 11:34:07.511647 Unable to locate Global NVS
451 11:34:07.519019 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 11:34:07.521781 Installing permanent SMM handler to 0x7b000000
453 11:34:07.531620 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 11:34:07.535106 Processing 794 relocs. Offset value of 0x7b010000
455 11:34:07.544603 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 11:34:07.547911 Processing 13 relocs. Offset value of 0x7b008000
457 11:34:07.554530 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 11:34:07.560847 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 11:34:07.567600 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 11:34:07.571037 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 11:34:07.577776 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 11:34:07.584077 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 11:34:07.590490 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 11:34:07.594153 Unable to locate Global NVS
465 11:34:07.600745 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 11:34:07.603765 Clearing SMI status registers
467 11:34:07.607006 SMI_STS: PM1
468 11:34:07.607479 PM1_STS: PWRBTN
469 11:34:07.613753 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 11:34:07.617157 In relocation handler: CPU 0
471 11:34:07.620121 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 11:34:07.627406 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 11:34:07.630696 Relocation complete.
474 11:34:07.636822 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 11:34:07.640254 In relocation handler: CPU 1
476 11:34:07.643491 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 11:34:07.646620 Relocation complete.
478 11:34:07.653220 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
479 11:34:07.656621 In relocation handler: CPU 5
480 11:34:07.659591 New SMBASE=0x7affec00 IEDBASE=0x7b400000
481 11:34:07.662647 Writing SMRR. base = 0x7b000006, mask=0xff800c00
482 11:34:07.666312 Relocation complete.
483 11:34:07.673044 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
484 11:34:07.675858 In relocation handler: CPU 3
485 11:34:07.679757 New SMBASE=0x7afff400 IEDBASE=0x7b400000
486 11:34:07.685426 Writing SMRR. base = 0x7b000006, mask=0xff800c00
487 11:34:07.689064 Relocation complete.
488 11:34:07.695796 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
489 11:34:07.698801 In relocation handler: CPU 7
490 11:34:07.702297 New SMBASE=0x7affe400 IEDBASE=0x7b400000
491 11:34:07.705265 Relocation complete.
492 11:34:07.711899 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
493 11:34:07.715301 In relocation handler: CPU 4
494 11:34:07.718688 New SMBASE=0x7afff000 IEDBASE=0x7b400000
495 11:34:07.722263 Relocation complete.
496 11:34:07.728525 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
497 11:34:07.733129 In relocation handler: CPU 2
498 11:34:07.735249 New SMBASE=0x7afff800 IEDBASE=0x7b400000
499 11:34:07.738019 Relocation complete.
500 11:34:07.744973 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
501 11:34:07.748288 In relocation handler: CPU 6
502 11:34:07.751549 New SMBASE=0x7affe800 IEDBASE=0x7b400000
503 11:34:07.755456 Writing SMRR. base = 0x7b000006, mask=0xff800c00
504 11:34:07.758199 Relocation complete.
505 11:34:07.761082 Initializing CPU #0
506 11:34:07.764522 CPU: vendor Intel device 806c1
507 11:34:07.767763 CPU: family 06, model 8c, stepping 01
508 11:34:07.771567 Clearing out pending MCEs
509 11:34:07.774515 Setting up local APIC...
510 11:34:07.774726 apic_id: 0x00 done.
511 11:34:07.777664 Turbo is available but hidden
512 11:34:07.781096 Turbo is available and visible
513 11:34:07.787405 microcode: Update skipped, already up-to-date
514 11:34:07.787553 CPU #0 initialized
515 11:34:07.791230 Initializing CPU #1
516 11:34:07.791315 Initializing CPU #4
517 11:34:07.794216 Initializing CPU #5
518 11:34:07.798230 CPU: vendor Intel device 806c1
519 11:34:07.801072 CPU: family 06, model 8c, stepping 01
520 11:34:07.804692 CPU: vendor Intel device 806c1
521 11:34:07.807637 CPU: family 06, model 8c, stepping 01
522 11:34:07.811373 Clearing out pending MCEs
523 11:34:07.814583 Clearing out pending MCEs
524 11:34:07.817512 Setting up local APIC...
525 11:34:07.817995 Initializing CPU #6
526 11:34:07.821079 Initializing CPU #2
527 11:34:07.824749 CPU: vendor Intel device 806c1
528 11:34:07.827622 CPU: family 06, model 8c, stepping 01
529 11:34:07.831125 CPU: vendor Intel device 806c1
530 11:34:07.834097 CPU: family 06, model 8c, stepping 01
531 11:34:07.837697 Clearing out pending MCEs
532 11:34:07.838316 Clearing out pending MCEs
533 11:34:07.841513 Setting up local APIC...
534 11:34:07.845038 CPU: vendor Intel device 806c1
535 11:34:07.848435 CPU: family 06, model 8c, stepping 01
536 11:34:07.851841 apic_id: 0x04 done.
537 11:34:07.854860 Setting up local APIC...
538 11:34:07.855426 apic_id: 0x06 done.
539 11:34:07.858696 Setting up local APIC...
540 11:34:07.861776 Clearing out pending MCEs
541 11:34:07.864592 microcode: Update skipped, already up-to-date
542 11:34:07.867812 apic_id: 0x05 done.
543 11:34:07.868372 CPU #5 initialized
544 11:34:07.874764 microcode: Update skipped, already up-to-date
545 11:34:07.877902 microcode: Update skipped, already up-to-date
546 11:34:07.881011 apic_id: 0x07 done.
547 11:34:07.884430 Initializing CPU #3
548 11:34:07.885046 Initializing CPU #7
549 11:34:07.887921 CPU #4 initialized
550 11:34:07.888492 CPU #6 initialized
551 11:34:07.894358 microcode: Update skipped, already up-to-date
552 11:34:07.897590 Setting up local APIC...
553 11:34:07.898100 CPU: vendor Intel device 806c1
554 11:34:07.904162 CPU: family 06, model 8c, stepping 01
555 11:34:07.907936 CPU: vendor Intel device 806c1
556 11:34:07.910804 CPU: family 06, model 8c, stepping 01
557 11:34:07.913897 Clearing out pending MCEs
558 11:34:07.914334 Clearing out pending MCEs
559 11:34:07.917583 Setting up local APIC...
560 11:34:07.920691 CPU #2 initialized
561 11:34:07.921214 Setting up local APIC...
562 11:34:07.924183 apic_id: 0x01 done.
563 11:34:07.927002 apic_id: 0x03 done.
564 11:34:07.927425 apic_id: 0x02 done.
565 11:34:07.933813 microcode: Update skipped, already up-to-date
566 11:34:07.937226 microcode: Update skipped, already up-to-date
567 11:34:07.940552 CPU #7 initialized
568 11:34:07.940978 CPU #3 initialized
569 11:34:07.947041 microcode: Update skipped, already up-to-date
570 11:34:07.947468 CPU #1 initialized
571 11:34:07.953512 bsp_do_flight_plan done after 459 msecs.
572 11:34:07.956840 CPU: frequency set to 4400 MHz
573 11:34:07.957270 Enabling SMIs.
574 11:34:07.963246 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
575 11:34:07.979531 SATAXPCIE1 indicates PCIe NVMe is present
576 11:34:07.983425 Probing TPM: done!
577 11:34:07.986704 Connected to device vid:did:rid of 1ae0:0028:00
578 11:34:07.997618 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
579 11:34:08.000143 Initialized TPM device CR50 revision 0
580 11:34:08.003962 Enabling S0i3.4
581 11:34:08.010347 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 11:34:08.013900 Found a VBT of 8704 bytes after decompression
583 11:34:08.020358 cse_lite: CSE RO boot. HybridStorageMode disabled
584 11:34:08.026544 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 11:34:08.101915 FSPS returned 0
586 11:34:08.105239 Executing Phase 1 of FspMultiPhaseSiInit
587 11:34:08.114784 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 11:34:08.117892 port C0 DISC req: usage 1 usb3 1 usb2 5
589 11:34:08.121896 Raw Buffer output 0 00000511
590 11:34:08.124471 Raw Buffer output 1 00000000
591 11:34:08.128409 pmc_send_ipc_cmd succeeded
592 11:34:08.135618 port C1 DISC req: usage 1 usb3 2 usb2 3
593 11:34:08.136291 Raw Buffer output 0 00000321
594 11:34:08.139500 Raw Buffer output 1 00000000
595 11:34:08.142640 pmc_send_ipc_cmd succeeded
596 11:34:08.147827 Detected 4 core, 8 thread CPU.
597 11:34:08.151396 Detected 4 core, 8 thread CPU.
598 11:34:08.351638 Display FSP Version Info HOB
599 11:34:08.355048 Reference Code - CPU = a.0.4c.31
600 11:34:08.357656 uCode Version = 0.0.0.86
601 11:34:08.361038 TXT ACM version = ff.ff.ff.ffff
602 11:34:08.364418 Reference Code - ME = a.0.4c.31
603 11:34:08.367588 MEBx version = 0.0.0.0
604 11:34:08.371023 ME Firmware Version = Consumer SKU
605 11:34:08.374412 Reference Code - PCH = a.0.4c.31
606 11:34:08.377668 PCH-CRID Status = Disabled
607 11:34:08.380662 PCH-CRID Original Value = ff.ff.ff.ffff
608 11:34:08.384129 PCH-CRID New Value = ff.ff.ff.ffff
609 11:34:08.387492 OPROM - RST - RAID = ff.ff.ff.ffff
610 11:34:08.390405 PCH Hsio Version = 4.0.0.0
611 11:34:08.394143 Reference Code - SA - System Agent = a.0.4c.31
612 11:34:08.397834 Reference Code - MRC = 2.0.0.1
613 11:34:08.400845 SA - PCIe Version = a.0.4c.31
614 11:34:08.403906 SA-CRID Status = Disabled
615 11:34:08.407048 SA-CRID Original Value = 0.0.0.1
616 11:34:08.410265 SA-CRID New Value = 0.0.0.1
617 11:34:08.413740 OPROM - VBIOS = ff.ff.ff.ffff
618 11:34:08.417749 IO Manageability Engine FW Version = 11.1.4.0
619 11:34:08.420913 PHY Build Version = 0.0.0.e0
620 11:34:08.425033 Thunderbolt(TM) FW Version = 0.0.0.0
621 11:34:08.431447 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
622 11:34:08.431886 ITSS IRQ Polarities Before:
623 11:34:08.435146 IPC0: 0xffffffff
624 11:34:08.438685 IPC1: 0xffffffff
625 11:34:08.439219 IPC2: 0xffffffff
626 11:34:08.441649 IPC3: 0xffffffff
627 11:34:08.442174 ITSS IRQ Polarities After:
628 11:34:08.445162 IPC0: 0xffffffff
629 11:34:08.448468 IPC1: 0xffffffff
630 11:34:08.448945 IPC2: 0xffffffff
631 11:34:08.451285 IPC3: 0xffffffff
632 11:34:08.454605 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 11:34:08.467983 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 11:34:08.478119 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 11:34:08.490976 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 11:34:08.498260 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
637 11:34:08.498704 Enumerating buses...
638 11:34:08.504662 Show all devs... Before device enumeration.
639 11:34:08.505152 Root Device: enabled 1
640 11:34:08.507313 DOMAIN: 0000: enabled 1
641 11:34:08.510843 CPU_CLUSTER: 0: enabled 1
642 11:34:08.514182 PCI: 00:00.0: enabled 1
643 11:34:08.514618 PCI: 00:02.0: enabled 1
644 11:34:08.517206 PCI: 00:04.0: enabled 1
645 11:34:08.520956 PCI: 00:05.0: enabled 1
646 11:34:08.523976 PCI: 00:06.0: enabled 0
647 11:34:08.524536 PCI: 00:07.0: enabled 0
648 11:34:08.527412 PCI: 00:07.1: enabled 0
649 11:34:08.530348 PCI: 00:07.2: enabled 0
650 11:34:08.533849 PCI: 00:07.3: enabled 0
651 11:34:08.534457 PCI: 00:08.0: enabled 1
652 11:34:08.536845 PCI: 00:09.0: enabled 0
653 11:34:08.540751 PCI: 00:0a.0: enabled 0
654 11:34:08.543997 PCI: 00:0d.0: enabled 1
655 11:34:08.544659 PCI: 00:0d.1: enabled 0
656 11:34:08.546608 PCI: 00:0d.2: enabled 0
657 11:34:08.550099 PCI: 00:0d.3: enabled 0
658 11:34:08.553866 PCI: 00:0e.0: enabled 0
659 11:34:08.554303 PCI: 00:10.2: enabled 1
660 11:34:08.556819 PCI: 00:10.6: enabled 0
661 11:34:08.560545 PCI: 00:10.7: enabled 0
662 11:34:08.561015 PCI: 00:12.0: enabled 0
663 11:34:08.563493 PCI: 00:12.6: enabled 0
664 11:34:08.566562 PCI: 00:13.0: enabled 0
665 11:34:08.570337 PCI: 00:14.0: enabled 1
666 11:34:08.570933 PCI: 00:14.1: enabled 0
667 11:34:08.573335 PCI: 00:14.2: enabled 1
668 11:34:08.576728 PCI: 00:14.3: enabled 1
669 11:34:08.579923 PCI: 00:15.0: enabled 1
670 11:34:08.580405 PCI: 00:15.1: enabled 1
671 11:34:08.582981 PCI: 00:15.2: enabled 1
672 11:34:08.586670 PCI: 00:15.3: enabled 1
673 11:34:08.589635 PCI: 00:16.0: enabled 1
674 11:34:08.590066 PCI: 00:16.1: enabled 0
675 11:34:08.593227 PCI: 00:16.2: enabled 0
676 11:34:08.595977 PCI: 00:16.3: enabled 0
677 11:34:08.599849 PCI: 00:16.4: enabled 0
678 11:34:08.600472 PCI: 00:16.5: enabled 0
679 11:34:08.602594 PCI: 00:17.0: enabled 1
680 11:34:08.606003 PCI: 00:19.0: enabled 0
681 11:34:08.610208 PCI: 00:19.1: enabled 1
682 11:34:08.610797 PCI: 00:19.2: enabled 0
683 11:34:08.612898 PCI: 00:1c.0: enabled 1
684 11:34:08.615657 PCI: 00:1c.1: enabled 0
685 11:34:08.618860 PCI: 00:1c.2: enabled 0
686 11:34:08.618966 PCI: 00:1c.3: enabled 0
687 11:34:08.622593 PCI: 00:1c.4: enabled 0
688 11:34:08.625453 PCI: 00:1c.5: enabled 0
689 11:34:08.629026 PCI: 00:1c.6: enabled 1
690 11:34:08.629106 PCI: 00:1c.7: enabled 0
691 11:34:08.631965 PCI: 00:1d.0: enabled 1
692 11:34:08.635330 PCI: 00:1d.1: enabled 0
693 11:34:08.638876 PCI: 00:1d.2: enabled 1
694 11:34:08.638977 PCI: 00:1d.3: enabled 0
695 11:34:08.642047 PCI: 00:1e.0: enabled 1
696 11:34:08.645592 PCI: 00:1e.1: enabled 0
697 11:34:08.645694 PCI: 00:1e.2: enabled 1
698 11:34:08.648685 PCI: 00:1e.3: enabled 1
699 11:34:08.652800 PCI: 00:1f.0: enabled 1
700 11:34:08.655174 PCI: 00:1f.1: enabled 0
701 11:34:08.655251 PCI: 00:1f.2: enabled 1
702 11:34:08.658694 PCI: 00:1f.3: enabled 1
703 11:34:08.662015 PCI: 00:1f.4: enabled 0
704 11:34:08.665328 PCI: 00:1f.5: enabled 1
705 11:34:08.665513 PCI: 00:1f.6: enabled 0
706 11:34:08.668443 PCI: 00:1f.7: enabled 0
707 11:34:08.671855 APIC: 00: enabled 1
708 11:34:08.672047 GENERIC: 0.0: enabled 1
709 11:34:08.675477 GENERIC: 0.0: enabled 1
710 11:34:08.678746 GENERIC: 1.0: enabled 1
711 11:34:08.681691 GENERIC: 0.0: enabled 1
712 11:34:08.681895 GENERIC: 1.0: enabled 1
713 11:34:08.685418 USB0 port 0: enabled 1
714 11:34:08.688357 GENERIC: 0.0: enabled 1
715 11:34:08.691613 USB0 port 0: enabled 1
716 11:34:08.691792 GENERIC: 0.0: enabled 1
717 11:34:08.695330 I2C: 00:1a: enabled 1
718 11:34:08.698545 I2C: 00:31: enabled 1
719 11:34:08.698899 I2C: 00:32: enabled 1
720 11:34:08.701416 I2C: 00:10: enabled 1
721 11:34:08.704982 I2C: 00:15: enabled 1
722 11:34:08.709041 GENERIC: 0.0: enabled 0
723 11:34:08.709471 GENERIC: 1.0: enabled 0
724 11:34:08.712002 GENERIC: 0.0: enabled 1
725 11:34:08.715365 SPI: 00: enabled 1
726 11:34:08.715938 SPI: 00: enabled 1
727 11:34:08.718234 PNP: 0c09.0: enabled 1
728 11:34:08.721821 GENERIC: 0.0: enabled 1
729 11:34:08.722390 USB3 port 0: enabled 1
730 11:34:08.724851 USB3 port 1: enabled 1
731 11:34:08.729284 USB3 port 2: enabled 0
732 11:34:08.731924 USB3 port 3: enabled 0
733 11:34:08.732455 USB2 port 0: enabled 0
734 11:34:08.734808 USB2 port 1: enabled 1
735 11:34:08.738491 USB2 port 2: enabled 1
736 11:34:08.738973 USB2 port 3: enabled 0
737 11:34:08.742227 USB2 port 4: enabled 1
738 11:34:08.745049 USB2 port 5: enabled 0
739 11:34:08.745529 USB2 port 6: enabled 0
740 11:34:08.747742 USB2 port 7: enabled 0
741 11:34:08.751301 USB2 port 8: enabled 0
742 11:34:08.754161 USB2 port 9: enabled 0
743 11:34:08.754640 USB3 port 0: enabled 0
744 11:34:08.757817 USB3 port 1: enabled 1
745 11:34:08.761300 USB3 port 2: enabled 0
746 11:34:08.761866 USB3 port 3: enabled 0
747 11:34:08.764102 GENERIC: 0.0: enabled 1
748 11:34:08.767893 GENERIC: 1.0: enabled 1
749 11:34:08.770848 APIC: 01: enabled 1
750 11:34:08.771421 APIC: 07: enabled 1
751 11:34:08.774278 APIC: 02: enabled 1
752 11:34:08.774851 APIC: 05: enabled 1
753 11:34:08.777853 APIC: 04: enabled 1
754 11:34:08.780886 APIC: 06: enabled 1
755 11:34:08.781433 APIC: 03: enabled 1
756 11:34:08.784250 Compare with tree...
757 11:34:08.787424 Root Device: enabled 1
758 11:34:08.787906 DOMAIN: 0000: enabled 1
759 11:34:08.790650 PCI: 00:00.0: enabled 1
760 11:34:08.793902 PCI: 00:02.0: enabled 1
761 11:34:08.797733 PCI: 00:04.0: enabled 1
762 11:34:08.800931 GENERIC: 0.0: enabled 1
763 11:34:08.801410 PCI: 00:05.0: enabled 1
764 11:34:08.803944 PCI: 00:06.0: enabled 0
765 11:34:08.807613 PCI: 00:07.0: enabled 0
766 11:34:08.810369 GENERIC: 0.0: enabled 1
767 11:34:08.813739 PCI: 00:07.1: enabled 0
768 11:34:08.817089 GENERIC: 1.0: enabled 1
769 11:34:08.817663 PCI: 00:07.2: enabled 0
770 11:34:08.820830 GENERIC: 0.0: enabled 1
771 11:34:08.824025 PCI: 00:07.3: enabled 0
772 11:34:08.827443 GENERIC: 1.0: enabled 1
773 11:34:08.830093 PCI: 00:08.0: enabled 1
774 11:34:08.830665 PCI: 00:09.0: enabled 0
775 11:34:08.833627 PCI: 00:0a.0: enabled 0
776 11:34:08.836975 PCI: 00:0d.0: enabled 1
777 11:34:08.840120 USB0 port 0: enabled 1
778 11:34:08.843671 USB3 port 0: enabled 1
779 11:34:08.844282 USB3 port 1: enabled 1
780 11:34:08.846503 USB3 port 2: enabled 0
781 11:34:08.849974 USB3 port 3: enabled 0
782 11:34:08.852981 PCI: 00:0d.1: enabled 0
783 11:34:08.856903 PCI: 00:0d.2: enabled 0
784 11:34:08.859402 GENERIC: 0.0: enabled 1
785 11:34:08.859882 PCI: 00:0d.3: enabled 0
786 11:34:08.863430 PCI: 00:0e.0: enabled 0
787 11:34:08.866483 PCI: 00:10.2: enabled 1
788 11:34:08.869503 PCI: 00:10.6: enabled 0
789 11:34:08.873100 PCI: 00:10.7: enabled 0
790 11:34:08.873672 PCI: 00:12.0: enabled 0
791 11:34:08.876168 PCI: 00:12.6: enabled 0
792 11:34:08.879319 PCI: 00:13.0: enabled 0
793 11:34:08.882638 PCI: 00:14.0: enabled 1
794 11:34:08.886106 USB0 port 0: enabled 1
795 11:34:08.886682 USB2 port 0: enabled 0
796 11:34:08.889478 USB2 port 1: enabled 1
797 11:34:08.893176 USB2 port 2: enabled 1
798 11:34:08.895801 USB2 port 3: enabled 0
799 11:34:08.899724 USB2 port 4: enabled 1
800 11:34:08.902256 USB2 port 5: enabled 0
801 11:34:08.902738 USB2 port 6: enabled 0
802 11:34:08.905482 USB2 port 7: enabled 0
803 11:34:08.908842 USB2 port 8: enabled 0
804 11:34:08.912166 USB2 port 9: enabled 0
805 11:34:08.915709 USB3 port 0: enabled 0
806 11:34:08.919335 USB3 port 1: enabled 1
807 11:34:08.919910 USB3 port 2: enabled 0
808 11:34:08.922182 USB3 port 3: enabled 0
809 11:34:08.925164 PCI: 00:14.1: enabled 0
810 11:34:08.928472 PCI: 00:14.2: enabled 1
811 11:34:08.932100 PCI: 00:14.3: enabled 1
812 11:34:08.932677 GENERIC: 0.0: enabled 1
813 11:34:08.935403 PCI: 00:15.0: enabled 1
814 11:34:08.939144 I2C: 00:1a: enabled 1
815 11:34:08.942194 I2C: 00:31: enabled 1
816 11:34:08.945563 I2C: 00:32: enabled 1
817 11:34:08.946042 PCI: 00:15.1: enabled 1
818 11:34:08.948450 I2C: 00:10: enabled 1
819 11:34:08.951710 PCI: 00:15.2: enabled 1
820 11:34:08.955368 PCI: 00:15.3: enabled 1
821 11:34:08.958669 PCI: 00:16.0: enabled 1
822 11:34:08.959330 PCI: 00:16.1: enabled 0
823 11:34:08.961979 PCI: 00:16.2: enabled 0
824 11:34:08.964959 PCI: 00:16.3: enabled 0
825 11:34:08.968899 PCI: 00:16.4: enabled 0
826 11:34:08.971688 PCI: 00:16.5: enabled 0
827 11:34:08.972203 PCI: 00:17.0: enabled 1
828 11:34:08.975333 PCI: 00:19.0: enabled 0
829 11:34:08.978270 PCI: 00:19.1: enabled 1
830 11:34:08.981596 I2C: 00:15: enabled 1
831 11:34:08.985408 PCI: 00:19.2: enabled 0
832 11:34:08.985982 PCI: 00:1d.0: enabled 1
833 11:34:08.988008 GENERIC: 0.0: enabled 1
834 11:34:08.991403 PCI: 00:1e.0: enabled 1
835 11:34:08.995070 PCI: 00:1e.1: enabled 0
836 11:34:08.998030 PCI: 00:1e.2: enabled 1
837 11:34:08.998734 SPI: 00: enabled 1
838 11:34:09.001414 PCI: 00:1e.3: enabled 1
839 11:34:09.004557 SPI: 00: enabled 1
840 11:34:09.007741 PCI: 00:1f.0: enabled 1
841 11:34:09.008256 PNP: 0c09.0: enabled 1
842 11:34:09.011177 PCI: 00:1f.1: enabled 0
843 11:34:09.014632 PCI: 00:1f.2: enabled 1
844 11:34:09.017609 GENERIC: 0.0: enabled 1
845 11:34:09.057529 GENERIC: 0.0: enabled 1
846 11:34:09.058188 GENERIC: 1.0: enabled 1
847 11:34:09.058590 PCI: 00:1f.3: enabled 1
848 11:34:09.059318 PCI: 00:1f.4: enabled 0
849 11:34:09.059690 PCI: 00:1f.5: enabled 1
850 11:34:09.060029 PCI: 00:1f.6: enabled 0
851 11:34:09.060715 PCI: 00:1f.7: enabled 0
852 11:34:09.061066 CPU_CLUSTER: 0: enabled 1
853 11:34:09.061395 APIC: 00: enabled 1
854 11:34:09.061716 APIC: 01: enabled 1
855 11:34:09.062089 APIC: 07: enabled 1
856 11:34:09.062401 APIC: 02: enabled 1
857 11:34:09.062711 APIC: 05: enabled 1
858 11:34:09.063133 APIC: 04: enabled 1
859 11:34:09.063476 APIC: 06: enabled 1
860 11:34:09.063801 APIC: 03: enabled 1
861 11:34:09.064284 Root Device scanning...
862 11:34:09.064665 scan_static_bus for Root Device
863 11:34:09.066793 DOMAIN: 0000 enabled
864 11:34:09.067265 CPU_CLUSTER: 0 enabled
865 11:34:09.070318 DOMAIN: 0000 scanning...
866 11:34:09.073702 PCI: pci_scan_bus for bus 00
867 11:34:09.076613 PCI: 00:00.0 [8086/0000] ops
868 11:34:09.079930 PCI: 00:00.0 [8086/9a12] enabled
869 11:34:09.083353 PCI: 00:02.0 [8086/0000] bus ops
870 11:34:09.087203 PCI: 00:02.0 [8086/9a40] enabled
871 11:34:09.091457 PCI: 00:04.0 [8086/0000] bus ops
872 11:34:09.094386 PCI: 00:04.0 [8086/9a03] enabled
873 11:34:09.097438 PCI: 00:05.0 [8086/9a19] enabled
874 11:34:09.100544 PCI: 00:07.0 [0000/0000] hidden
875 11:34:09.104225 PCI: 00:08.0 [8086/9a11] enabled
876 11:34:09.107225 PCI: 00:0a.0 [8086/9a0d] disabled
877 11:34:09.110423 PCI: 00:0d.0 [8086/0000] bus ops
878 11:34:09.113881 PCI: 00:0d.0 [8086/9a13] enabled
879 11:34:09.117077 PCI: 00:14.0 [8086/0000] bus ops
880 11:34:09.120631 PCI: 00:14.0 [8086/a0ed] enabled
881 11:34:09.123370 PCI: 00:14.2 [8086/a0ef] enabled
882 11:34:09.126602 PCI: 00:14.3 [8086/0000] bus ops
883 11:34:09.130318 PCI: 00:14.3 [8086/a0f0] enabled
884 11:34:09.133196 PCI: 00:15.0 [8086/0000] bus ops
885 11:34:09.136646 PCI: 00:15.0 [8086/a0e8] enabled
886 11:34:09.140026 PCI: 00:15.1 [8086/0000] bus ops
887 11:34:09.143434 PCI: 00:15.1 [8086/a0e9] enabled
888 11:34:09.146805 PCI: 00:15.2 [8086/0000] bus ops
889 11:34:09.149789 PCI: 00:15.2 [8086/a0ea] enabled
890 11:34:09.153258 PCI: 00:15.3 [8086/0000] bus ops
891 11:34:09.156776 PCI: 00:15.3 [8086/a0eb] enabled
892 11:34:09.160555 PCI: 00:16.0 [8086/0000] ops
893 11:34:09.163423 PCI: 00:16.0 [8086/a0e0] enabled
894 11:34:09.170084 PCI: Static device PCI: 00:17.0 not found, disabling it.
895 11:34:09.173053 PCI: 00:19.0 [8086/0000] bus ops
896 11:34:09.176750 PCI: 00:19.0 [8086/a0c5] disabled
897 11:34:09.180299 PCI: 00:19.1 [8086/0000] bus ops
898 11:34:09.182834 PCI: 00:19.1 [8086/a0c6] enabled
899 11:34:09.186499 PCI: 00:1d.0 [8086/0000] bus ops
900 11:34:09.189942 PCI: 00:1d.0 [8086/a0b0] enabled
901 11:34:09.192594 PCI: 00:1e.0 [8086/0000] ops
902 11:34:09.196182 PCI: 00:1e.0 [8086/a0a8] enabled
903 11:34:09.199380 PCI: 00:1e.2 [8086/0000] bus ops
904 11:34:09.202767 PCI: 00:1e.2 [8086/a0aa] enabled
905 11:34:09.206105 PCI: 00:1e.3 [8086/0000] bus ops
906 11:34:09.208955 PCI: 00:1e.3 [8086/a0ab] enabled
907 11:34:09.212943 PCI: 00:1f.0 [8086/0000] bus ops
908 11:34:09.215942 PCI: 00:1f.0 [8086/a087] enabled
909 11:34:09.216537 RTC Init
910 11:34:09.219071 Set power on after power failure.
911 11:34:09.222269 Disabling Deep S3
912 11:34:09.222878 Disabling Deep S3
913 11:34:09.225608 Disabling Deep S4
914 11:34:09.228827 Disabling Deep S4
915 11:34:09.229306 Disabling Deep S5
916 11:34:09.232367 Disabling Deep S5
917 11:34:09.235968 PCI: 00:1f.2 [0000/0000] hidden
918 11:34:09.238852 PCI: 00:1f.3 [8086/0000] bus ops
919 11:34:09.242677 PCI: 00:1f.3 [8086/a0c8] enabled
920 11:34:09.245765 PCI: 00:1f.5 [8086/0000] bus ops
921 11:34:09.249094 PCI: 00:1f.5 [8086/a0a4] enabled
922 11:34:09.252211 PCI: Leftover static devices:
923 11:34:09.252782 PCI: 00:10.2
924 11:34:09.253246 PCI: 00:10.6
925 11:34:09.255636 PCI: 00:10.7
926 11:34:09.256157 PCI: 00:06.0
927 11:34:09.258778 PCI: 00:07.1
928 11:34:09.259331 PCI: 00:07.2
929 11:34:09.262239 PCI: 00:07.3
930 11:34:09.262809 PCI: 00:09.0
931 11:34:09.263384 PCI: 00:0d.1
932 11:34:09.265553 PCI: 00:0d.2
933 11:34:09.266067 PCI: 00:0d.3
934 11:34:09.269035 PCI: 00:0e.0
935 11:34:09.269591 PCI: 00:12.0
936 11:34:09.270029 PCI: 00:12.6
937 11:34:09.271972 PCI: 00:13.0
938 11:34:09.272596 PCI: 00:14.1
939 11:34:09.275176 PCI: 00:16.1
940 11:34:09.275683 PCI: 00:16.2
941 11:34:09.278704 PCI: 00:16.3
942 11:34:09.279194 PCI: 00:16.4
943 11:34:09.279591 PCI: 00:16.5
944 11:34:09.281720 PCI: 00:17.0
945 11:34:09.282266 PCI: 00:19.2
946 11:34:09.284987 PCI: 00:1e.1
947 11:34:09.285416 PCI: 00:1f.1
948 11:34:09.285755 PCI: 00:1f.4
949 11:34:09.288165 PCI: 00:1f.6
950 11:34:09.288608 PCI: 00:1f.7
951 11:34:09.291526 PCI: Check your devicetree.cb.
952 11:34:09.294892 PCI: 00:02.0 scanning...
953 11:34:09.298648 scan_generic_bus for PCI: 00:02.0
954 11:34:09.301611 scan_generic_bus for PCI: 00:02.0 done
955 11:34:09.308173 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
956 11:34:09.308605 PCI: 00:04.0 scanning...
957 11:34:09.314686 scan_generic_bus for PCI: 00:04.0
958 11:34:09.315138 GENERIC: 0.0 enabled
959 11:34:09.321322 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
960 11:34:09.324618 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
961 11:34:09.328599 PCI: 00:0d.0 scanning...
962 11:34:09.331183 scan_static_bus for PCI: 00:0d.0
963 11:34:09.334302 USB0 port 0 enabled
964 11:34:09.337720 USB0 port 0 scanning...
965 11:34:09.341001 scan_static_bus for USB0 port 0
966 11:34:09.341164 USB3 port 0 enabled
967 11:34:09.344215 USB3 port 1 enabled
968 11:34:09.347715 USB3 port 2 disabled
969 11:34:09.347851 USB3 port 3 disabled
970 11:34:09.350716 USB3 port 0 scanning...
971 11:34:09.354457 scan_static_bus for USB3 port 0
972 11:34:09.357443 scan_static_bus for USB3 port 0 done
973 11:34:09.364297 scan_bus: bus USB3 port 0 finished in 6 msecs
974 11:34:09.364479 USB3 port 1 scanning...
975 11:34:09.367202 scan_static_bus for USB3 port 1
976 11:34:09.374242 scan_static_bus for USB3 port 1 done
977 11:34:09.377525 scan_bus: bus USB3 port 1 finished in 6 msecs
978 11:34:09.380073 scan_static_bus for USB0 port 0 done
979 11:34:09.383776 scan_bus: bus USB0 port 0 finished in 43 msecs
980 11:34:09.390283 scan_static_bus for PCI: 00:0d.0 done
981 11:34:09.393624 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
982 11:34:09.397194 PCI: 00:14.0 scanning...
983 11:34:09.400171 scan_static_bus for PCI: 00:14.0
984 11:34:09.403555 USB0 port 0 enabled
985 11:34:09.403859 USB0 port 0 scanning...
986 11:34:09.407269 scan_static_bus for USB0 port 0
987 11:34:09.410812 USB2 port 0 disabled
988 11:34:09.413311 USB2 port 1 enabled
989 11:34:09.413853 USB2 port 2 enabled
990 11:34:09.417351 USB2 port 3 disabled
991 11:34:09.419903 USB2 port 4 enabled
992 11:34:09.420426 USB2 port 5 disabled
993 11:34:09.423127 USB2 port 6 disabled
994 11:34:09.426968 USB2 port 7 disabled
995 11:34:09.427534 USB2 port 8 disabled
996 11:34:09.429597 USB2 port 9 disabled
997 11:34:09.433613 USB3 port 0 disabled
998 11:34:09.434192 USB3 port 1 enabled
999 11:34:09.436527 USB3 port 2 disabled
1000 11:34:09.437091 USB3 port 3 disabled
1001 11:34:09.439700 USB2 port 1 scanning...
1002 11:34:09.444189 scan_static_bus for USB2 port 1
1003 11:34:09.446097 scan_static_bus for USB2 port 1 done
1004 11:34:09.452908 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 11:34:09.456262 USB2 port 2 scanning...
1006 11:34:09.459560 scan_static_bus for USB2 port 2
1007 11:34:09.463327 scan_static_bus for USB2 port 2 done
1008 11:34:09.466384 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 11:34:09.468965 USB2 port 4 scanning...
1010 11:34:09.472817 scan_static_bus for USB2 port 4
1011 11:34:09.475756 scan_static_bus for USB2 port 4 done
1012 11:34:09.479622 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 11:34:09.482518 USB3 port 1 scanning...
1014 11:34:09.485313 scan_static_bus for USB3 port 1
1015 11:34:09.488659 scan_static_bus for USB3 port 1 done
1016 11:34:09.495366 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 11:34:09.499042 scan_static_bus for USB0 port 0 done
1018 11:34:09.502249 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 11:34:09.506164 scan_static_bus for PCI: 00:14.0 done
1020 11:34:09.512230 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1021 11:34:09.515161 PCI: 00:14.3 scanning...
1022 11:34:09.519227 scan_static_bus for PCI: 00:14.3
1023 11:34:09.519804 GENERIC: 0.0 enabled
1024 11:34:09.525387 scan_static_bus for PCI: 00:14.3 done
1025 11:34:09.528351 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1026 11:34:09.531628 PCI: 00:15.0 scanning...
1027 11:34:09.535097 scan_static_bus for PCI: 00:15.0
1028 11:34:09.535654 I2C: 00:1a enabled
1029 11:34:09.538395 I2C: 00:31 enabled
1030 11:34:09.541988 I2C: 00:32 enabled
1031 11:34:09.545171 scan_static_bus for PCI: 00:15.0 done
1032 11:34:09.548685 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1033 11:34:09.551173 PCI: 00:15.1 scanning...
1034 11:34:09.554363 scan_static_bus for PCI: 00:15.1
1035 11:34:09.558100 I2C: 00:10 enabled
1036 11:34:09.561203 scan_static_bus for PCI: 00:15.1 done
1037 11:34:09.564530 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1038 11:34:09.567936 PCI: 00:15.2 scanning...
1039 11:34:09.571192 scan_static_bus for PCI: 00:15.2
1040 11:34:09.575217 scan_static_bus for PCI: 00:15.2 done
1041 11:34:09.580907 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1042 11:34:09.581718 PCI: 00:15.3 scanning...
1043 11:34:09.587390 scan_static_bus for PCI: 00:15.3
1044 11:34:09.591262 scan_static_bus for PCI: 00:15.3 done
1045 11:34:09.594134 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1046 11:34:09.597435 PCI: 00:19.1 scanning...
1047 11:34:09.600580 scan_static_bus for PCI: 00:19.1
1048 11:34:09.603943 I2C: 00:15 enabled
1049 11:34:09.607524 scan_static_bus for PCI: 00:19.1 done
1050 11:34:09.610814 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1051 11:34:09.614162 PCI: 00:1d.0 scanning...
1052 11:34:09.617234 do_pci_scan_bridge for PCI: 00:1d.0
1053 11:34:09.620080 PCI: pci_scan_bus for bus 01
1054 11:34:09.623329 PCI: 01:00.0 [15b7/5009] enabled
1055 11:34:09.626842 GENERIC: 0.0 enabled
1056 11:34:09.630313 Enabling Common Clock Configuration
1057 11:34:09.633300 L1 Sub-State supported from root port 29
1058 11:34:09.637113 L1 Sub-State Support = 0x5
1059 11:34:09.640723 CommonModeRestoreTime = 0x28
1060 11:34:09.643352 Power On Value = 0x16, Power On Scale = 0x0
1061 11:34:09.646904 ASPM: Enabled L1
1062 11:34:09.650237 PCIe: Max_Payload_Size adjusted to 128
1063 11:34:09.652873 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1064 11:34:09.656521 PCI: 00:1e.2 scanning...
1065 11:34:09.660195 scan_generic_bus for PCI: 00:1e.2
1066 11:34:09.663293 SPI: 00 enabled
1067 11:34:09.669982 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1068 11:34:09.673194 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1069 11:34:09.676735 PCI: 00:1e.3 scanning...
1070 11:34:09.679728 scan_generic_bus for PCI: 00:1e.3
1071 11:34:09.680423 SPI: 00 enabled
1072 11:34:09.686562 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1073 11:34:09.692897 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1074 11:34:09.693400 PCI: 00:1f.0 scanning...
1075 11:34:09.696734 scan_static_bus for PCI: 00:1f.0
1076 11:34:09.699674 PNP: 0c09.0 enabled
1077 11:34:09.702924 PNP: 0c09.0 scanning...
1078 11:34:09.706227 scan_static_bus for PNP: 0c09.0
1079 11:34:09.710019 scan_static_bus for PNP: 0c09.0 done
1080 11:34:09.713244 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1081 11:34:09.719597 scan_static_bus for PCI: 00:1f.0 done
1082 11:34:09.722552 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1083 11:34:09.726719 PCI: 00:1f.2 scanning...
1084 11:34:09.729805 scan_static_bus for PCI: 00:1f.2
1085 11:34:09.732799 GENERIC: 0.0 enabled
1086 11:34:09.733311 GENERIC: 0.0 scanning...
1087 11:34:09.736408 scan_static_bus for GENERIC: 0.0
1088 11:34:09.739776 GENERIC: 0.0 enabled
1089 11:34:09.742842 GENERIC: 1.0 enabled
1090 11:34:09.746247 scan_static_bus for GENERIC: 0.0 done
1091 11:34:09.749807 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1092 11:34:09.752409 scan_static_bus for PCI: 00:1f.2 done
1093 11:34:09.759775 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1094 11:34:09.762359 PCI: 00:1f.3 scanning...
1095 11:34:09.765534 scan_static_bus for PCI: 00:1f.3
1096 11:34:09.768945 scan_static_bus for PCI: 00:1f.3 done
1097 11:34:09.772528 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1098 11:34:09.775389 PCI: 00:1f.5 scanning...
1099 11:34:09.778801 scan_generic_bus for PCI: 00:1f.5
1100 11:34:09.782216 scan_generic_bus for PCI: 00:1f.5 done
1101 11:34:09.788963 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1102 11:34:09.792414 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1103 11:34:09.795534 scan_static_bus for Root Device done
1104 11:34:09.802103 scan_bus: bus Root Device finished in 736 msecs
1105 11:34:09.802702 done
1106 11:34:09.808583 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1107 11:34:09.812250 Chrome EC: UHEPI supported
1108 11:34:09.818699 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1109 11:34:09.825000 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1110 11:34:09.828674 SPI flash protection: WPSW=0 SRP0=0
1111 11:34:09.831673 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1112 11:34:09.838423 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1113 11:34:09.841595 found VGA at PCI: 00:02.0
1114 11:34:09.844776 Setting up VGA for PCI: 00:02.0
1115 11:34:09.848172 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1116 11:34:09.854730 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1117 11:34:09.858400 Allocating resources...
1118 11:34:09.859017 Reading resources...
1119 11:34:09.861134 Root Device read_resources bus 0 link: 0
1120 11:34:09.867934 DOMAIN: 0000 read_resources bus 0 link: 0
1121 11:34:09.871475 PCI: 00:04.0 read_resources bus 1 link: 0
1122 11:34:09.877991 PCI: 00:04.0 read_resources bus 1 link: 0 done
1123 11:34:09.881546 PCI: 00:0d.0 read_resources bus 0 link: 0
1124 11:34:09.887407 USB0 port 0 read_resources bus 0 link: 0
1125 11:34:09.890797 USB0 port 0 read_resources bus 0 link: 0 done
1126 11:34:09.897742 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1127 11:34:09.900743 PCI: 00:14.0 read_resources bus 0 link: 0
1128 11:34:09.904623 USB0 port 0 read_resources bus 0 link: 0
1129 11:34:09.911492 USB0 port 0 read_resources bus 0 link: 0 done
1130 11:34:09.914652 PCI: 00:14.0 read_resources bus 0 link: 0 done
1131 11:34:09.921688 PCI: 00:14.3 read_resources bus 0 link: 0
1132 11:34:09.925629 PCI: 00:14.3 read_resources bus 0 link: 0 done
1133 11:34:09.931825 PCI: 00:15.0 read_resources bus 0 link: 0
1134 11:34:09.935169 PCI: 00:15.0 read_resources bus 0 link: 0 done
1135 11:34:09.941636 PCI: 00:15.1 read_resources bus 0 link: 0
1136 11:34:09.944708 PCI: 00:15.1 read_resources bus 0 link: 0 done
1137 11:34:09.952649 PCI: 00:19.1 read_resources bus 0 link: 0
1138 11:34:09.955463 PCI: 00:19.1 read_resources bus 0 link: 0 done
1139 11:34:09.962396 PCI: 00:1d.0 read_resources bus 1 link: 0
1140 11:34:09.965238 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1141 11:34:09.972180 PCI: 00:1e.2 read_resources bus 2 link: 0
1142 11:34:09.975475 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1143 11:34:09.984230 PCI: 00:1e.3 read_resources bus 3 link: 0
1144 11:34:09.985400 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1145 11:34:09.991691 PCI: 00:1f.0 read_resources bus 0 link: 0
1146 11:34:09.995189 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1147 11:34:10.001401 PCI: 00:1f.2 read_resources bus 0 link: 0
1148 11:34:10.005076 GENERIC: 0.0 read_resources bus 0 link: 0
1149 11:34:10.011766 GENERIC: 0.0 read_resources bus 0 link: 0 done
1150 11:34:10.014576 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1151 11:34:10.021822 DOMAIN: 0000 read_resources bus 0 link: 0 done
1152 11:34:10.024901 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1153 11:34:10.031168 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1154 11:34:10.034743 Root Device read_resources bus 0 link: 0 done
1155 11:34:10.038010 Done reading resources.
1156 11:34:10.044359 Show resources in subtree (Root Device)...After reading.
1157 11:34:10.047722 Root Device child on link 0 DOMAIN: 0000
1158 11:34:10.051607 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1159 11:34:10.060744 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1160 11:34:10.071143 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1161 11:34:10.073883 PCI: 00:00.0
1162 11:34:10.084423 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1163 11:34:10.090991 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1164 11:34:10.100390 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1165 11:34:10.110390 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1166 11:34:10.120343 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1167 11:34:10.130242 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1168 11:34:10.140001 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1169 11:34:10.146301 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1170 11:34:10.156670 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1171 11:34:10.166315 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1172 11:34:10.176522 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1173 11:34:10.186226 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1174 11:34:10.195730 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1175 11:34:10.202404 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1176 11:34:10.212475 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1177 11:34:10.222721 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1178 11:34:10.232668 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1179 11:34:10.242866 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1180 11:34:10.252384 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1181 11:34:10.261991 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1182 11:34:10.262537 PCI: 00:02.0
1183 11:34:10.271942 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1184 11:34:10.282192 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1185 11:34:10.291986 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1186 11:34:10.295129 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 11:34:10.304851 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1188 11:34:10.308107 GENERIC: 0.0
1189 11:34:10.308864 PCI: 00:05.0
1190 11:34:10.321735 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 11:34:10.324670 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1192 11:34:10.325242 GENERIC: 0.0
1193 11:34:10.328004 PCI: 00:08.0
1194 11:34:10.337847 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 11:34:10.338557 PCI: 00:0a.0
1196 11:34:10.344492 PCI: 00:0d.0 child on link 0 USB0 port 0
1197 11:34:10.354101 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1198 11:34:10.357838 USB0 port 0 child on link 0 USB3 port 0
1199 11:34:10.360641 USB3 port 0
1200 11:34:10.361060 USB3 port 1
1201 11:34:10.363878 USB3 port 2
1202 11:34:10.364394 USB3 port 3
1203 11:34:10.370702 PCI: 00:14.0 child on link 0 USB0 port 0
1204 11:34:10.380754 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 11:34:10.383749 USB0 port 0 child on link 0 USB2 port 0
1206 11:34:10.387537 USB2 port 0
1207 11:34:10.388162 USB2 port 1
1208 11:34:10.390606 USB2 port 2
1209 11:34:10.391036 USB2 port 3
1210 11:34:10.394117 USB2 port 4
1211 11:34:10.394630 USB2 port 5
1212 11:34:10.397060 USB2 port 6
1213 11:34:10.397530 USB2 port 7
1214 11:34:10.400259 USB2 port 8
1215 11:34:10.400827 USB2 port 9
1216 11:34:10.403746 USB3 port 0
1217 11:34:10.407422 USB3 port 1
1218 11:34:10.407984 USB3 port 2
1219 11:34:10.410526 USB3 port 3
1220 11:34:10.411092 PCI: 00:14.2
1221 11:34:10.420126 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 11:34:10.430338 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 11:34:10.433352 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1224 11:34:10.446954 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 11:34:10.447477 GENERIC: 0.0
1226 11:34:10.450216 PCI: 00:15.0 child on link 0 I2C: 00:1a
1227 11:34:10.459995 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 11:34:10.463847 I2C: 00:1a
1229 11:34:10.464363 I2C: 00:31
1230 11:34:10.466159 I2C: 00:32
1231 11:34:10.469711 PCI: 00:15.1 child on link 0 I2C: 00:10
1232 11:34:10.479487 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 11:34:10.482665 I2C: 00:10
1234 11:34:10.483131 PCI: 00:15.2
1235 11:34:10.492628 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 11:34:10.496166 PCI: 00:15.3
1237 11:34:10.505853 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 11:34:10.506324 PCI: 00:16.0
1239 11:34:10.515592 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 11:34:10.518653 PCI: 00:19.0
1241 11:34:10.522255 PCI: 00:19.1 child on link 0 I2C: 00:15
1242 11:34:10.531835 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 11:34:10.535101 I2C: 00:15
1244 11:34:10.539227 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1245 11:34:10.547793 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1246 11:34:10.557883 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1247 11:34:10.564188 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1248 11:34:10.567842 GENERIC: 0.0
1249 11:34:10.567914 PCI: 01:00.0
1250 11:34:10.578091 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 11:34:10.587405 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1252 11:34:10.591071 PCI: 00:1e.0
1253 11:34:10.600852 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1254 11:34:10.603791 PCI: 00:1e.2 child on link 0 SPI: 00
1255 11:34:10.614037 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1256 11:34:10.617312 SPI: 00
1257 11:34:10.620532 PCI: 00:1e.3 child on link 0 SPI: 00
1258 11:34:10.630680 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 11:34:10.634095 SPI: 00
1260 11:34:10.637050 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1261 11:34:10.647393 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1262 11:34:10.647491 PNP: 0c09.0
1263 11:34:10.656662 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1264 11:34:10.659936 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1265 11:34:10.670415 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1266 11:34:10.679923 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1267 11:34:10.683389 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1268 11:34:10.686597 GENERIC: 0.0
1269 11:34:10.686808 GENERIC: 1.0
1270 11:34:10.690119 PCI: 00:1f.3
1271 11:34:10.699496 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1272 11:34:10.709700 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1273 11:34:10.710090 PCI: 00:1f.5
1274 11:34:10.719530 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1275 11:34:10.723150 CPU_CLUSTER: 0 child on link 0 APIC: 00
1276 11:34:10.726077 APIC: 00
1277 11:34:10.726780 APIC: 01
1278 11:34:10.729379 APIC: 07
1279 11:34:10.729837 APIC: 02
1280 11:34:10.730199 APIC: 05
1281 11:34:10.732753 APIC: 04
1282 11:34:10.733350 APIC: 06
1283 11:34:10.733744 APIC: 03
1284 11:34:10.743122 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1285 11:34:10.749589 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1286 11:34:10.752702 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1287 11:34:10.758946 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1288 11:34:10.762594 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1289 11:34:10.769195 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1290 11:34:10.776010 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1291 11:34:10.782357 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1292 11:34:10.791935 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1293 11:34:10.798401 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1294 11:34:10.804903 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1295 11:34:10.811911 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1296 11:34:10.818979 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1297 11:34:10.828916 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1298 11:34:10.831355 DOMAIN: 0000: Resource ranges:
1299 11:34:10.834730 * Base: 1000, Size: 800, Tag: 100
1300 11:34:10.837999 * Base: 1900, Size: e700, Tag: 100
1301 11:34:10.841157 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1302 11:34:10.847857 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1303 11:34:10.854614 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1304 11:34:10.864738 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1305 11:34:10.870660 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1306 11:34:10.877565 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1307 11:34:10.887888 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1308 11:34:10.894453 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1309 11:34:10.903653 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1310 11:34:10.910506 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1311 11:34:10.916780 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1312 11:34:10.926671 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1313 11:34:10.933845 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1314 11:34:10.939774 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1315 11:34:10.950250 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1316 11:34:10.956306 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1317 11:34:10.963201 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1318 11:34:10.973267 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1319 11:34:10.980005 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1320 11:34:10.986143 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1321 11:34:10.996199 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1322 11:34:11.002378 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1323 11:34:11.008978 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1324 11:34:11.018671 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1325 11:34:11.025339 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1326 11:34:11.028878 DOMAIN: 0000: Resource ranges:
1327 11:34:11.032006 * Base: 7fc00000, Size: 40400000, Tag: 200
1328 11:34:11.038354 * Base: d0000000, Size: 28000000, Tag: 200
1329 11:34:11.042112 * Base: fa000000, Size: 1000000, Tag: 200
1330 11:34:11.045374 * Base: fb001000, Size: 2fff000, Tag: 200
1331 11:34:11.052312 * Base: fe010000, Size: 2e000, Tag: 200
1332 11:34:11.055482 * Base: fe03f000, Size: d41000, Tag: 200
1333 11:34:11.058356 * Base: fed88000, Size: 8000, Tag: 200
1334 11:34:11.061972 * Base: fed93000, Size: d000, Tag: 200
1335 11:34:11.067989 * Base: feda2000, Size: 1e000, Tag: 200
1336 11:34:11.072496 * Base: fede0000, Size: 1220000, Tag: 200
1337 11:34:11.074739 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1338 11:34:11.081225 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1339 11:34:11.088655 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1340 11:34:11.094835 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1341 11:34:11.104557 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1342 11:34:11.111485 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1343 11:34:11.117788 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1344 11:34:11.124266 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1345 11:34:11.130263 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1346 11:34:11.136865 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1347 11:34:11.143654 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1348 11:34:11.150308 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1349 11:34:11.157364 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1350 11:34:11.163498 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1351 11:34:11.170082 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1352 11:34:11.176518 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1353 11:34:11.183246 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1354 11:34:11.189735 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1355 11:34:11.196470 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1356 11:34:11.202613 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1357 11:34:11.209504 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1358 11:34:11.215947 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1359 11:34:11.222424 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1360 11:34:11.229001 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1361 11:34:11.238792 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1362 11:34:11.239350 PCI: 00:1d.0: Resource ranges:
1363 11:34:11.245599 * Base: 7fc00000, Size: 100000, Tag: 200
1364 11:34:11.252204 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1365 11:34:11.259089 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1366 11:34:11.265224 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1367 11:34:11.275461 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1368 11:34:11.278670 Root Device assign_resources, bus 0 link: 0
1369 11:34:11.282275 DOMAIN: 0000 assign_resources, bus 0 link: 0
1370 11:34:11.291976 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1371 11:34:11.298377 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1372 11:34:11.308022 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1373 11:34:11.314716 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1374 11:34:11.321246 PCI: 00:04.0 assign_resources, bus 1 link: 0
1375 11:34:11.324781 PCI: 00:04.0 assign_resources, bus 1 link: 0
1376 11:34:11.334247 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1377 11:34:11.341012 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1378 11:34:11.350580 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1379 11:34:11.354021 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1380 11:34:11.357178 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1381 11:34:11.367048 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1382 11:34:11.370387 PCI: 00:14.0 assign_resources, bus 0 link: 0
1383 11:34:11.377329 PCI: 00:14.0 assign_resources, bus 0 link: 0
1384 11:34:11.383912 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1385 11:34:11.393336 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1386 11:34:11.400196 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1387 11:34:11.403174 PCI: 00:14.3 assign_resources, bus 0 link: 0
1388 11:34:11.410119 PCI: 00:14.3 assign_resources, bus 0 link: 0
1389 11:34:11.416776 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1390 11:34:11.423830 PCI: 00:15.0 assign_resources, bus 0 link: 0
1391 11:34:11.427035 PCI: 00:15.0 assign_resources, bus 0 link: 0
1392 11:34:11.436892 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1393 11:34:11.439919 PCI: 00:15.1 assign_resources, bus 0 link: 0
1394 11:34:11.442874 PCI: 00:15.1 assign_resources, bus 0 link: 0
1395 11:34:11.453249 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1396 11:34:11.459709 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1397 11:34:11.470005 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1398 11:34:11.476713 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1399 11:34:11.483452 PCI: 00:19.1 assign_resources, bus 0 link: 0
1400 11:34:11.486904 PCI: 00:19.1 assign_resources, bus 0 link: 0
1401 11:34:11.495802 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1402 11:34:11.505738 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1403 11:34:11.512593 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1404 11:34:11.518685 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1405 11:34:11.525313 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1406 11:34:11.535720 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1407 11:34:11.538809 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1408 11:34:11.549378 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1409 11:34:11.551709 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1410 11:34:11.558588 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1411 11:34:11.565291 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1412 11:34:11.568444 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1413 11:34:11.575099 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1414 11:34:11.578515 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1415 11:34:11.585072 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1416 11:34:11.588006 LPC: Trying to open IO window from 800 size 1ff
1417 11:34:11.597994 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1418 11:34:11.604123 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1419 11:34:11.614897 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1420 11:34:11.617359 DOMAIN: 0000 assign_resources, bus 0 link: 0
1421 11:34:11.624409 Root Device assign_resources, bus 0 link: 0
1422 11:34:11.624870 Done setting resources.
1423 11:34:11.630855 Show resources in subtree (Root Device)...After assigning values.
1424 11:34:11.637591 Root Device child on link 0 DOMAIN: 0000
1425 11:34:11.640483 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1426 11:34:11.650363 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1427 11:34:11.660269 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1428 11:34:11.660775 PCI: 00:00.0
1429 11:34:11.670276 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1430 11:34:11.680030 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1431 11:34:11.690644 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1432 11:34:11.700528 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1433 11:34:11.706818 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1434 11:34:11.716706 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1435 11:34:11.726605 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1436 11:34:11.737322 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1437 11:34:11.746804 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1438 11:34:11.756781 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1439 11:34:11.763128 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1440 11:34:11.773006 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1441 11:34:11.782468 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1442 11:34:11.793349 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1443 11:34:11.802530 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1444 11:34:11.812386 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1445 11:34:11.822303 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1446 11:34:11.829139 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1447 11:34:11.838738 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1448 11:34:11.848481 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1449 11:34:11.851907 PCI: 00:02.0
1450 11:34:11.862288 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1451 11:34:11.871737 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1452 11:34:11.881581 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1453 11:34:11.884947 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1454 11:34:11.897960 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1455 11:34:11.898534 GENERIC: 0.0
1456 11:34:11.901288 PCI: 00:05.0
1457 11:34:11.911105 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1458 11:34:11.915119 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1459 11:34:11.917760 GENERIC: 0.0
1460 11:34:11.918226 PCI: 00:08.0
1461 11:34:11.927444 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1462 11:34:11.931080 PCI: 00:0a.0
1463 11:34:11.934432 PCI: 00:0d.0 child on link 0 USB0 port 0
1464 11:34:11.944642 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1465 11:34:11.950464 USB0 port 0 child on link 0 USB3 port 0
1466 11:34:11.950975 USB3 port 0
1467 11:34:11.954072 USB3 port 1
1468 11:34:11.954537 USB3 port 2
1469 11:34:11.957522 USB3 port 3
1470 11:34:11.960607 PCI: 00:14.0 child on link 0 USB0 port 0
1471 11:34:11.970316 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1472 11:34:11.976718 USB0 port 0 child on link 0 USB2 port 0
1473 11:34:11.977142 USB2 port 0
1474 11:34:11.980297 USB2 port 1
1475 11:34:11.980749 USB2 port 2
1476 11:34:11.983412 USB2 port 3
1477 11:34:11.983834 USB2 port 4
1478 11:34:11.986917 USB2 port 5
1479 11:34:11.987336 USB2 port 6
1480 11:34:11.990873 USB2 port 7
1481 11:34:11.993405 USB2 port 8
1482 11:34:11.993828 USB2 port 9
1483 11:34:11.996590 USB3 port 0
1484 11:34:11.997010 USB3 port 1
1485 11:34:12.000040 USB3 port 2
1486 11:34:12.000481 USB3 port 3
1487 11:34:12.003115 PCI: 00:14.2
1488 11:34:12.013500 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1489 11:34:12.022830 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1490 11:34:12.026317 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1491 11:34:12.039550 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1492 11:34:12.040151 GENERIC: 0.0
1493 11:34:12.042740 PCI: 00:15.0 child on link 0 I2C: 00:1a
1494 11:34:12.056026 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1495 11:34:12.056604 I2C: 00:1a
1496 11:34:12.056998 I2C: 00:31
1497 11:34:12.059043 I2C: 00:32
1498 11:34:12.062774 PCI: 00:15.1 child on link 0 I2C: 00:10
1499 11:34:12.072039 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1500 11:34:12.075655 I2C: 00:10
1501 11:34:12.076267 PCI: 00:15.2
1502 11:34:12.088712 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1503 11:34:12.089276 PCI: 00:15.3
1504 11:34:12.098617 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1505 11:34:12.101793 PCI: 00:16.0
1506 11:34:12.112090 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1507 11:34:12.112568 PCI: 00:19.0
1508 11:34:12.118486 PCI: 00:19.1 child on link 0 I2C: 00:15
1509 11:34:12.128758 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1510 11:34:12.129325 I2C: 00:15
1511 11:34:12.135232 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1512 11:34:12.141289 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1513 11:34:12.155034 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1514 11:34:12.164239 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1515 11:34:12.167499 GENERIC: 0.0
1516 11:34:12.167958 PCI: 01:00.0
1517 11:34:12.178181 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1518 11:34:12.188356 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1519 11:34:12.190626 PCI: 00:1e.0
1520 11:34:12.200664 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1521 11:34:12.207354 PCI: 00:1e.2 child on link 0 SPI: 00
1522 11:34:12.217276 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1523 11:34:12.217833 SPI: 00
1524 11:34:12.220318 PCI: 00:1e.3 child on link 0 SPI: 00
1525 11:34:12.230804 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1526 11:34:12.233423 SPI: 00
1527 11:34:12.237299 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1528 11:34:12.246445 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1529 11:34:12.247006 PNP: 0c09.0
1530 11:34:12.256366 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1531 11:34:12.259719 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1532 11:34:12.270160 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1533 11:34:12.279685 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1534 11:34:12.282952 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1535 11:34:12.286166 GENERIC: 0.0
1536 11:34:12.289239 GENERIC: 1.0
1537 11:34:12.289838 PCI: 00:1f.3
1538 11:34:12.299665 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1539 11:34:12.309242 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1540 11:34:12.312533 PCI: 00:1f.5
1541 11:34:12.322514 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1542 11:34:12.326317 CPU_CLUSTER: 0 child on link 0 APIC: 00
1543 11:34:12.328880 APIC: 00
1544 11:34:12.329338 APIC: 01
1545 11:34:12.332529 APIC: 07
1546 11:34:12.333088 APIC: 02
1547 11:34:12.333458 APIC: 05
1548 11:34:12.335349 APIC: 04
1549 11:34:12.335809 APIC: 06
1550 11:34:12.336203 APIC: 03
1551 11:34:12.339557 Done allocating resources.
1552 11:34:12.345761 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1553 11:34:12.352099 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1554 11:34:12.354960 Configure GPIOs for I2S audio on UP4.
1555 11:34:12.361850 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1556 11:34:12.365451 Enabling resources...
1557 11:34:12.368778 PCI: 00:00.0 subsystem <- 8086/9a12
1558 11:34:12.372209 PCI: 00:00.0 cmd <- 06
1559 11:34:12.375037 PCI: 00:02.0 subsystem <- 8086/9a40
1560 11:34:12.378473 PCI: 00:02.0 cmd <- 03
1561 11:34:12.382029 PCI: 00:04.0 subsystem <- 8086/9a03
1562 11:34:12.385268 PCI: 00:04.0 cmd <- 02
1563 11:34:12.388298 PCI: 00:05.0 subsystem <- 8086/9a19
1564 11:34:12.388765 PCI: 00:05.0 cmd <- 02
1565 11:34:12.395116 PCI: 00:08.0 subsystem <- 8086/9a11
1566 11:34:12.395704 PCI: 00:08.0 cmd <- 06
1567 11:34:12.398220 PCI: 00:0d.0 subsystem <- 8086/9a13
1568 11:34:12.401194 PCI: 00:0d.0 cmd <- 02
1569 11:34:12.404679 PCI: 00:14.0 subsystem <- 8086/a0ed
1570 11:34:12.408158 PCI: 00:14.0 cmd <- 02
1571 11:34:12.411274 PCI: 00:14.2 subsystem <- 8086/a0ef
1572 11:34:12.414874 PCI: 00:14.2 cmd <- 02
1573 11:34:12.418880 PCI: 00:14.3 subsystem <- 8086/a0f0
1574 11:34:12.420828 PCI: 00:14.3 cmd <- 02
1575 11:34:12.424461 PCI: 00:15.0 subsystem <- 8086/a0e8
1576 11:34:12.428253 PCI: 00:15.0 cmd <- 02
1577 11:34:12.431065 PCI: 00:15.1 subsystem <- 8086/a0e9
1578 11:34:12.434343 PCI: 00:15.1 cmd <- 02
1579 11:34:12.437724 PCI: 00:15.2 subsystem <- 8086/a0ea
1580 11:34:12.440606 PCI: 00:15.2 cmd <- 02
1581 11:34:12.443912 PCI: 00:15.3 subsystem <- 8086/a0eb
1582 11:34:12.444417 PCI: 00:15.3 cmd <- 02
1583 11:34:12.450905 PCI: 00:16.0 subsystem <- 8086/a0e0
1584 11:34:12.451470 PCI: 00:16.0 cmd <- 02
1585 11:34:12.454924 PCI: 00:19.1 subsystem <- 8086/a0c6
1586 11:34:12.457381 PCI: 00:19.1 cmd <- 02
1587 11:34:12.460702 PCI: 00:1d.0 bridge ctrl <- 0013
1588 11:34:12.464303 PCI: 00:1d.0 subsystem <- 8086/a0b0
1589 11:34:12.467027 PCI: 00:1d.0 cmd <- 06
1590 11:34:12.470627 PCI: 00:1e.0 subsystem <- 8086/a0a8
1591 11:34:12.473742 PCI: 00:1e.0 cmd <- 06
1592 11:34:12.477608 PCI: 00:1e.2 subsystem <- 8086/a0aa
1593 11:34:12.480305 PCI: 00:1e.2 cmd <- 06
1594 11:34:12.483692 PCI: 00:1e.3 subsystem <- 8086/a0ab
1595 11:34:12.486957 PCI: 00:1e.3 cmd <- 02
1596 11:34:12.490187 PCI: 00:1f.0 subsystem <- 8086/a087
1597 11:34:12.493710 PCI: 00:1f.0 cmd <- 407
1598 11:34:12.497242 PCI: 00:1f.3 subsystem <- 8086/a0c8
1599 11:34:12.499903 PCI: 00:1f.3 cmd <- 02
1600 11:34:12.504251 PCI: 00:1f.5 subsystem <- 8086/a0a4
1601 11:34:12.504732 PCI: 00:1f.5 cmd <- 406
1602 11:34:12.509588 PCI: 01:00.0 cmd <- 02
1603 11:34:12.513321 done.
1604 11:34:12.516706 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1605 11:34:12.520119 Initializing devices...
1606 11:34:12.523219 Root Device init
1607 11:34:12.526799 Chrome EC: Set SMI mask to 0x0000000000000000
1608 11:34:12.533795 Chrome EC: clear events_b mask to 0x0000000000000000
1609 11:34:12.540039 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1610 11:34:12.546459 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1611 11:34:12.552653 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1612 11:34:12.556216 Chrome EC: Set WAKE mask to 0x0000000000000000
1613 11:34:12.563775 fw_config match found: DB_USB=USB3_ACTIVE
1614 11:34:12.566631 Configure Right Type-C port orientation for retimer
1615 11:34:12.570442 Root Device init finished in 45 msecs
1616 11:34:12.574549 PCI: 00:00.0 init
1617 11:34:12.577665 CPU TDP = 9 Watts
1618 11:34:12.578216 CPU PL1 = 9 Watts
1619 11:34:12.580904 CPU PL2 = 40 Watts
1620 11:34:12.584295 CPU PL4 = 83 Watts
1621 11:34:12.587983 PCI: 00:00.0 init finished in 8 msecs
1622 11:34:12.588637 PCI: 00:02.0 init
1623 11:34:12.591166 GMA: Found VBT in CBFS
1624 11:34:12.594157 GMA: Found valid VBT in CBFS
1625 11:34:12.601128 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1626 11:34:12.607276 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1627 11:34:12.610349 PCI: 00:02.0 init finished in 18 msecs
1628 11:34:12.614338 PCI: 00:05.0 init
1629 11:34:12.617705 PCI: 00:05.0 init finished in 0 msecs
1630 11:34:12.620497 PCI: 00:08.0 init
1631 11:34:12.623736 PCI: 00:08.0 init finished in 0 msecs
1632 11:34:12.626807 PCI: 00:14.0 init
1633 11:34:12.630953 PCI: 00:14.0 init finished in 0 msecs
1634 11:34:12.633374 PCI: 00:14.2 init
1635 11:34:12.637178 PCI: 00:14.2 init finished in 0 msecs
1636 11:34:12.640174 PCI: 00:15.0 init
1637 11:34:12.643427 I2C bus 0 version 0x3230302a
1638 11:34:12.646676 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1639 11:34:12.650143 PCI: 00:15.0 init finished in 6 msecs
1640 11:34:12.653158 PCI: 00:15.1 init
1641 11:34:12.653617 I2C bus 1 version 0x3230302a
1642 11:34:12.660023 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1643 11:34:12.663082 PCI: 00:15.1 init finished in 6 msecs
1644 11:34:12.663544 PCI: 00:15.2 init
1645 11:34:12.666439 I2C bus 2 version 0x3230302a
1646 11:34:12.669500 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1647 11:34:12.676276 PCI: 00:15.2 init finished in 6 msecs
1648 11:34:12.676822 PCI: 00:15.3 init
1649 11:34:12.679267 I2C bus 3 version 0x3230302a
1650 11:34:12.683254 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1651 11:34:12.686277 PCI: 00:15.3 init finished in 6 msecs
1652 11:34:12.689503 PCI: 00:16.0 init
1653 11:34:12.692758 PCI: 00:16.0 init finished in 0 msecs
1654 11:34:12.696214 PCI: 00:19.1 init
1655 11:34:12.699542 I2C bus 5 version 0x3230302a
1656 11:34:12.702407 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1657 11:34:12.706090 PCI: 00:19.1 init finished in 6 msecs
1658 11:34:12.710189 PCI: 00:1d.0 init
1659 11:34:12.712402 Initializing PCH PCIe bridge.
1660 11:34:12.716127 PCI: 00:1d.0 init finished in 3 msecs
1661 11:34:12.719425 PCI: 00:1f.0 init
1662 11:34:12.722662 IOAPIC: Initializing IOAPIC at 0xfec00000
1663 11:34:12.725723 IOAPIC: Bootstrap Processor Local APIC = 0x00
1664 11:34:12.729980 IOAPIC: ID = 0x02
1665 11:34:12.732601 IOAPIC: Dumping registers
1666 11:34:12.735772 reg 0x0000: 0x02000000
1667 11:34:12.736376 reg 0x0001: 0x00770020
1668 11:34:12.738784 reg 0x0002: 0x00000000
1669 11:34:12.742351 PCI: 00:1f.0 init finished in 21 msecs
1670 11:34:12.745523 PCI: 00:1f.2 init
1671 11:34:12.749375 Disabling ACPI via APMC.
1672 11:34:12.752988 APMC done.
1673 11:34:12.756310 PCI: 00:1f.2 init finished in 6 msecs
1674 11:34:12.768198 PCI: 01:00.0 init
1675 11:34:12.771086 PCI: 01:00.0 init finished in 0 msecs
1676 11:34:12.774726 PNP: 0c09.0 init
1677 11:34:12.777606 Google Chrome EC uptime: 8.293 seconds
1678 11:34:12.784498 Google Chrome AP resets since EC boot: 1
1679 11:34:12.788108 Google Chrome most recent AP reset causes:
1680 11:34:12.790975 0.454: 32775 shutdown: entering G3
1681 11:34:12.797286 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1682 11:34:12.801206 PNP: 0c09.0 init finished in 22 msecs
1683 11:34:12.806576 Devices initialized
1684 11:34:12.809749 Show all devs... After init.
1685 11:34:12.812875 Root Device: enabled 1
1686 11:34:12.813334 DOMAIN: 0000: enabled 1
1687 11:34:12.816453 CPU_CLUSTER: 0: enabled 1
1688 11:34:12.819487 PCI: 00:00.0: enabled 1
1689 11:34:12.822929 PCI: 00:02.0: enabled 1
1690 11:34:12.826557 PCI: 00:04.0: enabled 1
1691 11:34:12.827117 PCI: 00:05.0: enabled 1
1692 11:34:12.829747 PCI: 00:06.0: enabled 0
1693 11:34:12.832927 PCI: 00:07.0: enabled 0
1694 11:34:12.833393 PCI: 00:07.1: enabled 0
1695 11:34:12.836115 PCI: 00:07.2: enabled 0
1696 11:34:12.839827 PCI: 00:07.3: enabled 0
1697 11:34:12.842772 PCI: 00:08.0: enabled 1
1698 11:34:12.843325 PCI: 00:09.0: enabled 0
1699 11:34:12.845911 PCI: 00:0a.0: enabled 0
1700 11:34:12.849653 PCI: 00:0d.0: enabled 1
1701 11:34:12.852916 PCI: 00:0d.1: enabled 0
1702 11:34:12.853384 PCI: 00:0d.2: enabled 0
1703 11:34:12.857073 PCI: 00:0d.3: enabled 0
1704 11:34:12.859271 PCI: 00:0e.0: enabled 0
1705 11:34:12.862645 PCI: 00:10.2: enabled 1
1706 11:34:12.863101 PCI: 00:10.6: enabled 0
1707 11:34:12.866010 PCI: 00:10.7: enabled 0
1708 11:34:12.870106 PCI: 00:12.0: enabled 0
1709 11:34:12.872708 PCI: 00:12.6: enabled 0
1710 11:34:12.873342 PCI: 00:13.0: enabled 0
1711 11:34:12.875730 PCI: 00:14.0: enabled 1
1712 11:34:12.879405 PCI: 00:14.1: enabled 0
1713 11:34:12.882502 PCI: 00:14.2: enabled 1
1714 11:34:12.883060 PCI: 00:14.3: enabled 1
1715 11:34:12.885730 PCI: 00:15.0: enabled 1
1716 11:34:12.888700 PCI: 00:15.1: enabled 1
1717 11:34:12.889159 PCI: 00:15.2: enabled 1
1718 11:34:12.892143 PCI: 00:15.3: enabled 1
1719 11:34:12.895482 PCI: 00:16.0: enabled 1
1720 11:34:12.898813 PCI: 00:16.1: enabled 0
1721 11:34:12.899360 PCI: 00:16.2: enabled 0
1722 11:34:12.901834 PCI: 00:16.3: enabled 0
1723 11:34:12.905370 PCI: 00:16.4: enabled 0
1724 11:34:12.908289 PCI: 00:16.5: enabled 0
1725 11:34:12.908792 PCI: 00:17.0: enabled 0
1726 11:34:12.911623 PCI: 00:19.0: enabled 0
1727 11:34:12.915475 PCI: 00:19.1: enabled 1
1728 11:34:12.918285 PCI: 00:19.2: enabled 0
1729 11:34:12.918748 PCI: 00:1c.0: enabled 1
1730 11:34:12.921673 PCI: 00:1c.1: enabled 0
1731 11:34:12.925111 PCI: 00:1c.2: enabled 0
1732 11:34:12.928539 PCI: 00:1c.3: enabled 0
1733 11:34:12.929097 PCI: 00:1c.4: enabled 0
1734 11:34:12.931851 PCI: 00:1c.5: enabled 0
1735 11:34:12.935172 PCI: 00:1c.6: enabled 1
1736 11:34:12.938814 PCI: 00:1c.7: enabled 0
1737 11:34:12.939371 PCI: 00:1d.0: enabled 1
1738 11:34:12.941910 PCI: 00:1d.1: enabled 0
1739 11:34:12.945134 PCI: 00:1d.2: enabled 1
1740 11:34:12.947921 PCI: 00:1d.3: enabled 0
1741 11:34:12.948432 PCI: 00:1e.0: enabled 1
1742 11:34:12.951317 PCI: 00:1e.1: enabled 0
1743 11:34:12.954824 PCI: 00:1e.2: enabled 1
1744 11:34:12.957792 PCI: 00:1e.3: enabled 1
1745 11:34:12.958253 PCI: 00:1f.0: enabled 1
1746 11:34:12.961673 PCI: 00:1f.1: enabled 0
1747 11:34:12.964794 PCI: 00:1f.2: enabled 1
1748 11:34:12.965254 PCI: 00:1f.3: enabled 1
1749 11:34:12.967753 PCI: 00:1f.4: enabled 0
1750 11:34:12.971366 PCI: 00:1f.5: enabled 1
1751 11:34:12.974041 PCI: 00:1f.6: enabled 0
1752 11:34:12.974500 PCI: 00:1f.7: enabled 0
1753 11:34:12.978477 APIC: 00: enabled 1
1754 11:34:12.981102 GENERIC: 0.0: enabled 1
1755 11:34:12.984263 GENERIC: 0.0: enabled 1
1756 11:34:12.984724 GENERIC: 1.0: enabled 1
1757 11:34:12.987566 GENERIC: 0.0: enabled 1
1758 11:34:12.990721 GENERIC: 1.0: enabled 1
1759 11:34:12.991238 USB0 port 0: enabled 1
1760 11:34:12.994547 GENERIC: 0.0: enabled 1
1761 11:34:12.997353 USB0 port 0: enabled 1
1762 11:34:13.000739 GENERIC: 0.0: enabled 1
1763 11:34:13.001197 I2C: 00:1a: enabled 1
1764 11:34:13.004560 I2C: 00:31: enabled 1
1765 11:34:13.007386 I2C: 00:32: enabled 1
1766 11:34:13.008200 I2C: 00:10: enabled 1
1767 11:34:13.011178 I2C: 00:15: enabled 1
1768 11:34:13.013909 GENERIC: 0.0: enabled 0
1769 11:34:13.018339 GENERIC: 1.0: enabled 0
1770 11:34:13.018798 GENERIC: 0.0: enabled 1
1771 11:34:13.020600 SPI: 00: enabled 1
1772 11:34:13.021092 SPI: 00: enabled 1
1773 11:34:13.024169 PNP: 0c09.0: enabled 1
1774 11:34:13.026996 GENERIC: 0.0: enabled 1
1775 11:34:13.030539 USB3 port 0: enabled 1
1776 11:34:13.031005 USB3 port 1: enabled 1
1777 11:34:13.033720 USB3 port 2: enabled 0
1778 11:34:13.036898 USB3 port 3: enabled 0
1779 11:34:13.037361 USB2 port 0: enabled 0
1780 11:34:13.040546 USB2 port 1: enabled 1
1781 11:34:13.043829 USB2 port 2: enabled 1
1782 11:34:13.047335 USB2 port 3: enabled 0
1783 11:34:13.047898 USB2 port 4: enabled 1
1784 11:34:13.050199 USB2 port 5: enabled 0
1785 11:34:13.053609 USB2 port 6: enabled 0
1786 11:34:13.054076 USB2 port 7: enabled 0
1787 11:34:13.056780 USB2 port 8: enabled 0
1788 11:34:13.060170 USB2 port 9: enabled 0
1789 11:34:13.063170 USB3 port 0: enabled 0
1790 11:34:13.063635 USB3 port 1: enabled 1
1791 11:34:13.066609 USB3 port 2: enabled 0
1792 11:34:13.070546 USB3 port 3: enabled 0
1793 11:34:13.071027 GENERIC: 0.0: enabled 1
1794 11:34:13.073478 GENERIC: 1.0: enabled 1
1795 11:34:13.076751 APIC: 01: enabled 1
1796 11:34:13.077316 APIC: 07: enabled 1
1797 11:34:13.080694 APIC: 02: enabled 1
1798 11:34:13.083728 APIC: 05: enabled 1
1799 11:34:13.084359 APIC: 04: enabled 1
1800 11:34:13.086541 APIC: 06: enabled 1
1801 11:34:13.089569 APIC: 03: enabled 1
1802 11:34:13.090039 PCI: 01:00.0: enabled 1
1803 11:34:13.096695 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1804 11:34:13.099331 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1805 11:34:13.105995 ELOG: NV offset 0xf30000 size 0x1000
1806 11:34:13.112459 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1807 11:34:13.119592 ELOG: Event(17) added with size 13 at 2024-03-18 11:34:13 UTC
1808 11:34:13.125776 ELOG: Event(92) added with size 9 at 2024-03-18 11:34:13 UTC
1809 11:34:13.132397 ELOG: Event(93) added with size 9 at 2024-03-18 11:34:13 UTC
1810 11:34:13.139272 ELOG: Event(9E) added with size 10 at 2024-03-18 11:34:13 UTC
1811 11:34:13.145732 ELOG: Event(9F) added with size 14 at 2024-03-18 11:34:13 UTC
1812 11:34:13.148992 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1813 11:34:13.155532 ELOG: Event(A1) added with size 10 at 2024-03-18 11:34:13 UTC
1814 11:34:13.165717 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1815 11:34:13.168943 ELOG: Event(A0) added with size 9 at 2024-03-18 11:34:13 UTC
1816 11:34:13.175232 elog_add_boot_reason: Logged dev mode boot
1817 11:34:13.181670 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1818 11:34:13.182131 Finalize devices...
1819 11:34:13.185225 Devices finalized
1820 11:34:13.188398 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1821 11:34:13.194968 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1822 11:34:13.202039 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1823 11:34:13.205076 ME: HFSTS1 : 0x80030055
1824 11:34:13.211224 ME: HFSTS2 : 0x30280116
1825 11:34:13.214617 ME: HFSTS3 : 0x00000050
1826 11:34:13.219050 ME: HFSTS4 : 0x00004000
1827 11:34:13.224868 ME: HFSTS5 : 0x00000000
1828 11:34:13.227704 ME: HFSTS6 : 0x40400006
1829 11:34:13.231175 ME: Manufacturing Mode : YES
1830 11:34:13.234826 ME: SPI Protection Mode Enabled : NO
1831 11:34:13.237780 ME: FW Partition Table : OK
1832 11:34:13.241614 ME: Bringup Loader Failure : NO
1833 11:34:13.247823 ME: Firmware Init Complete : NO
1834 11:34:13.251169 ME: Boot Options Present : NO
1835 11:34:13.254506 ME: Update In Progress : NO
1836 11:34:13.257770 ME: D0i3 Support : YES
1837 11:34:13.261067 ME: Low Power State Enabled : NO
1838 11:34:13.264324 ME: CPU Replaced : YES
1839 11:34:13.267991 ME: CPU Replacement Valid : YES
1840 11:34:13.274515 ME: Current Working State : 5
1841 11:34:13.277517 ME: Current Operation State : 1
1842 11:34:13.281020 ME: Current Operation Mode : 3
1843 11:34:13.284227 ME: Error Code : 0
1844 11:34:13.287733 ME: Enhanced Debug Mode : NO
1845 11:34:13.290811 ME: CPU Debug Disabled : YES
1846 11:34:13.294013 ME: TXT Support : NO
1847 11:34:13.300879 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1848 11:34:13.307694 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1849 11:34:13.310405 CBFS: 'fallback/slic' not found.
1850 11:34:13.316710 ACPI: Writing ACPI tables at 76b01000.
1851 11:34:13.317213 ACPI: * FACS
1852 11:34:13.320449 ACPI: * DSDT
1853 11:34:13.323589 Ramoops buffer: 0x100000@0x76a00000.
1854 11:34:13.327035 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1855 11:34:13.333559 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1856 11:34:13.336896 Google Chrome EC: version:
1857 11:34:13.340146 ro: voema_v2.0.10114-a447f03e46
1858 11:34:13.343783 rw: voema_v2.0.10114-a447f03e46
1859 11:34:13.344360 running image: 2
1860 11:34:13.349921 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1861 11:34:13.354264 ACPI: * FADT
1862 11:34:13.354680 SCI is IRQ9
1863 11:34:13.361458 ACPI: added table 1/32, length now 40
1864 11:34:13.361953 ACPI: * SSDT
1865 11:34:13.364351 Found 1 CPU(s) with 8 core(s) each.
1866 11:34:13.371151 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1867 11:34:13.374108 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1868 11:34:13.377872 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1869 11:34:13.384212 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1870 11:34:13.387984 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1871 11:34:13.394582 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1872 11:34:13.397370 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1873 11:34:13.404128 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1874 11:34:13.410580 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1875 11:34:13.414004 \_SB.PCI0.RP09: Added StorageD3Enable property
1876 11:34:13.420370 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1877 11:34:13.423657 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1878 11:34:13.430619 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1879 11:34:13.433648 PS2K: Passing 80 keymaps to kernel
1880 11:34:13.440417 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1881 11:34:13.447212 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1882 11:34:13.453401 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1883 11:34:13.460222 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1884 11:34:13.466921 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1885 11:34:13.473031 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1886 11:34:13.479685 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1887 11:34:13.486721 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1888 11:34:13.489790 ACPI: added table 2/32, length now 44
1889 11:34:13.493595 ACPI: * MCFG
1890 11:34:13.496670 ACPI: added table 3/32, length now 48
1891 11:34:13.497198 ACPI: * TPM2
1892 11:34:13.499854 TPM2 log created at 0x769f0000
1893 11:34:13.503043 ACPI: added table 4/32, length now 52
1894 11:34:13.506072 ACPI: * MADT
1895 11:34:13.506532 SCI is IRQ9
1896 11:34:13.509279 ACPI: added table 5/32, length now 56
1897 11:34:13.512730 current = 76b09850
1898 11:34:13.513252 ACPI: * DMAR
1899 11:34:13.519300 ACPI: added table 6/32, length now 60
1900 11:34:13.522849 ACPI: added table 7/32, length now 64
1901 11:34:13.523378 ACPI: * HPET
1902 11:34:13.526014 ACPI: added table 8/32, length now 68
1903 11:34:13.530002 ACPI: done.
1904 11:34:13.532338 ACPI tables: 35216 bytes.
1905 11:34:13.532770 smbios_write_tables: 769ef000
1906 11:34:13.536215 EC returned error result code 3
1907 11:34:13.539659 Couldn't obtain OEM name from CBI
1908 11:34:13.543493 Create SMBIOS type 16
1909 11:34:13.546769 Create SMBIOS type 17
1910 11:34:13.549603 GENERIC: 0.0 (WIFI Device)
1911 11:34:13.552780 SMBIOS tables: 1734 bytes.
1912 11:34:13.556448 Writing table forward entry at 0x00000500
1913 11:34:13.562555 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1914 11:34:13.565722 Writing coreboot table at 0x76b25000
1915 11:34:13.572248 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1916 11:34:13.575432 1. 0000000000001000-000000000009ffff: RAM
1917 11:34:13.578854 2. 00000000000a0000-00000000000fffff: RESERVED
1918 11:34:13.585448 3. 0000000000100000-00000000769eefff: RAM
1919 11:34:13.589136 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1920 11:34:13.595346 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1921 11:34:13.601883 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1922 11:34:13.605358 7. 0000000077000000-000000007fbfffff: RESERVED
1923 11:34:13.612274 8. 00000000c0000000-00000000cfffffff: RESERVED
1924 11:34:13.615143 9. 00000000f8000000-00000000f9ffffff: RESERVED
1925 11:34:13.621815 10. 00000000fb000000-00000000fb000fff: RESERVED
1926 11:34:13.625574 11. 00000000fe000000-00000000fe00ffff: RESERVED
1927 11:34:13.628432 12. 00000000fed80000-00000000fed87fff: RESERVED
1928 11:34:13.635034 13. 00000000fed90000-00000000fed92fff: RESERVED
1929 11:34:13.638076 14. 00000000feda0000-00000000feda1fff: RESERVED
1930 11:34:13.644664 15. 00000000fedc0000-00000000feddffff: RESERVED
1931 11:34:13.648095 16. 0000000100000000-00000004803fffff: RAM
1932 11:34:13.651306 Passing 4 GPIOs to payload:
1933 11:34:13.657632 NAME | PORT | POLARITY | VALUE
1934 11:34:13.661367 lid | undefined | high | high
1935 11:34:13.667914 power | undefined | high | low
1936 11:34:13.671259 oprom | undefined | high | low
1937 11:34:13.677488 EC in RW | 0x000000e5 | high | high
1938 11:34:13.684292 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865
1939 11:34:13.687728 coreboot table: 1576 bytes.
1940 11:34:13.691300 IMD ROOT 0. 0x76fff000 0x00001000
1941 11:34:13.694509 IMD SMALL 1. 0x76ffe000 0x00001000
1942 11:34:13.697941 FSP MEMORY 2. 0x76c4e000 0x003b0000
1943 11:34:13.701358 VPD 3. 0x76c4d000 0x00000367
1944 11:34:13.704008 RO MCACHE 4. 0x76c4c000 0x00000fdc
1945 11:34:13.710869 CONSOLE 5. 0x76c2c000 0x00020000
1946 11:34:13.714266 FMAP 6. 0x76c2b000 0x00000578
1947 11:34:13.717503 TIME STAMP 7. 0x76c2a000 0x00000910
1948 11:34:13.720625 VBOOT WORK 8. 0x76c16000 0x00014000
1949 11:34:13.723842 ROMSTG STCK 9. 0x76c15000 0x00001000
1950 11:34:13.727478 AFTER CAR 10. 0x76c0a000 0x0000b000
1951 11:34:13.731148 RAMSTAGE 11. 0x76b97000 0x00073000
1952 11:34:13.737628 REFCODE 12. 0x76b42000 0x00055000
1953 11:34:13.741074 SMM BACKUP 13. 0x76b32000 0x00010000
1954 11:34:13.744258 4f444749 14. 0x76b30000 0x00002000
1955 11:34:13.747334 EXT VBT15. 0x76b2d000 0x0000219f
1956 11:34:13.750889 COREBOOT 16. 0x76b25000 0x00008000
1957 11:34:13.754257 ACPI 17. 0x76b01000 0x00024000
1958 11:34:13.757676 ACPI GNVS 18. 0x76b00000 0x00001000
1959 11:34:13.760504 RAMOOPS 19. 0x76a00000 0x00100000
1960 11:34:13.763937 TPM2 TCGLOG20. 0x769f0000 0x00010000
1961 11:34:13.770194 SMBIOS 21. 0x769ef000 0x00000800
1962 11:34:13.770654 IMD small region:
1963 11:34:13.773698 IMD ROOT 0. 0x76ffec00 0x00000400
1964 11:34:13.780379 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1965 11:34:13.783760 POWER STATE 2. 0x76ffeb80 0x00000044
1966 11:34:13.787123 ROMSTAGE 3. 0x76ffeb60 0x00000004
1967 11:34:13.790461 MEM INFO 4. 0x76ffe980 0x000001e0
1968 11:34:13.797005 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1969 11:34:13.800250 MTRR: Physical address space:
1970 11:34:13.806587 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1971 11:34:13.813476 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1972 11:34:13.816658 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1973 11:34:13.823696 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1974 11:34:13.830138 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1975 11:34:13.837156 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1976 11:34:13.843837 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1977 11:34:13.845945 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 11:34:13.852579 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 11:34:13.855329 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 11:34:13.858778 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 11:34:13.862572 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 11:34:13.868800 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 11:34:13.872097 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 11:34:13.875580 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 11:34:13.878937 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 11:34:13.885634 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 11:34:13.888479 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 11:34:13.891871 call enable_fixed_mtrr()
1989 11:34:13.895339 CPU physical address size: 39 bits
1990 11:34:13.901984 MTRR: default type WB/UC MTRR counts: 6/7.
1991 11:34:13.905454 MTRR: WB selected as default type.
1992 11:34:13.911675 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1993 11:34:13.915255 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1994 11:34:13.922034 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1995 11:34:13.928973 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1996 11:34:13.935770 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1997 11:34:13.941659 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1998 11:34:13.948958 MTRR: Fixed MSR 0x250 0x0606060606060606
1999 11:34:13.952443 MTRR: Fixed MSR 0x258 0x0606060606060606
2000 11:34:13.955721 MTRR: Fixed MSR 0x259 0x0000000000000000
2001 11:34:13.958990 MTRR: Fixed MSR 0x268 0x0606060606060606
2002 11:34:13.965856 MTRR: Fixed MSR 0x269 0x0606060606060606
2003 11:34:13.969597 MTRR: Fixed MSR 0x26a 0x0606060606060606
2004 11:34:13.971769 MTRR: Fixed MSR 0x26b 0x0606060606060606
2005 11:34:13.975321 MTRR: Fixed MSR 0x26c 0x0606060606060606
2006 11:34:13.981685 MTRR: Fixed MSR 0x26d 0x0606060606060606
2007 11:34:13.984867 MTRR: Fixed MSR 0x26e 0x0606060606060606
2008 11:34:13.988178 MTRR: Fixed MSR 0x26f 0x0606060606060606
2009 11:34:13.988655
2010 11:34:13.992607 MTRR check
2011 11:34:13.995866 call enable_fixed_mtrr()
2012 11:34:13.996384 Fixed MTRRs : Enabled
2013 11:34:13.999301 Variable MTRRs: Enabled
2014 11:34:13.999773
2015 11:34:14.002448 MTRR: Fixed MSR 0x250 0x0606060606060606
2016 11:34:14.009262 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 11:34:14.012465 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 11:34:14.015586 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 11:34:14.019066 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 11:34:14.026206 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 11:34:14.029360 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 11:34:14.032552 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 11:34:14.035411 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 11:34:14.041813 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 11:34:14.045527 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 11:34:14.048728 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 11:34:14.055534 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 11:34:14.055621 call enable_fixed_mtrr()
2029 11:34:14.062240 MTRR: Fixed MSR 0x259 0x0000000000000000
2030 11:34:14.065564 MTRR: Fixed MSR 0x268 0x0606060606060606
2031 11:34:14.069124 MTRR: Fixed MSR 0x269 0x0606060606060606
2032 11:34:14.072363 MTRR: Fixed MSR 0x26a 0x0606060606060606
2033 11:34:14.078537 MTRR: Fixed MSR 0x26b 0x0606060606060606
2034 11:34:14.082178 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 11:34:14.085087 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 11:34:14.088404 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 11:34:14.095094 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 11:34:14.098671 CPU physical address size: 39 bits
2039 11:34:14.102673 call enable_fixed_mtrr()
2040 11:34:14.106021 MTRR: Fixed MSR 0x250 0x0606060606060606
2041 11:34:14.112542 MTRR: Fixed MSR 0x250 0x0606060606060606
2042 11:34:14.116000 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 11:34:14.119367 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 11:34:14.122588 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 11:34:14.128868 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 11:34:14.132776 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 11:34:14.135790 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 11:34:14.139085 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 11:34:14.145464 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 11:34:14.149219 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 11:34:14.151878 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 11:34:14.159466 MTRR: Fixed MSR 0x258 0x0606060606060606
2053 11:34:14.163153 MTRR: Fixed MSR 0x259 0x0000000000000000
2054 11:34:14.166171 MTRR: Fixed MSR 0x268 0x0606060606060606
2055 11:34:14.169370 MTRR: Fixed MSR 0x269 0x0606060606060606
2056 11:34:14.176734 MTRR: Fixed MSR 0x26a 0x0606060606060606
2057 11:34:14.179905 MTRR: Fixed MSR 0x26b 0x0606060606060606
2058 11:34:14.182927 MTRR: Fixed MSR 0x26c 0x0606060606060606
2059 11:34:14.186176 MTRR: Fixed MSR 0x26d 0x0606060606060606
2060 11:34:14.192503 MTRR: Fixed MSR 0x26e 0x0606060606060606
2061 11:34:14.195584 MTRR: Fixed MSR 0x26f 0x0606060606060606
2062 11:34:14.199448 call enable_fixed_mtrr()
2063 11:34:14.202559 call enable_fixed_mtrr()
2064 11:34:14.205540 CPU physical address size: 39 bits
2065 11:34:14.208889 CPU physical address size: 39 bits
2066 11:34:14.216376 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 152 ms
2067 11:34:14.223262 MTRR: Fixed MSR 0x250 0x0606060606060606
2068 11:34:14.226476 MTRR: Fixed MSR 0x250 0x0606060606060606
2069 11:34:14.230106 MTRR: Fixed MSR 0x258 0x0606060606060606
2070 11:34:14.232905 MTRR: Fixed MSR 0x259 0x0000000000000000
2071 11:34:14.236387 MTRR: Fixed MSR 0x268 0x0606060606060606
2072 11:34:14.243127 MTRR: Fixed MSR 0x269 0x0606060606060606
2073 11:34:14.246044 MTRR: Fixed MSR 0x26a 0x0606060606060606
2074 11:34:14.249134 MTRR: Fixed MSR 0x26b 0x0606060606060606
2075 11:34:14.252725 MTRR: Fixed MSR 0x26c 0x0606060606060606
2076 11:34:14.259041 MTRR: Fixed MSR 0x26d 0x0606060606060606
2077 11:34:14.262278 MTRR: Fixed MSR 0x26e 0x0606060606060606
2078 11:34:14.265591 MTRR: Fixed MSR 0x26f 0x0606060606060606
2079 11:34:14.273906 MTRR: Fixed MSR 0x258 0x0606060606060606
2080 11:34:14.273988 call enable_fixed_mtrr()
2081 11:34:14.279943 MTRR: Fixed MSR 0x259 0x0000000000000000
2082 11:34:14.283617 MTRR: Fixed MSR 0x268 0x0606060606060606
2083 11:34:14.286898 MTRR: Fixed MSR 0x269 0x0606060606060606
2084 11:34:14.289874 MTRR: Fixed MSR 0x26a 0x0606060606060606
2085 11:34:14.296456 MTRR: Fixed MSR 0x26b 0x0606060606060606
2086 11:34:14.299372 MTRR: Fixed MSR 0x26c 0x0606060606060606
2087 11:34:14.302779 MTRR: Fixed MSR 0x26d 0x0606060606060606
2088 11:34:14.306547 MTRR: Fixed MSR 0x26e 0x0606060606060606
2089 11:34:14.312972 MTRR: Fixed MSR 0x26f 0x0606060606060606
2090 11:34:14.315866 CPU physical address size: 39 bits
2091 11:34:14.321078 call enable_fixed_mtrr()
2092 11:34:14.325183 CPU physical address size: 39 bits
2093 11:34:14.332281 CPU physical address size: 39 bits
2094 11:34:14.335451 CPU physical address size: 39 bits
2095 11:34:14.339263 Checking cr50 for pending updates
2096 11:34:14.344353 Reading cr50 TPM mode
2097 11:34:14.354623 BS: BS_PAYLOAD_LOAD entry times (exec / console): 126 / 6 ms
2098 11:34:14.364827 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2099 11:34:14.368318 Checking segment from ROM address 0xffc02b38
2100 11:34:14.371629 Checking segment from ROM address 0xffc02b54
2101 11:34:14.377957 Loading segment from ROM address 0xffc02b38
2102 11:34:14.378063 code (compression=0)
2103 11:34:14.387771 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2104 11:34:14.397657 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2105 11:34:14.397735 it's not compressed!
2106 11:34:14.538933 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2107 11:34:14.545114 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2108 11:34:14.552234 Loading segment from ROM address 0xffc02b54
2109 11:34:14.555209 Entry Point 0x30000000
2110 11:34:14.555291 Loaded segments
2111 11:34:14.561846 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2112 11:34:14.608164 Finalizing chipset.
2113 11:34:14.610996 Finalizing SMM.
2114 11:34:14.611079 APMC done.
2115 11:34:14.617690 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2116 11:34:14.621110 mp_park_aps done after 0 msecs.
2117 11:34:14.623816 Jumping to boot code at 0x30000000(0x76b25000)
2118 11:34:14.633555 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2119 11:34:14.633638
2120 11:34:14.637163
2121 11:34:14.637244
2122 11:34:14.640280 Starting depthcharge on Voema...
2123 11:34:14.640362
2124 11:34:14.640718 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2125 11:34:14.640817 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2126 11:34:14.640902 Setting prompt string to ['volteer:']
2127 11:34:14.640983 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2128 11:34:14.647071 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2129 11:34:14.647155
2130 11:34:14.653689 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2131 11:34:14.653771
2132 11:34:14.660430 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2133 11:34:14.660513
2134 11:34:14.663421 Failed to find eMMC card reader
2135 11:34:14.663494
2136 11:34:14.666758 Wipe memory regions:
2137 11:34:14.666855
2138 11:34:14.670098 [0x00000000001000, 0x000000000a0000)
2139 11:34:14.670170
2140 11:34:14.673048 [0x00000000100000, 0x00000030000000)
2141 11:34:14.709104
2142 11:34:14.712480 [0x00000032662db0, 0x000000769ef000)
2143 11:34:14.762373
2144 11:34:14.765862 [0x00000100000000, 0x00000480400000)
2145 11:34:15.406300
2146 11:34:15.409360 ec_init: CrosEC protocol v3 supported (256, 256)
2147 11:34:15.841181
2148 11:34:15.841663 R8152: Initializing
2149 11:34:15.841997
2150 11:34:15.843551 Version 6 (ocp_data = 5c30)
2151 11:34:15.844127
2152 11:34:15.847204 R8152: Done initializing
2153 11:34:15.847634
2154 11:34:15.850136 Adding net device
2155 11:34:16.153029
2156 11:34:16.156209 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2157 11:34:16.156769
2158 11:34:16.157132
2159 11:34:16.157470
2160 11:34:16.159995 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2162 11:34:16.261552 volteer: tftpboot 192.168.201.1 13086466/tftp-deploy-fu09mc18/kernel/bzImage 13086466/tftp-deploy-fu09mc18/kernel/cmdline 13086466/tftp-deploy-fu09mc18/ramdisk/ramdisk.cpio.gz
2163 11:34:16.262252 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2164 11:34:16.262728 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2165 11:34:16.267183 tftpboot 192.168.201.1 13086466/tftp-deploy-fu09mc18/kernel/bzImploy-fu09mc18/kernel/cmdline 13086466/tftp-deploy-fu09mc18/ramdisk/ramdisk.cpio.gz
2166 11:34:16.267668
2167 11:34:16.268031 Waiting for link
2168 11:34:16.471174
2169 11:34:16.471725 done.
2170 11:34:16.472138
2171 11:34:16.472532 MAC: 00:24:32:30:7a:04
2172 11:34:16.472894
2173 11:34:16.474708 Sending DHCP discover... done.
2174 11:34:16.475197
2175 11:34:16.477783 Waiting for reply... done.
2176 11:34:16.478243
2177 11:34:16.482328 Sending DHCP request... done.
2178 11:34:16.482788
2179 11:34:16.487762 Waiting for reply... done.
2180 11:34:16.488451
2181 11:34:16.488838 My ip is 192.168.201.22
2182 11:34:16.489230
2183 11:34:16.494191 The DHCP server ip is 192.168.201.1
2184 11:34:16.494657
2185 11:34:16.497383 TFTP server IP predefined by user: 192.168.201.1
2186 11:34:16.497846
2187 11:34:16.504158 Bootfile predefined by user: 13086466/tftp-deploy-fu09mc18/kernel/bzImage
2188 11:34:16.504620
2189 11:34:16.507269 Sending tftp read request... done.
2190 11:34:16.507898
2191 11:34:16.516881 Waiting for the transfer...
2192 11:34:16.517490
2193 11:34:17.222085 00000000 ################################################################
2194 11:34:17.222705
2195 11:34:17.929537 00080000 ################################################################
2196 11:34:17.930155
2197 11:34:18.651028 00100000 ################################################################
2198 11:34:18.651672
2199 11:34:19.341883 00180000 ################################################################
2200 11:34:19.342461
2201 11:34:20.043485 00200000 ################################################################
2202 11:34:20.044088
2203 11:34:20.774961 00280000 ################################################################
2204 11:34:20.775531
2205 11:34:21.482021 00300000 ################################################################
2206 11:34:21.482572
2207 11:34:22.167940 00380000 ################################################################
2208 11:34:22.168623
2209 11:34:22.910030 00400000 ################################################################
2210 11:34:22.910178
2211 11:34:23.585720 00480000 ################################################################
2212 11:34:23.586245
2213 11:34:24.271173 00500000 ################################################################
2214 11:34:24.271773
2215 11:34:24.913537 00580000 ################################################################
2216 11:34:24.913692
2217 11:34:25.515208 00600000 ################################################################
2218 11:34:25.515894
2219 11:34:26.177402 00680000 ################################################################
2220 11:34:26.178062
2221 11:34:26.819984 00700000 ################################################################
2222 11:34:26.820145
2223 11:34:27.414419 00780000 ################################################################
2224 11:34:27.414953
2225 11:34:28.108618 00800000 ################################################################
2226 11:34:28.109388
2227 11:34:28.632934 00880000 ######################################################### done.
2228 11:34:28.633079
2229 11:34:28.636615 The bootfile was 9375632 bytes long.
2230 11:34:28.636695
2231 11:34:28.639808 Sending tftp read request... done.
2232 11:34:28.639896
2233 11:34:28.642464 Waiting for the transfer...
2234 11:34:28.642552
2235 11:34:29.320229 00000000 ################################################################
2236 11:34:29.320918
2237 11:34:30.031924 00080000 ################################################################
2238 11:34:30.032557
2239 11:34:30.746453 00100000 ################################################################
2240 11:34:30.747031
2241 11:34:31.443106 00180000 ################################################################
2242 11:34:31.443257
2243 11:34:32.023397 00200000 ################################################################
2244 11:34:32.023636
2245 11:34:32.700311 00280000 ################################################################
2246 11:34:32.701040
2247 11:34:33.399291 00300000 ################################################################
2248 11:34:33.399883
2249 11:34:34.058085 00380000 ################################################################
2250 11:34:34.058637
2251 11:34:34.779969 00400000 ################################################################
2252 11:34:34.780179
2253 11:34:35.428711 00480000 ################################################################
2254 11:34:35.428857
2255 11:34:36.091934 00500000 ################################################################ done.
2256 11:34:36.092147
2257 11:34:36.095388 Sending tftp read request... done.
2258 11:34:36.095496
2259 11:34:36.098481 Waiting for the transfer...
2260 11:34:36.098565
2261 11:34:36.102529 00000000 # done.
2262 11:34:36.102615
2263 11:34:36.111671 Command line loaded dynamically from TFTP file: 13086466/tftp-deploy-fu09mc18/kernel/cmdline
2264 11:34:36.111790
2265 11:34:36.134704 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13086466/extract-nfsrootfs-raw_siyu,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2266 11:34:36.140259
2267 11:34:36.143123 Shutting down all USB controllers.
2268 11:34:36.143207
2269 11:34:36.143272 Removing current net device
2270 11:34:36.143333
2271 11:34:36.146988 Finalizing coreboot
2272 11:34:36.147071
2273 11:34:36.153024 Exiting depthcharge with code 4 at timestamp: 30101243
2274 11:34:36.153108
2275 11:34:36.153173
2276 11:34:36.153233 Starting kernel ...
2277 11:34:36.153291
2278 11:34:36.153649 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2279 11:34:36.153745 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2280 11:34:36.153821 Setting prompt string to ['Linux version [0-9]']
2281 11:34:36.153887 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2282 11:34:36.153956 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2283 11:34:36.156317
2285 11:38:59.154798 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2287 11:38:59.155913 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2289 11:38:59.156981 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2292 11:38:59.158424 end: 2 depthcharge-action (duration 00:05:00) [common]
2294 11:38:59.159565 Cleaning after the job
2295 11:38:59.159658 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086466/tftp-deploy-fu09mc18/ramdisk
2296 11:38:59.160638 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086466/tftp-deploy-fu09mc18/kernel
2297 11:38:59.162027 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086466/tftp-deploy-fu09mc18/nfsrootfs
2298 11:38:59.240030 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086466/tftp-deploy-fu09mc18/modules
2299 11:38:59.240573 start: 5.1 power-off (timeout 00:00:30) [common]
2300 11:38:59.240744 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
2301 11:38:59.321182 >> Command sent successfully.
2302 11:38:59.333620 Returned 0 in 0 seconds
2303 11:38:59.435024 end: 5.1 power-off (duration 00:00:00) [common]
2305 11:38:59.436620 start: 5.2 read-feedback (timeout 00:10:00) [common]
2306 11:38:59.437924 Listened to connection for namespace 'common' for up to 1s
2307 11:39:00.438593 Finalising connection for namespace 'common'
2308 11:39:00.439302 Disconnecting from shell: Finalise
2309 11:39:00.439738
2310 11:39:00.540782 end: 5.2 read-feedback (duration 00:00:01) [common]
2311 11:39:00.541409 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13086466
2312 11:39:00.861043 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13086466
2313 11:39:00.861240 JobError: Your job cannot terminate cleanly.