Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 11:28:07.969435 lava-dispatcher, installed at version: 2024.01
2 11:28:07.969651 start: 0 validate
3 11:28:07.969781 Start time: 2024-03-18 11:28:07.969774+00:00 (UTC)
4 11:28:07.969907 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:28:07.970037 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
6 11:28:08.232349 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:28:08.233087 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-3115-g0a25e06c1d85%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:28:11.738210 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:28:11.738415 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-3115-g0a25e06c1d85%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 11:28:12.740591 validate duration: 4.77
12 11:28:12.740869 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:28:12.740980 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:28:12.741081 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:28:12.741236 Not decompressing ramdisk as can be used compressed.
16 11:28:12.741319 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
17 11:28:12.741380 saving as /var/lib/lava/dispatcher/tmp/13086462/tftp-deploy-yiwlqu7y/ramdisk/rootfs.cpio.gz
18 11:28:12.741442 total size: 35760064 (34 MB)
19 11:28:12.745948 progress 0 % (0 MB)
20 11:28:12.755500 progress 5 % (1 MB)
21 11:28:12.765138 progress 10 % (3 MB)
22 11:28:12.774562 progress 15 % (5 MB)
23 11:28:12.784058 progress 20 % (6 MB)
24 11:28:12.793533 progress 25 % (8 MB)
25 11:28:12.802979 progress 30 % (10 MB)
26 11:28:12.812266 progress 35 % (11 MB)
27 11:28:12.821801 progress 40 % (13 MB)
28 11:28:12.831378 progress 45 % (15 MB)
29 11:28:12.840695 progress 50 % (17 MB)
30 11:28:12.850431 progress 55 % (18 MB)
31 11:28:12.859756 progress 60 % (20 MB)
32 11:28:12.869523 progress 65 % (22 MB)
33 11:28:12.878987 progress 70 % (23 MB)
34 11:28:12.888528 progress 75 % (25 MB)
35 11:28:12.897983 progress 80 % (27 MB)
36 11:28:12.907227 progress 85 % (29 MB)
37 11:28:12.916585 progress 90 % (30 MB)
38 11:28:12.925871 progress 95 % (32 MB)
39 11:28:12.935241 progress 100 % (34 MB)
40 11:28:12.935442 34 MB downloaded in 0.19 s (175.79 MB/s)
41 11:28:12.935614 end: 1.1.1 http-download (duration 00:00:00) [common]
43 11:28:12.935857 end: 1.1 download-retry (duration 00:00:00) [common]
44 11:28:12.935943 start: 1.2 download-retry (timeout 00:10:00) [common]
45 11:28:12.936026 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 11:28:12.936703 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-3115-g0a25e06c1d85/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 11:28:12.936777 saving as /var/lib/lava/dispatcher/tmp/13086462/tftp-deploy-yiwlqu7y/kernel/bzImage
48 11:28:12.936839 total size: 9375632 (8 MB)
49 11:28:12.936900 No compression specified
50 11:28:12.938028 progress 0 % (0 MB)
51 11:28:12.940563 progress 5 % (0 MB)
52 11:28:12.942975 progress 10 % (0 MB)
53 11:28:12.945441 progress 15 % (1 MB)
54 11:28:12.948027 progress 20 % (1 MB)
55 11:28:12.950489 progress 25 % (2 MB)
56 11:28:12.952999 progress 30 % (2 MB)
57 11:28:12.955713 progress 35 % (3 MB)
58 11:28:12.958260 progress 40 % (3 MB)
59 11:28:12.960733 progress 45 % (4 MB)
60 11:28:12.963475 progress 50 % (4 MB)
61 11:28:12.965964 progress 55 % (4 MB)
62 11:28:12.968520 progress 60 % (5 MB)
63 11:28:12.971118 progress 65 % (5 MB)
64 11:28:12.973751 progress 70 % (6 MB)
65 11:28:12.976330 progress 75 % (6 MB)
66 11:28:12.978759 progress 80 % (7 MB)
67 11:28:12.981408 progress 85 % (7 MB)
68 11:28:12.983775 progress 90 % (8 MB)
69 11:28:12.986324 progress 95 % (8 MB)
70 11:28:12.988905 progress 100 % (8 MB)
71 11:28:12.989027 8 MB downloaded in 0.05 s (171.34 MB/s)
72 11:28:12.989174 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:28:12.989396 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:28:12.989504 start: 1.3 download-retry (timeout 00:10:00) [common]
76 11:28:12.989640 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 11:28:12.989787 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-3115-g0a25e06c1d85/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 11:28:12.989854 saving as /var/lib/lava/dispatcher/tmp/13086462/tftp-deploy-yiwlqu7y/modules/modules.tar
79 11:28:12.989913 total size: 253492 (0 MB)
80 11:28:12.989973 Using unxz to decompress xz
81 11:28:12.994043 progress 12 % (0 MB)
82 11:28:12.994470 progress 25 % (0 MB)
83 11:28:12.994726 progress 38 % (0 MB)
84 11:28:12.996278 progress 51 % (0 MB)
85 11:28:12.998217 progress 64 % (0 MB)
86 11:28:13.000135 progress 77 % (0 MB)
87 11:28:13.002118 progress 90 % (0 MB)
88 11:28:13.003848 progress 100 % (0 MB)
89 11:28:13.009772 0 MB downloaded in 0.02 s (12.18 MB/s)
90 11:28:13.010036 end: 1.3.1 http-download (duration 00:00:00) [common]
92 11:28:13.010313 end: 1.3 download-retry (duration 00:00:00) [common]
93 11:28:13.010410 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 11:28:13.010510 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 11:28:13.010592 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 11:28:13.010681 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 11:28:13.010929 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l
98 11:28:13.011100 makedir: /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin
99 11:28:13.011210 makedir: /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/tests
100 11:28:13.011308 makedir: /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/results
101 11:28:13.011424 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-add-keys
102 11:28:13.011574 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-add-sources
103 11:28:13.011704 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-background-process-start
104 11:28:13.011844 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-background-process-stop
105 11:28:13.011970 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-common-functions
106 11:28:13.012134 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-echo-ipv4
107 11:28:13.012262 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-install-packages
108 11:28:13.012386 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-installed-packages
109 11:28:13.012509 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-os-build
110 11:28:13.012634 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-probe-channel
111 11:28:13.012762 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-probe-ip
112 11:28:13.012884 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-target-ip
113 11:28:13.013008 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-target-mac
114 11:28:13.013133 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-target-storage
115 11:28:13.013274 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-test-case
116 11:28:13.013398 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-test-event
117 11:28:13.013523 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-test-feedback
118 11:28:13.013646 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-test-raise
119 11:28:13.013772 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-test-reference
120 11:28:13.013905 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-test-runner
121 11:28:13.014032 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-test-set
122 11:28:13.014156 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-test-shell
123 11:28:13.014292 Updating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-install-packages (oe)
124 11:28:13.014449 Updating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/bin/lava-installed-packages (oe)
125 11:28:13.014573 Creating /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/environment
126 11:28:13.014671 LAVA metadata
127 11:28:13.014753 - LAVA_JOB_ID=13086462
128 11:28:13.014817 - LAVA_DISPATCHER_IP=192.168.201.1
129 11:28:13.014919 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 11:28:13.014984 skipped lava-vland-overlay
131 11:28:13.015058 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 11:28:13.015137 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 11:28:13.015196 skipped lava-multinode-overlay
134 11:28:13.015265 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 11:28:13.015346 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 11:28:13.015428 Loading test definitions
137 11:28:13.015518 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 11:28:13.015588 Using /lava-13086462 at stage 0
139 11:28:13.015904 uuid=13086462_1.4.2.3.1 testdef=None
140 11:28:13.015989 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 11:28:13.016106 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 11:28:13.016633 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 11:28:13.016846 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 11:28:13.017461 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 11:28:13.017686 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 11:28:13.018357 runner path: /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/0/tests/0_cros-ec test_uuid 13086462_1.4.2.3.1
149 11:28:13.018514 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 11:28:13.018719 Creating lava-test-runner.conf files
152 11:28:13.018781 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13086462/lava-overlay-0ageby4l/lava-13086462/0 for stage 0
153 11:28:13.018878 - 0_cros-ec
154 11:28:13.018979 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
155 11:28:13.019060 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
156 11:28:13.026496 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
157 11:28:13.026614 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
158 11:28:13.026701 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
159 11:28:13.026787 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
160 11:28:13.026870 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
161 11:28:14.084513 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
162 11:28:14.084937 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
163 11:28:14.085051 extracting modules file /var/lib/lava/dispatcher/tmp/13086462/tftp-deploy-yiwlqu7y/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13086462/extract-overlay-ramdisk-ggerfuep/ramdisk
164 11:28:14.099239 end: 1.4.4 extract-modules (duration 00:00:00) [common]
165 11:28:14.099398 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
166 11:28:14.099491 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13086462/compress-overlay-9jx0buol/overlay-1.4.2.4.tar.gz to ramdisk
167 11:28:14.099564 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13086462/compress-overlay-9jx0buol/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13086462/extract-overlay-ramdisk-ggerfuep/ramdisk
168 11:28:14.106196 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
169 11:28:14.106313 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
170 11:28:14.106410 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
171 11:28:14.106500 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
172 11:28:14.106584 Building ramdisk /var/lib/lava/dispatcher/tmp/13086462/extract-overlay-ramdisk-ggerfuep/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13086462/extract-overlay-ramdisk-ggerfuep/ramdisk
173 11:28:14.610241 >> 184120 blocks
174 11:28:18.152531 rename /var/lib/lava/dispatcher/tmp/13086462/extract-overlay-ramdisk-ggerfuep/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13086462/tftp-deploy-yiwlqu7y/ramdisk/ramdisk.cpio.gz
175 11:28:18.152991 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
176 11:28:18.153122 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
177 11:28:18.153223 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
178 11:28:18.153325 No mkimage arch provided, not using FIT.
179 11:28:18.153416 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
180 11:28:18.153501 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
181 11:28:18.153605 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
182 11:28:18.153694 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
183 11:28:18.153779 No LXC device requested
184 11:28:18.153858 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
185 11:28:18.153946 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
186 11:28:18.154028 end: 1.6 deploy-device-env (duration 00:00:00) [common]
187 11:28:18.154104 Checking files for TFTP limit of 4294967296 bytes.
188 11:28:18.154528 end: 1 tftp-deploy (duration 00:00:05) [common]
189 11:28:18.154635 start: 2 depthcharge-action (timeout 00:05:00) [common]
190 11:28:18.154732 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
191 11:28:18.154858 substitutions:
192 11:28:18.154923 - {DTB}: None
193 11:28:18.154984 - {INITRD}: 13086462/tftp-deploy-yiwlqu7y/ramdisk/ramdisk.cpio.gz
194 11:28:18.155043 - {KERNEL}: 13086462/tftp-deploy-yiwlqu7y/kernel/bzImage
195 11:28:18.155099 - {LAVA_MAC}: None
196 11:28:18.155155 - {PRESEED_CONFIG}: None
197 11:28:18.155210 - {PRESEED_LOCAL}: None
198 11:28:18.155264 - {RAMDISK}: 13086462/tftp-deploy-yiwlqu7y/ramdisk/ramdisk.cpio.gz
199 11:28:18.155318 - {ROOT_PART}: None
200 11:28:18.155372 - {ROOT}: None
201 11:28:18.155425 - {SERVER_IP}: 192.168.201.1
202 11:28:18.155477 - {TEE}: None
203 11:28:18.155530 Parsed boot commands:
204 11:28:18.155583 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
205 11:28:18.155760 Parsed boot commands: tftpboot 192.168.201.1 13086462/tftp-deploy-yiwlqu7y/kernel/bzImage 13086462/tftp-deploy-yiwlqu7y/kernel/cmdline 13086462/tftp-deploy-yiwlqu7y/ramdisk/ramdisk.cpio.gz
206 11:28:18.155845 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
207 11:28:18.155929 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
208 11:28:18.156019 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
209 11:28:18.156154 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
210 11:28:18.156227 Not connected, no need to disconnect.
211 11:28:18.156301 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
212 11:28:18.156383 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
213 11:28:18.156452 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-10'
214 11:28:18.160265 Setting prompt string to ['lava-test: # ']
215 11:28:18.160664 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
216 11:28:18.160775 end: 2.2.1 reset-connection (duration 00:00:00) [common]
217 11:28:18.160877 start: 2.2.2 reset-device (timeout 00:05:00) [common]
218 11:28:18.160970 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
219 11:28:18.161203 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
220 11:28:23.310159 >> Command sent successfully.
221 11:28:23.319784 Returned 0 in 5 seconds
222 11:28:23.420923 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
224 11:28:23.422486 end: 2.2.2 reset-device (duration 00:00:05) [common]
225 11:28:23.423280 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
226 11:28:23.423745 Setting prompt string to 'Starting depthcharge on Voema...'
227 11:28:23.424368 Changing prompt to 'Starting depthcharge on Voema...'
228 11:28:23.424743 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
229 11:28:23.425848 [Enter `^Ec?' for help]
230 11:28:25.083562
231 11:28:25.084283
232 11:28:25.094105 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
233 11:28:25.100321 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
234 11:28:25.103514 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
235 11:28:25.106646 CPU: AES supported, TXT NOT supported, VT supported
236 11:28:25.113174 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
237 11:28:25.120098 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
238 11:28:25.123264 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
239 11:28:25.126882 VBOOT: Loading verstage.
240 11:28:25.133593 FMAP: Found "FLASH" version 1.1 at 0x1804000.
241 11:28:25.137206 FMAP: base = 0x0 size = 0x2000000 #areas = 32
242 11:28:25.140517 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
243 11:28:25.150580 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
244 11:28:25.157395 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
245 11:28:25.157905
246 11:28:25.158460
247 11:28:25.170486 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
248 11:28:25.184258 Probing TPM: . done!
249 11:28:25.187377 TPM ready after 0 ms
250 11:28:25.190771 Connected to device vid:did:rid of 1ae0:0028:00
251 11:28:25.202344 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
252 11:28:25.208752 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
253 11:28:25.212468 Initialized TPM device CR50 revision 0
254 11:28:25.262434 tlcl_send_startup: Startup return code is 0
255 11:28:25.262970 TPM: setup succeeded
256 11:28:25.277848 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
257 11:28:25.292168 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
258 11:28:25.304993 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
259 11:28:25.314798 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
260 11:28:25.318439 Chrome EC: UHEPI supported
261 11:28:25.321989 Phase 1
262 11:28:25.324936 FMAP: area GBB found @ 1805000 (458752 bytes)
263 11:28:25.335781 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
264 11:28:25.341466 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
265 11:28:25.347815 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
266 11:28:25.354113 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
267 11:28:25.358158 Recovery requested (1009000e)
268 11:28:25.366621 TPM: Extending digest for VBOOT: boot mode into PCR 0
269 11:28:25.372983 tlcl_extend: response is 0
270 11:28:25.379475 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
271 11:28:25.389521 tlcl_extend: response is 0
272 11:28:25.396197 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
273 11:28:25.402729 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
274 11:28:25.409499 BS: verstage times (exec / console): total (unknown) / 142 ms
275 11:28:25.409936
276 11:28:25.410281
277 11:28:25.422858 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
278 11:28:25.429191 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
279 11:28:25.432636 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
280 11:28:25.435587 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
281 11:28:25.442293 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
282 11:28:25.446255 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
283 11:28:25.449266 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
284 11:28:25.452212 TCO_STS: 0000 0000
285 11:28:25.456784 GEN_PMCON: d0015038 00002200
286 11:28:25.458835 GBLRST_CAUSE: 00000000 00000000
287 11:28:25.461972 HPR_CAUSE0: 00000000
288 11:28:25.462482 prev_sleep_state 5
289 11:28:25.465378 Boot Count incremented to 27838
290 11:28:25.472540 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 11:28:25.478730 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 11:28:25.488098 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 11:28:25.494989 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
294 11:28:25.498089 Chrome EC: UHEPI supported
295 11:28:25.505281 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
296 11:28:25.516497 Probing TPM: done!
297 11:28:25.523161 Connected to device vid:did:rid of 1ae0:0028:00
298 11:28:25.533499 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
299 11:28:25.537023 Initialized TPM device CR50 revision 0
300 11:28:25.551575 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
301 11:28:25.558455 MRC: Hash idx 0x100b comparison successful.
302 11:28:25.562260 MRC cache found, size faa8
303 11:28:25.562717 bootmode is set to: 2
304 11:28:25.565165 SPD index = 2
305 11:28:25.571965 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
306 11:28:25.575275 SPD: module type is LPDDR4X
307 11:28:25.578578 SPD: module part number is MT53D1G64D4NW-046
308 11:28:25.585008 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
309 11:28:25.588681 SPD: device width 16 bits, bus width 16 bits
310 11:28:25.594803 SPD: module size is 2048 MB (per channel)
311 11:28:26.024984 CBMEM:
312 11:28:26.027954 IMD: root @ 0x76fff000 254 entries.
313 11:28:26.031215 IMD: root @ 0x76ffec00 62 entries.
314 11:28:26.034677 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
315 11:28:26.041291 FMAP: area RW_VPD found @ f35000 (8192 bytes)
316 11:28:26.044350 External stage cache:
317 11:28:26.047891 IMD: root @ 0x7b3ff000 254 entries.
318 11:28:26.051799 IMD: root @ 0x7b3fec00 62 entries.
319 11:28:26.066012 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
320 11:28:26.073212 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
321 11:28:26.079478 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
322 11:28:26.093287 MRC: 'RECOVERY_MRC_CACHE' does not need update.
323 11:28:26.097267 cse_lite: Skip switching to RW in the recovery path
324 11:28:26.100368 8 DIMMs found
325 11:28:26.101013 SMM Memory Map
326 11:28:26.103189 SMRAM : 0x7b000000 0x800000
327 11:28:26.106534 Subregion 0: 0x7b000000 0x200000
328 11:28:26.113314 Subregion 1: 0x7b200000 0x200000
329 11:28:26.116147 Subregion 2: 0x7b400000 0x400000
330 11:28:26.116583 top_of_ram = 0x77000000
331 11:28:26.122854 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
332 11:28:26.129890 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
333 11:28:26.132701 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
334 11:28:26.139193 MTRR Range: Start=ff000000 End=0 (Size 1000000)
335 11:28:26.146493 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
336 11:28:26.153383 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
337 11:28:26.162463 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
338 11:28:26.169367 Processing 211 relocs. Offset value of 0x74c0b000
339 11:28:26.175445 BS: romstage times (exec / console): total (unknown) / 277 ms
340 11:28:26.181245
341 11:28:26.181678
342 11:28:26.191193 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
343 11:28:26.195001 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 11:28:26.204528 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 11:28:26.211077 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 11:28:26.217712 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
347 11:28:26.224107 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
348 11:28:26.268451 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
349 11:28:26.274914 Processing 5008 relocs. Offset value of 0x75d98000
350 11:28:26.278193 BS: postcar times (exec / console): total (unknown) / 59 ms
351 11:28:26.281497
352 11:28:26.281929
353 11:28:26.291399 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
354 11:28:26.291852 Normal boot
355 11:28:26.294593 FW_CONFIG value is 0x804c02
356 11:28:26.298057 PCI: 00:07.0 disabled by fw_config
357 11:28:26.301193 PCI: 00:07.1 disabled by fw_config
358 11:28:26.305014 PCI: 00:0d.2 disabled by fw_config
359 11:28:26.311349 PCI: 00:1c.7 disabled by fw_config
360 11:28:26.314606 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 11:28:26.321442 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 11:28:26.324492 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
363 11:28:26.331628 GENERIC: 0.0 disabled by fw_config
364 11:28:26.334553 GENERIC: 1.0 disabled by fw_config
365 11:28:26.338121 fw_config match found: DB_USB=USB3_ACTIVE
366 11:28:26.341014 fw_config match found: DB_USB=USB3_ACTIVE
367 11:28:26.344437 fw_config match found: DB_USB=USB3_ACTIVE
368 11:28:26.351615 fw_config match found: DB_USB=USB3_ACTIVE
369 11:28:26.354537 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 11:28:26.364351 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
371 11:28:26.370596 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
372 11:28:26.377321 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
373 11:28:26.381234 microcode: sig=0x806c1 pf=0x80 revision=0x86
374 11:28:26.387477 microcode: Update skipped, already up-to-date
375 11:28:26.394368 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
376 11:28:26.421742 Detected 4 core, 8 thread CPU.
377 11:28:26.424967 Setting up SMI for CPU
378 11:28:26.428893 IED base = 0x7b400000
379 11:28:26.431638 IED size = 0x00400000
380 11:28:26.432348 Will perform SMM setup.
381 11:28:26.438339 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
382 11:28:26.445247 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
383 11:28:26.451357 Processing 16 relocs. Offset value of 0x00030000
384 11:28:26.454921 Attempting to start 7 APs
385 11:28:26.458082 Waiting for 10ms after sending INIT.
386 11:28:26.474450 Waiting for 1st SIPI to complete...done.
387 11:28:26.474916 AP: slot 1 apic_id 1.
388 11:28:26.480356 Waiting for 2nd SIPI to complete...done.
389 11:28:26.480864 AP: slot 4 apic_id 4.
390 11:28:26.483463 AP: slot 7 apic_id 5.
391 11:28:26.486862 AP: slot 2 apic_id 7.
392 11:28:26.487289 AP: slot 5 apic_id 6.
393 11:28:26.490512 AP: slot 6 apic_id 2.
394 11:28:26.493686 AP: slot 3 apic_id 3.
395 11:28:26.500155 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 11:28:26.506768 Processing 13 relocs. Offset value of 0x00038000
397 11:28:26.510278 Unable to locate Global NVS
398 11:28:26.516566 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
399 11:28:26.520326 Installing permanent SMM handler to 0x7b000000
400 11:28:26.529932 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
401 11:28:26.533253 Processing 794 relocs. Offset value of 0x7b010000
402 11:28:26.543542 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
403 11:28:26.546903 Processing 13 relocs. Offset value of 0x7b008000
404 11:28:26.553164 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
405 11:28:26.559537 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
406 11:28:26.566395 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
407 11:28:26.569677 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
408 11:28:26.575985 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
409 11:28:26.582989 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
410 11:28:26.589522 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
411 11:28:26.592388 Unable to locate Global NVS
412 11:28:26.599270 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
413 11:28:26.602376 Clearing SMI status registers
414 11:28:26.605875 SMI_STS: PM1
415 11:28:26.606306 PM1_STS: PWRBTN
416 11:28:26.612546 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
417 11:28:26.615824 In relocation handler: CPU 0
418 11:28:26.618875 New SMBASE=0x7b000000 IEDBASE=0x7b400000
419 11:28:26.625507 Writing SMRR. base = 0x7b000006, mask=0xff800c00
420 11:28:26.629170 Relocation complete.
421 11:28:26.635710 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
422 11:28:26.638627 In relocation handler: CPU 1
423 11:28:26.641799 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
424 11:28:26.645018 Relocation complete.
425 11:28:26.651979 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
426 11:28:26.655192 In relocation handler: CPU 3
427 11:28:26.658667 New SMBASE=0x7afff400 IEDBASE=0x7b400000
428 11:28:26.661839 Relocation complete.
429 11:28:26.668031 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
430 11:28:26.671895 In relocation handler: CPU 6
431 11:28:26.675129 New SMBASE=0x7affe800 IEDBASE=0x7b400000
432 11:28:26.681112 Writing SMRR. base = 0x7b000006, mask=0xff800c00
433 11:28:26.681615 Relocation complete.
434 11:28:26.688039 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
435 11:28:26.690974 In relocation handler: CPU 5
436 11:28:26.694493 New SMBASE=0x7affec00 IEDBASE=0x7b400000
437 11:28:26.700894 Writing SMRR. base = 0x7b000006, mask=0xff800c00
438 11:28:26.704615 Relocation complete.
439 11:28:26.711257 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
440 11:28:26.714447 In relocation handler: CPU 2
441 11:28:26.718023 New SMBASE=0x7afff800 IEDBASE=0x7b400000
442 11:28:26.721160 Relocation complete.
443 11:28:26.728004 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
444 11:28:26.731074 In relocation handler: CPU 4
445 11:28:26.734064 New SMBASE=0x7afff000 IEDBASE=0x7b400000
446 11:28:26.737732 Writing SMRR. base = 0x7b000006, mask=0xff800c00
447 11:28:26.740942 Relocation complete.
448 11:28:26.747410 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
449 11:28:26.751420 In relocation handler: CPU 7
450 11:28:26.754941 New SMBASE=0x7affe400 IEDBASE=0x7b400000
451 11:28:26.758594 Relocation complete.
452 11:28:26.759257 Initializing CPU #0
453 11:28:26.761536 CPU: vendor Intel device 806c1
454 11:28:26.768671 CPU: family 06, model 8c, stepping 01
455 11:28:26.769108 Clearing out pending MCEs
456 11:28:26.771339 Setting up local APIC...
457 11:28:26.774737 apic_id: 0x00 done.
458 11:28:26.777829 Turbo is available but hidden
459 11:28:26.781526 Turbo is available and visible
460 11:28:26.785069 microcode: Update skipped, already up-to-date
461 11:28:26.787773 CPU #0 initialized
462 11:28:26.788422 Initializing CPU #7
463 11:28:26.791079 Initializing CPU #4
464 11:28:26.794430 CPU: vendor Intel device 806c1
465 11:28:26.797865 CPU: family 06, model 8c, stepping 01
466 11:28:26.801071 CPU: vendor Intel device 806c1
467 11:28:26.804951 CPU: family 06, model 8c, stepping 01
468 11:28:26.808103 Clearing out pending MCEs
469 11:28:26.811142 Clearing out pending MCEs
470 11:28:26.814336 Setting up local APIC...
471 11:28:26.814885 Initializing CPU #3
472 11:28:26.817541 Initializing CPU #6
473 11:28:26.817967 Initializing CPU #1
474 11:28:26.820838 CPU: vendor Intel device 806c1
475 11:28:26.827711 CPU: family 06, model 8c, stepping 01
476 11:28:26.828338 apic_id: 0x05 done.
477 11:28:26.830888 Setting up local APIC...
478 11:28:26.834060 CPU: vendor Intel device 806c1
479 11:28:26.837735 CPU: family 06, model 8c, stepping 01
480 11:28:26.840882 Clearing out pending MCEs
481 11:28:26.844016 microcode: Update skipped, already up-to-date
482 11:28:26.847389 apic_id: 0x04 done.
483 11:28:26.851146 CPU #7 initialized
484 11:28:26.854202 microcode: Update skipped, already up-to-date
485 11:28:26.857035 Clearing out pending MCEs
486 11:28:26.857463 Setting up local APIC...
487 11:28:26.860662 Initializing CPU #5
488 11:28:26.864365 Initializing CPU #2
489 11:28:26.867159 CPU: vendor Intel device 806c1
490 11:28:26.870584 CPU: family 06, model 8c, stepping 01
491 11:28:26.874177 CPU: vendor Intel device 806c1
492 11:28:26.877241 CPU: family 06, model 8c, stepping 01
493 11:28:26.880455 Clearing out pending MCEs
494 11:28:26.880884 Clearing out pending MCEs
495 11:28:26.883498 Setting up local APIC...
496 11:28:26.886780 CPU: vendor Intel device 806c1
497 11:28:26.890678 CPU: family 06, model 8c, stepping 01
498 11:28:26.893750 Setting up local APIC...
499 11:28:26.896891 Setting up local APIC...
500 11:28:26.900285 apic_id: 0x02 done.
501 11:28:26.900716 apic_id: 0x03 done.
502 11:28:26.906999 microcode: Update skipped, already up-to-date
503 11:28:26.910027 microcode: Update skipped, already up-to-date
504 11:28:26.913544 CPU #6 initialized
505 11:28:26.914027 CPU #3 initialized
506 11:28:26.916740 apic_id: 0x07 done.
507 11:28:26.917273 apic_id: 0x06 done.
508 11:28:26.923202 microcode: Update skipped, already up-to-date
509 11:28:26.926765 microcode: Update skipped, already up-to-date
510 11:28:26.929986 Clearing out pending MCEs
511 11:28:26.933341 CPU #4 initialized
512 11:28:26.933772 CPU #2 initialized
513 11:28:26.937191 Setting up local APIC...
514 11:28:26.939704 CPU #5 initialized
515 11:28:26.940223 apic_id: 0x01 done.
516 11:28:26.946577 microcode: Update skipped, already up-to-date
517 11:28:26.947116 CPU #1 initialized
518 11:28:26.952868 bsp_do_flight_plan done after 468 msecs.
519 11:28:26.956549 CPU: frequency set to 4400 MHz
520 11:28:26.956984 Enabling SMIs.
521 11:28:26.963245 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
522 11:28:26.978713 SATAXPCIE1 indicates PCIe NVMe is present
523 11:28:26.982217 Probing TPM: done!
524 11:28:26.985306 Connected to device vid:did:rid of 1ae0:0028:00
525 11:28:26.995791 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
526 11:28:26.999419 Initialized TPM device CR50 revision 0
527 11:28:27.003025 Enabling S0i3.4
528 11:28:27.008887 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
529 11:28:27.012862 Found a VBT of 8704 bytes after decompression
530 11:28:27.019513 cse_lite: CSE RO boot. HybridStorageMode disabled
531 11:28:27.025655 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
532 11:28:27.100676 FSPS returned 0
533 11:28:27.103901 Executing Phase 1 of FspMultiPhaseSiInit
534 11:28:27.113657 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
535 11:28:27.116769 port C0 DISC req: usage 1 usb3 1 usb2 5
536 11:28:27.120180 Raw Buffer output 0 00000511
537 11:28:27.123256 Raw Buffer output 1 00000000
538 11:28:27.127634 pmc_send_ipc_cmd succeeded
539 11:28:27.133656 port C1 DISC req: usage 1 usb3 2 usb2 3
540 11:28:27.134436 Raw Buffer output 0 00000321
541 11:28:27.137242 Raw Buffer output 1 00000000
542 11:28:27.141285 pmc_send_ipc_cmd succeeded
543 11:28:27.146441 Detected 4 core, 8 thread CPU.
544 11:28:27.150576 Detected 4 core, 8 thread CPU.
545 11:28:27.350354 Display FSP Version Info HOB
546 11:28:27.353407 Reference Code - CPU = a.0.4c.31
547 11:28:27.356860 uCode Version = 0.0.0.86
548 11:28:27.360117 TXT ACM version = ff.ff.ff.ffff
549 11:28:27.363265 Reference Code - ME = a.0.4c.31
550 11:28:27.366472 MEBx version = 0.0.0.0
551 11:28:27.369991 ME Firmware Version = Consumer SKU
552 11:28:27.372823 Reference Code - PCH = a.0.4c.31
553 11:28:27.376435 PCH-CRID Status = Disabled
554 11:28:27.379907 PCH-CRID Original Value = ff.ff.ff.ffff
555 11:28:27.382672 PCH-CRID New Value = ff.ff.ff.ffff
556 11:28:27.386456 OPROM - RST - RAID = ff.ff.ff.ffff
557 11:28:27.389385 PCH Hsio Version = 4.0.0.0
558 11:28:27.392726 Reference Code - SA - System Agent = a.0.4c.31
559 11:28:27.395886 Reference Code - MRC = 2.0.0.1
560 11:28:27.399807 SA - PCIe Version = a.0.4c.31
561 11:28:27.402796 SA-CRID Status = Disabled
562 11:28:27.405717 SA-CRID Original Value = 0.0.0.1
563 11:28:27.409591 SA-CRID New Value = 0.0.0.1
564 11:28:27.412485 OPROM - VBIOS = ff.ff.ff.ffff
565 11:28:27.415891 IO Manageability Engine FW Version = 11.1.4.0
566 11:28:27.419051 PHY Build Version = 0.0.0.e0
567 11:28:27.422369 Thunderbolt(TM) FW Version = 0.0.0.0
568 11:28:27.429328 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
569 11:28:27.432129 ITSS IRQ Polarities Before:
570 11:28:27.432562 IPC0: 0xffffffff
571 11:28:27.435670 IPC1: 0xffffffff
572 11:28:27.438969 IPC2: 0xffffffff
573 11:28:27.439728 IPC3: 0xffffffff
574 11:28:27.442387 ITSS IRQ Polarities After:
575 11:28:27.442820 IPC0: 0xffffffff
576 11:28:27.445214 IPC1: 0xffffffff
577 11:28:27.448739 IPC2: 0xffffffff
578 11:28:27.449169 IPC3: 0xffffffff
579 11:28:27.452244 Found PCIe Root Port #9 at PCI: 00:1d.0.
580 11:28:27.465531 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
581 11:28:27.478257 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
582 11:28:27.488098 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
583 11:28:27.495014 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
584 11:28:27.498168 Enumerating buses...
585 11:28:27.501431 Show all devs... Before device enumeration.
586 11:28:27.505269 Root Device: enabled 1
587 11:28:27.508041 DOMAIN: 0000: enabled 1
588 11:28:27.508533 CPU_CLUSTER: 0: enabled 1
589 11:28:27.511466 PCI: 00:00.0: enabled 1
590 11:28:27.514488 PCI: 00:02.0: enabled 1
591 11:28:27.518110 PCI: 00:04.0: enabled 1
592 11:28:27.518551 PCI: 00:05.0: enabled 1
593 11:28:27.521318 PCI: 00:06.0: enabled 0
594 11:28:27.524687 PCI: 00:07.0: enabled 0
595 11:28:27.527989 PCI: 00:07.1: enabled 0
596 11:28:27.528476 PCI: 00:07.2: enabled 0
597 11:28:27.531101 PCI: 00:07.3: enabled 0
598 11:28:27.534841 PCI: 00:08.0: enabled 1
599 11:28:27.537666 PCI: 00:09.0: enabled 0
600 11:28:27.538115 PCI: 00:0a.0: enabled 0
601 11:28:27.541443 PCI: 00:0d.0: enabled 1
602 11:28:27.544682 PCI: 00:0d.1: enabled 0
603 11:28:27.548136 PCI: 00:0d.2: enabled 0
604 11:28:27.548702 PCI: 00:0d.3: enabled 0
605 11:28:27.551043 PCI: 00:0e.0: enabled 0
606 11:28:27.554670 PCI: 00:10.2: enabled 1
607 11:28:27.555114 PCI: 00:10.6: enabled 0
608 11:28:27.557781 PCI: 00:10.7: enabled 0
609 11:28:27.560991 PCI: 00:12.0: enabled 0
610 11:28:27.564237 PCI: 00:12.6: enabled 0
611 11:28:27.564684 PCI: 00:13.0: enabled 0
612 11:28:27.567417 PCI: 00:14.0: enabled 1
613 11:28:27.571087 PCI: 00:14.1: enabled 0
614 11:28:27.574435 PCI: 00:14.2: enabled 1
615 11:28:27.574931 PCI: 00:14.3: enabled 1
616 11:28:27.577423 PCI: 00:15.0: enabled 1
617 11:28:27.581060 PCI: 00:15.1: enabled 1
618 11:28:27.584324 PCI: 00:15.2: enabled 1
619 11:28:27.584759 PCI: 00:15.3: enabled 1
620 11:28:27.587530 PCI: 00:16.0: enabled 1
621 11:28:27.590872 PCI: 00:16.1: enabled 0
622 11:28:27.593686 PCI: 00:16.2: enabled 0
623 11:28:27.594121 PCI: 00:16.3: enabled 0
624 11:28:27.597202 PCI: 00:16.4: enabled 0
625 11:28:27.600886 PCI: 00:16.5: enabled 0
626 11:28:27.603922 PCI: 00:17.0: enabled 1
627 11:28:27.604401 PCI: 00:19.0: enabled 0
628 11:28:27.607061 PCI: 00:19.1: enabled 1
629 11:28:27.610230 PCI: 00:19.2: enabled 0
630 11:28:27.613827 PCI: 00:1c.0: enabled 1
631 11:28:27.614366 PCI: 00:1c.1: enabled 0
632 11:28:27.617300 PCI: 00:1c.2: enabled 0
633 11:28:27.620252 PCI: 00:1c.3: enabled 0
634 11:28:27.620691 PCI: 00:1c.4: enabled 0
635 11:28:27.623433 PCI: 00:1c.5: enabled 0
636 11:28:27.627079 PCI: 00:1c.6: enabled 1
637 11:28:27.630194 PCI: 00:1c.7: enabled 0
638 11:28:27.630627 PCI: 00:1d.0: enabled 1
639 11:28:27.633439 PCI: 00:1d.1: enabled 0
640 11:28:27.636817 PCI: 00:1d.2: enabled 1
641 11:28:27.639966 PCI: 00:1d.3: enabled 0
642 11:28:27.640421 PCI: 00:1e.0: enabled 1
643 11:28:27.642988 PCI: 00:1e.1: enabled 0
644 11:28:27.646932 PCI: 00:1e.2: enabled 1
645 11:28:27.650194 PCI: 00:1e.3: enabled 1
646 11:28:27.650631 PCI: 00:1f.0: enabled 1
647 11:28:27.653308 PCI: 00:1f.1: enabled 0
648 11:28:27.656441 PCI: 00:1f.2: enabled 1
649 11:28:27.659871 PCI: 00:1f.3: enabled 1
650 11:28:27.660373 PCI: 00:1f.4: enabled 0
651 11:28:27.662722 PCI: 00:1f.5: enabled 1
652 11:28:27.665981 PCI: 00:1f.6: enabled 0
653 11:28:27.669565 PCI: 00:1f.7: enabled 0
654 11:28:27.670002 APIC: 00: enabled 1
655 11:28:27.673482 GENERIC: 0.0: enabled 1
656 11:28:27.676288 GENERIC: 0.0: enabled 1
657 11:28:27.676757 GENERIC: 1.0: enabled 1
658 11:28:27.679638 GENERIC: 0.0: enabled 1
659 11:28:27.682733 GENERIC: 1.0: enabled 1
660 11:28:27.685967 USB0 port 0: enabled 1
661 11:28:27.686399 GENERIC: 0.0: enabled 1
662 11:28:27.690218 USB0 port 0: enabled 1
663 11:28:27.693095 GENERIC: 0.0: enabled 1
664 11:28:27.693595 I2C: 00:1a: enabled 1
665 11:28:27.695680 I2C: 00:31: enabled 1
666 11:28:27.699203 I2C: 00:32: enabled 1
667 11:28:27.702964 I2C: 00:10: enabled 1
668 11:28:27.703452 I2C: 00:15: enabled 1
669 11:28:27.706348 GENERIC: 0.0: enabled 0
670 11:28:27.709023 GENERIC: 1.0: enabled 0
671 11:28:27.709472 GENERIC: 0.0: enabled 1
672 11:28:27.712782 SPI: 00: enabled 1
673 11:28:27.716017 SPI: 00: enabled 1
674 11:28:27.716492 PNP: 0c09.0: enabled 1
675 11:28:27.718860 GENERIC: 0.0: enabled 1
676 11:28:27.722448 USB3 port 0: enabled 1
677 11:28:27.725410 USB3 port 1: enabled 1
678 11:28:27.725845 USB3 port 2: enabled 0
679 11:28:27.728996 USB3 port 3: enabled 0
680 11:28:27.732084 USB2 port 0: enabled 0
681 11:28:27.732542 USB2 port 1: enabled 1
682 11:28:27.735902 USB2 port 2: enabled 1
683 11:28:27.738846 USB2 port 3: enabled 0
684 11:28:27.739277 USB2 port 4: enabled 1
685 11:28:27.741870 USB2 port 5: enabled 0
686 11:28:27.745783 USB2 port 6: enabled 0
687 11:28:27.748723 USB2 port 7: enabled 0
688 11:28:27.749260 USB2 port 8: enabled 0
689 11:28:27.751793 USB2 port 9: enabled 0
690 11:28:27.755146 USB3 port 0: enabled 0
691 11:28:27.755581 USB3 port 1: enabled 1
692 11:28:27.758472 USB3 port 2: enabled 0
693 11:28:27.762001 USB3 port 3: enabled 0
694 11:28:27.765016 GENERIC: 0.0: enabled 1
695 11:28:27.765503 GENERIC: 1.0: enabled 1
696 11:28:27.768395 APIC: 01: enabled 1
697 11:28:27.772120 APIC: 07: enabled 1
698 11:28:27.772558 APIC: 03: enabled 1
699 11:28:27.774952 APIC: 04: enabled 1
700 11:28:27.775625 APIC: 06: enabled 1
701 11:28:27.778336 APIC: 02: enabled 1
702 11:28:27.781676 APIC: 05: enabled 1
703 11:28:27.782111 Compare with tree...
704 11:28:27.784928 Root Device: enabled 1
705 11:28:27.788249 DOMAIN: 0000: enabled 1
706 11:28:27.791426 PCI: 00:00.0: enabled 1
707 11:28:27.791966 PCI: 00:02.0: enabled 1
708 11:28:27.794827 PCI: 00:04.0: enabled 1
709 11:28:27.798436 GENERIC: 0.0: enabled 1
710 11:28:27.801520 PCI: 00:05.0: enabled 1
711 11:28:27.804487 PCI: 00:06.0: enabled 0
712 11:28:27.808157 PCI: 00:07.0: enabled 0
713 11:28:27.808594 GENERIC: 0.0: enabled 1
714 11:28:27.811781 PCI: 00:07.1: enabled 0
715 11:28:27.814734 GENERIC: 1.0: enabled 1
716 11:28:27.817974 PCI: 00:07.2: enabled 0
717 11:28:27.821341 GENERIC: 0.0: enabled 1
718 11:28:27.821781 PCI: 00:07.3: enabled 0
719 11:28:27.824337 GENERIC: 1.0: enabled 1
720 11:28:27.827756 PCI: 00:08.0: enabled 1
721 11:28:27.831319 PCI: 00:09.0: enabled 0
722 11:28:27.834524 PCI: 00:0a.0: enabled 0
723 11:28:27.834957 PCI: 00:0d.0: enabled 1
724 11:28:27.838132 USB0 port 0: enabled 1
725 11:28:27.841106 USB3 port 0: enabled 1
726 11:28:27.844298 USB3 port 1: enabled 1
727 11:28:27.847505 USB3 port 2: enabled 0
728 11:28:27.850655 USB3 port 3: enabled 0
729 11:28:27.851087 PCI: 00:0d.1: enabled 0
730 11:28:27.854112 PCI: 00:0d.2: enabled 0
731 11:28:27.857426 GENERIC: 0.0: enabled 1
732 11:28:27.860726 PCI: 00:0d.3: enabled 0
733 11:28:27.863770 PCI: 00:0e.0: enabled 0
734 11:28:27.864249 PCI: 00:10.2: enabled 1
735 11:28:27.867419 PCI: 00:10.6: enabled 0
736 11:28:27.870479 PCI: 00:10.7: enabled 0
737 11:28:27.874153 PCI: 00:12.0: enabled 0
738 11:28:27.877219 PCI: 00:12.6: enabled 0
739 11:28:27.877651 PCI: 00:13.0: enabled 0
740 11:28:27.880264 PCI: 00:14.0: enabled 1
741 11:28:27.883575 USB0 port 0: enabled 1
742 11:28:27.886933 USB2 port 0: enabled 0
743 11:28:27.890291 USB2 port 1: enabled 1
744 11:28:27.890713 USB2 port 2: enabled 1
745 11:28:27.894075 USB2 port 3: enabled 0
746 11:28:27.897531 USB2 port 4: enabled 1
747 11:28:27.900172 USB2 port 5: enabled 0
748 11:28:27.903204 USB2 port 6: enabled 0
749 11:28:27.906664 USB2 port 7: enabled 0
750 11:28:27.907228 USB2 port 8: enabled 0
751 11:28:27.910220 USB2 port 9: enabled 0
752 11:28:27.913470 USB3 port 0: enabled 0
753 11:28:27.916639 USB3 port 1: enabled 1
754 11:28:27.920388 USB3 port 2: enabled 0
755 11:28:27.923033 USB3 port 3: enabled 0
756 11:28:27.923471 PCI: 00:14.1: enabled 0
757 11:28:27.926758 PCI: 00:14.2: enabled 1
758 11:28:27.929654 PCI: 00:14.3: enabled 1
759 11:28:27.933022 GENERIC: 0.0: enabled 1
760 11:28:27.936623 PCI: 00:15.0: enabled 1
761 11:28:27.936967 I2C: 00:1a: enabled 1
762 11:28:27.939372 I2C: 00:31: enabled 1
763 11:28:27.942609 I2C: 00:32: enabled 1
764 11:28:27.946339 PCI: 00:15.1: enabled 1
765 11:28:27.949521 I2C: 00:10: enabled 1
766 11:28:27.949828 PCI: 00:15.2: enabled 1
767 11:28:27.952854 PCI: 00:15.3: enabled 1
768 11:28:27.955937 PCI: 00:16.0: enabled 1
769 11:28:27.959218 PCI: 00:16.1: enabled 0
770 11:28:27.962591 PCI: 00:16.2: enabled 0
771 11:28:27.962897 PCI: 00:16.3: enabled 0
772 11:28:27.965860 PCI: 00:16.4: enabled 0
773 11:28:27.969879 PCI: 00:16.5: enabled 0
774 11:28:27.972725 PCI: 00:17.0: enabled 1
775 11:28:27.975708 PCI: 00:19.0: enabled 0
776 11:28:27.976191 PCI: 00:19.1: enabled 1
777 11:28:27.979066 I2C: 00:15: enabled 1
778 11:28:27.982594 PCI: 00:19.2: enabled 0
779 11:28:27.986594 PCI: 00:1d.0: enabled 1
780 11:28:27.988933 GENERIC: 0.0: enabled 1
781 11:28:27.989377 PCI: 00:1e.0: enabled 1
782 11:28:27.992534 PCI: 00:1e.1: enabled 0
783 11:28:27.996087 PCI: 00:1e.2: enabled 1
784 11:28:27.999298 SPI: 00: enabled 1
785 11:28:28.000043 PCI: 00:1e.3: enabled 1
786 11:28:28.002784 SPI: 00: enabled 1
787 11:28:28.006183 PCI: 00:1f.0: enabled 1
788 11:28:28.006885 PNP: 0c09.0: enabled 1
789 11:28:28.009742 PCI: 00:1f.1: enabled 0
790 11:28:28.013363 PCI: 00:1f.2: enabled 1
791 11:28:28.016275 GENERIC: 0.0: enabled 1
792 11:28:28.019413 GENERIC: 0.0: enabled 1
793 11:28:28.023132 GENERIC: 1.0: enabled 1
794 11:28:28.023560 PCI: 00:1f.3: enabled 1
795 11:28:28.026350 PCI: 00:1f.4: enabled 0
796 11:28:28.066799 PCI: 00:1f.5: enabled 1
797 11:28:28.067246 PCI: 00:1f.6: enabled 0
798 11:28:28.067587 PCI: 00:1f.7: enabled 0
799 11:28:28.067898 CPU_CLUSTER: 0: enabled 1
800 11:28:28.068229 APIC: 00: enabled 1
801 11:28:28.068932 APIC: 01: enabled 1
802 11:28:28.069311 APIC: 07: enabled 1
803 11:28:28.069719 APIC: 03: enabled 1
804 11:28:28.070145 APIC: 04: enabled 1
805 11:28:28.070470 APIC: 06: enabled 1
806 11:28:28.070757 APIC: 02: enabled 1
807 11:28:28.071038 APIC: 05: enabled 1
808 11:28:28.071316 Root Device scanning...
809 11:28:28.071593 scan_static_bus for Root Device
810 11:28:28.071870 DOMAIN: 0000 enabled
811 11:28:28.072246 CPU_CLUSTER: 0 enabled
812 11:28:28.072545 DOMAIN: 0000 scanning...
813 11:28:28.074287 PCI: pci_scan_bus for bus 00
814 11:28:28.074711 PCI: 00:00.0 [8086/0000] ops
815 11:28:28.077381 PCI: 00:00.0 [8086/9a12] enabled
816 11:28:28.080675 PCI: 00:02.0 [8086/0000] bus ops
817 11:28:28.084097 PCI: 00:02.0 [8086/9a40] enabled
818 11:28:28.087379 PCI: 00:04.0 [8086/0000] bus ops
819 11:28:28.090985 PCI: 00:04.0 [8086/9a03] enabled
820 11:28:28.094171 PCI: 00:05.0 [8086/9a19] enabled
821 11:28:28.097606 PCI: 00:07.0 [0000/0000] hidden
822 11:28:28.100586 PCI: 00:08.0 [8086/9a11] enabled
823 11:28:28.107301 PCI: 00:0a.0 [8086/9a0d] disabled
824 11:28:28.110980 PCI: 00:0d.0 [8086/0000] bus ops
825 11:28:28.113921 PCI: 00:0d.0 [8086/9a13] enabled
826 11:28:28.117701 PCI: 00:14.0 [8086/0000] bus ops
827 11:28:28.120187 PCI: 00:14.0 [8086/a0ed] enabled
828 11:28:28.123568 PCI: 00:14.2 [8086/a0ef] enabled
829 11:28:28.126869 PCI: 00:14.3 [8086/0000] bus ops
830 11:28:28.130369 PCI: 00:14.3 [8086/a0f0] enabled
831 11:28:28.133252 PCI: 00:15.0 [8086/0000] bus ops
832 11:28:28.136852 PCI: 00:15.0 [8086/a0e8] enabled
833 11:28:28.140030 PCI: 00:15.1 [8086/0000] bus ops
834 11:28:28.143330 PCI: 00:15.1 [8086/a0e9] enabled
835 11:28:28.146708 PCI: 00:15.2 [8086/0000] bus ops
836 11:28:28.150139 PCI: 00:15.2 [8086/a0ea] enabled
837 11:28:28.153300 PCI: 00:15.3 [8086/0000] bus ops
838 11:28:28.156722 PCI: 00:15.3 [8086/a0eb] enabled
839 11:28:28.159833 PCI: 00:16.0 [8086/0000] ops
840 11:28:28.163549 PCI: 00:16.0 [8086/a0e0] enabled
841 11:28:28.166133 PCI: Static device PCI: 00:17.0 not found, disabling it.
842 11:28:28.169766 PCI: 00:19.0 [8086/0000] bus ops
843 11:28:28.173140 PCI: 00:19.0 [8086/a0c5] disabled
844 11:28:28.176288 PCI: 00:19.1 [8086/0000] bus ops
845 11:28:28.179518 PCI: 00:19.1 [8086/a0c6] enabled
846 11:28:28.182928 PCI: 00:1d.0 [8086/0000] bus ops
847 11:28:28.186052 PCI: 00:1d.0 [8086/a0b0] enabled
848 11:28:28.189917 PCI: 00:1e.0 [8086/0000] ops
849 11:28:28.192994 PCI: 00:1e.0 [8086/a0a8] enabled
850 11:28:28.195893 PCI: 00:1e.2 [8086/0000] bus ops
851 11:28:28.199562 PCI: 00:1e.2 [8086/a0aa] enabled
852 11:28:28.203226 PCI: 00:1e.3 [8086/0000] bus ops
853 11:28:28.206300 PCI: 00:1e.3 [8086/a0ab] enabled
854 11:28:28.209195 PCI: 00:1f.0 [8086/0000] bus ops
855 11:28:28.212654 PCI: 00:1f.0 [8086/a087] enabled
856 11:28:28.215939 RTC Init
857 11:28:28.219424 Set power on after power failure.
858 11:28:28.219883 Disabling Deep S3
859 11:28:28.222986 Disabling Deep S3
860 11:28:28.225876 Disabling Deep S4
861 11:28:28.226439 Disabling Deep S4
862 11:28:28.228935 Disabling Deep S5
863 11:28:28.229358 Disabling Deep S5
864 11:28:28.232372 PCI: 00:1f.2 [0000/0000] hidden
865 11:28:28.235890 PCI: 00:1f.3 [8086/0000] bus ops
866 11:28:28.239294 PCI: 00:1f.3 [8086/a0c8] enabled
867 11:28:28.242135 PCI: 00:1f.5 [8086/0000] bus ops
868 11:28:28.245348 PCI: 00:1f.5 [8086/a0a4] enabled
869 11:28:28.248705 PCI: Leftover static devices:
870 11:28:28.252351 PCI: 00:10.2
871 11:28:28.252783 PCI: 00:10.6
872 11:28:28.255432 PCI: 00:10.7
873 11:28:28.255862 PCI: 00:06.0
874 11:28:28.256301 PCI: 00:07.1
875 11:28:28.258835 PCI: 00:07.2
876 11:28:28.259375 PCI: 00:07.3
877 11:28:28.261927 PCI: 00:09.0
878 11:28:28.262363 PCI: 00:0d.1
879 11:28:28.262709 PCI: 00:0d.2
880 11:28:28.265068 PCI: 00:0d.3
881 11:28:28.265499 PCI: 00:0e.0
882 11:28:28.268661 PCI: 00:12.0
883 11:28:28.269095 PCI: 00:12.6
884 11:28:28.271796 PCI: 00:13.0
885 11:28:28.272365 PCI: 00:14.1
886 11:28:28.272872 PCI: 00:16.1
887 11:28:28.275147 PCI: 00:16.2
888 11:28:28.275592 PCI: 00:16.3
889 11:28:28.278282 PCI: 00:16.4
890 11:28:28.278722 PCI: 00:16.5
891 11:28:28.279078 PCI: 00:17.0
892 11:28:28.281488 PCI: 00:19.2
893 11:28:28.281918 PCI: 00:1e.1
894 11:28:28.285195 PCI: 00:1f.1
895 11:28:28.285778 PCI: 00:1f.4
896 11:28:28.288181 PCI: 00:1f.6
897 11:28:28.288603 PCI: 00:1f.7
898 11:28:28.291237 PCI: Check your devicetree.cb.
899 11:28:28.294544 PCI: 00:02.0 scanning...
900 11:28:28.298181 scan_generic_bus for PCI: 00:02.0
901 11:28:28.301245 scan_generic_bus for PCI: 00:02.0 done
902 11:28:28.304724 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
903 11:28:28.307809 PCI: 00:04.0 scanning...
904 11:28:28.311500 scan_generic_bus for PCI: 00:04.0
905 11:28:28.314708 GENERIC: 0.0 enabled
906 11:28:28.321242 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
907 11:28:28.324332 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
908 11:28:28.327824 PCI: 00:0d.0 scanning...
909 11:28:28.330907 scan_static_bus for PCI: 00:0d.0
910 11:28:28.334606 USB0 port 0 enabled
911 11:28:28.334906 USB0 port 0 scanning...
912 11:28:28.337488 scan_static_bus for USB0 port 0
913 11:28:28.340490 USB3 port 0 enabled
914 11:28:28.343929 USB3 port 1 enabled
915 11:28:28.344318 USB3 port 2 disabled
916 11:28:28.347264 USB3 port 3 disabled
917 11:28:28.351084 USB3 port 0 scanning...
918 11:28:28.354097 scan_static_bus for USB3 port 0
919 11:28:28.357530 scan_static_bus for USB3 port 0 done
920 11:28:28.360505 scan_bus: bus USB3 port 0 finished in 6 msecs
921 11:28:28.363757 USB3 port 1 scanning...
922 11:28:28.367033 scan_static_bus for USB3 port 1
923 11:28:28.370467 scan_static_bus for USB3 port 1 done
924 11:28:28.377327 scan_bus: bus USB3 port 1 finished in 6 msecs
925 11:28:28.380365 scan_static_bus for USB0 port 0 done
926 11:28:28.383936 scan_bus: bus USB0 port 0 finished in 43 msecs
927 11:28:28.386741 scan_static_bus for PCI: 00:0d.0 done
928 11:28:28.393904 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
929 11:28:28.396417 PCI: 00:14.0 scanning...
930 11:28:28.400205 scan_static_bus for PCI: 00:14.0
931 11:28:28.400512 USB0 port 0 enabled
932 11:28:28.403394 USB0 port 0 scanning...
933 11:28:28.406878 scan_static_bus for USB0 port 0
934 11:28:28.410135 USB2 port 0 disabled
935 11:28:28.410529 USB2 port 1 enabled
936 11:28:28.413296 USB2 port 2 enabled
937 11:28:28.416829 USB2 port 3 disabled
938 11:28:28.417222 USB2 port 4 enabled
939 11:28:28.419854 USB2 port 5 disabled
940 11:28:28.423516 USB2 port 6 disabled
941 11:28:28.423910 USB2 port 7 disabled
942 11:28:28.426649 USB2 port 8 disabled
943 11:28:28.429974 USB2 port 9 disabled
944 11:28:28.430367 USB3 port 0 disabled
945 11:28:28.432963 USB3 port 1 enabled
946 11:28:28.433358 USB3 port 2 disabled
947 11:28:28.436044 USB3 port 3 disabled
948 11:28:28.439669 USB2 port 1 scanning...
949 11:28:28.443035 scan_static_bus for USB2 port 1
950 11:28:28.446258 scan_static_bus for USB2 port 1 done
951 11:28:28.449795 scan_bus: bus USB2 port 1 finished in 6 msecs
952 11:28:28.452755 USB2 port 2 scanning...
953 11:28:28.456425 scan_static_bus for USB2 port 2
954 11:28:28.459167 scan_static_bus for USB2 port 2 done
955 11:28:28.465680 scan_bus: bus USB2 port 2 finished in 6 msecs
956 11:28:28.466203 USB2 port 4 scanning...
957 11:28:28.469470 scan_static_bus for USB2 port 4
958 11:28:28.476035 scan_static_bus for USB2 port 4 done
959 11:28:28.478991 scan_bus: bus USB2 port 4 finished in 6 msecs
960 11:28:28.482522 USB3 port 1 scanning...
961 11:28:28.485867 scan_static_bus for USB3 port 1
962 11:28:28.489360 scan_static_bus for USB3 port 1 done
963 11:28:28.492518 scan_bus: bus USB3 port 1 finished in 6 msecs
964 11:28:28.495764 scan_static_bus for USB0 port 0 done
965 11:28:28.502169 scan_bus: bus USB0 port 0 finished in 93 msecs
966 11:28:28.505502 scan_static_bus for PCI: 00:14.0 done
967 11:28:28.509001 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
968 11:28:28.512150 PCI: 00:14.3 scanning...
969 11:28:28.516309 scan_static_bus for PCI: 00:14.3
970 11:28:28.519028 GENERIC: 0.0 enabled
971 11:28:28.522152 scan_static_bus for PCI: 00:14.3 done
972 11:28:28.528678 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
973 11:28:28.529070 PCI: 00:15.0 scanning...
974 11:28:28.532037 scan_static_bus for PCI: 00:15.0
975 11:28:28.535148 I2C: 00:1a enabled
976 11:28:28.538381 I2C: 00:31 enabled
977 11:28:28.538877 I2C: 00:32 enabled
978 11:28:28.541961 scan_static_bus for PCI: 00:15.0 done
979 11:28:28.548963 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
980 11:28:28.551598 PCI: 00:15.1 scanning...
981 11:28:28.555214 scan_static_bus for PCI: 00:15.1
982 11:28:28.555725 I2C: 00:10 enabled
983 11:28:28.558928 scan_static_bus for PCI: 00:15.1 done
984 11:28:28.565254 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
985 11:28:28.567903 PCI: 00:15.2 scanning...
986 11:28:28.571250 scan_static_bus for PCI: 00:15.2
987 11:28:28.574812 scan_static_bus for PCI: 00:15.2 done
988 11:28:28.578204 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
989 11:28:28.581247 PCI: 00:15.3 scanning...
990 11:28:28.585178 scan_static_bus for PCI: 00:15.3
991 11:28:28.588651 scan_static_bus for PCI: 00:15.3 done
992 11:28:28.591746 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
993 11:28:28.595131 PCI: 00:19.1 scanning...
994 11:28:28.598169 scan_static_bus for PCI: 00:19.1
995 11:28:28.601669 I2C: 00:15 enabled
996 11:28:28.604818 scan_static_bus for PCI: 00:19.1 done
997 11:28:28.611165 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
998 11:28:28.611602 PCI: 00:1d.0 scanning...
999 11:28:28.614599 do_pci_scan_bridge for PCI: 00:1d.0
1000 11:28:28.618110 PCI: pci_scan_bus for bus 01
1001 11:28:28.621306 PCI: 01:00.0 [15b7/5009] enabled
1002 11:28:28.624979 GENERIC: 0.0 enabled
1003 11:28:28.627699 Enabling Common Clock Configuration
1004 11:28:28.634766 L1 Sub-State supported from root port 29
1005 11:28:28.635280 L1 Sub-State Support = 0x5
1006 11:28:28.637965 CommonModeRestoreTime = 0x28
1007 11:28:28.644628 Power On Value = 0x16, Power On Scale = 0x0
1008 11:28:28.645062 ASPM: Enabled L1
1009 11:28:28.647941 PCIe: Max_Payload_Size adjusted to 128
1010 11:28:28.654632 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1011 11:28:28.655063 PCI: 00:1e.2 scanning...
1012 11:28:28.661333 scan_generic_bus for PCI: 00:1e.2
1013 11:28:28.661767 SPI: 00 enabled
1014 11:28:28.667890 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1015 11:28:28.671022 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1016 11:28:28.674481 PCI: 00:1e.3 scanning...
1017 11:28:28.677675 scan_generic_bus for PCI: 00:1e.3
1018 11:28:28.681366 SPI: 00 enabled
1019 11:28:28.687710 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1020 11:28:28.690885 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1021 11:28:28.694785 PCI: 00:1f.0 scanning...
1022 11:28:28.697331 scan_static_bus for PCI: 00:1f.0
1023 11:28:28.697800 PNP: 0c09.0 enabled
1024 11:28:28.700639 PNP: 0c09.0 scanning...
1025 11:28:28.704018 scan_static_bus for PNP: 0c09.0
1026 11:28:28.707453 scan_static_bus for PNP: 0c09.0 done
1027 11:28:28.713952 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1028 11:28:28.717293 scan_static_bus for PCI: 00:1f.0 done
1029 11:28:28.720424 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1030 11:28:28.723596 PCI: 00:1f.2 scanning...
1031 11:28:28.727539 scan_static_bus for PCI: 00:1f.2
1032 11:28:28.730212 GENERIC: 0.0 enabled
1033 11:28:28.733953 GENERIC: 0.0 scanning...
1034 11:28:28.736965 scan_static_bus for GENERIC: 0.0
1035 11:28:28.737387 GENERIC: 0.0 enabled
1036 11:28:28.740414 GENERIC: 1.0 enabled
1037 11:28:28.743385 scan_static_bus for GENERIC: 0.0 done
1038 11:28:28.750013 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1039 11:28:28.753697 scan_static_bus for PCI: 00:1f.2 done
1040 11:28:28.756654 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1041 11:28:28.759765 PCI: 00:1f.3 scanning...
1042 11:28:28.763408 scan_static_bus for PCI: 00:1f.3
1043 11:28:28.766487 scan_static_bus for PCI: 00:1f.3 done
1044 11:28:28.773261 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1045 11:28:28.773805 PCI: 00:1f.5 scanning...
1046 11:28:28.779836 scan_generic_bus for PCI: 00:1f.5
1047 11:28:28.783146 scan_generic_bus for PCI: 00:1f.5 done
1048 11:28:28.786232 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1049 11:28:28.793003 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1050 11:28:28.796643 scan_static_bus for Root Device done
1051 11:28:28.799957 scan_bus: bus Root Device finished in 735 msecs
1052 11:28:28.800444 done
1053 11:28:28.806735 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1054 11:28:28.809606 Chrome EC: UHEPI supported
1055 11:28:28.816119 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1056 11:28:28.822685 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1057 11:28:28.826169 SPI flash protection: WPSW=0 SRP0=0
1058 11:28:28.829353 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1059 11:28:28.836268 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1060 11:28:28.839250 found VGA at PCI: 00:02.0
1061 11:28:28.842803 Setting up VGA for PCI: 00:02.0
1062 11:28:28.849189 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1063 11:28:28.852364 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1064 11:28:28.856029 Allocating resources...
1065 11:28:28.858830 Reading resources...
1066 11:28:28.862356 Root Device read_resources bus 0 link: 0
1067 11:28:28.865881 DOMAIN: 0000 read_resources bus 0 link: 0
1068 11:28:28.872121 PCI: 00:04.0 read_resources bus 1 link: 0
1069 11:28:28.875290 PCI: 00:04.0 read_resources bus 1 link: 0 done
1070 11:28:28.882184 PCI: 00:0d.0 read_resources bus 0 link: 0
1071 11:28:28.885191 USB0 port 0 read_resources bus 0 link: 0
1072 11:28:28.891973 USB0 port 0 read_resources bus 0 link: 0 done
1073 11:28:28.895426 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1074 11:28:28.898576 PCI: 00:14.0 read_resources bus 0 link: 0
1075 11:28:28.905671 USB0 port 0 read_resources bus 0 link: 0
1076 11:28:28.908623 USB0 port 0 read_resources bus 0 link: 0 done
1077 11:28:28.915639 PCI: 00:14.0 read_resources bus 0 link: 0 done
1078 11:28:28.918670 PCI: 00:14.3 read_resources bus 0 link: 0
1079 11:28:28.925891 PCI: 00:14.3 read_resources bus 0 link: 0 done
1080 11:28:28.929015 PCI: 00:15.0 read_resources bus 0 link: 0
1081 11:28:28.936125 PCI: 00:15.0 read_resources bus 0 link: 0 done
1082 11:28:28.938924 PCI: 00:15.1 read_resources bus 0 link: 0
1083 11:28:28.945631 PCI: 00:15.1 read_resources bus 0 link: 0 done
1084 11:28:28.948380 PCI: 00:19.1 read_resources bus 0 link: 0
1085 11:28:28.955462 PCI: 00:19.1 read_resources bus 0 link: 0 done
1086 11:28:28.958946 PCI: 00:1d.0 read_resources bus 1 link: 0
1087 11:28:28.965419 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1088 11:28:28.968959 PCI: 00:1e.2 read_resources bus 2 link: 0
1089 11:28:28.975368 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1090 11:28:28.978936 PCI: 00:1e.3 read_resources bus 3 link: 0
1091 11:28:28.985651 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1092 11:28:28.988904 PCI: 00:1f.0 read_resources bus 0 link: 0
1093 11:28:28.995472 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1094 11:28:28.998648 PCI: 00:1f.2 read_resources bus 0 link: 0
1095 11:28:29.001854 GENERIC: 0.0 read_resources bus 0 link: 0
1096 11:28:29.009121 GENERIC: 0.0 read_resources bus 0 link: 0 done
1097 11:28:29.011993 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1098 11:28:29.019710 DOMAIN: 0000 read_resources bus 0 link: 0 done
1099 11:28:29.023282 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1100 11:28:29.029678 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1101 11:28:29.032577 Root Device read_resources bus 0 link: 0 done
1102 11:28:29.036398 Done reading resources.
1103 11:28:29.042982 Show resources in subtree (Root Device)...After reading.
1104 11:28:29.046399 Root Device child on link 0 DOMAIN: 0000
1105 11:28:29.049168 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 11:28:29.059071 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 11:28:29.069063 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1108 11:28:29.072656 PCI: 00:00.0
1109 11:28:29.082108 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 11:28:29.089344 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 11:28:29.098674 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 11:28:29.108718 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 11:28:29.119006 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 11:28:29.128788 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 11:28:29.138394 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 11:28:29.148561 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 11:28:29.154857 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 11:28:29.164899 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1119 11:28:29.174876 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1120 11:28:29.184540 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1121 11:28:29.194853 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1122 11:28:29.201326 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1123 11:28:29.211036 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1124 11:28:29.220927 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1125 11:28:29.231352 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1126 11:28:29.240807 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1127 11:28:29.250910 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1128 11:28:29.260982 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1129 11:28:29.261408 PCI: 00:02.0
1130 11:28:29.270274 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1131 11:28:29.280733 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1132 11:28:29.290283 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1133 11:28:29.293929 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1134 11:28:29.303608 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1135 11:28:29.306825 GENERIC: 0.0
1136 11:28:29.307290 PCI: 00:05.0
1137 11:28:29.319927 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 11:28:29.323580 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1139 11:28:29.324201 GENERIC: 0.0
1140 11:28:29.326951 PCI: 00:08.0
1141 11:28:29.336702 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1142 11:28:29.337240 PCI: 00:0a.0
1143 11:28:29.343184 PCI: 00:0d.0 child on link 0 USB0 port 0
1144 11:28:29.353465 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1145 11:28:29.356756 USB0 port 0 child on link 0 USB3 port 0
1146 11:28:29.359823 USB3 port 0
1147 11:28:29.360333 USB3 port 1
1148 11:28:29.363298 USB3 port 2
1149 11:28:29.363725 USB3 port 3
1150 11:28:29.369719 PCI: 00:14.0 child on link 0 USB0 port 0
1151 11:28:29.379402 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 11:28:29.382559 USB0 port 0 child on link 0 USB2 port 0
1153 11:28:29.385952 USB2 port 0
1154 11:28:29.386473 USB2 port 1
1155 11:28:29.389415 USB2 port 2
1156 11:28:29.389840 USB2 port 3
1157 11:28:29.392975 USB2 port 4
1158 11:28:29.393419 USB2 port 5
1159 11:28:29.395772 USB2 port 6
1160 11:28:29.396233 USB2 port 7
1161 11:28:29.399111 USB2 port 8
1162 11:28:29.399529 USB2 port 9
1163 11:28:29.402449 USB3 port 0
1164 11:28:29.405916 USB3 port 1
1165 11:28:29.406336 USB3 port 2
1166 11:28:29.409290 USB3 port 3
1167 11:28:29.409710 PCI: 00:14.2
1168 11:28:29.419715 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1169 11:28:29.428927 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 11:28:29.435647 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1171 11:28:29.445461 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1172 11:28:29.445975 GENERIC: 0.0
1173 11:28:29.448355 PCI: 00:15.0 child on link 0 I2C: 00:1a
1174 11:28:29.458790 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 11:28:29.461914 I2C: 00:1a
1176 11:28:29.462379 I2C: 00:31
1177 11:28:29.465081 I2C: 00:32
1178 11:28:29.468123 PCI: 00:15.1 child on link 0 I2C: 00:10
1179 11:28:29.477870 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 11:28:29.481501 I2C: 00:10
1181 11:28:29.481925 PCI: 00:15.2
1182 11:28:29.491289 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 11:28:29.494894 PCI: 00:15.3
1184 11:28:29.504610 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 11:28:29.505234 PCI: 00:16.0
1186 11:28:29.514264 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 11:28:29.518105 PCI: 00:19.0
1188 11:28:29.521039 PCI: 00:19.1 child on link 0 I2C: 00:15
1189 11:28:29.531284 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 11:28:29.534089 I2C: 00:15
1191 11:28:29.538047 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1192 11:28:29.548003 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1193 11:28:29.554360 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1194 11:28:29.563850 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1195 11:28:29.567595 GENERIC: 0.0
1196 11:28:29.568223 PCI: 01:00.0
1197 11:28:29.577342 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 11:28:29.586821 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1199 11:28:29.590110 PCI: 00:1e.0
1200 11:28:29.600093 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1201 11:28:29.603376 PCI: 00:1e.2 child on link 0 SPI: 00
1202 11:28:29.613389 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 11:28:29.616584 SPI: 00
1204 11:28:29.619693 PCI: 00:1e.3 child on link 0 SPI: 00
1205 11:28:29.629808 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 11:28:29.630294 SPI: 00
1207 11:28:29.636322 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1208 11:28:29.642821 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1209 11:28:29.646242 PNP: 0c09.0
1210 11:28:29.655860 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1211 11:28:29.659376 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1212 11:28:29.669458 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1213 11:28:29.679055 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1214 11:28:29.682347 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1215 11:28:29.685505 GENERIC: 0.0
1216 11:28:29.686144 GENERIC: 1.0
1217 11:28:29.689102 PCI: 00:1f.3
1218 11:28:29.698752 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 11:28:29.708607 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 11:28:29.709040 PCI: 00:1f.5
1221 11:28:29.718370 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1222 11:28:29.722982 CPU_CLUSTER: 0 child on link 0 APIC: 00
1223 11:28:29.725144 APIC: 00
1224 11:28:29.725895 APIC: 01
1225 11:28:29.728170 APIC: 07
1226 11:28:29.728599 APIC: 03
1227 11:28:29.728936 APIC: 04
1228 11:28:29.731851 APIC: 06
1229 11:28:29.732322 APIC: 02
1230 11:28:29.732652 APIC: 05
1231 11:28:29.741493 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1232 11:28:29.748186 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1233 11:28:29.751354 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1234 11:28:29.758048 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1235 11:28:29.761493 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1236 11:28:29.767958 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1237 11:28:29.774629 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1238 11:28:29.781080 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1239 11:28:29.787956 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1240 11:28:29.798041 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1241 11:28:29.804170 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1242 11:28:29.810787 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1243 11:28:29.817522 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1244 11:28:29.824216 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1245 11:28:29.827307 DOMAIN: 0000: Resource ranges:
1246 11:28:29.831080 * Base: 1000, Size: 800, Tag: 100
1247 11:28:29.837960 * Base: 1900, Size: e700, Tag: 100
1248 11:28:29.840548 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1249 11:28:29.847317 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1250 11:28:29.854078 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1251 11:28:29.863523 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1252 11:28:29.870562 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1253 11:28:29.877070 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1254 11:28:29.886617 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1255 11:28:29.893395 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1256 11:28:29.900379 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1257 11:28:29.909920 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1258 11:28:29.916541 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1259 11:28:29.923398 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1260 11:28:29.932651 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1261 11:28:29.939725 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1262 11:28:29.945985 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1263 11:28:29.955819 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1264 11:28:29.962773 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1265 11:28:29.969488 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1266 11:28:29.979020 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1267 11:28:29.985919 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1268 11:28:29.991982 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1269 11:28:30.002555 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1270 11:28:30.008907 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1271 11:28:30.015608 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1272 11:28:30.025276 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1273 11:28:30.028574 DOMAIN: 0000: Resource ranges:
1274 11:28:30.031861 * Base: 7fc00000, Size: 40400000, Tag: 200
1275 11:28:30.035235 * Base: d0000000, Size: 28000000, Tag: 200
1276 11:28:30.041780 * Base: fa000000, Size: 1000000, Tag: 200
1277 11:28:30.045032 * Base: fb001000, Size: 2fff000, Tag: 200
1278 11:28:30.047953 * Base: fe010000, Size: 2e000, Tag: 200
1279 11:28:30.054727 * Base: fe03f000, Size: d41000, Tag: 200
1280 11:28:30.058197 * Base: fed88000, Size: 8000, Tag: 200
1281 11:28:30.061606 * Base: fed93000, Size: d000, Tag: 200
1282 11:28:30.064950 * Base: feda2000, Size: 1e000, Tag: 200
1283 11:28:30.071129 * Base: fede0000, Size: 1220000, Tag: 200
1284 11:28:30.074383 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1285 11:28:30.081244 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1286 11:28:30.087661 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1287 11:28:30.093897 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1288 11:28:30.100797 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1289 11:28:30.107386 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1290 11:28:30.113754 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1291 11:28:30.120133 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1292 11:28:30.127042 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1293 11:28:30.133416 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1294 11:28:30.140210 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1295 11:28:30.146903 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1296 11:28:30.153325 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1297 11:28:30.159964 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1298 11:28:30.166303 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1299 11:28:30.173373 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1300 11:28:30.179615 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1301 11:28:30.186123 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1302 11:28:30.192957 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1303 11:28:30.199632 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1304 11:28:30.206400 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1305 11:28:30.212494 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1306 11:28:30.219466 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1307 11:28:30.229208 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1308 11:28:30.235983 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1309 11:28:30.239002 PCI: 00:1d.0: Resource ranges:
1310 11:28:30.242499 * Base: 7fc00000, Size: 100000, Tag: 200
1311 11:28:30.249344 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1312 11:28:30.255998 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1313 11:28:30.265501 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1314 11:28:30.272260 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1315 11:28:30.275725 Root Device assign_resources, bus 0 link: 0
1316 11:28:30.282291 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 11:28:30.288858 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1318 11:28:30.298897 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1319 11:28:30.305372 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1320 11:28:30.315216 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1321 11:28:30.318449 PCI: 00:04.0 assign_resources, bus 1 link: 0
1322 11:28:30.325069 PCI: 00:04.0 assign_resources, bus 1 link: 0
1323 11:28:30.331766 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1324 11:28:30.341377 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1325 11:28:30.347713 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1326 11:28:30.351214 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1327 11:28:30.357870 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1328 11:28:30.364122 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1329 11:28:30.371015 PCI: 00:14.0 assign_resources, bus 0 link: 0
1330 11:28:30.374434 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 11:28:30.384379 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1332 11:28:30.390808 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1333 11:28:30.401402 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1334 11:28:30.404302 PCI: 00:14.3 assign_resources, bus 0 link: 0
1335 11:28:30.407194 PCI: 00:14.3 assign_resources, bus 0 link: 0
1336 11:28:30.417124 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1337 11:28:30.420519 PCI: 00:15.0 assign_resources, bus 0 link: 0
1338 11:28:30.427405 PCI: 00:15.0 assign_resources, bus 0 link: 0
1339 11:28:30.433374 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1340 11:28:30.437011 PCI: 00:15.1 assign_resources, bus 0 link: 0
1341 11:28:30.443713 PCI: 00:15.1 assign_resources, bus 0 link: 0
1342 11:28:30.450102 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1343 11:28:30.460314 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1344 11:28:30.467292 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1345 11:28:30.476916 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1346 11:28:30.480534 PCI: 00:19.1 assign_resources, bus 0 link: 0
1347 11:28:30.486670 PCI: 00:19.1 assign_resources, bus 0 link: 0
1348 11:28:30.493078 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1349 11:28:30.503209 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1350 11:28:30.512871 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1351 11:28:30.516394 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1352 11:28:30.526083 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1353 11:28:30.532828 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1354 11:28:30.538952 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 11:28:30.545612 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1356 11:28:30.552147 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1357 11:28:30.555575 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1358 11:28:30.562335 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1359 11:28:30.568787 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1360 11:28:30.571832 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1361 11:28:30.578386 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1362 11:28:30.581542 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1363 11:28:30.588605 LPC: Trying to open IO window from 800 size 1ff
1364 11:28:30.594771 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1365 11:28:30.605163 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1366 11:28:30.611366 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1367 11:28:30.618265 DOMAIN: 0000 assign_resources, bus 0 link: 0
1368 11:28:30.621098 Root Device assign_resources, bus 0 link: 0
1369 11:28:30.624403 Done setting resources.
1370 11:28:30.631017 Show resources in subtree (Root Device)...After assigning values.
1371 11:28:30.634818 Root Device child on link 0 DOMAIN: 0000
1372 11:28:30.637921 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1373 11:28:30.647718 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1374 11:28:30.657718 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1375 11:28:30.660750 PCI: 00:00.0
1376 11:28:30.670692 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1377 11:28:30.677420 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1378 11:28:30.687148 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1379 11:28:30.697202 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1380 11:28:30.707171 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1381 11:28:30.717460 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1382 11:28:30.726703 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1383 11:28:30.733292 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1384 11:28:30.743781 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1385 11:28:30.753325 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1386 11:28:30.763608 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1387 11:28:30.773296 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1388 11:28:30.783363 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1389 11:28:30.789942 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1390 11:28:30.799358 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1391 11:28:30.809446 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1392 11:28:30.819392 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1393 11:28:30.829046 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1394 11:28:30.839178 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1395 11:28:30.849253 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1396 11:28:30.849808 PCI: 00:02.0
1397 11:28:30.858917 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1398 11:28:30.872317 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1399 11:28:30.879113 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1400 11:28:30.885304 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1401 11:28:30.895147 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1402 11:28:30.898415 GENERIC: 0.0
1403 11:28:30.898885 PCI: 00:05.0
1404 11:28:30.908487 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1405 11:28:30.914652 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1406 11:28:30.915075 GENERIC: 0.0
1407 11:28:30.917775 PCI: 00:08.0
1408 11:28:30.927919 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1409 11:28:30.928390 PCI: 00:0a.0
1410 11:28:30.934600 PCI: 00:0d.0 child on link 0 USB0 port 0
1411 11:28:30.944741 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1412 11:28:30.947883 USB0 port 0 child on link 0 USB3 port 0
1413 11:28:30.951240 USB3 port 0
1414 11:28:30.951660 USB3 port 1
1415 11:28:30.954183 USB3 port 2
1416 11:28:30.954611 USB3 port 3
1417 11:28:30.961168 PCI: 00:14.0 child on link 0 USB0 port 0
1418 11:28:30.970703 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1419 11:28:30.974414 USB0 port 0 child on link 0 USB2 port 0
1420 11:28:30.977797 USB2 port 0
1421 11:28:30.978379 USB2 port 1
1422 11:28:30.980784 USB2 port 2
1423 11:28:30.981398 USB2 port 3
1424 11:28:30.983769 USB2 port 4
1425 11:28:30.984339 USB2 port 5
1426 11:28:30.987021 USB2 port 6
1427 11:28:30.987403 USB2 port 7
1428 11:28:30.990557 USB2 port 8
1429 11:28:30.993888 USB2 port 9
1430 11:28:30.994494 USB3 port 0
1431 11:28:30.996936 USB3 port 1
1432 11:28:30.997355 USB3 port 2
1433 11:28:31.000411 USB3 port 3
1434 11:28:31.000837 PCI: 00:14.2
1435 11:28:31.010251 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1436 11:28:31.020400 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1437 11:28:31.026541 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1438 11:28:31.036948 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1439 11:28:31.037448 GENERIC: 0.0
1440 11:28:31.043357 PCI: 00:15.0 child on link 0 I2C: 00:1a
1441 11:28:31.053807 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1442 11:28:31.054389 I2C: 00:1a
1443 11:28:31.056551 I2C: 00:31
1444 11:28:31.056977 I2C: 00:32
1445 11:28:31.063341 PCI: 00:15.1 child on link 0 I2C: 00:10
1446 11:28:31.072880 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1447 11:28:31.073380 I2C: 00:10
1448 11:28:31.076551 PCI: 00:15.2
1449 11:28:31.086106 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1450 11:28:31.086537 PCI: 00:15.3
1451 11:28:31.099418 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1452 11:28:31.099859 PCI: 00:16.0
1453 11:28:31.108787 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1454 11:28:31.112891 PCI: 00:19.0
1455 11:28:31.115542 PCI: 00:19.1 child on link 0 I2C: 00:15
1456 11:28:31.125647 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1457 11:28:31.128632 I2C: 00:15
1458 11:28:31.131847 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1459 11:28:31.142286 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1460 11:28:31.152525 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1461 11:28:31.165082 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1462 11:28:31.165483 GENERIC: 0.0
1463 11:28:31.168904 PCI: 01:00.0
1464 11:28:31.178853 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1465 11:28:31.188133 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1466 11:28:31.188535 PCI: 00:1e.0
1467 11:28:31.201111 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1468 11:28:31.204804 PCI: 00:1e.2 child on link 0 SPI: 00
1469 11:28:31.214529 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1470 11:28:31.215177 SPI: 00
1471 11:28:31.220946 PCI: 00:1e.3 child on link 0 SPI: 00
1472 11:28:31.230866 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1473 11:28:31.231355 SPI: 00
1474 11:28:31.237545 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1475 11:28:31.244134 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1476 11:28:31.247885 PNP: 0c09.0
1477 11:28:31.254427 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1478 11:28:31.260867 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1479 11:28:31.270307 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1480 11:28:31.277310 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1481 11:28:31.283626 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1482 11:28:31.284127 GENERIC: 0.0
1483 11:28:31.287067 GENERIC: 1.0
1484 11:28:31.287491 PCI: 00:1f.3
1485 11:28:31.300688 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1486 11:28:31.310229 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1487 11:28:31.310658 PCI: 00:1f.5
1488 11:28:31.320001 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1489 11:28:31.326262 CPU_CLUSTER: 0 child on link 0 APIC: 00
1490 11:28:31.326894 APIC: 00
1491 11:28:31.327412 APIC: 01
1492 11:28:31.329705 APIC: 07
1493 11:28:31.330284 APIC: 03
1494 11:28:31.333041 APIC: 04
1495 11:28:31.333612 APIC: 06
1496 11:28:31.334113 APIC: 02
1497 11:28:31.336270 APIC: 05
1498 11:28:31.339384 Done allocating resources.
1499 11:28:31.343170 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1500 11:28:31.349477 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1501 11:28:31.352633 Configure GPIOs for I2S audio on UP4.
1502 11:28:31.360448 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1503 11:28:31.363335 Enabling resources...
1504 11:28:31.366824 PCI: 00:00.0 subsystem <- 8086/9a12
1505 11:28:31.370047 PCI: 00:00.0 cmd <- 06
1506 11:28:31.373244 PCI: 00:02.0 subsystem <- 8086/9a40
1507 11:28:31.376459 PCI: 00:02.0 cmd <- 03
1508 11:28:31.379646 PCI: 00:04.0 subsystem <- 8086/9a03
1509 11:28:31.383430 PCI: 00:04.0 cmd <- 02
1510 11:28:31.386496 PCI: 00:05.0 subsystem <- 8086/9a19
1511 11:28:31.386623 PCI: 00:05.0 cmd <- 02
1512 11:28:31.392998 PCI: 00:08.0 subsystem <- 8086/9a11
1513 11:28:31.393120 PCI: 00:08.0 cmd <- 06
1514 11:28:31.396577 PCI: 00:0d.0 subsystem <- 8086/9a13
1515 11:28:31.399598 PCI: 00:0d.0 cmd <- 02
1516 11:28:31.403052 PCI: 00:14.0 subsystem <- 8086/a0ed
1517 11:28:31.406750 PCI: 00:14.0 cmd <- 02
1518 11:28:31.410079 PCI: 00:14.2 subsystem <- 8086/a0ef
1519 11:28:31.413083 PCI: 00:14.2 cmd <- 02
1520 11:28:31.416381 PCI: 00:14.3 subsystem <- 8086/a0f0
1521 11:28:31.419566 PCI: 00:14.3 cmd <- 02
1522 11:28:31.422743 PCI: 00:15.0 subsystem <- 8086/a0e8
1523 11:28:31.426390 PCI: 00:15.0 cmd <- 02
1524 11:28:31.429564 PCI: 00:15.1 subsystem <- 8086/a0e9
1525 11:28:31.433046 PCI: 00:15.1 cmd <- 02
1526 11:28:31.436045 PCI: 00:15.2 subsystem <- 8086/a0ea
1527 11:28:31.436148 PCI: 00:15.2 cmd <- 02
1528 11:28:31.442824 PCI: 00:15.3 subsystem <- 8086/a0eb
1529 11:28:31.442914 PCI: 00:15.3 cmd <- 02
1530 11:28:31.446277 PCI: 00:16.0 subsystem <- 8086/a0e0
1531 11:28:31.449314 PCI: 00:16.0 cmd <- 02
1532 11:28:31.452888 PCI: 00:19.1 subsystem <- 8086/a0c6
1533 11:28:31.455985 PCI: 00:19.1 cmd <- 02
1534 11:28:31.459448 PCI: 00:1d.0 bridge ctrl <- 0013
1535 11:28:31.462607 PCI: 00:1d.0 subsystem <- 8086/a0b0
1536 11:28:31.466013 PCI: 00:1d.0 cmd <- 06
1537 11:28:31.469137 PCI: 00:1e.0 subsystem <- 8086/a0a8
1538 11:28:31.472337 PCI: 00:1e.0 cmd <- 06
1539 11:28:31.476008 PCI: 00:1e.2 subsystem <- 8086/a0aa
1540 11:28:31.479179 PCI: 00:1e.2 cmd <- 06
1541 11:28:31.482430 PCI: 00:1e.3 subsystem <- 8086/a0ab
1542 11:28:31.485760 PCI: 00:1e.3 cmd <- 02
1543 11:28:31.488742 PCI: 00:1f.0 subsystem <- 8086/a087
1544 11:28:31.492354 PCI: 00:1f.0 cmd <- 407
1545 11:28:31.495317 PCI: 00:1f.3 subsystem <- 8086/a0c8
1546 11:28:31.495410 PCI: 00:1f.3 cmd <- 02
1547 11:28:31.502129 PCI: 00:1f.5 subsystem <- 8086/a0a4
1548 11:28:31.502220 PCI: 00:1f.5 cmd <- 406
1549 11:28:31.507983 PCI: 01:00.0 cmd <- 02
1550 11:28:31.512045 done.
1551 11:28:31.514941 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1552 11:28:31.518836 Initializing devices...
1553 11:28:31.521489 Root Device init
1554 11:28:31.525859 Chrome EC: Set SMI mask to 0x0000000000000000
1555 11:28:31.531496 Chrome EC: clear events_b mask to 0x0000000000000000
1556 11:28:31.538636 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1557 11:28:31.541499 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1558 11:28:31.548481 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1559 11:28:31.555150 Chrome EC: Set WAKE mask to 0x0000000000000000
1560 11:28:31.558382 fw_config match found: DB_USB=USB3_ACTIVE
1561 11:28:31.564805 Configure Right Type-C port orientation for retimer
1562 11:28:31.567908 Root Device init finished in 42 msecs
1563 11:28:31.571423 PCI: 00:00.0 init
1564 11:28:31.575002 CPU TDP = 9 Watts
1565 11:28:31.575089 CPU PL1 = 9 Watts
1566 11:28:31.577972 CPU PL2 = 40 Watts
1567 11:28:31.578058 CPU PL4 = 83 Watts
1568 11:28:31.581212 PCI: 00:00.0 init finished in 8 msecs
1569 11:28:31.584644 PCI: 00:02.0 init
1570 11:28:31.588080 GMA: Found VBT in CBFS
1571 11:28:31.591453 GMA: Found valid VBT in CBFS
1572 11:28:31.594545 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1573 11:28:31.604434 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1574 11:28:31.607984 PCI: 00:02.0 init finished in 18 msecs
1575 11:28:31.611139 PCI: 00:05.0 init
1576 11:28:31.614315 PCI: 00:05.0 init finished in 0 msecs
1577 11:28:31.617638 PCI: 00:08.0 init
1578 11:28:31.621282 PCI: 00:08.0 init finished in 0 msecs
1579 11:28:31.624074 PCI: 00:14.0 init
1580 11:28:31.627586 PCI: 00:14.0 init finished in 0 msecs
1581 11:28:31.627674 PCI: 00:14.2 init
1582 11:28:31.633742 PCI: 00:14.2 init finished in 0 msecs
1583 11:28:31.633837 PCI: 00:15.0 init
1584 11:28:31.637108 I2C bus 0 version 0x3230302a
1585 11:28:31.640420 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1586 11:28:31.643991 PCI: 00:15.0 init finished in 6 msecs
1587 11:28:31.647769 PCI: 00:15.1 init
1588 11:28:31.650595 I2C bus 1 version 0x3230302a
1589 11:28:31.654293 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1590 11:28:31.657519 PCI: 00:15.1 init finished in 6 msecs
1591 11:28:31.660606 PCI: 00:15.2 init
1592 11:28:31.664031 I2C bus 2 version 0x3230302a
1593 11:28:31.667002 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1594 11:28:31.670438 PCI: 00:15.2 init finished in 6 msecs
1595 11:28:31.673764 PCI: 00:15.3 init
1596 11:28:31.677476 I2C bus 3 version 0x3230302a
1597 11:28:31.680717 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1598 11:28:31.683731 PCI: 00:15.3 init finished in 6 msecs
1599 11:28:31.686919 PCI: 00:16.0 init
1600 11:28:31.690283 PCI: 00:16.0 init finished in 0 msecs
1601 11:28:31.690369 PCI: 00:19.1 init
1602 11:28:31.693374 I2C bus 5 version 0x3230302a
1603 11:28:31.697011 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1604 11:28:31.703169 PCI: 00:19.1 init finished in 6 msecs
1605 11:28:31.703262 PCI: 00:1d.0 init
1606 11:28:31.706763 Initializing PCH PCIe bridge.
1607 11:28:31.709928 PCI: 00:1d.0 init finished in 3 msecs
1608 11:28:31.713883 PCI: 00:1f.0 init
1609 11:28:31.717513 IOAPIC: Initializing IOAPIC at 0xfec00000
1610 11:28:31.723568 IOAPIC: Bootstrap Processor Local APIC = 0x00
1611 11:28:31.723654 IOAPIC: ID = 0x02
1612 11:28:31.726935 IOAPIC: Dumping registers
1613 11:28:31.730586 reg 0x0000: 0x02000000
1614 11:28:31.733488 reg 0x0001: 0x00770020
1615 11:28:31.733573 reg 0x0002: 0x00000000
1616 11:28:31.740253 PCI: 00:1f.0 init finished in 21 msecs
1617 11:28:31.740363 PCI: 00:1f.2 init
1618 11:28:31.743909 Disabling ACPI via APMC.
1619 11:28:31.748266 APMC done.
1620 11:28:31.751796 PCI: 00:1f.2 init finished in 6 msecs
1621 11:28:31.763102 PCI: 01:00.0 init
1622 11:28:31.766366 PCI: 01:00.0 init finished in 0 msecs
1623 11:28:31.769950 PNP: 0c09.0 init
1624 11:28:31.776579 Google Chrome EC uptime: 8.341 seconds
1625 11:28:31.780490 Google Chrome AP resets since EC boot: 1
1626 11:28:31.783671 Google Chrome most recent AP reset causes:
1627 11:28:31.786715 0.452: 32775 shutdown: entering G3
1628 11:28:31.793233 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1629 11:28:31.796395 PNP: 0c09.0 init finished in 24 msecs
1630 11:28:31.803580 Devices initialized
1631 11:28:31.806559 Show all devs... After init.
1632 11:28:31.810128 Root Device: enabled 1
1633 11:28:31.810210 DOMAIN: 0000: enabled 1
1634 11:28:31.813640 CPU_CLUSTER: 0: enabled 1
1635 11:28:31.816532 PCI: 00:00.0: enabled 1
1636 11:28:31.819631 PCI: 00:02.0: enabled 1
1637 11:28:31.819711 PCI: 00:04.0: enabled 1
1638 11:28:31.823006 PCI: 00:05.0: enabled 1
1639 11:28:31.826331 PCI: 00:06.0: enabled 0
1640 11:28:31.829550 PCI: 00:07.0: enabled 0
1641 11:28:31.829658 PCI: 00:07.1: enabled 0
1642 11:28:31.833050 PCI: 00:07.2: enabled 0
1643 11:28:31.836285 PCI: 00:07.3: enabled 0
1644 11:28:31.839995 PCI: 00:08.0: enabled 1
1645 11:28:31.840120 PCI: 00:09.0: enabled 0
1646 11:28:31.843218 PCI: 00:0a.0: enabled 0
1647 11:28:31.846713 PCI: 00:0d.0: enabled 1
1648 11:28:31.849282 PCI: 00:0d.1: enabled 0
1649 11:28:31.849366 PCI: 00:0d.2: enabled 0
1650 11:28:31.854707 PCI: 00:0d.3: enabled 0
1651 11:28:31.856500 PCI: 00:0e.0: enabled 0
1652 11:28:31.859843 PCI: 00:10.2: enabled 1
1653 11:28:31.859959 PCI: 00:10.6: enabled 0
1654 11:28:31.862759 PCI: 00:10.7: enabled 0
1655 11:28:31.866411 PCI: 00:12.0: enabled 0
1656 11:28:31.866493 PCI: 00:12.6: enabled 0
1657 11:28:31.869391 PCI: 00:13.0: enabled 0
1658 11:28:31.872817 PCI: 00:14.0: enabled 1
1659 11:28:31.875955 PCI: 00:14.1: enabled 0
1660 11:28:31.876037 PCI: 00:14.2: enabled 1
1661 11:28:31.879612 PCI: 00:14.3: enabled 1
1662 11:28:31.882629 PCI: 00:15.0: enabled 1
1663 11:28:31.885818 PCI: 00:15.1: enabled 1
1664 11:28:31.885901 PCI: 00:15.2: enabled 1
1665 11:28:31.889636 PCI: 00:15.3: enabled 1
1666 11:28:31.892606 PCI: 00:16.0: enabled 1
1667 11:28:31.895670 PCI: 00:16.1: enabled 0
1668 11:28:31.895753 PCI: 00:16.2: enabled 0
1669 11:28:31.899332 PCI: 00:16.3: enabled 0
1670 11:28:31.902480 PCI: 00:16.4: enabled 0
1671 11:28:31.905588 PCI: 00:16.5: enabled 0
1672 11:28:31.905673 PCI: 00:17.0: enabled 0
1673 11:28:31.909134 PCI: 00:19.0: enabled 0
1674 11:28:31.912277 PCI: 00:19.1: enabled 1
1675 11:28:31.915810 PCI: 00:19.2: enabled 0
1676 11:28:31.915895 PCI: 00:1c.0: enabled 1
1677 11:28:31.919041 PCI: 00:1c.1: enabled 0
1678 11:28:31.922553 PCI: 00:1c.2: enabled 0
1679 11:28:31.925163 PCI: 00:1c.3: enabled 0
1680 11:28:31.925248 PCI: 00:1c.4: enabled 0
1681 11:28:31.928873 PCI: 00:1c.5: enabled 0
1682 11:28:31.931847 PCI: 00:1c.6: enabled 1
1683 11:28:31.935335 PCI: 00:1c.7: enabled 0
1684 11:28:31.935420 PCI: 00:1d.0: enabled 1
1685 11:28:31.938901 PCI: 00:1d.1: enabled 0
1686 11:28:31.942080 PCI: 00:1d.2: enabled 1
1687 11:28:31.942165 PCI: 00:1d.3: enabled 0
1688 11:28:31.944976 PCI: 00:1e.0: enabled 1
1689 11:28:31.948410 PCI: 00:1e.1: enabled 0
1690 11:28:31.951907 PCI: 00:1e.2: enabled 1
1691 11:28:31.951990 PCI: 00:1e.3: enabled 1
1692 11:28:31.955078 PCI: 00:1f.0: enabled 1
1693 11:28:31.958195 PCI: 00:1f.1: enabled 0
1694 11:28:31.961750 PCI: 00:1f.2: enabled 1
1695 11:28:31.961832 PCI: 00:1f.3: enabled 1
1696 11:28:31.965098 PCI: 00:1f.4: enabled 0
1697 11:28:31.968676 PCI: 00:1f.5: enabled 1
1698 11:28:31.971530 PCI: 00:1f.6: enabled 0
1699 11:28:31.971612 PCI: 00:1f.7: enabled 0
1700 11:28:31.974720 APIC: 00: enabled 1
1701 11:28:31.978265 GENERIC: 0.0: enabled 1
1702 11:28:31.978347 GENERIC: 0.0: enabled 1
1703 11:28:31.981752 GENERIC: 1.0: enabled 1
1704 11:28:31.984809 GENERIC: 0.0: enabled 1
1705 11:28:31.988114 GENERIC: 1.0: enabled 1
1706 11:28:31.988197 USB0 port 0: enabled 1
1707 11:28:31.991979 GENERIC: 0.0: enabled 1
1708 11:28:31.994558 USB0 port 0: enabled 1
1709 11:28:31.998417 GENERIC: 0.0: enabled 1
1710 11:28:31.998501 I2C: 00:1a: enabled 1
1711 11:28:32.001477 I2C: 00:31: enabled 1
1712 11:28:32.004458 I2C: 00:32: enabled 1
1713 11:28:32.004541 I2C: 00:10: enabled 1
1714 11:28:32.007702 I2C: 00:15: enabled 1
1715 11:28:32.010827 GENERIC: 0.0: enabled 0
1716 11:28:32.010909 GENERIC: 1.0: enabled 0
1717 11:28:32.014415 GENERIC: 0.0: enabled 1
1718 11:28:32.017714 SPI: 00: enabled 1
1719 11:28:32.017796 SPI: 00: enabled 1
1720 11:28:32.021318 PNP: 0c09.0: enabled 1
1721 11:28:32.024454 GENERIC: 0.0: enabled 1
1722 11:28:32.027886 USB3 port 0: enabled 1
1723 11:28:32.027968 USB3 port 1: enabled 1
1724 11:28:32.031220 USB3 port 2: enabled 0
1725 11:28:32.034334 USB3 port 3: enabled 0
1726 11:28:32.034416 USB2 port 0: enabled 0
1727 11:28:32.037785 USB2 port 1: enabled 1
1728 11:28:32.041300 USB2 port 2: enabled 1
1729 11:28:32.044492 USB2 port 3: enabled 0
1730 11:28:32.044574 USB2 port 4: enabled 1
1731 11:28:32.047390 USB2 port 5: enabled 0
1732 11:28:32.051029 USB2 port 6: enabled 0
1733 11:28:32.051112 USB2 port 7: enabled 0
1734 11:28:32.054130 USB2 port 8: enabled 0
1735 11:28:32.057345 USB2 port 9: enabled 0
1736 11:28:32.061014 USB3 port 0: enabled 0
1737 11:28:32.061096 USB3 port 1: enabled 1
1738 11:28:32.063963 USB3 port 2: enabled 0
1739 11:28:32.067007 USB3 port 3: enabled 0
1740 11:28:32.067090 GENERIC: 0.0: enabled 1
1741 11:28:32.070754 GENERIC: 1.0: enabled 1
1742 11:28:32.074613 APIC: 01: enabled 1
1743 11:28:32.074706 APIC: 07: enabled 1
1744 11:28:32.077216 APIC: 03: enabled 1
1745 11:28:32.080552 APIC: 04: enabled 1
1746 11:28:32.080667 APIC: 06: enabled 1
1747 11:28:32.083521 APIC: 02: enabled 1
1748 11:28:32.083608 APIC: 05: enabled 1
1749 11:28:32.087322 PCI: 01:00.0: enabled 1
1750 11:28:32.093769 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1751 11:28:32.096752 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1752 11:28:32.100312 ELOG: NV offset 0xf30000 size 0x1000
1753 11:28:32.108568 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1754 11:28:32.115657 ELOG: Event(17) added with size 13 at 2024-03-18 11:28:32 UTC
1755 11:28:32.122136 ELOG: Event(92) added with size 9 at 2024-03-18 11:28:32 UTC
1756 11:28:32.128429 ELOG: Event(93) added with size 9 at 2024-03-18 11:28:32 UTC
1757 11:28:32.134747 ELOG: Event(9E) added with size 10 at 2024-03-18 11:28:32 UTC
1758 11:28:32.141597 ELOG: Event(9F) added with size 14 at 2024-03-18 11:28:32 UTC
1759 11:28:32.147918 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1760 11:28:32.154971 ELOG: Event(A1) added with size 10 at 2024-03-18 11:28:32 UTC
1761 11:28:32.161041 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1762 11:28:32.167662 ELOG: Event(A0) added with size 9 at 2024-03-18 11:28:32 UTC
1763 11:28:32.171336 elog_add_boot_reason: Logged dev mode boot
1764 11:28:32.177794 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1765 11:28:32.181150 Finalize devices...
1766 11:28:32.181233 Devices finalized
1767 11:28:32.188295 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1768 11:28:32.190800 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1769 11:28:32.197363 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1770 11:28:32.200888 ME: HFSTS1 : 0x80030055
1771 11:28:32.207295 ME: HFSTS2 : 0x30280116
1772 11:28:32.210747 ME: HFSTS3 : 0x00000050
1773 11:28:32.217700 ME: HFSTS4 : 0x00004000
1774 11:28:32.220549 ME: HFSTS5 : 0x00000000
1775 11:28:32.224050 ME: HFSTS6 : 0x40400006
1776 11:28:32.227143 ME: Manufacturing Mode : YES
1777 11:28:32.233963 ME: SPI Protection Mode Enabled : NO
1778 11:28:32.237318 ME: FW Partition Table : OK
1779 11:28:32.240273 ME: Bringup Loader Failure : NO
1780 11:28:32.243893 ME: Firmware Init Complete : NO
1781 11:28:32.246831 ME: Boot Options Present : NO
1782 11:28:32.250478 ME: Update In Progress : NO
1783 11:28:32.253451 ME: D0i3 Support : YES
1784 11:28:32.257091 ME: Low Power State Enabled : NO
1785 11:28:32.263325 ME: CPU Replaced : YES
1786 11:28:32.266779 ME: CPU Replacement Valid : YES
1787 11:28:32.270284 ME: Current Working State : 5
1788 11:28:32.273752 ME: Current Operation State : 1
1789 11:28:32.276969 ME: Current Operation Mode : 3
1790 11:28:32.280036 ME: Error Code : 0
1791 11:28:32.283775 ME: Enhanced Debug Mode : NO
1792 11:28:32.286536 ME: CPU Debug Disabled : YES
1793 11:28:32.290272 ME: TXT Support : NO
1794 11:28:32.296429 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1795 11:28:32.307533 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1796 11:28:32.309539 CBFS: 'fallback/slic' not found.
1797 11:28:32.313562 ACPI: Writing ACPI tables at 76b01000.
1798 11:28:32.313646 ACPI: * FACS
1799 11:28:32.316325 ACPI: * DSDT
1800 11:28:32.319847 Ramoops buffer: 0x100000@0x76a00000.
1801 11:28:32.322800 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1802 11:28:32.329578 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1803 11:28:32.332634 Google Chrome EC: version:
1804 11:28:32.336551 ro: voema_v2.0.10114-a447f03e46
1805 11:28:32.339544 rw: voema_v2.0.10114-a447f03e46
1806 11:28:32.343104 running image: 2
1807 11:28:32.346231 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1808 11:28:32.351725 ACPI: * FADT
1809 11:28:32.351807 SCI is IRQ9
1810 11:28:32.357910 ACPI: added table 1/32, length now 40
1811 11:28:32.357992 ACPI: * SSDT
1812 11:28:32.361341 Found 1 CPU(s) with 8 core(s) each.
1813 11:28:32.367785 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1814 11:28:32.370953 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1815 11:28:32.374664 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1816 11:28:32.380754 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1817 11:28:32.384438 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1818 11:28:32.390651 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1819 11:28:32.394468 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1820 11:28:32.400534 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1821 11:28:32.407456 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1822 11:28:32.410350 \_SB.PCI0.RP09: Added StorageD3Enable property
1823 11:28:32.417129 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1824 11:28:32.420712 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1825 11:28:32.426996 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1826 11:28:32.430198 PS2K: Passing 80 keymaps to kernel
1827 11:28:32.437434 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1828 11:28:32.443402 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1829 11:28:32.450397 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1830 11:28:32.456942 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1831 11:28:32.463192 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1832 11:28:32.470335 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1833 11:28:32.476444 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1834 11:28:32.483101 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1835 11:28:32.486341 ACPI: added table 2/32, length now 44
1836 11:28:32.486424 ACPI: * MCFG
1837 11:28:32.493078 ACPI: added table 3/32, length now 48
1838 11:28:32.493161 ACPI: * TPM2
1839 11:28:32.496275 TPM2 log created at 0x769f0000
1840 11:28:32.499733 ACPI: added table 4/32, length now 52
1841 11:28:32.503156 ACPI: * MADT
1842 11:28:32.503243 SCI is IRQ9
1843 11:28:32.506329 ACPI: added table 5/32, length now 56
1844 11:28:32.509334 current = 76b09850
1845 11:28:32.509416 ACPI: * DMAR
1846 11:28:32.516267 ACPI: added table 6/32, length now 60
1847 11:28:32.519436 ACPI: added table 7/32, length now 64
1848 11:28:32.519518 ACPI: * HPET
1849 11:28:32.522770 ACPI: added table 8/32, length now 68
1850 11:28:32.525907 ACPI: done.
1851 11:28:32.529349 ACPI tables: 35216 bytes.
1852 11:28:32.529431 smbios_write_tables: 769ef000
1853 11:28:32.532725 EC returned error result code 3
1854 11:28:32.536242 Couldn't obtain OEM name from CBI
1855 11:28:32.540023 Create SMBIOS type 16
1856 11:28:32.543441 Create SMBIOS type 17
1857 11:28:32.546572 GENERIC: 0.0 (WIFI Device)
1858 11:28:32.549962 SMBIOS tables: 1734 bytes.
1859 11:28:32.553207 Writing table forward entry at 0x00000500
1860 11:28:32.559511 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1861 11:28:32.563082 Writing coreboot table at 0x76b25000
1862 11:28:32.569425 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1863 11:28:32.573402 1. 0000000000001000-000000000009ffff: RAM
1864 11:28:32.576375 2. 00000000000a0000-00000000000fffff: RESERVED
1865 11:28:32.583158 3. 0000000000100000-00000000769eefff: RAM
1866 11:28:32.586783 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1867 11:28:32.592993 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1868 11:28:32.599713 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1869 11:28:32.602841 7. 0000000077000000-000000007fbfffff: RESERVED
1870 11:28:32.609101 8. 00000000c0000000-00000000cfffffff: RESERVED
1871 11:28:32.612562 9. 00000000f8000000-00000000f9ffffff: RESERVED
1872 11:28:32.616231 10. 00000000fb000000-00000000fb000fff: RESERVED
1873 11:28:32.622420 11. 00000000fe000000-00000000fe00ffff: RESERVED
1874 11:28:32.626117 12. 00000000fed80000-00000000fed87fff: RESERVED
1875 11:28:32.632619 13. 00000000fed90000-00000000fed92fff: RESERVED
1876 11:28:32.635841 14. 00000000feda0000-00000000feda1fff: RESERVED
1877 11:28:32.642724 15. 00000000fedc0000-00000000feddffff: RESERVED
1878 11:28:32.646036 16. 0000000100000000-00000004803fffff: RAM
1879 11:28:32.649088 Passing 4 GPIOs to payload:
1880 11:28:32.652319 NAME | PORT | POLARITY | VALUE
1881 11:28:32.658976 lid | undefined | high | high
1882 11:28:32.665267 power | undefined | high | low
1883 11:28:32.669515 oprom | undefined | high | low
1884 11:28:32.675099 EC in RW | 0x000000e5 | high | high
1885 11:28:32.682081 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865
1886 11:28:32.685150 coreboot table: 1576 bytes.
1887 11:28:32.688454 IMD ROOT 0. 0x76fff000 0x00001000
1888 11:28:32.691614 IMD SMALL 1. 0x76ffe000 0x00001000
1889 11:28:32.695336 FSP MEMORY 2. 0x76c4e000 0x003b0000
1890 11:28:32.698544 VPD 3. 0x76c4d000 0x00000367
1891 11:28:32.701447 RO MCACHE 4. 0x76c4c000 0x00000fdc
1892 11:28:32.705136 CONSOLE 5. 0x76c2c000 0x00020000
1893 11:28:32.711590 FMAP 6. 0x76c2b000 0x00000578
1894 11:28:32.714667 TIME STAMP 7. 0x76c2a000 0x00000910
1895 11:28:32.718127 VBOOT WORK 8. 0x76c16000 0x00014000
1896 11:28:32.721370 ROMSTG STCK 9. 0x76c15000 0x00001000
1897 11:28:32.724782 AFTER CAR 10. 0x76c0a000 0x0000b000
1898 11:28:32.727844 RAMSTAGE 11. 0x76b97000 0x00073000
1899 11:28:32.731272 REFCODE 12. 0x76b42000 0x00055000
1900 11:28:32.738002 SMM BACKUP 13. 0x76b32000 0x00010000
1901 11:28:32.740992 4f444749 14. 0x76b30000 0x00002000
1902 11:28:32.744639 EXT VBT15. 0x76b2d000 0x0000219f
1903 11:28:32.747816 COREBOOT 16. 0x76b25000 0x00008000
1904 11:28:32.751253 ACPI 17. 0x76b01000 0x00024000
1905 11:28:32.754303 ACPI GNVS 18. 0x76b00000 0x00001000
1906 11:28:32.757600 RAMOOPS 19. 0x76a00000 0x00100000
1907 11:28:32.760780 TPM2 TCGLOG20. 0x769f0000 0x00010000
1908 11:28:32.764578 SMBIOS 21. 0x769ef000 0x00000800
1909 11:28:32.767549 IMD small region:
1910 11:28:32.771088 IMD ROOT 0. 0x76ffec00 0x00000400
1911 11:28:32.774062 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1912 11:28:32.780583 POWER STATE 2. 0x76ffeb80 0x00000044
1913 11:28:32.784413 ROMSTAGE 3. 0x76ffeb60 0x00000004
1914 11:28:32.787194 MEM INFO 4. 0x76ffe980 0x000001e0
1915 11:28:32.794307 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1916 11:28:32.797121 MTRR: Physical address space:
1917 11:28:32.803977 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1918 11:28:32.807271 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1919 11:28:32.813501 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1920 11:28:32.820023 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1921 11:28:32.826978 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1922 11:28:32.833143 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1923 11:28:32.839858 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1924 11:28:32.843174 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 11:28:32.846342 MTRR: Fixed MSR 0x258 0x0606060606060606
1926 11:28:32.853119 MTRR: Fixed MSR 0x259 0x0000000000000000
1927 11:28:32.856359 MTRR: Fixed MSR 0x268 0x0606060606060606
1928 11:28:32.859788 MTRR: Fixed MSR 0x269 0x0606060606060606
1929 11:28:32.862931 MTRR: Fixed MSR 0x26a 0x0606060606060606
1930 11:28:32.869436 MTRR: Fixed MSR 0x26b 0x0606060606060606
1931 11:28:32.873036 MTRR: Fixed MSR 0x26c 0x0606060606060606
1932 11:28:32.876175 MTRR: Fixed MSR 0x26d 0x0606060606060606
1933 11:28:32.879523 MTRR: Fixed MSR 0x26e 0x0606060606060606
1934 11:28:32.885905 MTRR: Fixed MSR 0x26f 0x0606060606060606
1935 11:28:32.889534 call enable_fixed_mtrr()
1936 11:28:32.892964 CPU physical address size: 39 bits
1937 11:28:32.895928 MTRR: default type WB/UC MTRR counts: 6/7.
1938 11:28:32.902661 MTRR: WB selected as default type.
1939 11:28:32.905944 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1940 11:28:32.912311 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1941 11:28:32.919130 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1942 11:28:32.925757 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1943 11:28:32.931966 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1944 11:28:32.938574 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1945 11:28:32.945183 MTRR: Fixed MSR 0x250 0x0606060606060606
1946 11:28:32.948917 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 11:28:32.951961 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 11:28:32.955072 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 11:28:32.962284 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 11:28:32.965306 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 11:28:32.968677 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 11:28:32.971675 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 11:28:32.978429 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 11:28:32.981386 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 11:28:32.984875 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 11:28:32.984956
1957 11:28:32.988997 MTRR check
1958 11:28:32.992265 call enable_fixed_mtrr()
1959 11:28:32.992348 Fixed MTRRs : Enabled
1960 11:28:32.996088 Variable MTRRs: Enabled
1961 11:28:32.996184
1962 11:28:32.999208 CPU physical address size: 39 bits
1963 11:28:33.007219 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 151 ms
1964 11:28:33.010118 MTRR: Fixed MSR 0x250 0x0606060606060606
1965 11:28:33.017091 MTRR: Fixed MSR 0x250 0x0606060606060606
1966 11:28:33.020133 MTRR: Fixed MSR 0x258 0x0606060606060606
1967 11:28:33.023667 MTRR: Fixed MSR 0x259 0x0000000000000000
1968 11:28:33.026478 MTRR: Fixed MSR 0x268 0x0606060606060606
1969 11:28:33.033312 MTRR: Fixed MSR 0x269 0x0606060606060606
1970 11:28:33.036421 MTRR: Fixed MSR 0x26a 0x0606060606060606
1971 11:28:33.039834 MTRR: Fixed MSR 0x26b 0x0606060606060606
1972 11:28:33.042964 MTRR: Fixed MSR 0x26c 0x0606060606060606
1973 11:28:33.049902 MTRR: Fixed MSR 0x26d 0x0606060606060606
1974 11:28:33.053135 MTRR: Fixed MSR 0x26e 0x0606060606060606
1975 11:28:33.056344 MTRR: Fixed MSR 0x26f 0x0606060606060606
1976 11:28:33.063395 MTRR: Fixed MSR 0x258 0x0606060606060606
1977 11:28:33.063512 call enable_fixed_mtrr()
1978 11:28:33.070180 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 11:28:33.073708 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 11:28:33.076974 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 11:28:33.080049 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 11:28:33.086736 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 11:28:33.090166 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 11:28:33.093576 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 11:28:33.096622 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 11:28:33.103215 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 11:28:33.106223 CPU physical address size: 39 bits
1988 11:28:33.111376 call enable_fixed_mtrr()
1989 11:28:33.114940 MTRR: Fixed MSR 0x250 0x0606060606060606
1990 11:28:33.121696 MTRR: Fixed MSR 0x250 0x0606060606060606
1991 11:28:33.124618 MTRR: Fixed MSR 0x258 0x0606060606060606
1992 11:28:33.127837 MTRR: Fixed MSR 0x259 0x0000000000000000
1993 11:28:33.131358 MTRR: Fixed MSR 0x268 0x0606060606060606
1994 11:28:33.137628 MTRR: Fixed MSR 0x269 0x0606060606060606
1995 11:28:33.141482 MTRR: Fixed MSR 0x26a 0x0606060606060606
1996 11:28:33.144754 MTRR: Fixed MSR 0x26b 0x0606060606060606
1997 11:28:33.147908 MTRR: Fixed MSR 0x26c 0x0606060606060606
1998 11:28:33.154324 MTRR: Fixed MSR 0x26d 0x0606060606060606
1999 11:28:33.157571 MTRR: Fixed MSR 0x26e 0x0606060606060606
2000 11:28:33.160892 MTRR: Fixed MSR 0x26f 0x0606060606060606
2001 11:28:33.168034 MTRR: Fixed MSR 0x258 0x0606060606060606
2002 11:28:33.171225 MTRR: Fixed MSR 0x259 0x0000000000000000
2003 11:28:33.174690 MTRR: Fixed MSR 0x268 0x0606060606060606
2004 11:28:33.177867 MTRR: Fixed MSR 0x269 0x0606060606060606
2005 11:28:33.184616 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 11:28:33.187639 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 11:28:33.191258 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 11:28:33.194181 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 11:28:33.201084 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 11:28:33.203910 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 11:28:33.208165 call enable_fixed_mtrr()
2012 11:28:33.210767 call enable_fixed_mtrr()
2013 11:28:33.214391 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 11:28:33.217469 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 11:28:33.223902 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 11:28:33.227416 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 11:28:33.230612 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 11:28:33.236898 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 11:28:33.240251 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 11:28:33.243569 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 11:28:33.246689 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 11:28:33.253418 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 11:28:33.256610 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 11:28:33.259967 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 11:28:33.266783 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 11:28:33.266866 call enable_fixed_mtrr()
2027 11:28:33.273772 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 11:28:33.276960 MTRR: Fixed MSR 0x268 0x0606060606060606
2029 11:28:33.280443 MTRR: Fixed MSR 0x269 0x0606060606060606
2030 11:28:33.283545 MTRR: Fixed MSR 0x26a 0x0606060606060606
2031 11:28:33.289674 MTRR: Fixed MSR 0x26b 0x0606060606060606
2032 11:28:33.293098 MTRR: Fixed MSR 0x26c 0x0606060606060606
2033 11:28:33.296636 MTRR: Fixed MSR 0x26d 0x0606060606060606
2034 11:28:33.299639 MTRR: Fixed MSR 0x26e 0x0606060606060606
2035 11:28:33.306068 MTRR: Fixed MSR 0x26f 0x0606060606060606
2036 11:28:33.309260 CPU physical address size: 39 bits
2037 11:28:33.314312 call enable_fixed_mtrr()
2038 11:28:33.317650 CPU physical address size: 39 bits
2039 11:28:33.322572 Checking cr50 for pending updates
2040 11:28:33.325594 CPU physical address size: 39 bits
2041 11:28:33.329247 CPU physical address size: 39 bits
2042 11:28:33.332748 Reading cr50 TPM mode
2043 11:28:33.336315 CPU physical address size: 39 bits
2044 11:28:33.342855 BS: BS_PAYLOAD_LOAD entry times (exec / console): 322 / 6 ms
2045 11:28:33.349347 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2046 11:28:33.356278 Checking segment from ROM address 0xffc02b38
2047 11:28:33.359375 Checking segment from ROM address 0xffc02b54
2048 11:28:33.362787 Loading segment from ROM address 0xffc02b38
2049 11:28:33.365935 code (compression=0)
2050 11:28:33.376226 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2051 11:28:33.382616 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2052 11:28:33.386002 it's not compressed!
2053 11:28:33.524745 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2054 11:28:33.531319 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2055 11:28:33.538429 Loading segment from ROM address 0xffc02b54
2056 11:28:33.541776 Entry Point 0x30000000
2057 11:28:33.541860 Loaded segments
2058 11:28:33.548640 BS: BS_PAYLOAD_LOAD run times (exec / console): 136 / 63 ms
2059 11:28:33.593363 Finalizing chipset.
2060 11:28:33.596655 Finalizing SMM.
2061 11:28:33.596740 APMC done.
2062 11:28:33.603155 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2063 11:28:33.606727 mp_park_aps done after 0 msecs.
2064 11:28:33.609858 Jumping to boot code at 0x30000000(0x76b25000)
2065 11:28:33.619623 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2066 11:28:33.619709
2067 11:28:33.623092
2068 11:28:33.623176
2069 11:28:33.623519 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2070 11:28:33.623614 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2071 11:28:33.623705 Setting prompt string to ['volteer:']
2072 11:28:33.623784 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2073 11:28:33.626047 Starting depthcharge on Voema...
2074 11:28:33.626131
2075 11:28:33.632504 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2076 11:28:33.632588
2077 11:28:33.639367 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2078 11:28:33.639450
2079 11:28:33.645816 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2080 11:28:33.645900
2081 11:28:33.649300 Failed to find eMMC card reader
2082 11:28:33.649384
2083 11:28:33.652267 Wipe memory regions:
2084 11:28:33.652349
2085 11:28:33.655798 [0x00000000001000, 0x000000000a0000)
2086 11:28:33.655881
2087 11:28:33.659217 [0x00000000100000, 0x00000030000000)
2088 11:28:33.694820
2089 11:28:33.698138 [0x00000032662db0, 0x000000769ef000)
2090 11:28:33.747990
2091 11:28:33.751335 [0x00000100000000, 0x00000480400000)
2092 11:28:34.379722
2093 11:28:34.382863 ec_init: CrosEC protocol v3 supported (256, 256)
2094 11:28:34.814181
2095 11:28:34.814321 R8152: Initializing
2096 11:28:34.814389
2097 11:28:34.817697 Version 6 (ocp_data = 5c30)
2098 11:28:34.817788
2099 11:28:34.820620 R8152: Done initializing
2100 11:28:34.820703
2101 11:28:34.823826 Adding net device
2102 11:28:35.125472
2103 11:28:35.128627 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2104 11:28:35.128714
2105 11:28:35.128779
2106 11:28:35.128839
2107 11:28:35.132035 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2109 11:28:35.232436 volteer: tftpboot 192.168.201.1 13086462/tftp-deploy-yiwlqu7y/kernel/bzImage 13086462/tftp-deploy-yiwlqu7y/kernel/cmdline 13086462/tftp-deploy-yiwlqu7y/ramdisk/ramdisk.cpio.gz
2110 11:28:35.232590 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2111 11:28:35.232734 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2112 11:28:35.236840 tftpboot 192.168.201.1 13086462/tftp-deploy-yiwlqu7y/kernel/bzIploy-yiwlqu7y/kernel/cmdline 13086462/tftp-deploy-yiwlqu7y/ramdisk/ramdisk.cpio.gz
2113 11:28:35.236927
2114 11:28:35.236992 Waiting for link
2115 11:28:35.439948
2116 11:28:35.440140 done.
2117 11:28:35.440210
2118 11:28:35.440273 MAC: 00:24:32:30:7a:04
2119 11:28:35.440332
2120 11:28:35.443207 Sending DHCP discover... done.
2121 11:28:35.443291
2122 11:28:35.446572 Waiting for reply... done.
2123 11:28:35.446655
2124 11:28:35.450869 Sending DHCP request... done.
2125 11:28:35.450953
2126 11:28:35.457041 Waiting for reply... done.
2127 11:28:35.457125
2128 11:28:35.457191 My ip is 192.168.201.22
2129 11:28:35.457253
2130 11:28:35.463061 The DHCP server ip is 192.168.201.1
2131 11:28:35.463145
2132 11:28:35.466670 TFTP server IP predefined by user: 192.168.201.1
2133 11:28:35.466753
2134 11:28:35.473376 Bootfile predefined by user: 13086462/tftp-deploy-yiwlqu7y/kernel/bzImage
2135 11:28:35.473460
2136 11:28:35.476744 Sending tftp read request... done.
2137 11:28:35.476827
2138 11:28:35.483174 Waiting for the transfer...
2139 11:28:35.483250
2140 11:28:36.033227 00000000 ################################################################
2141 11:28:36.033372
2142 11:28:36.582039 00080000 ################################################################
2143 11:28:36.582187
2144 11:28:37.130814 00100000 ################################################################
2145 11:28:37.130961
2146 11:28:37.689788 00180000 ################################################################
2147 11:28:37.689939
2148 11:28:38.275063 00200000 ################################################################
2149 11:28:38.275210
2150 11:28:38.840166 00280000 ################################################################
2151 11:28:38.840308
2152 11:28:39.365548 00300000 ################################################################
2153 11:28:39.365683
2154 11:28:39.900767 00380000 ################################################################
2155 11:28:39.900910
2156 11:28:40.470941 00400000 ################################################################
2157 11:28:40.471094
2158 11:28:41.008783 00480000 ################################################################
2159 11:28:41.008933
2160 11:28:41.557128 00500000 ################################################################
2161 11:28:41.557275
2162 11:28:42.091056 00580000 ################################################################
2163 11:28:42.091202
2164 11:28:42.636581 00600000 ################################################################
2165 11:28:42.636734
2166 11:28:43.193822 00680000 ################################################################
2167 11:28:43.193965
2168 11:28:43.760002 00700000 ################################################################
2169 11:28:43.760225
2170 11:28:44.352650 00780000 ################################################################
2171 11:28:44.352787
2172 11:28:44.947596 00800000 ################################################################
2173 11:28:44.947727
2174 11:28:45.548840 00880000 ######################################################### done.
2175 11:28:45.548972
2176 11:28:45.552232 The bootfile was 9375632 bytes long.
2177 11:28:45.552312
2178 11:28:45.555745 Sending tftp read request... done.
2179 11:28:45.555829
2180 11:28:45.558456 Waiting for the transfer...
2181 11:28:45.558537
2182 11:28:46.207982 00000000 ################################################################
2183 11:28:46.208372
2184 11:28:46.878381 00080000 ################################################################
2185 11:28:46.878995
2186 11:28:47.551605 00100000 ################################################################
2187 11:28:47.552150
2188 11:28:48.271623 00180000 ################################################################
2189 11:28:48.272178
2190 11:28:48.977743 00200000 ################################################################
2191 11:28:48.978269
2192 11:28:49.693272 00280000 ################################################################
2193 11:28:49.693646
2194 11:28:50.407500 00300000 ################################################################
2195 11:28:50.407656
2196 11:28:51.055870 00380000 ################################################################
2197 11:28:51.056538
2198 11:28:51.747742 00400000 ################################################################
2199 11:28:51.748408
2200 11:28:52.442223 00480000 ################################################################
2201 11:28:52.442409
2202 11:28:53.156498 00500000 ################################################################
2203 11:28:53.157000
2204 11:28:53.858579 00580000 ################################################################
2205 11:28:53.859249
2206 11:28:54.548512 00600000 ################################################################
2207 11:28:54.549366
2208 11:28:55.256298 00680000 ################################################################
2209 11:28:55.256796
2210 11:28:55.913912 00700000 ################################################################
2211 11:28:55.914522
2212 11:28:56.582706 00780000 ################################################################
2213 11:28:56.582851
2214 11:28:57.181487 00800000 ################################################################
2215 11:28:57.181623
2216 11:28:57.785140 00880000 ################################################################
2217 11:28:57.785658
2218 11:28:58.492310 00900000 ################################################################
2219 11:28:58.492841
2220 11:28:59.204029 00980000 ################################################################
2221 11:28:59.204559
2222 11:28:59.918304 00a00000 ################################################################
2223 11:28:59.918824
2224 11:29:00.618680 00a80000 ################################################################
2225 11:29:00.619377
2226 11:29:01.310645 00b00000 ################################################################
2227 11:29:01.311219
2228 11:29:02.016993 00b80000 ################################################################
2229 11:29:02.017505
2230 11:29:02.687377 00c00000 ################################################################
2231 11:29:02.687901
2232 11:29:03.342422 00c80000 ################################################################
2233 11:29:03.343179
2234 11:29:04.030068 00d00000 ################################################################
2235 11:29:04.030737
2236 11:29:04.600415 00d80000 ################################################################
2237 11:29:04.600568
2238 11:29:05.209966 00e00000 ################################################################
2239 11:29:05.210118
2240 11:29:05.851451 00e80000 ################################################################
2241 11:29:05.851624
2242 11:29:06.518301 00f00000 ################################################################
2243 11:29:06.518464
2244 11:29:07.206971 00f80000 ################################################################
2245 11:29:07.207556
2246 11:29:07.856081 01000000 ################################################################
2247 11:29:07.856231
2248 11:29:08.490469 01080000 ################################################################
2249 11:29:08.491016
2250 11:29:09.158369 01100000 ################################################################
2251 11:29:09.159038
2252 11:29:09.850688 01180000 ################################################################
2253 11:29:09.850829
2254 11:29:10.475248 01200000 ################################################################
2255 11:29:10.475406
2256 11:29:11.106283 01280000 ################################################################
2257 11:29:11.106456
2258 11:29:11.683997 01300000 ################################################################
2259 11:29:11.684179
2260 11:29:12.288487 01380000 ################################################################
2261 11:29:12.288630
2262 11:29:12.876473 01400000 ################################################################
2263 11:29:12.876624
2264 11:29:13.478511 01480000 ################################################################
2265 11:29:13.478686
2266 11:29:14.127888 01500000 ################################################################
2267 11:29:14.128106
2268 11:29:14.731275 01580000 ################################################################
2269 11:29:14.731447
2270 11:29:15.336912 01600000 ################################################################
2271 11:29:15.337087
2272 11:29:16.003701 01680000 ################################################################
2273 11:29:16.003850
2274 11:29:16.663028 01700000 ################################################################
2275 11:29:16.663184
2276 11:29:17.264074 01780000 ################################################################
2277 11:29:17.264246
2278 11:29:17.852629 01800000 ################################################################
2279 11:29:17.852778
2280 11:29:18.474215 01880000 ################################################################
2281 11:29:18.474355
2282 11:29:19.085906 01900000 ################################################################
2283 11:29:19.086080
2284 11:29:19.760643 01980000 ################################################################
2285 11:29:19.761201
2286 11:29:20.474771 01a00000 ################################################################
2287 11:29:20.475278
2288 11:29:21.180731 01a80000 ################################################################
2289 11:29:21.181294
2290 11:29:21.903216 01b00000 ################################################################
2291 11:29:21.903866
2292 11:29:22.618601 01b80000 ################################################################
2293 11:29:22.619123
2294 11:29:23.309203 01c00000 ################################################################
2295 11:29:23.309355
2296 11:29:23.965630 01c80000 ################################################################
2297 11:29:23.965815
2298 11:29:24.679272 01d00000 ################################################################
2299 11:29:24.679878
2300 11:29:25.372655 01d80000 ################################################################
2301 11:29:25.373228
2302 11:29:26.094425 01e00000 ################################################################
2303 11:29:26.094577
2304 11:29:26.741809 01e80000 ################################################################
2305 11:29:26.742367
2306 11:29:27.446501 01f00000 ################################################################
2307 11:29:27.446646
2308 11:29:28.091637 01f80000 ################################################################
2309 11:29:28.092235
2310 11:29:28.793134 02000000 ################################################################
2311 11:29:28.793278
2312 11:29:29.483523 02080000 ################################################################
2313 11:29:29.483677
2314 11:29:30.177111 02100000 ################################################################
2315 11:29:30.177642
2316 11:29:30.826753 02180000 ################################################################
2317 11:29:30.827045
2318 11:29:31.433421 02200000 ####################################################### done.
2319 11:29:31.433940
2320 11:29:31.436562 Sending tftp read request... done.
2321 11:29:31.436987
2322 11:29:31.439524 Waiting for the transfer...
2323 11:29:31.439949
2324 11:29:31.440395 00000000 # done.
2325 11:29:31.440747
2326 11:29:31.449762 Command line loaded dynamically from TFTP file: 13086462/tftp-deploy-yiwlqu7y/kernel/cmdline
2327 11:29:31.450289
2328 11:29:31.465843 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2329 11:29:31.472267
2330 11:29:31.475743 Shutting down all USB controllers.
2331 11:29:31.476214
2332 11:29:31.476558 Removing current net device
2333 11:29:31.476872
2334 11:29:31.478844 Finalizing coreboot
2335 11:29:31.479266
2336 11:29:31.485171 Exiting depthcharge with code 4 at timestamp: 66428358
2337 11:29:31.485752
2338 11:29:31.486188
2339 11:29:31.486527 Starting kernel ...
2340 11:29:31.486832
2341 11:29:31.487126
2342 11:29:31.488861 end: 2.2.4 bootloader-commands (duration 00:00:58) [common]
2343 11:29:31.489354 start: 2.2.5 auto-login-action (timeout 00:03:47) [common]
2344 11:29:31.489734 Setting prompt string to ['Linux version [0-9]']
2345 11:29:31.490072 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2346 11:29:31.490416 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2348 11:33:18.490285 end: 2.2.5 auto-login-action (duration 00:03:47) [common]
2350 11:33:18.491360 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 227 seconds'
2352 11:33:18.492333 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2355 11:33:18.493739 end: 2 depthcharge-action (duration 00:05:00) [common]
2357 11:33:18.495575 Cleaning after the job
2358 11:33:18.496118 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086462/tftp-deploy-yiwlqu7y/ramdisk
2359 11:33:18.518607 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086462/tftp-deploy-yiwlqu7y/kernel
2360 11:33:18.522505 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086462/tftp-deploy-yiwlqu7y/modules
2361 11:33:18.523741 start: 4.1 power-off (timeout 00:00:30) [common]
2362 11:33:18.524205 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
2363 11:33:18.621219 >> Command sent successfully.
2364 11:33:18.630225 Returned 0 in 0 seconds
2365 11:33:18.731575 end: 4.1 power-off (duration 00:00:00) [common]
2367 11:33:18.733183 start: 4.2 read-feedback (timeout 00:10:00) [common]
2368 11:33:18.734543 Listened to connection for namespace 'common' for up to 1s
2369 11:33:19.735133 Finalising connection for namespace 'common'
2370 11:33:19.735874 Disconnecting from shell: Finalise
2371 11:33:19.736360
2372 11:33:19.837454 end: 4.2 read-feedback (duration 00:00:01) [common]
2373 11:33:19.838100 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13086462
2374 11:33:19.970680 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13086462
2375 11:33:19.970877 JobError: Your job cannot terminate cleanly.