Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 11:34:03.257987 lava-dispatcher, installed at version: 2024.01
2 11:34:03.258193 start: 0 validate
3 11:34:03.258326 Start time: 2024-03-18 11:34:03.258319+00:00 (UTC)
4 11:34:03.258492 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:34:03.258625 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20240129.0%2Famd64%2Finitrd.cpio.gz exists
6 11:34:03.534627 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:34:03.535367 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-3115-g0a25e06c1d85%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:34:03.806709 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:34:03.807381 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20240129.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:34:04.073127 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:34:04.074052 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-3115-g0a25e06c1d85%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 11:34:04.336571 validate duration: 1.08
14 11:34:04.336868 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:34:04.336968 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:34:04.337053 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:34:04.337179 Not decompressing ramdisk as can be used compressed.
18 11:34:04.337269 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20240129.0/amd64/initrd.cpio.gz
19 11:34:04.337332 saving as /var/lib/lava/dispatcher/tmp/13086480/tftp-deploy-9nq_yu7p/ramdisk/initrd.cpio.gz
20 11:34:04.337395 total size: 5670327 (5 MB)
21 11:34:04.338492 progress 0 % (0 MB)
22 11:34:04.340161 progress 5 % (0 MB)
23 11:34:04.341767 progress 10 % (0 MB)
24 11:34:04.343243 progress 15 % (0 MB)
25 11:34:04.344848 progress 20 % (1 MB)
26 11:34:04.346532 progress 25 % (1 MB)
27 11:34:04.347966 progress 30 % (1 MB)
28 11:34:04.349528 progress 35 % (1 MB)
29 11:34:04.351130 progress 40 % (2 MB)
30 11:34:04.352548 progress 45 % (2 MB)
31 11:34:04.354112 progress 50 % (2 MB)
32 11:34:04.355711 progress 55 % (3 MB)
33 11:34:04.357162 progress 60 % (3 MB)
34 11:34:04.358864 progress 65 % (3 MB)
35 11:34:04.360455 progress 70 % (3 MB)
36 11:34:04.361854 progress 75 % (4 MB)
37 11:34:04.363456 progress 80 % (4 MB)
38 11:34:04.365017 progress 85 % (4 MB)
39 11:34:04.366468 progress 90 % (4 MB)
40 11:34:04.368028 progress 95 % (5 MB)
41 11:34:04.369640 progress 100 % (5 MB)
42 11:34:04.369743 5 MB downloaded in 0.03 s (167.17 MB/s)
43 11:34:04.369897 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:34:04.370135 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:34:04.370219 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:34:04.370301 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:34:04.370471 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-3115-g0a25e06c1d85/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 11:34:04.370545 saving as /var/lib/lava/dispatcher/tmp/13086480/tftp-deploy-9nq_yu7p/kernel/bzImage
50 11:34:04.370606 total size: 9375632 (8 MB)
51 11:34:04.370665 No compression specified
52 11:34:04.371763 progress 0 % (0 MB)
53 11:34:04.374390 progress 5 % (0 MB)
54 11:34:04.376895 progress 10 % (0 MB)
55 11:34:04.379390 progress 15 % (1 MB)
56 11:34:04.381998 progress 20 % (1 MB)
57 11:34:04.384467 progress 25 % (2 MB)
58 11:34:04.386944 progress 30 % (2 MB)
59 11:34:04.389550 progress 35 % (3 MB)
60 11:34:04.392024 progress 40 % (3 MB)
61 11:34:04.394541 progress 45 % (4 MB)
62 11:34:04.397155 progress 50 % (4 MB)
63 11:34:04.399631 progress 55 % (4 MB)
64 11:34:04.402055 progress 60 % (5 MB)
65 11:34:04.404487 progress 65 % (5 MB)
66 11:34:04.407093 progress 70 % (6 MB)
67 11:34:04.409533 progress 75 % (6 MB)
68 11:34:04.412020 progress 80 % (7 MB)
69 11:34:04.414652 progress 85 % (7 MB)
70 11:34:04.417040 progress 90 % (8 MB)
71 11:34:04.419482 progress 95 % (8 MB)
72 11:34:04.422108 progress 100 % (8 MB)
73 11:34:04.422228 8 MB downloaded in 0.05 s (173.22 MB/s)
74 11:34:04.422373 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:34:04.422679 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:34:04.422767 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:34:04.422854 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:34:04.422985 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20240129.0/amd64/full.rootfs.tar.xz
80 11:34:04.423052 saving as /var/lib/lava/dispatcher/tmp/13086480/tftp-deploy-9nq_yu7p/nfsrootfs/full.rootfs.tar
81 11:34:04.423112 total size: 127582724 (121 MB)
82 11:34:04.423173 Using unxz to decompress xz
83 11:34:04.427496 progress 0 % (0 MB)
84 11:34:04.916741 progress 5 % (6 MB)
85 11:34:05.413078 progress 10 % (12 MB)
86 11:34:05.906511 progress 15 % (18 MB)
87 11:34:06.418437 progress 20 % (24 MB)
88 11:34:06.809039 progress 25 % (30 MB)
89 11:34:07.122724 progress 30 % (36 MB)
90 11:34:07.413308 progress 35 % (42 MB)
91 11:34:07.574109 progress 40 % (48 MB)
92 11:34:07.951319 progress 45 % (54 MB)
93 11:34:08.321083 progress 50 % (60 MB)
94 11:34:08.670214 progress 55 % (66 MB)
95 11:34:09.026968 progress 60 % (73 MB)
96 11:34:09.367032 progress 65 % (79 MB)
97 11:34:09.749885 progress 70 % (85 MB)
98 11:34:10.165467 progress 75 % (91 MB)
99 11:34:10.583489 progress 80 % (97 MB)
100 11:34:10.693596 progress 85 % (103 MB)
101 11:34:10.846082 progress 90 % (109 MB)
102 11:34:11.180207 progress 95 % (115 MB)
103 11:34:11.553102 progress 100 % (121 MB)
104 11:34:11.558665 121 MB downloaded in 7.14 s (17.05 MB/s)
105 11:34:11.558922 end: 1.3.1 http-download (duration 00:00:07) [common]
107 11:34:11.559179 end: 1.3 download-retry (duration 00:00:07) [common]
108 11:34:11.559268 start: 1.4 download-retry (timeout 00:09:53) [common]
109 11:34:11.559354 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 11:34:11.559511 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-3115-g0a25e06c1d85/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 11:34:11.559582 saving as /var/lib/lava/dispatcher/tmp/13086480/tftp-deploy-9nq_yu7p/modules/modules.tar
112 11:34:11.559641 total size: 253492 (0 MB)
113 11:34:11.559704 Using unxz to decompress xz
114 11:34:11.563963 progress 12 % (0 MB)
115 11:34:11.564379 progress 25 % (0 MB)
116 11:34:11.564622 progress 38 % (0 MB)
117 11:34:11.566139 progress 51 % (0 MB)
118 11:34:11.568096 progress 64 % (0 MB)
119 11:34:11.569943 progress 77 % (0 MB)
120 11:34:11.571862 progress 90 % (0 MB)
121 11:34:11.573590 progress 100 % (0 MB)
122 11:34:11.579338 0 MB downloaded in 0.02 s (12.28 MB/s)
123 11:34:11.579583 end: 1.4.1 http-download (duration 00:00:00) [common]
125 11:34:11.579850 end: 1.4 download-retry (duration 00:00:00) [common]
126 11:34:11.579943 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 11:34:11.580085 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 11:34:14.552197 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/13086480/extract-nfsrootfs-murxjyw5
129 11:34:14.552402 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 11:34:14.552504 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 11:34:14.552664 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd
132 11:34:14.552792 makedir: /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin
133 11:34:14.552893 makedir: /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/tests
134 11:34:14.552988 makedir: /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/results
135 11:34:14.553084 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-add-keys
136 11:34:14.553224 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-add-sources
137 11:34:14.553390 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-background-process-start
138 11:34:14.553517 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-background-process-stop
139 11:34:14.553641 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-common-functions
140 11:34:14.553765 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-echo-ipv4
141 11:34:14.553891 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-install-packages
142 11:34:14.554014 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-installed-packages
143 11:34:14.554136 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-os-build
144 11:34:14.554259 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-probe-channel
145 11:34:14.554382 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-probe-ip
146 11:34:14.554565 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-target-ip
147 11:34:14.554687 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-target-mac
148 11:34:14.554809 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-target-storage
149 11:34:14.554934 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-test-case
150 11:34:14.555059 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-test-event
151 11:34:14.555181 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-test-feedback
152 11:34:14.555303 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-test-raise
153 11:34:14.555463 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-test-reference
154 11:34:14.555585 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-test-runner
155 11:34:14.555708 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-test-set
156 11:34:14.555830 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-test-shell
157 11:34:14.555954 Updating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-install-packages (oe)
158 11:34:14.556104 Updating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/bin/lava-installed-packages (oe)
159 11:34:14.556224 Creating /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/environment
160 11:34:14.556318 LAVA metadata
161 11:34:14.556386 - LAVA_JOB_ID=13086480
162 11:34:14.556447 - LAVA_DISPATCHER_IP=192.168.201.1
163 11:34:14.556546 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 11:34:14.556610 skipped lava-vland-overlay
165 11:34:14.556682 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 11:34:14.556757 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 11:34:14.556816 skipped lava-multinode-overlay
168 11:34:14.556886 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 11:34:14.556962 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 11:34:14.557033 Loading test definitions
171 11:34:14.557118 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
172 11:34:14.557188 Using /lava-13086480 at stage 0
173 11:34:14.557277 Fetching tests from https://github.com/kernelci/test-definitions
174 11:34:14.557367 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/0/tests/0_ltp-ipc'
175 11:34:26.278262 Running '/usr/bin/git checkout kernelci.org
176 11:34:26.424897 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
177 11:34:26.425683 uuid=13086480_1.5.2.3.1 testdef=None
178 11:34:26.425835 end: 1.5.2.3.1 git-repo-action (duration 00:00:12) [common]
180 11:34:26.426075 start: 1.5.2.3.2 test-overlay (timeout 00:09:38) [common]
181 11:34:26.426885 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 11:34:26.427113 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:38) [common]
184 11:34:26.428097 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 11:34:26.428334 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:38) [common]
187 11:34:26.429271 runner path: /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/0/tests/0_ltp-ipc test_uuid 13086480_1.5.2.3.1
188 11:34:26.429357 SKIPFILE='skipfile-lkft.yaml'
189 11:34:26.429418 SKIP_INSTALL='true'
190 11:34:26.429474 TST_CMDFILES='ipc'
191 11:34:26.429615 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 11:34:26.429817 Creating lava-test-runner.conf files
194 11:34:26.429879 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13086480/lava-overlay-ecnpravd/lava-13086480/0 for stage 0
195 11:34:26.429969 - 0_ltp-ipc
196 11:34:26.430070 end: 1.5.2.3 test-definition (duration 00:00:12) [common]
197 11:34:26.430158 start: 1.5.2.4 compress-overlay (timeout 00:09:38) [common]
198 11:34:33.948007 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
199 11:34:33.948162 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:30) [common]
200 11:34:33.948250 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
201 11:34:33.948347 end: 1.5.2 lava-overlay (duration 00:00:19) [common]
202 11:34:33.948437 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
203 11:34:34.091145 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
204 11:34:34.091548 start: 1.5.4 extract-modules (timeout 00:09:30) [common]
205 11:34:34.091666 extracting modules file /var/lib/lava/dispatcher/tmp/13086480/tftp-deploy-9nq_yu7p/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13086480/extract-nfsrootfs-murxjyw5
206 11:34:34.105300 extracting modules file /var/lib/lava/dispatcher/tmp/13086480/tftp-deploy-9nq_yu7p/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13086480/extract-overlay-ramdisk-sx05mbnl/ramdisk
207 11:34:34.118853 end: 1.5.4 extract-modules (duration 00:00:00) [common]
208 11:34:34.118974 start: 1.5.5 apply-overlay-tftp (timeout 00:09:30) [common]
209 11:34:34.119065 [common] Applying overlay to NFS
210 11:34:34.119135 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13086480/compress-overlay-37mcbs4b/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13086480/extract-nfsrootfs-murxjyw5
211 11:34:35.030259 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
212 11:34:35.030476 start: 1.5.6 configure-preseed-file (timeout 00:09:29) [common]
213 11:34:35.030575 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
214 11:34:35.030662 start: 1.5.7 compress-ramdisk (timeout 00:09:29) [common]
215 11:34:35.030738 Building ramdisk /var/lib/lava/dispatcher/tmp/13086480/extract-overlay-ramdisk-sx05mbnl/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13086480/extract-overlay-ramdisk-sx05mbnl/ramdisk
216 11:34:35.112748 >> 27207 blocks
217 11:34:35.675483 rename /var/lib/lava/dispatcher/tmp/13086480/extract-overlay-ramdisk-sx05mbnl/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13086480/tftp-deploy-9nq_yu7p/ramdisk/ramdisk.cpio.gz
218 11:34:35.675947 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
219 11:34:35.676066 start: 1.5.8 prepare-kernel (timeout 00:09:29) [common]
220 11:34:35.676167 start: 1.5.8.1 prepare-fit (timeout 00:09:29) [common]
221 11:34:35.676259 No mkimage arch provided, not using FIT.
222 11:34:35.676351 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
223 11:34:35.676430 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
224 11:34:35.676530 end: 1.5 prepare-tftp-overlay (duration 00:00:24) [common]
225 11:34:35.676620 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:29) [common]
226 11:34:35.676698 No LXC device requested
227 11:34:35.676772 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
228 11:34:35.676855 start: 1.7 deploy-device-env (timeout 00:09:29) [common]
229 11:34:35.676933 end: 1.7 deploy-device-env (duration 00:00:00) [common]
230 11:34:35.677004 Checking files for TFTP limit of 4294967296 bytes.
231 11:34:35.677410 end: 1 tftp-deploy (duration 00:00:31) [common]
232 11:34:35.677511 start: 2 depthcharge-action (timeout 00:05:00) [common]
233 11:34:35.677602 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
234 11:34:35.677726 substitutions:
235 11:34:35.677794 - {DTB}: None
236 11:34:35.677853 - {INITRD}: 13086480/tftp-deploy-9nq_yu7p/ramdisk/ramdisk.cpio.gz
237 11:34:35.677909 - {KERNEL}: 13086480/tftp-deploy-9nq_yu7p/kernel/bzImage
238 11:34:35.677965 - {LAVA_MAC}: None
239 11:34:35.678019 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/13086480/extract-nfsrootfs-murxjyw5
240 11:34:35.678075 - {NFS_SERVER_IP}: 192.168.201.1
241 11:34:35.678127 - {PRESEED_CONFIG}: None
242 11:34:35.678179 - {PRESEED_LOCAL}: None
243 11:34:35.678232 - {RAMDISK}: 13086480/tftp-deploy-9nq_yu7p/ramdisk/ramdisk.cpio.gz
244 11:34:35.678284 - {ROOT_PART}: None
245 11:34:35.678335 - {ROOT}: None
246 11:34:35.678386 - {SERVER_IP}: 192.168.201.1
247 11:34:35.678479 - {TEE}: None
248 11:34:35.678530 Parsed boot commands:
249 11:34:35.678584 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
250 11:34:35.678760 Parsed boot commands: tftpboot 192.168.201.1 13086480/tftp-deploy-9nq_yu7p/kernel/bzImage 13086480/tftp-deploy-9nq_yu7p/kernel/cmdline 13086480/tftp-deploy-9nq_yu7p/ramdisk/ramdisk.cpio.gz
251 11:34:35.678849 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
252 11:34:35.678935 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
253 11:34:35.679023 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
254 11:34:35.679107 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
255 11:34:35.679176 Not connected, no need to disconnect.
256 11:34:35.679247 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
257 11:34:35.679322 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
258 11:34:35.679393 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-0'
259 11:34:35.683607 Setting prompt string to ['lava-test: # ']
260 11:34:35.683964 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
261 11:34:35.684071 end: 2.2.1 reset-connection (duration 00:00:00) [common]
262 11:34:35.684163 start: 2.2.2 reset-device (timeout 00:05:00) [common]
263 11:34:35.684273 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
264 11:34:35.684505 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=reboot'
265 11:34:40.825390 >> Command sent successfully.
266 11:34:40.827812 Returned 0 in 5 seconds
267 11:34:40.928244 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
269 11:34:40.928635 end: 2.2.2 reset-device (duration 00:00:05) [common]
270 11:34:40.928791 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
271 11:34:40.928914 Setting prompt string to 'Starting depthcharge on Voema...'
272 11:34:40.929006 Changing prompt to 'Starting depthcharge on Voema...'
273 11:34:40.929100 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
274 11:34:40.929443 [Enter `^Ec?' for help]
275 11:34:42.531717
276 11:34:42.531880
277 11:34:42.541199 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
278 11:34:42.544437 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
279 11:34:42.551293 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
280 11:34:42.554590 CPU: AES supported, TXT NOT supported, VT supported
281 11:34:42.561365 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
282 11:34:42.568076 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
283 11:34:42.571088 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
284 11:34:42.574297 VBOOT: Loading verstage.
285 11:34:42.578246 FMAP: Found "FLASH" version 1.1 at 0x1804000.
286 11:34:42.584670 FMAP: base = 0x0 size = 0x2000000 #areas = 32
287 11:34:42.587631 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
288 11:34:42.598558 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
289 11:34:42.605327 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
290 11:34:42.605485
291 11:34:42.605558
292 11:34:42.618257 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
293 11:34:42.632455 Probing TPM: . done!
294 11:34:42.635774 TPM ready after 0 ms
295 11:34:42.638531 Connected to device vid:did:rid of 1ae0:0028:00
296 11:34:42.650138 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
297 11:34:42.656455 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
298 11:34:42.659890 Initialized TPM device CR50 revision 0
299 11:34:42.709118 tlcl_send_startup: Startup return code is 0
300 11:34:42.709365 TPM: setup succeeded
301 11:34:42.723567 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
302 11:34:42.738077 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
303 11:34:42.751299 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
304 11:34:42.760233 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 11:34:42.764524 Chrome EC: UHEPI supported
306 11:34:42.767937 Phase 1
307 11:34:42.771016 FMAP: area GBB found @ 1805000 (458752 bytes)
308 11:34:42.781178 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
309 11:34:42.787771 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
310 11:34:42.794355 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
311 11:34:42.800855 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
312 11:34:42.804556 Recovery requested (1009000e)
313 11:34:42.807644 TPM: Extending digest for VBOOT: boot mode into PCR 0
314 11:34:42.819386 tlcl_extend: response is 0
315 11:34:42.825698 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
316 11:34:42.835646 tlcl_extend: response is 0
317 11:34:42.842810 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
318 11:34:42.849329 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
319 11:34:42.855807 BS: verstage times (exec / console): total (unknown) / 142 ms
320 11:34:42.855913
321 11:34:42.855982
322 11:34:42.869182 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
323 11:34:42.875691 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
324 11:34:42.878981 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
325 11:34:42.882495 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
326 11:34:42.889034 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
327 11:34:42.892289 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
328 11:34:42.895418 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
329 11:34:42.898655 TCO_STS: 0000 0000
330 11:34:42.902286 GEN_PMCON: d0015038 00002200
331 11:34:42.905654 GBLRST_CAUSE: 00000000 00000000
332 11:34:42.905751 HPR_CAUSE0: 00000000
333 11:34:42.909178 prev_sleep_state 5
334 11:34:42.912331 Boot Count incremented to 30404
335 11:34:42.918820 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
336 11:34:42.925369 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
337 11:34:42.931884 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
338 11:34:42.938688 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
339 11:34:42.943288 Chrome EC: UHEPI supported
340 11:34:42.950598 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
341 11:34:42.963559 Probing TPM: done!
342 11:34:42.970983 Connected to device vid:did:rid of 1ae0:0028:00
343 11:34:42.981413 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
344 11:34:42.987969 Initialized TPM device CR50 revision 0
345 11:34:42.997581 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
346 11:34:43.004082 MRC: Hash idx 0x100b comparison successful.
347 11:34:43.007872 MRC cache found, size faa8
348 11:34:43.007970 bootmode is set to: 2
349 11:34:43.010742 SPD index = 0
350 11:34:43.017128 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
351 11:34:43.020638 SPD: module type is LPDDR4X
352 11:34:43.023844 SPD: module part number is MT53E512M64D4NW-046
353 11:34:43.030254 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
354 11:34:43.033531 SPD: device width 16 bits, bus width 16 bits
355 11:34:43.040487 SPD: module size is 1024 MB (per channel)
356 11:34:43.472228 CBMEM:
357 11:34:43.475677 IMD: root @ 0x76fff000 254 entries.
358 11:34:43.479023 IMD: root @ 0x76ffec00 62 entries.
359 11:34:43.482256 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
360 11:34:43.489099 FMAP: area RW_VPD found @ f35000 (8192 bytes)
361 11:34:43.492260 External stage cache:
362 11:34:43.495570 IMD: root @ 0x7b3ff000 254 entries.
363 11:34:43.498852 IMD: root @ 0x7b3fec00 62 entries.
364 11:34:43.514361 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
365 11:34:43.521065 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
366 11:34:43.527430 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
367 11:34:43.541111 MRC: 'RECOVERY_MRC_CACHE' does not need update.
368 11:34:43.548047 cse_lite: Skip switching to RW in the recovery path
369 11:34:43.548172 8 DIMMs found
370 11:34:43.548240 SMM Memory Map
371 11:34:43.552061 SMRAM : 0x7b000000 0x800000
372 11:34:43.556218 Subregion 0: 0x7b000000 0x200000
373 11:34:43.559880 Subregion 1: 0x7b200000 0x200000
374 11:34:43.563002 Subregion 2: 0x7b400000 0x400000
375 11:34:43.565903 top_of_ram = 0x77000000
376 11:34:43.572574 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
377 11:34:43.575899 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
378 11:34:43.582558 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
379 11:34:43.586589 MTRR Range: Start=ff000000 End=0 (Size 1000000)
380 11:34:43.592948 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
381 11:34:43.599762 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
382 11:34:43.611781 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
383 11:34:43.618174 Processing 211 relocs. Offset value of 0x74c0b000
384 11:34:43.624696 BS: romstage times (exec / console): total (unknown) / 277 ms
385 11:34:43.630810
386 11:34:43.631334
387 11:34:43.640956 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
388 11:34:43.643718 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
389 11:34:43.653776 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
390 11:34:43.660608 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
391 11:34:43.666983 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
392 11:34:43.673383 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
393 11:34:43.720797 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
394 11:34:43.727264 Processing 5008 relocs. Offset value of 0x75d98000
395 11:34:43.730026 BS: postcar times (exec / console): total (unknown) / 59 ms
396 11:34:43.733641
397 11:34:43.733728
398 11:34:43.743651 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
399 11:34:43.743755 Normal boot
400 11:34:43.746740 FW_CONFIG value is 0x804c02
401 11:34:43.750856 PCI: 00:07.0 disabled by fw_config
402 11:34:43.754223 PCI: 00:07.1 disabled by fw_config
403 11:34:43.757139 PCI: 00:0d.2 disabled by fw_config
404 11:34:43.760368 PCI: 00:1c.7 disabled by fw_config
405 11:34:43.767649 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
406 11:34:43.773781 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
407 11:34:43.777085 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 11:34:43.780344 GENERIC: 0.0 disabled by fw_config
409 11:34:43.784405 GENERIC: 1.0 disabled by fw_config
410 11:34:43.790578 fw_config match found: DB_USB=USB3_ACTIVE
411 11:34:43.793649 fw_config match found: DB_USB=USB3_ACTIVE
412 11:34:43.797485 fw_config match found: DB_USB=USB3_ACTIVE
413 11:34:43.802252 fw_config match found: DB_USB=USB3_ACTIVE
414 11:34:43.807458 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
415 11:34:43.814029 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
416 11:34:43.820288 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
417 11:34:43.830171 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
418 11:34:43.833502 microcode: sig=0x806c1 pf=0x80 revision=0x86
419 11:34:43.840206 microcode: Update skipped, already up-to-date
420 11:34:43.847181 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
421 11:34:43.873808 Detected 4 core, 8 thread CPU.
422 11:34:43.877091 Setting up SMI for CPU
423 11:34:43.880971 IED base = 0x7b400000
424 11:34:43.881056 IED size = 0x00400000
425 11:34:43.883519 Will perform SMM setup.
426 11:34:43.890335 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
427 11:34:43.896819 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
428 11:34:43.903350 Processing 16 relocs. Offset value of 0x00030000
429 11:34:43.906921 Attempting to start 7 APs
430 11:34:43.909906 Waiting for 10ms after sending INIT.
431 11:34:43.925886 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
432 11:34:43.925974 done.
433 11:34:43.929117 AP: slot 7 apic_id 6.
434 11:34:43.932370 AP: slot 3 apic_id 7.
435 11:34:43.936472 Waiting for 2nd SIPI to complete...done.
436 11:34:43.939160 AP: slot 2 apic_id 3.
437 11:34:43.939239 AP: slot 6 apic_id 2.
438 11:34:43.942461 AP: slot 5 apic_id 4.
439 11:34:43.945570 AP: slot 4 apic_id 5.
440 11:34:43.952174 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
441 11:34:43.959455 Processing 13 relocs. Offset value of 0x00038000
442 11:34:43.959537 Unable to locate Global NVS
443 11:34:43.969005 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
444 11:34:43.972389 Installing permanent SMM handler to 0x7b000000
445 11:34:43.982072 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
446 11:34:43.985718 Processing 794 relocs. Offset value of 0x7b010000
447 11:34:43.995591 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
448 11:34:43.998974 Processing 13 relocs. Offset value of 0x7b008000
449 11:34:44.005162 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
450 11:34:44.012398 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
451 11:34:44.015156 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
452 11:34:44.021964 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
453 11:34:44.028521 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
454 11:34:44.034883 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
455 11:34:44.041815 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
456 11:34:44.041895 Unable to locate Global NVS
457 11:34:44.051487 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
458 11:34:44.055958 Clearing SMI status registers
459 11:34:44.056029 SMI_STS: PM1
460 11:34:44.058777 PM1_STS: PWRBTN
461 11:34:44.064921 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
462 11:34:44.068156 In relocation handler: CPU 0
463 11:34:44.072265 New SMBASE=0x7b000000 IEDBASE=0x7b400000
464 11:34:44.078470 Writing SMRR. base = 0x7b000006, mask=0xff800c00
465 11:34:44.078546 Relocation complete.
466 11:34:44.088165 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
467 11:34:44.088238 In relocation handler: CPU 1
468 11:34:44.095482 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
469 11:34:44.095555 Relocation complete.
470 11:34:44.104620 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
471 11:34:44.104697 In relocation handler: CPU 3
472 11:34:44.111759 New SMBASE=0x7afff400 IEDBASE=0x7b400000
473 11:34:44.111838 Relocation complete.
474 11:34:44.121855 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
475 11:34:44.121930 In relocation handler: CPU 7
476 11:34:44.127864 New SMBASE=0x7affe400 IEDBASE=0x7b400000
477 11:34:44.131437 Writing SMRR. base = 0x7b000006, mask=0xff800c00
478 11:34:44.135166 Relocation complete.
479 11:34:44.141112 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
480 11:34:44.145045 In relocation handler: CPU 6
481 11:34:44.148140 New SMBASE=0x7affe800 IEDBASE=0x7b400000
482 11:34:44.154833 Writing SMRR. base = 0x7b000006, mask=0xff800c00
483 11:34:44.154908 Relocation complete.
484 11:34:44.161188 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
485 11:34:44.164802 In relocation handler: CPU 2
486 11:34:44.168288 New SMBASE=0x7afff800 IEDBASE=0x7b400000
487 11:34:44.171665 Relocation complete.
488 11:34:44.177901 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
489 11:34:44.181001 In relocation handler: CPU 5
490 11:34:44.185005 New SMBASE=0x7affec00 IEDBASE=0x7b400000
491 11:34:44.191176 Writing SMRR. base = 0x7b000006, mask=0xff800c00
492 11:34:44.194895 Relocation complete.
493 11:34:44.201119 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
494 11:34:44.204456 In relocation handler: CPU 4
495 11:34:44.207909 New SMBASE=0x7afff000 IEDBASE=0x7b400000
496 11:34:44.211092 Relocation complete.
497 11:34:44.211174 Initializing CPU #0
498 11:34:44.214252 CPU: vendor Intel device 806c1
499 11:34:44.218633 CPU: family 06, model 8c, stepping 01
500 11:34:44.222077 Clearing out pending MCEs
501 11:34:44.225853 Setting up local APIC...
502 11:34:44.225934 apic_id: 0x00 done.
503 11:34:44.229201 Turbo is available but hidden
504 11:34:44.232297 Turbo is available and visible
505 11:34:44.238764 microcode: Update skipped, already up-to-date
506 11:34:44.238846 CPU #0 initialized
507 11:34:44.242194 Initializing CPU #5
508 11:34:44.242275 Initializing CPU #4
509 11:34:44.245277 CPU: vendor Intel device 806c1
510 11:34:44.252075 CPU: family 06, model 8c, stepping 01
511 11:34:44.252157 CPU: vendor Intel device 806c1
512 11:34:44.258784 CPU: family 06, model 8c, stepping 01
513 11:34:44.258867 Clearing out pending MCEs
514 11:34:44.262215 Clearing out pending MCEs
515 11:34:44.265662 Setting up local APIC...
516 11:34:44.268534 Initializing CPU #6
517 11:34:44.268615 Initializing CPU #2
518 11:34:44.272072 CPU: vendor Intel device 806c1
519 11:34:44.275146 CPU: family 06, model 8c, stepping 01
520 11:34:44.278216 CPU: vendor Intel device 806c1
521 11:34:44.281322 CPU: family 06, model 8c, stepping 01
522 11:34:44.285143 Clearing out pending MCEs
523 11:34:44.288403 Clearing out pending MCEs
524 11:34:44.291738 Setting up local APIC...
525 11:34:44.292125 Initializing CPU #7
526 11:34:44.296187 Initializing CPU #3
527 11:34:44.298916 CPU: vendor Intel device 806c1
528 11:34:44.302048 CPU: family 06, model 8c, stepping 01
529 11:34:44.305004 CPU: vendor Intel device 806c1
530 11:34:44.308706 CPU: family 06, model 8c, stepping 01
531 11:34:44.312538 Clearing out pending MCEs
532 11:34:44.314975 Clearing out pending MCEs
533 11:34:44.318501 Setting up local APIC...
534 11:34:44.319028 Setting up local APIC...
535 11:34:44.321867 Setting up local APIC...
536 11:34:44.325530 apic_id: 0x02 done.
537 11:34:44.325969 apic_id: 0x03 done.
538 11:34:44.331769 microcode: Update skipped, already up-to-date
539 11:34:44.335150 microcode: Update skipped, already up-to-date
540 11:34:44.339156 CPU #6 initialized
541 11:34:44.339592 CPU #2 initialized
542 11:34:44.342038 apic_id: 0x06 done.
543 11:34:44.345299 apic_id: 0x07 done.
544 11:34:44.348679 microcode: Update skipped, already up-to-date
545 11:34:44.351545 microcode: Update skipped, already up-to-date
546 11:34:44.355533 CPU #7 initialized
547 11:34:44.358266 CPU #3 initialized
548 11:34:44.358741 Setting up local APIC...
549 11:34:44.361626 Initializing CPU #1
550 11:34:44.364702 apic_id: 0x05 done.
551 11:34:44.364931 apic_id: 0x04 done.
552 11:34:44.369047 CPU: vendor Intel device 806c1
553 11:34:44.371469 CPU: family 06, model 8c, stepping 01
554 11:34:44.375004 Clearing out pending MCEs
555 11:34:44.381133 microcode: Update skipped, already up-to-date
556 11:34:44.384502 microcode: Update skipped, already up-to-date
557 11:34:44.384636 CPU #5 initialized
558 11:34:44.388343 Setting up local APIC...
559 11:34:44.392056 CPU #4 initialized
560 11:34:44.392161 apic_id: 0x01 done.
561 11:34:44.397924 microcode: Update skipped, already up-to-date
562 11:34:44.401374 CPU #1 initialized
563 11:34:44.404743 bsp_do_flight_plan done after 464 msecs.
564 11:34:44.407927 CPU: frequency set to 4000 MHz
565 11:34:44.408010 Enabling SMIs.
566 11:34:44.414145 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
567 11:34:44.431126 SATAXPCIE1 indicates PCIe NVMe is present
568 11:34:44.434126 Probing TPM: done!
569 11:34:44.437799 Connected to device vid:did:rid of 1ae0:0028:00
570 11:34:44.448059 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
571 11:34:44.451346 Initialized TPM device CR50 revision 0
572 11:34:44.455257 Enabling S0i3.4
573 11:34:44.461784 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
574 11:34:44.464609 Found a VBT of 8704 bytes after decompression
575 11:34:44.471965 cse_lite: CSE RO boot. HybridStorageMode disabled
576 11:34:44.478994 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
577 11:34:44.554297 FSPS returned 0
578 11:34:44.557255 Executing Phase 1 of FspMultiPhaseSiInit
579 11:34:44.567352 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
580 11:34:44.570611 port C0 DISC req: usage 1 usb3 1 usb2 5
581 11:34:44.574049 Raw Buffer output 0 00000511
582 11:34:44.576989 Raw Buffer output 1 00000000
583 11:34:44.580953 pmc_send_ipc_cmd succeeded
584 11:34:44.588035 port C1 DISC req: usage 1 usb3 2 usb2 3
585 11:34:44.588230 Raw Buffer output 0 00000321
586 11:34:44.590967 Raw Buffer output 1 00000000
587 11:34:44.594910 pmc_send_ipc_cmd succeeded
588 11:34:44.600083 Detected 4 core, 8 thread CPU.
589 11:34:44.603275 Detected 4 core, 8 thread CPU.
590 11:34:44.837581 Display FSP Version Info HOB
591 11:34:44.840654 Reference Code - CPU = a.0.4c.31
592 11:34:44.843867 uCode Version = 0.0.0.86
593 11:34:44.848468 TXT ACM version = ff.ff.ff.ffff
594 11:34:44.850869 Reference Code - ME = a.0.4c.31
595 11:34:44.854098 MEBx version = 0.0.0.0
596 11:34:44.857449 ME Firmware Version = Consumer SKU
597 11:34:44.861249 Reference Code - PCH = a.0.4c.31
598 11:34:44.863839 PCH-CRID Status = Disabled
599 11:34:44.867476 PCH-CRID Original Value = ff.ff.ff.ffff
600 11:34:44.870774 PCH-CRID New Value = ff.ff.ff.ffff
601 11:34:44.874637 OPROM - RST - RAID = ff.ff.ff.ffff
602 11:34:44.877424 PCH Hsio Version = 4.0.0.0
603 11:34:44.880667 Reference Code - SA - System Agent = a.0.4c.31
604 11:34:44.884118 Reference Code - MRC = 2.0.0.1
605 11:34:44.887137 SA - PCIe Version = a.0.4c.31
606 11:34:44.890715 SA-CRID Status = Disabled
607 11:34:44.893844 SA-CRID Original Value = 0.0.0.1
608 11:34:44.897445 SA-CRID New Value = 0.0.0.1
609 11:34:44.900804 OPROM - VBIOS = ff.ff.ff.ffff
610 11:34:44.903914 IO Manageability Engine FW Version = 11.1.4.0
611 11:34:44.907451 PHY Build Version = 0.0.0.e0
612 11:34:44.910641 Thunderbolt(TM) FW Version = 0.0.0.0
613 11:34:44.917582 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
614 11:34:44.920649 ITSS IRQ Polarities Before:
615 11:34:44.921146 IPC0: 0xffffffff
616 11:34:44.924355 IPC1: 0xffffffff
617 11:34:44.924715 IPC2: 0xffffffff
618 11:34:44.927498 IPC3: 0xffffffff
619 11:34:44.931029 ITSS IRQ Polarities After:
620 11:34:44.931456 IPC0: 0xffffffff
621 11:34:44.934648 IPC1: 0xffffffff
622 11:34:44.935165 IPC2: 0xffffffff
623 11:34:44.937473 IPC3: 0xffffffff
624 11:34:44.941212 Found PCIe Root Port #9 at PCI: 00:1d.0.
625 11:34:44.954547 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
626 11:34:44.964388 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
627 11:34:44.977576 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
628 11:34:44.983617 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
629 11:34:44.984125 Enumerating buses...
630 11:34:44.990584 Show all devs... Before device enumeration.
631 11:34:44.995165 Root Device: enabled 1
632 11:34:44.995679 DOMAIN: 0000: enabled 1
633 11:34:44.997277 CPU_CLUSTER: 0: enabled 1
634 11:34:45.000354 PCI: 00:00.0: enabled 1
635 11:34:45.003654 PCI: 00:02.0: enabled 1
636 11:34:45.004382 PCI: 00:04.0: enabled 1
637 11:34:45.007816 PCI: 00:05.0: enabled 1
638 11:34:45.010215 PCI: 00:06.0: enabled 0
639 11:34:45.010716 PCI: 00:07.0: enabled 0
640 11:34:45.014252 PCI: 00:07.1: enabled 0
641 11:34:45.017811 PCI: 00:07.2: enabled 0
642 11:34:45.020327 PCI: 00:07.3: enabled 0
643 11:34:45.021042 PCI: 00:08.0: enabled 1
644 11:34:45.023403 PCI: 00:09.0: enabled 0
645 11:34:45.027161 PCI: 00:0a.0: enabled 0
646 11:34:45.030143 PCI: 00:0d.0: enabled 1
647 11:34:45.030616 PCI: 00:0d.1: enabled 0
648 11:34:45.033833 PCI: 00:0d.2: enabled 0
649 11:34:45.036986 PCI: 00:0d.3: enabled 0
650 11:34:45.041504 PCI: 00:0e.0: enabled 0
651 11:34:45.042045 PCI: 00:10.2: enabled 1
652 11:34:45.043882 PCI: 00:10.6: enabled 0
653 11:34:45.047077 PCI: 00:10.7: enabled 0
654 11:34:45.047499 PCI: 00:12.0: enabled 0
655 11:34:45.050456 PCI: 00:12.6: enabled 0
656 11:34:45.053384 PCI: 00:13.0: enabled 0
657 11:34:45.056823 PCI: 00:14.0: enabled 1
658 11:34:45.057239 PCI: 00:14.1: enabled 0
659 11:34:45.060275 PCI: 00:14.2: enabled 1
660 11:34:45.064164 PCI: 00:14.3: enabled 1
661 11:34:45.066641 PCI: 00:15.0: enabled 1
662 11:34:45.067068 PCI: 00:15.1: enabled 1
663 11:34:45.070023 PCI: 00:15.2: enabled 1
664 11:34:45.073448 PCI: 00:15.3: enabled 1
665 11:34:45.076704 PCI: 00:16.0: enabled 1
666 11:34:45.077141 PCI: 00:16.1: enabled 0
667 11:34:45.080351 PCI: 00:16.2: enabled 0
668 11:34:45.083238 PCI: 00:16.3: enabled 0
669 11:34:45.086806 PCI: 00:16.4: enabled 0
670 11:34:45.087232 PCI: 00:16.5: enabled 0
671 11:34:45.090371 PCI: 00:17.0: enabled 1
672 11:34:45.093515 PCI: 00:19.0: enabled 0
673 11:34:45.093997 PCI: 00:19.1: enabled 1
674 11:34:45.096538 PCI: 00:19.2: enabled 0
675 11:34:45.099975 PCI: 00:1c.0: enabled 1
676 11:34:45.103302 PCI: 00:1c.1: enabled 0
677 11:34:45.103717 PCI: 00:1c.2: enabled 0
678 11:34:45.106457 PCI: 00:1c.3: enabled 0
679 11:34:45.109904 PCI: 00:1c.4: enabled 0
680 11:34:45.113438 PCI: 00:1c.5: enabled 0
681 11:34:45.114007 PCI: 00:1c.6: enabled 1
682 11:34:45.116828 PCI: 00:1c.7: enabled 0
683 11:34:45.120295 PCI: 00:1d.0: enabled 1
684 11:34:45.123543 PCI: 00:1d.1: enabled 0
685 11:34:45.123966 PCI: 00:1d.2: enabled 1
686 11:34:45.126592 PCI: 00:1d.3: enabled 0
687 11:34:45.129561 PCI: 00:1e.0: enabled 1
688 11:34:45.133389 PCI: 00:1e.1: enabled 0
689 11:34:45.133813 PCI: 00:1e.2: enabled 1
690 11:34:45.136700 PCI: 00:1e.3: enabled 1
691 11:34:45.140758 PCI: 00:1f.0: enabled 1
692 11:34:45.141290 PCI: 00:1f.1: enabled 0
693 11:34:45.143307 PCI: 00:1f.2: enabled 1
694 11:34:45.146574 PCI: 00:1f.3: enabled 1
695 11:34:45.150037 PCI: 00:1f.4: enabled 0
696 11:34:45.150616 PCI: 00:1f.5: enabled 1
697 11:34:45.153188 PCI: 00:1f.6: enabled 0
698 11:34:45.156432 PCI: 00:1f.7: enabled 0
699 11:34:45.159814 APIC: 00: enabled 1
700 11:34:45.160243 GENERIC: 0.0: enabled 1
701 11:34:45.162983 GENERIC: 0.0: enabled 1
702 11:34:45.166367 GENERIC: 1.0: enabled 1
703 11:34:45.166836 GENERIC: 0.0: enabled 1
704 11:34:45.169640 GENERIC: 1.0: enabled 1
705 11:34:45.173199 USB0 port 0: enabled 1
706 11:34:45.176497 GENERIC: 0.0: enabled 1
707 11:34:45.177027 USB0 port 0: enabled 1
708 11:34:45.179474 GENERIC: 0.0: enabled 1
709 11:34:45.183009 I2C: 00:1a: enabled 1
710 11:34:45.183438 I2C: 00:31: enabled 1
711 11:34:45.186368 I2C: 00:32: enabled 1
712 11:34:45.189869 I2C: 00:10: enabled 1
713 11:34:45.190295 I2C: 00:15: enabled 1
714 11:34:45.192769 GENERIC: 0.0: enabled 0
715 11:34:45.196426 GENERIC: 1.0: enabled 0
716 11:34:45.199900 GENERIC: 0.0: enabled 1
717 11:34:45.200320 SPI: 00: enabled 1
718 11:34:45.203110 SPI: 00: enabled 1
719 11:34:45.206504 PNP: 0c09.0: enabled 1
720 11:34:45.207029 GENERIC: 0.0: enabled 1
721 11:34:45.209511 USB3 port 0: enabled 1
722 11:34:45.213276 USB3 port 1: enabled 1
723 11:34:45.213700 USB3 port 2: enabled 0
724 11:34:45.216539 USB3 port 3: enabled 0
725 11:34:45.219489 USB2 port 0: enabled 0
726 11:34:45.223184 USB2 port 1: enabled 1
727 11:34:45.223610 USB2 port 2: enabled 1
728 11:34:45.226882 USB2 port 3: enabled 0
729 11:34:45.229834 USB2 port 4: enabled 1
730 11:34:45.230345 USB2 port 5: enabled 0
731 11:34:45.233152 USB2 port 6: enabled 0
732 11:34:45.236567 USB2 port 7: enabled 0
733 11:34:45.237096 USB2 port 8: enabled 0
734 11:34:45.239479 USB2 port 9: enabled 0
735 11:34:45.243202 USB3 port 0: enabled 0
736 11:34:45.246167 USB3 port 1: enabled 1
737 11:34:45.246654 USB3 port 2: enabled 0
738 11:34:45.249844 USB3 port 3: enabled 0
739 11:34:45.253077 GENERIC: 0.0: enabled 1
740 11:34:45.253618 GENERIC: 1.0: enabled 1
741 11:34:45.257379 APIC: 01: enabled 1
742 11:34:45.260138 APIC: 03: enabled 1
743 11:34:45.260607 APIC: 07: enabled 1
744 11:34:45.262470 APIC: 05: enabled 1
745 11:34:45.266901 APIC: 04: enabled 1
746 11:34:45.267429 APIC: 02: enabled 1
747 11:34:45.269693 APIC: 06: enabled 1
748 11:34:45.270293 Compare with tree...
749 11:34:45.272864 Root Device: enabled 1
750 11:34:45.276954 DOMAIN: 0000: enabled 1
751 11:34:45.280058 PCI: 00:00.0: enabled 1
752 11:34:45.280526 PCI: 00:02.0: enabled 1
753 11:34:45.283568 PCI: 00:04.0: enabled 1
754 11:34:45.286034 GENERIC: 0.0: enabled 1
755 11:34:45.289564 PCI: 00:05.0: enabled 1
756 11:34:45.293074 PCI: 00:06.0: enabled 0
757 11:34:45.293602 PCI: 00:07.0: enabled 0
758 11:34:45.296353 GENERIC: 0.0: enabled 1
759 11:34:45.299364 PCI: 00:07.1: enabled 0
760 11:34:45.303094 GENERIC: 1.0: enabled 1
761 11:34:45.306552 PCI: 00:07.2: enabled 0
762 11:34:45.309274 GENERIC: 0.0: enabled 1
763 11:34:45.309700 PCI: 00:07.3: enabled 0
764 11:34:45.313015 GENERIC: 1.0: enabled 1
765 11:34:45.316292 PCI: 00:08.0: enabled 1
766 11:34:45.319569 PCI: 00:09.0: enabled 0
767 11:34:45.322472 PCI: 00:0a.0: enabled 0
768 11:34:45.323003 PCI: 00:0d.0: enabled 1
769 11:34:45.325858 USB0 port 0: enabled 1
770 11:34:45.329390 USB3 port 0: enabled 1
771 11:34:45.333125 USB3 port 1: enabled 1
772 11:34:45.335822 USB3 port 2: enabled 0
773 11:34:45.336247 USB3 port 3: enabled 0
774 11:34:45.339064 PCI: 00:0d.1: enabled 0
775 11:34:45.342858 PCI: 00:0d.2: enabled 0
776 11:34:45.346158 GENERIC: 0.0: enabled 1
777 11:34:45.349242 PCI: 00:0d.3: enabled 0
778 11:34:45.349765 PCI: 00:0e.0: enabled 0
779 11:34:45.352607 PCI: 00:10.2: enabled 1
780 11:34:45.355877 PCI: 00:10.6: enabled 0
781 11:34:45.359216 PCI: 00:10.7: enabled 0
782 11:34:45.362723 PCI: 00:12.0: enabled 0
783 11:34:45.363144 PCI: 00:12.6: enabled 0
784 11:34:45.365915 PCI: 00:13.0: enabled 0
785 11:34:45.369391 PCI: 00:14.0: enabled 1
786 11:34:45.373079 USB0 port 0: enabled 1
787 11:34:45.375920 USB2 port 0: enabled 0
788 11:34:45.376483 USB2 port 1: enabled 1
789 11:34:45.379202 USB2 port 2: enabled 1
790 11:34:45.382613 USB2 port 3: enabled 0
791 11:34:45.385648 USB2 port 4: enabled 1
792 11:34:45.389164 USB2 port 5: enabled 0
793 11:34:45.392684 USB2 port 6: enabled 0
794 11:34:45.393201 USB2 port 7: enabled 0
795 11:34:45.395560 USB2 port 8: enabled 0
796 11:34:45.399224 USB2 port 9: enabled 0
797 11:34:45.402979 USB3 port 0: enabled 0
798 11:34:45.405957 USB3 port 1: enabled 1
799 11:34:45.406547 USB3 port 2: enabled 0
800 11:34:45.409181 USB3 port 3: enabled 0
801 11:34:45.412325 PCI: 00:14.1: enabled 0
802 11:34:45.416029 PCI: 00:14.2: enabled 1
803 11:34:45.419155 PCI: 00:14.3: enabled 1
804 11:34:45.423126 GENERIC: 0.0: enabled 1
805 11:34:45.423644 PCI: 00:15.0: enabled 1
806 11:34:45.425814 I2C: 00:1a: enabled 1
807 11:34:45.428707 I2C: 00:31: enabled 1
808 11:34:45.432289 I2C: 00:32: enabled 1
809 11:34:45.432949 PCI: 00:15.1: enabled 1
810 11:34:45.435657 I2C: 00:10: enabled 1
811 11:34:45.438666 PCI: 00:15.2: enabled 1
812 11:34:45.442542 PCI: 00:15.3: enabled 1
813 11:34:45.445593 PCI: 00:16.0: enabled 1
814 11:34:45.446119 PCI: 00:16.1: enabled 0
815 11:34:45.448955 PCI: 00:16.2: enabled 0
816 11:34:45.452541 PCI: 00:16.3: enabled 0
817 11:34:45.455641 PCI: 00:16.4: enabled 0
818 11:34:45.459355 PCI: 00:16.5: enabled 0
819 11:34:45.459924 PCI: 00:17.0: enabled 1
820 11:34:45.463698 PCI: 00:19.0: enabled 0
821 11:34:45.465661 PCI: 00:19.1: enabled 1
822 11:34:45.469375 I2C: 00:15: enabled 1
823 11:34:45.469907 PCI: 00:19.2: enabled 0
824 11:34:45.472618 PCI: 00:1d.0: enabled 1
825 11:34:45.475978 GENERIC: 0.0: enabled 1
826 11:34:45.479548 PCI: 00:1e.0: enabled 1
827 11:34:45.529425 PCI: 00:1e.1: enabled 0
828 11:34:45.529998 PCI: 00:1e.2: enabled 1
829 11:34:45.530366 SPI: 00: enabled 1
830 11:34:45.530784 PCI: 00:1e.3: enabled 1
831 11:34:45.531117 SPI: 00: enabled 1
832 11:34:45.531441 PCI: 00:1f.0: enabled 1
833 11:34:45.532113 PNP: 0c09.0: enabled 1
834 11:34:45.532461 PCI: 00:1f.1: enabled 0
835 11:34:45.532780 PCI: 00:1f.2: enabled 1
836 11:34:45.533089 GENERIC: 0.0: enabled 1
837 11:34:45.533395 GENERIC: 0.0: enabled 1
838 11:34:45.533808 GENERIC: 1.0: enabled 1
839 11:34:45.534116 PCI: 00:1f.3: enabled 1
840 11:34:45.534458 PCI: 00:1f.4: enabled 0
841 11:34:45.534826 PCI: 00:1f.5: enabled 1
842 11:34:45.535135 PCI: 00:1f.6: enabled 0
843 11:34:45.535441 PCI: 00:1f.7: enabled 0
844 11:34:45.535742 CPU_CLUSTER: 0: enabled 1
845 11:34:45.536043 APIC: 00: enabled 1
846 11:34:45.536342 APIC: 01: enabled 1
847 11:34:45.536709 APIC: 03: enabled 1
848 11:34:45.537024 APIC: 07: enabled 1
849 11:34:45.537407 APIC: 05: enabled 1
850 11:34:45.538603 APIC: 04: enabled 1
851 11:34:45.542133 APIC: 02: enabled 1
852 11:34:45.542643 APIC: 06: enabled 1
853 11:34:45.546676 Root Device scanning...
854 11:34:45.549923 scan_static_bus for Root Device
855 11:34:45.553417 DOMAIN: 0000 enabled
856 11:34:45.556831 CPU_CLUSTER: 0 enabled
857 11:34:45.557391 DOMAIN: 0000 scanning...
858 11:34:45.559994 PCI: pci_scan_bus for bus 00
859 11:34:45.563152 PCI: 00:00.0 [8086/0000] ops
860 11:34:45.566908 PCI: 00:00.0 [8086/9a12] enabled
861 11:34:45.569924 PCI: 00:02.0 [8086/0000] bus ops
862 11:34:45.573704 PCI: 00:02.0 [8086/9a40] enabled
863 11:34:45.577040 PCI: 00:04.0 [8086/0000] bus ops
864 11:34:45.579881 PCI: 00:04.0 [8086/9a03] enabled
865 11:34:45.583537 PCI: 00:05.0 [8086/9a19] enabled
866 11:34:45.587020 PCI: 00:07.0 [0000/0000] hidden
867 11:34:45.590076 PCI: 00:08.0 [8086/9a11] enabled
868 11:34:45.593667 PCI: 00:0a.0 [8086/9a0d] disabled
869 11:34:45.596651 PCI: 00:0d.0 [8086/0000] bus ops
870 11:34:45.600022 PCI: 00:0d.0 [8086/9a13] enabled
871 11:34:45.603380 PCI: 00:14.0 [8086/0000] bus ops
872 11:34:45.606312 PCI: 00:14.0 [8086/a0ed] enabled
873 11:34:45.609666 PCI: 00:14.2 [8086/a0ef] enabled
874 11:34:45.613128 PCI: 00:14.3 [8086/0000] bus ops
875 11:34:45.616132 PCI: 00:14.3 [8086/a0f0] enabled
876 11:34:45.619888 PCI: 00:15.0 [8086/0000] bus ops
877 11:34:45.623024 PCI: 00:15.0 [8086/a0e8] enabled
878 11:34:45.627173 PCI: 00:15.1 [8086/0000] bus ops
879 11:34:45.629422 PCI: 00:15.1 [8086/a0e9] enabled
880 11:34:45.632985 PCI: 00:15.2 [8086/0000] bus ops
881 11:34:45.636387 PCI: 00:15.2 [8086/a0ea] enabled
882 11:34:45.639303 PCI: 00:15.3 [8086/0000] bus ops
883 11:34:45.643051 PCI: 00:15.3 [8086/a0eb] enabled
884 11:34:45.646345 PCI: 00:16.0 [8086/0000] ops
885 11:34:45.649752 PCI: 00:16.0 [8086/a0e0] enabled
886 11:34:45.656571 PCI: Static device PCI: 00:17.0 not found, disabling it.
887 11:34:45.659387 PCI: 00:19.0 [8086/0000] bus ops
888 11:34:45.662986 PCI: 00:19.0 [8086/a0c5] disabled
889 11:34:45.666255 PCI: 00:19.1 [8086/0000] bus ops
890 11:34:45.669494 PCI: 00:19.1 [8086/a0c6] enabled
891 11:34:45.672988 PCI: 00:1d.0 [8086/0000] bus ops
892 11:34:45.676422 PCI: 00:1d.0 [8086/a0b0] enabled
893 11:34:45.680216 PCI: 00:1e.0 [8086/0000] ops
894 11:34:45.683047 PCI: 00:1e.0 [8086/a0a8] enabled
895 11:34:45.686545 PCI: 00:1e.2 [8086/0000] bus ops
896 11:34:45.689605 PCI: 00:1e.2 [8086/a0aa] enabled
897 11:34:45.692537 PCI: 00:1e.3 [8086/0000] bus ops
898 11:34:45.696063 PCI: 00:1e.3 [8086/a0ab] enabled
899 11:34:45.699321 PCI: 00:1f.0 [8086/0000] bus ops
900 11:34:45.702952 PCI: 00:1f.0 [8086/a087] enabled
901 11:34:45.703369 RTC Init
902 11:34:45.706535 Set power on after power failure.
903 11:34:45.709190 Disabling Deep S3
904 11:34:45.712347 Disabling Deep S3
905 11:34:45.712761 Disabling Deep S4
906 11:34:45.716047 Disabling Deep S4
907 11:34:45.716460 Disabling Deep S5
908 11:34:45.718984 Disabling Deep S5
909 11:34:45.723054 PCI: 00:1f.2 [0000/0000] hidden
910 11:34:45.725745 PCI: 00:1f.3 [8086/0000] bus ops
911 11:34:45.729382 PCI: 00:1f.3 [8086/a0c8] enabled
912 11:34:45.732595 PCI: 00:1f.5 [8086/0000] bus ops
913 11:34:45.736013 PCI: 00:1f.5 [8086/a0a4] enabled
914 11:34:45.739355 PCI: Leftover static devices:
915 11:34:45.739769 PCI: 00:10.2
916 11:34:45.742698 PCI: 00:10.6
917 11:34:45.743113 PCI: 00:10.7
918 11:34:45.743439 PCI: 00:06.0
919 11:34:45.746058 PCI: 00:07.1
920 11:34:45.746612 PCI: 00:07.2
921 11:34:45.749394 PCI: 00:07.3
922 11:34:45.749902 PCI: 00:09.0
923 11:34:45.750230 PCI: 00:0d.1
924 11:34:45.752680 PCI: 00:0d.2
925 11:34:45.753203 PCI: 00:0d.3
926 11:34:45.756167 PCI: 00:0e.0
927 11:34:45.756583 PCI: 00:12.0
928 11:34:45.756909 PCI: 00:12.6
929 11:34:45.759081 PCI: 00:13.0
930 11:34:45.759498 PCI: 00:14.1
931 11:34:45.762545 PCI: 00:16.1
932 11:34:45.763050 PCI: 00:16.2
933 11:34:45.766508 PCI: 00:16.3
934 11:34:45.767022 PCI: 00:16.4
935 11:34:45.767349 PCI: 00:16.5
936 11:34:45.769304 PCI: 00:17.0
937 11:34:45.769809 PCI: 00:19.2
938 11:34:45.772845 PCI: 00:1e.1
939 11:34:45.773354 PCI: 00:1f.1
940 11:34:45.773684 PCI: 00:1f.4
941 11:34:45.776412 PCI: 00:1f.6
942 11:34:45.776938 PCI: 00:1f.7
943 11:34:45.779194 PCI: Check your devicetree.cb.
944 11:34:45.783240 PCI: 00:02.0 scanning...
945 11:34:45.786052 scan_generic_bus for PCI: 00:02.0
946 11:34:45.789616 scan_generic_bus for PCI: 00:02.0 done
947 11:34:45.795799 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
948 11:34:45.796300 PCI: 00:04.0 scanning...
949 11:34:45.799583 scan_generic_bus for PCI: 00:04.0
950 11:34:45.802523 GENERIC: 0.0 enabled
951 11:34:45.809428 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
952 11:34:45.812475 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
953 11:34:45.815550 PCI: 00:0d.0 scanning...
954 11:34:45.818899 scan_static_bus for PCI: 00:0d.0
955 11:34:45.822614 USB0 port 0 enabled
956 11:34:45.825704 USB0 port 0 scanning...
957 11:34:45.829285 scan_static_bus for USB0 port 0
958 11:34:45.829700 USB3 port 0 enabled
959 11:34:45.832299 USB3 port 1 enabled
960 11:34:45.836133 USB3 port 2 disabled
961 11:34:45.836552 USB3 port 3 disabled
962 11:34:45.839770 USB3 port 0 scanning...
963 11:34:45.842432 scan_static_bus for USB3 port 0
964 11:34:45.845972 scan_static_bus for USB3 port 0 done
965 11:34:45.849416 scan_bus: bus USB3 port 0 finished in 6 msecs
966 11:34:45.852774 USB3 port 1 scanning...
967 11:34:45.855784 scan_static_bus for USB3 port 1
968 11:34:45.858620 scan_static_bus for USB3 port 1 done
969 11:34:45.866045 scan_bus: bus USB3 port 1 finished in 6 msecs
970 11:34:45.869208 scan_static_bus for USB0 port 0 done
971 11:34:45.871985 scan_bus: bus USB0 port 0 finished in 43 msecs
972 11:34:45.875314 scan_static_bus for PCI: 00:0d.0 done
973 11:34:45.882079 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
974 11:34:45.885879 PCI: 00:14.0 scanning...
975 11:34:45.888515 scan_static_bus for PCI: 00:14.0
976 11:34:45.888936 USB0 port 0 enabled
977 11:34:45.892250 USB0 port 0 scanning...
978 11:34:45.895252 scan_static_bus for USB0 port 0
979 11:34:45.898822 USB2 port 0 disabled
980 11:34:45.899386 USB2 port 1 enabled
981 11:34:45.901771 USB2 port 2 enabled
982 11:34:45.905531 USB2 port 3 disabled
983 11:34:45.906111 USB2 port 4 enabled
984 11:34:45.908551 USB2 port 5 disabled
985 11:34:45.912437 USB2 port 6 disabled
986 11:34:45.912889 USB2 port 7 disabled
987 11:34:45.915361 USB2 port 8 disabled
988 11:34:45.915859 USB2 port 9 disabled
989 11:34:45.918707 USB3 port 0 disabled
990 11:34:45.922507 USB3 port 1 enabled
991 11:34:45.923034 USB3 port 2 disabled
992 11:34:45.925308 USB3 port 3 disabled
993 11:34:45.928387 USB2 port 1 scanning...
994 11:34:45.931568 scan_static_bus for USB2 port 1
995 11:34:45.935090 scan_static_bus for USB2 port 1 done
996 11:34:45.938961 scan_bus: bus USB2 port 1 finished in 6 msecs
997 11:34:45.942130 USB2 port 2 scanning...
998 11:34:45.945623 scan_static_bus for USB2 port 2
999 11:34:45.949417 scan_static_bus for USB2 port 2 done
1000 11:34:45.955099 scan_bus: bus USB2 port 2 finished in 6 msecs
1001 11:34:45.955620 USB2 port 4 scanning...
1002 11:34:45.958295 scan_static_bus for USB2 port 4
1003 11:34:45.965642 scan_static_bus for USB2 port 4 done
1004 11:34:45.968162 scan_bus: bus USB2 port 4 finished in 6 msecs
1005 11:34:45.971836 USB3 port 1 scanning...
1006 11:34:45.974861 scan_static_bus for USB3 port 1
1007 11:34:45.978790 scan_static_bus for USB3 port 1 done
1008 11:34:45.981520 scan_bus: bus USB3 port 1 finished in 6 msecs
1009 11:34:45.984919 scan_static_bus for USB0 port 0 done
1010 11:34:45.991581 scan_bus: bus USB0 port 0 finished in 93 msecs
1011 11:34:45.994805 scan_static_bus for PCI: 00:14.0 done
1012 11:34:45.998052 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1013 11:34:46.000860 PCI: 00:14.3 scanning...
1014 11:34:46.004988 scan_static_bus for PCI: 00:14.3
1015 11:34:46.007586 GENERIC: 0.0 enabled
1016 11:34:46.011010 scan_static_bus for PCI: 00:14.3 done
1017 11:34:46.014641 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1018 11:34:46.017446 PCI: 00:15.0 scanning...
1019 11:34:46.021103 scan_static_bus for PCI: 00:15.0
1020 11:34:46.024472 I2C: 00:1a enabled
1021 11:34:46.028169 I2C: 00:31 enabled
1022 11:34:46.028637 I2C: 00:32 enabled
1023 11:34:46.030588 scan_static_bus for PCI: 00:15.0 done
1024 11:34:46.037599 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1025 11:34:46.041675 PCI: 00:15.1 scanning...
1026 11:34:46.042345 scan_static_bus for PCI: 00:15.1
1027 11:34:46.045449 I2C: 00:10 enabled
1028 11:34:46.047982 scan_static_bus for PCI: 00:15.1 done
1029 11:34:46.051211 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1030 11:34:46.054700 PCI: 00:15.2 scanning...
1031 11:34:46.058628 scan_static_bus for PCI: 00:15.2
1032 11:34:46.061914 scan_static_bus for PCI: 00:15.2 done
1033 11:34:46.068293 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1034 11:34:46.071588 PCI: 00:15.3 scanning...
1035 11:34:46.074724 scan_static_bus for PCI: 00:15.3
1036 11:34:46.078534 scan_static_bus for PCI: 00:15.3 done
1037 11:34:46.082566 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1038 11:34:46.084681 PCI: 00:19.1 scanning...
1039 11:34:46.088287 scan_static_bus for PCI: 00:19.1
1040 11:34:46.091263 I2C: 00:15 enabled
1041 11:34:46.094988 scan_static_bus for PCI: 00:19.1 done
1042 11:34:46.098283 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1043 11:34:46.101272 PCI: 00:1d.0 scanning...
1044 11:34:46.104501 do_pci_scan_bridge for PCI: 00:1d.0
1045 11:34:46.107836 PCI: pci_scan_bus for bus 01
1046 11:34:46.111345 PCI: 01:00.0 [1c5c/174a] enabled
1047 11:34:46.115129 GENERIC: 0.0 enabled
1048 11:34:46.117785 Enabling Common Clock Configuration
1049 11:34:46.121172 L1 Sub-State supported from root port 29
1050 11:34:46.124712 L1 Sub-State Support = 0xf
1051 11:34:46.128251 CommonModeRestoreTime = 0x28
1052 11:34:46.131062 Power On Value = 0x16, Power On Scale = 0x0
1053 11:34:46.134888 ASPM: Enabled L1
1054 11:34:46.137800 PCIe: Max_Payload_Size adjusted to 128
1055 11:34:46.141255 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1056 11:34:46.144128 PCI: 00:1e.2 scanning...
1057 11:34:46.148743 scan_generic_bus for PCI: 00:1e.2
1058 11:34:46.151254 SPI: 00 enabled
1059 11:34:46.157491 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1060 11:34:46.161044 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1061 11:34:46.164519 PCI: 00:1e.3 scanning...
1062 11:34:46.167565 scan_generic_bus for PCI: 00:1e.3
1063 11:34:46.168086 SPI: 00 enabled
1064 11:34:46.174703 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1065 11:34:46.181341 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1066 11:34:46.181903 PCI: 00:1f.0 scanning...
1067 11:34:46.184185 scan_static_bus for PCI: 00:1f.0
1068 11:34:46.188300 PNP: 0c09.0 enabled
1069 11:34:46.191130 PNP: 0c09.0 scanning...
1070 11:34:46.194362 scan_static_bus for PNP: 0c09.0
1071 11:34:46.198032 scan_static_bus for PNP: 0c09.0 done
1072 11:34:46.201310 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1073 11:34:46.207751 scan_static_bus for PCI: 00:1f.0 done
1074 11:34:46.210783 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1075 11:34:46.214225 PCI: 00:1f.2 scanning...
1076 11:34:46.217405 scan_static_bus for PCI: 00:1f.2
1077 11:34:46.217863 GENERIC: 0.0 enabled
1078 11:34:46.220832 GENERIC: 0.0 scanning...
1079 11:34:46.223646 scan_static_bus for GENERIC: 0.0
1080 11:34:46.227344 GENERIC: 0.0 enabled
1081 11:34:46.230538 GENERIC: 1.0 enabled
1082 11:34:46.234172 scan_static_bus for GENERIC: 0.0 done
1083 11:34:46.237527 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1084 11:34:46.240786 scan_static_bus for PCI: 00:1f.2 done
1085 11:34:46.246992 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1086 11:34:46.250830 PCI: 00:1f.3 scanning...
1087 11:34:46.253782 scan_static_bus for PCI: 00:1f.3
1088 11:34:46.257410 scan_static_bus for PCI: 00:1f.3 done
1089 11:34:46.260801 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1090 11:34:46.263598 PCI: 00:1f.5 scanning...
1091 11:34:46.267432 scan_generic_bus for PCI: 00:1f.5
1092 11:34:46.270507 scan_generic_bus for PCI: 00:1f.5 done
1093 11:34:46.277119 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1094 11:34:46.280438 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1095 11:34:46.283821 scan_static_bus for Root Device done
1096 11:34:46.290126 scan_bus: bus Root Device finished in 737 msecs
1097 11:34:46.290812 done
1098 11:34:46.296636 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1099 11:34:46.300250 Chrome EC: UHEPI supported
1100 11:34:46.307315 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1101 11:34:46.314441 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1102 11:34:46.316871 SPI flash protection: WPSW=0 SRP0=0
1103 11:34:46.320112 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1104 11:34:46.327245 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1105 11:34:46.330185 found VGA at PCI: 00:02.0
1106 11:34:46.333959 Setting up VGA for PCI: 00:02.0
1107 11:34:46.337246 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1108 11:34:46.344163 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1109 11:34:46.346801 Allocating resources...
1110 11:34:46.347256 Reading resources...
1111 11:34:46.353402 Root Device read_resources bus 0 link: 0
1112 11:34:46.356847 DOMAIN: 0000 read_resources bus 0 link: 0
1113 11:34:46.359753 PCI: 00:04.0 read_resources bus 1 link: 0
1114 11:34:46.367056 PCI: 00:04.0 read_resources bus 1 link: 0 done
1115 11:34:46.370379 PCI: 00:0d.0 read_resources bus 0 link: 0
1116 11:34:46.377014 USB0 port 0 read_resources bus 0 link: 0
1117 11:34:46.379967 USB0 port 0 read_resources bus 0 link: 0 done
1118 11:34:46.386710 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1119 11:34:46.390247 PCI: 00:14.0 read_resources bus 0 link: 0
1120 11:34:46.393279 USB0 port 0 read_resources bus 0 link: 0
1121 11:34:46.401439 USB0 port 0 read_resources bus 0 link: 0 done
1122 11:34:46.404151 PCI: 00:14.0 read_resources bus 0 link: 0 done
1123 11:34:46.411365 PCI: 00:14.3 read_resources bus 0 link: 0
1124 11:34:46.414677 PCI: 00:14.3 read_resources bus 0 link: 0 done
1125 11:34:46.421027 PCI: 00:15.0 read_resources bus 0 link: 0
1126 11:34:46.424722 PCI: 00:15.0 read_resources bus 0 link: 0 done
1127 11:34:46.431190 PCI: 00:15.1 read_resources bus 0 link: 0
1128 11:34:46.435071 PCI: 00:15.1 read_resources bus 0 link: 0 done
1129 11:34:46.441791 PCI: 00:19.1 read_resources bus 0 link: 0
1130 11:34:46.445382 PCI: 00:19.1 read_resources bus 0 link: 0 done
1131 11:34:46.451654 PCI: 00:1d.0 read_resources bus 1 link: 0
1132 11:34:46.454983 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1133 11:34:46.461700 PCI: 00:1e.2 read_resources bus 2 link: 0
1134 11:34:46.465188 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1135 11:34:46.471999 PCI: 00:1e.3 read_resources bus 3 link: 0
1136 11:34:46.475367 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1137 11:34:46.481823 PCI: 00:1f.0 read_resources bus 0 link: 0
1138 11:34:46.484983 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1139 11:34:46.488682 PCI: 00:1f.2 read_resources bus 0 link: 0
1140 11:34:46.495094 GENERIC: 0.0 read_resources bus 0 link: 0
1141 11:34:46.498631 GENERIC: 0.0 read_resources bus 0 link: 0 done
1142 11:34:46.505002 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1143 11:34:46.511451 DOMAIN: 0000 read_resources bus 0 link: 0 done
1144 11:34:46.515098 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1145 11:34:46.518675 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1146 11:34:46.525166 Root Device read_resources bus 0 link: 0 done
1147 11:34:46.528348 Done reading resources.
1148 11:34:46.532208 Show resources in subtree (Root Device)...After reading.
1149 11:34:46.538256 Root Device child on link 0 DOMAIN: 0000
1150 11:34:46.542111 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1151 11:34:46.551756 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1152 11:34:46.562122 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1153 11:34:46.562738 PCI: 00:00.0
1154 11:34:46.572126 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1155 11:34:46.581820 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1156 11:34:46.592075 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1157 11:34:46.602084 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1158 11:34:46.608211 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1159 11:34:46.618714 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1160 11:34:46.628182 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1161 11:34:46.638380 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1162 11:34:46.647964 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1163 11:34:46.658625 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1164 11:34:46.664404 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1165 11:34:46.674853 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1166 11:34:46.684537 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1167 11:34:46.694195 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1168 11:34:46.704493 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1169 11:34:46.711160 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1170 11:34:46.720604 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1171 11:34:46.730923 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1172 11:34:46.740630 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1173 11:34:46.751052 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1174 11:34:46.751614 PCI: 00:02.0
1175 11:34:46.764773 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1176 11:34:46.773992 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1177 11:34:46.780835 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1178 11:34:46.787285 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1179 11:34:46.797733 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1180 11:34:46.798291 GENERIC: 0.0
1181 11:34:46.800403 PCI: 00:05.0
1182 11:34:46.811242 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1183 11:34:46.814570 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1184 11:34:46.817376 GENERIC: 0.0
1185 11:34:46.817828 PCI: 00:08.0
1186 11:34:46.827378 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 11:34:46.830996 PCI: 00:0a.0
1188 11:34:46.834154 PCI: 00:0d.0 child on link 0 USB0 port 0
1189 11:34:46.843525 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1190 11:34:46.846897 USB0 port 0 child on link 0 USB3 port 0
1191 11:34:46.850216 USB3 port 0
1192 11:34:46.850752 USB3 port 1
1193 11:34:46.853736 USB3 port 2
1194 11:34:46.854190 USB3 port 3
1195 11:34:46.861029 PCI: 00:14.0 child on link 0 USB0 port 0
1196 11:34:46.870768 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1197 11:34:46.873868 USB0 port 0 child on link 0 USB2 port 0
1198 11:34:46.876978 USB2 port 0
1199 11:34:46.877535 USB2 port 1
1200 11:34:46.880665 USB2 port 2
1201 11:34:46.881228 USB2 port 3
1202 11:34:46.883776 USB2 port 4
1203 11:34:46.884246 USB2 port 5
1204 11:34:46.886736 USB2 port 6
1205 11:34:46.887190 USB2 port 7
1206 11:34:46.891004 USB2 port 8
1207 11:34:46.891563 USB2 port 9
1208 11:34:46.894156 USB3 port 0
1209 11:34:46.894793 USB3 port 1
1210 11:34:46.897230 USB3 port 2
1211 11:34:46.897785 USB3 port 3
1212 11:34:46.900512 PCI: 00:14.2
1213 11:34:46.910337 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 11:34:46.920770 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1215 11:34:46.923811 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1216 11:34:46.933853 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1217 11:34:46.937430 GENERIC: 0.0
1218 11:34:46.940439 PCI: 00:15.0 child on link 0 I2C: 00:1a
1219 11:34:46.950394 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 11:34:46.953788 I2C: 00:1a
1221 11:34:46.954352 I2C: 00:31
1222 11:34:46.957273 I2C: 00:32
1223 11:34:46.960108 PCI: 00:15.1 child on link 0 I2C: 00:10
1224 11:34:46.970385 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1225 11:34:46.970994 I2C: 00:10
1226 11:34:46.973374 PCI: 00:15.2
1227 11:34:46.983583 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 11:34:46.984040 PCI: 00:15.3
1229 11:34:46.994113 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 11:34:46.996819 PCI: 00:16.0
1231 11:34:47.006766 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 11:34:47.007189 PCI: 00:19.0
1233 11:34:47.013845 PCI: 00:19.1 child on link 0 I2C: 00:15
1234 11:34:47.023724 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 11:34:47.024283 I2C: 00:15
1236 11:34:47.026889 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1237 11:34:47.036795 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1238 11:34:47.046707 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1239 11:34:47.056392 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1240 11:34:47.057224 GENERIC: 0.0
1241 11:34:47.059944 PCI: 01:00.0
1242 11:34:47.069961 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 11:34:47.079916 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1244 11:34:47.086071 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1245 11:34:47.089624 PCI: 00:1e.0
1246 11:34:47.099964 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1247 11:34:47.103077 PCI: 00:1e.2 child on link 0 SPI: 00
1248 11:34:47.112881 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1249 11:34:47.115915 SPI: 00
1250 11:34:47.119968 PCI: 00:1e.3 child on link 0 SPI: 00
1251 11:34:47.129690 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1252 11:34:47.130245 SPI: 00
1253 11:34:47.136218 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1254 11:34:47.143323 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1255 11:34:47.146060 PNP: 0c09.0
1256 11:34:47.156479 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1257 11:34:47.159237 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1258 11:34:47.170031 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1259 11:34:47.179255 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1260 11:34:47.183448 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1261 11:34:47.184002 GENERIC: 0.0
1262 11:34:47.185853 GENERIC: 1.0
1263 11:34:47.189305 PCI: 00:1f.3
1264 11:34:47.199170 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1265 11:34:47.209602 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1266 11:34:47.210156 PCI: 00:1f.5
1267 11:34:47.218959 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1268 11:34:47.222168 CPU_CLUSTER: 0 child on link 0 APIC: 00
1269 11:34:47.222674 APIC: 00
1270 11:34:47.225627 APIC: 01
1271 11:34:47.226081 APIC: 03
1272 11:34:47.229805 APIC: 07
1273 11:34:47.230367 APIC: 05
1274 11:34:47.230788 APIC: 04
1275 11:34:47.232438 APIC: 02
1276 11:34:47.232893 APIC: 06
1277 11:34:47.242362 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1278 11:34:47.245895 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1279 11:34:47.252769 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1280 11:34:47.259289 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1281 11:34:47.262555 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1282 11:34:47.265606 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1283 11:34:47.272461 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1284 11:34:47.279165 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1285 11:34:47.285477 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1286 11:34:47.292269 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1287 11:34:47.302860 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1288 11:34:47.305262 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1289 11:34:47.315579 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1290 11:34:47.321665 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1291 11:34:47.328796 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1292 11:34:47.332257 DOMAIN: 0000: Resource ranges:
1293 11:34:47.335179 * Base: 1000, Size: 800, Tag: 100
1294 11:34:47.338959 * Base: 1900, Size: e700, Tag: 100
1295 11:34:47.345177 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1296 11:34:47.351583 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1297 11:34:47.358786 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1298 11:34:47.365135 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1299 11:34:47.375000 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1300 11:34:47.381452 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1301 11:34:47.387950 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1302 11:34:47.397859 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1303 11:34:47.404978 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1304 11:34:47.412182 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1305 11:34:47.422463 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1306 11:34:47.427840 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1307 11:34:47.435049 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1308 11:34:47.444305 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1309 11:34:47.451061 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1310 11:34:47.457523 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1311 11:34:47.467876 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1312 11:34:47.474678 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1313 11:34:47.481647 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1314 11:34:47.491532 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1315 11:34:47.498014 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1316 11:34:47.504723 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1317 11:34:47.514668 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1318 11:34:47.521160 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1319 11:34:47.527457 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1320 11:34:47.530881 DOMAIN: 0000: Resource ranges:
1321 11:34:47.537432 * Base: 7fc00000, Size: 40400000, Tag: 200
1322 11:34:47.540647 * Base: d0000000, Size: 28000000, Tag: 200
1323 11:34:47.544342 * Base: fa000000, Size: 1000000, Tag: 200
1324 11:34:47.547789 * Base: fb001000, Size: 2fff000, Tag: 200
1325 11:34:47.554392 * Base: fe010000, Size: 2e000, Tag: 200
1326 11:34:47.557176 * Base: fe03f000, Size: d41000, Tag: 200
1327 11:34:47.561405 * Base: fed88000, Size: 8000, Tag: 200
1328 11:34:47.563919 * Base: fed93000, Size: d000, Tag: 200
1329 11:34:47.571368 * Base: feda2000, Size: 1e000, Tag: 200
1330 11:34:47.574474 * Base: fede0000, Size: 1220000, Tag: 200
1331 11:34:47.577411 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1332 11:34:47.587015 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1333 11:34:47.594452 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1334 11:34:47.600579 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1335 11:34:47.607269 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1336 11:34:47.613929 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1337 11:34:47.620499 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1338 11:34:47.627362 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1339 11:34:47.633677 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1340 11:34:47.640582 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1341 11:34:47.647080 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1342 11:34:47.653609 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1343 11:34:47.660321 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1344 11:34:47.667210 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1345 11:34:47.673528 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1346 11:34:47.680302 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1347 11:34:47.686667 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1348 11:34:47.693541 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1349 11:34:47.700327 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1350 11:34:47.706722 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1351 11:34:47.713201 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1352 11:34:47.719887 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1353 11:34:47.727249 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1354 11:34:47.732902 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1355 11:34:47.740369 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1356 11:34:47.742966 PCI: 00:1d.0: Resource ranges:
1357 11:34:47.746697 * Base: 7fc00000, Size: 100000, Tag: 200
1358 11:34:47.752820 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1359 11:34:47.759613 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1360 11:34:47.766566 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1361 11:34:47.776442 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1362 11:34:47.783412 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1363 11:34:47.786292 Root Device assign_resources, bus 0 link: 0
1364 11:34:47.792876 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 11:34:47.799428 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1366 11:34:47.809216 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1367 11:34:47.815708 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1368 11:34:47.826320 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1369 11:34:47.829140 PCI: 00:04.0 assign_resources, bus 1 link: 0
1370 11:34:47.835806 PCI: 00:04.0 assign_resources, bus 1 link: 0
1371 11:34:47.842256 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1372 11:34:47.852447 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1373 11:34:47.859577 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1374 11:34:47.862817 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1375 11:34:47.869264 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1376 11:34:47.876396 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1377 11:34:47.882880 PCI: 00:14.0 assign_resources, bus 0 link: 0
1378 11:34:47.885800 PCI: 00:14.0 assign_resources, bus 0 link: 0
1379 11:34:47.895718 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1380 11:34:47.901948 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1381 11:34:47.909499 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1382 11:34:47.916011 PCI: 00:14.3 assign_resources, bus 0 link: 0
1383 11:34:47.918385 PCI: 00:14.3 assign_resources, bus 0 link: 0
1384 11:34:47.928319 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1385 11:34:47.931448 PCI: 00:15.0 assign_resources, bus 0 link: 0
1386 11:34:47.938562 PCI: 00:15.0 assign_resources, bus 0 link: 0
1387 11:34:47.945049 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1388 11:34:47.948679 PCI: 00:15.1 assign_resources, bus 0 link: 0
1389 11:34:47.954881 PCI: 00:15.1 assign_resources, bus 0 link: 0
1390 11:34:47.961826 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1391 11:34:47.971806 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1392 11:34:47.978451 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1393 11:34:47.987779 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1394 11:34:47.991698 PCI: 00:19.1 assign_resources, bus 0 link: 0
1395 11:34:47.998155 PCI: 00:19.1 assign_resources, bus 0 link: 0
1396 11:34:48.004768 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1397 11:34:48.014785 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1398 11:34:48.024555 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1399 11:34:48.028014 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1400 11:34:48.037895 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1401 11:34:48.044503 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1402 11:34:48.051111 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1403 11:34:48.057729 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1404 11:34:48.064314 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1405 11:34:48.070658 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1406 11:34:48.074192 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1407 11:34:48.084326 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1408 11:34:48.087124 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1409 11:34:48.090703 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1410 11:34:48.097355 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1411 11:34:48.100495 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1412 11:34:48.107091 LPC: Trying to open IO window from 800 size 1ff
1413 11:34:48.115014 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1414 11:34:48.124350 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1415 11:34:48.131007 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1416 11:34:48.137041 DOMAIN: 0000 assign_resources, bus 0 link: 0
1417 11:34:48.140550 Root Device assign_resources, bus 0 link: 0
1418 11:34:48.143868 Done setting resources.
1419 11:34:48.150442 Show resources in subtree (Root Device)...After assigning values.
1420 11:34:48.154284 Root Device child on link 0 DOMAIN: 0000
1421 11:34:48.157284 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1422 11:34:48.167006 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1423 11:34:48.177201 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1424 11:34:48.185921 PCI: 00:00.0
1425 11:34:48.190122 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1426 11:34:48.197195 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1427 11:34:48.207127 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1428 11:34:48.217099 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1429 11:34:48.226759 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1430 11:34:48.236750 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1431 11:34:48.243598 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1432 11:34:48.253517 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1433 11:34:48.263369 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1434 11:34:48.273412 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1435 11:34:48.283417 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1436 11:34:48.294639 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1437 11:34:48.300768 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1438 11:34:48.309719 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1439 11:34:48.320369 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1440 11:34:48.329821 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1441 11:34:48.339464 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1442 11:34:48.349542 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1443 11:34:48.355986 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1444 11:34:48.365993 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1445 11:34:48.369125 PCI: 00:02.0
1446 11:34:48.379801 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1447 11:34:48.389648 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1448 11:34:48.398993 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1449 11:34:48.402542 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1450 11:34:48.415868 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1451 11:34:48.416411 GENERIC: 0.0
1452 11:34:48.418802 PCI: 00:05.0
1453 11:34:48.429470 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1454 11:34:48.432353 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1455 11:34:48.435347 GENERIC: 0.0
1456 11:34:48.435800 PCI: 00:08.0
1457 11:34:48.445601 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1458 11:34:48.449441 PCI: 00:0a.0
1459 11:34:48.452763 PCI: 00:0d.0 child on link 0 USB0 port 0
1460 11:34:48.462975 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1461 11:34:48.468772 USB0 port 0 child on link 0 USB3 port 0
1462 11:34:48.469329 USB3 port 0
1463 11:34:48.472779 USB3 port 1
1464 11:34:48.473323 USB3 port 2
1465 11:34:48.475220 USB3 port 3
1466 11:34:48.479521 PCI: 00:14.0 child on link 0 USB0 port 0
1467 11:34:48.488765 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1468 11:34:48.495435 USB0 port 0 child on link 0 USB2 port 0
1469 11:34:48.495980 USB2 port 0
1470 11:34:48.498616 USB2 port 1
1471 11:34:48.499172 USB2 port 2
1472 11:34:48.501993 USB2 port 3
1473 11:34:48.502572 USB2 port 4
1474 11:34:48.505354 USB2 port 5
1475 11:34:48.506158 USB2 port 6
1476 11:34:48.508679 USB2 port 7
1477 11:34:48.509088 USB2 port 8
1478 11:34:48.511784 USB2 port 9
1479 11:34:48.512196 USB3 port 0
1480 11:34:48.515879 USB3 port 1
1481 11:34:48.516586 USB3 port 2
1482 11:34:48.518535 USB3 port 3
1483 11:34:48.518949 PCI: 00:14.2
1484 11:34:48.533035 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1485 11:34:48.542058 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1486 11:34:48.545400 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1487 11:34:48.555479 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1488 11:34:48.558668 GENERIC: 0.0
1489 11:34:48.561953 PCI: 00:15.0 child on link 0 I2C: 00:1a
1490 11:34:48.572420 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1491 11:34:48.575230 I2C: 00:1a
1492 11:34:48.575645 I2C: 00:31
1493 11:34:48.575971 I2C: 00:32
1494 11:34:48.582116 PCI: 00:15.1 child on link 0 I2C: 00:10
1495 11:34:48.591805 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1496 11:34:48.592319 I2C: 00:10
1497 11:34:48.595266 PCI: 00:15.2
1498 11:34:48.605063 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1499 11:34:48.605601 PCI: 00:15.3
1500 11:34:48.618825 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1501 11:34:48.619388 PCI: 00:16.0
1502 11:34:48.629160 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1503 11:34:48.631350 PCI: 00:19.0
1504 11:34:48.635355 PCI: 00:19.1 child on link 0 I2C: 00:15
1505 11:34:48.645154 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1506 11:34:48.648325 I2C: 00:15
1507 11:34:48.651648 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1508 11:34:48.662121 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1509 11:34:48.671894 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1510 11:34:48.682123 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1511 11:34:48.684919 GENERIC: 0.0
1512 11:34:48.685464 PCI: 01:00.0
1513 11:34:48.698348 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1514 11:34:48.707930 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1515 11:34:48.717676 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1516 11:34:48.718215 PCI: 00:1e.0
1517 11:34:48.731071 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1518 11:34:48.734746 PCI: 00:1e.2 child on link 0 SPI: 00
1519 11:34:48.744250 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1520 11:34:48.747677 SPI: 00
1521 11:34:48.751524 PCI: 00:1e.3 child on link 0 SPI: 00
1522 11:34:48.761280 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1523 11:34:48.761838 SPI: 00
1524 11:34:48.767951 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1525 11:34:48.773956 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1526 11:34:48.777498 PNP: 0c09.0
1527 11:34:48.784654 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1528 11:34:48.790891 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1529 11:34:48.800863 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1530 11:34:48.807835 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1531 11:34:48.814500 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1532 11:34:48.815062 GENERIC: 0.0
1533 11:34:48.817338 GENERIC: 1.0
1534 11:34:48.817880 PCI: 00:1f.3
1535 11:34:48.828020 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1536 11:34:48.840789 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1537 11:34:48.841338 PCI: 00:1f.5
1538 11:34:48.850373 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1539 11:34:48.854003 CPU_CLUSTER: 0 child on link 0 APIC: 00
1540 11:34:48.857283 APIC: 00
1541 11:34:48.857829 APIC: 01
1542 11:34:48.860352 APIC: 03
1543 11:34:48.860875 APIC: 07
1544 11:34:48.861234 APIC: 05
1545 11:34:48.863871 APIC: 04
1546 11:34:48.864542 APIC: 02
1547 11:34:48.866754 APIC: 06
1548 11:34:48.867500 Done allocating resources.
1549 11:34:48.874155 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1550 11:34:48.880404 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1551 11:34:48.883446 Configure GPIOs for I2S audio on UP4.
1552 11:34:48.890913 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1553 11:34:48.893780 Enabling resources...
1554 11:34:48.896963 PCI: 00:00.0 subsystem <- 8086/9a12
1555 11:34:48.900452 PCI: 00:00.0 cmd <- 06
1556 11:34:48.903828 PCI: 00:02.0 subsystem <- 8086/9a40
1557 11:34:48.907225 PCI: 00:02.0 cmd <- 03
1558 11:34:48.911004 PCI: 00:04.0 subsystem <- 8086/9a03
1559 11:34:48.911422 PCI: 00:04.0 cmd <- 02
1560 11:34:48.917991 PCI: 00:05.0 subsystem <- 8086/9a19
1561 11:34:48.918502 PCI: 00:05.0 cmd <- 02
1562 11:34:48.920577 PCI: 00:08.0 subsystem <- 8086/9a11
1563 11:34:48.923726 PCI: 00:08.0 cmd <- 06
1564 11:34:48.927690 PCI: 00:0d.0 subsystem <- 8086/9a13
1565 11:34:48.930940 PCI: 00:0d.0 cmd <- 02
1566 11:34:48.933961 PCI: 00:14.0 subsystem <- 8086/a0ed
1567 11:34:48.937591 PCI: 00:14.0 cmd <- 02
1568 11:34:48.940502 PCI: 00:14.2 subsystem <- 8086/a0ef
1569 11:34:48.943852 PCI: 00:14.2 cmd <- 02
1570 11:34:48.947360 PCI: 00:14.3 subsystem <- 8086/a0f0
1571 11:34:48.950521 PCI: 00:14.3 cmd <- 02
1572 11:34:48.953902 PCI: 00:15.0 subsystem <- 8086/a0e8
1573 11:34:48.956883 PCI: 00:15.0 cmd <- 02
1574 11:34:48.960029 PCI: 00:15.1 subsystem <- 8086/a0e9
1575 11:34:48.960544 PCI: 00:15.1 cmd <- 02
1576 11:34:48.967241 PCI: 00:15.2 subsystem <- 8086/a0ea
1577 11:34:48.967659 PCI: 00:15.2 cmd <- 02
1578 11:34:48.970200 PCI: 00:15.3 subsystem <- 8086/a0eb
1579 11:34:48.973888 PCI: 00:15.3 cmd <- 02
1580 11:34:48.977691 PCI: 00:16.0 subsystem <- 8086/a0e0
1581 11:34:48.980140 PCI: 00:16.0 cmd <- 02
1582 11:34:48.983971 PCI: 00:19.1 subsystem <- 8086/a0c6
1583 11:34:48.987124 PCI: 00:19.1 cmd <- 02
1584 11:34:48.990237 PCI: 00:1d.0 bridge ctrl <- 0013
1585 11:34:48.993703 PCI: 00:1d.0 subsystem <- 8086/a0b0
1586 11:34:48.996679 PCI: 00:1d.0 cmd <- 06
1587 11:34:49.000467 PCI: 00:1e.0 subsystem <- 8086/a0a8
1588 11:34:49.003341 PCI: 00:1e.0 cmd <- 06
1589 11:34:49.006343 PCI: 00:1e.2 subsystem <- 8086/a0aa
1590 11:34:49.009749 PCI: 00:1e.2 cmd <- 06
1591 11:34:49.013065 PCI: 00:1e.3 subsystem <- 8086/a0ab
1592 11:34:49.013254 PCI: 00:1e.3 cmd <- 02
1593 11:34:49.019802 PCI: 00:1f.0 subsystem <- 8086/a087
1594 11:34:49.019947 PCI: 00:1f.0 cmd <- 407
1595 11:34:49.023093 PCI: 00:1f.3 subsystem <- 8086/a0c8
1596 11:34:49.026427 PCI: 00:1f.3 cmd <- 02
1597 11:34:49.029862 PCI: 00:1f.5 subsystem <- 8086/a0a4
1598 11:34:49.033026 PCI: 00:1f.5 cmd <- 406
1599 11:34:49.037948 PCI: 01:00.0 cmd <- 02
1600 11:34:49.042546 done.
1601 11:34:49.046158 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1602 11:34:49.049042 Initializing devices...
1603 11:34:49.052795 Root Device init
1604 11:34:49.055426 Chrome EC: Set SMI mask to 0x0000000000000000
1605 11:34:49.063268 Chrome EC: clear events_b mask to 0x0000000000000000
1606 11:34:49.069664 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1607 11:34:49.076293 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1608 11:34:49.082974 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1609 11:34:49.086425 Chrome EC: Set WAKE mask to 0x0000000000000000
1610 11:34:49.094032 fw_config match found: DB_USB=USB3_ACTIVE
1611 11:34:49.097117 Configure Right Type-C port orientation for retimer
1612 11:34:49.100778 Root Device init finished in 46 msecs
1613 11:34:49.105167 PCI: 00:00.0 init
1614 11:34:49.108292 CPU TDP = 9 Watts
1615 11:34:49.108764 CPU PL1 = 9 Watts
1616 11:34:49.112187 CPU PL2 = 40 Watts
1617 11:34:49.115100 CPU PL4 = 83 Watts
1618 11:34:49.118813 PCI: 00:00.0 init finished in 8 msecs
1619 11:34:49.119497 PCI: 00:02.0 init
1620 11:34:49.121524 GMA: Found VBT in CBFS
1621 11:34:49.124818 GMA: Found valid VBT in CBFS
1622 11:34:49.131610 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1623 11:34:49.138580 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1624 11:34:49.141709 PCI: 00:02.0 init finished in 18 msecs
1625 11:34:49.144796 PCI: 00:05.0 init
1626 11:34:49.147953 PCI: 00:05.0 init finished in 0 msecs
1627 11:34:49.151358 PCI: 00:08.0 init
1628 11:34:49.154604 PCI: 00:08.0 init finished in 0 msecs
1629 11:34:49.157748 PCI: 00:14.0 init
1630 11:34:49.161271 PCI: 00:14.0 init finished in 0 msecs
1631 11:34:49.164494 PCI: 00:14.2 init
1632 11:34:49.168235 PCI: 00:14.2 init finished in 0 msecs
1633 11:34:49.171472 PCI: 00:15.0 init
1634 11:34:49.171699 I2C bus 0 version 0x3230302a
1635 11:34:49.178005 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1636 11:34:49.181089 PCI: 00:15.0 init finished in 6 msecs
1637 11:34:49.181314 PCI: 00:15.1 init
1638 11:34:49.184082 I2C bus 1 version 0x3230302a
1639 11:34:49.187477 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1640 11:34:49.194315 PCI: 00:15.1 init finished in 6 msecs
1641 11:34:49.194495 PCI: 00:15.2 init
1642 11:34:49.197261 I2C bus 2 version 0x3230302a
1643 11:34:49.201022 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1644 11:34:49.203991 PCI: 00:15.2 init finished in 6 msecs
1645 11:34:49.207162 PCI: 00:15.3 init
1646 11:34:49.210657 I2C bus 3 version 0x3230302a
1647 11:34:49.213705 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1648 11:34:49.217236 PCI: 00:15.3 init finished in 6 msecs
1649 11:34:49.220527 PCI: 00:16.0 init
1650 11:34:49.223741 PCI: 00:16.0 init finished in 0 msecs
1651 11:34:49.299780 PCI: 00:19.1 init
1652 11:34:49.300833 I2C bus 5 version 0x3230302a
1653 11:34:49.301245 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1654 11:34:49.301582 PCI: 00:19.1 init finished in 6 msecs
1655 11:34:49.301885 PCI: 00:1d.0 init
1656 11:34:49.302224 Initializing PCH PCIe bridge.
1657 11:34:49.302818 PCI: 00:1d.0 init finished in 3 msecs
1658 11:34:49.303144 PCI: 00:1f.0 init
1659 11:34:49.303427 IOAPIC: Initializing IOAPIC at 0xfec00000
1660 11:34:49.303703 IOAPIC: Bootstrap Processor Local APIC = 0x00
1661 11:34:49.303975 IOAPIC: ID = 0x02
1662 11:34:49.304245 IOAPIC: Dumping registers
1663 11:34:49.304563 reg 0x0000: 0x02000000
1664 11:34:49.304803 reg 0x0001: 0x00770020
1665 11:34:49.304994 reg 0x0002: 0x00000000
1666 11:34:49.305185 PCI: 00:1f.0 init finished in 21 msecs
1667 11:34:49.305376 PCI: 00:1f.2 init
1668 11:34:49.305566 Disabling ACPI via APMC.
1669 11:34:49.305773 APMC done.
1670 11:34:49.305961 PCI: 00:1f.2 init finished in 5 msecs
1671 11:34:49.306241 PCI: 01:00.0 init
1672 11:34:49.306675 PCI: 01:00.0 init finished in 0 msecs
1673 11:34:49.307118 PNP: 0c09.0 init
1674 11:34:49.308145 Google Chrome EC uptime: 8.402 seconds
1675 11:34:49.314113 Google Chrome AP resets since EC boot: 1
1676 11:34:49.317219 Google Chrome most recent AP reset causes:
1677 11:34:49.321232 0.347: 32775 shutdown: entering G3
1678 11:34:49.327707 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1679 11:34:49.330784 PNP: 0c09.0 init finished in 22 msecs
1680 11:34:49.335988 Devices initialized
1681 11:34:49.339780 Show all devs... After init.
1682 11:34:49.343064 Root Device: enabled 1
1683 11:34:49.343170 DOMAIN: 0000: enabled 1
1684 11:34:49.346222 CPU_CLUSTER: 0: enabled 1
1685 11:34:49.349790 PCI: 00:00.0: enabled 1
1686 11:34:49.353630 PCI: 00:02.0: enabled 1
1687 11:34:49.353832 PCI: 00:04.0: enabled 1
1688 11:34:49.356320 PCI: 00:05.0: enabled 1
1689 11:34:49.359762 PCI: 00:06.0: enabled 0
1690 11:34:49.363546 PCI: 00:07.0: enabled 0
1691 11:34:49.363712 PCI: 00:07.1: enabled 0
1692 11:34:49.366879 PCI: 00:07.2: enabled 0
1693 11:34:49.369688 PCI: 00:07.3: enabled 0
1694 11:34:49.373600 PCI: 00:08.0: enabled 1
1695 11:34:49.373775 PCI: 00:09.0: enabled 0
1696 11:34:49.377233 PCI: 00:0a.0: enabled 0
1697 11:34:49.379472 PCI: 00:0d.0: enabled 1
1698 11:34:49.383519 PCI: 00:0d.1: enabled 0
1699 11:34:49.383710 PCI: 00:0d.2: enabled 0
1700 11:34:49.386424 PCI: 00:0d.3: enabled 0
1701 11:34:49.389409 PCI: 00:0e.0: enabled 0
1702 11:34:49.389578 PCI: 00:10.2: enabled 1
1703 11:34:49.393224 PCI: 00:10.6: enabled 0
1704 11:34:49.396201 PCI: 00:10.7: enabled 0
1705 11:34:49.399660 PCI: 00:12.0: enabled 0
1706 11:34:49.399943 PCI: 00:12.6: enabled 0
1707 11:34:49.402870 PCI: 00:13.0: enabled 0
1708 11:34:49.406461 PCI: 00:14.0: enabled 1
1709 11:34:49.409919 PCI: 00:14.1: enabled 0
1710 11:34:49.410285 PCI: 00:14.2: enabled 1
1711 11:34:49.413734 PCI: 00:14.3: enabled 1
1712 11:34:49.416198 PCI: 00:15.0: enabled 1
1713 11:34:49.419405 PCI: 00:15.1: enabled 1
1714 11:34:49.419857 PCI: 00:15.2: enabled 1
1715 11:34:49.423037 PCI: 00:15.3: enabled 1
1716 11:34:49.426306 PCI: 00:16.0: enabled 1
1717 11:34:49.426932 PCI: 00:16.1: enabled 0
1718 11:34:49.429983 PCI: 00:16.2: enabled 0
1719 11:34:49.433233 PCI: 00:16.3: enabled 0
1720 11:34:49.436468 PCI: 00:16.4: enabled 0
1721 11:34:49.436923 PCI: 00:16.5: enabled 0
1722 11:34:49.440005 PCI: 00:17.0: enabled 0
1723 11:34:49.442750 PCI: 00:19.0: enabled 0
1724 11:34:49.446089 PCI: 00:19.1: enabled 1
1725 11:34:49.446594 PCI: 00:19.2: enabled 0
1726 11:34:49.449480 PCI: 00:1c.0: enabled 1
1727 11:34:49.453378 PCI: 00:1c.1: enabled 0
1728 11:34:49.456211 PCI: 00:1c.2: enabled 0
1729 11:34:49.456711 PCI: 00:1c.3: enabled 0
1730 11:34:49.459534 PCI: 00:1c.4: enabled 0
1731 11:34:49.462790 PCI: 00:1c.5: enabled 0
1732 11:34:49.466617 PCI: 00:1c.6: enabled 1
1733 11:34:49.467077 PCI: 00:1c.7: enabled 0
1734 11:34:49.469304 PCI: 00:1d.0: enabled 1
1735 11:34:49.473000 PCI: 00:1d.1: enabled 0
1736 11:34:49.473549 PCI: 00:1d.2: enabled 1
1737 11:34:49.476709 PCI: 00:1d.3: enabled 0
1738 11:34:49.480000 PCI: 00:1e.0: enabled 1
1739 11:34:49.483430 PCI: 00:1e.1: enabled 0
1740 11:34:49.483979 PCI: 00:1e.2: enabled 1
1741 11:34:49.486199 PCI: 00:1e.3: enabled 1
1742 11:34:49.489266 PCI: 00:1f.0: enabled 1
1743 11:34:49.492963 PCI: 00:1f.1: enabled 0
1744 11:34:49.493504 PCI: 00:1f.2: enabled 1
1745 11:34:49.496495 PCI: 00:1f.3: enabled 1
1746 11:34:49.499509 PCI: 00:1f.4: enabled 0
1747 11:34:49.502990 PCI: 00:1f.5: enabled 1
1748 11:34:49.503448 PCI: 00:1f.6: enabled 0
1749 11:34:49.506497 PCI: 00:1f.7: enabled 0
1750 11:34:49.509407 APIC: 00: enabled 1
1751 11:34:49.509861 GENERIC: 0.0: enabled 1
1752 11:34:49.512736 GENERIC: 0.0: enabled 1
1753 11:34:49.516227 GENERIC: 1.0: enabled 1
1754 11:34:49.519166 GENERIC: 0.0: enabled 1
1755 11:34:49.519689 GENERIC: 1.0: enabled 1
1756 11:34:49.523094 USB0 port 0: enabled 1
1757 11:34:49.526333 GENERIC: 0.0: enabled 1
1758 11:34:49.526945 USB0 port 0: enabled 1
1759 11:34:49.529771 GENERIC: 0.0: enabled 1
1760 11:34:49.532672 I2C: 00:1a: enabled 1
1761 11:34:49.536007 I2C: 00:31: enabled 1
1762 11:34:49.536461 I2C: 00:32: enabled 1
1763 11:34:49.540334 I2C: 00:10: enabled 1
1764 11:34:49.542745 I2C: 00:15: enabled 1
1765 11:34:49.543202 GENERIC: 0.0: enabled 0
1766 11:34:49.545784 GENERIC: 1.0: enabled 0
1767 11:34:49.549609 GENERIC: 0.0: enabled 1
1768 11:34:49.550156 SPI: 00: enabled 1
1769 11:34:49.552528 SPI: 00: enabled 1
1770 11:34:49.556227 PNP: 0c09.0: enabled 1
1771 11:34:49.556775 GENERIC: 0.0: enabled 1
1772 11:34:49.558899 USB3 port 0: enabled 1
1773 11:34:49.562195 USB3 port 1: enabled 1
1774 11:34:49.565622 USB3 port 2: enabled 0
1775 11:34:49.566077 USB3 port 3: enabled 0
1776 11:34:49.568801 USB2 port 0: enabled 0
1777 11:34:49.572024 USB2 port 1: enabled 1
1778 11:34:49.572482 USB2 port 2: enabled 1
1779 11:34:49.575754 USB2 port 3: enabled 0
1780 11:34:49.578756 USB2 port 4: enabled 1
1781 11:34:49.583720 USB2 port 5: enabled 0
1782 11:34:49.584329 USB2 port 6: enabled 0
1783 11:34:49.585971 USB2 port 7: enabled 0
1784 11:34:49.589079 USB2 port 8: enabled 0
1785 11:34:49.589648 USB2 port 9: enabled 0
1786 11:34:49.592078 USB3 port 0: enabled 0
1787 11:34:49.596115 USB3 port 1: enabled 1
1788 11:34:49.596887 USB3 port 2: enabled 0
1789 11:34:49.598502 USB3 port 3: enabled 0
1790 11:34:49.601979 GENERIC: 0.0: enabled 1
1791 11:34:49.605485 GENERIC: 1.0: enabled 1
1792 11:34:49.605899 APIC: 01: enabled 1
1793 11:34:49.608685 APIC: 03: enabled 1
1794 11:34:49.609099 APIC: 07: enabled 1
1795 11:34:49.612197 APIC: 05: enabled 1
1796 11:34:49.615204 APIC: 04: enabled 1
1797 11:34:49.615779 APIC: 02: enabled 1
1798 11:34:49.619081 APIC: 06: enabled 1
1799 11:34:49.621829 PCI: 01:00.0: enabled 1
1800 11:34:49.625258 BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms
1801 11:34:49.631920 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1802 11:34:49.634856 ELOG: NV offset 0xf30000 size 0x1000
1803 11:34:49.641928 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1804 11:34:49.648064 ELOG: Event(17) added with size 13 at 2024-03-18 11:34:49 UTC
1805 11:34:49.654807 ELOG: Event(92) added with size 9 at 2024-03-18 11:34:49 UTC
1806 11:34:49.662117 ELOG: Event(93) added with size 9 at 2024-03-18 11:34:49 UTC
1807 11:34:49.668039 ELOG: Event(9E) added with size 10 at 2024-03-18 11:34:49 UTC
1808 11:34:49.675102 ELOG: Event(9F) added with size 14 at 2024-03-18 11:34:49 UTC
1809 11:34:49.681746 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1810 11:34:49.685030 ELOG: Event(A1) added with size 10 at 2024-03-18 11:34:49 UTC
1811 11:34:49.691446 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1812 11:34:49.698320 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1813 11:34:49.702049 Finalize devices...
1814 11:34:49.702642 Devices finalized
1815 11:34:49.707954 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1816 11:34:49.715006 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1817 11:34:49.718522 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1818 11:34:49.724991 ME: HFSTS1 : 0x80030055
1819 11:34:49.728663 ME: HFSTS2 : 0x30280116
1820 11:34:49.731813 ME: HFSTS3 : 0x00000050
1821 11:34:49.738207 ME: HFSTS4 : 0x00004000
1822 11:34:49.741998 ME: HFSTS5 : 0x00000000
1823 11:34:49.744940 ME: HFSTS6 : 0x00400006
1824 11:34:49.751373 ME: Manufacturing Mode : YES
1825 11:34:49.755075 ME: SPI Protection Mode Enabled : NO
1826 11:34:49.758488 ME: FW Partition Table : OK
1827 11:34:49.761636 ME: Bringup Loader Failure : NO
1828 11:34:49.764696 ME: Firmware Init Complete : NO
1829 11:34:49.768055 ME: Boot Options Present : NO
1830 11:34:49.771053 ME: Update In Progress : NO
1831 11:34:49.775088 ME: D0i3 Support : YES
1832 11:34:49.778096 ME: Low Power State Enabled : NO
1833 11:34:49.784879 ME: CPU Replaced : YES
1834 11:34:49.787853 ME: CPU Replacement Valid : YES
1835 11:34:49.791313 ME: Current Working State : 5
1836 11:34:49.794655 ME: Current Operation State : 1
1837 11:34:49.798127 ME: Current Operation Mode : 3
1838 11:34:49.801043 ME: Error Code : 0
1839 11:34:49.804655 ME: Enhanced Debug Mode : NO
1840 11:34:49.807786 ME: CPU Debug Disabled : YES
1841 11:34:49.815259 ME: TXT Support : NO
1842 11:34:49.817759 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1843 11:34:49.827435 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1844 11:34:49.831179 CBFS: 'fallback/slic' not found.
1845 11:34:49.834276 ACPI: Writing ACPI tables at 76b01000.
1846 11:34:49.834900 ACPI: * FACS
1847 11:34:49.837335 ACPI: * DSDT
1848 11:34:49.841475 Ramoops buffer: 0x100000@0x76a00000.
1849 11:34:49.844525 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1850 11:34:49.850871 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1851 11:34:49.854581 Google Chrome EC: version:
1852 11:34:49.857646 ro: voema_v2.0.7540-147f8d37d1
1853 11:34:49.861071 rw: voema_v2.0.7540-147f8d37d1
1854 11:34:49.864251 running image: 2
1855 11:34:49.867249 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1856 11:34:49.872946 ACPI: * FADT
1857 11:34:49.873496 SCI is IRQ9
1858 11:34:49.879292 ACPI: added table 1/32, length now 40
1859 11:34:49.879851 ACPI: * SSDT
1860 11:34:49.882794 Found 1 CPU(s) with 8 core(s) each.
1861 11:34:49.889217 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1862 11:34:49.892894 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1863 11:34:49.896191 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1864 11:34:49.899752 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1865 11:34:49.906329 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1866 11:34:49.913296 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1867 11:34:49.916096 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1868 11:34:49.922552 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1869 11:34:49.929635 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1870 11:34:49.932952 \_SB.PCI0.RP09: Added StorageD3Enable property
1871 11:34:49.936560 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1872 11:34:49.943420 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1873 11:34:49.949302 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1874 11:34:49.952929 PS2K: Passing 80 keymaps to kernel
1875 11:34:49.959418 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1876 11:34:49.965628 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1877 11:34:49.972915 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1878 11:34:49.979072 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1879 11:34:49.986472 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1880 11:34:49.992100 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1881 11:34:49.999230 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1882 11:34:50.006086 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1883 11:34:50.009121 ACPI: added table 2/32, length now 44
1884 11:34:50.009668 ACPI: * MCFG
1885 11:34:50.012047 ACPI: added table 3/32, length now 48
1886 11:34:50.016123 ACPI: * TPM2
1887 11:34:50.019542 TPM2 log created at 0x769f0000
1888 11:34:50.022682 ACPI: added table 4/32, length now 52
1889 11:34:50.023241 ACPI: * MADT
1890 11:34:50.026095 SCI is IRQ9
1891 11:34:50.028916 ACPI: added table 5/32, length now 56
1892 11:34:50.032406 current = 76b09850
1893 11:34:50.032964 ACPI: * DMAR
1894 11:34:50.035275 ACPI: added table 6/32, length now 60
1895 11:34:50.038844 ACPI: added table 7/32, length now 64
1896 11:34:50.042306 ACPI: * HPET
1897 11:34:50.045522 ACPI: added table 8/32, length now 68
1898 11:34:50.045992 ACPI: done.
1899 11:34:50.049109 ACPI tables: 35216 bytes.
1900 11:34:50.052628 smbios_write_tables: 769ef000
1901 11:34:50.055230 EC returned error result code 3
1902 11:34:50.059308 Couldn't obtain OEM name from CBI
1903 11:34:50.061881 Create SMBIOS type 16
1904 11:34:50.065383 Create SMBIOS type 17
1905 11:34:50.068613 GENERIC: 0.0 (WIFI Device)
1906 11:34:50.069028 SMBIOS tables: 1750 bytes.
1907 11:34:50.075183 Writing table forward entry at 0x00000500
1908 11:34:50.081687 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1909 11:34:50.085035 Writing coreboot table at 0x76b25000
1910 11:34:50.088382 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1911 11:34:50.095941 1. 0000000000001000-000000000009ffff: RAM
1912 11:34:50.098605 2. 00000000000a0000-00000000000fffff: RESERVED
1913 11:34:50.104769 3. 0000000000100000-00000000769eefff: RAM
1914 11:34:50.108238 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1915 11:34:50.114867 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1916 11:34:50.121731 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1917 11:34:50.125188 7. 0000000077000000-000000007fbfffff: RESERVED
1918 11:34:50.128799 8. 00000000c0000000-00000000cfffffff: RESERVED
1919 11:34:50.135260 9. 00000000f8000000-00000000f9ffffff: RESERVED
1920 11:34:50.138112 10. 00000000fb000000-00000000fb000fff: RESERVED
1921 11:34:50.144681 11. 00000000fe000000-00000000fe00ffff: RESERVED
1922 11:34:50.148352 12. 00000000fed80000-00000000fed87fff: RESERVED
1923 11:34:50.154989 13. 00000000fed90000-00000000fed92fff: RESERVED
1924 11:34:50.158482 14. 00000000feda0000-00000000feda1fff: RESERVED
1925 11:34:50.164578 15. 00000000fedc0000-00000000feddffff: RESERVED
1926 11:34:50.168441 16. 0000000100000000-00000002803fffff: RAM
1927 11:34:50.171897 Passing 4 GPIOs to payload:
1928 11:34:50.175033 NAME | PORT | POLARITY | VALUE
1929 11:34:50.181321 lid | undefined | high | high
1930 11:34:50.185178 power | undefined | high | low
1931 11:34:50.191726 oprom | undefined | high | low
1932 11:34:50.198462 EC in RW | 0x000000e5 | high | high
1933 11:34:50.204403 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 72c7
1934 11:34:50.204936 coreboot table: 1576 bytes.
1935 11:34:50.207909 IMD ROOT 0. 0x76fff000 0x00001000
1936 11:34:50.214850 IMD SMALL 1. 0x76ffe000 0x00001000
1937 11:34:50.217959 FSP MEMORY 2. 0x76c4e000 0x003b0000
1938 11:34:50.221920 VPD 3. 0x76c4d000 0x00000367
1939 11:34:50.224334 RO MCACHE 4. 0x76c4c000 0x00000fdc
1940 11:34:50.227810 CONSOLE 5. 0x76c2c000 0x00020000
1941 11:34:50.231204 FMAP 6. 0x76c2b000 0x00000578
1942 11:34:50.234847 TIME STAMP 7. 0x76c2a000 0x00000910
1943 11:34:50.237862 VBOOT WORK 8. 0x76c16000 0x00014000
1944 11:34:50.244498 ROMSTG STCK 9. 0x76c15000 0x00001000
1945 11:34:50.248117 AFTER CAR 10. 0x76c0a000 0x0000b000
1946 11:34:50.251249 RAMSTAGE 11. 0x76b97000 0x00073000
1947 11:34:50.254865 REFCODE 12. 0x76b42000 0x00055000
1948 11:34:50.258056 SMM BACKUP 13. 0x76b32000 0x00010000
1949 11:34:50.261212 4f444749 14. 0x76b30000 0x00002000
1950 11:34:50.264279 EXT VBT15. 0x76b2d000 0x0000219f
1951 11:34:50.268037 COREBOOT 16. 0x76b25000 0x00008000
1952 11:34:50.270961 ACPI 17. 0x76b01000 0x00024000
1953 11:34:50.277813 ACPI GNVS 18. 0x76b00000 0x00001000
1954 11:34:50.281662 RAMOOPS 19. 0x76a00000 0x00100000
1955 11:34:50.284793 TPM2 TCGLOG20. 0x769f0000 0x00010000
1956 11:34:50.288558 SMBIOS 21. 0x769ef000 0x00000800
1957 11:34:50.289112 IMD small region:
1958 11:34:50.294997 IMD ROOT 0. 0x76ffec00 0x00000400
1959 11:34:50.297751 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1960 11:34:50.302325 POWER STATE 2. 0x76ffeb80 0x00000044
1961 11:34:50.305049 ROMSTAGE 3. 0x76ffeb60 0x00000004
1962 11:34:50.307847 MEM INFO 4. 0x76ffe980 0x000001e0
1963 11:34:50.314378 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1964 11:34:50.317791 MTRR: Physical address space:
1965 11:34:50.324507 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1966 11:34:50.330946 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1967 11:34:50.337312 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1968 11:34:50.345290 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1969 11:34:50.347615 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1970 11:34:50.354007 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1971 11:34:50.360686 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1972 11:34:50.364069 MTRR: Fixed MSR 0x250 0x0606060606060606
1973 11:34:50.370889 MTRR: Fixed MSR 0x258 0x0606060606060606
1974 11:34:50.374470 MTRR: Fixed MSR 0x259 0x0000000000000000
1975 11:34:50.377615 MTRR: Fixed MSR 0x268 0x0606060606060606
1976 11:34:50.380625 MTRR: Fixed MSR 0x269 0x0606060606060606
1977 11:34:50.387136 MTRR: Fixed MSR 0x26a 0x0606060606060606
1978 11:34:50.390337 MTRR: Fixed MSR 0x26b 0x0606060606060606
1979 11:34:50.393716 MTRR: Fixed MSR 0x26c 0x0606060606060606
1980 11:34:50.396991 MTRR: Fixed MSR 0x26d 0x0606060606060606
1981 11:34:50.403373 MTRR: Fixed MSR 0x26e 0x0606060606060606
1982 11:34:50.406731 MTRR: Fixed MSR 0x26f 0x0606060606060606
1983 11:34:50.410799 call enable_fixed_mtrr()
1984 11:34:50.413989 CPU physical address size: 39 bits
1985 11:34:50.417538 MTRR: default type WB/UC MTRR counts: 6/6.
1986 11:34:50.420885 MTRR: UC selected as default type.
1987 11:34:50.427329 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1988 11:34:50.433577 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1989 11:34:50.439945 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1990 11:34:50.446692 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1991 11:34:50.453357 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1992 11:34:50.459913 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1993 11:34:50.460122
1994 11:34:50.463767 MTRR check
1995 11:34:50.463941 Fixed MTRRs : Enabled
1996 11:34:50.466974 Variable MTRRs: Enabled
1997 11:34:50.467119
1998 11:34:50.470012 MTRR: Fixed MSR 0x250 0x0606060606060606
1999 11:34:50.476548 MTRR: Fixed MSR 0x258 0x0606060606060606
2000 11:34:50.480454 MTRR: Fixed MSR 0x259 0x0000000000000000
2001 11:34:50.483658 MTRR: Fixed MSR 0x268 0x0606060606060606
2002 11:34:50.486312 MTRR: Fixed MSR 0x269 0x0606060606060606
2003 11:34:50.490365 MTRR: Fixed MSR 0x26a 0x0606060606060606
2004 11:34:50.496877 MTRR: Fixed MSR 0x26b 0x0606060606060606
2005 11:34:50.499915 MTRR: Fixed MSR 0x26c 0x0606060606060606
2006 11:34:50.503170 MTRR: Fixed MSR 0x26d 0x0606060606060606
2007 11:34:50.506724 MTRR: Fixed MSR 0x26e 0x0606060606060606
2008 11:34:50.514172 MTRR: Fixed MSR 0x26f 0x0606060606060606
2009 11:34:50.520622 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2010 11:34:50.521174 call enable_fixed_mtrr()
2011 11:34:50.527410 Checking cr50 for pending updates
2012 11:34:50.527946 CPU physical address size: 39 bits
2013 11:34:50.533748 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 11:34:50.537464 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 11:34:50.540422 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 11:34:50.544179 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 11:34:50.550450 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 11:34:50.553492 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 11:34:50.556968 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 11:34:50.560200 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 11:34:50.566977 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 11:34:50.570087 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 11:34:50.574011 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 11:34:50.576972 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 11:34:50.584188 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 11:34:50.588051 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 11:34:50.590905 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 11:34:50.593838 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 11:34:50.601012 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 11:34:50.604453 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 11:34:50.607647 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 11:34:50.610541 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 11:34:50.617061 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 11:34:50.620520 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 11:34:50.623933 call enable_fixed_mtrr()
2036 11:34:50.626953 call enable_fixed_mtrr()
2037 11:34:50.630237 MTRR: Fixed MSR 0x250 0x0606060606060606
2038 11:34:50.633870 MTRR: Fixed MSR 0x250 0x0606060606060606
2039 11:34:50.637467 MTRR: Fixed MSR 0x258 0x0606060606060606
2040 11:34:50.644081 MTRR: Fixed MSR 0x259 0x0000000000000000
2041 11:34:50.646843 MTRR: Fixed MSR 0x268 0x0606060606060606
2042 11:34:50.650317 MTRR: Fixed MSR 0x269 0x0606060606060606
2043 11:34:50.653862 MTRR: Fixed MSR 0x26a 0x0606060606060606
2044 11:34:50.660138 MTRR: Fixed MSR 0x26b 0x0606060606060606
2045 11:34:50.663457 MTRR: Fixed MSR 0x26c 0x0606060606060606
2046 11:34:50.667130 MTRR: Fixed MSR 0x26d 0x0606060606060606
2047 11:34:50.670128 MTRR: Fixed MSR 0x26e 0x0606060606060606
2048 11:34:50.674027 MTRR: Fixed MSR 0x26f 0x0606060606060606
2049 11:34:50.680576 MTRR: Fixed MSR 0x258 0x0606060606060606
2050 11:34:50.683393 call enable_fixed_mtrr()
2051 11:34:50.687671 MTRR: Fixed MSR 0x259 0x0000000000000000
2052 11:34:50.690051 MTRR: Fixed MSR 0x268 0x0606060606060606
2053 11:34:50.696752 MTRR: Fixed MSR 0x269 0x0606060606060606
2054 11:34:50.699976 MTRR: Fixed MSR 0x26a 0x0606060606060606
2055 11:34:50.703520 MTRR: Fixed MSR 0x26b 0x0606060606060606
2056 11:34:50.706316 MTRR: Fixed MSR 0x26c 0x0606060606060606
2057 11:34:50.710013 MTRR: Fixed MSR 0x26d 0x0606060606060606
2058 11:34:50.716658 MTRR: Fixed MSR 0x26e 0x0606060606060606
2059 11:34:50.720116 MTRR: Fixed MSR 0x26f 0x0606060606060606
2060 11:34:50.723169 CPU physical address size: 39 bits
2061 11:34:50.727491 call enable_fixed_mtrr()
2062 11:34:50.730603 MTRR: Fixed MSR 0x250 0x0606060606060606
2063 11:34:50.737234 MTRR: Fixed MSR 0x250 0x0606060606060606
2064 11:34:50.740657 MTRR: Fixed MSR 0x258 0x0606060606060606
2065 11:34:50.743750 MTRR: Fixed MSR 0x259 0x0000000000000000
2066 11:34:50.747006 MTRR: Fixed MSR 0x268 0x0606060606060606
2067 11:34:50.753549 MTRR: Fixed MSR 0x269 0x0606060606060606
2068 11:34:50.757838 MTRR: Fixed MSR 0x26a 0x0606060606060606
2069 11:34:50.760572 MTRR: Fixed MSR 0x26b 0x0606060606060606
2070 11:34:50.763620 MTRR: Fixed MSR 0x26c 0x0606060606060606
2071 11:34:50.770236 MTRR: Fixed MSR 0x26d 0x0606060606060606
2072 11:34:50.774256 MTRR: Fixed MSR 0x26e 0x0606060606060606
2073 11:34:50.777433 MTRR: Fixed MSR 0x26f 0x0606060606060606
2074 11:34:50.784093 MTRR: Fixed MSR 0x258 0x0606060606060606
2075 11:34:50.784604 call enable_fixed_mtrr()
2076 11:34:50.790872 MTRR: Fixed MSR 0x259 0x0000000000000000
2077 11:34:50.793720 MTRR: Fixed MSR 0x268 0x0606060606060606
2078 11:34:50.796993 MTRR: Fixed MSR 0x269 0x0606060606060606
2079 11:34:50.799988 MTRR: Fixed MSR 0x26a 0x0606060606060606
2080 11:34:50.807036 MTRR: Fixed MSR 0x26b 0x0606060606060606
2081 11:34:50.809936 MTRR: Fixed MSR 0x26c 0x0606060606060606
2082 11:34:50.813190 MTRR: Fixed MSR 0x26d 0x0606060606060606
2083 11:34:50.816787 MTRR: Fixed MSR 0x26e 0x0606060606060606
2084 11:34:50.819985 MTRR: Fixed MSR 0x26f 0x0606060606060606
2085 11:34:50.826810 CPU physical address size: 39 bits
2086 11:34:50.830162 call enable_fixed_mtrr()
2087 11:34:50.833394 CPU physical address size: 39 bits
2088 11:34:50.836580 CPU physical address size: 39 bits
2089 11:34:50.840031 CPU physical address size: 39 bits
2090 11:34:50.843711 Reading cr50 TPM mode
2091 11:34:50.847084 CPU physical address size: 39 bits
2092 11:34:50.853560 BS: BS_PAYLOAD_LOAD entry times (exec / console): 323 / 6 ms
2093 11:34:50.863806 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2094 11:34:50.867008 Checking segment from ROM address 0xffc02b38
2095 11:34:50.870129 Checking segment from ROM address 0xffc02b54
2096 11:34:50.877257 Loading segment from ROM address 0xffc02b38
2097 11:34:50.877803 code (compression=0)
2098 11:34:50.887159 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2099 11:34:50.893623 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2100 11:34:50.897269 it's not compressed!
2101 11:34:51.036179 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2102 11:34:51.042764 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2103 11:34:51.049606 Loading segment from ROM address 0xffc02b54
2104 11:34:51.050153 Entry Point 0x30000000
2105 11:34:51.052975 Loaded segments
2106 11:34:51.059936 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2107 11:34:51.102175 Finalizing chipset.
2108 11:34:51.105564 Finalizing SMM.
2109 11:34:51.106302 APMC done.
2110 11:34:51.112227 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2111 11:34:51.115726 mp_park_aps done after 0 msecs.
2112 11:34:51.118785 Jumping to boot code at 0x30000000(0x76b25000)
2113 11:34:51.128599 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2114 11:34:51.129154
2115 11:34:51.129518
2116 11:34:51.129875
2117 11:34:51.132184 Starting depthcharge on Voema...
2118 11:34:51.132737
2119 11:34:51.133964 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2120 11:34:51.134547 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2121 11:34:51.134991 Setting prompt string to ['volteer:']
2122 11:34:51.135430 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2123 11:34:51.142572 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2124 11:34:51.143125
2125 11:34:51.148657 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2126 11:34:51.149209
2127 11:34:51.155544 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2128 11:34:51.156007
2129 11:34:51.158947 Failed to find eMMC card reader
2130 11:34:51.159495
2131 11:34:51.159855 Wipe memory regions:
2132 11:34:51.160192
2133 11:34:51.165519 [0x00000000001000, 0x000000000a0000)
2134 11:34:51.166067
2135 11:34:51.168797 [0x00000000100000, 0x00000030000000)
2136 11:34:51.194340
2137 11:34:51.197779 [0x00000032662db0, 0x000000769ef000)
2138 11:34:51.233907
2139 11:34:51.237583 [0x00000100000000, 0x00000280400000)
2140 11:34:51.439305
2141 11:34:51.442523 ec_init: CrosEC protocol v3 supported (256, 256)
2142 11:34:51.443070
2143 11:34:51.449348 update_port_state: port C0 state: usb enable 1 mux conn 0
2144 11:34:51.449879
2145 11:34:51.455583 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2146 11:34:51.460525
2147 11:34:51.464306 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2148 11:34:51.464764
2149 11:34:51.467012 send_conn_disc_msg: pmc_send_cmd succeeded
2150 11:34:51.898022
2151 11:34:51.898228 R8152: Initializing
2152 11:34:51.898319
2153 11:34:51.901360 Version 6 (ocp_data = 5c30)
2154 11:34:51.901441
2155 11:34:51.904368 R8152: Done initializing
2156 11:34:51.904449
2157 11:34:51.908030 Adding net device
2158 11:34:52.210200
2159 11:34:52.213887 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2160 11:34:52.214011
2161 11:34:52.214073
2162 11:34:52.214130
2163 11:34:52.216951 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2165 11:34:52.317354 volteer: tftpboot 192.168.201.1 13086480/tftp-deploy-9nq_yu7p/kernel/bzImage 13086480/tftp-deploy-9nq_yu7p/kernel/cmdline 13086480/tftp-deploy-9nq_yu7p/ramdisk/ramdisk.cpio.gz
2166 11:34:52.317562 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2167 11:34:52.317683 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2168 11:34:52.322945 tftpboot 192.168.201.1 13086480/tftp-deploy-9nq_yu7p/kernel/bzImaploy-9nq_yu7p/kernel/cmdline 13086480/tftp-deploy-9nq_yu7p/ramdisk/ramdisk.cpio.gz
2169 11:34:52.323026
2170 11:34:52.323088 Waiting for link
2171 11:34:52.525183
2172 11:34:52.525336 done.
2173 11:34:52.525403
2174 11:34:52.525460 MAC: 00:24:32:30:7b:ec
2175 11:34:52.525515
2176 11:34:52.528321 Sending DHCP discover... done.
2177 11:34:52.528401
2178 11:34:52.531441 Waiting for reply... done.
2179 11:34:52.531519
2180 11:34:52.535853 Sending DHCP request... done.
2181 11:34:52.535950
2182 11:34:52.545595 Waiting for reply... done.
2183 11:34:52.545682
2184 11:34:52.545746 My ip is 192.168.201.11
2185 11:34:52.545803
2186 11:34:52.548911 The DHCP server ip is 192.168.201.1
2187 11:34:52.552199
2188 11:34:52.555699 TFTP server IP predefined by user: 192.168.201.1
2189 11:34:52.555781
2190 11:34:52.562586 Bootfile predefined by user: 13086480/tftp-deploy-9nq_yu7p/kernel/bzImage
2191 11:34:52.562695
2192 11:34:52.565798 Sending tftp read request... done.
2193 11:34:52.565904
2194 11:34:52.572464 Waiting for the transfer...
2195 11:34:52.572573
2196 11:34:53.128322 00000000 ################################################################
2197 11:34:53.128571
2198 11:34:53.724830 00080000 ################################################################
2199 11:34:53.725430
2200 11:34:54.423483 00100000 ################################################################
2201 11:34:54.424011
2202 11:34:55.150635 00180000 ################################################################
2203 11:34:55.151167
2204 11:34:55.872238 00200000 ################################################################
2205 11:34:55.872779
2206 11:34:56.584515 00280000 ################################################################
2207 11:34:56.585069
2208 11:34:57.298706 00300000 ################################################################
2209 11:34:57.299220
2210 11:34:58.001809 00380000 ################################################################
2211 11:34:58.002358
2212 11:34:58.731188 00400000 ################################################################
2213 11:34:58.731760
2214 11:34:59.453597 00480000 ################################################################
2215 11:34:59.454164
2216 11:35:00.164622 00500000 ################################################################
2217 11:35:00.165228
2218 11:35:00.890496 00580000 ################################################################
2219 11:35:00.891067
2220 11:35:01.598366 00600000 ################################################################
2221 11:35:01.598996
2222 11:35:02.311363 00680000 ################################################################
2223 11:35:02.311881
2224 11:35:03.017495 00700000 ################################################################
2225 11:35:03.018039
2226 11:35:03.735733 00780000 ################################################################
2227 11:35:03.736243
2228 11:35:04.443843 00800000 ################################################################
2229 11:35:04.444396
2230 11:35:05.072173 00880000 ######################################################### done.
2231 11:35:05.072772
2232 11:35:05.076101 The bootfile was 9375632 bytes long.
2233 11:35:05.076565
2234 11:35:05.078682 Sending tftp read request... done.
2235 11:35:05.079233
2236 11:35:05.082140 Waiting for the transfer...
2237 11:35:05.082632
2238 11:35:05.775839 00000000 ################################################################
2239 11:35:05.776342
2240 11:35:06.461303 00080000 ################################################################
2241 11:35:06.461813
2242 11:35:07.153092 00100000 ################################################################
2243 11:35:07.153646
2244 11:35:07.861789 00180000 ################################################################
2245 11:35:07.862362
2246 11:35:08.561223 00200000 ################################################################
2247 11:35:08.561724
2248 11:35:09.252938 00280000 ################################################################
2249 11:35:09.253445
2250 11:35:09.961186 00300000 ################################################################
2251 11:35:09.961689
2252 11:35:10.638524 00380000 ################################################################
2253 11:35:10.639035
2254 11:35:11.322899 00400000 ################################################################
2255 11:35:11.323401
2256 11:35:12.045823 00480000 ################################################################
2257 11:35:12.046370
2258 11:35:12.749907 00500000 ################################################################
2259 11:35:12.750472
2260 11:35:13.064733 00580000 ############################# done.
2261 11:35:13.065279
2262 11:35:13.068038 Sending tftp read request... done.
2263 11:35:13.068466
2264 11:35:13.071579 Waiting for the transfer...
2265 11:35:13.072009
2266 11:35:13.072447 00000000 # done.
2267 11:35:13.072866
2268 11:35:13.081978 Command line loaded dynamically from TFTP file: 13086480/tftp-deploy-9nq_yu7p/kernel/cmdline
2269 11:35:13.082565
2270 11:35:13.107496 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13086480/extract-nfsrootfs-murxjyw5,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2271 11:35:13.111718
2272 11:35:13.114496 Shutting down all USB controllers.
2273 11:35:13.114929
2274 11:35:13.115362 Removing current net device
2275 11:35:13.115773
2276 11:35:13.118212 Finalizing coreboot
2277 11:35:13.118691
2278 11:35:13.124394 Exiting depthcharge with code 4 at timestamp: 30632979
2279 11:35:13.124924
2280 11:35:13.125365
2281 11:35:13.125774 Starting kernel ...
2282 11:35:13.126175
2283 11:35:13.126633
2284 11:35:13.127901 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2285 11:35:13.128424 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2286 11:35:13.128834 Setting prompt string to ['Linux version [0-9]']
2287 11:35:13.129253 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2288 11:35:13.129670 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2290 11:39:36.129501 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2292 11:39:36.131318 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2294 11:39:36.132697 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2297 11:39:36.134102 end: 2 depthcharge-action (duration 00:05:00) [common]
2299 11:39:36.134321 Cleaning after the job
2300 11:39:36.134435 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086480/tftp-deploy-9nq_yu7p/ramdisk
2301 11:39:36.135407 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086480/tftp-deploy-9nq_yu7p/kernel
2302 11:39:36.136804 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086480/tftp-deploy-9nq_yu7p/nfsrootfs
2303 11:39:36.261401 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086480/tftp-deploy-9nq_yu7p/modules
2304 11:39:36.262090 start: 4.1 power-off (timeout 00:00:30) [common]
2305 11:39:36.262364 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=off'
2306 11:39:36.344766 >> Command sent successfully.
2307 11:39:36.355694 Returned 0 in 0 seconds
2308 11:39:36.457197 end: 4.1 power-off (duration 00:00:00) [common]
2310 11:39:36.459135 start: 4.2 read-feedback (timeout 00:10:00) [common]
2311 11:39:36.460521 Listened to connection for namespace 'common' for up to 1s
2312 11:39:37.461237 Finalising connection for namespace 'common'
2313 11:39:37.462057 Disconnecting from shell: Finalise
2314 11:39:37.462629
2315 11:39:37.563673 end: 4.2 read-feedback (duration 00:00:01) [common]
2316 11:39:37.564311 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13086480
2317 11:39:38.112034 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13086480
2318 11:39:38.112225 JobError: Your job cannot terminate cleanly.