Boot log: acer-cp514-2h-1130g7-volteer

    1 15:17:00.877502  lava-dispatcher, installed at version: 2024.05
    2 15:17:00.877745  start: 0 validate
    3 15:17:00.877868  Start time: 2024-07-17 15:17:00.877862+00:00 (UTC)
    4 15:17:00.878019  Using caching service: 'http://localhost/cache/?uri=%s'
    5 15:17:00.878176  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
    6 15:17:01.140019  Using caching service: 'http://localhost/cache/?uri=%s'
    7 15:17:01.140193  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-3475-gffa3d4f70bc60%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-12%2Fkernel%2FbzImage exists
    8 15:17:01.398066  Using caching service: 'http://localhost/cache/?uri=%s'
    9 15:17:01.398245  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 15:17:01.654763  Using caching service: 'http://localhost/cache/?uri=%s'
   11 15:17:01.654910  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-3475-gffa3d4f70bc60%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-12%2Fmodules.tar.xz exists
   12 15:17:01.913517  validate duration: 1.04
   14 15:17:01.913784  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 15:17:01.913886  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 15:17:01.913978  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 15:17:01.914139  Not decompressing ramdisk as can be used compressed.
   18 15:17:01.914236  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/amd64/initrd.cpio.gz
   19 15:17:01.914346  saving as /var/lib/lava/dispatcher/tmp/14866112/tftp-deploy-mif4cjv6/ramdisk/initrd.cpio.gz
   20 15:17:01.914471  total size: 6137763 (5 MB)
   21 15:17:01.915880  progress   0 % (0 MB)
   22 15:17:01.917850  progress   5 % (0 MB)
   23 15:17:01.919710  progress  10 % (0 MB)
   24 15:17:01.921668  progress  15 % (0 MB)
   25 15:17:01.923393  progress  20 % (1 MB)
   26 15:17:01.925114  progress  25 % (1 MB)
   27 15:17:01.926949  progress  30 % (1 MB)
   28 15:17:01.928652  progress  35 % (2 MB)
   29 15:17:01.930325  progress  40 % (2 MB)
   30 15:17:01.932240  progress  45 % (2 MB)
   31 15:17:01.933949  progress  50 % (2 MB)
   32 15:17:01.935907  progress  55 % (3 MB)
   33 15:17:01.937662  progress  60 % (3 MB)
   34 15:17:01.939407  progress  65 % (3 MB)
   35 15:17:01.941364  progress  70 % (4 MB)
   36 15:17:01.943066  progress  75 % (4 MB)
   37 15:17:01.944808  progress  80 % (4 MB)
   38 15:17:01.946634  progress  85 % (5 MB)
   39 15:17:01.948265  progress  90 % (5 MB)
   40 15:17:01.949888  progress  95 % (5 MB)
   41 15:17:01.951725  progress 100 % (5 MB)
   42 15:17:01.951878  5 MB downloaded in 0.04 s (156.50 MB/s)
   43 15:17:01.952040  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 15:17:01.952280  end: 1.1 download-retry (duration 00:00:00) [common]
   46 15:17:01.952367  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 15:17:01.952450  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 15:17:01.952594  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-3475-gffa3d4f70bc60/x86_64/x86_64_defconfig+x86-board/gcc-12/kernel/bzImage
   49 15:17:01.952662  saving as /var/lib/lava/dispatcher/tmp/14866112/tftp-deploy-mif4cjv6/kernel/bzImage
   50 15:17:01.952720  total size: 14143376 (13 MB)
   51 15:17:01.952779  No compression specified
   52 15:17:01.953809  progress   0 % (0 MB)
   53 15:17:01.957611  progress   5 % (0 MB)
   54 15:17:01.961538  progress  10 % (1 MB)
   55 15:17:01.965324  progress  15 % (2 MB)
   56 15:17:01.969299  progress  20 % (2 MB)
   57 15:17:01.973105  progress  25 % (3 MB)
   58 15:17:01.977072  progress  30 % (4 MB)
   59 15:17:01.981041  progress  35 % (4 MB)
   60 15:17:01.984825  progress  40 % (5 MB)
   61 15:17:01.988838  progress  45 % (6 MB)
   62 15:17:01.992631  progress  50 % (6 MB)
   63 15:17:01.996727  progress  55 % (7 MB)
   64 15:17:02.000546  progress  60 % (8 MB)
   65 15:17:02.004475  progress  65 % (8 MB)
   66 15:17:02.008440  progress  70 % (9 MB)
   67 15:17:02.012269  progress  75 % (10 MB)
   68 15:17:02.016253  progress  80 % (10 MB)
   69 15:17:02.020035  progress  85 % (11 MB)
   70 15:17:02.023965  progress  90 % (12 MB)
   71 15:17:02.028107  progress  95 % (12 MB)
   72 15:17:02.031838  progress 100 % (13 MB)
   73 15:17:02.032069  13 MB downloaded in 0.08 s (170.00 MB/s)
   74 15:17:02.032263  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 15:17:02.032689  end: 1.2 download-retry (duration 00:00:00) [common]
   77 15:17:02.032823  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 15:17:02.032951  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 15:17:02.033130  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/amd64/full.rootfs.tar.xz
   80 15:17:02.033202  saving as /var/lib/lava/dispatcher/tmp/14866112/tftp-deploy-mif4cjv6/nfsrootfs/full.rootfs.tar
   81 15:17:02.033280  total size: 58462052 (55 MB)
   82 15:17:02.033359  Using unxz to decompress xz
   83 15:17:02.035112  progress   0 % (0 MB)
   84 15:17:02.205280  progress   5 % (2 MB)
   85 15:17:02.383719  progress  10 % (5 MB)
   86 15:17:02.560996  progress  15 % (8 MB)
   87 15:17:02.718992  progress  20 % (11 MB)
   88 15:17:02.900546  progress  25 % (13 MB)
   89 15:17:03.080385  progress  30 % (16 MB)
   90 15:17:03.218003  progress  35 % (19 MB)
   91 15:17:03.294438  progress  40 % (22 MB)
   92 15:17:03.458270  progress  45 % (25 MB)
   93 15:17:03.645347  progress  50 % (27 MB)
   94 15:17:03.817162  progress  55 % (30 MB)
   95 15:17:03.992078  progress  60 % (33 MB)
   96 15:17:04.169735  progress  65 % (36 MB)
   97 15:17:04.337766  progress  70 % (39 MB)
   98 15:17:04.522835  progress  75 % (41 MB)
   99 15:17:04.682406  progress  80 % (44 MB)
  100 15:17:04.846684  progress  85 % (47 MB)
  101 15:17:05.038907  progress  90 % (50 MB)
  102 15:17:05.227078  progress  95 % (52 MB)
  103 15:17:05.420577  progress 100 % (55 MB)
  104 15:17:05.425959  55 MB downloaded in 3.39 s (16.43 MB/s)
  105 15:17:05.426197  end: 1.3.1 http-download (duration 00:00:03) [common]
  107 15:17:05.426598  end: 1.3 download-retry (duration 00:00:03) [common]
  108 15:17:05.426697  start: 1.4 download-retry (timeout 00:09:56) [common]
  109 15:17:05.426820  start: 1.4.1 http-download (timeout 00:09:56) [common]
  110 15:17:05.427003  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-3475-gffa3d4f70bc60/x86_64/x86_64_defconfig+x86-board/gcc-12/modules.tar.xz
  111 15:17:05.427101  saving as /var/lib/lava/dispatcher/tmp/14866112/tftp-deploy-mif4cjv6/modules/modules.tar
  112 15:17:05.427193  total size: 717636 (0 MB)
  113 15:17:05.427286  Using unxz to decompress xz
  114 15:17:05.429234  progress   4 % (0 MB)
  115 15:17:05.429543  progress   9 % (0 MB)
  116 15:17:05.431331  progress  18 % (0 MB)
  117 15:17:05.435309  progress  27 % (0 MB)
  118 15:17:05.439557  progress  36 % (0 MB)
  119 15:17:05.441430  progress  41 % (0 MB)
  120 15:17:05.445298  progress  50 % (0 MB)
  121 15:17:05.449013  progress  59 % (0 MB)
  122 15:17:05.453021  progress  68 % (0 MB)
  123 15:17:05.455006  progress  73 % (0 MB)
  124 15:17:05.458710  progress  82 % (0 MB)
  125 15:17:05.462697  progress  91 % (0 MB)
  126 15:17:05.466721  progress 100 % (0 MB)
  127 15:17:05.473076  0 MB downloaded in 0.05 s (14.92 MB/s)
  128 15:17:05.473325  end: 1.4.1 http-download (duration 00:00:00) [common]
  130 15:17:05.473728  end: 1.4 download-retry (duration 00:00:00) [common]
  131 15:17:05.473879  start: 1.5 prepare-tftp-overlay (timeout 00:09:56) [common]
  132 15:17:05.474009  start: 1.5.1 extract-nfsrootfs (timeout 00:09:56) [common]
  133 15:17:07.354325  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14866112/extract-nfsrootfs-pukh_m4h
  134 15:17:07.354545  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  135 15:17:07.354658  start: 1.5.2 lava-overlay (timeout 00:09:55) [common]
  136 15:17:07.354863  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z
  137 15:17:07.355031  makedir: /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin
  138 15:17:07.355165  makedir: /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/tests
  139 15:17:07.355301  makedir: /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/results
  140 15:17:07.355431  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-add-keys
  141 15:17:07.355613  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-add-sources
  142 15:17:07.355817  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-background-process-start
  143 15:17:07.355998  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-background-process-stop
  144 15:17:07.356182  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-common-functions
  145 15:17:07.356355  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-echo-ipv4
  146 15:17:07.356525  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-install-packages
  147 15:17:07.356685  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-installed-packages
  148 15:17:07.356848  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-os-build
  149 15:17:07.357010  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-probe-channel
  150 15:17:07.357181  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-probe-ip
  151 15:17:07.357346  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-target-ip
  152 15:17:07.357510  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-target-mac
  153 15:17:07.357668  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-target-storage
  154 15:17:07.357835  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-test-case
  155 15:17:07.357996  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-test-event
  156 15:17:07.358161  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-test-feedback
  157 15:17:07.358325  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-test-raise
  158 15:17:07.358483  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-test-reference
  159 15:17:07.358611  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-test-runner
  160 15:17:07.358748  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-test-set
  161 15:17:07.358907  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-test-shell
  162 15:17:07.359069  Updating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-install-packages (oe)
  163 15:17:07.359255  Updating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/bin/lava-installed-packages (oe)
  164 15:17:07.359413  Creating /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/environment
  165 15:17:07.359535  LAVA metadata
  166 15:17:07.359609  - LAVA_JOB_ID=14866112
  167 15:17:07.359671  - LAVA_DISPATCHER_IP=192.168.201.1
  168 15:17:07.359778  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:55) [common]
  169 15:17:07.359842  skipped lava-vland-overlay
  170 15:17:07.359915  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  171 15:17:07.359993  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:55) [common]
  172 15:17:07.360071  skipped lava-multinode-overlay
  173 15:17:07.360174  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  174 15:17:07.360284  start: 1.5.2.3 test-definition (timeout 00:09:55) [common]
  175 15:17:07.360387  Loading test definitions
  176 15:17:07.360503  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:55) [common]
  177 15:17:07.360612  Using /lava-14866112 at stage 0
  178 15:17:07.361063  uuid=14866112_1.5.2.3.1 testdef=None
  179 15:17:07.361183  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  180 15:17:07.361304  start: 1.5.2.3.2 test-overlay (timeout 00:09:55) [common]
  181 15:17:07.362000  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  183 15:17:07.362420  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:55) [common]
  184 15:17:07.363228  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  186 15:17:07.363630  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:55) [common]
  187 15:17:07.364518  runner path: /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/0/tests/0_wifi-basic test_uuid 14866112_1.5.2.3.1
  188 15:17:07.364711  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  190 15:17:07.365057  Creating lava-test-runner.conf files
  191 15:17:07.365146  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14866112/lava-overlay-zvbcux5z/lava-14866112/0 for stage 0
  192 15:17:07.365273  - 0_wifi-basic
  193 15:17:07.365402  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  194 15:17:07.365520  start: 1.5.2.4 compress-overlay (timeout 00:09:55) [common]
  195 15:17:07.374322  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  196 15:17:07.374465  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:55) [common]
  197 15:17:07.374584  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  198 15:17:07.374701  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  199 15:17:07.374818  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:55) [common]
  200 15:17:07.536591  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  201 15:17:07.536790  start: 1.5.4 extract-modules (timeout 00:09:54) [common]
  202 15:17:07.536913  extracting modules file /var/lib/lava/dispatcher/tmp/14866112/tftp-deploy-mif4cjv6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14866112/extract-nfsrootfs-pukh_m4h
  203 15:17:07.575341  extracting modules file /var/lib/lava/dispatcher/tmp/14866112/tftp-deploy-mif4cjv6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14866112/extract-overlay-ramdisk-_qc64kds/ramdisk
  204 15:17:07.612550  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  205 15:17:07.612730  start: 1.5.5 apply-overlay-tftp (timeout 00:09:54) [common]
  206 15:17:07.612845  [common] Applying overlay to NFS
  207 15:17:07.612948  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14866112/compress-overlay-o24kgsng/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14866112/extract-nfsrootfs-pukh_m4h
  208 15:17:07.623941  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  209 15:17:07.624061  start: 1.5.6 configure-preseed-file (timeout 00:09:54) [common]
  210 15:17:07.624148  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  211 15:17:07.624231  start: 1.5.7 compress-ramdisk (timeout 00:09:54) [common]
  212 15:17:07.624304  Building ramdisk /var/lib/lava/dispatcher/tmp/14866112/extract-overlay-ramdisk-_qc64kds/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14866112/extract-overlay-ramdisk-_qc64kds/ramdisk
  213 15:17:07.696493  >> 34643 blocks

  214 15:17:08.487691  rename /var/lib/lava/dispatcher/tmp/14866112/extract-overlay-ramdisk-_qc64kds/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14866112/tftp-deploy-mif4cjv6/ramdisk/ramdisk.cpio.gz
  215 15:17:08.487867  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  216 15:17:08.487963  start: 1.5.8 prepare-kernel (timeout 00:09:53) [common]
  217 15:17:08.488048  start: 1.5.8.1 prepare-fit (timeout 00:09:53) [common]
  218 15:17:08.488122  No mkimage arch provided, not using FIT.
  219 15:17:08.488201  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  220 15:17:08.488278  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  221 15:17:08.488358  end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
  222 15:17:08.488436  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:53) [common]
  223 15:17:08.488499  No LXC device requested
  224 15:17:08.488571  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  225 15:17:08.488651  start: 1.7 deploy-device-env (timeout 00:09:53) [common]
  226 15:17:08.488725  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  227 15:17:08.488784  Checking files for TFTP limit of 4294967296 bytes.
  228 15:17:08.489096  end: 1 tftp-deploy (duration 00:00:07) [common]
  229 15:17:08.489189  start: 2 depthcharge-action (timeout 00:05:00) [common]
  230 15:17:08.489273  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  231 15:17:08.489374  substitutions:
  232 15:17:08.489437  - {DTB}: None
  233 15:17:08.489495  - {INITRD}: 14866112/tftp-deploy-mif4cjv6/ramdisk/ramdisk.cpio.gz
  234 15:17:08.489551  - {KERNEL}: 14866112/tftp-deploy-mif4cjv6/kernel/bzImage
  235 15:17:08.489606  - {LAVA_MAC}: None
  236 15:17:08.489661  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14866112/extract-nfsrootfs-pukh_m4h
  237 15:17:08.489749  - {NFS_SERVER_IP}: 192.168.201.1
  238 15:17:08.489833  - {PRESEED_CONFIG}: None
  239 15:17:08.489923  - {PRESEED_LOCAL}: None
  240 15:17:08.490005  - {RAMDISK}: 14866112/tftp-deploy-mif4cjv6/ramdisk/ramdisk.cpio.gz
  241 15:17:08.490061  - {ROOT_PART}: None
  242 15:17:08.490118  - {ROOT}: None
  243 15:17:08.490174  - {SERVER_IP}: 192.168.201.1
  244 15:17:08.490227  - {TEE}: None
  245 15:17:08.490280  Parsed boot commands:
  246 15:17:08.490332  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  247 15:17:08.490480  Parsed boot commands: tftpboot 192.168.201.1 14866112/tftp-deploy-mif4cjv6/kernel/bzImage 14866112/tftp-deploy-mif4cjv6/kernel/cmdline 14866112/tftp-deploy-mif4cjv6/ramdisk/ramdisk.cpio.gz
  248 15:17:08.490567  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  249 15:17:08.490646  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  250 15:17:08.490724  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  251 15:17:08.490799  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  252 15:17:08.490858  Not connected, no need to disconnect.
  253 15:17:08.490929  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  254 15:17:08.491003  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  255 15:17:08.491062  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-4'
  256 15:17:08.494131  Setting prompt string to ['lava-test: # ']
  257 15:17:08.494493  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  258 15:17:08.494610  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  259 15:17:08.494715  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  260 15:17:08.494807  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  261 15:17:08.495086  Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cp514-2h-1130g7-volteer-cbg-4', '--port=1', '--command=reboot']
  262 15:17:17.620549  >> Command sent successfully.
  263 15:17:17.623839  Returned 0 in 9 seconds
  264 15:17:17.624021  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  266 15:17:17.624337  end: 2.2.2 reset-device (duration 00:00:09) [common]
  267 15:17:17.624429  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  268 15:17:17.624539  Setting prompt string to 'Starting depthcharge on Voema...'
  269 15:17:17.624629  Changing prompt to 'Starting depthcharge on Voema...'
  270 15:17:17.624730  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  271 15:17:17.625265  [Enter `^Ec?' for help]

  272 15:17:19.708630  

  273 15:17:19.708796  

  274 15:17:19.718453  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  275 15:17:19.721986  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  276 15:17:19.728408  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  277 15:17:19.731804  CPU: AES supported, TXT NOT supported, VT supported

  278 15:17:19.738367  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  279 15:17:19.741809  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  280 15:17:19.748635  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  281 15:17:19.751582  VBOOT: Loading verstage.

  282 15:17:19.754993  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  283 15:17:19.761973  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  284 15:17:19.765077  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  285 15:17:19.775766  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  286 15:17:19.781875  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  287 15:17:19.781988  

  288 15:17:19.782082  

  289 15:17:19.795248  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  290 15:17:19.809202  Probing TPM: . done!

  291 15:17:19.812420  TPM ready after 0 ms

  292 15:17:19.815765  Connected to device vid:did:rid of 1ae0:0028:00

  293 15:17:19.826940  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

  294 15:17:19.833709  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  295 15:17:19.837248  Initialized TPM device CR50 revision 0

  296 15:17:19.886234  tlcl_send_startup: Startup return code is 0

  297 15:17:19.886363  TPM: setup succeeded

  298 15:17:19.901904  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  299 15:17:19.915936  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  300 15:17:19.930110  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  301 15:17:19.938971  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  302 15:17:19.942404  Chrome EC: UHEPI supported

  303 15:17:19.945850  Phase 1

  304 15:17:19.949142  FMAP: area GBB found @ 1805000 (458752 bytes)

  305 15:17:19.959234  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  306 15:17:19.965799  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  307 15:17:19.972657  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  308 15:17:19.978911  VB2:vb2_check_recovery() Recovery was requested manually

  309 15:17:19.982375  VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7

  310 15:17:19.985697  Recovery requested (1009000e)

  311 15:17:19.992709  TPM: Extending digest for VBOOT: boot mode into PCR 0

  312 15:17:20.002693  tlcl_extend: response is 0

  313 15:17:20.009236  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  314 15:17:20.019203  tlcl_extend: response is 0

  315 15:17:20.025817  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  316 15:17:20.032623  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  317 15:17:20.039364  BS: verstage times (exec / console): total (unknown) / 147 ms

  318 15:17:20.039487  

  319 15:17:20.039557  

  320 15:17:20.052748  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  321 15:17:20.059010  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  322 15:17:20.062448  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  323 15:17:20.065779  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  324 15:17:20.072426  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  325 15:17:20.075837  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  326 15:17:20.079105  gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000

  327 15:17:20.082392  TCO_STS:   0000 0000

  328 15:17:20.085883  GEN_PMCON: d0015038 00002200

  329 15:17:20.089353  GBLRST_CAUSE: 00000000 00000000

  330 15:17:20.089433  HPR_CAUSE0: 00000000

  331 15:17:20.092245  prev_sleep_state 5

  332 15:17:20.095742  Boot Count incremented to 39441

  333 15:17:20.102456  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  334 15:17:20.109114  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  335 15:17:20.115733  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  336 15:17:20.122410  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  337 15:17:20.126739  Chrome EC: UHEPI supported

  338 15:17:20.133829  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  339 15:17:20.146513  Probing TPM:  done!

  340 15:17:20.152858  Connected to device vid:did:rid of 1ae0:0028:00

  341 15:17:20.162907  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

  342 15:17:20.166897  Initialized TPM device CR50 revision 0

  343 15:17:20.181296  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  344 15:17:20.188018  MRC: Hash idx 0x100b comparison successful.

  345 15:17:20.191358  MRC cache found, size faa8

  346 15:17:20.191466  bootmode is set to: 2

  347 15:17:20.194439  SPD index = 0

  348 15:17:20.201144  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  349 15:17:20.204834  SPD: module type is LPDDR4X

  350 15:17:20.207938  SPD: module part number is MT53E512M64D4NW-046

  351 15:17:20.214809  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  352 15:17:20.217960  SPD: device width 16 bits, bus width 16 bits

  353 15:17:20.224786  SPD: module size is 1024 MB (per channel)

  354 15:17:20.656517  CBMEM:

  355 15:17:20.659471  IMD: root @ 0x76fff000 254 entries.

  356 15:17:20.662921  IMD: root @ 0x76ffec00 62 entries.

  357 15:17:20.666445  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  358 15:17:20.672823  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  359 15:17:20.676215  External stage cache:

  360 15:17:20.679667  IMD: root @ 0x7b3ff000 254 entries.

  361 15:17:20.682797  IMD: root @ 0x7b3fec00 62 entries.

  362 15:17:20.698394  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  363 15:17:20.704731  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  364 15:17:20.711328  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  365 15:17:20.725434  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  366 15:17:20.731879  cse_lite: Skip switching to RW in the recovery path

  367 15:17:20.731986  8 DIMMs found

  368 15:17:20.732085  SMM Memory Map

  369 15:17:20.738407  SMRAM       : 0x7b000000 0x800000

  370 15:17:20.741797   Subregion 0: 0x7b000000 0x200000

  371 15:17:20.745035   Subregion 1: 0x7b200000 0x200000

  372 15:17:20.748476   Subregion 2: 0x7b400000 0x400000

  373 15:17:20.748586  top_of_ram = 0x77000000

  374 15:17:20.755154  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  375 15:17:20.761899  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  376 15:17:20.764874  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  377 15:17:20.771570  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  378 15:17:20.778028  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  379 15:17:20.784944  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  380 15:17:20.794955  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  381 15:17:20.801766  Processing 211 relocs. Offset value of 0x74c0b000

  382 15:17:20.808097  BS: romstage times (exec / console): total (unknown) / 277 ms

  383 15:17:20.814238  

  384 15:17:20.814326  

  385 15:17:20.824425  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  386 15:17:20.827820  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  387 15:17:20.837267  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  388 15:17:20.843907  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  389 15:17:20.850651  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  390 15:17:20.857290  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  391 15:17:20.904272  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  392 15:17:20.910951  Processing 5008 relocs. Offset value of 0x75d98000

  393 15:17:20.914121  BS: postcar times (exec / console): total (unknown) / 59 ms

  394 15:17:20.917716  

  395 15:17:20.917833  

  396 15:17:20.927391  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  397 15:17:20.927514  Normal boot

  398 15:17:20.930847  FW_CONFIG value is 0x804c02

  399 15:17:20.934177  PCI: 00:07.0 disabled by fw_config

  400 15:17:20.937218  PCI: 00:07.1 disabled by fw_config

  401 15:17:20.940726  PCI: 00:0d.2 disabled by fw_config

  402 15:17:20.947435  PCI: 00:1c.7 disabled by fw_config

  403 15:17:20.950526  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  404 15:17:20.957322  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  405 15:17:20.961024  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  406 15:17:20.967158  GENERIC: 0.0 disabled by fw_config

  407 15:17:20.970684  GENERIC: 1.0 disabled by fw_config

  408 15:17:20.973717  fw_config match found: DB_USB=USB3_ACTIVE

  409 15:17:20.977142  fw_config match found: DB_USB=USB3_ACTIVE

  410 15:17:20.980541  fw_config match found: DB_USB=USB3_ACTIVE

  411 15:17:20.987279  fw_config match found: DB_USB=USB3_ACTIVE

  412 15:17:20.990519  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  413 15:17:20.997051  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  414 15:17:21.007036  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  415 15:17:21.013708  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  416 15:17:21.017112  microcode: sig=0x806c1 pf=0x80 revision=0x86

  417 15:17:21.023745  microcode: Update skipped, already up-to-date

  418 15:17:21.030521  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  419 15:17:21.058034  Detected 4 core, 8 thread CPU.

  420 15:17:21.061137  Setting up SMI for CPU

  421 15:17:21.064649  IED base = 0x7b400000

  422 15:17:21.064726  IED size = 0x00400000

  423 15:17:21.067753  Will perform SMM setup.

  424 15:17:21.074490  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  425 15:17:21.081443  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  426 15:17:21.087803  Processing 16 relocs. Offset value of 0x00030000

  427 15:17:21.091244  Attempting to start 7 APs

  428 15:17:21.094221  Waiting for 10ms after sending INIT.

  429 15:17:21.110075  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  430 15:17:21.113304  AP: slot 3 apic_id 5.

  431 15:17:21.116808  AP: slot 7 apic_id 4.

  432 15:17:21.116888  AP: slot 6 apic_id 2.

  433 15:17:21.119920  AP: slot 2 apic_id 3.

  434 15:17:21.123147  AP: slot 5 apic_id 6.

  435 15:17:21.123220  AP: slot 4 apic_id 7.

  436 15:17:21.123282  done.

  437 15:17:21.130177  Waiting for 2nd SIPI to complete...done.

  438 15:17:21.136696  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  439 15:17:21.143111  Processing 13 relocs. Offset value of 0x00038000

  440 15:17:21.146552  Unable to locate Global NVS

  441 15:17:21.153038  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  442 15:17:21.156569  Installing permanent SMM handler to 0x7b000000

  443 15:17:21.166281  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  444 15:17:21.169710  Processing 794 relocs. Offset value of 0x7b010000

  445 15:17:21.176942  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  446 15:17:21.183552  Processing 13 relocs. Offset value of 0x7b008000

  447 15:17:21.190054  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  448 15:17:21.193502  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  449 15:17:21.200404  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  450 15:17:21.206920  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  451 15:17:21.213690  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  452 15:17:21.220246  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  453 15:17:21.223392  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  454 15:17:21.226941  Unable to locate Global NVS

  455 15:17:21.233224  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  456 15:17:21.237888  Clearing SMI status registers

  457 15:17:21.241283  SMI_STS: PM1 

  458 15:17:21.241358  PM1_STS: PWRBTN 

  459 15:17:21.244909  GPE0 STD STS: 

  460 15:17:21.251282  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  461 15:17:21.254635  In relocation handler: CPU 0

  462 15:17:21.258009  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  463 15:17:21.264686  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  464 15:17:21.264763  Relocation complete.

  465 15:17:21.271341  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  466 15:17:21.274400  In relocation handler: CPU 1

  467 15:17:21.281367  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  468 15:17:21.281447  Relocation complete.

  469 15:17:21.287665  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  470 15:17:21.290892  In relocation handler: CPU 7

  471 15:17:21.297850  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  472 15:17:21.301299  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  473 15:17:21.304365  Relocation complete.

  474 15:17:21.311168  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  475 15:17:21.314576  In relocation handler: CPU 3

  476 15:17:21.317643  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  477 15:17:21.321040  Relocation complete.

  478 15:17:21.327805  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  479 15:17:21.331107  In relocation handler: CPU 5

  480 15:17:21.334332  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  481 15:17:21.337740  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  482 15:17:21.341136  Relocation complete.

  483 15:17:21.347751  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  484 15:17:21.350975  In relocation handler: CPU 4

  485 15:17:21.354350  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  486 15:17:21.357747  Relocation complete.

  487 15:17:21.364276  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  488 15:17:21.367697  In relocation handler: CPU 2

  489 15:17:21.370996  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  490 15:17:21.374420  Relocation complete.

  491 15:17:21.380873  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  492 15:17:21.384200  In relocation handler: CPU 6

  493 15:17:21.387565  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  494 15:17:21.394662  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  495 15:17:21.394746  Relocation complete.

  496 15:17:21.397749  Initializing CPU #0

  497 15:17:21.401117  CPU: vendor Intel device 806c1

  498 15:17:21.404479  CPU: family 06, model 8c, stepping 01

  499 15:17:21.407430  Clearing out pending MCEs

  500 15:17:21.411025  Setting up local APIC...

  501 15:17:21.411102   apic_id: 0x00 done.

  502 15:17:21.414428  Turbo is available but hidden

  503 15:17:21.417407  Turbo is available and visible

  504 15:17:21.424394  microcode: Update skipped, already up-to-date

  505 15:17:21.424471  CPU #0 initialized

  506 15:17:21.427439  Initializing CPU #4

  507 15:17:21.430840  Initializing CPU #5

  508 15:17:21.430917  CPU: vendor Intel device 806c1

  509 15:17:21.437623  CPU: family 06, model 8c, stepping 01

  510 15:17:21.441048  CPU: vendor Intel device 806c1

  511 15:17:21.444338  CPU: family 06, model 8c, stepping 01

  512 15:17:21.444417  Clearing out pending MCEs

  513 15:17:21.447526  Initializing CPU #6

  514 15:17:21.450642  Initializing CPU #2

  515 15:17:21.453976  CPU: vendor Intel device 806c1

  516 15:17:21.457389  CPU: family 06, model 8c, stepping 01

  517 15:17:21.461076  CPU: vendor Intel device 806c1

  518 15:17:21.464069  CPU: family 06, model 8c, stepping 01

  519 15:17:21.467643  Clearing out pending MCEs

  520 15:17:21.467729  Clearing out pending MCEs

  521 15:17:21.470766  Setting up local APIC...

  522 15:17:21.474181  Initializing CPU #7

  523 15:17:21.474261   apic_id: 0x02 done.

  524 15:17:21.477509  Initializing CPU #1

  525 15:17:21.480811  Clearing out pending MCEs

  526 15:17:21.484236  Setting up local APIC...

  527 15:17:21.487300  CPU: vendor Intel device 806c1

  528 15:17:21.491001  CPU: family 06, model 8c, stepping 01

  529 15:17:21.493952  CPU: vendor Intel device 806c1

  530 15:17:21.497362  CPU: family 06, model 8c, stepping 01

  531 15:17:21.497448  Initializing CPU #3

  532 15:17:21.500821  Setting up local APIC...

  533 15:17:21.503863  Clearing out pending MCEs

  534 15:17:21.507316  CPU: vendor Intel device 806c1

  535 15:17:21.510615  CPU: family 06, model 8c, stepping 01

  536 15:17:21.513935  Setting up local APIC...

  537 15:17:21.517257  Clearing out pending MCEs

  538 15:17:21.517342  Clearing out pending MCEs

  539 15:17:21.520602   apic_id: 0x04 done.

  540 15:17:21.523809  Setting up local APIC...

  541 15:17:21.526813   apic_id: 0x07 done.

  542 15:17:21.526896  Setting up local APIC...

  543 15:17:21.530267   apic_id: 0x03 done.

  544 15:17:21.533697  microcode: Update skipped, already up-to-date

  545 15:17:21.540366  microcode: Update skipped, already up-to-date

  546 15:17:21.540446  CPU #6 initialized

  547 15:17:21.543783  CPU #2 initialized

  548 15:17:21.546802  Setting up local APIC...

  549 15:17:21.550329  microcode: Update skipped, already up-to-date

  550 15:17:21.553542   apic_id: 0x05 done.

  551 15:17:21.553619  CPU #7 initialized

  552 15:17:21.559952  microcode: Update skipped, already up-to-date

  553 15:17:21.560037   apic_id: 0x01 done.

  554 15:17:21.563211   apic_id: 0x06 done.

  555 15:17:21.566688  microcode: Update skipped, already up-to-date

  556 15:17:21.573360  microcode: Update skipped, already up-to-date

  557 15:17:21.573472  CPU #4 initialized

  558 15:17:21.576735  CPU #5 initialized

  559 15:17:21.580023  microcode: Update skipped, already up-to-date

  560 15:17:21.583362  CPU #3 initialized

  561 15:17:21.586522  CPU #1 initialized

  562 15:17:21.589986  bsp_do_flight_plan done after 456 msecs.

  563 15:17:21.593323  CPU: frequency set to 4000 MHz

  564 15:17:21.593442  Enabling SMIs.

  565 15:17:21.600083  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 319 ms

  566 15:17:21.616406  SATAXPCIE1 indicates PCIe NVMe is present

  567 15:17:21.619714  Probing TPM:  done!

  568 15:17:21.623020  Connected to device vid:did:rid of 1ae0:0028:00

  569 15:17:21.633706  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

  570 15:17:21.636695  Initialized TPM device CR50 revision 0

  571 15:17:21.639992  Enabling S0i3.4

  572 15:17:21.646774  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  573 15:17:21.650274  Found a VBT of 8704 bytes after decompression

  574 15:17:21.656905  cse_lite: CSE RO boot. HybridStorageMode disabled

  575 15:17:21.663687  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  576 15:17:21.738171  FSPS returned 0

  577 15:17:21.741869  Executing Phase 1 of FspMultiPhaseSiInit

  578 15:17:21.751744  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  579 15:17:21.754767  port C0 DISC req: usage 1 usb3 1 usb2 5

  580 15:17:21.758037  Raw Buffer output 0 00000511

  581 15:17:21.761459  Raw Buffer output 1 00000000

  582 15:17:21.765435  pmc_send_ipc_cmd succeeded

  583 15:17:21.772123  port C1 DISC req: usage 1 usb3 2 usb2 3

  584 15:17:21.772234  Raw Buffer output 0 00000321

  585 15:17:21.775181  Raw Buffer output 1 00000000

  586 15:17:21.779573  pmc_send_ipc_cmd succeeded

  587 15:17:21.784833  Detected 4 core, 8 thread CPU.

  588 15:17:21.788059  Detected 4 core, 8 thread CPU.

  589 15:17:22.022209  Display FSP Version Info HOB

  590 15:17:22.025671  Reference Code - CPU = a.0.4c.31

  591 15:17:22.028692  uCode Version = 0.0.0.86

  592 15:17:22.032082  TXT ACM version = ff.ff.ff.ffff

  593 15:17:22.035545  Reference Code - ME = a.0.4c.31

  594 15:17:22.038961  MEBx version = 0.0.0.0

  595 15:17:22.042236  ME Firmware Version = Consumer SKU

  596 15:17:22.045337  Reference Code - PCH = a.0.4c.31

  597 15:17:22.048880  PCH-CRID Status = Disabled

  598 15:17:22.052092  PCH-CRID Original Value = ff.ff.ff.ffff

  599 15:17:22.055554  PCH-CRID New Value = ff.ff.ff.ffff

  600 15:17:22.058928  OPROM - RST - RAID = ff.ff.ff.ffff

  601 15:17:22.062160  PCH Hsio Version = 4.0.0.0

  602 15:17:22.065411  Reference Code - SA - System Agent = a.0.4c.31

  603 15:17:22.068636  Reference Code - MRC = 2.0.0.1

  604 15:17:22.072151  SA - PCIe Version = a.0.4c.31

  605 15:17:22.075394  SA-CRID Status = Disabled

  606 15:17:22.078786  SA-CRID Original Value = 0.0.0.1

  607 15:17:22.081909  SA-CRID New Value = 0.0.0.1

  608 15:17:22.085360  OPROM - VBIOS = ff.ff.ff.ffff

  609 15:17:22.088702  IO Manageability Engine FW Version = 11.1.4.0

  610 15:17:22.092160  PHY Build Version = 0.0.0.e0

  611 15:17:22.095464  Thunderbolt(TM) FW Version = 0.0.0.0

  612 15:17:22.102222  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  613 15:17:22.105254  ITSS IRQ Polarities Before:

  614 15:17:22.105342  IPC0: 0xffffffff

  615 15:17:22.108788  IPC1: 0xffffffff

  616 15:17:22.108899  IPC2: 0xffffffff

  617 15:17:22.112123  IPC3: 0xffffffff

  618 15:17:22.115433  ITSS IRQ Polarities After:

  619 15:17:22.115553  IPC0: 0xffffffff

  620 15:17:22.118622  IPC1: 0xffffffff

  621 15:17:22.118729  IPC2: 0xffffffff

  622 15:17:22.121953  IPC3: 0xffffffff

  623 15:17:22.125430  Found PCIe Root Port #9 at PCI: 00:1d.0.

  624 15:17:22.138924  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  625 15:17:22.148699  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  626 15:17:22.162009  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  627 15:17:22.168648  BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms

  628 15:17:22.168760  Enumerating buses...

  629 15:17:22.175373  Show all devs... Before device enumeration.

  630 15:17:22.175491  Root Device: enabled 1

  631 15:17:22.178664  DOMAIN: 0000: enabled 1

  632 15:17:22.181998  CPU_CLUSTER: 0: enabled 1

  633 15:17:22.185021  PCI: 00:00.0: enabled 1

  634 15:17:22.185121  PCI: 00:02.0: enabled 1

  635 15:17:22.188458  PCI: 00:04.0: enabled 1

  636 15:17:22.191834  PCI: 00:05.0: enabled 1

  637 15:17:22.195170  PCI: 00:06.0: enabled 0

  638 15:17:22.195275  PCI: 00:07.0: enabled 0

  639 15:17:22.198539  PCI: 00:07.1: enabled 0

  640 15:17:22.201755  PCI: 00:07.2: enabled 0

  641 15:17:22.205064  PCI: 00:07.3: enabled 0

  642 15:17:22.205166  PCI: 00:08.0: enabled 1

  643 15:17:22.208376  PCI: 00:09.0: enabled 0

  644 15:17:22.211821  PCI: 00:0a.0: enabled 0

  645 15:17:22.215272  PCI: 00:0d.0: enabled 1

  646 15:17:22.215377  PCI: 00:0d.1: enabled 0

  647 15:17:22.218693  PCI: 00:0d.2: enabled 0

  648 15:17:22.221917  PCI: 00:0d.3: enabled 0

  649 15:17:22.222010  PCI: 00:0e.0: enabled 0

  650 15:17:22.224973  PCI: 00:10.2: enabled 1

  651 15:17:22.228443  PCI: 00:10.6: enabled 0

  652 15:17:22.231522  PCI: 00:10.7: enabled 0

  653 15:17:22.231601  PCI: 00:12.0: enabled 0

  654 15:17:22.235018  PCI: 00:12.6: enabled 0

  655 15:17:22.238263  PCI: 00:13.0: enabled 0

  656 15:17:22.241790  PCI: 00:14.0: enabled 1

  657 15:17:22.241898  PCI: 00:14.1: enabled 0

  658 15:17:22.245046  PCI: 00:14.2: enabled 1

  659 15:17:22.248111  PCI: 00:14.3: enabled 1

  660 15:17:22.251367  PCI: 00:15.0: enabled 1

  661 15:17:22.251493  PCI: 00:15.1: enabled 1

  662 15:17:22.254945  PCI: 00:15.2: enabled 1

  663 15:17:22.258367  PCI: 00:15.3: enabled 1

  664 15:17:22.258471  PCI: 00:16.0: enabled 1

  665 15:17:22.261451  PCI: 00:16.1: enabled 0

  666 15:17:22.265071  PCI: 00:16.2: enabled 0

  667 15:17:22.268366  PCI: 00:16.3: enabled 0

  668 15:17:22.268470  PCI: 00:16.4: enabled 0

  669 15:17:22.271361  PCI: 00:16.5: enabled 0

  670 15:17:22.274962  PCI: 00:17.0: enabled 1

  671 15:17:22.278102  PCI: 00:19.0: enabled 0

  672 15:17:22.278210  PCI: 00:19.1: enabled 1

  673 15:17:22.281471  PCI: 00:19.2: enabled 0

  674 15:17:22.284689  PCI: 00:1c.0: enabled 1

  675 15:17:22.287944  PCI: 00:1c.1: enabled 0

  676 15:17:22.288051  PCI: 00:1c.2: enabled 0

  677 15:17:22.291425  PCI: 00:1c.3: enabled 0

  678 15:17:22.294816  PCI: 00:1c.4: enabled 0

  679 15:17:22.298137  PCI: 00:1c.5: enabled 0

  680 15:17:22.298249  PCI: 00:1c.6: enabled 1

  681 15:17:22.301186  PCI: 00:1c.7: enabled 0

  682 15:17:22.304736  PCI: 00:1d.0: enabled 1

  683 15:17:22.304843  PCI: 00:1d.1: enabled 0

  684 15:17:22.308136  PCI: 00:1d.2: enabled 1

  685 15:17:22.311530  PCI: 00:1d.3: enabled 0

  686 15:17:22.314613  PCI: 00:1e.0: enabled 1

  687 15:17:22.314700  PCI: 00:1e.1: enabled 0

  688 15:17:22.317915  PCI: 00:1e.2: enabled 1

  689 15:17:22.321180  PCI: 00:1e.3: enabled 1

  690 15:17:22.324765  PCI: 00:1f.0: enabled 1

  691 15:17:22.324866  PCI: 00:1f.1: enabled 0

  692 15:17:22.327919  PCI: 00:1f.2: enabled 1

  693 15:17:22.331423  PCI: 00:1f.3: enabled 1

  694 15:17:22.334674  PCI: 00:1f.4: enabled 0

  695 15:17:22.334780  PCI: 00:1f.5: enabled 1

  696 15:17:22.337826  PCI: 00:1f.6: enabled 0

  697 15:17:22.341300  PCI: 00:1f.7: enabled 0

  698 15:17:22.341412  APIC: 00: enabled 1

  699 15:17:22.344723  GENERIC: 0.0: enabled 1

  700 15:17:22.347756  GENERIC: 0.0: enabled 1

  701 15:17:22.351182  GENERIC: 1.0: enabled 1

  702 15:17:22.351299  GENERIC: 0.0: enabled 1

  703 15:17:22.354500  GENERIC: 1.0: enabled 1

  704 15:17:22.357959  USB0 port 0: enabled 1

  705 15:17:22.358064  GENERIC: 0.0: enabled 1

  706 15:17:22.361484  USB0 port 0: enabled 1

  707 15:17:22.364468  GENERIC: 0.0: enabled 1

  708 15:17:22.367920  I2C: 00:1a: enabled 1

  709 15:17:22.368023  I2C: 00:31: enabled 1

  710 15:17:22.371465  I2C: 00:32: enabled 1

  711 15:17:22.374510  I2C: 00:10: enabled 1

  712 15:17:22.374614  I2C: 00:15: enabled 1

  713 15:17:22.377814  GENERIC: 0.0: enabled 0

  714 15:17:22.381264  GENERIC: 1.0: enabled 0

  715 15:17:22.381365  GENERIC: 0.0: enabled 1

  716 15:17:22.384338  SPI: 00: enabled 1

  717 15:17:22.387913  SPI: 00: enabled 1

  718 15:17:22.388021  PNP: 0c09.0: enabled 1

  719 15:17:22.390903  GENERIC: 0.0: enabled 1

  720 15:17:22.394404  USB3 port 0: enabled 1

  721 15:17:22.397709  USB3 port 1: enabled 1

  722 15:17:22.397818  USB3 port 2: enabled 0

  723 15:17:22.400968  USB3 port 3: enabled 0

  724 15:17:22.404413  USB2 port 0: enabled 0

  725 15:17:22.404487  USB2 port 1: enabled 1

  726 15:17:22.407864  USB2 port 2: enabled 1

  727 15:17:22.410948  USB2 port 3: enabled 0

  728 15:17:22.414395  USB2 port 4: enabled 1

  729 15:17:22.414498  USB2 port 5: enabled 0

  730 15:17:22.417461  USB2 port 6: enabled 0

  731 15:17:22.420816  USB2 port 7: enabled 0

  732 15:17:22.420919  USB2 port 8: enabled 0

  733 15:17:22.423940  USB2 port 9: enabled 0

  734 15:17:22.427343  USB3 port 0: enabled 0

  735 15:17:22.427468  USB3 port 1: enabled 1

  736 15:17:22.430671  USB3 port 2: enabled 0

  737 15:17:22.434006  USB3 port 3: enabled 0

  738 15:17:22.437502  GENERIC: 0.0: enabled 1

  739 15:17:22.437609  GENERIC: 1.0: enabled 1

  740 15:17:22.440587  APIC: 01: enabled 1

  741 15:17:22.444120  APIC: 03: enabled 1

  742 15:17:22.444222  APIC: 05: enabled 1

  743 15:17:22.447252  APIC: 07: enabled 1

  744 15:17:22.447358  APIC: 06: enabled 1

  745 15:17:22.450692  APIC: 02: enabled 1

  746 15:17:22.454064  APIC: 04: enabled 1

  747 15:17:22.454165  Compare with tree...

  748 15:17:22.457394  Root Device: enabled 1

  749 15:17:22.460581   DOMAIN: 0000: enabled 1

  750 15:17:22.463917    PCI: 00:00.0: enabled 1

  751 15:17:22.464022    PCI: 00:02.0: enabled 1

  752 15:17:22.467397    PCI: 00:04.0: enabled 1

  753 15:17:22.470469     GENERIC: 0.0: enabled 1

  754 15:17:22.473896    PCI: 00:05.0: enabled 1

  755 15:17:22.477442    PCI: 00:06.0: enabled 0

  756 15:17:22.477541    PCI: 00:07.0: enabled 0

  757 15:17:22.480485     GENERIC: 0.0: enabled 1

  758 15:17:22.483964    PCI: 00:07.1: enabled 0

  759 15:17:22.486945     GENERIC: 1.0: enabled 1

  760 15:17:22.490362    PCI: 00:07.2: enabled 0

  761 15:17:22.490465     GENERIC: 0.0: enabled 1

  762 15:17:22.493800    PCI: 00:07.3: enabled 0

  763 15:17:22.496941     GENERIC: 1.0: enabled 1

  764 15:17:22.500526    PCI: 00:08.0: enabled 1

  765 15:17:22.503790    PCI: 00:09.0: enabled 0

  766 15:17:22.503868    PCI: 00:0a.0: enabled 0

  767 15:17:22.507035    PCI: 00:0d.0: enabled 1

  768 15:17:22.510657     USB0 port 0: enabled 1

  769 15:17:22.513830      USB3 port 0: enabled 1

  770 15:17:22.517289      USB3 port 1: enabled 1

  771 15:17:22.520687      USB3 port 2: enabled 0

  772 15:17:22.520797      USB3 port 3: enabled 0

  773 15:17:22.523748    PCI: 00:0d.1: enabled 0

  774 15:17:22.527236    PCI: 00:0d.2: enabled 0

  775 15:17:22.530585     GENERIC: 0.0: enabled 1

  776 15:17:22.533829    PCI: 00:0d.3: enabled 0

  777 15:17:22.533933    PCI: 00:0e.0: enabled 0

  778 15:17:22.537123    PCI: 00:10.2: enabled 1

  779 15:17:22.540655    PCI: 00:10.6: enabled 0

  780 15:17:22.543631    PCI: 00:10.7: enabled 0

  781 15:17:22.543740    PCI: 00:12.0: enabled 0

  782 15:17:22.546925    PCI: 00:12.6: enabled 0

  783 15:17:22.550600    PCI: 00:13.0: enabled 0

  784 15:17:22.553709    PCI: 00:14.0: enabled 1

  785 15:17:22.557006     USB0 port 0: enabled 1

  786 15:17:22.557107      USB2 port 0: enabled 0

  787 15:17:22.560557      USB2 port 1: enabled 1

  788 15:17:22.563659      USB2 port 2: enabled 1

  789 15:17:22.566908      USB2 port 3: enabled 0

  790 15:17:22.570519      USB2 port 4: enabled 1

  791 15:17:22.573740      USB2 port 5: enabled 0

  792 15:17:22.573845      USB2 port 6: enabled 0

  793 15:17:22.577138      USB2 port 7: enabled 0

  794 15:17:22.580593      USB2 port 8: enabled 0

  795 15:17:22.583582      USB2 port 9: enabled 0

  796 15:17:22.586954      USB3 port 0: enabled 0

  797 15:17:22.590506      USB3 port 1: enabled 1

  798 15:17:22.590612      USB3 port 2: enabled 0

  799 15:17:22.593440      USB3 port 3: enabled 0

  800 15:17:22.596921    PCI: 00:14.1: enabled 0

  801 15:17:22.600230    PCI: 00:14.2: enabled 1

  802 15:17:22.603542    PCI: 00:14.3: enabled 1

  803 15:17:22.603653     GENERIC: 0.0: enabled 1

  804 15:17:22.606884    PCI: 00:15.0: enabled 1

  805 15:17:22.610462     I2C: 00:1a: enabled 1

  806 15:17:22.613394     I2C: 00:31: enabled 1

  807 15:17:22.613497     I2C: 00:32: enabled 1

  808 15:17:22.617087    PCI: 00:15.1: enabled 1

  809 15:17:22.620229     I2C: 00:10: enabled 1

  810 15:17:22.623729    PCI: 00:15.2: enabled 1

  811 15:17:22.626653    PCI: 00:15.3: enabled 1

  812 15:17:22.626766    PCI: 00:16.0: enabled 1

  813 15:17:22.630105    PCI: 00:16.1: enabled 0

  814 15:17:22.633666    PCI: 00:16.2: enabled 0

  815 15:17:22.636695    PCI: 00:16.3: enabled 0

  816 15:17:22.640010    PCI: 00:16.4: enabled 0

  817 15:17:22.640113    PCI: 00:16.5: enabled 0

  818 15:17:22.643311    PCI: 00:17.0: enabled 1

  819 15:17:22.646809    PCI: 00:19.0: enabled 0

  820 15:17:22.650000    PCI: 00:19.1: enabled 1

  821 15:17:22.653677     I2C: 00:15: enabled 1

  822 15:17:22.653780    PCI: 00:19.2: enabled 0

  823 15:17:22.656636    PCI: 00:1d.0: enabled 1

  824 15:17:22.660080     GENERIC: 0.0: enabled 1

  825 15:17:22.663156    PCI: 00:1e.0: enabled 1

  826 15:17:22.666773    PCI: 00:1e.1: enabled 0

  827 15:17:22.666866    PCI: 00:1e.2: enabled 1

  828 15:17:22.716779     SPI: 00: enabled 1

  829 15:17:22.716908    PCI: 00:1e.3: enabled 1

  830 15:17:22.717207     SPI: 00: enabled 1

  831 15:17:22.717307    PCI: 00:1f.0: enabled 1

  832 15:17:22.717405     PNP: 0c09.0: enabled 1

  833 15:17:22.717499    PCI: 00:1f.1: enabled 0

  834 15:17:22.717594    PCI: 00:1f.2: enabled 1

  835 15:17:22.717685     GENERIC: 0.0: enabled 1

  836 15:17:22.717775      GENERIC: 0.0: enabled 1

  837 15:17:22.717861      GENERIC: 1.0: enabled 1

  838 15:17:22.717953    PCI: 00:1f.3: enabled 1

  839 15:17:22.718043    PCI: 00:1f.4: enabled 0

  840 15:17:22.718157    PCI: 00:1f.5: enabled 1

  841 15:17:22.718253    PCI: 00:1f.6: enabled 0

  842 15:17:22.718342    PCI: 00:1f.7: enabled 0

  843 15:17:22.718428   CPU_CLUSTER: 0: enabled 1

  844 15:17:22.718513    APIC: 00: enabled 1

  845 15:17:22.718631    APIC: 01: enabled 1

  846 15:17:22.718723    APIC: 03: enabled 1

  847 15:17:22.768531    APIC: 05: enabled 1

  848 15:17:22.768660    APIC: 07: enabled 1

  849 15:17:22.768764    APIC: 06: enabled 1

  850 15:17:22.769048    APIC: 02: enabled 1

  851 15:17:22.769152    APIC: 04: enabled 1

  852 15:17:22.769252  Root Device scanning...

  853 15:17:22.769354  scan_static_bus for Root Device

  854 15:17:22.769452  DOMAIN: 0000 enabled

  855 15:17:22.769556  CPU_CLUSTER: 0 enabled

  856 15:17:22.769646  DOMAIN: 0000 scanning...

  857 15:17:22.769736  PCI: pci_scan_bus for bus 00

  858 15:17:22.769826  PCI: 00:00.0 [8086/0000] ops

  859 15:17:22.769923  PCI: 00:00.0 [8086/9a12] enabled

  860 15:17:22.770014  PCI: 00:02.0 [8086/0000] bus ops

  861 15:17:22.770099  PCI: 00:02.0 [8086/9a40] enabled

  862 15:17:22.770184  PCI: 00:04.0 [8086/0000] bus ops

  863 15:17:22.770287  PCI: 00:04.0 [8086/9a03] enabled

  864 15:17:22.770378  PCI: 00:05.0 [8086/9a19] enabled

  865 15:17:22.788335  PCI: 00:07.0 [0000/0000] hidden

  866 15:17:22.788458  PCI: 00:08.0 [8086/9a11] enabled

  867 15:17:22.788562  PCI: 00:0a.0 [8086/9a0d] disabled

  868 15:17:22.788656  PCI: 00:0d.0 [8086/0000] bus ops

  869 15:17:22.788939  PCI: 00:0d.0 [8086/9a13] enabled

  870 15:17:22.789037  PCI: 00:14.0 [8086/0000] bus ops

  871 15:17:22.791811  PCI: 00:14.0 [8086/a0ed] enabled

  872 15:17:22.795155  PCI: 00:14.2 [8086/a0ef] enabled

  873 15:17:22.798516  PCI: 00:14.3 [8086/0000] bus ops

  874 15:17:22.801946  PCI: 00:14.3 [8086/a0f0] enabled

  875 15:17:22.805032  PCI: 00:15.0 [8086/0000] bus ops

  876 15:17:22.808517  PCI: 00:15.0 [8086/a0e8] enabled

  877 15:17:22.811891  PCI: 00:15.1 [8086/0000] bus ops

  878 15:17:22.815111  PCI: 00:15.1 [8086/a0e9] enabled

  879 15:17:22.818283  PCI: 00:15.2 [8086/0000] bus ops

  880 15:17:22.821705  PCI: 00:15.2 [8086/a0ea] enabled

  881 15:17:22.825133  PCI: 00:15.3 [8086/0000] bus ops

  882 15:17:22.828613  PCI: 00:15.3 [8086/a0eb] enabled

  883 15:17:22.831895  PCI: 00:16.0 [8086/0000] ops

  884 15:17:22.835277  PCI: 00:16.0 [8086/a0e0] enabled

  885 15:17:22.841961  PCI: Static device PCI: 00:17.0 not found, disabling it.

  886 15:17:22.845077  PCI: 00:19.0 [8086/0000] bus ops

  887 15:17:22.848338  PCI: 00:19.0 [8086/a0c5] disabled

  888 15:17:22.851729  PCI: 00:19.1 [8086/0000] bus ops

  889 15:17:22.855111  PCI: 00:19.1 [8086/a0c6] enabled

  890 15:17:22.858621  PCI: 00:1d.0 [8086/0000] bus ops

  891 15:17:22.861629  PCI: 00:1d.0 [8086/a0b0] enabled

  892 15:17:22.861738  PCI: 00:1e.0 [8086/0000] ops

  893 15:17:22.865126  PCI: 00:1e.0 [8086/a0a8] enabled

  894 15:17:22.868649  PCI: 00:1e.2 [8086/0000] bus ops

  895 15:17:22.871682  PCI: 00:1e.2 [8086/a0aa] enabled

  896 15:17:22.875239  PCI: 00:1e.3 [8086/0000] bus ops

  897 15:17:22.878518  PCI: 00:1e.3 [8086/a0ab] enabled

  898 15:17:22.881558  PCI: 00:1f.0 [8086/0000] bus ops

  899 15:17:22.884921  PCI: 00:1f.0 [8086/a087] enabled

  900 15:17:22.888518  RTC Init

  901 15:17:22.891714  Set power on after power failure.

  902 15:17:22.891822  Disabling Deep S3

  903 15:17:22.895312  Disabling Deep S3

  904 15:17:22.898452  Disabling Deep S4

  905 15:17:22.898559  Disabling Deep S4

  906 15:17:22.901886  Disabling Deep S5

  907 15:17:22.902000  Disabling Deep S5

  908 15:17:22.905329  PCI: 00:1f.2 [0000/0000] hidden

  909 15:17:22.908473  PCI: 00:1f.3 [8086/0000] bus ops

  910 15:17:22.911910  PCI: 00:1f.3 [8086/a0c8] enabled

  911 15:17:22.915042  PCI: 00:1f.5 [8086/0000] bus ops

  912 15:17:22.918553  PCI: 00:1f.5 [8086/a0a4] enabled

  913 15:17:22.921713  PCI: Leftover static devices:

  914 15:17:22.925328  PCI: 00:10.2

  915 15:17:22.925434  PCI: 00:10.6

  916 15:17:22.925527  PCI: 00:10.7

  917 15:17:22.928529  PCI: 00:06.0

  918 15:17:22.928629  PCI: 00:07.1

  919 15:17:22.931706  PCI: 00:07.2

  920 15:17:22.931810  PCI: 00:07.3

  921 15:17:22.931903  PCI: 00:09.0

  922 15:17:22.935131  PCI: 00:0d.1

  923 15:17:22.935244  PCI: 00:0d.2

  924 15:17:22.938642  PCI: 00:0d.3

  925 15:17:22.938747  PCI: 00:0e.0

  926 15:17:22.941828  PCI: 00:12.0

  927 15:17:22.941928  PCI: 00:12.6

  928 15:17:22.942018  PCI: 00:13.0

  929 15:17:22.945216  PCI: 00:14.1

  930 15:17:22.945286  PCI: 00:16.1

  931 15:17:22.948847  PCI: 00:16.2

  932 15:17:22.948931  PCI: 00:16.3

  933 15:17:22.948996  PCI: 00:16.4

  934 15:17:22.951840  PCI: 00:16.5

  935 15:17:22.951926  PCI: 00:17.0

  936 15:17:22.955338  PCI: 00:19.2

  937 15:17:22.955450  PCI: 00:1e.1

  938 15:17:22.955535  PCI: 00:1f.1

  939 15:17:22.958489  PCI: 00:1f.4

  940 15:17:22.958602  PCI: 00:1f.6

  941 15:17:22.961883  PCI: 00:1f.7

  942 15:17:22.965333  PCI: Check your devicetree.cb.

  943 15:17:22.965440  PCI: 00:02.0 scanning...

  944 15:17:22.968764  scan_generic_bus for PCI: 00:02.0

  945 15:17:22.975363  scan_generic_bus for PCI: 00:02.0 done

  946 15:17:22.978494  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  947 15:17:22.981693  PCI: 00:04.0 scanning...

  948 15:17:22.985122  scan_generic_bus for PCI: 00:04.0

  949 15:17:22.988386  GENERIC: 0.0 enabled

  950 15:17:22.991586  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  951 15:17:22.998276  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  952 15:17:23.001655  PCI: 00:0d.0 scanning...

  953 15:17:23.004907  scan_static_bus for PCI: 00:0d.0

  954 15:17:23.004987  USB0 port 0 enabled

  955 15:17:23.008188  USB0 port 0 scanning...

  956 15:17:23.011726  scan_static_bus for USB0 port 0

  957 15:17:23.015092  USB3 port 0 enabled

  958 15:17:23.015169  USB3 port 1 enabled

  959 15:17:23.018202  USB3 port 2 disabled

  960 15:17:23.021871  USB3 port 3 disabled

  961 15:17:23.021955  USB3 port 0 scanning...

  962 15:17:23.024844  scan_static_bus for USB3 port 0

  963 15:17:23.031459  scan_static_bus for USB3 port 0 done

  964 15:17:23.035114  scan_bus: bus USB3 port 0 finished in 6 msecs

  965 15:17:23.038094  USB3 port 1 scanning...

  966 15:17:23.041524  scan_static_bus for USB3 port 1

  967 15:17:23.044801  scan_static_bus for USB3 port 1 done

  968 15:17:23.048399  scan_bus: bus USB3 port 1 finished in 6 msecs

  969 15:17:23.051821  scan_static_bus for USB0 port 0 done

  970 15:17:23.058101  scan_bus: bus USB0 port 0 finished in 43 msecs

  971 15:17:23.061469  scan_static_bus for PCI: 00:0d.0 done

  972 15:17:23.064679  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  973 15:17:23.068120  PCI: 00:14.0 scanning...

  974 15:17:23.071555  scan_static_bus for PCI: 00:14.0

  975 15:17:23.074716  USB0 port 0 enabled

  976 15:17:23.074800  USB0 port 0 scanning...

  977 15:17:23.078501  scan_static_bus for USB0 port 0

  978 15:17:23.081889  USB2 port 0 disabled

  979 15:17:23.084916  USB2 port 1 enabled

  980 15:17:23.084999  USB2 port 2 enabled

  981 15:17:23.088403  USB2 port 3 disabled

  982 15:17:23.091866  USB2 port 4 enabled

  983 15:17:23.091949  USB2 port 5 disabled

  984 15:17:23.094952  USB2 port 6 disabled

  985 15:17:23.098318  USB2 port 7 disabled

  986 15:17:23.098401  USB2 port 8 disabled

  987 15:17:23.101588  USB2 port 9 disabled

  988 15:17:23.101671  USB3 port 0 disabled

  989 15:17:23.105211  USB3 port 1 enabled

  990 15:17:23.108468  USB3 port 2 disabled

  991 15:17:23.108552  USB3 port 3 disabled

  992 15:17:23.111819  USB2 port 1 scanning...

  993 15:17:23.114913  scan_static_bus for USB2 port 1

  994 15:17:23.118370  scan_static_bus for USB2 port 1 done

  995 15:17:23.124783  scan_bus: bus USB2 port 1 finished in 6 msecs

  996 15:17:23.124869  USB2 port 2 scanning...

  997 15:17:23.128254  scan_static_bus for USB2 port 2

  998 15:17:23.134638  scan_static_bus for USB2 port 2 done

  999 15:17:23.138105  scan_bus: bus USB2 port 2 finished in 6 msecs

 1000 15:17:23.141536  USB2 port 4 scanning...

 1001 15:17:23.144757  scan_static_bus for USB2 port 4

 1002 15:17:23.147989  scan_static_bus for USB2 port 4 done

 1003 15:17:23.151719  scan_bus: bus USB2 port 4 finished in 6 msecs

 1004 15:17:23.154842  USB3 port 1 scanning...

 1005 15:17:23.158203  scan_static_bus for USB3 port 1

 1006 15:17:23.161736  scan_static_bus for USB3 port 1 done

 1007 15:17:23.164773  scan_bus: bus USB3 port 1 finished in 6 msecs

 1008 15:17:23.171463  scan_static_bus for USB0 port 0 done

 1009 15:17:23.174813  scan_bus: bus USB0 port 0 finished in 93 msecs

 1010 15:17:23.178151  scan_static_bus for PCI: 00:14.0 done

 1011 15:17:23.184774  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

 1012 15:17:23.184859  PCI: 00:14.3 scanning...

 1013 15:17:23.188102  scan_static_bus for PCI: 00:14.3

 1014 15:17:23.191692  GENERIC: 0.0 enabled

 1015 15:17:23.194678  scan_static_bus for PCI: 00:14.3 done

 1016 15:17:23.201338  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1017 15:17:23.201423  PCI: 00:15.0 scanning...

 1018 15:17:23.204736  scan_static_bus for PCI: 00:15.0

 1019 15:17:23.208221  I2C: 00:1a enabled

 1020 15:17:23.211341  I2C: 00:31 enabled

 1021 15:17:23.211426  I2C: 00:32 enabled

 1022 15:17:23.214762  scan_static_bus for PCI: 00:15.0 done

 1023 15:17:23.221297  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1024 15:17:23.224614  PCI: 00:15.1 scanning...

 1025 15:17:23.227959  scan_static_bus for PCI: 00:15.1

 1026 15:17:23.228086  I2C: 00:10 enabled

 1027 15:17:23.231382  scan_static_bus for PCI: 00:15.1 done

 1028 15:17:23.237933  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1029 15:17:23.241340  PCI: 00:15.2 scanning...

 1030 15:17:23.244362  scan_static_bus for PCI: 00:15.2

 1031 15:17:23.247600  scan_static_bus for PCI: 00:15.2 done

 1032 15:17:23.251154  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

 1033 15:17:23.254623  PCI: 00:15.3 scanning...

 1034 15:17:23.258119  scan_static_bus for PCI: 00:15.3

 1035 15:17:23.260934  scan_static_bus for PCI: 00:15.3 done

 1036 15:17:23.267858  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1037 15:17:23.267943  PCI: 00:19.1 scanning...

 1038 15:17:23.271191  scan_static_bus for PCI: 00:19.1

 1039 15:17:23.274319  I2C: 00:15 enabled

 1040 15:17:23.277765  scan_static_bus for PCI: 00:19.1 done

 1041 15:17:23.284182  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1042 15:17:23.284266  PCI: 00:1d.0 scanning...

 1043 15:17:23.290871  do_pci_scan_bridge for PCI: 00:1d.0

 1044 15:17:23.290954  PCI: pci_scan_bus for bus 01

 1045 15:17:23.294235  PCI: 01:00.0 [1c5c/174a] enabled

 1046 15:17:23.297764  GENERIC: 0.0 enabled

 1047 15:17:23.301210  Enabling Common Clock Configuration

 1048 15:17:23.307617  L1 Sub-State supported from root port 29

 1049 15:17:23.307731  L1 Sub-State Support = 0xf

 1050 15:17:23.311113  CommonModeRestoreTime = 0x28

 1051 15:17:23.317851  Power On Value = 0x16, Power On Scale = 0x0

 1052 15:17:23.317935  ASPM: Enabled L1

 1053 15:17:23.320777  PCIe: Max_Payload_Size adjusted to 128

 1054 15:17:23.327478  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1055 15:17:23.327562  PCI: 00:1e.2 scanning...

 1056 15:17:23.334498  scan_generic_bus for PCI: 00:1e.2

 1057 15:17:23.334610  SPI: 00 enabled

 1058 15:17:23.341091  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1059 15:17:23.344386  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1060 15:17:23.347924  PCI: 00:1e.3 scanning...

 1061 15:17:23.351302  scan_generic_bus for PCI: 00:1e.3

 1062 15:17:23.354676  SPI: 00 enabled

 1063 15:17:23.357724  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1064 15:17:23.364836  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1065 15:17:23.367649  PCI: 00:1f.0 scanning...

 1066 15:17:23.371125  scan_static_bus for PCI: 00:1f.0

 1067 15:17:23.371228  PNP: 0c09.0 enabled

 1068 15:17:23.374629  PNP: 0c09.0 scanning...

 1069 15:17:23.377948  scan_static_bus for PNP: 0c09.0

 1070 15:17:23.381251  scan_static_bus for PNP: 0c09.0 done

 1071 15:17:23.387738  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1072 15:17:23.391008  scan_static_bus for PCI: 00:1f.0 done

 1073 15:17:23.394240  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1074 15:17:23.397711  PCI: 00:1f.2 scanning...

 1075 15:17:23.401274  scan_static_bus for PCI: 00:1f.2

 1076 15:17:23.404670  GENERIC: 0.0 enabled

 1077 15:17:23.404753  GENERIC: 0.0 scanning...

 1078 15:17:23.408006  scan_static_bus for GENERIC: 0.0

 1079 15:17:23.410784  GENERIC: 0.0 enabled

 1080 15:17:23.414087  GENERIC: 1.0 enabled

 1081 15:17:23.417750  scan_static_bus for GENERIC: 0.0 done

 1082 15:17:23.420709  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1083 15:17:23.427333  scan_static_bus for PCI: 00:1f.2 done

 1084 15:17:23.430798  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1085 15:17:23.434043  PCI: 00:1f.3 scanning...

 1086 15:17:23.437445  scan_static_bus for PCI: 00:1f.3

 1087 15:17:23.440836  scan_static_bus for PCI: 00:1f.3 done

 1088 15:17:23.444150  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1089 15:17:23.447872  PCI: 00:1f.5 scanning...

 1090 15:17:23.450746  scan_generic_bus for PCI: 00:1f.5

 1091 15:17:23.454061  scan_generic_bus for PCI: 00:1f.5 done

 1092 15:17:23.460724  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1093 15:17:23.464249  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1094 15:17:23.467431  scan_static_bus for Root Device done

 1095 15:17:23.474062  scan_bus: bus Root Device finished in 737 msecs

 1096 15:17:23.474180  done

 1097 15:17:23.480822  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1098 15:17:23.484244  Chrome EC: UHEPI supported

 1099 15:17:23.490730  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1100 15:17:23.497166  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1101 15:17:23.500566  SPI flash protection: WPSW=0 SRP0=0

 1102 15:17:23.503851  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1103 15:17:23.510523  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1104 15:17:23.513835  found VGA at PCI: 00:02.0

 1105 15:17:23.517342  Setting up VGA for PCI: 00:02.0

 1106 15:17:23.520869  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1107 15:17:23.527447  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1108 15:17:23.527562  Allocating resources...

 1109 15:17:23.530487  Reading resources...

 1110 15:17:23.533984  Root Device read_resources bus 0 link: 0

 1111 15:17:23.540684  DOMAIN: 0000 read_resources bus 0 link: 0

 1112 15:17:23.543795  PCI: 00:04.0 read_resources bus 1 link: 0

 1113 15:17:23.550626  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1114 15:17:23.553832  PCI: 00:0d.0 read_resources bus 0 link: 0

 1115 15:17:23.557010  USB0 port 0 read_resources bus 0 link: 0

 1116 15:17:23.564710  USB0 port 0 read_resources bus 0 link: 0 done

 1117 15:17:23.567858  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1118 15:17:23.574875  PCI: 00:14.0 read_resources bus 0 link: 0

 1119 15:17:23.577749  USB0 port 0 read_resources bus 0 link: 0

 1120 15:17:23.584410  USB0 port 0 read_resources bus 0 link: 0 done

 1121 15:17:23.587921  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1122 15:17:23.594664  PCI: 00:14.3 read_resources bus 0 link: 0

 1123 15:17:23.597673  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1124 15:17:23.604450  PCI: 00:15.0 read_resources bus 0 link: 0

 1125 15:17:23.607933  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1126 15:17:23.614232  PCI: 00:15.1 read_resources bus 0 link: 0

 1127 15:17:23.617642  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1128 15:17:23.624634  PCI: 00:19.1 read_resources bus 0 link: 0

 1129 15:17:23.628154  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1130 15:17:23.634751  PCI: 00:1d.0 read_resources bus 1 link: 0

 1131 15:17:23.637887  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1132 15:17:23.644704  PCI: 00:1e.2 read_resources bus 2 link: 0

 1133 15:17:23.647950  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1134 15:17:23.654512  PCI: 00:1e.3 read_resources bus 3 link: 0

 1135 15:17:23.658089  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1136 15:17:23.664879  PCI: 00:1f.0 read_resources bus 0 link: 0

 1137 15:17:23.667772  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1138 15:17:23.671281  PCI: 00:1f.2 read_resources bus 0 link: 0

 1139 15:17:23.678117  GENERIC: 0.0 read_resources bus 0 link: 0

 1140 15:17:23.681681  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1141 15:17:23.688006  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1142 15:17:23.694985  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1143 15:17:23.698134  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1144 15:17:23.701553  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1145 15:17:23.708255  Root Device read_resources bus 0 link: 0 done

 1146 15:17:23.711640  Done reading resources.

 1147 15:17:23.715016  Show resources in subtree (Root Device)...After reading.

 1148 15:17:23.721429   Root Device child on link 0 DOMAIN: 0000

 1149 15:17:23.724885    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1150 15:17:23.735040    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1151 15:17:23.745014    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1152 15:17:23.745104     PCI: 00:00.0

 1153 15:17:23.754538     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1154 15:17:23.764792     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1155 15:17:23.774797     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1156 15:17:23.784644     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1157 15:17:23.791271     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1158 15:17:23.801171     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1159 15:17:23.810864     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1160 15:17:23.820984     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1161 15:17:23.830831     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1162 15:17:23.840970     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1163 15:17:23.847381     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1164 15:17:23.857771     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1165 15:17:23.868305     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1166 15:17:23.874978     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1167 15:17:23.885069     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1168 15:17:23.894667     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1169 15:17:23.904706     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1170 15:17:23.914722     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1171 15:17:23.924915     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1172 15:17:23.934773     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1173 15:17:23.934894     PCI: 00:02.0

 1174 15:17:23.944697     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1175 15:17:23.955057     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1176 15:17:23.964653     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1177 15:17:23.968087     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1178 15:17:23.978051     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1179 15:17:23.981616      GENERIC: 0.0

 1180 15:17:23.981733     PCI: 00:05.0

 1181 15:17:23.991298     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1182 15:17:23.998300     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1183 15:17:23.998418      GENERIC: 0.0

 1184 15:17:24.001373     PCI: 00:08.0

 1185 15:17:24.011678     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1186 15:17:24.011796     PCI: 00:0a.0

 1187 15:17:24.015049     PCI: 00:0d.0 child on link 0 USB0 port 0

 1188 15:17:24.028461     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1189 15:17:24.031398      USB0 port 0 child on link 0 USB3 port 0

 1190 15:17:24.031505       USB3 port 0

 1191 15:17:24.034989       USB3 port 1

 1192 15:17:24.035093       USB3 port 2

 1193 15:17:24.037944       USB3 port 3

 1194 15:17:24.041560     PCI: 00:14.0 child on link 0 USB0 port 0

 1195 15:17:24.051693     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1196 15:17:24.058222      USB0 port 0 child on link 0 USB2 port 0

 1197 15:17:24.058337       USB2 port 0

 1198 15:17:24.061264       USB2 port 1

 1199 15:17:24.061378       USB2 port 2

 1200 15:17:24.064702       USB2 port 3

 1201 15:17:24.064815       USB2 port 4

 1202 15:17:24.068163       USB2 port 5

 1203 15:17:24.068247       USB2 port 6

 1204 15:17:24.071254       USB2 port 7

 1205 15:17:24.071367       USB2 port 8

 1206 15:17:24.074799       USB2 port 9

 1207 15:17:24.074910       USB3 port 0

 1208 15:17:24.078138       USB3 port 1

 1209 15:17:24.081522       USB3 port 2

 1210 15:17:24.081630       USB3 port 3

 1211 15:17:24.084533     PCI: 00:14.2

 1212 15:17:24.094698     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1213 15:17:24.104441     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1214 15:17:24.107793     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1215 15:17:24.117694     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1216 15:17:24.117784      GENERIC: 0.0

 1217 15:17:24.124698     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1218 15:17:24.134581     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1219 15:17:24.134674      I2C: 00:1a

 1220 15:17:24.137631      I2C: 00:31

 1221 15:17:24.137724      I2C: 00:32

 1222 15:17:24.141107     PCI: 00:15.1 child on link 0 I2C: 00:10

 1223 15:17:24.151082     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1224 15:17:24.154530      I2C: 00:10

 1225 15:17:24.154618     PCI: 00:15.2

 1226 15:17:24.164296     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1227 15:17:24.167690     PCI: 00:15.3

 1228 15:17:24.177637     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1229 15:17:24.177764     PCI: 00:16.0

 1230 15:17:24.187396     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1231 15:17:24.190903     PCI: 00:19.0

 1232 15:17:24.194385     PCI: 00:19.1 child on link 0 I2C: 00:15

 1233 15:17:24.204361     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1234 15:17:24.207751      I2C: 00:15

 1235 15:17:24.210672     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1236 15:17:24.221031     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1237 15:17:24.230942     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1238 15:17:24.237392     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1239 15:17:24.240905      GENERIC: 0.0

 1240 15:17:24.241008      PCI: 01:00.0

 1241 15:17:24.250710      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1242 15:17:24.260648      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1243 15:17:24.270436      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1244 15:17:24.273782     PCI: 00:1e.0

 1245 15:17:24.284011     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1246 15:17:24.287367     PCI: 00:1e.2 child on link 0 SPI: 00

 1247 15:17:24.297222     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1248 15:17:24.297317      SPI: 00

 1249 15:17:24.304256     PCI: 00:1e.3 child on link 0 SPI: 00

 1250 15:17:24.313933     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1251 15:17:24.314023      SPI: 00

 1252 15:17:24.317100     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1253 15:17:24.327155     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1254 15:17:24.327244      PNP: 0c09.0

 1255 15:17:24.337197      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1256 15:17:24.340818     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1257 15:17:24.350500     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1258 15:17:24.360212     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1259 15:17:24.363542      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1260 15:17:24.367018       GENERIC: 0.0

 1261 15:17:24.370410       GENERIC: 1.0

 1262 15:17:24.370515     PCI: 00:1f.3

 1263 15:17:24.380278     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1264 15:17:24.390234     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1265 15:17:24.393788     PCI: 00:1f.5

 1266 15:17:24.400337     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1267 15:17:24.406924    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1268 15:17:24.407035     APIC: 00

 1269 15:17:24.407136     APIC: 01

 1270 15:17:24.410022     APIC: 03

 1271 15:17:24.410124     APIC: 05

 1272 15:17:24.413316     APIC: 07

 1273 15:17:24.413418     APIC: 06

 1274 15:17:24.413509     APIC: 02

 1275 15:17:24.416812     APIC: 04

 1276 15:17:24.423312  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1277 15:17:24.429946   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1278 15:17:24.436686   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1279 15:17:24.440117   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1280 15:17:24.446773    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1281 15:17:24.450274    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1282 15:17:24.453150    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1283 15:17:24.460078   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1284 15:17:24.469945   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1285 15:17:24.476580   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1286 15:17:24.483170  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1287 15:17:24.489734  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1288 15:17:24.496471   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1289 15:17:24.506701   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1290 15:17:24.513079   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1291 15:17:24.516608   DOMAIN: 0000: Resource ranges:

 1292 15:17:24.519689   * Base: 1000, Size: 800, Tag: 100

 1293 15:17:24.523168   * Base: 1900, Size: e700, Tag: 100

 1294 15:17:24.529933    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1295 15:17:24.536223  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1296 15:17:24.543050  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1297 15:17:24.549813   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1298 15:17:24.556491   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1299 15:17:24.566324   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1300 15:17:24.572847   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1301 15:17:24.579772   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1302 15:17:24.589369   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1303 15:17:24.596199   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1304 15:17:24.603016   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1305 15:17:24.612824   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1306 15:17:24.619244   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1307 15:17:24.625950   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1308 15:17:24.632395   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1309 15:17:24.642478   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1310 15:17:24.649188   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1311 15:17:24.655712   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1312 15:17:24.665728   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1313 15:17:24.672643   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1314 15:17:24.679100   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1315 15:17:24.688906   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1316 15:17:24.695507   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1317 15:17:24.702226   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1318 15:17:24.712415   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1319 15:17:24.715461   DOMAIN: 0000: Resource ranges:

 1320 15:17:24.718789   * Base: 7fc00000, Size: 40400000, Tag: 200

 1321 15:17:24.722198   * Base: d0000000, Size: 28000000, Tag: 200

 1322 15:17:24.728606   * Base: fa000000, Size: 1000000, Tag: 200

 1323 15:17:24.732089   * Base: fb001000, Size: 2fff000, Tag: 200

 1324 15:17:24.735486   * Base: fe010000, Size: 2e000, Tag: 200

 1325 15:17:24.738632   * Base: fe03f000, Size: d41000, Tag: 200

 1326 15:17:24.745165   * Base: fed88000, Size: 8000, Tag: 200

 1327 15:17:24.748685   * Base: fed93000, Size: d000, Tag: 200

 1328 15:17:24.751940   * Base: feda2000, Size: 1e000, Tag: 200

 1329 15:17:24.755160   * Base: fede0000, Size: 1220000, Tag: 200

 1330 15:17:24.761830   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1331 15:17:24.768874    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1332 15:17:24.775299    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1333 15:17:24.781998    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1334 15:17:24.788616    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1335 15:17:24.795143    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1336 15:17:24.801767    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1337 15:17:24.808501    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1338 15:17:24.815241    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1339 15:17:24.821747    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1340 15:17:24.828646    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1341 15:17:24.835180    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1342 15:17:24.841706    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1343 15:17:24.848283    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1344 15:17:24.854768    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1345 15:17:24.861487    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1346 15:17:24.868332    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1347 15:17:24.874950    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1348 15:17:24.881679    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1349 15:17:24.888282    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1350 15:17:24.894736    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1351 15:17:24.901340    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1352 15:17:24.908295    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1353 15:17:24.914548  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1354 15:17:24.924547  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1355 15:17:24.927902   PCI: 00:1d.0: Resource ranges:

 1356 15:17:24.931136   * Base: 7fc00000, Size: 100000, Tag: 200

 1357 15:17:24.937895    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1358 15:17:24.944359    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1359 15:17:24.951159    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1360 15:17:24.957818  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1361 15:17:24.967640  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1362 15:17:24.971122  Root Device assign_resources, bus 0 link: 0

 1363 15:17:24.974561  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1364 15:17:24.984299  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1365 15:17:24.990911  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1366 15:17:25.000829  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1367 15:17:25.007444  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1368 15:17:25.011001  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1369 15:17:25.017968  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1370 15:17:25.024657  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1371 15:17:25.034703  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1372 15:17:25.041476  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1373 15:17:25.047908  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1374 15:17:25.051304  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1375 15:17:25.061428  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1376 15:17:25.064509  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1377 15:17:25.067931  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1378 15:17:25.077658  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1379 15:17:25.084339  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1380 15:17:25.094568  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1381 15:17:25.097566  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1382 15:17:25.100982  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1383 15:17:25.110992  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1384 15:17:25.114491  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1385 15:17:25.121113  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1386 15:17:25.127693  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1387 15:17:25.131146  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1388 15:17:25.138198  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1389 15:17:25.144696  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1390 15:17:25.154859  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1391 15:17:25.161525  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1392 15:17:25.171534  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1393 15:17:25.174745  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1394 15:17:25.178273  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1395 15:17:25.188390  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1396 15:17:25.198344  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1397 15:17:25.208082  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1398 15:17:25.211637  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1399 15:17:25.218109  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1400 15:17:25.228069  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1401 15:17:25.234767  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1402 15:17:25.241226  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1403 15:17:25.248037  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1404 15:17:25.251501  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1405 15:17:25.258452  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1406 15:17:25.264916  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1407 15:17:25.271722  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1408 15:17:25.274713  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1409 15:17:25.278228  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1410 15:17:25.285265  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1411 15:17:25.288746  LPC: Trying to open IO window from 800 size 1ff

 1412 15:17:25.298675  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1413 15:17:25.305399  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1414 15:17:25.315543  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1415 15:17:25.318511  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1416 15:17:25.322058  Root Device assign_resources, bus 0 link: 0

 1417 15:17:25.325153  Done setting resources.

 1418 15:17:25.332077  Show resources in subtree (Root Device)...After assigning values.

 1419 15:17:25.335198   Root Device child on link 0 DOMAIN: 0000

 1420 15:17:25.341881    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1421 15:17:25.351785    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1422 15:17:25.361599    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1423 15:17:25.361721     PCI: 00:00.0

 1424 15:17:25.371882     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1425 15:17:25.381621     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1426 15:17:25.391376     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1427 15:17:25.401513     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1428 15:17:25.407897     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1429 15:17:25.417895     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1430 15:17:25.427770     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1431 15:17:25.437656     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1432 15:17:25.447854     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1433 15:17:25.454302     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1434 15:17:25.464486     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1435 15:17:25.474499     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1436 15:17:25.484220     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1437 15:17:25.494218     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1438 15:17:25.501086     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1439 15:17:25.510936     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1440 15:17:25.521090     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1441 15:17:25.530862     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1442 15:17:25.540833     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1443 15:17:25.550615     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1444 15:17:25.550712     PCI: 00:02.0

 1445 15:17:25.564117     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1446 15:17:25.574045     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1447 15:17:25.583929     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1448 15:17:25.587445     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1449 15:17:25.597336     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1450 15:17:25.600862      GENERIC: 0.0

 1451 15:17:25.600971     PCI: 00:05.0

 1452 15:17:25.610656     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1453 15:17:25.617331     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1454 15:17:25.617433      GENERIC: 0.0

 1455 15:17:25.620895     PCI: 00:08.0

 1456 15:17:25.630725     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1457 15:17:25.630811     PCI: 00:0a.0

 1458 15:17:25.637220     PCI: 00:0d.0 child on link 0 USB0 port 0

 1459 15:17:25.647371     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1460 15:17:25.650524      USB0 port 0 child on link 0 USB3 port 0

 1461 15:17:25.654039       USB3 port 0

 1462 15:17:25.654118       USB3 port 1

 1463 15:17:25.657238       USB3 port 2

 1464 15:17:25.657316       USB3 port 3

 1465 15:17:25.660716     PCI: 00:14.0 child on link 0 USB0 port 0

 1466 15:17:25.674140     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1467 15:17:25.677391      USB0 port 0 child on link 0 USB2 port 0

 1468 15:17:25.677483       USB2 port 0

 1469 15:17:25.680609       USB2 port 1

 1470 15:17:25.683988       USB2 port 2

 1471 15:17:25.684062       USB2 port 3

 1472 15:17:25.687526       USB2 port 4

 1473 15:17:25.687610       USB2 port 5

 1474 15:17:25.690909       USB2 port 6

 1475 15:17:25.690981       USB2 port 7

 1476 15:17:25.693860       USB2 port 8

 1477 15:17:25.693934       USB2 port 9

 1478 15:17:25.697196       USB3 port 0

 1479 15:17:25.697269       USB3 port 1

 1480 15:17:25.700687       USB3 port 2

 1481 15:17:25.700758       USB3 port 3

 1482 15:17:25.703910     PCI: 00:14.2

 1483 15:17:25.713957     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1484 15:17:25.723651     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1485 15:17:25.727208     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1486 15:17:25.740639     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1487 15:17:25.740726      GENERIC: 0.0

 1488 15:17:25.743769     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1489 15:17:25.753759     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1490 15:17:25.757089      I2C: 00:1a

 1491 15:17:25.757200      I2C: 00:31

 1492 15:17:25.760272      I2C: 00:32

 1493 15:17:25.763672     PCI: 00:15.1 child on link 0 I2C: 00:10

 1494 15:17:25.773431     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1495 15:17:25.776953      I2C: 00:10

 1496 15:17:25.777045     PCI: 00:15.2

 1497 15:17:25.786841     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1498 15:17:25.790301     PCI: 00:15.3

 1499 15:17:25.800149     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1500 15:17:25.803469     PCI: 00:16.0

 1501 15:17:25.813693     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1502 15:17:25.813778     PCI: 00:19.0

 1503 15:17:25.816643     PCI: 00:19.1 child on link 0 I2C: 00:15

 1504 15:17:25.826869     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1505 15:17:25.830392      I2C: 00:15

 1506 15:17:25.833935     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1507 15:17:25.843919     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1508 15:17:25.856967     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1509 15:17:25.866832     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1510 15:17:25.866948      GENERIC: 0.0

 1511 15:17:25.870230      PCI: 01:00.0

 1512 15:17:25.880180      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1513 15:17:25.889828      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1514 15:17:25.899881      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1515 15:17:25.903220     PCI: 00:1e.0

 1516 15:17:25.913203     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1517 15:17:25.916279     PCI: 00:1e.2 child on link 0 SPI: 00

 1518 15:17:25.929685     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1519 15:17:25.929798      SPI: 00

 1520 15:17:25.933107     PCI: 00:1e.3 child on link 0 SPI: 00

 1521 15:17:25.942652     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1522 15:17:25.946240      SPI: 00

 1523 15:17:25.949657     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1524 15:17:25.959720     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1525 15:17:25.959840      PNP: 0c09.0

 1526 15:17:25.969377      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1527 15:17:25.972689     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1528 15:17:25.982710     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1529 15:17:25.992658     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1530 15:17:25.995985      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1531 15:17:25.999255       GENERIC: 0.0

 1532 15:17:25.999359       GENERIC: 1.0

 1533 15:17:26.002592     PCI: 00:1f.3

 1534 15:17:26.012738     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1535 15:17:26.022580     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1536 15:17:26.022673     PCI: 00:1f.5

 1537 15:17:26.035793     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1538 15:17:26.039180    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1539 15:17:26.039283     APIC: 00

 1540 15:17:26.042653     APIC: 01

 1541 15:17:26.042734     APIC: 03

 1542 15:17:26.042826     APIC: 05

 1543 15:17:26.046054     APIC: 07

 1544 15:17:26.046160     APIC: 06

 1545 15:17:26.046259     APIC: 02

 1546 15:17:26.049122     APIC: 04

 1547 15:17:26.052714  Done allocating resources.

 1548 15:17:26.059097  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1549 15:17:26.062569  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1550 15:17:26.065603  Configure GPIOs for I2S audio on UP4.

 1551 15:17:26.074129  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1552 15:17:26.077561  Enabling resources...

 1553 15:17:26.080628  PCI: 00:00.0 subsystem <- 8086/9a12

 1554 15:17:26.083981  PCI: 00:00.0 cmd <- 06

 1555 15:17:26.087211  PCI: 00:02.0 subsystem <- 8086/9a40

 1556 15:17:26.090659  PCI: 00:02.0 cmd <- 03

 1557 15:17:26.093759  PCI: 00:04.0 subsystem <- 8086/9a03

 1558 15:17:26.093841  PCI: 00:04.0 cmd <- 02

 1559 15:17:26.100955  PCI: 00:05.0 subsystem <- 8086/9a19

 1560 15:17:26.101090  PCI: 00:05.0 cmd <- 02

 1561 15:17:26.104039  PCI: 00:08.0 subsystem <- 8086/9a11

 1562 15:17:26.107369  PCI: 00:08.0 cmd <- 06

 1563 15:17:26.110675  PCI: 00:0d.0 subsystem <- 8086/9a13

 1564 15:17:26.114066  PCI: 00:0d.0 cmd <- 02

 1565 15:17:26.117586  PCI: 00:14.0 subsystem <- 8086/a0ed

 1566 15:17:26.121228  PCI: 00:14.0 cmd <- 02

 1567 15:17:26.124097  PCI: 00:14.2 subsystem <- 8086/a0ef

 1568 15:17:26.127403  PCI: 00:14.2 cmd <- 02

 1569 15:17:26.130888  PCI: 00:14.3 subsystem <- 8086/a0f0

 1570 15:17:26.134172  PCI: 00:14.3 cmd <- 02

 1571 15:17:26.137331  PCI: 00:15.0 subsystem <- 8086/a0e8

 1572 15:17:26.137445  PCI: 00:15.0 cmd <- 02

 1573 15:17:26.144452  PCI: 00:15.1 subsystem <- 8086/a0e9

 1574 15:17:26.144568  PCI: 00:15.1 cmd <- 02

 1575 15:17:26.147790  PCI: 00:15.2 subsystem <- 8086/a0ea

 1576 15:17:26.151136  PCI: 00:15.2 cmd <- 02

 1577 15:17:26.154230  PCI: 00:15.3 subsystem <- 8086/a0eb

 1578 15:17:26.157818  PCI: 00:15.3 cmd <- 02

 1579 15:17:26.160856  PCI: 00:16.0 subsystem <- 8086/a0e0

 1580 15:17:26.164326  PCI: 00:16.0 cmd <- 02

 1581 15:17:26.167435  PCI: 00:19.1 subsystem <- 8086/a0c6

 1582 15:17:26.170895  PCI: 00:19.1 cmd <- 02

 1583 15:17:26.174072  PCI: 00:1d.0 bridge ctrl <- 0013

 1584 15:17:26.177384  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1585 15:17:26.180748  PCI: 00:1d.0 cmd <- 06

 1586 15:17:26.183777  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1587 15:17:26.187315  PCI: 00:1e.0 cmd <- 06

 1588 15:17:26.190646  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1589 15:17:26.190733  PCI: 00:1e.2 cmd <- 06

 1590 15:17:26.197280  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1591 15:17:26.197372  PCI: 00:1e.3 cmd <- 02

 1592 15:17:26.200697  PCI: 00:1f.0 subsystem <- 8086/a087

 1593 15:17:26.203956  PCI: 00:1f.0 cmd <- 407

 1594 15:17:26.207411  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1595 15:17:26.210469  PCI: 00:1f.3 cmd <- 02

 1596 15:17:26.213827  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1597 15:17:26.217257  PCI: 00:1f.5 cmd <- 406

 1598 15:17:26.221155  PCI: 01:00.0 cmd <- 02

 1599 15:17:26.226021  done.

 1600 15:17:26.229048  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1601 15:17:26.232533  Initializing devices...

 1602 15:17:26.235780  Root Device init

 1603 15:17:26.239338  Chrome EC: Set SMI mask to 0x0000000000000000

 1604 15:17:26.245609  Chrome EC: clear events_b mask to 0x0000000000000000

 1605 15:17:26.252321  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1606 15:17:26.255386  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1607 15:17:26.262653  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1608 15:17:26.269593  Chrome EC: Set WAKE mask to 0x0000000000000000

 1609 15:17:26.272564  fw_config match found: DB_USB=USB3_ACTIVE

 1610 15:17:26.279294  Configure Right Type-C port orientation for retimer

 1611 15:17:26.282678  Root Device init finished in 44 msecs

 1612 15:17:26.286075  PCI: 00:00.0 init

 1613 15:17:26.289184  CPU TDP = 9 Watts

 1614 15:17:26.289260  CPU PL1 = 9 Watts

 1615 15:17:26.292638  CPU PL2 = 40 Watts

 1616 15:17:26.296077  CPU PL4 = 83 Watts

 1617 15:17:26.299098  PCI: 00:00.0 init finished in 8 msecs

 1618 15:17:26.299205  PCI: 00:02.0 init

 1619 15:17:26.302583  GMA: Found VBT in CBFS

 1620 15:17:26.305658  GMA: Found valid VBT in CBFS

 1621 15:17:26.312441  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1622 15:17:26.318779                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1623 15:17:26.322190  PCI: 00:02.0 init finished in 18 msecs

 1624 15:17:26.325704  PCI: 00:05.0 init

 1625 15:17:26.328810  PCI: 00:05.0 init finished in 0 msecs

 1626 15:17:26.332320  PCI: 00:08.0 init

 1627 15:17:26.335350  PCI: 00:08.0 init finished in 0 msecs

 1628 15:17:26.338802  PCI: 00:14.0 init

 1629 15:17:26.342023  PCI: 00:14.0 init finished in 0 msecs

 1630 15:17:26.345215  PCI: 00:14.2 init

 1631 15:17:26.348747  PCI: 00:14.2 init finished in 0 msecs

 1632 15:17:26.351836  PCI: 00:15.0 init

 1633 15:17:26.355168  I2C bus 0 version 0x3230302a

 1634 15:17:26.358464  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1635 15:17:26.361659  PCI: 00:15.0 init finished in 6 msecs

 1636 15:17:26.364939  PCI: 00:15.1 init

 1637 15:17:26.365058  I2C bus 1 version 0x3230302a

 1638 15:17:26.371799  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1639 15:17:26.375061  PCI: 00:15.1 init finished in 6 msecs

 1640 15:17:26.375171  PCI: 00:15.2 init

 1641 15:17:26.378157  I2C bus 2 version 0x3230302a

 1642 15:17:26.381693  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1643 15:17:26.388034  PCI: 00:15.2 init finished in 6 msecs

 1644 15:17:26.388115  PCI: 00:15.3 init

 1645 15:17:26.391451  I2C bus 3 version 0x3230302a

 1646 15:17:26.394908  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1647 15:17:26.398129  PCI: 00:15.3 init finished in 6 msecs

 1648 15:17:26.401452  PCI: 00:16.0 init

 1649 15:17:26.404703  PCI: 00:16.0 init finished in 0 msecs

 1650 15:17:26.408198  PCI: 00:19.1 init

 1651 15:17:26.411053  I2C bus 5 version 0x3230302a

 1652 15:17:26.414468  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1653 15:17:26.417725  PCI: 00:19.1 init finished in 6 msecs

 1654 15:17:26.421173  PCI: 00:1d.0 init

 1655 15:17:26.424651  Initializing PCH PCIe bridge.

 1656 15:17:26.427781  PCI: 00:1d.0 init finished in 3 msecs

 1657 15:17:26.431243  PCI: 00:1f.0 init

 1658 15:17:26.434348  IOAPIC: Initializing IOAPIC at 0xfec00000

 1659 15:17:26.437907  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1660 15:17:26.440966  IOAPIC: ID = 0x02

 1661 15:17:26.444478  IOAPIC: Dumping registers

 1662 15:17:26.447408    reg 0x0000: 0x02000000

 1663 15:17:26.447535    reg 0x0001: 0x00770020

 1664 15:17:26.450709    reg 0x0002: 0x00000000

 1665 15:17:26.454103  PCI: 00:1f.0 init finished in 21 msecs

 1666 15:17:26.457256  PCI: 00:1f.2 init

 1667 15:17:26.461100  Disabling ACPI via APMC.

 1668 15:17:26.464641  APMC done.

 1669 15:17:26.467755  PCI: 00:1f.2 init finished in 5 msecs

 1670 15:17:26.478548  PCI: 01:00.0 init

 1671 15:17:26.481794  PCI: 01:00.0 init finished in 0 msecs

 1672 15:17:26.485154  PNP: 0c09.0 init

 1673 15:17:26.488258  Google Chrome EC uptime: 10.074 seconds

 1674 15:17:26.495159  Google Chrome AP resets since EC boot: 0

 1675 15:17:26.498218  Google Chrome most recent AP reset causes:

 1676 15:17:26.504941  Google Chrome EC reset flags at last EC boot: reset-pin | hard

 1677 15:17:26.508365  PNP: 0c09.0 init finished in 19 msecs

 1678 15:17:26.513312  Devices initialized

 1679 15:17:26.516937  Show all devs... After init.

 1680 15:17:26.519960  Root Device: enabled 1

 1681 15:17:26.520047  DOMAIN: 0000: enabled 1

 1682 15:17:26.523559  CPU_CLUSTER: 0: enabled 1

 1683 15:17:26.526728  PCI: 00:00.0: enabled 1

 1684 15:17:26.530054  PCI: 00:02.0: enabled 1

 1685 15:17:26.530163  PCI: 00:04.0: enabled 1

 1686 15:17:26.533530  PCI: 00:05.0: enabled 1

 1687 15:17:26.536949  PCI: 00:06.0: enabled 0

 1688 15:17:26.539965  PCI: 00:07.0: enabled 0

 1689 15:17:26.540040  PCI: 00:07.1: enabled 0

 1690 15:17:26.543461  PCI: 00:07.2: enabled 0

 1691 15:17:26.546504  PCI: 00:07.3: enabled 0

 1692 15:17:26.550089  PCI: 00:08.0: enabled 1

 1693 15:17:26.550207  PCI: 00:09.0: enabled 0

 1694 15:17:26.553162  PCI: 00:0a.0: enabled 0

 1695 15:17:26.556240  PCI: 00:0d.0: enabled 1

 1696 15:17:26.559802  PCI: 00:0d.1: enabled 0

 1697 15:17:26.559886  PCI: 00:0d.2: enabled 0

 1698 15:17:26.562865  PCI: 00:0d.3: enabled 0

 1699 15:17:26.566479  PCI: 00:0e.0: enabled 0

 1700 15:17:26.569559  PCI: 00:10.2: enabled 1

 1701 15:17:26.569640  PCI: 00:10.6: enabled 0

 1702 15:17:26.572987  PCI: 00:10.7: enabled 0

 1703 15:17:26.576569  PCI: 00:12.0: enabled 0

 1704 15:17:26.576654  PCI: 00:12.6: enabled 0

 1705 15:17:26.579442  PCI: 00:13.0: enabled 0

 1706 15:17:26.582807  PCI: 00:14.0: enabled 1

 1707 15:17:26.586148  PCI: 00:14.1: enabled 0

 1708 15:17:26.586242  PCI: 00:14.2: enabled 1

 1709 15:17:26.589748  PCI: 00:14.3: enabled 1

 1710 15:17:26.592954  PCI: 00:15.0: enabled 1

 1711 15:17:26.596175  PCI: 00:15.1: enabled 1

 1712 15:17:26.596290  PCI: 00:15.2: enabled 1

 1713 15:17:26.599381  PCI: 00:15.3: enabled 1

 1714 15:17:26.602682  PCI: 00:16.0: enabled 1

 1715 15:17:26.606290  PCI: 00:16.1: enabled 0

 1716 15:17:26.606374  PCI: 00:16.2: enabled 0

 1717 15:17:26.609338  PCI: 00:16.3: enabled 0

 1718 15:17:26.612783  PCI: 00:16.4: enabled 0

 1719 15:17:26.615949  PCI: 00:16.5: enabled 0

 1720 15:17:26.616033  PCI: 00:17.0: enabled 0

 1721 15:17:26.619418  PCI: 00:19.0: enabled 0

 1722 15:17:26.622934  PCI: 00:19.1: enabled 1

 1723 15:17:26.623018  PCI: 00:19.2: enabled 0

 1724 15:17:26.625842  PCI: 00:1c.0: enabled 1

 1725 15:17:26.629247  PCI: 00:1c.1: enabled 0

 1726 15:17:26.632718  PCI: 00:1c.2: enabled 0

 1727 15:17:26.632803  PCI: 00:1c.3: enabled 0

 1728 15:17:26.636203  PCI: 00:1c.4: enabled 0

 1729 15:17:26.639158  PCI: 00:1c.5: enabled 0

 1730 15:17:26.642566  PCI: 00:1c.6: enabled 1

 1731 15:17:26.642650  PCI: 00:1c.7: enabled 0

 1732 15:17:26.645991  PCI: 00:1d.0: enabled 1

 1733 15:17:26.649144  PCI: 00:1d.1: enabled 0

 1734 15:17:26.652662  PCI: 00:1d.2: enabled 1

 1735 15:17:26.652756  PCI: 00:1d.3: enabled 0

 1736 15:17:26.655815  PCI: 00:1e.0: enabled 1

 1737 15:17:26.659284  PCI: 00:1e.1: enabled 0

 1738 15:17:26.659398  PCI: 00:1e.2: enabled 1

 1739 15:17:26.662638  PCI: 00:1e.3: enabled 1

 1740 15:17:26.665729  PCI: 00:1f.0: enabled 1

 1741 15:17:26.669307  PCI: 00:1f.1: enabled 0

 1742 15:17:26.669384  PCI: 00:1f.2: enabled 1

 1743 15:17:26.672506  PCI: 00:1f.3: enabled 1

 1744 15:17:26.675864  PCI: 00:1f.4: enabled 0

 1745 15:17:26.679339  PCI: 00:1f.5: enabled 1

 1746 15:17:26.679422  PCI: 00:1f.6: enabled 0

 1747 15:17:26.682432  PCI: 00:1f.7: enabled 0

 1748 15:17:26.685743  APIC: 00: enabled 1

 1749 15:17:26.685826  GENERIC: 0.0: enabled 1

 1750 15:17:26.689052  GENERIC: 0.0: enabled 1

 1751 15:17:26.692423  GENERIC: 1.0: enabled 1

 1752 15:17:26.695754  GENERIC: 0.0: enabled 1

 1753 15:17:26.695838  GENERIC: 1.0: enabled 1

 1754 15:17:26.699079  USB0 port 0: enabled 1

 1755 15:17:26.702560  GENERIC: 0.0: enabled 1

 1756 15:17:26.705934  USB0 port 0: enabled 1

 1757 15:17:26.706019  GENERIC: 0.0: enabled 1

 1758 15:17:26.708995  I2C: 00:1a: enabled 1

 1759 15:17:26.712481  I2C: 00:31: enabled 1

 1760 15:17:26.712566  I2C: 00:32: enabled 1

 1761 15:17:26.715900  I2C: 00:10: enabled 1

 1762 15:17:26.718968  I2C: 00:15: enabled 1

 1763 15:17:26.719052  GENERIC: 0.0: enabled 0

 1764 15:17:26.722494  GENERIC: 1.0: enabled 0

 1765 15:17:26.725477  GENERIC: 0.0: enabled 1

 1766 15:17:26.725562  SPI: 00: enabled 1

 1767 15:17:26.729142  SPI: 00: enabled 1

 1768 15:17:26.732489  PNP: 0c09.0: enabled 1

 1769 15:17:26.732574  GENERIC: 0.0: enabled 1

 1770 15:17:26.735573  USB3 port 0: enabled 1

 1771 15:17:26.739209  USB3 port 1: enabled 1

 1772 15:17:26.742164  USB3 port 2: enabled 0

 1773 15:17:26.742249  USB3 port 3: enabled 0

 1774 15:17:26.745486  USB2 port 0: enabled 0

 1775 15:17:26.748838  USB2 port 1: enabled 1

 1776 15:17:26.748921  USB2 port 2: enabled 1

 1777 15:17:26.752264  USB2 port 3: enabled 0

 1778 15:17:26.755720  USB2 port 4: enabled 1

 1779 15:17:26.758711  USB2 port 5: enabled 0

 1780 15:17:26.758796  USB2 port 6: enabled 0

 1781 15:17:26.762236  USB2 port 7: enabled 0

 1782 15:17:26.765423  USB2 port 8: enabled 0

 1783 15:17:26.765507  USB2 port 9: enabled 0

 1784 15:17:26.768976  USB3 port 0: enabled 0

 1785 15:17:26.772003  USB3 port 1: enabled 1

 1786 15:17:26.772088  USB3 port 2: enabled 0

 1787 15:17:26.775557  USB3 port 3: enabled 0

 1788 15:17:26.778857  GENERIC: 0.0: enabled 1

 1789 15:17:26.781925  GENERIC: 1.0: enabled 1

 1790 15:17:26.782009  APIC: 01: enabled 1

 1791 15:17:26.785398  APIC: 03: enabled 1

 1792 15:17:26.788939  APIC: 05: enabled 1

 1793 15:17:26.789023  APIC: 07: enabled 1

 1794 15:17:26.792123  APIC: 06: enabled 1

 1795 15:17:26.792208  APIC: 02: enabled 1

 1796 15:17:26.795328  APIC: 04: enabled 1

 1797 15:17:26.798449  PCI: 01:00.0: enabled 1

 1798 15:17:26.801990  BS: BS_DEV_INIT run times (exec / console): 31 / 536 ms

 1799 15:17:26.808518  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1800 15:17:26.811788  ELOG: NV offset 0xf30000 size 0x1000

 1801 15:17:26.818808  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1802 15:17:26.825429  ELOG: Event(17) added with size 13 at 2024-07-17 15:17:26 UTC

 1803 15:17:26.831724  ELOG: Event(92) added with size 9 at 2024-07-17 15:17:26 UTC

 1804 15:17:26.838451  ELOG: Event(93) added with size 9 at 2024-07-17 15:17:26 UTC

 1805 15:17:26.844887  ELOG: Event(9E) added with size 10 at 2024-07-17 15:17:26 UTC

 1806 15:17:26.851407  ELOG: Event(9F) added with size 14 at 2024-07-17 15:17:26 UTC

 1807 15:17:26.858275  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1808 15:17:26.864967  ELOG: Event(A1) added with size 10 at 2024-07-17 15:17:26 UTC

 1809 15:17:26.868147  elog_add_boot_reason: Logged recovery mode boot, reason: 0x02

 1810 15:17:26.874877  BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms

 1811 15:17:26.877986  Finalize devices...

 1812 15:17:26.878096  Devices finalized

 1813 15:17:26.884887  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1814 15:17:26.891125  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1815 15:17:26.894544  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1816 15:17:26.901116  ME: HFSTS1                      : 0x80030055

 1817 15:17:26.904387  ME: HFSTS2                      : 0x30280116

 1818 15:17:26.907717  ME: HFSTS3                      : 0x00000050

 1819 15:17:26.914680  ME: HFSTS4                      : 0x00004000

 1820 15:17:26.917810  ME: HFSTS5                      : 0x00000000

 1821 15:17:26.921119  ME: HFSTS6                      : 0x00400006

 1822 15:17:26.927734  ME: Manufacturing Mode          : YES

 1823 15:17:26.930887  ME: SPI Protection Mode Enabled : NO

 1824 15:17:26.934424  ME: FW Partition Table          : OK

 1825 15:17:26.937677  ME: Bringup Loader Failure      : NO

 1826 15:17:26.941203  ME: Firmware Init Complete      : NO

 1827 15:17:26.944292  ME: Boot Options Present        : NO

 1828 15:17:26.947785  ME: Update In Progress          : NO

 1829 15:17:26.950847  ME: D0i3 Support                : YES

 1830 15:17:26.957814  ME: Low Power State Enabled     : NO

 1831 15:17:26.960793  ME: CPU Replaced                : YES

 1832 15:17:26.964210  ME: CPU Replacement Valid       : YES

 1833 15:17:26.967704  ME: Current Working State       : 5

 1834 15:17:26.970731  ME: Current Operation State     : 1

 1835 15:17:26.974127  ME: Current Operation Mode      : 3

 1836 15:17:26.977597  ME: Error Code                  : 0

 1837 15:17:26.980870  ME: Enhanced Debug Mode         : NO

 1838 15:17:26.987280  ME: CPU Debug Disabled          : YES

 1839 15:17:26.990890  ME: TXT Support                 : NO

 1840 15:17:26.993911  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1841 15:17:27.001236  ELOG: Event(91) added with size 10 at 2024-07-17 15:17:27 UTC

 1842 15:17:27.008264  Chrome EC: clear events_b mask to 0x0000000020004000

 1843 15:17:27.014587  BS: BS_WRITE_TABLES entry times (exec / console): 2 / 11 ms

 1844 15:17:27.021255  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1845 15:17:27.024765  CBFS: 'fallback/slic' not found.

 1846 15:17:27.028066  ACPI: Writing ACPI tables at 76b01000.

 1847 15:17:27.031100  ACPI:    * FACS

 1848 15:17:27.031203  ACPI:    * DSDT

 1849 15:17:27.037700  Ramoops buffer: 0x100000@0x76a00000.

 1850 15:17:27.041217  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1851 15:17:27.044675  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1852 15:17:27.048283  Google Chrome EC: version:

 1853 15:17:27.051592  	ro: voema_v2.0.7540-147f8d37d1

 1854 15:17:27.054935  	rw: voema_v2.0.7540-147f8d37d1

 1855 15:17:27.058065    running image: 1

 1856 15:17:27.064856  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1857 15:17:27.068296  ACPI:    * FADT

 1858 15:17:27.068405  SCI is IRQ9

 1859 15:17:27.071463  ACPI: added table 1/32, length now 40

 1860 15:17:27.075033  ACPI:     * SSDT

 1861 15:17:27.078078  Found 1 CPU(s) with 8 core(s) each.

 1862 15:17:27.081610  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1863 15:17:27.088032  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1864 15:17:27.091440  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1865 15:17:27.094577  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1866 15:17:27.101241  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1867 15:17:27.108033  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1868 15:17:27.111097  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1869 15:17:27.117905  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1870 15:17:27.124287  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1871 15:17:27.127620  \_SB.PCI0.RP09: Added StorageD3Enable property

 1872 15:17:27.130984  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1873 15:17:27.137724  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1874 15:17:27.144205  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1875 15:17:27.147722  PS2K: Passing 80 keymaps to kernel

 1876 15:17:27.154183  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1877 15:17:27.160681  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1878 15:17:27.167523  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1879 15:17:27.173997  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1880 15:17:27.180508  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1881 15:17:27.187185  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1882 15:17:27.193648  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1883 15:17:27.200328  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1884 15:17:27.203814  ACPI: added table 2/32, length now 44

 1885 15:17:27.203902  ACPI:    * MCFG

 1886 15:17:27.206863  ACPI: added table 3/32, length now 48

 1887 15:17:27.210511  ACPI:    * TPM2

 1888 15:17:27.213438  TPM2 log created at 0x769f0000

 1889 15:17:27.216700  ACPI: added table 4/32, length now 52

 1890 15:17:27.220196  ACPI:    * MADT

 1891 15:17:27.220273  SCI is IRQ9

 1892 15:17:27.223513  ACPI: added table 5/32, length now 56

 1893 15:17:27.226837  current = 76b09850

 1894 15:17:27.226942  ACPI:    * DMAR

 1895 15:17:27.230034  ACPI: added table 6/32, length now 60

 1896 15:17:27.233444  ACPI: added table 7/32, length now 64

 1897 15:17:27.236708  ACPI:    * HPET

 1898 15:17:27.239981  ACPI: added table 8/32, length now 68

 1899 15:17:27.242975  ACPI: done.

 1900 15:17:27.243080  ACPI tables: 35216 bytes.

 1901 15:17:27.246481  smbios_write_tables: 769ef000

 1902 15:17:27.249899  EC returned error result code 3

 1903 15:17:27.252984  Couldn't obtain OEM name from CBI

 1904 15:17:27.257633  Create SMBIOS type 16

 1905 15:17:27.261184  Create SMBIOS type 17

 1906 15:17:27.264262  GENERIC: 0.0 (WIFI Device)

 1907 15:17:27.264367  SMBIOS tables: 1750 bytes.

 1908 15:17:27.271055  Writing table forward entry at 0x00000500

 1909 15:17:27.277457  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1910 15:17:27.281008  Writing coreboot table at 0x76b25000

 1911 15:17:27.287569   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1912 15:17:27.290894   1. 0000000000001000-000000000009ffff: RAM

 1913 15:17:27.294383   2. 00000000000a0000-00000000000fffff: RESERVED

 1914 15:17:27.300861   3. 0000000000100000-00000000769eefff: RAM

 1915 15:17:27.304113   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1916 15:17:27.310600   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1917 15:17:27.317560   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1918 15:17:27.320877   7. 0000000077000000-000000007fbfffff: RESERVED

 1919 15:17:27.323865   8. 00000000c0000000-00000000cfffffff: RESERVED

 1920 15:17:27.330919   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1921 15:17:27.334081  10. 00000000fb000000-00000000fb000fff: RESERVED

 1922 15:17:27.340704  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1923 15:17:27.343946  12. 00000000fed80000-00000000fed87fff: RESERVED

 1924 15:17:27.350630  13. 00000000fed90000-00000000fed92fff: RESERVED

 1925 15:17:27.353860  14. 00000000feda0000-00000000feda1fff: RESERVED

 1926 15:17:27.360436  15. 00000000fedc0000-00000000feddffff: RESERVED

 1927 15:17:27.363930  16. 0000000100000000-00000002803fffff: RAM

 1928 15:17:27.367238  Passing 4 GPIOs to payload:

 1929 15:17:27.370731              NAME |       PORT | POLARITY |     VALUE

 1930 15:17:27.377035               lid |  undefined |     high |      high

 1931 15:17:27.380314             power |  undefined |     high |       low

 1932 15:17:27.387154             oprom |  undefined |     high |       low

 1933 15:17:27.394000          EC in RW | 0x000000e5 |     high |       low

 1934 15:17:27.400307  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 2733

 1935 15:17:27.400418  coreboot table: 1576 bytes.

 1936 15:17:27.407032  IMD ROOT    0. 0x76fff000 0x00001000

 1937 15:17:27.410628  IMD SMALL   1. 0x76ffe000 0x00001000

 1938 15:17:27.413626  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1939 15:17:27.417134  VPD         3. 0x76c4d000 0x00000367

 1940 15:17:27.420725  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1941 15:17:27.423868  CONSOLE     5. 0x76c2c000 0x00020000

 1942 15:17:27.426917  FMAP        6. 0x76c2b000 0x00000578

 1943 15:17:27.430456  TIME STAMP  7. 0x76c2a000 0x00000910

 1944 15:17:27.436949  VBOOT WORK  8. 0x76c16000 0x00014000

 1945 15:17:27.440501  ROMSTG STCK 9. 0x76c15000 0x00001000

 1946 15:17:27.443492  AFTER CAR  10. 0x76c0a000 0x0000b000

 1947 15:17:27.446925  RAMSTAGE   11. 0x76b97000 0x00073000

 1948 15:17:27.450349  REFCODE    12. 0x76b42000 0x00055000

 1949 15:17:27.453794  SMM BACKUP 13. 0x76b32000 0x00010000

 1950 15:17:27.456921  4f444749   14. 0x76b30000 0x00002000

 1951 15:17:27.460235  EXT VBT15. 0x76b2d000 0x0000219f

 1952 15:17:27.463730  COREBOOT   16. 0x76b25000 0x00008000

 1953 15:17:27.466843  ACPI       17. 0x76b01000 0x00024000

 1954 15:17:27.473895  ACPI GNVS  18. 0x76b00000 0x00001000

 1955 15:17:27.477036  RAMOOPS    19. 0x76a00000 0x00100000

 1956 15:17:27.480523  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1957 15:17:27.483967  SMBIOS     21. 0x769ef000 0x00000800

 1958 15:17:27.484072  IMD small region:

 1959 15:17:27.490361    IMD ROOT    0. 0x76ffec00 0x00000400

 1960 15:17:27.493706    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1961 15:17:27.497031    POWER STATE 2. 0x76ffeb80 0x00000044

 1962 15:17:27.500079    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1963 15:17:27.503688    MEM INFO    4. 0x76ffe980 0x000001e0

 1964 15:17:27.510548  BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms

 1965 15:17:27.513717  MTRR: Physical address space:

 1966 15:17:27.520250  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1967 15:17:27.526761  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1968 15:17:27.533471  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1969 15:17:27.540087  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1970 15:17:27.543334  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1971 15:17:27.549855  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1972 15:17:27.556712  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1973 15:17:27.563258  MTRR: Fixed MSR 0x250 0x0606060606060606

 1974 15:17:27.566667  MTRR: Fixed MSR 0x258 0x0606060606060606

 1975 15:17:27.569523  MTRR: Fixed MSR 0x259 0x0000000000000000

 1976 15:17:27.573062  MTRR: Fixed MSR 0x268 0x0606060606060606

 1977 15:17:27.579558  MTRR: Fixed MSR 0x269 0x0606060606060606

 1978 15:17:27.582783  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1979 15:17:27.586292  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1980 15:17:27.589601  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1981 15:17:27.592753  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1982 15:17:27.599405  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1983 15:17:27.602732  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1984 15:17:27.606106  call enable_fixed_mtrr()

 1985 15:17:27.609402  CPU physical address size: 39 bits

 1986 15:17:27.615975  MTRR: default type WB/UC MTRR counts: 6/6.

 1987 15:17:27.619152  MTRR: UC selected as default type.

 1988 15:17:27.622702  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1989 15:17:27.629155  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1990 15:17:27.635620  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1991 15:17:27.642199  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1992 15:17:27.649014  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1993 15:17:27.655399  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1994 15:17:27.655528  

 1995 15:17:27.658964  MTRR check

 1996 15:17:27.659079  Fixed MTRRs   : Enabled

 1997 15:17:27.662040  Variable MTRRs: Enabled

 1998 15:17:27.662143  

 1999 15:17:27.668769  MTRR: Fixed MSR 0x250 0x0606060606060606

 2000 15:17:27.671735  MTRR: Fixed MSR 0x258 0x0606060606060606

 2001 15:17:27.675517  MTRR: Fixed MSR 0x259 0x0000000000000000

 2002 15:17:27.678400  MTRR: Fixed MSR 0x268 0x0606060606060606

 2003 15:17:27.681735  MTRR: Fixed MSR 0x269 0x0606060606060606

 2004 15:17:27.688395  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2005 15:17:27.691821  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2006 15:17:27.695088  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2007 15:17:27.698646  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2008 15:17:27.704746  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2009 15:17:27.708280  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2010 15:17:27.715021  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 2011 15:17:27.718326  call enable_fixed_mtrr()

 2012 15:17:27.724751  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2013 15:17:27.728127  CPU physical address size: 39 bits

 2014 15:17:27.735014  Checking segment from ROM address 0xffc02b38

 2015 15:17:27.738322  MTRR: Fixed MSR 0x250 0x0606060606060606

 2016 15:17:27.741400  MTRR: Fixed MSR 0x250 0x0606060606060606

 2017 15:17:27.748044  MTRR: Fixed MSR 0x258 0x0606060606060606

 2018 15:17:27.751302  MTRR: Fixed MSR 0x259 0x0000000000000000

 2019 15:17:27.754908  MTRR: Fixed MSR 0x268 0x0606060606060606

 2020 15:17:27.757963  MTRR: Fixed MSR 0x269 0x0606060606060606

 2021 15:17:27.761410  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2022 15:17:27.768156  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2023 15:17:27.771652  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2024 15:17:27.774773  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2025 15:17:27.778023  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2026 15:17:27.784605  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2027 15:17:27.788053  MTRR: Fixed MSR 0x258 0x0606060606060606

 2028 15:17:27.791317  call enable_fixed_mtrr()

 2029 15:17:27.794716  MTRR: Fixed MSR 0x259 0x0000000000000000

 2030 15:17:27.797982  MTRR: Fixed MSR 0x268 0x0606060606060606

 2031 15:17:27.804393  MTRR: Fixed MSR 0x269 0x0606060606060606

 2032 15:17:27.807831  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2033 15:17:27.811328  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2034 15:17:27.814373  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2035 15:17:27.821080  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2036 15:17:27.824643  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2037 15:17:27.827612  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2038 15:17:27.831127  CPU physical address size: 39 bits

 2039 15:17:27.835388  call enable_fixed_mtrr()

 2040 15:17:27.842030  Checking segment from ROM address 0xffc02b54

 2041 15:17:27.845575  CPU physical address size: 39 bits

 2042 15:17:27.848719  MTRR: Fixed MSR 0x250 0x0606060606060606

 2043 15:17:27.852165  MTRR: Fixed MSR 0x250 0x0606060606060606

 2044 15:17:27.855568  MTRR: Fixed MSR 0x258 0x0606060606060606

 2045 15:17:27.862029  MTRR: Fixed MSR 0x259 0x0000000000000000

 2046 15:17:27.865378  MTRR: Fixed MSR 0x268 0x0606060606060606

 2047 15:17:27.868646  MTRR: Fixed MSR 0x269 0x0606060606060606

 2048 15:17:27.872026  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2049 15:17:27.875534  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2050 15:17:27.882072  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2051 15:17:27.885452  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2052 15:17:27.888495  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2053 15:17:27.892058  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2054 15:17:27.899635  MTRR: Fixed MSR 0x258 0x0606060606060606

 2055 15:17:27.902889  MTRR: Fixed MSR 0x259 0x0000000000000000

 2056 15:17:27.906346  MTRR: Fixed MSR 0x268 0x0606060606060606

 2057 15:17:27.909696  MTRR: Fixed MSR 0x269 0x0606060606060606

 2058 15:17:27.916151  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2059 15:17:27.919284  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2060 15:17:27.922935  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2061 15:17:27.925938  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2062 15:17:27.932733  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2063 15:17:27.936171  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2064 15:17:27.939253  call enable_fixed_mtrr()

 2065 15:17:27.942348  call enable_fixed_mtrr()

 2066 15:17:27.945973  MTRR: Fixed MSR 0x250 0x0606060606060606

 2067 15:17:27.949078  MTRR: Fixed MSR 0x250 0x0606060606060606

 2068 15:17:27.952468  MTRR: Fixed MSR 0x258 0x0606060606060606

 2069 15:17:27.959068  MTRR: Fixed MSR 0x259 0x0000000000000000

 2070 15:17:27.962551  MTRR: Fixed MSR 0x268 0x0606060606060606

 2071 15:17:27.965662  MTRR: Fixed MSR 0x269 0x0606060606060606

 2072 15:17:27.969066  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2073 15:17:27.975683  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2074 15:17:27.979172  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2075 15:17:27.982269  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2076 15:17:27.985584  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2077 15:17:27.992088  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2078 15:17:27.995711  MTRR: Fixed MSR 0x258 0x0606060606060606

 2079 15:17:27.998721  call enable_fixed_mtrr()

 2080 15:17:28.002235  MTRR: Fixed MSR 0x259 0x0000000000000000

 2081 15:17:28.005379  MTRR: Fixed MSR 0x268 0x0606060606060606

 2082 15:17:28.011819  MTRR: Fixed MSR 0x269 0x0606060606060606

 2083 15:17:28.015436  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2084 15:17:28.018456  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2085 15:17:28.021925  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2086 15:17:28.028371  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2087 15:17:28.031917  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2088 15:17:28.035260  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2089 15:17:28.038244  CPU physical address size: 39 bits

 2090 15:17:28.042719  call enable_fixed_mtrr()

 2091 15:17:28.046143  CPU physical address size: 39 bits

 2092 15:17:28.049869  CPU physical address size: 39 bits

 2093 15:17:28.056363  CPU physical address size: 39 bits

 2094 15:17:28.059913  Loading segment from ROM address 0xffc02b38

 2095 15:17:28.063300    code (compression=0)

 2096 15:17:28.069872    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2097 15:17:28.079567  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2098 15:17:28.079680  it's not compressed!

 2099 15:17:28.219900  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2100 15:17:28.226590  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2101 15:17:28.233322  Loading segment from ROM address 0xffc02b54

 2102 15:17:28.233433    Entry Point 0x30000000

 2103 15:17:28.236455  Loaded segments

 2104 15:17:28.243309  BS: BS_PAYLOAD_LOAD run times (exec / console): 458 / 64 ms

 2105 15:17:28.286170  Finalizing chipset.

 2106 15:17:28.289577  Finalizing SMM.

 2107 15:17:28.289689  APMC done.

 2108 15:17:28.295968  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2109 15:17:28.299376  mp_park_aps done after 0 msecs.

 2110 15:17:28.302876  Jumping to boot code at 0x30000000(0x76b25000)

 2111 15:17:28.312396  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2112 15:17:28.312500  

 2113 15:17:28.312602  

 2114 15:17:28.312703  

 2115 15:17:28.316060  Starting depthcharge on Voema...

 2116 15:17:28.316161  

 2117 15:17:28.316589  end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
 2118 15:17:28.316720  start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
 2119 15:17:28.316843  Setting prompt string to ['volteer:']
 2120 15:17:28.316951  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:40)
 2121 15:17:28.325912  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2122 15:17:28.326024  

 2123 15:17:28.332304  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2124 15:17:28.332417  

 2125 15:17:28.339001  Looking for NVMe Controller 0x3005f238 @ 00:1d:00

 2126 15:17:28.339113  

 2127 15:17:28.342351  Failed to find eMMC card reader

 2128 15:17:28.342452  

 2129 15:17:28.342551  Wipe memory regions:

 2130 15:17:28.342640  

 2131 15:17:28.348832  	[0x00000000001000, 0x000000000a0000)

 2132 15:17:28.348936  

 2133 15:17:28.352402  	[0x00000000100000, 0x00000030000000)

 2134 15:17:28.377887  

 2135 15:17:28.381358  	[0x00000032662db0, 0x000000769ef000)

 2136 15:17:28.416468  

 2137 15:17:28.419864  	[0x00000100000000, 0x00000280400000)

 2138 15:17:28.621565  

 2139 15:17:28.624920  ec_init: CrosEC protocol v3 supported (256, 256)

 2140 15:17:28.625035  

 2141 15:17:28.631625  update_port_state: port C0 state: usb enable 1 mux conn 0

 2142 15:17:28.631737  

 2143 15:17:28.638035  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2144 15:17:28.642755  

 2145 15:17:28.646104  pmc_check_ipc_sts: STS_BUSY done after 1562 us

 2146 15:17:28.646215  

 2147 15:17:28.649308  send_conn_disc_msg: pmc_send_cmd succeeded

 2148 15:17:29.081020  

 2149 15:17:29.081172  R8152: Initializing

 2150 15:17:29.081274  

 2151 15:17:29.083910  Version 6 (ocp_data = 5c30)

 2152 15:17:29.083982  

 2153 15:17:29.087655  R8152: Done initializing

 2154 15:17:29.087730  

 2155 15:17:29.090496  Adding net device

 2156 15:17:29.391861  

 2157 15:17:29.395300  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2158 15:17:29.395416  

 2159 15:17:29.395509  


 2160 15:17:29.398503  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2161 15:17:29.398589  Sending line: 'tftpboot 192.168.201.1 14866112/tftp-deploy-mif4cjv6/kernel/bzImage 14866112/tftp-deploy-mif4cjv6/kernel/cmdline 14866112/tftp-deploy-mif4cjv6/ramdisk/ramdisk.cpio.gz'
 2163 15:17:29.499041  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2164 15:17:29.499165  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2165 15:17:29.502917  volteer: tftpboot 192.168.201.1 14866112/tftp-deploy-mif4cjv6/kernel/bzIploy-mif4cjv6/kernel/cmdline 14866112/tftp-deploy-mif4cjv6/ramdisk/ramdisk.cpio.gz

 2166 15:17:29.503033  

 2167 15:17:29.503133  Waiting for link

 2168 15:17:29.705803  

 2169 15:17:29.705965  done.

 2170 15:17:29.706064  

 2171 15:17:29.706156  MAC: 00:24:32:30:7b:87

 2172 15:17:29.706247  

 2173 15:17:29.709215  Sending DHCP discover... done.

 2174 15:17:29.709326  

 2175 15:17:29.712498  Waiting for reply... done.

 2176 15:17:29.712603  

 2177 15:17:29.715909  Sending DHCP request... done.

 2178 15:17:29.716016  

 2179 15:17:29.722149  Waiting for reply... done.

 2180 15:17:29.722256  

 2181 15:17:29.722355  My ip is 192.168.201.19

 2182 15:17:29.722453  

 2183 15:17:29.725445  The DHCP server ip is 192.168.201.1

 2184 15:17:29.725545  

 2185 15:17:29.732212  TFTP server IP predefined by user: 192.168.201.1

 2186 15:17:29.732324  

 2187 15:17:29.739004  Bootfile predefined by user: 14866112/tftp-deploy-mif4cjv6/kernel/bzImage

 2188 15:17:29.739112  

 2189 15:17:29.742498  Sending tftp read request... done.

 2190 15:17:29.742589  

 2191 15:17:29.745418  Waiting for the transfer... 

 2192 15:17:29.748728  

 2193 15:17:30.308270  00000000 ################################################################

 2194 15:17:30.308440  

 2195 15:17:30.871374  00080000 ################################################################

 2196 15:17:30.871545  

 2197 15:17:31.432162  00100000 ################################################################

 2198 15:17:31.432331  

 2199 15:17:31.995389  00180000 ################################################################

 2200 15:17:31.995550  

 2201 15:17:32.560300  00200000 ################################################################

 2202 15:17:32.560472  

 2203 15:17:33.126058  00280000 ################################################################

 2204 15:17:33.126197  

 2205 15:17:33.683877  00300000 ################################################################

 2206 15:17:33.684040  

 2207 15:17:34.238810  00380000 ################################################################

 2208 15:17:34.238948  

 2209 15:17:34.778413  00400000 ################################################################

 2210 15:17:34.778578  

 2211 15:17:35.317714  00480000 ################################################################

 2212 15:17:35.317880  

 2213 15:17:35.847103  00500000 ################################################################

 2214 15:17:35.847259  

 2215 15:17:36.375697  00580000 ################################################################

 2216 15:17:36.375831  

 2217 15:17:36.910698  00600000 ################################################################

 2218 15:17:36.910861  

 2219 15:17:37.470854  00680000 ################################################################

 2220 15:17:37.471015  

 2221 15:17:38.035552  00700000 ################################################################

 2222 15:17:38.035690  

 2223 15:17:38.594281  00780000 ################################################################

 2224 15:17:38.594418  

 2225 15:17:39.149019  00800000 ################################################################

 2226 15:17:39.149155  

 2227 15:17:39.705852  00880000 ################################################################

 2228 15:17:39.705992  

 2229 15:17:40.267475  00900000 ################################################################

 2230 15:17:40.267613  

 2231 15:17:40.826643  00980000 ################################################################

 2232 15:17:40.826779  

 2233 15:17:41.375847  00a00000 ################################################################

 2234 15:17:41.375969  

 2235 15:17:41.901842  00a80000 ################################################################

 2236 15:17:41.902014  

 2237 15:17:42.424279  00b00000 ################################################################

 2238 15:17:42.424419  

 2239 15:17:42.966004  00b80000 ################################################################

 2240 15:17:42.966164  

 2241 15:17:43.507723  00c00000 ################################################################

 2242 15:17:43.507863  

 2243 15:17:44.051835  00c80000 ################################################################

 2244 15:17:44.052005  

 2245 15:17:44.585410  00d00000 ############################################################### done.

 2246 15:17:44.585598  

 2247 15:17:44.588663  The bootfile was 14143376 bytes long.

 2248 15:17:44.588806  

 2249 15:17:44.592138  Sending tftp read request... done.

 2250 15:17:44.592273  

 2251 15:17:44.595116  Waiting for the transfer... 

 2252 15:17:44.595269  

 2253 15:17:45.148173  00000000 ################################################################

 2254 15:17:45.148311  

 2255 15:17:45.698726  00080000 ################################################################

 2256 15:17:45.698886  

 2257 15:17:46.247717  00100000 ################################################################

 2258 15:17:46.247841  

 2259 15:17:46.796241  00180000 ################################################################

 2260 15:17:46.796398  

 2261 15:17:47.350543  00200000 ################################################################

 2262 15:17:47.350704  

 2263 15:17:47.908558  00280000 ################################################################

 2264 15:17:47.908679  

 2265 15:17:48.448767  00300000 ################################################################

 2266 15:17:48.448939  

 2267 15:17:48.985820  00380000 ################################################################

 2268 15:17:48.985972  

 2269 15:17:49.532268  00400000 ################################################################

 2270 15:17:49.532399  

 2271 15:17:50.080101  00480000 ################################################################

 2272 15:17:50.080229  

 2273 15:17:50.642425  00500000 ################################################################

 2274 15:17:50.642559  

 2275 15:17:51.193344  00580000 ################################################################

 2276 15:17:51.193501  

 2277 15:17:51.740906  00600000 ################################################################

 2278 15:17:51.741054  

 2279 15:17:52.030446  00680000 ################################# done.

 2280 15:17:52.030575  

 2281 15:17:52.033898  Sending tftp read request... done.

 2282 15:17:52.033988  

 2283 15:17:52.037152  Waiting for the transfer... 

 2284 15:17:52.037241  

 2285 15:17:52.037326  00000000 # done.

 2286 15:17:52.037409  

 2287 15:17:52.047214  Command line loaded dynamically from TFTP file: 14866112/tftp-deploy-mif4cjv6/kernel/cmdline

 2288 15:17:52.047306  

 2289 15:17:52.073578  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14866112/extract-nfsrootfs-pukh_m4h,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1

 2290 15:17:52.077719  

 2291 15:17:52.081109  Shutting down all USB controllers.

 2292 15:17:52.081194  

 2293 15:17:52.081260  Removing current net device

 2294 15:17:52.081321  

 2295 15:17:52.084051  Finalizing coreboot

 2296 15:17:52.084136  

 2297 15:17:52.090723  Exiting depthcharge with code 4 at timestamp: 32422885

 2298 15:17:52.090809  

 2299 15:17:52.090901  

 2300 15:17:52.090965  Starting kernel ...

 2301 15:17:52.091074  

 2302 15:17:52.091188  

 2303 15:17:52.091696  end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
 2304 15:17:52.091804  start: 2.2.5 auto-login-action (timeout 00:04:16) [common]
 2305 15:17:52.091882  Setting prompt string to ['Linux version [0-9]']
 2306 15:17:52.091952  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2307 15:17:52.092021  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2309 15:22:08.092057  end: 2.2.5 auto-login-action (duration 00:04:16) [common]
 2311 15:22:08.092396  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 256 seconds'
 2313 15:22:08.092635  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2316 15:22:08.093069  end: 2 depthcharge-action (duration 00:05:00) [common]
 2318 15:22:08.093441  Cleaning after the job
 2319 15:22:08.093587  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14866112/tftp-deploy-mif4cjv6/ramdisk
 2320 15:22:08.094595  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14866112/tftp-deploy-mif4cjv6/kernel
 2321 15:22:08.096367  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14866112/tftp-deploy-mif4cjv6/nfsrootfs
 2322 15:22:08.124974  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14866112/tftp-deploy-mif4cjv6/modules
 2323 15:22:08.125657  start: 4.1 power-off (timeout 00:00:30) [common]
 2324 15:22:08.125931  Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cp514-2h-1130g7-volteer-cbg-4', '--port=1', '--command=off']
 2325 15:22:10.201419  >> Command sent successfully.
 2326 15:22:10.205082  Returned 0 in 2 seconds
 2327 15:22:10.205226  end: 4.1 power-off (duration 00:00:02) [common]
 2329 15:22:10.205431  start: 4.2 read-feedback (timeout 00:04:58) [common]
 2330 15:22:10.205574  Listened to connection for namespace 'common' for up to 1s
 2332 15:22:10.205923  Listened to connection for namespace 'common' for up to 1s
 2333 15:22:11.206598  Finalising connection for namespace 'common'
 2334 15:22:11.206813  Disconnecting from shell: Finalise
 2335 15:22:11.206947  
 2336 15:22:11.307295  end: 4.2 read-feedback (duration 00:00:01) [common]
 2337 15:22:11.307526  Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14866112
 2338 15:22:11.510580  Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14866112
 2339 15:22:11.510759  JobError: Your job cannot terminate cleanly.