Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 11:40:23.812352 lava-dispatcher, installed at version: 2023.01
2 11:40:23.812557 start: 0 validate
3 11:40:23.812685 Start time: 2023-04-03 11:40:23.812678+00:00 (UTC)
4 11:40:23.812799 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:40:23.812925 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230324.0%2Fx86%2Frootfs.cpio.gz exists
6 11:40:24.119438 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:40:24.120243 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1098-g8d34bf42efd9b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:40:28.138287 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:40:28.139102 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1098-g8d34bf42efd9b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 11:40:29.150236 validate duration: 5.34
12 11:40:29.150518 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:40:29.150613 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:40:29.150697 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:40:29.150796 Not decompressing ramdisk as can be used compressed.
16 11:40:29.150874 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230324.0/x86/rootfs.cpio.gz
17 11:40:29.150935 saving as /var/lib/lava/dispatcher/tmp/9849717/tftp-deploy-loe02mlv/ramdisk/rootfs.cpio.gz
18 11:40:29.150993 total size: 8429597 (8MB)
19 11:40:29.152086 progress 0% (0MB)
20 11:40:29.154249 progress 5% (0MB)
21 11:40:29.156336 progress 10% (0MB)
22 11:40:29.158473 progress 15% (1MB)
23 11:40:29.160550 progress 20% (1MB)
24 11:40:29.162663 progress 25% (2MB)
25 11:40:29.164786 progress 30% (2MB)
26 11:40:29.166910 progress 35% (2MB)
27 11:40:29.168832 progress 40% (3MB)
28 11:40:29.170974 progress 45% (3MB)
29 11:40:29.173091 progress 50% (4MB)
30 11:40:29.175212 progress 55% (4MB)
31 11:40:29.177258 progress 60% (4MB)
32 11:40:29.179336 progress 65% (5MB)
33 11:40:29.181394 progress 70% (5MB)
34 11:40:29.183389 progress 75% (6MB)
35 11:40:29.185561 progress 80% (6MB)
36 11:40:29.187612 progress 85% (6MB)
37 11:40:29.189693 progress 90% (7MB)
38 11:40:29.191771 progress 95% (7MB)
39 11:40:29.193866 progress 100% (8MB)
40 11:40:29.193997 8MB downloaded in 0.04s (186.96MB/s)
41 11:40:29.194138 end: 1.1.1 http-download (duration 00:00:00) [common]
43 11:40:29.194376 end: 1.1 download-retry (duration 00:00:00) [common]
44 11:40:29.194460 start: 1.2 download-retry (timeout 00:10:00) [common]
45 11:40:29.194540 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 11:40:29.194643 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1098-g8d34bf42efd9b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 11:40:29.194709 saving as /var/lib/lava/dispatcher/tmp/9849717/tftp-deploy-loe02mlv/kernel/bzImage
48 11:40:29.194765 total size: 7880592 (7MB)
49 11:40:29.194821 No compression specified
50 11:40:29.195922 progress 0% (0MB)
51 11:40:29.197904 progress 5% (0MB)
52 11:40:29.199826 progress 10% (0MB)
53 11:40:29.201780 progress 15% (1MB)
54 11:40:29.203695 progress 20% (1MB)
55 11:40:29.205634 progress 25% (1MB)
56 11:40:29.207576 progress 30% (2MB)
57 11:40:29.209521 progress 35% (2MB)
58 11:40:29.211489 progress 40% (3MB)
59 11:40:29.213553 progress 45% (3MB)
60 11:40:29.215515 progress 50% (3MB)
61 11:40:29.217409 progress 55% (4MB)
62 11:40:29.219373 progress 60% (4MB)
63 11:40:29.221306 progress 65% (4MB)
64 11:40:29.223279 progress 70% (5MB)
65 11:40:29.225223 progress 75% (5MB)
66 11:40:29.227181 progress 80% (6MB)
67 11:40:29.229087 progress 85% (6MB)
68 11:40:29.231044 progress 90% (6MB)
69 11:40:29.232970 progress 95% (7MB)
70 11:40:29.234989 progress 100% (7MB)
71 11:40:29.235154 7MB downloaded in 0.04s (186.10MB/s)
72 11:40:29.235294 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:40:29.235520 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:40:29.235609 start: 1.3 download-retry (timeout 00:10:00) [common]
76 11:40:29.235691 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 11:40:29.235798 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1098-g8d34bf42efd9b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 11:40:29.235863 saving as /var/lib/lava/dispatcher/tmp/9849717/tftp-deploy-loe02mlv/modules/modules.tar
79 11:40:29.235924 total size: 251104 (0MB)
80 11:40:29.235983 Using unxz to decompress xz
81 11:40:29.239753 progress 13% (0MB)
82 11:40:29.240175 progress 26% (0MB)
83 11:40:29.240411 progress 39% (0MB)
84 11:40:29.241745 progress 52% (0MB)
85 11:40:29.243735 progress 65% (0MB)
86 11:40:29.245535 progress 78% (0MB)
87 11:40:29.247393 progress 91% (0MB)
88 11:40:29.249253 progress 100% (0MB)
89 11:40:29.254627 0MB downloaded in 0.02s (12.81MB/s)
90 11:40:29.254898 end: 1.3.1 http-download (duration 00:00:00) [common]
92 11:40:29.255159 end: 1.3 download-retry (duration 00:00:00) [common]
93 11:40:29.255256 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 11:40:29.255352 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 11:40:29.255438 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 11:40:29.255525 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 11:40:29.255711 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv
98 11:40:29.255830 makedir: /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin
99 11:40:29.255933 makedir: /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/tests
100 11:40:29.256012 makedir: /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/results
101 11:40:29.256122 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-add-keys
102 11:40:29.256266 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-add-sources
103 11:40:29.256393 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-background-process-start
104 11:40:29.256529 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-background-process-stop
105 11:40:29.256652 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-common-functions
106 11:40:29.256781 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-echo-ipv4
107 11:40:29.256894 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-install-packages
108 11:40:29.257014 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-installed-packages
109 11:40:29.257124 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-os-build
110 11:40:29.257258 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-probe-channel
111 11:40:29.257367 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-probe-ip
112 11:40:29.257497 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-target-ip
113 11:40:29.257621 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-target-mac
114 11:40:29.257743 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-target-storage
115 11:40:29.257854 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-test-case
116 11:40:29.257964 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-test-event
117 11:40:29.258072 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-test-feedback
118 11:40:29.258179 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-test-raise
119 11:40:29.258290 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-test-reference
120 11:40:29.258401 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-test-runner
121 11:40:29.258518 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-test-set
122 11:40:29.258632 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-test-shell
123 11:40:29.258744 Updating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-install-packages (oe)
124 11:40:29.258856 Updating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/bin/lava-installed-packages (oe)
125 11:40:29.258953 Creating /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/environment
126 11:40:29.259044 LAVA metadata
127 11:40:29.259117 - LAVA_JOB_ID=9849717
128 11:40:29.259181 - LAVA_DISPATCHER_IP=192.168.201.1
129 11:40:29.259285 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 11:40:29.259352 skipped lava-vland-overlay
131 11:40:29.259431 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 11:40:29.259513 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 11:40:29.259576 skipped lava-multinode-overlay
134 11:40:29.259648 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 11:40:29.259728 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 11:40:29.259804 Loading test definitions
137 11:40:29.259901 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 11:40:29.260007 Using /lava-9849717 at stage 0
139 11:40:29.260271 uuid=9849717_1.4.2.3.1 testdef=None
140 11:40:29.260359 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 11:40:29.260442 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 11:40:29.260959 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 11:40:29.261180 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 11:40:29.261768 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 11:40:29.261996 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 11:40:29.262536 runner path: /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/0/tests/0_dmesg test_uuid 9849717_1.4.2.3.1
149 11:40:29.262676 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 11:40:29.262897 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 11:40:29.262968 Using /lava-9849717 at stage 1
153 11:40:29.263201 uuid=9849717_1.4.2.3.5 testdef=None
154 11:40:29.263286 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 11:40:29.263369 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 11:40:29.263787 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 11:40:29.263999 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 11:40:29.264533 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 11:40:29.264754 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 11:40:29.265275 runner path: /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/1/tests/1_bootrr test_uuid 9849717_1.4.2.3.5
163 11:40:29.265409 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 11:40:29.265651 Creating lava-test-runner.conf files
166 11:40:29.265714 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/0 for stage 0
167 11:40:29.265794 - 0_dmesg
168 11:40:29.265868 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9849717/lava-overlay-417zzecv/lava-9849717/1 for stage 1
169 11:40:29.265946 - 1_bootrr
170 11:40:29.266033 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 11:40:29.266114 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 11:40:29.274399 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 11:40:29.274544 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 11:40:29.274662 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 11:40:29.274826 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 11:40:29.274976 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 11:40:29.489151 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 11:40:29.489628 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 11:40:29.489800 extracting modules file /var/lib/lava/dispatcher/tmp/9849717/tftp-deploy-loe02mlv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9849717/extract-overlay-ramdisk-bvehx8b6/ramdisk
180 11:40:29.500611 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 11:40:29.500811 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 11:40:29.500950 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9849717/compress-overlay-19dp0xrz/overlay-1.4.2.4.tar.gz to ramdisk
183 11:40:29.501059 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9849717/compress-overlay-19dp0xrz/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9849717/extract-overlay-ramdisk-bvehx8b6/ramdisk
184 11:40:29.509866 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 11:40:29.510047 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 11:40:29.510186 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 11:40:29.510324 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 11:40:29.510443 Building ramdisk /var/lib/lava/dispatcher/tmp/9849717/extract-overlay-ramdisk-bvehx8b6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9849717/extract-overlay-ramdisk-bvehx8b6/ramdisk
189 11:40:29.602744 >> 49788 blocks
190 11:40:30.462232 rename /var/lib/lava/dispatcher/tmp/9849717/extract-overlay-ramdisk-bvehx8b6/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9849717/tftp-deploy-loe02mlv/ramdisk/ramdisk.cpio.gz
191 11:40:30.462669 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 11:40:30.462796 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 11:40:30.462918 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 11:40:30.463052 No mkimage arch provided, not using FIT.
195 11:40:30.463160 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 11:40:30.463248 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 11:40:30.463373 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 11:40:30.463483 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 11:40:30.463569 No LXC device requested
200 11:40:30.463652 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 11:40:30.463740 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 11:40:30.463858 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 11:40:30.463932 Checking files for TFTP limit of 4294967296 bytes.
204 11:40:30.464377 end: 1 tftp-deploy (duration 00:00:01) [common]
205 11:40:30.464478 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 11:40:30.464569 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 11:40:30.464706 substitutions:
208 11:40:30.464774 - {DTB}: None
209 11:40:30.464838 - {INITRD}: 9849717/tftp-deploy-loe02mlv/ramdisk/ramdisk.cpio.gz
210 11:40:30.464913 - {KERNEL}: 9849717/tftp-deploy-loe02mlv/kernel/bzImage
211 11:40:30.464972 - {LAVA_MAC}: None
212 11:40:30.465028 - {PRESEED_CONFIG}: None
213 11:40:30.465085 - {PRESEED_LOCAL}: None
214 11:40:30.465157 - {RAMDISK}: 9849717/tftp-deploy-loe02mlv/ramdisk/ramdisk.cpio.gz
215 11:40:30.465228 - {ROOT_PART}: None
216 11:40:30.465283 - {ROOT}: None
217 11:40:30.465339 - {SERVER_IP}: 192.168.201.1
218 11:40:30.465393 - {TEE}: None
219 11:40:30.465448 Parsed boot commands:
220 11:40:30.465543 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 11:40:30.465737 Parsed boot commands: tftpboot 192.168.201.1 9849717/tftp-deploy-loe02mlv/kernel/bzImage 9849717/tftp-deploy-loe02mlv/kernel/cmdline 9849717/tftp-deploy-loe02mlv/ramdisk/ramdisk.cpio.gz
222 11:40:30.465825 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 11:40:30.465908 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 11:40:30.466001 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 11:40:30.466118 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 11:40:30.466188 Not connected, no need to disconnect.
227 11:40:30.466265 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 11:40:30.466344 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 11:40:30.466411 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-10'
230 11:40:30.470002 Setting prompt string to ['lava-test: # ']
231 11:40:30.470400 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 11:40:30.470545 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 11:40:30.470647 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 11:40:30.470741 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 11:40:30.471152 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
236 11:40:35.606814 >> Command sent successfully.
237 11:40:35.609235 Returned 0 in 5 seconds
238 11:40:35.710059 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 11:40:35.710517 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 11:40:35.710662 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 11:40:35.710793 Setting prompt string to 'Starting depthcharge on Voema...'
243 11:40:35.710893 Changing prompt to 'Starting depthcharge on Voema...'
244 11:40:35.710998 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 11:40:35.711359 [Enter `^Ec?' for help]
246 11:40:37.403056
247 11:40:37.403220
248 11:40:37.412764 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 11:40:37.419199 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
250 11:40:37.422750 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 11:40:37.425784 CPU: AES supported, TXT NOT supported, VT supported
252 11:40:37.432400 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 11:40:37.439009 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 11:40:37.442861 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 11:40:37.445798 VBOOT: Loading verstage.
256 11:40:37.452725 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 11:40:37.456564 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 11:40:37.459750 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 11:40:37.469983 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 11:40:37.476634 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 11:40:37.476726
262 11:40:37.476812
263 11:40:37.489730 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 11:40:37.503384 Probing TPM: . done!
265 11:40:37.506606 TPM ready after 0 ms
266 11:40:37.509950 Connected to device vid:did:rid of 1ae0:0028:00
267 11:40:37.521310 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
268 11:40:37.528186 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 11:40:37.531198 Initialized TPM device CR50 revision 0
270 11:40:37.631436 tlcl_send_startup: Startup return code is 0
271 11:40:37.631588 TPM: setup succeeded
272 11:40:37.646768 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 11:40:37.660563 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 11:40:37.673654 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 11:40:37.683424 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 11:40:37.687163 Chrome EC: UHEPI supported
277 11:40:37.690580 Phase 1
278 11:40:37.693625 FMAP: area GBB found @ 1805000 (458752 bytes)
279 11:40:37.703482 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 11:40:37.710402 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 11:40:37.716772 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 11:40:37.723741 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 11:40:37.726767 Recovery requested (1009000e)
284 11:40:37.730304 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 11:40:37.741654 tlcl_extend: response is 0
286 11:40:37.748314 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 11:40:37.758422 tlcl_extend: response is 0
288 11:40:37.764734 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 11:40:37.771499 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 11:40:37.778175 BS: verstage times (exec / console): total (unknown) / 142 ms
291 11:40:37.778261
292 11:40:37.778328
293 11:40:37.791080 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 11:40:37.797909 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 11:40:37.801159 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 11:40:37.804432 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 11:40:37.811517 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 11:40:37.814462 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 11:40:37.817610 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 11:40:37.821201 TCO_STS: 0000 0000
301 11:40:37.824769 GEN_PMCON: d0015038 00002200
302 11:40:37.828288 GBLRST_CAUSE: 00000000 00000000
303 11:40:37.828374 HPR_CAUSE0: 00000000
304 11:40:37.831702 prev_sleep_state 5
305 11:40:37.834960 Boot Count incremented to 15799
306 11:40:37.841680 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 11:40:37.848141 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 11:40:37.854995 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 11:40:37.861442 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 11:40:37.865791 Chrome EC: UHEPI supported
311 11:40:37.872427 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 11:40:37.885056 Probing TPM: done!
313 11:40:37.891888 Connected to device vid:did:rid of 1ae0:0028:00
314 11:40:37.901781 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
315 11:40:37.905409 Initialized TPM device CR50 revision 0
316 11:40:37.919949 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 11:40:37.926817 MRC: Hash idx 0x100b comparison successful.
318 11:40:37.930306 MRC cache found, size faa8
319 11:40:37.930390 bootmode is set to: 2
320 11:40:37.933104 SPD index = 2
321 11:40:37.940052 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 11:40:37.943124 SPD: module type is LPDDR4X
323 11:40:37.946762 SPD: module part number is MT53D1G64D4NW-046
324 11:40:37.953354 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
325 11:40:37.956332 SPD: device width 16 bits, bus width 16 bits
326 11:40:37.962962 SPD: module size is 2048 MB (per channel)
327 11:40:38.393050 CBMEM:
328 11:40:38.396167 IMD: root @ 0x76fff000 254 entries.
329 11:40:38.400188 IMD: root @ 0x76ffec00 62 entries.
330 11:40:38.403148 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 11:40:38.406927 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 11:40:38.412663 External stage cache:
333 11:40:38.416085 IMD: root @ 0x7b3ff000 254 entries.
334 11:40:38.419158 IMD: root @ 0x7b3fec00 62 entries.
335 11:40:38.434543 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 11:40:38.441208 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 11:40:38.447672 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 11:40:38.461269 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 11:40:38.467986 cse_lite: Skip switching to RW in the recovery path
340 11:40:38.468074 8 DIMMs found
341 11:40:38.468161 SMM Memory Map
342 11:40:38.471328 SMRAM : 0x7b000000 0x800000
343 11:40:38.477904 Subregion 0: 0x7b000000 0x200000
344 11:40:38.481404 Subregion 1: 0x7b200000 0x200000
345 11:40:38.484478 Subregion 2: 0x7b400000 0x400000
346 11:40:38.484564 top_of_ram = 0x77000000
347 11:40:38.491444 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 11:40:38.497837 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 11:40:38.501012 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 11:40:38.508012 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 11:40:38.514356 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 11:40:38.520843 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 11:40:38.531122 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 11:40:38.537663 Processing 211 relocs. Offset value of 0x74c0b000
355 11:40:38.544220 BS: romstage times (exec / console): total (unknown) / 277 ms
356 11:40:38.549849
357 11:40:38.549933
358 11:40:38.559674 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 11:40:38.562914 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 11:40:38.573131 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 11:40:38.579494 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 11:40:38.586227 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 11:40:38.592527 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 11:40:38.636626 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 11:40:38.643381 Processing 5008 relocs. Offset value of 0x75d98000
366 11:40:38.646421 BS: postcar times (exec / console): total (unknown) / 59 ms
367 11:40:38.649822
368 11:40:38.649910
369 11:40:38.659674 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 11:40:38.659794 Normal boot
371 11:40:38.662952 FW_CONFIG value is 0x804c02
372 11:40:38.666587 PCI: 00:07.0 disabled by fw_config
373 11:40:38.669592 PCI: 00:07.1 disabled by fw_config
374 11:40:38.673293 PCI: 00:0d.2 disabled by fw_config
375 11:40:38.679491 PCI: 00:1c.7 disabled by fw_config
376 11:40:38.682863 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 11:40:38.689739 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 11:40:38.693116 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 11:40:38.699429 GENERIC: 0.0 disabled by fw_config
380 11:40:38.702959 GENERIC: 1.0 disabled by fw_config
381 11:40:38.705877 fw_config match found: DB_USB=USB3_ACTIVE
382 11:40:38.709108 fw_config match found: DB_USB=USB3_ACTIVE
383 11:40:38.712732 fw_config match found: DB_USB=USB3_ACTIVE
384 11:40:38.719179 fw_config match found: DB_USB=USB3_ACTIVE
385 11:40:38.722735 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 11:40:38.732424 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 11:40:38.738960 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 11:40:38.745550 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 11:40:38.752923 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 11:40:38.756085 microcode: Update skipped, already up-to-date
391 11:40:38.762015 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 11:40:38.790672 Detected 4 core, 8 thread CPU.
393 11:40:38.793623 Setting up SMI for CPU
394 11:40:38.796815 IED base = 0x7b400000
395 11:40:38.796923 IED size = 0x00400000
396 11:40:38.800071 Will perform SMM setup.
397 11:40:38.806665 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
398 11:40:38.813069 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 11:40:38.819671 Processing 16 relocs. Offset value of 0x00030000
400 11:40:38.822907 Attempting to start 7 APs
401 11:40:38.826310 Waiting for 10ms after sending INIT.
402 11:40:38.842023 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 11:40:38.845462 AP: slot 6 apic_id 3.
404 11:40:38.848976 AP: slot 3 apic_id 2.
405 11:40:38.849067 AP: slot 7 apic_id 5.
406 11:40:38.852017 AP: slot 4 apic_id 4.
407 11:40:38.852098 done.
408 11:40:38.855543 AP: slot 2 apic_id 7.
409 11:40:38.855644 AP: slot 5 apic_id 6.
410 11:40:38.862073 Waiting for 2nd SIPI to complete...done.
411 11:40:38.868668 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 11:40:38.875300 Processing 13 relocs. Offset value of 0x00038000
413 11:40:38.875422 Unable to locate Global NVS
414 11:40:38.885341 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 11:40:38.888530 Installing permanent SMM handler to 0x7b000000
416 11:40:38.898385 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 11:40:38.901962 Processing 794 relocs. Offset value of 0x7b010000
418 11:40:38.911728 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 11:40:38.914891 Processing 13 relocs. Offset value of 0x7b008000
420 11:40:38.921736 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 11:40:38.928346 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 11:40:38.931851 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 11:40:38.938300 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 11:40:38.944886 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 11:40:38.951247 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 11:40:38.957991 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 11:40:38.961069 Unable to locate Global NVS
428 11:40:38.967953 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 11:40:38.971285 Clearing SMI status registers
430 11:40:38.971367 SMI_STS: PM1
431 11:40:38.974286 PM1_STS: PWRBTN
432 11:40:38.980754 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 11:40:38.984587 In relocation handler: CPU 0
434 11:40:38.987829 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 11:40:38.994216 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 11:40:38.997691 Relocation complete.
437 11:40:39.003931 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 11:40:39.007195 In relocation handler: CPU 1
439 11:40:39.010971 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 11:40:39.011062 Relocation complete.
441 11:40:39.020686 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
442 11:40:39.024442 In relocation handler: CPU 5
443 11:40:39.027491 New SMBASE=0x7affec00 IEDBASE=0x7b400000
444 11:40:39.030592 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 11:40:39.033815 Relocation complete.
446 11:40:39.040150 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
447 11:40:39.043627 In relocation handler: CPU 2
448 11:40:39.046904 New SMBASE=0x7afff800 IEDBASE=0x7b400000
449 11:40:39.050525 Relocation complete.
450 11:40:39.056980 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
451 11:40:39.060296 In relocation handler: CPU 6
452 11:40:39.063690 New SMBASE=0x7affe800 IEDBASE=0x7b400000
453 11:40:39.067426 Relocation complete.
454 11:40:39.074089 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
455 11:40:39.078020 In relocation handler: CPU 3
456 11:40:39.081598 New SMBASE=0x7afff400 IEDBASE=0x7b400000
457 11:40:39.084489 Writing SMRR. base = 0x7b000006, mask=0xff800c00
458 11:40:39.087638 Relocation complete.
459 11:40:39.094493 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
460 11:40:39.097758 In relocation handler: CPU 4
461 11:40:39.101044 New SMBASE=0x7afff000 IEDBASE=0x7b400000
462 11:40:39.107717 Writing SMRR. base = 0x7b000006, mask=0xff800c00
463 11:40:39.107858 Relocation complete.
464 11:40:39.117617 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
465 11:40:39.121408 In relocation handler: CPU 7
466 11:40:39.124313 New SMBASE=0x7affe400 IEDBASE=0x7b400000
467 11:40:39.124421 Relocation complete.
468 11:40:39.127666 Initializing CPU #0
469 11:40:39.131011 CPU: vendor Intel device 806c1
470 11:40:39.134382 CPU: family 06, model 8c, stepping 01
471 11:40:39.137604 Clearing out pending MCEs
472 11:40:39.140746 Setting up local APIC...
473 11:40:39.140830 apic_id: 0x00 done.
474 11:40:39.144273 Turbo is available but hidden
475 11:40:39.147417 Turbo is available and visible
476 11:40:39.154113 microcode: Update skipped, already up-to-date
477 11:40:39.154199 CPU #0 initialized
478 11:40:39.157577 Initializing CPU #7
479 11:40:39.160596 Initializing CPU #4
480 11:40:39.164216 CPU: vendor Intel device 806c1
481 11:40:39.167575 CPU: family 06, model 8c, stepping 01
482 11:40:39.170575 CPU: vendor Intel device 806c1
483 11:40:39.173750 CPU: family 06, model 8c, stepping 01
484 11:40:39.177335 Clearing out pending MCEs
485 11:40:39.177418 Initializing CPU #2
486 11:40:39.180437 Initializing CPU #5
487 11:40:39.183694 CPU: vendor Intel device 806c1
488 11:40:39.187272 CPU: family 06, model 8c, stepping 01
489 11:40:39.190185 CPU: vendor Intel device 806c1
490 11:40:39.193724 CPU: family 06, model 8c, stepping 01
491 11:40:39.196707 Clearing out pending MCEs
492 11:40:39.200282 Clearing out pending MCEs
493 11:40:39.200438 Setting up local APIC...
494 11:40:39.203248 Clearing out pending MCEs
495 11:40:39.206726 Setting up local APIC...
496 11:40:39.210132 Setting up local APIC...
497 11:40:39.210255 Initializing CPU #6
498 11:40:39.213491 Initializing CPU #3
499 11:40:39.216809 CPU: vendor Intel device 806c1
500 11:40:39.220088 CPU: family 06, model 8c, stepping 01
501 11:40:39.223606 CPU: vendor Intel device 806c1
502 11:40:39.226630 CPU: family 06, model 8c, stepping 01
503 11:40:39.230275 Clearing out pending MCEs
504 11:40:39.233282 apic_id: 0x05 done.
505 11:40:39.233389 Setting up local APIC...
506 11:40:39.239895 microcode: Update skipped, already up-to-date
507 11:40:39.243152 Setting up local APIC...
508 11:40:39.243236 apic_id: 0x03 done.
509 11:40:39.246385 Clearing out pending MCEs
510 11:40:39.252939 microcode: Update skipped, already up-to-date
511 11:40:39.253024 Setting up local APIC...
512 11:40:39.256353 CPU #6 initialized
513 11:40:39.259769 apic_id: 0x02 done.
514 11:40:39.259853 apic_id: 0x07 done.
515 11:40:39.263118 apic_id: 0x06 done.
516 11:40:39.266357 microcode: Update skipped, already up-to-date
517 11:40:39.272383 microcode: Update skipped, already up-to-date
518 11:40:39.272466 CPU #2 initialized
519 11:40:39.276082 CPU #5 initialized
520 11:40:39.276175 Initializing CPU #1
521 11:40:39.279367 apic_id: 0x04 done.
522 11:40:39.283170 CPU #7 initialized
523 11:40:39.286416 microcode: Update skipped, already up-to-date
524 11:40:39.289139 microcode: Update skipped, already up-to-date
525 11:40:39.292948 CPU: vendor Intel device 806c1
526 11:40:39.299447 CPU: family 06, model 8c, stepping 01
527 11:40:39.299605 Clearing out pending MCEs
528 11:40:39.302286 CPU #4 initialized
529 11:40:39.305452 Setting up local APIC...
530 11:40:39.305573 CPU #3 initialized
531 11:40:39.309325 apic_id: 0x01 done.
532 11:40:39.312507 microcode: Update skipped, already up-to-date
533 11:40:39.315695 CPU #1 initialized
534 11:40:39.319281 bsp_do_flight_plan done after 454 msecs.
535 11:40:39.322514 CPU: frequency set to 4400 MHz
536 11:40:39.325916 Enabling SMIs.
537 11:40:39.332077 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 11:40:39.347093 SATAXPCIE1 indicates PCIe NVMe is present
539 11:40:39.350132 Probing TPM: done!
540 11:40:39.353648 Connected to device vid:did:rid of 1ae0:0028:00
541 11:40:39.364276 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
542 11:40:39.367829 Initialized TPM device CR50 revision 0
543 11:40:39.370776 Enabling S0i3.4
544 11:40:39.377507 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 11:40:39.381251 Found a VBT of 8704 bytes after decompression
546 11:40:39.387948 cse_lite: CSE RO boot. HybridStorageMode disabled
547 11:40:39.394363 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 11:40:39.469353 FSPS returned 0
549 11:40:39.472110 Executing Phase 1 of FspMultiPhaseSiInit
550 11:40:39.482604 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 11:40:39.485565 port C0 DISC req: usage 1 usb3 1 usb2 5
552 11:40:39.489185 Raw Buffer output 0 00000511
553 11:40:39.492163 Raw Buffer output 1 00000000
554 11:40:39.495872 pmc_send_ipc_cmd succeeded
555 11:40:39.502432 port C1 DISC req: usage 1 usb3 2 usb2 3
556 11:40:39.502854 Raw Buffer output 0 00000321
557 11:40:39.505646 Raw Buffer output 1 00000000
558 11:40:39.510073 pmc_send_ipc_cmd succeeded
559 11:40:39.515355 Detected 4 core, 8 thread CPU.
560 11:40:39.518663 Detected 4 core, 8 thread CPU.
561 11:40:39.718387 Display FSP Version Info HOB
562 11:40:39.722029 Reference Code - CPU = a.0.4c.31
563 11:40:39.725240 uCode Version = 0.0.0.86
564 11:40:39.728413 TXT ACM version = ff.ff.ff.ffff
565 11:40:39.731895 Reference Code - ME = a.0.4c.31
566 11:40:39.735266 MEBx version = 0.0.0.0
567 11:40:39.738178 ME Firmware Version = Consumer SKU
568 11:40:39.741496 Reference Code - PCH = a.0.4c.31
569 11:40:39.745107 PCH-CRID Status = Disabled
570 11:40:39.748516 PCH-CRID Original Value = ff.ff.ff.ffff
571 11:40:39.751336 PCH-CRID New Value = ff.ff.ff.ffff
572 11:40:39.755183 OPROM - RST - RAID = ff.ff.ff.ffff
573 11:40:39.758002 PCH Hsio Version = 4.0.0.0
574 11:40:39.761395 Reference Code - SA - System Agent = a.0.4c.31
575 11:40:39.764933 Reference Code - MRC = 2.0.0.1
576 11:40:39.767912 SA - PCIe Version = a.0.4c.31
577 11:40:39.771167 SA-CRID Status = Disabled
578 11:40:39.774648 SA-CRID Original Value = 0.0.0.1
579 11:40:39.777799 SA-CRID New Value = 0.0.0.1
580 11:40:39.780981 OPROM - VBIOS = ff.ff.ff.ffff
581 11:40:39.784871 IO Manageability Engine FW Version = 11.1.4.0
582 11:40:39.787860 PHY Build Version = 0.0.0.e0
583 11:40:39.790903 Thunderbolt(TM) FW Version = 0.0.0.0
584 11:40:39.797605 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 11:40:39.801171 ITSS IRQ Polarities Before:
586 11:40:39.801764 IPC0: 0xffffffff
587 11:40:39.804355 IPC1: 0xffffffff
588 11:40:39.804816 IPC2: 0xffffffff
589 11:40:39.808079 IPC3: 0xffffffff
590 11:40:39.810810 ITSS IRQ Polarities After:
591 11:40:39.811250 IPC0: 0xffffffff
592 11:40:39.814226 IPC1: 0xffffffff
593 11:40:39.814666 IPC2: 0xffffffff
594 11:40:39.817634 IPC3: 0xffffffff
595 11:40:39.820905 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 11:40:39.834003 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 11:40:39.844282 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 11:40:39.857122 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 11:40:39.863638 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
600 11:40:39.867547 Enumerating buses...
601 11:40:39.870279 Show all devs... Before device enumeration.
602 11:40:39.873580 Root Device: enabled 1
603 11:40:39.874008 DOMAIN: 0000: enabled 1
604 11:40:39.877015 CPU_CLUSTER: 0: enabled 1
605 11:40:39.880299 PCI: 00:00.0: enabled 1
606 11:40:39.883686 PCI: 00:02.0: enabled 1
607 11:40:39.884116 PCI: 00:04.0: enabled 1
608 11:40:39.887019 PCI: 00:05.0: enabled 1
609 11:40:39.890435 PCI: 00:06.0: enabled 0
610 11:40:39.893459 PCI: 00:07.0: enabled 0
611 11:40:39.894019 PCI: 00:07.1: enabled 0
612 11:40:39.896927 PCI: 00:07.2: enabled 0
613 11:40:39.900239 PCI: 00:07.3: enabled 0
614 11:40:39.903524 PCI: 00:08.0: enabled 1
615 11:40:39.903956 PCI: 00:09.0: enabled 0
616 11:40:39.907145 PCI: 00:0a.0: enabled 0
617 11:40:39.910258 PCI: 00:0d.0: enabled 1
618 11:40:39.913729 PCI: 00:0d.1: enabled 0
619 11:40:39.914158 PCI: 00:0d.2: enabled 0
620 11:40:39.916881 PCI: 00:0d.3: enabled 0
621 11:40:39.920043 PCI: 00:0e.0: enabled 0
622 11:40:39.920351 PCI: 00:10.2: enabled 1
623 11:40:39.923392 PCI: 00:10.6: enabled 0
624 11:40:39.926730 PCI: 00:10.7: enabled 0
625 11:40:39.929983 PCI: 00:12.0: enabled 0
626 11:40:39.930181 PCI: 00:12.6: enabled 0
627 11:40:39.933284 PCI: 00:13.0: enabled 0
628 11:40:39.936655 PCI: 00:14.0: enabled 1
629 11:40:39.939574 PCI: 00:14.1: enabled 0
630 11:40:39.939683 PCI: 00:14.2: enabled 1
631 11:40:39.943160 PCI: 00:14.3: enabled 1
632 11:40:39.946373 PCI: 00:15.0: enabled 1
633 11:40:39.949847 PCI: 00:15.1: enabled 1
634 11:40:39.949950 PCI: 00:15.2: enabled 1
635 11:40:39.953347 PCI: 00:15.3: enabled 1
636 11:40:39.956565 PCI: 00:16.0: enabled 1
637 11:40:39.959564 PCI: 00:16.1: enabled 0
638 11:40:39.959645 PCI: 00:16.2: enabled 0
639 11:40:39.963056 PCI: 00:16.3: enabled 0
640 11:40:39.966210 PCI: 00:16.4: enabled 0
641 11:40:39.969326 PCI: 00:16.5: enabled 0
642 11:40:39.969427 PCI: 00:17.0: enabled 1
643 11:40:39.972781 PCI: 00:19.0: enabled 0
644 11:40:39.976086 PCI: 00:19.1: enabled 1
645 11:40:39.976198 PCI: 00:19.2: enabled 0
646 11:40:39.979383 PCI: 00:1c.0: enabled 1
647 11:40:39.982671 PCI: 00:1c.1: enabled 0
648 11:40:39.985798 PCI: 00:1c.2: enabled 0
649 11:40:39.985876 PCI: 00:1c.3: enabled 0
650 11:40:39.989063 PCI: 00:1c.4: enabled 0
651 11:40:39.992417 PCI: 00:1c.5: enabled 0
652 11:40:39.995941 PCI: 00:1c.6: enabled 1
653 11:40:39.996084 PCI: 00:1c.7: enabled 0
654 11:40:39.999072 PCI: 00:1d.0: enabled 1
655 11:40:40.002362 PCI: 00:1d.1: enabled 0
656 11:40:40.005689 PCI: 00:1d.2: enabled 1
657 11:40:40.005772 PCI: 00:1d.3: enabled 0
658 11:40:40.009063 PCI: 00:1e.0: enabled 1
659 11:40:40.012159 PCI: 00:1e.1: enabled 0
660 11:40:40.015644 PCI: 00:1e.2: enabled 1
661 11:40:40.015727 PCI: 00:1e.3: enabled 1
662 11:40:40.018721 PCI: 00:1f.0: enabled 1
663 11:40:40.022024 PCI: 00:1f.1: enabled 0
664 11:40:40.025452 PCI: 00:1f.2: enabled 1
665 11:40:40.025574 PCI: 00:1f.3: enabled 1
666 11:40:40.028582 PCI: 00:1f.4: enabled 0
667 11:40:40.032060 PCI: 00:1f.5: enabled 1
668 11:40:40.032175 PCI: 00:1f.6: enabled 0
669 11:40:40.035351 PCI: 00:1f.7: enabled 0
670 11:40:40.038836 APIC: 00: enabled 1
671 11:40:40.042182 GENERIC: 0.0: enabled 1
672 11:40:40.042288 GENERIC: 0.0: enabled 1
673 11:40:40.045182 GENERIC: 1.0: enabled 1
674 11:40:40.048462 GENERIC: 0.0: enabled 1
675 11:40:40.051996 GENERIC: 1.0: enabled 1
676 11:40:40.052078 USB0 port 0: enabled 1
677 11:40:40.055745 GENERIC: 0.0: enabled 1
678 11:40:40.058467 USB0 port 0: enabled 1
679 11:40:40.058573 GENERIC: 0.0: enabled 1
680 11:40:40.061939 I2C: 00:1a: enabled 1
681 11:40:40.065244 I2C: 00:31: enabled 1
682 11:40:40.065359 I2C: 00:32: enabled 1
683 11:40:40.068520 I2C: 00:10: enabled 1
684 11:40:40.071881 I2C: 00:15: enabled 1
685 11:40:40.074995 GENERIC: 0.0: enabled 0
686 11:40:40.075091 GENERIC: 1.0: enabled 0
687 11:40:40.078695 GENERIC: 0.0: enabled 1
688 11:40:40.081724 SPI: 00: enabled 1
689 11:40:40.081807 SPI: 00: enabled 1
690 11:40:40.084972 PNP: 0c09.0: enabled 1
691 11:40:40.088424 GENERIC: 0.0: enabled 1
692 11:40:40.088513 USB3 port 0: enabled 1
693 11:40:40.091599 USB3 port 1: enabled 1
694 11:40:40.095521 USB3 port 2: enabled 0
695 11:40:40.098482 USB3 port 3: enabled 0
696 11:40:40.098646 USB2 port 0: enabled 0
697 11:40:40.101347 USB2 port 1: enabled 1
698 11:40:40.104979 USB2 port 2: enabled 1
699 11:40:40.105113 USB2 port 3: enabled 0
700 11:40:40.108524 USB2 port 4: enabled 1
701 11:40:40.111760 USB2 port 5: enabled 0
702 11:40:40.112233 USB2 port 6: enabled 0
703 11:40:40.114769 USB2 port 7: enabled 0
704 11:40:40.118392 USB2 port 8: enabled 0
705 11:40:40.121936 USB2 port 9: enabled 0
706 11:40:40.122328 USB3 port 0: enabled 0
707 11:40:40.124918 USB3 port 1: enabled 1
708 11:40:40.128318 USB3 port 2: enabled 0
709 11:40:40.128711 USB3 port 3: enabled 0
710 11:40:40.131290 GENERIC: 0.0: enabled 1
711 11:40:40.135019 GENERIC: 1.0: enabled 1
712 11:40:40.138407 APIC: 01: enabled 1
713 11:40:40.138996 APIC: 07: enabled 1
714 11:40:40.141329 APIC: 02: enabled 1
715 11:40:40.141985 APIC: 04: enabled 1
716 11:40:40.145312 APIC: 06: enabled 1
717 11:40:40.148309 APIC: 03: enabled 1
718 11:40:40.148855 APIC: 05: enabled 1
719 11:40:40.151260 Compare with tree...
720 11:40:40.154860 Root Device: enabled 1
721 11:40:40.155288 DOMAIN: 0000: enabled 1
722 11:40:40.157859 PCI: 00:00.0: enabled 1
723 11:40:40.161114 PCI: 00:02.0: enabled 1
724 11:40:40.164513 PCI: 00:04.0: enabled 1
725 11:40:40.167570 GENERIC: 0.0: enabled 1
726 11:40:40.168061 PCI: 00:05.0: enabled 1
727 11:40:40.171055 PCI: 00:06.0: enabled 0
728 11:40:40.174236 PCI: 00:07.0: enabled 0
729 11:40:40.177615 GENERIC: 0.0: enabled 1
730 11:40:40.180627 PCI: 00:07.1: enabled 0
731 11:40:40.180711 GENERIC: 1.0: enabled 1
732 11:40:40.183943 PCI: 00:07.2: enabled 0
733 11:40:40.187464 GENERIC: 0.0: enabled 1
734 11:40:40.190898 PCI: 00:07.3: enabled 0
735 11:40:40.193729 GENERIC: 1.0: enabled 1
736 11:40:40.197199 PCI: 00:08.0: enabled 1
737 11:40:40.197283 PCI: 00:09.0: enabled 0
738 11:40:40.200390 PCI: 00:0a.0: enabled 0
739 11:40:40.204230 PCI: 00:0d.0: enabled 1
740 11:40:40.207310 USB0 port 0: enabled 1
741 11:40:40.210734 USB3 port 0: enabled 1
742 11:40:40.210817 USB3 port 1: enabled 1
743 11:40:40.214023 USB3 port 2: enabled 0
744 11:40:40.217190 USB3 port 3: enabled 0
745 11:40:40.220636 PCI: 00:0d.1: enabled 0
746 11:40:40.223613 PCI: 00:0d.2: enabled 0
747 11:40:40.223696 GENERIC: 0.0: enabled 1
748 11:40:40.226865 PCI: 00:0d.3: enabled 0
749 11:40:40.230242 PCI: 00:0e.0: enabled 0
750 11:40:40.233348 PCI: 00:10.2: enabled 1
751 11:40:40.236660 PCI: 00:10.6: enabled 0
752 11:40:40.236744 PCI: 00:10.7: enabled 0
753 11:40:40.240059 PCI: 00:12.0: enabled 0
754 11:40:40.243813 PCI: 00:12.6: enabled 0
755 11:40:40.246865 PCI: 00:13.0: enabled 0
756 11:40:40.250485 PCI: 00:14.0: enabled 1
757 11:40:40.250568 USB0 port 0: enabled 1
758 11:40:40.253391 USB2 port 0: enabled 0
759 11:40:40.256618 USB2 port 1: enabled 1
760 11:40:40.260372 USB2 port 2: enabled 1
761 11:40:40.263405 USB2 port 3: enabled 0
762 11:40:40.266501 USB2 port 4: enabled 1
763 11:40:40.266585 USB2 port 5: enabled 0
764 11:40:40.269704 USB2 port 6: enabled 0
765 11:40:40.273631 USB2 port 7: enabled 0
766 11:40:40.276705 USB2 port 8: enabled 0
767 11:40:40.279713 USB2 port 9: enabled 0
768 11:40:40.282943 USB3 port 0: enabled 0
769 11:40:40.283026 USB3 port 1: enabled 1
770 11:40:40.286793 USB3 port 2: enabled 0
771 11:40:40.289606 USB3 port 3: enabled 0
772 11:40:40.293204 PCI: 00:14.1: enabled 0
773 11:40:40.296719 PCI: 00:14.2: enabled 1
774 11:40:40.296802 PCI: 00:14.3: enabled 1
775 11:40:40.299316 GENERIC: 0.0: enabled 1
776 11:40:40.302770 PCI: 00:15.0: enabled 1
777 11:40:40.305915 I2C: 00:1a: enabled 1
778 11:40:40.309567 I2C: 00:31: enabled 1
779 11:40:40.309650 I2C: 00:32: enabled 1
780 11:40:40.312754 PCI: 00:15.1: enabled 1
781 11:40:40.316837 I2C: 00:10: enabled 1
782 11:40:40.320327 PCI: 00:15.2: enabled 1
783 11:40:40.320417 PCI: 00:15.3: enabled 1
784 11:40:40.323773 PCI: 00:16.0: enabled 1
785 11:40:40.327457 PCI: 00:16.1: enabled 0
786 11:40:40.330489 PCI: 00:16.2: enabled 0
787 11:40:40.330593 PCI: 00:16.3: enabled 0
788 11:40:40.333709 PCI: 00:16.4: enabled 0
789 11:40:40.336941 PCI: 00:16.5: enabled 0
790 11:40:40.340179 PCI: 00:17.0: enabled 1
791 11:40:40.343610 PCI: 00:19.0: enabled 0
792 11:40:40.343802 PCI: 00:19.1: enabled 1
793 11:40:40.346769 I2C: 00:15: enabled 1
794 11:40:40.350524 PCI: 00:19.2: enabled 0
795 11:40:40.400613 PCI: 00:1d.0: enabled 1
796 11:40:40.401080 GENERIC: 0.0: enabled 1
797 11:40:40.401403 PCI: 00:1e.0: enabled 1
798 11:40:40.402048 PCI: 00:1e.1: enabled 0
799 11:40:40.402399 PCI: 00:1e.2: enabled 1
800 11:40:40.402696 SPI: 00: enabled 1
801 11:40:40.402980 PCI: 00:1e.3: enabled 1
802 11:40:40.403257 SPI: 00: enabled 1
803 11:40:40.403532 PCI: 00:1f.0: enabled 1
804 11:40:40.403805 PNP: 0c09.0: enabled 1
805 11:40:40.404072 PCI: 00:1f.1: enabled 0
806 11:40:40.404337 PCI: 00:1f.2: enabled 1
807 11:40:40.404652 GENERIC: 0.0: enabled 1
808 11:40:40.404946 GENERIC: 0.0: enabled 1
809 11:40:40.405212 GENERIC: 1.0: enabled 1
810 11:40:40.405510 PCI: 00:1f.3: enabled 1
811 11:40:40.405804 PCI: 00:1f.4: enabled 0
812 11:40:40.406068 PCI: 00:1f.5: enabled 1
813 11:40:40.406332 PCI: 00:1f.6: enabled 0
814 11:40:40.452310 PCI: 00:1f.7: enabled 0
815 11:40:40.452574 CPU_CLUSTER: 0: enabled 1
816 11:40:40.452773 APIC: 00: enabled 1
817 11:40:40.453194 APIC: 01: enabled 1
818 11:40:40.453387 APIC: 07: enabled 1
819 11:40:40.453586 APIC: 02: enabled 1
820 11:40:40.453762 APIC: 04: enabled 1
821 11:40:40.453931 APIC: 06: enabled 1
822 11:40:40.454137 APIC: 03: enabled 1
823 11:40:40.454314 APIC: 05: enabled 1
824 11:40:40.454481 Root Device scanning...
825 11:40:40.454647 scan_static_bus for Root Device
826 11:40:40.454813 DOMAIN: 0000 enabled
827 11:40:40.455011 CPU_CLUSTER: 0 enabled
828 11:40:40.455181 DOMAIN: 0000 scanning...
829 11:40:40.455345 PCI: pci_scan_bus for bus 00
830 11:40:40.455506 PCI: 00:00.0 [8086/0000] ops
831 11:40:40.455670 PCI: 00:00.0 [8086/9a12] enabled
832 11:40:40.455830 PCI: 00:02.0 [8086/0000] bus ops
833 11:40:40.455992 PCI: 00:02.0 [8086/9a40] enabled
834 11:40:40.482829 PCI: 00:04.0 [8086/0000] bus ops
835 11:40:40.483254 PCI: 00:04.0 [8086/9a03] enabled
836 11:40:40.483421 PCI: 00:05.0 [8086/9a19] enabled
837 11:40:40.483596 PCI: 00:07.0 [0000/0000] hidden
838 11:40:40.483743 PCI: 00:08.0 [8086/9a11] enabled
839 11:40:40.483883 PCI: 00:0a.0 [8086/9a0d] disabled
840 11:40:40.484018 PCI: 00:0d.0 [8086/0000] bus ops
841 11:40:40.486853 PCI: 00:0d.0 [8086/9a13] enabled
842 11:40:40.487051 PCI: 00:14.0 [8086/0000] bus ops
843 11:40:40.490157 PCI: 00:14.0 [8086/a0ed] enabled
844 11:40:40.490353 PCI: 00:14.2 [8086/a0ef] enabled
845 11:40:40.493416 PCI: 00:14.3 [8086/0000] bus ops
846 11:40:40.496658 PCI: 00:14.3 [8086/a0f0] enabled
847 11:40:40.499990 PCI: 00:15.0 [8086/0000] bus ops
848 11:40:40.503290 PCI: 00:15.0 [8086/a0e8] enabled
849 11:40:40.506556 PCI: 00:15.1 [8086/0000] bus ops
850 11:40:40.509604 PCI: 00:15.1 [8086/a0e9] enabled
851 11:40:40.513054 PCI: 00:15.2 [8086/0000] bus ops
852 11:40:40.516270 PCI: 00:15.2 [8086/a0ea] enabled
853 11:40:40.519528 PCI: 00:15.3 [8086/0000] bus ops
854 11:40:40.522945 PCI: 00:15.3 [8086/a0eb] enabled
855 11:40:40.526469 PCI: 00:16.0 [8086/0000] ops
856 11:40:40.529727 PCI: 00:16.0 [8086/a0e0] enabled
857 11:40:40.536476 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 11:40:40.539527 PCI: 00:19.0 [8086/0000] bus ops
859 11:40:40.543047 PCI: 00:19.0 [8086/a0c5] disabled
860 11:40:40.546437 PCI: 00:19.1 [8086/0000] bus ops
861 11:40:40.549506 PCI: 00:19.1 [8086/a0c6] enabled
862 11:40:40.552939 PCI: 00:1d.0 [8086/0000] bus ops
863 11:40:40.556391 PCI: 00:1d.0 [8086/a0b0] enabled
864 11:40:40.559717 PCI: 00:1e.0 [8086/0000] ops
865 11:40:40.563008 PCI: 00:1e.0 [8086/a0a8] enabled
866 11:40:40.566516 PCI: 00:1e.2 [8086/0000] bus ops
867 11:40:40.569302 PCI: 00:1e.2 [8086/a0aa] enabled
868 11:40:40.572546 PCI: 00:1e.3 [8086/0000] bus ops
869 11:40:40.575631 PCI: 00:1e.3 [8086/a0ab] enabled
870 11:40:40.579196 PCI: 00:1f.0 [8086/0000] bus ops
871 11:40:40.582232 PCI: 00:1f.0 [8086/a087] enabled
872 11:40:40.582415 RTC Init
873 11:40:40.585734 Set power on after power failure.
874 11:40:40.589000 Disabling Deep S3
875 11:40:40.589168 Disabling Deep S3
876 11:40:40.592377 Disabling Deep S4
877 11:40:40.595608 Disabling Deep S4
878 11:40:40.595842 Disabling Deep S5
879 11:40:40.599000 Disabling Deep S5
880 11:40:40.602625 PCI: 00:1f.2 [0000/0000] hidden
881 11:40:40.605610 PCI: 00:1f.3 [8086/0000] bus ops
882 11:40:40.609083 PCI: 00:1f.3 [8086/a0c8] enabled
883 11:40:40.612121 PCI: 00:1f.5 [8086/0000] bus ops
884 11:40:40.615422 PCI: 00:1f.5 [8086/a0a4] enabled
885 11:40:40.618785 PCI: Leftover static devices:
886 11:40:40.618976 PCI: 00:10.2
887 11:40:40.622034 PCI: 00:10.6
888 11:40:40.622222 PCI: 00:10.7
889 11:40:40.622372 PCI: 00:06.0
890 11:40:40.625156 PCI: 00:07.1
891 11:40:40.625345 PCI: 00:07.2
892 11:40:40.628520 PCI: 00:07.3
893 11:40:40.628733 PCI: 00:09.0
894 11:40:40.628886 PCI: 00:0d.1
895 11:40:40.632067 PCI: 00:0d.2
896 11:40:40.632256 PCI: 00:0d.3
897 11:40:40.635100 PCI: 00:0e.0
898 11:40:40.635289 PCI: 00:12.0
899 11:40:40.635439 PCI: 00:12.6
900 11:40:40.638885 PCI: 00:13.0
901 11:40:40.639073 PCI: 00:14.1
902 11:40:40.641769 PCI: 00:16.1
903 11:40:40.641960 PCI: 00:16.2
904 11:40:40.645489 PCI: 00:16.3
905 11:40:40.645695 PCI: 00:16.4
906 11:40:40.645860 PCI: 00:16.5
907 11:40:40.648486 PCI: 00:17.0
908 11:40:40.648726 PCI: 00:19.2
909 11:40:40.652437 PCI: 00:1e.1
910 11:40:40.652854 PCI: 00:1f.1
911 11:40:40.653185 PCI: 00:1f.4
912 11:40:40.655524 PCI: 00:1f.6
913 11:40:40.656070 PCI: 00:1f.7
914 11:40:40.658680 PCI: Check your devicetree.cb.
915 11:40:40.662165 PCI: 00:02.0 scanning...
916 11:40:40.665223 scan_generic_bus for PCI: 00:02.0
917 11:40:40.668577 scan_generic_bus for PCI: 00:02.0 done
918 11:40:40.675268 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 11:40:40.675689 PCI: 00:04.0 scanning...
920 11:40:40.682176 scan_generic_bus for PCI: 00:04.0
921 11:40:40.682593 GENERIC: 0.0 enabled
922 11:40:40.688497 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 11:40:40.691794 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 11:40:40.694818 PCI: 00:0d.0 scanning...
925 11:40:40.698078 scan_static_bus for PCI: 00:0d.0
926 11:40:40.701529 USB0 port 0 enabled
927 11:40:40.704964 USB0 port 0 scanning...
928 11:40:40.707965 scan_static_bus for USB0 port 0
929 11:40:40.708188 USB3 port 0 enabled
930 11:40:40.711689 USB3 port 1 enabled
931 11:40:40.714715 USB3 port 2 disabled
932 11:40:40.714940 USB3 port 3 disabled
933 11:40:40.718077 USB3 port 0 scanning...
934 11:40:40.721319 scan_static_bus for USB3 port 0
935 11:40:40.724928 scan_static_bus for USB3 port 0 done
936 11:40:40.731054 scan_bus: bus USB3 port 0 finished in 6 msecs
937 11:40:40.731296 USB3 port 1 scanning...
938 11:40:40.734483 scan_static_bus for USB3 port 1
939 11:40:40.737680 scan_static_bus for USB3 port 1 done
940 11:40:40.744760 scan_bus: bus USB3 port 1 finished in 6 msecs
941 11:40:40.747539 scan_static_bus for USB0 port 0 done
942 11:40:40.751487 scan_bus: bus USB0 port 0 finished in 43 msecs
943 11:40:40.757885 scan_static_bus for PCI: 00:0d.0 done
944 11:40:40.760975 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 11:40:40.764368 PCI: 00:14.0 scanning...
946 11:40:40.767985 scan_static_bus for PCI: 00:14.0
947 11:40:40.768216 USB0 port 0 enabled
948 11:40:40.770993 USB0 port 0 scanning...
949 11:40:40.774046 scan_static_bus for USB0 port 0
950 11:40:40.777982 USB2 port 0 disabled
951 11:40:40.780714 USB2 port 1 enabled
952 11:40:40.780944 USB2 port 2 enabled
953 11:40:40.783843 USB2 port 3 disabled
954 11:40:40.784074 USB2 port 4 enabled
955 11:40:40.787442 USB2 port 5 disabled
956 11:40:40.790910 USB2 port 6 disabled
957 11:40:40.791140 USB2 port 7 disabled
958 11:40:40.794067 USB2 port 8 disabled
959 11:40:40.797458 USB2 port 9 disabled
960 11:40:40.797927 USB3 port 0 disabled
961 11:40:40.800675 USB3 port 1 enabled
962 11:40:40.804115 USB3 port 2 disabled
963 11:40:40.804645 USB3 port 3 disabled
964 11:40:40.807564 USB2 port 1 scanning...
965 11:40:40.810593 scan_static_bus for USB2 port 1
966 11:40:40.813936 scan_static_bus for USB2 port 1 done
967 11:40:40.820561 scan_bus: bus USB2 port 1 finished in 6 msecs
968 11:40:40.820821 USB2 port 2 scanning...
969 11:40:40.823708 scan_static_bus for USB2 port 2
970 11:40:40.827068 scan_static_bus for USB2 port 2 done
971 11:40:40.833436 scan_bus: bus USB2 port 2 finished in 6 msecs
972 11:40:40.836896 USB2 port 4 scanning...
973 11:40:40.840479 scan_static_bus for USB2 port 4
974 11:40:40.843864 scan_static_bus for USB2 port 4 done
975 11:40:40.847071 scan_bus: bus USB2 port 4 finished in 6 msecs
976 11:40:40.849950 USB3 port 1 scanning...
977 11:40:40.853114 scan_static_bus for USB3 port 1
978 11:40:40.856423 scan_static_bus for USB3 port 1 done
979 11:40:40.860161 scan_bus: bus USB3 port 1 finished in 6 msecs
980 11:40:40.866525 scan_static_bus for USB0 port 0 done
981 11:40:40.869805 scan_bus: bus USB0 port 0 finished in 93 msecs
982 11:40:40.873035 scan_static_bus for PCI: 00:14.0 done
983 11:40:40.879572 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
984 11:40:40.879766 PCI: 00:14.3 scanning...
985 11:40:40.883865 scan_static_bus for PCI: 00:14.3
986 11:40:40.886635 GENERIC: 0.0 enabled
987 11:40:40.889720 scan_static_bus for PCI: 00:14.3 done
988 11:40:40.896171 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 11:40:40.896355 PCI: 00:15.0 scanning...
990 11:40:40.900066 scan_static_bus for PCI: 00:15.0
991 11:40:40.903390 I2C: 00:1a enabled
992 11:40:40.906581 I2C: 00:31 enabled
993 11:40:40.906762 I2C: 00:32 enabled
994 11:40:40.910135 scan_static_bus for PCI: 00:15.0 done
995 11:40:40.916684 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 11:40:40.916868 PCI: 00:15.1 scanning...
997 11:40:40.920571 scan_static_bus for PCI: 00:15.1
998 11:40:40.923655 I2C: 00:10 enabled
999 11:40:40.926704 scan_static_bus for PCI: 00:15.1 done
1000 11:40:40.933547 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 11:40:40.933923 PCI: 00:15.2 scanning...
1002 11:40:40.936734 scan_static_bus for PCI: 00:15.2
1003 11:40:40.943624 scan_static_bus for PCI: 00:15.2 done
1004 11:40:40.946840 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 11:40:40.950137 PCI: 00:15.3 scanning...
1006 11:40:40.953557 scan_static_bus for PCI: 00:15.3
1007 11:40:40.956708 scan_static_bus for PCI: 00:15.3 done
1008 11:40:40.959968 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 11:40:40.963455 PCI: 00:19.1 scanning...
1010 11:40:40.966598 scan_static_bus for PCI: 00:19.1
1011 11:40:40.969943 I2C: 00:15 enabled
1012 11:40:40.973213 scan_static_bus for PCI: 00:19.1 done
1013 11:40:40.976987 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 11:40:40.979683 PCI: 00:1d.0 scanning...
1015 11:40:40.982955 do_pci_scan_bridge for PCI: 00:1d.0
1016 11:40:40.986460 PCI: pci_scan_bus for bus 01
1017 11:40:40.989719 PCI: 01:00.0 [15b7/5009] enabled
1018 11:40:40.993050 GENERIC: 0.0 enabled
1019 11:40:40.996582 Enabling Common Clock Configuration
1020 11:40:40.999831 L1 Sub-State supported from root port 29
1021 11:40:41.002986 L1 Sub-State Support = 0x5
1022 11:40:41.006146 CommonModeRestoreTime = 0x28
1023 11:40:41.009351 Power On Value = 0x16, Power On Scale = 0x0
1024 11:40:41.012805 ASPM: Enabled L1
1025 11:40:41.016390 PCIe: Max_Payload_Size adjusted to 128
1026 11:40:41.022842 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 11:40:41.023259 PCI: 00:1e.2 scanning...
1028 11:40:41.026226 scan_generic_bus for PCI: 00:1e.2
1029 11:40:41.029417 SPI: 00 enabled
1030 11:40:41.035867 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 11:40:41.038981 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 11:40:41.042573 PCI: 00:1e.3 scanning...
1033 11:40:41.045965 scan_generic_bus for PCI: 00:1e.3
1034 11:40:41.049167 SPI: 00 enabled
1035 11:40:41.052540 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 11:40:41.058883 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 11:40:41.062285 PCI: 00:1f.0 scanning...
1038 11:40:41.065841 scan_static_bus for PCI: 00:1f.0
1039 11:40:41.065993 PNP: 0c09.0 enabled
1040 11:40:41.069103 PNP: 0c09.0 scanning...
1041 11:40:41.071994 scan_static_bus for PNP: 0c09.0
1042 11:40:41.075308 scan_static_bus for PNP: 0c09.0 done
1043 11:40:41.082235 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 11:40:41.085535 scan_static_bus for PCI: 00:1f.0 done
1045 11:40:41.088876 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 11:40:41.092126 PCI: 00:1f.2 scanning...
1047 11:40:41.095415 scan_static_bus for PCI: 00:1f.2
1048 11:40:41.098560 GENERIC: 0.0 enabled
1049 11:40:41.102457 GENERIC: 0.0 scanning...
1050 11:40:41.105620 scan_static_bus for GENERIC: 0.0
1051 11:40:41.106076 GENERIC: 0.0 enabled
1052 11:40:41.108827 GENERIC: 1.0 enabled
1053 11:40:41.111806 scan_static_bus for GENERIC: 0.0 done
1054 11:40:41.118624 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 11:40:41.121892 scan_static_bus for PCI: 00:1f.2 done
1056 11:40:41.125458 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 11:40:41.128321 PCI: 00:1f.3 scanning...
1058 11:40:41.131644 scan_static_bus for PCI: 00:1f.3
1059 11:40:41.135200 scan_static_bus for PCI: 00:1f.3 done
1060 11:40:41.141611 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 11:40:41.141780 PCI: 00:1f.5 scanning...
1062 11:40:41.144818 scan_generic_bus for PCI: 00:1f.5
1063 11:40:41.151732 scan_generic_bus for PCI: 00:1f.5 done
1064 11:40:41.154973 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 11:40:41.158345 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1066 11:40:41.164689 scan_static_bus for Root Device done
1067 11:40:41.167880 scan_bus: bus Root Device finished in 736 msecs
1068 11:40:41.168014 done
1069 11:40:41.174627 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1070 11:40:41.178016 Chrome EC: UHEPI supported
1071 11:40:41.184481 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 11:40:41.191495 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 11:40:41.194728 SPI flash protection: WPSW=0 SRP0=1
1074 11:40:41.197690 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 11:40:41.204422 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 11:40:41.207778 found VGA at PCI: 00:02.0
1077 11:40:41.210741 Setting up VGA for PCI: 00:02.0
1078 11:40:41.214073 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 11:40:41.221192 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 11:40:41.224171 Allocating resources...
1081 11:40:41.224355 Reading resources...
1082 11:40:41.230902 Root Device read_resources bus 0 link: 0
1083 11:40:41.234072 DOMAIN: 0000 read_resources bus 0 link: 0
1084 11:40:41.237382 PCI: 00:04.0 read_resources bus 1 link: 0
1085 11:40:41.244256 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 11:40:41.247659 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 11:40:41.254426 USB0 port 0 read_resources bus 0 link: 0
1088 11:40:41.257495 USB0 port 0 read_resources bus 0 link: 0 done
1089 11:40:41.264227 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 11:40:41.267676 PCI: 00:14.0 read_resources bus 0 link: 0
1091 11:40:41.270879 USB0 port 0 read_resources bus 0 link: 0
1092 11:40:41.278431 USB0 port 0 read_resources bus 0 link: 0 done
1093 11:40:41.281800 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 11:40:41.288765 PCI: 00:14.3 read_resources bus 0 link: 0
1095 11:40:41.291951 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 11:40:41.298629 PCI: 00:15.0 read_resources bus 0 link: 0
1097 11:40:41.302034 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 11:40:41.308430 PCI: 00:15.1 read_resources bus 0 link: 0
1099 11:40:41.311530 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 11:40:41.319287 PCI: 00:19.1 read_resources bus 0 link: 0
1101 11:40:41.322520 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 11:40:41.329003 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 11:40:41.332185 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 11:40:41.338904 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 11:40:41.342218 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 11:40:41.348760 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 11:40:41.352381 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 11:40:41.358620 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 11:40:41.361814 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 11:40:41.368451 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 11:40:41.371797 GENERIC: 0.0 read_resources bus 0 link: 0
1112 11:40:41.378548 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 11:40:41.381679 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 11:40:41.388363 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 11:40:41.391609 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 11:40:41.398395 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 11:40:41.401124 Root Device read_resources bus 0 link: 0 done
1118 11:40:41.404529 Done reading resources.
1119 11:40:41.411213 Show resources in subtree (Root Device)...After reading.
1120 11:40:41.414771 Root Device child on link 0 DOMAIN: 0000
1121 11:40:41.418038 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 11:40:41.427978 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 11:40:41.438044 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 11:40:41.438198 PCI: 00:00.0
1125 11:40:41.447865 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 11:40:41.458187 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 11:40:41.467906 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 11:40:41.477603 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 11:40:41.487520 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 11:40:41.497630 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 11:40:41.504452 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 11:40:41.514083 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 11:40:41.523839 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 11:40:41.534510 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 11:40:41.543927 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 11:40:41.553690 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 11:40:41.560233 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 11:40:41.570459 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 11:40:41.580307 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 11:40:41.590010 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 11:40:41.600656 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 11:40:41.610377 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 11:40:41.617013 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 11:40:41.626780 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 11:40:41.630149 PCI: 00:02.0
1146 11:40:41.640080 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 11:40:41.650021 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 11:40:41.659677 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 11:40:41.663122 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 11:40:41.672753 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 11:40:41.676033 GENERIC: 0.0
1152 11:40:41.676217 PCI: 00:05.0
1153 11:40:41.686520 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 11:40:41.692982 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 11:40:41.693166 GENERIC: 0.0
1156 11:40:41.695993 PCI: 00:08.0
1157 11:40:41.706077 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 11:40:41.706265 PCI: 00:0a.0
1159 11:40:41.709176 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 11:40:41.719019 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 11:40:41.726127 USB0 port 0 child on link 0 USB3 port 0
1162 11:40:41.726569 USB3 port 0
1163 11:40:41.729287 USB3 port 1
1164 11:40:41.729757 USB3 port 2
1165 11:40:41.732587 USB3 port 3
1166 11:40:41.735935 PCI: 00:14.0 child on link 0 USB0 port 0
1167 11:40:41.745705 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 11:40:41.752375 USB0 port 0 child on link 0 USB2 port 0
1169 11:40:41.752559 USB2 port 0
1170 11:40:41.755645 USB2 port 1
1171 11:40:41.755834 USB2 port 2
1172 11:40:41.758838 USB2 port 3
1173 11:40:41.758991 USB2 port 4
1174 11:40:41.762156 USB2 port 5
1175 11:40:41.762309 USB2 port 6
1176 11:40:41.765323 USB2 port 7
1177 11:40:41.765529 USB2 port 8
1178 11:40:41.768589 USB2 port 9
1179 11:40:41.771959 USB3 port 0
1180 11:40:41.772111 USB3 port 1
1181 11:40:41.775245 USB3 port 2
1182 11:40:41.775398 USB3 port 3
1183 11:40:41.778623 PCI: 00:14.2
1184 11:40:41.788332 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 11:40:41.798506 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 11:40:41.801659 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 11:40:41.811422 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 11:40:41.814678 GENERIC: 0.0
1189 11:40:41.817899 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 11:40:41.827649 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 11:40:41.827733 I2C: 00:1a
1192 11:40:41.831574 I2C: 00:31
1193 11:40:41.831995 I2C: 00:32
1194 11:40:41.838043 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 11:40:41.847895 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 11:40:41.848325 I2C: 00:10
1197 11:40:41.851322 PCI: 00:15.2
1198 11:40:41.861412 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 11:40:41.861888 PCI: 00:15.3
1200 11:40:41.871411 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 11:40:41.874207 PCI: 00:16.0
1202 11:40:41.884386 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 11:40:41.884849 PCI: 00:19.0
1204 11:40:41.890767 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 11:40:41.901080 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 11:40:41.901532 I2C: 00:15
1207 11:40:41.903907 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 11:40:41.913910 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 11:40:41.923776 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 11:40:41.934422 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 11:40:41.934654 GENERIC: 0.0
1212 11:40:41.936750 PCI: 01:00.0
1213 11:40:41.946732 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 11:40:41.956817 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1215 11:40:41.957119 PCI: 00:1e.0
1216 11:40:41.970042 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1217 11:40:41.973437 PCI: 00:1e.2 child on link 0 SPI: 00
1218 11:40:41.983130 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 11:40:41.983638 SPI: 00
1220 11:40:41.986579 PCI: 00:1e.3 child on link 0 SPI: 00
1221 11:40:41.996486 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 11:40:41.999775 SPI: 00
1223 11:40:42.003281 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1224 11:40:42.012965 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1225 11:40:42.013432 PNP: 0c09.0
1226 11:40:42.023242 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1227 11:40:42.026481 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1228 11:40:42.036305 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1229 11:40:42.046085 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1230 11:40:42.049593 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1231 11:40:42.052886 GENERIC: 0.0
1232 11:40:42.053238 GENERIC: 1.0
1233 11:40:42.056447 PCI: 00:1f.3
1234 11:40:42.066140 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1235 11:40:42.075753 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1236 11:40:42.079091 PCI: 00:1f.5
1237 11:40:42.085692 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1238 11:40:42.092151 CPU_CLUSTER: 0 child on link 0 APIC: 00
1239 11:40:42.092645 APIC: 00
1240 11:40:42.092882 APIC: 01
1241 11:40:42.095201 APIC: 07
1242 11:40:42.095282 APIC: 02
1243 11:40:42.098754 APIC: 04
1244 11:40:42.098855 APIC: 06
1245 11:40:42.098944 APIC: 03
1246 11:40:42.101924 APIC: 05
1247 11:40:42.108589 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1248 11:40:42.115597 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1249 11:40:42.121657 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1250 11:40:42.128337 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1251 11:40:42.131492 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1252 11:40:42.135017 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1253 11:40:42.141382 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1254 11:40:42.148382 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1255 11:40:42.158072 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1256 11:40:42.164725 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1257 11:40:42.171441 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1258 11:40:42.178261 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1259 11:40:42.184793 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1260 11:40:42.194816 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1261 11:40:42.198088 DOMAIN: 0000: Resource ranges:
1262 11:40:42.201268 * Base: 1000, Size: 800, Tag: 100
1263 11:40:42.204433 * Base: 1900, Size: e700, Tag: 100
1264 11:40:42.211317 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1265 11:40:42.217601 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1266 11:40:42.224563 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1267 11:40:42.230808 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1268 11:40:42.237501 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1269 11:40:42.247171 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1270 11:40:42.253819 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1271 11:40:42.260372 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1272 11:40:42.270558 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1273 11:40:42.277121 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1274 11:40:42.283582 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1275 11:40:42.293665 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1276 11:40:42.299846 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1277 11:40:42.306819 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1278 11:40:42.316574 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1279 11:40:42.323368 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1280 11:40:42.329853 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1281 11:40:42.339840 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1282 11:40:42.346208 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1283 11:40:42.352974 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1284 11:40:42.363131 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1285 11:40:42.369458 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1286 11:40:42.376179 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1287 11:40:42.386362 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1288 11:40:42.392815 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1289 11:40:42.396146 DOMAIN: 0000: Resource ranges:
1290 11:40:42.399222 * Base: 7fc00000, Size: 40400000, Tag: 200
1291 11:40:42.405950 * Base: d0000000, Size: 28000000, Tag: 200
1292 11:40:42.409026 * Base: fa000000, Size: 1000000, Tag: 200
1293 11:40:42.413174 * Base: fb001000, Size: 2fff000, Tag: 200
1294 11:40:42.415846 * Base: fe010000, Size: 2e000, Tag: 200
1295 11:40:42.422553 * Base: fe03f000, Size: d41000, Tag: 200
1296 11:40:42.425765 * Base: fed88000, Size: 8000, Tag: 200
1297 11:40:42.428945 * Base: fed93000, Size: d000, Tag: 200
1298 11:40:42.432113 * Base: feda2000, Size: 1e000, Tag: 200
1299 11:40:42.438917 * Base: fede0000, Size: 1220000, Tag: 200
1300 11:40:42.442039 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1301 11:40:42.448946 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1302 11:40:42.455417 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1303 11:40:42.462002 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1304 11:40:42.468487 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1305 11:40:42.475522 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1306 11:40:42.482230 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1307 11:40:42.488489 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1308 11:40:42.495206 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1309 11:40:42.501848 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1310 11:40:42.508438 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1311 11:40:42.514806 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1312 11:40:42.521754 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1313 11:40:42.528654 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1314 11:40:42.534750 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1315 11:40:42.541717 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1316 11:40:42.547792 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1317 11:40:42.554694 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1318 11:40:42.561070 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1319 11:40:42.567965 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1320 11:40:42.574316 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1321 11:40:42.581114 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1322 11:40:42.587570 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1323 11:40:42.597522 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1324 11:40:42.603935 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1325 11:40:42.607900 PCI: 00:1d.0: Resource ranges:
1326 11:40:42.610509 * Base: 7fc00000, Size: 100000, Tag: 200
1327 11:40:42.617382 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1328 11:40:42.624150 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1329 11:40:42.633851 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1330 11:40:42.640322 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1331 11:40:42.643745 Root Device assign_resources, bus 0 link: 0
1332 11:40:42.649783 DOMAIN: 0000 assign_resources, bus 0 link: 0
1333 11:40:42.656694 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1334 11:40:42.666703 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1335 11:40:42.673192 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1336 11:40:42.683312 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1337 11:40:42.686504 PCI: 00:04.0 assign_resources, bus 1 link: 0
1338 11:40:42.692890 PCI: 00:04.0 assign_resources, bus 1 link: 0
1339 11:40:42.699528 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1340 11:40:42.709603 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1341 11:40:42.716089 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1342 11:40:42.719378 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1343 11:40:42.725920 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1344 11:40:42.732487 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1345 11:40:42.739432 PCI: 00:14.0 assign_resources, bus 0 link: 0
1346 11:40:42.742349 PCI: 00:14.0 assign_resources, bus 0 link: 0
1347 11:40:42.752610 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1348 11:40:42.758820 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1349 11:40:42.765840 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1350 11:40:42.772208 PCI: 00:14.3 assign_resources, bus 0 link: 0
1351 11:40:42.775650 PCI: 00:14.3 assign_resources, bus 0 link: 0
1352 11:40:42.785463 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1353 11:40:42.789024 PCI: 00:15.0 assign_resources, bus 0 link: 0
1354 11:40:42.795119 PCI: 00:15.0 assign_resources, bus 0 link: 0
1355 11:40:42.801752 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1356 11:40:42.804929 PCI: 00:15.1 assign_resources, bus 0 link: 0
1357 11:40:42.811990 PCI: 00:15.1 assign_resources, bus 0 link: 0
1358 11:40:42.818366 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1359 11:40:42.828392 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1360 11:40:42.834833 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1361 11:40:42.844754 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1362 11:40:42.847815 PCI: 00:19.1 assign_resources, bus 0 link: 0
1363 11:40:42.854844 PCI: 00:19.1 assign_resources, bus 0 link: 0
1364 11:40:42.861326 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1365 11:40:42.870888 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1366 11:40:42.880957 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1367 11:40:42.884207 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1368 11:40:42.894187 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1369 11:40:42.901008 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1370 11:40:42.907774 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 11:40:42.914097 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1372 11:40:42.917125 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1373 11:40:42.924078 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1374 11:40:42.930522 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1375 11:40:42.937017 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1376 11:40:42.940535 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1377 11:40:42.946786 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1378 11:40:42.950313 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1379 11:40:42.956946 LPC: Trying to open IO window from 800 size 1ff
1380 11:40:42.963232 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1381 11:40:42.974064 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1382 11:40:42.980063 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1383 11:40:42.983362 DOMAIN: 0000 assign_resources, bus 0 link: 0
1384 11:40:42.989696 Root Device assign_resources, bus 0 link: 0
1385 11:40:42.992998 Done setting resources.
1386 11:40:42.999675 Show resources in subtree (Root Device)...After assigning values.
1387 11:40:43.003355 Root Device child on link 0 DOMAIN: 0000
1388 11:40:43.006341 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1389 11:40:43.016252 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1390 11:40:43.026268 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1391 11:40:43.026362 PCI: 00:00.0
1392 11:40:43.036259 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1393 11:40:43.046017 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1394 11:40:43.056111 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1395 11:40:43.065947 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1396 11:40:43.075839 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1397 11:40:43.085736 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1398 11:40:43.092103 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1399 11:40:43.102090 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1400 11:40:43.111912 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1401 11:40:43.122223 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1402 11:40:43.131853 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1403 11:40:43.142037 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1404 11:40:43.148268 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1405 11:40:43.158681 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1406 11:40:43.168091 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1407 11:40:43.178421 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1408 11:40:43.188107 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1409 11:40:43.197901 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1410 11:40:43.204657 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1411 11:40:43.214799 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1412 11:40:43.218013 PCI: 00:02.0
1413 11:40:43.227827 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1414 11:40:43.237637 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1415 11:40:43.247949 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1416 11:40:43.254065 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1417 11:40:43.264357 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1418 11:40:43.264441 GENERIC: 0.0
1419 11:40:43.267693 PCI: 00:05.0
1420 11:40:43.277260 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1421 11:40:43.280442 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1422 11:40:43.283791 GENERIC: 0.0
1423 11:40:43.283872 PCI: 00:08.0
1424 11:40:43.293991 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1425 11:40:43.297108 PCI: 00:0a.0
1426 11:40:43.300383 PCI: 00:0d.0 child on link 0 USB0 port 0
1427 11:40:43.310143 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1428 11:40:43.317258 USB0 port 0 child on link 0 USB3 port 0
1429 11:40:43.317346 USB3 port 0
1430 11:40:43.320165 USB3 port 1
1431 11:40:43.320248 USB3 port 2
1432 11:40:43.323373 USB3 port 3
1433 11:40:43.326768 PCI: 00:14.0 child on link 0 USB0 port 0
1434 11:40:43.336603 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1435 11:40:43.343379 USB0 port 0 child on link 0 USB2 port 0
1436 11:40:43.343513 USB2 port 0
1437 11:40:43.346302 USB2 port 1
1438 11:40:43.346394 USB2 port 2
1439 11:40:43.350058 USB2 port 3
1440 11:40:43.350150 USB2 port 4
1441 11:40:43.353102 USB2 port 5
1442 11:40:43.356522 USB2 port 6
1443 11:40:43.356620 USB2 port 7
1444 11:40:43.359622 USB2 port 8
1445 11:40:43.359717 USB2 port 9
1446 11:40:43.363232 USB3 port 0
1447 11:40:43.363325 USB3 port 1
1448 11:40:43.366507 USB3 port 2
1449 11:40:43.366595 USB3 port 3
1450 11:40:43.370018 PCI: 00:14.2
1451 11:40:43.379628 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1452 11:40:43.389723 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1453 11:40:43.392775 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1454 11:40:43.405958 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1455 11:40:43.406081 GENERIC: 0.0
1456 11:40:43.409402 PCI: 00:15.0 child on link 0 I2C: 00:1a
1457 11:40:43.422250 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1458 11:40:43.422377 I2C: 00:1a
1459 11:40:43.422445 I2C: 00:31
1460 11:40:43.425610 I2C: 00:32
1461 11:40:43.428900 PCI: 00:15.1 child on link 0 I2C: 00:10
1462 11:40:43.438690 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1463 11:40:43.442116 I2C: 00:10
1464 11:40:43.442214 PCI: 00:15.2
1465 11:40:43.455646 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1466 11:40:43.455778 PCI: 00:15.3
1467 11:40:43.465236 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1468 11:40:43.468403 PCI: 00:16.0
1469 11:40:43.478422 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1470 11:40:43.478557 PCI: 00:19.0
1471 11:40:43.485148 PCI: 00:19.1 child on link 0 I2C: 00:15
1472 11:40:43.494818 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1473 11:40:43.495015 I2C: 00:15
1474 11:40:43.501456 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1475 11:40:43.508027 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1476 11:40:43.521095 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1477 11:40:43.531069 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1478 11:40:43.534748 GENERIC: 0.0
1479 11:40:43.534830 PCI: 01:00.0
1480 11:40:43.544691 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1481 11:40:43.554555 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1482 11:40:43.557781 PCI: 00:1e.0
1483 11:40:43.567663 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1484 11:40:43.574129 PCI: 00:1e.2 child on link 0 SPI: 00
1485 11:40:43.583852 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1486 11:40:43.583934 SPI: 00
1487 11:40:43.587079 PCI: 00:1e.3 child on link 0 SPI: 00
1488 11:40:43.597461 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1489 11:40:43.600516 SPI: 00
1490 11:40:43.603845 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1491 11:40:43.613619 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1492 11:40:43.613706 PNP: 0c09.0
1493 11:40:43.623550 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1494 11:40:43.626715 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1495 11:40:43.636812 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1496 11:40:43.646560 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1497 11:40:43.649952 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1498 11:40:43.653252 GENERIC: 0.0
1499 11:40:43.653335 GENERIC: 1.0
1500 11:40:43.656620 PCI: 00:1f.3
1501 11:40:43.666612 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1502 11:40:43.676263 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1503 11:40:43.679680 PCI: 00:1f.5
1504 11:40:43.689624 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1505 11:40:43.692883 CPU_CLUSTER: 0 child on link 0 APIC: 00
1506 11:40:43.696388 APIC: 00
1507 11:40:43.696471 APIC: 01
1508 11:40:43.696537 APIC: 07
1509 11:40:43.699512 APIC: 02
1510 11:40:43.699597 APIC: 04
1511 11:40:43.699662 APIC: 06
1512 11:40:43.702531 APIC: 03
1513 11:40:43.702613 APIC: 05
1514 11:40:43.705882 Done allocating resources.
1515 11:40:43.712660 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1516 11:40:43.719234 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1517 11:40:43.722362 Configure GPIOs for I2S audio on UP4.
1518 11:40:43.729197 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1519 11:40:43.732218 Enabling resources...
1520 11:40:43.735968 PCI: 00:00.0 subsystem <- 8086/9a12
1521 11:40:43.739023 PCI: 00:00.0 cmd <- 06
1522 11:40:43.742478 PCI: 00:02.0 subsystem <- 8086/9a40
1523 11:40:43.745411 PCI: 00:02.0 cmd <- 03
1524 11:40:43.748553 PCI: 00:04.0 subsystem <- 8086/9a03
1525 11:40:43.748636 PCI: 00:04.0 cmd <- 02
1526 11:40:43.755709 PCI: 00:05.0 subsystem <- 8086/9a19
1527 11:40:43.755791 PCI: 00:05.0 cmd <- 02
1528 11:40:43.758523 PCI: 00:08.0 subsystem <- 8086/9a11
1529 11:40:43.762343 PCI: 00:08.0 cmd <- 06
1530 11:40:43.765063 PCI: 00:0d.0 subsystem <- 8086/9a13
1531 11:40:43.768758 PCI: 00:0d.0 cmd <- 02
1532 11:40:43.771856 PCI: 00:14.0 subsystem <- 8086/a0ed
1533 11:40:43.775435 PCI: 00:14.0 cmd <- 02
1534 11:40:43.778462 PCI: 00:14.2 subsystem <- 8086/a0ef
1535 11:40:43.781505 PCI: 00:14.2 cmd <- 02
1536 11:40:43.785192 PCI: 00:14.3 subsystem <- 8086/a0f0
1537 11:40:43.788840 PCI: 00:14.3 cmd <- 02
1538 11:40:43.791793 PCI: 00:15.0 subsystem <- 8086/a0e8
1539 11:40:43.795150 PCI: 00:15.0 cmd <- 02
1540 11:40:43.798216 PCI: 00:15.1 subsystem <- 8086/a0e9
1541 11:40:43.798297 PCI: 00:15.1 cmd <- 02
1542 11:40:43.805108 PCI: 00:15.2 subsystem <- 8086/a0ea
1543 11:40:43.805201 PCI: 00:15.2 cmd <- 02
1544 11:40:43.808333 PCI: 00:15.3 subsystem <- 8086/a0eb
1545 11:40:43.811658 PCI: 00:15.3 cmd <- 02
1546 11:40:43.814715 PCI: 00:16.0 subsystem <- 8086/a0e0
1547 11:40:43.818012 PCI: 00:16.0 cmd <- 02
1548 11:40:43.821307 PCI: 00:19.1 subsystem <- 8086/a0c6
1549 11:40:43.824646 PCI: 00:19.1 cmd <- 02
1550 11:40:43.828016 PCI: 00:1d.0 bridge ctrl <- 0013
1551 11:40:43.831391 PCI: 00:1d.0 subsystem <- 8086/a0b0
1552 11:40:43.834733 PCI: 00:1d.0 cmd <- 06
1553 11:40:43.837759 PCI: 00:1e.0 subsystem <- 8086/a0a8
1554 11:40:43.841555 PCI: 00:1e.0 cmd <- 06
1555 11:40:43.844510 PCI: 00:1e.2 subsystem <- 8086/a0aa
1556 11:40:43.847686 PCI: 00:1e.2 cmd <- 06
1557 11:40:43.851116 PCI: 00:1e.3 subsystem <- 8086/a0ab
1558 11:40:43.854587 PCI: 00:1e.3 cmd <- 02
1559 11:40:43.857458 PCI: 00:1f.0 subsystem <- 8086/a087
1560 11:40:43.857579 PCI: 00:1f.0 cmd <- 407
1561 11:40:43.864406 PCI: 00:1f.3 subsystem <- 8086/a0c8
1562 11:40:43.864488 PCI: 00:1f.3 cmd <- 02
1563 11:40:43.867382 PCI: 00:1f.5 subsystem <- 8086/a0a4
1564 11:40:43.870644 PCI: 00:1f.5 cmd <- 406
1565 11:40:43.875482 PCI: 01:00.0 cmd <- 02
1566 11:40:43.880173 done.
1567 11:40:43.883146 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1568 11:40:43.886618 Initializing devices...
1569 11:40:43.889881 Root Device init
1570 11:40:43.893218 Chrome EC: Set SMI mask to 0x0000000000000000
1571 11:40:43.899931 Chrome EC: clear events_b mask to 0x0000000000000000
1572 11:40:43.906434 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1573 11:40:43.909654 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1574 11:40:43.916788 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1575 11:40:43.922915 Chrome EC: Set WAKE mask to 0x0000000000000000
1576 11:40:43.926217 fw_config match found: DB_USB=USB3_ACTIVE
1577 11:40:43.933344 Configure Right Type-C port orientation for retimer
1578 11:40:43.936219 Root Device init finished in 42 msecs
1579 11:40:43.939430 PCI: 00:00.0 init
1580 11:40:43.943051 CPU TDP = 9 Watts
1581 11:40:43.943132 CPU PL1 = 9 Watts
1582 11:40:43.946367 CPU PL2 = 40 Watts
1583 11:40:43.946447 CPU PL4 = 83 Watts
1584 11:40:43.949489 PCI: 00:00.0 init finished in 8 msecs
1585 11:40:43.952753 PCI: 00:02.0 init
1586 11:40:43.956301 GMA: Found VBT in CBFS
1587 11:40:43.959786 GMA: Found valid VBT in CBFS
1588 11:40:43.962935 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1589 11:40:43.972783 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1590 11:40:43.975922 PCI: 00:02.0 init finished in 18 msecs
1591 11:40:43.979459 PCI: 00:05.0 init
1592 11:40:43.982849 PCI: 00:05.0 init finished in 0 msecs
1593 11:40:43.982930 PCI: 00:08.0 init
1594 11:40:43.989666 PCI: 00:08.0 init finished in 0 msecs
1595 11:40:43.989773 PCI: 00:14.0 init
1596 11:40:43.995822 PCI: 00:14.0 init finished in 0 msecs
1597 11:40:43.995903 PCI: 00:14.2 init
1598 11:40:43.999156 PCI: 00:14.2 init finished in 0 msecs
1599 11:40:44.003259 PCI: 00:15.0 init
1600 11:40:44.006030 I2C bus 0 version 0x3230302a
1601 11:40:44.009488 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1602 11:40:44.012713 PCI: 00:15.0 init finished in 6 msecs
1603 11:40:44.016000 PCI: 00:15.1 init
1604 11:40:44.019519 I2C bus 1 version 0x3230302a
1605 11:40:44.022785 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1606 11:40:44.026121 PCI: 00:15.1 init finished in 6 msecs
1607 11:40:44.029131 PCI: 00:15.2 init
1608 11:40:44.032373 I2C bus 2 version 0x3230302a
1609 11:40:44.035905 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1610 11:40:44.039100 PCI: 00:15.2 init finished in 6 msecs
1611 11:40:44.042638 PCI: 00:15.3 init
1612 11:40:44.042719 I2C bus 3 version 0x3230302a
1613 11:40:44.049063 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1614 11:40:44.052508 PCI: 00:15.3 init finished in 6 msecs
1615 11:40:44.052590 PCI: 00:16.0 init
1616 11:40:44.058674 PCI: 00:16.0 init finished in 0 msecs
1617 11:40:44.058757 PCI: 00:19.1 init
1618 11:40:44.062277 I2C bus 5 version 0x3230302a
1619 11:40:44.065348 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1620 11:40:44.068635 PCI: 00:19.1 init finished in 6 msecs
1621 11:40:44.072159 PCI: 00:1d.0 init
1622 11:40:44.075900 Initializing PCH PCIe bridge.
1623 11:40:44.078872 PCI: 00:1d.0 init finished in 3 msecs
1624 11:40:44.082579 PCI: 00:1f.0 init
1625 11:40:44.085689 IOAPIC: Initializing IOAPIC at 0xfec00000
1626 11:40:44.092267 IOAPIC: Bootstrap Processor Local APIC = 0x00
1627 11:40:44.092349 IOAPIC: ID = 0x02
1628 11:40:44.095409 IOAPIC: Dumping registers
1629 11:40:44.098919 reg 0x0000: 0x02000000
1630 11:40:44.101903 reg 0x0001: 0x00770020
1631 11:40:44.101985 reg 0x0002: 0x00000000
1632 11:40:44.108640 PCI: 00:1f.0 init finished in 21 msecs
1633 11:40:44.108722 PCI: 00:1f.2 init
1634 11:40:44.111648 Disabling ACPI via APMC.
1635 11:40:44.116916 APMC done.
1636 11:40:44.119986 PCI: 00:1f.2 init finished in 6 msecs
1637 11:40:44.131678 PCI: 01:00.0 init
1638 11:40:44.135150 PCI: 01:00.0 init finished in 0 msecs
1639 11:40:44.138335 PNP: 0c09.0 init
1640 11:40:44.145039 Google Chrome EC uptime: 8.441 seconds
1641 11:40:44.148497 Google Chrome AP resets since EC boot: 1
1642 11:40:44.151901 Google Chrome most recent AP reset causes:
1643 11:40:44.154915 0.484: 32775 shutdown: entering G3
1644 11:40:44.161782 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1645 11:40:44.164938 PNP: 0c09.0 init finished in 24 msecs
1646 11:40:44.171827 Devices initialized
1647 11:40:44.175090 Show all devs... After init.
1648 11:40:44.178065 Root Device: enabled 1
1649 11:40:44.178148 DOMAIN: 0000: enabled 1
1650 11:40:44.181586 CPU_CLUSTER: 0: enabled 1
1651 11:40:44.184962 PCI: 00:00.0: enabled 1
1652 11:40:44.188015 PCI: 00:02.0: enabled 1
1653 11:40:44.188096 PCI: 00:04.0: enabled 1
1654 11:40:44.191376 PCI: 00:05.0: enabled 1
1655 11:40:44.194781 PCI: 00:06.0: enabled 0
1656 11:40:44.197982 PCI: 00:07.0: enabled 0
1657 11:40:44.198064 PCI: 00:07.1: enabled 0
1658 11:40:44.201463 PCI: 00:07.2: enabled 0
1659 11:40:44.204863 PCI: 00:07.3: enabled 0
1660 11:40:44.208284 PCI: 00:08.0: enabled 1
1661 11:40:44.208366 PCI: 00:09.0: enabled 0
1662 11:40:44.211222 PCI: 00:0a.0: enabled 0
1663 11:40:44.214581 PCI: 00:0d.0: enabled 1
1664 11:40:44.217739 PCI: 00:0d.1: enabled 0
1665 11:40:44.217821 PCI: 00:0d.2: enabled 0
1666 11:40:44.221586 PCI: 00:0d.3: enabled 0
1667 11:40:44.224853 PCI: 00:0e.0: enabled 0
1668 11:40:44.228310 PCI: 00:10.2: enabled 1
1669 11:40:44.228392 PCI: 00:10.6: enabled 0
1670 11:40:44.231162 PCI: 00:10.7: enabled 0
1671 11:40:44.234626 PCI: 00:12.0: enabled 0
1672 11:40:44.234708 PCI: 00:12.6: enabled 0
1673 11:40:44.237899 PCI: 00:13.0: enabled 0
1674 11:40:44.241072 PCI: 00:14.0: enabled 1
1675 11:40:44.244462 PCI: 00:14.1: enabled 0
1676 11:40:44.244544 PCI: 00:14.2: enabled 1
1677 11:40:44.247559 PCI: 00:14.3: enabled 1
1678 11:40:44.251037 PCI: 00:15.0: enabled 1
1679 11:40:44.254326 PCI: 00:15.1: enabled 1
1680 11:40:44.254407 PCI: 00:15.2: enabled 1
1681 11:40:44.257350 PCI: 00:15.3: enabled 1
1682 11:40:44.260658 PCI: 00:16.0: enabled 1
1683 11:40:44.264052 PCI: 00:16.1: enabled 0
1684 11:40:44.264133 PCI: 00:16.2: enabled 0
1685 11:40:44.267699 PCI: 00:16.3: enabled 0
1686 11:40:44.270946 PCI: 00:16.4: enabled 0
1687 11:40:44.274148 PCI: 00:16.5: enabled 0
1688 11:40:44.274230 PCI: 00:17.0: enabled 0
1689 11:40:44.277155 PCI: 00:19.0: enabled 0
1690 11:40:44.280543 PCI: 00:19.1: enabled 1
1691 11:40:44.283958 PCI: 00:19.2: enabled 0
1692 11:40:44.284039 PCI: 00:1c.0: enabled 1
1693 11:40:44.287108 PCI: 00:1c.1: enabled 0
1694 11:40:44.290481 PCI: 00:1c.2: enabled 0
1695 11:40:44.290563 PCI: 00:1c.3: enabled 0
1696 11:40:44.294134 PCI: 00:1c.4: enabled 0
1697 11:40:44.297325 PCI: 00:1c.5: enabled 0
1698 11:40:44.300382 PCI: 00:1c.6: enabled 1
1699 11:40:44.300464 PCI: 00:1c.7: enabled 0
1700 11:40:44.303685 PCI: 00:1d.0: enabled 1
1701 11:40:44.307118 PCI: 00:1d.1: enabled 0
1702 11:40:44.310410 PCI: 00:1d.2: enabled 1
1703 11:40:44.310497 PCI: 00:1d.3: enabled 0
1704 11:40:44.313480 PCI: 00:1e.0: enabled 1
1705 11:40:44.316869 PCI: 00:1e.1: enabled 0
1706 11:40:44.320316 PCI: 00:1e.2: enabled 1
1707 11:40:44.320398 PCI: 00:1e.3: enabled 1
1708 11:40:44.323339 PCI: 00:1f.0: enabled 1
1709 11:40:44.326886 PCI: 00:1f.1: enabled 0
1710 11:40:44.330182 PCI: 00:1f.2: enabled 1
1711 11:40:44.330264 PCI: 00:1f.3: enabled 1
1712 11:40:44.333598 PCI: 00:1f.4: enabled 0
1713 11:40:44.336746 PCI: 00:1f.5: enabled 1
1714 11:40:44.340324 PCI: 00:1f.6: enabled 0
1715 11:40:44.340407 PCI: 00:1f.7: enabled 0
1716 11:40:44.343666 APIC: 00: enabled 1
1717 11:40:44.346906 GENERIC: 0.0: enabled 1
1718 11:40:44.346989 GENERIC: 0.0: enabled 1
1719 11:40:44.350184 GENERIC: 1.0: enabled 1
1720 11:40:44.353608 GENERIC: 0.0: enabled 1
1721 11:40:44.356779 GENERIC: 1.0: enabled 1
1722 11:40:44.356861 USB0 port 0: enabled 1
1723 11:40:44.360180 GENERIC: 0.0: enabled 1
1724 11:40:44.363287 USB0 port 0: enabled 1
1725 11:40:44.363370 GENERIC: 0.0: enabled 1
1726 11:40:44.366809 I2C: 00:1a: enabled 1
1727 11:40:44.369840 I2C: 00:31: enabled 1
1728 11:40:44.369922 I2C: 00:32: enabled 1
1729 11:40:44.373197 I2C: 00:10: enabled 1
1730 11:40:44.376814 I2C: 00:15: enabled 1
1731 11:40:44.380029 GENERIC: 0.0: enabled 0
1732 11:40:44.380110 GENERIC: 1.0: enabled 0
1733 11:40:44.383558 GENERIC: 0.0: enabled 1
1734 11:40:44.386513 SPI: 00: enabled 1
1735 11:40:44.386595 SPI: 00: enabled 1
1736 11:40:44.389943 PNP: 0c09.0: enabled 1
1737 11:40:44.393404 GENERIC: 0.0: enabled 1
1738 11:40:44.393527 USB3 port 0: enabled 1
1739 11:40:44.396585 USB3 port 1: enabled 1
1740 11:40:44.399819 USB3 port 2: enabled 0
1741 11:40:44.399901 USB3 port 3: enabled 0
1742 11:40:44.403093 USB2 port 0: enabled 0
1743 11:40:44.406580 USB2 port 1: enabled 1
1744 11:40:44.409710 USB2 port 2: enabled 1
1745 11:40:44.409791 USB2 port 3: enabled 0
1746 11:40:44.413100 USB2 port 4: enabled 1
1747 11:40:44.416350 USB2 port 5: enabled 0
1748 11:40:44.416431 USB2 port 6: enabled 0
1749 11:40:44.419841 USB2 port 7: enabled 0
1750 11:40:44.422922 USB2 port 8: enabled 0
1751 11:40:44.426428 USB2 port 9: enabled 0
1752 11:40:44.426517 USB3 port 0: enabled 0
1753 11:40:44.429811 USB3 port 1: enabled 1
1754 11:40:44.432785 USB3 port 2: enabled 0
1755 11:40:44.432869 USB3 port 3: enabled 0
1756 11:40:44.436247 GENERIC: 0.0: enabled 1
1757 11:40:44.439573 GENERIC: 1.0: enabled 1
1758 11:40:44.439657 APIC: 01: enabled 1
1759 11:40:44.443066 APIC: 07: enabled 1
1760 11:40:44.446234 APIC: 02: enabled 1
1761 11:40:44.446317 APIC: 04: enabled 1
1762 11:40:44.449345 APIC: 06: enabled 1
1763 11:40:44.453019 APIC: 03: enabled 1
1764 11:40:44.453103 APIC: 05: enabled 1
1765 11:40:44.456019 PCI: 01:00.0: enabled 1
1766 11:40:44.462748 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1767 11:40:44.466273 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1768 11:40:44.469297 ELOG: NV offset 0xf30000 size 0x1000
1769 11:40:44.476711 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1770 11:40:44.483230 ELOG: Event(17) added with size 13 at 2023-04-03 11:40:44 UTC
1771 11:40:44.490125 ELOG: Event(92) added with size 9 at 2023-04-03 11:40:44 UTC
1772 11:40:44.496731 ELOG: Event(93) added with size 9 at 2023-04-03 11:40:44 UTC
1773 11:40:44.503354 ELOG: Event(9E) added with size 10 at 2023-04-03 11:40:44 UTC
1774 11:40:44.510104 ELOG: Event(9F) added with size 14 at 2023-04-03 11:40:44 UTC
1775 11:40:44.516123 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1776 11:40:44.523251 ELOG: Event(A1) added with size 10 at 2023-04-03 11:40:44 UTC
1777 11:40:44.529348 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1778 11:40:44.535854 ELOG: Event(A0) added with size 9 at 2023-04-03 11:40:44 UTC
1779 11:40:44.539335 elog_add_boot_reason: Logged dev mode boot
1780 11:40:44.545598 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1781 11:40:44.549082 Finalize devices...
1782 11:40:44.549182 Devices finalized
1783 11:40:44.555825 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1784 11:40:44.558870 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1785 11:40:44.565599 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1786 11:40:44.568865 ME: HFSTS1 : 0x80030055
1787 11:40:44.575786 ME: HFSTS2 : 0x30280116
1788 11:40:44.578525 ME: HFSTS3 : 0x00000050
1789 11:40:44.585415 ME: HFSTS4 : 0x00004000
1790 11:40:44.588758 ME: HFSTS5 : 0x00000000
1791 11:40:44.592050 ME: HFSTS6 : 0x40400006
1792 11:40:44.595403 ME: Manufacturing Mode : YES
1793 11:40:44.601987 ME: SPI Protection Mode Enabled : NO
1794 11:40:44.604891 ME: FW Partition Table : OK
1795 11:40:44.608353 ME: Bringup Loader Failure : NO
1796 11:40:44.611703 ME: Firmware Init Complete : NO
1797 11:40:44.614942 ME: Boot Options Present : NO
1798 11:40:44.618793 ME: Update In Progress : NO
1799 11:40:44.621638 ME: D0i3 Support : YES
1800 11:40:44.625089 ME: Low Power State Enabled : NO
1801 11:40:44.631663 ME: CPU Replaced : YES
1802 11:40:44.634912 ME: CPU Replacement Valid : YES
1803 11:40:44.637992 ME: Current Working State : 5
1804 11:40:44.641351 ME: Current Operation State : 1
1805 11:40:44.644782 ME: Current Operation Mode : 3
1806 11:40:44.647835 ME: Error Code : 0
1807 11:40:44.651471 ME: Enhanced Debug Mode : NO
1808 11:40:44.654581 ME: CPU Debug Disabled : YES
1809 11:40:44.661377 ME: TXT Support : NO
1810 11:40:44.664426 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1811 11:40:44.674324 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1812 11:40:44.677630 CBFS: 'fallback/slic' not found.
1813 11:40:44.681232 ACPI: Writing ACPI tables at 76b01000.
1814 11:40:44.681343 ACPI: * FACS
1815 11:40:44.684559 ACPI: * DSDT
1816 11:40:44.687850 Ramoops buffer: 0x100000@0x76a00000.
1817 11:40:44.694109 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1818 11:40:44.697494 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1819 11:40:44.700791 Google Chrome EC: version:
1820 11:40:44.703843 ro: voema_v2.0.10114-a447f03e46
1821 11:40:44.707365 rw: voema_v2.0.10114-a447f03e46
1822 11:40:44.710546 running image: 2
1823 11:40:44.717320 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1824 11:40:44.720607 ACPI: * FADT
1825 11:40:44.720692 SCI is IRQ9
1826 11:40:44.727233 ACPI: added table 1/32, length now 40
1827 11:40:44.727319 ACPI: * SSDT
1828 11:40:44.730455 Found 1 CPU(s) with 8 core(s) each.
1829 11:40:44.737045 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1830 11:40:44.740519 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1831 11:40:44.743851 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1832 11:40:44.746966 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1833 11:40:44.753737 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1834 11:40:44.760242 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1835 11:40:44.763880 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1836 11:40:44.770110 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1837 11:40:44.776913 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1838 11:40:44.780121 \_SB.PCI0.RP09: Added StorageD3Enable property
1839 11:40:44.786726 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1840 11:40:44.789885 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1841 11:40:44.797060 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1842 11:40:44.800262 PS2K: Passing 80 keymaps to kernel
1843 11:40:44.807001 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1844 11:40:44.813309 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1845 11:40:44.820212 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1846 11:40:44.826761 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1847 11:40:44.833149 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1848 11:40:44.839993 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1849 11:40:44.846996 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1850 11:40:44.853243 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1851 11:40:44.856282 ACPI: added table 2/32, length now 44
1852 11:40:44.859894 ACPI: * MCFG
1853 11:40:44.863024 ACPI: added table 3/32, length now 48
1854 11:40:44.863105 ACPI: * TPM2
1855 11:40:44.866081 TPM2 log created at 0x769f0000
1856 11:40:44.869425 ACPI: added table 4/32, length now 52
1857 11:40:44.872748 ACPI: * MADT
1858 11:40:44.872828 SCI is IRQ9
1859 11:40:44.876320 ACPI: added table 5/32, length now 56
1860 11:40:44.879628 current = 76b09850
1861 11:40:44.882895 ACPI: * DMAR
1862 11:40:44.886010 ACPI: added table 6/32, length now 60
1863 11:40:44.889258 ACPI: added table 7/32, length now 64
1864 11:40:44.889339 ACPI: * HPET
1865 11:40:44.892547 ACPI: added table 8/32, length now 68
1866 11:40:44.896250 ACPI: done.
1867 11:40:44.899352 ACPI tables: 35216 bytes.
1868 11:40:44.902883 smbios_write_tables: 769ef000
1869 11:40:44.905886 EC returned error result code 3
1870 11:40:44.909367 Couldn't obtain OEM name from CBI
1871 11:40:44.912432 Create SMBIOS type 16
1872 11:40:44.915863 Create SMBIOS type 17
1873 11:40:44.915943 GENERIC: 0.0 (WIFI Device)
1874 11:40:44.919280 SMBIOS tables: 1734 bytes.
1875 11:40:44.925739 Writing table forward entry at 0x00000500
1876 11:40:44.928929 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1877 11:40:44.935497 Writing coreboot table at 0x76b25000
1878 11:40:44.939108 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1879 11:40:44.945419 1. 0000000000001000-000000000009ffff: RAM
1880 11:40:44.948747 2. 00000000000a0000-00000000000fffff: RESERVED
1881 11:40:44.952333 3. 0000000000100000-00000000769eefff: RAM
1882 11:40:44.958915 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1883 11:40:44.965747 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1884 11:40:44.968783 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1885 11:40:44.975660 7. 0000000077000000-000000007fbfffff: RESERVED
1886 11:40:44.978973 8. 00000000c0000000-00000000cfffffff: RESERVED
1887 11:40:44.985317 9. 00000000f8000000-00000000f9ffffff: RESERVED
1888 11:40:44.988653 10. 00000000fb000000-00000000fb000fff: RESERVED
1889 11:40:44.996050 11. 00000000fe000000-00000000fe00ffff: RESERVED
1890 11:40:44.998990 12. 00000000fed80000-00000000fed87fff: RESERVED
1891 11:40:45.002166 13. 00000000fed90000-00000000fed92fff: RESERVED
1892 11:40:45.008726 14. 00000000feda0000-00000000feda1fff: RESERVED
1893 11:40:45.012006 15. 00000000fedc0000-00000000feddffff: RESERVED
1894 11:40:45.018712 16. 0000000100000000-00000004803fffff: RAM
1895 11:40:45.022031 Passing 4 GPIOs to payload:
1896 11:40:45.025057 NAME | PORT | POLARITY | VALUE
1897 11:40:45.031605 lid | undefined | high | high
1898 11:40:45.035250 power | undefined | high | low
1899 11:40:45.041712 oprom | undefined | high | low
1900 11:40:45.048205 EC in RW | 0x000000e5 | high | high
1901 11:40:45.051611 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865
1902 11:40:45.054927 coreboot table: 1576 bytes.
1903 11:40:45.057980 IMD ROOT 0. 0x76fff000 0x00001000
1904 11:40:45.064588 IMD SMALL 1. 0x76ffe000 0x00001000
1905 11:40:45.068020 FSP MEMORY 2. 0x76c4e000 0x003b0000
1906 11:40:45.071017 VPD 3. 0x76c4d000 0x00000367
1907 11:40:45.074429 RO MCACHE 4. 0x76c4c000 0x00000fdc
1908 11:40:45.077697 CONSOLE 5. 0x76c2c000 0x00020000
1909 11:40:45.081057 FMAP 6. 0x76c2b000 0x00000578
1910 11:40:45.084386 TIME STAMP 7. 0x76c2a000 0x00000910
1911 11:40:45.091057 VBOOT WORK 8. 0x76c16000 0x00014000
1912 11:40:45.094070 ROMSTG STCK 9. 0x76c15000 0x00001000
1913 11:40:45.097345 AFTER CAR 10. 0x76c0a000 0x0000b000
1914 11:40:45.100902 RAMSTAGE 11. 0x76b97000 0x00073000
1915 11:40:45.104505 REFCODE 12. 0x76b42000 0x00055000
1916 11:40:45.107231 SMM BACKUP 13. 0x76b32000 0x00010000
1917 11:40:45.111076 4f444749 14. 0x76b30000 0x00002000
1918 11:40:45.114179 EXT VBT15. 0x76b2d000 0x0000219f
1919 11:40:45.117504 COREBOOT 16. 0x76b25000 0x00008000
1920 11:40:45.123721 ACPI 17. 0x76b01000 0x00024000
1921 11:40:45.127094 ACPI GNVS 18. 0x76b00000 0x00001000
1922 11:40:45.130697 RAMOOPS 19. 0x76a00000 0x00100000
1923 11:40:45.133932 TPM2 TCGLOG20. 0x769f0000 0x00010000
1924 11:40:45.137163 SMBIOS 21. 0x769ef000 0x00000800
1925 11:40:45.140177 IMD small region:
1926 11:40:45.143889 IMD ROOT 0. 0x76ffec00 0x00000400
1927 11:40:45.146873 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1928 11:40:45.150369 POWER STATE 2. 0x76ffeb80 0x00000044
1929 11:40:45.154059 ROMSTAGE 3. 0x76ffeb60 0x00000004
1930 11:40:45.160271 MEM INFO 4. 0x76ffe980 0x000001e0
1931 11:40:45.163424 BS: BS_WRITE_TABLES run times (exec / console): 9 / 484 ms
1932 11:40:45.166813 MTRR: Physical address space:
1933 11:40:45.173642 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1934 11:40:45.180025 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1935 11:40:45.186885 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1936 11:40:45.193487 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1937 11:40:45.200097 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1938 11:40:45.206571 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1939 11:40:45.210450 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1940 11:40:45.216476 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 11:40:45.219827 MTRR: Fixed MSR 0x258 0x0606060606060606
1942 11:40:45.223402 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 11:40:45.226372 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 11:40:45.233423 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 11:40:45.236341 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 11:40:45.239823 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 11:40:45.242988 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 11:40:45.249457 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 11:40:45.252901 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 11:40:45.256003 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 11:40:45.260013 call enable_fixed_mtrr()
1952 11:40:45.263638 CPU physical address size: 39 bits
1953 11:40:45.270125 MTRR: default type WB/UC MTRR counts: 6/7.
1954 11:40:45.273908 MTRR: WB selected as default type.
1955 11:40:45.279956 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1956 11:40:45.283504 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1957 11:40:45.290119 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1958 11:40:45.296597 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1959 11:40:45.303427 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1960 11:40:45.310030 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1961 11:40:45.313488
1962 11:40:45.313610 MTRR check
1963 11:40:45.316917 Fixed MTRRs : Enabled
1964 11:40:45.316999 Variable MTRRs: Enabled
1965 11:40:45.317063
1966 11:40:45.323751 MTRR: Fixed MSR 0x250 0x0606060606060606
1967 11:40:45.326877 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 11:40:45.330109 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 11:40:45.333356 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 11:40:45.340420 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 11:40:45.343798 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 11:40:45.346511 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 11:40:45.350123 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 11:40:45.356786 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 11:40:45.359905 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 11:40:45.363260 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 11:40:45.366559 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 11:40:45.373140 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 11:40:45.376502 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 11:40:45.379800 MTRR: Fixed MSR 0x259 0x0000000000000000
1981 11:40:45.382977 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 11:40:45.386685 MTRR: Fixed MSR 0x269 0x0606060606060606
1983 11:40:45.392975 MTRR: Fixed MSR 0x26a 0x0606060606060606
1984 11:40:45.396356 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 11:40:45.399813 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 11:40:45.402953 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 11:40:45.409784 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 11:40:45.412631 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 11:40:45.419516 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 11:40:45.422864 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 11:40:45.426348 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 11:40:45.429797 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 11:40:45.436254 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 11:40:45.439705 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 11:40:45.442996 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 11:40:45.446261 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 11:40:45.452725 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 11:40:45.455830 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 11:40:45.459237 call enable_fixed_mtrr()
2000 11:40:45.462612 call enable_fixed_mtrr()
2001 11:40:45.466210 MTRR: Fixed MSR 0x250 0x0606060606060606
2002 11:40:45.469302 MTRR: Fixed MSR 0x250 0x0606060606060606
2003 11:40:45.475778 MTRR: Fixed MSR 0x258 0x0606060606060606
2004 11:40:45.479246 MTRR: Fixed MSR 0x259 0x0000000000000000
2005 11:40:45.482626 MTRR: Fixed MSR 0x268 0x0606060606060606
2006 11:40:45.485902 MTRR: Fixed MSR 0x269 0x0606060606060606
2007 11:40:45.492184 MTRR: Fixed MSR 0x26a 0x0606060606060606
2008 11:40:45.495446 MTRR: Fixed MSR 0x26b 0x0606060606060606
2009 11:40:45.499097 MTRR: Fixed MSR 0x26c 0x0606060606060606
2010 11:40:45.501960 MTRR: Fixed MSR 0x26d 0x0606060606060606
2011 11:40:45.509319 MTRR: Fixed MSR 0x26e 0x0606060606060606
2012 11:40:45.512089 MTRR: Fixed MSR 0x26f 0x0606060606060606
2013 11:40:45.518502 MTRR: Fixed MSR 0x258 0x0606060606060606
2014 11:40:45.518584 call enable_fixed_mtrr()
2015 11:40:45.525147 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 11:40:45.528614 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 11:40:45.531734 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 11:40:45.535025 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 11:40:45.541610 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 11:40:45.544755 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 11:40:45.548497 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 11:40:45.551371 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 11:40:45.558000 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 11:40:45.560998 CPU physical address size: 39 bits
2025 11:40:45.566026 call enable_fixed_mtrr()
2026 11:40:45.569393 CPU physical address size: 39 bits
2027 11:40:45.574154 CPU physical address size: 39 bits
2028 11:40:45.580325 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2029 11:40:45.583672 call enable_fixed_mtrr()
2030 11:40:45.587628 Checking cr50 for pending updates
2031 11:40:45.590936 CPU physical address size: 39 bits
2032 11:40:45.594352 MTRR: Fixed MSR 0x250 0x0606060606060606
2033 11:40:45.597360 MTRR: Fixed MSR 0x250 0x0606060606060606
2034 11:40:45.604285 MTRR: Fixed MSR 0x258 0x0606060606060606
2035 11:40:45.607624 MTRR: Fixed MSR 0x259 0x0000000000000000
2036 11:40:45.610628 MTRR: Fixed MSR 0x268 0x0606060606060606
2037 11:40:45.614244 MTRR: Fixed MSR 0x269 0x0606060606060606
2038 11:40:45.620736 MTRR: Fixed MSR 0x26a 0x0606060606060606
2039 11:40:45.624170 MTRR: Fixed MSR 0x26b 0x0606060606060606
2040 11:40:45.627515 MTRR: Fixed MSR 0x26c 0x0606060606060606
2041 11:40:45.630749 MTRR: Fixed MSR 0x26d 0x0606060606060606
2042 11:40:45.637290 MTRR: Fixed MSR 0x26e 0x0606060606060606
2043 11:40:45.640916 MTRR: Fixed MSR 0x26f 0x0606060606060606
2044 11:40:45.647304 MTRR: Fixed MSR 0x258 0x0606060606060606
2045 11:40:45.650887 MTRR: Fixed MSR 0x259 0x0000000000000000
2046 11:40:45.654014 MTRR: Fixed MSR 0x268 0x0606060606060606
2047 11:40:45.657154 MTRR: Fixed MSR 0x269 0x0606060606060606
2048 11:40:45.663679 MTRR: Fixed MSR 0x26a 0x0606060606060606
2049 11:40:45.667127 MTRR: Fixed MSR 0x26b 0x0606060606060606
2050 11:40:45.670449 MTRR: Fixed MSR 0x26c 0x0606060606060606
2051 11:40:45.674032 MTRR: Fixed MSR 0x26d 0x0606060606060606
2052 11:40:45.680345 MTRR: Fixed MSR 0x26e 0x0606060606060606
2053 11:40:45.683868 MTRR: Fixed MSR 0x26f 0x0606060606060606
2054 11:40:45.687125 call enable_fixed_mtrr()
2055 11:40:45.690088 call enable_fixed_mtrr()
2056 11:40:45.693765 CPU physical address size: 39 bits
2057 11:40:45.696721 CPU physical address size: 39 bits
2058 11:40:45.700868 CPU physical address size: 39 bits
2059 11:40:45.703939 Reading cr50 TPM mode
2060 11:40:45.714529 BS: BS_PAYLOAD_LOAD entry times (exec / console): 122 / 6 ms
2061 11:40:45.724280 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2062 11:40:45.727787 Checking segment from ROM address 0xffc02b38
2063 11:40:45.730828 Checking segment from ROM address 0xffc02b54
2064 11:40:45.737618 Loading segment from ROM address 0xffc02b38
2065 11:40:45.737702 code (compression=0)
2066 11:40:45.747522 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2067 11:40:45.757734 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2068 11:40:45.757818 it's not compressed!
2069 11:40:45.899008 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2070 11:40:45.905390 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2071 11:40:45.912321 Loading segment from ROM address 0xffc02b54
2072 11:40:45.915487 Entry Point 0x30000000
2073 11:40:45.915569 Loaded segments
2074 11:40:45.922056 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2075 11:40:45.967192 Finalizing chipset.
2076 11:40:45.970750 Finalizing SMM.
2077 11:40:45.970843 APMC done.
2078 11:40:45.976957 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2079 11:40:45.980589 mp_park_aps done after 0 msecs.
2080 11:40:45.983670 Jumping to boot code at 0x30000000(0x76b25000)
2081 11:40:45.993336 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2082 11:40:45.993419
2083 11:40:45.993510
2084 11:40:45.996935
2085 11:40:45.997015 Starting depthcharge on Voema...
2086 11:40:45.997412 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2087 11:40:45.997541 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2088 11:40:45.997625 Setting prompt string to ['volteer:']
2089 11:40:45.997706 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2090 11:40:46.000084
2091 11:40:46.006878 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2092 11:40:46.006960
2093 11:40:46.013343 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2094 11:40:46.013424
2095 11:40:46.019837 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2096 11:40:46.019917
2097 11:40:46.023346 Failed to find eMMC card reader
2098 11:40:46.023427
2099 11:40:46.026359 Wipe memory regions:
2100 11:40:46.026440
2101 11:40:46.029832 [0x00000000001000, 0x000000000a0000)
2102 11:40:46.029917
2103 11:40:46.032965 [0x00000000100000, 0x00000030000000)
2104 11:40:46.068788
2105 11:40:46.072278 [0x00000032662db0, 0x000000769ef000)
2106 11:40:46.119977
2107 11:40:46.123054 [0x00000100000000, 0x00000480400000)
2108 11:40:46.752502
2109 11:40:46.755246 ec_init: CrosEC protocol v3 supported (256, 256)
2110 11:40:47.186623
2111 11:40:47.186757 R8152: Initializing
2112 11:40:47.186824
2113 11:40:47.189753 Version 6 (ocp_data = 5c30)
2114 11:40:47.189834
2115 11:40:47.193040 R8152: Done initializing
2116 11:40:47.193121
2117 11:40:47.196165 Adding net device
2118 11:40:47.499160
2119 11:40:47.501890 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2120 11:40:47.501979
2121 11:40:47.502065
2122 11:40:47.502127
2123 11:40:47.505436 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2125 11:40:47.606275 volteer: tftpboot 192.168.201.1 9849717/tftp-deploy-loe02mlv/kernel/bzImage 9849717/tftp-deploy-loe02mlv/kernel/cmdline 9849717/tftp-deploy-loe02mlv/ramdisk/ramdisk.cpio.gz
2126 11:40:47.606423 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2127 11:40:47.606522 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2128 11:40:47.611132 tftpboot 192.168.201.1 9849717/tftp-deploy-loe02mlv/kernel/bzImoy-loe02mlv/kernel/cmdline 9849717/tftp-deploy-loe02mlv/ramdisk/ramdisk.cpio.gz
2129 11:40:47.611219
2130 11:40:47.611283 Waiting for link
2131 11:40:47.813940
2132 11:40:47.814074 done.
2133 11:40:47.814140
2134 11:40:47.814200 MAC: 00:24:32:30:7a:04
2135 11:40:47.814272
2136 11:40:47.817070 Sending DHCP discover... done.
2137 11:40:47.817151
2138 11:40:47.820490 Waiting for reply... done.
2139 11:40:47.820571
2140 11:40:47.823588 Sending DHCP request... done.
2141 11:40:47.823669
2142 11:40:47.826995 Waiting for reply... done.
2143 11:40:47.827076
2144 11:40:47.830505 My ip is 192.168.201.22
2145 11:40:47.830585
2146 11:40:47.833605 The DHCP server ip is 192.168.201.1
2147 11:40:47.833685
2148 11:40:47.840029 TFTP server IP predefined by user: 192.168.201.1
2149 11:40:47.840110
2150 11:40:47.846701 Bootfile predefined by user: 9849717/tftp-deploy-loe02mlv/kernel/bzImage
2151 11:40:47.846782
2152 11:40:47.849921 Sending tftp read request... done.
2153 11:40:47.850001
2154 11:40:47.853376 Waiting for the transfer...
2155 11:40:47.853506
2156 11:40:48.429356 00000000 ################################################################
2157 11:40:48.429494
2158 11:40:49.005268 00080000 ################################################################
2159 11:40:49.005401
2160 11:40:49.579752 00100000 ################################################################
2161 11:40:49.579880
2162 11:40:50.155734 00180000 ################################################################
2163 11:40:50.155870
2164 11:40:50.733481 00200000 ################################################################
2165 11:40:50.733612
2166 11:40:51.265736 00280000 ################################################################
2167 11:40:51.265874
2168 11:40:51.779111 00300000 ################################################################
2169 11:40:51.779262
2170 11:40:52.293465 00380000 ################################################################
2171 11:40:52.293618
2172 11:40:52.813070 00400000 ################################################################
2173 11:40:52.813233
2174 11:40:53.331566 00480000 ################################################################
2175 11:40:53.331740
2176 11:40:53.848304 00500000 ################################################################
2177 11:40:53.848446
2178 11:40:54.366074 00580000 ################################################################
2179 11:40:54.366208
2180 11:40:54.888047 00600000 ################################################################
2181 11:40:54.888206
2182 11:40:55.408063 00680000 ################################################################
2183 11:40:55.408198
2184 11:40:55.933597 00700000 ################################################################
2185 11:40:55.933730
2186 11:40:55.950317 00780000 ## done.
2187 11:40:55.950402
2188 11:40:55.953773 The bootfile was 7880592 bytes long.
2189 11:40:55.953860
2190 11:40:55.956923 Sending tftp read request... done.
2191 11:40:55.957006
2192 11:40:55.960048 Waiting for the transfer...
2193 11:40:55.960130
2194 11:40:56.493701 00000000 ################################################################
2195 11:40:56.493847
2196 11:40:57.009387 00080000 ################################################################
2197 11:40:57.009574
2198 11:40:57.526075 00100000 ################################################################
2199 11:40:57.526227
2200 11:40:58.053719 00180000 ################################################################
2201 11:40:58.053861
2202 11:40:58.583021 00200000 ################################################################
2203 11:40:58.583160
2204 11:40:59.110027 00280000 ################################################################
2205 11:40:59.110175
2206 11:40:59.640504 00300000 ################################################################
2207 11:40:59.640682
2208 11:41:00.158142 00380000 ################################################################
2209 11:41:00.158301
2210 11:41:00.678238 00400000 ################################################################
2211 11:41:00.678390
2212 11:41:01.200293 00480000 ################################################################
2213 11:41:01.200484
2214 11:41:01.720809 00500000 ################################################################
2215 11:41:01.720976
2216 11:41:02.230326 00580000 ################################################################
2217 11:41:02.230509
2218 11:41:02.745689 00600000 ################################################################
2219 11:41:02.745860
2220 11:41:03.278970 00680000 ################################################################
2221 11:41:03.279130
2222 11:41:03.802888 00700000 ################################################################
2223 11:41:03.803052
2224 11:41:04.333584 00780000 ################################################################
2225 11:41:04.333719
2226 11:41:04.769212 00800000 ##################################################### done.
2227 11:41:04.769377
2228 11:41:04.772208 Sending tftp read request... done.
2229 11:41:04.772291
2230 11:41:04.775693 Waiting for the transfer...
2231 11:41:04.775776
2232 11:41:04.775841 00000000 # done.
2233 11:41:04.775903
2234 11:41:04.785231 Command line loaded dynamically from TFTP file: 9849717/tftp-deploy-loe02mlv/kernel/cmdline
2235 11:41:04.785340
2236 11:41:04.798442 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2237 11:41:04.802393
2238 11:41:04.805886 Shutting down all USB controllers.
2239 11:41:04.805969
2240 11:41:04.806034 Removing current net device
2241 11:41:04.806096
2242 11:41:04.809269 Finalizing coreboot
2243 11:41:04.809351
2244 11:41:04.815784 Exiting depthcharge with code 4 at timestamp: 27439655
2245 11:41:04.815891
2246 11:41:04.815982
2247 11:41:04.816070 Starting kernel ...
2248 11:41:04.816157
2249 11:41:04.816241
2250 11:41:04.816824 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2251 11:41:04.816946 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2252 11:41:04.817024 Setting prompt string to ['Linux version [0-9]']
2253 11:41:04.817094 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2254 11:41:04.817164 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2256 11:45:30.818099 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2258 11:45:30.819227 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2260 11:45:30.820069 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2263 11:45:30.821554 end: 2 depthcharge-action (duration 00:05:00) [common]
2265 11:45:30.822806 Cleaning after the job
2266 11:45:30.823292 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849717/tftp-deploy-loe02mlv/ramdisk
2267 11:45:30.827395 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849717/tftp-deploy-loe02mlv/kernel
2268 11:45:30.830951 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849717/tftp-deploy-loe02mlv/modules
2269 11:45:30.832262 start: 5.1 power-off (timeout 00:00:30) [common]
2270 11:45:30.833141 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
2271 11:45:30.913927 >> Command sent successfully.
2272 11:45:30.918885 Returned 0 in 0 seconds
2273 11:45:31.020397 end: 5.1 power-off (duration 00:00:00) [common]
2275 11:45:31.022038 start: 5.2 read-feedback (timeout 00:10:00) [common]
2276 11:45:31.023543 Listened to connection for namespace 'common' for up to 1s
2277 11:45:32.025769 Finalising connection for namespace 'common'
2278 11:45:32.026466 Disconnecting from shell: Finalise
2279 11:45:32.026896
2280 11:45:32.128430 end: 5.2 read-feedback (duration 00:00:01) [common]
2281 11:45:32.129061 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9849717
2282 11:45:32.161776 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9849717
2283 11:45:32.162265 JobError: Your job cannot terminate cleanly.