Boot log: acer-cb317-1h-c3z6-dedede
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 11:40:33.356997 lava-dispatcher, installed at version: 2023.01
2 11:40:33.357212 start: 0 validate
3 11:40:33.357340 Start time: 2023-04-03 11:40:33.357331+00:00 (UTC)
4 11:40:33.357459 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:40:33.357584 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230324.0%2Fx86%2Frootfs.cpio.gz exists
6 11:40:33.653177 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:40:33.654054 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1098-g8d34bf42efd9b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:40:33.944383 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:40:33.945168 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1098-g8d34bf42efd9b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 11:40:49.527283 validate duration: 16.17
12 11:40:49.527554 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:40:49.527650 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:40:49.527734 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:40:49.527828 Not decompressing ramdisk as can be used compressed.
16 11:40:49.527908 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230324.0/x86/rootfs.cpio.gz
17 11:40:49.527996 saving as /var/lib/lava/dispatcher/tmp/9849680/tftp-deploy-lcshddqx/ramdisk/rootfs.cpio.gz
18 11:40:49.528082 total size: 8429597 (8MB)
19 11:40:50.399338 progress 0% (0MB)
20 11:40:50.404382 progress 5% (0MB)
21 11:40:50.406451 progress 10% (0MB)
22 11:40:50.408595 progress 15% (1MB)
23 11:40:50.410665 progress 20% (1MB)
24 11:40:50.412743 progress 25% (2MB)
25 11:40:50.414786 progress 30% (2MB)
26 11:40:50.416867 progress 35% (2MB)
27 11:40:50.418753 progress 40% (3MB)
28 11:40:50.420839 progress 45% (3MB)
29 11:40:50.422877 progress 50% (4MB)
30 11:40:50.424937 progress 55% (4MB)
31 11:40:50.426941 progress 60% (4MB)
32 11:40:50.428943 progress 65% (5MB)
33 11:40:50.430944 progress 70% (5MB)
34 11:40:50.432799 progress 75% (6MB)
35 11:40:50.434793 progress 80% (6MB)
36 11:40:50.436793 progress 85% (6MB)
37 11:40:50.438792 progress 90% (7MB)
38 11:40:50.440792 progress 95% (7MB)
39 11:40:50.442824 progress 100% (8MB)
40 11:40:50.442951 8MB downloaded in 0.91s (8.79MB/s)
41 11:40:50.443096 end: 1.1.1 http-download (duration 00:00:01) [common]
43 11:40:50.443334 end: 1.1 download-retry (duration 00:00:01) [common]
44 11:40:50.443421 start: 1.2 download-retry (timeout 00:09:59) [common]
45 11:40:50.443503 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 11:40:50.443606 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1098-g8d34bf42efd9b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 11:40:50.443672 saving as /var/lib/lava/dispatcher/tmp/9849680/tftp-deploy-lcshddqx/kernel/bzImage
48 11:40:50.443730 total size: 7880592 (7MB)
49 11:40:50.443788 No compression specified
50 11:40:50.729447 progress 0% (0MB)
51 11:40:50.741296 progress 5% (0MB)
52 11:40:50.752422 progress 10% (0MB)
53 11:40:50.762594 progress 15% (1MB)
54 11:40:50.769547 progress 20% (1MB)
55 11:40:50.774730 progress 25% (1MB)
56 11:40:50.778934 progress 30% (2MB)
57 11:40:50.782502 progress 35% (2MB)
58 11:40:50.785777 progress 40% (3MB)
59 11:40:50.788831 progress 45% (3MB)
60 11:40:50.791495 progress 50% (3MB)
61 11:40:50.794111 progress 55% (4MB)
62 11:40:50.796465 progress 60% (4MB)
63 11:40:50.798891 progress 65% (4MB)
64 11:40:50.801041 progress 70% (5MB)
65 11:40:50.803162 progress 75% (5MB)
66 11:40:50.805177 progress 80% (6MB)
67 11:40:50.807109 progress 85% (6MB)
68 11:40:50.809074 progress 90% (6MB)
69 11:40:50.810932 progress 95% (7MB)
70 11:40:50.812896 progress 100% (7MB)
71 11:40:50.813054 7MB downloaded in 0.37s (20.35MB/s)
72 11:40:50.813192 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:40:50.813419 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:40:50.813504 start: 1.3 download-retry (timeout 00:09:59) [common]
76 11:40:50.813587 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 11:40:50.813693 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1098-g8d34bf42efd9b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 11:40:50.813757 saving as /var/lib/lava/dispatcher/tmp/9849680/tftp-deploy-lcshddqx/modules/modules.tar
79 11:40:50.813816 total size: 251104 (0MB)
80 11:40:50.813874 Using unxz to decompress xz
81 11:40:50.817491 progress 13% (0MB)
82 11:40:50.817885 progress 26% (0MB)
83 11:40:50.818117 progress 39% (0MB)
84 11:40:50.819399 progress 52% (0MB)
85 11:40:50.821355 progress 65% (0MB)
86 11:40:50.823086 progress 78% (0MB)
87 11:40:50.824959 progress 91% (0MB)
88 11:40:50.826734 progress 100% (0MB)
89 11:40:50.832037 0MB downloaded in 0.02s (13.16MB/s)
90 11:40:50.832279 end: 1.3.1 http-download (duration 00:00:00) [common]
92 11:40:50.832530 end: 1.3 download-retry (duration 00:00:00) [common]
93 11:40:50.832625 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 11:40:50.832720 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 11:40:50.832805 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 11:40:50.832891 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 11:40:50.833062 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h
98 11:40:50.833163 makedir: /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin
99 11:40:50.833246 makedir: /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/tests
100 11:40:50.833324 makedir: /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/results
101 11:40:50.833429 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-add-keys
102 11:40:50.833551 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-add-sources
103 11:40:50.833662 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-background-process-start
104 11:40:50.833810 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-background-process-stop
105 11:40:50.833917 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-common-functions
106 11:40:50.834023 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-echo-ipv4
107 11:40:50.834130 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-install-packages
108 11:40:50.834235 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-installed-packages
109 11:40:50.834339 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-os-build
110 11:40:50.834444 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-probe-channel
111 11:40:50.834548 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-probe-ip
112 11:40:50.834651 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-target-ip
113 11:40:50.834754 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-target-mac
114 11:40:50.834857 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-target-storage
115 11:40:50.834965 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-test-case
116 11:40:50.835069 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-test-event
117 11:40:50.835173 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-test-feedback
118 11:40:50.835278 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-test-raise
119 11:40:50.835385 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-test-reference
120 11:40:50.835491 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-test-runner
121 11:40:50.835594 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-test-set
122 11:40:50.835699 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-test-shell
123 11:40:50.835822 Updating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-install-packages (oe)
124 11:40:50.835935 Updating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/bin/lava-installed-packages (oe)
125 11:40:50.836085 Creating /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/environment
126 11:40:50.836171 LAVA metadata
127 11:40:50.836243 - LAVA_JOB_ID=9849680
128 11:40:50.836307 - LAVA_DISPATCHER_IP=192.168.201.1
129 11:40:50.836399 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 11:40:50.836464 skipped lava-vland-overlay
131 11:40:50.836540 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 11:40:50.836619 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 11:40:50.836680 skipped lava-multinode-overlay
134 11:40:50.836751 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 11:40:50.836830 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 11:40:50.836902 Loading test definitions
137 11:40:50.836992 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 11:40:50.837063 Using /lava-9849680 at stage 0
139 11:40:50.837308 uuid=9849680_1.4.2.3.1 testdef=None
140 11:40:50.837395 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 11:40:50.837477 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 11:40:50.837995 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 11:40:50.838217 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 11:40:50.838756 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 11:40:50.838985 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 11:40:50.839505 runner path: /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/0/tests/0_dmesg test_uuid 9849680_1.4.2.3.1
149 11:40:50.839643 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 11:40:50.839922 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 11:40:50.840055 Using /lava-9849680 at stage 1
153 11:40:50.840299 uuid=9849680_1.4.2.3.5 testdef=None
154 11:40:50.840385 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 11:40:50.840467 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 11:40:50.840887 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 11:40:50.841103 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 11:40:50.841642 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 11:40:50.841880 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 11:40:50.842418 runner path: /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/1/tests/1_bootrr test_uuid 9849680_1.4.2.3.5
163 11:40:50.842553 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 11:40:50.842753 Creating lava-test-runner.conf files
166 11:40:50.842816 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/0 for stage 0
167 11:40:50.842895 - 0_dmesg
168 11:40:50.842968 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9849680/lava-overlay-99l37r3h/lava-9849680/1 for stage 1
169 11:40:50.843049 - 1_bootrr
170 11:40:50.843134 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 11:40:50.843218 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 11:40:50.851118 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 11:40:50.851221 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 11:40:50.851305 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 11:40:50.851389 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 11:40:50.851472 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 11:40:51.052142 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 11:40:51.052529 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
179 11:40:51.052641 extracting modules file /var/lib/lava/dispatcher/tmp/9849680/tftp-deploy-lcshddqx/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9849680/extract-overlay-ramdisk-zk360677/ramdisk
180 11:40:51.059730 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 11:40:51.059842 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
182 11:40:51.059927 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9849680/compress-overlay-kfq5xx1w/overlay-1.4.2.4.tar.gz to ramdisk
183 11:40:51.060033 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9849680/compress-overlay-kfq5xx1w/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9849680/extract-overlay-ramdisk-zk360677/ramdisk
184 11:40:51.065532 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 11:40:51.065637 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
186 11:40:51.065733 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 11:40:51.065829 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
188 11:40:51.065911 Building ramdisk /var/lib/lava/dispatcher/tmp/9849680/extract-overlay-ramdisk-zk360677/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9849680/extract-overlay-ramdisk-zk360677/ramdisk
189 11:40:51.151525 >> 49788 blocks
190 11:40:51.985682 rename /var/lib/lava/dispatcher/tmp/9849680/extract-overlay-ramdisk-zk360677/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9849680/tftp-deploy-lcshddqx/ramdisk/ramdisk.cpio.gz
191 11:40:51.986113 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 11:40:51.986236 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 11:40:51.986334 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 11:40:51.986429 No mkimage arch provided, not using FIT.
195 11:40:51.986516 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 11:40:51.986603 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 11:40:51.986705 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 11:40:51.986793 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 11:40:51.986874 No LXC device requested
200 11:40:51.986955 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 11:40:51.987046 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 11:40:51.987136 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 11:40:51.987210 Checking files for TFTP limit of 4294967296 bytes.
204 11:40:51.987605 end: 1 tftp-deploy (duration 00:00:02) [common]
205 11:40:51.987709 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 11:40:51.987887 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 11:40:51.988080 substitutions:
208 11:40:51.988148 - {DTB}: None
209 11:40:51.988210 - {INITRD}: 9849680/tftp-deploy-lcshddqx/ramdisk/ramdisk.cpio.gz
210 11:40:51.988270 - {KERNEL}: 9849680/tftp-deploy-lcshddqx/kernel/bzImage
211 11:40:51.988329 - {LAVA_MAC}: None
212 11:40:51.988385 - {PRESEED_CONFIG}: None
213 11:40:51.988441 - {PRESEED_LOCAL}: None
214 11:40:51.988496 - {RAMDISK}: 9849680/tftp-deploy-lcshddqx/ramdisk/ramdisk.cpio.gz
215 11:40:51.988552 - {ROOT_PART}: None
216 11:40:51.988607 - {ROOT}: None
217 11:40:51.988661 - {SERVER_IP}: 192.168.201.1
218 11:40:51.988716 - {TEE}: None
219 11:40:51.988771 Parsed boot commands:
220 11:40:51.988827 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 11:40:51.988979 Parsed boot commands: tftpboot 192.168.201.1 9849680/tftp-deploy-lcshddqx/kernel/bzImage 9849680/tftp-deploy-lcshddqx/kernel/cmdline 9849680/tftp-deploy-lcshddqx/ramdisk/ramdisk.cpio.gz
222 11:40:51.989064 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 11:40:51.989147 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 11:40:51.989240 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 11:40:51.989323 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 11:40:51.989395 Not connected, no need to disconnect.
227 11:40:51.989469 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 11:40:51.989551 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 11:40:51.989618 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-3'
230 11:40:51.992980 Setting prompt string to ['lava-test: # ']
231 11:40:51.993330 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 11:40:51.993448 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 11:40:51.993606 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 11:40:51.993721 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 11:40:51.994143 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-3' '--port=1' '--command=reboot'
236 11:40:57.125090 >> Command sent successfully.
237 11:40:57.127471 Returned 0 in 5 seconds
238 11:40:57.228132 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 11:40:57.228463 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 11:40:57.228566 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 11:40:57.228662 Setting prompt string to 'Starting depthcharge on Magolor...'
243 11:40:57.228736 Changing prompt to 'Starting depthcharge on Magolor...'
244 11:40:57.228806 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
245 11:40:57.229066 [Enter `^Ec?' for help]
246 11:40:58.396983
247 11:40:58.397134
248 11:40:58.407474 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
249 11:40:58.411520 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
250 11:40:58.415188 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
251 11:40:58.421468 CPU: AES supported, TXT NOT supported, VT supported
252 11:40:58.424903 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
253 11:40:58.428682 PCH: device id 4d87 (rev 01) is Jasperlake Super
254 11:40:58.435082 IGD: device id 4e55 (rev 01) is Jasperlake GT4
255 11:40:58.438653 VBOOT: Loading verstage.
256 11:40:58.441621 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 11:40:58.448789 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 11:40:58.452069 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 11:40:58.458920 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
260 11:40:58.459005
261 11:40:58.459072
262 11:40:58.468996 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
263 11:40:58.485167 Probing TPM: . done!
264 11:40:58.488498 TPM ready after 0 ms
265 11:40:58.492338 Connected to device vid:did:rid of 1ae0:0028:00
266 11:40:58.503239 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
267 11:40:58.509705 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
268 11:40:58.609631 Initialized TPM device CR50 revision 0
269 11:40:58.619233 tlcl_send_startup: Startup return code is 0
270 11:40:58.619338 TPM: setup succeeded
271 11:40:58.632538 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 11:40:58.646282 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 11:40:58.658917 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 11:40:58.669274 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 11:40:58.672225 Chrome EC: UHEPI supported
276 11:40:58.675581 Phase 1
277 11:40:58.679024 FMAP: area GBB found @ c05000 (12288 bytes)
278 11:40:58.686363 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 11:40:58.692198 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 11:40:58.695801 Recovery requested (1009000e)
281 11:40:58.704888 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 11:40:58.710953 tlcl_extend: response is 0
283 11:40:58.717776 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 11:40:58.727690 tlcl_extend: response is 0
285 11:40:58.734061 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 11:40:58.737773 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
287 11:40:58.744193 BS: verstage times (exec / console): total (unknown) / 124 ms
288 11:40:58.744279
289 11:40:58.747389
290 11:40:58.757573 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
291 11:40:58.763879 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
292 11:40:58.767894 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
293 11:40:58.770418 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
294 11:40:58.777346 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
295 11:40:58.780313 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
296 11:40:58.784594 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
297 11:40:58.787959 TCO_STS: 0000 0001
298 11:40:58.791148 GEN_PMCON: d0015038 00002200
299 11:40:58.795424 GBLRST_CAUSE: 00000000 00000000
300 11:40:58.795512 prev_sleep_state 5
301 11:40:58.798475 Boot Count incremented to 6
302 11:40:58.804237 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 11:40:58.807875 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
304 11:40:58.811214 Chrome EC: UHEPI supported
305 11:40:58.818293 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
306 11:40:58.824515 Probing TPM: done!
307 11:40:58.831313 Connected to device vid:did:rid of 1ae0:0028:00
308 11:40:58.840852 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
309 11:40:58.844933 Initialized TPM device CR50 revision 0
310 11:40:58.857986 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 11:40:58.864376 MRC: Hash idx 0x100b comparison successful.
312 11:40:58.867743 MRC cache found, size 5458
313 11:40:58.867839 bootmode is set to: 2
314 11:40:58.870734 SPD INDEX = 0
315 11:40:58.874838 CBFS: Found 'spd.bin' @0x40c40 size 0x600
316 11:40:58.878310 SPD: module type is LPDDR4X
317 11:40:58.884225 SPD: module part number is MT53E512M32D2NP-046 WT:E
318 11:40:58.890720 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
319 11:40:58.894383 SPD: device width 16 bits, bus width 32 bits
320 11:40:58.897291 SPD: module size is 4096 MB (per channel)
321 11:40:58.900890 meminit_channels: DRAM half-populated
322 11:40:58.984398 CBMEM:
323 11:40:58.987802 IMD: root @ 0x76fff000 254 entries.
324 11:40:58.990865 IMD: root @ 0x76ffec00 62 entries.
325 11:40:58.994332 FMAP: area RO_VPD found @ c00000 (16384 bytes)
326 11:40:59.001048 WARNING: RO_VPD is uninitialized or empty.
327 11:40:59.004053 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
328 11:40:59.008242 External stage cache:
329 11:40:59.011475 IMD: root @ 0x7b3ff000 254 entries.
330 11:40:59.014620 IMD: root @ 0x7b3fec00 62 entries.
331 11:40:59.024773 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
332 11:40:59.031338 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 11:40:59.037559 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
334 11:40:59.046351 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 11:40:59.049335 cse_lite: Skip switching to RW in the recovery path
336 11:40:59.052889 1 DIMMs found
337 11:40:59.052980 SMM Memory Map
338 11:40:59.056320 SMRAM : 0x7b000000 0x800000
339 11:40:59.059506 Subregion 0: 0x7b000000 0x200000
340 11:40:59.063062 Subregion 1: 0x7b200000 0x200000
341 11:40:59.069532 Subregion 2: 0x7b400000 0x400000
342 11:40:59.069616 top_of_ram = 0x77000000
343 11:40:59.075879 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 11:40:59.082478 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 11:40:59.086388 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 11:40:59.092390 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
347 11:40:59.095741 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
348 11:40:59.108159 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
349 11:40:59.114028 Processing 188 relocs. Offset value of 0x74c0e000
350 11:40:59.120971 BS: romstage times (exec / console): total (unknown) / 255 ms
351 11:40:59.125945
352 11:40:59.126030
353 11:40:59.135637 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
354 11:40:59.142373 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 11:40:59.145958 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
356 11:40:59.151899 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
357 11:40:59.209020 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
358 11:40:59.215458 Processing 4805 relocs. Offset value of 0x75da8000
359 11:40:59.218443 BS: postcar times (exec / console): total (unknown) / 42 ms
360 11:40:59.222249
361 11:40:59.222333
362 11:40:59.233105 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
363 11:40:59.233194 Normal boot
364 11:40:59.236713 EC returned error result code 3
365 11:40:59.240303 FW_CONFIG value is 0x204
366 11:40:59.243360 GENERIC: 0.0 disabled by fw_config
367 11:40:59.246468 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 11:40:59.250089 I2C: 00:10 disabled by fw_config
369 11:40:59.253485 I2C: 00:10 disabled by fw_config
370 11:40:59.259551 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 11:40:59.263356 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 11:40:59.269694 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 11:40:59.273001 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 11:40:59.279462 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
375 11:40:59.282978 I2C: 00:10 disabled by fw_config
376 11:40:59.289584 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
377 11:40:59.296283 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
378 11:40:59.299744 I2C: 00:1a disabled by fw_config
379 11:40:59.302564 I2C: 00:1a disabled by fw_config
380 11:40:59.305951 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 11:40:59.312707 fw_config match found: AUDIO_AMP=UNPROVISIONED
382 11:40:59.316283 GENERIC: 0.0 disabled by fw_config
383 11:40:59.319445 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 11:40:59.326121 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
385 11:40:59.332690 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
386 11:40:59.336221 microcode: Update skipped, already up-to-date
387 11:40:59.339120 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
388 11:40:59.367212 Detected 2 core, 2 thread CPU.
389 11:40:59.370488 Setting up SMI for CPU
390 11:40:59.373743 IED base = 0x7b400000
391 11:40:59.377058 IED size = 0x00400000
392 11:40:59.377143 Will perform SMM setup.
393 11:40:59.383854 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
394 11:40:59.390431 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 11:40:59.393974 Processing 16 relocs. Offset value of 0x00030000
396 11:40:59.398246 Attempting to start 1 APs
397 11:40:59.401387 Waiting for 10ms after sending INIT.
398 11:40:59.418032 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 2.
399 11:40:59.418134 done.
400 11:40:59.424173 Waiting for 2nd SIPI to complete...done.
401 11:40:59.430397 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 11:40:59.437292 Processing 13 relocs. Offset value of 0x00038000
403 11:40:59.437379 Unable to locate Global NVS
404 11:40:59.447010 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
405 11:40:59.450531 Installing permanent SMM handler to 0x7b000000
406 11:40:59.460220 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
407 11:40:59.463516 Processing 704 relocs. Offset value of 0x7b010000
408 11:40:59.470333 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 11:40:59.477331 Processing 13 relocs. Offset value of 0x7b008000
410 11:40:59.483491 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 11:40:59.487212 Unable to locate Global NVS
412 11:40:59.493805 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
413 11:40:59.497036 Clearing SMI status registers
414 11:40:59.497121 SMI_STS: PM1
415 11:40:59.499911 PM1_STS: PWRBTN
416 11:40:59.500046 TCO_STS: INTRD_DET
417 11:40:59.510002 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
418 11:40:59.510102 In relocation handler: CPU 0
419 11:40:59.516593 New SMBASE=0x7b000000 IEDBASE=0x7b400000
420 11:40:59.520088 Writing SMRR. base = 0x7b000006, mask=0xff800800
421 11:40:59.523587 Relocation complete.
422 11:40:59.530235 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
423 11:40:59.533830 In relocation handler: CPU 1
424 11:40:59.537114 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
425 11:40:59.543598 Writing SMRR. base = 0x7b000006, mask=0xff800800
426 11:40:59.543683 Relocation complete.
427 11:40:59.546468 Initializing CPU #0
428 11:40:59.549731 CPU: vendor Intel device 906c0
429 11:40:59.552868 CPU: family 06, model 9c, stepping 00
430 11:40:59.556531 Clearing out pending MCEs
431 11:40:59.559864 Setting up local APIC...
432 11:40:59.559976 apic_id: 0x00 done.
433 11:40:59.563333 Turbo is available but hidden
434 11:40:59.566298 Turbo is available and visible
435 11:40:59.570206 microcode: Update skipped, already up-to-date
436 11:40:59.573374 CPU #0 initialized
437 11:40:59.576490 Initializing CPU #1
438 11:40:59.579835 CPU: vendor Intel device 906c0
439 11:40:59.582995 CPU: family 06, model 9c, stepping 00
440 11:40:59.586291 Clearing out pending MCEs
441 11:40:59.586387 Setting up local APIC...
442 11:40:59.589590 apic_id: 0x02 done.
443 11:40:59.593277 microcode: Update skipped, already up-to-date
444 11:40:59.596184 CPU #1 initialized
445 11:40:59.599603 bsp_do_flight_plan done after 173 msecs.
446 11:40:59.603014 CPU: frequency set to 2800 MHz
447 11:40:59.606061 Enabling SMIs.
448 11:40:59.612769 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 85 / 287 ms
449 11:40:59.621836 Probing TPM: done!
450 11:40:59.627983 Connected to device vid:did:rid of 1ae0:0028:00
451 11:40:59.638306 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
452 11:40:59.641565 Initialized TPM device CR50 revision 0
453 11:40:59.644452 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
454 11:40:59.651747 Found a VBT of 7680 bytes after decompression
455 11:40:59.657861 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
456 11:40:59.693795 Detected 2 core, 2 thread CPU.
457 11:40:59.697327 Detected 2 core, 2 thread CPU.
458 11:41:00.059323 Display FSP Version Info HOB
459 11:41:00.062037 Reference Code - CPU = 8.7.22.30
460 11:41:00.065269 uCode Version = 24.0.0.1f
461 11:41:00.068981 TXT ACM version = ff.ff.ff.ffff
462 11:41:00.072257 Reference Code - ME = 8.7.22.30
463 11:41:00.075107 MEBx version = 0.0.0.0
464 11:41:00.078753 ME Firmware Version = Consumer SKU
465 11:41:00.081985 Reference Code - PCH = 8.7.22.30
466 11:41:00.085499 PCH-CRID Status = Disabled
467 11:41:00.088557 PCH-CRID Original Value = ff.ff.ff.ffff
468 11:41:00.092067 PCH-CRID New Value = ff.ff.ff.ffff
469 11:41:00.095203 OPROM - RST - RAID = ff.ff.ff.ffff
470 11:41:00.098696 PCH Hsio Version = 4.0.0.0
471 11:41:00.101591 Reference Code - SA - System Agent = 8.7.22.30
472 11:41:00.105254 Reference Code - MRC = 0.0.4.68
473 11:41:00.108578 SA - PCIe Version = 8.7.22.30
474 11:41:00.111895 SA-CRID Status = Disabled
475 11:41:00.115399 SA-CRID Original Value = 0.0.0.0
476 11:41:00.118203 SA-CRID New Value = 0.0.0.0
477 11:41:00.121744 OPROM - VBIOS = ff.ff.ff.ffff
478 11:41:00.124891 IO Manageability Engine FW Version = ff.ff.ff.ffff
479 11:41:00.128727 PHY Build Version = ff.ff.ff.ffff
480 11:41:00.134827 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
481 11:41:00.138132 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
482 11:41:00.141271 ITSS IRQ Polarities Before:
483 11:41:00.144973 IPC0: 0xffffffff
484 11:41:00.145059 IPC1: 0xffffffff
485 11:41:00.148195 IPC2: 0xffffffff
486 11:41:00.148280 IPC3: 0xffffffff
487 11:41:00.151455 ITSS IRQ Polarities After:
488 11:41:00.154817 IPC0: 0xffffffff
489 11:41:00.154928 IPC1: 0xffffffff
490 11:41:00.158163 IPC2: 0xffffffff
491 11:41:00.158248 IPC3: 0xffffffff
492 11:41:00.171156 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
493 11:41:00.177911 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
494 11:41:00.182153 Enumerating buses...
495 11:41:00.184417 Show all devs... Before device enumeration.
496 11:41:00.187801 Root Device: enabled 1
497 11:41:00.187886 CPU_CLUSTER: 0: enabled 1
498 11:41:00.191557 DOMAIN: 0000: enabled 1
499 11:41:00.194468 PCI: 00:00.0: enabled 1
500 11:41:00.198130 PCI: 00:02.0: enabled 1
501 11:41:00.198216 PCI: 00:04.0: enabled 1
502 11:41:00.201441 PCI: 00:05.0: enabled 1
503 11:41:00.204793 PCI: 00:09.0: enabled 0
504 11:41:00.207725 PCI: 00:12.6: enabled 0
505 11:41:00.207810 PCI: 00:14.0: enabled 1
506 11:41:00.211269 PCI: 00:14.1: enabled 0
507 11:41:00.214021 PCI: 00:14.2: enabled 0
508 11:41:00.218210 PCI: 00:14.3: enabled 1
509 11:41:00.218295 PCI: 00:14.5: enabled 1
510 11:41:00.221046 PCI: 00:15.0: enabled 1
511 11:41:00.224891 PCI: 00:15.1: enabled 1
512 11:41:00.224982 PCI: 00:15.2: enabled 1
513 11:41:00.227303 PCI: 00:15.3: enabled 1
514 11:41:00.230679 PCI: 00:16.0: enabled 1
515 11:41:00.234207 PCI: 00:16.1: enabled 0
516 11:41:00.234291 PCI: 00:16.4: enabled 0
517 11:41:00.237534 PCI: 00:16.5: enabled 0
518 11:41:00.241279 PCI: 00:17.0: enabled 0
519 11:41:00.244358 PCI: 00:19.0: enabled 1
520 11:41:00.244442 PCI: 00:19.1: enabled 0
521 11:41:00.247494 PCI: 00:19.2: enabled 1
522 11:41:00.250436 PCI: 00:1a.0: enabled 1
523 11:41:00.254112 PCI: 00:1c.0: enabled 0
524 11:41:00.254198 PCI: 00:1c.1: enabled 0
525 11:41:00.257375 PCI: 00:1c.2: enabled 0
526 11:41:00.260421 PCI: 00:1c.3: enabled 0
527 11:41:00.263932 PCI: 00:1c.4: enabled 0
528 11:41:00.264056 PCI: 00:1c.5: enabled 0
529 11:41:00.267295 PCI: 00:1c.6: enabled 0
530 11:41:00.270435 PCI: 00:1c.7: enabled 1
531 11:41:00.270520 PCI: 00:1e.0: enabled 0
532 11:41:00.273548 PCI: 00:1e.1: enabled 0
533 11:41:00.276871 PCI: 00:1e.2: enabled 1
534 11:41:00.280256 PCI: 00:1e.3: enabled 0
535 11:41:00.280341 PCI: 00:1f.0: enabled 1
536 11:41:00.283674 PCI: 00:1f.1: enabled 1
537 11:41:00.287131 PCI: 00:1f.2: enabled 1
538 11:41:00.290246 PCI: 00:1f.3: enabled 1
539 11:41:00.290331 PCI: 00:1f.4: enabled 0
540 11:41:00.293846 PCI: 00:1f.5: enabled 1
541 11:41:00.297524 PCI: 00:1f.7: enabled 0
542 11:41:00.300092 GENERIC: 0.0: enabled 1
543 11:41:00.300177 GENERIC: 0.0: enabled 1
544 11:41:00.304192 USB0 port 0: enabled 1
545 11:41:00.306865 GENERIC: 0.0: enabled 1
546 11:41:00.306951 I2C: 00:2c: enabled 1
547 11:41:00.310413 I2C: 00:15: enabled 1
548 11:41:00.313790 GENERIC: 0.0: enabled 0
549 11:41:00.313876 I2C: 00:15: enabled 1
550 11:41:00.317550 I2C: 00:10: enabled 0
551 11:41:00.320245 I2C: 00:10: enabled 0
552 11:41:00.323313 I2C: 00:2c: enabled 1
553 11:41:00.323397 I2C: 00:40: enabled 1
554 11:41:00.326567 I2C: 00:10: enabled 1
555 11:41:00.330306 I2C: 00:39: enabled 1
556 11:41:00.330391 I2C: 00:36: enabled 1
557 11:41:00.333183 I2C: 00:10: enabled 0
558 11:41:00.336711 I2C: 00:0c: enabled 1
559 11:41:00.336795 I2C: 00:50: enabled 1
560 11:41:00.340148 I2C: 00:1a: enabled 1
561 11:41:00.343065 I2C: 00:1a: enabled 0
562 11:41:00.343151 I2C: 00:1a: enabled 0
563 11:41:00.346339 I2C: 00:28: enabled 1
564 11:41:00.349667 I2C: 00:29: enabled 1
565 11:41:00.349752 PCI: 00:00.0: enabled 1
566 11:41:00.353255 SPI: 00: enabled 1
567 11:41:00.356552 PNP: 0c09.0: enabled 1
568 11:41:00.356637 GENERIC: 0.0: enabled 0
569 11:41:00.359710 USB2 port 0: enabled 1
570 11:41:00.363054 USB2 port 1: enabled 1
571 11:41:00.366574 USB2 port 2: enabled 1
572 11:41:00.366659 USB2 port 3: enabled 1
573 11:41:00.369403 USB2 port 4: enabled 0
574 11:41:00.372918 USB2 port 5: enabled 1
575 11:41:00.373004 USB2 port 6: enabled 0
576 11:41:00.376207 USB2 port 7: enabled 1
577 11:41:00.379328 USB3 port 0: enabled 1
578 11:41:00.379405 USB3 port 1: enabled 1
579 11:41:00.383343 USB3 port 2: enabled 1
580 11:41:00.386359 USB3 port 3: enabled 1
581 11:41:00.386444 APIC: 00: enabled 1
582 11:41:00.389165 APIC: 02: enabled 1
583 11:41:00.392652 Compare with tree...
584 11:41:00.392738 Root Device: enabled 1
585 11:41:00.395947 CPU_CLUSTER: 0: enabled 1
586 11:41:00.399334 APIC: 00: enabled 1
587 11:41:00.402933 APIC: 02: enabled 1
588 11:41:00.403018 DOMAIN: 0000: enabled 1
589 11:41:00.406424 PCI: 00:00.0: enabled 1
590 11:41:00.409485 PCI: 00:02.0: enabled 1
591 11:41:00.412628 PCI: 00:04.0: enabled 1
592 11:41:00.415987 GENERIC: 0.0: enabled 1
593 11:41:00.416073 PCI: 00:05.0: enabled 1
594 11:41:00.419328 GENERIC: 0.0: enabled 1
595 11:41:00.422511 PCI: 00:09.0: enabled 0
596 11:41:00.425894 PCI: 00:12.6: enabled 0
597 11:41:00.429134 PCI: 00:14.0: enabled 1
598 11:41:00.429218 USB0 port 0: enabled 1
599 11:41:00.432463 USB2 port 0: enabled 1
600 11:41:00.435974 USB2 port 1: enabled 1
601 11:41:00.439128 USB2 port 2: enabled 1
602 11:41:00.443049 USB2 port 3: enabled 1
603 11:41:00.443133 USB2 port 4: enabled 0
604 11:41:00.446213 USB2 port 5: enabled 1
605 11:41:00.449961 USB2 port 6: enabled 0
606 11:41:00.453049 USB2 port 7: enabled 1
607 11:41:00.456392 USB3 port 0: enabled 1
608 11:41:00.459261 USB3 port 1: enabled 1
609 11:41:00.459345 USB3 port 2: enabled 1
610 11:41:00.462857 USB3 port 3: enabled 1
611 11:41:00.465684 PCI: 00:14.1: enabled 0
612 11:41:00.469186 PCI: 00:14.2: enabled 0
613 11:41:00.472343 PCI: 00:14.3: enabled 1
614 11:41:00.472427 GENERIC: 0.0: enabled 1
615 11:41:00.475683 PCI: 00:14.5: enabled 1
616 11:41:00.478995 PCI: 00:15.0: enabled 1
617 11:41:00.482647 I2C: 00:2c: enabled 1
618 11:41:00.482732 I2C: 00:15: enabled 1
619 11:41:00.487348 PCI: 00:15.1: enabled 1
620 11:41:00.490412 PCI: 00:15.2: enabled 1
621 11:41:00.490500 GENERIC: 0.0: enabled 0
622 11:41:00.493872 I2C: 00:15: enabled 1
623 11:41:00.497541 I2C: 00:10: enabled 0
624 11:41:00.500517 I2C: 00:10: enabled 0
625 11:41:00.503625 I2C: 00:2c: enabled 1
626 11:41:00.503711 I2C: 00:40: enabled 1
627 11:41:00.507160 I2C: 00:10: enabled 1
628 11:41:00.510211 I2C: 00:39: enabled 1
629 11:41:00.513626 PCI: 00:15.3: enabled 1
630 11:41:00.513709 I2C: 00:36: enabled 1
631 11:41:00.516853 I2C: 00:10: enabled 0
632 11:41:00.520522 I2C: 00:0c: enabled 1
633 11:41:00.523909 I2C: 00:50: enabled 1
634 11:41:00.524033 PCI: 00:16.0: enabled 1
635 11:41:00.527071 PCI: 00:16.1: enabled 0
636 11:41:00.530366 PCI: 00:16.4: enabled 0
637 11:41:00.533651 PCI: 00:16.5: enabled 0
638 11:41:00.536619 PCI: 00:17.0: enabled 0
639 11:41:00.536704 PCI: 00:19.0: enabled 1
640 11:41:00.540064 I2C: 00:1a: enabled 1
641 11:41:00.543262 I2C: 00:1a: enabled 0
642 11:41:00.546627 I2C: 00:1a: enabled 0
643 11:41:00.546711 I2C: 00:28: enabled 1
644 11:41:00.549854 I2C: 00:29: enabled 1
645 11:41:00.553661 PCI: 00:19.1: enabled 0
646 11:41:00.557163 PCI: 00:19.2: enabled 1
647 11:41:00.559970 PCI: 00:1a.0: enabled 1
648 11:41:00.560069 PCI: 00:1e.0: enabled 0
649 11:41:00.563409 PCI: 00:1e.1: enabled 0
650 11:41:00.566947 PCI: 00:1e.2: enabled 1
651 11:41:00.569992 SPI: 00: enabled 1
652 11:41:00.570077 PCI: 00:1e.3: enabled 0
653 11:41:00.573719 PCI: 00:1f.0: enabled 1
654 11:41:00.576874 PNP: 0c09.0: enabled 1
655 11:41:00.580241 PCI: 00:1f.1: enabled 1
656 11:41:00.583226 PCI: 00:1f.2: enabled 1
657 11:41:00.583311 PCI: 00:1f.3: enabled 1
658 11:41:00.586927 GENERIC: 0.0: enabled 0
659 11:41:00.590107 PCI: 00:1f.4: enabled 0
660 11:41:00.593388 PCI: 00:1f.5: enabled 1
661 11:41:00.596804 PCI: 00:1f.7: enabled 0
662 11:41:00.596890 Root Device scanning...
663 11:41:00.599841 scan_static_bus for Root Device
664 11:41:00.603246 CPU_CLUSTER: 0 enabled
665 11:41:00.606394 DOMAIN: 0000 enabled
666 11:41:00.606479 DOMAIN: 0000 scanning...
667 11:41:00.609739 PCI: pci_scan_bus for bus 00
668 11:41:00.613750 PCI: 00:00.0 [8086/0000] ops
669 11:41:00.616415 PCI: 00:00.0 [8086/4e22] enabled
670 11:41:00.620015 PCI: 00:02.0 [8086/0000] bus ops
671 11:41:00.622993 PCI: 00:02.0 [8086/4e55] enabled
672 11:41:00.626639 PCI: 00:04.0 [8086/0000] bus ops
673 11:41:00.629628 PCI: 00:04.0 [8086/4e03] enabled
674 11:41:00.633323 PCI: 00:05.0 [8086/0000] bus ops
675 11:41:00.636188 PCI: 00:05.0 [8086/4e19] enabled
676 11:41:00.640146 PCI: 00:08.0 [8086/4e11] enabled
677 11:41:00.643439 PCI: 00:14.0 [8086/0000] bus ops
678 11:41:00.646645 PCI: 00:14.0 [8086/4ded] enabled
679 11:41:00.649715 PCI: 00:14.2 [8086/4def] disabled
680 11:41:00.652915 PCI: 00:14.3 [8086/0000] bus ops
681 11:41:00.656266 PCI: 00:14.3 [8086/4df0] enabled
682 11:41:00.659757 PCI: 00:14.5 [8086/0000] ops
683 11:41:00.663449 PCI: 00:14.5 [8086/4df8] enabled
684 11:41:00.666222 PCI: 00:15.0 [8086/0000] bus ops
685 11:41:00.669474 PCI: 00:15.0 [8086/4de8] enabled
686 11:41:00.673642 PCI: 00:15.1 [8086/0000] bus ops
687 11:41:00.676278 PCI: 00:15.1 [8086/4de9] enabled
688 11:41:00.679392 PCI: 00:15.2 [8086/0000] bus ops
689 11:41:00.682988 PCI: 00:15.2 [8086/4dea] enabled
690 11:41:00.685925 PCI: 00:15.3 [8086/0000] bus ops
691 11:41:00.689233 PCI: 00:15.3 [8086/4deb] enabled
692 11:41:00.692975 PCI: 00:16.0 [8086/0000] ops
693 11:41:00.696081 PCI: 00:16.0 [8086/4de0] enabled
694 11:41:00.699672 PCI: 00:19.0 [8086/0000] bus ops
695 11:41:00.702330 PCI: 00:19.0 [8086/4dc5] enabled
696 11:41:00.705662 PCI: 00:19.2 [8086/0000] ops
697 11:41:00.710107 PCI: 00:19.2 [8086/4dc7] enabled
698 11:41:00.712489 PCI: 00:1a.0 [8086/0000] ops
699 11:41:00.715850 PCI: 00:1a.0 [8086/4dc4] enabled
700 11:41:00.719139 PCI: 00:1e.0 [8086/0000] ops
701 11:41:00.722506 PCI: 00:1e.0 [8086/4da8] disabled
702 11:41:00.725713 PCI: 00:1e.2 [8086/0000] bus ops
703 11:41:00.729129 PCI: 00:1e.2 [8086/4daa] enabled
704 11:41:00.732466 PCI: 00:1f.0 [8086/0000] bus ops
705 11:41:00.735710 PCI: 00:1f.0 [8086/4d87] enabled
706 11:41:00.738990 PCI: Static device PCI: 00:1f.1 not found, disabling it.
707 11:41:00.742438 RTC Init
708 11:41:00.745681 Set power on after power failure.
709 11:41:00.745767 Disabling Deep S3
710 11:41:00.749435 Disabling Deep S3
711 11:41:00.753143 Disabling Deep S4
712 11:41:00.753227 Disabling Deep S4
713 11:41:00.756250 Disabling Deep S5
714 11:41:00.756338 Disabling Deep S5
715 11:41:00.759400 PCI: 00:1f.2 [0000/0000] hidden
716 11:41:00.762492 PCI: 00:1f.3 [8086/0000] bus ops
717 11:41:00.765606 PCI: 00:1f.3 [8086/4dc8] enabled
718 11:41:00.769153 PCI: 00:1f.5 [8086/0000] bus ops
719 11:41:00.772646 PCI: 00:1f.5 [8086/4da4] enabled
720 11:41:00.775650 PCI: Leftover static devices:
721 11:41:00.778928 PCI: 00:12.6
722 11:41:00.779012 PCI: 00:09.0
723 11:41:00.779079 PCI: 00:14.1
724 11:41:00.782242 PCI: 00:16.1
725 11:41:00.782327 PCI: 00:16.4
726 11:41:00.785485 PCI: 00:16.5
727 11:41:00.785569 PCI: 00:17.0
728 11:41:00.785636 PCI: 00:19.1
729 11:41:00.788718 PCI: 00:1e.1
730 11:41:00.788803 PCI: 00:1e.3
731 11:41:00.791935 PCI: 00:1f.1
732 11:41:00.792062 PCI: 00:1f.4
733 11:41:00.792130 PCI: 00:1f.7
734 11:41:00.795370 PCI: Check your devicetree.cb.
735 11:41:00.799013 PCI: 00:02.0 scanning...
736 11:41:00.802237 scan_generic_bus for PCI: 00:02.0
737 11:41:00.805369 scan_generic_bus for PCI: 00:02.0 done
738 11:41:00.812063 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
739 11:41:00.815136 PCI: 00:04.0 scanning...
740 11:41:00.818922 scan_generic_bus for PCI: 00:04.0
741 11:41:00.819007 GENERIC: 0.0 enabled
742 11:41:00.825241 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
743 11:41:00.831710 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
744 11:41:00.831797 PCI: 00:05.0 scanning...
745 11:41:00.835346 scan_generic_bus for PCI: 00:05.0
746 11:41:00.838490 GENERIC: 0.0 enabled
747 11:41:00.844891 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
748 11:41:00.848380 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
749 11:41:00.851715 PCI: 00:14.0 scanning...
750 11:41:00.854935 scan_static_bus for PCI: 00:14.0
751 11:41:00.858229 USB0 port 0 enabled
752 11:41:00.861954 USB0 port 0 scanning...
753 11:41:00.864938 scan_static_bus for USB0 port 0
754 11:41:00.865023 USB2 port 0 enabled
755 11:41:00.868430 USB2 port 1 enabled
756 11:41:00.868514 USB2 port 2 enabled
757 11:41:00.871765 USB2 port 3 enabled
758 11:41:00.875014 USB2 port 4 disabled
759 11:41:00.875098 USB2 port 5 enabled
760 11:41:00.878473 USB2 port 6 disabled
761 11:41:00.881295 USB2 port 7 enabled
762 11:41:00.881379 USB3 port 0 enabled
763 11:41:00.885208 USB3 port 1 enabled
764 11:41:00.885292 USB3 port 2 enabled
765 11:41:00.888513 USB3 port 3 enabled
766 11:41:00.891334 USB2 port 0 scanning...
767 11:41:00.894843 scan_static_bus for USB2 port 0
768 11:41:00.898642 scan_static_bus for USB2 port 0 done
769 11:41:00.901388 scan_bus: bus USB2 port 0 finished in 6 msecs
770 11:41:00.904770 USB2 port 1 scanning...
771 11:41:00.908791 scan_static_bus for USB2 port 1
772 11:41:00.911471 scan_static_bus for USB2 port 1 done
773 11:41:00.917874 scan_bus: bus USB2 port 1 finished in 6 msecs
774 11:41:00.917960 USB2 port 2 scanning...
775 11:41:00.920946 scan_static_bus for USB2 port 2
776 11:41:00.924659 scan_static_bus for USB2 port 2 done
777 11:41:00.930978 scan_bus: bus USB2 port 2 finished in 6 msecs
778 11:41:00.934435 USB2 port 3 scanning...
779 11:41:00.937711 scan_static_bus for USB2 port 3
780 11:41:00.941106 scan_static_bus for USB2 port 3 done
781 11:41:00.944245 scan_bus: bus USB2 port 3 finished in 6 msecs
782 11:41:00.948079 USB2 port 5 scanning...
783 11:41:00.951626 scan_static_bus for USB2 port 5
784 11:41:00.954587 scan_static_bus for USB2 port 5 done
785 11:41:00.957659 scan_bus: bus USB2 port 5 finished in 6 msecs
786 11:41:00.960974 USB2 port 7 scanning...
787 11:41:00.963921 scan_static_bus for USB2 port 7
788 11:41:00.967867 scan_static_bus for USB2 port 7 done
789 11:41:00.974023 scan_bus: bus USB2 port 7 finished in 6 msecs
790 11:41:00.974109 USB3 port 0 scanning...
791 11:41:00.977525 scan_static_bus for USB3 port 0
792 11:41:00.981224 scan_static_bus for USB3 port 0 done
793 11:41:00.987478 scan_bus: bus USB3 port 0 finished in 6 msecs
794 11:41:00.990481 USB3 port 1 scanning...
795 11:41:00.993836 scan_static_bus for USB3 port 1
796 11:41:00.997113 scan_static_bus for USB3 port 1 done
797 11:41:01.001345 scan_bus: bus USB3 port 1 finished in 6 msecs
798 11:41:01.003711 USB3 port 2 scanning...
799 11:41:01.007416 scan_static_bus for USB3 port 2
800 11:41:01.010478 scan_static_bus for USB3 port 2 done
801 11:41:01.013856 scan_bus: bus USB3 port 2 finished in 6 msecs
802 11:41:01.017062 USB3 port 3 scanning...
803 11:41:01.020221 scan_static_bus for USB3 port 3
804 11:41:01.023844 scan_static_bus for USB3 port 3 done
805 11:41:01.030522 scan_bus: bus USB3 port 3 finished in 6 msecs
806 11:41:01.033571 scan_static_bus for USB0 port 0 done
807 11:41:01.037173 scan_bus: bus USB0 port 0 finished in 172 msecs
808 11:41:01.040290 scan_static_bus for PCI: 00:14.0 done
809 11:41:01.046816 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
810 11:41:01.050711 PCI: 00:14.3 scanning...
811 11:41:01.053547 scan_static_bus for PCI: 00:14.3
812 11:41:01.053634 GENERIC: 0.0 enabled
813 11:41:01.057044 scan_static_bus for PCI: 00:14.3 done
814 11:41:01.064131 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
815 11:41:01.064218 PCI: 00:15.0 scanning...
816 11:41:01.067944 scan_static_bus for PCI: 00:15.0
817 11:41:01.071887 I2C: 00:2c enabled
818 11:41:01.074332 I2C: 00:15 enabled
819 11:41:01.077688 scan_static_bus for PCI: 00:15.0 done
820 11:41:01.082096 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
821 11:41:01.084795 PCI: 00:15.1 scanning...
822 11:41:01.088726 scan_static_bus for PCI: 00:15.1
823 11:41:01.091607 scan_static_bus for PCI: 00:15.1 done
824 11:41:01.094945 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
825 11:41:01.098303 PCI: 00:15.2 scanning...
826 11:41:01.101453 scan_static_bus for PCI: 00:15.2
827 11:41:01.105132 GENERIC: 0.0 disabled
828 11:41:01.105218 I2C: 00:15 enabled
829 11:41:01.108913 I2C: 00:10 disabled
830 11:41:01.111654 I2C: 00:10 disabled
831 11:41:01.111739 I2C: 00:2c enabled
832 11:41:01.115932 I2C: 00:40 enabled
833 11:41:01.116058 I2C: 00:10 enabled
834 11:41:01.118260 I2C: 00:39 enabled
835 11:41:01.121315 scan_static_bus for PCI: 00:15.2 done
836 11:41:01.125000 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
837 11:41:01.127967 PCI: 00:15.3 scanning...
838 11:41:01.131424 scan_static_bus for PCI: 00:15.3
839 11:41:01.134902 I2C: 00:36 enabled
840 11:41:01.137966 I2C: 00:10 disabled
841 11:41:01.138051 I2C: 00:0c enabled
842 11:41:01.141380 I2C: 00:50 enabled
843 11:41:01.145036 scan_static_bus for PCI: 00:15.3 done
844 11:41:01.148883 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
845 11:41:01.151340 PCI: 00:19.0 scanning...
846 11:41:01.154478 scan_static_bus for PCI: 00:19.0
847 11:41:01.157960 I2C: 00:1a enabled
848 11:41:01.158044 I2C: 00:1a disabled
849 11:41:01.161453 I2C: 00:1a disabled
850 11:41:01.164752 I2C: 00:28 enabled
851 11:41:01.164835 I2C: 00:29 enabled
852 11:41:01.168344 scan_static_bus for PCI: 00:19.0 done
853 11:41:01.174491 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
854 11:41:01.174582 PCI: 00:1e.2 scanning...
855 11:41:01.181299 scan_generic_bus for PCI: 00:1e.2
856 11:41:01.181399 SPI: 00 enabled
857 11:41:01.187967 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
858 11:41:01.191246 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
859 11:41:01.194694 PCI: 00:1f.0 scanning...
860 11:41:01.197729 scan_static_bus for PCI: 00:1f.0
861 11:41:01.201359 PNP: 0c09.0 enabled
862 11:41:01.201444 PNP: 0c09.0 scanning...
863 11:41:01.204602 scan_static_bus for PNP: 0c09.0
864 11:41:01.211131 scan_static_bus for PNP: 0c09.0 done
865 11:41:01.214979 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
866 11:41:01.217750 scan_static_bus for PCI: 00:1f.0 done
867 11:41:01.224161 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
868 11:41:01.224253 PCI: 00:1f.3 scanning...
869 11:41:01.227463 scan_static_bus for PCI: 00:1f.3
870 11:41:01.230668 GENERIC: 0.0 disabled
871 11:41:01.234337 scan_static_bus for PCI: 00:1f.3 done
872 11:41:01.240950 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
873 11:41:01.241038 PCI: 00:1f.5 scanning...
874 11:41:01.243813 scan_generic_bus for PCI: 00:1f.5
875 11:41:01.250664 scan_generic_bus for PCI: 00:1f.5 done
876 11:41:01.254263 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
877 11:41:01.260463 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
878 11:41:01.263782 scan_static_bus for Root Device done
879 11:41:01.267578 scan_bus: bus Root Device finished in 665 msecs
880 11:41:01.267665 done
881 11:41:01.273726 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1084 ms
882 11:41:01.277631 Chrome EC: UHEPI supported
883 11:41:01.283948 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
884 11:41:01.290782 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
885 11:41:01.293919 SPI flash protection: WPSW=0 SRP0=1
886 11:41:01.297638 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
887 11:41:01.303741 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
888 11:41:01.307068 found VGA at PCI: 00:02.0
889 11:41:01.310520 Setting up VGA for PCI: 00:02.0
890 11:41:01.313786 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
891 11:41:01.320698 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
892 11:41:01.323654 Allocating resources...
893 11:41:01.323740 Reading resources...
894 11:41:01.326954 Root Device read_resources bus 0 link: 0
895 11:41:01.333882 CPU_CLUSTER: 0 read_resources bus 0 link: 0
896 11:41:01.337210 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
897 11:41:01.343865 DOMAIN: 0000 read_resources bus 0 link: 0
898 11:41:01.346641 PCI: 00:04.0 read_resources bus 1 link: 0
899 11:41:01.402063 PCI: 00:04.0 read_resources bus 1 link: 0 done
900 11:41:01.402718 PCI: 00:05.0 read_resources bus 2 link: 0
901 11:41:01.403341 PCI: 00:05.0 read_resources bus 2 link: 0 done
902 11:41:01.403427 PCI: 00:14.0 read_resources bus 0 link: 0
903 11:41:01.403720 USB0 port 0 read_resources bus 0 link: 0
904 11:41:01.404126 USB0 port 0 read_resources bus 0 link: 0 done
905 11:41:01.404230 PCI: 00:14.0 read_resources bus 0 link: 0 done
906 11:41:01.404506 PCI: 00:14.3 read_resources bus 0 link: 0
907 11:41:01.404622 PCI: 00:14.3 read_resources bus 0 link: 0 done
908 11:41:01.404712 PCI: 00:15.0 read_resources bus 0 link: 0
909 11:41:01.404827 PCI: 00:15.0 read_resources bus 0 link: 0 done
910 11:41:01.428965 PCI: 00:15.2 read_resources bus 0 link: 0
911 11:41:01.429343 PCI: 00:15.2 read_resources bus 0 link: 0 done
912 11:41:01.429431 PCI: 00:15.3 read_resources bus 0 link: 0
913 11:41:01.430025 PCI: 00:15.3 read_resources bus 0 link: 0 done
914 11:41:01.432689 PCI: 00:19.0 read_resources bus 0 link: 0
915 11:41:01.435542 PCI: 00:19.0 read_resources bus 0 link: 0 done
916 11:41:01.435627 PCI: 00:1e.2 read_resources bus 3 link: 0
917 11:41:01.442562 PCI: 00:1e.2 read_resources bus 3 link: 0 done
918 11:41:01.445603 PCI: 00:1f.0 read_resources bus 0 link: 0
919 11:41:01.452428 PCI: 00:1f.0 read_resources bus 0 link: 0 done
920 11:41:01.455707 PCI: 00:1f.3 read_resources bus 0 link: 0
921 11:41:01.462268 PCI: 00:1f.3 read_resources bus 0 link: 0 done
922 11:41:01.465706 DOMAIN: 0000 read_resources bus 0 link: 0 done
923 11:41:01.468538 Root Device read_resources bus 0 link: 0 done
924 11:41:01.472748 Done reading resources.
925 11:41:01.479269 Show resources in subtree (Root Device)...After reading.
926 11:41:01.482451 Root Device child on link 0 CPU_CLUSTER: 0
927 11:41:01.488706 CPU_CLUSTER: 0 child on link 0 APIC: 00
928 11:41:01.488795 APIC: 00
929 11:41:01.488864 APIC: 02
930 11:41:01.495328 DOMAIN: 0000 child on link 0 PCI: 00:00.0
931 11:41:01.502083 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
932 11:41:01.511562 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
933 11:41:01.514956 PCI: 00:00.0
934 11:41:01.524735 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
935 11:41:01.535135 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
936 11:41:01.541292 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
937 11:41:01.551306 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
938 11:41:01.561733 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
939 11:41:01.571102 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
940 11:41:01.580823 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
941 11:41:01.591406 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
942 11:41:01.598046 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
943 11:41:01.607183 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
944 11:41:01.617664 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
945 11:41:01.627440 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
946 11:41:01.636848 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
947 11:41:01.644152 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
948 11:41:01.653708 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
949 11:41:01.663360 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
950 11:41:01.673382 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
951 11:41:01.683659 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
952 11:41:01.693320 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
953 11:41:01.693424 PCI: 00:02.0
954 11:41:01.702919 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
955 11:41:01.712917 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
956 11:41:01.723180 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
957 11:41:01.726308 PCI: 00:04.0 child on link 0 GENERIC: 0.0
958 11:41:01.736704 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
959 11:41:01.739198 GENERIC: 0.0
960 11:41:01.743152 PCI: 00:05.0 child on link 0 GENERIC: 0.0
961 11:41:01.753828 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
962 11:41:01.753930 GENERIC: 0.0
963 11:41:01.757264 PCI: 00:08.0
964 11:41:01.767221 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
965 11:41:01.771309 PCI: 00:14.0 child on link 0 USB0 port 0
966 11:41:01.780351 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
967 11:41:01.787302 USB0 port 0 child on link 0 USB2 port 0
968 11:41:01.787402 USB2 port 0
969 11:41:01.789950 USB2 port 1
970 11:41:01.790034 USB2 port 2
971 11:41:01.793251 USB2 port 3
972 11:41:01.793334 USB2 port 4
973 11:41:01.796682 USB2 port 5
974 11:41:01.796790 USB2 port 6
975 11:41:01.800171 USB2 port 7
976 11:41:01.800257 USB3 port 0
977 11:41:01.804073 USB3 port 1
978 11:41:01.804158 USB3 port 2
979 11:41:01.806826 USB3 port 3
980 11:41:01.810396 PCI: 00:14.2
981 11:41:01.813573 PCI: 00:14.3 child on link 0 GENERIC: 0.0
982 11:41:01.823567 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
983 11:41:01.823662 GENERIC: 0.0
984 11:41:01.826627 PCI: 00:14.5
985 11:41:01.836961 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
986 11:41:01.839728 PCI: 00:15.0 child on link 0 I2C: 00:2c
987 11:41:01.849743 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
988 11:41:01.853234 I2C: 00:2c
989 11:41:01.853324 I2C: 00:15
990 11:41:01.857115 PCI: 00:15.1
991 11:41:01.866538 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
992 11:41:01.869549 PCI: 00:15.2 child on link 0 GENERIC: 0.0
993 11:41:01.879749 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
994 11:41:01.879838 GENERIC: 0.0
995 11:41:01.883378 I2C: 00:15
996 11:41:01.883464 I2C: 00:10
997 11:41:01.886220 I2C: 00:10
998 11:41:01.886305 I2C: 00:2c
999 11:41:01.889402 I2C: 00:40
1000 11:41:01.889492 I2C: 00:10
1001 11:41:01.892885 I2C: 00:39
1002 11:41:01.896297 PCI: 00:15.3 child on link 0 I2C: 00:36
1003 11:41:01.906122 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1004 11:41:01.909915 I2C: 00:36
1005 11:41:01.910001 I2C: 00:10
1006 11:41:01.910068 I2C: 00:0c
1007 11:41:01.913317 I2C: 00:50
1008 11:41:01.913401 PCI: 00:16.0
1009 11:41:01.922708 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1010 11:41:01.929935 PCI: 00:19.0 child on link 0 I2C: 00:1a
1011 11:41:01.939706 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1012 11:41:01.939799 I2C: 00:1a
1013 11:41:01.942912 I2C: 00:1a
1014 11:41:01.942998 I2C: 00:1a
1015 11:41:01.945806 I2C: 00:28
1016 11:41:01.945891 I2C: 00:29
1017 11:41:01.949391 PCI: 00:19.2
1018 11:41:01.959067 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1019 11:41:01.969443 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1020 11:41:01.969538 PCI: 00:1a.0
1021 11:41:01.978666 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1022 11:41:01.982194 PCI: 00:1e.0
1023 11:41:01.985936 PCI: 00:1e.2 child on link 0 SPI: 00
1024 11:41:01.995625 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1025 11:41:01.998794 SPI: 00
1026 11:41:02.001931 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1027 11:41:02.008459 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1028 11:41:02.011997 PNP: 0c09.0
1029 11:41:02.021706 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1030 11:41:02.021796 PCI: 00:1f.2
1031 11:41:02.031946 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1032 11:41:02.041700 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1033 11:41:02.044918 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1034 11:41:02.055065 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1035 11:41:02.064771 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1036 11:41:02.067949 GENERIC: 0.0
1037 11:41:02.068039 PCI: 00:1f.5
1038 11:41:02.077998 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1039 11:41:02.084636 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1040 11:41:02.091585 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1041 11:41:02.097567 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1042 11:41:02.107545 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1043 11:41:02.114715 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1044 11:41:02.121098 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1045 11:41:02.124427 DOMAIN: 0000: Resource ranges:
1046 11:41:02.127629 * Base: 1000, Size: 800, Tag: 100
1047 11:41:02.131276 * Base: 1900, Size: e700, Tag: 100
1048 11:41:02.137975 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1049 11:41:02.144643 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1050 11:41:02.150731 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1051 11:41:02.157835 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1052 11:41:02.167189 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1053 11:41:02.174079 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1054 11:41:02.180390 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1055 11:41:02.187381 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1056 11:41:02.196901 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1057 11:41:02.203551 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1058 11:41:02.210117 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1059 11:41:02.219987 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1060 11:41:02.226980 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1061 11:41:02.233495 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1062 11:41:02.243407 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1063 11:41:02.249799 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1064 11:41:02.256679 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1065 11:41:02.266865 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1066 11:41:02.273382 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1067 11:41:02.280130 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1068 11:41:02.289449 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1069 11:41:02.296560 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1070 11:41:02.302986 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1071 11:41:02.312654 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1072 11:41:02.316006 DOMAIN: 0000: Resource ranges:
1073 11:41:02.319175 * Base: 7fc00000, Size: 40400000, Tag: 200
1074 11:41:02.322694 * Base: d0000000, Size: 2b000000, Tag: 200
1075 11:41:02.326490 * Base: fb001000, Size: 2fff000, Tag: 200
1076 11:41:02.333081 * Base: fe010000, Size: 22000, Tag: 200
1077 11:41:02.336530 * Base: fe033000, Size: a4d000, Tag: 200
1078 11:41:02.339940 * Base: fea88000, Size: 2f8000, Tag: 200
1079 11:41:02.343410 * Base: fed88000, Size: 8000, Tag: 200
1080 11:41:02.350283 * Base: fed93000, Size: d000, Tag: 200
1081 11:41:02.353282 * Base: feda2000, Size: 125e000, Tag: 200
1082 11:41:02.356554 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1083 11:41:02.363024 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1084 11:41:02.370000 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1085 11:41:02.376835 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1086 11:41:02.383031 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1087 11:41:02.390114 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1088 11:41:02.396734 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1089 11:41:02.402988 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1090 11:41:02.409505 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1091 11:41:02.416619 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1092 11:41:02.423067 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1093 11:41:02.429663 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1094 11:41:02.436153 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1095 11:41:02.442790 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1096 11:41:02.449609 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1097 11:41:02.456161 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1098 11:41:02.462898 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1099 11:41:02.469154 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1100 11:41:02.476376 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1101 11:41:02.482818 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1102 11:41:02.489029 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1103 11:41:02.499072 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1104 11:41:02.505721 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1105 11:41:02.508817 Root Device assign_resources, bus 0 link: 0
1106 11:41:02.512512 DOMAIN: 0000 assign_resources, bus 0 link: 0
1107 11:41:02.523199 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1108 11:41:02.530492 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1109 11:41:02.539231 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1110 11:41:02.545801 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1111 11:41:02.552757 PCI: 00:04.0 assign_resources, bus 1 link: 0
1112 11:41:02.555810 PCI: 00:04.0 assign_resources, bus 1 link: 0
1113 11:41:02.562357 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1114 11:41:02.569061 PCI: 00:05.0 assign_resources, bus 2 link: 0
1115 11:41:02.572225 PCI: 00:05.0 assign_resources, bus 2 link: 0
1116 11:41:02.582730 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1117 11:41:02.588887 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1118 11:41:02.592136 PCI: 00:14.0 assign_resources, bus 0 link: 0
1119 11:41:02.599449 PCI: 00:14.0 assign_resources, bus 0 link: 0
1120 11:41:02.605397 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1121 11:41:02.612029 PCI: 00:14.3 assign_resources, bus 0 link: 0
1122 11:41:02.615707 PCI: 00:14.3 assign_resources, bus 0 link: 0
1123 11:41:02.625491 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1124 11:41:02.631866 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1125 11:41:02.635178 PCI: 00:15.0 assign_resources, bus 0 link: 0
1126 11:41:02.641947 PCI: 00:15.0 assign_resources, bus 0 link: 0
1127 11:41:02.648774 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1128 11:41:02.657985 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1129 11:41:02.661096 PCI: 00:15.2 assign_resources, bus 0 link: 0
1130 11:41:02.664552 PCI: 00:15.2 assign_resources, bus 0 link: 0
1131 11:41:02.674323 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1132 11:41:02.677560 PCI: 00:15.3 assign_resources, bus 0 link: 0
1133 11:41:02.684023 PCI: 00:15.3 assign_resources, bus 0 link: 0
1134 11:41:02.691187 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1135 11:41:02.700619 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1136 11:41:02.703916 PCI: 00:19.0 assign_resources, bus 0 link: 0
1137 11:41:02.707775 PCI: 00:19.0 assign_resources, bus 0 link: 0
1138 11:41:02.717952 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1139 11:41:02.723975 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1140 11:41:02.733688 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1141 11:41:02.737106 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1142 11:41:02.743629 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1143 11:41:02.746811 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1144 11:41:02.750022 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1145 11:41:02.756809 LPC: Trying to open IO window from 800 size 1ff
1146 11:41:02.763350 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1147 11:41:02.773422 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1148 11:41:02.776466 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1149 11:41:02.782812 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1150 11:41:02.789985 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1151 11:41:02.792891 DOMAIN: 0000 assign_resources, bus 0 link: 0
1152 11:41:02.799626 Root Device assign_resources, bus 0 link: 0
1153 11:41:02.802708 Done setting resources.
1154 11:41:02.809601 Show resources in subtree (Root Device)...After assigning values.
1155 11:41:02.812662 Root Device child on link 0 CPU_CLUSTER: 0
1156 11:41:02.816503 CPU_CLUSTER: 0 child on link 0 APIC: 00
1157 11:41:02.816584 APIC: 00
1158 11:41:02.820102 APIC: 02
1159 11:41:02.822589 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1160 11:41:02.832508 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1161 11:41:02.842610 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1162 11:41:02.842707 PCI: 00:00.0
1163 11:41:02.852284 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1164 11:41:02.862380 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1165 11:41:02.872073 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1166 11:41:02.882122 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1167 11:41:02.892263 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1168 11:41:02.901987 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1169 11:41:02.908508 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1170 11:41:02.918662 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1171 11:41:02.928411 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1172 11:41:02.938188 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1173 11:41:02.948173 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1174 11:41:02.954923 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1175 11:41:02.964599 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1176 11:41:02.974897 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1177 11:41:02.984167 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1178 11:41:02.994110 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1179 11:41:03.004183 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1180 11:41:03.014745 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1181 11:41:03.020550 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1182 11:41:03.023959 PCI: 00:02.0
1183 11:41:03.034152 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1184 11:41:03.043855 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1185 11:41:03.053653 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1186 11:41:03.056725 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 11:41:03.070111 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1188 11:41:03.070197 GENERIC: 0.0
1189 11:41:03.073584 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1190 11:41:03.086429 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1191 11:41:03.086520 GENERIC: 0.0
1192 11:41:03.089628 PCI: 00:08.0
1193 11:41:03.099598 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1194 11:41:03.102942 PCI: 00:14.0 child on link 0 USB0 port 0
1195 11:41:03.113431 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1196 11:41:03.119730 USB0 port 0 child on link 0 USB2 port 0
1197 11:41:03.119816 USB2 port 0
1198 11:41:03.123008 USB2 port 1
1199 11:41:03.123090 USB2 port 2
1200 11:41:03.126355 USB2 port 3
1201 11:41:03.126437 USB2 port 4
1202 11:41:03.130225 USB2 port 5
1203 11:41:03.130330 USB2 port 6
1204 11:41:03.132709 USB2 port 7
1205 11:41:03.132791 USB3 port 0
1206 11:41:03.136183 USB3 port 1
1207 11:41:03.136295 USB3 port 2
1208 11:41:03.139539 USB3 port 3
1209 11:41:03.139621 PCI: 00:14.2
1210 11:41:03.146105 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1211 11:41:03.155821 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1212 11:41:03.159121 GENERIC: 0.0
1213 11:41:03.159203 PCI: 00:14.5
1214 11:41:03.169023 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1215 11:41:03.172110 PCI: 00:15.0 child on link 0 I2C: 00:2c
1216 11:41:03.185202 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1217 11:41:03.185285 I2C: 00:2c
1218 11:41:03.185351 I2C: 00:15
1219 11:41:03.188884 PCI: 00:15.1
1220 11:41:03.198917 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1221 11:41:03.202158 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1222 11:41:03.215088 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1223 11:41:03.215174 GENERIC: 0.0
1224 11:41:03.218112 I2C: 00:15
1225 11:41:03.218195 I2C: 00:10
1226 11:41:03.221970 I2C: 00:10
1227 11:41:03.222052 I2C: 00:2c
1228 11:41:03.222118 I2C: 00:40
1229 11:41:03.224799 I2C: 00:10
1230 11:41:03.224887 I2C: 00:39
1231 11:41:03.231657 PCI: 00:15.3 child on link 0 I2C: 00:36
1232 11:41:03.241551 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1233 11:41:03.241635 I2C: 00:36
1234 11:41:03.244926 I2C: 00:10
1235 11:41:03.245008 I2C: 00:0c
1236 11:41:03.248237 I2C: 00:50
1237 11:41:03.248319 PCI: 00:16.0
1238 11:41:03.257812 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1239 11:41:03.264814 PCI: 00:19.0 child on link 0 I2C: 00:1a
1240 11:41:03.274297 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1241 11:41:03.274381 I2C: 00:1a
1242 11:41:03.278221 I2C: 00:1a
1243 11:41:03.278303 I2C: 00:1a
1244 11:41:03.281318 I2C: 00:28
1245 11:41:03.281399 I2C: 00:29
1246 11:41:03.284173 PCI: 00:19.2
1247 11:41:03.294251 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1248 11:41:03.304159 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1249 11:41:03.307451 PCI: 00:1a.0
1250 11:41:03.317541 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1251 11:41:03.317624 PCI: 00:1e.0
1252 11:41:03.320381 PCI: 00:1e.2 child on link 0 SPI: 00
1253 11:41:03.333669 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1254 11:41:03.333753 SPI: 00
1255 11:41:03.336873 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1256 11:41:03.346973 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1257 11:41:03.347056 PNP: 0c09.0
1258 11:41:03.356523 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1259 11:41:03.359888 PCI: 00:1f.2
1260 11:41:03.366656 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1261 11:41:03.376884 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1262 11:41:03.383520 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1263 11:41:03.393274 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1264 11:41:03.403342 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1265 11:41:03.403441 GENERIC: 0.0
1266 11:41:03.406566 PCI: 00:1f.5
1267 11:41:03.416297 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1268 11:41:03.419401 Done allocating resources.
1269 11:41:03.426099 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2095 ms
1270 11:41:03.426192 Enabling resources...
1271 11:41:03.433289 PCI: 00:00.0 subsystem <- 8086/4e22
1272 11:41:03.433375 PCI: 00:00.0 cmd <- 06
1273 11:41:03.436370 PCI: 00:02.0 subsystem <- 8086/4e55
1274 11:41:03.439935 PCI: 00:02.0 cmd <- 03
1275 11:41:03.443028 PCI: 00:04.0 subsystem <- 8086/4e03
1276 11:41:03.446524 PCI: 00:04.0 cmd <- 02
1277 11:41:03.449732 PCI: 00:05.0 bridge ctrl <- 0003
1278 11:41:03.453703 PCI: 00:05.0 subsystem <- 8086/4e19
1279 11:41:03.456171 PCI: 00:05.0 cmd <- 02
1280 11:41:03.459916 PCI: 00:08.0 cmd <- 06
1281 11:41:03.462656 PCI: 00:14.0 subsystem <- 8086/4ded
1282 11:41:03.462739 PCI: 00:14.0 cmd <- 02
1283 11:41:03.470193 PCI: 00:14.3 subsystem <- 8086/4df0
1284 11:41:03.470276 PCI: 00:14.3 cmd <- 02
1285 11:41:03.473134 PCI: 00:14.5 subsystem <- 8086/4df8
1286 11:41:03.476280 PCI: 00:14.5 cmd <- 06
1287 11:41:03.480384 PCI: 00:15.0 subsystem <- 8086/4de8
1288 11:41:03.482945 PCI: 00:15.0 cmd <- 02
1289 11:41:03.486452 PCI: 00:15.1 subsystem <- 8086/4de9
1290 11:41:03.489729 PCI: 00:15.1 cmd <- 02
1291 11:41:03.493448 PCI: 00:15.2 subsystem <- 8086/4dea
1292 11:41:03.496466 PCI: 00:15.2 cmd <- 02
1293 11:41:03.499371 PCI: 00:15.3 subsystem <- 8086/4deb
1294 11:41:03.502618 PCI: 00:15.3 cmd <- 02
1295 11:41:03.506487 PCI: 00:16.0 subsystem <- 8086/4de0
1296 11:41:03.506576 PCI: 00:16.0 cmd <- 02
1297 11:41:03.512680 PCI: 00:19.0 subsystem <- 8086/4dc5
1298 11:41:03.512763 PCI: 00:19.0 cmd <- 02
1299 11:41:03.515988 PCI: 00:19.2 subsystem <- 8086/4dc7
1300 11:41:03.519670 PCI: 00:19.2 cmd <- 06
1301 11:41:03.522988 PCI: 00:1a.0 subsystem <- 8086/4dc4
1302 11:41:03.526133 PCI: 00:1a.0 cmd <- 06
1303 11:41:03.529030 PCI: 00:1e.2 subsystem <- 8086/4daa
1304 11:41:03.532459 PCI: 00:1e.2 cmd <- 06
1305 11:41:03.536311 PCI: 00:1f.0 subsystem <- 8086/4d87
1306 11:41:03.538967 PCI: 00:1f.0 cmd <- 407
1307 11:41:03.542276 PCI: 00:1f.3 subsystem <- 8086/4dc8
1308 11:41:03.545772 PCI: 00:1f.3 cmd <- 02
1309 11:41:03.549023 PCI: 00:1f.5 subsystem <- 8086/4da4
1310 11:41:03.549107 PCI: 00:1f.5 cmd <- 406
1311 11:41:03.554619 done.
1312 11:41:03.557808 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1313 11:41:03.561658 Initializing devices...
1314 11:41:03.565296 Root Device init
1315 11:41:03.565378 mainboard: EC init
1316 11:41:03.571469 Chrome EC: Set SMI mask to 0x0000000000000000
1317 11:41:03.577731 Chrome EC: clear events_b mask to 0x0000000000000000
1318 11:41:03.580990 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1319 11:41:03.587678 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1320 11:41:03.594333 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1321 11:41:03.598171 Chrome EC: Set WAKE mask to 0x0000000000000000
1322 11:41:03.606145 Root Device init finished in 37 msecs
1323 11:41:03.608969 PCI: 00:00.0 init
1324 11:41:03.609053 CPU TDP = 6 Watts
1325 11:41:03.612683 CPU PL1 = 7 Watts
1326 11:41:03.615844 CPU PL2 = 12 Watts
1327 11:41:03.619125 PCI: 00:00.0 init finished in 6 msecs
1328 11:41:03.619252 PCI: 00:02.0 init
1329 11:41:03.622561 GMA: Found VBT in CBFS
1330 11:41:03.625509 GMA: Found valid VBT in CBFS
1331 11:41:03.632000 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1332 11:41:03.638845 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1333 11:41:03.642247 PCI: 00:02.0 init finished in 18 msecs
1334 11:41:03.646137 PCI: 00:08.0 init
1335 11:41:03.648740 PCI: 00:08.0 init finished in 0 msecs
1336 11:41:03.652786 PCI: 00:14.0 init
1337 11:41:03.655214 XHCI: Updated LFPS sampling OFF time to 9 ms
1338 11:41:03.658945 PCI: 00:14.0 init finished in 4 msecs
1339 11:41:03.662093 PCI: 00:15.0 init
1340 11:41:03.665248 I2C bus 0 version 0x3230302a
1341 11:41:03.668523 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1342 11:41:03.671893 PCI: 00:15.0 init finished in 6 msecs
1343 11:41:03.675338 PCI: 00:15.1 init
1344 11:41:03.678558 I2C bus 1 version 0x3230302a
1345 11:41:03.682559 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1346 11:41:03.685653 PCI: 00:15.1 init finished in 6 msecs
1347 11:41:03.688709 PCI: 00:15.2 init
1348 11:41:03.688789 I2C bus 2 version 0x3230302a
1349 11:41:03.695058 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1350 11:41:03.698611 PCI: 00:15.2 init finished in 6 msecs
1351 11:41:03.698692 PCI: 00:15.3 init
1352 11:41:03.702173 I2C bus 3 version 0x3230302a
1353 11:41:03.705522 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1354 11:41:03.708836 PCI: 00:15.3 init finished in 6 msecs
1355 11:41:03.712716 PCI: 00:16.0 init
1356 11:41:03.715413 PCI: 00:16.0 init finished in 0 msecs
1357 11:41:03.718644 PCI: 00:19.0 init
1358 11:41:03.722210 I2C bus 4 version 0x3230302a
1359 11:41:03.725819 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1360 11:41:03.728511 PCI: 00:19.0 init finished in 6 msecs
1361 11:41:03.731821 PCI: 00:1a.0 init
1362 11:41:03.735414 PCI: 00:1a.0 init finished in 0 msecs
1363 11:41:03.738474 PCI: 00:1f.0 init
1364 11:41:03.741567 IOAPIC: Initializing IOAPIC at 0xfec00000
1365 11:41:03.745047 IOAPIC: Bootstrap Processor Local APIC = 0x00
1366 11:41:03.748170 IOAPIC: ID = 0x02
1367 11:41:03.751961 IOAPIC: Dumping registers
1368 11:41:03.752044 reg 0x0000: 0x02000000
1369 11:41:03.754972 reg 0x0001: 0x00770020
1370 11:41:03.758325 reg 0x0002: 0x00000000
1371 11:41:03.761692 PCI: 00:1f.0 init finished in 21 msecs
1372 11:41:03.764835 PCI: 00:1f.2 init
1373 11:41:03.764918 Disabling ACPI via APMC.
1374 11:41:03.771388 APMC done.
1375 11:41:03.774423 PCI: 00:1f.2 init finished in 6 msecs
1376 11:41:03.786095 PNP: 0c09.0 init
1377 11:41:03.788774 Google Chrome EC uptime: 6.615 seconds
1378 11:41:03.795779 Google Chrome AP resets since EC boot: 0
1379 11:41:03.798836 Google Chrome most recent AP reset causes:
1380 11:41:03.802640 Google Chrome EC reset flags at last EC boot: reset-pin
1381 11:41:03.809073 PNP: 0c09.0 init finished in 18 msecs
1382 11:41:03.809160 Devices initialized
1383 11:41:03.812676 Show all devs... After init.
1384 11:41:03.815918 Root Device: enabled 1
1385 11:41:03.819248 CPU_CLUSTER: 0: enabled 1
1386 11:41:03.819331 DOMAIN: 0000: enabled 1
1387 11:41:03.822298 PCI: 00:00.0: enabled 1
1388 11:41:03.825851 PCI: 00:02.0: enabled 1
1389 11:41:03.829396 PCI: 00:04.0: enabled 1
1390 11:41:03.829482 PCI: 00:05.0: enabled 1
1391 11:41:03.832489 PCI: 00:09.0: enabled 0
1392 11:41:03.835392 PCI: 00:12.6: enabled 0
1393 11:41:03.838945 PCI: 00:14.0: enabled 1
1394 11:41:03.839029 PCI: 00:14.1: enabled 0
1395 11:41:03.842413 PCI: 00:14.2: enabled 0
1396 11:41:03.846019 PCI: 00:14.3: enabled 1
1397 11:41:03.849175 PCI: 00:14.5: enabled 1
1398 11:41:03.849259 PCI: 00:15.0: enabled 1
1399 11:41:03.851871 PCI: 00:15.1: enabled 1
1400 11:41:03.855673 PCI: 00:15.2: enabled 1
1401 11:41:03.858939 PCI: 00:15.3: enabled 1
1402 11:41:03.859023 PCI: 00:16.0: enabled 1
1403 11:41:03.862285 PCI: 00:16.1: enabled 0
1404 11:41:03.865020 PCI: 00:16.4: enabled 0
1405 11:41:03.865102 PCI: 00:16.5: enabled 0
1406 11:41:03.868558 PCI: 00:17.0: enabled 0
1407 11:41:03.871557 PCI: 00:19.0: enabled 1
1408 11:41:03.874872 PCI: 00:19.1: enabled 0
1409 11:41:03.874955 PCI: 00:19.2: enabled 1
1410 11:41:03.878291 PCI: 00:1a.0: enabled 1
1411 11:41:03.882312 PCI: 00:1c.0: enabled 0
1412 11:41:03.885019 PCI: 00:1c.1: enabled 0
1413 11:41:03.885102 PCI: 00:1c.2: enabled 0
1414 11:41:03.888859 PCI: 00:1c.3: enabled 0
1415 11:41:03.891643 PCI: 00:1c.4: enabled 0
1416 11:41:03.895392 PCI: 00:1c.5: enabled 0
1417 11:41:03.895475 PCI: 00:1c.6: enabled 0
1418 11:41:03.898266 PCI: 00:1c.7: enabled 1
1419 11:41:03.901672 PCI: 00:1e.0: enabled 0
1420 11:41:03.905315 PCI: 00:1e.1: enabled 0
1421 11:41:03.905398 PCI: 00:1e.2: enabled 1
1422 11:41:03.908458 PCI: 00:1e.3: enabled 0
1423 11:41:03.911780 PCI: 00:1f.0: enabled 1
1424 11:41:03.911920 PCI: 00:1f.1: enabled 0
1425 11:41:03.914733 PCI: 00:1f.2: enabled 1
1426 11:41:03.917855 PCI: 00:1f.3: enabled 1
1427 11:41:03.921477 PCI: 00:1f.4: enabled 0
1428 11:41:03.921559 PCI: 00:1f.5: enabled 1
1429 11:41:03.924660 PCI: 00:1f.7: enabled 0
1430 11:41:03.928184 GENERIC: 0.0: enabled 1
1431 11:41:03.931252 GENERIC: 0.0: enabled 1
1432 11:41:03.931334 USB0 port 0: enabled 1
1433 11:41:03.934628 GENERIC: 0.0: enabled 1
1434 11:41:03.937905 I2C: 00:2c: enabled 1
1435 11:41:03.937988 I2C: 00:15: enabled 1
1436 11:41:03.941340 GENERIC: 0.0: enabled 0
1437 11:41:03.944614 I2C: 00:15: enabled 1
1438 11:41:03.944696 I2C: 00:10: enabled 0
1439 11:41:03.947704 I2C: 00:10: enabled 0
1440 11:41:03.951029 I2C: 00:2c: enabled 1
1441 11:41:03.954393 I2C: 00:40: enabled 1
1442 11:41:03.954477 I2C: 00:10: enabled 1
1443 11:41:03.958407 I2C: 00:39: enabled 1
1444 11:41:03.960896 I2C: 00:36: enabled 1
1445 11:41:03.960979 I2C: 00:10: enabled 0
1446 11:41:03.964553 I2C: 00:0c: enabled 1
1447 11:41:03.967663 I2C: 00:50: enabled 1
1448 11:41:03.967752 I2C: 00:1a: enabled 1
1449 11:41:03.971119 I2C: 00:1a: enabled 0
1450 11:41:03.973984 I2C: 00:1a: enabled 0
1451 11:41:03.974069 I2C: 00:28: enabled 1
1452 11:41:03.977749 I2C: 00:29: enabled 1
1453 11:41:03.980627 PCI: 00:00.0: enabled 1
1454 11:41:03.980758 SPI: 00: enabled 1
1455 11:41:03.983891 PNP: 0c09.0: enabled 1
1456 11:41:03.987360 GENERIC: 0.0: enabled 0
1457 11:41:03.987448 USB2 port 0: enabled 1
1458 11:41:03.990668 USB2 port 1: enabled 1
1459 11:41:03.994002 USB2 port 2: enabled 1
1460 11:41:03.997188 USB2 port 3: enabled 1
1461 11:41:03.997277 USB2 port 4: enabled 0
1462 11:41:04.000697 USB2 port 5: enabled 1
1463 11:41:04.003808 USB2 port 6: enabled 0
1464 11:41:04.003898 USB2 port 7: enabled 1
1465 11:41:04.007536 USB3 port 0: enabled 1
1466 11:41:04.010903 USB3 port 1: enabled 1
1467 11:41:04.014263 USB3 port 2: enabled 1
1468 11:41:04.014352 USB3 port 3: enabled 1
1469 11:41:04.017036 APIC: 00: enabled 1
1470 11:41:04.019906 APIC: 02: enabled 1
1471 11:41:04.020034 PCI: 00:08.0: enabled 1
1472 11:41:04.027354 BS: BS_DEV_INIT run times (exec / console): 25 / 437 ms
1473 11:41:04.030279 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1474 11:41:04.033269 ELOG: NV offset 0xbfa000 size 0x1000
1475 11:41:04.042580 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1476 11:41:04.048516 ELOG: Event(17) added with size 13 at 2023-04-03 11:41:04 UTC
1477 11:41:04.055150 ELOG: Event(92) added with size 9 at 2023-04-03 11:41:04 UTC
1478 11:41:04.062168 ELOG: Event(93) added with size 9 at 2023-04-03 11:41:04 UTC
1479 11:41:04.068150 ELOG: Event(9E) added with size 10 at 2023-04-03 11:41:04 UTC
1480 11:41:04.074903 ELOG: Event(9F) added with size 14 at 2023-04-03 11:41:04 UTC
1481 11:41:04.078797 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1482 11:41:04.085070 ELOG: Event(A1) added with size 10 at 2023-04-03 11:41:04 UTC
1483 11:41:04.095081 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1484 11:41:04.101597 ELOG: Event(A0) added with size 9 at 2023-04-03 11:41:04 UTC
1485 11:41:04.104873 elog_add_boot_reason: Logged dev mode boot
1486 11:41:04.112087 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1487 11:41:04.112187 Finalize devices...
1488 11:41:04.114919 Devices finalized
1489 11:41:04.118007 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1490 11:41:04.124794 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1491 11:41:04.131520 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1492 11:41:04.135137 ME: HFSTS1 : 0x80030045
1493 11:41:04.137991 ME: HFSTS2 : 0x30280136
1494 11:41:04.141326 ME: HFSTS3 : 0x00000050
1495 11:41:04.148430 ME: HFSTS4 : 0x00004000
1496 11:41:04.151132 ME: HFSTS5 : 0x00000000
1497 11:41:04.155201 ME: HFSTS6 : 0x40400006
1498 11:41:04.158235 ME: Manufacturing Mode : NO
1499 11:41:04.161119 ME: FW Partition Table : OK
1500 11:41:04.164284 ME: Bringup Loader Failure : NO
1501 11:41:04.167727 ME: Firmware Init Complete : NO
1502 11:41:04.171136 ME: Boot Options Present : NO
1503 11:41:04.174467 ME: Update In Progress : NO
1504 11:41:04.178011 ME: D0i3 Support : YES
1505 11:41:04.181268 ME: Low Power State Enabled : NO
1506 11:41:04.185210 ME: CPU Replaced : YES
1507 11:41:04.187740 ME: CPU Replacement Valid : YES
1508 11:41:04.190607 ME: Current Working State : 5
1509 11:41:04.194025 ME: Current Operation State : 1
1510 11:41:04.197612 ME: Current Operation Mode : 3
1511 11:41:04.201600 ME: Error Code : 0
1512 11:41:04.203818 ME: CPU Debug Disabled : YES
1513 11:41:04.208196 ME: TXT Support : NO
1514 11:41:04.213984 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1515 11:41:04.220429 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1516 11:41:04.224273 ACPI: Writing ACPI tables at 76b27000.
1517 11:41:04.224367 ACPI: * FACS
1518 11:41:04.227177 ACPI: * DSDT
1519 11:41:04.230983 Ramoops buffer: 0x100000@0x76a26000.
1520 11:41:04.234180 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1521 11:41:04.241213 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1522 11:41:04.243894 Google Chrome EC: version:
1523 11:41:04.247584 ro: magolor_1.1.9999-103b6f9
1524 11:41:04.251250 rw: magolor_1.1.9999-103b6f9
1525 11:41:04.251355 running image: 1
1526 11:41:04.256939 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1527 11:41:04.260929 ACPI: * FADT
1528 11:41:04.261052 SCI is IRQ9
1529 11:41:04.267879 ACPI: added table 1/32, length now 40
1530 11:41:04.268034 ACPI: * SSDT
1531 11:41:04.270914 Found 1 CPU(s) with 2 core(s) each.
1532 11:41:04.274163 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1533 11:41:04.281324 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1534 11:41:04.284793 Could not locate 'wifi_sar' in VPD.
1535 11:41:04.287159 Checking CBFS for default SAR values
1536 11:41:04.294053 wifi_sar_defaults.hex has bad len in CBFS
1537 11:41:04.297848 failed from getting SAR limits!
1538 11:41:04.300610 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1539 11:41:04.307063 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1540 11:41:04.310657 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1541 11:41:04.317539 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1542 11:41:04.320338 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1543 11:41:04.326932 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1544 11:41:04.330036 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1545 11:41:04.336746 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1546 11:41:04.343341 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1547 11:41:04.350145 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1548 11:41:04.353338 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1549 11:41:04.360259 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1550 11:41:04.366934 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1551 11:41:04.370012 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1552 11:41:04.373645 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1553 11:41:04.380986 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1554 11:41:04.384884 PS2K: Passing 101 keymaps to kernel
1555 11:41:04.390886 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1556 11:41:04.397926 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1557 11:41:04.400875 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1558 11:41:04.407663 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1559 11:41:04.411304 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1560 11:41:04.417928 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1561 11:41:04.424533 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1562 11:41:04.431199 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1563 11:41:04.434147 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1564 11:41:04.441075 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1565 11:41:04.443861 ACPI: added table 2/32, length now 44
1566 11:41:04.447417 ACPI: * MCFG
1567 11:41:04.450543 ACPI: added table 3/32, length now 48
1568 11:41:04.450657 ACPI: * TPM2
1569 11:41:04.454155 TPM2 log created at 0x76a16000
1570 11:41:04.457358 ACPI: added table 4/32, length now 52
1571 11:41:04.461503 ACPI: * MADT
1572 11:41:04.461631 SCI is IRQ9
1573 11:41:04.464675 ACPI: added table 5/32, length now 56
1574 11:41:04.467855 current = 76b2d580
1575 11:41:04.467949 ACPI: * DMAR
1576 11:41:04.473772 ACPI: added table 6/32, length now 60
1577 11:41:04.477424 ACPI: added table 7/32, length now 64
1578 11:41:04.477527 ACPI: * HPET
1579 11:41:04.480507 ACPI: added table 8/32, length now 68
1580 11:41:04.483924 ACPI: done.
1581 11:41:04.487497 ACPI tables: 26304 bytes.
1582 11:41:04.490450 smbios_write_tables: 76a15000
1583 11:41:04.494761 EC returned error result code 3
1584 11:41:04.496946 Couldn't obtain OEM name from CBI
1585 11:41:04.497038 Create SMBIOS type 16
1586 11:41:04.500458 Create SMBIOS type 17
1587 11:41:04.503619 GENERIC: 0.0 (WIFI Device)
1588 11:41:04.506917 SMBIOS tables: 913 bytes.
1589 11:41:04.510785 Writing table forward entry at 0x00000500
1590 11:41:04.516865 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1591 11:41:04.520304 Writing coreboot table at 0x76b4b000
1592 11:41:04.527264 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1593 11:41:04.530672 1. 0000000000001000-000000000009ffff: RAM
1594 11:41:04.537674 2. 00000000000a0000-00000000000fffff: RESERVED
1595 11:41:04.540534 3. 0000000000100000-0000000076a14fff: RAM
1596 11:41:04.547528 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1597 11:41:04.550469 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1598 11:41:04.556575 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1599 11:41:04.560086 7. 0000000077000000-000000007fbfffff: RESERVED
1600 11:41:04.566810 8. 00000000c0000000-00000000cfffffff: RESERVED
1601 11:41:04.570909 9. 00000000fb000000-00000000fb000fff: RESERVED
1602 11:41:04.576683 10. 00000000fe000000-00000000fe00ffff: RESERVED
1603 11:41:04.580663 11. 00000000fea80000-00000000fea87fff: RESERVED
1604 11:41:04.587286 12. 00000000fed80000-00000000fed87fff: RESERVED
1605 11:41:04.589594 13. 00000000fed90000-00000000fed92fff: RESERVED
1606 11:41:04.593061 14. 00000000feda0000-00000000feda1fff: RESERVED
1607 11:41:04.599514 15. 0000000100000000-00000001803fffff: RAM
1608 11:41:04.603111 Passing 4 GPIOs to payload:
1609 11:41:04.606225 NAME | PORT | POLARITY | VALUE
1610 11:41:04.613114 lid | undefined | high | high
1611 11:41:04.615990 power | undefined | high | low
1612 11:41:04.623177 oprom | undefined | high | low
1613 11:41:04.626385 EC in RW | 0x000000b9 | high | low
1614 11:41:04.632620 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum d0bd
1615 11:41:04.636004 coreboot table: 1504 bytes.
1616 11:41:04.639773 IMD ROOT 0. 0x76fff000 0x00001000
1617 11:41:04.642799 IMD SMALL 1. 0x76ffe000 0x00001000
1618 11:41:04.649449 FSP MEMORY 2. 0x76c4e000 0x003b0000
1619 11:41:04.652903 CONSOLE 3. 0x76c2e000 0x00020000
1620 11:41:04.656652 FMAP 4. 0x76c2d000 0x00000578
1621 11:41:04.659696 TIME STAMP 5. 0x76c2c000 0x00000910
1622 11:41:04.662898 VBOOT WORK 6. 0x76c18000 0x00014000
1623 11:41:04.666199 ROMSTG STCK 7. 0x76c17000 0x00001000
1624 11:41:04.669951 AFTER CAR 8. 0x76c0d000 0x0000a000
1625 11:41:04.673092 RAMSTAGE 9. 0x76ba7000 0x00066000
1626 11:41:04.679743 REFCODE 10. 0x76b67000 0x00040000
1627 11:41:04.682899 SMM BACKUP 11. 0x76b57000 0x00010000
1628 11:41:04.685749 4f444749 12. 0x76b55000 0x00002000
1629 11:41:04.689491 EXT VBT13. 0x76b53000 0x00001c43
1630 11:41:04.692491 COREBOOT 14. 0x76b4b000 0x00008000
1631 11:41:04.695625 ACPI 15. 0x76b27000 0x00024000
1632 11:41:04.698755 ACPI GNVS 16. 0x76b26000 0x00001000
1633 11:41:04.702809 RAMOOPS 17. 0x76a26000 0x00100000
1634 11:41:04.705773 TPM2 TCGLOG18. 0x76a16000 0x00010000
1635 11:41:04.712408 SMBIOS 19. 0x76a15000 0x00000800
1636 11:41:04.712572 IMD small region:
1637 11:41:04.715738 IMD ROOT 0. 0x76ffec00 0x00000400
1638 11:41:04.718983 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1639 11:41:04.725537 VPD 2. 0x76ffeb80 0x0000004c
1640 11:41:04.729380 POWER STATE 3. 0x76ffeb40 0x00000040
1641 11:41:04.732407 ROMSTAGE 4. 0x76ffeb20 0x00000004
1642 11:41:04.735538 MEM INFO 5. 0x76ffe940 0x000001e0
1643 11:41:04.742328 BS: BS_WRITE_TABLES run times (exec / console): 6 / 516 ms
1644 11:41:04.745421 MTRR: Physical address space:
1645 11:41:04.752383 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1646 11:41:04.758619 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1647 11:41:04.762254 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1648 11:41:04.769154 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1649 11:41:04.776227 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1650 11:41:04.782567 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1651 11:41:04.789748 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1652 11:41:04.792104 MTRR: Fixed MSR 0x250 0x0606060606060606
1653 11:41:04.796067 MTRR: Fixed MSR 0x258 0x0606060606060606
1654 11:41:04.801781 MTRR: Fixed MSR 0x259 0x0000000000000000
1655 11:41:04.805604 MTRR: Fixed MSR 0x268 0x0606060606060606
1656 11:41:04.808490 MTRR: Fixed MSR 0x269 0x0606060606060606
1657 11:41:04.812742 MTRR: Fixed MSR 0x26a 0x0606060606060606
1658 11:41:04.818761 MTRR: Fixed MSR 0x26b 0x0606060606060606
1659 11:41:04.821683 MTRR: Fixed MSR 0x26c 0x0606060606060606
1660 11:41:04.824947 MTRR: Fixed MSR 0x26d 0x0606060606060606
1661 11:41:04.828456 MTRR: Fixed MSR 0x26e 0x0606060606060606
1662 11:41:04.835199 MTRR: Fixed MSR 0x26f 0x0606060606060606
1663 11:41:04.838196 call enable_fixed_mtrr()
1664 11:41:04.841998 CPU physical address size: 39 bits
1665 11:41:04.845055 MTRR: default type WB/UC MTRR counts: 6/5.
1666 11:41:04.848043 MTRR: UC selected as default type.
1667 11:41:04.854835 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1668 11:41:04.861873 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1669 11:41:04.867858 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1670 11:41:04.871668 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1671 11:41:04.878089 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1672 11:41:04.881385
1673 11:41:04.881907 MTRR check
1674 11:41:04.884888 Fixed MTRRs : Enabled
1675 11:41:04.885277 Variable MTRRs: Enabled
1676 11:41:04.885589
1677 11:41:04.891618 MTRR: Fixed MSR 0x250 0x0606060606060606
1678 11:41:04.894661 MTRR: Fixed MSR 0x258 0x0606060606060606
1679 11:41:04.897908 MTRR: Fixed MSR 0x259 0x0000000000000000
1680 11:41:04.901007 MTRR: Fixed MSR 0x268 0x0606060606060606
1681 11:41:04.907797 MTRR: Fixed MSR 0x269 0x0606060606060606
1682 11:41:04.911319 MTRR: Fixed MSR 0x26a 0x0606060606060606
1683 11:41:04.914689 MTRR: Fixed MSR 0x26b 0x0606060606060606
1684 11:41:04.918257 MTRR: Fixed MSR 0x26c 0x0606060606060606
1685 11:41:04.924487 MTRR: Fixed MSR 0x26d 0x0606060606060606
1686 11:41:04.927837 MTRR: Fixed MSR 0x26e 0x0606060606060606
1687 11:41:04.931145 MTRR: Fixed MSR 0x26f 0x0606060606060606
1688 11:41:04.937213 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1689 11:41:04.940800 call enable_fixed_mtrr()
1690 11:41:04.945810 Checking cr50 for pending updates
1691 11:41:04.946339 CPU physical address size: 39 bits
1692 11:41:04.949633 Reading cr50 TPM mode
1693 11:41:04.959902 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 6 ms
1694 11:41:04.967432 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1695 11:41:04.970556 Checking segment from ROM address 0xfff9d5b8
1696 11:41:04.977252 Checking segment from ROM address 0xfff9d5d4
1697 11:41:04.980996 Loading segment from ROM address 0xfff9d5b8
1698 11:41:04.983501 code (compression=0)
1699 11:41:04.990671 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1700 11:41:05.001005 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1701 11:41:05.003831 it's not compressed!
1702 11:41:05.128842 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1703 11:41:05.135334 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1704 11:41:05.143030 Loading segment from ROM address 0xfff9d5d4
1705 11:41:05.146030 Entry Point 0x30000000
1706 11:41:05.146562 Loaded segments
1707 11:41:05.153241 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1708 11:41:05.169139 Finalizing chipset.
1709 11:41:05.172916 Finalizing SMM.
1710 11:41:05.173441 APMC done.
1711 11:41:05.179002 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1712 11:41:05.182057 mp_park_aps done after 0 msecs.
1713 11:41:05.185256 Jumping to boot code at 0x30000000(0x76b4b000)
1714 11:41:05.195699 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1715 11:41:05.196274
1716 11:41:05.196621
1717 11:41:05.196940
1718 11:41:05.198795 Starting depthcharge on Magolor...
1719 11:41:05.199219
1720 11:41:05.200218 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1721 11:41:05.200720 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1722 11:41:05.201141 Setting prompt string to ['dedede:']
1723 11:41:05.201550 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1724 11:41:05.208426 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1725 11:41:05.208862
1726 11:41:05.215274 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1727 11:41:05.215809
1728 11:41:05.218762 fw_config match found: AUDIO_AMP=UNPROVISIONED
1729 11:41:05.219291
1730 11:41:05.221554 Wipe memory regions:
1731 11:41:05.221987
1732 11:41:05.225324 [0x00000000001000, 0x000000000a0000)
1733 11:41:05.225848
1734 11:41:05.228105 [0x00000000100000, 0x00000030000000)
1735 11:41:05.356620
1736 11:41:05.359821 [0x00000031062170, 0x00000076a15000)
1737 11:41:05.528985
1738 11:41:05.532180 [0x00000100000000, 0x00000180400000)
1739 11:41:06.594125
1740 11:41:06.594397 R8152: Initializing
1741 11:41:06.594560
1742 11:41:06.597507 Version 9 (ocp_data = 6010)
1743 11:41:06.597693
1744 11:41:06.600959 R8152: Done initializing
1745 11:41:06.601141
1746 11:41:06.603915 Adding net device
1747 11:41:06.604139
1748 11:41:06.607230 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1749 11:41:06.607418
1750 11:41:06.610590
1751 11:41:06.610770
1752 11:41:06.611193 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1754 11:41:06.712018 dedede: tftpboot 192.168.201.1 9849680/tftp-deploy-lcshddqx/kernel/bzImage 9849680/tftp-deploy-lcshddqx/kernel/cmdline 9849680/tftp-deploy-lcshddqx/ramdisk/ramdisk.cpio.gz
1755 11:41:06.712178 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1756 11:41:06.712273 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1757 11:41:06.717048 tftpboot 192.168.201.1 9849680/tftp-deploy-lcshddqx/kernel/bzImaoy-lcshddqx/kernel/cmdline 9849680/tftp-deploy-lcshddqx/ramdisk/ramdisk.cpio.gz
1758 11:41:06.717137
1759 11:41:06.717202 Waiting for link
1760 11:41:06.918590
1761 11:41:06.918739 done.
1762 11:41:06.918808
1763 11:41:06.918869 MAC: 00:e0:4c:75:0d:b4
1764 11:41:06.918929
1765 11:41:06.922234 Sending DHCP discover... done.
1766 11:41:06.922304
1767 11:41:06.925181 Waiting for reply... done.
1768 11:41:06.925263
1769 11:41:06.928581 Sending DHCP request... done.
1770 11:41:06.928664
1771 11:41:06.931584 Waiting for reply... done.
1772 11:41:06.931666
1773 11:41:06.935255 My ip is 192.168.201.20
1774 11:41:06.935337
1775 11:41:06.938459 The DHCP server ip is 192.168.201.1
1776 11:41:06.938540
1777 11:41:06.945090 TFTP server IP predefined by user: 192.168.201.1
1778 11:41:06.945173
1779 11:41:06.951540 Bootfile predefined by user: 9849680/tftp-deploy-lcshddqx/kernel/bzImage
1780 11:41:06.951639
1781 11:41:06.954720 Sending tftp read request... done.
1782 11:41:06.954802
1783 11:41:06.958166 Waiting for the transfer...
1784 11:41:06.958248
1785 11:41:07.274483 00000000 ################################################################
1786 11:41:07.274636
1787 11:41:07.543355 00080000 ################################################################
1788 11:41:07.543513
1789 11:41:07.835024 00100000 ################################################################
1790 11:41:07.835168
1791 11:41:08.108089 00180000 ################################################################
1792 11:41:08.108233
1793 11:41:08.378479 00200000 ################################################################
1794 11:41:08.378651
1795 11:41:08.676178 00280000 ################################################################
1796 11:41:08.676335
1797 11:41:08.977210 00300000 ################################################################
1798 11:41:08.977354
1799 11:41:09.269308 00380000 ################################################################
1800 11:41:09.269455
1801 11:41:09.538120 00400000 ################################################################
1802 11:41:09.538267
1803 11:41:09.833473 00480000 ################################################################
1804 11:41:09.833622
1805 11:41:10.107588 00500000 ################################################################
1806 11:41:10.107766
1807 11:41:10.403904 00580000 ################################################################
1808 11:41:10.404080
1809 11:41:10.675591 00600000 ################################################################
1810 11:41:10.675736
1811 11:41:10.964723 00680000 ################################################################
1812 11:41:10.964868
1813 11:41:11.253683 00700000 ################################################################
1814 11:41:11.253833
1815 11:41:11.263154 00780000 ## done.
1816 11:41:11.263239
1817 11:41:11.267061 The bootfile was 7880592 bytes long.
1818 11:41:11.267146
1819 11:41:11.269871 Sending tftp read request... done.
1820 11:41:11.269955
1821 11:41:11.273192 Waiting for the transfer...
1822 11:41:11.273275
1823 11:41:11.548998 00000000 ################################################################
1824 11:41:11.549145
1825 11:41:11.837289 00080000 ################################################################
1826 11:41:11.837434
1827 11:41:12.136529 00100000 ################################################################
1828 11:41:12.136673
1829 11:41:12.417696 00180000 ################################################################
1830 11:41:12.417846
1831 11:41:12.717439 00200000 ################################################################
1832 11:41:12.717612
1833 11:41:13.014401 00280000 ################################################################
1834 11:41:13.014544
1835 11:41:13.289331 00300000 ################################################################
1836 11:41:13.289477
1837 11:41:13.587196 00380000 ################################################################
1838 11:41:13.587337
1839 11:41:13.857338 00400000 ################################################################
1840 11:41:13.857487
1841 11:41:14.123371 00480000 ################################################################
1842 11:41:14.123512
1843 11:41:14.392538 00500000 ################################################################
1844 11:41:14.392682
1845 11:41:14.671638 00580000 ################################################################
1846 11:41:14.671783
1847 11:41:14.965265 00600000 ################################################################
1848 11:41:14.965412
1849 11:41:15.252812 00680000 ################################################################
1850 11:41:15.252966
1851 11:41:15.552162 00700000 ################################################################
1852 11:41:15.552310
1853 11:41:15.853488 00780000 ################################################################
1854 11:41:15.853641
1855 11:41:16.085672 00800000 ##################################################### done.
1856 11:41:16.085856
1857 11:41:16.089659 Sending tftp read request... done.
1858 11:41:16.089749
1859 11:41:16.092528 Waiting for the transfer...
1860 11:41:16.092613
1861 11:41:16.092678 00000000 # done.
1862 11:41:16.092742
1863 11:41:16.102166 Command line loaded dynamically from TFTP file: 9849680/tftp-deploy-lcshddqx/kernel/cmdline
1864 11:41:16.102255
1865 11:41:16.115533 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1866 11:41:16.115654
1867 11:41:16.119050 ec_init: CrosEC protocol v3 supported (256, 256)
1868 11:41:16.126474
1869 11:41:16.129473 Shutting down all USB controllers.
1870 11:41:16.129565
1871 11:41:16.129631 Removing current net device
1872 11:41:16.129696
1873 11:41:16.133174 Finalizing coreboot
1874 11:41:16.133258
1875 11:41:16.139313 Exiting depthcharge with code 4 at timestamp: 17780223
1876 11:41:16.139398
1877 11:41:16.139482
1878 11:41:16.139562 Starting kernel ...
1879 11:41:16.139639
1880 11:41:16.139715
1881 11:41:16.140342 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
1882 11:41:16.140479 start: 2.2.5 auto-login-action (timeout 00:04:36) [common]
1883 11:41:16.140589 Setting prompt string to ['Linux version [0-9]']
1884 11:41:16.140673 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1885 11:41:16.140754 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1887 11:45:52.141436 end: 2.2.5 auto-login-action (duration 00:04:36) [common]
1889 11:45:52.143174 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 276 seconds'
1891 11:45:52.144582 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1894 11:45:52.145672 end: 2 depthcharge-action (duration 00:05:00) [common]
1896 11:45:52.145886 Cleaning after the job
1897 11:45:52.145974 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849680/tftp-deploy-lcshddqx/ramdisk
1898 11:45:52.146816 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849680/tftp-deploy-lcshddqx/kernel
1899 11:45:52.147510 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849680/tftp-deploy-lcshddqx/modules
1900 11:45:52.147756 start: 5.1 power-off (timeout 00:00:30) [common]
1901 11:45:52.147914 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-3' '--port=1' '--command=off'
1902 11:45:52.229386 >> Command sent successfully.
1903 11:45:52.237530 Returned 0 in 0 seconds
1904 11:45:52.339181 end: 5.1 power-off (duration 00:00:00) [common]
1906 11:45:52.340868 start: 5.2 read-feedback (timeout 00:10:00) [common]
1907 11:45:52.342187 Listened to connection for namespace 'common' for up to 1s
1909 11:45:52.343686 Listened to connection for namespace 'common' for up to 1s
1910 11:45:53.345989 Finalising connection for namespace 'common'
1911 11:45:53.346671 Disconnecting from shell: Finalise
1912 11:45:53.347082
1913 11:45:53.448377 end: 5.2 read-feedback (duration 00:00:01) [common]
1914 11:45:53.448967 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9849680
1915 11:45:53.480188 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9849680
1916 11:45:53.480616 JobError: Your job cannot terminate cleanly.