Boot log: acer-cb317-1h-c3z6-dedede
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 11:40:23.534189 lava-dispatcher, installed at version: 2023.01
2 11:40:23.534427 start: 0 validate
3 11:40:23.534560 Start time: 2023-04-03 11:40:23.534552+00:00 (UTC)
4 11:40:23.534687 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:40:23.534865 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230324.0%2Famd64%2Finitrd.cpio.gz exists
6 11:40:23.829543 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:40:23.829754 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1098-g8d34bf42efd9b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:40:24.128781 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:40:24.129632 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230324.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:40:27.960373 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:40:27.961162 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1098-g8d34bf42efd9b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 11:40:28.253991 validate duration: 4.72
14 11:40:28.254289 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:40:28.254398 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:40:28.254494 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:40:28.254606 Not decompressing ramdisk as can be used compressed.
18 11:40:28.254708 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230324.0/amd64/initrd.cpio.gz
19 11:40:28.254782 saving as /var/lib/lava/dispatcher/tmp/9849688/tftp-deploy-shug5oec/ramdisk/initrd.cpio.gz
20 11:40:28.254850 total size: 5432104 (5MB)
21 11:40:28.833291 progress 0% (0MB)
22 11:40:28.839444 progress 5% (0MB)
23 11:40:28.840742 progress 10% (0MB)
24 11:40:28.842139 progress 15% (0MB)
25 11:40:28.843644 progress 20% (1MB)
26 11:40:28.844942 progress 25% (1MB)
27 11:40:28.846288 progress 30% (1MB)
28 11:40:28.847738 progress 35% (1MB)
29 11:40:28.849004 progress 40% (2MB)
30 11:40:28.850343 progress 45% (2MB)
31 11:40:28.851628 progress 50% (2MB)
32 11:40:28.853048 progress 55% (2MB)
33 11:40:28.854391 progress 60% (3MB)
34 11:40:28.855669 progress 65% (3MB)
35 11:40:28.857088 progress 70% (3MB)
36 11:40:28.858417 progress 75% (3MB)
37 11:40:28.859681 progress 80% (4MB)
38 11:40:28.860944 progress 85% (4MB)
39 11:40:28.862425 progress 90% (4MB)
40 11:40:28.863694 progress 95% (4MB)
41 11:40:28.864977 progress 100% (5MB)
42 11:40:28.865168 5MB downloaded in 0.61s (8.49MB/s)
43 11:40:28.865308 end: 1.1.1 http-download (duration 00:00:01) [common]
45 11:40:28.865600 end: 1.1 download-retry (duration 00:00:01) [common]
46 11:40:28.865684 start: 1.2 download-retry (timeout 00:09:59) [common]
47 11:40:28.865765 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 11:40:28.865864 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1098-g8d34bf42efd9b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 11:40:28.865930 saving as /var/lib/lava/dispatcher/tmp/9849688/tftp-deploy-shug5oec/kernel/bzImage
50 11:40:28.865989 total size: 7880592 (7MB)
51 11:40:28.866045 No compression specified
52 11:40:28.867146 progress 0% (0MB)
53 11:40:28.869083 progress 5% (0MB)
54 11:40:28.871097 progress 10% (0MB)
55 11:40:28.872996 progress 15% (1MB)
56 11:40:28.874964 progress 20% (1MB)
57 11:40:28.876849 progress 25% (1MB)
58 11:40:28.878810 progress 30% (2MB)
59 11:40:28.880701 progress 35% (2MB)
60 11:40:28.882689 progress 40% (3MB)
61 11:40:28.884725 progress 45% (3MB)
62 11:40:28.886721 progress 50% (3MB)
63 11:40:28.888684 progress 55% (4MB)
64 11:40:28.890686 progress 60% (4MB)
65 11:40:28.892599 progress 65% (4MB)
66 11:40:28.894533 progress 70% (5MB)
67 11:40:28.896403 progress 75% (5MB)
68 11:40:28.898344 progress 80% (6MB)
69 11:40:28.900244 progress 85% (6MB)
70 11:40:28.902223 progress 90% (6MB)
71 11:40:28.904149 progress 95% (7MB)
72 11:40:28.906129 progress 100% (7MB)
73 11:40:28.906286 7MB downloaded in 0.04s (186.52MB/s)
74 11:40:28.906421 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:40:28.906682 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:40:28.906772 start: 1.3 download-retry (timeout 00:09:59) [common]
78 11:40:28.906853 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 11:40:28.906956 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230324.0/amd64/full.rootfs.tar.xz
80 11:40:28.907020 saving as /var/lib/lava/dispatcher/tmp/9849688/tftp-deploy-shug5oec/nfsrootfs/full.rootfs.tar
81 11:40:28.907079 total size: 133328976 (127MB)
82 11:40:28.907136 Using unxz to decompress xz
83 11:40:28.910832 progress 0% (0MB)
84 11:40:29.238249 progress 5% (6MB)
85 11:40:29.593605 progress 10% (12MB)
86 11:40:29.872695 progress 15% (19MB)
87 11:40:30.057885 progress 20% (25MB)
88 11:40:30.307469 progress 25% (31MB)
89 11:40:30.662693 progress 30% (38MB)
90 11:40:31.007725 progress 35% (44MB)
91 11:40:31.394441 progress 40% (50MB)
92 11:40:31.771109 progress 45% (57MB)
93 11:40:32.122502 progress 50% (63MB)
94 11:40:32.485684 progress 55% (69MB)
95 11:40:32.842635 progress 60% (76MB)
96 11:40:33.194987 progress 65% (82MB)
97 11:40:33.553096 progress 70% (89MB)
98 11:40:33.911152 progress 75% (95MB)
99 11:40:34.347106 progress 80% (101MB)
100 11:40:34.777125 progress 85% (108MB)
101 11:40:35.036220 progress 90% (114MB)
102 11:40:35.369296 progress 95% (120MB)
103 11:40:35.747546 progress 100% (127MB)
104 11:40:35.753638 127MB downloaded in 6.85s (18.57MB/s)
105 11:40:35.753925 end: 1.3.1 http-download (duration 00:00:07) [common]
107 11:40:35.754186 end: 1.3 download-retry (duration 00:00:07) [common]
108 11:40:35.754276 start: 1.4 download-retry (timeout 00:09:52) [common]
109 11:40:35.754364 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 11:40:35.754481 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1098-g8d34bf42efd9b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 11:40:35.754551 saving as /var/lib/lava/dispatcher/tmp/9849688/tftp-deploy-shug5oec/modules/modules.tar
112 11:40:35.754613 total size: 251104 (0MB)
113 11:40:35.754676 Using unxz to decompress xz
114 11:40:35.758298 progress 13% (0MB)
115 11:40:35.758690 progress 26% (0MB)
116 11:40:35.758925 progress 39% (0MB)
117 11:40:35.760230 progress 52% (0MB)
118 11:40:35.762175 progress 65% (0MB)
119 11:40:35.763943 progress 78% (0MB)
120 11:40:35.765869 progress 91% (0MB)
121 11:40:35.767681 progress 100% (0MB)
122 11:40:35.772998 0MB downloaded in 0.02s (13.03MB/s)
123 11:40:35.773240 end: 1.4.1 http-download (duration 00:00:00) [common]
125 11:40:35.773623 end: 1.4 download-retry (duration 00:00:00) [common]
126 11:40:35.773721 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 11:40:35.773823 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 11:40:36.985672 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9849688/extract-nfsrootfs-8jh8nlgy
129 11:40:36.985891 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
130 11:40:36.986007 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
131 11:40:36.986159 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623
132 11:40:36.986276 makedir: /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin
133 11:40:36.986375 makedir: /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/tests
134 11:40:36.986472 makedir: /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/results
135 11:40:36.986590 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-add-keys
136 11:40:36.986762 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-add-sources
137 11:40:36.986918 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-background-process-start
138 11:40:36.987070 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-background-process-stop
139 11:40:36.987197 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-common-functions
140 11:40:36.987321 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-echo-ipv4
141 11:40:36.987447 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-install-packages
142 11:40:36.987571 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-installed-packages
143 11:40:36.987694 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-os-build
144 11:40:36.987822 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-probe-channel
145 11:40:36.987973 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-probe-ip
146 11:40:36.988127 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-target-ip
147 11:40:36.988275 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-target-mac
148 11:40:36.988399 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-target-storage
149 11:40:36.988528 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-test-case
150 11:40:36.988680 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-test-event
151 11:40:36.988831 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-test-feedback
152 11:40:36.988985 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-test-raise
153 11:40:36.989136 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-test-reference
154 11:40:36.989286 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-test-runner
155 11:40:36.989438 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-test-set
156 11:40:36.989847 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-test-shell
157 11:40:36.990003 Updating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-install-packages (oe)
158 11:40:36.990162 Updating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/bin/lava-installed-packages (oe)
159 11:40:36.990297 Creating /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/environment
160 11:40:36.990422 LAVA metadata
161 11:40:36.990526 - LAVA_JOB_ID=9849688
162 11:40:36.990626 - LAVA_DISPATCHER_IP=192.168.201.1
163 11:40:36.990766 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
164 11:40:36.990862 skipped lava-vland-overlay
165 11:40:36.990978 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 11:40:36.991099 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
167 11:40:36.991193 skipped lava-multinode-overlay
168 11:40:36.991308 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 11:40:36.991429 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
170 11:40:36.991540 Loading test definitions
171 11:40:36.991672 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
172 11:40:36.991781 Using /lava-9849688 at stage 0
173 11:40:36.992155 uuid=9849688_1.5.2.3.1 testdef=None
174 11:40:36.992276 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 11:40:36.992399 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
176 11:40:36.993076 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 11:40:36.993417 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
179 11:40:36.994033 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 11:40:36.994289 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
182 11:40:36.994825 runner path: /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/0/tests/0_dmesg test_uuid 9849688_1.5.2.3.1
183 11:40:36.994976 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 11:40:36.995226 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
186 11:40:36.995308 Using /lava-9849688 at stage 1
187 11:40:36.995673 uuid=9849688_1.5.2.3.5 testdef=None
188 11:40:36.995792 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 11:40:36.995914 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
190 11:40:36.996575 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 11:40:36.996931 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
193 11:40:36.997805 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 11:40:36.998181 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
196 11:40:36.999017 runner path: /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/1/tests/1_bootrr test_uuid 9849688_1.5.2.3.5
197 11:40:36.999194 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 11:40:36.999539 Creating lava-test-runner.conf files
200 11:40:36.999619 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/0 for stage 0
201 11:40:36.999723 - 0_dmesg
202 11:40:36.999808 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9849688/lava-overlay-jpjjq623/lava-9849688/1 for stage 1
203 11:40:36.999931 - 1_bootrr
204 11:40:37.000059 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 11:40:37.000181 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
206 11:40:37.007434 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 11:40:37.007549 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
208 11:40:37.007649 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 11:40:37.007751 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 11:40:37.007850 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
211 11:40:37.120785 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 11:40:37.121170 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
213 11:40:37.121290 extracting modules file /var/lib/lava/dispatcher/tmp/9849688/tftp-deploy-shug5oec/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9849688/extract-nfsrootfs-8jh8nlgy
214 11:40:37.128477 extracting modules file /var/lib/lava/dispatcher/tmp/9849688/tftp-deploy-shug5oec/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9849688/extract-overlay-ramdisk-0rx3pic5/ramdisk
215 11:40:37.135186 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 11:40:37.135305 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
217 11:40:37.135393 [common] Applying overlay to NFS
218 11:40:37.135462 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9849688/compress-overlay-og7biqi3/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9849688/extract-nfsrootfs-8jh8nlgy
219 11:40:37.141123 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 11:40:37.141233 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
221 11:40:37.141326 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 11:40:37.141414 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
223 11:40:37.141560 Building ramdisk /var/lib/lava/dispatcher/tmp/9849688/extract-overlay-ramdisk-0rx3pic5/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9849688/extract-overlay-ramdisk-0rx3pic5/ramdisk
224 11:40:37.188488 >> 26158 blocks
225 11:40:37.723469 rename /var/lib/lava/dispatcher/tmp/9849688/extract-overlay-ramdisk-0rx3pic5/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9849688/tftp-deploy-shug5oec/ramdisk/ramdisk.cpio.gz
226 11:40:37.723939 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 11:40:37.724062 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
228 11:40:37.724161 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
229 11:40:37.724252 No mkimage arch provided, not using FIT.
230 11:40:37.724341 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 11:40:37.724422 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 11:40:37.724525 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
233 11:40:37.724616 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
234 11:40:37.724696 No LXC device requested
235 11:40:37.724775 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 11:40:37.724860 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
237 11:40:37.724943 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 11:40:37.725023 Checking files for TFTP limit of 4294967296 bytes.
239 11:40:37.725428 end: 1 tftp-deploy (duration 00:00:09) [common]
240 11:40:37.725576 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 11:40:37.725668 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 11:40:37.725788 substitutions:
243 11:40:37.725854 - {DTB}: None
244 11:40:37.725916 - {INITRD}: 9849688/tftp-deploy-shug5oec/ramdisk/ramdisk.cpio.gz
245 11:40:37.725975 - {KERNEL}: 9849688/tftp-deploy-shug5oec/kernel/bzImage
246 11:40:37.726032 - {LAVA_MAC}: None
247 11:40:37.726088 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9849688/extract-nfsrootfs-8jh8nlgy
248 11:40:37.726144 - {NFS_SERVER_IP}: 192.168.201.1
249 11:40:37.726199 - {PRESEED_CONFIG}: None
250 11:40:37.726254 - {PRESEED_LOCAL}: None
251 11:40:37.726308 - {RAMDISK}: 9849688/tftp-deploy-shug5oec/ramdisk/ramdisk.cpio.gz
252 11:40:37.726361 - {ROOT_PART}: None
253 11:40:37.726415 - {ROOT}: None
254 11:40:37.726468 - {SERVER_IP}: 192.168.201.1
255 11:40:37.726521 - {TEE}: None
256 11:40:37.726579 Parsed boot commands:
257 11:40:37.726656 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 11:40:37.726817 Parsed boot commands: tftpboot 192.168.201.1 9849688/tftp-deploy-shug5oec/kernel/bzImage 9849688/tftp-deploy-shug5oec/kernel/cmdline 9849688/tftp-deploy-shug5oec/ramdisk/ramdisk.cpio.gz
259 11:40:37.726906 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 11:40:37.726988 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 11:40:37.727076 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 11:40:37.727161 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 11:40:37.727238 Not connected, no need to disconnect.
264 11:40:37.727312 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 11:40:37.727392 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 11:40:37.727457 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-1'
267 11:40:37.730901 Setting prompt string to ['lava-test: # ']
268 11:40:37.731234 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 11:40:37.731343 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 11:40:37.731442 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 11:40:37.731531 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 11:40:37.731717 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-1' '--port=1' '--command=reboot'
273 11:40:42.864774 >> Command sent successfully.
274 11:40:42.867163 Returned 0 in 5 seconds
275 11:40:42.967971 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 11:40:42.968442 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 11:40:42.968606 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 11:40:42.968739 Setting prompt string to 'Starting depthcharge on Magolor...'
280 11:40:42.968845 Changing prompt to 'Starting depthcharge on Magolor...'
281 11:40:42.968955 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
282 11:40:42.969324 [Enter `^Ec?' for help]
283 11:40:44.110713
284 11:40:44.110859
285 11:40:44.121574 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
286 11:40:44.124255 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
287 11:40:44.127489 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
288 11:40:44.134528 CPU: AES supported, TXT NOT supported, VT supported
289 11:40:44.137323 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
290 11:40:44.144325 PCH: device id 4d87 (rev 01) is Jasperlake Super
291 11:40:44.147644 IGD: device id 4e55 (rev 01) is Jasperlake GT4
292 11:40:44.150862 VBOOT: Loading verstage.
293 11:40:44.154084 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 11:40:44.161384 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
295 11:40:44.164871 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 11:40:44.171760 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
297 11:40:44.171848
298 11:40:44.171916
299 11:40:44.184896 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
300 11:40:44.198039 Probing TPM: . done!
301 11:40:44.201641 TPM ready after 0 ms
302 11:40:44.204874 Connected to device vid:did:rid of 1ae0:0028:00
303 11:40:44.216368 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
304 11:40:44.223174 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
305 11:40:44.300460 Initialized TPM device CR50 revision 0
306 11:40:44.310501 tlcl_send_startup: Startup return code is 0
307 11:40:44.310604 TPM: setup succeeded
308 11:40:44.331751 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
309 11:40:44.342152 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
310 11:40:44.354054 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
311 11:40:44.363635 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
312 11:40:44.367065 Chrome EC: UHEPI supported
313 11:40:44.370624 Phase 1
314 11:40:44.373963 FMAP: area GBB found @ c05000 (12288 bytes)
315 11:40:44.381746 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
316 11:40:44.387257 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
317 11:40:44.390772 Recovery requested (1009000e)
318 11:40:44.399763 TPM: Extending digest for VBOOT: boot mode into PCR 0
319 11:40:44.406144 tlcl_extend: response is 0
320 11:40:44.418362 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
321 11:40:44.424797 tlcl_extend: response is 0
322 11:40:44.431361 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
323 11:40:44.434863 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
324 11:40:44.441724 BS: verstage times (exec / console): total (unknown) / 124 ms
325 11:40:44.441815
326 11:40:44.444833
327 11:40:44.454626 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
328 11:40:44.461455 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
329 11:40:44.464787 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
330 11:40:44.467934 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
331 11:40:44.474610 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
332 11:40:44.477927 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
333 11:40:44.481136 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
334 11:40:44.484407 TCO_STS: 0000 0001
335 11:40:44.487881 GEN_PMCON: d0015038 00002200
336 11:40:44.491203 GBLRST_CAUSE: 00000000 00000000
337 11:40:44.491289 prev_sleep_state 5
338 11:40:44.494520 Boot Count incremented to 7
339 11:40:44.501703 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
340 11:40:44.504855 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
341 11:40:44.509055 Chrome EC: UHEPI supported
342 11:40:44.515790 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
343 11:40:44.523094 Probing TPM: done!
344 11:40:44.526590 Connected to device vid:did:rid of 1ae0:0028:00
345 11:40:44.539351 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
346 11:40:44.546252 Initialized TPM device CR50 revision 0
347 11:40:44.556656 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 11:40:44.563439 MRC: Hash idx 0x100b comparison successful.
349 11:40:44.566347 MRC cache found, size 5458
350 11:40:44.566433 bootmode is set to: 2
351 11:40:44.569694 SPD INDEX = 0
352 11:40:44.573280 CBFS: Found 'spd.bin' @0x40c40 size 0x600
353 11:40:44.576614 SPD: module type is LPDDR4X
354 11:40:44.582962 SPD: module part number is MT53E512M32D2NP-046 WT:E
355 11:40:44.589799 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
356 11:40:44.593344 SPD: device width 16 bits, bus width 32 bits
357 11:40:44.596901 SPD: module size is 4096 MB (per channel)
358 11:40:44.600221 meminit_channels: DRAM half-populated
359 11:40:44.683667 CBMEM:
360 11:40:44.686459 IMD: root @ 0x76fff000 254 entries.
361 11:40:44.689849 IMD: root @ 0x76ffec00 62 entries.
362 11:40:44.693415 FMAP: area RO_VPD found @ c00000 (16384 bytes)
363 11:40:44.699867 WARNING: RO_VPD is uninitialized or empty.
364 11:40:44.702996 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
365 11:40:44.707150 External stage cache:
366 11:40:44.710004 IMD: root @ 0x7b3ff000 254 entries.
367 11:40:44.713268 IMD: root @ 0x7b3fec00 62 entries.
368 11:40:44.723570 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
369 11:40:44.729792 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
370 11:40:44.736486 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
371 11:40:44.744951 MRC: 'RECOVERY_MRC_CACHE' does not need update.
372 11:40:44.748094 cse_lite: Skip switching to RW in the recovery path
373 11:40:44.751801 1 DIMMs found
374 11:40:44.751926 SMM Memory Map
375 11:40:44.754817 SMRAM : 0x7b000000 0x800000
376 11:40:44.758419 Subregion 0: 0x7b000000 0x200000
377 11:40:44.761256 Subregion 1: 0x7b200000 0x200000
378 11:40:44.768547 Subregion 2: 0x7b400000 0x400000
379 11:40:44.768683 top_of_ram = 0x77000000
380 11:40:44.775009 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
381 11:40:44.778503 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
382 11:40:44.784915 MTRR Range: Start=ff000000 End=0 (Size 1000000)
383 11:40:44.788183 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
384 11:40:44.794616 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
385 11:40:44.807039 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
386 11:40:44.813190 Processing 188 relocs. Offset value of 0x74c0e000
387 11:40:44.820400 BS: romstage times (exec / console): total (unknown) / 255 ms
388 11:40:44.824689
389 11:40:44.824783
390 11:40:44.834959 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
391 11:40:44.841279 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 11:40:44.844685 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
393 11:40:44.851202 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
394 11:40:44.907472 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
395 11:40:44.913886 Processing 4805 relocs. Offset value of 0x75da8000
396 11:40:44.917296 BS: postcar times (exec / console): total (unknown) / 42 ms
397 11:40:44.920500
398 11:40:44.920599
399 11:40:44.930684 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
400 11:40:44.930772 Normal boot
401 11:40:44.934478 EC returned error result code 3
402 11:40:44.937671 FW_CONFIG value is 0x204
403 11:40:44.940938 GENERIC: 0.0 disabled by fw_config
404 11:40:44.947381 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
405 11:40:44.950937 I2C: 00:10 disabled by fw_config
406 11:40:44.954225 I2C: 00:10 disabled by fw_config
407 11:40:44.957353 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
408 11:40:44.964254 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
409 11:40:44.967493 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
410 11:40:44.973926 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
411 11:40:44.977292 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
412 11:40:44.980620 I2C: 00:10 disabled by fw_config
413 11:40:44.987641 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
414 11:40:44.993835 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
415 11:40:44.997038 I2C: 00:1a disabled by fw_config
416 11:40:45.000564 I2C: 00:1a disabled by fw_config
417 11:40:45.007138 fw_config match found: AUDIO_AMP=UNPROVISIONED
418 11:40:45.010683 fw_config match found: AUDIO_AMP=UNPROVISIONED
419 11:40:45.013479 GENERIC: 0.0 disabled by fw_config
420 11:40:45.020381 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
421 11:40:45.023728 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
422 11:40:45.030431 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
423 11:40:45.033662 microcode: Update skipped, already up-to-date
424 11:40:45.040284 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
425 11:40:45.065926 Detected 2 core, 2 thread CPU.
426 11:40:45.069510 Setting up SMI for CPU
427 11:40:45.072754 IED base = 0x7b400000
428 11:40:45.072837 IED size = 0x00400000
429 11:40:45.075856 Will perform SMM setup.
430 11:40:45.079326 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
431 11:40:45.089503 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
432 11:40:45.092644 Processing 16 relocs. Offset value of 0x00030000
433 11:40:45.096516 Attempting to start 1 APs
434 11:40:45.099588 Waiting for 10ms after sending INIT.
435 11:40:45.116226 Waiting for 1st SIPI to complete...done.
436 11:40:45.119345 Waiting for 2nd SIPI to complete...done.
437 11:40:45.122965 AP: slot 1 apic_id 2.
438 11:40:45.129362 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
439 11:40:45.136045 Processing 13 relocs. Offset value of 0x00038000
440 11:40:45.136132 Unable to locate Global NVS
441 11:40:45.145785 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
442 11:40:45.149082 Installing permanent SMM handler to 0x7b000000
443 11:40:45.158997 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
444 11:40:45.162381 Processing 704 relocs. Offset value of 0x7b010000
445 11:40:45.172273 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
446 11:40:45.175517 Processing 13 relocs. Offset value of 0x7b008000
447 11:40:45.182505 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
448 11:40:45.186086 Unable to locate Global NVS
449 11:40:45.192370 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
450 11:40:45.195633 Clearing SMI status registers
451 11:40:45.195716 SMI_STS: PM1
452 11:40:45.199388 PM1_STS: PWRBTN
453 11:40:45.199471 TCO_STS: INTRD_DET
454 11:40:45.202884 GPE0 STD STS:
455 11:40:45.210461 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
456 11:40:45.213356 In relocation handler: CPU 0
457 11:40:45.216790 New SMBASE=0x7b000000 IEDBASE=0x7b400000
458 11:40:45.220087 Writing SMRR. base = 0x7b000006, mask=0xff800800
459 11:40:45.223419 Relocation complete.
460 11:40:45.230016 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
461 11:40:45.233324 In relocation handler: CPU 1
462 11:40:45.236822 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
463 11:40:45.243386 Writing SMRR. base = 0x7b000006, mask=0xff800800
464 11:40:45.243470 Relocation complete.
465 11:40:45.246568 Initializing CPU #0
466 11:40:45.249960 CPU: vendor Intel device 906c0
467 11:40:45.253291 CPU: family 06, model 9c, stepping 00
468 11:40:45.256846 Clearing out pending MCEs
469 11:40:45.259904 Setting up local APIC...
470 11:40:45.259988 apic_id: 0x00 done.
471 11:40:45.263474 Turbo is available but hidden
472 11:40:45.266844 Turbo is available and visible
473 11:40:45.273464 microcode: Update skipped, already up-to-date
474 11:40:45.273585 CPU #0 initialized
475 11:40:45.276913 Initializing CPU #1
476 11:40:45.279956 CPU: vendor Intel device 906c0
477 11:40:45.283504 CPU: family 06, model 9c, stepping 00
478 11:40:45.286486 Clearing out pending MCEs
479 11:40:45.286574 Setting up local APIC...
480 11:40:45.289743 apic_id: 0x02 done.
481 11:40:45.293294 microcode: Update skipped, already up-to-date
482 11:40:45.297295 CPU #1 initialized
483 11:40:45.300020 bsp_do_flight_plan done after 177 msecs.
484 11:40:45.303559 CPU: frequency set to 2800 MHz
485 11:40:45.306722 Enabling SMIs.
486 11:40:45.313317 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 289 ms
487 11:40:45.322079 Probing TPM: done!
488 11:40:45.328756 Connected to device vid:did:rid of 1ae0:0028:00
489 11:40:45.338921 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
490 11:40:45.342343 Initialized TPM device CR50 revision 0
491 11:40:45.345585 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
492 11:40:45.352519 Found a VBT of 7680 bytes after decompression
493 11:40:45.358809 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
494 11:40:45.394513 Detected 2 core, 2 thread CPU.
495 11:40:45.397723 Detected 2 core, 2 thread CPU.
496 11:40:45.759193 Display FSP Version Info HOB
497 11:40:45.762626 Reference Code - CPU = 8.7.22.30
498 11:40:45.766075 uCode Version = 24.0.0.1f
499 11:40:45.769346 TXT ACM version = ff.ff.ff.ffff
500 11:40:45.772547 Reference Code - ME = 8.7.22.30
501 11:40:45.775919 MEBx version = 0.0.0.0
502 11:40:45.779645 ME Firmware Version = Consumer SKU
503 11:40:45.783207 Reference Code - PCH = 8.7.22.30
504 11:40:45.783291 PCH-CRID Status = Disabled
505 11:40:45.790310 PCH-CRID Original Value = ff.ff.ff.ffff
506 11:40:45.793798 PCH-CRID New Value = ff.ff.ff.ffff
507 11:40:45.797521 OPROM - RST - RAID = ff.ff.ff.ffff
508 11:40:45.797605 PCH Hsio Version = 4.0.0.0
509 11:40:45.804705 Reference Code - SA - System Agent = 8.7.22.30
510 11:40:45.807957 Reference Code - MRC = 0.0.4.68
511 11:40:45.808040 SA - PCIe Version = 8.7.22.30
512 11:40:45.811476 SA-CRID Status = Disabled
513 11:40:45.814497 SA-CRID Original Value = 0.0.0.0
514 11:40:45.817722 SA-CRID New Value = 0.0.0.0
515 11:40:45.821309 OPROM - VBIOS = ff.ff.ff.ffff
516 11:40:45.824605 IO Manageability Engine FW Version = ff.ff.ff.ffff
517 11:40:45.831074 PHY Build Version = ff.ff.ff.ffff
518 11:40:45.834550 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
519 11:40:45.841071 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
520 11:40:45.841155 ITSS IRQ Polarities Before:
521 11:40:45.844558 IPC0: 0xffffffff
522 11:40:45.847914 IPC1: 0xffffffff
523 11:40:45.848011 IPC2: 0xffffffff
524 11:40:45.851205 IPC3: 0xffffffff
525 11:40:45.851289 ITSS IRQ Polarities After:
526 11:40:45.854431 IPC0: 0xffffffff
527 11:40:45.854542 IPC1: 0xffffffff
528 11:40:45.858043 IPC2: 0xffffffff
529 11:40:45.861155 IPC3: 0xffffffff
530 11:40:45.871302 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
531 11:40:45.877739 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
532 11:40:45.881328 Enumerating buses...
533 11:40:45.884352 Show all devs... Before device enumeration.
534 11:40:45.887531 Root Device: enabled 1
535 11:40:45.891177 CPU_CLUSTER: 0: enabled 1
536 11:40:45.891261 DOMAIN: 0000: enabled 1
537 11:40:45.894352 PCI: 00:00.0: enabled 1
538 11:40:45.897456 PCI: 00:02.0: enabled 1
539 11:40:45.897554 PCI: 00:04.0: enabled 1
540 11:40:45.901169 PCI: 00:05.0: enabled 1
541 11:40:45.904560 PCI: 00:09.0: enabled 0
542 11:40:45.907421 PCI: 00:12.6: enabled 0
543 11:40:45.907505 PCI: 00:14.0: enabled 1
544 11:40:45.910837 PCI: 00:14.1: enabled 0
545 11:40:45.914155 PCI: 00:14.2: enabled 0
546 11:40:45.917620 PCI: 00:14.3: enabled 1
547 11:40:45.917718 PCI: 00:14.5: enabled 1
548 11:40:45.921236 PCI: 00:15.0: enabled 1
549 11:40:45.924158 PCI: 00:15.1: enabled 1
550 11:40:45.924242 PCI: 00:15.2: enabled 1
551 11:40:45.927718 PCI: 00:15.3: enabled 1
552 11:40:45.931013 PCI: 00:16.0: enabled 1
553 11:40:45.934280 PCI: 00:16.1: enabled 0
554 11:40:45.934364 PCI: 00:16.4: enabled 0
555 11:40:45.937707 PCI: 00:16.5: enabled 0
556 11:40:45.940984 PCI: 00:17.0: enabled 0
557 11:40:45.944321 PCI: 00:19.0: enabled 1
558 11:40:45.944405 PCI: 00:19.1: enabled 0
559 11:40:45.947619 PCI: 00:19.2: enabled 1
560 11:40:45.950828 PCI: 00:1a.0: enabled 1
561 11:40:45.953993 PCI: 00:1c.0: enabled 0
562 11:40:45.954077 PCI: 00:1c.1: enabled 0
563 11:40:45.957641 PCI: 00:1c.2: enabled 0
564 11:40:45.961038 PCI: 00:1c.3: enabled 0
565 11:40:45.961121 PCI: 00:1c.4: enabled 0
566 11:40:45.963997 PCI: 00:1c.5: enabled 0
567 11:40:45.967402 PCI: 00:1c.6: enabled 0
568 11:40:45.970912 PCI: 00:1c.7: enabled 1
569 11:40:45.970996 PCI: 00:1e.0: enabled 0
570 11:40:45.973897 PCI: 00:1e.1: enabled 0
571 11:40:45.977195 PCI: 00:1e.2: enabled 1
572 11:40:45.980600 PCI: 00:1e.3: enabled 0
573 11:40:45.980683 PCI: 00:1f.0: enabled 1
574 11:40:45.984067 PCI: 00:1f.1: enabled 1
575 11:40:45.987562 PCI: 00:1f.2: enabled 1
576 11:40:45.990692 PCI: 00:1f.3: enabled 1
577 11:40:45.990796 PCI: 00:1f.4: enabled 0
578 11:40:45.994117 PCI: 00:1f.5: enabled 1
579 11:40:45.997165 PCI: 00:1f.7: enabled 0
580 11:40:45.997249 GENERIC: 0.0: enabled 1
581 11:40:46.001006 GENERIC: 0.0: enabled 1
582 11:40:46.004112 USB0 port 0: enabled 1
583 11:40:46.007096 GENERIC: 0.0: enabled 1
584 11:40:46.007179 I2C: 00:2c: enabled 1
585 11:40:46.010651 I2C: 00:15: enabled 1
586 11:40:46.014077 GENERIC: 0.0: enabled 0
587 11:40:46.014161 I2C: 00:15: enabled 1
588 11:40:46.017267 I2C: 00:10: enabled 0
589 11:40:46.020661 I2C: 00:10: enabled 0
590 11:40:46.020744 I2C: 00:2c: enabled 1
591 11:40:46.023847 I2C: 00:40: enabled 1
592 11:40:46.027389 I2C: 00:10: enabled 1
593 11:40:46.027472 I2C: 00:39: enabled 1
594 11:40:46.030805 I2C: 00:36: enabled 1
595 11:40:46.034263 I2C: 00:10: enabled 0
596 11:40:46.034347 I2C: 00:0c: enabled 1
597 11:40:46.037188 I2C: 00:50: enabled 1
598 11:40:46.040690 I2C: 00:1a: enabled 1
599 11:40:46.040775 I2C: 00:1a: enabled 0
600 11:40:46.043717 I2C: 00:1a: enabled 0
601 11:40:46.047265 I2C: 00:28: enabled 1
602 11:40:46.047349 I2C: 00:29: enabled 1
603 11:40:46.050504 PCI: 00:00.0: enabled 1
604 11:40:46.053385 SPI: 00: enabled 1
605 11:40:46.056813 PNP: 0c09.0: enabled 1
606 11:40:46.056896 GENERIC: 0.0: enabled 0
607 11:40:46.060337 USB2 port 0: enabled 1
608 11:40:46.063541 USB2 port 1: enabled 1
609 11:40:46.063625 USB2 port 2: enabled 1
610 11:40:46.066826 USB2 port 3: enabled 1
611 11:40:46.070365 USB2 port 4: enabled 0
612 11:40:46.070474 USB2 port 5: enabled 1
613 11:40:46.073317 USB2 port 6: enabled 0
614 11:40:46.077062 USB2 port 7: enabled 1
615 11:40:46.080117 USB3 port 0: enabled 1
616 11:40:46.080253 USB3 port 1: enabled 1
617 11:40:46.083529 USB3 port 2: enabled 1
618 11:40:46.086562 USB3 port 3: enabled 1
619 11:40:46.086675 APIC: 00: enabled 1
620 11:40:46.090231 APIC: 02: enabled 1
621 11:40:46.093255 Compare with tree...
622 11:40:46.093339 Root Device: enabled 1
623 11:40:46.096808 CPU_CLUSTER: 0: enabled 1
624 11:40:46.100028 APIC: 00: enabled 1
625 11:40:46.100117 APIC: 02: enabled 1
626 11:40:46.103381 DOMAIN: 0000: enabled 1
627 11:40:46.106546 PCI: 00:00.0: enabled 1
628 11:40:46.109995 PCI: 00:02.0: enabled 1
629 11:40:46.113458 PCI: 00:04.0: enabled 1
630 11:40:46.113560 GENERIC: 0.0: enabled 1
631 11:40:46.116541 PCI: 00:05.0: enabled 1
632 11:40:46.119874 GENERIC: 0.0: enabled 1
633 11:40:46.123255 PCI: 00:09.0: enabled 0
634 11:40:46.126578 PCI: 00:12.6: enabled 0
635 11:40:46.126662 PCI: 00:14.0: enabled 1
636 11:40:46.130032 USB0 port 0: enabled 1
637 11:40:46.133082 USB2 port 0: enabled 1
638 11:40:46.136331 USB2 port 1: enabled 1
639 11:40:46.139933 USB2 port 2: enabled 1
640 11:40:46.140020 USB2 port 3: enabled 1
641 11:40:46.143097 USB2 port 4: enabled 0
642 11:40:46.146417 USB2 port 5: enabled 1
643 11:40:46.149602 USB2 port 6: enabled 0
644 11:40:46.152767 USB2 port 7: enabled 1
645 11:40:46.156706 USB3 port 0: enabled 1
646 11:40:46.156791 USB3 port 1: enabled 1
647 11:40:46.159781 USB3 port 2: enabled 1
648 11:40:46.162918 USB3 port 3: enabled 1
649 11:40:46.166132 PCI: 00:14.1: enabled 0
650 11:40:46.169868 PCI: 00:14.2: enabled 0
651 11:40:46.169953 PCI: 00:14.3: enabled 1
652 11:40:46.173066 GENERIC: 0.0: enabled 1
653 11:40:46.176390 PCI: 00:14.5: enabled 1
654 11:40:46.179704 PCI: 00:15.0: enabled 1
655 11:40:46.182993 I2C: 00:2c: enabled 1
656 11:40:46.183078 I2C: 00:15: enabled 1
657 11:40:46.186201 PCI: 00:15.1: enabled 1
658 11:40:46.189462 PCI: 00:15.2: enabled 1
659 11:40:46.192976 GENERIC: 0.0: enabled 0
660 11:40:46.193058 I2C: 00:15: enabled 1
661 11:40:46.196433 I2C: 00:10: enabled 0
662 11:40:46.199665 I2C: 00:10: enabled 0
663 11:40:46.203116 I2C: 00:2c: enabled 1
664 11:40:46.203199 I2C: 00:40: enabled 1
665 11:40:46.206267 I2C: 00:10: enabled 1
666 11:40:46.209580 I2C: 00:39: enabled 1
667 11:40:46.212860 PCI: 00:15.3: enabled 1
668 11:40:46.216037 I2C: 00:36: enabled 1
669 11:40:46.216120 I2C: 00:10: enabled 0
670 11:40:46.219644 I2C: 00:0c: enabled 1
671 11:40:46.222759 I2C: 00:50: enabled 1
672 11:40:46.226383 PCI: 00:16.0: enabled 1
673 11:40:46.226466 PCI: 00:16.1: enabled 0
674 11:40:46.229457 PCI: 00:16.4: enabled 0
675 11:40:46.232501 PCI: 00:16.5: enabled 0
676 11:40:46.236159 PCI: 00:17.0: enabled 0
677 11:40:46.239210 PCI: 00:19.0: enabled 1
678 11:40:46.239294 I2C: 00:1a: enabled 1
679 11:40:46.242567 I2C: 00:1a: enabled 0
680 11:40:46.245888 I2C: 00:1a: enabled 0
681 11:40:46.249121 I2C: 00:28: enabled 1
682 11:40:46.249216 I2C: 00:29: enabled 1
683 11:40:46.252868 PCI: 00:19.1: enabled 0
684 11:40:46.256348 PCI: 00:19.2: enabled 1
685 11:40:46.259273 PCI: 00:1a.0: enabled 1
686 11:40:46.262718 PCI: 00:1e.0: enabled 0
687 11:40:46.262824 PCI: 00:1e.1: enabled 0
688 11:40:46.265855 PCI: 00:1e.2: enabled 1
689 11:40:46.269487 SPI: 00: enabled 1
690 11:40:46.272773 PCI: 00:1e.3: enabled 0
691 11:40:46.272868 PCI: 00:1f.0: enabled 1
692 11:40:46.276135 PNP: 0c09.0: enabled 1
693 11:40:46.279419 PCI: 00:1f.1: enabled 1
694 11:40:46.282711 PCI: 00:1f.2: enabled 1
695 11:40:46.286263 PCI: 00:1f.3: enabled 1
696 11:40:46.286347 GENERIC: 0.0: enabled 0
697 11:40:46.289641 PCI: 00:1f.4: enabled 0
698 11:40:46.293050 PCI: 00:1f.5: enabled 1
699 11:40:46.296064 PCI: 00:1f.7: enabled 0
700 11:40:46.296170 Root Device scanning...
701 11:40:46.299350 scan_static_bus for Root Device
702 11:40:46.302795 CPU_CLUSTER: 0 enabled
703 11:40:46.305987 DOMAIN: 0000 enabled
704 11:40:46.309573 DOMAIN: 0000 scanning...
705 11:40:46.312529 PCI: pci_scan_bus for bus 00
706 11:40:46.312636 PCI: 00:00.0 [8086/0000] ops
707 11:40:46.315853 PCI: 00:00.0 [8086/4e22] enabled
708 11:40:46.319042 PCI: 00:02.0 [8086/0000] bus ops
709 11:40:46.322717 PCI: 00:02.0 [8086/4e55] enabled
710 11:40:46.325696 PCI: 00:04.0 [8086/0000] bus ops
711 11:40:46.329058 PCI: 00:04.0 [8086/4e03] enabled
712 11:40:46.332639 PCI: 00:05.0 [8086/0000] bus ops
713 11:40:46.335834 PCI: 00:05.0 [8086/4e19] enabled
714 11:40:46.339326 PCI: 00:08.0 [8086/4e11] enabled
715 11:40:46.342685 PCI: 00:14.0 [8086/0000] bus ops
716 11:40:46.345760 PCI: 00:14.0 [8086/4ded] enabled
717 11:40:46.349133 PCI: 00:14.2 [8086/4def] disabled
718 11:40:46.352528 PCI: 00:14.3 [8086/0000] bus ops
719 11:40:46.355937 PCI: 00:14.3 [8086/4df0] enabled
720 11:40:46.359066 PCI: 00:14.5 [8086/0000] ops
721 11:40:46.362261 PCI: 00:14.5 [8086/4df8] enabled
722 11:40:46.365870 PCI: 00:15.0 [8086/0000] bus ops
723 11:40:46.369258 PCI: 00:15.0 [8086/4de8] enabled
724 11:40:46.372307 PCI: 00:15.1 [8086/0000] bus ops
725 11:40:46.375582 PCI: 00:15.1 [8086/4de9] enabled
726 11:40:46.379154 PCI: 00:15.2 [8086/0000] bus ops
727 11:40:46.382373 PCI: 00:15.2 [8086/4dea] enabled
728 11:40:46.385498 PCI: 00:15.3 [8086/0000] bus ops
729 11:40:46.388877 PCI: 00:15.3 [8086/4deb] enabled
730 11:40:46.392458 PCI: 00:16.0 [8086/0000] ops
731 11:40:46.395507 PCI: 00:16.0 [8086/4de0] enabled
732 11:40:46.398939 PCI: 00:19.0 [8086/0000] bus ops
733 11:40:46.402288 PCI: 00:19.0 [8086/4dc5] enabled
734 11:40:46.405688 PCI: 00:19.2 [8086/0000] ops
735 11:40:46.408722 PCI: 00:19.2 [8086/4dc7] enabled
736 11:40:46.412094 PCI: 00:1a.0 [8086/0000] ops
737 11:40:46.415561 PCI: 00:1a.0 [8086/4dc4] enabled
738 11:40:46.418732 PCI: 00:1e.0 [8086/0000] ops
739 11:40:46.422358 PCI: 00:1e.0 [8086/4da8] disabled
740 11:40:46.425488 PCI: 00:1e.2 [8086/0000] bus ops
741 11:40:46.428759 PCI: 00:1e.2 [8086/4daa] enabled
742 11:40:46.432051 PCI: 00:1f.0 [8086/0000] bus ops
743 11:40:46.435375 PCI: 00:1f.0 [8086/4d87] enabled
744 11:40:46.438740 PCI: Static device PCI: 00:1f.1 not found, disabling it.
745 11:40:46.442461 RTC Init
746 11:40:46.445812 Set power on after power failure.
747 11:40:46.445896 Disabling Deep S3
748 11:40:46.449022 Disabling Deep S3
749 11:40:46.452609 Disabling Deep S4
750 11:40:46.452692 Disabling Deep S4
751 11:40:46.455662 Disabling Deep S5
752 11:40:46.455768 Disabling Deep S5
753 11:40:46.459206 PCI: 00:1f.2 [0000/0000] hidden
754 11:40:46.462863 PCI: 00:1f.3 [8086/0000] bus ops
755 11:40:46.466531 PCI: 00:1f.3 [8086/4dc8] enabled
756 11:40:46.470432 PCI: 00:1f.5 [8086/0000] bus ops
757 11:40:46.473442 PCI: 00:1f.5 [8086/4da4] enabled
758 11:40:46.477244 PCI: Leftover static devices:
759 11:40:46.477326 PCI: 00:12.6
760 11:40:46.477392 PCI: 00:09.0
761 11:40:46.480285 PCI: 00:14.1
762 11:40:46.480368 PCI: 00:16.1
763 11:40:46.483585 PCI: 00:16.4
764 11:40:46.483668 PCI: 00:16.5
765 11:40:46.483733 PCI: 00:17.0
766 11:40:46.487313 PCI: 00:19.1
767 11:40:46.487396 PCI: 00:1e.1
768 11:40:46.490588 PCI: 00:1e.3
769 11:40:46.490671 PCI: 00:1f.1
770 11:40:46.493759 PCI: 00:1f.4
771 11:40:46.493841 PCI: 00:1f.7
772 11:40:46.497304 PCI: Check your devicetree.cb.
773 11:40:46.500660 PCI: 00:02.0 scanning...
774 11:40:46.503693 scan_generic_bus for PCI: 00:02.0
775 11:40:46.507084 scan_generic_bus for PCI: 00:02.0 done
776 11:40:46.510509 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
777 11:40:46.513589 PCI: 00:04.0 scanning...
778 11:40:46.516992 scan_generic_bus for PCI: 00:04.0
779 11:40:46.520447 GENERIC: 0.0 enabled
780 11:40:46.526861 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
781 11:40:46.530381 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
782 11:40:46.534042 PCI: 00:05.0 scanning...
783 11:40:46.536926 scan_generic_bus for PCI: 00:05.0
784 11:40:46.540367 GENERIC: 0.0 enabled
785 11:40:46.543505 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
786 11:40:46.550285 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
787 11:40:46.553748 PCI: 00:14.0 scanning...
788 11:40:46.556675 scan_static_bus for PCI: 00:14.0
789 11:40:46.556758 USB0 port 0 enabled
790 11:40:46.560040 USB0 port 0 scanning...
791 11:40:46.563602 scan_static_bus for USB0 port 0
792 11:40:46.566638 USB2 port 0 enabled
793 11:40:46.566721 USB2 port 1 enabled
794 11:40:46.570145 USB2 port 2 enabled
795 11:40:46.570228 USB2 port 3 enabled
796 11:40:46.573356 USB2 port 4 disabled
797 11:40:46.576590 USB2 port 5 enabled
798 11:40:46.576673 USB2 port 6 disabled
799 11:40:46.580159 USB2 port 7 enabled
800 11:40:46.583225 USB3 port 0 enabled
801 11:40:46.583308 USB3 port 1 enabled
802 11:40:46.586666 USB3 port 2 enabled
803 11:40:46.586748 USB3 port 3 enabled
804 11:40:46.589880 USB2 port 0 scanning...
805 11:40:46.593379 scan_static_bus for USB2 port 0
806 11:40:46.596599 scan_static_bus for USB2 port 0 done
807 11:40:46.603144 scan_bus: bus USB2 port 0 finished in 6 msecs
808 11:40:46.603226 USB2 port 1 scanning...
809 11:40:46.606733 scan_static_bus for USB2 port 1
810 11:40:46.613450 scan_static_bus for USB2 port 1 done
811 11:40:46.616361 scan_bus: bus USB2 port 1 finished in 6 msecs
812 11:40:46.619834 USB2 port 2 scanning...
813 11:40:46.623038 scan_static_bus for USB2 port 2
814 11:40:46.626703 scan_static_bus for USB2 port 2 done
815 11:40:46.629680 scan_bus: bus USB2 port 2 finished in 6 msecs
816 11:40:46.632981 USB2 port 3 scanning...
817 11:40:46.636510 scan_static_bus for USB2 port 3
818 11:40:46.640031 scan_static_bus for USB2 port 3 done
819 11:40:46.643008 scan_bus: bus USB2 port 3 finished in 6 msecs
820 11:40:46.646562 USB2 port 5 scanning...
821 11:40:46.649604 scan_static_bus for USB2 port 5
822 11:40:46.652856 scan_static_bus for USB2 port 5 done
823 11:40:46.659897 scan_bus: bus USB2 port 5 finished in 6 msecs
824 11:40:46.659980 USB2 port 7 scanning...
825 11:40:46.663189 scan_static_bus for USB2 port 7
826 11:40:46.666346 scan_static_bus for USB2 port 7 done
827 11:40:46.673010 scan_bus: bus USB2 port 7 finished in 6 msecs
828 11:40:46.676180 USB3 port 0 scanning...
829 11:40:46.679448 scan_static_bus for USB3 port 0
830 11:40:46.683038 scan_static_bus for USB3 port 0 done
831 11:40:46.686232 scan_bus: bus USB3 port 0 finished in 6 msecs
832 11:40:46.689660 USB3 port 1 scanning...
833 11:40:46.692765 scan_static_bus for USB3 port 1
834 11:40:46.696370 scan_static_bus for USB3 port 1 done
835 11:40:46.699814 scan_bus: bus USB3 port 1 finished in 6 msecs
836 11:40:46.702888 USB3 port 2 scanning...
837 11:40:46.706365 scan_static_bus for USB3 port 2
838 11:40:46.709629 scan_static_bus for USB3 port 2 done
839 11:40:46.716360 scan_bus: bus USB3 port 2 finished in 6 msecs
840 11:40:46.716443 USB3 port 3 scanning...
841 11:40:46.719761 scan_static_bus for USB3 port 3
842 11:40:46.722700 scan_static_bus for USB3 port 3 done
843 11:40:46.729302 scan_bus: bus USB3 port 3 finished in 6 msecs
844 11:40:46.732920 scan_static_bus for USB0 port 0 done
845 11:40:46.736013 scan_bus: bus USB0 port 0 finished in 172 msecs
846 11:40:46.742972 scan_static_bus for PCI: 00:14.0 done
847 11:40:46.746054 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
848 11:40:46.749624 PCI: 00:14.3 scanning...
849 11:40:46.752588 scan_static_bus for PCI: 00:14.3
850 11:40:46.752671 GENERIC: 0.0 enabled
851 11:40:46.759246 scan_static_bus for PCI: 00:14.3 done
852 11:40:46.762451 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
853 11:40:46.765827 PCI: 00:15.0 scanning...
854 11:40:46.769375 scan_static_bus for PCI: 00:15.0
855 11:40:46.769459 I2C: 00:2c enabled
856 11:40:46.772333 I2C: 00:15 enabled
857 11:40:46.775784 scan_static_bus for PCI: 00:15.0 done
858 11:40:46.782585 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
859 11:40:46.782669 PCI: 00:15.1 scanning...
860 11:40:46.785810 scan_static_bus for PCI: 00:15.1
861 11:40:46.792591 scan_static_bus for PCI: 00:15.1 done
862 11:40:46.795810 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
863 11:40:46.798946 PCI: 00:15.2 scanning...
864 11:40:46.802150 scan_static_bus for PCI: 00:15.2
865 11:40:46.802233 GENERIC: 0.0 disabled
866 11:40:46.805899 I2C: 00:15 enabled
867 11:40:46.808749 I2C: 00:10 disabled
868 11:40:46.808832 I2C: 00:10 disabled
869 11:40:46.812307 I2C: 00:2c enabled
870 11:40:46.812390 I2C: 00:40 enabled
871 11:40:46.815400 I2C: 00:10 enabled
872 11:40:46.819051 I2C: 00:39 enabled
873 11:40:46.822183 scan_static_bus for PCI: 00:15.2 done
874 11:40:46.825680 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
875 11:40:46.828924 PCI: 00:15.3 scanning...
876 11:40:46.832241 scan_static_bus for PCI: 00:15.3
877 11:40:46.835410 I2C: 00:36 enabled
878 11:40:46.835492 I2C: 00:10 disabled
879 11:40:46.838933 I2C: 00:0c enabled
880 11:40:46.839016 I2C: 00:50 enabled
881 11:40:46.845897 scan_static_bus for PCI: 00:15.3 done
882 11:40:46.848781 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
883 11:40:46.852397 PCI: 00:19.0 scanning...
884 11:40:46.855588 scan_static_bus for PCI: 00:19.0
885 11:40:46.855671 I2C: 00:1a enabled
886 11:40:46.859042 I2C: 00:1a disabled
887 11:40:46.862387 I2C: 00:1a disabled
888 11:40:46.862470 I2C: 00:28 enabled
889 11:40:46.865606 I2C: 00:29 enabled
890 11:40:46.868901 scan_static_bus for PCI: 00:19.0 done
891 11:40:46.872062 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
892 11:40:46.875744 PCI: 00:1e.2 scanning...
893 11:40:46.878888 scan_generic_bus for PCI: 00:1e.2
894 11:40:46.882456 SPI: 00 enabled
895 11:40:46.885618 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
896 11:40:46.892232 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
897 11:40:46.895360 PCI: 00:1f.0 scanning...
898 11:40:46.898853 scan_static_bus for PCI: 00:1f.0
899 11:40:46.898936 PNP: 0c09.0 enabled
900 11:40:46.902316 PNP: 0c09.0 scanning...
901 11:40:46.905424 scan_static_bus for PNP: 0c09.0
902 11:40:46.908981 scan_static_bus for PNP: 0c09.0 done
903 11:40:46.915757 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
904 11:40:46.918871 scan_static_bus for PCI: 00:1f.0 done
905 11:40:46.921946 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
906 11:40:46.925234 PCI: 00:1f.3 scanning...
907 11:40:46.928911 scan_static_bus for PCI: 00:1f.3
908 11:40:46.932017 GENERIC: 0.0 disabled
909 11:40:46.935561 scan_static_bus for PCI: 00:1f.3 done
910 11:40:46.939018 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
911 11:40:46.941911 PCI: 00:1f.5 scanning...
912 11:40:46.945371 scan_generic_bus for PCI: 00:1f.5
913 11:40:46.948750 scan_generic_bus for PCI: 00:1f.5 done
914 11:40:46.955242 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
915 11:40:46.958768 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
916 11:40:46.962121 scan_static_bus for Root Device done
917 11:40:46.968536 scan_bus: bus Root Device finished in 665 msecs
918 11:40:46.968618 done
919 11:40:46.975084 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1084 ms
920 11:40:46.978581 Chrome EC: UHEPI supported
921 11:40:46.981883 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
922 11:40:46.988757 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
923 11:40:46.991747 SPI flash protection: WPSW=0 SRP0=1
924 11:40:46.998483 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
925 11:40:47.005400 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
926 11:40:47.005523 found VGA at PCI: 00:02.0
927 11:40:47.008591 Setting up VGA for PCI: 00:02.0
928 11:40:47.015453 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
929 11:40:47.018539 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
930 11:40:47.022084 Allocating resources...
931 11:40:47.025374 Reading resources...
932 11:40:47.028455 Root Device read_resources bus 0 link: 0
933 11:40:47.032242 CPU_CLUSTER: 0 read_resources bus 0 link: 0
934 11:40:47.038715 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
935 11:40:47.041830 DOMAIN: 0000 read_resources bus 0 link: 0
936 11:40:47.049404 PCI: 00:04.0 read_resources bus 1 link: 0
937 11:40:47.052532 PCI: 00:04.0 read_resources bus 1 link: 0 done
938 11:40:47.055694 PCI: 00:05.0 read_resources bus 2 link: 0
939 11:40:47.063557 PCI: 00:05.0 read_resources bus 2 link: 0 done
940 11:40:47.067138 PCI: 00:14.0 read_resources bus 0 link: 0
941 11:40:47.123226 USB0 port 0 read_resources bus 0 link: 0
942 11:40:47.123888 USB0 port 0 read_resources bus 0 link: 0 done
943 11:40:47.123973 PCI: 00:14.0 read_resources bus 0 link: 0 done
944 11:40:47.124218 PCI: 00:14.3 read_resources bus 0 link: 0
945 11:40:47.124712 PCI: 00:14.3 read_resources bus 0 link: 0 done
946 11:40:47.124796 PCI: 00:15.0 read_resources bus 0 link: 0
947 11:40:47.125041 PCI: 00:15.0 read_resources bus 0 link: 0 done
948 11:40:47.125424 PCI: 00:15.2 read_resources bus 0 link: 0
949 11:40:47.126044 PCI: 00:15.2 read_resources bus 0 link: 0 done
950 11:40:47.126128 PCI: 00:15.3 read_resources bus 0 link: 0
951 11:40:47.126555 PCI: 00:15.3 read_resources bus 0 link: 0 done
952 11:40:47.130986 PCI: 00:19.0 read_resources bus 0 link: 0
953 11:40:47.131070 PCI: 00:19.0 read_resources bus 0 link: 0 done
954 11:40:47.135716 PCI: 00:1e.2 read_resources bus 3 link: 0
955 11:40:47.142181 PCI: 00:1e.2 read_resources bus 3 link: 0 done
956 11:40:47.145758 PCI: 00:1f.0 read_resources bus 0 link: 0
957 11:40:47.152615 PCI: 00:1f.0 read_resources bus 0 link: 0 done
958 11:40:47.155537 PCI: 00:1f.3 read_resources bus 0 link: 0
959 11:40:47.162336 PCI: 00:1f.3 read_resources bus 0 link: 0 done
960 11:40:47.165599 DOMAIN: 0000 read_resources bus 0 link: 0 done
961 11:40:47.172315 Root Device read_resources bus 0 link: 0 done
962 11:40:47.172399 Done reading resources.
963 11:40:47.178744 Show resources in subtree (Root Device)...After reading.
964 11:40:47.182118 Root Device child on link 0 CPU_CLUSTER: 0
965 11:40:47.188697 CPU_CLUSTER: 0 child on link 0 APIC: 00
966 11:40:47.188795 APIC: 00
967 11:40:47.188861 APIC: 02
968 11:40:47.195275 DOMAIN: 0000 child on link 0 PCI: 00:00.0
969 11:40:47.201882 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
970 11:40:47.212307 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
971 11:40:47.215206 PCI: 00:00.0
972 11:40:47.225715 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
973 11:40:47.235637 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
974 11:40:47.241968 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
975 11:40:47.251894 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
976 11:40:47.262033 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
977 11:40:47.272369 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
978 11:40:47.282153 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
979 11:40:47.288373 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
980 11:40:47.298407 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
981 11:40:47.308358 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
982 11:40:47.318171 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
983 11:40:47.328369 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
984 11:40:47.338582 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
985 11:40:47.345009 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
986 11:40:47.354806 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
987 11:40:47.365008 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
988 11:40:47.374631 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
989 11:40:47.384673 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
990 11:40:47.391157 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
991 11:40:47.394628 PCI: 00:02.0
992 11:40:47.404528 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
993 11:40:47.414838 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
994 11:40:47.424411 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
995 11:40:47.427729 PCI: 00:04.0 child on link 0 GENERIC: 0.0
996 11:40:47.438031 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
997 11:40:47.441231 GENERIC: 0.0
998 11:40:47.444248 PCI: 00:05.0 child on link 0 GENERIC: 0.0
999 11:40:47.454609 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1000 11:40:47.457568 GENERIC: 0.0
1001 11:40:47.457649 PCI: 00:08.0
1002 11:40:47.467613 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1003 11:40:47.471208 PCI: 00:14.0 child on link 0 USB0 port 0
1004 11:40:47.481022 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1005 11:40:47.487727 USB0 port 0 child on link 0 USB2 port 0
1006 11:40:47.487809 USB2 port 0
1007 11:40:47.490856 USB2 port 1
1008 11:40:47.490938 USB2 port 2
1009 11:40:47.494373 USB2 port 3
1010 11:40:47.494456 USB2 port 4
1011 11:40:47.497735 USB2 port 5
1012 11:40:47.497817 USB2 port 6
1013 11:40:47.500962 USB2 port 7
1014 11:40:47.501044 USB3 port 0
1015 11:40:47.504123 USB3 port 1
1016 11:40:47.504205 USB3 port 2
1017 11:40:47.507319 USB3 port 3
1018 11:40:47.511138 PCI: 00:14.2
1019 11:40:47.514240 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1020 11:40:47.524094 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1021 11:40:47.524177 GENERIC: 0.0
1022 11:40:47.527545 PCI: 00:14.5
1023 11:40:47.537854 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1024 11:40:47.540849 PCI: 00:15.0 child on link 0 I2C: 00:2c
1025 11:40:47.551188 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1026 11:40:47.554384 I2C: 00:2c
1027 11:40:47.554465 I2C: 00:15
1028 11:40:47.557373 PCI: 00:15.1
1029 11:40:47.567274 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1030 11:40:47.571180 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1031 11:40:47.580809 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1032 11:40:47.580891 GENERIC: 0.0
1033 11:40:47.584200 I2C: 00:15
1034 11:40:47.584281 I2C: 00:10
1035 11:40:47.587611 I2C: 00:10
1036 11:40:47.587692 I2C: 00:2c
1037 11:40:47.590908 I2C: 00:40
1038 11:40:47.590988 I2C: 00:10
1039 11:40:47.593978 I2C: 00:39
1040 11:40:47.597154 PCI: 00:15.3 child on link 0 I2C: 00:36
1041 11:40:47.607593 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1042 11:40:47.607693 I2C: 00:36
1043 11:40:47.610548 I2C: 00:10
1044 11:40:47.610630 I2C: 00:0c
1045 11:40:47.613821 I2C: 00:50
1046 11:40:47.613902 PCI: 00:16.0
1047 11:40:47.624287 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1048 11:40:47.630436 PCI: 00:19.0 child on link 0 I2C: 00:1a
1049 11:40:47.640616 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1050 11:40:47.640698 I2C: 00:1a
1051 11:40:47.640763 I2C: 00:1a
1052 11:40:47.644048 I2C: 00:1a
1053 11:40:47.644129 I2C: 00:28
1054 11:40:47.647064 I2C: 00:29
1055 11:40:47.647145 PCI: 00:19.2
1056 11:40:47.660422 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1057 11:40:47.670216 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1058 11:40:47.670299 PCI: 00:1a.0
1059 11:40:47.680221 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1060 11:40:47.683513 PCI: 00:1e.0
1061 11:40:47.687085 PCI: 00:1e.2 child on link 0 SPI: 00
1062 11:40:47.697232 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1063 11:40:47.697340 SPI: 00
1064 11:40:47.703782 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1065 11:40:47.710209 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1066 11:40:47.713869 PNP: 0c09.0
1067 11:40:47.720631 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1068 11:40:47.724360 PCI: 00:1f.2
1069 11:40:47.731860 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1070 11:40:47.741822 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1071 11:40:47.745359 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1072 11:40:47.755531 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1073 11:40:47.765061 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1074 11:40:47.768757 GENERIC: 0.0
1075 11:40:47.768840 PCI: 00:1f.5
1076 11:40:47.778488 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1077 11:40:47.784902 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1078 11:40:47.791830 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1079 11:40:47.798301 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1080 11:40:47.808370 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1081 11:40:47.814955 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1082 11:40:47.821621 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1083 11:40:47.824875 DOMAIN: 0000: Resource ranges:
1084 11:40:47.828530 * Base: 1000, Size: 800, Tag: 100
1085 11:40:47.831833 * Base: 1900, Size: e700, Tag: 100
1086 11:40:47.838241 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1087 11:40:47.844928 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1088 11:40:47.851608 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1089 11:40:47.858222 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1090 11:40:47.868334 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1091 11:40:47.874738 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1092 11:40:47.881348 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1093 11:40:47.888230 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1094 11:40:47.898205 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1095 11:40:47.904686 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1096 11:40:47.911307 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1097 11:40:47.921227 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1098 11:40:47.928439 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1099 11:40:47.934606 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1100 11:40:47.944783 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1101 11:40:47.951276 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1102 11:40:47.957691 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1103 11:40:47.967698 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1104 11:40:47.974316 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1105 11:40:47.981072 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1106 11:40:47.991306 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1107 11:40:47.997672 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1108 11:40:48.004496 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1109 11:40:48.011123 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1110 11:40:48.014741 DOMAIN: 0000: Resource ranges:
1111 11:40:48.020957 * Base: 7fc00000, Size: 40400000, Tag: 200
1112 11:40:48.024201 * Base: d0000000, Size: 2b000000, Tag: 200
1113 11:40:48.027830 * Base: fb001000, Size: 2fff000, Tag: 200
1114 11:40:48.034063 * Base: fe010000, Size: 22000, Tag: 200
1115 11:40:48.037416 * Base: fe033000, Size: a4d000, Tag: 200
1116 11:40:48.040802 * Base: fea88000, Size: 2f8000, Tag: 200
1117 11:40:48.044087 * Base: fed88000, Size: 8000, Tag: 200
1118 11:40:48.050810 * Base: fed93000, Size: d000, Tag: 200
1119 11:40:48.054124 * Base: feda2000, Size: 125e000, Tag: 200
1120 11:40:48.057302 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1121 11:40:48.063905 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1122 11:40:48.070506 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1123 11:40:48.077339 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1124 11:40:48.083972 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1125 11:40:48.090495 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1126 11:40:48.097109 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1127 11:40:48.104167 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1128 11:40:48.110381 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1129 11:40:48.117049 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1130 11:40:48.123527 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1131 11:40:48.130085 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1132 11:40:48.137047 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1133 11:40:48.143652 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1134 11:40:48.150134 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1135 11:40:48.156646 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1136 11:40:48.163192 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1137 11:40:48.170046 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1138 11:40:48.176605 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1139 11:40:48.183320 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1140 11:40:48.190006 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1141 11:40:48.199838 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1142 11:40:48.206537 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1143 11:40:48.209725 Root Device assign_resources, bus 0 link: 0
1144 11:40:48.213100 DOMAIN: 0000 assign_resources, bus 0 link: 0
1145 11:40:48.223198 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1146 11:40:48.229995 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1147 11:40:48.239922 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1148 11:40:48.246904 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1149 11:40:48.253004 PCI: 00:04.0 assign_resources, bus 1 link: 0
1150 11:40:48.256442 PCI: 00:04.0 assign_resources, bus 1 link: 0
1151 11:40:48.263471 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1152 11:40:48.269744 PCI: 00:05.0 assign_resources, bus 2 link: 0
1153 11:40:48.273244 PCI: 00:05.0 assign_resources, bus 2 link: 0
1154 11:40:48.282831 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1155 11:40:48.289411 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1156 11:40:48.292884 PCI: 00:14.0 assign_resources, bus 0 link: 0
1157 11:40:48.299450 PCI: 00:14.0 assign_resources, bus 0 link: 0
1158 11:40:48.306848 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1159 11:40:48.310433 PCI: 00:14.3 assign_resources, bus 0 link: 0
1160 11:40:48.317141 PCI: 00:14.3 assign_resources, bus 0 link: 0
1161 11:40:48.323949 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1162 11:40:48.333479 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1163 11:40:48.337416 PCI: 00:15.0 assign_resources, bus 0 link: 0
1164 11:40:48.340462 PCI: 00:15.0 assign_resources, bus 0 link: 0
1165 11:40:48.350353 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1166 11:40:48.357092 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1167 11:40:48.363607 PCI: 00:15.2 assign_resources, bus 0 link: 0
1168 11:40:48.366818 PCI: 00:15.2 assign_resources, bus 0 link: 0
1169 11:40:48.376777 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1170 11:40:48.380333 PCI: 00:15.3 assign_resources, bus 0 link: 0
1171 11:40:48.383479 PCI: 00:15.3 assign_resources, bus 0 link: 0
1172 11:40:48.393677 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1173 11:40:48.400256 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1174 11:40:48.407046 PCI: 00:19.0 assign_resources, bus 0 link: 0
1175 11:40:48.409942 PCI: 00:19.0 assign_resources, bus 0 link: 0
1176 11:40:48.416688 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1177 11:40:48.427028 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1178 11:40:48.433672 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1179 11:40:48.440204 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1180 11:40:48.443199 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1181 11:40:48.446713 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1182 11:40:48.453632 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1183 11:40:48.456734 LPC: Trying to open IO window from 800 size 1ff
1184 11:40:48.466905 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1185 11:40:48.473448 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1186 11:40:48.480054 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1187 11:40:48.483163 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1188 11:40:48.490095 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1189 11:40:48.496849 DOMAIN: 0000 assign_resources, bus 0 link: 0
1190 11:40:48.499822 Root Device assign_resources, bus 0 link: 0
1191 11:40:48.503282 Done setting resources.
1192 11:40:48.509648 Show resources in subtree (Root Device)...After assigning values.
1193 11:40:48.513193 Root Device child on link 0 CPU_CLUSTER: 0
1194 11:40:48.516580 CPU_CLUSTER: 0 child on link 0 APIC: 00
1195 11:40:48.519675 APIC: 00
1196 11:40:48.519749 APIC: 02
1197 11:40:48.526372 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1198 11:40:48.532985 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1199 11:40:48.543019 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1200 11:40:48.546448 PCI: 00:00.0
1201 11:40:48.556445 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1202 11:40:48.563067 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1203 11:40:48.572709 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1204 11:40:48.582799 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1205 11:40:48.593088 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1206 11:40:48.602841 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1207 11:40:48.609673 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1208 11:40:48.619359 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1209 11:40:48.629618 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1210 11:40:48.639346 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1211 11:40:48.649497 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1212 11:40:48.659208 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1213 11:40:48.666122 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1214 11:40:48.676038 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1215 11:40:48.685787 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1216 11:40:48.695642 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1217 11:40:48.705585 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1218 11:40:48.715413 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1219 11:40:48.721950 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1220 11:40:48.725485 PCI: 00:02.0
1221 11:40:48.735304 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1222 11:40:48.745401 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1223 11:40:48.755449 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1224 11:40:48.758551 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1225 11:40:48.768601 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1226 11:40:48.771820 GENERIC: 0.0
1227 11:40:48.774927 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1228 11:40:48.788179 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1229 11:40:48.788263 GENERIC: 0.0
1230 11:40:48.791490 PCI: 00:08.0
1231 11:40:48.801929 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1232 11:40:48.804810 PCI: 00:14.0 child on link 0 USB0 port 0
1233 11:40:48.815080 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1234 11:40:48.818224 USB0 port 0 child on link 0 USB2 port 0
1235 11:40:48.821618 USB2 port 0
1236 11:40:48.824895 USB2 port 1
1237 11:40:48.825009 USB2 port 2
1238 11:40:48.828066 USB2 port 3
1239 11:40:48.828148 USB2 port 4
1240 11:40:48.831595 USB2 port 5
1241 11:40:48.831678 USB2 port 6
1242 11:40:48.834781 USB2 port 7
1243 11:40:48.834868 USB3 port 0
1244 11:40:48.838391 USB3 port 1
1245 11:40:48.838473 USB3 port 2
1246 11:40:48.841488 USB3 port 3
1247 11:40:48.841569 PCI: 00:14.2
1248 11:40:48.848030 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1249 11:40:48.858486 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1250 11:40:48.858570 GENERIC: 0.0
1251 11:40:48.861495 PCI: 00:14.5
1252 11:40:48.871165 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1253 11:40:48.874806 PCI: 00:15.0 child on link 0 I2C: 00:2c
1254 11:40:48.884459 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1255 11:40:48.887661 I2C: 00:2c
1256 11:40:48.887743 I2C: 00:15
1257 11:40:48.891249 PCI: 00:15.1
1258 11:40:48.901279 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1259 11:40:48.904171 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1260 11:40:48.914490 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1261 11:40:48.917700 GENERIC: 0.0
1262 11:40:48.917781 I2C: 00:15
1263 11:40:48.920739 I2C: 00:10
1264 11:40:48.920820 I2C: 00:10
1265 11:40:48.924248 I2C: 00:2c
1266 11:40:48.924329 I2C: 00:40
1267 11:40:48.927928 I2C: 00:10
1268 11:40:48.928009 I2C: 00:39
1269 11:40:48.931206 PCI: 00:15.3 child on link 0 I2C: 00:36
1270 11:40:48.944245 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1271 11:40:48.944327 I2C: 00:36
1272 11:40:48.944392 I2C: 00:10
1273 11:40:48.947631 I2C: 00:0c
1274 11:40:48.947711 I2C: 00:50
1275 11:40:48.950972 PCI: 00:16.0
1276 11:40:48.961136 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1277 11:40:48.963939 PCI: 00:19.0 child on link 0 I2C: 00:1a
1278 11:40:48.974156 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1279 11:40:48.977263 I2C: 00:1a
1280 11:40:48.977344 I2C: 00:1a
1281 11:40:48.980689 I2C: 00:1a
1282 11:40:48.980769 I2C: 00:28
1283 11:40:48.984295 I2C: 00:29
1284 11:40:48.984375 PCI: 00:19.2
1285 11:40:48.997279 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1286 11:40:49.007282 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1287 11:40:49.007364 PCI: 00:1a.0
1288 11:40:49.017216 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1289 11:40:49.020531 PCI: 00:1e.0
1290 11:40:49.023676 PCI: 00:1e.2 child on link 0 SPI: 00
1291 11:40:49.033844 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1292 11:40:49.037299 SPI: 00
1293 11:40:49.040435 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1294 11:40:49.047105 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1295 11:40:49.050469 PNP: 0c09.0
1296 11:40:49.060709 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1297 11:40:49.060785 PCI: 00:1f.2
1298 11:40:49.070643 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1299 11:40:49.080416 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1300 11:40:49.083567 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1301 11:40:49.093448 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1302 11:40:49.103717 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1303 11:40:49.107090 GENERIC: 0.0
1304 11:40:49.107167 PCI: 00:1f.5
1305 11:40:49.116862 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1306 11:40:49.120179 Done allocating resources.
1307 11:40:49.127179 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2097 ms
1308 11:40:49.130064 Enabling resources...
1309 11:40:49.133556 PCI: 00:00.0 subsystem <- 8086/4e22
1310 11:40:49.136852 PCI: 00:00.0 cmd <- 06
1311 11:40:49.140058 PCI: 00:02.0 subsystem <- 8086/4e55
1312 11:40:49.143686 PCI: 00:02.0 cmd <- 03
1313 11:40:49.146917 PCI: 00:04.0 subsystem <- 8086/4e03
1314 11:40:49.146998 PCI: 00:04.0 cmd <- 02
1315 11:40:49.150432 PCI: 00:05.0 bridge ctrl <- 0003
1316 11:40:49.157025 PCI: 00:05.0 subsystem <- 8086/4e19
1317 11:40:49.157105 PCI: 00:05.0 cmd <- 02
1318 11:40:49.160286 PCI: 00:08.0 cmd <- 06
1319 11:40:49.163900 PCI: 00:14.0 subsystem <- 8086/4ded
1320 11:40:49.166728 PCI: 00:14.0 cmd <- 02
1321 11:40:49.169944 PCI: 00:14.3 subsystem <- 8086/4df0
1322 11:40:49.173306 PCI: 00:14.3 cmd <- 02
1323 11:40:49.176597 PCI: 00:14.5 subsystem <- 8086/4df8
1324 11:40:49.179879 PCI: 00:14.5 cmd <- 06
1325 11:40:49.183345 PCI: 00:15.0 subsystem <- 8086/4de8
1326 11:40:49.183430 PCI: 00:15.0 cmd <- 02
1327 11:40:49.190135 PCI: 00:15.1 subsystem <- 8086/4de9
1328 11:40:49.190216 PCI: 00:15.1 cmd <- 02
1329 11:40:49.193365 PCI: 00:15.2 subsystem <- 8086/4dea
1330 11:40:49.196578 PCI: 00:15.2 cmd <- 02
1331 11:40:49.200333 PCI: 00:15.3 subsystem <- 8086/4deb
1332 11:40:49.203460 PCI: 00:15.3 cmd <- 02
1333 11:40:49.206628 PCI: 00:16.0 subsystem <- 8086/4de0
1334 11:40:49.210074 PCI: 00:16.0 cmd <- 02
1335 11:40:49.213713 PCI: 00:19.0 subsystem <- 8086/4dc5
1336 11:40:49.216613 PCI: 00:19.0 cmd <- 02
1337 11:40:49.219968 PCI: 00:19.2 subsystem <- 8086/4dc7
1338 11:40:49.220048 PCI: 00:19.2 cmd <- 06
1339 11:40:49.226896 PCI: 00:1a.0 subsystem <- 8086/4dc4
1340 11:40:49.226977 PCI: 00:1a.0 cmd <- 06
1341 11:40:49.230126 PCI: 00:1e.2 subsystem <- 8086/4daa
1342 11:40:49.233461 PCI: 00:1e.2 cmd <- 06
1343 11:40:49.236512 PCI: 00:1f.0 subsystem <- 8086/4d87
1344 11:40:49.240125 PCI: 00:1f.0 cmd <- 407
1345 11:40:49.243433 PCI: 00:1f.3 subsystem <- 8086/4dc8
1346 11:40:49.246897 PCI: 00:1f.3 cmd <- 02
1347 11:40:49.249868 PCI: 00:1f.5 subsystem <- 8086/4da4
1348 11:40:49.253214 PCI: 00:1f.5 cmd <- 406
1349 11:40:49.256711 done.
1350 11:40:49.260127 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1351 11:40:49.263480 Initializing devices...
1352 11:40:49.266528 Root Device init
1353 11:40:49.266609 mainboard: EC init
1354 11:40:49.273250 Chrome EC: Set SMI mask to 0x0000000000000000
1355 11:40:49.276398 Chrome EC: clear events_b mask to 0x0000000000000000
1356 11:40:49.283487 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1357 11:40:49.290260 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1358 11:40:49.296952 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1359 11:40:49.300047 Chrome EC: Set WAKE mask to 0x0000000000000000
1360 11:40:49.306587 Root Device init finished in 35 msecs
1361 11:40:49.306667 PCI: 00:00.0 init
1362 11:40:49.310832 CPU TDP = 6 Watts
1363 11:40:49.314516 CPU PL1 = 7 Watts
1364 11:40:49.314596 CPU PL2 = 12 Watts
1365 11:40:49.317694 PCI: 00:00.0 init finished in 6 msecs
1366 11:40:49.320809 PCI: 00:02.0 init
1367 11:40:49.324130 GMA: Found VBT in CBFS
1368 11:40:49.327728 GMA: Found valid VBT in CBFS
1369 11:40:49.330963 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1370 11:40:49.340735 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1371 11:40:49.344330 PCI: 00:02.0 init finished in 18 msecs
1372 11:40:49.347181 PCI: 00:08.0 init
1373 11:40:49.350666 PCI: 00:08.0 init finished in 0 msecs
1374 11:40:49.350747 PCI: 00:14.0 init
1375 11:40:49.357361 XHCI: Updated LFPS sampling OFF time to 9 ms
1376 11:40:49.360703 PCI: 00:14.0 init finished in 4 msecs
1377 11:40:49.363876 PCI: 00:15.0 init
1378 11:40:49.367381 I2C bus 0 version 0x3230302a
1379 11:40:49.370841 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1380 11:40:49.374448 PCI: 00:15.0 init finished in 6 msecs
1381 11:40:49.374529 PCI: 00:15.1 init
1382 11:40:49.377206 I2C bus 1 version 0x3230302a
1383 11:40:49.380720 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1384 11:40:49.387150 PCI: 00:15.1 init finished in 6 msecs
1385 11:40:49.387233 PCI: 00:15.2 init
1386 11:40:49.390624 I2C bus 2 version 0x3230302a
1387 11:40:49.393669 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1388 11:40:49.397230 PCI: 00:15.2 init finished in 6 msecs
1389 11:40:49.400575 PCI: 00:15.3 init
1390 11:40:49.403754 I2C bus 3 version 0x3230302a
1391 11:40:49.407065 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1392 11:40:49.410564 PCI: 00:15.3 init finished in 6 msecs
1393 11:40:49.413450 PCI: 00:16.0 init
1394 11:40:49.416703 PCI: 00:16.0 init finished in 0 msecs
1395 11:40:49.420255 PCI: 00:19.0 init
1396 11:40:49.420336 I2C bus 4 version 0x3230302a
1397 11:40:49.426713 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1398 11:40:49.430470 PCI: 00:19.0 init finished in 6 msecs
1399 11:40:49.430552 PCI: 00:1a.0 init
1400 11:40:49.436810 PCI: 00:1a.0 init finished in 0 msecs
1401 11:40:49.436894 PCI: 00:1f.0 init
1402 11:40:49.443308 IOAPIC: Initializing IOAPIC at 0xfec00000
1403 11:40:49.446880 IOAPIC: Bootstrap Processor Local APIC = 0x00
1404 11:40:49.450032 IOAPIC: ID = 0x02
1405 11:40:49.450112 IOAPIC: Dumping registers
1406 11:40:49.453477 reg 0x0000: 0x02000000
1407 11:40:49.456942 reg 0x0001: 0x00770020
1408 11:40:49.460338 reg 0x0002: 0x00000000
1409 11:40:49.463263 PCI: 00:1f.0 init finished in 21 msecs
1410 11:40:49.466501 PCI: 00:1f.2 init
1411 11:40:49.466583 Disabling ACPI via APMC.
1412 11:40:49.472375 APMC done.
1413 11:40:49.475139 PCI: 00:1f.2 init finished in 6 msecs
1414 11:40:49.486490 PNP: 0c09.0 init
1415 11:40:49.489761 Google Chrome EC uptime: 6.552 seconds
1416 11:40:49.496517 Google Chrome AP resets since EC boot: 0
1417 11:40:49.499708 Google Chrome most recent AP reset causes:
1418 11:40:49.506296 Google Chrome EC reset flags at last EC boot: reset-pin
1419 11:40:49.509800 PNP: 0c09.0 init finished in 18 msecs
1420 11:40:49.509882 Devices initialized
1421 11:40:49.512923 Show all devs... After init.
1422 11:40:49.516162 Root Device: enabled 1
1423 11:40:49.519706 CPU_CLUSTER: 0: enabled 1
1424 11:40:49.522897 DOMAIN: 0000: enabled 1
1425 11:40:49.522979 PCI: 00:00.0: enabled 1
1426 11:40:49.526310 PCI: 00:02.0: enabled 1
1427 11:40:49.529745 PCI: 00:04.0: enabled 1
1428 11:40:49.529827 PCI: 00:05.0: enabled 1
1429 11:40:49.532952 PCI: 00:09.0: enabled 0
1430 11:40:49.536001 PCI: 00:12.6: enabled 0
1431 11:40:49.539528 PCI: 00:14.0: enabled 1
1432 11:40:49.539610 PCI: 00:14.1: enabled 0
1433 11:40:49.542689 PCI: 00:14.2: enabled 0
1434 11:40:49.546089 PCI: 00:14.3: enabled 1
1435 11:40:49.549383 PCI: 00:14.5: enabled 1
1436 11:40:49.549464 PCI: 00:15.0: enabled 1
1437 11:40:49.552733 PCI: 00:15.1: enabled 1
1438 11:40:49.555779 PCI: 00:15.2: enabled 1
1439 11:40:49.559027 PCI: 00:15.3: enabled 1
1440 11:40:49.559109 PCI: 00:16.0: enabled 1
1441 11:40:49.562687 PCI: 00:16.1: enabled 0
1442 11:40:49.565736 PCI: 00:16.4: enabled 0
1443 11:40:49.569086 PCI: 00:16.5: enabled 0
1444 11:40:49.569167 PCI: 00:17.0: enabled 0
1445 11:40:49.572521 PCI: 00:19.0: enabled 1
1446 11:40:49.575728 PCI: 00:19.1: enabled 0
1447 11:40:49.575809 PCI: 00:19.2: enabled 1
1448 11:40:49.579338 PCI: 00:1a.0: enabled 1
1449 11:40:49.582278 PCI: 00:1c.0: enabled 0
1450 11:40:49.586018 PCI: 00:1c.1: enabled 0
1451 11:40:49.586099 PCI: 00:1c.2: enabled 0
1452 11:40:49.589076 PCI: 00:1c.3: enabled 0
1453 11:40:49.592320 PCI: 00:1c.4: enabled 0
1454 11:40:49.595644 PCI: 00:1c.5: enabled 0
1455 11:40:49.595726 PCI: 00:1c.6: enabled 0
1456 11:40:49.599305 PCI: 00:1c.7: enabled 1
1457 11:40:49.602658 PCI: 00:1e.0: enabled 0
1458 11:40:49.605765 PCI: 00:1e.1: enabled 0
1459 11:40:49.605846 PCI: 00:1e.2: enabled 1
1460 11:40:49.608837 PCI: 00:1e.3: enabled 0
1461 11:40:49.611954 PCI: 00:1f.0: enabled 1
1462 11:40:49.615445 PCI: 00:1f.1: enabled 0
1463 11:40:49.615527 PCI: 00:1f.2: enabled 1
1464 11:40:49.618660 PCI: 00:1f.3: enabled 1
1465 11:40:49.622171 PCI: 00:1f.4: enabled 0
1466 11:40:49.622252 PCI: 00:1f.5: enabled 1
1467 11:40:49.625336 PCI: 00:1f.7: enabled 0
1468 11:40:49.628444 GENERIC: 0.0: enabled 1
1469 11:40:49.631874 GENERIC: 0.0: enabled 1
1470 11:40:49.631956 USB0 port 0: enabled 1
1471 11:40:49.635287 GENERIC: 0.0: enabled 1
1472 11:40:49.638416 I2C: 00:2c: enabled 1
1473 11:40:49.638498 I2C: 00:15: enabled 1
1474 11:40:49.642107 GENERIC: 0.0: enabled 0
1475 11:40:49.645212 I2C: 00:15: enabled 1
1476 11:40:49.648807 I2C: 00:10: enabled 0
1477 11:40:49.648896 I2C: 00:10: enabled 0
1478 11:40:49.651722 I2C: 00:2c: enabled 1
1479 11:40:49.654892 I2C: 00:40: enabled 1
1480 11:40:49.654995 I2C: 00:10: enabled 1
1481 11:40:49.658283 I2C: 00:39: enabled 1
1482 11:40:49.661830 I2C: 00:36: enabled 1
1483 11:40:49.661912 I2C: 00:10: enabled 0
1484 11:40:49.665002 I2C: 00:0c: enabled 1
1485 11:40:49.668515 I2C: 00:50: enabled 1
1486 11:40:49.668596 I2C: 00:1a: enabled 1
1487 11:40:49.671831 I2C: 00:1a: enabled 0
1488 11:40:49.674972 I2C: 00:1a: enabled 0
1489 11:40:49.675053 I2C: 00:28: enabled 1
1490 11:40:49.678307 I2C: 00:29: enabled 1
1491 11:40:49.681789 PCI: 00:00.0: enabled 1
1492 11:40:49.681871 SPI: 00: enabled 1
1493 11:40:49.684845 PNP: 0c09.0: enabled 1
1494 11:40:49.688343 GENERIC: 0.0: enabled 0
1495 11:40:49.688425 USB2 port 0: enabled 1
1496 11:40:49.691410 USB2 port 1: enabled 1
1497 11:40:49.694876 USB2 port 2: enabled 1
1498 11:40:49.698527 USB2 port 3: enabled 1
1499 11:40:49.698609 USB2 port 4: enabled 0
1500 11:40:49.701847 USB2 port 5: enabled 1
1501 11:40:49.704956 USB2 port 6: enabled 0
1502 11:40:49.705037 USB2 port 7: enabled 1
1503 11:40:49.707970 USB3 port 0: enabled 1
1504 11:40:49.711523 USB3 port 1: enabled 1
1505 11:40:49.714751 USB3 port 2: enabled 1
1506 11:40:49.714833 USB3 port 3: enabled 1
1507 11:40:49.717943 APIC: 00: enabled 1
1508 11:40:49.718025 APIC: 02: enabled 1
1509 11:40:49.721344 PCI: 00:08.0: enabled 1
1510 11:40:49.728273 BS: BS_DEV_INIT run times (exec / console): 24 / 437 ms
1511 11:40:49.731361 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1512 11:40:49.734882 ELOG: NV offset 0xbfa000 size 0x1000
1513 11:40:49.742953 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1514 11:40:49.749412 ELOG: Event(17) added with size 13 at 2023-04-03 11:40:49 UTC
1515 11:40:49.756146 ELOG: Event(92) added with size 9 at 2023-04-03 11:40:49 UTC
1516 11:40:49.762857 ELOG: Event(93) added with size 9 at 2023-04-03 11:40:49 UTC
1517 11:40:49.769638 ELOG: Event(9E) added with size 10 at 2023-04-03 11:40:49 UTC
1518 11:40:49.776117 ELOG: Event(9F) added with size 14 at 2023-04-03 11:40:49 UTC
1519 11:40:49.782610 ELOG: Event(16) added with size 11 at 2023-04-03 11:40:49 UTC
1520 11:40:49.786262 Erasing flash addr bfa000 + 4 KiB
1521 11:40:49.836500 BS: BS_DEV_INIT exit times (exec / console): 28 / 55 ms
1522 11:40:49.842787 ELOG: Event(A1) added with size 10 at 2023-04-03 11:40:49 UTC
1523 11:40:49.849762 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1524 11:40:49.856430 ELOG: Event(A0) added with size 9 at 2023-04-03 11:40:49 UTC
1525 11:40:49.863193 elog_add_boot_reason: Logged dev mode boot
1526 11:40:49.866571 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1527 11:40:49.869363 Finalize devices...
1528 11:40:49.869445 Devices finalized
1529 11:40:49.876295 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1530 11:40:49.882854 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1531 11:40:49.886078 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1532 11:40:49.892846 ME: HFSTS1 : 0x80030045
1533 11:40:49.896142 ME: HFSTS2 : 0x30280136
1534 11:40:49.899503 ME: HFSTS3 : 0x00000050
1535 11:40:49.903002 ME: HFSTS4 : 0x00004000
1536 11:40:49.909717 ME: HFSTS5 : 0x00000000
1537 11:40:49.912944 ME: HFSTS6 : 0x40400006
1538 11:40:49.916045 ME: Manufacturing Mode : NO
1539 11:40:49.919720 ME: FW Partition Table : OK
1540 11:40:49.922727 ME: Bringup Loader Failure : NO
1541 11:40:49.926154 ME: Firmware Init Complete : NO
1542 11:40:49.929625 ME: Boot Options Present : NO
1543 11:40:49.932670 ME: Update In Progress : NO
1544 11:40:49.935868 ME: D0i3 Support : YES
1545 11:40:49.939238 ME: Low Power State Enabled : NO
1546 11:40:49.942718 ME: CPU Replaced : YES
1547 11:40:49.945869 ME: CPU Replacement Valid : YES
1548 11:40:49.949443 ME: Current Working State : 5
1549 11:40:49.952546 ME: Current Operation State : 1
1550 11:40:49.956130 ME: Current Operation Mode : 3
1551 11:40:49.959245 ME: Error Code : 0
1552 11:40:49.962724 ME: CPU Debug Disabled : YES
1553 11:40:49.966230 ME: TXT Support : NO
1554 11:40:49.972639 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1555 11:40:49.975948 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1556 11:40:49.979309 ACPI: Writing ACPI tables at 76b27000.
1557 11:40:49.982378 ACPI: * FACS
1558 11:40:49.982460 ACPI: * DSDT
1559 11:40:49.989069 Ramoops buffer: 0x100000@0x76a26000.
1560 11:40:49.992651 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1561 11:40:49.996029 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1562 11:40:49.999843 Google Chrome EC: version:
1563 11:40:50.003160 ro: magolor_1.1.9999-103b6f9
1564 11:40:50.006313 rw: magolor_1.1.9999-103b6f9
1565 11:40:50.009758 running image: 1
1566 11:40:50.016366 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1567 11:40:50.019838 ACPI: * FADT
1568 11:40:50.019924 SCI is IRQ9
1569 11:40:50.022981 ACPI: added table 1/32, length now 40
1570 11:40:50.026461 ACPI: * SSDT
1571 11:40:50.029782 Found 1 CPU(s) with 2 core(s) each.
1572 11:40:50.032851 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1573 11:40:50.039488 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1574 11:40:50.042894 Could not locate 'wifi_sar' in VPD.
1575 11:40:50.046019 Checking CBFS for default SAR values
1576 11:40:50.049688 wifi_sar_defaults.hex has bad len in CBFS
1577 11:40:50.052798 failed from getting SAR limits!
1578 11:40:50.059233 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1579 11:40:50.062889 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1580 11:40:50.069693 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1581 11:40:50.072840 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1582 11:40:50.079763 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1583 11:40:50.083064 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1584 11:40:50.089348 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1585 11:40:50.092894 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1586 11:40:50.099473 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1587 11:40:50.106029 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1588 11:40:50.112803 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1589 11:40:50.116439 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1590 11:40:50.122673 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1591 11:40:50.129622 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1592 11:40:50.132727 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1593 11:40:50.139267 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1594 11:40:50.142569 PS2K: Passing 101 keymaps to kernel
1595 11:40:50.149444 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1596 11:40:50.152700 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1597 11:40:50.159304 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1598 11:40:50.165976 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1599 11:40:50.169009 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1600 11:40:50.176035 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1601 11:40:50.182744 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1602 11:40:50.185892 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1603 11:40:50.192313 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1604 11:40:50.199211 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1605 11:40:50.202376 ACPI: added table 2/32, length now 44
1606 11:40:50.202456 ACPI: * MCFG
1607 11:40:50.208958 ACPI: added table 3/32, length now 48
1608 11:40:50.209038 ACPI: * TPM2
1609 11:40:50.212629 TPM2 log created at 0x76a16000
1610 11:40:50.215744 ACPI: added table 4/32, length now 52
1611 11:40:50.218957 ACPI: * MADT
1612 11:40:50.219037 SCI is IRQ9
1613 11:40:50.222508 ACPI: added table 5/32, length now 56
1614 11:40:50.225690 current = 76b2d580
1615 11:40:50.225771 ACPI: * DMAR
1616 11:40:50.229181 ACPI: added table 6/32, length now 60
1617 11:40:50.235688 ACPI: added table 7/32, length now 64
1618 11:40:50.235769 ACPI: * HPET
1619 11:40:50.239048 ACPI: added table 8/32, length now 68
1620 11:40:50.242254 ACPI: done.
1621 11:40:50.242334 ACPI tables: 26304 bytes.
1622 11:40:50.245857 smbios_write_tables: 76a15000
1623 11:40:50.249015 EC returned error result code 3
1624 11:40:50.255402 Couldn't obtain OEM name from CBI
1625 11:40:50.259168 Create SMBIOS type 16
1626 11:40:50.259248 Create SMBIOS type 17
1627 11:40:50.262136 GENERIC: 0.0 (WIFI Device)
1628 11:40:50.265275 SMBIOS tables: 913 bytes.
1629 11:40:50.268899 Writing table forward entry at 0x00000500
1630 11:40:50.275305 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1631 11:40:50.278696 Writing coreboot table at 0x76b4b000
1632 11:40:50.285274 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1633 11:40:50.288494 1. 0000000000001000-000000000009ffff: RAM
1634 11:40:50.295206 2. 00000000000a0000-00000000000fffff: RESERVED
1635 11:40:50.298801 3. 0000000000100000-0000000076a14fff: RAM
1636 11:40:50.305303 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1637 11:40:50.308668 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1638 11:40:50.315205 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1639 11:40:50.318820 7. 0000000077000000-000000007fbfffff: RESERVED
1640 11:40:50.325104 8. 00000000c0000000-00000000cfffffff: RESERVED
1641 11:40:50.328656 9. 00000000fb000000-00000000fb000fff: RESERVED
1642 11:40:50.335415 10. 00000000fe000000-00000000fe00ffff: RESERVED
1643 11:40:50.338840 11. 00000000fea80000-00000000fea87fff: RESERVED
1644 11:40:50.344839 12. 00000000fed80000-00000000fed87fff: RESERVED
1645 11:40:50.348278 13. 00000000fed90000-00000000fed92fff: RESERVED
1646 11:40:50.351573 14. 00000000feda0000-00000000feda1fff: RESERVED
1647 11:40:50.358102 15. 0000000100000000-00000001803fffff: RAM
1648 11:40:50.361777 Passing 4 GPIOs to payload:
1649 11:40:50.364716 NAME | PORT | POLARITY | VALUE
1650 11:40:50.371350 lid | undefined | high | high
1651 11:40:50.374714 power | undefined | high | low
1652 11:40:50.381534 oprom | undefined | high | low
1653 11:40:50.385110 EC in RW | 0x000000b9 | high | low
1654 11:40:50.391352 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 92c3
1655 11:40:50.394840 coreboot table: 1504 bytes.
1656 11:40:50.397992 IMD ROOT 0. 0x76fff000 0x00001000
1657 11:40:50.401405 IMD SMALL 1. 0x76ffe000 0x00001000
1658 11:40:50.408328 FSP MEMORY 2. 0x76c4e000 0x003b0000
1659 11:40:50.411222 CONSOLE 3. 0x76c2e000 0x00020000
1660 11:40:50.414725 FMAP 4. 0x76c2d000 0x00000578
1661 11:40:50.418111 TIME STAMP 5. 0x76c2c000 0x00000910
1662 11:40:50.421384 VBOOT WORK 6. 0x76c18000 0x00014000
1663 11:40:50.424612 ROMSTG STCK 7. 0x76c17000 0x00001000
1664 11:40:50.427937 AFTER CAR 8. 0x76c0d000 0x0000a000
1665 11:40:50.431072 RAMSTAGE 9. 0x76ba7000 0x00066000
1666 11:40:50.437962 REFCODE 10. 0x76b67000 0x00040000
1667 11:40:50.441436 SMM BACKUP 11. 0x76b57000 0x00010000
1668 11:40:50.444500 4f444749 12. 0x76b55000 0x00002000
1669 11:40:50.448000 EXT VBT13. 0x76b53000 0x00001c43
1670 11:40:50.451067 COREBOOT 14. 0x76b4b000 0x00008000
1671 11:40:50.454784 ACPI 15. 0x76b27000 0x00024000
1672 11:40:50.457971 ACPI GNVS 16. 0x76b26000 0x00001000
1673 11:40:50.461054 RAMOOPS 17. 0x76a26000 0x00100000
1674 11:40:50.464729 TPM2 TCGLOG18. 0x76a16000 0x00010000
1675 11:40:50.467841 SMBIOS 19. 0x76a15000 0x00000800
1676 11:40:50.471185 IMD small region:
1677 11:40:50.474371 IMD ROOT 0. 0x76ffec00 0x00000400
1678 11:40:50.478014 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1679 11:40:50.484564 VPD 2. 0x76ffeb80 0x0000004c
1680 11:40:50.487865 POWER STATE 3. 0x76ffeb40 0x00000040
1681 11:40:50.490970 ROMSTAGE 4. 0x76ffeb20 0x00000004
1682 11:40:50.494566 MEM INFO 5. 0x76ffe940 0x000001e0
1683 11:40:50.501137 BS: BS_WRITE_TABLES run times (exec / console): 7 / 517 ms
1684 11:40:50.504231 MTRR: Physical address space:
1685 11:40:50.511209 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1686 11:40:50.514193 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1687 11:40:50.520818 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1688 11:40:50.527801 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1689 11:40:50.534367 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1690 11:40:50.541075 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1691 11:40:50.547610 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1692 11:40:50.551003 MTRR: Fixed MSR 0x250 0x0606060606060606
1693 11:40:50.554236 MTRR: Fixed MSR 0x258 0x0606060606060606
1694 11:40:50.560838 MTRR: Fixed MSR 0x259 0x0000000000000000
1695 11:40:50.564440 MTRR: Fixed MSR 0x268 0x0606060606060606
1696 11:40:50.567778 MTRR: Fixed MSR 0x269 0x0606060606060606
1697 11:40:50.571081 MTRR: Fixed MSR 0x26a 0x0606060606060606
1698 11:40:50.574250 MTRR: Fixed MSR 0x26b 0x0606060606060606
1699 11:40:50.580719 MTRR: Fixed MSR 0x26c 0x0606060606060606
1700 11:40:50.584224 MTRR: Fixed MSR 0x26d 0x0606060606060606
1701 11:40:50.587429 MTRR: Fixed MSR 0x26e 0x0606060606060606
1702 11:40:50.590807 MTRR: Fixed MSR 0x26f 0x0606060606060606
1703 11:40:50.594519 call enable_fixed_mtrr()
1704 11:40:50.597504 CPU physical address size: 39 bits
1705 11:40:50.604288 MTRR: default type WB/UC MTRR counts: 6/5.
1706 11:40:50.607481 MTRR: UC selected as default type.
1707 11:40:50.614275 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1708 11:40:50.617895 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1709 11:40:50.624119 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1710 11:40:50.630721 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1711 11:40:50.637338 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1712 11:40:50.637424
1713 11:40:50.641126 MTRR check
1714 11:40:50.641211 Fixed MTRRs : Enabled
1715 11:40:50.644293 Variable MTRRs: Enabled
1716 11:40:50.644407
1717 11:40:50.647449 MTRR: Fixed MSR 0x250 0x0606060606060606
1718 11:40:50.653946 MTRR: Fixed MSR 0x258 0x0606060606060606
1719 11:40:50.657579 MTRR: Fixed MSR 0x259 0x0000000000000000
1720 11:40:50.660609 MTRR: Fixed MSR 0x268 0x0606060606060606
1721 11:40:50.664298 MTRR: Fixed MSR 0x269 0x0606060606060606
1722 11:40:50.667238 MTRR: Fixed MSR 0x26a 0x0606060606060606
1723 11:40:50.673850 MTRR: Fixed MSR 0x26b 0x0606060606060606
1724 11:40:50.677497 MTRR: Fixed MSR 0x26c 0x0606060606060606
1725 11:40:50.680818 MTRR: Fixed MSR 0x26d 0x0606060606060606
1726 11:40:50.683811 MTRR: Fixed MSR 0x26e 0x0606060606060606
1727 11:40:50.690337 MTRR: Fixed MSR 0x26f 0x0606060606060606
1728 11:40:50.693939 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1729 11:40:50.697334 call enable_fixed_mtrr()
1730 11:40:50.701565 Checking cr50 for pending updates
1731 11:40:50.705011 CPU physical address size: 39 bits
1732 11:40:50.708579 Reading cr50 TPM mode
1733 11:40:50.718244 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1734 11:40:50.725860 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1735 11:40:50.729298 Checking segment from ROM address 0xfff9d5b8
1736 11:40:50.735967 Checking segment from ROM address 0xfff9d5d4
1737 11:40:50.739060 Loading segment from ROM address 0xfff9d5b8
1738 11:40:50.742337 code (compression=0)
1739 11:40:50.749020 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1740 11:40:50.759163 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1741 11:40:50.762218 it's not compressed!
1742 11:40:50.887149 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1743 11:40:50.893983 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1744 11:40:50.901264 Loading segment from ROM address 0xfff9d5d4
1745 11:40:50.904467 Entry Point 0x30000000
1746 11:40:50.904578 Loaded segments
1747 11:40:50.911481 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1748 11:40:50.927513 Finalizing chipset.
1749 11:40:50.930451 Finalizing SMM.
1750 11:40:50.930588 APMC done.
1751 11:40:50.937117 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1752 11:40:50.940647 mp_park_aps done after 0 msecs.
1753 11:40:50.943714 Jumping to boot code at 0x30000000(0x76b4b000)
1754 11:40:50.953760 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1755 11:40:50.953848
1756 11:40:50.953914
1757 11:40:50.953975
1758 11:40:50.957212 Starting depthcharge on Magolor...
1759 11:40:50.957314
1760 11:40:50.957704 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1761 11:40:50.957833 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1762 11:40:50.957948 Setting prompt string to ['dedede:']
1763 11:40:50.958037 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1764 11:40:50.967097 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1765 11:40:50.967185
1766 11:40:50.974454 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1767 11:40:50.974659
1768 11:40:50.978388 fw_config match found: AUDIO_AMP=UNPROVISIONED
1769 11:40:50.978486
1770 11:40:50.980403 Wipe memory regions:
1771 11:40:50.980484
1772 11:40:50.984269 [0x00000000001000, 0x000000000a0000)
1773 11:40:50.984352
1774 11:40:50.987195 [0x00000000100000, 0x00000030000000)
1775 11:40:51.115943
1776 11:40:51.118803 [0x00000031062170, 0x00000076a15000)
1777 11:40:51.287728
1778 11:40:51.290885 [0x00000100000000, 0x00000180400000)
1779 11:40:52.353742
1780 11:40:52.353913 R8152: Initializing
1781 11:40:52.354005
1782 11:40:52.356613 Version 6 (ocp_data = 5c30)
1783 11:40:52.360029
1784 11:40:52.360104 R8152: Done initializing
1785 11:40:52.360184
1786 11:40:52.363250 Adding net device
1787 11:40:52.363334
1788 11:40:52.366688 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1789 11:40:52.370071
1790 11:40:52.370149
1791 11:40:52.370230
1792 11:40:52.370535 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1794 11:40:52.471277 dedede: tftpboot 192.168.201.1 9849688/tftp-deploy-shug5oec/kernel/bzImage 9849688/tftp-deploy-shug5oec/kernel/cmdline 9849688/tftp-deploy-shug5oec/ramdisk/ramdisk.cpio.gz
1795 11:40:52.471456 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1796 11:40:52.471565 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1797 11:40:52.475943 tftpboot 192.168.201.1 9849688/tftp-deploy-shug5oec/kernel/bzImoy-shug5oec/kernel/cmdline 9849688/tftp-deploy-shug5oec/ramdisk/ramdisk.cpio.gz
1798 11:40:52.476031
1799 11:40:52.476121 Waiting for link
1800 11:40:52.677888
1801 11:40:52.678015 done.
1802 11:40:52.678118
1803 11:40:52.678199 MAC: 00:24:32:30:7a:67
1804 11:40:52.678277
1805 11:40:52.681152 Sending DHCP discover... done.
1806 11:40:52.681231
1807 11:40:52.684671 Waiting for reply... done.
1808 11:40:52.684780
1809 11:40:52.688036 Sending DHCP request... done.
1810 11:40:52.688142
1811 11:40:52.691332 Waiting for reply... done.
1812 11:40:52.691410
1813 11:40:52.694780 My ip is 192.168.201.15
1814 11:40:52.694863
1815 11:40:52.697737 The DHCP server ip is 192.168.201.1
1816 11:40:52.697821
1817 11:40:52.704864 TFTP server IP predefined by user: 192.168.201.1
1818 11:40:52.704944
1819 11:40:52.711027 Bootfile predefined by user: 9849688/tftp-deploy-shug5oec/kernel/bzImage
1820 11:40:52.711108
1821 11:40:52.714520 Sending tftp read request... done.
1822 11:40:52.714599
1823 11:40:52.717707 Waiting for the transfer...
1824 11:40:52.717785
1825 11:40:53.278969 00000000 ################################################################
1826 11:40:53.279102
1827 11:40:53.842041 00080000 ################################################################
1828 11:40:53.842176
1829 11:40:54.404351 00100000 ################################################################
1830 11:40:54.404481
1831 11:40:54.958043 00180000 ################################################################
1832 11:40:54.958181
1833 11:40:55.507981 00200000 ################################################################
1834 11:40:55.508121
1835 11:40:56.069665 00280000 ################################################################
1836 11:40:56.069851
1837 11:40:56.619474 00300000 ################################################################
1838 11:40:56.619610
1839 11:40:57.175932 00380000 ################################################################
1840 11:40:57.176061
1841 11:40:57.711183 00400000 ################################################################
1842 11:40:57.711320
1843 11:40:58.263869 00480000 ################################################################
1844 11:40:58.264001
1845 11:40:58.817915 00500000 ################################################################
1846 11:40:58.818093
1847 11:40:59.381743 00580000 ################################################################
1848 11:40:59.381886
1849 11:40:59.944103 00600000 ################################################################
1850 11:40:59.944240
1851 11:41:00.488712 00680000 ################################################################
1852 11:41:00.488854
1853 11:41:01.019029 00700000 ################################################################
1854 11:41:01.019183
1855 11:41:01.036567 00780000 ## done.
1856 11:41:01.036662
1857 11:41:01.039609 The bootfile was 7880592 bytes long.
1858 11:41:01.039699
1859 11:41:01.042992 Sending tftp read request... done.
1860 11:41:01.043077
1861 11:41:01.046232 Waiting for the transfer...
1862 11:41:01.046307
1863 11:41:01.596987 00000000 ################################################################
1864 11:41:01.597132
1865 11:41:02.140568 00080000 ################################################################
1866 11:41:02.140712
1867 11:41:02.690757 00100000 ################################################################
1868 11:41:02.690904
1869 11:41:03.241860 00180000 ################################################################
1870 11:41:03.242035
1871 11:41:03.801100 00200000 ################################################################
1872 11:41:03.801231
1873 11:41:04.345030 00280000 ################################################################
1874 11:41:04.345164
1875 11:41:04.893404 00300000 ################################################################
1876 11:41:04.893603
1877 11:41:05.446024 00380000 ################################################################
1878 11:41:05.446167
1879 11:41:05.996761 00400000 ################################################################
1880 11:41:05.996926
1881 11:41:06.559243 00480000 ################################################################
1882 11:41:06.559378
1883 11:41:07.099162 00500000 ############################################################### done.
1884 11:41:07.099296
1885 11:41:07.102421 Sending tftp read request... done.
1886 11:41:07.102529
1887 11:41:07.105634 Waiting for the transfer...
1888 11:41:07.105742
1889 11:41:07.105834 00000000 # done.
1890 11:41:07.105925
1891 11:41:07.116051 Command line loaded dynamically from TFTP file: 9849688/tftp-deploy-shug5oec/kernel/cmdline
1892 11:41:07.116175
1893 11:41:07.135460 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9849688/extract-nfsrootfs-8jh8nlgy,tcp,hard ip=dhcp tftpserverip=192.168.201.1
1894 11:41:07.135554
1895 11:41:07.139058 ec_init: CrosEC protocol v3 supported (256, 256)
1896 11:41:07.144979
1897 11:41:07.148495 Shutting down all USB controllers.
1898 11:41:07.148576
1899 11:41:07.148641 Removing current net device
1900 11:41:07.148701
1901 11:41:07.151649 Finalizing coreboot
1902 11:41:07.151730
1903 11:41:07.158004 Exiting depthcharge with code 4 at timestamp: 23088891
1904 11:41:07.158088
1905 11:41:07.158153
1906 11:41:07.158213 Starting kernel ...
1907 11:41:07.158281
1908 11:41:07.158338
1909 11:41:07.158688 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
1910 11:41:07.158782 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
1911 11:41:07.158860 Setting prompt string to ['Linux version [0-9]']
1912 11:41:07.158930 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1913 11:41:07.158998 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1915 11:45:38.159754 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
1917 11:45:38.160855 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
1919 11:45:38.161758 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1922 11:45:38.163160 end: 2 depthcharge-action (duration 00:05:00) [common]
1924 11:45:38.164046 Cleaning after the job
1925 11:45:38.164132 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849688/tftp-deploy-shug5oec/ramdisk
1926 11:45:38.164721 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849688/tftp-deploy-shug5oec/kernel
1927 11:45:38.165506 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849688/tftp-deploy-shug5oec/nfsrootfs
1928 11:45:38.207154 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849688/tftp-deploy-shug5oec/modules
1929 11:45:38.207512 start: 5.1 power-off (timeout 00:00:30) [common]
1930 11:45:38.207675 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-1' '--port=1' '--command=off'
1931 11:45:38.284871 >> Command sent successfully.
1932 11:45:38.290180 Returned 0 in 0 seconds
1933 11:45:38.391623 end: 5.1 power-off (duration 00:00:00) [common]
1935 11:45:38.393186 start: 5.2 read-feedback (timeout 00:10:00) [common]
1936 11:45:38.394528 Listened to connection for namespace 'common' for up to 1s
1938 11:45:38.395948 Listened to connection for namespace 'common' for up to 1s
1939 11:45:39.399251 Finalising connection for namespace 'common'
1940 11:45:39.399995 Disconnecting from shell: Finalise
1941 11:45:39.400499
1942 11:45:39.502014 end: 5.2 read-feedback (duration 00:00:01) [common]
1943 11:45:39.502664 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9849688
1944 11:45:39.649841 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9849688
1945 11:45:39.650019 JobError: Your job cannot terminate cleanly.