Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 11:40:21.695103 lava-dispatcher, installed at version: 2023.01
2 11:40:21.695321 start: 0 validate
3 11:40:21.695459 Start time: 2023-04-03 11:40:21.695452+00:00 (UTC)
4 11:40:21.695593 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:40:21.695732 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230324.0%2Famd64%2Finitrd.cpio.gz exists
6 11:40:21.990880 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:40:21.991698 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1098-g8d34bf42efd9b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:40:22.288055 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:40:22.288861 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230324.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:40:26.800157 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:40:26.800890 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1098-g8d34bf42efd9b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 11:40:27.100447 validate duration: 5.41
14 11:40:27.101597 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:40:27.102088 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:40:27.102524 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:40:27.102999 Not decompressing ramdisk as can be used compressed.
18 11:40:27.103413 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230324.0/amd64/initrd.cpio.gz
19 11:40:27.103739 saving as /var/lib/lava/dispatcher/tmp/9849696/tftp-deploy-l116ez8b/ramdisk/initrd.cpio.gz
20 11:40:27.104043 total size: 5432104 (5MB)
21 11:40:27.670002 progress 0% (0MB)
22 11:40:27.675026 progress 5% (0MB)
23 11:40:27.676507 progress 10% (0MB)
24 11:40:27.677937 progress 15% (0MB)
25 11:40:27.679582 progress 20% (1MB)
26 11:40:27.681057 progress 25% (1MB)
27 11:40:27.682510 progress 30% (1MB)
28 11:40:27.684083 progress 35% (1MB)
29 11:40:27.685530 progress 40% (2MB)
30 11:40:27.686975 progress 45% (2MB)
31 11:40:27.688570 progress 50% (2MB)
32 11:40:27.690148 progress 55% (2MB)
33 11:40:27.691555 progress 60% (3MB)
34 11:40:27.693045 progress 65% (3MB)
35 11:40:27.694619 progress 70% (3MB)
36 11:40:27.696021 progress 75% (3MB)
37 11:40:27.697469 progress 80% (4MB)
38 11:40:27.698871 progress 85% (4MB)
39 11:40:27.700553 progress 90% (4MB)
40 11:40:27.701992 progress 95% (4MB)
41 11:40:27.703416 progress 100% (5MB)
42 11:40:27.703629 5MB downloaded in 0.60s (8.64MB/s)
43 11:40:27.703789 end: 1.1.1 http-download (duration 00:00:01) [common]
45 11:40:27.704122 end: 1.1 download-retry (duration 00:00:01) [common]
46 11:40:27.704229 start: 1.2 download-retry (timeout 00:09:59) [common]
47 11:40:27.704322 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 11:40:27.704472 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1098-g8d34bf42efd9b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 11:40:27.704547 saving as /var/lib/lava/dispatcher/tmp/9849696/tftp-deploy-l116ez8b/kernel/bzImage
50 11:40:27.704613 total size: 7880592 (7MB)
51 11:40:27.704676 No compression specified
52 11:40:27.705861 progress 0% (0MB)
53 11:40:27.708075 progress 5% (0MB)
54 11:40:27.710242 progress 10% (0MB)
55 11:40:27.712513 progress 15% (1MB)
56 11:40:27.714622 progress 20% (1MB)
57 11:40:27.716762 progress 25% (1MB)
58 11:40:27.718900 progress 30% (2MB)
59 11:40:27.721044 progress 35% (2MB)
60 11:40:27.723141 progress 40% (3MB)
61 11:40:27.725396 progress 45% (3MB)
62 11:40:27.727512 progress 50% (3MB)
63 11:40:27.729622 progress 55% (4MB)
64 11:40:27.731687 progress 60% (4MB)
65 11:40:27.733802 progress 65% (4MB)
66 11:40:27.735870 progress 70% (5MB)
67 11:40:27.737972 progress 75% (5MB)
68 11:40:27.740070 progress 80% (6MB)
69 11:40:27.742139 progress 85% (6MB)
70 11:40:27.744199 progress 90% (6MB)
71 11:40:27.746263 progress 95% (7MB)
72 11:40:27.748333 progress 100% (7MB)
73 11:40:27.748545 7MB downloaded in 0.04s (171.09MB/s)
74 11:40:27.748694 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:40:27.748939 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:40:27.749035 start: 1.3 download-retry (timeout 00:09:59) [common]
78 11:40:27.749126 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 11:40:27.749236 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230324.0/amd64/full.rootfs.tar.xz
80 11:40:27.749307 saving as /var/lib/lava/dispatcher/tmp/9849696/tftp-deploy-l116ez8b/nfsrootfs/full.rootfs.tar
81 11:40:27.749371 total size: 133328976 (127MB)
82 11:40:27.749435 Using unxz to decompress xz
83 11:40:27.753303 progress 0% (0MB)
84 11:40:28.114176 progress 5% (6MB)
85 11:40:28.497075 progress 10% (12MB)
86 11:40:28.799903 progress 15% (19MB)
87 11:40:28.998728 progress 20% (25MB)
88 11:40:29.265674 progress 25% (31MB)
89 11:40:29.630580 progress 30% (38MB)
90 11:40:30.005382 progress 35% (44MB)
91 11:40:30.428637 progress 40% (50MB)
92 11:40:30.840888 progress 45% (57MB)
93 11:40:31.226010 progress 50% (63MB)
94 11:40:31.626351 progress 55% (69MB)
95 11:40:32.015844 progress 60% (76MB)
96 11:40:32.406244 progress 65% (82MB)
97 11:40:32.802886 progress 70% (89MB)
98 11:40:33.193649 progress 75% (95MB)
99 11:40:33.664739 progress 80% (101MB)
100 11:40:34.137768 progress 85% (108MB)
101 11:40:34.435818 progress 90% (114MB)
102 11:40:34.810712 progress 95% (120MB)
103 11:40:35.223767 progress 100% (127MB)
104 11:40:35.230154 127MB downloaded in 7.48s (17.00MB/s)
105 11:40:35.230461 end: 1.3.1 http-download (duration 00:00:07) [common]
107 11:40:35.230740 end: 1.3 download-retry (duration 00:00:07) [common]
108 11:40:35.230839 start: 1.4 download-retry (timeout 00:09:52) [common]
109 11:40:35.230935 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 11:40:35.231063 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1098-g8d34bf42efd9b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 11:40:35.231141 saving as /var/lib/lava/dispatcher/tmp/9849696/tftp-deploy-l116ez8b/modules/modules.tar
112 11:40:35.231208 total size: 251104 (0MB)
113 11:40:35.231277 Using unxz to decompress xz
114 11:40:35.235258 progress 13% (0MB)
115 11:40:35.235688 progress 26% (0MB)
116 11:40:35.235961 progress 39% (0MB)
117 11:40:35.237461 progress 52% (0MB)
118 11:40:35.239723 progress 65% (0MB)
119 11:40:35.241668 progress 78% (0MB)
120 11:40:35.243685 progress 91% (0MB)
121 11:40:35.245695 progress 100% (0MB)
122 11:40:35.251420 0MB downloaded in 0.02s (11.85MB/s)
123 11:40:35.251680 end: 1.4.1 http-download (duration 00:00:00) [common]
125 11:40:35.251967 end: 1.4 download-retry (duration 00:00:00) [common]
126 11:40:35.252072 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 11:40:35.252184 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 11:40:36.557852 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9849696/extract-nfsrootfs-9d6hqosl
129 11:40:36.558064 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
130 11:40:36.558176 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
131 11:40:36.558363 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1
132 11:40:36.558479 makedir: /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin
133 11:40:36.558575 makedir: /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/tests
134 11:40:36.558664 makedir: /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/results
135 11:40:36.558773 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-add-keys
136 11:40:36.558910 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-add-sources
137 11:40:36.559037 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-background-process-start
138 11:40:36.559192 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-background-process-stop
139 11:40:36.559315 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-common-functions
140 11:40:36.559434 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-echo-ipv4
141 11:40:36.559557 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-install-packages
142 11:40:36.559675 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-installed-packages
143 11:40:36.559791 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-os-build
144 11:40:36.559909 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-probe-channel
145 11:40:36.560026 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-probe-ip
146 11:40:36.560143 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-target-ip
147 11:40:36.560261 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-target-mac
148 11:40:36.560552 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-target-storage
149 11:40:36.560678 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-test-case
150 11:40:36.560800 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-test-event
151 11:40:36.560918 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-test-feedback
152 11:40:36.561037 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-test-raise
153 11:40:36.561155 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-test-reference
154 11:40:36.561274 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-test-runner
155 11:40:36.561392 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-test-set
156 11:40:36.561510 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-test-shell
157 11:40:36.561629 Updating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-install-packages (oe)
158 11:40:36.561752 Updating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/bin/lava-installed-packages (oe)
159 11:40:36.561857 Creating /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/environment
160 11:40:36.561949 LAVA metadata
161 11:40:36.562024 - LAVA_JOB_ID=9849696
162 11:40:36.562093 - LAVA_DISPATCHER_IP=192.168.201.1
163 11:40:36.562194 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
164 11:40:36.562266 skipped lava-vland-overlay
165 11:40:36.562409 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 11:40:36.562495 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
167 11:40:36.562562 skipped lava-multinode-overlay
168 11:40:36.562641 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 11:40:36.562725 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
170 11:40:36.562805 Loading test definitions
171 11:40:36.562900 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
172 11:40:36.562979 Using /lava-9849696 at stage 0
173 11:40:36.563250 uuid=9849696_1.5.2.3.1 testdef=None
174 11:40:36.563346 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 11:40:36.563437 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
176 11:40:36.563944 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 11:40:36.564191 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
179 11:40:36.564868 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 11:40:36.565118 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
182 11:40:36.565691 runner path: /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/0/tests/0_dmesg test_uuid 9849696_1.5.2.3.1
183 11:40:36.565846 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 11:40:36.566089 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
186 11:40:36.566166 Using /lava-9849696 at stage 1
187 11:40:36.566504 uuid=9849696_1.5.2.3.5 testdef=None
188 11:40:36.566598 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 11:40:36.566689 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
190 11:40:36.567151 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 11:40:36.567386 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
193 11:40:36.567982 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 11:40:36.568231 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
196 11:40:36.568881 runner path: /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/1/tests/1_bootrr test_uuid 9849696_1.5.2.3.5
197 11:40:36.569030 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 11:40:36.569252 Creating lava-test-runner.conf files
200 11:40:36.569321 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/0 for stage 0
201 11:40:36.569408 - 0_dmesg
202 11:40:36.569486 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9849696/lava-overlay-s_r1jrt1/lava-9849696/1 for stage 1
203 11:40:36.569574 - 1_bootrr
204 11:40:36.569670 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 11:40:36.569760 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
206 11:40:36.577617 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 11:40:36.577727 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
208 11:40:36.577820 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 11:40:36.577911 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 11:40:36.578003 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
211 11:40:36.701328 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 11:40:36.701720 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 11:40:36.701840 extracting modules file /var/lib/lava/dispatcher/tmp/9849696/tftp-deploy-l116ez8b/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9849696/extract-nfsrootfs-9d6hqosl
214 11:40:36.709704 extracting modules file /var/lib/lava/dispatcher/tmp/9849696/tftp-deploy-l116ez8b/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9849696/extract-overlay-ramdisk-0ia2qak8/ramdisk
215 11:40:36.717028 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 11:40:36.717145 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 11:40:36.717241 [common] Applying overlay to NFS
218 11:40:36.717317 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9849696/compress-overlay-kuw8730i/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9849696/extract-nfsrootfs-9d6hqosl
219 11:40:36.723465 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 11:40:36.723585 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 11:40:36.723683 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 11:40:36.723781 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 11:40:36.723866 Building ramdisk /var/lib/lava/dispatcher/tmp/9849696/extract-overlay-ramdisk-0ia2qak8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9849696/extract-overlay-ramdisk-0ia2qak8/ramdisk
224 11:40:36.774959 >> 26158 blocks
225 11:40:37.353348 rename /var/lib/lava/dispatcher/tmp/9849696/extract-overlay-ramdisk-0ia2qak8/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9849696/tftp-deploy-l116ez8b/ramdisk/ramdisk.cpio.gz
226 11:40:37.353813 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 11:40:37.353939 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
228 11:40:37.354049 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
229 11:40:37.354147 No mkimage arch provided, not using FIT.
230 11:40:37.354243 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 11:40:37.354336 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 11:40:37.354446 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
233 11:40:37.354547 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
234 11:40:37.354636 No LXC device requested
235 11:40:37.354723 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 11:40:37.354818 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
237 11:40:37.354908 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 11:40:37.354988 Checking files for TFTP limit of 4294967296 bytes.
239 11:40:37.355420 end: 1 tftp-deploy (duration 00:00:10) [common]
240 11:40:37.355529 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 11:40:37.355625 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 11:40:37.355754 substitutions:
243 11:40:37.355824 - {DTB}: None
244 11:40:37.355890 - {INITRD}: 9849696/tftp-deploy-l116ez8b/ramdisk/ramdisk.cpio.gz
245 11:40:37.355954 - {KERNEL}: 9849696/tftp-deploy-l116ez8b/kernel/bzImage
246 11:40:37.356015 - {LAVA_MAC}: None
247 11:40:37.356074 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9849696/extract-nfsrootfs-9d6hqosl
248 11:40:37.356134 - {NFS_SERVER_IP}: 192.168.201.1
249 11:40:37.356192 - {PRESEED_CONFIG}: None
250 11:40:37.356250 - {PRESEED_LOCAL}: None
251 11:40:37.356308 - {RAMDISK}: 9849696/tftp-deploy-l116ez8b/ramdisk/ramdisk.cpio.gz
252 11:40:37.356366 - {ROOT_PART}: None
253 11:40:37.356465 - {ROOT}: None
254 11:40:37.356523 - {SERVER_IP}: 192.168.201.1
255 11:40:37.356579 - {TEE}: None
256 11:40:37.356636 Parsed boot commands:
257 11:40:37.356692 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 11:40:37.356860 Parsed boot commands: tftpboot 192.168.201.1 9849696/tftp-deploy-l116ez8b/kernel/bzImage 9849696/tftp-deploy-l116ez8b/kernel/cmdline 9849696/tftp-deploy-l116ez8b/ramdisk/ramdisk.cpio.gz
259 11:40:37.356954 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 11:40:37.357043 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 11:40:37.357139 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 11:40:37.357238 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 11:40:37.357312 Not connected, no need to disconnect.
264 11:40:37.357390 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 11:40:37.357477 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 11:40:37.357545 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-11'
267 11:40:37.361157 Setting prompt string to ['lava-test: # ']
268 11:40:37.361509 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 11:40:37.361624 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 11:40:37.361725 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 11:40:37.361823 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 11:40:37.362020 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=reboot'
273 11:40:42.509993 >> Command sent successfully.
274 11:40:42.520071 Returned 0 in 5 seconds
275 11:40:42.621685 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 11:40:42.623062 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 11:40:42.623561 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 11:40:42.624000 Setting prompt string to 'Starting depthcharge on Voema...'
280 11:40:42.624359 Changing prompt to 'Starting depthcharge on Voema...'
281 11:40:42.624769 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 11:40:42.625905 [Enter `^Ec?' for help]
283 11:40:44.176798
284 11:40:44.176980
285 11:40:44.186795 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 11:40:44.189923 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
287 11:40:44.196614 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 11:40:44.199927 CPU: AES supported, TXT NOT supported, VT supported
289 11:40:44.207084 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 11:40:44.210701 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 11:40:44.217090 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 11:40:44.220815 VBOOT: Loading verstage.
293 11:40:44.224507 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 11:40:44.230463 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 11:40:44.234055 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 11:40:44.243704 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 11:40:44.250408 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 11:40:44.250506
299 11:40:44.250578
300 11:40:44.260791 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 11:40:44.277460 Probing TPM: . done!
302 11:40:44.280709 TPM ready after 0 ms
303 11:40:44.284335 Connected to device vid:did:rid of 1ae0:0028:00
304 11:40:44.295378 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
305 11:40:44.302201 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 11:40:44.305063 Initialized TPM device CR50 revision 0
307 11:40:44.399326 tlcl_send_startup: Startup return code is 0
308 11:40:44.399478 TPM: setup succeeded
309 11:40:44.414764 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 11:40:44.428876 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 11:40:44.441426 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 11:40:44.451564 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 11:40:44.455632 Chrome EC: UHEPI supported
314 11:40:44.458620 Phase 1
315 11:40:44.461996 FMAP: area GBB found @ 1805000 (458752 bytes)
316 11:40:44.472053 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 11:40:44.478775 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 11:40:44.485398 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 11:40:44.492110 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 11:40:44.495326 Recovery requested (1009000e)
321 11:40:44.498613 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 11:40:44.509975 tlcl_extend: response is 0
323 11:40:44.516475 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 11:40:44.526554 tlcl_extend: response is 0
325 11:40:44.533290 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 11:40:44.540005 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 11:40:44.546444 BS: verstage times (exec / console): total (unknown) / 142 ms
328 11:40:44.546537
329 11:40:44.546609
330 11:40:44.560182 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 11:40:44.566257 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 11:40:44.570009 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 11:40:44.572971 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 11:40:44.580307 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 11:40:44.582768 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 11:40:44.586372 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
337 11:40:44.589429 TCO_STS: 0000 0000
338 11:40:44.593016 GEN_PMCON: d0015038 00002200
339 11:40:44.596604 GBLRST_CAUSE: 00000000 00000000
340 11:40:44.599620 HPR_CAUSE0: 00000000
341 11:40:44.599710 prev_sleep_state 5
342 11:40:44.602743 Boot Count incremented to 15782
343 11:40:44.609375 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 11:40:44.616080 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 11:40:44.625702 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 11:40:44.632617 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 11:40:44.635709 Chrome EC: UHEPI supported
348 11:40:44.642355 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 11:40:44.653998 Probing TPM: done!
350 11:40:44.660351 Connected to device vid:did:rid of 1ae0:0028:00
351 11:40:44.670679 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
352 11:40:44.674693 Initialized TPM device CR50 revision 0
353 11:40:44.689054 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 11:40:44.695999 MRC: Hash idx 0x100b comparison successful.
355 11:40:44.696091 MRC cache found, size faa8
356 11:40:44.699833 bootmode is set to: 2
357 11:40:44.703609 SPD index = 2
358 11:40:44.706781 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 11:40:44.710404 SPD: module type is LPDDR4X
360 11:40:44.717023 SPD: module part number is MT53D1G64D4NW-046
361 11:40:44.723487 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
362 11:40:44.726734 SPD: device width 16 bits, bus width 16 bits
363 11:40:44.730358 SPD: module size is 2048 MB (per channel)
364 11:40:45.162075 CBMEM:
365 11:40:45.165104 IMD: root @ 0x76fff000 254 entries.
366 11:40:45.168337 IMD: root @ 0x76ffec00 62 entries.
367 11:40:45.171881 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 11:40:45.178620 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 11:40:45.181844 External stage cache:
370 11:40:45.184892 IMD: root @ 0x7b3ff000 254 entries.
371 11:40:45.188717 IMD: root @ 0x7b3fec00 62 entries.
372 11:40:45.203098 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 11:40:45.209867 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 11:40:45.216756 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 11:40:45.230462 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 11:40:45.237227 cse_lite: Skip switching to RW in the recovery path
377 11:40:45.237319 8 DIMMs found
378 11:40:45.237393 SMM Memory Map
379 11:40:45.243670 SMRAM : 0x7b000000 0x800000
380 11:40:45.246699 Subregion 0: 0x7b000000 0x200000
381 11:40:45.250041 Subregion 1: 0x7b200000 0x200000
382 11:40:45.253270 Subregion 2: 0x7b400000 0x400000
383 11:40:45.253362 top_of_ram = 0x77000000
384 11:40:45.260219 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 11:40:45.266396 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 11:40:45.269700 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 11:40:45.276881 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 11:40:45.283903 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 11:40:45.290807 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 11:40:45.300821 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 11:40:45.303929 Processing 211 relocs. Offset value of 0x74c0b000
392 11:40:45.312739 BS: romstage times (exec / console): total (unknown) / 277 ms
393 11:40:45.318423
394 11:40:45.318514
395 11:40:45.328980 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 11:40:45.331842 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 11:40:45.341613 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 11:40:45.349183 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 11:40:45.354915 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 11:40:45.361577 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 11:40:45.405598 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 11:40:45.412166 Processing 5008 relocs. Offset value of 0x75d98000
403 11:40:45.415480 BS: postcar times (exec / console): total (unknown) / 59 ms
404 11:40:45.418720
405 11:40:45.418814
406 11:40:45.428415 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 11:40:45.428512 Normal boot
408 11:40:45.432153 FW_CONFIG value is 0x804c02
409 11:40:45.434955 PCI: 00:07.0 disabled by fw_config
410 11:40:45.438439 PCI: 00:07.1 disabled by fw_config
411 11:40:45.442023 PCI: 00:0d.2 disabled by fw_config
412 11:40:45.448156 PCI: 00:1c.7 disabled by fw_config
413 11:40:45.451836 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 11:40:45.458484 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 11:40:45.461343 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 11:40:45.468322 GENERIC: 0.0 disabled by fw_config
417 11:40:45.471619 GENERIC: 1.0 disabled by fw_config
418 11:40:45.474805 fw_config match found: DB_USB=USB3_ACTIVE
419 11:40:45.478262 fw_config match found: DB_USB=USB3_ACTIVE
420 11:40:45.481402 fw_config match found: DB_USB=USB3_ACTIVE
421 11:40:45.488088 fw_config match found: DB_USB=USB3_ACTIVE
422 11:40:45.491189 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 11:40:45.498304 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 11:40:45.508020 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 11:40:45.514926 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 11:40:45.518421 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 11:40:45.524715 microcode: Update skipped, already up-to-date
428 11:40:45.531751 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 11:40:45.559091 Detected 4 core, 8 thread CPU.
430 11:40:45.562423 Setting up SMI for CPU
431 11:40:45.565663 IED base = 0x7b400000
432 11:40:45.565756 IED size = 0x00400000
433 11:40:45.569182 Will perform SMM setup.
434 11:40:45.575747 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
435 11:40:45.582152 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 11:40:45.588913 Processing 16 relocs. Offset value of 0x00030000
437 11:40:45.592281 Attempting to start 7 APs
438 11:40:45.595709 Waiting for 10ms after sending INIT.
439 11:40:45.611059 Waiting for 1st SIPI to complete...done.
440 11:40:45.611153 AP: slot 1 apic_id 1.
441 11:40:45.614190 AP: slot 7 apic_id 4.
442 11:40:45.617466 AP: slot 3 apic_id 5.
443 11:40:45.617558 AP: slot 5 apic_id 6.
444 11:40:45.621294 AP: slot 4 apic_id 7.
445 11:40:45.624130 AP: slot 6 apic_id 2.
446 11:40:45.624223 AP: slot 2 apic_id 3.
447 11:40:45.631273 Waiting for 2nd SIPI to complete...done.
448 11:40:45.637400 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 11:40:45.644180 Processing 13 relocs. Offset value of 0x00038000
450 11:40:45.644274 Unable to locate Global NVS
451 11:40:45.654113 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 11:40:45.657244 Installing permanent SMM handler to 0x7b000000
453 11:40:45.667743 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 11:40:45.670870 Processing 794 relocs. Offset value of 0x7b010000
455 11:40:45.680681 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 11:40:45.684247 Processing 13 relocs. Offset value of 0x7b008000
457 11:40:45.690730 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 11:40:45.697086 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 11:40:45.700568 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 11:40:45.707235 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 11:40:45.714178 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 11:40:45.720288 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 11:40:45.727083 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 11:40:45.727177 Unable to locate Global NVS
465 11:40:45.736906 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 11:40:45.740400 Clearing SMI status registers
467 11:40:45.740513 SMI_STS: PM1
468 11:40:45.743389 PM1_STS: PWRBTN
469 11:40:45.750390 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 11:40:45.753787 In relocation handler: CPU 0
471 11:40:45.757084 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 11:40:45.763610 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 11:40:45.763703 Relocation complete.
474 11:40:45.773638 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 11:40:45.773730 In relocation handler: CPU 1
476 11:40:45.780123 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 11:40:45.780216 Relocation complete.
478 11:40:45.789768 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
479 11:40:45.789860 In relocation handler: CPU 6
480 11:40:45.796340 New SMBASE=0x7affe800 IEDBASE=0x7b400000
481 11:40:45.800015 Writing SMRR. base = 0x7b000006, mask=0xff800c00
482 11:40:45.803328 Relocation complete.
483 11:40:45.809648 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
484 11:40:45.813219 In relocation handler: CPU 2
485 11:40:45.816645 New SMBASE=0x7afff800 IEDBASE=0x7b400000
486 11:40:45.819588 Relocation complete.
487 11:40:45.826245 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
488 11:40:45.829859 In relocation handler: CPU 3
489 11:40:45.833552 New SMBASE=0x7afff400 IEDBASE=0x7b400000
490 11:40:45.836401 Relocation complete.
491 11:40:45.843208 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
492 11:40:45.846252 In relocation handler: CPU 7
493 11:40:45.849531 New SMBASE=0x7affe400 IEDBASE=0x7b400000
494 11:40:45.856619 Writing SMRR. base = 0x7b000006, mask=0xff800c00
495 11:40:45.856712 Relocation complete.
496 11:40:45.862704 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
497 11:40:45.866482 In relocation handler: CPU 4
498 11:40:45.872624 New SMBASE=0x7afff000 IEDBASE=0x7b400000
499 11:40:45.872716 Relocation complete.
500 11:40:45.879296 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
501 11:40:45.882830 In relocation handler: CPU 5
502 11:40:45.886084 New SMBASE=0x7affec00 IEDBASE=0x7b400000
503 11:40:45.892594 Writing SMRR. base = 0x7b000006, mask=0xff800c00
504 11:40:45.896078 Relocation complete.
505 11:40:45.896169 Initializing CPU #0
506 11:40:45.899455 CPU: vendor Intel device 806c1
507 11:40:45.902670 CPU: family 06, model 8c, stepping 01
508 11:40:45.905869 Clearing out pending MCEs
509 11:40:45.909144 Setting up local APIC...
510 11:40:45.912511 apic_id: 0x00 done.
511 11:40:45.916257 Turbo is available but hidden
512 11:40:45.919288 Turbo is available and visible
513 11:40:45.922363 microcode: Update skipped, already up-to-date
514 11:40:45.925936 CPU #0 initialized
515 11:40:45.926028 Initializing CPU #7
516 11:40:45.929052 Initializing CPU #3
517 11:40:45.932621 CPU: vendor Intel device 806c1
518 11:40:45.935559 CPU: family 06, model 8c, stepping 01
519 11:40:45.939063 CPU: vendor Intel device 806c1
520 11:40:45.942589 CPU: family 06, model 8c, stepping 01
521 11:40:45.946226 Initializing CPU #5
522 11:40:45.946318 Initializing CPU #4
523 11:40:45.949687 CPU: vendor Intel device 806c1
524 11:40:45.953398 CPU: family 06, model 8c, stepping 01
525 11:40:45.956769 Initializing CPU #6
526 11:40:45.956863 Initializing CPU #2
527 11:40:45.959814 CPU: vendor Intel device 806c1
528 11:40:45.963302 CPU: family 06, model 8c, stepping 01
529 11:40:45.966396 CPU: vendor Intel device 806c1
530 11:40:45.970126 CPU: family 06, model 8c, stepping 01
531 11:40:45.973003 Clearing out pending MCEs
532 11:40:45.976382 Clearing out pending MCEs
533 11:40:45.979823 Setting up local APIC...
534 11:40:45.982989 Clearing out pending MCEs
535 11:40:45.983083 Clearing out pending MCEs
536 11:40:45.986300 Setting up local APIC...
537 11:40:45.989810 apic_id: 0x02 done.
538 11:40:45.989904 apic_id: 0x05 done.
539 11:40:45.992943 CPU: vendor Intel device 806c1
540 11:40:45.999821 CPU: family 06, model 8c, stepping 01
541 11:40:45.999914 Clearing out pending MCEs
542 11:40:46.002845 Clearing out pending MCEs
543 11:40:46.006737 Setting up local APIC...
544 11:40:46.009707 Setting up local APIC...
545 11:40:46.009801 Setting up local APIC...
546 11:40:46.012696 apic_id: 0x04 done.
547 11:40:46.016218 microcode: Update skipped, already up-to-date
548 11:40:46.022875 microcode: Update skipped, already up-to-date
549 11:40:46.022969 CPU #3 initialized
550 11:40:46.026482 CPU #7 initialized
551 11:40:46.029321 apic_id: 0x06 done.
552 11:40:46.029414 Setting up local APIC...
553 11:40:46.032848 apic_id: 0x03 done.
554 11:40:46.036397 microcode: Update skipped, already up-to-date
555 11:40:46.042792 microcode: Update skipped, already up-to-date
556 11:40:46.042886 CPU #6 initialized
557 11:40:46.046177 CPU #2 initialized
558 11:40:46.049433 microcode: Update skipped, already up-to-date
559 11:40:46.052588 apic_id: 0x07 done.
560 11:40:46.055954 CPU #5 initialized
561 11:40:46.060161 microcode: Update skipped, already up-to-date
562 11:40:46.062627 Initializing CPU #1
563 11:40:46.062722 CPU #4 initialized
564 11:40:46.066473 CPU: vendor Intel device 806c1
565 11:40:46.069623 CPU: family 06, model 8c, stepping 01
566 11:40:46.072707 Clearing out pending MCEs
567 11:40:46.075894 Setting up local APIC...
568 11:40:46.079342 apic_id: 0x01 done.
569 11:40:46.082517 microcode: Update skipped, already up-to-date
570 11:40:46.085682 CPU #1 initialized
571 11:40:46.089559 bsp_do_flight_plan done after 454 msecs.
572 11:40:46.092832 CPU: frequency set to 4400 MHz
573 11:40:46.092927 Enabling SMIs.
574 11:40:46.098915 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
575 11:40:46.116265 SATAXPCIE1 indicates PCIe NVMe is present
576 11:40:46.119390 Probing TPM: done!
577 11:40:46.122698 Connected to device vid:did:rid of 1ae0:0028:00
578 11:40:46.132984 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
579 11:40:46.136319 Initialized TPM device CR50 revision 0
580 11:40:46.139887 Enabling S0i3.4
581 11:40:46.146335 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 11:40:46.149588 Found a VBT of 8704 bytes after decompression
583 11:40:46.156452 cse_lite: CSE RO boot. HybridStorageMode disabled
584 11:40:46.162763 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 11:40:46.238289 FSPS returned 0
586 11:40:46.241557 Executing Phase 1 of FspMultiPhaseSiInit
587 11:40:46.251947 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 11:40:46.255244 port C0 DISC req: usage 1 usb3 1 usb2 5
589 11:40:46.258237 Raw Buffer output 0 00000511
590 11:40:46.261605 Raw Buffer output 1 00000000
591 11:40:46.265662 pmc_send_ipc_cmd succeeded
592 11:40:46.272074 port C1 DISC req: usage 1 usb3 2 usb2 3
593 11:40:46.272165 Raw Buffer output 0 00000321
594 11:40:46.275736 Raw Buffer output 1 00000000
595 11:40:46.279589 pmc_send_ipc_cmd succeeded
596 11:40:46.284552 Detected 4 core, 8 thread CPU.
597 11:40:46.287684 Detected 4 core, 8 thread CPU.
598 11:40:46.487953 Display FSP Version Info HOB
599 11:40:46.491341 Reference Code - CPU = a.0.4c.31
600 11:40:46.494529 uCode Version = 0.0.0.86
601 11:40:46.497716 TXT ACM version = ff.ff.ff.ffff
602 11:40:46.501288 Reference Code - ME = a.0.4c.31
603 11:40:46.504684 MEBx version = 0.0.0.0
604 11:40:46.508295 ME Firmware Version = Consumer SKU
605 11:40:46.511390 Reference Code - PCH = a.0.4c.31
606 11:40:46.515010 PCH-CRID Status = Disabled
607 11:40:46.518050 PCH-CRID Original Value = ff.ff.ff.ffff
608 11:40:46.521205 PCH-CRID New Value = ff.ff.ff.ffff
609 11:40:46.525176 OPROM - RST - RAID = ff.ff.ff.ffff
610 11:40:46.528895 PCH Hsio Version = 4.0.0.0
611 11:40:46.532832 Reference Code - SA - System Agent = a.0.4c.31
612 11:40:46.535965 Reference Code - MRC = 2.0.0.1
613 11:40:46.538969 SA - PCIe Version = a.0.4c.31
614 11:40:46.539060 SA-CRID Status = Disabled
615 11:40:46.542211 SA-CRID Original Value = 0.0.0.1
616 11:40:46.545753 SA-CRID New Value = 0.0.0.1
617 11:40:46.549074 OPROM - VBIOS = ff.ff.ff.ffff
618 11:40:46.555751 IO Manageability Engine FW Version = 11.1.4.0
619 11:40:46.558844 PHY Build Version = 0.0.0.e0
620 11:40:46.562285 Thunderbolt(TM) FW Version = 0.0.0.0
621 11:40:46.565437 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
622 11:40:46.569195 ITSS IRQ Polarities Before:
623 11:40:46.572909 IPC0: 0xffffffff
624 11:40:46.573002 IPC1: 0xffffffff
625 11:40:46.575926 IPC2: 0xffffffff
626 11:40:46.576019 IPC3: 0xffffffff
627 11:40:46.578897 ITSS IRQ Polarities After:
628 11:40:46.582326 IPC0: 0xffffffff
629 11:40:46.582419 IPC1: 0xffffffff
630 11:40:46.585371 IPC2: 0xffffffff
631 11:40:46.585464 IPC3: 0xffffffff
632 11:40:46.592724 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 11:40:46.602326 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 11:40:46.615394 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 11:40:46.625466 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 11:40:46.632651 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
637 11:40:46.635291 Enumerating buses...
638 11:40:46.638646 Show all devs... Before device enumeration.
639 11:40:46.642014 Root Device: enabled 1
640 11:40:46.645489 DOMAIN: 0000: enabled 1
641 11:40:46.648783 CPU_CLUSTER: 0: enabled 1
642 11:40:46.648878 PCI: 00:00.0: enabled 1
643 11:40:46.652134 PCI: 00:02.0: enabled 1
644 11:40:46.655123 PCI: 00:04.0: enabled 1
645 11:40:46.658839 PCI: 00:05.0: enabled 1
646 11:40:46.658933 PCI: 00:06.0: enabled 0
647 11:40:46.661876 PCI: 00:07.0: enabled 0
648 11:40:46.665116 PCI: 00:07.1: enabled 0
649 11:40:46.665209 PCI: 00:07.2: enabled 0
650 11:40:46.668962 PCI: 00:07.3: enabled 0
651 11:40:46.671936 PCI: 00:08.0: enabled 1
652 11:40:46.675125 PCI: 00:09.0: enabled 0
653 11:40:46.675218 PCI: 00:0a.0: enabled 0
654 11:40:46.678580 PCI: 00:0d.0: enabled 1
655 11:40:46.682012 PCI: 00:0d.1: enabled 0
656 11:40:46.685687 PCI: 00:0d.2: enabled 0
657 11:40:46.685780 PCI: 00:0d.3: enabled 0
658 11:40:46.688550 PCI: 00:0e.0: enabled 0
659 11:40:46.691892 PCI: 00:10.2: enabled 1
660 11:40:46.695604 PCI: 00:10.6: enabled 0
661 11:40:46.695697 PCI: 00:10.7: enabled 0
662 11:40:46.698562 PCI: 00:12.0: enabled 0
663 11:40:46.702123 PCI: 00:12.6: enabled 0
664 11:40:46.705428 PCI: 00:13.0: enabled 0
665 11:40:46.705520 PCI: 00:14.0: enabled 1
666 11:40:46.708386 PCI: 00:14.1: enabled 0
667 11:40:46.711968 PCI: 00:14.2: enabled 1
668 11:40:46.712060 PCI: 00:14.3: enabled 1
669 11:40:46.715188 PCI: 00:15.0: enabled 1
670 11:40:46.718397 PCI: 00:15.1: enabled 1
671 11:40:46.721889 PCI: 00:15.2: enabled 1
672 11:40:46.721983 PCI: 00:15.3: enabled 1
673 11:40:46.725450 PCI: 00:16.0: enabled 1
674 11:40:46.728655 PCI: 00:16.1: enabled 0
675 11:40:46.732138 PCI: 00:16.2: enabled 0
676 11:40:46.732231 PCI: 00:16.3: enabled 0
677 11:40:46.735050 PCI: 00:16.4: enabled 0
678 11:40:46.738151 PCI: 00:16.5: enabled 0
679 11:40:46.742097 PCI: 00:17.0: enabled 1
680 11:40:46.742190 PCI: 00:19.0: enabled 0
681 11:40:46.745386 PCI: 00:19.1: enabled 1
682 11:40:46.748143 PCI: 00:19.2: enabled 0
683 11:40:46.748236 PCI: 00:1c.0: enabled 1
684 11:40:46.751472 PCI: 00:1c.1: enabled 0
685 11:40:46.754863 PCI: 00:1c.2: enabled 0
686 11:40:46.758144 PCI: 00:1c.3: enabled 0
687 11:40:46.758235 PCI: 00:1c.4: enabled 0
688 11:40:46.761631 PCI: 00:1c.5: enabled 0
689 11:40:46.765058 PCI: 00:1c.6: enabled 1
690 11:40:46.768565 PCI: 00:1c.7: enabled 0
691 11:40:46.768656 PCI: 00:1d.0: enabled 1
692 11:40:46.771606 PCI: 00:1d.1: enabled 0
693 11:40:46.774963 PCI: 00:1d.2: enabled 1
694 11:40:46.778193 PCI: 00:1d.3: enabled 0
695 11:40:46.778283 PCI: 00:1e.0: enabled 1
696 11:40:46.781324 PCI: 00:1e.1: enabled 0
697 11:40:46.784727 PCI: 00:1e.2: enabled 1
698 11:40:46.787881 PCI: 00:1e.3: enabled 1
699 11:40:46.787971 PCI: 00:1f.0: enabled 1
700 11:40:46.791263 PCI: 00:1f.1: enabled 0
701 11:40:46.794804 PCI: 00:1f.2: enabled 1
702 11:40:46.794895 PCI: 00:1f.3: enabled 1
703 11:40:46.797981 PCI: 00:1f.4: enabled 0
704 11:40:46.801443 PCI: 00:1f.5: enabled 1
705 11:40:46.804718 PCI: 00:1f.6: enabled 0
706 11:40:46.804808 PCI: 00:1f.7: enabled 0
707 11:40:46.808229 APIC: 00: enabled 1
708 11:40:46.811180 GENERIC: 0.0: enabled 1
709 11:40:46.814630 GENERIC: 0.0: enabled 1
710 11:40:46.814720 GENERIC: 1.0: enabled 1
711 11:40:46.817927 GENERIC: 0.0: enabled 1
712 11:40:46.821590 GENERIC: 1.0: enabled 1
713 11:40:46.821680 USB0 port 0: enabled 1
714 11:40:46.824683 GENERIC: 0.0: enabled 1
715 11:40:46.827830 USB0 port 0: enabled 1
716 11:40:46.831348 GENERIC: 0.0: enabled 1
717 11:40:46.831439 I2C: 00:1a: enabled 1
718 11:40:46.834442 I2C: 00:31: enabled 1
719 11:40:46.837666 I2C: 00:32: enabled 1
720 11:40:46.837756 I2C: 00:10: enabled 1
721 11:40:46.841941 I2C: 00:15: enabled 1
722 11:40:46.844341 GENERIC: 0.0: enabled 0
723 11:40:46.844455 GENERIC: 1.0: enabled 0
724 11:40:46.847665 GENERIC: 0.0: enabled 1
725 11:40:46.851020 SPI: 00: enabled 1
726 11:40:46.851111 SPI: 00: enabled 1
727 11:40:46.854791 PNP: 0c09.0: enabled 1
728 11:40:46.857582 GENERIC: 0.0: enabled 1
729 11:40:46.861151 USB3 port 0: enabled 1
730 11:40:46.861245 USB3 port 1: enabled 1
731 11:40:46.864293 USB3 port 2: enabled 0
732 11:40:46.867916 USB3 port 3: enabled 0
733 11:40:46.868008 USB2 port 0: enabled 0
734 11:40:46.871123 USB2 port 1: enabled 1
735 11:40:46.874260 USB2 port 2: enabled 1
736 11:40:46.874353 USB2 port 3: enabled 0
737 11:40:46.877616 USB2 port 4: enabled 1
738 11:40:46.881270 USB2 port 5: enabled 0
739 11:40:46.884361 USB2 port 6: enabled 0
740 11:40:46.884460 USB2 port 7: enabled 0
741 11:40:46.887875 USB2 port 8: enabled 0
742 11:40:46.890812 USB2 port 9: enabled 0
743 11:40:46.890904 USB3 port 0: enabled 0
744 11:40:46.894574 USB3 port 1: enabled 1
745 11:40:46.897513 USB3 port 2: enabled 0
746 11:40:46.901274 USB3 port 3: enabled 0
747 11:40:46.901367 GENERIC: 0.0: enabled 1
748 11:40:46.904608 GENERIC: 1.0: enabled 1
749 11:40:46.907408 APIC: 01: enabled 1
750 11:40:46.907500 APIC: 03: enabled 1
751 11:40:46.910879 APIC: 05: enabled 1
752 11:40:46.910971 APIC: 07: enabled 1
753 11:40:46.914044 APIC: 06: enabled 1
754 11:40:46.917582 APIC: 02: enabled 1
755 11:40:46.917675 APIC: 04: enabled 1
756 11:40:46.921158 Compare with tree...
757 11:40:46.924288 Root Device: enabled 1
758 11:40:46.924380 DOMAIN: 0000: enabled 1
759 11:40:46.927369 PCI: 00:00.0: enabled 1
760 11:40:46.930847 PCI: 00:02.0: enabled 1
761 11:40:46.934045 PCI: 00:04.0: enabled 1
762 11:40:46.937318 GENERIC: 0.0: enabled 1
763 11:40:46.937410 PCI: 00:05.0: enabled 1
764 11:40:46.940583 PCI: 00:06.0: enabled 0
765 11:40:46.944020 PCI: 00:07.0: enabled 0
766 11:40:46.947324 GENERIC: 0.0: enabled 1
767 11:40:46.950656 PCI: 00:07.1: enabled 0
768 11:40:46.950749 GENERIC: 1.0: enabled 1
769 11:40:46.954140 PCI: 00:07.2: enabled 0
770 11:40:46.957497 GENERIC: 0.0: enabled 1
771 11:40:46.960965 PCI: 00:07.3: enabled 0
772 11:40:46.964172 GENERIC: 1.0: enabled 1
773 11:40:46.964265 PCI: 00:08.0: enabled 1
774 11:40:46.967565 PCI: 00:09.0: enabled 0
775 11:40:46.970485 PCI: 00:0a.0: enabled 0
776 11:40:46.973794 PCI: 00:0d.0: enabled 1
777 11:40:46.977275 USB0 port 0: enabled 1
778 11:40:46.977368 USB3 port 0: enabled 1
779 11:40:46.980640 USB3 port 1: enabled 1
780 11:40:46.983909 USB3 port 2: enabled 0
781 11:40:46.986982 USB3 port 3: enabled 0
782 11:40:46.990618 PCI: 00:0d.1: enabled 0
783 11:40:46.993648 PCI: 00:0d.2: enabled 0
784 11:40:46.993740 GENERIC: 0.0: enabled 1
785 11:40:46.997003 PCI: 00:0d.3: enabled 0
786 11:40:47.000486 PCI: 00:0e.0: enabled 0
787 11:40:47.003710 PCI: 00:10.2: enabled 1
788 11:40:47.007302 PCI: 00:10.6: enabled 0
789 11:40:47.007395 PCI: 00:10.7: enabled 0
790 11:40:47.010461 PCI: 00:12.0: enabled 0
791 11:40:47.013825 PCI: 00:12.6: enabled 0
792 11:40:47.017057 PCI: 00:13.0: enabled 0
793 11:40:47.020537 PCI: 00:14.0: enabled 1
794 11:40:47.020630 USB0 port 0: enabled 1
795 11:40:47.023813 USB2 port 0: enabled 0
796 11:40:47.027024 USB2 port 1: enabled 1
797 11:40:47.030572 USB2 port 2: enabled 1
798 11:40:47.033927 USB2 port 3: enabled 0
799 11:40:47.034020 USB2 port 4: enabled 1
800 11:40:47.037071 USB2 port 5: enabled 0
801 11:40:47.040161 USB2 port 6: enabled 0
802 11:40:47.043512 USB2 port 7: enabled 0
803 11:40:47.047313 USB2 port 8: enabled 0
804 11:40:47.050019 USB2 port 9: enabled 0
805 11:40:47.050114 USB3 port 0: enabled 0
806 11:40:47.053421 USB3 port 1: enabled 1
807 11:40:47.057041 USB3 port 2: enabled 0
808 11:40:47.060031 USB3 port 3: enabled 0
809 11:40:47.063275 PCI: 00:14.1: enabled 0
810 11:40:47.063367 PCI: 00:14.2: enabled 1
811 11:40:47.066794 PCI: 00:14.3: enabled 1
812 11:40:47.070785 GENERIC: 0.0: enabled 1
813 11:40:47.073144 PCI: 00:15.0: enabled 1
814 11:40:47.077004 I2C: 00:1a: enabled 1
815 11:40:47.077096 I2C: 00:31: enabled 1
816 11:40:47.080220 I2C: 00:32: enabled 1
817 11:40:47.083159 PCI: 00:15.1: enabled 1
818 11:40:47.086506 I2C: 00:10: enabled 1
819 11:40:47.089779 PCI: 00:15.2: enabled 1
820 11:40:47.089870 PCI: 00:15.3: enabled 1
821 11:40:47.093297 PCI: 00:16.0: enabled 1
822 11:40:47.096607 PCI: 00:16.1: enabled 0
823 11:40:47.099863 PCI: 00:16.2: enabled 0
824 11:40:47.103254 PCI: 00:16.3: enabled 0
825 11:40:47.103346 PCI: 00:16.4: enabled 0
826 11:40:47.106636 PCI: 00:16.5: enabled 0
827 11:40:47.109844 PCI: 00:17.0: enabled 1
828 11:40:47.113478 PCI: 00:19.0: enabled 0
829 11:40:47.113644 PCI: 00:19.1: enabled 1
830 11:40:47.116610 I2C: 00:15: enabled 1
831 11:40:47.120094 PCI: 00:19.2: enabled 0
832 11:40:47.123584 PCI: 00:1d.0: enabled 1
833 11:40:47.126236 GENERIC: 0.0: enabled 1
834 11:40:47.126327 PCI: 00:1e.0: enabled 1
835 11:40:47.129643 PCI: 00:1e.1: enabled 0
836 11:40:47.133510 PCI: 00:1e.2: enabled 1
837 11:40:47.136390 SPI: 00: enabled 1
838 11:40:47.139711 PCI: 00:1e.3: enabled 1
839 11:40:47.139802 SPI: 00: enabled 1
840 11:40:47.143008 PCI: 00:1f.0: enabled 1
841 11:40:47.194014 PNP: 0c09.0: enabled 1
842 11:40:47.194118 PCI: 00:1f.1: enabled 0
843 11:40:47.194375 PCI: 00:1f.2: enabled 1
844 11:40:47.194451 GENERIC: 0.0: enabled 1
845 11:40:47.194543 GENERIC: 0.0: enabled 1
846 11:40:47.194625 GENERIC: 1.0: enabled 1
847 11:40:47.194694 PCI: 00:1f.3: enabled 1
848 11:40:47.195091 PCI: 00:1f.4: enabled 0
849 11:40:47.195185 PCI: 00:1f.5: enabled 1
850 11:40:47.195522 PCI: 00:1f.6: enabled 0
851 11:40:47.195626 PCI: 00:1f.7: enabled 0
852 11:40:47.195702 CPU_CLUSTER: 0: enabled 1
853 11:40:47.195784 APIC: 00: enabled 1
854 11:40:47.195886 APIC: 01: enabled 1
855 11:40:47.195958 APIC: 03: enabled 1
856 11:40:47.196037 APIC: 05: enabled 1
857 11:40:47.196105 APIC: 07: enabled 1
858 11:40:47.196169 APIC: 06: enabled 1
859 11:40:47.196233 APIC: 02: enabled 1
860 11:40:47.196295 APIC: 04: enabled 1
861 11:40:47.244736 Root Device scanning...
862 11:40:47.244835 scan_static_bus for Root Device
863 11:40:47.245281 DOMAIN: 0000 enabled
864 11:40:47.245375 CPU_CLUSTER: 0 enabled
865 11:40:47.245449 DOMAIN: 0000 scanning...
866 11:40:47.246071 PCI: pci_scan_bus for bus 00
867 11:40:47.246165 PCI: 00:00.0 [8086/0000] ops
868 11:40:47.246431 PCI: 00:00.0 [8086/9a12] enabled
869 11:40:47.246513 PCI: 00:02.0 [8086/0000] bus ops
870 11:40:47.246595 PCI: 00:02.0 [8086/9a40] enabled
871 11:40:47.246685 PCI: 00:04.0 [8086/0000] bus ops
872 11:40:47.246767 PCI: 00:04.0 [8086/9a03] enabled
873 11:40:47.246835 PCI: 00:05.0 [8086/9a19] enabled
874 11:40:47.247167 PCI: 00:07.0 [0000/0000] hidden
875 11:40:47.247261 PCI: 00:08.0 [8086/9a11] enabled
876 11:40:47.247527 PCI: 00:0a.0 [8086/9a0d] disabled
877 11:40:47.291394 PCI: 00:0d.0 [8086/0000] bus ops
878 11:40:47.291504 PCI: 00:0d.0 [8086/9a13] enabled
879 11:40:47.291803 PCI: 00:14.0 [8086/0000] bus ops
880 11:40:47.291897 PCI: 00:14.0 [8086/a0ed] enabled
881 11:40:47.291984 PCI: 00:14.2 [8086/a0ef] enabled
882 11:40:47.292057 PCI: 00:14.3 [8086/0000] bus ops
883 11:40:47.292135 PCI: 00:14.3 [8086/a0f0] enabled
884 11:40:47.292203 PCI: 00:15.0 [8086/0000] bus ops
885 11:40:47.292485 PCI: 00:15.0 [8086/a0e8] enabled
886 11:40:47.292560 PCI: 00:15.1 [8086/0000] bus ops
887 11:40:47.292807 PCI: 00:15.1 [8086/a0e9] enabled
888 11:40:47.292876 PCI: 00:15.2 [8086/0000] bus ops
889 11:40:47.293121 PCI: 00:15.2 [8086/a0ea] enabled
890 11:40:47.293189 PCI: 00:15.3 [8086/0000] bus ops
891 11:40:47.297041 PCI: 00:15.3 [8086/a0eb] enabled
892 11:40:47.297134 PCI: 00:16.0 [8086/0000] ops
893 11:40:47.300168 PCI: 00:16.0 [8086/a0e0] enabled
894 11:40:47.307117 PCI: Static device PCI: 00:17.0 not found, disabling it.
895 11:40:47.310620 PCI: 00:19.0 [8086/0000] bus ops
896 11:40:47.313797 PCI: 00:19.0 [8086/a0c5] disabled
897 11:40:47.317061 PCI: 00:19.1 [8086/0000] bus ops
898 11:40:47.320184 PCI: 00:19.1 [8086/a0c6] enabled
899 11:40:47.323675 PCI: 00:1d.0 [8086/0000] bus ops
900 11:40:47.327507 PCI: 00:1d.0 [8086/a0b0] enabled
901 11:40:47.329838 PCI: 00:1e.0 [8086/0000] ops
902 11:40:47.333442 PCI: 00:1e.0 [8086/a0a8] enabled
903 11:40:47.337094 PCI: 00:1e.2 [8086/0000] bus ops
904 11:40:47.340119 PCI: 00:1e.2 [8086/a0aa] enabled
905 11:40:47.343506 PCI: 00:1e.3 [8086/0000] bus ops
906 11:40:47.346584 PCI: 00:1e.3 [8086/a0ab] enabled
907 11:40:47.349898 PCI: 00:1f.0 [8086/0000] bus ops
908 11:40:47.353090 PCI: 00:1f.0 [8086/a087] enabled
909 11:40:47.353183 RTC Init
910 11:40:47.356431 Set power on after power failure.
911 11:40:47.359876 Disabling Deep S3
912 11:40:47.359970 Disabling Deep S3
913 11:40:47.363253 Disabling Deep S4
914 11:40:47.363345 Disabling Deep S4
915 11:40:47.366427 Disabling Deep S5
916 11:40:47.366520 Disabling Deep S5
917 11:40:47.369927 PCI: 00:1f.2 [0000/0000] hidden
918 11:40:47.373238 PCI: 00:1f.3 [8086/0000] bus ops
919 11:40:47.376741 PCI: 00:1f.3 [8086/a0c8] enabled
920 11:40:47.379917 PCI: 00:1f.5 [8086/0000] bus ops
921 11:40:47.383215 PCI: 00:1f.5 [8086/a0a4] enabled
922 11:40:47.386669 PCI: Leftover static devices:
923 11:40:47.390402 PCI: 00:10.2
924 11:40:47.390495 PCI: 00:10.6
925 11:40:47.393138 PCI: 00:10.7
926 11:40:47.393230 PCI: 00:06.0
927 11:40:47.393302 PCI: 00:07.1
928 11:40:47.396550 PCI: 00:07.2
929 11:40:47.396642 PCI: 00:07.3
930 11:40:47.400024 PCI: 00:09.0
931 11:40:47.400116 PCI: 00:0d.1
932 11:40:47.400188 PCI: 00:0d.2
933 11:40:47.403107 PCI: 00:0d.3
934 11:40:47.403199 PCI: 00:0e.0
935 11:40:47.406814 PCI: 00:12.0
936 11:40:47.406906 PCI: 00:12.6
937 11:40:47.406978 PCI: 00:13.0
938 11:40:47.409854 PCI: 00:14.1
939 11:40:47.409946 PCI: 00:16.1
940 11:40:47.413144 PCI: 00:16.2
941 11:40:47.413236 PCI: 00:16.3
942 11:40:47.416559 PCI: 00:16.4
943 11:40:47.416651 PCI: 00:16.5
944 11:40:47.416723 PCI: 00:17.0
945 11:40:47.419566 PCI: 00:19.2
946 11:40:47.419657 PCI: 00:1e.1
947 11:40:47.423050 PCI: 00:1f.1
948 11:40:47.423142 PCI: 00:1f.4
949 11:40:47.423215 PCI: 00:1f.6
950 11:40:47.426515 PCI: 00:1f.7
951 11:40:47.429603 PCI: Check your devicetree.cb.
952 11:40:47.432859 PCI: 00:02.0 scanning...
953 11:40:47.436454 scan_generic_bus for PCI: 00:02.0
954 11:40:47.439425 scan_generic_bus for PCI: 00:02.0 done
955 11:40:47.443610 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
956 11:40:47.446172 PCI: 00:04.0 scanning...
957 11:40:47.449566 scan_generic_bus for PCI: 00:04.0
958 11:40:47.453159 GENERIC: 0.0 enabled
959 11:40:47.459728 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
960 11:40:47.462765 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
961 11:40:47.466460 PCI: 00:0d.0 scanning...
962 11:40:47.469343 scan_static_bus for PCI: 00:0d.0
963 11:40:47.469432 USB0 port 0 enabled
964 11:40:47.472668 USB0 port 0 scanning...
965 11:40:47.476305 scan_static_bus for USB0 port 0
966 11:40:47.479158 USB3 port 0 enabled
967 11:40:47.479246 USB3 port 1 enabled
968 11:40:47.482878 USB3 port 2 disabled
969 11:40:47.486049 USB3 port 3 disabled
970 11:40:47.490101 USB3 port 0 scanning...
971 11:40:47.492971 scan_static_bus for USB3 port 0
972 11:40:47.495858 scan_static_bus for USB3 port 0 done
973 11:40:47.499087 scan_bus: bus USB3 port 0 finished in 6 msecs
974 11:40:47.502299 USB3 port 1 scanning...
975 11:40:47.505783 scan_static_bus for USB3 port 1
976 11:40:47.509067 scan_static_bus for USB3 port 1 done
977 11:40:47.512807 scan_bus: bus USB3 port 1 finished in 6 msecs
978 11:40:47.515804 scan_static_bus for USB0 port 0 done
979 11:40:47.522470 scan_bus: bus USB0 port 0 finished in 43 msecs
980 11:40:47.525672 scan_static_bus for PCI: 00:0d.0 done
981 11:40:47.528963 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
982 11:40:47.532345 PCI: 00:14.0 scanning...
983 11:40:47.535990 scan_static_bus for PCI: 00:14.0
984 11:40:47.538801 USB0 port 0 enabled
985 11:40:47.542312 USB0 port 0 scanning...
986 11:40:47.545314 scan_static_bus for USB0 port 0
987 11:40:47.545402 USB2 port 0 disabled
988 11:40:47.548835 USB2 port 1 enabled
989 11:40:47.552113 USB2 port 2 enabled
990 11:40:47.552233 USB2 port 3 disabled
991 11:40:47.555517 USB2 port 4 enabled
992 11:40:47.558895 USB2 port 5 disabled
993 11:40:47.558985 USB2 port 6 disabled
994 11:40:47.562156 USB2 port 7 disabled
995 11:40:47.562246 USB2 port 8 disabled
996 11:40:47.565422 USB2 port 9 disabled
997 11:40:47.568919 USB3 port 0 disabled
998 11:40:47.569009 USB3 port 1 enabled
999 11:40:47.572275 USB3 port 2 disabled
1000 11:40:47.575482 USB3 port 3 disabled
1001 11:40:47.575572 USB2 port 1 scanning...
1002 11:40:47.578649 scan_static_bus for USB2 port 1
1003 11:40:47.585554 scan_static_bus for USB2 port 1 done
1004 11:40:47.589127 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 11:40:47.592247 USB2 port 2 scanning...
1006 11:40:47.595093 scan_static_bus for USB2 port 2
1007 11:40:47.598759 scan_static_bus for USB2 port 2 done
1008 11:40:47.601735 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 11:40:47.605454 USB2 port 4 scanning...
1010 11:40:47.608651 scan_static_bus for USB2 port 4
1011 11:40:47.611839 scan_static_bus for USB2 port 4 done
1012 11:40:47.618584 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 11:40:47.618677 USB3 port 1 scanning...
1014 11:40:47.621666 scan_static_bus for USB3 port 1
1015 11:40:47.625071 scan_static_bus for USB3 port 1 done
1016 11:40:47.631771 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 11:40:47.635831 scan_static_bus for USB0 port 0 done
1018 11:40:47.638382 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 11:40:47.641847 scan_static_bus for PCI: 00:14.0 done
1020 11:40:47.648346 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1021 11:40:47.651961 PCI: 00:14.3 scanning...
1022 11:40:47.654936 scan_static_bus for PCI: 00:14.3
1023 11:40:47.655026 GENERIC: 0.0 enabled
1024 11:40:47.661763 scan_static_bus for PCI: 00:14.3 done
1025 11:40:47.665385 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1026 11:40:47.668725 PCI: 00:15.0 scanning...
1027 11:40:47.671315 scan_static_bus for PCI: 00:15.0
1028 11:40:47.671404 I2C: 00:1a enabled
1029 11:40:47.675215 I2C: 00:31 enabled
1030 11:40:47.678361 I2C: 00:32 enabled
1031 11:40:47.681327 scan_static_bus for PCI: 00:15.0 done
1032 11:40:47.685102 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1033 11:40:47.688134 PCI: 00:15.1 scanning...
1034 11:40:47.691534 scan_static_bus for PCI: 00:15.1
1035 11:40:47.694633 I2C: 00:10 enabled
1036 11:40:47.698268 scan_static_bus for PCI: 00:15.1 done
1037 11:40:47.701455 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1038 11:40:47.704919 PCI: 00:15.2 scanning...
1039 11:40:47.708103 scan_static_bus for PCI: 00:15.2
1040 11:40:47.711624 scan_static_bus for PCI: 00:15.2 done
1041 11:40:47.718124 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1042 11:40:47.718213 PCI: 00:15.3 scanning...
1043 11:40:47.721029 scan_static_bus for PCI: 00:15.3
1044 11:40:47.727803 scan_static_bus for PCI: 00:15.3 done
1045 11:40:47.731195 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1046 11:40:47.734904 PCI: 00:19.1 scanning...
1047 11:40:47.737827 scan_static_bus for PCI: 00:19.1
1048 11:40:47.737916 I2C: 00:15 enabled
1049 11:40:47.744414 scan_static_bus for PCI: 00:19.1 done
1050 11:40:47.747409 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1051 11:40:47.750805 PCI: 00:1d.0 scanning...
1052 11:40:47.754452 do_pci_scan_bridge for PCI: 00:1d.0
1053 11:40:47.757275 PCI: pci_scan_bus for bus 01
1054 11:40:47.760561 PCI: 01:00.0 [15b7/5009] enabled
1055 11:40:47.763861 GENERIC: 0.0 enabled
1056 11:40:47.767572 Enabling Common Clock Configuration
1057 11:40:47.771446 L1 Sub-State supported from root port 29
1058 11:40:47.774895 L1 Sub-State Support = 0x5
1059 11:40:47.774987 CommonModeRestoreTime = 0x28
1060 11:40:47.781602 Power On Value = 0x16, Power On Scale = 0x0
1061 11:40:47.781693 ASPM: Enabled L1
1062 11:40:47.784839 PCIe: Max_Payload_Size adjusted to 128
1063 11:40:47.791600 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1064 11:40:47.794762 PCI: 00:1e.2 scanning...
1065 11:40:47.798005 scan_generic_bus for PCI: 00:1e.2
1066 11:40:47.798097 SPI: 00 enabled
1067 11:40:47.804663 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1068 11:40:47.811646 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1069 11:40:47.811737 PCI: 00:1e.3 scanning...
1070 11:40:47.815319 scan_generic_bus for PCI: 00:1e.3
1071 11:40:47.817900 SPI: 00 enabled
1072 11:40:47.824531 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1073 11:40:47.828230 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1074 11:40:47.831130 PCI: 00:1f.0 scanning...
1075 11:40:47.834576 scan_static_bus for PCI: 00:1f.0
1076 11:40:47.837929 PNP: 0c09.0 enabled
1077 11:40:47.838021 PNP: 0c09.0 scanning...
1078 11:40:47.841312 scan_static_bus for PNP: 0c09.0
1079 11:40:47.848040 scan_static_bus for PNP: 0c09.0 done
1080 11:40:47.851081 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1081 11:40:47.854453 scan_static_bus for PCI: 00:1f.0 done
1082 11:40:47.860885 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1083 11:40:47.860978 PCI: 00:1f.2 scanning...
1084 11:40:47.864319 scan_static_bus for PCI: 00:1f.2
1085 11:40:47.867798 GENERIC: 0.0 enabled
1086 11:40:47.870987 GENERIC: 0.0 scanning...
1087 11:40:47.874215 scan_static_bus for GENERIC: 0.0
1088 11:40:47.877714 GENERIC: 0.0 enabled
1089 11:40:47.877806 GENERIC: 1.0 enabled
1090 11:40:47.881199 scan_static_bus for GENERIC: 0.0 done
1091 11:40:47.887380 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1092 11:40:47.890829 scan_static_bus for PCI: 00:1f.2 done
1093 11:40:47.894378 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1094 11:40:47.897583 PCI: 00:1f.3 scanning...
1095 11:40:47.900741 scan_static_bus for PCI: 00:1f.3
1096 11:40:47.904262 scan_static_bus for PCI: 00:1f.3 done
1097 11:40:47.910902 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1098 11:40:47.913868 PCI: 00:1f.5 scanning...
1099 11:40:47.917292 scan_generic_bus for PCI: 00:1f.5
1100 11:40:47.920558 scan_generic_bus for PCI: 00:1f.5 done
1101 11:40:47.923834 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1102 11:40:47.930812 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1103 11:40:47.933736 scan_static_bus for Root Device done
1104 11:40:47.937329 scan_bus: bus Root Device finished in 736 msecs
1105 11:40:47.940383 done
1106 11:40:47.943817 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1107 11:40:47.946804 Chrome EC: UHEPI supported
1108 11:40:47.954800 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1109 11:40:47.961308 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1110 11:40:47.964609 SPI flash protection: WPSW=0 SRP0=1
1111 11:40:47.971909 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1112 11:40:47.974855 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1113 11:40:47.977990 found VGA at PCI: 00:02.0
1114 11:40:47.981506 Setting up VGA for PCI: 00:02.0
1115 11:40:47.988045 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1116 11:40:47.991538 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1117 11:40:47.994963 Allocating resources...
1118 11:40:47.997732 Reading resources...
1119 11:40:48.001069 Root Device read_resources bus 0 link: 0
1120 11:40:48.004381 DOMAIN: 0000 read_resources bus 0 link: 0
1121 11:40:48.010973 PCI: 00:04.0 read_resources bus 1 link: 0
1122 11:40:48.014278 PCI: 00:04.0 read_resources bus 1 link: 0 done
1123 11:40:48.021156 PCI: 00:0d.0 read_resources bus 0 link: 0
1124 11:40:48.024371 USB0 port 0 read_resources bus 0 link: 0
1125 11:40:48.030908 USB0 port 0 read_resources bus 0 link: 0 done
1126 11:40:48.034158 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1127 11:40:48.040596 PCI: 00:14.0 read_resources bus 0 link: 0
1128 11:40:48.043948 USB0 port 0 read_resources bus 0 link: 0
1129 11:40:48.050724 USB0 port 0 read_resources bus 0 link: 0 done
1130 11:40:48.053942 PCI: 00:14.0 read_resources bus 0 link: 0 done
1131 11:40:48.060432 PCI: 00:14.3 read_resources bus 0 link: 0
1132 11:40:48.063966 PCI: 00:14.3 read_resources bus 0 link: 0 done
1133 11:40:48.067185 PCI: 00:15.0 read_resources bus 0 link: 0
1134 11:40:48.074866 PCI: 00:15.0 read_resources bus 0 link: 0 done
1135 11:40:48.077983 PCI: 00:15.1 read_resources bus 0 link: 0
1136 11:40:48.085211 PCI: 00:15.1 read_resources bus 0 link: 0 done
1137 11:40:48.088138 PCI: 00:19.1 read_resources bus 0 link: 0
1138 11:40:48.094970 PCI: 00:19.1 read_resources bus 0 link: 0 done
1139 11:40:48.098398 PCI: 00:1d.0 read_resources bus 1 link: 0
1140 11:40:48.104760 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1141 11:40:48.108248 PCI: 00:1e.2 read_resources bus 2 link: 0
1142 11:40:48.114909 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1143 11:40:48.118167 PCI: 00:1e.3 read_resources bus 3 link: 0
1144 11:40:48.124918 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1145 11:40:48.127900 PCI: 00:1f.0 read_resources bus 0 link: 0
1146 11:40:48.134599 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1147 11:40:48.137884 PCI: 00:1f.2 read_resources bus 0 link: 0
1148 11:40:48.141274 GENERIC: 0.0 read_resources bus 0 link: 0
1149 11:40:48.148553 GENERIC: 0.0 read_resources bus 0 link: 0 done
1150 11:40:48.151640 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1151 11:40:48.158993 DOMAIN: 0000 read_resources bus 0 link: 0 done
1152 11:40:48.162316 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1153 11:40:48.168967 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1154 11:40:48.172364 Root Device read_resources bus 0 link: 0 done
1155 11:40:48.175522 Done reading resources.
1156 11:40:48.182475 Show resources in subtree (Root Device)...After reading.
1157 11:40:48.185409 Root Device child on link 0 DOMAIN: 0000
1158 11:40:48.189122 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1159 11:40:48.199263 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1160 11:40:48.208851 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1161 11:40:48.212318 PCI: 00:00.0
1162 11:40:48.222401 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1163 11:40:48.229183 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1164 11:40:48.238844 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1165 11:40:48.248752 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1166 11:40:48.259309 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1167 11:40:48.268699 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1168 11:40:48.275483 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1169 11:40:48.285567 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1170 11:40:48.295166 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1171 11:40:48.305313 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1172 11:40:48.315305 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1173 11:40:48.325290 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1174 11:40:48.332310 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1175 11:40:48.341808 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1176 11:40:48.351843 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1177 11:40:48.361503 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1178 11:40:48.371688 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1179 11:40:48.382139 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1180 11:40:48.388026 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1181 11:40:48.398087 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1182 11:40:48.401423 PCI: 00:02.0
1183 11:40:48.411330 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1184 11:40:48.421432 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1185 11:40:48.431436 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1186 11:40:48.435071 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 11:40:48.444515 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1188 11:40:48.448434 GENERIC: 0.0
1189 11:40:48.448960 PCI: 00:05.0
1190 11:40:48.457786 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 11:40:48.464466 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1192 11:40:48.464962 GENERIC: 0.0
1193 11:40:48.467564 PCI: 00:08.0
1194 11:40:48.477878 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 11:40:48.478357 PCI: 00:0a.0
1196 11:40:48.480820 PCI: 00:0d.0 child on link 0 USB0 port 0
1197 11:40:48.491306 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1198 11:40:48.497527 USB0 port 0 child on link 0 USB3 port 0
1199 11:40:48.498001 USB3 port 0
1200 11:40:48.501089 USB3 port 1
1201 11:40:48.501483 USB3 port 2
1202 11:40:48.503999 USB3 port 3
1203 11:40:48.507355 PCI: 00:14.0 child on link 0 USB0 port 0
1204 11:40:48.517539 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 11:40:48.524131 USB0 port 0 child on link 0 USB2 port 0
1206 11:40:48.524641 USB2 port 0
1207 11:40:48.527573 USB2 port 1
1208 11:40:48.528060 USB2 port 2
1209 11:40:48.530628 USB2 port 3
1210 11:40:48.531112 USB2 port 4
1211 11:40:48.533904 USB2 port 5
1212 11:40:48.534296 USB2 port 6
1213 11:40:48.538113 USB2 port 7
1214 11:40:48.538612 USB2 port 8
1215 11:40:48.540896 USB2 port 9
1216 11:40:48.541389 USB3 port 0
1217 11:40:48.544226 USB3 port 1
1218 11:40:48.544761 USB3 port 2
1219 11:40:48.547674 USB3 port 3
1220 11:40:48.548139 PCI: 00:14.2
1221 11:40:48.557343 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 11:40:48.567422 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 11:40:48.574176 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1224 11:40:48.584203 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 11:40:48.584782 GENERIC: 0.0
1226 11:40:48.590792 PCI: 00:15.0 child on link 0 I2C: 00:1a
1227 11:40:48.600240 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 11:40:48.600806 I2C: 00:1a
1229 11:40:48.603871 I2C: 00:31
1230 11:40:48.604359 I2C: 00:32
1231 11:40:48.607073 PCI: 00:15.1 child on link 0 I2C: 00:10
1232 11:40:48.617296 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 11:40:48.620747 I2C: 00:10
1234 11:40:48.621382 PCI: 00:15.2
1235 11:40:48.630620 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 11:40:48.633809 PCI: 00:15.3
1237 11:40:48.643514 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 11:40:48.643996 PCI: 00:16.0
1239 11:40:48.653566 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 11:40:48.656918 PCI: 00:19.0
1241 11:40:48.660094 PCI: 00:19.1 child on link 0 I2C: 00:15
1242 11:40:48.670073 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 11:40:48.673742 I2C: 00:15
1244 11:40:48.676979 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1245 11:40:48.686899 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1246 11:40:48.696728 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1247 11:40:48.703370 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1248 11:40:48.706772 GENERIC: 0.0
1249 11:40:48.707263 PCI: 01:00.0
1250 11:40:48.716739 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 11:40:48.726827 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1252 11:40:48.729827 PCI: 00:1e.0
1253 11:40:48.740208 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1254 11:40:48.743041 PCI: 00:1e.2 child on link 0 SPI: 00
1255 11:40:48.753286 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1256 11:40:48.756086 SPI: 00
1257 11:40:48.759612 PCI: 00:1e.3 child on link 0 SPI: 00
1258 11:40:48.769688 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 11:40:48.770188 SPI: 00
1260 11:40:48.776176 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1261 11:40:48.783101 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1262 11:40:48.786582 PNP: 0c09.0
1263 11:40:48.793288 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1264 11:40:48.799644 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1265 11:40:48.809574 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1266 11:40:48.816146 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1267 11:40:48.822787 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1268 11:40:48.823275 GENERIC: 0.0
1269 11:40:48.826092 GENERIC: 1.0
1270 11:40:48.826481 PCI: 00:1f.3
1271 11:40:48.836135 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1272 11:40:48.849366 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1273 11:40:48.849870 PCI: 00:1f.5
1274 11:40:48.859405 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1275 11:40:48.862378 CPU_CLUSTER: 0 child on link 0 APIC: 00
1276 11:40:48.862984 APIC: 00
1277 11:40:48.865985 APIC: 01
1278 11:40:48.866486 APIC: 03
1279 11:40:48.869574 APIC: 05
1280 11:40:48.870073 APIC: 07
1281 11:40:48.870393 APIC: 06
1282 11:40:48.872506 APIC: 02
1283 11:40:48.872899 APIC: 04
1284 11:40:48.879162 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1285 11:40:48.885872 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1286 11:40:48.892473 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1287 11:40:48.899003 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1288 11:40:48.902184 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1289 11:40:48.905613 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1290 11:40:48.915735 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1291 11:40:48.922607 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1292 11:40:48.929302 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1293 11:40:48.935446 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1294 11:40:48.942252 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1295 11:40:48.948985 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1296 11:40:48.958659 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1297 11:40:48.965337 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1298 11:40:48.968981 DOMAIN: 0000: Resource ranges:
1299 11:40:48.971948 * Base: 1000, Size: 800, Tag: 100
1300 11:40:48.975203 * Base: 1900, Size: e700, Tag: 100
1301 11:40:48.981911 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1302 11:40:48.988979 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1303 11:40:48.995251 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1304 11:40:49.002332 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1305 11:40:49.008564 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1306 11:40:49.018810 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1307 11:40:49.024718 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1308 11:40:49.031846 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1309 11:40:49.041673 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1310 11:40:49.048082 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1311 11:40:49.054907 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1312 11:40:49.064746 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1313 11:40:49.071672 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1314 11:40:49.077827 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1315 11:40:49.088254 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1316 11:40:49.094867 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1317 11:40:49.101389 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1318 11:40:49.111138 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1319 11:40:49.117574 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1320 11:40:49.124588 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1321 11:40:49.134280 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1322 11:40:49.141191 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1323 11:40:49.147502 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1324 11:40:49.157259 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1325 11:40:49.164023 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1326 11:40:49.167498 DOMAIN: 0000: Resource ranges:
1327 11:40:49.171098 * Base: 7fc00000, Size: 40400000, Tag: 200
1328 11:40:49.177557 * Base: d0000000, Size: 28000000, Tag: 200
1329 11:40:49.180911 * Base: fa000000, Size: 1000000, Tag: 200
1330 11:40:49.184220 * Base: fb001000, Size: 2fff000, Tag: 200
1331 11:40:49.188283 * Base: fe010000, Size: 2e000, Tag: 200
1332 11:40:49.193969 * Base: fe03f000, Size: d41000, Tag: 200
1333 11:40:49.197513 * Base: fed88000, Size: 8000, Tag: 200
1334 11:40:49.201357 * Base: fed93000, Size: d000, Tag: 200
1335 11:40:49.204553 * Base: feda2000, Size: 1e000, Tag: 200
1336 11:40:49.210774 * Base: fede0000, Size: 1220000, Tag: 200
1337 11:40:49.214059 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1338 11:40:49.220774 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1339 11:40:49.227228 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1340 11:40:49.234430 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1341 11:40:49.240751 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1342 11:40:49.246907 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1343 11:40:49.253725 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1344 11:40:49.259961 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1345 11:40:49.267099 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1346 11:40:49.273732 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1347 11:40:49.280443 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1348 11:40:49.286887 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1349 11:40:49.293742 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1350 11:40:49.300161 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1351 11:40:49.307013 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1352 11:40:49.313738 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1353 11:40:49.320441 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1354 11:40:49.326898 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1355 11:40:49.333160 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1356 11:40:49.340035 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1357 11:40:49.346773 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1358 11:40:49.353164 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1359 11:40:49.359721 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1360 11:40:49.366354 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1361 11:40:49.376150 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1362 11:40:49.379447 PCI: 00:1d.0: Resource ranges:
1363 11:40:49.383061 * Base: 7fc00000, Size: 100000, Tag: 200
1364 11:40:49.389578 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1365 11:40:49.396093 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1366 11:40:49.406280 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1367 11:40:49.413147 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1368 11:40:49.416458 Root Device assign_resources, bus 0 link: 0
1369 11:40:49.423170 DOMAIN: 0000 assign_resources, bus 0 link: 0
1370 11:40:49.429257 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1371 11:40:49.439088 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1372 11:40:49.445769 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1373 11:40:49.452503 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1374 11:40:49.459039 PCI: 00:04.0 assign_resources, bus 1 link: 0
1375 11:40:49.462592 PCI: 00:04.0 assign_resources, bus 1 link: 0
1376 11:40:49.472042 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1377 11:40:49.479140 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1378 11:40:49.488977 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1379 11:40:49.492105 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1380 11:40:49.498801 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1381 11:40:49.505196 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1382 11:40:49.509073 PCI: 00:14.0 assign_resources, bus 0 link: 0
1383 11:40:49.515229 PCI: 00:14.0 assign_resources, bus 0 link: 0
1384 11:40:49.522239 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1385 11:40:49.531728 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1386 11:40:49.538735 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1387 11:40:49.544888 PCI: 00:14.3 assign_resources, bus 0 link: 0
1388 11:40:49.548552 PCI: 00:14.3 assign_resources, bus 0 link: 0
1389 11:40:49.558482 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1390 11:40:49.561364 PCI: 00:15.0 assign_resources, bus 0 link: 0
1391 11:40:49.564927 PCI: 00:15.0 assign_resources, bus 0 link: 0
1392 11:40:49.575106 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1393 11:40:49.578369 PCI: 00:15.1 assign_resources, bus 0 link: 0
1394 11:40:49.584827 PCI: 00:15.1 assign_resources, bus 0 link: 0
1395 11:40:49.591620 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1396 11:40:49.601388 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1397 11:40:49.607712 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1398 11:40:49.618151 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1399 11:40:49.621511 PCI: 00:19.1 assign_resources, bus 0 link: 0
1400 11:40:49.624493 PCI: 00:19.1 assign_resources, bus 0 link: 0
1401 11:40:49.634604 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1402 11:40:49.643868 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1403 11:40:49.654228 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1404 11:40:49.657200 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1405 11:40:49.663891 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1406 11:40:49.673458 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1407 11:40:49.677066 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1408 11:40:49.686749 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1409 11:40:49.690339 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1410 11:40:49.696583 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1411 11:40:49.703580 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1412 11:40:49.706833 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1413 11:40:49.713800 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1414 11:40:49.716893 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1415 11:40:49.723719 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1416 11:40:49.727094 LPC: Trying to open IO window from 800 size 1ff
1417 11:40:49.736759 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1418 11:40:49.743228 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1419 11:40:49.753069 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1420 11:40:49.756571 DOMAIN: 0000 assign_resources, bus 0 link: 0
1421 11:40:49.759854 Root Device assign_resources, bus 0 link: 0
1422 11:40:49.763108 Done setting resources.
1423 11:40:49.770003 Show resources in subtree (Root Device)...After assigning values.
1424 11:40:49.773636 Root Device child on link 0 DOMAIN: 0000
1425 11:40:49.779684 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1426 11:40:49.789682 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1427 11:40:49.799501 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1428 11:40:49.800011 PCI: 00:00.0
1429 11:40:49.809490 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1430 11:40:49.819644 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1431 11:40:49.829890 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1432 11:40:49.836666 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1433 11:40:49.845716 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1434 11:40:49.856294 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1435 11:40:49.866214 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1436 11:40:49.875834 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1437 11:40:49.885410 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1438 11:40:49.892748 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1439 11:40:49.902297 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1440 11:40:49.911930 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1441 11:40:49.922342 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1442 11:40:49.932799 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1443 11:40:49.938855 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1444 11:40:49.948254 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1445 11:40:49.958322 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1446 11:40:49.968646 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1447 11:40:49.978642 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1448 11:40:49.988879 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1449 11:40:49.989405 PCI: 00:02.0
1450 11:40:50.001910 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1451 11:40:50.011451 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1452 11:40:50.021490 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1453 11:40:50.024690 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1454 11:40:50.034866 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1455 11:40:50.038822 GENERIC: 0.0
1456 11:40:50.039344 PCI: 00:05.0
1457 11:40:50.048001 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1458 11:40:50.054755 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1459 11:40:50.055279 GENERIC: 0.0
1460 11:40:50.058010 PCI: 00:08.0
1461 11:40:50.068603 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1462 11:40:50.069146 PCI: 00:0a.0
1463 11:40:50.074990 PCI: 00:0d.0 child on link 0 USB0 port 0
1464 11:40:50.084736 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1465 11:40:50.088090 USB0 port 0 child on link 0 USB3 port 0
1466 11:40:50.091648 USB3 port 0
1467 11:40:50.092175 USB3 port 1
1468 11:40:50.094803 USB3 port 2
1469 11:40:50.095328 USB3 port 3
1470 11:40:50.101384 PCI: 00:14.0 child on link 0 USB0 port 0
1471 11:40:50.111453 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1472 11:40:50.114492 USB0 port 0 child on link 0 USB2 port 0
1473 11:40:50.117728 USB2 port 0
1474 11:40:50.118259 USB2 port 1
1475 11:40:50.121330 USB2 port 2
1476 11:40:50.121917 USB2 port 3
1477 11:40:50.124472 USB2 port 4
1478 11:40:50.124988 USB2 port 5
1479 11:40:50.127747 USB2 port 6
1480 11:40:50.128271 USB2 port 7
1481 11:40:50.131278 USB2 port 8
1482 11:40:50.131797 USB2 port 9
1483 11:40:50.134184 USB3 port 0
1484 11:40:50.134607 USB3 port 1
1485 11:40:50.137634 USB3 port 2
1486 11:40:50.138055 USB3 port 3
1487 11:40:50.141606 PCI: 00:14.2
1488 11:40:50.150814 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1489 11:40:50.161097 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1490 11:40:50.167706 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1491 11:40:50.177526 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1492 11:40:50.178054 GENERIC: 0.0
1493 11:40:50.184350 PCI: 00:15.0 child on link 0 I2C: 00:1a
1494 11:40:50.194078 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1495 11:40:50.194611 I2C: 00:1a
1496 11:40:50.197763 I2C: 00:31
1497 11:40:50.198288 I2C: 00:32
1498 11:40:50.200826 PCI: 00:15.1 child on link 0 I2C: 00:10
1499 11:40:50.214170 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1500 11:40:50.214705 I2C: 00:10
1501 11:40:50.215041 PCI: 00:15.2
1502 11:40:50.227060 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1503 11:40:50.227591 PCI: 00:15.3
1504 11:40:50.237243 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1505 11:40:50.240956 PCI: 00:16.0
1506 11:40:50.250444 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1507 11:40:50.250975 PCI: 00:19.0
1508 11:40:50.256870 PCI: 00:19.1 child on link 0 I2C: 00:15
1509 11:40:50.267515 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1510 11:40:50.268037 I2C: 00:15
1511 11:40:50.273706 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1512 11:40:50.280367 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1513 11:40:50.293744 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1514 11:40:50.304086 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1515 11:40:50.306956 GENERIC: 0.0
1516 11:40:50.307475 PCI: 01:00.0
1517 11:40:50.316758 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1518 11:40:50.326766 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1519 11:40:50.330213 PCI: 00:1e.0
1520 11:40:50.340144 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1521 11:40:50.343002 PCI: 00:1e.2 child on link 0 SPI: 00
1522 11:40:50.356563 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1523 11:40:50.357073 SPI: 00
1524 11:40:50.359789 PCI: 00:1e.3 child on link 0 SPI: 00
1525 11:40:50.370247 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1526 11:40:50.373642 SPI: 00
1527 11:40:50.377000 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1528 11:40:50.386651 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1529 11:40:50.387189 PNP: 0c09.0
1530 11:40:50.396519 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1531 11:40:50.400046 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1532 11:40:50.409671 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1533 11:40:50.419832 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1534 11:40:50.423103 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1535 11:40:50.426795 GENERIC: 0.0
1536 11:40:50.427327 GENERIC: 1.0
1537 11:40:50.429737 PCI: 00:1f.3
1538 11:40:50.439938 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1539 11:40:50.449012 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1540 11:40:50.449536 PCI: 00:1f.5
1541 11:40:50.462546 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1542 11:40:50.465930 CPU_CLUSTER: 0 child on link 0 APIC: 00
1543 11:40:50.466376 APIC: 00
1544 11:40:50.469120 APIC: 01
1545 11:40:50.469558 APIC: 03
1546 11:40:50.469997 APIC: 05
1547 11:40:50.472358 APIC: 07
1548 11:40:50.472850 APIC: 06
1549 11:40:50.476134 APIC: 02
1550 11:40:50.476608 APIC: 04
1551 11:40:50.479110 Done allocating resources.
1552 11:40:50.485750 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1553 11:40:50.489432 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1554 11:40:50.496501 Configure GPIOs for I2S audio on UP4.
1555 11:40:50.502302 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1556 11:40:50.502834 Enabling resources...
1557 11:40:50.509274 PCI: 00:00.0 subsystem <- 8086/9a12
1558 11:40:50.509806 PCI: 00:00.0 cmd <- 06
1559 11:40:50.512039 PCI: 00:02.0 subsystem <- 8086/9a40
1560 11:40:50.515413 PCI: 00:02.0 cmd <- 03
1561 11:40:50.518968 PCI: 00:04.0 subsystem <- 8086/9a03
1562 11:40:50.522428 PCI: 00:04.0 cmd <- 02
1563 11:40:50.525665 PCI: 00:05.0 subsystem <- 8086/9a19
1564 11:40:50.528728 PCI: 00:05.0 cmd <- 02
1565 11:40:50.532372 PCI: 00:08.0 subsystem <- 8086/9a11
1566 11:40:50.535307 PCI: 00:08.0 cmd <- 06
1567 11:40:50.538530 PCI: 00:0d.0 subsystem <- 8086/9a13
1568 11:40:50.541862 PCI: 00:0d.0 cmd <- 02
1569 11:40:50.545543 PCI: 00:14.0 subsystem <- 8086/a0ed
1570 11:40:50.548294 PCI: 00:14.0 cmd <- 02
1571 11:40:50.551782 PCI: 00:14.2 subsystem <- 8086/a0ef
1572 11:40:50.552311 PCI: 00:14.2 cmd <- 02
1573 11:40:50.558484 PCI: 00:14.3 subsystem <- 8086/a0f0
1574 11:40:50.558922 PCI: 00:14.3 cmd <- 02
1575 11:40:50.561671 PCI: 00:15.0 subsystem <- 8086/a0e8
1576 11:40:50.565081 PCI: 00:15.0 cmd <- 02
1577 11:40:50.568450 PCI: 00:15.1 subsystem <- 8086/a0e9
1578 11:40:50.571808 PCI: 00:15.1 cmd <- 02
1579 11:40:50.574868 PCI: 00:15.2 subsystem <- 8086/a0ea
1580 11:40:50.578643 PCI: 00:15.2 cmd <- 02
1581 11:40:50.581701 PCI: 00:15.3 subsystem <- 8086/a0eb
1582 11:40:50.584957 PCI: 00:15.3 cmd <- 02
1583 11:40:50.588200 PCI: 00:16.0 subsystem <- 8086/a0e0
1584 11:40:50.591778 PCI: 00:16.0 cmd <- 02
1585 11:40:50.594732 PCI: 00:19.1 subsystem <- 8086/a0c6
1586 11:40:50.598347 PCI: 00:19.1 cmd <- 02
1587 11:40:50.601428 PCI: 00:1d.0 bridge ctrl <- 0013
1588 11:40:50.605069 PCI: 00:1d.0 subsystem <- 8086/a0b0
1589 11:40:50.605591 PCI: 00:1d.0 cmd <- 06
1590 11:40:50.612145 PCI: 00:1e.0 subsystem <- 8086/a0a8
1591 11:40:50.612704 PCI: 00:1e.0 cmd <- 06
1592 11:40:50.614771 PCI: 00:1e.2 subsystem <- 8086/a0aa
1593 11:40:50.618047 PCI: 00:1e.2 cmd <- 06
1594 11:40:50.621806 PCI: 00:1e.3 subsystem <- 8086/a0ab
1595 11:40:50.624772 PCI: 00:1e.3 cmd <- 02
1596 11:40:50.628616 PCI: 00:1f.0 subsystem <- 8086/a087
1597 11:40:50.631303 PCI: 00:1f.0 cmd <- 407
1598 11:40:50.634888 PCI: 00:1f.3 subsystem <- 8086/a0c8
1599 11:40:50.638069 PCI: 00:1f.3 cmd <- 02
1600 11:40:50.641319 PCI: 00:1f.5 subsystem <- 8086/a0a4
1601 11:40:50.644364 PCI: 00:1f.5 cmd <- 406
1602 11:40:50.647464 PCI: 01:00.0 cmd <- 02
1603 11:40:50.652463 done.
1604 11:40:50.655926 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1605 11:40:50.659202 Initializing devices...
1606 11:40:50.661796 Root Device init
1607 11:40:50.665544 Chrome EC: Set SMI mask to 0x0000000000000000
1608 11:40:50.672542 Chrome EC: clear events_b mask to 0x0000000000000000
1609 11:40:50.679790 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1610 11:40:50.685674 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1611 11:40:50.692458 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1612 11:40:50.695574 Chrome EC: Set WAKE mask to 0x0000000000000000
1613 11:40:50.703782 fw_config match found: DB_USB=USB3_ACTIVE
1614 11:40:50.707327 Configure Right Type-C port orientation for retimer
1615 11:40:50.710576 Root Device init finished in 46 msecs
1616 11:40:50.714385 PCI: 00:00.0 init
1617 11:40:50.718112 CPU TDP = 9 Watts
1618 11:40:50.718642 CPU PL1 = 9 Watts
1619 11:40:50.721146 CPU PL2 = 40 Watts
1620 11:40:50.724390 CPU PL4 = 83 Watts
1621 11:40:50.727861 PCI: 00:00.0 init finished in 8 msecs
1622 11:40:50.728384 PCI: 00:02.0 init
1623 11:40:50.731189 GMA: Found VBT in CBFS
1624 11:40:50.734282 GMA: Found valid VBT in CBFS
1625 11:40:50.741239 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1626 11:40:50.747137 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1627 11:40:50.751026 PCI: 00:02.0 init finished in 18 msecs
1628 11:40:50.754198 PCI: 00:05.0 init
1629 11:40:50.757748 PCI: 00:05.0 init finished in 0 msecs
1630 11:40:50.761041 PCI: 00:08.0 init
1631 11:40:50.763930 PCI: 00:08.0 init finished in 0 msecs
1632 11:40:50.767044 PCI: 00:14.0 init
1633 11:40:50.770754 PCI: 00:14.0 init finished in 0 msecs
1634 11:40:50.773691 PCI: 00:14.2 init
1635 11:40:50.776868 PCI: 00:14.2 init finished in 0 msecs
1636 11:40:50.780434 PCI: 00:15.0 init
1637 11:40:50.783764 I2C bus 0 version 0x3230302a
1638 11:40:50.786640 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1639 11:40:50.790299 PCI: 00:15.0 init finished in 6 msecs
1640 11:40:50.790824 PCI: 00:15.1 init
1641 11:40:50.793539 I2C bus 1 version 0x3230302a
1642 11:40:50.797082 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1643 11:40:50.803803 PCI: 00:15.1 init finished in 6 msecs
1644 11:40:50.804307 PCI: 00:15.2 init
1645 11:40:50.806967 I2C bus 2 version 0x3230302a
1646 11:40:50.810434 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1647 11:40:50.813432 PCI: 00:15.2 init finished in 6 msecs
1648 11:40:50.817144 PCI: 00:15.3 init
1649 11:40:50.820202 I2C bus 3 version 0x3230302a
1650 11:40:50.823496 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1651 11:40:50.827057 PCI: 00:15.3 init finished in 6 msecs
1652 11:40:50.830373 PCI: 00:16.0 init
1653 11:40:50.833544 PCI: 00:16.0 init finished in 0 msecs
1654 11:40:50.837078 PCI: 00:19.1 init
1655 11:40:50.840623 I2C bus 5 version 0x3230302a
1656 11:40:50.844028 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1657 11:40:50.846996 PCI: 00:19.1 init finished in 6 msecs
1658 11:40:50.850311 PCI: 00:1d.0 init
1659 11:40:50.850824 Initializing PCH PCIe bridge.
1660 11:40:50.857085 PCI: 00:1d.0 init finished in 3 msecs
1661 11:40:50.860712 PCI: 00:1f.0 init
1662 11:40:50.863332 IOAPIC: Initializing IOAPIC at 0xfec00000
1663 11:40:50.866559 IOAPIC: Bootstrap Processor Local APIC = 0x00
1664 11:40:50.870649 IOAPIC: ID = 0x02
1665 11:40:50.873111 IOAPIC: Dumping registers
1666 11:40:50.873530 reg 0x0000: 0x02000000
1667 11:40:50.876733 reg 0x0001: 0x00770020
1668 11:40:50.879771 reg 0x0002: 0x00000000
1669 11:40:50.883193 PCI: 00:1f.0 init finished in 21 msecs
1670 11:40:50.886705 PCI: 00:1f.2 init
1671 11:40:50.890727 Disabling ACPI via APMC.
1672 11:40:50.893376 APMC done.
1673 11:40:50.896790 PCI: 00:1f.2 init finished in 6 msecs
1674 11:40:50.907444 PCI: 01:00.0 init
1675 11:40:50.911021 PCI: 01:00.0 init finished in 0 msecs
1676 11:40:50.914092 PNP: 0c09.0 init
1677 11:40:50.917122 Google Chrome EC uptime: 8.306 seconds
1678 11:40:50.924172 Google Chrome AP resets since EC boot: 1
1679 11:40:50.927541 Google Chrome most recent AP reset causes:
1680 11:40:50.930837 0.451: 32775 shutdown: entering G3
1681 11:40:50.937486 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1682 11:40:50.940574 PNP: 0c09.0 init finished in 22 msecs
1683 11:40:50.945792 Devices initialized
1684 11:40:50.949005 Show all devs... After init.
1685 11:40:50.952548 Root Device: enabled 1
1686 11:40:50.953076 DOMAIN: 0000: enabled 1
1687 11:40:50.956358 CPU_CLUSTER: 0: enabled 1
1688 11:40:50.959220 PCI: 00:00.0: enabled 1
1689 11:40:50.962253 PCI: 00:02.0: enabled 1
1690 11:40:50.962749 PCI: 00:04.0: enabled 1
1691 11:40:50.965599 PCI: 00:05.0: enabled 1
1692 11:40:50.969026 PCI: 00:06.0: enabled 0
1693 11:40:50.972551 PCI: 00:07.0: enabled 0
1694 11:40:50.973083 PCI: 00:07.1: enabled 0
1695 11:40:50.976121 PCI: 00:07.2: enabled 0
1696 11:40:50.978756 PCI: 00:07.3: enabled 0
1697 11:40:50.982760 PCI: 00:08.0: enabled 1
1698 11:40:50.983297 PCI: 00:09.0: enabled 0
1699 11:40:50.986008 PCI: 00:0a.0: enabled 0
1700 11:40:50.988767 PCI: 00:0d.0: enabled 1
1701 11:40:50.992350 PCI: 00:0d.1: enabled 0
1702 11:40:50.992923 PCI: 00:0d.2: enabled 0
1703 11:40:50.995423 PCI: 00:0d.3: enabled 0
1704 11:40:50.998912 PCI: 00:0e.0: enabled 0
1705 11:40:50.999454 PCI: 00:10.2: enabled 1
1706 11:40:51.002440 PCI: 00:10.6: enabled 0
1707 11:40:51.005522 PCI: 00:10.7: enabled 0
1708 11:40:51.008967 PCI: 00:12.0: enabled 0
1709 11:40:51.009408 PCI: 00:12.6: enabled 0
1710 11:40:51.012316 PCI: 00:13.0: enabled 0
1711 11:40:51.015671 PCI: 00:14.0: enabled 1
1712 11:40:51.018779 PCI: 00:14.1: enabled 0
1713 11:40:51.019309 PCI: 00:14.2: enabled 1
1714 11:40:51.022338 PCI: 00:14.3: enabled 1
1715 11:40:51.025379 PCI: 00:15.0: enabled 1
1716 11:40:51.028833 PCI: 00:15.1: enabled 1
1717 11:40:51.029362 PCI: 00:15.2: enabled 1
1718 11:40:51.032056 PCI: 00:15.3: enabled 1
1719 11:40:51.035267 PCI: 00:16.0: enabled 1
1720 11:40:51.038762 PCI: 00:16.1: enabled 0
1721 11:40:51.039296 PCI: 00:16.2: enabled 0
1722 11:40:51.042332 PCI: 00:16.3: enabled 0
1723 11:40:51.045535 PCI: 00:16.4: enabled 0
1724 11:40:51.046066 PCI: 00:16.5: enabled 0
1725 11:40:51.048760 PCI: 00:17.0: enabled 0
1726 11:40:51.052306 PCI: 00:19.0: enabled 0
1727 11:40:51.055394 PCI: 00:19.1: enabled 1
1728 11:40:51.055921 PCI: 00:19.2: enabled 0
1729 11:40:51.059277 PCI: 00:1c.0: enabled 1
1730 11:40:51.062000 PCI: 00:1c.1: enabled 0
1731 11:40:51.065255 PCI: 00:1c.2: enabled 0
1732 11:40:51.065712 PCI: 00:1c.3: enabled 0
1733 11:40:51.068336 PCI: 00:1c.4: enabled 0
1734 11:40:51.072430 PCI: 00:1c.5: enabled 0
1735 11:40:51.075313 PCI: 00:1c.6: enabled 1
1736 11:40:51.075842 PCI: 00:1c.7: enabled 0
1737 11:40:51.078442 PCI: 00:1d.0: enabled 1
1738 11:40:51.082083 PCI: 00:1d.1: enabled 0
1739 11:40:51.082620 PCI: 00:1d.2: enabled 1
1740 11:40:51.085384 PCI: 00:1d.3: enabled 0
1741 11:40:51.088570 PCI: 00:1e.0: enabled 1
1742 11:40:51.091954 PCI: 00:1e.1: enabled 0
1743 11:40:51.092528 PCI: 00:1e.2: enabled 1
1744 11:40:51.095015 PCI: 00:1e.3: enabled 1
1745 11:40:51.098412 PCI: 00:1f.0: enabled 1
1746 11:40:51.101678 PCI: 00:1f.1: enabled 0
1747 11:40:51.102223 PCI: 00:1f.2: enabled 1
1748 11:40:51.104887 PCI: 00:1f.3: enabled 1
1749 11:40:51.108168 PCI: 00:1f.4: enabled 0
1750 11:40:51.111719 PCI: 00:1f.5: enabled 1
1751 11:40:51.112131 PCI: 00:1f.6: enabled 0
1752 11:40:51.115104 PCI: 00:1f.7: enabled 0
1753 11:40:51.118459 APIC: 00: enabled 1
1754 11:40:51.118998 GENERIC: 0.0: enabled 1
1755 11:40:51.121927 GENERIC: 0.0: enabled 1
1756 11:40:51.124892 GENERIC: 1.0: enabled 1
1757 11:40:51.128453 GENERIC: 0.0: enabled 1
1758 11:40:51.128981 GENERIC: 1.0: enabled 1
1759 11:40:51.131744 USB0 port 0: enabled 1
1760 11:40:51.135011 GENERIC: 0.0: enabled 1
1761 11:40:51.138233 USB0 port 0: enabled 1
1762 11:40:51.138790 GENERIC: 0.0: enabled 1
1763 11:40:51.141342 I2C: 00:1a: enabled 1
1764 11:40:51.144739 I2C: 00:31: enabled 1
1765 11:40:51.145241 I2C: 00:32: enabled 1
1766 11:40:51.147769 I2C: 00:10: enabled 1
1767 11:40:51.151943 I2C: 00:15: enabled 1
1768 11:40:51.152513 GENERIC: 0.0: enabled 0
1769 11:40:51.154859 GENERIC: 1.0: enabled 0
1770 11:40:51.158411 GENERIC: 0.0: enabled 1
1771 11:40:51.158875 SPI: 00: enabled 1
1772 11:40:51.161938 SPI: 00: enabled 1
1773 11:40:51.164767 PNP: 0c09.0: enabled 1
1774 11:40:51.165192 GENERIC: 0.0: enabled 1
1775 11:40:51.167975 USB3 port 0: enabled 1
1776 11:40:51.172017 USB3 port 1: enabled 1
1777 11:40:51.174955 USB3 port 2: enabled 0
1778 11:40:51.175467 USB3 port 3: enabled 0
1779 11:40:51.177917 USB2 port 0: enabled 0
1780 11:40:51.181576 USB2 port 1: enabled 1
1781 11:40:51.182095 USB2 port 2: enabled 1
1782 11:40:51.184573 USB2 port 3: enabled 0
1783 11:40:51.188347 USB2 port 4: enabled 1
1784 11:40:51.191281 USB2 port 5: enabled 0
1785 11:40:51.191800 USB2 port 6: enabled 0
1786 11:40:51.194750 USB2 port 7: enabled 0
1787 11:40:51.197988 USB2 port 8: enabled 0
1788 11:40:51.198510 USB2 port 9: enabled 0
1789 11:40:51.201478 USB3 port 0: enabled 0
1790 11:40:51.204969 USB3 port 1: enabled 1
1791 11:40:51.205491 USB3 port 2: enabled 0
1792 11:40:51.207826 USB3 port 3: enabled 0
1793 11:40:51.211162 GENERIC: 0.0: enabled 1
1794 11:40:51.214181 GENERIC: 1.0: enabled 1
1795 11:40:51.214608 APIC: 01: enabled 1
1796 11:40:51.217913 APIC: 03: enabled 1
1797 11:40:51.221021 APIC: 05: enabled 1
1798 11:40:51.221586 APIC: 07: enabled 1
1799 11:40:51.224299 APIC: 06: enabled 1
1800 11:40:51.224781 APIC: 02: enabled 1
1801 11:40:51.227687 APIC: 04: enabled 1
1802 11:40:51.231177 PCI: 01:00.0: enabled 1
1803 11:40:51.234465 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1804 11:40:51.241290 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1805 11:40:51.244193 ELOG: NV offset 0xf30000 size 0x1000
1806 11:40:51.251003 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1807 11:40:51.257417 ELOG: Event(17) added with size 13 at 2023-04-03 11:40:51 UTC
1808 11:40:51.264008 ELOG: Event(92) added with size 9 at 2023-04-03 11:40:51 UTC
1809 11:40:51.270918 ELOG: Event(93) added with size 9 at 2023-04-03 11:40:51 UTC
1810 11:40:51.277366 ELOG: Event(9E) added with size 10 at 2023-04-03 11:40:51 UTC
1811 11:40:51.284465 ELOG: Event(9F) added with size 14 at 2023-04-03 11:40:51 UTC
1812 11:40:51.290916 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1813 11:40:51.296964 ELOG: Event(A1) added with size 10 at 2023-04-03 11:40:51 UTC
1814 11:40:51.304112 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1815 11:40:51.310815 ELOG: Event(A0) added with size 9 at 2023-04-03 11:40:51 UTC
1816 11:40:51.313791 elog_add_boot_reason: Logged dev mode boot
1817 11:40:51.320570 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1818 11:40:51.321110 Finalize devices...
1819 11:40:51.323653 Devices finalized
1820 11:40:51.330244 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1821 11:40:51.333606 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1822 11:40:51.339935 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1823 11:40:51.343323 ME: HFSTS1 : 0x80030055
1824 11:40:51.350114 ME: HFSTS2 : 0x30280116
1825 11:40:51.353677 ME: HFSTS3 : 0x00000050
1826 11:40:51.356743 ME: HFSTS4 : 0x00004000
1827 11:40:51.363473 ME: HFSTS5 : 0x00000000
1828 11:40:51.366342 ME: HFSTS6 : 0x40400006
1829 11:40:51.370633 ME: Manufacturing Mode : YES
1830 11:40:51.373708 ME: SPI Protection Mode Enabled : NO
1831 11:40:51.380673 ME: FW Partition Table : OK
1832 11:40:51.383691 ME: Bringup Loader Failure : NO
1833 11:40:51.386811 ME: Firmware Init Complete : NO
1834 11:40:51.390011 ME: Boot Options Present : NO
1835 11:40:51.393638 ME: Update In Progress : NO
1836 11:40:51.396690 ME: D0i3 Support : YES
1837 11:40:51.399977 ME: Low Power State Enabled : NO
1838 11:40:51.403172 ME: CPU Replaced : YES
1839 11:40:51.410164 ME: CPU Replacement Valid : YES
1840 11:40:51.413322 ME: Current Working State : 5
1841 11:40:51.416572 ME: Current Operation State : 1
1842 11:40:51.419838 ME: Current Operation Mode : 3
1843 11:40:51.423221 ME: Error Code : 0
1844 11:40:51.426365 ME: Enhanced Debug Mode : NO
1845 11:40:51.429785 ME: CPU Debug Disabled : YES
1846 11:40:51.433392 ME: TXT Support : NO
1847 11:40:51.439591 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1848 11:40:51.446224 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1849 11:40:51.449225 CBFS: 'fallback/slic' not found.
1850 11:40:51.456495 ACPI: Writing ACPI tables at 76b01000.
1851 11:40:51.457029 ACPI: * FACS
1852 11:40:51.459888 ACPI: * DSDT
1853 11:40:51.462498 Ramoops buffer: 0x100000@0x76a00000.
1854 11:40:51.465957 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1855 11:40:51.472553 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1856 11:40:51.476042 Google Chrome EC: version:
1857 11:40:51.479717 ro: voema_v2.0.10114-a447f03e46
1858 11:40:51.483053 rw: voema_v2.0.10114-a447f03e46
1859 11:40:51.483568 running image: 2
1860 11:40:51.489354 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1861 11:40:51.494009 ACPI: * FADT
1862 11:40:51.494526 SCI is IRQ9
1863 11:40:51.500974 ACPI: added table 1/32, length now 40
1864 11:40:51.501497 ACPI: * SSDT
1865 11:40:51.504537 Found 1 CPU(s) with 8 core(s) each.
1866 11:40:51.510282 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1867 11:40:51.513877 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1868 11:40:51.517310 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1869 11:40:51.521000 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1870 11:40:51.527371 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1871 11:40:51.533774 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1872 11:40:51.537163 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1873 11:40:51.543701 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1874 11:40:51.550593 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1875 11:40:51.553359 \_SB.PCI0.RP09: Added StorageD3Enable property
1876 11:40:51.560264 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1877 11:40:51.563470 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1878 11:40:51.570033 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1879 11:40:51.573347 PS2K: Passing 80 keymaps to kernel
1880 11:40:51.580478 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1881 11:40:51.587145 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1882 11:40:51.593781 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1883 11:40:51.600539 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1884 11:40:51.607176 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1885 11:40:51.613298 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1886 11:40:51.620591 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1887 11:40:51.627003 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1888 11:40:51.630317 ACPI: added table 2/32, length now 44
1889 11:40:51.630844 ACPI: * MCFG
1890 11:40:51.633098 ACPI: added table 3/32, length now 48
1891 11:40:51.636855 ACPI: * TPM2
1892 11:40:51.640240 TPM2 log created at 0x769f0000
1893 11:40:51.643527 ACPI: added table 4/32, length now 52
1894 11:40:51.644051 ACPI: * MADT
1895 11:40:51.646561 SCI is IRQ9
1896 11:40:51.649787 ACPI: added table 5/32, length now 56
1897 11:40:51.653128 current = 76b09850
1898 11:40:51.653550 ACPI: * DMAR
1899 11:40:51.656555 ACPI: added table 6/32, length now 60
1900 11:40:51.659744 ACPI: added table 7/32, length now 64
1901 11:40:51.662938 ACPI: * HPET
1902 11:40:51.666287 ACPI: added table 8/32, length now 68
1903 11:40:51.666713 ACPI: done.
1904 11:40:51.670104 ACPI tables: 35216 bytes.
1905 11:40:51.673214 smbios_write_tables: 769ef000
1906 11:40:51.676197 EC returned error result code 3
1907 11:40:51.679674 Couldn't obtain OEM name from CBI
1908 11:40:51.684132 Create SMBIOS type 16
1909 11:40:51.687045 Create SMBIOS type 17
1910 11:40:51.690575 GENERIC: 0.0 (WIFI Device)
1911 11:40:51.691102 SMBIOS tables: 1734 bytes.
1912 11:40:51.696574 Writing table forward entry at 0x00000500
1913 11:40:51.703776 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1914 11:40:51.706976 Writing coreboot table at 0x76b25000
1915 11:40:51.713976 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1916 11:40:51.716548 1. 0000000000001000-000000000009ffff: RAM
1917 11:40:51.719806 2. 00000000000a0000-00000000000fffff: RESERVED
1918 11:40:51.726707 3. 0000000000100000-00000000769eefff: RAM
1919 11:40:51.730636 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1920 11:40:51.736606 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1921 11:40:51.743597 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1922 11:40:51.746877 7. 0000000077000000-000000007fbfffff: RESERVED
1923 11:40:51.753242 8. 00000000c0000000-00000000cfffffff: RESERVED
1924 11:40:51.756834 9. 00000000f8000000-00000000f9ffffff: RESERVED
1925 11:40:51.759677 10. 00000000fb000000-00000000fb000fff: RESERVED
1926 11:40:51.766449 11. 00000000fe000000-00000000fe00ffff: RESERVED
1927 11:40:51.769533 12. 00000000fed80000-00000000fed87fff: RESERVED
1928 11:40:51.776624 13. 00000000fed90000-00000000fed92fff: RESERVED
1929 11:40:51.779935 14. 00000000feda0000-00000000feda1fff: RESERVED
1930 11:40:51.786262 15. 00000000fedc0000-00000000feddffff: RESERVED
1931 11:40:51.789496 16. 0000000100000000-00000004803fffff: RAM
1932 11:40:51.793286 Passing 4 GPIOs to payload:
1933 11:40:51.796287 NAME | PORT | POLARITY | VALUE
1934 11:40:51.802882 lid | undefined | high | high
1935 11:40:51.809642 power | undefined | high | low
1936 11:40:51.813136 oprom | undefined | high | low
1937 11:40:51.819551 EC in RW | 0x000000e5 | high | high
1938 11:40:51.826210 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f1ab
1939 11:40:51.826718 coreboot table: 1576 bytes.
1940 11:40:51.833381 IMD ROOT 0. 0x76fff000 0x00001000
1941 11:40:51.836087 IMD SMALL 1. 0x76ffe000 0x00001000
1942 11:40:51.839842 FSP MEMORY 2. 0x76c4e000 0x003b0000
1943 11:40:51.842909 VPD 3. 0x76c4d000 0x00000367
1944 11:40:51.846571 RO MCACHE 4. 0x76c4c000 0x00000fdc
1945 11:40:51.849565 CONSOLE 5. 0x76c2c000 0x00020000
1946 11:40:51.852948 FMAP 6. 0x76c2b000 0x00000578
1947 11:40:51.856529 TIME STAMP 7. 0x76c2a000 0x00000910
1948 11:40:51.863108 VBOOT WORK 8. 0x76c16000 0x00014000
1949 11:40:51.865691 ROMSTG STCK 9. 0x76c15000 0x00001000
1950 11:40:51.869023 AFTER CAR 10. 0x76c0a000 0x0000b000
1951 11:40:51.872462 RAMSTAGE 11. 0x76b97000 0x00073000
1952 11:40:51.876170 REFCODE 12. 0x76b42000 0x00055000
1953 11:40:51.879018 SMM BACKUP 13. 0x76b32000 0x00010000
1954 11:40:51.882527 4f444749 14. 0x76b30000 0x00002000
1955 11:40:51.885951 EXT VBT15. 0x76b2d000 0x0000219f
1956 11:40:51.889083 COREBOOT 16. 0x76b25000 0x00008000
1957 11:40:51.895739 ACPI 17. 0x76b01000 0x00024000
1958 11:40:51.899079 ACPI GNVS 18. 0x76b00000 0x00001000
1959 11:40:51.902639 RAMOOPS 19. 0x76a00000 0x00100000
1960 11:40:51.905644 TPM2 TCGLOG20. 0x769f0000 0x00010000
1961 11:40:51.909125 SMBIOS 21. 0x769ef000 0x00000800
1962 11:40:51.912700 IMD small region:
1963 11:40:51.915649 IMD ROOT 0. 0x76ffec00 0x00000400
1964 11:40:51.918893 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1965 11:40:51.922099 POWER STATE 2. 0x76ffeb80 0x00000044
1966 11:40:51.926103 ROMSTAGE 3. 0x76ffeb60 0x00000004
1967 11:40:51.932362 MEM INFO 4. 0x76ffe980 0x000001e0
1968 11:40:51.935791 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1969 11:40:51.939422 MTRR: Physical address space:
1970 11:40:51.945360 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1971 11:40:51.952297 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1972 11:40:51.958984 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1973 11:40:51.965133 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1974 11:40:51.972030 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1975 11:40:51.979190 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1976 11:40:51.981748 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1977 11:40:51.988588 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 11:40:51.992147 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 11:40:51.995290 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 11:40:51.998426 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 11:40:52.005561 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 11:40:52.008502 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 11:40:52.012024 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 11:40:52.015255 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 11:40:52.021833 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 11:40:52.025471 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 11:40:52.028172 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 11:40:52.033031 call enable_fixed_mtrr()
1989 11:40:52.035948 CPU physical address size: 39 bits
1990 11:40:52.042349 MTRR: default type WB/UC MTRR counts: 6/7.
1991 11:40:52.045941 MTRR: WB selected as default type.
1992 11:40:52.052458 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1993 11:40:52.055770 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1994 11:40:52.062197 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1995 11:40:52.068949 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1996 11:40:52.075920 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1997 11:40:52.082420 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1998 11:40:52.086154
1999 11:40:52.086671 MTRR check
2000 11:40:52.089212 Fixed MTRRs : Enabled
2001 11:40:52.089629 Variable MTRRs: Enabled
2002 11:40:52.089954
2003 11:40:52.096307 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 11:40:52.099123 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 11:40:52.103256 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 11:40:52.105698 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 11:40:52.112707 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 11:40:52.115881 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 11:40:52.119353 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 11:40:52.122703 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 11:40:52.129090 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 11:40:52.132472 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 11:40:52.135921 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 11:40:52.143515 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2015 11:40:52.147042 call enable_fixed_mtrr()
2016 11:40:52.150311 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 11:40:52.153123 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 11:40:52.160037 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 11:40:52.163318 MTRR: Fixed MSR 0x258 0x0606060606060606
2020 11:40:52.166338 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 11:40:52.170156 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 11:40:52.176818 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 11:40:52.179694 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 11:40:52.183515 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 11:40:52.186644 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 11:40:52.193148 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 11:40:52.196647 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 11:40:52.199971 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 11:40:52.207396 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 11:40:52.207916 call enable_fixed_mtrr()
2031 11:40:52.213783 MTRR: Fixed MSR 0x258 0x0606060606060606
2032 11:40:52.216763 MTRR: Fixed MSR 0x250 0x0606060606060606
2033 11:40:52.220362 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 11:40:52.223659 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 11:40:52.230441 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 11:40:52.233936 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 11:40:52.236936 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 11:40:52.240244 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 11:40:52.246942 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 11:40:52.249821 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 11:40:52.253456 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 11:40:52.257128 MTRR: Fixed MSR 0x250 0x0606060606060606
2043 11:40:52.260327 MTRR: Fixed MSR 0x258 0x0606060606060606
2044 11:40:52.266668 MTRR: Fixed MSR 0x259 0x0000000000000000
2045 11:40:52.270114 MTRR: Fixed MSR 0x268 0x0606060606060606
2046 11:40:52.273268 MTRR: Fixed MSR 0x269 0x0606060606060606
2047 11:40:52.276882 MTRR: Fixed MSR 0x26a 0x0606060606060606
2048 11:40:52.283366 MTRR: Fixed MSR 0x26b 0x0606060606060606
2049 11:40:52.286999 MTRR: Fixed MSR 0x26c 0x0606060606060606
2050 11:40:52.289924 MTRR: Fixed MSR 0x26d 0x0606060606060606
2051 11:40:52.293379 MTRR: Fixed MSR 0x26e 0x0606060606060606
2052 11:40:52.300129 MTRR: Fixed MSR 0x26f 0x0606060606060606
2053 11:40:52.306832 MTRR: Fixed MSR 0x250 0x0606060606060606
2054 11:40:52.307357 call enable_fixed_mtrr()
2055 11:40:52.313375 MTRR: Fixed MSR 0x258 0x0606060606060606
2056 11:40:52.316629 MTRR: Fixed MSR 0x259 0x0000000000000000
2057 11:40:52.319867 MTRR: Fixed MSR 0x268 0x0606060606060606
2058 11:40:52.323346 MTRR: Fixed MSR 0x269 0x0606060606060606
2059 11:40:52.326273 MTRR: Fixed MSR 0x26a 0x0606060606060606
2060 11:40:52.333324 MTRR: Fixed MSR 0x26b 0x0606060606060606
2061 11:40:52.336498 MTRR: Fixed MSR 0x26c 0x0606060606060606
2062 11:40:52.339583 MTRR: Fixed MSR 0x26d 0x0606060606060606
2063 11:40:52.342991 MTRR: Fixed MSR 0x26e 0x0606060606060606
2064 11:40:52.349367 MTRR: Fixed MSR 0x26f 0x0606060606060606
2065 11:40:52.353841 CPU physical address size: 39 bits
2066 11:40:52.358128 call enable_fixed_mtrr()
2067 11:40:52.361808 CPU physical address size: 39 bits
2068 11:40:52.364977 MTRR: Fixed MSR 0x258 0x0606060606060606
2069 11:40:52.367826 call enable_fixed_mtrr()
2070 11:40:52.371366 MTRR: Fixed MSR 0x259 0x0000000000000000
2071 11:40:52.378111 MTRR: Fixed MSR 0x268 0x0606060606060606
2072 11:40:52.381021 MTRR: Fixed MSR 0x269 0x0606060606060606
2073 11:40:52.384831 MTRR: Fixed MSR 0x26a 0x0606060606060606
2074 11:40:52.387769 MTRR: Fixed MSR 0x26b 0x0606060606060606
2075 11:40:52.394840 MTRR: Fixed MSR 0x26c 0x0606060606060606
2076 11:40:52.398484 MTRR: Fixed MSR 0x26d 0x0606060606060606
2077 11:40:52.401727 MTRR: Fixed MSR 0x26e 0x0606060606060606
2078 11:40:52.404936 MTRR: Fixed MSR 0x26f 0x0606060606060606
2079 11:40:52.409761 CPU physical address size: 39 bits
2080 11:40:52.416670 call enable_fixed_mtrr()
2081 11:40:52.420089 Checking cr50 for pending updates
2082 11:40:52.423460 CPU physical address size: 39 bits
2083 11:40:52.426961 CPU physical address size: 39 bits
2084 11:40:52.431143 Reading cr50 TPM mode
2085 11:40:52.434415 CPU physical address size: 39 bits
2086 11:40:52.437196 MTRR: Fixed MSR 0x259 0x0000000000000000
2087 11:40:52.444270 BS: BS_PAYLOAD_LOAD entry times (exec / console): 283 / 6 ms
2088 11:40:52.447065 MTRR: Fixed MSR 0x268 0x0606060606060606
2089 11:40:52.454128 MTRR: Fixed MSR 0x269 0x0606060606060606
2090 11:40:52.457047 MTRR: Fixed MSR 0x26a 0x0606060606060606
2091 11:40:52.460623 MTRR: Fixed MSR 0x26b 0x0606060606060606
2092 11:40:52.463752 MTRR: Fixed MSR 0x26c 0x0606060606060606
2093 11:40:52.470084 MTRR: Fixed MSR 0x26d 0x0606060606060606
2094 11:40:52.473660 MTRR: Fixed MSR 0x26e 0x0606060606060606
2095 11:40:52.477591 MTRR: Fixed MSR 0x26f 0x0606060606060606
2096 11:40:52.484158 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2097 11:40:52.487796 call enable_fixed_mtrr()
2098 11:40:52.490486 Checking segment from ROM address 0xffc02b38
2099 11:40:52.497511 CPU physical address size: 39 bits
2100 11:40:52.500764 Checking segment from ROM address 0xffc02b54
2101 11:40:52.503772 Loading segment from ROM address 0xffc02b38
2102 11:40:52.507272 code (compression=0)
2103 11:40:52.516811 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2104 11:40:52.523720 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2105 11:40:52.526884 it's not compressed!
2106 11:40:52.675625 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2107 11:40:52.682072 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2108 11:40:52.688861 Loading segment from ROM address 0xffc02b54
2109 11:40:52.692771 Entry Point 0x30000000
2110 11:40:52.693320 Loaded segments
2111 11:40:52.699311 BS: BS_PAYLOAD_LOAD run times (exec / console): 185 / 63 ms
2112 11:40:52.744824 Finalizing chipset.
2113 11:40:52.747883 Finalizing SMM.
2114 11:40:52.748472 APMC done.
2115 11:40:52.754589 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2116 11:40:52.757731 mp_park_aps done after 0 msecs.
2117 11:40:52.761063 Jumping to boot code at 0x30000000(0x76b25000)
2118 11:40:52.770849 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2119 11:40:52.771377
2120 11:40:52.771720
2121 11:40:52.773854
2122 11:40:52.774281 Starting depthcharge on Voema...
2123 11:40:52.775337 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2124 11:40:52.775841 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2125 11:40:52.776261 Setting prompt string to ['volteer:']
2126 11:40:52.776724 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2127 11:40:52.777400
2128 11:40:52.784014 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2129 11:40:52.784483
2130 11:40:52.790892 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2131 11:40:52.791439
2132 11:40:52.797411 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2133 11:40:52.797948
2134 11:40:52.800806 Failed to find eMMC card reader
2135 11:40:52.801233
2136 11:40:52.801572 Wipe memory regions:
2137 11:40:52.803822
2138 11:40:52.807347 [0x00000000001000, 0x000000000a0000)
2139 11:40:52.807874
2140 11:40:52.810718 [0x00000000100000, 0x00000030000000)
2141 11:40:52.850299
2142 11:40:52.852769 [0x00000032662db0, 0x000000769ef000)
2143 11:40:52.907864
2144 11:40:52.910952 [0x00000100000000, 0x00000480400000)
2145 11:40:53.589215
2146 11:40:53.593072 ec_init: CrosEC protocol v3 supported (256, 256)
2147 11:40:54.024552
2148 11:40:54.025074 R8152: Initializing
2149 11:40:54.025420
2150 11:40:54.027537 Version 6 (ocp_data = 5c30)
2151 11:40:54.027964
2152 11:40:54.030682 R8152: Done initializing
2153 11:40:54.031112
2154 11:40:54.034649 Adding net device
2155 11:40:54.335754
2156 11:40:54.339332 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2157 11:40:54.339901
2158 11:40:54.340280
2159 11:40:54.340676
2160 11:40:54.342369 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2162 11:40:54.444002 volteer: tftpboot 192.168.201.1 9849696/tftp-deploy-l116ez8b/kernel/bzImage 9849696/tftp-deploy-l116ez8b/kernel/cmdline 9849696/tftp-deploy-l116ez8b/ramdisk/ramdisk.cpio.gz
2163 11:40:54.444803 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2164 11:40:54.445230 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2165 11:40:54.449494 tftpboot 192.168.201.1 9849696/tftp-deploy-l116ez8b/kernel/bzImay-l116ez8b/kernel/cmdline 9849696/tftp-deploy-l116ez8b/ramdisk/ramdisk.cpio.gz
2166 11:40:54.449980
2167 11:40:54.450316 Waiting for link
2168 11:40:54.653084
2169 11:40:54.653593 done.
2170 11:40:54.653929
2171 11:40:54.654244 MAC: 00:24:32:30:77:d1
2172 11:40:54.654643
2173 11:40:54.655908 Sending DHCP discover... done.
2174 11:40:54.656322
2175 11:40:54.659736 Waiting for reply... done.
2176 11:40:54.660157
2177 11:40:54.662521 Sending DHCP request... done.
2178 11:40:54.663030
2179 11:40:54.669183 Waiting for reply... done.
2180 11:40:54.669608
2181 11:40:54.669937 My ip is 192.168.201.13
2182 11:40:54.670242
2183 11:40:54.673058 The DHCP server ip is 192.168.201.1
2184 11:40:54.676356
2185 11:40:54.679818 TFTP server IP predefined by user: 192.168.201.1
2186 11:40:54.680345
2187 11:40:54.685951 Bootfile predefined by user: 9849696/tftp-deploy-l116ez8b/kernel/bzImage
2188 11:40:54.686370
2189 11:40:54.689544 Sending tftp read request... done.
2190 11:40:54.690060
2191 11:40:54.698074 Waiting for the transfer...
2192 11:40:54.698586
2193 11:40:55.402662 00000000 ################################################################
2194 11:40:55.403173
2195 11:40:56.114784 00080000 ################################################################
2196 11:40:56.115377
2197 11:40:56.815441 00100000 ################################################################
2198 11:40:56.816080
2199 11:40:57.526908 00180000 ################################################################
2200 11:40:57.527451
2201 11:40:58.235774 00200000 ################################################################
2202 11:40:58.236339
2203 11:40:58.960744 00280000 ################################################################
2204 11:40:58.961264
2205 11:40:59.668927 00300000 ################################################################
2206 11:40:59.669424
2207 11:41:00.373929 00380000 ################################################################
2208 11:41:00.374468
2209 11:41:01.082908 00400000 ################################################################
2210 11:41:01.083460
2211 11:41:01.769350 00480000 ################################################################
2212 11:41:01.769844
2213 11:41:02.469493 00500000 ################################################################
2214 11:41:02.470041
2215 11:41:03.164731 00580000 ################################################################
2216 11:41:03.165255
2217 11:41:03.867206 00600000 ################################################################
2218 11:41:03.867755
2219 11:41:04.457635 00680000 ################################################################
2220 11:41:04.457792
2221 11:41:05.025328 00700000 ################################################################
2222 11:41:05.025508
2223 11:41:05.043525 00780000 ## done.
2224 11:41:05.043635
2225 11:41:05.047302 The bootfile was 7880592 bytes long.
2226 11:41:05.047416
2227 11:41:05.050173 Sending tftp read request... done.
2228 11:41:05.050285
2229 11:41:05.053518 Waiting for the transfer...
2230 11:41:05.053630
2231 11:41:05.615633 00000000 ################################################################
2232 11:41:05.615783
2233 11:41:06.182248 00080000 ################################################################
2234 11:41:06.182398
2235 11:41:06.758011 00100000 ################################################################
2236 11:41:06.758171
2237 11:41:07.319914 00180000 ################################################################
2238 11:41:07.320075
2239 11:41:07.877938 00200000 ################################################################
2240 11:41:07.878099
2241 11:41:08.452125 00280000 ################################################################
2242 11:41:08.452312
2243 11:41:09.031162 00300000 ################################################################
2244 11:41:09.031349
2245 11:41:09.599305 00380000 ################################################################
2246 11:41:09.599462
2247 11:41:10.168513 00400000 ################################################################
2248 11:41:10.168675
2249 11:41:10.740690 00480000 ################################################################
2250 11:41:10.740837
2251 11:41:11.309155 00500000 ############################################################### done.
2252 11:41:11.309302
2253 11:41:11.312331 Sending tftp read request... done.
2254 11:41:11.312444
2255 11:41:11.315921 Waiting for the transfer...
2256 11:41:11.316042
2257 11:41:11.316146 00000000 # done.
2258 11:41:11.316257
2259 11:41:11.325820 Command line loaded dynamically from TFTP file: 9849696/tftp-deploy-l116ez8b/kernel/cmdline
2260 11:41:11.325937
2261 11:41:11.345555 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9849696/extract-nfsrootfs-9d6hqosl,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2262 11:41:11.345690
2263 11:41:11.348989 Shutting down all USB controllers.
2264 11:41:11.349108
2265 11:41:11.352408 Removing current net device
2266 11:41:11.352519
2267 11:41:11.355225 Finalizing coreboot
2268 11:41:11.355344
2269 11:41:11.362392 Exiting depthcharge with code 4 at timestamp: 27211731
2270 11:41:11.362515
2271 11:41:11.362620
2272 11:41:11.362718 Starting kernel ...
2273 11:41:11.362825
2274 11:41:11.362920
2275 11:41:11.363536 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2276 11:41:11.363674 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2277 11:41:11.363798 Setting prompt string to ['Linux version [0-9]']
2278 11:41:11.363906 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2279 11:41:11.364024 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2281 11:45:37.364833 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2283 11:45:37.365942 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2285 11:45:37.366785 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2288 11:45:37.368079 end: 2 depthcharge-action (duration 00:05:00) [common]
2290 11:45:37.369135 Cleaning after the job
2291 11:45:37.369233 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849696/tftp-deploy-l116ez8b/ramdisk
2292 11:45:37.369861 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849696/tftp-deploy-l116ez8b/kernel
2293 11:45:37.370631 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849696/tftp-deploy-l116ez8b/nfsrootfs
2294 11:45:37.415010 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849696/tftp-deploy-l116ez8b/modules
2295 11:45:37.415399 start: 5.1 power-off (timeout 00:00:30) [common]
2296 11:45:37.415579 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=off'
2297 11:45:37.494009 >> Command sent successfully.
2298 11:45:37.499096 Returned 0 in 0 seconds
2299 11:45:37.599932 end: 5.1 power-off (duration 00:00:00) [common]
2301 11:45:37.600299 start: 5.2 read-feedback (timeout 00:10:00) [common]
2302 11:45:37.600593 Listened to connection for namespace 'common' for up to 1s
2303 11:45:38.605835 Finalising connection for namespace 'common'
2304 11:45:38.606540 Disconnecting from shell: Finalise
2305 11:45:38.606964
2306 11:45:38.708534 end: 5.2 read-feedback (duration 00:00:01) [common]
2307 11:45:38.709165 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9849696
2308 11:45:38.831858 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9849696
2309 11:45:38.832054 JobError: Your job cannot terminate cleanly.