Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 11:40:23.723343 lava-dispatcher, installed at version: 2023.01
2 11:40:23.723568 start: 0 validate
3 11:40:23.723701 Start time: 2023-04-03 11:40:23.723693+00:00 (UTC)
4 11:40:23.723834 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:40:23.723967 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230324.0%2Famd64%2Frootfs.cpio.gz exists
6 11:40:24.017861 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:40:24.018680 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1098-g8d34bf42efd9b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:40:28.050167 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:40:28.050969 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1098-g8d34bf42efd9b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 11:40:29.065251 validate duration: 5.34
12 11:40:29.065550 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:40:29.065647 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:40:29.065735 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:40:29.065838 Not decompressing ramdisk as can be used compressed.
16 11:40:29.065916 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230324.0/amd64/rootfs.cpio.gz
17 11:40:29.065979 saving as /var/lib/lava/dispatcher/tmp/9849695/tftp-deploy-pz5emci9/ramdisk/rootfs.cpio.gz
18 11:40:29.066037 total size: 35767022 (34MB)
19 11:40:29.067148 progress 0% (0MB)
20 11:40:29.076029 progress 5% (1MB)
21 11:40:29.084872 progress 10% (3MB)
22 11:40:29.093365 progress 15% (5MB)
23 11:40:29.101951 progress 20% (6MB)
24 11:40:29.110587 progress 25% (8MB)
25 11:40:29.119367 progress 30% (10MB)
26 11:40:29.128073 progress 35% (11MB)
27 11:40:29.136613 progress 40% (13MB)
28 11:40:29.145335 progress 45% (15MB)
29 11:40:29.154314 progress 50% (17MB)
30 11:40:29.163023 progress 55% (18MB)
31 11:40:29.171543 progress 60% (20MB)
32 11:40:29.180198 progress 65% (22MB)
33 11:40:29.188978 progress 70% (23MB)
34 11:40:29.197888 progress 75% (25MB)
35 11:40:29.206442 progress 80% (27MB)
36 11:40:29.214910 progress 85% (29MB)
37 11:40:29.223523 progress 90% (30MB)
38 11:40:29.231948 progress 95% (32MB)
39 11:40:29.240616 progress 100% (34MB)
40 11:40:29.240828 34MB downloaded in 0.17s (195.15MB/s)
41 11:40:29.240978 end: 1.1.1 http-download (duration 00:00:00) [common]
43 11:40:29.241222 end: 1.1 download-retry (duration 00:00:00) [common]
44 11:40:29.241307 start: 1.2 download-retry (timeout 00:10:00) [common]
45 11:40:29.241392 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 11:40:29.241530 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1098-g8d34bf42efd9b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 11:40:29.241600 saving as /var/lib/lava/dispatcher/tmp/9849695/tftp-deploy-pz5emci9/kernel/bzImage
48 11:40:29.241662 total size: 7880592 (7MB)
49 11:40:29.241768 No compression specified
50 11:40:29.242921 progress 0% (0MB)
51 11:40:29.245114 progress 5% (0MB)
52 11:40:29.247076 progress 10% (0MB)
53 11:40:29.249029 progress 15% (1MB)
54 11:40:29.250979 progress 20% (1MB)
55 11:40:29.252901 progress 25% (1MB)
56 11:40:29.254842 progress 30% (2MB)
57 11:40:29.256970 progress 35% (2MB)
58 11:40:29.259077 progress 40% (3MB)
59 11:40:29.261392 progress 45% (3MB)
60 11:40:29.263387 progress 50% (3MB)
61 11:40:29.265289 progress 55% (4MB)
62 11:40:29.267252 progress 60% (4MB)
63 11:40:29.269147 progress 65% (4MB)
64 11:40:29.271078 progress 70% (5MB)
65 11:40:29.273137 progress 75% (5MB)
66 11:40:29.275351 progress 80% (6MB)
67 11:40:29.277321 progress 85% (6MB)
68 11:40:29.279304 progress 90% (6MB)
69 11:40:29.281200 progress 95% (7MB)
70 11:40:29.283184 progress 100% (7MB)
71 11:40:29.283390 7MB downloaded in 0.04s (180.14MB/s)
72 11:40:29.283585 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:40:29.283817 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:40:29.283906 start: 1.3 download-retry (timeout 00:10:00) [common]
76 11:40:29.283993 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 11:40:29.284095 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1098-g8d34bf42efd9b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 11:40:29.284162 saving as /var/lib/lava/dispatcher/tmp/9849695/tftp-deploy-pz5emci9/modules/modules.tar
79 11:40:29.284223 total size: 251104 (0MB)
80 11:40:29.284283 Using unxz to decompress xz
81 11:40:29.287907 progress 13% (0MB)
82 11:40:29.288303 progress 26% (0MB)
83 11:40:29.288543 progress 39% (0MB)
84 11:40:29.289865 progress 52% (0MB)
85 11:40:29.291831 progress 65% (0MB)
86 11:40:29.293643 progress 78% (0MB)
87 11:40:29.295531 progress 91% (0MB)
88 11:40:29.297359 progress 100% (0MB)
89 11:40:29.302797 0MB downloaded in 0.02s (12.90MB/s)
90 11:40:29.303072 end: 1.3.1 http-download (duration 00:00:00) [common]
92 11:40:29.303336 end: 1.3 download-retry (duration 00:00:00) [common]
93 11:40:29.303432 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 11:40:29.303535 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 11:40:29.303621 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 11:40:29.303708 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 11:40:29.303894 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0
98 11:40:29.303997 makedir: /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin
99 11:40:29.304084 makedir: /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/tests
100 11:40:29.304166 makedir: /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/results
101 11:40:29.304278 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-add-keys
102 11:40:29.304408 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-add-sources
103 11:40:29.304521 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-background-process-start
104 11:40:29.304634 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-background-process-stop
105 11:40:29.304742 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-common-functions
106 11:40:29.304849 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-echo-ipv4
107 11:40:29.304960 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-install-packages
108 11:40:29.305066 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-installed-packages
109 11:40:29.305172 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-os-build
110 11:40:29.305278 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-probe-channel
111 11:40:29.305387 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-probe-ip
112 11:40:29.305521 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-target-ip
113 11:40:29.305643 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-target-mac
114 11:40:29.305748 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-target-storage
115 11:40:29.305859 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-test-case
116 11:40:29.305966 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-test-event
117 11:40:29.306072 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-test-feedback
118 11:40:29.306178 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-test-raise
119 11:40:29.306289 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-test-reference
120 11:40:29.306396 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-test-runner
121 11:40:29.306501 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-test-set
122 11:40:29.306608 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-test-shell
123 11:40:29.306715 Updating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-install-packages (oe)
124 11:40:29.306826 Updating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/bin/lava-installed-packages (oe)
125 11:40:29.306921 Creating /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/environment
126 11:40:29.307008 LAVA metadata
127 11:40:29.307078 - LAVA_JOB_ID=9849695
128 11:40:29.307171 - LAVA_DISPATCHER_IP=192.168.201.1
129 11:40:29.307268 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 11:40:29.307335 skipped lava-vland-overlay
131 11:40:29.307409 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 11:40:29.307490 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 11:40:29.307555 skipped lava-multinode-overlay
134 11:40:29.307626 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 11:40:29.307705 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 11:40:29.307778 Loading test definitions
137 11:40:29.307871 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 11:40:29.307943 Using /lava-9849695 at stage 0
139 11:40:29.308188 uuid=9849695_1.4.2.3.1 testdef=None
140 11:40:29.308274 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 11:40:29.308356 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 11:40:29.308829 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 11:40:29.309062 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 11:40:29.309655 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 11:40:29.309887 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 11:40:29.310380 runner path: /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/0/tests/0_cros-ec test_uuid 9849695_1.4.2.3.1
149 11:40:29.310521 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 11:40:29.310727 Creating lava-test-runner.conf files
152 11:40:29.310817 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9849695/lava-overlay-gf2uwwy0/lava-9849695/0 for stage 0
153 11:40:29.310912 - 0_cros-ec
154 11:40:29.311002 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
155 11:40:29.311085 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
156 11:40:29.317526 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
157 11:40:29.317649 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
158 11:40:29.317735 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
159 11:40:29.317823 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
160 11:40:29.317910 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
161 11:40:30.162784 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
162 11:40:30.163255 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
163 11:40:30.163418 extracting modules file /var/lib/lava/dispatcher/tmp/9849695/tftp-deploy-pz5emci9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9849695/extract-overlay-ramdisk-fhzlimvf/ramdisk
164 11:40:30.174181 end: 1.4.4 extract-modules (duration 00:00:00) [common]
165 11:40:30.174370 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
166 11:40:30.174507 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9849695/compress-overlay-zyb2m_p2/overlay-1.4.2.4.tar.gz to ramdisk
167 11:40:30.174612 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9849695/compress-overlay-zyb2m_p2/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9849695/extract-overlay-ramdisk-fhzlimvf/ramdisk
168 11:40:30.181673 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
169 11:40:30.181827 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
170 11:40:30.181962 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
171 11:40:30.182108 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
172 11:40:30.182227 Building ramdisk /var/lib/lava/dispatcher/tmp/9849695/extract-overlay-ramdisk-fhzlimvf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9849695/extract-overlay-ramdisk-fhzlimvf/ramdisk
173 11:40:30.518817 >> 184055 blocks
174 11:40:33.986763 rename /var/lib/lava/dispatcher/tmp/9849695/extract-overlay-ramdisk-fhzlimvf/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9849695/tftp-deploy-pz5emci9/ramdisk/ramdisk.cpio.gz
175 11:40:33.987202 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
176 11:40:33.987324 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
177 11:40:33.987429 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
178 11:40:33.987533 No mkimage arch provided, not using FIT.
179 11:40:33.987628 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
180 11:40:33.987717 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
181 11:40:33.987819 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
182 11:40:33.987912 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
183 11:40:33.988001 No LXC device requested
184 11:40:33.988123 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
185 11:40:33.988243 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
186 11:40:33.988327 end: 1.6 deploy-device-env (duration 00:00:00) [common]
187 11:40:33.988408 Checking files for TFTP limit of 4294967296 bytes.
188 11:40:33.988814 end: 1 tftp-deploy (duration 00:00:05) [common]
189 11:40:33.988917 start: 2 depthcharge-action (timeout 00:05:00) [common]
190 11:40:33.989010 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
191 11:40:33.989190 substitutions:
192 11:40:33.989265 - {DTB}: None
193 11:40:33.989329 - {INITRD}: 9849695/tftp-deploy-pz5emci9/ramdisk/ramdisk.cpio.gz
194 11:40:33.989390 - {KERNEL}: 9849695/tftp-deploy-pz5emci9/kernel/bzImage
195 11:40:33.989450 - {LAVA_MAC}: None
196 11:40:33.989549 - {PRESEED_CONFIG}: None
197 11:40:33.989607 - {PRESEED_LOCAL}: None
198 11:40:33.989664 - {RAMDISK}: 9849695/tftp-deploy-pz5emci9/ramdisk/ramdisk.cpio.gz
199 11:40:33.989722 - {ROOT_PART}: None
200 11:40:33.989783 - {ROOT}: None
201 11:40:33.989842 - {SERVER_IP}: 192.168.201.1
202 11:40:33.989898 - {TEE}: None
203 11:40:33.989954 Parsed boot commands:
204 11:40:33.990010 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
205 11:40:33.990175 Parsed boot commands: tftpboot 192.168.201.1 9849695/tftp-deploy-pz5emci9/kernel/bzImage 9849695/tftp-deploy-pz5emci9/kernel/cmdline 9849695/tftp-deploy-pz5emci9/ramdisk/ramdisk.cpio.gz
206 11:40:33.990264 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
207 11:40:33.990353 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
208 11:40:33.990452 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
209 11:40:33.990562 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
210 11:40:33.990670 Not connected, no need to disconnect.
211 11:40:33.990773 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
212 11:40:33.990857 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
213 11:40:33.990924 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-7'
214 11:40:33.994334 Setting prompt string to ['lava-test: # ']
215 11:40:33.994665 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
216 11:40:33.994774 end: 2.2.1 reset-connection (duration 00:00:00) [common]
217 11:40:33.994875 start: 2.2.2 reset-device (timeout 00:05:00) [common]
218 11:40:33.995004 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
219 11:40:33.995279 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=reboot'
220 11:40:39.129462 >> Command sent successfully.
221 11:40:39.131824 Returned 0 in 5 seconds
222 11:40:39.232603 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
224 11:40:39.232922 end: 2.2.2 reset-device (duration 00:00:05) [common]
225 11:40:39.233027 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
226 11:40:39.233113 Setting prompt string to 'Starting depthcharge on Voema...'
227 11:40:39.233180 Changing prompt to 'Starting depthcharge on Voema...'
228 11:40:39.233267 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
229 11:40:39.233667 [Enter `^Ec?' for help]
230 11:40:40.833445
231 11:40:40.833744
232 11:40:40.843359 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
233 11:40:40.846632 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
234 11:40:40.853376 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
235 11:40:40.857065 CPU: AES supported, TXT NOT supported, VT supported
236 11:40:40.863695 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
237 11:40:40.869980 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
238 11:40:40.873522 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
239 11:40:40.876575 VBOOT: Loading verstage.
240 11:40:40.880211 FMAP: Found "FLASH" version 1.1 at 0x1804000.
241 11:40:40.886769 FMAP: base = 0x0 size = 0x2000000 #areas = 32
242 11:40:40.889856 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
243 11:40:40.900221 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
244 11:40:40.907287 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
245 11:40:40.907476
246 11:40:40.907625
247 11:40:40.920562 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
248 11:40:40.934533 Probing TPM: . done!
249 11:40:40.937669 TPM ready after 0 ms
250 11:40:40.941219 Connected to device vid:did:rid of 1ae0:0028:00
251 11:40:40.952389 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
252 11:40:40.959182 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
253 11:40:40.962256 Initialized TPM device CR50 revision 0
254 11:40:41.033763 tlcl_send_startup: Startup return code is 0
255 11:40:41.034039 TPM: setup succeeded
256 11:40:41.049258 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
257 11:40:41.063372 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
258 11:40:41.076222 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
259 11:40:41.085862 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
260 11:40:41.089305 Chrome EC: UHEPI supported
261 11:40:41.093365 Phase 1
262 11:40:41.095973 FMAP: area GBB found @ 1805000 (458752 bytes)
263 11:40:41.106301 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
264 11:40:41.113210 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
265 11:40:41.119552 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
266 11:40:41.125964 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
267 11:40:41.129738 Recovery requested (1009000e)
268 11:40:41.132613 TPM: Extending digest for VBOOT: boot mode into PCR 0
269 11:40:41.144164 tlcl_extend: response is 0
270 11:40:41.151059 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
271 11:40:41.160705 tlcl_extend: response is 0
272 11:40:41.167555 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
273 11:40:41.174022 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
274 11:40:41.180871 BS: verstage times (exec / console): total (unknown) / 142 ms
275 11:40:41.181051
276 11:40:41.181206
277 11:40:41.194047 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
278 11:40:41.200625 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
279 11:40:41.204139 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
280 11:40:41.207635 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
281 11:40:41.213984 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
282 11:40:41.217672 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
283 11:40:41.220864 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
284 11:40:41.224211 TCO_STS: 0000 0000
285 11:40:41.227313 GEN_PMCON: d0015038 00002200
286 11:40:41.230698 GBLRST_CAUSE: 00000000 00000000
287 11:40:41.230836 HPR_CAUSE0: 00000000
288 11:40:41.234072 prev_sleep_state 5
289 11:40:41.237387 Boot Count incremented to 18025
290 11:40:41.243986 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 11:40:41.250878 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 11:40:41.257314 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 11:40:41.263998 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
294 11:40:41.269026 Chrome EC: UHEPI supported
295 11:40:41.276034 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
296 11:40:41.288717 Probing TPM: done!
297 11:40:41.295199 Connected to device vid:did:rid of 1ae0:0028:00
298 11:40:41.305254 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
299 11:40:41.308430 Initialized TPM device CR50 revision 0
300 11:40:41.326588 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
301 11:40:41.330045 MRC: Hash idx 0x100b comparison successful.
302 11:40:41.333312 MRC cache found, size faa8
303 11:40:41.333399 bootmode is set to: 2
304 11:40:41.336979 SPD index = 0
305 11:40:41.343606 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
306 11:40:41.346690 SPD: module type is LPDDR4X
307 11:40:41.350128 SPD: module part number is MT53E512M64D4NW-046
308 11:40:41.356473 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
309 11:40:41.359930 SPD: device width 16 bits, bus width 16 bits
310 11:40:41.366539 SPD: module size is 1024 MB (per channel)
311 11:40:41.798303 CBMEM:
312 11:40:41.801602 IMD: root @ 0x76fff000 254 entries.
313 11:40:41.804998 IMD: root @ 0x76ffec00 62 entries.
314 11:40:41.808034 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
315 11:40:41.814817 FMAP: area RW_VPD found @ f35000 (8192 bytes)
316 11:40:41.818416 External stage cache:
317 11:40:41.821295 IMD: root @ 0x7b3ff000 254 entries.
318 11:40:41.824608 IMD: root @ 0x7b3fec00 62 entries.
319 11:40:41.840286 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
320 11:40:41.847058 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
321 11:40:41.854136 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
322 11:40:41.867548 MRC: 'RECOVERY_MRC_CACHE' does not need update.
323 11:40:41.874569 cse_lite: Skip switching to RW in the recovery path
324 11:40:41.875149 8 DIMMs found
325 11:40:41.875590 SMM Memory Map
326 11:40:41.877524 SMRAM : 0x7b000000 0x800000
327 11:40:41.884206 Subregion 0: 0x7b000000 0x200000
328 11:40:41.887676 Subregion 1: 0x7b200000 0x200000
329 11:40:41.890915 Subregion 2: 0x7b400000 0x400000
330 11:40:41.891471 top_of_ram = 0x77000000
331 11:40:41.897570 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
332 11:40:41.904243 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
333 11:40:41.907194 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
334 11:40:41.913900 MTRR Range: Start=ff000000 End=0 (Size 1000000)
335 11:40:41.920682 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
336 11:40:41.927455 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
337 11:40:41.937275 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
338 11:40:41.940574 Processing 211 relocs. Offset value of 0x74c0b000
339 11:40:41.950125 BS: romstage times (exec / console): total (unknown) / 277 ms
340 11:40:41.956049
341 11:40:41.956415
342 11:40:41.966506 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
343 11:40:41.969551 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 11:40:41.979604 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 11:40:41.986246 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 11:40:41.992984 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
347 11:40:41.999705 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
348 11:40:42.046640 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
349 11:40:42.050330 Processing 5008 relocs. Offset value of 0x75d98000
350 11:40:42.056905 BS: postcar times (exec / console): total (unknown) / 59 ms
351 11:40:42.057307
352 11:40:42.057657
353 11:40:42.070234 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
354 11:40:42.070605 Normal boot
355 11:40:42.073807 FW_CONFIG value is 0x804c02
356 11:40:42.077150 PCI: 00:07.0 disabled by fw_config
357 11:40:42.080510 PCI: 00:07.1 disabled by fw_config
358 11:40:42.083577 PCI: 00:0d.2 disabled by fw_config
359 11:40:42.090795 PCI: 00:1c.7 disabled by fw_config
360 11:40:42.093437 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 11:40:42.100044 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 11:40:42.103514 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
363 11:40:42.110183 GENERIC: 0.0 disabled by fw_config
364 11:40:42.113438 GENERIC: 1.0 disabled by fw_config
365 11:40:42.116946 fw_config match found: DB_USB=USB3_ACTIVE
366 11:40:42.120048 fw_config match found: DB_USB=USB3_ACTIVE
367 11:40:42.123176 fw_config match found: DB_USB=USB3_ACTIVE
368 11:40:42.129727 fw_config match found: DB_USB=USB3_ACTIVE
369 11:40:42.133586 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 11:40:42.140035 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
371 11:40:42.149758 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
372 11:40:42.156802 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
373 11:40:42.159739 microcode: sig=0x806c1 pf=0x80 revision=0x86
374 11:40:42.166363 microcode: Update skipped, already up-to-date
375 11:40:42.173555 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
376 11:40:42.201057 Detected 4 core, 8 thread CPU.
377 11:40:42.204433 Setting up SMI for CPU
378 11:40:42.207889 IED base = 0x7b400000
379 11:40:42.208376 IED size = 0x00400000
380 11:40:42.211030 Will perform SMM setup.
381 11:40:42.217865 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
382 11:40:42.224436 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
383 11:40:42.231109 Processing 16 relocs. Offset value of 0x00030000
384 11:40:42.234263 Attempting to start 7 APs
385 11:40:42.237225 Waiting for 10ms after sending INIT.
386 11:40:42.253316 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
387 11:40:42.253617 done.
388 11:40:42.256251 AP: slot 6 apic_id 4.
389 11:40:42.259759 AP: slot 3 apic_id 5.
390 11:40:42.259993 AP: slot 4 apic_id 6.
391 11:40:42.262913 AP: slot 7 apic_id 7.
392 11:40:42.266343 AP: slot 5 apic_id 2.
393 11:40:42.266614 AP: slot 2 apic_id 3.
394 11:40:42.273019 Waiting for 2nd SIPI to complete...done.
395 11:40:42.279697 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 11:40:42.286049 Processing 13 relocs. Offset value of 0x00038000
397 11:40:42.286319 Unable to locate Global NVS
398 11:40:42.296219 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
399 11:40:42.299594 Installing permanent SMM handler to 0x7b000000
400 11:40:42.309213 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
401 11:40:42.312969 Processing 794 relocs. Offset value of 0x7b010000
402 11:40:42.322816 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
403 11:40:42.326048 Processing 13 relocs. Offset value of 0x7b008000
404 11:40:42.332885 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
405 11:40:42.339513 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
406 11:40:42.342640 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
407 11:40:42.349123 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
408 11:40:42.355964 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
409 11:40:42.362765 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
410 11:40:42.369344 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
411 11:40:42.369939 Unable to locate Global NVS
412 11:40:42.379144 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
413 11:40:42.382726 Clearing SMI status registers
414 11:40:42.383277 SMI_STS: PM1
415 11:40:42.385951 PM1_STS: PWRBTN
416 11:40:42.392650 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
417 11:40:42.395879 In relocation handler: CPU 0
418 11:40:42.399213 New SMBASE=0x7b000000 IEDBASE=0x7b400000
419 11:40:42.405797 Writing SMRR. base = 0x7b000006, mask=0xff800c00
420 11:40:42.406112 Relocation complete.
421 11:40:42.415827 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
422 11:40:42.416146 In relocation handler: CPU 1
423 11:40:42.422487 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
424 11:40:42.422799 Relocation complete.
425 11:40:42.428872 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
426 11:40:42.432728 In relocation handler: CPU 3
427 11:40:42.439264 New SMBASE=0x7afff400 IEDBASE=0x7b400000
428 11:40:42.439573 Relocation complete.
429 11:40:42.445548 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
430 11:40:42.449183 In relocation handler: CPU 6
431 11:40:42.455629 New SMBASE=0x7affe800 IEDBASE=0x7b400000
432 11:40:42.459022 Writing SMRR. base = 0x7b000006, mask=0xff800c00
433 11:40:42.462493 Relocation complete.
434 11:40:42.469182 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
435 11:40:42.472564 In relocation handler: CPU 5
436 11:40:42.475549 New SMBASE=0x7affec00 IEDBASE=0x7b400000
437 11:40:42.478973 Writing SMRR. base = 0x7b000006, mask=0xff800c00
438 11:40:42.482294 Relocation complete.
439 11:40:42.489200 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
440 11:40:42.492599 In relocation handler: CPU 2
441 11:40:42.495925 New SMBASE=0x7afff800 IEDBASE=0x7b400000
442 11:40:42.499256 Relocation complete.
443 11:40:42.505493 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
444 11:40:42.508988 In relocation handler: CPU 4
445 11:40:42.512462 New SMBASE=0x7afff000 IEDBASE=0x7b400000
446 11:40:42.520016 Writing SMRR. base = 0x7b000006, mask=0xff800c00
447 11:40:42.520476 Relocation complete.
448 11:40:42.527269 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
449 11:40:42.530489 In relocation handler: CPU 7
450 11:40:42.534508 New SMBASE=0x7affe400 IEDBASE=0x7b400000
451 11:40:42.537358 Relocation complete.
452 11:40:42.537880 Initializing CPU #0
453 11:40:42.541135 CPU: vendor Intel device 806c1
454 11:40:42.547507 CPU: family 06, model 8c, stepping 01
455 11:40:42.547968 Clearing out pending MCEs
456 11:40:42.550840 Setting up local APIC...
457 11:40:42.554251 apic_id: 0x00 done.
458 11:40:42.557567 Turbo is available but hidden
459 11:40:42.561153 Turbo is available and visible
460 11:40:42.564317 microcode: Update skipped, already up-to-date
461 11:40:42.567843 CPU #0 initialized
462 11:40:42.568281 Initializing CPU #5
463 11:40:42.570969 Initializing CPU #2
464 11:40:42.574436 CPU: vendor Intel device 806c1
465 11:40:42.577509 CPU: family 06, model 8c, stepping 01
466 11:40:42.580809 CPU: vendor Intel device 806c1
467 11:40:42.584464 CPU: family 06, model 8c, stepping 01
468 11:40:42.587673 Clearing out pending MCEs
469 11:40:42.591006 Clearing out pending MCEs
470 11:40:42.591445 Setting up local APIC...
471 11:40:42.594262 Initializing CPU #1
472 11:40:42.597495 apic_id: 0x02 done.
473 11:40:42.597940 Setting up local APIC...
474 11:40:42.601130 Initializing CPU #7
475 11:40:42.603927 Initializing CPU #4
476 11:40:42.607375 CPU: vendor Intel device 806c1
477 11:40:42.610843 CPU: family 06, model 8c, stepping 01
478 11:40:42.614179 CPU: vendor Intel device 806c1
479 11:40:42.617388 CPU: family 06, model 8c, stepping 01
480 11:40:42.620634 Clearing out pending MCEs
481 11:40:42.621237 Clearing out pending MCEs
482 11:40:42.624011 Setting up local APIC...
483 11:40:42.627304 Initializing CPU #3
484 11:40:42.627849 Initializing CPU #6
485 11:40:42.630654 CPU: vendor Intel device 806c1
486 11:40:42.637266 CPU: family 06, model 8c, stepping 01
487 11:40:42.640420 CPU: vendor Intel device 806c1
488 11:40:42.643599 CPU: family 06, model 8c, stepping 01
489 11:40:42.643685 Clearing out pending MCEs
490 11:40:42.647039 Setting up local APIC...
491 11:40:42.653643 microcode: Update skipped, already up-to-date
492 11:40:42.653728 Clearing out pending MCEs
493 11:40:42.657112 Setting up local APIC...
494 11:40:42.660484 CPU #5 initialized
495 11:40:42.660570 apic_id: 0x03 done.
496 11:40:42.663456 apic_id: 0x06 done.
497 11:40:42.667278 apic_id: 0x07 done.
498 11:40:42.670494 microcode: Update skipped, already up-to-date
499 11:40:42.673787 microcode: Update skipped, already up-to-date
500 11:40:42.676724 CPU #4 initialized
501 11:40:42.680008 CPU #7 initialized
502 11:40:42.683375 microcode: Update skipped, already up-to-date
503 11:40:42.686549 CPU: vendor Intel device 806c1
504 11:40:42.690051 CPU: family 06, model 8c, stepping 01
505 11:40:42.693251 apic_id: 0x05 done.
506 11:40:42.696652 Setting up local APIC...
507 11:40:42.696738 CPU #2 initialized
508 11:40:42.699860 apic_id: 0x04 done.
509 11:40:42.703684 microcode: Update skipped, already up-to-date
510 11:40:42.709956 microcode: Update skipped, already up-to-date
511 11:40:42.710041 CPU #3 initialized
512 11:40:42.713105 CPU #6 initialized
513 11:40:42.713177 Clearing out pending MCEs
514 11:40:42.716946 Setting up local APIC...
515 11:40:42.719992 apic_id: 0x01 done.
516 11:40:42.723602 microcode: Update skipped, already up-to-date
517 11:40:42.726487 CPU #1 initialized
518 11:40:42.729922 bsp_do_flight_plan done after 455 msecs.
519 11:40:42.733515 CPU: frequency set to 4000 MHz
520 11:40:42.736678 Enabling SMIs.
521 11:40:42.743325 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
522 11:40:42.757787 SATAXPCIE1 indicates PCIe NVMe is present
523 11:40:42.761403 Probing TPM: done!
524 11:40:42.764569 Connected to device vid:did:rid of 1ae0:0028:00
525 11:40:42.775413 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
526 11:40:42.778625 Initialized TPM device CR50 revision 0
527 11:40:42.781897 Enabling S0i3.4
528 11:40:42.788709 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
529 11:40:42.791750 Found a VBT of 8704 bytes after decompression
530 11:40:42.798643 cse_lite: CSE RO boot. HybridStorageMode disabled
531 11:40:42.805048 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
532 11:40:42.881358 FSPS returned 0
533 11:40:42.884853 Executing Phase 1 of FspMultiPhaseSiInit
534 11:40:42.894657 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
535 11:40:42.898036 port C0 DISC req: usage 1 usb3 1 usb2 5
536 11:40:42.901322 Raw Buffer output 0 00000511
537 11:40:42.904447 Raw Buffer output 1 00000000
538 11:40:42.908105 pmc_send_ipc_cmd succeeded
539 11:40:42.915103 port C1 DISC req: usage 1 usb3 2 usb2 3
540 11:40:42.915188 Raw Buffer output 0 00000321
541 11:40:42.918293 Raw Buffer output 1 00000000
542 11:40:42.922221 pmc_send_ipc_cmd succeeded
543 11:40:42.927511 Detected 4 core, 8 thread CPU.
544 11:40:42.930563 Detected 4 core, 8 thread CPU.
545 11:40:43.164822 Display FSP Version Info HOB
546 11:40:43.167905 Reference Code - CPU = a.0.4c.31
547 11:40:43.171783 uCode Version = 0.0.0.86
548 11:40:43.174762 TXT ACM version = ff.ff.ff.ffff
549 11:40:43.177995 Reference Code - ME = a.0.4c.31
550 11:40:43.181189 MEBx version = 0.0.0.0
551 11:40:43.184645 ME Firmware Version = Consumer SKU
552 11:40:43.187986 Reference Code - PCH = a.0.4c.31
553 11:40:43.191396 PCH-CRID Status = Disabled
554 11:40:43.194570 PCH-CRID Original Value = ff.ff.ff.ffff
555 11:40:43.198173 PCH-CRID New Value = ff.ff.ff.ffff
556 11:40:43.201378 OPROM - RST - RAID = ff.ff.ff.ffff
557 11:40:43.204905 PCH Hsio Version = 4.0.0.0
558 11:40:43.208262 Reference Code - SA - System Agent = a.0.4c.31
559 11:40:43.211655 Reference Code - MRC = 2.0.0.1
560 11:40:43.214787 SA - PCIe Version = a.0.4c.31
561 11:40:43.218267 SA-CRID Status = Disabled
562 11:40:43.221342 SA-CRID Original Value = 0.0.0.1
563 11:40:43.224456 SA-CRID New Value = 0.0.0.1
564 11:40:43.227931 OPROM - VBIOS = ff.ff.ff.ffff
565 11:40:43.231387 IO Manageability Engine FW Version = 11.1.4.0
566 11:40:43.234616 PHY Build Version = 0.0.0.e0
567 11:40:43.237626 Thunderbolt(TM) FW Version = 0.0.0.0
568 11:40:43.244576 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
569 11:40:43.247824 ITSS IRQ Polarities Before:
570 11:40:43.247909 IPC0: 0xffffffff
571 11:40:43.251111 IPC1: 0xffffffff
572 11:40:43.251194 IPC2: 0xffffffff
573 11:40:43.254578 IPC3: 0xffffffff
574 11:40:43.257654 ITSS IRQ Polarities After:
575 11:40:43.257738 IPC0: 0xffffffff
576 11:40:43.261072 IPC1: 0xffffffff
577 11:40:43.261157 IPC2: 0xffffffff
578 11:40:43.264479 IPC3: 0xffffffff
579 11:40:43.268214 Found PCIe Root Port #9 at PCI: 00:1d.0.
580 11:40:43.280903 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
581 11:40:43.290873 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
582 11:40:43.304376 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
583 11:40:43.310749 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
584 11:40:43.310839 Enumerating buses...
585 11:40:43.317550 Show all devs... Before device enumeration.
586 11:40:43.320714 Root Device: enabled 1
587 11:40:43.320800 DOMAIN: 0000: enabled 1
588 11:40:43.324339 CPU_CLUSTER: 0: enabled 1
589 11:40:43.327321 PCI: 00:00.0: enabled 1
590 11:40:43.331010 PCI: 00:02.0: enabled 1
591 11:40:43.331095 PCI: 00:04.0: enabled 1
592 11:40:43.333961 PCI: 00:05.0: enabled 1
593 11:40:43.337620 PCI: 00:06.0: enabled 0
594 11:40:43.337711 PCI: 00:07.0: enabled 0
595 11:40:43.340547 PCI: 00:07.1: enabled 0
596 11:40:43.344180 PCI: 00:07.2: enabled 0
597 11:40:43.347281 PCI: 00:07.3: enabled 0
598 11:40:43.347372 PCI: 00:08.0: enabled 1
599 11:40:43.350780 PCI: 00:09.0: enabled 0
600 11:40:43.353909 PCI: 00:0a.0: enabled 0
601 11:40:43.357403 PCI: 00:0d.0: enabled 1
602 11:40:43.357562 PCI: 00:0d.1: enabled 0
603 11:40:43.360861 PCI: 00:0d.2: enabled 0
604 11:40:43.364168 PCI: 00:0d.3: enabled 0
605 11:40:43.367354 PCI: 00:0e.0: enabled 0
606 11:40:43.367447 PCI: 00:10.2: enabled 1
607 11:40:43.370646 PCI: 00:10.6: enabled 0
608 11:40:43.373819 PCI: 00:10.7: enabled 0
609 11:40:43.373908 PCI: 00:12.0: enabled 0
610 11:40:43.377255 PCI: 00:12.6: enabled 0
611 11:40:43.380548 PCI: 00:13.0: enabled 0
612 11:40:43.383924 PCI: 00:14.0: enabled 1
613 11:40:43.384018 PCI: 00:14.1: enabled 0
614 11:40:43.387005 PCI: 00:14.2: enabled 1
615 11:40:43.390590 PCI: 00:14.3: enabled 1
616 11:40:43.393787 PCI: 00:15.0: enabled 1
617 11:40:43.393892 PCI: 00:15.1: enabled 1
618 11:40:43.397261 PCI: 00:15.2: enabled 1
619 11:40:43.400750 PCI: 00:15.3: enabled 1
620 11:40:43.403914 PCI: 00:16.0: enabled 1
621 11:40:43.404004 PCI: 00:16.1: enabled 0
622 11:40:43.407178 PCI: 00:16.2: enabled 0
623 11:40:43.410814 PCI: 00:16.3: enabled 0
624 11:40:43.410910 PCI: 00:16.4: enabled 0
625 11:40:43.413635 PCI: 00:16.5: enabled 0
626 11:40:43.417184 PCI: 00:17.0: enabled 1
627 11:40:43.420460 PCI: 00:19.0: enabled 0
628 11:40:43.420556 PCI: 00:19.1: enabled 1
629 11:40:43.423670 PCI: 00:19.2: enabled 0
630 11:40:43.427226 PCI: 00:1c.0: enabled 1
631 11:40:43.430419 PCI: 00:1c.1: enabled 0
632 11:40:43.430520 PCI: 00:1c.2: enabled 0
633 11:40:43.433917 PCI: 00:1c.3: enabled 0
634 11:40:43.436940 PCI: 00:1c.4: enabled 0
635 11:40:43.440531 PCI: 00:1c.5: enabled 0
636 11:40:43.440627 PCI: 00:1c.6: enabled 1
637 11:40:43.443647 PCI: 00:1c.7: enabled 0
638 11:40:43.447076 PCI: 00:1d.0: enabled 1
639 11:40:43.450492 PCI: 00:1d.1: enabled 0
640 11:40:43.450595 PCI: 00:1d.2: enabled 1
641 11:40:43.453914 PCI: 00:1d.3: enabled 0
642 11:40:43.456960 PCI: 00:1e.0: enabled 1
643 11:40:43.457052 PCI: 00:1e.1: enabled 0
644 11:40:43.460525 PCI: 00:1e.2: enabled 1
645 11:40:43.464058 PCI: 00:1e.3: enabled 1
646 11:40:43.467102 PCI: 00:1f.0: enabled 1
647 11:40:43.467200 PCI: 00:1f.1: enabled 0
648 11:40:43.470313 PCI: 00:1f.2: enabled 1
649 11:40:43.473609 PCI: 00:1f.3: enabled 1
650 11:40:43.477083 PCI: 00:1f.4: enabled 0
651 11:40:43.477201 PCI: 00:1f.5: enabled 1
652 11:40:43.480331 PCI: 00:1f.6: enabled 0
653 11:40:43.483776 PCI: 00:1f.7: enabled 0
654 11:40:43.483870 APIC: 00: enabled 1
655 11:40:43.486977 GENERIC: 0.0: enabled 1
656 11:40:43.490293 GENERIC: 0.0: enabled 1
657 11:40:43.493714 GENERIC: 1.0: enabled 1
658 11:40:43.493829 GENERIC: 0.0: enabled 1
659 11:40:43.497334 GENERIC: 1.0: enabled 1
660 11:40:43.500084 USB0 port 0: enabled 1
661 11:40:43.503714 GENERIC: 0.0: enabled 1
662 11:40:43.503805 USB0 port 0: enabled 1
663 11:40:43.506938 GENERIC: 0.0: enabled 1
664 11:40:43.510344 I2C: 00:1a: enabled 1
665 11:40:43.510437 I2C: 00:31: enabled 1
666 11:40:43.513635 I2C: 00:32: enabled 1
667 11:40:43.516795 I2C: 00:10: enabled 1
668 11:40:43.516904 I2C: 00:15: enabled 1
669 11:40:43.520291 GENERIC: 0.0: enabled 0
670 11:40:43.523572 GENERIC: 1.0: enabled 0
671 11:40:43.526737 GENERIC: 0.0: enabled 1
672 11:40:43.526823 SPI: 00: enabled 1
673 11:40:43.530394 SPI: 00: enabled 1
674 11:40:43.530479 PNP: 0c09.0: enabled 1
675 11:40:43.533696 GENERIC: 0.0: enabled 1
676 11:40:43.537121 USB3 port 0: enabled 1
677 11:40:43.540285 USB3 port 1: enabled 1
678 11:40:43.540375 USB3 port 2: enabled 0
679 11:40:43.543696 USB3 port 3: enabled 0
680 11:40:43.546740 USB2 port 0: enabled 0
681 11:40:43.546826 USB2 port 1: enabled 1
682 11:40:43.550341 USB2 port 2: enabled 1
683 11:40:43.553408 USB2 port 3: enabled 0
684 11:40:43.556911 USB2 port 4: enabled 1
685 11:40:43.556996 USB2 port 5: enabled 0
686 11:40:43.560243 USB2 port 6: enabled 0
687 11:40:43.563408 USB2 port 7: enabled 0
688 11:40:43.563494 USB2 port 8: enabled 0
689 11:40:43.566929 USB2 port 9: enabled 0
690 11:40:43.570557 USB3 port 0: enabled 0
691 11:40:43.570643 USB3 port 1: enabled 1
692 11:40:43.573417 USB3 port 2: enabled 0
693 11:40:43.576751 USB3 port 3: enabled 0
694 11:40:43.580166 GENERIC: 0.0: enabled 1
695 11:40:43.580252 GENERIC: 1.0: enabled 1
696 11:40:43.583719 APIC: 01: enabled 1
697 11:40:43.586825 APIC: 03: enabled 1
698 11:40:43.586917 APIC: 05: enabled 1
699 11:40:43.590282 APIC: 06: enabled 1
700 11:40:43.590375 APIC: 02: enabled 1
701 11:40:43.593854 APIC: 04: enabled 1
702 11:40:43.597090 APIC: 07: enabled 1
703 11:40:43.597176 Compare with tree...
704 11:40:43.600166 Root Device: enabled 1
705 11:40:43.603396 DOMAIN: 0000: enabled 1
706 11:40:43.606896 PCI: 00:00.0: enabled 1
707 11:40:43.606994 PCI: 00:02.0: enabled 1
708 11:40:43.610143 PCI: 00:04.0: enabled 1
709 11:40:43.613618 GENERIC: 0.0: enabled 1
710 11:40:43.616735 PCI: 00:05.0: enabled 1
711 11:40:43.620003 PCI: 00:06.0: enabled 0
712 11:40:43.620087 PCI: 00:07.0: enabled 0
713 11:40:43.623682 GENERIC: 0.0: enabled 1
714 11:40:43.626964 PCI: 00:07.1: enabled 0
715 11:40:43.630012 GENERIC: 1.0: enabled 1
716 11:40:43.633645 PCI: 00:07.2: enabled 0
717 11:40:43.633729 GENERIC: 0.0: enabled 1
718 11:40:43.636822 PCI: 00:07.3: enabled 0
719 11:40:43.639975 GENERIC: 1.0: enabled 1
720 11:40:43.643322 PCI: 00:08.0: enabled 1
721 11:40:43.646571 PCI: 00:09.0: enabled 0
722 11:40:43.646660 PCI: 00:0a.0: enabled 0
723 11:40:43.650103 PCI: 00:0d.0: enabled 1
724 11:40:43.653106 USB0 port 0: enabled 1
725 11:40:43.656545 USB3 port 0: enabled 1
726 11:40:43.659994 USB3 port 1: enabled 1
727 11:40:43.660080 USB3 port 2: enabled 0
728 11:40:43.663278 USB3 port 3: enabled 0
729 11:40:43.666532 PCI: 00:0d.1: enabled 0
730 11:40:43.669871 PCI: 00:0d.2: enabled 0
731 11:40:43.673084 GENERIC: 0.0: enabled 1
732 11:40:43.673170 PCI: 00:0d.3: enabled 0
733 11:40:43.676431 PCI: 00:0e.0: enabled 0
734 11:40:43.680021 PCI: 00:10.2: enabled 1
735 11:40:43.683320 PCI: 00:10.6: enabled 0
736 11:40:43.686650 PCI: 00:10.7: enabled 0
737 11:40:43.686737 PCI: 00:12.0: enabled 0
738 11:40:43.690096 PCI: 00:12.6: enabled 0
739 11:40:43.693683 PCI: 00:13.0: enabled 0
740 11:40:43.696418 PCI: 00:14.0: enabled 1
741 11:40:43.700055 USB0 port 0: enabled 1
742 11:40:43.700141 USB2 port 0: enabled 0
743 11:40:43.703186 USB2 port 1: enabled 1
744 11:40:43.706526 USB2 port 2: enabled 1
745 11:40:43.709879 USB2 port 3: enabled 0
746 11:40:43.713337 USB2 port 4: enabled 1
747 11:40:43.716588 USB2 port 5: enabled 0
748 11:40:43.716667 USB2 port 6: enabled 0
749 11:40:43.720020 USB2 port 7: enabled 0
750 11:40:43.723402 USB2 port 8: enabled 0
751 11:40:43.726474 USB2 port 9: enabled 0
752 11:40:43.729841 USB3 port 0: enabled 0
753 11:40:43.729928 USB3 port 1: enabled 1
754 11:40:43.733160 USB3 port 2: enabled 0
755 11:40:43.736365 USB3 port 3: enabled 0
756 11:40:43.739759 PCI: 00:14.1: enabled 0
757 11:40:43.743083 PCI: 00:14.2: enabled 1
758 11:40:43.746741 PCI: 00:14.3: enabled 1
759 11:40:43.746827 GENERIC: 0.0: enabled 1
760 11:40:43.749646 PCI: 00:15.0: enabled 1
761 11:40:43.752990 I2C: 00:1a: enabled 1
762 11:40:43.756566 I2C: 00:31: enabled 1
763 11:40:43.756652 I2C: 00:32: enabled 1
764 11:40:43.760193 PCI: 00:15.1: enabled 1
765 11:40:43.764529 I2C: 00:10: enabled 1
766 11:40:43.764615 PCI: 00:15.2: enabled 1
767 11:40:43.767938 PCI: 00:15.3: enabled 1
768 11:40:43.771585 PCI: 00:16.0: enabled 1
769 11:40:43.774670 PCI: 00:16.1: enabled 0
770 11:40:43.774757 PCI: 00:16.2: enabled 0
771 11:40:43.778179 PCI: 00:16.3: enabled 0
772 11:40:43.781715 PCI: 00:16.4: enabled 0
773 11:40:43.784875 PCI: 00:16.5: enabled 0
774 11:40:43.788136 PCI: 00:17.0: enabled 1
775 11:40:43.788223 PCI: 00:19.0: enabled 0
776 11:40:43.791292 PCI: 00:19.1: enabled 1
777 11:40:43.794769 I2C: 00:15: enabled 1
778 11:40:43.797980 PCI: 00:19.2: enabled 0
779 11:40:43.801394 PCI: 00:1d.0: enabled 1
780 11:40:43.801503 GENERIC: 0.0: enabled 1
781 11:40:43.851201 PCI: 00:1e.0: enabled 1
782 11:40:43.851322 PCI: 00:1e.1: enabled 0
783 11:40:43.851852 PCI: 00:1e.2: enabled 1
784 11:40:43.851939 SPI: 00: enabled 1
785 11:40:43.852025 PCI: 00:1e.3: enabled 1
786 11:40:43.852299 SPI: 00: enabled 1
787 11:40:43.852396 PCI: 00:1f.0: enabled 1
788 11:40:43.852499 PNP: 0c09.0: enabled 1
789 11:40:43.852599 PCI: 00:1f.1: enabled 0
790 11:40:43.852712 PCI: 00:1f.2: enabled 1
791 11:40:43.852808 GENERIC: 0.0: enabled 1
792 11:40:43.852884 GENERIC: 0.0: enabled 1
793 11:40:43.852960 GENERIC: 1.0: enabled 1
794 11:40:43.853036 PCI: 00:1f.3: enabled 1
795 11:40:43.853130 PCI: 00:1f.4: enabled 0
796 11:40:43.853225 PCI: 00:1f.5: enabled 1
797 11:40:43.853338 PCI: 00:1f.6: enabled 0
798 11:40:43.853431 PCI: 00:1f.7: enabled 0
799 11:40:43.853567 CPU_CLUSTER: 0: enabled 1
800 11:40:43.898890 APIC: 00: enabled 1
801 11:40:43.899000 APIC: 01: enabled 1
802 11:40:43.899089 APIC: 03: enabled 1
803 11:40:43.899354 APIC: 05: enabled 1
804 11:40:43.899425 APIC: 06: enabled 1
805 11:40:43.899505 APIC: 02: enabled 1
806 11:40:43.899582 APIC: 04: enabled 1
807 11:40:43.899658 APIC: 07: enabled 1
808 11:40:43.899748 Root Device scanning...
809 11:40:43.899844 scan_static_bus for Root Device
810 11:40:43.899941 DOMAIN: 0000 enabled
811 11:40:43.900037 CPU_CLUSTER: 0 enabled
812 11:40:43.900131 DOMAIN: 0000 scanning...
813 11:40:43.900241 PCI: pci_scan_bus for bus 00
814 11:40:43.900336 PCI: 00:00.0 [8086/0000] ops
815 11:40:43.900615 PCI: 00:00.0 [8086/9a12] enabled
816 11:40:43.900709 PCI: 00:02.0 [8086/0000] bus ops
817 11:40:43.903027 PCI: 00:02.0 [8086/9a40] enabled
818 11:40:43.903113 PCI: 00:04.0 [8086/0000] bus ops
819 11:40:43.906814 PCI: 00:04.0 [8086/9a03] enabled
820 11:40:43.909654 PCI: 00:05.0 [8086/9a19] enabled
821 11:40:43.913195 PCI: 00:07.0 [0000/0000] hidden
822 11:40:43.916242 PCI: 00:08.0 [8086/9a11] enabled
823 11:40:43.919808 PCI: 00:0a.0 [8086/9a0d] disabled
824 11:40:43.923013 PCI: 00:0d.0 [8086/0000] bus ops
825 11:40:43.926636 PCI: 00:0d.0 [8086/9a13] enabled
826 11:40:43.929810 PCI: 00:14.0 [8086/0000] bus ops
827 11:40:43.933345 PCI: 00:14.0 [8086/a0ed] enabled
828 11:40:43.936432 PCI: 00:14.2 [8086/a0ef] enabled
829 11:40:43.940064 PCI: 00:14.3 [8086/0000] bus ops
830 11:40:43.943051 PCI: 00:14.3 [8086/a0f0] enabled
831 11:40:43.946367 PCI: 00:15.0 [8086/0000] bus ops
832 11:40:43.950167 PCI: 00:15.0 [8086/a0e8] enabled
833 11:40:43.953275 PCI: 00:15.1 [8086/0000] bus ops
834 11:40:43.956506 PCI: 00:15.1 [8086/a0e9] enabled
835 11:40:43.959787 PCI: 00:15.2 [8086/0000] bus ops
836 11:40:43.962947 PCI: 00:15.2 [8086/a0ea] enabled
837 11:40:43.966372 PCI: 00:15.3 [8086/0000] bus ops
838 11:40:43.969809 PCI: 00:15.3 [8086/a0eb] enabled
839 11:40:43.973293 PCI: 00:16.0 [8086/0000] ops
840 11:40:43.976401 PCI: 00:16.0 [8086/a0e0] enabled
841 11:40:43.983296 PCI: Static device PCI: 00:17.0 not found, disabling it.
842 11:40:43.986622 PCI: 00:19.0 [8086/0000] bus ops
843 11:40:43.989910 PCI: 00:19.0 [8086/a0c5] disabled
844 11:40:43.992963 PCI: 00:19.1 [8086/0000] bus ops
845 11:40:43.996287 PCI: 00:19.1 [8086/a0c6] enabled
846 11:40:43.999970 PCI: 00:1d.0 [8086/0000] bus ops
847 11:40:44.003127 PCI: 00:1d.0 [8086/a0b0] enabled
848 11:40:44.006380 PCI: 00:1e.0 [8086/0000] ops
849 11:40:44.009610 PCI: 00:1e.0 [8086/a0a8] enabled
850 11:40:44.013229 PCI: 00:1e.2 [8086/0000] bus ops
851 11:40:44.016241 PCI: 00:1e.2 [8086/a0aa] enabled
852 11:40:44.019648 PCI: 00:1e.3 [8086/0000] bus ops
853 11:40:44.023324 PCI: 00:1e.3 [8086/a0ab] enabled
854 11:40:44.026764 PCI: 00:1f.0 [8086/0000] bus ops
855 11:40:44.030053 PCI: 00:1f.0 [8086/a087] enabled
856 11:40:44.030144 RTC Init
857 11:40:44.033239 Set power on after power failure.
858 11:40:44.036414 Disabling Deep S3
859 11:40:44.036498 Disabling Deep S3
860 11:40:44.039635 Disabling Deep S4
861 11:40:44.043168 Disabling Deep S4
862 11:40:44.043252 Disabling Deep S5
863 11:40:44.046470 Disabling Deep S5
864 11:40:44.049869 PCI: 00:1f.2 [0000/0000] hidden
865 11:40:44.053065 PCI: 00:1f.3 [8086/0000] bus ops
866 11:40:44.056287 PCI: 00:1f.3 [8086/a0c8] enabled
867 11:40:44.059768 PCI: 00:1f.5 [8086/0000] bus ops
868 11:40:44.062875 PCI: 00:1f.5 [8086/a0a4] enabled
869 11:40:44.066213 PCI: Leftover static devices:
870 11:40:44.066295 PCI: 00:10.2
871 11:40:44.066360 PCI: 00:10.6
872 11:40:44.069416 PCI: 00:10.7
873 11:40:44.069536 PCI: 00:06.0
874 11:40:44.073067 PCI: 00:07.1
875 11:40:44.073151 PCI: 00:07.2
876 11:40:44.076038 PCI: 00:07.3
877 11:40:44.076120 PCI: 00:09.0
878 11:40:44.076184 PCI: 00:0d.1
879 11:40:44.079920 PCI: 00:0d.2
880 11:40:44.080001 PCI: 00:0d.3
881 11:40:44.083124 PCI: 00:0e.0
882 11:40:44.083205 PCI: 00:12.0
883 11:40:44.083280 PCI: 00:12.6
884 11:40:44.086308 PCI: 00:13.0
885 11:40:44.086389 PCI: 00:14.1
886 11:40:44.089443 PCI: 00:16.1
887 11:40:44.089564 PCI: 00:16.2
888 11:40:44.089629 PCI: 00:16.3
889 11:40:44.093066 PCI: 00:16.4
890 11:40:44.093147 PCI: 00:16.5
891 11:40:44.096391 PCI: 00:17.0
892 11:40:44.096473 PCI: 00:19.2
893 11:40:44.099494 PCI: 00:1e.1
894 11:40:44.099576 PCI: 00:1f.1
895 11:40:44.099640 PCI: 00:1f.4
896 11:40:44.102824 PCI: 00:1f.6
897 11:40:44.102951 PCI: 00:1f.7
898 11:40:44.106291 PCI: Check your devicetree.cb.
899 11:40:44.109684 PCI: 00:02.0 scanning...
900 11:40:44.113176 scan_generic_bus for PCI: 00:02.0
901 11:40:44.116537 scan_generic_bus for PCI: 00:02.0 done
902 11:40:44.123174 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
903 11:40:44.123260 PCI: 00:04.0 scanning...
904 11:40:44.126271 scan_generic_bus for PCI: 00:04.0
905 11:40:44.129510 GENERIC: 0.0 enabled
906 11:40:44.136251 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
907 11:40:44.139783 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
908 11:40:44.143172 PCI: 00:0d.0 scanning...
909 11:40:44.146030 scan_static_bus for PCI: 00:0d.0
910 11:40:44.149515 USB0 port 0 enabled
911 11:40:44.152774 USB0 port 0 scanning...
912 11:40:44.156001 scan_static_bus for USB0 port 0
913 11:40:44.156086 USB3 port 0 enabled
914 11:40:44.159582 USB3 port 1 enabled
915 11:40:44.159667 USB3 port 2 disabled
916 11:40:44.162819 USB3 port 3 disabled
917 11:40:44.166015 USB3 port 0 scanning...
918 11:40:44.169347 scan_static_bus for USB3 port 0
919 11:40:44.172746 scan_static_bus for USB3 port 0 done
920 11:40:44.175963 scan_bus: bus USB3 port 0 finished in 6 msecs
921 11:40:44.179246 USB3 port 1 scanning...
922 11:40:44.182732 scan_static_bus for USB3 port 1
923 11:40:44.186137 scan_static_bus for USB3 port 1 done
924 11:40:44.192916 scan_bus: bus USB3 port 1 finished in 6 msecs
925 11:40:44.196350 scan_static_bus for USB0 port 0 done
926 11:40:44.199307 scan_bus: bus USB0 port 0 finished in 43 msecs
927 11:40:44.202789 scan_static_bus for PCI: 00:0d.0 done
928 11:40:44.209339 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
929 11:40:44.212692 PCI: 00:14.0 scanning...
930 11:40:44.216022 scan_static_bus for PCI: 00:14.0
931 11:40:44.216135 USB0 port 0 enabled
932 11:40:44.219178 USB0 port 0 scanning...
933 11:40:44.222414 scan_static_bus for USB0 port 0
934 11:40:44.225612 USB2 port 0 disabled
935 11:40:44.225722 USB2 port 1 enabled
936 11:40:44.229001 USB2 port 2 enabled
937 11:40:44.232473 USB2 port 3 disabled
938 11:40:44.232585 USB2 port 4 enabled
939 11:40:44.235618 USB2 port 5 disabled
940 11:40:44.235726 USB2 port 6 disabled
941 11:40:44.239216 USB2 port 7 disabled
942 11:40:44.242417 USB2 port 8 disabled
943 11:40:44.242531 USB2 port 9 disabled
944 11:40:44.245608 USB3 port 0 disabled
945 11:40:44.249219 USB3 port 1 enabled
946 11:40:44.249327 USB3 port 2 disabled
947 11:40:44.252741 USB3 port 3 disabled
948 11:40:44.255782 USB2 port 1 scanning...
949 11:40:44.259106 scan_static_bus for USB2 port 1
950 11:40:44.262629 scan_static_bus for USB2 port 1 done
951 11:40:44.265562 scan_bus: bus USB2 port 1 finished in 6 msecs
952 11:40:44.268880 USB2 port 2 scanning...
953 11:40:44.272276 scan_static_bus for USB2 port 2
954 11:40:44.275501 scan_static_bus for USB2 port 2 done
955 11:40:44.282394 scan_bus: bus USB2 port 2 finished in 6 msecs
956 11:40:44.282507 USB2 port 4 scanning...
957 11:40:44.285839 scan_static_bus for USB2 port 4
958 11:40:44.289083 scan_static_bus for USB2 port 4 done
959 11:40:44.295354 scan_bus: bus USB2 port 4 finished in 6 msecs
960 11:40:44.298673 USB3 port 1 scanning...
961 11:40:44.302504 scan_static_bus for USB3 port 1
962 11:40:44.305409 scan_static_bus for USB3 port 1 done
963 11:40:44.309092 scan_bus: bus USB3 port 1 finished in 6 msecs
964 11:40:44.311931 scan_static_bus for USB0 port 0 done
965 11:40:44.318547 scan_bus: bus USB0 port 0 finished in 93 msecs
966 11:40:44.321975 scan_static_bus for PCI: 00:14.0 done
967 11:40:44.325401 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
968 11:40:44.328886 PCI: 00:14.3 scanning...
969 11:40:44.332172 scan_static_bus for PCI: 00:14.3
970 11:40:44.335306 GENERIC: 0.0 enabled
971 11:40:44.339374 scan_static_bus for PCI: 00:14.3 done
972 11:40:44.342857 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
973 11:40:44.346162 PCI: 00:15.0 scanning...
974 11:40:44.349433 scan_static_bus for PCI: 00:15.0
975 11:40:44.349557 I2C: 00:1a enabled
976 11:40:44.352548 I2C: 00:31 enabled
977 11:40:44.355850 I2C: 00:32 enabled
978 11:40:44.359402 scan_static_bus for PCI: 00:15.0 done
979 11:40:44.362682 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
980 11:40:44.365930 PCI: 00:15.1 scanning...
981 11:40:44.369127 scan_static_bus for PCI: 00:15.1
982 11:40:44.372515 I2C: 00:10 enabled
983 11:40:44.375828 scan_static_bus for PCI: 00:15.1 done
984 11:40:44.379080 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
985 11:40:44.382363 PCI: 00:15.2 scanning...
986 11:40:44.386212 scan_static_bus for PCI: 00:15.2
987 11:40:44.389181 scan_static_bus for PCI: 00:15.2 done
988 11:40:44.395954 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
989 11:40:44.396070 PCI: 00:15.3 scanning...
990 11:40:44.399100 scan_static_bus for PCI: 00:15.3
991 11:40:44.405946 scan_static_bus for PCI: 00:15.3 done
992 11:40:44.409320 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
993 11:40:44.412303 PCI: 00:19.1 scanning...
994 11:40:44.415597 scan_static_bus for PCI: 00:19.1
995 11:40:44.415712 I2C: 00:15 enabled
996 11:40:44.422497 scan_static_bus for PCI: 00:19.1 done
997 11:40:44.425458 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
998 11:40:44.429071 PCI: 00:1d.0 scanning...
999 11:40:44.432405 do_pci_scan_bridge for PCI: 00:1d.0
1000 11:40:44.435427 PCI: pci_scan_bus for bus 01
1001 11:40:44.438791 PCI: 01:00.0 [1c5c/174a] enabled
1002 11:40:44.442342 GENERIC: 0.0 enabled
1003 11:40:44.445422 Enabling Common Clock Configuration
1004 11:40:44.449101 L1 Sub-State supported from root port 29
1005 11:40:44.452041 L1 Sub-State Support = 0xf
1006 11:40:44.455649 CommonModeRestoreTime = 0x28
1007 11:40:44.458945 Power On Value = 0x16, Power On Scale = 0x0
1008 11:40:44.459063 ASPM: Enabled L1
1009 11:40:44.465373 PCIe: Max_Payload_Size adjusted to 128
1010 11:40:44.468956 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1011 11:40:44.472130 PCI: 00:1e.2 scanning...
1012 11:40:44.475251 scan_generic_bus for PCI: 00:1e.2
1013 11:40:44.475369 SPI: 00 enabled
1014 11:40:44.481975 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1015 11:40:44.489005 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1016 11:40:44.489125 PCI: 00:1e.3 scanning...
1017 11:40:44.495509 scan_generic_bus for PCI: 00:1e.3
1018 11:40:44.495628 SPI: 00 enabled
1019 11:40:44.502586 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1020 11:40:44.505631 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1021 11:40:44.508829 PCI: 00:1f.0 scanning...
1022 11:40:44.512212 scan_static_bus for PCI: 00:1f.0
1023 11:40:44.515474 PNP: 0c09.0 enabled
1024 11:40:44.515593 PNP: 0c09.0 scanning...
1025 11:40:44.518968 scan_static_bus for PNP: 0c09.0
1026 11:40:44.525663 scan_static_bus for PNP: 0c09.0 done
1027 11:40:44.529056 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1028 11:40:44.532498 scan_static_bus for PCI: 00:1f.0 done
1029 11:40:44.539085 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1030 11:40:44.539223 PCI: 00:1f.2 scanning...
1031 11:40:44.542206 scan_static_bus for PCI: 00:1f.2
1032 11:40:44.545675 GENERIC: 0.0 enabled
1033 11:40:44.549055 GENERIC: 0.0 scanning...
1034 11:40:44.552434 scan_static_bus for GENERIC: 0.0
1035 11:40:44.555384 GENERIC: 0.0 enabled
1036 11:40:44.555500 GENERIC: 1.0 enabled
1037 11:40:44.558962 scan_static_bus for GENERIC: 0.0 done
1038 11:40:44.565592 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1039 11:40:44.569140 scan_static_bus for PCI: 00:1f.2 done
1040 11:40:44.572184 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1041 11:40:44.575566 PCI: 00:1f.3 scanning...
1042 11:40:44.578845 scan_static_bus for PCI: 00:1f.3
1043 11:40:44.582371 scan_static_bus for PCI: 00:1f.3 done
1044 11:40:44.589129 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1045 11:40:44.589245 PCI: 00:1f.5 scanning...
1046 11:40:44.595644 scan_generic_bus for PCI: 00:1f.5
1047 11:40:44.599387 scan_generic_bus for PCI: 00:1f.5 done
1048 11:40:44.602168 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1049 11:40:44.609092 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1050 11:40:44.612265 scan_static_bus for Root Device done
1051 11:40:44.616148 scan_bus: bus Root Device finished in 737 msecs
1052 11:40:44.616255 done
1053 11:40:44.622414 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1054 11:40:44.625449 Chrome EC: UHEPI supported
1055 11:40:44.632250 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1056 11:40:44.638790 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1057 11:40:44.642448 SPI flash protection: WPSW=0 SRP0=0
1058 11:40:44.645538 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1059 11:40:44.652301 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1060 11:40:44.655485 found VGA at PCI: 00:02.0
1061 11:40:44.658920 Setting up VGA for PCI: 00:02.0
1062 11:40:44.662346 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1063 11:40:44.668657 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1064 11:40:44.672006 Allocating resources...
1065 11:40:44.672121 Reading resources...
1066 11:40:44.678591 Root Device read_resources bus 0 link: 0
1067 11:40:44.682020 DOMAIN: 0000 read_resources bus 0 link: 0
1068 11:40:44.685309 PCI: 00:04.0 read_resources bus 1 link: 0
1069 11:40:44.692381 PCI: 00:04.0 read_resources bus 1 link: 0 done
1070 11:40:44.695699 PCI: 00:0d.0 read_resources bus 0 link: 0
1071 11:40:44.702176 USB0 port 0 read_resources bus 0 link: 0
1072 11:40:44.705813 USB0 port 0 read_resources bus 0 link: 0 done
1073 11:40:44.712288 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1074 11:40:44.715594 PCI: 00:14.0 read_resources bus 0 link: 0
1075 11:40:44.719007 USB0 port 0 read_resources bus 0 link: 0
1076 11:40:44.726554 USB0 port 0 read_resources bus 0 link: 0 done
1077 11:40:44.730029 PCI: 00:14.0 read_resources bus 0 link: 0 done
1078 11:40:44.736594 PCI: 00:14.3 read_resources bus 0 link: 0
1079 11:40:44.740300 PCI: 00:14.3 read_resources bus 0 link: 0 done
1080 11:40:44.746721 PCI: 00:15.0 read_resources bus 0 link: 0
1081 11:40:44.749958 PCI: 00:15.0 read_resources bus 0 link: 0 done
1082 11:40:44.756882 PCI: 00:15.1 read_resources bus 0 link: 0
1083 11:40:44.760103 PCI: 00:15.1 read_resources bus 0 link: 0 done
1084 11:40:44.767583 PCI: 00:19.1 read_resources bus 0 link: 0
1085 11:40:44.770760 PCI: 00:19.1 read_resources bus 0 link: 0 done
1086 11:40:44.777240 PCI: 00:1d.0 read_resources bus 1 link: 0
1087 11:40:44.780711 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1088 11:40:44.787434 PCI: 00:1e.2 read_resources bus 2 link: 0
1089 11:40:44.790908 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1090 11:40:44.797695 PCI: 00:1e.3 read_resources bus 3 link: 0
1091 11:40:44.800726 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1092 11:40:44.807260 PCI: 00:1f.0 read_resources bus 0 link: 0
1093 11:40:44.810440 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1094 11:40:44.814371 PCI: 00:1f.2 read_resources bus 0 link: 0
1095 11:40:44.820899 GENERIC: 0.0 read_resources bus 0 link: 0
1096 11:40:44.824194 GENERIC: 0.0 read_resources bus 0 link: 0 done
1097 11:40:44.830783 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1098 11:40:44.837324 DOMAIN: 0000 read_resources bus 0 link: 0 done
1099 11:40:44.840677 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1100 11:40:44.843927 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1101 11:40:44.850943 Root Device read_resources bus 0 link: 0 done
1102 11:40:44.854262 Done reading resources.
1103 11:40:44.857623 Show resources in subtree (Root Device)...After reading.
1104 11:40:44.864145 Root Device child on link 0 DOMAIN: 0000
1105 11:40:44.867389 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 11:40:44.877667 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 11:40:44.887344 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1108 11:40:44.887428 PCI: 00:00.0
1109 11:40:44.897245 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 11:40:44.907470 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 11:40:44.917105 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 11:40:44.927339 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 11:40:44.933864 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 11:40:44.943875 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 11:40:44.954020 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 11:40:44.963708 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 11:40:44.973684 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 11:40:44.983530 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1119 11:40:44.990142 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1120 11:40:45.000288 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1121 11:40:45.010161 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1122 11:40:45.020180 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1123 11:40:45.026969 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1124 11:40:45.036560 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1125 11:40:45.047102 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1126 11:40:45.056500 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1127 11:40:45.066469 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1128 11:40:45.076471 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1129 11:40:45.076563 PCI: 00:02.0
1130 11:40:45.086467 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1131 11:40:45.099588 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1132 11:40:45.106347 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1133 11:40:45.112981 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1134 11:40:45.123031 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1135 11:40:45.123117 GENERIC: 0.0
1136 11:40:45.126393 PCI: 00:05.0
1137 11:40:45.136147 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 11:40:45.139888 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1139 11:40:45.142972 GENERIC: 0.0
1140 11:40:45.143055 PCI: 00:08.0
1141 11:40:45.152831 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1142 11:40:45.156143 PCI: 00:0a.0
1143 11:40:45.159601 PCI: 00:0d.0 child on link 0 USB0 port 0
1144 11:40:45.169640 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1145 11:40:45.173243 USB0 port 0 child on link 0 USB3 port 0
1146 11:40:45.176446 USB3 port 0
1147 11:40:45.176529 USB3 port 1
1148 11:40:45.179837 USB3 port 2
1149 11:40:45.179920 USB3 port 3
1150 11:40:45.186602 PCI: 00:14.0 child on link 0 USB0 port 0
1151 11:40:45.196278 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 11:40:45.199501 USB0 port 0 child on link 0 USB2 port 0
1153 11:40:45.202843 USB2 port 0
1154 11:40:45.202925 USB2 port 1
1155 11:40:45.206335 USB2 port 2
1156 11:40:45.206417 USB2 port 3
1157 11:40:45.209573 USB2 port 4
1158 11:40:45.209655 USB2 port 5
1159 11:40:45.213120 USB2 port 6
1160 11:40:45.213203 USB2 port 7
1161 11:40:45.216381 USB2 port 8
1162 11:40:45.216464 USB2 port 9
1163 11:40:45.219534 USB3 port 0
1164 11:40:45.219616 USB3 port 1
1165 11:40:45.222914 USB3 port 2
1166 11:40:45.222996 USB3 port 3
1167 11:40:45.226002 PCI: 00:14.2
1168 11:40:45.236013 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1169 11:40:45.246099 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 11:40:45.249178 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1171 11:40:45.259423 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1172 11:40:45.262780 GENERIC: 0.0
1173 11:40:45.266087 PCI: 00:15.0 child on link 0 I2C: 00:1a
1174 11:40:45.276372 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 11:40:45.279273 I2C: 00:1a
1176 11:40:45.279359 I2C: 00:31
1177 11:40:45.279425 I2C: 00:32
1178 11:40:45.285934 PCI: 00:15.1 child on link 0 I2C: 00:10
1179 11:40:45.295953 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 11:40:45.296038 I2C: 00:10
1181 11:40:45.299323 PCI: 00:15.2
1182 11:40:45.309243 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 11:40:45.309327 PCI: 00:15.3
1184 11:40:45.319464 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 11:40:45.322836 PCI: 00:16.0
1186 11:40:45.332324 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 11:40:45.332408 PCI: 00:19.0
1188 11:40:45.339157 PCI: 00:19.1 child on link 0 I2C: 00:15
1189 11:40:45.349263 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 11:40:45.349364 I2C: 00:15
1191 11:40:45.352707 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1192 11:40:45.362547 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1193 11:40:45.372461 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1194 11:40:45.382448 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1195 11:40:45.382533 GENERIC: 0.0
1196 11:40:45.385995 PCI: 01:00.0
1197 11:40:45.395670 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 11:40:45.405918 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1199 11:40:45.412427 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1200 11:40:45.415849 PCI: 00:1e.0
1201 11:40:45.425419 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1202 11:40:45.429003 PCI: 00:1e.2 child on link 0 SPI: 00
1203 11:40:45.439109 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 11:40:45.442296 SPI: 00
1205 11:40:45.445877 PCI: 00:1e.3 child on link 0 SPI: 00
1206 11:40:45.455628 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1207 11:40:45.455712 SPI: 00
1208 11:40:45.462341 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1209 11:40:45.468697 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1210 11:40:45.472234 PNP: 0c09.0
1211 11:40:45.478641 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1212 11:40:45.485559 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1213 11:40:45.495539 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1214 11:40:45.502277 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1215 11:40:45.508541 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1216 11:40:45.508650 GENERIC: 0.0
1217 11:40:45.512123 GENERIC: 1.0
1218 11:40:45.512206 PCI: 00:1f.3
1219 11:40:45.521890 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 11:40:45.531828 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1221 11:40:45.535393 PCI: 00:1f.5
1222 11:40:45.545619 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1223 11:40:45.548701 CPU_CLUSTER: 0 child on link 0 APIC: 00
1224 11:40:45.548806 APIC: 00
1225 11:40:45.551933 APIC: 01
1226 11:40:45.552015 APIC: 03
1227 11:40:45.552081 APIC: 05
1228 11:40:45.555292 APIC: 06
1229 11:40:45.555375 APIC: 02
1230 11:40:45.558489 APIC: 04
1231 11:40:45.558571 APIC: 07
1232 11:40:45.565243 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1233 11:40:45.571723 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1234 11:40:45.578854 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1235 11:40:45.584990 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1236 11:40:45.588574 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1237 11:40:45.591990 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1238 11:40:45.598387 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1239 11:40:45.605170 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1240 11:40:45.611690 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1241 11:40:45.618599 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1242 11:40:45.625332 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1243 11:40:45.631631 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1244 11:40:45.641610 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 11:40:45.648305 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1246 11:40:45.655294 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1247 11:40:45.658044 DOMAIN: 0000: Resource ranges:
1248 11:40:45.661665 * Base: 1000, Size: 800, Tag: 100
1249 11:40:45.665040 * Base: 1900, Size: e700, Tag: 100
1250 11:40:45.671338 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1251 11:40:45.678244 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1252 11:40:45.684851 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1253 11:40:45.691560 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1254 11:40:45.701525 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1255 11:40:45.707852 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1256 11:40:45.714537 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1257 11:40:45.721380 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1258 11:40:45.731417 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1259 11:40:45.737985 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1260 11:40:45.744599 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1261 11:40:45.754545 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1262 11:40:45.760958 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1263 11:40:45.767842 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1264 11:40:45.778047 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1265 11:40:45.784782 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1266 11:40:45.790922 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1267 11:40:45.801046 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1268 11:40:45.807674 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1269 11:40:45.814202 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1270 11:40:45.824269 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1271 11:40:45.830810 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1272 11:40:45.837719 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1273 11:40:45.847882 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1274 11:40:45.854301 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1275 11:40:45.857342 DOMAIN: 0000: Resource ranges:
1276 11:40:45.860957 * Base: 7fc00000, Size: 40400000, Tag: 200
1277 11:40:45.867510 * Base: d0000000, Size: 28000000, Tag: 200
1278 11:40:45.870720 * Base: fa000000, Size: 1000000, Tag: 200
1279 11:40:45.874041 * Base: fb001000, Size: 2fff000, Tag: 200
1280 11:40:45.877590 * Base: fe010000, Size: 2e000, Tag: 200
1281 11:40:45.884131 * Base: fe03f000, Size: d41000, Tag: 200
1282 11:40:45.887426 * Base: fed88000, Size: 8000, Tag: 200
1283 11:40:45.891178 * Base: fed93000, Size: d000, Tag: 200
1284 11:40:45.894017 * Base: feda2000, Size: 1e000, Tag: 200
1285 11:40:45.900506 * Base: fede0000, Size: 1220000, Tag: 200
1286 11:40:45.904159 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1287 11:40:45.910599 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1288 11:40:45.917143 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1289 11:40:45.924148 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1290 11:40:45.930624 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1291 11:40:45.937115 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1292 11:40:45.943741 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1293 11:40:45.950787 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1294 11:40:45.957124 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1295 11:40:45.963653 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1296 11:40:45.970656 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1297 11:40:45.977035 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1298 11:40:45.983682 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1299 11:40:45.990650 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1300 11:40:45.996915 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1301 11:40:46.003793 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1302 11:40:46.010402 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1303 11:40:46.017048 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1304 11:40:46.023685 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1305 11:40:46.030510 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1306 11:40:46.036967 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1307 11:40:46.043530 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1308 11:40:46.050464 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1309 11:40:46.056776 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1310 11:40:46.066826 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1311 11:40:46.070174 PCI: 00:1d.0: Resource ranges:
1312 11:40:46.073317 * Base: 7fc00000, Size: 100000, Tag: 200
1313 11:40:46.080224 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1314 11:40:46.086562 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1315 11:40:46.093459 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1316 11:40:46.103056 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1317 11:40:46.109995 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1318 11:40:46.113151 Root Device assign_resources, bus 0 link: 0
1319 11:40:46.116579 DOMAIN: 0000 assign_resources, bus 0 link: 0
1320 11:40:46.126684 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1321 11:40:46.133316 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1322 11:40:46.143097 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1323 11:40:46.149786 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1324 11:40:46.156406 PCI: 00:04.0 assign_resources, bus 1 link: 0
1325 11:40:46.159781 PCI: 00:04.0 assign_resources, bus 1 link: 0
1326 11:40:46.169869 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1327 11:40:46.176391 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1328 11:40:46.182929 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1329 11:40:46.189508 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1330 11:40:46.192987 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1331 11:40:46.202887 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1332 11:40:46.206534 PCI: 00:14.0 assign_resources, bus 0 link: 0
1333 11:40:46.213039 PCI: 00:14.0 assign_resources, bus 0 link: 0
1334 11:40:46.219430 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1335 11:40:46.226383 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1336 11:40:46.236193 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1337 11:40:46.239731 PCI: 00:14.3 assign_resources, bus 0 link: 0
1338 11:40:46.246094 PCI: 00:14.3 assign_resources, bus 0 link: 0
1339 11:40:46.253078 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1340 11:40:46.259416 PCI: 00:15.0 assign_resources, bus 0 link: 0
1341 11:40:46.262624 PCI: 00:15.0 assign_resources, bus 0 link: 0
1342 11:40:46.269284 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1343 11:40:46.275949 PCI: 00:15.1 assign_resources, bus 0 link: 0
1344 11:40:46.279131 PCI: 00:15.1 assign_resources, bus 0 link: 0
1345 11:40:46.289079 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1346 11:40:46.295961 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1347 11:40:46.305692 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1348 11:40:46.312393 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1349 11:40:46.318860 PCI: 00:19.1 assign_resources, bus 0 link: 0
1350 11:40:46.322676 PCI: 00:19.1 assign_resources, bus 0 link: 0
1351 11:40:46.332309 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1352 11:40:46.342275 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 11:40:46.348811 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1354 11:40:46.352257 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 11:40:46.362428 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1356 11:40:46.369067 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1357 11:40:46.378894 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1358 11:40:46.382644 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1359 11:40:46.392458 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1360 11:40:46.395324 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1361 11:40:46.398846 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1362 11:40:46.408722 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1363 11:40:46.411957 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1364 11:40:46.418984 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1365 11:40:46.422198 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 11:40:46.428747 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1367 11:40:46.432355 LPC: Trying to open IO window from 800 size 1ff
1368 11:40:46.441966 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1369 11:40:46.448523 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1370 11:40:46.454952 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1371 11:40:46.461835 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 11:40:46.465319 Root Device assign_resources, bus 0 link: 0
1373 11:40:46.468683 Done setting resources.
1374 11:40:46.475506 Show resources in subtree (Root Device)...After assigning values.
1375 11:40:46.478802 Root Device child on link 0 DOMAIN: 0000
1376 11:40:46.485051 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1377 11:40:46.491745 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1378 11:40:46.501693 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1379 11:40:46.504896 PCI: 00:00.0
1380 11:40:46.515010 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1381 11:40:46.524827 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1382 11:40:46.531618 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1383 11:40:46.541370 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1384 11:40:46.551326 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1385 11:40:46.561465 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1386 11:40:46.571179 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1387 11:40:46.581136 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1388 11:40:46.587749 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1389 11:40:46.597609 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1390 11:40:46.607889 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1391 11:40:46.617563 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1392 11:40:46.627722 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1393 11:40:46.634377 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1394 11:40:46.643998 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1395 11:40:46.654278 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1396 11:40:46.664203 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1397 11:40:46.673920 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1398 11:40:46.683828 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1399 11:40:46.693905 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1400 11:40:46.693990 PCI: 00:02.0
1401 11:40:46.703958 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1402 11:40:46.716985 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1403 11:40:46.723929 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1404 11:40:46.730403 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1405 11:40:46.740302 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1406 11:40:46.740387 GENERIC: 0.0
1407 11:40:46.743674 PCI: 00:05.0
1408 11:40:46.753696 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1409 11:40:46.757188 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1410 11:40:46.760455 GENERIC: 0.0
1411 11:40:46.760538 PCI: 00:08.0
1412 11:40:46.773968 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1413 11:40:46.774053 PCI: 00:0a.0
1414 11:40:46.777127 PCI: 00:0d.0 child on link 0 USB0 port 0
1415 11:40:46.790578 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1416 11:40:46.793704 USB0 port 0 child on link 0 USB3 port 0
1417 11:40:46.793788 USB3 port 0
1418 11:40:46.796875 USB3 port 1
1419 11:40:46.796958 USB3 port 2
1420 11:40:46.800384 USB3 port 3
1421 11:40:46.803539 PCI: 00:14.0 child on link 0 USB0 port 0
1422 11:40:46.813407 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1423 11:40:46.820045 USB0 port 0 child on link 0 USB2 port 0
1424 11:40:46.820129 USB2 port 0
1425 11:40:46.823646 USB2 port 1
1426 11:40:46.823729 USB2 port 2
1427 11:40:46.827002 USB2 port 3
1428 11:40:46.827084 USB2 port 4
1429 11:40:46.830043 USB2 port 5
1430 11:40:46.830126 USB2 port 6
1431 11:40:46.833727 USB2 port 7
1432 11:40:46.836915 USB2 port 8
1433 11:40:46.836998 USB2 port 9
1434 11:40:46.839986 USB3 port 0
1435 11:40:46.840069 USB3 port 1
1436 11:40:46.843556 USB3 port 2
1437 11:40:46.843638 USB3 port 3
1438 11:40:46.846902 PCI: 00:14.2
1439 11:40:46.856903 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1440 11:40:46.866845 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1441 11:40:46.870197 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1442 11:40:46.879860 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1443 11:40:46.883368 GENERIC: 0.0
1444 11:40:46.886704 PCI: 00:15.0 child on link 0 I2C: 00:1a
1445 11:40:46.896919 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1446 11:40:46.899995 I2C: 00:1a
1447 11:40:46.900078 I2C: 00:31
1448 11:40:46.903656 I2C: 00:32
1449 11:40:46.906540 PCI: 00:15.1 child on link 0 I2C: 00:10
1450 11:40:46.916876 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1451 11:40:46.919912 I2C: 00:10
1452 11:40:46.919995 PCI: 00:15.2
1453 11:40:46.930106 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1454 11:40:46.933255 PCI: 00:15.3
1455 11:40:46.943055 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1456 11:40:46.943140 PCI: 00:16.0
1457 11:40:46.953273 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1458 11:40:46.956279 PCI: 00:19.0
1459 11:40:46.959560 PCI: 00:19.1 child on link 0 I2C: 00:15
1460 11:40:46.969715 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1461 11:40:46.972994 I2C: 00:15
1462 11:40:46.976158 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1463 11:40:46.986235 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1464 11:40:46.996333 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1465 11:40:47.009298 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1466 11:40:47.009383 GENERIC: 0.0
1467 11:40:47.012913 PCI: 01:00.0
1468 11:40:47.022775 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1469 11:40:47.032651 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1470 11:40:47.042517 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1471 11:40:47.045934 PCI: 00:1e.0
1472 11:40:47.055695 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1473 11:40:47.059010 PCI: 00:1e.2 child on link 0 SPI: 00
1474 11:40:47.069119 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1475 11:40:47.072616 SPI: 00
1476 11:40:47.075767 PCI: 00:1e.3 child on link 0 SPI: 00
1477 11:40:47.085995 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1478 11:40:47.086079 SPI: 00
1479 11:40:47.092257 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1480 11:40:47.099107 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1481 11:40:47.102380 PNP: 0c09.0
1482 11:40:47.112528 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1483 11:40:47.115565 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1484 11:40:47.125780 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1485 11:40:47.135572 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1486 11:40:47.139006 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1487 11:40:47.139092 GENERIC: 0.0
1488 11:40:47.141938 GENERIC: 1.0
1489 11:40:47.145497 PCI: 00:1f.3
1490 11:40:47.155604 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1491 11:40:47.165378 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1492 11:40:47.165526 PCI: 00:1f.5
1493 11:40:47.175467 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1494 11:40:47.181955 CPU_CLUSTER: 0 child on link 0 APIC: 00
1495 11:40:47.182041 APIC: 00
1496 11:40:47.182109 APIC: 01
1497 11:40:47.185442 APIC: 03
1498 11:40:47.185550 APIC: 05
1499 11:40:47.188531 APIC: 06
1500 11:40:47.188613 APIC: 02
1501 11:40:47.188715 APIC: 04
1502 11:40:47.192200 APIC: 07
1503 11:40:47.195436 Done allocating resources.
1504 11:40:47.198621 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1505 11:40:47.205500 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1506 11:40:47.208763 Configure GPIOs for I2S audio on UP4.
1507 11:40:47.216299 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1508 11:40:47.219510 Enabling resources...
1509 11:40:47.222998 PCI: 00:00.0 subsystem <- 8086/9a12
1510 11:40:47.226200 PCI: 00:00.0 cmd <- 06
1511 11:40:47.229877 PCI: 00:02.0 subsystem <- 8086/9a40
1512 11:40:47.233192 PCI: 00:02.0 cmd <- 03
1513 11:40:47.236155 PCI: 00:04.0 subsystem <- 8086/9a03
1514 11:40:47.239284 PCI: 00:04.0 cmd <- 02
1515 11:40:47.242606 PCI: 00:05.0 subsystem <- 8086/9a19
1516 11:40:47.242687 PCI: 00:05.0 cmd <- 02
1517 11:40:47.249069 PCI: 00:08.0 subsystem <- 8086/9a11
1518 11:40:47.249150 PCI: 00:08.0 cmd <- 06
1519 11:40:47.252528 PCI: 00:0d.0 subsystem <- 8086/9a13
1520 11:40:47.256337 PCI: 00:0d.0 cmd <- 02
1521 11:40:47.259404 PCI: 00:14.0 subsystem <- 8086/a0ed
1522 11:40:47.262722 PCI: 00:14.0 cmd <- 02
1523 11:40:47.265913 PCI: 00:14.2 subsystem <- 8086/a0ef
1524 11:40:47.269169 PCI: 00:14.2 cmd <- 02
1525 11:40:47.272631 PCI: 00:14.3 subsystem <- 8086/a0f0
1526 11:40:47.276157 PCI: 00:14.3 cmd <- 02
1527 11:40:47.279536 PCI: 00:15.0 subsystem <- 8086/a0e8
1528 11:40:47.282799 PCI: 00:15.0 cmd <- 02
1529 11:40:47.286110 PCI: 00:15.1 subsystem <- 8086/a0e9
1530 11:40:47.286191 PCI: 00:15.1 cmd <- 02
1531 11:40:47.292749 PCI: 00:15.2 subsystem <- 8086/a0ea
1532 11:40:47.292831 PCI: 00:15.2 cmd <- 02
1533 11:40:47.296045 PCI: 00:15.3 subsystem <- 8086/a0eb
1534 11:40:47.299602 PCI: 00:15.3 cmd <- 02
1535 11:40:47.303108 PCI: 00:16.0 subsystem <- 8086/a0e0
1536 11:40:47.306155 PCI: 00:16.0 cmd <- 02
1537 11:40:47.309424 PCI: 00:19.1 subsystem <- 8086/a0c6
1538 11:40:47.312825 PCI: 00:19.1 cmd <- 02
1539 11:40:47.315834 PCI: 00:1d.0 bridge ctrl <- 0013
1540 11:40:47.319267 PCI: 00:1d.0 subsystem <- 8086/a0b0
1541 11:40:47.322733 PCI: 00:1d.0 cmd <- 06
1542 11:40:47.325996 PCI: 00:1e.0 subsystem <- 8086/a0a8
1543 11:40:47.329167 PCI: 00:1e.0 cmd <- 06
1544 11:40:47.332942 PCI: 00:1e.2 subsystem <- 8086/a0aa
1545 11:40:47.335612 PCI: 00:1e.2 cmd <- 06
1546 11:40:47.339122 PCI: 00:1e.3 subsystem <- 8086/a0ab
1547 11:40:47.339203 PCI: 00:1e.3 cmd <- 02
1548 11:40:47.345666 PCI: 00:1f.0 subsystem <- 8086/a087
1549 11:40:47.345747 PCI: 00:1f.0 cmd <- 407
1550 11:40:47.349060 PCI: 00:1f.3 subsystem <- 8086/a0c8
1551 11:40:47.352443 PCI: 00:1f.3 cmd <- 02
1552 11:40:47.355975 PCI: 00:1f.5 subsystem <- 8086/a0a4
1553 11:40:47.358965 PCI: 00:1f.5 cmd <- 406
1554 11:40:47.363557 PCI: 01:00.0 cmd <- 02
1555 11:40:47.368357 done.
1556 11:40:47.371314 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1557 11:40:47.374789 Initializing devices...
1558 11:40:47.378096 Root Device init
1559 11:40:47.381330 Chrome EC: Set SMI mask to 0x0000000000000000
1560 11:40:47.388050 Chrome EC: clear events_b mask to 0x0000000000000000
1561 11:40:47.394508 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1562 11:40:47.401246 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1563 11:40:47.407794 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1564 11:40:47.411159 Chrome EC: Set WAKE mask to 0x0000000000000000
1565 11:40:47.417981 fw_config match found: DB_USB=USB3_ACTIVE
1566 11:40:47.421652 Configure Right Type-C port orientation for retimer
1567 11:40:47.424788 Root Device init finished in 45 msecs
1568 11:40:47.429149 PCI: 00:00.0 init
1569 11:40:47.432526 CPU TDP = 9 Watts
1570 11:40:47.432609 CPU PL1 = 9 Watts
1571 11:40:47.435579 CPU PL2 = 40 Watts
1572 11:40:47.438822 CPU PL4 = 83 Watts
1573 11:40:47.442259 PCI: 00:00.0 init finished in 8 msecs
1574 11:40:47.442342 PCI: 00:02.0 init
1575 11:40:47.445711 GMA: Found VBT in CBFS
1576 11:40:47.448871 GMA: Found valid VBT in CBFS
1577 11:40:47.455743 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1578 11:40:47.462109 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1579 11:40:47.465693 PCI: 00:02.0 init finished in 18 msecs
1580 11:40:47.469259 PCI: 00:05.0 init
1581 11:40:47.472196 PCI: 00:05.0 init finished in 0 msecs
1582 11:40:47.475407 PCI: 00:08.0 init
1583 11:40:47.478808 PCI: 00:08.0 init finished in 0 msecs
1584 11:40:47.482097 PCI: 00:14.0 init
1585 11:40:47.485407 PCI: 00:14.0 init finished in 0 msecs
1586 11:40:47.488740 PCI: 00:14.2 init
1587 11:40:47.492237 PCI: 00:14.2 init finished in 0 msecs
1588 11:40:47.495318 PCI: 00:15.0 init
1589 11:40:47.495400 I2C bus 0 version 0x3230302a
1590 11:40:47.502102 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1591 11:40:47.505415 PCI: 00:15.0 init finished in 6 msecs
1592 11:40:47.505535 PCI: 00:15.1 init
1593 11:40:47.509055 I2C bus 1 version 0x3230302a
1594 11:40:47.512328 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1595 11:40:47.515437 PCI: 00:15.1 init finished in 6 msecs
1596 11:40:47.518899 PCI: 00:15.2 init
1597 11:40:47.522478 I2C bus 2 version 0x3230302a
1598 11:40:47.525595 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1599 11:40:47.529082 PCI: 00:15.2 init finished in 6 msecs
1600 11:40:47.532352 PCI: 00:15.3 init
1601 11:40:47.535798 I2C bus 3 version 0x3230302a
1602 11:40:47.538963 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1603 11:40:47.542432 PCI: 00:15.3 init finished in 6 msecs
1604 11:40:47.545664 PCI: 00:16.0 init
1605 11:40:47.549198 PCI: 00:16.0 init finished in 0 msecs
1606 11:40:47.552399 PCI: 00:19.1 init
1607 11:40:47.552482 I2C bus 5 version 0x3230302a
1608 11:40:47.558914 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1609 11:40:47.562089 PCI: 00:19.1 init finished in 6 msecs
1610 11:40:47.562172 PCI: 00:1d.0 init
1611 11:40:47.565364 Initializing PCH PCIe bridge.
1612 11:40:47.569073 PCI: 00:1d.0 init finished in 3 msecs
1613 11:40:47.573053 PCI: 00:1f.0 init
1614 11:40:47.576545 IOAPIC: Initializing IOAPIC at 0xfec00000
1615 11:40:47.583166 IOAPIC: Bootstrap Processor Local APIC = 0x00
1616 11:40:47.583249 IOAPIC: ID = 0x02
1617 11:40:47.586605 IOAPIC: Dumping registers
1618 11:40:47.589755 reg 0x0000: 0x02000000
1619 11:40:47.593147 reg 0x0001: 0x00770020
1620 11:40:47.593230 reg 0x0002: 0x00000000
1621 11:40:47.599547 PCI: 00:1f.0 init finished in 21 msecs
1622 11:40:47.599629 PCI: 00:1f.2 init
1623 11:40:47.603167 Disabling ACPI via APMC.
1624 11:40:47.606492 APMC done.
1625 11:40:47.609737 PCI: 00:1f.2 init finished in 5 msecs
1626 11:40:47.621807 PCI: 01:00.0 init
1627 11:40:47.624673 PCI: 01:00.0 init finished in 0 msecs
1628 11:40:47.628051 PNP: 0c09.0 init
1629 11:40:47.631525 Google Chrome EC uptime: 8.438 seconds
1630 11:40:47.637882 Google Chrome AP resets since EC boot: 1
1631 11:40:47.641425 Google Chrome most recent AP reset causes:
1632 11:40:47.644759 0.349: 32775 shutdown: entering G3
1633 11:40:47.651859 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1634 11:40:47.654658 PNP: 0c09.0 init finished in 22 msecs
1635 11:40:47.660209 Devices initialized
1636 11:40:47.663476 Show all devs... After init.
1637 11:40:47.667003 Root Device: enabled 1
1638 11:40:47.667096 DOMAIN: 0000: enabled 1
1639 11:40:47.670694 CPU_CLUSTER: 0: enabled 1
1640 11:40:47.673595 PCI: 00:00.0: enabled 1
1641 11:40:47.676983 PCI: 00:02.0: enabled 1
1642 11:40:47.677064 PCI: 00:04.0: enabled 1
1643 11:40:47.680329 PCI: 00:05.0: enabled 1
1644 11:40:47.683513 PCI: 00:06.0: enabled 0
1645 11:40:47.686921 PCI: 00:07.0: enabled 0
1646 11:40:47.687004 PCI: 00:07.1: enabled 0
1647 11:40:47.690166 PCI: 00:07.2: enabled 0
1648 11:40:47.693372 PCI: 00:07.3: enabled 0
1649 11:40:47.696776 PCI: 00:08.0: enabled 1
1650 11:40:47.696857 PCI: 00:09.0: enabled 0
1651 11:40:47.700113 PCI: 00:0a.0: enabled 0
1652 11:40:47.703286 PCI: 00:0d.0: enabled 1
1653 11:40:47.706587 PCI: 00:0d.1: enabled 0
1654 11:40:47.706670 PCI: 00:0d.2: enabled 0
1655 11:40:47.710336 PCI: 00:0d.3: enabled 0
1656 11:40:47.713276 PCI: 00:0e.0: enabled 0
1657 11:40:47.716362 PCI: 00:10.2: enabled 1
1658 11:40:47.716444 PCI: 00:10.6: enabled 0
1659 11:40:47.719844 PCI: 00:10.7: enabled 0
1660 11:40:47.722972 PCI: 00:12.0: enabled 0
1661 11:40:47.723054 PCI: 00:12.6: enabled 0
1662 11:40:47.726522 PCI: 00:13.0: enabled 0
1663 11:40:47.729669 PCI: 00:14.0: enabled 1
1664 11:40:47.733099 PCI: 00:14.1: enabled 0
1665 11:40:47.733181 PCI: 00:14.2: enabled 1
1666 11:40:47.736704 PCI: 00:14.3: enabled 1
1667 11:40:47.739753 PCI: 00:15.0: enabled 1
1668 11:40:47.743207 PCI: 00:15.1: enabled 1
1669 11:40:47.743288 PCI: 00:15.2: enabled 1
1670 11:40:47.746660 PCI: 00:15.3: enabled 1
1671 11:40:47.749859 PCI: 00:16.0: enabled 1
1672 11:40:47.752956 PCI: 00:16.1: enabled 0
1673 11:40:47.753038 PCI: 00:16.2: enabled 0
1674 11:40:47.756106 PCI: 00:16.3: enabled 0
1675 11:40:47.759317 PCI: 00:16.4: enabled 0
1676 11:40:47.762740 PCI: 00:16.5: enabled 0
1677 11:40:47.762823 PCI: 00:17.0: enabled 0
1678 11:40:47.766167 PCI: 00:19.0: enabled 0
1679 11:40:47.769194 PCI: 00:19.1: enabled 1
1680 11:40:47.772827 PCI: 00:19.2: enabled 0
1681 11:40:47.772909 PCI: 00:1c.0: enabled 1
1682 11:40:47.776150 PCI: 00:1c.1: enabled 0
1683 11:40:47.779680 PCI: 00:1c.2: enabled 0
1684 11:40:47.779762 PCI: 00:1c.3: enabled 0
1685 11:40:47.782351 PCI: 00:1c.4: enabled 0
1686 11:40:47.785752 PCI: 00:1c.5: enabled 0
1687 11:40:47.789313 PCI: 00:1c.6: enabled 1
1688 11:40:47.789421 PCI: 00:1c.7: enabled 0
1689 11:40:47.792416 PCI: 00:1d.0: enabled 1
1690 11:40:47.795896 PCI: 00:1d.1: enabled 0
1691 11:40:47.798949 PCI: 00:1d.2: enabled 1
1692 11:40:47.799030 PCI: 00:1d.3: enabled 0
1693 11:40:47.802529 PCI: 00:1e.0: enabled 1
1694 11:40:47.805669 PCI: 00:1e.1: enabled 0
1695 11:40:47.809208 PCI: 00:1e.2: enabled 1
1696 11:40:47.809290 PCI: 00:1e.3: enabled 1
1697 11:40:47.812202 PCI: 00:1f.0: enabled 1
1698 11:40:47.815765 PCI: 00:1f.1: enabled 0
1699 11:40:47.818895 PCI: 00:1f.2: enabled 1
1700 11:40:47.818977 PCI: 00:1f.3: enabled 1
1701 11:40:47.822423 PCI: 00:1f.4: enabled 0
1702 11:40:47.825758 PCI: 00:1f.5: enabled 1
1703 11:40:47.825841 PCI: 00:1f.6: enabled 0
1704 11:40:47.828848 PCI: 00:1f.7: enabled 0
1705 11:40:47.832421 APIC: 00: enabled 1
1706 11:40:47.835441 GENERIC: 0.0: enabled 1
1707 11:40:47.835523 GENERIC: 0.0: enabled 1
1708 11:40:47.838916 GENERIC: 1.0: enabled 1
1709 11:40:47.842385 GENERIC: 0.0: enabled 1
1710 11:40:47.845441 GENERIC: 1.0: enabled 1
1711 11:40:47.845535 USB0 port 0: enabled 1
1712 11:40:47.848725 GENERIC: 0.0: enabled 1
1713 11:40:47.852377 USB0 port 0: enabled 1
1714 11:40:47.852459 GENERIC: 0.0: enabled 1
1715 11:40:47.855323 I2C: 00:1a: enabled 1
1716 11:40:47.858920 I2C: 00:31: enabled 1
1717 11:40:47.859001 I2C: 00:32: enabled 1
1718 11:40:47.862606 I2C: 00:10: enabled 1
1719 11:40:47.865486 I2C: 00:15: enabled 1
1720 11:40:47.868943 GENERIC: 0.0: enabled 0
1721 11:40:47.869043 GENERIC: 1.0: enabled 0
1722 11:40:47.872400 GENERIC: 0.0: enabled 1
1723 11:40:47.875549 SPI: 00: enabled 1
1724 11:40:47.875631 SPI: 00: enabled 1
1725 11:40:47.878791 PNP: 0c09.0: enabled 1
1726 11:40:47.882068 GENERIC: 0.0: enabled 1
1727 11:40:47.882149 USB3 port 0: enabled 1
1728 11:40:47.885504 USB3 port 1: enabled 1
1729 11:40:47.888601 USB3 port 2: enabled 0
1730 11:40:47.888682 USB3 port 3: enabled 0
1731 11:40:47.892011 USB2 port 0: enabled 0
1732 11:40:47.895778 USB2 port 1: enabled 1
1733 11:40:47.898761 USB2 port 2: enabled 1
1734 11:40:47.898842 USB2 port 3: enabled 0
1735 11:40:47.901809 USB2 port 4: enabled 1
1736 11:40:47.905299 USB2 port 5: enabled 0
1737 11:40:47.905380 USB2 port 6: enabled 0
1738 11:40:47.909102 USB2 port 7: enabled 0
1739 11:40:47.911943 USB2 port 8: enabled 0
1740 11:40:47.912024 USB2 port 9: enabled 0
1741 11:40:47.915626 USB3 port 0: enabled 0
1742 11:40:47.918530 USB3 port 1: enabled 1
1743 11:40:47.921832 USB3 port 2: enabled 0
1744 11:40:47.921913 USB3 port 3: enabled 0
1745 11:40:47.925224 GENERIC: 0.0: enabled 1
1746 11:40:47.928920 GENERIC: 1.0: enabled 1
1747 11:40:47.929001 APIC: 01: enabled 1
1748 11:40:47.932219 APIC: 03: enabled 1
1749 11:40:47.935270 APIC: 05: enabled 1
1750 11:40:47.935351 APIC: 06: enabled 1
1751 11:40:47.938871 APIC: 02: enabled 1
1752 11:40:47.938952 APIC: 04: enabled 1
1753 11:40:47.941866 APIC: 07: enabled 1
1754 11:40:47.945023 PCI: 01:00.0: enabled 1
1755 11:40:47.948363 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1756 11:40:47.955077 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1757 11:40:47.958622 ELOG: NV offset 0xf30000 size 0x1000
1758 11:40:47.965686 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1759 11:40:47.972160 ELOG: Event(17) added with size 13 at 2023-04-03 11:40:46 UTC
1760 11:40:47.978945 ELOG: Event(92) added with size 9 at 2023-04-03 11:40:46 UTC
1761 11:40:47.985303 ELOG: Event(93) added with size 9 at 2023-04-03 11:40:46 UTC
1762 11:40:47.991946 ELOG: Event(9E) added with size 10 at 2023-04-03 11:40:46 UTC
1763 11:40:47.998702 ELOG: Event(9F) added with size 14 at 2023-04-03 11:40:46 UTC
1764 11:40:48.005276 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1765 11:40:48.008769 ELOG: Event(A1) added with size 10 at 2023-04-03 11:40:46 UTC
1766 11:40:48.018729 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1767 11:40:48.025295 ELOG: Event(A0) added with size 9 at 2023-04-03 11:40:46 UTC
1768 11:40:48.028800 elog_add_boot_reason: Logged dev mode boot
1769 11:40:48.035529 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1770 11:40:48.035611 Finalize devices...
1771 11:40:48.038552 Devices finalized
1772 11:40:48.045203 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1773 11:40:48.048286 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1774 11:40:48.055181 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1775 11:40:48.058348 ME: HFSTS1 : 0x80030055
1776 11:40:48.065061 ME: HFSTS2 : 0x30280116
1777 11:40:48.068641 ME: HFSTS3 : 0x00000050
1778 11:40:48.071693 ME: HFSTS4 : 0x00004000
1779 11:40:48.078369 ME: HFSTS5 : 0x00000000
1780 11:40:48.081567 ME: HFSTS6 : 0x00400006
1781 11:40:48.084909 ME: Manufacturing Mode : YES
1782 11:40:48.088238 ME: SPI Protection Mode Enabled : NO
1783 11:40:48.091477 ME: FW Partition Table : OK
1784 11:40:48.098201 ME: Bringup Loader Failure : NO
1785 11:40:48.101729 ME: Firmware Init Complete : NO
1786 11:40:48.104781 ME: Boot Options Present : NO
1787 11:40:48.108405 ME: Update In Progress : NO
1788 11:40:48.111510 ME: D0i3 Support : YES
1789 11:40:48.115128 ME: Low Power State Enabled : NO
1790 11:40:48.118428 ME: CPU Replaced : YES
1791 11:40:48.121593 ME: CPU Replacement Valid : YES
1792 11:40:48.125016 ME: Current Working State : 5
1793 11:40:48.131610 ME: Current Operation State : 1
1794 11:40:48.134721 ME: Current Operation Mode : 3
1795 11:40:48.138094 ME: Error Code : 0
1796 11:40:48.141474 ME: Enhanced Debug Mode : NO
1797 11:40:48.144685 ME: CPU Debug Disabled : YES
1798 11:40:48.148290 ME: TXT Support : NO
1799 11:40:48.154883 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1800 11:40:48.161658 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1801 11:40:48.164880 CBFS: 'fallback/slic' not found.
1802 11:40:48.167956 ACPI: Writing ACPI tables at 76b01000.
1803 11:40:48.171515 ACPI: * FACS
1804 11:40:48.171591 ACPI: * DSDT
1805 11:40:48.178249 Ramoops buffer: 0x100000@0x76a00000.
1806 11:40:48.181422 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1807 11:40:48.184527 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1808 11:40:48.189380 Google Chrome EC: version:
1809 11:40:48.193056 ro: voema_v2.0.7540-147f8d37d1
1810 11:40:48.196115 rw: voema_v2.0.7540-147f8d37d1
1811 11:40:48.199420 running image: 2
1812 11:40:48.206443 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1813 11:40:48.209352 ACPI: * FADT
1814 11:40:48.209434 SCI is IRQ9
1815 11:40:48.212928 ACPI: added table 1/32, length now 40
1816 11:40:48.216051 ACPI: * SSDT
1817 11:40:48.219615 Found 1 CPU(s) with 8 core(s) each.
1818 11:40:48.222738 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1819 11:40:48.229405 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1820 11:40:48.232492 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1821 11:40:48.236015 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1822 11:40:48.242696 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1823 11:40:48.249210 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1824 11:40:48.252501 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1825 11:40:48.259525 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1826 11:40:48.265881 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1827 11:40:48.269055 \_SB.PCI0.RP09: Added StorageD3Enable property
1828 11:40:48.272570 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1829 11:40:48.279283 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1830 11:40:48.285688 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1831 11:40:48.289208 PS2K: Passing 80 keymaps to kernel
1832 11:40:48.296019 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1833 11:40:48.302561 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1834 11:40:48.308812 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1835 11:40:48.315604 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1836 11:40:48.322377 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1837 11:40:48.328961 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1838 11:40:48.332709 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1839 11:40:48.338886 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1840 11:40:48.345576 ACPI: added table 2/32, length now 44
1841 11:40:48.345655 ACPI: * MCFG
1842 11:40:48.348809 ACPI: added table 3/32, length now 48
1843 11:40:48.352203 ACPI: * TPM2
1844 11:40:48.355661 TPM2 log created at 0x769f0000
1845 11:40:48.359034 ACPI: added table 4/32, length now 52
1846 11:40:48.359108 ACPI: * MADT
1847 11:40:48.361982 SCI is IRQ9
1848 11:40:48.365670 ACPI: added table 5/32, length now 56
1849 11:40:48.365747 current = 76b09850
1850 11:40:48.368583 ACPI: * DMAR
1851 11:40:48.371860 ACPI: added table 6/32, length now 60
1852 11:40:48.375334 ACPI: added table 7/32, length now 64
1853 11:40:48.378804 ACPI: * HPET
1854 11:40:48.382191 ACPI: added table 8/32, length now 68
1855 11:40:48.382268 ACPI: done.
1856 11:40:48.385366 ACPI tables: 35216 bytes.
1857 11:40:48.388586 smbios_write_tables: 769ef000
1858 11:40:48.392053 EC returned error result code 3
1859 11:40:48.395577 Couldn't obtain OEM name from CBI
1860 11:40:48.398733 Create SMBIOS type 16
1861 11:40:48.402125 Create SMBIOS type 17
1862 11:40:48.402199 GENERIC: 0.0 (WIFI Device)
1863 11:40:48.405314 SMBIOS tables: 1750 bytes.
1864 11:40:48.408372 Writing table forward entry at 0x00000500
1865 11:40:48.415476 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1866 11:40:48.418549 Writing coreboot table at 0x76b25000
1867 11:40:48.425159 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1868 11:40:48.431804 1. 0000000000001000-000000000009ffff: RAM
1869 11:40:48.435224 2. 00000000000a0000-00000000000fffff: RESERVED
1870 11:40:48.438344 3. 0000000000100000-00000000769eefff: RAM
1871 11:40:48.445102 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1872 11:40:48.451613 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1873 11:40:48.455023 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1874 11:40:48.461743 7. 0000000077000000-000000007fbfffff: RESERVED
1875 11:40:48.464892 8. 00000000c0000000-00000000cfffffff: RESERVED
1876 11:40:48.472048 9. 00000000f8000000-00000000f9ffffff: RESERVED
1877 11:40:48.475112 10. 00000000fb000000-00000000fb000fff: RESERVED
1878 11:40:48.481632 11. 00000000fe000000-00000000fe00ffff: RESERVED
1879 11:40:48.485169 12. 00000000fed80000-00000000fed87fff: RESERVED
1880 11:40:48.488170 13. 00000000fed90000-00000000fed92fff: RESERVED
1881 11:40:48.495262 14. 00000000feda0000-00000000feda1fff: RESERVED
1882 11:40:48.498340 15. 00000000fedc0000-00000000feddffff: RESERVED
1883 11:40:48.504831 16. 0000000100000000-00000002803fffff: RAM
1884 11:40:48.504913 Passing 4 GPIOs to payload:
1885 11:40:48.511622 NAME | PORT | POLARITY | VALUE
1886 11:40:48.518116 lid | undefined | high | high
1887 11:40:48.521580 power | undefined | high | low
1888 11:40:48.528277 oprom | undefined | high | low
1889 11:40:48.531273 EC in RW | 0x000000e5 | high | high
1890 11:40:48.538014 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 8e0
1891 11:40:48.541316 coreboot table: 1576 bytes.
1892 11:40:48.545011 IMD ROOT 0. 0x76fff000 0x00001000
1893 11:40:48.548023 IMD SMALL 1. 0x76ffe000 0x00001000
1894 11:40:48.551503 FSP MEMORY 2. 0x76c4e000 0x003b0000
1895 11:40:48.557911 VPD 3. 0x76c4d000 0x00000367
1896 11:40:48.561588 RO MCACHE 4. 0x76c4c000 0x00000fdc
1897 11:40:48.564920 CONSOLE 5. 0x76c2c000 0x00020000
1898 11:40:48.567992 FMAP 6. 0x76c2b000 0x00000578
1899 11:40:48.571552 TIME STAMP 7. 0x76c2a000 0x00000910
1900 11:40:48.574994 VBOOT WORK 8. 0x76c16000 0x00014000
1901 11:40:48.578016 ROMSTG STCK 9. 0x76c15000 0x00001000
1902 11:40:48.581708 AFTER CAR 10. 0x76c0a000 0x0000b000
1903 11:40:48.588119 RAMSTAGE 11. 0x76b97000 0x00073000
1904 11:40:48.591634 REFCODE 12. 0x76b42000 0x00055000
1905 11:40:48.594979 SMM BACKUP 13. 0x76b32000 0x00010000
1906 11:40:48.598067 4f444749 14. 0x76b30000 0x00002000
1907 11:40:48.601312 EXT VBT15. 0x76b2d000 0x0000219f
1908 11:40:48.604814 COREBOOT 16. 0x76b25000 0x00008000
1909 11:40:48.608211 ACPI 17. 0x76b01000 0x00024000
1910 11:40:48.611816 ACPI GNVS 18. 0x76b00000 0x00001000
1911 11:40:48.614962 RAMOOPS 19. 0x76a00000 0x00100000
1912 11:40:48.618358 TPM2 TCGLOG20. 0x769f0000 0x00010000
1913 11:40:48.624691 SMBIOS 21. 0x769ef000 0x00000800
1914 11:40:48.624773 IMD small region:
1915 11:40:48.628114 IMD ROOT 0. 0x76ffec00 0x00000400
1916 11:40:48.631709 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1917 11:40:48.637955 POWER STATE 2. 0x76ffeb80 0x00000044
1918 11:40:48.641181 ROMSTAGE 3. 0x76ffeb60 0x00000004
1919 11:40:48.644943 MEM INFO 4. 0x76ffe980 0x000001e0
1920 11:40:48.651368 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1921 11:40:48.655002 MTRR: Physical address space:
1922 11:40:48.661754 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1923 11:40:48.664620 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1924 11:40:48.671243 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1925 11:40:48.677838 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1926 11:40:48.684739 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1927 11:40:48.691159 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1928 11:40:48.697951 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1929 11:40:48.701303 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 11:40:48.704467 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 11:40:48.711427 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 11:40:48.714541 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 11:40:48.717717 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 11:40:48.721039 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 11:40:48.727497 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 11:40:48.731152 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 11:40:48.734122 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 11:40:48.737777 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 11:40:48.741090 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 11:40:48.745443 call enable_fixed_mtrr()
1941 11:40:48.749015 CPU physical address size: 39 bits
1942 11:40:48.755535 MTRR: default type WB/UC MTRR counts: 6/6.
1943 11:40:48.758681 MTRR: UC selected as default type.
1944 11:40:48.765410 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1945 11:40:48.768819 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1946 11:40:48.775555 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1947 11:40:48.782003 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1948 11:40:48.788764 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1949 11:40:48.795498 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1950 11:40:48.795583
1951 11:40:48.798695 MTRR check
1952 11:40:48.798779 Fixed MTRRs : Enabled
1953 11:40:48.802279 Variable MTRRs: Enabled
1954 11:40:48.802364
1955 11:40:48.808598 MTRR: Fixed MSR 0x250 0x0606060606060606
1956 11:40:48.812044 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 11:40:48.815195 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 11:40:48.818610 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 11:40:48.821835 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 11:40:48.828672 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 11:40:48.831824 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 11:40:48.835378 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 11:40:48.838588 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 11:40:48.845391 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 11:40:48.848663 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 11:40:48.855467 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1967 11:40:48.858798 call enable_fixed_mtrr()
1968 11:40:48.861729 Checking cr50 for pending updates
1969 11:40:48.865363 CPU physical address size: 39 bits
1970 11:40:48.869083 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 11:40:48.872267 MTRR: Fixed MSR 0x250 0x0606060606060606
1972 11:40:48.876038 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 11:40:48.882228 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 11:40:48.885699 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 11:40:48.888793 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 11:40:48.892319 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 11:40:48.898820 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 11:40:48.902104 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 11:40:48.905297 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 11:40:48.908754 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 11:40:48.915422 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 11:40:48.918812 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 11:40:48.921809 call enable_fixed_mtrr()
1984 11:40:48.925122 MTRR: Fixed MSR 0x259 0x0000000000000000
1985 11:40:48.928729 MTRR: Fixed MSR 0x268 0x0606060606060606
1986 11:40:48.935427 MTRR: Fixed MSR 0x269 0x0606060606060606
1987 11:40:48.938612 MTRR: Fixed MSR 0x26a 0x0606060606060606
1988 11:40:48.942081 MTRR: Fixed MSR 0x26b 0x0606060606060606
1989 11:40:48.945386 MTRR: Fixed MSR 0x26c 0x0606060606060606
1990 11:40:48.948646 MTRR: Fixed MSR 0x26d 0x0606060606060606
1991 11:40:48.955182 MTRR: Fixed MSR 0x26e 0x0606060606060606
1992 11:40:48.958610 MTRR: Fixed MSR 0x26f 0x0606060606060606
1993 11:40:48.961972 CPU physical address size: 39 bits
1994 11:40:48.965921 call enable_fixed_mtrr()
1995 11:40:48.969128 MTRR: Fixed MSR 0x250 0x0606060606060606
1996 11:40:48.976100 MTRR: Fixed MSR 0x250 0x0606060606060606
1997 11:40:48.979175 MTRR: Fixed MSR 0x258 0x0606060606060606
1998 11:40:48.982657 MTRR: Fixed MSR 0x259 0x0000000000000000
1999 11:40:48.985915 MTRR: Fixed MSR 0x268 0x0606060606060606
2000 11:40:48.992588 MTRR: Fixed MSR 0x269 0x0606060606060606
2001 11:40:48.995650 MTRR: Fixed MSR 0x26a 0x0606060606060606
2002 11:40:48.999162 MTRR: Fixed MSR 0x26b 0x0606060606060606
2003 11:40:49.002277 MTRR: Fixed MSR 0x26c 0x0606060606060606
2004 11:40:49.008989 MTRR: Fixed MSR 0x26d 0x0606060606060606
2005 11:40:49.012206 MTRR: Fixed MSR 0x26e 0x0606060606060606
2006 11:40:49.015722 MTRR: Fixed MSR 0x26f 0x0606060606060606
2007 11:40:49.022246 MTRR: Fixed MSR 0x258 0x0606060606060606
2008 11:40:49.022329 call enable_fixed_mtrr()
2009 11:40:49.028862 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 11:40:49.032148 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 11:40:49.035755 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 11:40:49.038945 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 11:40:49.045580 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 11:40:49.048571 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 11:40:49.052376 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 11:40:49.055346 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 11:40:49.058577 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 11:40:49.065356 CPU physical address size: 39 bits
2019 11:40:49.068724 call enable_fixed_mtrr()
2020 11:40:49.071814 CPU physical address size: 39 bits
2021 11:40:49.075380 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 11:40:49.078484 MTRR: Fixed MSR 0x250 0x0606060606060606
2023 11:40:49.085144 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 11:40:49.088987 MTRR: Fixed MSR 0x259 0x0000000000000000
2025 11:40:49.092128 MTRR: Fixed MSR 0x268 0x0606060606060606
2026 11:40:49.095089 MTRR: Fixed MSR 0x269 0x0606060606060606
2027 11:40:49.101721 MTRR: Fixed MSR 0x26a 0x0606060606060606
2028 11:40:49.105280 MTRR: Fixed MSR 0x26b 0x0606060606060606
2029 11:40:49.108442 MTRR: Fixed MSR 0x26c 0x0606060606060606
2030 11:40:49.111933 MTRR: Fixed MSR 0x26d 0x0606060606060606
2031 11:40:49.118516 MTRR: Fixed MSR 0x26e 0x0606060606060606
2032 11:40:49.121530 MTRR: Fixed MSR 0x26f 0x0606060606060606
2033 11:40:49.124810 MTRR: Fixed MSR 0x258 0x0606060606060606
2034 11:40:49.131524 MTRR: Fixed MSR 0x259 0x0000000000000000
2035 11:40:49.135077 MTRR: Fixed MSR 0x268 0x0606060606060606
2036 11:40:49.138058 MTRR: Fixed MSR 0x269 0x0606060606060606
2037 11:40:49.141617 MTRR: Fixed MSR 0x26a 0x0606060606060606
2038 11:40:49.148013 MTRR: Fixed MSR 0x26b 0x0606060606060606
2039 11:40:49.151330 MTRR: Fixed MSR 0x26c 0x0606060606060606
2040 11:40:49.154724 MTRR: Fixed MSR 0x26d 0x0606060606060606
2041 11:40:49.158407 MTRR: Fixed MSR 0x26e 0x0606060606060606
2042 11:40:49.161404 MTRR: Fixed MSR 0x26f 0x0606060606060606
2043 11:40:49.168199 call enable_fixed_mtrr()
2044 11:40:49.168282 call enable_fixed_mtrr()
2045 11:40:49.171335 CPU physical address size: 39 bits
2046 11:40:49.174952 Reading cr50 TPM mode
2047 11:40:49.178709 CPU physical address size: 39 bits
2048 11:40:49.181959 CPU physical address size: 39 bits
2049 11:40:49.189014 BS: BS_PAYLOAD_LOAD entry times (exec / console): 319 / 6 ms
2050 11:40:49.195353 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2051 11:40:49.202308 Checking segment from ROM address 0xffc02b38
2052 11:40:49.205379 Checking segment from ROM address 0xffc02b54
2053 11:40:49.209049 Loading segment from ROM address 0xffc02b38
2054 11:40:49.212059 code (compression=0)
2055 11:40:49.222079 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2056 11:40:49.228550 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2057 11:40:49.232090 it's not compressed!
2058 11:40:49.370651 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2059 11:40:49.377240 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2060 11:40:49.384040 Loading segment from ROM address 0xffc02b54
2061 11:40:49.384137 Entry Point 0x30000000
2062 11:40:49.387324 Loaded segments
2063 11:40:49.393891 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2064 11:40:49.436944 Finalizing chipset.
2065 11:40:49.440299 Finalizing SMM.
2066 11:40:49.440382 APMC done.
2067 11:40:49.446880 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2068 11:40:49.450257 mp_park_aps done after 0 msecs.
2069 11:40:49.453460 Jumping to boot code at 0x30000000(0x76b25000)
2070 11:40:49.463255 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2071 11:40:49.463355
2072 11:40:49.463440
2073 11:40:49.463521
2074 11:40:49.466832 Starting depthcharge on Voema...
2075 11:40:49.466910
2076 11:40:49.467267 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2077 11:40:49.467380 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2078 11:40:49.467475 Setting prompt string to ['volteer:']
2079 11:40:49.467568 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2080 11:40:49.476608 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2081 11:40:49.476690
2082 11:40:49.483509 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2083 11:40:49.483595
2084 11:40:49.486687 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2085 11:40:49.490777
2086 11:40:49.490854 Failed to find eMMC card reader
2087 11:40:49.490939
2088 11:40:49.494301 Wipe memory regions:
2089 11:40:49.494386
2090 11:40:49.497470 [0x00000000001000, 0x000000000a0000)
2091 11:40:49.497582
2092 11:40:49.501090 [0x00000000100000, 0x00000030000000)
2093 11:40:49.528369
2094 11:40:49.531732 [0x00000032662db0, 0x000000769ef000)
2095 11:40:49.567042
2096 11:40:49.570092 [0x00000100000000, 0x00000280400000)
2097 11:40:49.770299
2098 11:40:49.773620 ec_init: CrosEC protocol v3 supported (256, 256)
2099 11:40:49.773707
2100 11:40:49.780409 update_port_state: port C0 state: usb enable 1 mux conn 0
2101 11:40:49.780506
2102 11:40:49.786819 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2103 11:40:49.791668
2104 11:40:49.794926 pmc_check_ipc_sts: STS_BUSY done after 1511 us
2105 11:40:49.795011
2106 11:40:49.798265 send_conn_disc_msg: pmc_send_cmd succeeded
2107 11:40:50.232005
2108 11:40:50.232159 R8152: Initializing
2109 11:40:50.232254
2110 11:40:50.235077 Version 9 (ocp_data = 6010)
2111 11:40:50.235163
2112 11:40:50.238319 R8152: Done initializing
2113 11:40:50.238410
2114 11:40:50.241595 Adding net device
2115 11:40:50.543271
2116 11:40:50.546727 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2117 11:40:50.546818
2118 11:40:50.546905
2119 11:40:50.546986
2120 11:40:50.550016 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2122 11:40:50.650786 volteer: tftpboot 192.168.201.1 9849695/tftp-deploy-pz5emci9/kernel/bzImage 9849695/tftp-deploy-pz5emci9/kernel/cmdline 9849695/tftp-deploy-pz5emci9/ramdisk/ramdisk.cpio.gz
2123 11:40:50.650950 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2124 11:40:50.651060 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2125 11:40:50.655223 tftpboot 192.168.201.1 9849695/tftp-deploy-pz5emci9/kernel/bzImoy-pz5emci9/kernel/cmdline 9849695/tftp-deploy-pz5emci9/ramdisk/ramdisk.cpio.gz
2126 11:40:50.655315
2127 11:40:50.655402 Waiting for link
2128 11:40:50.858996
2129 11:40:50.859147 done.
2130 11:40:50.859242
2131 11:40:50.859324 MAC: 00:e0:4c:71:a6:42
2132 11:40:50.859405
2133 11:40:50.862258 Sending DHCP discover... done.
2134 11:40:50.862349
2135 11:40:50.865653 Waiting for reply... done.
2136 11:40:50.865763
2137 11:40:50.868742 Sending DHCP request... done.
2138 11:40:50.868829
2139 11:40:50.872234 Waiting for reply... done.
2140 11:40:50.872351
2141 11:40:50.875309 My ip is 192.168.201.18
2142 11:40:50.875393
2143 11:40:50.878655 The DHCP server ip is 192.168.201.1
2144 11:40:50.878787
2145 11:40:50.885336 TFTP server IP predefined by user: 192.168.201.1
2146 11:40:50.885455
2147 11:40:50.891898 Bootfile predefined by user: 9849695/tftp-deploy-pz5emci9/kernel/bzImage
2148 11:40:50.892010
2149 11:40:50.895495 Sending tftp read request... done.
2150 11:40:50.895592
2151 11:40:50.898597 Waiting for the transfer...
2152 11:40:50.898704
2153 11:40:51.155402 00000000 ################################################################
2154 11:40:51.155563
2155 11:40:51.407850 00080000 ################################################################
2156 11:40:51.407997
2157 11:40:51.662562 00100000 ################################################################
2158 11:40:51.662698
2159 11:40:51.914697 00180000 ################################################################
2160 11:40:51.914838
2161 11:40:52.160948 00200000 ################################################################
2162 11:40:52.161083
2163 11:40:52.409069 00280000 ################################################################
2164 11:40:52.409200
2165 11:40:52.655940 00300000 ################################################################
2166 11:40:52.656080
2167 11:40:52.902177 00380000 ################################################################
2168 11:40:52.902314
2169 11:40:53.148385 00400000 ################################################################
2170 11:40:53.148534
2171 11:40:53.393825 00480000 ################################################################
2172 11:40:53.393985
2173 11:40:53.640387 00500000 ################################################################
2174 11:40:53.640522
2175 11:40:53.886617 00580000 ################################################################
2176 11:40:53.886764
2177 11:40:54.132687 00600000 ################################################################
2178 11:40:54.132815
2179 11:40:54.378488 00680000 ################################################################
2180 11:40:54.378622
2181 11:40:54.628364 00700000 ################################################################
2182 11:40:54.628496
2183 11:40:54.636561 00780000 ## done.
2184 11:40:54.636646
2185 11:40:54.639956 The bootfile was 7880592 bytes long.
2186 11:40:54.640040
2187 11:40:54.643494 Sending tftp read request... done.
2188 11:40:54.643577
2189 11:40:54.646437 Waiting for the transfer...
2190 11:40:54.646519
2191 11:40:54.903839 00000000 ################################################################
2192 11:40:54.904006
2193 11:40:55.150956 00080000 ################################################################
2194 11:40:55.151089
2195 11:40:55.395644 00100000 ################################################################
2196 11:40:55.395776
2197 11:40:55.643483 00180000 ################################################################
2198 11:40:55.643615
2199 11:40:55.895369 00200000 ################################################################
2200 11:40:55.895505
2201 11:40:56.148777 00280000 ################################################################
2202 11:40:56.148915
2203 11:40:56.399902 00300000 ################################################################
2204 11:40:56.400037
2205 11:40:56.652667 00380000 ################################################################
2206 11:40:56.652803
2207 11:40:56.906031 00400000 ################################################################
2208 11:40:56.906173
2209 11:40:57.161983 00480000 ################################################################
2210 11:40:57.162117
2211 11:40:57.424478 00500000 ################################################################
2212 11:40:57.424621
2213 11:40:57.687791 00580000 ################################################################
2214 11:40:57.687931
2215 11:40:57.942023 00600000 ################################################################
2216 11:40:57.942170
2217 11:40:58.194361 00680000 ################################################################
2218 11:40:58.194508
2219 11:40:58.443729 00700000 ################################################################
2220 11:40:58.443860
2221 11:40:58.690334 00780000 ################################################################
2222 11:40:58.690530
2223 11:40:58.946862 00800000 ################################################################
2224 11:40:58.947017
2225 11:40:59.189315 00880000 ################################################################
2226 11:40:59.189456
2227 11:40:59.431989 00900000 ################################################################
2228 11:40:59.432126
2229 11:40:59.681004 00980000 ################################################################
2230 11:40:59.681165
2231 11:40:59.934739 00a00000 ################################################################
2232 11:40:59.934882
2233 11:41:00.181110 00a80000 ################################################################
2234 11:41:00.181242
2235 11:41:00.429083 00b00000 ################################################################
2236 11:41:00.429236
2237 11:41:00.679343 00b80000 ################################################################
2238 11:41:00.679476
2239 11:41:00.937067 00c00000 ################################################################
2240 11:41:00.937241
2241 11:41:01.194959 00c80000 ################################################################
2242 11:41:01.195098
2243 11:41:01.450706 00d00000 ################################################################
2244 11:41:01.450846
2245 11:41:01.694430 00d80000 ################################################################
2246 11:41:01.694601
2247 11:41:01.940212 00e00000 ################################################################
2248 11:41:01.940354
2249 11:41:02.190811 00e80000 ################################################################
2250 11:41:02.190942
2251 11:41:02.436462 00f00000 ################################################################
2252 11:41:02.436624
2253 11:41:02.682608 00f80000 ################################################################
2254 11:41:02.682737
2255 11:41:02.936518 01000000 ################################################################
2256 11:41:02.936739
2257 11:41:03.178125 01080000 ################################################################
2258 11:41:03.178288
2259 11:41:03.427545 01100000 ################################################################
2260 11:41:03.427676
2261 11:41:03.675114 01180000 ################################################################
2262 11:41:03.675253
2263 11:41:03.930447 01200000 ################################################################
2264 11:41:03.930579
2265 11:41:04.178213 01280000 ################################################################
2266 11:41:04.178368
2267 11:41:04.422478 01300000 ################################################################
2268 11:41:04.422611
2269 11:41:04.663726 01380000 ################################################################
2270 11:41:04.663898
2271 11:41:04.929428 01400000 ################################################################
2272 11:41:04.929610
2273 11:41:05.176695 01480000 ################################################################
2274 11:41:05.176830
2275 11:41:05.420995 01500000 ################################################################
2276 11:41:05.421132
2277 11:41:05.668316 01580000 ################################################################
2278 11:41:05.668472
2279 11:41:05.925908 01600000 ################################################################
2280 11:41:05.926072
2281 11:41:06.195896 01680000 ################################################################
2282 11:41:06.196064
2283 11:41:06.443000 01700000 ################################################################
2284 11:41:06.443166
2285 11:41:06.686080 01780000 ################################################################
2286 11:41:06.686216
2287 11:41:06.934276 01800000 ################################################################
2288 11:41:06.934408
2289 11:41:07.198125 01880000 ################################################################
2290 11:41:07.198255
2291 11:41:07.460765 01900000 ################################################################
2292 11:41:07.460897
2293 11:41:07.749823 01980000 ################################################################
2294 11:41:07.749969
2295 11:41:08.022426 01a00000 ################################################################
2296 11:41:08.022561
2297 11:41:08.293806 01a80000 ################################################################
2298 11:41:08.293935
2299 11:41:08.577732 01b00000 ################################################################
2300 11:41:08.577866
2301 11:41:08.836791 01b80000 ################################################################
2302 11:41:08.836921
2303 11:41:09.096300 01c00000 ################################################################
2304 11:41:09.096434
2305 11:41:09.375856 01c80000 ################################################################
2306 11:41:09.375992
2307 11:41:09.633607 01d00000 ################################################################
2308 11:41:09.633769
2309 11:41:09.886802 01d80000 ################################################################
2310 11:41:09.886933
2311 11:41:10.131723 01e00000 ################################################################
2312 11:41:10.131855
2313 11:41:10.376599 01e80000 ################################################################
2314 11:41:10.376722
2315 11:41:10.635267 01f00000 ################################################################
2316 11:41:10.635431
2317 11:41:10.883211 01f80000 ################################################################
2318 11:41:10.883359
2319 11:41:11.269624 02000000 ################################################################
2320 11:41:11.270130
2321 11:41:11.583770 02080000 ################################################################
2322 11:41:11.583913
2323 11:41:11.861383 02100000 ################################################################
2324 11:41:11.861514
2325 11:41:12.136667 02180000 ################################################################
2326 11:41:12.136795
2327 11:41:12.444360 02200000 ###################################################### done.
2328 11:41:12.444905
2329 11:41:12.447704 Sending tftp read request... done.
2330 11:41:12.448182
2331 11:41:12.450748 Waiting for the transfer...
2332 11:41:12.451275
2333 11:41:12.451623 00000000 # done.
2334 11:41:12.451959
2335 11:41:12.461027 Command line loaded dynamically from TFTP file: 9849695/tftp-deploy-pz5emci9/kernel/cmdline
2336 11:41:12.461639
2337 11:41:12.474186 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2338 11:41:12.480278
2339 11:41:12.483313 Shutting down all USB controllers.
2340 11:41:12.483881
2341 11:41:12.484259 Removing current net device
2342 11:41:12.484611
2343 11:41:12.486306 Finalizing coreboot
2344 11:41:12.486782
2345 11:41:12.493228 Exiting depthcharge with code 4 at timestamp: 31699850
2346 11:41:12.493889
2347 11:41:12.494277
2348 11:41:12.494632 Starting kernel ...
2349 11:41:12.494975
2350 11:41:12.495306
2351 11:41:12.496761 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2352 11:41:12.497287 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2353 11:41:12.497791 Setting prompt string to ['Linux version [0-9]']
2354 11:41:12.498206 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2355 11:41:12.498595 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2357 11:45:33.498350 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2359 11:45:33.499458 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2361 11:45:33.500281 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2364 11:45:33.501838 end: 2 depthcharge-action (duration 00:05:00) [common]
2366 11:45:33.502843 Cleaning after the job
2367 11:45:33.502928 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849695/tftp-deploy-pz5emci9/ramdisk
2368 11:45:33.505721 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849695/tftp-deploy-pz5emci9/kernel
2369 11:45:33.506398 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849695/tftp-deploy-pz5emci9/modules
2370 11:45:33.506638 start: 4.1 power-off (timeout 00:00:30) [common]
2371 11:45:33.506789 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=off'
2372 11:45:33.588940 >> Command sent successfully.
2373 11:45:33.599979 Returned 0 in 0 seconds
2374 11:45:33.701891 end: 4.1 power-off (duration 00:00:00) [common]
2376 11:45:33.703436 start: 4.2 read-feedback (timeout 00:10:00) [common]
2377 11:45:33.704692 Listened to connection for namespace 'common' for up to 1s
2378 11:45:34.705791 Finalising connection for namespace 'common'
2379 11:45:34.706606 Disconnecting from shell: Finalise
2380 11:45:34.707193
2381 11:45:34.808601 end: 4.2 read-feedback (duration 00:00:01) [common]
2382 11:45:34.809287 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9849695
2383 11:45:34.840469 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9849695
2384 11:45:34.840643 JobError: Your job cannot terminate cleanly.