Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 11:40:53.532181 lava-dispatcher, installed at version: 2023.01
2 11:40:53.532374 start: 0 validate
3 11:40:53.532498 Start time: 2023-04-03 11:40:53.532491+00:00 (UTC)
4 11:40:53.532607 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:40:53.532731 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230324.0%2Famd64%2Finitrd.cpio.gz exists
6 11:40:53.827249 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:40:53.828107 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1098-g8d34bf42efd9b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:40:53.833236 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:40:53.833856 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230324.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:40:54.127804 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:40:54.128651 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1098-g8d34bf42efd9b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 11:40:54.139745 validate duration: 0.61
14 11:40:54.140905 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:40:54.141399 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:40:54.141837 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:40:54.142330 Not decompressing ramdisk as can be used compressed.
18 11:40:54.142748 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230324.0/amd64/initrd.cpio.gz
19 11:40:54.143075 saving as /var/lib/lava/dispatcher/tmp/9849735/tftp-deploy-xy52m5zc/ramdisk/initrd.cpio.gz
20 11:40:54.143383 total size: 6132259 (5MB)
21 11:40:54.147820 progress 0% (0MB)
22 11:40:54.155925 progress 5% (0MB)
23 11:40:54.162178 progress 10% (0MB)
24 11:40:54.167023 progress 15% (0MB)
25 11:40:54.170725 progress 20% (1MB)
26 11:40:54.173942 progress 25% (1MB)
27 11:40:54.176876 progress 30% (1MB)
28 11:40:54.179428 progress 35% (2MB)
29 11:40:54.181707 progress 40% (2MB)
30 11:40:54.184234 progress 45% (2MB)
31 11:40:54.186310 progress 50% (2MB)
32 11:40:54.188338 progress 55% (3MB)
33 11:40:54.190360 progress 60% (3MB)
34 11:40:54.192156 progress 65% (3MB)
35 11:40:54.193936 progress 70% (4MB)
36 11:40:54.195723 progress 75% (4MB)
37 11:40:54.197332 progress 80% (4MB)
38 11:40:54.199089 progress 85% (5MB)
39 11:40:54.200611 progress 90% (5MB)
40 11:40:54.202079 progress 95% (5MB)
41 11:40:54.203721 progress 100% (5MB)
42 11:40:54.203847 5MB downloaded in 0.06s (96.71MB/s)
43 11:40:54.204038 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:40:54.204272 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:40:54.204360 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:40:54.204443 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:40:54.204546 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1098-g8d34bf42efd9b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 11:40:54.204614 saving as /var/lib/lava/dispatcher/tmp/9849735/tftp-deploy-xy52m5zc/kernel/bzImage
50 11:40:54.204674 total size: 7880592 (7MB)
51 11:40:54.204731 No compression specified
52 11:40:54.205811 progress 0% (0MB)
53 11:40:54.207848 progress 5% (0MB)
54 11:40:54.209785 progress 10% (0MB)
55 11:40:54.211670 progress 15% (1MB)
56 11:40:54.213604 progress 20% (1MB)
57 11:40:54.215523 progress 25% (1MB)
58 11:40:54.217460 progress 30% (2MB)
59 11:40:54.219335 progress 35% (2MB)
60 11:40:54.221263 progress 40% (3MB)
61 11:40:54.223124 progress 45% (3MB)
62 11:40:54.225014 progress 50% (3MB)
63 11:40:54.226861 progress 55% (4MB)
64 11:40:54.228744 progress 60% (4MB)
65 11:40:54.230624 progress 65% (4MB)
66 11:40:54.232501 progress 70% (5MB)
67 11:40:54.234346 progress 75% (5MB)
68 11:40:54.236235 progress 80% (6MB)
69 11:40:54.238075 progress 85% (6MB)
70 11:40:54.239917 progress 90% (6MB)
71 11:40:54.241794 progress 95% (7MB)
72 11:40:54.243648 progress 100% (7MB)
73 11:40:54.243804 7MB downloaded in 0.04s (192.08MB/s)
74 11:40:54.243939 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:40:54.244207 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:40:54.244291 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:40:54.244377 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:40:54.244482 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230324.0/amd64/full.rootfs.tar.xz
80 11:40:54.244547 saving as /var/lib/lava/dispatcher/tmp/9849735/tftp-deploy-xy52m5zc/nfsrootfs/full.rootfs.tar
81 11:40:54.244606 total size: 202986412 (193MB)
82 11:40:54.244665 Using unxz to decompress xz
83 11:40:54.248222 progress 0% (0MB)
84 11:40:54.792130 progress 5% (9MB)
85 11:40:55.292339 progress 10% (19MB)
86 11:40:55.821955 progress 15% (29MB)
87 11:40:56.089417 progress 20% (38MB)
88 11:40:56.595601 progress 25% (48MB)
89 11:40:57.136529 progress 30% (58MB)
90 11:40:57.679580 progress 35% (67MB)
91 11:40:58.205717 progress 40% (77MB)
92 11:40:58.749930 progress 45% (87MB)
93 11:40:59.320689 progress 50% (96MB)
94 11:40:59.895242 progress 55% (106MB)
95 11:41:00.550949 progress 60% (116MB)
96 11:41:00.958185 progress 65% (125MB)
97 11:41:01.045949 progress 70% (135MB)
98 11:41:01.182678 progress 75% (145MB)
99 11:41:01.265987 progress 80% (154MB)
100 11:41:01.315515 progress 85% (164MB)
101 11:41:01.406998 progress 90% (174MB)
102 11:41:01.759406 progress 95% (183MB)
103 11:41:02.323772 progress 100% (193MB)
104 11:41:02.329633 193MB downloaded in 8.09s (23.94MB/s)
105 11:41:02.329949 end: 1.3.1 http-download (duration 00:00:08) [common]
107 11:41:02.330203 end: 1.3 download-retry (duration 00:00:08) [common]
108 11:41:02.330294 start: 1.4 download-retry (timeout 00:09:52) [common]
109 11:41:02.330381 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 11:41:02.330496 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1098-g8d34bf42efd9b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 11:41:02.330566 saving as /var/lib/lava/dispatcher/tmp/9849735/tftp-deploy-xy52m5zc/modules/modules.tar
112 11:41:02.330627 total size: 251104 (0MB)
113 11:41:02.330690 Using unxz to decompress xz
114 11:41:02.625161 progress 13% (0MB)
115 11:41:02.627192 progress 26% (0MB)
116 11:41:02.628419 progress 39% (0MB)
117 11:41:02.634940 progress 52% (0MB)
118 11:41:02.644203 progress 65% (0MB)
119 11:41:02.652396 progress 78% (0MB)
120 11:41:02.660366 progress 91% (0MB)
121 11:41:02.665853 progress 100% (0MB)
122 11:41:02.677029 0MB downloaded in 0.35s (0.69MB/s)
123 11:41:02.677474 end: 1.4.1 http-download (duration 00:00:00) [common]
125 11:41:02.678175 end: 1.4 download-retry (duration 00:00:00) [common]
126 11:41:02.678356 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
127 11:41:02.678532 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
128 11:41:04.641886 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9849735/extract-nfsrootfs-rg36f5jz
129 11:41:04.642071 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 11:41:04.642171 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
131 11:41:04.642311 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow
132 11:41:04.642410 makedir: /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin
133 11:41:04.642496 makedir: /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/tests
134 11:41:04.642575 makedir: /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/results
135 11:41:04.642683 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-add-keys
136 11:41:04.642807 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-add-sources
137 11:41:04.642917 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-background-process-start
138 11:41:04.643027 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-background-process-stop
139 11:41:04.643134 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-common-functions
140 11:41:04.643241 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-echo-ipv4
141 11:41:04.643348 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-install-packages
142 11:41:04.643454 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-installed-packages
143 11:41:04.643558 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-os-build
144 11:41:04.643663 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-probe-channel
145 11:41:04.643785 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-probe-ip
146 11:41:04.643891 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-target-ip
147 11:41:04.644027 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-target-mac
148 11:41:04.644132 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-target-storage
149 11:41:04.644242 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-test-case
150 11:41:04.644349 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-test-event
151 11:41:04.644453 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-test-feedback
152 11:41:04.644558 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-test-raise
153 11:41:04.644663 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-test-reference
154 11:41:04.644768 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-test-runner
155 11:41:04.644873 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-test-set
156 11:41:04.644981 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-test-shell
157 11:41:04.645087 Updating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-add-keys (debian)
158 11:41:04.645195 Updating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-add-sources (debian)
159 11:41:04.645305 Updating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-install-packages (debian)
160 11:41:04.645412 Updating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-installed-packages (debian)
161 11:41:04.645517 Updating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/bin/lava-os-build (debian)
162 11:41:04.645609 Creating /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/environment
163 11:41:04.645703 LAVA metadata
164 11:41:04.645770 - LAVA_JOB_ID=9849735
165 11:41:04.645831 - LAVA_DISPATCHER_IP=192.168.201.1
166 11:41:04.645925 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
167 11:41:04.645988 skipped lava-vland-overlay
168 11:41:04.646060 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 11:41:04.646138 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
170 11:41:04.646197 skipped lava-multinode-overlay
171 11:41:04.646267 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 11:41:04.646342 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
173 11:41:04.646420 Loading test definitions
174 11:41:04.646507 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
175 11:41:04.646576 Using /lava-9849735 at stage 0
176 11:41:04.646792 uuid=9849735_1.5.2.3.1 testdef=None
177 11:41:04.646875 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 11:41:04.646957 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
179 11:41:04.647455 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 11:41:04.647679 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
182 11:41:04.648408 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 11:41:04.648635 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
185 11:41:04.649074 runner path: /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/0/tests/0_timesync-off test_uuid 9849735_1.5.2.3.1
186 11:41:04.649208 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 11:41:04.649437 start: 1.5.2.3.5 git-repo-action (timeout 00:09:49) [common]
189 11:41:04.649507 Using /lava-9849735 at stage 0
190 11:41:04.649600 Fetching tests from https://github.com/kernelci/test-definitions.git
191 11:41:04.649678 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/0/tests/1_kselftest-alsa'
192 11:41:07.557408 Running '/usr/bin/git checkout kernelci.org
193 11:41:07.700456 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
194 11:41:07.701185 uuid=9849735_1.5.2.3.5 testdef=None
195 11:41:07.701347 end: 1.5.2.3.5 git-repo-action (duration 00:00:03) [common]
197 11:41:07.701632 start: 1.5.2.3.6 test-overlay (timeout 00:09:46) [common]
198 11:41:07.702324 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 11:41:07.702582 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:46) [common]
201 11:41:07.703459 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 11:41:07.703721 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:46) [common]
204 11:41:07.704674 runner path: /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/0/tests/1_kselftest-alsa test_uuid 9849735_1.5.2.3.5
205 11:41:07.704773 BOARD='asus-cx9400-volteer'
206 11:41:07.704849 BRANCH='cip'
207 11:41:07.704929 SKIPFILE='skipfile-lkft.yaml'
208 11:41:07.705006 SKIP_INSTALL='True'
209 11:41:07.705080 TESTPROG_URL='None'
210 11:41:07.705155 TST_CASENAME=''
211 11:41:07.705264 TST_CMDFILES='alsa'
212 11:41:07.705446 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 11:41:07.705800 Creating lava-test-runner.conf files
215 11:41:07.705902 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9849735/lava-overlay-jju8a2ow/lava-9849735/0 for stage 0
216 11:41:07.706026 - 0_timesync-off
217 11:41:07.706125 - 1_kselftest-alsa
218 11:41:07.706263 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
219 11:41:07.706385 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
220 11:41:15.123331 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
221 11:41:15.123495 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
222 11:41:15.123609 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 11:41:15.123730 end: 1.5.2 lava-overlay (duration 00:00:10) [common]
224 11:41:15.123861 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
225 11:41:15.255559 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 11:41:15.256002 start: 1.5.4 extract-modules (timeout 00:09:39) [common]
227 11:41:15.256168 extracting modules file /var/lib/lava/dispatcher/tmp/9849735/tftp-deploy-xy52m5zc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9849735/extract-nfsrootfs-rg36f5jz
228 11:41:15.263223 extracting modules file /var/lib/lava/dispatcher/tmp/9849735/tftp-deploy-xy52m5zc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9849735/extract-overlay-ramdisk-rbmwzqr7/ramdisk
229 11:41:15.269979 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 11:41:15.270101 start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
231 11:41:15.270199 [common] Applying overlay to NFS
232 11:41:15.270279 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9849735/compress-overlay-6ma91b02/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9849735/extract-nfsrootfs-rg36f5jz
233 11:41:16.072217 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 11:41:16.072403 start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
235 11:41:16.072524 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 11:41:16.072629 start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
237 11:41:16.072729 Building ramdisk /var/lib/lava/dispatcher/tmp/9849735/extract-overlay-ramdisk-rbmwzqr7/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9849735/extract-overlay-ramdisk-rbmwzqr7/ramdisk
238 11:41:16.126614 >> 30644 blocks
239 11:41:16.763237 rename /var/lib/lava/dispatcher/tmp/9849735/extract-overlay-ramdisk-rbmwzqr7/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9849735/tftp-deploy-xy52m5zc/ramdisk/ramdisk.cpio.gz
240 11:41:16.763686 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 11:41:16.763824 start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
242 11:41:16.763934 start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
243 11:41:16.764083 No mkimage arch provided, not using FIT.
244 11:41:16.764184 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 11:41:16.764279 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 11:41:16.764399 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
247 11:41:16.764529 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
248 11:41:16.764644 No LXC device requested
249 11:41:16.764765 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 11:41:16.764899 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
251 11:41:16.764996 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 11:41:16.765080 Checking files for TFTP limit of 4294967296 bytes.
253 11:41:16.765489 end: 1 tftp-deploy (duration 00:00:23) [common]
254 11:41:16.765604 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 11:41:16.765709 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 11:41:16.765854 substitutions:
257 11:41:16.765951 - {DTB}: None
258 11:41:16.766050 - {INITRD}: 9849735/tftp-deploy-xy52m5zc/ramdisk/ramdisk.cpio.gz
259 11:41:16.766147 - {KERNEL}: 9849735/tftp-deploy-xy52m5zc/kernel/bzImage
260 11:41:16.766242 - {LAVA_MAC}: None
261 11:41:16.766337 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9849735/extract-nfsrootfs-rg36f5jz
262 11:41:16.766432 - {NFS_SERVER_IP}: 192.168.201.1
263 11:41:16.766526 - {PRESEED_CONFIG}: None
264 11:41:16.766620 - {PRESEED_LOCAL}: None
265 11:41:16.766713 - {RAMDISK}: 9849735/tftp-deploy-xy52m5zc/ramdisk/ramdisk.cpio.gz
266 11:41:16.766806 - {ROOT_PART}: None
267 11:41:16.766898 - {ROOT}: None
268 11:41:16.766989 - {SERVER_IP}: 192.168.201.1
269 11:41:16.767081 - {TEE}: None
270 11:41:16.767173 Parsed boot commands:
271 11:41:16.767263 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 11:41:16.767478 Parsed boot commands: tftpboot 192.168.201.1 9849735/tftp-deploy-xy52m5zc/kernel/bzImage 9849735/tftp-deploy-xy52m5zc/kernel/cmdline 9849735/tftp-deploy-xy52m5zc/ramdisk/ramdisk.cpio.gz
273 11:41:16.767599 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 11:41:16.767722 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 11:41:16.767854 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 11:41:16.768005 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 11:41:16.768124 Not connected, no need to disconnect.
278 11:41:16.768240 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 11:41:16.768365 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 11:41:16.768467 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-6'
281 11:41:16.771988 Setting prompt string to ['lava-test: # ']
282 11:41:16.772358 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 11:41:16.772495 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 11:41:16.772608 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 11:41:16.772714 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 11:41:16.772996 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=reboot'
287 11:41:21.927750 >> Command sent successfully.
288 11:41:21.937916 Returned 0 in 5 seconds
289 11:41:22.039577 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 11:41:22.041250 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 11:41:22.041836 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 11:41:22.042310 Setting prompt string to 'Starting depthcharge on Voema...'
294 11:41:22.042706 Changing prompt to 'Starting depthcharge on Voema...'
295 11:41:22.043081 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
296 11:41:22.044348 [Enter `^Ec?' for help]
297 11:41:23.630629
298 11:41:23.631273
299 11:41:23.640810 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
300 11:41:23.643942 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
301 11:41:23.650697 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
302 11:41:23.654153 CPU: AES supported, TXT NOT supported, VT supported
303 11:41:23.660886 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
304 11:41:23.667201 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
305 11:41:23.670736 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
306 11:41:23.673647 VBOOT: Loading verstage.
307 11:41:23.676857 FMAP: Found "FLASH" version 1.1 at 0x1804000.
308 11:41:23.683721 FMAP: base = 0x0 size = 0x2000000 #areas = 32
309 11:41:23.687328 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
310 11:41:23.698307 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
311 11:41:23.704646 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
312 11:41:23.705235
313 11:41:23.705616
314 11:41:23.718112 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
315 11:41:23.731278 Probing TPM: . done!
316 11:41:23.735164 TPM ready after 0 ms
317 11:41:23.738368 Connected to device vid:did:rid of 1ae0:0028:00
318 11:41:23.748910 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
319 11:41:23.756088 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
320 11:41:23.759276 Initialized TPM device CR50 revision 0
321 11:41:23.851070 tlcl_send_startup: Startup return code is 0
322 11:41:23.851663 TPM: setup succeeded
323 11:41:23.866793 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
324 11:41:23.880386 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
325 11:41:23.893826 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
326 11:41:23.903696 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
327 11:41:23.907617 Chrome EC: UHEPI supported
328 11:41:23.910486 Phase 1
329 11:41:23.914072 FMAP: area GBB found @ 1805000 (458752 bytes)
330 11:41:23.923922 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
331 11:41:23.930611 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
332 11:41:23.937325 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
333 11:41:23.943697 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
334 11:41:23.947139 Recovery requested (1009000e)
335 11:41:23.950504 TPM: Extending digest for VBOOT: boot mode into PCR 0
336 11:41:23.962243 tlcl_extend: response is 0
337 11:41:23.968744 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
338 11:41:23.978520 tlcl_extend: response is 0
339 11:41:23.984963 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
340 11:41:23.991869 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
341 11:41:23.998143 BS: verstage times (exec / console): total (unknown) / 142 ms
342 11:41:23.998708
343 11:41:23.999084
344 11:41:24.012020 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
345 11:41:24.018538 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
346 11:41:24.021533 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
347 11:41:24.025202 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
348 11:41:24.031765 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
349 11:41:24.035464 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
350 11:41:24.038626 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
351 11:41:24.041921 TCO_STS: 0000 0000
352 11:41:24.044896 GEN_PMCON: d0015038 00002200
353 11:41:24.048229 GBLRST_CAUSE: 00000000 00000000
354 11:41:24.048714 HPR_CAUSE0: 00000000
355 11:41:24.051753 prev_sleep_state 5
356 11:41:24.054814 Boot Count incremented to 17760
357 11:41:24.062512 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
358 11:41:24.068366 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
359 11:41:24.076447 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
360 11:41:24.083475 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
361 11:41:24.086142 Chrome EC: UHEPI supported
362 11:41:24.093279 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
363 11:41:24.106078 Probing TPM: done!
364 11:41:24.112014 Connected to device vid:did:rid of 1ae0:0028:00
365 11:41:24.122256 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
366 11:41:24.125058 Initialized TPM device CR50 revision 0
367 11:41:24.140576 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
368 11:41:24.147774 MRC: Hash idx 0x100b comparison successful.
369 11:41:24.150464 MRC cache found, size faa8
370 11:41:24.150944 bootmode is set to: 2
371 11:41:24.154433 SPD index = 0
372 11:41:24.160952 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
373 11:41:24.164369 SPD: module type is LPDDR4X
374 11:41:24.167246 SPD: module part number is MT53E512M64D4NW-046
375 11:41:24.173476 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
376 11:41:24.176906 SPD: device width 16 bits, bus width 16 bits
377 11:41:24.183933 SPD: module size is 1024 MB (per channel)
378 11:41:24.617570 CBMEM:
379 11:41:24.620951 IMD: root @ 0x76fff000 254 entries.
380 11:41:24.624787 IMD: root @ 0x76ffec00 62 entries.
381 11:41:24.627424 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
382 11:41:24.634223 FMAP: area RW_VPD found @ f35000 (8192 bytes)
383 11:41:24.637312 External stage cache:
384 11:41:24.640731 IMD: root @ 0x7b3ff000 254 entries.
385 11:41:24.643768 IMD: root @ 0x7b3fec00 62 entries.
386 11:41:24.659639 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
387 11:41:24.666152 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
388 11:41:24.673265 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
389 11:41:24.686995 MRC: 'RECOVERY_MRC_CACHE' does not need update.
390 11:41:24.693638 cse_lite: Skip switching to RW in the recovery path
391 11:41:24.694115 8 DIMMs found
392 11:41:24.694511 SMM Memory Map
393 11:41:24.696582 SMRAM : 0x7b000000 0x800000
394 11:41:24.703518 Subregion 0: 0x7b000000 0x200000
395 11:41:24.706521 Subregion 1: 0x7b200000 0x200000
396 11:41:24.709894 Subregion 2: 0x7b400000 0x400000
397 11:41:24.710467 top_of_ram = 0x77000000
398 11:41:24.716513 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
399 11:41:24.723449 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
400 11:41:24.726489 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
401 11:41:24.733246 MTRR Range: Start=ff000000 End=0 (Size 1000000)
402 11:41:24.740027 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
403 11:41:24.746387 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
404 11:41:24.756138 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
405 11:41:24.763155 Processing 211 relocs. Offset value of 0x74c0b000
406 11:41:24.769224 BS: romstage times (exec / console): total (unknown) / 277 ms
407 11:41:24.776312
408 11:41:24.776882
409 11:41:24.785402 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
410 11:41:24.789165 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
411 11:41:24.800120 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
412 11:41:24.805818 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
413 11:41:24.812237 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
414 11:41:24.819169 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
415 11:41:24.866204 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
416 11:41:24.872266 Processing 5008 relocs. Offset value of 0x75d98000
417 11:41:24.875619 BS: postcar times (exec / console): total (unknown) / 59 ms
418 11:41:24.876181
419 11:41:24.879153
420 11:41:24.889234 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
421 11:41:24.889811 Normal boot
422 11:41:24.892300 FW_CONFIG value is 0x804c02
423 11:41:24.895948 PCI: 00:07.0 disabled by fw_config
424 11:41:24.898634 PCI: 00:07.1 disabled by fw_config
425 11:41:24.902186 PCI: 00:0d.2 disabled by fw_config
426 11:41:24.906037 PCI: 00:1c.7 disabled by fw_config
427 11:41:24.912675 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
428 11:41:24.919138 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
429 11:41:24.921902 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
430 11:41:24.925618 GENERIC: 0.0 disabled by fw_config
431 11:41:24.931950 GENERIC: 1.0 disabled by fw_config
432 11:41:24.935464 fw_config match found: DB_USB=USB3_ACTIVE
433 11:41:24.938868 fw_config match found: DB_USB=USB3_ACTIVE
434 11:41:24.941839 fw_config match found: DB_USB=USB3_ACTIVE
435 11:41:24.948476 fw_config match found: DB_USB=USB3_ACTIVE
436 11:41:24.951914 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
437 11:41:24.958531 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
438 11:41:24.968695 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
439 11:41:24.974981 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
440 11:41:24.978172 microcode: sig=0x806c1 pf=0x80 revision=0x86
441 11:41:24.985128 microcode: Update skipped, already up-to-date
442 11:41:24.991279 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
443 11:41:25.019905 Detected 4 core, 8 thread CPU.
444 11:41:25.022950 Setting up SMI for CPU
445 11:41:25.025609 IED base = 0x7b400000
446 11:41:25.026083 IED size = 0x00400000
447 11:41:25.029092 Will perform SMM setup.
448 11:41:25.036020 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
449 11:41:25.043054 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
450 11:41:25.049631 Processing 16 relocs. Offset value of 0x00030000
451 11:41:25.052601 Attempting to start 7 APs
452 11:41:25.056117 Waiting for 10ms after sending INIT.
453 11:41:25.071188 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
454 11:41:25.071769 done.
455 11:41:25.074071 AP: slot 2 apic_id 3.
456 11:41:25.078270 AP: slot 4 apic_id 5.
457 11:41:25.078748 AP: slot 6 apic_id 2.
458 11:41:25.080977 AP: slot 7 apic_id 6.
459 11:41:25.084577 AP: slot 3 apic_id 7.
460 11:41:25.088114 Waiting for 2nd SIPI to complete...done.
461 11:41:25.090910 AP: slot 5 apic_id 4.
462 11:41:25.098035 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
463 11:41:25.104497 Processing 13 relocs. Offset value of 0x00038000
464 11:41:25.105081 Unable to locate Global NVS
465 11:41:25.114658 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
466 11:41:25.117544 Installing permanent SMM handler to 0x7b000000
467 11:41:25.127718 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
468 11:41:25.131017 Processing 794 relocs. Offset value of 0x7b010000
469 11:41:25.141191 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
470 11:41:25.144589 Processing 13 relocs. Offset value of 0x7b008000
471 11:41:25.151217 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
472 11:41:25.158028 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
473 11:41:25.160974 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
474 11:41:25.167641 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
475 11:41:25.173765 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
476 11:41:25.181208 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
477 11:41:25.187454 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
478 11:41:25.188085 Unable to locate Global NVS
479 11:41:25.197629 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
480 11:41:25.200959 Clearing SMI status registers
481 11:41:25.201440 SMI_STS: PM1
482 11:41:25.203770 PM1_STS: PWRBTN
483 11:41:25.210467 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
484 11:41:25.213991 In relocation handler: CPU 0
485 11:41:25.217689 New SMBASE=0x7b000000 IEDBASE=0x7b400000
486 11:41:25.223886 Writing SMRR. base = 0x7b000006, mask=0xff800c00
487 11:41:25.224502 Relocation complete.
488 11:41:25.233663 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
489 11:41:25.234253 In relocation handler: CPU 1
490 11:41:25.240433 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
491 11:41:25.241015 Relocation complete.
492 11:41:25.250685 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
493 11:41:25.251264 In relocation handler: CPU 7
494 11:41:25.256864 New SMBASE=0x7affe400 IEDBASE=0x7b400000
495 11:41:25.260370 Writing SMRR. base = 0x7b000006, mask=0xff800c00
496 11:41:25.263841 Relocation complete.
497 11:41:25.270738 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
498 11:41:25.273763 In relocation handler: CPU 2
499 11:41:25.276685 New SMBASE=0x7afff800 IEDBASE=0x7b400000
500 11:41:25.280325 Relocation complete.
501 11:41:25.287093 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
502 11:41:25.290650 In relocation handler: CPU 6
503 11:41:25.293540 New SMBASE=0x7affe800 IEDBASE=0x7b400000
504 11:41:25.300159 Writing SMRR. base = 0x7b000006, mask=0xff800c00
505 11:41:25.300726 Relocation complete.
506 11:41:25.307045 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
507 11:41:25.310152 In relocation handler: CPU 5
508 11:41:25.313542 New SMBASE=0x7affec00 IEDBASE=0x7b400000
509 11:41:25.321496 Writing SMRR. base = 0x7b000006, mask=0xff800c00
510 11:41:25.322057 Relocation complete.
511 11:41:25.328161 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
512 11:41:25.331182 In relocation handler: CPU 4
513 11:41:25.334573 New SMBASE=0x7afff000 IEDBASE=0x7b400000
514 11:41:25.337990 Relocation complete.
515 11:41:25.344911 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
516 11:41:25.348133 In relocation handler: CPU 3
517 11:41:25.351633 New SMBASE=0x7afff400 IEDBASE=0x7b400000
518 11:41:25.355159 Relocation complete.
519 11:41:25.358079 Initializing CPU #0
520 11:41:25.361518 CPU: vendor Intel device 806c1
521 11:41:25.364706 CPU: family 06, model 8c, stepping 01
522 11:41:25.367734 Clearing out pending MCEs
523 11:41:25.371712 Setting up local APIC...
524 11:41:25.372340 apic_id: 0x00 done.
525 11:41:25.374459 Turbo is available but hidden
526 11:41:25.377567 Turbo is available and visible
527 11:41:25.381355 microcode: Update skipped, already up-to-date
528 11:41:25.384487 CPU #0 initialized
529 11:41:25.388220 Initializing CPU #3
530 11:41:25.388702 Initializing CPU #7
531 11:41:25.391254 CPU: vendor Intel device 806c1
532 11:41:25.394930 CPU: family 06, model 8c, stepping 01
533 11:41:25.398038 Initializing CPU #2
534 11:41:25.401392 Initializing CPU #6
535 11:41:25.405155 CPU: vendor Intel device 806c1
536 11:41:25.407584 CPU: family 06, model 8c, stepping 01
537 11:41:25.411083 CPU: vendor Intel device 806c1
538 11:41:25.414832 CPU: family 06, model 8c, stepping 01
539 11:41:25.418719 Clearing out pending MCEs
540 11:41:25.419292 Clearing out pending MCEs
541 11:41:25.421330 Clearing out pending MCEs
542 11:41:25.424496 CPU: vendor Intel device 806c1
543 11:41:25.428288 CPU: family 06, model 8c, stepping 01
544 11:41:25.431217 Setting up local APIC...
545 11:41:25.434369 Setting up local APIC...
546 11:41:25.434845 Initializing CPU #5
547 11:41:25.437667 Initializing CPU #4
548 11:41:25.441397 CPU: vendor Intel device 806c1
549 11:41:25.444645 CPU: family 06, model 8c, stepping 01
550 11:41:25.447848 CPU: vendor Intel device 806c1
551 11:41:25.451335 CPU: family 06, model 8c, stepping 01
552 11:41:25.454776 Clearing out pending MCEs
553 11:41:25.458218 Clearing out pending MCEs
554 11:41:25.461084 Setting up local APIC...
555 11:41:25.461560 apic_id: 0x07 done.
556 11:41:25.464402 Clearing out pending MCEs
557 11:41:25.468079 microcode: Update skipped, already up-to-date
558 11:41:25.470961 Setting up local APIC...
559 11:41:25.473996 Setting up local APIC...
560 11:41:25.478109 apic_id: 0x02 done.
561 11:41:25.478586 Setting up local APIC...
562 11:41:25.481644 apic_id: 0x05 done.
563 11:41:25.484419 apic_id: 0x04 done.
564 11:41:25.485023 apic_id: 0x06 done.
565 11:41:25.487618 CPU #3 initialized
566 11:41:25.491370 microcode: Update skipped, already up-to-date
567 11:41:25.494025 apic_id: 0x03 done.
568 11:41:25.497742 microcode: Update skipped, already up-to-date
569 11:41:25.504317 microcode: Update skipped, already up-to-date
570 11:41:25.504893 CPU #5 initialized
571 11:41:25.508004 CPU #4 initialized
572 11:41:25.508583 Initializing CPU #1
573 11:41:25.514807 microcode: Update skipped, already up-to-date
574 11:41:25.517420 microcode: Update skipped, already up-to-date
575 11:41:25.520829 CPU #6 initialized
576 11:41:25.521399 CPU #2 initialized
577 11:41:25.524545 CPU: vendor Intel device 806c1
578 11:41:25.527999 CPU: family 06, model 8c, stepping 01
579 11:41:25.530795 Clearing out pending MCEs
580 11:41:25.534138 CPU #7 initialized
581 11:41:25.537827 Setting up local APIC...
582 11:41:25.538405 apic_id: 0x01 done.
583 11:41:25.544576 microcode: Update skipped, already up-to-date
584 11:41:25.545185 CPU #1 initialized
585 11:41:25.550804 bsp_do_flight_plan done after 457 msecs.
586 11:41:25.554120 CPU: frequency set to 4000 MHz
587 11:41:25.554698 Enabling SMIs.
588 11:41:25.560663 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
589 11:41:25.576105 SATAXPCIE1 indicates PCIe NVMe is present
590 11:41:25.579464 Probing TPM: done!
591 11:41:25.583041 Connected to device vid:did:rid of 1ae0:0028:00
592 11:41:25.593947 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
593 11:41:25.597197 Initialized TPM device CR50 revision 0
594 11:41:25.600734 Enabling S0i3.4
595 11:41:25.606916 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
596 11:41:25.610960 Found a VBT of 8704 bytes after decompression
597 11:41:25.616913 cse_lite: CSE RO boot. HybridStorageMode disabled
598 11:41:25.623924 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
599 11:41:25.699024 FSPS returned 0
600 11:41:25.702624 Executing Phase 1 of FspMultiPhaseSiInit
601 11:41:25.712000 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
602 11:41:25.715153 port C0 DISC req: usage 1 usb3 1 usb2 5
603 11:41:25.718530 Raw Buffer output 0 00000511
604 11:41:25.721779 Raw Buffer output 1 00000000
605 11:41:25.726070 pmc_send_ipc_cmd succeeded
606 11:41:25.732278 port C1 DISC req: usage 1 usb3 2 usb2 3
607 11:41:25.732763 Raw Buffer output 0 00000321
608 11:41:25.736062 Raw Buffer output 1 00000000
609 11:41:25.740134 pmc_send_ipc_cmd succeeded
610 11:41:25.744712 Detected 4 core, 8 thread CPU.
611 11:41:25.747746 Detected 4 core, 8 thread CPU.
612 11:41:25.981824 Display FSP Version Info HOB
613 11:41:25.984947 Reference Code - CPU = a.0.4c.31
614 11:41:25.988524 uCode Version = 0.0.0.86
615 11:41:25.991831 TXT ACM version = ff.ff.ff.ffff
616 11:41:25.995327 Reference Code - ME = a.0.4c.31
617 11:41:25.998535 MEBx version = 0.0.0.0
618 11:41:26.001985 ME Firmware Version = Consumer SKU
619 11:41:26.005100 Reference Code - PCH = a.0.4c.31
620 11:41:26.009164 PCH-CRID Status = Disabled
621 11:41:26.011601 PCH-CRID Original Value = ff.ff.ff.ffff
622 11:41:26.015037 PCH-CRID New Value = ff.ff.ff.ffff
623 11:41:26.018317 OPROM - RST - RAID = ff.ff.ff.ffff
624 11:41:26.021868 PCH Hsio Version = 4.0.0.0
625 11:41:26.024923 Reference Code - SA - System Agent = a.0.4c.31
626 11:41:26.028764 Reference Code - MRC = 2.0.0.1
627 11:41:26.031781 SA - PCIe Version = a.0.4c.31
628 11:41:26.034787 SA-CRID Status = Disabled
629 11:41:26.038147 SA-CRID Original Value = 0.0.0.1
630 11:41:26.041694 SA-CRID New Value = 0.0.0.1
631 11:41:26.045497 OPROM - VBIOS = ff.ff.ff.ffff
632 11:41:26.048276 IO Manageability Engine FW Version = 11.1.4.0
633 11:41:26.052163 PHY Build Version = 0.0.0.e0
634 11:41:26.055275 Thunderbolt(TM) FW Version = 0.0.0.0
635 11:41:26.062090 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
636 11:41:26.065125 ITSS IRQ Polarities Before:
637 11:41:26.065606 IPC0: 0xffffffff
638 11:41:26.068338 IPC1: 0xffffffff
639 11:41:26.068912 IPC2: 0xffffffff
640 11:41:26.071666 IPC3: 0xffffffff
641 11:41:26.075140 ITSS IRQ Polarities After:
642 11:41:26.075620 IPC0: 0xffffffff
643 11:41:26.078794 IPC1: 0xffffffff
644 11:41:26.079372 IPC2: 0xffffffff
645 11:41:26.082059 IPC3: 0xffffffff
646 11:41:26.085253 Found PCIe Root Port #9 at PCI: 00:1d.0.
647 11:41:26.098179 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
648 11:41:26.108146 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
649 11:41:26.122423 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
650 11:41:26.128211 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
651 11:41:26.128791 Enumerating buses...
652 11:41:26.134571 Show all devs... Before device enumeration.
653 11:41:26.135048 Root Device: enabled 1
654 11:41:26.138102 DOMAIN: 0000: enabled 1
655 11:41:26.141447 CPU_CLUSTER: 0: enabled 1
656 11:41:26.144961 PCI: 00:00.0: enabled 1
657 11:41:26.145533 PCI: 00:02.0: enabled 1
658 11:41:26.148266 PCI: 00:04.0: enabled 1
659 11:41:26.151525 PCI: 00:05.0: enabled 1
660 11:41:26.155108 PCI: 00:06.0: enabled 0
661 11:41:26.155679 PCI: 00:07.0: enabled 0
662 11:41:26.158146 PCI: 00:07.1: enabled 0
663 11:41:26.161224 PCI: 00:07.2: enabled 0
664 11:41:26.164864 PCI: 00:07.3: enabled 0
665 11:41:26.165439 PCI: 00:08.0: enabled 1
666 11:41:26.168160 PCI: 00:09.0: enabled 0
667 11:41:26.171303 PCI: 00:0a.0: enabled 0
668 11:41:26.174741 PCI: 00:0d.0: enabled 1
669 11:41:26.175316 PCI: 00:0d.1: enabled 0
670 11:41:26.178124 PCI: 00:0d.2: enabled 0
671 11:41:26.180939 PCI: 00:0d.3: enabled 0
672 11:41:26.184496 PCI: 00:0e.0: enabled 0
673 11:41:26.184969 PCI: 00:10.2: enabled 1
674 11:41:26.187924 PCI: 00:10.6: enabled 0
675 11:41:26.191780 PCI: 00:10.7: enabled 0
676 11:41:26.192392 PCI: 00:12.0: enabled 0
677 11:41:26.194770 PCI: 00:12.6: enabled 0
678 11:41:26.197967 PCI: 00:13.0: enabled 0
679 11:41:26.201049 PCI: 00:14.0: enabled 1
680 11:41:26.201563 PCI: 00:14.1: enabled 0
681 11:41:26.204661 PCI: 00:14.2: enabled 1
682 11:41:26.207740 PCI: 00:14.3: enabled 1
683 11:41:26.211239 PCI: 00:15.0: enabled 1
684 11:41:26.211708 PCI: 00:15.1: enabled 1
685 11:41:26.214791 PCI: 00:15.2: enabled 1
686 11:41:26.217797 PCI: 00:15.3: enabled 1
687 11:41:26.221394 PCI: 00:16.0: enabled 1
688 11:41:26.221868 PCI: 00:16.1: enabled 0
689 11:41:26.224964 PCI: 00:16.2: enabled 0
690 11:41:26.227666 PCI: 00:16.3: enabled 0
691 11:41:26.228276 PCI: 00:16.4: enabled 0
692 11:41:26.231134 PCI: 00:16.5: enabled 0
693 11:41:26.234593 PCI: 00:17.0: enabled 1
694 11:41:26.237760 PCI: 00:19.0: enabled 0
695 11:41:26.238237 PCI: 00:19.1: enabled 1
696 11:41:26.241450 PCI: 00:19.2: enabled 0
697 11:41:26.244416 PCI: 00:1c.0: enabled 1
698 11:41:26.248366 PCI: 00:1c.1: enabled 0
699 11:41:26.248939 PCI: 00:1c.2: enabled 0
700 11:41:26.251048 PCI: 00:1c.3: enabled 0
701 11:41:26.255080 PCI: 00:1c.4: enabled 0
702 11:41:26.257745 PCI: 00:1c.5: enabled 0
703 11:41:26.258316 PCI: 00:1c.6: enabled 1
704 11:41:26.260977 PCI: 00:1c.7: enabled 0
705 11:41:26.264443 PCI: 00:1d.0: enabled 1
706 11:41:26.265017 PCI: 00:1d.1: enabled 0
707 11:41:26.268005 PCI: 00:1d.2: enabled 1
708 11:41:26.271395 PCI: 00:1d.3: enabled 0
709 11:41:26.275274 PCI: 00:1e.0: enabled 1
710 11:41:26.276156 PCI: 00:1e.1: enabled 0
711 11:41:26.277564 PCI: 00:1e.2: enabled 1
712 11:41:26.281128 PCI: 00:1e.3: enabled 1
713 11:41:26.284456 PCI: 00:1f.0: enabled 1
714 11:41:26.284937 PCI: 00:1f.1: enabled 0
715 11:41:26.287951 PCI: 00:1f.2: enabled 1
716 11:41:26.290932 PCI: 00:1f.3: enabled 1
717 11:41:26.294609 PCI: 00:1f.4: enabled 0
718 11:41:26.295191 PCI: 00:1f.5: enabled 1
719 11:41:26.297600 PCI: 00:1f.6: enabled 0
720 11:41:26.300906 PCI: 00:1f.7: enabled 0
721 11:41:26.301384 APIC: 00: enabled 1
722 11:41:26.304379 GENERIC: 0.0: enabled 1
723 11:41:26.307931 GENERIC: 0.0: enabled 1
724 11:41:26.310666 GENERIC: 1.0: enabled 1
725 11:41:26.311143 GENERIC: 0.0: enabled 1
726 11:41:26.314086 GENERIC: 1.0: enabled 1
727 11:41:26.317472 USB0 port 0: enabled 1
728 11:41:26.318020 GENERIC: 0.0: enabled 1
729 11:41:26.320735 USB0 port 0: enabled 1
730 11:41:26.324080 GENERIC: 0.0: enabled 1
731 11:41:26.327265 I2C: 00:1a: enabled 1
732 11:41:26.327745 I2C: 00:31: enabled 1
733 11:41:26.330958 I2C: 00:32: enabled 1
734 11:41:26.334026 I2C: 00:10: enabled 1
735 11:41:26.334554 I2C: 00:15: enabled 1
736 11:41:26.337190 GENERIC: 0.0: enabled 0
737 11:41:26.340641 GENERIC: 1.0: enabled 0
738 11:41:26.344495 GENERIC: 0.0: enabled 1
739 11:41:26.345084 SPI: 00: enabled 1
740 11:41:26.347471 SPI: 00: enabled 1
741 11:41:26.348096 PNP: 0c09.0: enabled 1
742 11:41:26.351170 GENERIC: 0.0: enabled 1
743 11:41:26.354689 USB3 port 0: enabled 1
744 11:41:26.357577 USB3 port 1: enabled 1
745 11:41:26.358160 USB3 port 2: enabled 0
746 11:41:26.360920 USB3 port 3: enabled 0
747 11:41:26.364319 USB2 port 0: enabled 0
748 11:41:26.364899 USB2 port 1: enabled 1
749 11:41:26.367555 USB2 port 2: enabled 1
750 11:41:26.370683 USB2 port 3: enabled 0
751 11:41:26.371271 USB2 port 4: enabled 1
752 11:41:26.374559 USB2 port 5: enabled 0
753 11:41:26.377100 USB2 port 6: enabled 0
754 11:41:26.380433 USB2 port 7: enabled 0
755 11:41:26.380914 USB2 port 8: enabled 0
756 11:41:26.384540 USB2 port 9: enabled 0
757 11:41:26.387766 USB3 port 0: enabled 0
758 11:41:26.388417 USB3 port 1: enabled 1
759 11:41:26.390795 USB3 port 2: enabled 0
760 11:41:26.394519 USB3 port 3: enabled 0
761 11:41:26.397348 GENERIC: 0.0: enabled 1
762 11:41:26.397936 GENERIC: 1.0: enabled 1
763 11:41:26.400434 APIC: 01: enabled 1
764 11:41:26.404197 APIC: 03: enabled 1
765 11:41:26.404773 APIC: 07: enabled 1
766 11:41:26.407197 APIC: 05: enabled 1
767 11:41:26.407784 APIC: 04: enabled 1
768 11:41:26.410516 APIC: 02: enabled 1
769 11:41:26.414276 APIC: 06: enabled 1
770 11:41:26.414865 Compare with tree...
771 11:41:26.417518 Root Device: enabled 1
772 11:41:26.420248 DOMAIN: 0000: enabled 1
773 11:41:26.423525 PCI: 00:00.0: enabled 1
774 11:41:26.424039 PCI: 00:02.0: enabled 1
775 11:41:26.427676 PCI: 00:04.0: enabled 1
776 11:41:26.430554 GENERIC: 0.0: enabled 1
777 11:41:26.434289 PCI: 00:05.0: enabled 1
778 11:41:26.437015 PCI: 00:06.0: enabled 0
779 11:41:26.437497 PCI: 00:07.0: enabled 0
780 11:41:26.440832 GENERIC: 0.0: enabled 1
781 11:41:26.443590 PCI: 00:07.1: enabled 0
782 11:41:26.447155 GENERIC: 1.0: enabled 1
783 11:41:26.450818 PCI: 00:07.2: enabled 0
784 11:41:26.451426 GENERIC: 0.0: enabled 1
785 11:41:26.453596 PCI: 00:07.3: enabled 0
786 11:41:26.457092 GENERIC: 1.0: enabled 1
787 11:41:26.460470 PCI: 00:08.0: enabled 1
788 11:41:26.463736 PCI: 00:09.0: enabled 0
789 11:41:26.464383 PCI: 00:0a.0: enabled 0
790 11:41:26.466948 PCI: 00:0d.0: enabled 1
791 11:41:26.470386 USB0 port 0: enabled 1
792 11:41:26.473550 USB3 port 0: enabled 1
793 11:41:26.476812 USB3 port 1: enabled 1
794 11:41:26.477299 USB3 port 2: enabled 0
795 11:41:26.480476 USB3 port 3: enabled 0
796 11:41:26.483999 PCI: 00:0d.1: enabled 0
797 11:41:26.486826 PCI: 00:0d.2: enabled 0
798 11:41:26.490580 GENERIC: 0.0: enabled 1
799 11:41:26.491159 PCI: 00:0d.3: enabled 0
800 11:41:26.493737 PCI: 00:0e.0: enabled 0
801 11:41:26.497629 PCI: 00:10.2: enabled 1
802 11:41:26.500412 PCI: 00:10.6: enabled 0
803 11:41:26.503816 PCI: 00:10.7: enabled 0
804 11:41:26.504450 PCI: 00:12.0: enabled 0
805 11:41:26.507012 PCI: 00:12.6: enabled 0
806 11:41:26.510570 PCI: 00:13.0: enabled 0
807 11:41:26.513694 PCI: 00:14.0: enabled 1
808 11:41:26.517534 USB0 port 0: enabled 1
809 11:41:26.518014 USB2 port 0: enabled 0
810 11:41:26.520896 USB2 port 1: enabled 1
811 11:41:26.523829 USB2 port 2: enabled 1
812 11:41:26.526775 USB2 port 3: enabled 0
813 11:41:26.530174 USB2 port 4: enabled 1
814 11:41:26.534094 USB2 port 5: enabled 0
815 11:41:26.534573 USB2 port 6: enabled 0
816 11:41:26.536806 USB2 port 7: enabled 0
817 11:41:26.540159 USB2 port 8: enabled 0
818 11:41:26.543411 USB2 port 9: enabled 0
819 11:41:26.547437 USB3 port 0: enabled 0
820 11:41:26.549802 USB3 port 1: enabled 1
821 11:41:26.550286 USB3 port 2: enabled 0
822 11:41:26.554195 USB3 port 3: enabled 0
823 11:41:26.556849 PCI: 00:14.1: enabled 0
824 11:41:26.560864 PCI: 00:14.2: enabled 1
825 11:41:26.561458 PCI: 00:14.3: enabled 1
826 11:41:26.564634 GENERIC: 0.0: enabled 1
827 11:41:26.568241 PCI: 00:15.0: enabled 1
828 11:41:26.571622 I2C: 00:1a: enabled 1
829 11:41:26.572277 I2C: 00:31: enabled 1
830 11:41:26.574588 I2C: 00:32: enabled 1
831 11:41:26.577810 PCI: 00:15.1: enabled 1
832 11:41:26.581382 I2C: 00:10: enabled 1
833 11:41:26.581877 PCI: 00:15.2: enabled 1
834 11:41:26.584696 PCI: 00:15.3: enabled 1
835 11:41:26.587946 PCI: 00:16.0: enabled 1
836 11:41:26.591346 PCI: 00:16.1: enabled 0
837 11:41:26.594488 PCI: 00:16.2: enabled 0
838 11:41:26.595074 PCI: 00:16.3: enabled 0
839 11:41:26.644353 PCI: 00:16.4: enabled 0
840 11:41:26.644962 PCI: 00:16.5: enabled 0
841 11:41:26.645347 PCI: 00:17.0: enabled 1
842 11:41:26.645773 PCI: 00:19.0: enabled 0
843 11:41:26.646480 PCI: 00:19.1: enabled 1
844 11:41:26.646850 I2C: 00:15: enabled 1
845 11:41:26.647190 PCI: 00:19.2: enabled 0
846 11:41:26.647517 PCI: 00:1d.0: enabled 1
847 11:41:26.647840 GENERIC: 0.0: enabled 1
848 11:41:26.648226 PCI: 00:1e.0: enabled 1
849 11:41:26.648550 PCI: 00:1e.1: enabled 0
850 11:41:26.648865 PCI: 00:1e.2: enabled 1
851 11:41:26.649179 SPI: 00: enabled 1
852 11:41:26.649494 PCI: 00:1e.3: enabled 1
853 11:41:26.649805 SPI: 00: enabled 1
854 11:41:26.650116 PCI: 00:1f.0: enabled 1
855 11:41:26.650430 PNP: 0c09.0: enabled 1
856 11:41:26.650739 PCI: 00:1f.1: enabled 0
857 11:41:26.651050 PCI: 00:1f.2: enabled 1
858 11:41:26.696367 GENERIC: 0.0: enabled 1
859 11:41:26.696972 GENERIC: 0.0: enabled 1
860 11:41:26.697364 GENERIC: 1.0: enabled 1
861 11:41:26.697720 PCI: 00:1f.3: enabled 1
862 11:41:26.698382 PCI: 00:1f.4: enabled 0
863 11:41:26.698766 PCI: 00:1f.5: enabled 1
864 11:41:26.699105 PCI: 00:1f.6: enabled 0
865 11:41:26.699432 PCI: 00:1f.7: enabled 0
866 11:41:26.699753 CPU_CLUSTER: 0: enabled 1
867 11:41:26.700118 APIC: 00: enabled 1
868 11:41:26.700444 APIC: 01: enabled 1
869 11:41:26.700763 APIC: 03: enabled 1
870 11:41:26.701076 APIC: 07: enabled 1
871 11:41:26.701388 APIC: 05: enabled 1
872 11:41:26.701702 APIC: 04: enabled 1
873 11:41:26.702009 APIC: 02: enabled 1
874 11:41:26.702320 APIC: 06: enabled 1
875 11:41:26.702628 Root Device scanning...
876 11:41:26.702939 scan_static_bus for Root Device
877 11:41:26.703260 DOMAIN: 0000 enabled
878 11:41:26.722952 CPU_CLUSTER: 0 enabled
879 11:41:26.723528 DOMAIN: 0000 scanning...
880 11:41:26.723916 PCI: pci_scan_bus for bus 00
881 11:41:26.724335 PCI: 00:00.0 [8086/0000] ops
882 11:41:26.724686 PCI: 00:00.0 [8086/9a12] enabled
883 11:41:26.725046 PCI: 00:02.0 [8086/0000] bus ops
884 11:41:26.725373 PCI: 00:02.0 [8086/9a40] enabled
885 11:41:26.725700 PCI: 00:04.0 [8086/0000] bus ops
886 11:41:26.726412 PCI: 00:04.0 [8086/9a03] enabled
887 11:41:26.726775 PCI: 00:05.0 [8086/9a19] enabled
888 11:41:26.730222 PCI: 00:07.0 [0000/0000] hidden
889 11:41:26.733740 PCI: 00:08.0 [8086/9a11] enabled
890 11:41:26.736961 PCI: 00:0a.0 [8086/9a0d] disabled
891 11:41:26.740082 PCI: 00:0d.0 [8086/0000] bus ops
892 11:41:26.743796 PCI: 00:0d.0 [8086/9a13] enabled
893 11:41:26.746660 PCI: 00:14.0 [8086/0000] bus ops
894 11:41:26.750146 PCI: 00:14.0 [8086/a0ed] enabled
895 11:41:26.753544 PCI: 00:14.2 [8086/a0ef] enabled
896 11:41:26.756927 PCI: 00:14.3 [8086/0000] bus ops
897 11:41:26.760309 PCI: 00:14.3 [8086/a0f0] enabled
898 11:41:26.763826 PCI: 00:15.0 [8086/0000] bus ops
899 11:41:26.767460 PCI: 00:15.0 [8086/a0e8] enabled
900 11:41:26.770201 PCI: 00:15.1 [8086/0000] bus ops
901 11:41:26.773454 PCI: 00:15.1 [8086/a0e9] enabled
902 11:41:26.776614 PCI: 00:15.2 [8086/0000] bus ops
903 11:41:26.780299 PCI: 00:15.2 [8086/a0ea] enabled
904 11:41:26.783286 PCI: 00:15.3 [8086/0000] bus ops
905 11:41:26.786852 PCI: 00:15.3 [8086/a0eb] enabled
906 11:41:26.789860 PCI: 00:16.0 [8086/0000] ops
907 11:41:26.793141 PCI: 00:16.0 [8086/a0e0] enabled
908 11:41:26.800105 PCI: Static device PCI: 00:17.0 not found, disabling it.
909 11:41:26.803035 PCI: 00:19.0 [8086/0000] bus ops
910 11:41:26.806782 PCI: 00:19.0 [8086/a0c5] disabled
911 11:41:26.810016 PCI: 00:19.1 [8086/0000] bus ops
912 11:41:26.813524 PCI: 00:19.1 [8086/a0c6] enabled
913 11:41:26.817239 PCI: 00:1d.0 [8086/0000] bus ops
914 11:41:26.819766 PCI: 00:1d.0 [8086/a0b0] enabled
915 11:41:26.823245 PCI: 00:1e.0 [8086/0000] ops
916 11:41:26.827333 PCI: 00:1e.0 [8086/a0a8] enabled
917 11:41:26.830063 PCI: 00:1e.2 [8086/0000] bus ops
918 11:41:26.833394 PCI: 00:1e.2 [8086/a0aa] enabled
919 11:41:26.836519 PCI: 00:1e.3 [8086/0000] bus ops
920 11:41:26.840672 PCI: 00:1e.3 [8086/a0ab] enabled
921 11:41:26.843452 PCI: 00:1f.0 [8086/0000] bus ops
922 11:41:26.846311 PCI: 00:1f.0 [8086/a087] enabled
923 11:41:26.846774 RTC Init
924 11:41:26.849627 Set power on after power failure.
925 11:41:26.854122 Disabling Deep S3
926 11:41:26.856643 Disabling Deep S3
927 11:41:26.857194 Disabling Deep S4
928 11:41:26.859780 Disabling Deep S4
929 11:41:26.860287 Disabling Deep S5
930 11:41:26.863285 Disabling Deep S5
931 11:41:26.866776 PCI: 00:1f.2 [0000/0000] hidden
932 11:41:26.869849 PCI: 00:1f.3 [8086/0000] bus ops
933 11:41:26.873236 PCI: 00:1f.3 [8086/a0c8] enabled
934 11:41:26.876734 PCI: 00:1f.5 [8086/0000] bus ops
935 11:41:26.879852 PCI: 00:1f.5 [8086/a0a4] enabled
936 11:41:26.883061 PCI: Leftover static devices:
937 11:41:26.883618 PCI: 00:10.2
938 11:41:26.886543 PCI: 00:10.6
939 11:41:26.887143 PCI: 00:10.7
940 11:41:26.887521 PCI: 00:06.0
941 11:41:26.889501 PCI: 00:07.1
942 11:41:26.889970 PCI: 00:07.2
943 11:41:26.893499 PCI: 00:07.3
944 11:41:26.894061 PCI: 00:09.0
945 11:41:26.894425 PCI: 00:0d.1
946 11:41:26.896257 PCI: 00:0d.2
947 11:41:26.896719 PCI: 00:0d.3
948 11:41:26.900015 PCI: 00:0e.0
949 11:41:26.900578 PCI: 00:12.0
950 11:41:26.900945 PCI: 00:12.6
951 11:41:26.903129 PCI: 00:13.0
952 11:41:26.903591 PCI: 00:14.1
953 11:41:26.906818 PCI: 00:16.1
954 11:41:26.907378 PCI: 00:16.2
955 11:41:26.909883 PCI: 00:16.3
956 11:41:26.910437 PCI: 00:16.4
957 11:41:26.910801 PCI: 00:16.5
958 11:41:26.913348 PCI: 00:17.0
959 11:41:26.913904 PCI: 00:19.2
960 11:41:26.916983 PCI: 00:1e.1
961 11:41:26.917575 PCI: 00:1f.1
962 11:41:26.917943 PCI: 00:1f.4
963 11:41:26.919758 PCI: 00:1f.6
964 11:41:26.920254 PCI: 00:1f.7
965 11:41:26.922762 PCI: Check your devicetree.cb.
966 11:41:26.926007 PCI: 00:02.0 scanning...
967 11:41:26.930025 scan_generic_bus for PCI: 00:02.0
968 11:41:26.932707 scan_generic_bus for PCI: 00:02.0 done
969 11:41:26.939560 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
970 11:41:26.940175 PCI: 00:04.0 scanning...
971 11:41:26.946282 scan_generic_bus for PCI: 00:04.0
972 11:41:26.946853 GENERIC: 0.0 enabled
973 11:41:26.953146 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
974 11:41:26.956133 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
975 11:41:26.960230 PCI: 00:0d.0 scanning...
976 11:41:26.963146 scan_static_bus for PCI: 00:0d.0
977 11:41:26.966188 USB0 port 0 enabled
978 11:41:26.969881 USB0 port 0 scanning...
979 11:41:26.972829 scan_static_bus for USB0 port 0
980 11:41:26.973403 USB3 port 0 enabled
981 11:41:26.976295 USB3 port 1 enabled
982 11:41:26.979569 USB3 port 2 disabled
983 11:41:26.980213 USB3 port 3 disabled
984 11:41:26.982436 USB3 port 0 scanning...
985 11:41:26.985861 scan_static_bus for USB3 port 0
986 11:41:26.989593 scan_static_bus for USB3 port 0 done
987 11:41:26.992426 scan_bus: bus USB3 port 0 finished in 6 msecs
988 11:41:26.996260 USB3 port 1 scanning...
989 11:41:26.999178 scan_static_bus for USB3 port 1
990 11:41:27.002477 scan_static_bus for USB3 port 1 done
991 11:41:27.009698 scan_bus: bus USB3 port 1 finished in 6 msecs
992 11:41:27.012864 scan_static_bus for USB0 port 0 done
993 11:41:27.015904 scan_bus: bus USB0 port 0 finished in 43 msecs
994 11:41:27.018856 scan_static_bus for PCI: 00:0d.0 done
995 11:41:27.025562 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
996 11:41:27.029394 PCI: 00:14.0 scanning...
997 11:41:27.032559 scan_static_bus for PCI: 00:14.0
998 11:41:27.033129 USB0 port 0 enabled
999 11:41:27.035902 USB0 port 0 scanning...
1000 11:41:27.039749 scan_static_bus for USB0 port 0
1001 11:41:27.042563 USB2 port 0 disabled
1002 11:41:27.043131 USB2 port 1 enabled
1003 11:41:27.045833 USB2 port 2 enabled
1004 11:41:27.048902 USB2 port 3 disabled
1005 11:41:27.049374 USB2 port 4 enabled
1006 11:41:27.052852 USB2 port 5 disabled
1007 11:41:27.055581 USB2 port 6 disabled
1008 11:41:27.056234 USB2 port 7 disabled
1009 11:41:27.058803 USB2 port 8 disabled
1010 11:41:27.061847 USB2 port 9 disabled
1011 11:41:27.062341 USB3 port 0 disabled
1012 11:41:27.065559 USB3 port 1 enabled
1013 11:41:27.066098 USB3 port 2 disabled
1014 11:41:27.069131 USB3 port 3 disabled
1015 11:41:27.072641 USB2 port 1 scanning...
1016 11:41:27.075742 scan_static_bus for USB2 port 1
1017 11:41:27.078831 scan_static_bus for USB2 port 1 done
1018 11:41:27.082263 scan_bus: bus USB2 port 1 finished in 6 msecs
1019 11:41:27.085683 USB2 port 2 scanning...
1020 11:41:27.088753 scan_static_bus for USB2 port 2
1021 11:41:27.092364 scan_static_bus for USB2 port 2 done
1022 11:41:27.098940 scan_bus: bus USB2 port 2 finished in 6 msecs
1023 11:41:27.099522 USB2 port 4 scanning...
1024 11:41:27.102579 scan_static_bus for USB2 port 4
1025 11:41:27.108939 scan_static_bus for USB2 port 4 done
1026 11:41:27.112268 scan_bus: bus USB2 port 4 finished in 6 msecs
1027 11:41:27.115635 USB3 port 1 scanning...
1028 11:41:27.118945 scan_static_bus for USB3 port 1
1029 11:41:27.122019 scan_static_bus for USB3 port 1 done
1030 11:41:27.125313 scan_bus: bus USB3 port 1 finished in 6 msecs
1031 11:41:27.129305 scan_static_bus for USB0 port 0 done
1032 11:41:27.136136 scan_bus: bus USB0 port 0 finished in 93 msecs
1033 11:41:27.139180 scan_static_bus for PCI: 00:14.0 done
1034 11:41:27.142834 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1035 11:41:27.146370 PCI: 00:14.3 scanning...
1036 11:41:27.148941 scan_static_bus for PCI: 00:14.3
1037 11:41:27.152790 GENERIC: 0.0 enabled
1038 11:41:27.155802 scan_static_bus for PCI: 00:14.3 done
1039 11:41:27.158908 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1040 11:41:27.162768 PCI: 00:15.0 scanning...
1041 11:41:27.166137 scan_static_bus for PCI: 00:15.0
1042 11:41:27.169169 I2C: 00:1a enabled
1043 11:41:27.169731 I2C: 00:31 enabled
1044 11:41:27.172628 I2C: 00:32 enabled
1045 11:41:27.176496 scan_static_bus for PCI: 00:15.0 done
1046 11:41:27.179104 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1047 11:41:27.182453 PCI: 00:15.1 scanning...
1048 11:41:27.185554 scan_static_bus for PCI: 00:15.1
1049 11:41:27.189207 I2C: 00:10 enabled
1050 11:41:27.192751 scan_static_bus for PCI: 00:15.1 done
1051 11:41:27.196251 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1052 11:41:27.199369 PCI: 00:15.2 scanning...
1053 11:41:27.202548 scan_static_bus for PCI: 00:15.2
1054 11:41:27.205911 scan_static_bus for PCI: 00:15.2 done
1055 11:41:27.212484 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1056 11:41:27.215660 PCI: 00:15.3 scanning...
1057 11:41:27.219285 scan_static_bus for PCI: 00:15.3
1058 11:41:27.222136 scan_static_bus for PCI: 00:15.3 done
1059 11:41:27.225487 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1060 11:41:27.228904 PCI: 00:19.1 scanning...
1061 11:41:27.232179 scan_static_bus for PCI: 00:19.1
1062 11:41:27.235546 I2C: 00:15 enabled
1063 11:41:27.239364 scan_static_bus for PCI: 00:19.1 done
1064 11:41:27.242374 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1065 11:41:27.245585 PCI: 00:1d.0 scanning...
1066 11:41:27.249393 do_pci_scan_bridge for PCI: 00:1d.0
1067 11:41:27.252338 PCI: pci_scan_bus for bus 01
1068 11:41:27.255877 PCI: 01:00.0 [1c5c/174a] enabled
1069 11:41:27.258941 GENERIC: 0.0 enabled
1070 11:41:27.262027 Enabling Common Clock Configuration
1071 11:41:27.265451 L1 Sub-State supported from root port 29
1072 11:41:27.269102 L1 Sub-State Support = 0xf
1073 11:41:27.272361 CommonModeRestoreTime = 0x28
1074 11:41:27.275632 Power On Value = 0x16, Power On Scale = 0x0
1075 11:41:27.279089 ASPM: Enabled L1
1076 11:41:27.282063 PCIe: Max_Payload_Size adjusted to 128
1077 11:41:27.285842 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1078 11:41:27.289216 PCI: 00:1e.2 scanning...
1079 11:41:27.292396 scan_generic_bus for PCI: 00:1e.2
1080 11:41:27.295523 SPI: 00 enabled
1081 11:41:27.298734 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1082 11:41:27.305055 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1083 11:41:27.308495 PCI: 00:1e.3 scanning...
1084 11:41:27.311898 scan_generic_bus for PCI: 00:1e.3
1085 11:41:27.312514 SPI: 00 enabled
1086 11:41:27.318892 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1087 11:41:27.325449 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1088 11:41:27.326011 PCI: 00:1f.0 scanning...
1089 11:41:27.328453 scan_static_bus for PCI: 00:1f.0
1090 11:41:27.331867 PNP: 0c09.0 enabled
1091 11:41:27.335996 PNP: 0c09.0 scanning...
1092 11:41:27.338109 scan_static_bus for PNP: 0c09.0
1093 11:41:27.341985 scan_static_bus for PNP: 0c09.0 done
1094 11:41:27.345349 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1095 11:41:27.348358 scan_static_bus for PCI: 00:1f.0 done
1096 11:41:27.355285 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1097 11:41:27.358743 PCI: 00:1f.2 scanning...
1098 11:41:27.361502 scan_static_bus for PCI: 00:1f.2
1099 11:41:27.361968 GENERIC: 0.0 enabled
1100 11:41:27.365023 GENERIC: 0.0 scanning...
1101 11:41:27.368819 scan_static_bus for GENERIC: 0.0
1102 11:41:27.371758 GENERIC: 0.0 enabled
1103 11:41:27.375508 GENERIC: 1.0 enabled
1104 11:41:27.378517 scan_static_bus for GENERIC: 0.0 done
1105 11:41:27.381670 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1106 11:41:27.384928 scan_static_bus for PCI: 00:1f.2 done
1107 11:41:27.391250 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1108 11:41:27.391713 PCI: 00:1f.3 scanning...
1109 11:41:27.394973 scan_static_bus for PCI: 00:1f.3
1110 11:41:27.401630 scan_static_bus for PCI: 00:1f.3 done
1111 11:41:27.404567 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1112 11:41:27.408411 PCI: 00:1f.5 scanning...
1113 11:41:27.411835 scan_generic_bus for PCI: 00:1f.5
1114 11:41:27.415121 scan_generic_bus for PCI: 00:1f.5 done
1115 11:41:27.422473 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1116 11:41:27.424502 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1117 11:41:27.428167 scan_static_bus for Root Device done
1118 11:41:27.434941 scan_bus: bus Root Device finished in 737 msecs
1119 11:41:27.435489 done
1120 11:41:27.440992 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1121 11:41:27.444636 Chrome EC: UHEPI supported
1122 11:41:27.451141 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1123 11:41:27.455339 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1124 11:41:27.458086 SPI flash protection: WPSW=0 SRP0=0
1125 11:41:27.464477 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1126 11:41:27.471473 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1127 11:41:27.472082 found VGA at PCI: 00:02.0
1128 11:41:27.474586 Setting up VGA for PCI: 00:02.0
1129 11:41:27.481033 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1130 11:41:27.484461 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1131 11:41:27.488072 Allocating resources...
1132 11:41:27.491392 Reading resources...
1133 11:41:27.494790 Root Device read_resources bus 0 link: 0
1134 11:41:27.498501 DOMAIN: 0000 read_resources bus 0 link: 0
1135 11:41:27.504855 PCI: 00:04.0 read_resources bus 1 link: 0
1136 11:41:27.508536 PCI: 00:04.0 read_resources bus 1 link: 0 done
1137 11:41:27.515443 PCI: 00:0d.0 read_resources bus 0 link: 0
1138 11:41:27.518538 USB0 port 0 read_resources bus 0 link: 0
1139 11:41:27.525476 USB0 port 0 read_resources bus 0 link: 0 done
1140 11:41:27.528262 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1141 11:41:27.532344 PCI: 00:14.0 read_resources bus 0 link: 0
1142 11:41:27.538868 USB0 port 0 read_resources bus 0 link: 0
1143 11:41:27.542864 USB0 port 0 read_resources bus 0 link: 0 done
1144 11:41:27.549211 PCI: 00:14.0 read_resources bus 0 link: 0 done
1145 11:41:27.552217 PCI: 00:14.3 read_resources bus 0 link: 0
1146 11:41:27.558982 PCI: 00:14.3 read_resources bus 0 link: 0 done
1147 11:41:27.562145 PCI: 00:15.0 read_resources bus 0 link: 0
1148 11:41:27.569185 PCI: 00:15.0 read_resources bus 0 link: 0 done
1149 11:41:27.572279 PCI: 00:15.1 read_resources bus 0 link: 0
1150 11:41:27.578943 PCI: 00:15.1 read_resources bus 0 link: 0 done
1151 11:41:27.582081 PCI: 00:19.1 read_resources bus 0 link: 0
1152 11:41:27.589258 PCI: 00:19.1 read_resources bus 0 link: 0 done
1153 11:41:27.592412 PCI: 00:1d.0 read_resources bus 1 link: 0
1154 11:41:27.599951 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1155 11:41:27.602997 PCI: 00:1e.2 read_resources bus 2 link: 0
1156 11:41:27.609363 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1157 11:41:27.612357 PCI: 00:1e.3 read_resources bus 3 link: 0
1158 11:41:27.619453 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1159 11:41:27.622566 PCI: 00:1f.0 read_resources bus 0 link: 0
1160 11:41:27.629503 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1161 11:41:27.632533 PCI: 00:1f.2 read_resources bus 0 link: 0
1162 11:41:27.636023 GENERIC: 0.0 read_resources bus 0 link: 0
1163 11:41:27.642829 GENERIC: 0.0 read_resources bus 0 link: 0 done
1164 11:41:27.646166 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1165 11:41:27.653661 DOMAIN: 0000 read_resources bus 0 link: 0 done
1166 11:41:27.656657 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1167 11:41:27.663125 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1168 11:41:27.666855 Root Device read_resources bus 0 link: 0 done
1169 11:41:27.670431 Done reading resources.
1170 11:41:27.676899 Show resources in subtree (Root Device)...After reading.
1171 11:41:27.680510 Root Device child on link 0 DOMAIN: 0000
1172 11:41:27.683697 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1173 11:41:27.693427 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1174 11:41:27.703424 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1175 11:41:27.707354 PCI: 00:00.0
1176 11:41:27.713881 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1177 11:41:27.723369 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1178 11:41:27.732738 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1179 11:41:27.743655 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1180 11:41:27.753397 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1181 11:41:27.763510 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1182 11:41:27.769659 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1183 11:41:27.779880 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1184 11:41:27.790116 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1185 11:41:27.799753 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1186 11:41:27.809451 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1187 11:41:27.819669 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1188 11:41:27.825881 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1189 11:41:27.835942 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1190 11:41:27.845699 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1191 11:41:27.856056 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1192 11:41:27.865507 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1193 11:41:27.875552 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1194 11:41:27.882046 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1195 11:41:27.892182 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1196 11:41:27.895719 PCI: 00:02.0
1197 11:41:27.905424 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 11:41:27.915221 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1199 11:41:27.925514 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1200 11:41:27.928747 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1201 11:41:27.938362 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1202 11:41:27.941773 GENERIC: 0.0
1203 11:41:27.942236 PCI: 00:05.0
1204 11:41:27.951704 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1205 11:41:27.958596 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1206 11:41:27.959170 GENERIC: 0.0
1207 11:41:27.961763 PCI: 00:08.0
1208 11:41:27.972212 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 11:41:27.972787 PCI: 00:0a.0
1210 11:41:27.975185 PCI: 00:0d.0 child on link 0 USB0 port 0
1211 11:41:27.985095 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1212 11:41:27.991638 USB0 port 0 child on link 0 USB3 port 0
1213 11:41:27.992253 USB3 port 0
1214 11:41:27.995089 USB3 port 1
1215 11:41:27.995655 USB3 port 2
1216 11:41:27.998140 USB3 port 3
1217 11:41:28.002032 PCI: 00:14.0 child on link 0 USB0 port 0
1218 11:41:28.011754 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1219 11:41:28.018726 USB0 port 0 child on link 0 USB2 port 0
1220 11:41:28.019301 USB2 port 0
1221 11:41:28.021749 USB2 port 1
1222 11:41:28.022321 USB2 port 2
1223 11:41:28.025555 USB2 port 3
1224 11:41:28.026132 USB2 port 4
1225 11:41:28.028060 USB2 port 5
1226 11:41:28.028551 USB2 port 6
1227 11:41:28.031779 USB2 port 7
1228 11:41:28.032402 USB2 port 8
1229 11:41:28.035102 USB2 port 9
1230 11:41:28.035676 USB3 port 0
1231 11:41:28.038386 USB3 port 1
1232 11:41:28.038955 USB3 port 2
1233 11:41:28.041821 USB3 port 3
1234 11:41:28.042296 PCI: 00:14.2
1235 11:41:28.051343 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 11:41:28.061671 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1237 11:41:28.068858 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1238 11:41:28.077847 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1239 11:41:28.078414 GENERIC: 0.0
1240 11:41:28.084539 PCI: 00:15.0 child on link 0 I2C: 00:1a
1241 11:41:28.094941 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 11:41:28.095500 I2C: 00:1a
1243 11:41:28.098494 I2C: 00:31
1244 11:41:28.099060 I2C: 00:32
1245 11:41:28.101157 PCI: 00:15.1 child on link 0 I2C: 00:10
1246 11:41:28.111765 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 11:41:28.115142 I2C: 00:10
1248 11:41:28.115701 PCI: 00:15.2
1249 11:41:28.124885 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 11:41:28.127993 PCI: 00:15.3
1251 11:41:28.138177 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1252 11:41:28.138745 PCI: 00:16.0
1253 11:41:28.148203 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 11:41:28.151186 PCI: 00:19.0
1255 11:41:28.155088 PCI: 00:19.1 child on link 0 I2C: 00:15
1256 11:41:28.164614 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 11:41:28.167742 I2C: 00:15
1258 11:41:28.170949 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1259 11:41:28.180917 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1260 11:41:28.188117 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1261 11:41:28.197872 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1262 11:41:28.201356 GENERIC: 0.0
1263 11:41:28.201877 PCI: 01:00.0
1264 11:41:28.210855 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1265 11:41:28.220929 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1266 11:41:28.231123 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1267 11:41:28.231682 PCI: 00:1e.0
1268 11:41:28.244261 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1269 11:41:28.247550 PCI: 00:1e.2 child on link 0 SPI: 00
1270 11:41:28.257794 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1271 11:41:28.258358 SPI: 00
1272 11:41:28.264264 PCI: 00:1e.3 child on link 0 SPI: 00
1273 11:41:28.274576 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1274 11:41:28.275151 SPI: 00
1275 11:41:28.277663 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1276 11:41:28.287207 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1277 11:41:28.287764 PNP: 0c09.0
1278 11:41:28.297521 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1279 11:41:28.300495 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1280 11:41:28.310300 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1281 11:41:28.320412 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1282 11:41:28.323927 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1283 11:41:28.326990 GENERIC: 0.0
1284 11:41:28.327411 GENERIC: 1.0
1285 11:41:28.330245 PCI: 00:1f.3
1286 11:41:28.340128 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1287 11:41:28.350202 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1288 11:41:28.354024 PCI: 00:1f.5
1289 11:41:28.360476 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1290 11:41:28.367303 CPU_CLUSTER: 0 child on link 0 APIC: 00
1291 11:41:28.367877 APIC: 00
1292 11:41:28.368299 APIC: 01
1293 11:41:28.370069 APIC: 03
1294 11:41:28.370602 APIC: 07
1295 11:41:28.370986 APIC: 05
1296 11:41:28.373619 APIC: 04
1297 11:41:28.374096 APIC: 02
1298 11:41:28.376703 APIC: 06
1299 11:41:28.383336 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1300 11:41:28.390041 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1301 11:41:28.396586 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1302 11:41:28.400144 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1303 11:41:28.406814 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1304 11:41:28.410016 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1305 11:41:28.413578 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1306 11:41:28.419997 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1307 11:41:28.429669 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1308 11:41:28.437154 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1309 11:41:28.443006 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1310 11:41:28.449865 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1311 11:41:28.456590 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1312 11:41:28.463612 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1313 11:41:28.472715 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1314 11:41:28.476283 DOMAIN: 0000: Resource ranges:
1315 11:41:28.479761 * Base: 1000, Size: 800, Tag: 100
1316 11:41:28.483037 * Base: 1900, Size: e700, Tag: 100
1317 11:41:28.489506 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1318 11:41:28.496121 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1319 11:41:28.502725 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1320 11:41:28.509612 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1321 11:41:28.516314 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1322 11:41:28.526430 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1323 11:41:28.532740 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1324 11:41:28.539691 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1325 11:41:28.549604 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1326 11:41:28.555926 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1327 11:41:28.563214 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1328 11:41:28.569196 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1329 11:41:28.579605 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1330 11:41:28.586226 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1331 11:41:28.592960 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1332 11:41:28.602240 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1333 11:41:28.608643 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1334 11:41:28.615604 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1335 11:41:28.625594 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1336 11:41:28.632560 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1337 11:41:28.638753 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1338 11:41:28.648531 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1339 11:41:28.655828 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1340 11:41:28.662237 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1341 11:41:28.672253 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1342 11:41:28.675399 DOMAIN: 0000: Resource ranges:
1343 11:41:28.679154 * Base: 7fc00000, Size: 40400000, Tag: 200
1344 11:41:28.681797 * Base: d0000000, Size: 28000000, Tag: 200
1345 11:41:28.688871 * Base: fa000000, Size: 1000000, Tag: 200
1346 11:41:28.691790 * Base: fb001000, Size: 2fff000, Tag: 200
1347 11:41:28.695315 * Base: fe010000, Size: 2e000, Tag: 200
1348 11:41:28.698659 * Base: fe03f000, Size: d41000, Tag: 200
1349 11:41:28.705069 * Base: fed88000, Size: 8000, Tag: 200
1350 11:41:28.708548 * Base: fed93000, Size: d000, Tag: 200
1351 11:41:28.711870 * Base: feda2000, Size: 1e000, Tag: 200
1352 11:41:28.715277 * Base: fede0000, Size: 1220000, Tag: 200
1353 11:41:28.721648 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1354 11:41:28.728337 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1355 11:41:28.735351 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1356 11:41:28.741441 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1357 11:41:28.748422 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1358 11:41:28.755470 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1359 11:41:28.762051 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1360 11:41:28.768734 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1361 11:41:28.775150 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1362 11:41:28.781515 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1363 11:41:28.788600 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1364 11:41:28.794933 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1365 11:41:28.801831 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1366 11:41:28.808497 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1367 11:41:28.814476 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1368 11:41:28.821362 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1369 11:41:28.828110 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1370 11:41:28.834621 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1371 11:41:28.841242 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1372 11:41:28.848050 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1373 11:41:28.854597 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1374 11:41:28.861361 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1375 11:41:28.868349 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1376 11:41:28.874690 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1377 11:41:28.884617 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1378 11:41:28.888110 PCI: 00:1d.0: Resource ranges:
1379 11:41:28.890940 * Base: 7fc00000, Size: 100000, Tag: 200
1380 11:41:28.897726 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1381 11:41:28.904567 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1382 11:41:28.910971 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1383 11:41:28.917612 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1384 11:41:28.927718 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1385 11:41:28.930931 Root Device assign_resources, bus 0 link: 0
1386 11:41:28.933909 DOMAIN: 0000 assign_resources, bus 0 link: 0
1387 11:41:28.944206 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1388 11:41:28.950749 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1389 11:41:28.960811 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1390 11:41:28.967614 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1391 11:41:28.974459 PCI: 00:04.0 assign_resources, bus 1 link: 0
1392 11:41:28.977287 PCI: 00:04.0 assign_resources, bus 1 link: 0
1393 11:41:28.984240 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1394 11:41:28.993585 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1395 11:41:29.000246 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1396 11:41:29.007096 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1397 11:41:29.010168 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1398 11:41:29.020767 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1399 11:41:29.023851 PCI: 00:14.0 assign_resources, bus 0 link: 0
1400 11:41:29.027247 PCI: 00:14.0 assign_resources, bus 0 link: 0
1401 11:41:29.037198 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1402 11:41:29.043523 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1403 11:41:29.053956 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1404 11:41:29.056835 PCI: 00:14.3 assign_resources, bus 0 link: 0
1405 11:41:29.063474 PCI: 00:14.3 assign_resources, bus 0 link: 0
1406 11:41:29.070828 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1407 11:41:29.073956 PCI: 00:15.0 assign_resources, bus 0 link: 0
1408 11:41:29.080144 PCI: 00:15.0 assign_resources, bus 0 link: 0
1409 11:41:29.087036 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1410 11:41:29.093582 PCI: 00:15.1 assign_resources, bus 0 link: 0
1411 11:41:29.097425 PCI: 00:15.1 assign_resources, bus 0 link: 0
1412 11:41:29.106777 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1413 11:41:29.113084 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1414 11:41:29.123355 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1415 11:41:29.129981 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1416 11:41:29.133286 PCI: 00:19.1 assign_resources, bus 0 link: 0
1417 11:41:29.139926 PCI: 00:19.1 assign_resources, bus 0 link: 0
1418 11:41:29.146806 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1419 11:41:29.156977 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1420 11:41:29.166250 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1421 11:41:29.169660 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1422 11:41:29.179891 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1423 11:41:29.186066 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1424 11:41:29.196383 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1425 11:41:29.199824 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1426 11:41:29.209711 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1427 11:41:29.213082 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1428 11:41:29.216297 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1429 11:41:29.225912 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1430 11:41:29.229417 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1431 11:41:29.235946 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1432 11:41:29.239324 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1433 11:41:29.246101 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1434 11:41:29.249010 LPC: Trying to open IO window from 800 size 1ff
1435 11:41:29.259496 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1436 11:41:29.266139 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1437 11:41:29.272595 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1438 11:41:29.279011 DOMAIN: 0000 assign_resources, bus 0 link: 0
1439 11:41:29.282297 Root Device assign_resources, bus 0 link: 0
1440 11:41:29.285460 Done setting resources.
1441 11:41:29.292598 Show resources in subtree (Root Device)...After assigning values.
1442 11:41:29.295177 Root Device child on link 0 DOMAIN: 0000
1443 11:41:29.302662 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1444 11:41:29.309029 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1445 11:41:29.318644 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1446 11:41:29.322435 PCI: 00:00.0
1447 11:41:29.332120 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1448 11:41:29.342211 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1449 11:41:29.348887 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1450 11:41:29.358698 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1451 11:41:29.368616 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1452 11:41:29.378676 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1453 11:41:29.388757 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1454 11:41:29.398299 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1455 11:41:29.405159 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1456 11:41:29.415221 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1457 11:41:29.426404 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1458 11:41:29.434898 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1459 11:41:29.444620 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1460 11:41:29.451717 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1461 11:41:29.461831 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1462 11:41:29.471611 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1463 11:41:29.481118 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1464 11:41:29.491488 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1465 11:41:29.501369 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1466 11:41:29.511289 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1467 11:41:29.511868 PCI: 00:02.0
1468 11:41:29.521384 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1469 11:41:29.534610 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1470 11:41:29.540741 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1471 11:41:29.548425 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1472 11:41:29.557390 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1473 11:41:29.557864 GENERIC: 0.0
1474 11:41:29.561243 PCI: 00:05.0
1475 11:41:29.571213 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1476 11:41:29.574388 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1477 11:41:29.578411 GENERIC: 0.0
1478 11:41:29.578974 PCI: 00:08.0
1479 11:41:29.590899 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1480 11:41:29.591491 PCI: 00:0a.0
1481 11:41:29.594191 PCI: 00:0d.0 child on link 0 USB0 port 0
1482 11:41:29.604467 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1483 11:41:29.611342 USB0 port 0 child on link 0 USB3 port 0
1484 11:41:29.611927 USB3 port 0
1485 11:41:29.614483 USB3 port 1
1486 11:41:29.615067 USB3 port 2
1487 11:41:29.617547 USB3 port 3
1488 11:41:29.621134 PCI: 00:14.0 child on link 0 USB0 port 0
1489 11:41:29.631366 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1490 11:41:29.638068 USB0 port 0 child on link 0 USB2 port 0
1491 11:41:29.638654 USB2 port 0
1492 11:41:29.640569 USB2 port 1
1493 11:41:29.641047 USB2 port 2
1494 11:41:29.644466 USB2 port 3
1495 11:41:29.644949 USB2 port 4
1496 11:41:29.647286 USB2 port 5
1497 11:41:29.647870 USB2 port 6
1498 11:41:29.650874 USB2 port 7
1499 11:41:29.654112 USB2 port 8
1500 11:41:29.654694 USB2 port 9
1501 11:41:29.657437 USB3 port 0
1502 11:41:29.657918 USB3 port 1
1503 11:41:29.660592 USB3 port 2
1504 11:41:29.661176 USB3 port 3
1505 11:41:29.664190 PCI: 00:14.2
1506 11:41:29.674636 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1507 11:41:29.683881 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1508 11:41:29.687426 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1509 11:41:29.696949 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1510 11:41:29.700451 GENERIC: 0.0
1511 11:41:29.703593 PCI: 00:15.0 child on link 0 I2C: 00:1a
1512 11:41:29.713987 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1513 11:41:29.717102 I2C: 00:1a
1514 11:41:29.717568 I2C: 00:31
1515 11:41:29.720229 I2C: 00:32
1516 11:41:29.723680 PCI: 00:15.1 child on link 0 I2C: 00:10
1517 11:41:29.734284 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1518 11:41:29.737233 I2C: 00:10
1519 11:41:29.737697 PCI: 00:15.2
1520 11:41:29.747689 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1521 11:41:29.750574 PCI: 00:15.3
1522 11:41:29.760841 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1523 11:41:29.761412 PCI: 00:16.0
1524 11:41:29.770021 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1525 11:41:29.773566 PCI: 00:19.0
1526 11:41:29.777236 PCI: 00:19.1 child on link 0 I2C: 00:15
1527 11:41:29.787042 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1528 11:41:29.790271 I2C: 00:15
1529 11:41:29.794114 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1530 11:41:29.803836 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1531 11:41:29.813576 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1532 11:41:29.826851 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1533 11:41:29.827431 GENERIC: 0.0
1534 11:41:29.830067 PCI: 01:00.0
1535 11:41:29.840056 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1536 11:41:29.850511 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1537 11:41:29.859801 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1538 11:41:29.863202 PCI: 00:1e.0
1539 11:41:29.873273 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1540 11:41:29.876502 PCI: 00:1e.2 child on link 0 SPI: 00
1541 11:41:29.886593 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1542 11:41:29.890244 SPI: 00
1543 11:41:29.893399 PCI: 00:1e.3 child on link 0 SPI: 00
1544 11:41:29.904243 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1545 11:41:29.904830 SPI: 00
1546 11:41:29.910112 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1547 11:41:29.916401 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1548 11:41:29.919320 PNP: 0c09.0
1549 11:41:29.929699 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1550 11:41:29.933132 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1551 11:41:29.942799 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1552 11:41:29.952840 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1553 11:41:29.956228 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1554 11:41:29.956788 GENERIC: 0.0
1555 11:41:29.959702 GENERIC: 1.0
1556 11:41:29.962675 PCI: 00:1f.3
1557 11:41:29.972689 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1558 11:41:29.982817 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1559 11:41:29.983423 PCI: 00:1f.5
1560 11:41:29.992784 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1561 11:41:29.999456 CPU_CLUSTER: 0 child on link 0 APIC: 00
1562 11:41:30.000041 APIC: 00
1563 11:41:30.000421 APIC: 01
1564 11:41:30.002416 APIC: 03
1565 11:41:30.002979 APIC: 07
1566 11:41:30.005569 APIC: 05
1567 11:41:30.006035 APIC: 04
1568 11:41:30.006402 APIC: 02
1569 11:41:30.009303 APIC: 06
1570 11:41:30.012254 Done allocating resources.
1571 11:41:30.016482 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1572 11:41:30.023435 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1573 11:41:30.025925 Configure GPIOs for I2S audio on UP4.
1574 11:41:30.033562 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1575 11:41:30.036828 Enabling resources...
1576 11:41:30.040171 PCI: 00:00.0 subsystem <- 8086/9a12
1577 11:41:30.043732 PCI: 00:00.0 cmd <- 06
1578 11:41:30.046763 PCI: 00:02.0 subsystem <- 8086/9a40
1579 11:41:30.050158 PCI: 00:02.0 cmd <- 03
1580 11:41:30.053599 PCI: 00:04.0 subsystem <- 8086/9a03
1581 11:41:30.054062 PCI: 00:04.0 cmd <- 02
1582 11:41:30.060712 PCI: 00:05.0 subsystem <- 8086/9a19
1583 11:41:30.061281 PCI: 00:05.0 cmd <- 02
1584 11:41:30.064032 PCI: 00:08.0 subsystem <- 8086/9a11
1585 11:41:30.067177 PCI: 00:08.0 cmd <- 06
1586 11:41:30.070389 PCI: 00:0d.0 subsystem <- 8086/9a13
1587 11:41:30.073449 PCI: 00:0d.0 cmd <- 02
1588 11:41:30.076919 PCI: 00:14.0 subsystem <- 8086/a0ed
1589 11:41:30.080203 PCI: 00:14.0 cmd <- 02
1590 11:41:30.083884 PCI: 00:14.2 subsystem <- 8086/a0ef
1591 11:41:30.087054 PCI: 00:14.2 cmd <- 02
1592 11:41:30.090581 PCI: 00:14.3 subsystem <- 8086/a0f0
1593 11:41:30.093718 PCI: 00:14.3 cmd <- 02
1594 11:41:30.097066 PCI: 00:15.0 subsystem <- 8086/a0e8
1595 11:41:30.099921 PCI: 00:15.0 cmd <- 02
1596 11:41:30.103702 PCI: 00:15.1 subsystem <- 8086/a0e9
1597 11:41:30.104466 PCI: 00:15.1 cmd <- 02
1598 11:41:30.110034 PCI: 00:15.2 subsystem <- 8086/a0ea
1599 11:41:30.110597 PCI: 00:15.2 cmd <- 02
1600 11:41:30.113356 PCI: 00:15.3 subsystem <- 8086/a0eb
1601 11:41:30.116921 PCI: 00:15.3 cmd <- 02
1602 11:41:30.119781 PCI: 00:16.0 subsystem <- 8086/a0e0
1603 11:41:30.123842 PCI: 00:16.0 cmd <- 02
1604 11:41:30.127158 PCI: 00:19.1 subsystem <- 8086/a0c6
1605 11:41:30.130091 PCI: 00:19.1 cmd <- 02
1606 11:41:30.134557 PCI: 00:1d.0 bridge ctrl <- 0013
1607 11:41:30.136876 PCI: 00:1d.0 subsystem <- 8086/a0b0
1608 11:41:30.139940 PCI: 00:1d.0 cmd <- 06
1609 11:41:30.143586 PCI: 00:1e.0 subsystem <- 8086/a0a8
1610 11:41:30.146374 PCI: 00:1e.0 cmd <- 06
1611 11:41:30.149586 PCI: 00:1e.2 subsystem <- 8086/a0aa
1612 11:41:30.150073 PCI: 00:1e.2 cmd <- 06
1613 11:41:30.156890 PCI: 00:1e.3 subsystem <- 8086/a0ab
1614 11:41:30.157353 PCI: 00:1e.3 cmd <- 02
1615 11:41:30.160093 PCI: 00:1f.0 subsystem <- 8086/a087
1616 11:41:30.163595 PCI: 00:1f.0 cmd <- 407
1617 11:41:30.166916 PCI: 00:1f.3 subsystem <- 8086/a0c8
1618 11:41:30.170618 PCI: 00:1f.3 cmd <- 02
1619 11:41:30.173619 PCI: 00:1f.5 subsystem <- 8086/a0a4
1620 11:41:30.176303 PCI: 00:1f.5 cmd <- 406
1621 11:41:30.180664 PCI: 01:00.0 cmd <- 02
1622 11:41:30.185479 done.
1623 11:41:30.188502 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1624 11:41:30.192272 Initializing devices...
1625 11:41:30.195513 Root Device init
1626 11:41:30.198307 Chrome EC: Set SMI mask to 0x0000000000000000
1627 11:41:30.206190 Chrome EC: clear events_b mask to 0x0000000000000000
1628 11:41:30.212576 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1629 11:41:30.219245 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1630 11:41:30.226125 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1631 11:41:30.228861 Chrome EC: Set WAKE mask to 0x0000000000000000
1632 11:41:30.237125 fw_config match found: DB_USB=USB3_ACTIVE
1633 11:41:30.240129 Configure Right Type-C port orientation for retimer
1634 11:41:30.244091 Root Device init finished in 46 msecs
1635 11:41:30.247983 PCI: 00:00.0 init
1636 11:41:30.251268 CPU TDP = 9 Watts
1637 11:41:30.251837 CPU PL1 = 9 Watts
1638 11:41:30.254346 CPU PL2 = 40 Watts
1639 11:41:30.257678 CPU PL4 = 83 Watts
1640 11:41:30.261864 PCI: 00:00.0 init finished in 8 msecs
1641 11:41:30.262444 PCI: 00:02.0 init
1642 11:41:30.264547 GMA: Found VBT in CBFS
1643 11:41:30.268017 GMA: Found valid VBT in CBFS
1644 11:41:30.274537 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1645 11:41:30.281533 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1646 11:41:30.284093 PCI: 00:02.0 init finished in 18 msecs
1647 11:41:30.287682 PCI: 00:05.0 init
1648 11:41:30.291928 PCI: 00:05.0 init finished in 0 msecs
1649 11:41:30.294465 PCI: 00:08.0 init
1650 11:41:30.297395 PCI: 00:08.0 init finished in 0 msecs
1651 11:41:30.300994 PCI: 00:14.0 init
1652 11:41:30.304801 PCI: 00:14.0 init finished in 0 msecs
1653 11:41:30.307414 PCI: 00:14.2 init
1654 11:41:30.310900 PCI: 00:14.2 init finished in 0 msecs
1655 11:41:30.314354 PCI: 00:15.0 init
1656 11:41:30.314917 I2C bus 0 version 0x3230302a
1657 11:41:30.320507 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1658 11:41:30.325370 PCI: 00:15.0 init finished in 6 msecs
1659 11:41:30.325935 PCI: 00:15.1 init
1660 11:41:30.327541 I2C bus 1 version 0x3230302a
1661 11:41:30.330789 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1662 11:41:30.334316 PCI: 00:15.1 init finished in 6 msecs
1663 11:41:30.337407 PCI: 00:15.2 init
1664 11:41:30.340657 I2C bus 2 version 0x3230302a
1665 11:41:30.344392 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1666 11:41:30.347435 PCI: 00:15.2 init finished in 6 msecs
1667 11:41:30.351425 PCI: 00:15.3 init
1668 11:41:30.354300 I2C bus 3 version 0x3230302a
1669 11:41:30.357717 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1670 11:41:30.360665 PCI: 00:15.3 init finished in 6 msecs
1671 11:41:30.364311 PCI: 00:16.0 init
1672 11:41:30.367808 PCI: 00:16.0 init finished in 0 msecs
1673 11:41:30.370571 PCI: 00:19.1 init
1674 11:41:30.371027 I2C bus 5 version 0x3230302a
1675 11:41:30.377340 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1676 11:41:30.381299 PCI: 00:19.1 init finished in 6 msecs
1677 11:41:30.381826 PCI: 00:1d.0 init
1678 11:41:30.384044 Initializing PCH PCIe bridge.
1679 11:41:30.387292 PCI: 00:1d.0 init finished in 3 msecs
1680 11:41:30.391847 PCI: 00:1f.0 init
1681 11:41:30.394990 IOAPIC: Initializing IOAPIC at 0xfec00000
1682 11:41:30.401567 IOAPIC: Bootstrap Processor Local APIC = 0x00
1683 11:41:30.402134 IOAPIC: ID = 0x02
1684 11:41:30.405162 IOAPIC: Dumping registers
1685 11:41:30.408001 reg 0x0000: 0x02000000
1686 11:41:30.411897 reg 0x0001: 0x00770020
1687 11:41:30.412510 reg 0x0002: 0x00000000
1688 11:41:30.418479 PCI: 00:1f.0 init finished in 21 msecs
1689 11:41:30.419043 PCI: 00:1f.2 init
1690 11:41:30.422371 Disabling ACPI via APMC.
1691 11:41:30.425137 APMC done.
1692 11:41:30.428026 PCI: 00:1f.2 init finished in 5 msecs
1693 11:41:30.440147 PCI: 01:00.0 init
1694 11:41:30.443462 PCI: 01:00.0 init finished in 0 msecs
1695 11:41:30.446551 PNP: 0c09.0 init
1696 11:41:30.450140 Google Chrome EC uptime: 8.452 seconds
1697 11:41:30.456717 Google Chrome AP resets since EC boot: 1
1698 11:41:30.460169 Google Chrome most recent AP reset causes:
1699 11:41:30.463072 0.347: 32775 shutdown: entering G3
1700 11:41:30.470026 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1701 11:41:30.473972 PNP: 0c09.0 init finished in 22 msecs
1702 11:41:30.479479 Devices initialized
1703 11:41:30.482808 Show all devs... After init.
1704 11:41:30.486073 Root Device: enabled 1
1705 11:41:30.486539 DOMAIN: 0000: enabled 1
1706 11:41:30.488633 CPU_CLUSTER: 0: enabled 1
1707 11:41:30.492673 PCI: 00:00.0: enabled 1
1708 11:41:30.495761 PCI: 00:02.0: enabled 1
1709 11:41:30.496355 PCI: 00:04.0: enabled 1
1710 11:41:30.498549 PCI: 00:05.0: enabled 1
1711 11:41:30.502252 PCI: 00:06.0: enabled 0
1712 11:41:30.505559 PCI: 00:07.0: enabled 0
1713 11:41:30.506023 PCI: 00:07.1: enabled 0
1714 11:41:30.508860 PCI: 00:07.2: enabled 0
1715 11:41:30.512313 PCI: 00:07.3: enabled 0
1716 11:41:30.516151 PCI: 00:08.0: enabled 1
1717 11:41:30.516715 PCI: 00:09.0: enabled 0
1718 11:41:30.518638 PCI: 00:0a.0: enabled 0
1719 11:41:30.522535 PCI: 00:0d.0: enabled 1
1720 11:41:30.523099 PCI: 00:0d.1: enabled 0
1721 11:41:30.526153 PCI: 00:0d.2: enabled 0
1722 11:41:30.528694 PCI: 00:0d.3: enabled 0
1723 11:41:30.532686 PCI: 00:0e.0: enabled 0
1724 11:41:30.533253 PCI: 00:10.2: enabled 1
1725 11:41:30.536053 PCI: 00:10.6: enabled 0
1726 11:41:30.539220 PCI: 00:10.7: enabled 0
1727 11:41:30.542171 PCI: 00:12.0: enabled 0
1728 11:41:30.542790 PCI: 00:12.6: enabled 0
1729 11:41:30.545620 PCI: 00:13.0: enabled 0
1730 11:41:30.549607 PCI: 00:14.0: enabled 1
1731 11:41:30.553015 PCI: 00:14.1: enabled 0
1732 11:41:30.553591 PCI: 00:14.2: enabled 1
1733 11:41:30.555507 PCI: 00:14.3: enabled 1
1734 11:41:30.559248 PCI: 00:15.0: enabled 1
1735 11:41:30.562050 PCI: 00:15.1: enabled 1
1736 11:41:30.562526 PCI: 00:15.2: enabled 1
1737 11:41:30.565222 PCI: 00:15.3: enabled 1
1738 11:41:30.568571 PCI: 00:16.0: enabled 1
1739 11:41:30.569037 PCI: 00:16.1: enabled 0
1740 11:41:30.572362 PCI: 00:16.2: enabled 0
1741 11:41:30.575254 PCI: 00:16.3: enabled 0
1742 11:41:30.579262 PCI: 00:16.4: enabled 0
1743 11:41:30.579831 PCI: 00:16.5: enabled 0
1744 11:41:30.581931 PCI: 00:17.0: enabled 0
1745 11:41:30.584997 PCI: 00:19.0: enabled 0
1746 11:41:30.588899 PCI: 00:19.1: enabled 1
1747 11:41:30.589474 PCI: 00:19.2: enabled 0
1748 11:41:30.591931 PCI: 00:1c.0: enabled 1
1749 11:41:30.595545 PCI: 00:1c.1: enabled 0
1750 11:41:30.598533 PCI: 00:1c.2: enabled 0
1751 11:41:30.599050 PCI: 00:1c.3: enabled 0
1752 11:41:30.601565 PCI: 00:1c.4: enabled 0
1753 11:41:30.605013 PCI: 00:1c.5: enabled 0
1754 11:41:30.605578 PCI: 00:1c.6: enabled 1
1755 11:41:30.608706 PCI: 00:1c.7: enabled 0
1756 11:41:30.612069 PCI: 00:1d.0: enabled 1
1757 11:41:30.615247 PCI: 00:1d.1: enabled 0
1758 11:41:30.615807 PCI: 00:1d.2: enabled 1
1759 11:41:30.618759 PCI: 00:1d.3: enabled 0
1760 11:41:30.621706 PCI: 00:1e.0: enabled 1
1761 11:41:30.624932 PCI: 00:1e.1: enabled 0
1762 11:41:30.625394 PCI: 00:1e.2: enabled 1
1763 11:41:30.629161 PCI: 00:1e.3: enabled 1
1764 11:41:30.631628 PCI: 00:1f.0: enabled 1
1765 11:41:30.635480 PCI: 00:1f.1: enabled 0
1766 11:41:30.636077 PCI: 00:1f.2: enabled 1
1767 11:41:30.638954 PCI: 00:1f.3: enabled 1
1768 11:41:30.642081 PCI: 00:1f.4: enabled 0
1769 11:41:30.642698 PCI: 00:1f.5: enabled 1
1770 11:41:30.645163 PCI: 00:1f.6: enabled 0
1771 11:41:30.648405 PCI: 00:1f.7: enabled 0
1772 11:41:30.651714 APIC: 00: enabled 1
1773 11:41:30.652317 GENERIC: 0.0: enabled 1
1774 11:41:30.655141 GENERIC: 0.0: enabled 1
1775 11:41:30.658637 GENERIC: 1.0: enabled 1
1776 11:41:30.661758 GENERIC: 0.0: enabled 1
1777 11:41:30.662222 GENERIC: 1.0: enabled 1
1778 11:41:30.665279 USB0 port 0: enabled 1
1779 11:41:30.668723 GENERIC: 0.0: enabled 1
1780 11:41:30.669301 USB0 port 0: enabled 1
1781 11:41:30.671924 GENERIC: 0.0: enabled 1
1782 11:41:30.674604 I2C: 00:1a: enabled 1
1783 11:41:30.675120 I2C: 00:31: enabled 1
1784 11:41:30.678231 I2C: 00:32: enabled 1
1785 11:41:30.681874 I2C: 00:10: enabled 1
1786 11:41:30.685105 I2C: 00:15: enabled 1
1787 11:41:30.685680 GENERIC: 0.0: enabled 0
1788 11:41:30.688585 GENERIC: 1.0: enabled 0
1789 11:41:30.691888 GENERIC: 0.0: enabled 1
1790 11:41:30.692471 SPI: 00: enabled 1
1791 11:41:30.694743 SPI: 00: enabled 1
1792 11:41:30.698252 PNP: 0c09.0: enabled 1
1793 11:41:30.698808 GENERIC: 0.0: enabled 1
1794 11:41:30.701435 USB3 port 0: enabled 1
1795 11:41:30.704855 USB3 port 1: enabled 1
1796 11:41:30.705317 USB3 port 2: enabled 0
1797 11:41:30.708536 USB3 port 3: enabled 0
1798 11:41:30.711896 USB2 port 0: enabled 0
1799 11:41:30.714994 USB2 port 1: enabled 1
1800 11:41:30.715560 USB2 port 2: enabled 1
1801 11:41:30.717843 USB2 port 3: enabled 0
1802 11:41:30.721788 USB2 port 4: enabled 1
1803 11:41:30.722362 USB2 port 5: enabled 0
1804 11:41:30.724813 USB2 port 6: enabled 0
1805 11:41:30.728230 USB2 port 7: enabled 0
1806 11:41:30.731876 USB2 port 8: enabled 0
1807 11:41:30.732483 USB2 port 9: enabled 0
1808 11:41:30.735226 USB3 port 0: enabled 0
1809 11:41:30.738149 USB3 port 1: enabled 1
1810 11:41:30.738712 USB3 port 2: enabled 0
1811 11:41:30.741291 USB3 port 3: enabled 0
1812 11:41:30.744922 GENERIC: 0.0: enabled 1
1813 11:41:30.748489 GENERIC: 1.0: enabled 1
1814 11:41:30.749056 APIC: 01: enabled 1
1815 11:41:30.751496 APIC: 03: enabled 1
1816 11:41:30.752111 APIC: 07: enabled 1
1817 11:41:30.754642 APIC: 05: enabled 1
1818 11:41:30.758067 APIC: 04: enabled 1
1819 11:41:30.758625 APIC: 02: enabled 1
1820 11:41:30.761311 APIC: 06: enabled 1
1821 11:41:30.764649 PCI: 01:00.0: enabled 1
1822 11:41:30.768779 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1823 11:41:30.775250 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1824 11:41:30.777557 ELOG: NV offset 0xf30000 size 0x1000
1825 11:41:30.784766 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1826 11:41:30.791415 ELOG: Event(17) added with size 13 at 2023-04-03 11:41:30 UTC
1827 11:41:30.798004 ELOG: Event(92) added with size 9 at 2023-04-03 11:41:30 UTC
1828 11:41:30.804682 ELOG: Event(93) added with size 9 at 2023-04-03 11:41:30 UTC
1829 11:41:30.811207 ELOG: Event(9E) added with size 10 at 2023-04-03 11:41:30 UTC
1830 11:41:30.818084 ELOG: Event(9F) added with size 14 at 2023-04-03 11:41:30 UTC
1831 11:41:30.820859 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1832 11:41:30.828046 ELOG: Event(A1) added with size 10 at 2023-04-03 11:41:30 UTC
1833 11:41:30.834934 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1834 11:41:30.840785 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1835 11:41:30.844366 Finalize devices...
1836 11:41:30.844929 Devices finalized
1837 11:41:30.851054 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1838 11:41:30.854357 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1839 11:41:30.860943 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1840 11:41:30.864626 ME: HFSTS1 : 0x80030055
1841 11:41:30.871150 ME: HFSTS2 : 0x30280116
1842 11:41:30.874480 ME: HFSTS3 : 0x00000050
1843 11:41:30.881179 ME: HFSTS4 : 0x00004000
1844 11:41:30.884343 ME: HFSTS5 : 0x00000000
1845 11:41:30.887698 ME: HFSTS6 : 0x00400006
1846 11:41:30.890748 ME: Manufacturing Mode : YES
1847 11:41:30.893986 ME: SPI Protection Mode Enabled : NO
1848 11:41:30.900967 ME: FW Partition Table : OK
1849 11:41:30.904009 ME: Bringup Loader Failure : NO
1850 11:41:30.907592 ME: Firmware Init Complete : NO
1851 11:41:30.911113 ME: Boot Options Present : NO
1852 11:41:30.914134 ME: Update In Progress : NO
1853 11:41:30.917641 ME: D0i3 Support : YES
1854 11:41:30.920970 ME: Low Power State Enabled : NO
1855 11:41:30.924587 ME: CPU Replaced : YES
1856 11:41:30.930669 ME: CPU Replacement Valid : YES
1857 11:41:30.933556 ME: Current Working State : 5
1858 11:41:30.937100 ME: Current Operation State : 1
1859 11:41:30.940749 ME: Current Operation Mode : 3
1860 11:41:30.944278 ME: Error Code : 0
1861 11:41:30.947526 ME: Enhanced Debug Mode : NO
1862 11:41:30.950436 ME: CPU Debug Disabled : YES
1863 11:41:30.954001 ME: TXT Support : NO
1864 11:41:30.960876 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1865 11:41:30.970440 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1866 11:41:30.973837 CBFS: 'fallback/slic' not found.
1867 11:41:30.977396 ACPI: Writing ACPI tables at 76b01000.
1868 11:41:30.977963 ACPI: * FACS
1869 11:41:30.980541 ACPI: * DSDT
1870 11:41:30.984099 Ramoops buffer: 0x100000@0x76a00000.
1871 11:41:30.987608 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1872 11:41:30.993516 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1873 11:41:30.996564 Google Chrome EC: version:
1874 11:41:31.000075 ro: voema_v2.0.7540-147f8d37d1
1875 11:41:31.003298 rw: voema_v2.0.7540-147f8d37d1
1876 11:41:31.003767 running image: 2
1877 11:41:31.010351 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1878 11:41:31.014763 ACPI: * FADT
1879 11:41:31.015332 SCI is IRQ9
1880 11:41:31.021941 ACPI: added table 1/32, length now 40
1881 11:41:31.022528 ACPI: * SSDT
1882 11:41:31.024650 Found 1 CPU(s) with 8 core(s) each.
1883 11:41:31.031534 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1884 11:41:31.034780 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1885 11:41:31.038529 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1886 11:41:31.041524 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1887 11:41:31.047934 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1888 11:41:31.054657 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1889 11:41:31.057930 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1890 11:41:31.064765 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1891 11:41:31.071237 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1892 11:41:31.074567 \_SB.PCI0.RP09: Added StorageD3Enable property
1893 11:41:31.077969 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1894 11:41:31.084712 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1895 11:41:31.091306 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1896 11:41:31.094281 PS2K: Passing 80 keymaps to kernel
1897 11:41:31.101494 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1898 11:41:31.108156 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1899 11:41:31.114933 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1900 11:41:31.121669 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1901 11:41:31.127816 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1902 11:41:31.134677 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1903 11:41:31.140824 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1904 11:41:31.147317 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1905 11:41:31.151090 ACPI: added table 2/32, length now 44
1906 11:41:31.154940 ACPI: * MCFG
1907 11:41:31.157601 ACPI: added table 3/32, length now 48
1908 11:41:31.158009 ACPI: * TPM2
1909 11:41:31.161091 TPM2 log created at 0x769f0000
1910 11:41:31.164294 ACPI: added table 4/32, length now 52
1911 11:41:31.168249 ACPI: * MADT
1912 11:41:31.168761 SCI is IRQ9
1913 11:41:31.170977 ACPI: added table 5/32, length now 56
1914 11:41:31.174365 current = 76b09850
1915 11:41:31.174873 ACPI: * DMAR
1916 11:41:31.180834 ACPI: added table 6/32, length now 60
1917 11:41:31.184124 ACPI: added table 7/32, length now 64
1918 11:41:31.184536 ACPI: * HPET
1919 11:41:31.187485 ACPI: added table 8/32, length now 68
1920 11:41:31.191089 ACPI: done.
1921 11:41:31.191647 ACPI tables: 35216 bytes.
1922 11:41:31.194598 smbios_write_tables: 769ef000
1923 11:41:31.197341 EC returned error result code 3
1924 11:41:31.201516 Couldn't obtain OEM name from CBI
1925 11:41:31.204698 Create SMBIOS type 16
1926 11:41:31.208316 Create SMBIOS type 17
1927 11:41:31.211362 GENERIC: 0.0 (WIFI Device)
1928 11:41:31.211819 SMBIOS tables: 1750 bytes.
1929 11:41:31.218043 Writing table forward entry at 0x00000500
1930 11:41:31.224635 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1931 11:41:31.228287 Writing coreboot table at 0x76b25000
1932 11:41:31.234736 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1933 11:41:31.237996 1. 0000000000001000-000000000009ffff: RAM
1934 11:41:31.241118 2. 00000000000a0000-00000000000fffff: RESERVED
1935 11:41:31.248081 3. 0000000000100000-00000000769eefff: RAM
1936 11:41:31.251682 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1937 11:41:31.258173 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1938 11:41:31.264495 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1939 11:41:31.268341 7. 0000000077000000-000000007fbfffff: RESERVED
1940 11:41:31.272093 8. 00000000c0000000-00000000cfffffff: RESERVED
1941 11:41:31.278288 9. 00000000f8000000-00000000f9ffffff: RESERVED
1942 11:41:31.281486 10. 00000000fb000000-00000000fb000fff: RESERVED
1943 11:41:31.288593 11. 00000000fe000000-00000000fe00ffff: RESERVED
1944 11:41:31.290806 12. 00000000fed80000-00000000fed87fff: RESERVED
1945 11:41:31.297896 13. 00000000fed90000-00000000fed92fff: RESERVED
1946 11:41:31.301191 14. 00000000feda0000-00000000feda1fff: RESERVED
1947 11:41:31.308545 15. 00000000fedc0000-00000000feddffff: RESERVED
1948 11:41:31.311494 16. 0000000100000000-00000002803fffff: RAM
1949 11:41:31.314509 Passing 4 GPIOs to payload:
1950 11:41:31.317780 NAME | PORT | POLARITY | VALUE
1951 11:41:31.324696 lid | undefined | high | high
1952 11:41:31.327676 power | undefined | high | low
1953 11:41:31.334156 oprom | undefined | high | low
1954 11:41:31.341146 EC in RW | 0x000000e5 | high | high
1955 11:41:31.347670 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum a0bb
1956 11:41:31.348364 coreboot table: 1576 bytes.
1957 11:41:31.354471 IMD ROOT 0. 0x76fff000 0x00001000
1958 11:41:31.358322 IMD SMALL 1. 0x76ffe000 0x00001000
1959 11:41:31.360896 FSP MEMORY 2. 0x76c4e000 0x003b0000
1960 11:41:31.364408 VPD 3. 0x76c4d000 0x00000367
1961 11:41:31.368008 RO MCACHE 4. 0x76c4c000 0x00000fdc
1962 11:41:31.371321 CONSOLE 5. 0x76c2c000 0x00020000
1963 11:41:31.374640 FMAP 6. 0x76c2b000 0x00000578
1964 11:41:31.378016 TIME STAMP 7. 0x76c2a000 0x00000910
1965 11:41:31.381196 VBOOT WORK 8. 0x76c16000 0x00014000
1966 11:41:31.388014 ROMSTG STCK 9. 0x76c15000 0x00001000
1967 11:41:31.391454 AFTER CAR 10. 0x76c0a000 0x0000b000
1968 11:41:31.394723 RAMSTAGE 11. 0x76b97000 0x00073000
1969 11:41:31.397830 REFCODE 12. 0x76b42000 0x00055000
1970 11:41:31.401103 SMM BACKUP 13. 0x76b32000 0x00010000
1971 11:41:31.403990 4f444749 14. 0x76b30000 0x00002000
1972 11:41:31.407886 EXT VBT15. 0x76b2d000 0x0000219f
1973 11:41:31.410762 COREBOOT 16. 0x76b25000 0x00008000
1974 11:41:31.414488 ACPI 17. 0x76b01000 0x00024000
1975 11:41:31.421038 ACPI GNVS 18. 0x76b00000 0x00001000
1976 11:41:31.424198 RAMOOPS 19. 0x76a00000 0x00100000
1977 11:41:31.427351 TPM2 TCGLOG20. 0x769f0000 0x00010000
1978 11:41:31.430718 SMBIOS 21. 0x769ef000 0x00000800
1979 11:41:31.431186 IMD small region:
1980 11:41:31.437787 IMD ROOT 0. 0x76ffec00 0x00000400
1981 11:41:31.440939 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1982 11:41:31.444510 POWER STATE 2. 0x76ffeb80 0x00000044
1983 11:41:31.447930 ROMSTAGE 3. 0x76ffeb60 0x00000004
1984 11:41:31.451035 MEM INFO 4. 0x76ffe980 0x000001e0
1985 11:41:31.458157 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1986 11:41:31.461002 MTRR: Physical address space:
1987 11:41:31.467804 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1988 11:41:31.474339 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1989 11:41:31.480633 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1990 11:41:31.487580 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1991 11:41:31.491338 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1992 11:41:31.497356 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1993 11:41:31.504570 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1994 11:41:31.507107 MTRR: Fixed MSR 0x250 0x0606060606060606
1995 11:41:31.514107 MTRR: Fixed MSR 0x258 0x0606060606060606
1996 11:41:31.517319 MTRR: Fixed MSR 0x259 0x0000000000000000
1997 11:41:31.520647 MTRR: Fixed MSR 0x268 0x0606060606060606
1998 11:41:31.524345 MTRR: Fixed MSR 0x269 0x0606060606060606
1999 11:41:31.530982 MTRR: Fixed MSR 0x26a 0x0606060606060606
2000 11:41:31.534139 MTRR: Fixed MSR 0x26b 0x0606060606060606
2001 11:41:31.537133 MTRR: Fixed MSR 0x26c 0x0606060606060606
2002 11:41:31.540617 MTRR: Fixed MSR 0x26d 0x0606060606060606
2003 11:41:31.547230 MTRR: Fixed MSR 0x26e 0x0606060606060606
2004 11:41:31.550920 MTRR: Fixed MSR 0x26f 0x0606060606060606
2005 11:41:31.553915 call enable_fixed_mtrr()
2006 11:41:31.556880 CPU physical address size: 39 bits
2007 11:41:31.560484 MTRR: default type WB/UC MTRR counts: 6/6.
2008 11:41:31.563631 MTRR: UC selected as default type.
2009 11:41:31.570029 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2010 11:41:31.577319 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2011 11:41:31.583727 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2012 11:41:31.590435 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2013 11:41:31.596765 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2014 11:41:31.603455 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2015 11:41:31.604079
2016 11:41:31.604572 MTRR check
2017 11:41:31.606879 Fixed MTRRs : Enabled
2018 11:41:31.610126 Variable MTRRs: Enabled
2019 11:41:31.610702
2020 11:41:31.613663 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 11:41:31.616757 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 11:41:31.624068 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 11:41:31.626923 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 11:41:31.630199 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 11:41:31.633682 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 11:41:31.639787 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 11:41:31.643303 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 11:41:31.646642 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 11:41:31.650035 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 11:41:31.657156 MTRR: Fixed MSR 0x26f 0x0606060606060606
2031 11:41:31.663260 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2032 11:41:31.663748 call enable_fixed_mtrr()
2033 11:41:31.670481 Checking cr50 for pending updates
2034 11:41:31.671058 CPU physical address size: 39 bits
2035 11:41:31.676975 MTRR: Fixed MSR 0x250 0x0606060606060606
2036 11:41:31.681051 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 11:41:31.683475 MTRR: Fixed MSR 0x258 0x0606060606060606
2038 11:41:31.686922 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 11:41:31.693221 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 11:41:31.697555 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 11:41:31.699877 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 11:41:31.703655 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 11:41:31.709894 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 11:41:31.714469 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 11:41:31.716592 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 11:41:31.719840 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 11:41:31.727272 MTRR: Fixed MSR 0x258 0x0606060606060606
2048 11:41:31.727855 call enable_fixed_mtrr()
2049 11:41:31.734476 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 11:41:31.737327 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 11:41:31.740653 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 11:41:31.743817 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 11:41:31.750848 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 11:41:31.753517 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 11:41:31.756954 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 11:41:31.760255 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 11:41:31.767216 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 11:41:31.770765 CPU physical address size: 39 bits
2059 11:41:31.773449 call enable_fixed_mtrr()
2060 11:41:31.777187 MTRR: Fixed MSR 0x250 0x0606060606060606
2061 11:41:31.780532 MTRR: Fixed MSR 0x250 0x0606060606060606
2062 11:41:31.786726 MTRR: Fixed MSR 0x258 0x0606060606060606
2063 11:41:31.790393 MTRR: Fixed MSR 0x259 0x0000000000000000
2064 11:41:31.793832 MTRR: Fixed MSR 0x268 0x0606060606060606
2065 11:41:31.796589 MTRR: Fixed MSR 0x269 0x0606060606060606
2066 11:41:31.803784 MTRR: Fixed MSR 0x26a 0x0606060606060606
2067 11:41:31.806968 MTRR: Fixed MSR 0x26b 0x0606060606060606
2068 11:41:31.810170 MTRR: Fixed MSR 0x26c 0x0606060606060606
2069 11:41:31.813763 MTRR: Fixed MSR 0x26d 0x0606060606060606
2070 11:41:31.820195 MTRR: Fixed MSR 0x26e 0x0606060606060606
2071 11:41:31.823661 MTRR: Fixed MSR 0x26f 0x0606060606060606
2072 11:41:31.827407 MTRR: Fixed MSR 0x258 0x0606060606060606
2073 11:41:31.833430 MTRR: Fixed MSR 0x259 0x0000000000000000
2074 11:41:31.837120 MTRR: Fixed MSR 0x268 0x0606060606060606
2075 11:41:31.840148 MTRR: Fixed MSR 0x269 0x0606060606060606
2076 11:41:31.843194 MTRR: Fixed MSR 0x26a 0x0606060606060606
2077 11:41:31.850384 MTRR: Fixed MSR 0x26b 0x0606060606060606
2078 11:41:31.853464 MTRR: Fixed MSR 0x26c 0x0606060606060606
2079 11:41:31.856414 MTRR: Fixed MSR 0x26d 0x0606060606060606
2080 11:41:31.859788 MTRR: Fixed MSR 0x26e 0x0606060606060606
2081 11:41:31.866622 MTRR: Fixed MSR 0x26f 0x0606060606060606
2082 11:41:31.870184 call enable_fixed_mtrr()
2083 11:41:31.870756 call enable_fixed_mtrr()
2084 11:41:31.876700 MTRR: Fixed MSR 0x250 0x0606060606060606
2085 11:41:31.880015 MTRR: Fixed MSR 0x250 0x0606060606060606
2086 11:41:31.882968 MTRR: Fixed MSR 0x258 0x0606060606060606
2087 11:41:31.886226 MTRR: Fixed MSR 0x259 0x0000000000000000
2088 11:41:31.892864 MTRR: Fixed MSR 0x268 0x0606060606060606
2089 11:41:31.896529 MTRR: Fixed MSR 0x269 0x0606060606060606
2090 11:41:31.899826 MTRR: Fixed MSR 0x26a 0x0606060606060606
2091 11:41:31.903061 MTRR: Fixed MSR 0x26b 0x0606060606060606
2092 11:41:31.906208 MTRR: Fixed MSR 0x26c 0x0606060606060606
2093 11:41:31.913149 MTRR: Fixed MSR 0x26d 0x0606060606060606
2094 11:41:31.916130 MTRR: Fixed MSR 0x26e 0x0606060606060606
2095 11:41:31.919597 MTRR: Fixed MSR 0x26f 0x0606060606060606
2096 11:41:31.926309 MTRR: Fixed MSR 0x258 0x0606060606060606
2097 11:41:31.926874 call enable_fixed_mtrr()
2098 11:41:31.933344 MTRR: Fixed MSR 0x259 0x0000000000000000
2099 11:41:31.936494 MTRR: Fixed MSR 0x268 0x0606060606060606
2100 11:41:31.940217 MTRR: Fixed MSR 0x269 0x0606060606060606
2101 11:41:31.943288 MTRR: Fixed MSR 0x26a 0x0606060606060606
2102 11:41:31.950083 MTRR: Fixed MSR 0x26b 0x0606060606060606
2103 11:41:31.953219 MTRR: Fixed MSR 0x26c 0x0606060606060606
2104 11:41:31.956857 MTRR: Fixed MSR 0x26d 0x0606060606060606
2105 11:41:31.959510 MTRR: Fixed MSR 0x26e 0x0606060606060606
2106 11:41:31.966663 MTRR: Fixed MSR 0x26f 0x0606060606060606
2107 11:41:31.969521 CPU physical address size: 39 bits
2108 11:41:31.973758 call enable_fixed_mtrr()
2109 11:41:31.976465 CPU physical address size: 39 bits
2110 11:41:31.980029 CPU physical address size: 39 bits
2111 11:41:31.983170 CPU physical address size: 39 bits
2112 11:41:31.986680 Reading cr50 TPM mode
2113 11:41:31.990400 CPU physical address size: 39 bits
2114 11:41:31.997177 BS: BS_PAYLOAD_LOAD entry times (exec / console): 323 / 6 ms
2115 11:41:32.007039 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2116 11:41:32.010186 Checking segment from ROM address 0xffc02b38
2117 11:41:32.013893 Checking segment from ROM address 0xffc02b54
2118 11:41:32.020227 Loading segment from ROM address 0xffc02b38
2119 11:41:32.020693 code (compression=0)
2120 11:41:32.029962 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2121 11:41:32.036883 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2122 11:41:32.039980 it's not compressed!
2123 11:41:32.180121 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2124 11:41:32.186499 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2125 11:41:32.193196 Loading segment from ROM address 0xffc02b54
2126 11:41:32.193794 Entry Point 0x30000000
2127 11:41:32.196253 Loaded segments
2128 11:41:32.203839 BS: BS_PAYLOAD_LOAD run times (exec / console): 136 / 63 ms
2129 11:41:32.246813 Finalizing chipset.
2130 11:41:32.249426 Finalizing SMM.
2131 11:41:32.249895 APMC done.
2132 11:41:32.256083 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2133 11:41:32.259457 mp_park_aps done after 0 msecs.
2134 11:41:32.262790 Jumping to boot code at 0x30000000(0x76b25000)
2135 11:41:32.272793 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2136 11:41:32.273357
2137 11:41:32.273725
2138 11:41:32.274065
2139 11:41:32.275940 Starting depthcharge on Voema...
2140 11:41:32.276544
2141 11:41:32.277769 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2142 11:41:32.278477 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2143 11:41:32.279004 Setting prompt string to ['volteer:']
2144 11:41:32.279475 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2145 11:41:32.286030 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2146 11:41:32.286603
2147 11:41:32.292929 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2148 11:41:32.293492
2149 11:41:32.295761 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2150 11:41:32.299768
2151 11:41:32.302300 Failed to find eMMC card reader
2152 11:41:32.302860
2153 11:41:32.303227 Wipe memory regions:
2154 11:41:32.303569
2155 11:41:32.309529 [0x00000000001000, 0x000000000a0000)
2156 11:41:32.310093
2157 11:41:32.312657 [0x00000000100000, 0x00000030000000)
2158 11:41:32.337343
2159 11:41:32.341058 [0x00000032662db0, 0x000000769ef000)
2160 11:41:32.376469
2161 11:41:32.380019 [0x00000100000000, 0x00000280400000)
2162 11:41:32.580951
2163 11:41:32.584040 ec_init: CrosEC protocol v3 supported (256, 256)
2164 11:41:32.584601
2165 11:41:32.590063 update_port_state: port C0 state: usb enable 1 mux conn 0
2166 11:41:32.590634
2167 11:41:32.600651 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2168 11:41:32.601217
2169 11:41:32.606710 pmc_check_ipc_sts: STS_BUSY done after 2537 us
2170 11:41:32.607275
2171 11:41:32.609600 send_conn_disc_msg: pmc_send_cmd succeeded
2172 11:41:33.040782
2173 11:41:33.041348 R8152: Initializing
2174 11:41:33.041723
2175 11:41:33.044543 Version 6 (ocp_data = 5c30)
2176 11:41:33.045143
2177 11:41:33.047614 R8152: Done initializing
2178 11:41:33.048225
2179 11:41:33.050243 Adding net device
2180 11:41:33.351556
2181 11:41:33.355236 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2182 11:41:33.355800
2183 11:41:33.356221
2184 11:41:33.356575
2185 11:41:33.358544 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2187 11:41:33.460622 volteer: tftpboot 192.168.201.1 9849735/tftp-deploy-xy52m5zc/kernel/bzImage 9849735/tftp-deploy-xy52m5zc/kernel/cmdline 9849735/tftp-deploy-xy52m5zc/ramdisk/ramdisk.cpio.gz
2188 11:41:33.461308 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2189 11:41:33.461848 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2190 11:41:33.466359 tftpboot 192.168.201.1 9849735/tftp-deploy-xy52m5zc/kernel/bzImaoy-xy52m5zc/kernel/cmdline 9849735/tftp-deploy-xy52m5zc/ramdisk/ramdisk.cpio.gz
2191 11:41:33.466944
2192 11:41:33.467313 Waiting for link
2193 11:41:33.669427
2194 11:41:33.669981 done.
2195 11:41:33.670356
2196 11:41:33.670910 MAC: 00:24:32:30:7e:47
2197 11:41:33.671659
2198 11:41:33.672798 Sending DHCP discover... done.
2199 11:41:33.673212
2200 11:41:33.676301 Waiting for reply... done.
2201 11:41:33.677141
2202 11:41:33.679725 Sending DHCP request... done.
2203 11:41:33.680235
2204 11:41:33.682394 Waiting for reply... done.
2205 11:41:33.682962
2206 11:41:33.685616 My ip is 192.168.201.19
2207 11:41:33.686144
2208 11:41:33.689011 The DHCP server ip is 192.168.201.1
2209 11:41:33.689478
2210 11:41:33.692241 TFTP server IP predefined by user: 192.168.201.1
2211 11:41:33.692742
2212 11:41:33.699432 Bootfile predefined by user: 9849735/tftp-deploy-xy52m5zc/kernel/bzImage
2213 11:41:33.700048
2214 11:41:33.702987 Sending tftp read request... done.
2215 11:41:33.703733
2216 11:41:33.712354 Waiting for the transfer...
2217 11:41:33.712954
2218 11:41:34.386696 00000000 ################################################################
2219 11:41:34.387216
2220 11:41:35.076550 00080000 ################################################################
2221 11:41:35.077174
2222 11:41:35.788790 00100000 ################################################################
2223 11:41:35.789323
2224 11:41:36.473096 00180000 ################################################################
2225 11:41:36.473632
2226 11:41:37.164379 00200000 ################################################################
2227 11:41:37.164929
2228 11:41:37.857484 00280000 ################################################################
2229 11:41:37.858047
2230 11:41:38.536694 00300000 ################################################################
2231 11:41:38.537279
2232 11:41:39.206463 00380000 ################################################################
2233 11:41:39.206989
2234 11:41:39.894577 00400000 ################################################################
2235 11:41:39.895111
2236 11:41:40.603581 00480000 ################################################################
2237 11:41:40.604247
2238 11:41:41.307492 00500000 ################################################################
2239 11:41:41.308185
2240 11:41:41.997438 00580000 ################################################################
2241 11:41:41.997965
2242 11:41:42.692036 00600000 ################################################################
2243 11:41:42.692602
2244 11:41:43.387929 00680000 ################################################################
2245 11:41:43.388508
2246 11:41:44.079458 00700000 ################################################################
2247 11:41:44.080022
2248 11:41:44.101924 00780000 ## done.
2249 11:41:44.102358
2250 11:41:44.104057 The bootfile was 7880592 bytes long.
2251 11:41:44.104493
2252 11:41:44.108059 Sending tftp read request... done.
2253 11:41:44.108488
2254 11:41:44.110836 Waiting for the transfer...
2255 11:41:44.111263
2256 11:41:44.823292 00000000 ################################################################
2257 11:41:44.823826
2258 11:41:45.506987 00080000 ################################################################
2259 11:41:45.507157
2260 11:41:46.200172 00100000 ################################################################
2261 11:41:46.200702
2262 11:41:46.882167 00180000 ################################################################
2263 11:41:46.882322
2264 11:41:47.533216 00200000 ################################################################
2265 11:41:47.533764
2266 11:41:48.224980 00280000 ################################################################
2267 11:41:48.225498
2268 11:41:48.923656 00300000 ################################################################
2269 11:41:48.924245
2270 11:41:49.623858 00380000 ################################################################
2271 11:41:49.624452
2272 11:41:50.314297 00400000 ################################################################
2273 11:41:50.314882
2274 11:41:51.003026 00480000 ################################################################
2275 11:41:51.003548
2276 11:41:51.680530 00500000 ################################################################
2277 11:41:51.681045
2278 11:41:52.359905 00580000 ################################################################
2279 11:41:52.360460
2280 11:41:52.574318 00600000 ##################### done.
2281 11:41:52.574816
2282 11:41:52.577413 Sending tftp read request... done.
2283 11:41:52.577833
2284 11:41:52.580646 Waiting for the transfer...
2285 11:41:52.581058
2286 11:41:52.581383 00000000 # done.
2287 11:41:52.581695
2288 11:41:52.590339 Command line loaded dynamically from TFTP file: 9849735/tftp-deploy-xy52m5zc/kernel/cmdline
2289 11:41:52.590770
2290 11:41:52.610075 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9849735/extract-nfsrootfs-rg36f5jz,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2291 11:41:52.613711
2292 11:41:52.617467 Shutting down all USB controllers.
2293 11:41:52.617998
2294 11:41:52.618339 Removing current net device
2295 11:41:52.618684
2296 11:41:52.620656 Finalizing coreboot
2297 11:41:52.621081
2298 11:41:52.626943 Exiting depthcharge with code 4 at timestamp: 29035900
2299 11:41:52.627473
2300 11:41:52.627813
2301 11:41:52.628166 Starting kernel ...
2302 11:41:52.628470
2303 11:41:52.628761
2304 11:41:52.629889 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2305 11:41:52.630370 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2306 11:41:52.630756 Setting prompt string to ['Linux version [0-9]']
2307 11:41:52.631100 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2308 11:41:52.631444 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2310 11:46:16.631399 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2312 11:46:16.632574 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2314 11:46:16.633455 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2317 11:46:16.634876 end: 2 depthcharge-action (duration 00:05:00) [common]
2319 11:46:16.636055 Cleaning after the job
2320 11:46:16.636453 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849735/tftp-deploy-xy52m5zc/ramdisk
2321 11:46:16.637112 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849735/tftp-deploy-xy52m5zc/kernel
2322 11:46:16.637790 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849735/tftp-deploy-xy52m5zc/nfsrootfs
2323 11:46:16.688143 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849735/tftp-deploy-xy52m5zc/modules
2324 11:46:16.688518 start: 4.1 power-off (timeout 00:00:30) [common]
2325 11:46:16.688687 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=off'
2326 11:46:16.766148 >> Command sent successfully.
2327 11:46:16.770687 Returned 0 in 0 seconds
2328 11:46:16.872193 end: 4.1 power-off (duration 00:00:00) [common]
2330 11:46:16.873711 start: 4.2 read-feedback (timeout 00:10:00) [common]
2331 11:46:16.874959 Listened to connection for namespace 'common' for up to 1s
2332 11:46:17.876265 Finalising connection for namespace 'common'
2333 11:46:17.876961 Disconnecting from shell: Finalise
2334 11:46:17.877406
2335 11:46:17.978836 end: 4.2 read-feedback (duration 00:00:01) [common]
2336 11:46:17.979505 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9849735
2337 11:46:18.182148 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9849735
2338 11:46:18.182342 JobError: Your job cannot terminate cleanly.