Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 11:46:23.814736 lava-dispatcher, installed at version: 2023.01
2 11:46:23.814937 start: 0 validate
3 11:46:23.815063 Start time: 2023-04-03 11:46:23.815055+00:00 (UTC)
4 11:46:23.815177 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:46:23.815297 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230324.0%2Famd64%2Finitrd.cpio.gz exists
6 11:46:24.109236 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:46:24.110138 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1098-g8d34bf42efd9b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:46:24.406152 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:46:24.406932 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230324.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:46:24.701811 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:46:24.702584 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1098-g8d34bf42efd9b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 11:46:25.002482 validate duration: 1.19
14 11:46:25.002742 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:46:25.002841 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:46:25.002925 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:46:25.003024 Not decompressing ramdisk as can be used compressed.
18 11:46:25.003102 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230324.0/amd64/initrd.cpio.gz
19 11:46:25.003165 saving as /var/lib/lava/dispatcher/tmp/9849724/tftp-deploy-wesinwtl/ramdisk/initrd.cpio.gz
20 11:46:25.003225 total size: 5432086 (5MB)
21 11:46:25.004242 progress 0% (0MB)
22 11:46:25.005773 progress 5% (0MB)
23 11:46:25.007060 progress 10% (0MB)
24 11:46:25.008345 progress 15% (0MB)
25 11:46:25.009842 progress 20% (1MB)
26 11:46:25.011131 progress 25% (1MB)
27 11:46:25.012441 progress 30% (1MB)
28 11:46:25.013860 progress 35% (1MB)
29 11:46:25.015116 progress 40% (2MB)
30 11:46:25.016373 progress 45% (2MB)
31 11:46:25.017670 progress 50% (2MB)
32 11:46:25.019069 progress 55% (2MB)
33 11:46:25.020328 progress 60% (3MB)
34 11:46:25.021628 progress 65% (3MB)
35 11:46:25.023031 progress 70% (3MB)
36 11:46:25.024283 progress 75% (3MB)
37 11:46:25.025571 progress 80% (4MB)
38 11:46:25.026824 progress 85% (4MB)
39 11:46:25.028216 progress 90% (4MB)
40 11:46:25.029464 progress 95% (4MB)
41 11:46:25.030736 progress 100% (5MB)
42 11:46:25.030926 5MB downloaded in 0.03s (187.03MB/s)
43 11:46:25.031058 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:46:25.031292 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:46:25.031375 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:46:25.031457 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:46:25.031555 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1098-g8d34bf42efd9b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 11:46:25.031622 saving as /var/lib/lava/dispatcher/tmp/9849724/tftp-deploy-wesinwtl/kernel/bzImage
50 11:46:25.031682 total size: 7880592 (7MB)
51 11:46:25.031741 No compression specified
52 11:46:25.032741 progress 0% (0MB)
53 11:46:25.034745 progress 5% (0MB)
54 11:46:25.036632 progress 10% (0MB)
55 11:46:25.038550 progress 15% (1MB)
56 11:46:25.040441 progress 20% (1MB)
57 11:46:25.042364 progress 25% (1MB)
58 11:46:25.044249 progress 30% (2MB)
59 11:46:25.046167 progress 35% (2MB)
60 11:46:25.048050 progress 40% (3MB)
61 11:46:25.050044 progress 45% (3MB)
62 11:46:25.052001 progress 50% (3MB)
63 11:46:25.053929 progress 55% (4MB)
64 11:46:25.055777 progress 60% (4MB)
65 11:46:25.057678 progress 65% (4MB)
66 11:46:25.059525 progress 70% (5MB)
67 11:46:25.061366 progress 75% (5MB)
68 11:46:25.063261 progress 80% (6MB)
69 11:46:25.065106 progress 85% (6MB)
70 11:46:25.066996 progress 90% (6MB)
71 11:46:25.068844 progress 95% (7MB)
72 11:46:25.070749 progress 100% (7MB)
73 11:46:25.070904 7MB downloaded in 0.04s (191.63MB/s)
74 11:46:25.071039 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:46:25.071264 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:46:25.071348 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:46:25.071431 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:46:25.071536 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230324.0/amd64/full.rootfs.tar.xz
80 11:46:25.071602 saving as /var/lib/lava/dispatcher/tmp/9849724/tftp-deploy-wesinwtl/nfsrootfs/full.rootfs.tar
81 11:46:25.071662 total size: 207168076 (197MB)
82 11:46:25.071721 Using unxz to decompress xz
83 11:46:25.075385 progress 0% (0MB)
84 11:46:25.599168 progress 5% (9MB)
85 11:46:26.100587 progress 10% (19MB)
86 11:46:26.671307 progress 15% (29MB)
87 11:46:27.021363 progress 20% (39MB)
88 11:46:27.361151 progress 25% (49MB)
89 11:46:27.933527 progress 30% (59MB)
90 11:46:28.459068 progress 35% (69MB)
91 11:46:29.035512 progress 40% (79MB)
92 11:46:29.567588 progress 45% (88MB)
93 11:46:30.126363 progress 50% (98MB)
94 11:46:30.729868 progress 55% (108MB)
95 11:46:31.384466 progress 60% (118MB)
96 11:46:31.524095 progress 65% (128MB)
97 11:46:31.660929 progress 70% (138MB)
98 11:46:31.754602 progress 75% (148MB)
99 11:46:31.825796 progress 80% (158MB)
100 11:46:31.893196 progress 85% (167MB)
101 11:46:31.990853 progress 90% (177MB)
102 11:46:32.248410 progress 95% (187MB)
103 11:46:32.804189 progress 100% (197MB)
104 11:46:32.809105 197MB downloaded in 7.74s (25.53MB/s)
105 11:46:32.809398 end: 1.3.1 http-download (duration 00:00:08) [common]
107 11:46:32.809713 end: 1.3 download-retry (duration 00:00:08) [common]
108 11:46:32.809869 start: 1.4 download-retry (timeout 00:09:52) [common]
109 11:46:32.809968 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 11:46:32.810087 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1098-g8d34bf42efd9b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 11:46:32.810157 saving as /var/lib/lava/dispatcher/tmp/9849724/tftp-deploy-wesinwtl/modules/modules.tar
112 11:46:32.810219 total size: 251104 (0MB)
113 11:46:32.810282 Using unxz to decompress xz
114 11:46:32.813802 progress 13% (0MB)
115 11:46:32.814183 progress 26% (0MB)
116 11:46:32.814416 progress 39% (0MB)
117 11:46:32.815700 progress 52% (0MB)
118 11:46:32.817609 progress 65% (0MB)
119 11:46:32.819340 progress 78% (0MB)
120 11:46:32.821166 progress 91% (0MB)
121 11:46:32.822983 progress 100% (0MB)
122 11:46:32.828197 0MB downloaded in 0.02s (13.33MB/s)
123 11:46:32.828455 end: 1.4.1 http-download (duration 00:00:00) [common]
125 11:46:32.828712 end: 1.4 download-retry (duration 00:00:00) [common]
126 11:46:32.828807 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 11:46:32.828906 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 11:46:34.727853 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9849724/extract-nfsrootfs-kte8e1zo
129 11:46:34.728057 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 11:46:34.728159 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 11:46:34.728298 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_
132 11:46:34.728402 makedir: /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin
133 11:46:34.728487 makedir: /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/tests
134 11:46:34.728566 makedir: /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/results
135 11:46:34.728664 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-add-keys
136 11:46:34.728834 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-add-sources
137 11:46:34.729018 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-background-process-start
138 11:46:34.729127 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-background-process-stop
139 11:46:34.729235 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-common-functions
140 11:46:34.729340 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-echo-ipv4
141 11:46:34.729447 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-install-packages
142 11:46:34.729601 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-installed-packages
143 11:46:34.729707 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-os-build
144 11:46:34.729814 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-probe-channel
145 11:46:34.729919 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-probe-ip
146 11:46:34.730024 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-target-ip
147 11:46:34.730129 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-target-mac
148 11:46:34.730233 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-target-storage
149 11:46:34.730339 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-test-case
150 11:46:34.730445 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-test-event
151 11:46:34.730548 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-test-feedback
152 11:46:34.730651 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-test-raise
153 11:46:34.730754 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-test-reference
154 11:46:34.730860 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-test-runner
155 11:46:34.730966 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-test-set
156 11:46:34.731070 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-test-shell
157 11:46:34.731176 Updating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-add-keys (debian)
158 11:46:34.731284 Updating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-add-sources (debian)
159 11:46:34.731392 Updating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-install-packages (debian)
160 11:46:34.731499 Updating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-installed-packages (debian)
161 11:46:34.731606 Updating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/bin/lava-os-build (debian)
162 11:46:34.731698 Creating /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/environment
163 11:46:34.731781 LAVA metadata
164 11:46:34.731847 - LAVA_JOB_ID=9849724
165 11:46:34.731908 - LAVA_DISPATCHER_IP=192.168.201.1
166 11:46:34.732002 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
167 11:46:34.732066 skipped lava-vland-overlay
168 11:46:34.732137 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 11:46:34.732215 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
170 11:46:34.732273 skipped lava-multinode-overlay
171 11:46:34.732343 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 11:46:34.732418 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
173 11:46:34.732488 Loading test definitions
174 11:46:34.732572 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
175 11:46:34.732641 Using /lava-9849724 at stage 0
176 11:46:34.732856 uuid=9849724_1.5.2.3.1 testdef=None
177 11:46:34.732941 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 11:46:34.733023 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
179 11:46:34.733424 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 11:46:34.733794 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
182 11:46:34.734252 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 11:46:34.734475 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
185 11:46:34.734908 runner path: /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/0/tests/0_timesync-off test_uuid 9849724_1.5.2.3.1
186 11:46:34.735045 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 11:46:34.735262 start: 1.5.2.3.5 git-repo-action (timeout 00:09:50) [common]
189 11:46:34.735333 Using /lava-9849724 at stage 0
190 11:46:34.735428 Fetching tests from https://github.com/kernelci/test-definitions.git
191 11:46:34.735504 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/0/tests/1_kselftest-futex'
192 11:46:48.993742 Running '/usr/bin/git checkout kernelci.org
193 11:46:49.135665 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
194 11:46:49.136368 uuid=9849724_1.5.2.3.5 testdef=None
195 11:46:49.136516 end: 1.5.2.3.5 git-repo-action (duration 00:00:14) [common]
197 11:46:49.136760 start: 1.5.2.3.6 test-overlay (timeout 00:09:36) [common]
198 11:46:49.137441 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 11:46:49.137724 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:36) [common]
201 11:46:49.138579 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 11:46:49.138815 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:36) [common]
204 11:46:49.139643 runner path: /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/0/tests/1_kselftest-futex test_uuid 9849724_1.5.2.3.5
205 11:46:49.139733 BOARD='asus-C436FA-Flip-hatch'
206 11:46:49.139798 BRANCH='cip'
207 11:46:49.139858 SKIPFILE='skipfile-lkft.yaml'
208 11:46:49.139916 SKIP_INSTALL='True'
209 11:46:49.139975 TESTPROG_URL='None'
210 11:46:49.140032 TST_CASENAME=''
211 11:46:49.140088 TST_CMDFILES='futex'
212 11:46:49.140213 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 11:46:49.140416 Creating lava-test-runner.conf files
215 11:46:49.140480 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9849724/lava-overlay-t_lzb1g_/lava-9849724/0 for stage 0
216 11:46:49.140562 - 0_timesync-off
217 11:46:49.140628 - 1_kselftest-futex
218 11:46:49.140720 end: 1.5.2.3 test-definition (duration 00:00:14) [common]
219 11:46:49.140807 start: 1.5.2.4 compress-overlay (timeout 00:09:36) [common]
220 11:46:56.474852 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
221 11:46:56.475014 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:29) [common]
222 11:46:56.475106 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 11:46:56.475212 end: 1.5.2 lava-overlay (duration 00:00:22) [common]
224 11:46:56.475304 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:29) [common]
225 11:46:56.586218 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 11:46:56.586600 start: 1.5.4 extract-modules (timeout 00:09:28) [common]
227 11:46:56.586715 extracting modules file /var/lib/lava/dispatcher/tmp/9849724/tftp-deploy-wesinwtl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9849724/extract-nfsrootfs-kte8e1zo
228 11:46:56.593763 extracting modules file /var/lib/lava/dispatcher/tmp/9849724/tftp-deploy-wesinwtl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9849724/extract-overlay-ramdisk-zzdiwiop/ramdisk
229 11:46:56.600484 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 11:46:56.600596 start: 1.5.5 apply-overlay-tftp (timeout 00:09:28) [common]
231 11:46:56.600684 [common] Applying overlay to NFS
232 11:46:56.600757 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9849724/compress-overlay-wf9gqab2/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9849724/extract-nfsrootfs-kte8e1zo
233 11:46:57.397294 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 11:46:57.397471 start: 1.5.6 configure-preseed-file (timeout 00:09:28) [common]
235 11:46:57.397607 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 11:46:57.397704 start: 1.5.7 compress-ramdisk (timeout 00:09:28) [common]
237 11:46:57.397786 Building ramdisk /var/lib/lava/dispatcher/tmp/9849724/extract-overlay-ramdisk-zzdiwiop/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9849724/extract-overlay-ramdisk-zzdiwiop/ramdisk
238 11:46:57.443714 >> 26158 blocks
239 11:46:57.980798 rename /var/lib/lava/dispatcher/tmp/9849724/extract-overlay-ramdisk-zzdiwiop/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9849724/tftp-deploy-wesinwtl/ramdisk/ramdisk.cpio.gz
240 11:46:57.981220 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 11:46:57.981371 start: 1.5.8 prepare-kernel (timeout 00:09:27) [common]
242 11:46:57.981497 start: 1.5.8.1 prepare-fit (timeout 00:09:27) [common]
243 11:46:57.981619 No mkimage arch provided, not using FIT.
244 11:46:57.981709 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 11:46:57.981794 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 11:46:57.981902 end: 1.5 prepare-tftp-overlay (duration 00:00:25) [common]
247 11:46:57.981997 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:27) [common]
248 11:46:57.982079 No LXC device requested
249 11:46:57.982162 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 11:46:57.982257 start: 1.7 deploy-device-env (timeout 00:09:27) [common]
251 11:46:57.982342 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 11:46:57.982416 Checking files for TFTP limit of 4294967296 bytes.
253 11:46:57.982816 end: 1 tftp-deploy (duration 00:00:33) [common]
254 11:46:57.982922 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 11:46:57.983016 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 11:46:57.983138 substitutions:
257 11:46:57.983205 - {DTB}: None
258 11:46:57.983295 - {INITRD}: 9849724/tftp-deploy-wesinwtl/ramdisk/ramdisk.cpio.gz
259 11:46:57.983391 - {KERNEL}: 9849724/tftp-deploy-wesinwtl/kernel/bzImage
260 11:46:57.983481 - {LAVA_MAC}: None
261 11:46:57.983549 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9849724/extract-nfsrootfs-kte8e1zo
262 11:46:57.983613 - {NFS_SERVER_IP}: 192.168.201.1
263 11:46:57.983672 - {PRESEED_CONFIG}: None
264 11:46:57.983731 - {PRESEED_LOCAL}: None
265 11:46:57.983787 - {RAMDISK}: 9849724/tftp-deploy-wesinwtl/ramdisk/ramdisk.cpio.gz
266 11:46:57.983844 - {ROOT_PART}: None
267 11:46:57.983900 - {ROOT}: None
268 11:46:57.983956 - {SERVER_IP}: 192.168.201.1
269 11:46:57.984012 - {TEE}: None
270 11:46:57.984068 Parsed boot commands:
271 11:46:57.984123 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 11:46:57.984299 Parsed boot commands: tftpboot 192.168.201.1 9849724/tftp-deploy-wesinwtl/kernel/bzImage 9849724/tftp-deploy-wesinwtl/kernel/cmdline 9849724/tftp-deploy-wesinwtl/ramdisk/ramdisk.cpio.gz
273 11:46:57.984401 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 11:46:57.984487 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 11:46:57.984580 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 11:46:57.984666 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 11:46:57.984736 Not connected, no need to disconnect.
278 11:46:57.984812 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 11:46:57.984891 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 11:46:57.984959 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
281 11:46:57.988504 Setting prompt string to ['lava-test: # ']
282 11:46:57.988853 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 11:46:57.988973 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 11:46:57.989104 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 11:46:57.989224 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 11:46:57.989445 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
287 11:47:03.140284 >> Command sent successfully.
288 11:47:03.146296 Returned 0 in 5 seconds
289 11:47:03.247483 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 11:47:03.249131 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 11:47:03.249789 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 11:47:03.250309 Setting prompt string to 'Starting depthcharge on Helios...'
294 11:47:03.250707 Changing prompt to 'Starting depthcharge on Helios...'
295 11:47:03.251109 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
296 11:47:03.252499 [Enter `^Ec?' for help]
297 11:47:03.864578
298 11:47:03.865225
299 11:47:03.873961 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 11:47:03.877730 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 11:47:03.883751 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 11:47:03.887309 CPU: AES supported, TXT NOT supported, VT supported
303 11:47:03.894111 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 11:47:03.897092 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 11:47:03.904363 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 11:47:03.907276 VBOOT: Loading verstage.
307 11:47:03.910525 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 11:47:03.917519 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 11:47:03.920865 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 11:47:03.923858 CBFS @ c08000 size 3f8000
311 11:47:03.930086 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 11:47:03.934124 CBFS: Locating 'fallback/verstage'
313 11:47:03.937282 CBFS: Found @ offset 10fb80 size 1072c
314 11:47:03.940552
315 11:47:03.941031
316 11:47:03.950132 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 11:47:03.964827 Probing TPM: . done!
318 11:47:03.968305 TPM ready after 0 ms
319 11:47:03.971231 Connected to device vid:did:rid of 1ae0:0028:00
320 11:47:03.981592 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
321 11:47:03.985203 Initialized TPM device CR50 revision 0
322 11:47:04.028243 tlcl_send_startup: Startup return code is 0
323 11:47:04.028825 TPM: setup succeeded
324 11:47:04.041738 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 11:47:04.045515 Chrome EC: UHEPI supported
326 11:47:04.048173 Phase 1
327 11:47:04.051840 FMAP: area GBB found @ c05000 (12288 bytes)
328 11:47:04.059335 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
329 11:47:04.061358 Phase 2
330 11:47:04.061876 Phase 3
331 11:47:04.065072 FMAP: area GBB found @ c05000 (12288 bytes)
332 11:47:04.071740 VB2:vb2_report_dev_firmware() This is developer signed firmware
333 11:47:04.078469 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
334 11:47:04.081690 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
335 11:47:04.088872 VB2:vb2_verify_keyblock() Checking keyblock signature...
336 11:47:04.104140 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
337 11:47:04.107684 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
338 11:47:04.113877 VB2:vb2_verify_fw_preamble() Verifying preamble.
339 11:47:04.118211 Phase 4
340 11:47:04.121531 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
341 11:47:04.128086 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
342 11:47:04.307700 VB2:vb2_rsa_verify_digest() Digest check failed!
343 11:47:04.314333 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
344 11:47:04.314937 Saving nvdata
345 11:47:04.317565 Reboot requested (10020007)
346 11:47:04.320883 board_reset() called!
347 11:47:04.321514 full_reset() called!
348 11:47:08.830600
349 11:47:08.831179
350 11:47:08.840577 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
351 11:47:08.844023 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
352 11:47:08.850586 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
353 11:47:08.854107 CPU: AES supported, TXT NOT supported, VT supported
354 11:47:08.860549 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
355 11:47:08.863849 PCH: device id 0284 (rev 00) is Cometlake-U Premium
356 11:47:08.870638 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
357 11:47:08.874056 VBOOT: Loading verstage.
358 11:47:08.877233 FMAP: Found "FLASH" version 1.1 at 0xc04000.
359 11:47:08.884495 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
360 11:47:08.887439 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 11:47:08.890626 CBFS @ c08000 size 3f8000
362 11:47:08.897358 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 11:47:08.899966 CBFS: Locating 'fallback/verstage'
364 11:47:08.903659 CBFS: Found @ offset 10fb80 size 1072c
365 11:47:08.907458
366 11:47:08.908024
367 11:47:08.917130 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
368 11:47:08.932130 Probing TPM: . done!
369 11:47:08.935340 TPM ready after 0 ms
370 11:47:08.938539 Connected to device vid:did:rid of 1ae0:0028:00
371 11:47:08.948474 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
372 11:47:08.952358 Initialized TPM device CR50 revision 0
373 11:47:08.995773 tlcl_send_startup: Startup return code is 0
374 11:47:08.996357 TPM: setup succeeded
375 11:47:09.008482 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
376 11:47:09.012362 Chrome EC: UHEPI supported
377 11:47:09.015848 Phase 1
378 11:47:09.018562 FMAP: area GBB found @ c05000 (12288 bytes)
379 11:47:09.025403 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
380 11:47:09.032433 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
381 11:47:09.035321 Recovery requested (1009000e)
382 11:47:09.041293 Saving nvdata
383 11:47:09.047196 tlcl_extend: response is 0
384 11:47:09.056914 tlcl_extend: response is 0
385 11:47:09.063007 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 11:47:09.066830 CBFS @ c08000 size 3f8000
387 11:47:09.073249 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 11:47:09.076381 CBFS: Locating 'fallback/romstage'
389 11:47:09.080191 CBFS: Found @ offset 80 size 145fc
390 11:47:09.083200 Accumulated console time in verstage 99 ms
391 11:47:09.083699
392 11:47:09.084081
393 11:47:09.096604 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
394 11:47:09.103369 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
395 11:47:09.106915 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
396 11:47:09.109362 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
397 11:47:09.116733 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
398 11:47:09.119406 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
399 11:47:09.123107 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
400 11:47:09.126387 TCO_STS: 0000 0000
401 11:47:09.130119 GEN_PMCON: e0015238 00000200
402 11:47:09.132874 GBLRST_CAUSE: 00000000 00000000
403 11:47:09.133443 prev_sleep_state 5
404 11:47:09.136140 Boot Count incremented to 58820
405 11:47:09.143087 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
406 11:47:09.146258 CBFS @ c08000 size 3f8000
407 11:47:09.153266 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
408 11:47:09.153916 CBFS: Locating 'fspm.bin'
409 11:47:09.159640 CBFS: Found @ offset 5ffc0 size 71000
410 11:47:09.162584 Chrome EC: UHEPI supported
411 11:47:09.169134 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
412 11:47:09.172896 Probing TPM: done!
413 11:47:09.179725 Connected to device vid:did:rid of 1ae0:0028:00
414 11:47:09.189585 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
415 11:47:09.195629 Initialized TPM device CR50 revision 0
416 11:47:09.204365 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 11:47:09.211361 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
418 11:47:09.214275 MRC cache found, size 1948
419 11:47:09.217869 bootmode is set to: 2
420 11:47:09.220936 PRMRR disabled by config.
421 11:47:09.224510 SPD INDEX = 1
422 11:47:09.228030 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 11:47:09.231090 CBFS @ c08000 size 3f8000
424 11:47:09.237511 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 11:47:09.238109 CBFS: Locating 'spd.bin'
426 11:47:09.240866 CBFS: Found @ offset 5fb80 size 400
427 11:47:09.244287 SPD: module type is LPDDR3
428 11:47:09.247245 SPD: module part is
429 11:47:09.254176 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
430 11:47:09.257090 SPD: device width 4 bits, bus width 8 bits
431 11:47:09.260674 SPD: module size is 4096 MB (per channel)
432 11:47:09.264247 memory slot: 0 configuration done.
433 11:47:09.267314 memory slot: 2 configuration done.
434 11:47:09.319380 CBMEM:
435 11:47:09.322704 IMD: root @ 99fff000 254 entries.
436 11:47:09.325655 IMD: root @ 99ffec00 62 entries.
437 11:47:09.328866 External stage cache:
438 11:47:09.332604 IMD: root @ 9abff000 254 entries.
439 11:47:09.335746 IMD: root @ 9abfec00 62 entries.
440 11:47:09.338807 Chrome EC: clear events_b mask to 0x0000000020004000
441 11:47:09.359509 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 11:47:09.368282 tlcl_write: response is 0
443 11:47:09.376851 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
444 11:47:09.383593 MRC: TPM MRC hash updated successfully.
445 11:47:09.384104 2 DIMMs found
446 11:47:09.387202 SMM Memory Map
447 11:47:09.390724 SMRAM : 0x9a000000 0x1000000
448 11:47:09.394060 Subregion 0: 0x9a000000 0xa00000
449 11:47:09.397218 Subregion 1: 0x9aa00000 0x200000
450 11:47:09.400429 Subregion 2: 0x9ac00000 0x400000
451 11:47:09.403938 top_of_ram = 0x9a000000
452 11:47:09.407094 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
453 11:47:09.413816 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
454 11:47:09.417006 MTRR Range: Start=ff000000 End=0 (Size 1000000)
455 11:47:09.423551 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
456 11:47:09.426836 CBFS @ c08000 size 3f8000
457 11:47:09.430110 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
458 11:47:09.433149 CBFS: Locating 'fallback/postcar'
459 11:47:09.440582 CBFS: Found @ offset 107000 size 4b44
460 11:47:09.443874 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
461 11:47:09.456389 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
462 11:47:09.459461 Processing 180 relocs. Offset value of 0x97c0c000
463 11:47:09.468015 Accumulated console time in romstage 286 ms
464 11:47:09.468611
465 11:47:09.468996
466 11:47:09.477810 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
467 11:47:09.485048 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
468 11:47:09.487805 CBFS @ c08000 size 3f8000
469 11:47:09.494332 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
470 11:47:09.497898 CBFS: Locating 'fallback/ramstage'
471 11:47:09.501103 CBFS: Found @ offset 43380 size 1b9e8
472 11:47:09.507976 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
473 11:47:09.540429 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
474 11:47:09.543288 Processing 3976 relocs. Offset value of 0x98db0000
475 11:47:09.549658 Accumulated console time in postcar 52 ms
476 11:47:09.550245
477 11:47:09.550634
478 11:47:09.559616 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
479 11:47:09.566611 FMAP: area RO_VPD found @ c00000 (16384 bytes)
480 11:47:09.570033 WARNING: RO_VPD is uninitialized or empty.
481 11:47:09.573690 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 11:47:09.579776 FMAP: area RW_VPD found @ af8000 (8192 bytes)
483 11:47:09.580364 Normal boot.
484 11:47:09.586328 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
485 11:47:09.589637 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 11:47:09.593066 CBFS @ c08000 size 3f8000
487 11:47:09.599535 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 11:47:09.602833 CBFS: Locating 'cpu_microcode_blob.bin'
489 11:47:09.606419 CBFS: Found @ offset 14700 size 2ec00
490 11:47:09.609331 microcode: sig=0x806ec pf=0x4 revision=0xc9
491 11:47:09.612610 Skip microcode update
492 11:47:09.619249 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 11:47:09.619913 CBFS @ c08000 size 3f8000
494 11:47:09.626008 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 11:47:09.630035 CBFS: Locating 'fsps.bin'
496 11:47:09.632462 CBFS: Found @ offset d1fc0 size 35000
497 11:47:09.658093 Detected 4 core, 8 thread CPU.
498 11:47:09.661048 Setting up SMI for CPU
499 11:47:09.664825 IED base = 0x9ac00000
500 11:47:09.665416 IED size = 0x00400000
501 11:47:09.668005 Will perform SMM setup.
502 11:47:09.674346 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
503 11:47:09.681099 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
504 11:47:09.684531 Processing 16 relocs. Offset value of 0x00030000
505 11:47:09.688275 Attempting to start 7 APs
506 11:47:09.691222 Waiting for 10ms after sending INIT.
507 11:47:09.707740 Waiting for 1st SIPI to complete...done.
508 11:47:09.708344 AP: slot 5 apic_id 6.
509 11:47:09.710943 AP: slot 2 apic_id 7.
510 11:47:09.714363 AP: slot 6 apic_id 5.
511 11:47:09.714958 AP: slot 7 apic_id 4.
512 11:47:09.717835 AP: slot 3 apic_id 1.
513 11:47:09.721028 Waiting for 2nd SIPI to complete...done.
514 11:47:09.724185 AP: slot 4 apic_id 3.
515 11:47:09.727617 AP: slot 1 apic_id 2.
516 11:47:09.734104 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 11:47:09.740967 Processing 13 relocs. Offset value of 0x00038000
518 11:47:09.744122 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 11:47:09.750667 Installing SMM handler to 0x9a000000
520 11:47:09.757336 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 11:47:09.760588 Processing 658 relocs. Offset value of 0x9a010000
522 11:47:09.771009 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 11:47:09.774155 Processing 13 relocs. Offset value of 0x9a008000
524 11:47:09.780914 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 11:47:09.787356 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 11:47:09.790790 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 11:47:09.797717 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 11:47:09.804161 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 11:47:09.810692 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 11:47:09.813901 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 11:47:09.820408 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 11:47:09.823954 Clearing SMI status registers
533 11:47:09.827109 SMI_STS: PM1
534 11:47:09.827591 PM1_STS: PWRBTN
535 11:47:09.830217 TCO_STS: SECOND_TO
536 11:47:09.833671 New SMBASE 0x9a000000
537 11:47:09.837826 In relocation handler: CPU 0
538 11:47:09.840493 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 11:47:09.844038 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 11:47:09.847078 Relocation complete.
541 11:47:09.850146 New SMBASE 0x99fff400
542 11:47:09.850637 In relocation handler: CPU 3
543 11:47:09.857026 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
544 11:47:09.860384 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 11:47:09.863728 Relocation complete.
546 11:47:09.867114 New SMBASE 0x99ffe400
547 11:47:09.867601 In relocation handler: CPU 7
548 11:47:09.873928 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
549 11:47:09.877400 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 11:47:09.880160 Relocation complete.
551 11:47:09.880749 New SMBASE 0x99ffe800
552 11:47:09.883813 In relocation handler: CPU 6
553 11:47:09.890281 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
554 11:47:09.893590 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 11:47:09.897622 Relocation complete.
556 11:47:09.898221 New SMBASE 0x99fff800
557 11:47:09.900031 In relocation handler: CPU 2
558 11:47:09.906945 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
559 11:47:09.910143 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 11:47:09.913650 Relocation complete.
561 11:47:09.914229 New SMBASE 0x99ffec00
562 11:47:09.917052 In relocation handler: CPU 5
563 11:47:09.919912 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
564 11:47:09.926955 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 11:47:09.929703 Relocation complete.
566 11:47:09.930190 New SMBASE 0x99fff000
567 11:47:09.933606 In relocation handler: CPU 4
568 11:47:09.936473 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
569 11:47:09.943433 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 11:47:09.946557 Relocation complete.
571 11:47:09.947142 New SMBASE 0x99fffc00
572 11:47:09.949848 In relocation handler: CPU 1
573 11:47:09.953193 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
574 11:47:09.959565 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 11:47:09.960181 Relocation complete.
576 11:47:09.963316 Initializing CPU #0
577 11:47:09.966667 CPU: vendor Intel device 806ec
578 11:47:09.970209 CPU: family 06, model 8e, stepping 0c
579 11:47:09.973403 Clearing out pending MCEs
580 11:47:09.976550 Setting up local APIC...
581 11:47:09.977143 apic_id: 0x00 done.
582 11:47:09.979698 Turbo is available but hidden
583 11:47:09.983243 Turbo is available and visible
584 11:47:09.986612 VMX status: enabled
585 11:47:09.990040 IA32_FEATURE_CONTROL status: locked
586 11:47:09.992929 Skip microcode update
587 11:47:09.993405 CPU #0 initialized
588 11:47:09.996695 Initializing CPU #3
589 11:47:09.999522 Initializing CPU #1
590 11:47:10.000004 Initializing CPU #4
591 11:47:10.002951 CPU: vendor Intel device 806ec
592 11:47:10.006446 CPU: family 06, model 8e, stepping 0c
593 11:47:10.009662 Clearing out pending MCEs
594 11:47:10.012983 Initializing CPU #7
595 11:47:10.013606 Setting up local APIC...
596 11:47:10.016503 Initializing CPU #6
597 11:47:10.019843 CPU: vendor Intel device 806ec
598 11:47:10.023387 CPU: family 06, model 8e, stepping 0c
599 11:47:10.025981 CPU: vendor Intel device 806ec
600 11:47:10.029817 CPU: family 06, model 8e, stepping 0c
601 11:47:10.032718 Clearing out pending MCEs
602 11:47:10.036216 Clearing out pending MCEs
603 11:47:10.039498 Setting up local APIC...
604 11:47:10.040089 apic_id: 0x01 done.
605 11:47:10.042766 apic_id: 0x04 done.
606 11:47:10.046113 Setting up local APIC...
607 11:47:10.046703 Initializing CPU #2
608 11:47:10.049858 Initializing CPU #5
609 11:47:10.052678 CPU: vendor Intel device 806ec
610 11:47:10.056001 CPU: family 06, model 8e, stepping 0c
611 11:47:10.059430 CPU: vendor Intel device 806ec
612 11:47:10.063469 CPU: family 06, model 8e, stepping 0c
613 11:47:10.065769 CPU: vendor Intel device 806ec
614 11:47:10.069630 CPU: family 06, model 8e, stepping 0c
615 11:47:10.072586 Clearing out pending MCEs
616 11:47:10.076209 Clearing out pending MCEs
617 11:47:10.076692 Setting up local APIC...
618 11:47:10.079583 apic_id: 0x05 done.
619 11:47:10.082435 VMX status: enabled
620 11:47:10.083025 VMX status: enabled
621 11:47:10.085819 IA32_FEATURE_CONTROL status: locked
622 11:47:10.089519 IA32_FEATURE_CONTROL status: locked
623 11:47:10.093255 Skip microcode update
624 11:47:10.095748 Skip microcode update
625 11:47:10.096340 CPU #7 initialized
626 11:47:10.099387 CPU #6 initialized
627 11:47:10.102917 CPU: vendor Intel device 806ec
628 11:47:10.105823 CPU: family 06, model 8e, stepping 0c
629 11:47:10.109081 Clearing out pending MCEs
630 11:47:10.112435 Clearing out pending MCEs
631 11:47:10.113074 Setting up local APIC...
632 11:47:10.116069 VMX status: enabled
633 11:47:10.119227 Setting up local APIC...
634 11:47:10.122064 Setting up local APIC...
635 11:47:10.126038 IA32_FEATURE_CONTROL status: locked
636 11:47:10.126643 apic_id: 0x02 done.
637 11:47:10.128751 apic_id: 0x03 done.
638 11:47:10.132414 VMX status: enabled
639 11:47:10.133027 VMX status: enabled
640 11:47:10.135585 IA32_FEATURE_CONTROL status: locked
641 11:47:10.138820 IA32_FEATURE_CONTROL status: locked
642 11:47:10.142207 Skip microcode update
643 11:47:10.145635 Skip microcode update
644 11:47:10.146226 CPU #1 initialized
645 11:47:10.148687 CPU #4 initialized
646 11:47:10.151829 apic_id: 0x06 done.
647 11:47:10.152309 apic_id: 0x07 done.
648 11:47:10.155261 VMX status: enabled
649 11:47:10.155743 VMX status: enabled
650 11:47:10.161745 IA32_FEATURE_CONTROL status: locked
651 11:47:10.165386 IA32_FEATURE_CONTROL status: locked
652 11:47:10.166031 Skip microcode update
653 11:47:10.168482 Skip microcode update
654 11:47:10.172077 CPU #5 initialized
655 11:47:10.172662 CPU #2 initialized
656 11:47:10.175354 Skip microcode update
657 11:47:10.175941 CPU #3 initialized
658 11:47:10.182194 bsp_do_flight_plan done after 457 msecs.
659 11:47:10.185563 CPU: frequency set to 4200 MHz
660 11:47:10.186159 Enabling SMIs.
661 11:47:10.188952 Locking SMM.
662 11:47:10.202384 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
663 11:47:10.205321 CBFS @ c08000 size 3f8000
664 11:47:10.211924 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
665 11:47:10.212512 CBFS: Locating 'vbt.bin'
666 11:47:10.215485 CBFS: Found @ offset 5f5c0 size 499
667 11:47:10.221864 Found a VBT of 4608 bytes after decompression
668 11:47:10.406373 Display FSP Version Info HOB
669 11:47:10.409559 Reference Code - CPU = 9.0.1e.30
670 11:47:10.413003 uCode Version = 0.0.0.ca
671 11:47:10.416425 TXT ACM version = ff.ff.ff.ffff
672 11:47:10.419522 Display FSP Version Info HOB
673 11:47:10.422744 Reference Code - ME = 9.0.1e.30
674 11:47:10.426388 MEBx version = 0.0.0.0
675 11:47:10.429533 ME Firmware Version = Consumer SKU
676 11:47:10.433105 Display FSP Version Info HOB
677 11:47:10.435815 Reference Code - CML PCH = 9.0.1e.30
678 11:47:10.439333 PCH-CRID Status = Disabled
679 11:47:10.442513 PCH-CRID Original Value = ff.ff.ff.ffff
680 11:47:10.446158 PCH-CRID New Value = ff.ff.ff.ffff
681 11:47:10.449348 OPROM - RST - RAID = ff.ff.ff.ffff
682 11:47:10.452971 ChipsetInit Base Version = ff.ff.ff.ffff
683 11:47:10.455694 ChipsetInit Oem Version = ff.ff.ff.ffff
684 11:47:10.459343 Display FSP Version Info HOB
685 11:47:10.465724 Reference Code - SA - System Agent = 9.0.1e.30
686 11:47:10.469132 Reference Code - MRC = 0.7.1.6c
687 11:47:10.469768 SA - PCIe Version = 9.0.1e.30
688 11:47:10.472557 SA-CRID Status = Disabled
689 11:47:10.475858 SA-CRID Original Value = 0.0.0.c
690 11:47:10.479091 SA-CRID New Value = 0.0.0.c
691 11:47:10.482336 OPROM - VBIOS = ff.ff.ff.ffff
692 11:47:10.485826 RTC Init
693 11:47:10.488951 Set power on after power failure.
694 11:47:10.489583 Disabling Deep S3
695 11:47:10.492330 Disabling Deep S3
696 11:47:10.492920 Disabling Deep S4
697 11:47:10.495415 Disabling Deep S4
698 11:47:10.495899 Disabling Deep S5
699 11:47:10.499129 Disabling Deep S5
700 11:47:10.505834 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
701 11:47:10.506436 Enumerating buses...
702 11:47:10.512155 Show all devs... Before device enumeration.
703 11:47:10.512746 Root Device: enabled 1
704 11:47:10.515839 CPU_CLUSTER: 0: enabled 1
705 11:47:10.518969 DOMAIN: 0000: enabled 1
706 11:47:10.522023 APIC: 00: enabled 1
707 11:47:10.522502 PCI: 00:00.0: enabled 1
708 11:47:10.525720 PCI: 00:02.0: enabled 1
709 11:47:10.529090 PCI: 00:04.0: enabled 0
710 11:47:10.532366 PCI: 00:05.0: enabled 0
711 11:47:10.532955 PCI: 00:12.0: enabled 1
712 11:47:10.535234 PCI: 00:12.5: enabled 0
713 11:47:10.538542 PCI: 00:12.6: enabled 0
714 11:47:10.539020 PCI: 00:14.0: enabled 1
715 11:47:10.541746 PCI: 00:14.1: enabled 0
716 11:47:10.545089 PCI: 00:14.3: enabled 1
717 11:47:10.548788 PCI: 00:14.5: enabled 0
718 11:47:10.549435 PCI: 00:15.0: enabled 1
719 11:47:10.552132 PCI: 00:15.1: enabled 1
720 11:47:10.555497 PCI: 00:15.2: enabled 0
721 11:47:10.558725 PCI: 00:15.3: enabled 0
722 11:47:10.559206 PCI: 00:16.0: enabled 1
723 11:47:10.561758 PCI: 00:16.1: enabled 0
724 11:47:10.564857 PCI: 00:16.2: enabled 0
725 11:47:10.568574 PCI: 00:16.3: enabled 0
726 11:47:10.569157 PCI: 00:16.4: enabled 0
727 11:47:10.571734 PCI: 00:16.5: enabled 0
728 11:47:10.575260 PCI: 00:17.0: enabled 1
729 11:47:10.575851 PCI: 00:19.0: enabled 1
730 11:47:10.578687 PCI: 00:19.1: enabled 0
731 11:47:10.581739 PCI: 00:19.2: enabled 0
732 11:47:10.585675 PCI: 00:1a.0: enabled 0
733 11:47:10.586266 PCI: 00:1c.0: enabled 0
734 11:47:10.588503 PCI: 00:1c.1: enabled 0
735 11:47:10.592072 PCI: 00:1c.2: enabled 0
736 11:47:10.595107 PCI: 00:1c.3: enabled 0
737 11:47:10.595695 PCI: 00:1c.4: enabled 0
738 11:47:10.598595 PCI: 00:1c.5: enabled 0
739 11:47:10.602367 PCI: 00:1c.6: enabled 0
740 11:47:10.605272 PCI: 00:1c.7: enabled 0
741 11:47:10.605982 PCI: 00:1d.0: enabled 1
742 11:47:10.608296 PCI: 00:1d.1: enabled 0
743 11:47:10.612163 PCI: 00:1d.2: enabled 0
744 11:47:10.612750 PCI: 00:1d.3: enabled 0
745 11:47:10.615584 PCI: 00:1d.4: enabled 0
746 11:47:10.618044 PCI: 00:1d.5: enabled 1
747 11:47:10.621549 PCI: 00:1e.0: enabled 1
748 11:47:10.622121 PCI: 00:1e.1: enabled 0
749 11:47:10.624738 PCI: 00:1e.2: enabled 1
750 11:47:10.628190 PCI: 00:1e.3: enabled 1
751 11:47:10.631934 PCI: 00:1f.0: enabled 1
752 11:47:10.632519 PCI: 00:1f.1: enabled 1
753 11:47:10.634723 PCI: 00:1f.2: enabled 1
754 11:47:10.638094 PCI: 00:1f.3: enabled 1
755 11:47:10.641261 PCI: 00:1f.4: enabled 1
756 11:47:10.641895 PCI: 00:1f.5: enabled 1
757 11:47:10.645106 PCI: 00:1f.6: enabled 0
758 11:47:10.648191 USB0 port 0: enabled 1
759 11:47:10.648775 I2C: 00:15: enabled 1
760 11:47:10.651198 I2C: 00:5d: enabled 1
761 11:47:10.654801 GENERIC: 0.0: enabled 1
762 11:47:10.655397 I2C: 00:1a: enabled 1
763 11:47:10.658135 I2C: 00:38: enabled 1
764 11:47:10.661313 I2C: 00:39: enabled 1
765 11:47:10.664507 I2C: 00:3a: enabled 1
766 11:47:10.665022 I2C: 00:3b: enabled 1
767 11:47:10.668057 PCI: 00:00.0: enabled 1
768 11:47:10.668641 SPI: 00: enabled 1
769 11:47:10.671242 SPI: 01: enabled 1
770 11:47:10.674431 PNP: 0c09.0: enabled 1
771 11:47:10.674909 USB2 port 0: enabled 1
772 11:47:10.677924 USB2 port 1: enabled 1
773 11:47:10.681176 USB2 port 2: enabled 0
774 11:47:10.685365 USB2 port 3: enabled 0
775 11:47:10.686085 USB2 port 5: enabled 0
776 11:47:10.687872 USB2 port 6: enabled 1
777 11:47:10.691367 USB2 port 9: enabled 1
778 11:47:10.691949 USB3 port 0: enabled 1
779 11:47:10.694737 USB3 port 1: enabled 1
780 11:47:10.698055 USB3 port 2: enabled 1
781 11:47:10.701326 USB3 port 3: enabled 1
782 11:47:10.701954 USB3 port 4: enabled 0
783 11:47:10.704919 APIC: 02: enabled 1
784 11:47:10.705557 APIC: 07: enabled 1
785 11:47:10.707989 APIC: 01: enabled 1
786 11:47:10.711246 APIC: 03: enabled 1
787 11:47:10.711827 APIC: 06: enabled 1
788 11:47:10.714384 APIC: 05: enabled 1
789 11:47:10.717959 APIC: 04: enabled 1
790 11:47:10.718541 Compare with tree...
791 11:47:10.721582 Root Device: enabled 1
792 11:47:10.724708 CPU_CLUSTER: 0: enabled 1
793 11:47:10.725289 APIC: 00: enabled 1
794 11:47:10.727926 APIC: 02: enabled 1
795 11:47:10.731243 APIC: 07: enabled 1
796 11:47:10.731723 APIC: 01: enabled 1
797 11:47:10.734801 APIC: 03: enabled 1
798 11:47:10.737659 APIC: 06: enabled 1
799 11:47:10.738137 APIC: 05: enabled 1
800 11:47:10.741260 APIC: 04: enabled 1
801 11:47:10.744410 DOMAIN: 0000: enabled 1
802 11:47:10.748019 PCI: 00:00.0: enabled 1
803 11:47:10.748600 PCI: 00:02.0: enabled 1
804 11:47:10.750849 PCI: 00:04.0: enabled 0
805 11:47:10.754118 PCI: 00:05.0: enabled 0
806 11:47:10.757800 PCI: 00:12.0: enabled 1
807 11:47:10.760806 PCI: 00:12.5: enabled 0
808 11:47:10.761391 PCI: 00:12.6: enabled 0
809 11:47:10.764182 PCI: 00:14.0: enabled 1
810 11:47:10.767581 USB0 port 0: enabled 1
811 11:47:10.771109 USB2 port 0: enabled 1
812 11:47:10.774189 USB2 port 1: enabled 1
813 11:47:10.774673 USB2 port 2: enabled 0
814 11:47:10.777656 USB2 port 3: enabled 0
815 11:47:10.780972 USB2 port 5: enabled 0
816 11:47:10.784609 USB2 port 6: enabled 1
817 11:47:10.787269 USB2 port 9: enabled 1
818 11:47:10.790471 USB3 port 0: enabled 1
819 11:47:10.790957 USB3 port 1: enabled 1
820 11:47:10.794952 USB3 port 2: enabled 1
821 11:47:10.797127 USB3 port 3: enabled 1
822 11:47:10.800823 USB3 port 4: enabled 0
823 11:47:10.804177 PCI: 00:14.1: enabled 0
824 11:47:10.804664 PCI: 00:14.3: enabled 1
825 11:47:10.807375 PCI: 00:14.5: enabled 0
826 11:47:10.810839 PCI: 00:15.0: enabled 1
827 11:47:10.814400 I2C: 00:15: enabled 1
828 11:47:10.817794 PCI: 00:15.1: enabled 1
829 11:47:10.818387 I2C: 00:5d: enabled 1
830 11:47:10.820759 GENERIC: 0.0: enabled 1
831 11:47:10.823623 PCI: 00:15.2: enabled 0
832 11:47:10.827388 PCI: 00:15.3: enabled 0
833 11:47:10.830254 PCI: 00:16.0: enabled 1
834 11:47:10.830740 PCI: 00:16.1: enabled 0
835 11:47:10.833673 PCI: 00:16.2: enabled 0
836 11:47:10.836944 PCI: 00:16.3: enabled 0
837 11:47:10.840903 PCI: 00:16.4: enabled 0
838 11:47:10.843945 PCI: 00:16.5: enabled 0
839 11:47:10.844542 PCI: 00:17.0: enabled 1
840 11:47:10.846733 PCI: 00:19.0: enabled 1
841 11:47:10.850213 I2C: 00:1a: enabled 1
842 11:47:10.853612 I2C: 00:38: enabled 1
843 11:47:10.854204 I2C: 00:39: enabled 1
844 11:47:10.857908 I2C: 00:3a: enabled 1
845 11:47:10.860776 I2C: 00:3b: enabled 1
846 11:47:10.863334 PCI: 00:19.1: enabled 0
847 11:47:10.866694 PCI: 00:19.2: enabled 0
848 11:47:10.867183 PCI: 00:1a.0: enabled 0
849 11:47:10.870120 PCI: 00:1c.0: enabled 0
850 11:47:10.873623 PCI: 00:1c.1: enabled 0
851 11:47:10.877289 PCI: 00:1c.2: enabled 0
852 11:47:10.877926 PCI: 00:1c.3: enabled 0
853 11:47:10.879820 PCI: 00:1c.4: enabled 0
854 11:47:10.883173 PCI: 00:1c.5: enabled 0
855 11:47:10.887197 PCI: 00:1c.6: enabled 0
856 11:47:10.890344 PCI: 00:1c.7: enabled 0
857 11:47:10.891000 PCI: 00:1d.0: enabled 1
858 11:47:10.893434 PCI: 00:1d.1: enabled 0
859 11:47:10.897362 PCI: 00:1d.2: enabled 0
860 11:47:10.899915 PCI: 00:1d.3: enabled 0
861 11:47:10.903414 PCI: 00:1d.4: enabled 0
862 11:47:10.904010 PCI: 00:1d.5: enabled 1
863 11:47:10.906751 PCI: 00:00.0: enabled 1
864 11:47:10.910379 PCI: 00:1e.0: enabled 1
865 11:47:10.913656 PCI: 00:1e.1: enabled 0
866 11:47:10.916844 PCI: 00:1e.2: enabled 1
867 11:47:10.917435 SPI: 00: enabled 1
868 11:47:10.920206 PCI: 00:1e.3: enabled 1
869 11:47:10.923153 SPI: 01: enabled 1
870 11:47:10.926522 PCI: 00:1f.0: enabled 1
871 11:47:10.927008 PNP: 0c09.0: enabled 1
872 11:47:10.930389 PCI: 00:1f.1: enabled 1
873 11:47:10.933139 PCI: 00:1f.2: enabled 1
874 11:47:10.936755 PCI: 00:1f.3: enabled 1
875 11:47:10.937355 PCI: 00:1f.4: enabled 1
876 11:47:10.939841 PCI: 00:1f.5: enabled 1
877 11:47:10.943308 PCI: 00:1f.6: enabled 0
878 11:47:10.946372 Root Device scanning...
879 11:47:10.949631 scan_static_bus for Root Device
880 11:47:10.953342 CPU_CLUSTER: 0 enabled
881 11:47:10.953976 DOMAIN: 0000 enabled
882 11:47:10.956516 DOMAIN: 0000 scanning...
883 11:47:10.959605 PCI: pci_scan_bus for bus 00
884 11:47:10.962985 PCI: 00:00.0 [8086/0000] ops
885 11:47:10.966101 PCI: 00:00.0 [8086/9b61] enabled
886 11:47:10.969799 PCI: 00:02.0 [8086/0000] bus ops
887 11:47:10.973272 PCI: 00:02.0 [8086/9b41] enabled
888 11:47:10.976571 PCI: 00:04.0 [8086/1903] disabled
889 11:47:10.979788 PCI: 00:08.0 [8086/1911] enabled
890 11:47:10.983435 PCI: 00:12.0 [8086/02f9] enabled
891 11:47:10.986219 PCI: 00:14.0 [8086/0000] bus ops
892 11:47:10.990104 PCI: 00:14.0 [8086/02ed] enabled
893 11:47:10.992937 PCI: 00:14.2 [8086/02ef] enabled
894 11:47:10.996222 PCI: 00:14.3 [8086/02f0] enabled
895 11:47:10.999375 PCI: 00:15.0 [8086/0000] bus ops
896 11:47:11.002900 PCI: 00:15.0 [8086/02e8] enabled
897 11:47:11.006186 PCI: 00:15.1 [8086/0000] bus ops
898 11:47:11.009551 PCI: 00:15.1 [8086/02e9] enabled
899 11:47:11.012882 PCI: 00:16.0 [8086/0000] ops
900 11:47:11.016116 PCI: 00:16.0 [8086/02e0] enabled
901 11:47:11.019787 PCI: 00:17.0 [8086/0000] ops
902 11:47:11.022930 PCI: 00:17.0 [8086/02d3] enabled
903 11:47:11.026383 PCI: 00:19.0 [8086/0000] bus ops
904 11:47:11.029697 PCI: 00:19.0 [8086/02c5] enabled
905 11:47:11.032501 PCI: 00:1d.0 [8086/0000] bus ops
906 11:47:11.036796 PCI: 00:1d.0 [8086/02b0] enabled
907 11:47:11.039276 PCI: Static device PCI: 00:1d.5 not found, disabling it.
908 11:47:11.043185 PCI: 00:1e.0 [8086/0000] ops
909 11:47:11.046146 PCI: 00:1e.0 [8086/02a8] enabled
910 11:47:11.049363 PCI: 00:1e.2 [8086/0000] bus ops
911 11:47:11.052988 PCI: 00:1e.2 [8086/02aa] enabled
912 11:47:11.055569 PCI: 00:1e.3 [8086/0000] bus ops
913 11:47:11.059134 PCI: 00:1e.3 [8086/02ab] enabled
914 11:47:11.062594 PCI: 00:1f.0 [8086/0000] bus ops
915 11:47:11.066157 PCI: 00:1f.0 [8086/0284] enabled
916 11:47:11.072583 PCI: Static device PCI: 00:1f.1 not found, disabling it.
917 11:47:11.079171 PCI: Static device PCI: 00:1f.2 not found, disabling it.
918 11:47:11.082150 PCI: 00:1f.3 [8086/0000] bus ops
919 11:47:11.086183 PCI: 00:1f.3 [8086/02c8] enabled
920 11:47:11.089239 PCI: 00:1f.4 [8086/0000] bus ops
921 11:47:11.092506 PCI: 00:1f.4 [8086/02a3] enabled
922 11:47:11.096235 PCI: 00:1f.5 [8086/0000] bus ops
923 11:47:11.099194 PCI: 00:1f.5 [8086/02a4] enabled
924 11:47:11.102100 PCI: Leftover static devices:
925 11:47:11.102525 PCI: 00:05.0
926 11:47:11.102892 PCI: 00:12.5
927 11:47:11.105734 PCI: 00:12.6
928 11:47:11.106212 PCI: 00:14.1
929 11:47:11.108906 PCI: 00:14.5
930 11:47:11.109508 PCI: 00:15.2
931 11:47:11.112423 PCI: 00:15.3
932 11:47:11.112898 PCI: 00:16.1
933 11:47:11.113278 PCI: 00:16.2
934 11:47:11.115921 PCI: 00:16.3
935 11:47:11.116506 PCI: 00:16.4
936 11:47:11.118549 PCI: 00:16.5
937 11:47:11.119026 PCI: 00:19.1
938 11:47:11.119405 PCI: 00:19.2
939 11:47:11.122025 PCI: 00:1a.0
940 11:47:11.122502 PCI: 00:1c.0
941 11:47:11.125431 PCI: 00:1c.1
942 11:47:11.126056 PCI: 00:1c.2
943 11:47:11.126442 PCI: 00:1c.3
944 11:47:11.128947 PCI: 00:1c.4
945 11:47:11.129573 PCI: 00:1c.5
946 11:47:11.132242 PCI: 00:1c.6
947 11:47:11.132722 PCI: 00:1c.7
948 11:47:11.135537 PCI: 00:1d.1
949 11:47:11.136139 PCI: 00:1d.2
950 11:47:11.136528 PCI: 00:1d.3
951 11:47:11.138611 PCI: 00:1d.4
952 11:47:11.139093 PCI: 00:1d.5
953 11:47:11.141897 PCI: 00:1e.1
954 11:47:11.142383 PCI: 00:1f.1
955 11:47:11.142768 PCI: 00:1f.2
956 11:47:11.145354 PCI: 00:1f.6
957 11:47:11.148895 PCI: Check your devicetree.cb.
958 11:47:11.151723 PCI: 00:02.0 scanning...
959 11:47:11.155140 scan_generic_bus for PCI: 00:02.0
960 11:47:11.158458 scan_generic_bus for PCI: 00:02.0 done
961 11:47:11.162175 scan_bus: scanning of bus PCI: 00:02.0 took 10191 usecs
962 11:47:11.165080 PCI: 00:14.0 scanning...
963 11:47:11.168628 scan_static_bus for PCI: 00:14.0
964 11:47:11.171699 USB0 port 0 enabled
965 11:47:11.175005 USB0 port 0 scanning...
966 11:47:11.178839 scan_static_bus for USB0 port 0
967 11:47:11.179430 USB2 port 0 enabled
968 11:47:11.181983 USB2 port 1 enabled
969 11:47:11.184830 USB2 port 2 disabled
970 11:47:11.185313 USB2 port 3 disabled
971 11:47:11.189259 USB2 port 5 disabled
972 11:47:11.191784 USB2 port 6 enabled
973 11:47:11.192361 USB2 port 9 enabled
974 11:47:11.195248 USB3 port 0 enabled
975 11:47:11.195829 USB3 port 1 enabled
976 11:47:11.198229 USB3 port 2 enabled
977 11:47:11.201598 USB3 port 3 enabled
978 11:47:11.202082 USB3 port 4 disabled
979 11:47:11.205089 USB2 port 0 scanning...
980 11:47:11.208761 scan_static_bus for USB2 port 0
981 11:47:11.211991 scan_static_bus for USB2 port 0 done
982 11:47:11.218352 scan_bus: scanning of bus USB2 port 0 took 9702 usecs
983 11:47:11.221663 USB2 port 1 scanning...
984 11:47:11.225156 scan_static_bus for USB2 port 1
985 11:47:11.228253 scan_static_bus for USB2 port 1 done
986 11:47:11.231755 scan_bus: scanning of bus USB2 port 1 took 9688 usecs
987 11:47:11.234892 USB2 port 6 scanning...
988 11:47:11.238389 scan_static_bus for USB2 port 6
989 11:47:11.241773 scan_static_bus for USB2 port 6 done
990 11:47:11.248699 scan_bus: scanning of bus USB2 port 6 took 9697 usecs
991 11:47:11.251585 USB2 port 9 scanning...
992 11:47:11.254742 scan_static_bus for USB2 port 9
993 11:47:11.258171 scan_static_bus for USB2 port 9 done
994 11:47:11.261539 scan_bus: scanning of bus USB2 port 9 took 9696 usecs
995 11:47:11.265140 USB3 port 0 scanning...
996 11:47:11.268331 scan_static_bus for USB3 port 0
997 11:47:11.271312 scan_static_bus for USB3 port 0 done
998 11:47:11.278419 scan_bus: scanning of bus USB3 port 0 took 9687 usecs
999 11:47:11.281459 USB3 port 1 scanning...
1000 11:47:11.284619 scan_static_bus for USB3 port 1
1001 11:47:11.288179 scan_static_bus for USB3 port 1 done
1002 11:47:11.291584 scan_bus: scanning of bus USB3 port 1 took 9689 usecs
1003 11:47:11.294625 USB3 port 2 scanning...
1004 11:47:11.297686 scan_static_bus for USB3 port 2
1005 11:47:11.301122 scan_static_bus for USB3 port 2 done
1006 11:47:11.308786 scan_bus: scanning of bus USB3 port 2 took 9704 usecs
1007 11:47:11.311262 USB3 port 3 scanning...
1008 11:47:11.314613 scan_static_bus for USB3 port 3
1009 11:47:11.318401 scan_static_bus for USB3 port 3 done
1010 11:47:11.321417 scan_bus: scanning of bus USB3 port 3 took 9696 usecs
1011 11:47:11.327940 scan_static_bus for USB0 port 0 done
1012 11:47:11.331349 scan_bus: scanning of bus USB0 port 0 took 155357 usecs
1013 11:47:11.334368 scan_static_bus for PCI: 00:14.0 done
1014 11:47:11.341523 scan_bus: scanning of bus PCI: 00:14.0 took 172968 usecs
1015 11:47:11.344737 PCI: 00:15.0 scanning...
1016 11:47:11.347995 scan_generic_bus for PCI: 00:15.0
1017 11:47:11.351204 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1018 11:47:11.354587 scan_generic_bus for PCI: 00:15.0 done
1019 11:47:11.361061 scan_bus: scanning of bus PCI: 00:15.0 took 14304 usecs
1020 11:47:11.364361 PCI: 00:15.1 scanning...
1021 11:47:11.367996 scan_generic_bus for PCI: 00:15.1
1022 11:47:11.370966 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1023 11:47:11.375185 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1024 11:47:11.381145 scan_generic_bus for PCI: 00:15.1 done
1025 11:47:11.384532 scan_bus: scanning of bus PCI: 00:15.1 took 18591 usecs
1026 11:47:11.387734 PCI: 00:19.0 scanning...
1027 11:47:11.391296 scan_generic_bus for PCI: 00:19.0
1028 11:47:11.394361 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1029 11:47:11.401392 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1030 11:47:11.404776 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1031 11:47:11.407401 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1032 11:47:11.411048 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1033 11:47:11.414378 scan_generic_bus for PCI: 00:19.0 done
1034 11:47:11.420961 scan_bus: scanning of bus PCI: 00:19.0 took 30725 usecs
1035 11:47:11.424222 PCI: 00:1d.0 scanning...
1036 11:47:11.427500 do_pci_scan_bridge for PCI: 00:1d.0
1037 11:47:11.430849 PCI: pci_scan_bus for bus 01
1038 11:47:11.433859 PCI: 01:00.0 [1c5c/1327] enabled
1039 11:47:11.437693 Enabling Common Clock Configuration
1040 11:47:11.440627 L1 Sub-State supported from root port 29
1041 11:47:11.443998 L1 Sub-State Support = 0xf
1042 11:47:11.447298 CommonModeRestoreTime = 0x28
1043 11:47:11.450457 Power On Value = 0x16, Power On Scale = 0x0
1044 11:47:11.453746 ASPM: Enabled L1
1045 11:47:11.460540 scan_bus: scanning of bus PCI: 00:1d.0 took 32767 usecs
1046 11:47:11.461102 PCI: 00:1e.2 scanning...
1047 11:47:11.463800 scan_generic_bus for PCI: 00:1e.2
1048 11:47:11.470985 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1049 11:47:11.474337 scan_generic_bus for PCI: 00:1e.2 done
1050 11:47:11.477527 scan_bus: scanning of bus PCI: 00:1e.2 took 14011 usecs
1051 11:47:11.480739 PCI: 00:1e.3 scanning...
1052 11:47:11.483968 scan_generic_bus for PCI: 00:1e.3
1053 11:47:11.487287 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1054 11:47:11.493880 scan_generic_bus for PCI: 00:1e.3 done
1055 11:47:11.497574 scan_bus: scanning of bus PCI: 00:1e.3 took 14007 usecs
1056 11:47:11.500997 PCI: 00:1f.0 scanning...
1057 11:47:11.504051 scan_static_bus for PCI: 00:1f.0
1058 11:47:11.506949 PNP: 0c09.0 enabled
1059 11:47:11.510660 scan_static_bus for PCI: 00:1f.0 done
1060 11:47:11.517184 scan_bus: scanning of bus PCI: 00:1f.0 took 12044 usecs
1061 11:47:11.517798 PCI: 00:1f.3 scanning...
1062 11:47:11.523862 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1063 11:47:11.527826 PCI: 00:1f.4 scanning...
1064 11:47:11.530161 scan_generic_bus for PCI: 00:1f.4
1065 11:47:11.533685 scan_generic_bus for PCI: 00:1f.4 done
1066 11:47:11.540563 scan_bus: scanning of bus PCI: 00:1f.4 took 10182 usecs
1067 11:47:11.543873 PCI: 00:1f.5 scanning...
1068 11:47:11.546666 scan_generic_bus for PCI: 00:1f.5
1069 11:47:11.549849 scan_generic_bus for PCI: 00:1f.5 done
1070 11:47:11.557213 scan_bus: scanning of bus PCI: 00:1f.5 took 10186 usecs
1071 11:47:11.560078 scan_bus: scanning of bus DOMAIN: 0000 took 604884 usecs
1072 11:47:11.563250 scan_static_bus for Root Device done
1073 11:47:11.569850 scan_bus: scanning of bus Root Device took 624760 usecs
1074 11:47:11.570441 done
1075 11:47:11.573555 Chrome EC: UHEPI supported
1076 11:47:11.579932 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1077 11:47:11.586191 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1078 11:47:11.593536 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1079 11:47:11.600006 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1080 11:47:11.603464 SPI flash protection: WPSW=0 SRP0=0
1081 11:47:11.606707 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 11:47:11.613180 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1083 11:47:11.616477 found VGA at PCI: 00:02.0
1084 11:47:11.620228 Setting up VGA for PCI: 00:02.0
1085 11:47:11.623010 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 11:47:11.630165 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 11:47:11.633361 Allocating resources...
1088 11:47:11.634011 Reading resources...
1089 11:47:11.639550 Root Device read_resources bus 0 link: 0
1090 11:47:11.642789 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1091 11:47:11.646400 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1092 11:47:11.653142 DOMAIN: 0000 read_resources bus 0 link: 0
1093 11:47:11.659769 PCI: 00:14.0 read_resources bus 0 link: 0
1094 11:47:11.662787 USB0 port 0 read_resources bus 0 link: 0
1095 11:47:11.670344 USB0 port 0 read_resources bus 0 link: 0 done
1096 11:47:11.673611 PCI: 00:14.0 read_resources bus 0 link: 0 done
1097 11:47:11.680749 PCI: 00:15.0 read_resources bus 1 link: 0
1098 11:47:11.684432 PCI: 00:15.0 read_resources bus 1 link: 0 done
1099 11:47:11.690943 PCI: 00:15.1 read_resources bus 2 link: 0
1100 11:47:11.694316 PCI: 00:15.1 read_resources bus 2 link: 0 done
1101 11:47:11.701857 PCI: 00:19.0 read_resources bus 3 link: 0
1102 11:47:11.708212 PCI: 00:19.0 read_resources bus 3 link: 0 done
1103 11:47:11.711753 PCI: 00:1d.0 read_resources bus 1 link: 0
1104 11:47:11.718343 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1105 11:47:11.721378 PCI: 00:1e.2 read_resources bus 4 link: 0
1106 11:47:11.728137 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1107 11:47:11.731480 PCI: 00:1e.3 read_resources bus 5 link: 0
1108 11:47:11.738504 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1109 11:47:11.741503 PCI: 00:1f.0 read_resources bus 0 link: 0
1110 11:47:11.748095 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1111 11:47:11.754716 DOMAIN: 0000 read_resources bus 0 link: 0 done
1112 11:47:11.757964 Root Device read_resources bus 0 link: 0 done
1113 11:47:11.761536 Done reading resources.
1114 11:47:11.764417 Show resources in subtree (Root Device)...After reading.
1115 11:47:11.771575 Root Device child on link 0 CPU_CLUSTER: 0
1116 11:47:11.774655 CPU_CLUSTER: 0 child on link 0 APIC: 00
1117 11:47:11.775313 APIC: 00
1118 11:47:11.777989 APIC: 02
1119 11:47:11.778460 APIC: 07
1120 11:47:11.781032 APIC: 01
1121 11:47:11.781533 APIC: 03
1122 11:47:11.781920 APIC: 06
1123 11:47:11.784465 APIC: 05
1124 11:47:11.785006 APIC: 04
1125 11:47:11.787861 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1126 11:47:11.798119 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1127 11:47:11.848031 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1128 11:47:11.848630 PCI: 00:00.0
1129 11:47:11.849141 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1130 11:47:11.849645 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1131 11:47:11.850085 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1132 11:47:11.850834 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1133 11:47:11.897434 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1134 11:47:11.898185 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1135 11:47:11.899030 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1136 11:47:11.899507 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1137 11:47:11.900054 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1138 11:47:11.946907 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1139 11:47:11.947822 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1140 11:47:11.948303 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1141 11:47:11.948733 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1142 11:47:11.949100 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1143 11:47:11.976999 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1144 11:47:11.978149 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1145 11:47:11.978565 PCI: 00:02.0
1146 11:47:11.978935 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 11:47:11.984763 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 11:47:11.990339 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 11:47:11.993930 PCI: 00:04.0
1150 11:47:11.994517 PCI: 00:08.0
1151 11:47:12.003829 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 11:47:12.007181 PCI: 00:12.0
1153 11:47:12.017059 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 11:47:12.019931 PCI: 00:14.0 child on link 0 USB0 port 0
1155 11:47:12.030280 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 11:47:12.033653 USB0 port 0 child on link 0 USB2 port 0
1157 11:47:12.036787 USB2 port 0
1158 11:47:12.037350 USB2 port 1
1159 11:47:12.040265 USB2 port 2
1160 11:47:12.040851 USB2 port 3
1161 11:47:12.044057 USB2 port 5
1162 11:47:12.044673 USB2 port 6
1163 11:47:12.046568 USB2 port 9
1164 11:47:12.047053 USB3 port 0
1165 11:47:12.049953 USB3 port 1
1166 11:47:12.050439 USB3 port 2
1167 11:47:12.054097 USB3 port 3
1168 11:47:12.057003 USB3 port 4
1169 11:47:12.057622 PCI: 00:14.2
1170 11:47:12.066664 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1171 11:47:12.076974 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1172 11:47:12.080108 PCI: 00:14.3
1173 11:47:12.089931 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 11:47:12.093497 PCI: 00:15.0 child on link 0 I2C: 01:15
1175 11:47:12.103521 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 11:47:12.104110 I2C: 01:15
1177 11:47:12.109797 PCI: 00:15.1 child on link 0 I2C: 02:5d
1178 11:47:12.119696 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 11:47:12.120287 I2C: 02:5d
1180 11:47:12.122754 GENERIC: 0.0
1181 11:47:12.123245 PCI: 00:16.0
1182 11:47:12.133090 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 11:47:12.136220 PCI: 00:17.0
1184 11:47:12.142990 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1185 11:47:12.152858 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1186 11:47:12.159729 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1187 11:47:12.169733 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1188 11:47:12.176107 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1189 11:47:12.186376 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1190 11:47:12.193014 PCI: 00:19.0 child on link 0 I2C: 03:1a
1191 11:47:12.202821 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 11:47:12.203402 I2C: 03:1a
1193 11:47:12.203781 I2C: 03:38
1194 11:47:12.205899 I2C: 03:39
1195 11:47:12.206366 I2C: 03:3a
1196 11:47:12.209060 I2C: 03:3b
1197 11:47:12.212354 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1198 11:47:12.222550 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 11:47:12.232585 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 11:47:12.239238 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 11:47:12.242367 PCI: 01:00.0
1202 11:47:12.252443 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 11:47:12.255823 PCI: 00:1e.0
1204 11:47:12.265450 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1205 11:47:12.276005 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1206 11:47:12.278476 PCI: 00:1e.2 child on link 0 SPI: 00
1207 11:47:12.289000 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 11:47:12.289637 SPI: 00
1209 11:47:12.295157 PCI: 00:1e.3 child on link 0 SPI: 01
1210 11:47:12.305110 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 11:47:12.305790 SPI: 01
1212 11:47:12.308726 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 11:47:12.318680 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 11:47:12.328258 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 11:47:12.328856 PNP: 0c09.0
1216 11:47:12.338103 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 11:47:12.338694 PCI: 00:1f.3
1218 11:47:12.348077 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 11:47:12.358075 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 11:47:12.361732 PCI: 00:1f.4
1221 11:47:12.371266 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 11:47:12.381146 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1223 11:47:12.381744 PCI: 00:1f.5
1224 11:47:12.391658 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1225 11:47:12.397939 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1226 11:47:12.404749 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1227 11:47:12.411346 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1228 11:47:12.414241 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1229 11:47:12.418129 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1230 11:47:12.421194 PCI: 00:17.0 18 * [0x60 - 0x67] io
1231 11:47:12.424790 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1232 11:47:12.430874 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1233 11:47:12.437570 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1234 11:47:12.447468 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 11:47:12.454136 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 11:47:12.460490 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1237 11:47:12.464294 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1238 11:47:12.473925 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1239 11:47:12.477745 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1240 11:47:12.483851 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1241 11:47:12.487440 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1242 11:47:12.493937 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1243 11:47:12.497090 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1244 11:47:12.500514 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1245 11:47:12.507115 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1246 11:47:12.510408 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1247 11:47:12.517035 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1248 11:47:12.520654 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1249 11:47:12.526982 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1250 11:47:12.530775 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1251 11:47:12.537062 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1252 11:47:12.540811 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1253 11:47:12.546642 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1254 11:47:12.550428 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1255 11:47:12.557184 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1256 11:47:12.560194 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1257 11:47:12.563323 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1258 11:47:12.569913 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1259 11:47:12.573530 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1260 11:47:12.579907 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1261 11:47:12.583400 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1262 11:47:12.593163 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1263 11:47:12.596795 avoid_fixed_resources: DOMAIN: 0000
1264 11:47:12.603287 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1265 11:47:12.609852 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1266 11:47:12.616546 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1267 11:47:12.622856 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1268 11:47:12.633181 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1269 11:47:12.639854 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1270 11:47:12.646285 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1271 11:47:12.652813 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1272 11:47:12.662703 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1273 11:47:12.669133 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1274 11:47:12.675841 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1275 11:47:12.682729 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1276 11:47:12.686239 Setting resources...
1277 11:47:12.693138 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1278 11:47:12.695763 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1279 11:47:12.699625 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1280 11:47:12.706196 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1281 11:47:12.709073 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1282 11:47:12.716108 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1283 11:47:12.722501 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1284 11:47:12.725840 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1285 11:47:12.735983 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1286 11:47:12.738906 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1287 11:47:12.746031 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1288 11:47:12.748729 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1289 11:47:12.755658 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1290 11:47:12.758924 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1291 11:47:12.765818 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1292 11:47:12.768529 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1293 11:47:12.775900 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1294 11:47:12.778538 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1295 11:47:12.785788 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1296 11:47:12.788710 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1297 11:47:12.792194 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1298 11:47:12.798848 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1299 11:47:12.802682 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1300 11:47:12.808503 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1301 11:47:12.811835 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1302 11:47:12.818710 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1303 11:47:12.822143 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1304 11:47:12.828580 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1305 11:47:12.831889 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1306 11:47:12.838308 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1307 11:47:12.842049 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1308 11:47:12.848199 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1309 11:47:12.855186 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1310 11:47:12.861647 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1311 11:47:12.868260 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1312 11:47:12.878377 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1313 11:47:12.881348 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1314 11:47:12.888620 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1315 11:47:12.894944 Root Device assign_resources, bus 0 link: 0
1316 11:47:12.897905 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 11:47:12.908127 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1318 11:47:12.914681 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1319 11:47:12.921545 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1320 11:47:12.931791 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1321 11:47:12.937862 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1322 11:47:12.948367 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1323 11:47:12.951342 PCI: 00:14.0 assign_resources, bus 0 link: 0
1324 11:47:12.958022 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 11:47:12.964952 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1326 11:47:12.974429 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1327 11:47:12.981186 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1328 11:47:12.990721 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1329 11:47:12.994268 PCI: 00:15.0 assign_resources, bus 1 link: 0
1330 11:47:12.997578 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 11:47:13.007905 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1332 11:47:13.011261 PCI: 00:15.1 assign_resources, bus 2 link: 0
1333 11:47:13.017907 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 11:47:13.024389 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1335 11:47:13.034340 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1336 11:47:13.040692 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1337 11:47:13.047621 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1338 11:47:13.057357 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1339 11:47:13.063878 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1340 11:47:13.070142 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1341 11:47:13.080278 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1342 11:47:13.083687 PCI: 00:19.0 assign_resources, bus 3 link: 0
1343 11:47:13.090703 PCI: 00:19.0 assign_resources, bus 3 link: 0
1344 11:47:13.097146 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1345 11:47:13.106636 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1346 11:47:13.116805 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1347 11:47:13.119822 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1348 11:47:13.126615 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1349 11:47:13.132999 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1350 11:47:13.139474 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1351 11:47:13.149924 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1352 11:47:13.152741 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1353 11:47:13.159896 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1354 11:47:13.166045 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1355 11:47:13.172442 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1356 11:47:13.175919 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1357 11:47:13.179631 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1358 11:47:13.185976 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1359 11:47:13.189295 LPC: Trying to open IO window from 800 size 1ff
1360 11:47:13.199776 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1361 11:47:13.205658 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1362 11:47:13.216041 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1363 11:47:13.222719 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1364 11:47:13.229403 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 11:47:13.232485 Root Device assign_resources, bus 0 link: 0
1366 11:47:13.236145 Done setting resources.
1367 11:47:13.242448 Show resources in subtree (Root Device)...After assigning values.
1368 11:47:13.245897 Root Device child on link 0 CPU_CLUSTER: 0
1369 11:47:13.249071 CPU_CLUSTER: 0 child on link 0 APIC: 00
1370 11:47:13.252171 APIC: 00
1371 11:47:13.252634 APIC: 02
1372 11:47:13.255689 APIC: 07
1373 11:47:13.256174 APIC: 01
1374 11:47:13.256543 APIC: 03
1375 11:47:13.258946 APIC: 06
1376 11:47:13.259502 APIC: 05
1377 11:47:13.259873 APIC: 04
1378 11:47:13.265766 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1379 11:47:13.275449 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1380 11:47:13.285253 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1381 11:47:13.288994 PCI: 00:00.0
1382 11:47:13.298437 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1383 11:47:13.305055 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1384 11:47:13.315302 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1385 11:47:13.324809 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1386 11:47:13.335020 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1387 11:47:13.344715 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1388 11:47:13.351092 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1389 11:47:13.361398 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1390 11:47:13.371122 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1391 11:47:13.381739 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1392 11:47:13.391448 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1393 11:47:13.401199 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1394 11:47:13.407833 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1395 11:47:13.417911 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1396 11:47:13.427589 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1397 11:47:13.437031 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1398 11:47:13.437791 PCI: 00:02.0
1399 11:47:13.450505 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1400 11:47:13.460364 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1401 11:47:13.470570 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1402 11:47:13.471135 PCI: 00:04.0
1403 11:47:13.473756 PCI: 00:08.0
1404 11:47:13.483735 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1405 11:47:13.484321 PCI: 00:12.0
1406 11:47:13.493642 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1407 11:47:13.500607 PCI: 00:14.0 child on link 0 USB0 port 0
1408 11:47:13.510160 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1409 11:47:13.513235 USB0 port 0 child on link 0 USB2 port 0
1410 11:47:13.516897 USB2 port 0
1411 11:47:13.517503 USB2 port 1
1412 11:47:13.519965 USB2 port 2
1413 11:47:13.520543 USB2 port 3
1414 11:47:13.523235 USB2 port 5
1415 11:47:13.523932 USB2 port 6
1416 11:47:13.526786 USB2 port 9
1417 11:47:13.527376 USB3 port 0
1418 11:47:13.529913 USB3 port 1
1419 11:47:13.530482 USB3 port 2
1420 11:47:13.533089 USB3 port 3
1421 11:47:13.536561 USB3 port 4
1422 11:47:13.537139 PCI: 00:14.2
1423 11:47:13.546491 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1424 11:47:13.556457 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1425 11:47:13.559606 PCI: 00:14.3
1426 11:47:13.569843 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1427 11:47:13.573003 PCI: 00:15.0 child on link 0 I2C: 01:15
1428 11:47:13.582665 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1429 11:47:13.585854 I2C: 01:15
1430 11:47:13.589111 PCI: 00:15.1 child on link 0 I2C: 02:5d
1431 11:47:13.599591 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1432 11:47:13.603022 I2C: 02:5d
1433 11:47:13.603599 GENERIC: 0.0
1434 11:47:13.605983 PCI: 00:16.0
1435 11:47:13.616103 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1436 11:47:13.616686 PCI: 00:17.0
1437 11:47:13.626427 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1438 11:47:13.639270 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1439 11:47:13.645639 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1440 11:47:13.655511 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1441 11:47:13.665304 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1442 11:47:13.675203 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1443 11:47:13.678258 PCI: 00:19.0 child on link 0 I2C: 03:1a
1444 11:47:13.688613 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1445 11:47:13.691692 I2C: 03:1a
1446 11:47:13.692262 I2C: 03:38
1447 11:47:13.695049 I2C: 03:39
1448 11:47:13.695623 I2C: 03:3a
1449 11:47:13.698597 I2C: 03:3b
1450 11:47:13.701987 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1451 11:47:13.711561 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1452 11:47:13.721427 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1453 11:47:13.731738 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1454 11:47:13.734328 PCI: 01:00.0
1455 11:47:13.744710 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1456 11:47:13.745297 PCI: 00:1e.0
1457 11:47:13.758124 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 11:47:13.767744 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1459 11:47:13.771699 PCI: 00:1e.2 child on link 0 SPI: 00
1460 11:47:13.781140 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1461 11:47:13.781759 SPI: 00
1462 11:47:13.787457 PCI: 00:1e.3 child on link 0 SPI: 01
1463 11:47:13.797497 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1464 11:47:13.798092 SPI: 01
1465 11:47:13.801235 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 11:47:13.810631 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 11:47:13.820579 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 11:47:13.821154 PNP: 0c09.0
1469 11:47:13.830688 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1470 11:47:13.831268 PCI: 00:1f.3
1471 11:47:13.840280 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1472 11:47:13.853719 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1473 11:47:13.854330 PCI: 00:1f.4
1474 11:47:13.863690 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1475 11:47:13.873861 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1476 11:47:13.874445 PCI: 00:1f.5
1477 11:47:13.886544 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1478 11:47:13.887126 Done allocating resources.
1479 11:47:13.892986 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1480 11:47:13.896767 Enabling resources...
1481 11:47:13.899845 PCI: 00:00.0 subsystem <- 8086/9b61
1482 11:47:13.902929 PCI: 00:00.0 cmd <- 06
1483 11:47:13.907012 PCI: 00:02.0 subsystem <- 8086/9b41
1484 11:47:13.909434 PCI: 00:02.0 cmd <- 03
1485 11:47:13.913181 PCI: 00:08.0 cmd <- 06
1486 11:47:13.916523 PCI: 00:12.0 subsystem <- 8086/02f9
1487 11:47:13.919851 PCI: 00:12.0 cmd <- 02
1488 11:47:13.923056 PCI: 00:14.0 subsystem <- 8086/02ed
1489 11:47:13.923631 PCI: 00:14.0 cmd <- 02
1490 11:47:13.926457 PCI: 00:14.2 cmd <- 02
1491 11:47:13.929647 PCI: 00:14.3 subsystem <- 8086/02f0
1492 11:47:13.933371 PCI: 00:14.3 cmd <- 02
1493 11:47:13.936784 PCI: 00:15.0 subsystem <- 8086/02e8
1494 11:47:13.939481 PCI: 00:15.0 cmd <- 02
1495 11:47:13.943377 PCI: 00:15.1 subsystem <- 8086/02e9
1496 11:47:13.946190 PCI: 00:15.1 cmd <- 02
1497 11:47:13.949855 PCI: 00:16.0 subsystem <- 8086/02e0
1498 11:47:13.953387 PCI: 00:16.0 cmd <- 02
1499 11:47:13.956827 PCI: 00:17.0 subsystem <- 8086/02d3
1500 11:47:13.959904 PCI: 00:17.0 cmd <- 03
1501 11:47:13.962991 PCI: 00:19.0 subsystem <- 8086/02c5
1502 11:47:13.966463 PCI: 00:19.0 cmd <- 02
1503 11:47:13.969829 PCI: 00:1d.0 bridge ctrl <- 0013
1504 11:47:13.972811 PCI: 00:1d.0 subsystem <- 8086/02b0
1505 11:47:13.973281 PCI: 00:1d.0 cmd <- 06
1506 11:47:13.979393 PCI: 00:1e.0 subsystem <- 8086/02a8
1507 11:47:13.979953 PCI: 00:1e.0 cmd <- 06
1508 11:47:13.982815 PCI: 00:1e.2 subsystem <- 8086/02aa
1509 11:47:13.986353 PCI: 00:1e.2 cmd <- 06
1510 11:47:13.989404 PCI: 00:1e.3 subsystem <- 8086/02ab
1511 11:47:13.993115 PCI: 00:1e.3 cmd <- 02
1512 11:47:13.996149 PCI: 00:1f.0 subsystem <- 8086/0284
1513 11:47:13.999611 PCI: 00:1f.0 cmd <- 407
1514 11:47:14.002878 PCI: 00:1f.3 subsystem <- 8086/02c8
1515 11:47:14.006208 PCI: 00:1f.3 cmd <- 02
1516 11:47:14.009570 PCI: 00:1f.4 subsystem <- 8086/02a3
1517 11:47:14.012994 PCI: 00:1f.4 cmd <- 03
1518 11:47:14.016412 PCI: 00:1f.5 subsystem <- 8086/02a4
1519 11:47:14.019406 PCI: 00:1f.5 cmd <- 406
1520 11:47:14.027350 PCI: 01:00.0 cmd <- 02
1521 11:47:14.032787 done.
1522 11:47:14.042173 ME: Version: 14.0.39.1367
1523 11:47:14.048305 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 9
1524 11:47:14.051675 Initializing devices...
1525 11:47:14.052250 Root Device init ...
1526 11:47:14.058141 Chrome EC: Set SMI mask to 0x0000000000000000
1527 11:47:14.061635 Chrome EC: clear events_b mask to 0x0000000000000000
1528 11:47:14.068653 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1529 11:47:14.075100 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1530 11:47:14.081933 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1531 11:47:14.085113 Chrome EC: Set WAKE mask to 0x0000000000000000
1532 11:47:14.088424 Root Device init finished in 35186 usecs
1533 11:47:14.092255 CPU_CLUSTER: 0 init ...
1534 11:47:14.098204 CPU_CLUSTER: 0 init finished in 2450 usecs
1535 11:47:14.102588 PCI: 00:00.0 init ...
1536 11:47:14.105895 CPU TDP: 15 Watts
1537 11:47:14.109118 CPU PL2 = 64 Watts
1538 11:47:14.112708 PCI: 00:00.0 init finished in 7084 usecs
1539 11:47:14.116028 PCI: 00:02.0 init ...
1540 11:47:14.118788 PCI: 00:02.0 init finished in 2264 usecs
1541 11:47:14.122382 PCI: 00:08.0 init ...
1542 11:47:14.125398 PCI: 00:08.0 init finished in 2253 usecs
1543 11:47:14.129146 PCI: 00:12.0 init ...
1544 11:47:14.131987 PCI: 00:12.0 init finished in 2253 usecs
1545 11:47:14.135724 PCI: 00:14.0 init ...
1546 11:47:14.138675 PCI: 00:14.0 init finished in 2244 usecs
1547 11:47:14.142249 PCI: 00:14.2 init ...
1548 11:47:14.145322 PCI: 00:14.2 init finished in 2252 usecs
1549 11:47:14.148534 PCI: 00:14.3 init ...
1550 11:47:14.151893 PCI: 00:14.3 init finished in 2270 usecs
1551 11:47:14.155154 PCI: 00:15.0 init ...
1552 11:47:14.158393 DW I2C bus 0 at 0xd121f000 (400 KHz)
1553 11:47:14.162032 PCI: 00:15.0 init finished in 5981 usecs
1554 11:47:14.165421 PCI: 00:15.1 init ...
1555 11:47:14.169087 DW I2C bus 1 at 0xd1220000 (400 KHz)
1556 11:47:14.174966 PCI: 00:15.1 init finished in 5980 usecs
1557 11:47:14.175547 PCI: 00:16.0 init ...
1558 11:47:14.182200 PCI: 00:16.0 init finished in 2254 usecs
1559 11:47:14.185339 PCI: 00:19.0 init ...
1560 11:47:14.188733 DW I2C bus 4 at 0xd1222000 (400 KHz)
1561 11:47:14.192035 PCI: 00:19.0 init finished in 5982 usecs
1562 11:47:14.195377 PCI: 00:1d.0 init ...
1563 11:47:14.198407 Initializing PCH PCIe bridge.
1564 11:47:14.201900 PCI: 00:1d.0 init finished in 5280 usecs
1565 11:47:14.205120 PCI: 00:1f.0 init ...
1566 11:47:14.208682 IOAPIC: Initializing IOAPIC at 0xfec00000
1567 11:47:14.215147 IOAPIC: Bootstrap Processor Local APIC = 0x00
1568 11:47:14.215747 IOAPIC: ID = 0x02
1569 11:47:14.218228 IOAPIC: Dumping registers
1570 11:47:14.221548 reg 0x0000: 0x02000000
1571 11:47:14.224595 reg 0x0001: 0x00770020
1572 11:47:14.225085 reg 0x0002: 0x00000000
1573 11:47:14.231461 PCI: 00:1f.0 init finished in 23552 usecs
1574 11:47:14.234916 PCI: 00:1f.4 init ...
1575 11:47:14.237819 PCI: 00:1f.4 init finished in 2263 usecs
1576 11:47:14.248605 PCI: 01:00.0 init ...
1577 11:47:14.252227 PCI: 01:00.0 init finished in 2253 usecs
1578 11:47:14.256081 PNP: 0c09.0 init ...
1579 11:47:14.259874 Google Chrome EC uptime: 11.090 seconds
1580 11:47:14.266003 Google Chrome AP resets since EC boot: 0
1581 11:47:14.269461 Google Chrome most recent AP reset causes:
1582 11:47:14.276265 Google Chrome EC reset flags at last EC boot: reset-pin
1583 11:47:14.279416 PNP: 0c09.0 init finished in 20635 usecs
1584 11:47:14.283053 Devices initialized
1585 11:47:14.286178 Show all devs... After init.
1586 11:47:14.286747 Root Device: enabled 1
1587 11:47:14.289412 CPU_CLUSTER: 0: enabled 1
1588 11:47:14.293027 DOMAIN: 0000: enabled 1
1589 11:47:14.293638 APIC: 00: enabled 1
1590 11:47:14.295860 PCI: 00:00.0: enabled 1
1591 11:47:14.299405 PCI: 00:02.0: enabled 1
1592 11:47:14.302284 PCI: 00:04.0: enabled 0
1593 11:47:14.302757 PCI: 00:05.0: enabled 0
1594 11:47:14.305703 PCI: 00:12.0: enabled 1
1595 11:47:14.309413 PCI: 00:12.5: enabled 0
1596 11:47:14.312619 PCI: 00:12.6: enabled 0
1597 11:47:14.313222 PCI: 00:14.0: enabled 1
1598 11:47:14.315911 PCI: 00:14.1: enabled 0
1599 11:47:14.319350 PCI: 00:14.3: enabled 1
1600 11:47:14.319920 PCI: 00:14.5: enabled 0
1601 11:47:14.322606 PCI: 00:15.0: enabled 1
1602 11:47:14.325843 PCI: 00:15.1: enabled 1
1603 11:47:14.329301 PCI: 00:15.2: enabled 0
1604 11:47:14.329995 PCI: 00:15.3: enabled 0
1605 11:47:14.332141 PCI: 00:16.0: enabled 1
1606 11:47:14.336075 PCI: 00:16.1: enabled 0
1607 11:47:14.338635 PCI: 00:16.2: enabled 0
1608 11:47:14.339107 PCI: 00:16.3: enabled 0
1609 11:47:14.342973 PCI: 00:16.4: enabled 0
1610 11:47:14.345950 PCI: 00:16.5: enabled 0
1611 11:47:14.348663 PCI: 00:17.0: enabled 1
1612 11:47:14.349361 PCI: 00:19.0: enabled 1
1613 11:47:14.352410 PCI: 00:19.1: enabled 0
1614 11:47:14.355492 PCI: 00:19.2: enabled 0
1615 11:47:14.356069 PCI: 00:1a.0: enabled 0
1616 11:47:14.358766 PCI: 00:1c.0: enabled 0
1617 11:47:14.362023 PCI: 00:1c.1: enabled 0
1618 11:47:14.365740 PCI: 00:1c.2: enabled 0
1619 11:47:14.366323 PCI: 00:1c.3: enabled 0
1620 11:47:14.368558 PCI: 00:1c.4: enabled 0
1621 11:47:14.372176 PCI: 00:1c.5: enabled 0
1622 11:47:14.375105 PCI: 00:1c.6: enabled 0
1623 11:47:14.375586 PCI: 00:1c.7: enabled 0
1624 11:47:14.378687 PCI: 00:1d.0: enabled 1
1625 11:47:14.382030 PCI: 00:1d.1: enabled 0
1626 11:47:14.385427 PCI: 00:1d.2: enabled 0
1627 11:47:14.385929 PCI: 00:1d.3: enabled 0
1628 11:47:14.388314 PCI: 00:1d.4: enabled 0
1629 11:47:14.392265 PCI: 00:1d.5: enabled 0
1630 11:47:14.394950 PCI: 00:1e.0: enabled 1
1631 11:47:14.395449 PCI: 00:1e.1: enabled 0
1632 11:47:14.398552 PCI: 00:1e.2: enabled 1
1633 11:47:14.401907 PCI: 00:1e.3: enabled 1
1634 11:47:14.402498 PCI: 00:1f.0: enabled 1
1635 11:47:14.405667 PCI: 00:1f.1: enabled 0
1636 11:47:14.408688 PCI: 00:1f.2: enabled 0
1637 11:47:14.411576 PCI: 00:1f.3: enabled 1
1638 11:47:14.412058 PCI: 00:1f.4: enabled 1
1639 11:47:14.415020 PCI: 00:1f.5: enabled 1
1640 11:47:14.418481 PCI: 00:1f.6: enabled 0
1641 11:47:14.421799 USB0 port 0: enabled 1
1642 11:47:14.422364 I2C: 01:15: enabled 1
1643 11:47:14.425303 I2C: 02:5d: enabled 1
1644 11:47:14.428181 GENERIC: 0.0: enabled 1
1645 11:47:14.428749 I2C: 03:1a: enabled 1
1646 11:47:14.432063 I2C: 03:38: enabled 1
1647 11:47:14.435159 I2C: 03:39: enabled 1
1648 11:47:14.435720 I2C: 03:3a: enabled 1
1649 11:47:14.437962 I2C: 03:3b: enabled 1
1650 11:47:14.441201 PCI: 00:00.0: enabled 1
1651 11:47:14.441727 SPI: 00: enabled 1
1652 11:47:14.445242 SPI: 01: enabled 1
1653 11:47:14.448247 PNP: 0c09.0: enabled 1
1654 11:47:14.448828 USB2 port 0: enabled 1
1655 11:47:14.451085 USB2 port 1: enabled 1
1656 11:47:14.454653 USB2 port 2: enabled 0
1657 11:47:14.458293 USB2 port 3: enabled 0
1658 11:47:14.458853 USB2 port 5: enabled 0
1659 11:47:14.461577 USB2 port 6: enabled 1
1660 11:47:14.464729 USB2 port 9: enabled 1
1661 11:47:14.465298 USB3 port 0: enabled 1
1662 11:47:14.467824 USB3 port 1: enabled 1
1663 11:47:14.471295 USB3 port 2: enabled 1
1664 11:47:14.471810 USB3 port 3: enabled 1
1665 11:47:14.474561 USB3 port 4: enabled 0
1666 11:47:14.478076 APIC: 02: enabled 1
1667 11:47:14.478644 APIC: 07: enabled 1
1668 11:47:14.481585 APIC: 01: enabled 1
1669 11:47:14.484654 APIC: 03: enabled 1
1670 11:47:14.485131 APIC: 06: enabled 1
1671 11:47:14.487805 APIC: 05: enabled 1
1672 11:47:14.488371 APIC: 04: enabled 1
1673 11:47:14.491107 PCI: 00:08.0: enabled 1
1674 11:47:14.494286 PCI: 00:14.2: enabled 1
1675 11:47:14.497782 PCI: 01:00.0: enabled 1
1676 11:47:14.501666 Disabling ACPI via APMC:
1677 11:47:14.504815 done.
1678 11:47:14.507869 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1679 11:47:14.511018 ELOG: NV offset 0xaf0000 size 0x4000
1680 11:47:14.518072 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1681 11:47:14.524638 ELOG: Event(17) added with size 13 at 2023-04-03 11:47:13 UTC
1682 11:47:14.531443 ELOG: Event(92) added with size 9 at 2023-04-03 11:47:13 UTC
1683 11:47:14.537867 ELOG: Event(93) added with size 9 at 2023-04-03 11:47:13 UTC
1684 11:47:14.544355 ELOG: Event(9A) added with size 9 at 2023-04-03 11:47:13 UTC
1685 11:47:14.551014 ELOG: Event(9E) added with size 10 at 2023-04-03 11:47:13 UTC
1686 11:47:14.557574 ELOG: Event(9F) added with size 14 at 2023-04-03 11:47:13 UTC
1687 11:47:14.560922 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1688 11:47:14.568318 ELOG: Event(A1) added with size 10 at 2023-04-03 11:47:13 UTC
1689 11:47:14.578264 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1690 11:47:14.584959 ELOG: Event(A0) added with size 9 at 2023-04-03 11:47:13 UTC
1691 11:47:14.588215 elog_add_boot_reason: Logged dev mode boot
1692 11:47:14.591178 Finalize devices...
1693 11:47:14.591650 PCI: 00:17.0 final
1694 11:47:14.594948 Devices finalized
1695 11:47:14.598215 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1696 11:47:14.604349 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1697 11:47:14.607848 ME: HFSTS1 : 0x90000245
1698 11:47:14.611186 ME: HFSTS2 : 0x3B850126
1699 11:47:14.617975 ME: HFSTS3 : 0x00000020
1700 11:47:14.620902 ME: HFSTS4 : 0x00004800
1701 11:47:14.624295 ME: HFSTS5 : 0x00000000
1702 11:47:14.627751 ME: HFSTS6 : 0x40400006
1703 11:47:14.631037 ME: Manufacturing Mode : NO
1704 11:47:14.634852 ME: FW Partition Table : OK
1705 11:47:14.637731 ME: Bringup Loader Failure : NO
1706 11:47:14.640975 ME: Firmware Init Complete : YES
1707 11:47:14.644530 ME: Boot Options Present : NO
1708 11:47:14.647546 ME: Update In Progress : NO
1709 11:47:14.650996 ME: D0i3 Support : YES
1710 11:47:14.653989 ME: Low Power State Enabled : NO
1711 11:47:14.657571 ME: CPU Replaced : NO
1712 11:47:14.660571 ME: CPU Replacement Valid : YES
1713 11:47:14.664035 ME: Current Working State : 5
1714 11:47:14.667448 ME: Current Operation State : 1
1715 11:47:14.670860 ME: Current Operation Mode : 0
1716 11:47:14.674225 ME: Error Code : 0
1717 11:47:14.676972 ME: CPU Debug Disabled : YES
1718 11:47:14.680921 ME: TXT Support : NO
1719 11:47:14.687553 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1720 11:47:14.694036 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 11:47:14.694647 CBFS @ c08000 size 3f8000
1722 11:47:14.700438 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 11:47:14.704248 CBFS: Locating 'fallback/dsdt.aml'
1724 11:47:14.706983 CBFS: Found @ offset 10bb80 size 3fa5
1725 11:47:14.713876 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 11:47:14.717183 CBFS @ c08000 size 3f8000
1727 11:47:14.723612 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 11:47:14.724211 CBFS: Locating 'fallback/slic'
1729 11:47:14.729036 CBFS: 'fallback/slic' not found.
1730 11:47:14.735572 ACPI: Writing ACPI tables at 99b3e000.
1731 11:47:14.736149 ACPI: * FACS
1732 11:47:14.739086 ACPI: * DSDT
1733 11:47:14.742360 Ramoops buffer: 0x100000@0x99a3d000.
1734 11:47:14.745547 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1735 11:47:14.751882 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1736 11:47:14.755891 Google Chrome EC: version:
1737 11:47:14.758485 ro: helios_v2.0.2659-56403530b
1738 11:47:14.761916 rw: helios_v2.0.2849-c41de27e7d
1739 11:47:14.762394 running image: 1
1740 11:47:14.766229 ACPI: * FADT
1741 11:47:14.766709 SCI is IRQ9
1742 11:47:14.772831 ACPI: added table 1/32, length now 40
1743 11:47:14.773310 ACPI: * SSDT
1744 11:47:14.776406 Found 1 CPU(s) with 8 core(s) each.
1745 11:47:14.779524 Error: Could not locate 'wifi_sar' in VPD.
1746 11:47:14.786356 Checking CBFS for default SAR values
1747 11:47:14.789430 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1748 11:47:14.792881 CBFS @ c08000 size 3f8000
1749 11:47:14.800136 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1750 11:47:14.802685 CBFS: Locating 'wifi_sar_defaults.hex'
1751 11:47:14.806288 CBFS: Found @ offset 5fac0 size 77
1752 11:47:14.809310 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1753 11:47:14.816626 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1754 11:47:14.819590 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1755 11:47:14.825886 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1756 11:47:14.829843 failed to find key in VPD: dsm_calib_r0_0
1757 11:47:14.839437 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1758 11:47:14.842823 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1759 11:47:14.845843 failed to find key in VPD: dsm_calib_r0_1
1760 11:47:14.855581 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1761 11:47:14.862460 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1762 11:47:14.865322 failed to find key in VPD: dsm_calib_r0_2
1763 11:47:14.875532 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1764 11:47:14.878730 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1765 11:47:14.885619 failed to find key in VPD: dsm_calib_r0_3
1766 11:47:14.891975 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1767 11:47:14.898570 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1768 11:47:14.901932 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1769 11:47:14.905399 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1770 11:47:14.909615 EC returned error result code 1
1771 11:47:14.913017 EC returned error result code 1
1772 11:47:14.917052 EC returned error result code 1
1773 11:47:14.923522 PS2K: Bad resp from EC. Vivaldi disabled!
1774 11:47:14.926897 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1775 11:47:14.933332 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1776 11:47:14.939780 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1777 11:47:14.943489 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1778 11:47:14.950034 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1779 11:47:14.956606 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1780 11:47:14.962898 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1781 11:47:14.966105 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1782 11:47:14.972922 ACPI: added table 2/32, length now 44
1783 11:47:14.973545 ACPI: * MCFG
1784 11:47:14.976321 ACPI: added table 3/32, length now 48
1785 11:47:14.979894 ACPI: * TPM2
1786 11:47:14.982822 TPM2 log created at 99a2d000
1787 11:47:14.986306 ACPI: added table 4/32, length now 52
1788 11:47:14.986795 ACPI: * MADT
1789 11:47:14.989575 SCI is IRQ9
1790 11:47:14.992975 ACPI: added table 5/32, length now 56
1791 11:47:14.993445 current = 99b43ac0
1792 11:47:14.996460 ACPI: * DMAR
1793 11:47:14.999857 ACPI: added table 6/32, length now 60
1794 11:47:15.002877 ACPI: * IGD OpRegion
1795 11:47:15.003451 GMA: Found VBT in CBFS
1796 11:47:15.005997 GMA: Found valid VBT in CBFS
1797 11:47:15.009888 ACPI: added table 7/32, length now 64
1798 11:47:15.012859 ACPI: * HPET
1799 11:47:15.016374 ACPI: added table 8/32, length now 68
1800 11:47:15.016950 ACPI: done.
1801 11:47:15.019926 ACPI tables: 31744 bytes.
1802 11:47:15.023254 smbios_write_tables: 99a2c000
1803 11:47:15.026610 EC returned error result code 3
1804 11:47:15.030397 Couldn't obtain OEM name from CBI
1805 11:47:15.033423 Create SMBIOS type 17
1806 11:47:15.036480 PCI: 00:00.0 (Intel Cannonlake)
1807 11:47:15.039654 PCI: 00:14.3 (Intel WiFi)
1808 11:47:15.043510 SMBIOS tables: 939 bytes.
1809 11:47:15.046356 Writing table forward entry at 0x00000500
1810 11:47:15.053687 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1811 11:47:15.056431 Writing coreboot table at 0x99b62000
1812 11:47:15.062841 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1813 11:47:15.066198 1. 0000000000001000-000000000009ffff: RAM
1814 11:47:15.069617 2. 00000000000a0000-00000000000fffff: RESERVED
1815 11:47:15.076488 3. 0000000000100000-0000000099a2bfff: RAM
1816 11:47:15.079946 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1817 11:47:15.086368 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1818 11:47:15.092706 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1819 11:47:15.095869 7. 000000009a000000-000000009f7fffff: RESERVED
1820 11:47:15.102530 8. 00000000e0000000-00000000efffffff: RESERVED
1821 11:47:15.106111 9. 00000000fc000000-00000000fc000fff: RESERVED
1822 11:47:15.109104 10. 00000000fe000000-00000000fe00ffff: RESERVED
1823 11:47:15.116222 11. 00000000fed10000-00000000fed17fff: RESERVED
1824 11:47:15.119257 12. 00000000fed80000-00000000fed83fff: RESERVED
1825 11:47:15.126016 13. 00000000fed90000-00000000fed91fff: RESERVED
1826 11:47:15.129116 14. 00000000feda0000-00000000feda1fff: RESERVED
1827 11:47:15.132947 15. 0000000100000000-000000045e7fffff: RAM
1828 11:47:15.138922 Graphics framebuffer located at 0xc0000000
1829 11:47:15.142359 Passing 5 GPIOs to payload:
1830 11:47:15.145999 NAME | PORT | POLARITY | VALUE
1831 11:47:15.152572 write protect | undefined | high | low
1832 11:47:15.155707 lid | undefined | high | high
1833 11:47:15.162277 power | undefined | high | low
1834 11:47:15.168694 oprom | undefined | high | low
1835 11:47:15.171813 EC in RW | 0x000000cb | high | low
1836 11:47:15.175502 Board ID: 4
1837 11:47:15.178857 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1838 11:47:15.182103 CBFS @ c08000 size 3f8000
1839 11:47:15.188390 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1840 11:47:15.191992 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1841 11:47:15.195302 coreboot table: 1492 bytes.
1842 11:47:15.198519 IMD ROOT 0. 99fff000 00001000
1843 11:47:15.202163 IMD SMALL 1. 99ffe000 00001000
1844 11:47:15.205059 FSP MEMORY 2. 99c4e000 003b0000
1845 11:47:15.209009 CONSOLE 3. 99c2e000 00020000
1846 11:47:15.211903 FMAP 4. 99c2d000 0000054e
1847 11:47:15.215088 TIME STAMP 5. 99c2c000 00000910
1848 11:47:15.218368 VBOOT WORK 6. 99c18000 00014000
1849 11:47:15.222040 MRC DATA 7. 99c16000 00001958
1850 11:47:15.225214 ROMSTG STCK 8. 99c15000 00001000
1851 11:47:15.228142 AFTER CAR 9. 99c0b000 0000a000
1852 11:47:15.231980 RAMSTAGE 10. 99baf000 0005c000
1853 11:47:15.235171 REFCODE 11. 99b7a000 00035000
1854 11:47:15.238358 SMM BACKUP 12. 99b6a000 00010000
1855 11:47:15.241841 COREBOOT 13. 99b62000 00008000
1856 11:47:15.244895 ACPI 14. 99b3e000 00024000
1857 11:47:15.248553 ACPI GNVS 15. 99b3d000 00001000
1858 11:47:15.251770 RAMOOPS 16. 99a3d000 00100000
1859 11:47:15.255289 TPM2 TCGLOG17. 99a2d000 00010000
1860 11:47:15.257809 SMBIOS 18. 99a2c000 00000800
1861 11:47:15.261589 IMD small region:
1862 11:47:15.265206 IMD ROOT 0. 99ffec00 00000400
1863 11:47:15.268133 FSP RUNTIME 1. 99ffebe0 00000004
1864 11:47:15.271226 EC HOSTEVENT 2. 99ffebc0 00000008
1865 11:47:15.274307 POWER STATE 3. 99ffeb80 00000040
1866 11:47:15.277875 ROMSTAGE 4. 99ffeb60 00000004
1867 11:47:15.281016 MEM INFO 5. 99ffe9a0 000001b9
1868 11:47:15.287785 VPD 6. 99ffe920 0000006c
1869 11:47:15.288388 MTRR: Physical address space:
1870 11:47:15.294190 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1871 11:47:15.301099 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1872 11:47:15.307716 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1873 11:47:15.314140 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1874 11:47:15.321212 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1875 11:47:15.327194 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1876 11:47:15.333997 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1877 11:47:15.337706 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 11:47:15.340678 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 11:47:15.344078 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 11:47:15.350846 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 11:47:15.353890 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 11:47:15.357666 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 11:47:15.360766 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 11:47:15.367194 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 11:47:15.370250 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 11:47:15.374068 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 11:47:15.377637 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 11:47:15.380996 call enable_fixed_mtrr()
1889 11:47:15.383621 CPU physical address size: 39 bits
1890 11:47:15.390660 MTRR: default type WB/UC MTRR counts: 6/8.
1891 11:47:15.393982 MTRR: WB selected as default type.
1892 11:47:15.400298 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1893 11:47:15.403474 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1894 11:47:15.410422 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1895 11:47:15.416781 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1896 11:47:15.423667 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1897 11:47:15.430592 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1898 11:47:15.433776 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 11:47:15.440055 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 11:47:15.443268 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 11:47:15.446918 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 11:47:15.450533 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 11:47:15.456572 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 11:47:15.460389 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 11:47:15.463408 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 11:47:15.466433 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 11:47:15.473372 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 11:47:15.476916 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 11:47:15.477523
1910 11:47:15.477909 MTRR check
1911 11:47:15.480222 Fixed MTRRs : Enabled
1912 11:47:15.482908 Variable MTRRs: Enabled
1913 11:47:15.483381
1914 11:47:15.486438 call enable_fixed_mtrr()
1915 11:47:15.489549 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1916 11:47:15.492943 CPU physical address size: 39 bits
1917 11:47:15.499746 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1918 11:47:15.503502 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 11:47:15.506473 MTRR: Fixed MSR 0x258 0x0606060606060606
1920 11:47:15.513072 MTRR: Fixed MSR 0x259 0x0000000000000000
1921 11:47:15.516707 MTRR: Fixed MSR 0x268 0x0606060606060606
1922 11:47:15.520082 MTRR: Fixed MSR 0x269 0x0606060606060606
1923 11:47:15.523525 MTRR: Fixed MSR 0x26a 0x0606060606060606
1924 11:47:15.526773 MTRR: Fixed MSR 0x26b 0x0606060606060606
1925 11:47:15.533367 MTRR: Fixed MSR 0x26c 0x0606060606060606
1926 11:47:15.536267 MTRR: Fixed MSR 0x26d 0x0606060606060606
1927 11:47:15.539357 MTRR: Fixed MSR 0x26e 0x0606060606060606
1928 11:47:15.542857 MTRR: Fixed MSR 0x26f 0x0606060606060606
1929 11:47:15.549181 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 11:47:15.552910 call enable_fixed_mtrr()
1931 11:47:15.555631 MTRR: Fixed MSR 0x258 0x0606060606060606
1932 11:47:15.559225 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 11:47:15.562378 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 11:47:15.569079 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 11:47:15.572111 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 11:47:15.575449 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 11:47:15.579128 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 11:47:15.585442 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 11:47:15.588819 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 11:47:15.592497 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 11:47:15.595352 CPU physical address size: 39 bits
1942 11:47:15.598882 call enable_fixed_mtrr()
1943 11:47:15.602412 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 11:47:15.609223 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 11:47:15.612080 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 11:47:15.615432 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 11:47:15.618695 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 11:47:15.622035 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 11:47:15.629721 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 11:47:15.631876 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 11:47:15.634857 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 11:47:15.638868 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 11:47:15.645034 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 11:47:15.648478 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 11:47:15.652109 call enable_fixed_mtrr()
1956 11:47:15.655146 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 11:47:15.658714 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 11:47:15.661701 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 11:47:15.668316 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 11:47:15.671632 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 11:47:15.674506 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 11:47:15.677998 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 11:47:15.684922 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 11:47:15.688361 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 11:47:15.691337 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 11:47:15.695117 CPU physical address size: 39 bits
1967 11:47:15.698719 call enable_fixed_mtrr()
1968 11:47:15.701604 CBFS @ c08000 size 3f8000
1969 11:47:15.708068 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1970 11:47:15.711475 CBFS: Locating 'fallback/payload'
1971 11:47:15.714822 CPU physical address size: 39 bits
1972 11:47:15.717908 MTRR: Fixed MSR 0x250 0x0606060606060606
1973 11:47:15.721574 MTRR: Fixed MSR 0x258 0x0606060606060606
1974 11:47:15.724908 MTRR: Fixed MSR 0x259 0x0000000000000000
1975 11:47:15.731644 MTRR: Fixed MSR 0x268 0x0606060606060606
1976 11:47:15.735299 MTRR: Fixed MSR 0x269 0x0606060606060606
1977 11:47:15.737947 MTRR: Fixed MSR 0x26a 0x0606060606060606
1978 11:47:15.741697 MTRR: Fixed MSR 0x26b 0x0606060606060606
1979 11:47:15.747973 MTRR: Fixed MSR 0x26c 0x0606060606060606
1980 11:47:15.750966 MTRR: Fixed MSR 0x26d 0x0606060606060606
1981 11:47:15.754369 MTRR: Fixed MSR 0x26e 0x0606060606060606
1982 11:47:15.757643 MTRR: Fixed MSR 0x26f 0x0606060606060606
1983 11:47:15.764524 MTRR: Fixed MSR 0x250 0x0606060606060606
1984 11:47:15.765088 call enable_fixed_mtrr()
1985 11:47:15.771255 MTRR: Fixed MSR 0x258 0x0606060606060606
1986 11:47:15.774464 MTRR: Fixed MSR 0x259 0x0000000000000000
1987 11:47:15.777757 MTRR: Fixed MSR 0x268 0x0606060606060606
1988 11:47:15.781121 MTRR: Fixed MSR 0x269 0x0606060606060606
1989 11:47:15.784522 MTRR: Fixed MSR 0x26a 0x0606060606060606
1990 11:47:15.791094 MTRR: Fixed MSR 0x26b 0x0606060606060606
1991 11:47:15.794477 MTRR: Fixed MSR 0x26c 0x0606060606060606
1992 11:47:15.797778 MTRR: Fixed MSR 0x26d 0x0606060606060606
1993 11:47:15.800769 MTRR: Fixed MSR 0x26e 0x0606060606060606
1994 11:47:15.807657 MTRR: Fixed MSR 0x26f 0x0606060606060606
1995 11:47:15.810946 CPU physical address size: 39 bits
1996 11:47:15.814111 call enable_fixed_mtrr()
1997 11:47:15.817823 CPU physical address size: 39 bits
1998 11:47:15.821136 CBFS: Found @ offset 1c96c0 size 3f798
1999 11:47:15.824090 CPU physical address size: 39 bits
2000 11:47:15.827783 Checking segment from ROM address 0xffdd16f8
2001 11:47:15.834335 Checking segment from ROM address 0xffdd1714
2002 11:47:15.837442 Loading segment from ROM address 0xffdd16f8
2003 11:47:15.840828 code (compression=0)
2004 11:47:15.847228 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2005 11:47:15.857440 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2006 11:47:15.860858 it's not compressed!
2007 11:47:15.951506 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2008 11:47:15.958133 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2009 11:47:15.960965 Loading segment from ROM address 0xffdd1714
2010 11:47:15.964452 Entry Point 0x30000000
2011 11:47:15.967756 Loaded segments
2012 11:47:15.973548 Finalizing chipset.
2013 11:47:15.976911 Finalizing SMM.
2014 11:47:15.980364 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2015 11:47:15.983275 mp_park_aps done after 0 msecs.
2016 11:47:15.989932 Jumping to boot code at 30000000(99b62000)
2017 11:47:15.996691 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2018 11:47:15.997270
2019 11:47:15.997685
2020 11:47:15.998050
2021 11:47:16.000491 Starting depthcharge on Helios...
2022 11:47:16.001060
2023 11:47:16.002214 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2024 11:47:16.002782 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2025 11:47:16.003250 Setting prompt string to ['hatch:']
2026 11:47:16.003714 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2027 11:47:16.010214 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2028 11:47:16.010796
2029 11:47:16.016406 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2030 11:47:16.016973
2031 11:47:16.023121 board_setup: Info: eMMC controller not present; skipping
2032 11:47:16.023703
2033 11:47:16.026139 New NVMe Controller 0x30053ac0 @ 00:1d:00
2034 11:47:16.026611
2035 11:47:16.033191 board_setup: Info: SDHCI controller not present; skipping
2036 11:47:16.033800
2037 11:47:16.040054 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2038 11:47:16.040654
2039 11:47:16.041030 Wipe memory regions:
2040 11:47:16.041377
2041 11:47:16.042874 [0x00000000001000, 0x000000000a0000)
2042 11:47:16.043364
2043 11:47:16.046232 [0x00000000100000, 0x00000030000000)
2044 11:47:16.112509
2045 11:47:16.115207 [0x00000030657430, 0x00000099a2c000)
2046 11:47:16.252564
2047 11:47:16.255919 [0x00000100000000, 0x0000045e800000)
2048 11:47:17.638470
2049 11:47:17.639042 R8152: Initializing
2050 11:47:17.639417
2051 11:47:17.641828 Version 9 (ocp_data = 6010)
2052 11:47:17.645869
2053 11:47:17.646443 R8152: Done initializing
2054 11:47:17.646817
2055 11:47:17.649336 Adding net device
2056 11:47:18.258603
2057 11:47:18.259173 R8152: Initializing
2058 11:47:18.259539
2059 11:47:18.262056 Version 6 (ocp_data = 5c30)
2060 11:47:18.262512
2061 11:47:18.265016 R8152: Done initializing
2062 11:47:18.265094
2063 11:47:18.268739 net_add_device: Attemp to include the same device
2064 11:47:18.272387
2065 11:47:18.278770 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2066 11:47:18.278932
2067 11:47:18.279005
2068 11:47:18.279072
2069 11:47:18.279372 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2071 11:47:18.380449 hatch: tftpboot 192.168.201.1 9849724/tftp-deploy-wesinwtl/kernel/bzImage 9849724/tftp-deploy-wesinwtl/kernel/cmdline 9849724/tftp-deploy-wesinwtl/ramdisk/ramdisk.cpio.gz
2072 11:47:18.381117 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2073 11:47:18.381698 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2074 11:47:18.386350 tftpboot 192.168.201.1 9849724/tftp-deploy-wesinwtl/kernel/bzImoy-wesinwtl/kernel/cmdline 9849724/tftp-deploy-wesinwtl/ramdisk/ramdisk.cpio.gz
2075 11:47:18.386814
2076 11:47:18.387178 Waiting for link
2077 11:47:18.586869
2078 11:47:18.587506 done.
2079 11:47:18.587937
2080 11:47:18.588303 MAC: 00:24:32:50:1a:5f
2081 11:47:18.588652
2082 11:47:18.589963 Sending DHCP discover... done.
2083 11:47:18.590441
2084 11:47:18.593444 Waiting for reply... done.
2085 11:47:18.594070
2086 11:47:18.596720 Sending DHCP request... done.
2087 11:47:18.597214
2088 11:47:18.600438 Waiting for reply... done.
2089 11:47:18.601180
2090 11:47:18.603522 My ip is 192.168.201.21
2091 11:47:18.603998
2092 11:47:18.607058 The DHCP server ip is 192.168.201.1
2093 11:47:18.607541
2094 11:47:18.610148 TFTP server IP predefined by user: 192.168.201.1
2095 11:47:18.610627
2096 11:47:18.616703 Bootfile predefined by user: 9849724/tftp-deploy-wesinwtl/kernel/bzImage
2097 11:47:18.617294
2098 11:47:18.619883 Sending tftp read request... done.
2099 11:47:18.620466
2100 11:47:18.629581 Waiting for the transfer...
2101 11:47:18.630208
2102 11:47:19.353439 00000000 ################################################################
2103 11:47:19.354078
2104 11:47:20.044294 00080000 ################################################################
2105 11:47:20.044903
2106 11:47:20.753448 00100000 ################################################################
2107 11:47:20.754080
2108 11:47:21.460128 00180000 ################################################################
2109 11:47:21.460757
2110 11:47:22.137588 00200000 ################################################################
2111 11:47:22.138111
2112 11:47:22.835095 00280000 ################################################################
2113 11:47:22.835696
2114 11:47:23.546977 00300000 ################################################################
2115 11:47:23.547544
2116 11:47:24.237604 00380000 ################################################################
2117 11:47:24.238181
2118 11:47:24.938950 00400000 ################################################################
2119 11:47:24.939479
2120 11:47:25.622535 00480000 ################################################################
2121 11:47:25.623140
2122 11:47:26.338208 00500000 ################################################################
2123 11:47:26.338806
2124 11:47:27.020360 00580000 ################################################################
2125 11:47:27.021119
2126 11:47:27.701497 00600000 ################################################################
2127 11:47:27.702073
2128 11:47:28.420634 00680000 ################################################################
2129 11:47:28.421256
2130 11:47:29.140415 00700000 ################################################################
2131 11:47:29.140988
2132 11:47:29.162919 00780000 ## done.
2133 11:47:29.163481
2134 11:47:29.166588 The bootfile was 7880592 bytes long.
2135 11:47:29.167072
2136 11:47:29.169551 Sending tftp read request... done.
2137 11:47:29.170019
2138 11:47:29.172791 Waiting for the transfer...
2139 11:47:29.173259
2140 11:47:29.834041 00000000 ################################################################
2141 11:47:29.834582
2142 11:47:30.493761 00080000 ################################################################
2143 11:47:30.494276
2144 11:47:31.172494 00100000 ################################################################
2145 11:47:31.173029
2146 11:47:31.827996 00180000 ################################################################
2147 11:47:31.828515
2148 11:47:32.501459 00200000 ################################################################
2149 11:47:32.502084
2150 11:47:33.149055 00280000 ################################################################
2151 11:47:33.149603
2152 11:47:33.822078 00300000 ################################################################
2153 11:47:33.822226
2154 11:47:34.463789 00380000 ################################################################
2155 11:47:34.463944
2156 11:47:35.106568 00400000 ################################################################
2157 11:47:35.106743
2158 11:47:35.760206 00480000 ################################################################
2159 11:47:35.760737
2160 11:47:36.416572 00500000 ############################################################### done.
2161 11:47:36.417091
2162 11:47:36.419475 Sending tftp read request... done.
2163 11:47:36.419904
2164 11:47:36.423162 Waiting for the transfer...
2165 11:47:36.423588
2166 11:47:36.423925 00000000 # done.
2167 11:47:36.424256
2168 11:47:36.432514 Command line loaded dynamically from TFTP file: 9849724/tftp-deploy-wesinwtl/kernel/cmdline
2169 11:47:36.433083
2170 11:47:36.459319 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9849724/extract-nfsrootfs-kte8e1zo,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2171 11:47:36.459910
2172 11:47:36.465511 ec_init(0): CrosEC protocol v3 supported (256, 256)
2173 11:47:36.469147
2174 11:47:36.472339 Shutting down all USB controllers.
2175 11:47:36.472812
2176 11:47:36.473186 Removing current net device
2177 11:47:36.480216
2178 11:47:36.480813 Finalizing coreboot
2179 11:47:36.481200
2180 11:47:36.486582 Exiting depthcharge with code 4 at timestamp: 27827659
2181 11:47:36.487057
2182 11:47:36.487430
2183 11:47:36.487780 Starting kernel ...
2184 11:47:36.488118
2185 11:47:36.489357 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2186 11:47:36.489928 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2187 11:47:36.490344 Setting prompt string to ['Linux version [0-9]']
2188 11:47:36.490733 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2189 11:47:36.491194 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2190 11:47:36.492103
2192 11:51:57.490859 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2194 11:51:57.492028 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2196 11:51:57.492898 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2199 11:51:57.494650 end: 2 depthcharge-action (duration 00:05:00) [common]
2201 11:51:57.495750 Cleaning after the job
2202 11:51:57.495836 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849724/tftp-deploy-wesinwtl/ramdisk
2203 11:51:57.496419 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849724/tftp-deploy-wesinwtl/kernel
2204 11:51:57.497099 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849724/tftp-deploy-wesinwtl/nfsrootfs
2205 11:51:57.545850 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849724/tftp-deploy-wesinwtl/modules
2206 11:51:57.546231 start: 4.1 power-off (timeout 00:00:30) [common]
2207 11:51:57.546397 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2208 11:51:57.624024 >> Command sent successfully.
2209 11:51:57.629163 Returned 0 in 0 seconds
2210 11:51:57.730658 end: 4.1 power-off (duration 00:00:00) [common]
2212 11:51:57.732538 start: 4.2 read-feedback (timeout 00:10:00) [common]
2213 11:51:57.733891 Listened to connection for namespace 'common' for up to 1s
2215 11:51:57.735271 Listened to connection for namespace 'common' for up to 1s
2216 11:51:58.737800 Finalising connection for namespace 'common'
2217 11:51:58.738525 Disconnecting from shell: Finalise
2218 11:51:58.738997
2219 11:51:58.840594 end: 4.2 read-feedback (duration 00:00:01) [common]
2220 11:51:58.841221 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9849724
2221 11:51:59.034874 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9849724
2222 11:51:59.035073 JobError: Your job cannot terminate cleanly.