Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 11:44:05.094150 lava-dispatcher, installed at version: 2023.01
2 11:44:05.094341 start: 0 validate
3 11:44:05.094471 Start time: 2023-04-03 11:44:05.094462+00:00 (UTC)
4 11:44:05.094602 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:44:05.094742 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230324.0%2Famd64%2Finitrd.cpio.gz exists
6 11:44:05.399982 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:44:05.400673 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1098-g8d34bf42efd9b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:44:05.692500 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:44:05.693136 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230324.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:44:05.987201 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:44:05.987849 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1098-g8d34bf42efd9b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 11:44:06.285030 validate duration: 1.19
14 11:44:06.285416 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:44:06.285542 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:44:06.285654 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:44:06.285764 Not decompressing ramdisk as can be used compressed.
18 11:44:06.285859 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230324.0/amd64/initrd.cpio.gz
19 11:44:06.285937 saving as /var/lib/lava/dispatcher/tmp/9849714/tftp-deploy-4slgp0dr/ramdisk/initrd.cpio.gz
20 11:44:06.286007 total size: 5672882 (5MB)
21 11:44:06.286948 progress 0% (0MB)
22 11:44:06.288626 progress 5% (0MB)
23 11:44:06.290389 progress 10% (0MB)
24 11:44:06.291973 progress 15% (0MB)
25 11:44:06.293735 progress 20% (1MB)
26 11:44:06.295512 progress 25% (1MB)
27 11:44:06.297094 progress 30% (1MB)
28 11:44:06.298842 progress 35% (1MB)
29 11:44:06.300580 progress 40% (2MB)
30 11:44:06.302141 progress 45% (2MB)
31 11:44:06.303887 progress 50% (2MB)
32 11:44:06.305609 progress 55% (3MB)
33 11:44:06.307210 progress 60% (3MB)
34 11:44:06.309011 progress 65% (3MB)
35 11:44:06.310751 progress 70% (3MB)
36 11:44:06.312313 progress 75% (4MB)
37 11:44:06.314069 progress 80% (4MB)
38 11:44:06.315687 progress 85% (4MB)
39 11:44:06.317119 progress 90% (4MB)
40 11:44:06.318714 progress 95% (5MB)
41 11:44:06.320342 progress 100% (5MB)
42 11:44:06.320468 5MB downloaded in 0.03s (157.01MB/s)
43 11:44:06.320628 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:44:06.320898 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:44:06.320998 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:44:06.321094 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:44:06.321213 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1098-g8d34bf42efd9b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 11:44:06.321290 saving as /var/lib/lava/dispatcher/tmp/9849714/tftp-deploy-4slgp0dr/kernel/bzImage
50 11:44:06.321359 total size: 7880592 (7MB)
51 11:44:06.321425 No compression specified
52 11:44:06.322397 progress 0% (0MB)
53 11:44:06.324605 progress 5% (0MB)
54 11:44:06.326741 progress 10% (0MB)
55 11:44:06.328903 progress 15% (1MB)
56 11:44:06.331036 progress 20% (1MB)
57 11:44:06.333176 progress 25% (1MB)
58 11:44:06.335313 progress 30% (2MB)
59 11:44:06.337438 progress 35% (2MB)
60 11:44:06.339573 progress 40% (3MB)
61 11:44:06.341698 progress 45% (3MB)
62 11:44:06.343835 progress 50% (3MB)
63 11:44:06.345926 progress 55% (4MB)
64 11:44:06.348023 progress 60% (4MB)
65 11:44:06.350115 progress 65% (4MB)
66 11:44:06.352207 progress 70% (5MB)
67 11:44:06.354289 progress 75% (5MB)
68 11:44:06.356394 progress 80% (6MB)
69 11:44:06.358483 progress 85% (6MB)
70 11:44:06.360577 progress 90% (6MB)
71 11:44:06.362663 progress 95% (7MB)
72 11:44:06.364782 progress 100% (7MB)
73 11:44:06.364964 7MB downloaded in 0.04s (172.37MB/s)
74 11:44:06.365120 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:44:06.365384 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:44:06.365484 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:44:06.365579 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:44:06.365695 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230324.0/amd64/full.rootfs.tar.xz
80 11:44:06.365772 saving as /var/lib/lava/dispatcher/tmp/9849714/tftp-deploy-4slgp0dr/nfsrootfs/full.rootfs.tar
81 11:44:06.365841 total size: 125966032 (120MB)
82 11:44:06.365909 Using unxz to decompress xz
83 11:44:06.369266 progress 0% (0MB)
84 11:44:06.863902 progress 5% (6MB)
85 11:44:07.366300 progress 10% (12MB)
86 11:44:07.873221 progress 15% (18MB)
87 11:44:08.383609 progress 20% (24MB)
88 11:44:08.755113 progress 25% (30MB)
89 11:44:09.131503 progress 30% (36MB)
90 11:44:09.434837 progress 35% (42MB)
91 11:44:09.653968 progress 40% (48MB)
92 11:44:10.048972 progress 45% (54MB)
93 11:44:10.448478 progress 50% (60MB)
94 11:44:10.822592 progress 55% (66MB)
95 11:44:11.211265 progress 60% (72MB)
96 11:44:11.578079 progress 65% (78MB)
97 11:44:11.997552 progress 70% (84MB)
98 11:44:12.455344 progress 75% (90MB)
99 11:44:12.912558 progress 80% (96MB)
100 11:44:13.019570 progress 85% (102MB)
101 11:44:13.191441 progress 90% (108MB)
102 11:44:13.555365 progress 95% (114MB)
103 11:44:13.965748 progress 100% (120MB)
104 11:44:13.971338 120MB downloaded in 7.61s (15.80MB/s)
105 11:44:13.971654 end: 1.3.1 http-download (duration 00:00:08) [common]
107 11:44:13.971947 end: 1.3 download-retry (duration 00:00:08) [common]
108 11:44:13.972052 start: 1.4 download-retry (timeout 00:09:52) [common]
109 11:44:13.972150 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 11:44:13.972278 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1098-g8d34bf42efd9b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 11:44:13.972357 saving as /var/lib/lava/dispatcher/tmp/9849714/tftp-deploy-4slgp0dr/modules/modules.tar
112 11:44:13.972427 total size: 251104 (0MB)
113 11:44:13.972496 Using unxz to decompress xz
114 11:44:13.975716 progress 13% (0MB)
115 11:44:13.976115 progress 26% (0MB)
116 11:44:13.976376 progress 39% (0MB)
117 11:44:13.977874 progress 52% (0MB)
118 11:44:13.980040 progress 65% (0MB)
119 11:44:13.982054 progress 78% (0MB)
120 11:44:13.984205 progress 91% (0MB)
121 11:44:13.986254 progress 100% (0MB)
122 11:44:13.992274 0MB downloaded in 0.02s (12.07MB/s)
123 11:44:13.992540 end: 1.4.1 http-download (duration 00:00:00) [common]
125 11:44:13.992837 end: 1.4 download-retry (duration 00:00:00) [common]
126 11:44:13.992950 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 11:44:13.993064 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 11:44:15.849437 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9849714/extract-nfsrootfs-vlyae_8a
129 11:44:15.849660 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 11:44:15.849780 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 11:44:15.849932 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7
132 11:44:15.850051 makedir: /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin
133 11:44:15.850148 makedir: /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/tests
134 11:44:15.850242 makedir: /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/results
135 11:44:15.850353 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-add-keys
136 11:44:15.850514 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-add-sources
137 11:44:15.850665 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-background-process-start
138 11:44:15.850800 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-background-process-stop
139 11:44:15.850931 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-common-functions
140 11:44:15.851058 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-echo-ipv4
141 11:44:15.851193 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-install-packages
142 11:44:15.851321 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-installed-packages
143 11:44:15.851446 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-os-build
144 11:44:15.851571 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-probe-channel
145 11:44:15.851701 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-probe-ip
146 11:44:15.851826 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-target-ip
147 11:44:15.851950 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-target-mac
148 11:44:15.852074 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-target-storage
149 11:44:15.852203 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-test-case
150 11:44:15.852328 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-test-event
151 11:44:15.852452 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-test-feedback
152 11:44:15.852578 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-test-raise
153 11:44:15.852701 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-test-reference
154 11:44:15.852826 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-test-runner
155 11:44:15.852952 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-test-set
156 11:44:15.853084 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-test-shell
157 11:44:15.853211 Updating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-install-packages (oe)
158 11:44:15.853340 Updating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/bin/lava-installed-packages (oe)
159 11:44:15.853451 Creating /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/environment
160 11:44:15.853549 LAVA metadata
161 11:44:15.853627 - LAVA_JOB_ID=9849714
162 11:44:15.853699 - LAVA_DISPATCHER_IP=192.168.201.1
163 11:44:15.853808 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 11:44:15.853881 skipped lava-vland-overlay
165 11:44:15.853967 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 11:44:15.854061 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 11:44:15.854131 skipped lava-multinode-overlay
168 11:44:15.854214 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 11:44:15.854304 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 11:44:15.854384 Loading test definitions
171 11:44:15.854484 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
172 11:44:15.854561 Using /lava-9849714 at stage 0
173 11:44:15.854666 Fetching tests from https://github.com/kernelci/test-definitions
174 11:44:15.854753 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/0/tests/0_ltp-mm'
175 11:44:18.937365 Running '/usr/bin/git checkout kernelci.org
176 11:44:19.088240 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
177 11:44:19.089061 uuid=9849714_1.5.2.3.1 testdef=None
178 11:44:19.089236 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
180 11:44:19.089518 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
181 11:44:19.090408 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 11:44:19.090686 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
184 11:44:19.091836 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 11:44:19.092119 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
187 11:44:19.093212 runner path: /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/0/tests/0_ltp-mm test_uuid 9849714_1.5.2.3.1
188 11:44:19.093319 SKIPFILE='skipfile-lkft.yaml'
189 11:44:19.093395 SKIP_INSTALL='true'
190 11:44:19.093466 TST_CMDFILES='mm'
191 11:44:19.093622 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 11:44:19.093868 Creating lava-test-runner.conf files
194 11:44:19.093942 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9849714/lava-overlay-xw6qbnv7/lava-9849714/0 for stage 0
195 11:44:19.094039 - 0_ltp-mm
196 11:44:19.094151 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
197 11:44:19.094254 start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
198 11:44:27.445668 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
199 11:44:27.445848 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
200 11:44:27.445959 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
201 11:44:27.446074 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
202 11:44:27.446178 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
203 11:44:27.563507 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
204 11:44:27.563903 start: 1.5.4 extract-modules (timeout 00:09:39) [common]
205 11:44:27.564038 extracting modules file /var/lib/lava/dispatcher/tmp/9849714/tftp-deploy-4slgp0dr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9849714/extract-nfsrootfs-vlyae_8a
206 11:44:27.572546 extracting modules file /var/lib/lava/dispatcher/tmp/9849714/tftp-deploy-4slgp0dr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9849714/extract-overlay-ramdisk-oakjlg5c/ramdisk
207 11:44:27.580558 end: 1.5.4 extract-modules (duration 00:00:00) [common]
208 11:44:27.580685 start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
209 11:44:27.580781 [common] Applying overlay to NFS
210 11:44:27.580861 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9849714/compress-overlay-1lzpxdxr/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9849714/extract-nfsrootfs-vlyae_8a
211 11:44:28.446682 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
212 11:44:28.446876 start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
213 11:44:28.446991 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
214 11:44:28.447105 start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
215 11:44:28.447205 Building ramdisk /var/lib/lava/dispatcher/tmp/9849714/extract-overlay-ramdisk-oakjlg5c/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9849714/extract-overlay-ramdisk-oakjlg5c/ramdisk
216 11:44:28.487286 >> 27177 blocks
217 11:44:29.060080 rename /var/lib/lava/dispatcher/tmp/9849714/extract-overlay-ramdisk-oakjlg5c/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9849714/tftp-deploy-4slgp0dr/ramdisk/ramdisk.cpio.gz
218 11:44:29.060540 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
219 11:44:29.060693 start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
220 11:44:29.060814 start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
221 11:44:29.060921 No mkimage arch provided, not using FIT.
222 11:44:29.061021 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
223 11:44:29.061121 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
224 11:44:29.061235 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
225 11:44:29.061342 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
226 11:44:29.061432 No LXC device requested
227 11:44:29.061526 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
228 11:44:29.061630 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
229 11:44:29.061728 end: 1.7 deploy-device-env (duration 00:00:00) [common]
230 11:44:29.061809 Checking files for TFTP limit of 4294967296 bytes.
231 11:44:29.062230 end: 1 tftp-deploy (duration 00:00:23) [common]
232 11:44:29.062350 start: 2 depthcharge-action (timeout 00:05:00) [common]
233 11:44:29.062458 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
234 11:44:29.062611 substitutions:
235 11:44:29.062692 - {DTB}: None
236 11:44:29.062766 - {INITRD}: 9849714/tftp-deploy-4slgp0dr/ramdisk/ramdisk.cpio.gz
237 11:44:29.062837 - {KERNEL}: 9849714/tftp-deploy-4slgp0dr/kernel/bzImage
238 11:44:29.062906 - {LAVA_MAC}: None
239 11:44:29.062975 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9849714/extract-nfsrootfs-vlyae_8a
240 11:44:29.063042 - {NFS_SERVER_IP}: 192.168.201.1
241 11:44:29.063120 - {PRESEED_CONFIG}: None
242 11:44:29.063189 - {PRESEED_LOCAL}: None
243 11:44:29.063255 - {RAMDISK}: 9849714/tftp-deploy-4slgp0dr/ramdisk/ramdisk.cpio.gz
244 11:44:29.063319 - {ROOT_PART}: None
245 11:44:29.063384 - {ROOT}: None
246 11:44:29.063449 - {SERVER_IP}: 192.168.201.1
247 11:44:29.063513 - {TEE}: None
248 11:44:29.063578 Parsed boot commands:
249 11:44:29.063642 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
250 11:44:29.063822 Parsed boot commands: tftpboot 192.168.201.1 9849714/tftp-deploy-4slgp0dr/kernel/bzImage 9849714/tftp-deploy-4slgp0dr/kernel/cmdline 9849714/tftp-deploy-4slgp0dr/ramdisk/ramdisk.cpio.gz
251 11:44:29.063928 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
252 11:44:29.064030 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
253 11:44:29.064144 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
254 11:44:29.064245 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
255 11:44:29.064330 Not connected, no need to disconnect.
256 11:44:29.064420 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
257 11:44:29.064520 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
258 11:44:29.064599 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
259 11:44:29.067727 Setting prompt string to ['lava-test: # ']
260 11:44:29.068058 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
261 11:44:29.068193 end: 2.2.1 reset-connection (duration 00:00:00) [common]
262 11:44:29.068308 start: 2.2.2 reset-device (timeout 00:05:00) [common]
263 11:44:29.068414 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
264 11:44:29.068606 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
265 11:44:34.198267 >> Command sent successfully.
266 11:44:34.201102 Returned 0 in 5 seconds
267 11:44:34.302258 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
269 11:44:34.303779 end: 2.2.2 reset-device (duration 00:00:05) [common]
270 11:44:34.304284 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
271 11:44:34.304726 Setting prompt string to 'Starting depthcharge on Helios...'
272 11:44:34.305093 Changing prompt to 'Starting depthcharge on Helios...'
273 11:44:34.305621 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
274 11:44:34.306856 [Enter `^Ec?' for help]
275 11:44:34.924891
276 11:44:34.925104
277 11:44:34.935053 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
278 11:44:34.938128 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
279 11:44:34.944518 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
280 11:44:34.948195 CPU: AES supported, TXT NOT supported, VT supported
281 11:44:34.955096 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
282 11:44:34.958102 PCH: device id 0284 (rev 00) is Cometlake-U Premium
283 11:44:34.964994 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
284 11:44:34.967986 VBOOT: Loading verstage.
285 11:44:34.971532 FMAP: Found "FLASH" version 1.1 at 0xc04000.
286 11:44:34.977849 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
287 11:44:34.981496 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
288 11:44:34.984991 CBFS @ c08000 size 3f8000
289 11:44:34.991450 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
290 11:44:34.994378 CBFS: Locating 'fallback/verstage'
291 11:44:34.998270 CBFS: Found @ offset 10fb80 size 1072c
292 11:44:35.001479
293 11:44:35.001575
294 11:44:35.011589 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
295 11:44:35.025920 Probing TPM: . done!
296 11:44:35.029066 TPM ready after 0 ms
297 11:44:35.032198 Connected to device vid:did:rid of 1ae0:0028:00
298 11:44:35.042840 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
299 11:44:35.045949 Initialized TPM device CR50 revision 0
300 11:44:35.088673 tlcl_send_startup: Startup return code is 0
301 11:44:35.088795 TPM: setup succeeded
302 11:44:35.101277 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
303 11:44:35.105332 Chrome EC: UHEPI supported
304 11:44:35.109218 Phase 1
305 11:44:35.112417 FMAP: area GBB found @ c05000 (12288 bytes)
306 11:44:35.118644 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
307 11:44:35.121988 Phase 2
308 11:44:35.122428 Phase 3
309 11:44:35.125777 FMAP: area GBB found @ c05000 (12288 bytes)
310 11:44:35.131879 VB2:vb2_report_dev_firmware() This is developer signed firmware
311 11:44:35.138859 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
312 11:44:35.142027 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
313 11:44:35.148559 VB2:vb2_verify_keyblock() Checking keyblock signature...
314 11:44:35.164252 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
315 11:44:35.167645 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
316 11:44:35.174609 VB2:vb2_verify_fw_preamble() Verifying preamble.
317 11:44:35.178302 Phase 4
318 11:44:35.181947 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
319 11:44:35.188528 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
320 11:44:35.367452 VB2:vb2_rsa_verify_digest() Digest check failed!
321 11:44:35.374141 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
322 11:44:35.374250 Saving nvdata
323 11:44:35.377216 Reboot requested (10020007)
324 11:44:35.380428 board_reset() called!
325 11:44:35.380525 full_reset() called!
326 11:44:39.892782
327 11:44:39.893390
328 11:44:39.902170 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
329 11:44:39.905621 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
330 11:44:39.912172 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
331 11:44:39.915809 CPU: AES supported, TXT NOT supported, VT supported
332 11:44:39.922375 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
333 11:44:39.925769 PCH: device id 0284 (rev 00) is Cometlake-U Premium
334 11:44:39.932617 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
335 11:44:39.936006 VBOOT: Loading verstage.
336 11:44:39.938912 FMAP: Found "FLASH" version 1.1 at 0xc04000.
337 11:44:39.945481 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
338 11:44:39.948514 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
339 11:44:39.952272 CBFS @ c08000 size 3f8000
340 11:44:39.958998 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
341 11:44:39.962097 CBFS: Locating 'fallback/verstage'
342 11:44:39.965018 CBFS: Found @ offset 10fb80 size 1072c
343 11:44:39.969222
344 11:44:39.969811
345 11:44:39.978921 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
346 11:44:39.993498 Probing TPM: . done!
347 11:44:39.996505 TPM ready after 0 ms
348 11:44:39.999893 Connected to device vid:did:rid of 1ae0:0028:00
349 11:44:40.010480 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
350 11:44:40.013754 Initialized TPM device CR50 revision 0
351 11:44:40.055992 tlcl_send_startup: Startup return code is 0
352 11:44:40.056604 TPM: setup succeeded
353 11:44:40.069544 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
354 11:44:40.072727 Chrome EC: UHEPI supported
355 11:44:40.076552 Phase 1
356 11:44:40.079559 FMAP: area GBB found @ c05000 (12288 bytes)
357 11:44:40.085598 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
358 11:44:40.092637 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
359 11:44:40.095771 Recovery requested (1009000e)
360 11:44:40.101692 Saving nvdata
361 11:44:40.107927 tlcl_extend: response is 0
362 11:44:40.116410 tlcl_extend: response is 0
363 11:44:40.123628 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
364 11:44:40.126559 CBFS @ c08000 size 3f8000
365 11:44:40.133554 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
366 11:44:40.136492 CBFS: Locating 'fallback/romstage'
367 11:44:40.139896 CBFS: Found @ offset 80 size 145fc
368 11:44:40.143062 Accumulated console time in verstage 99 ms
369 11:44:40.143575
370 11:44:40.143926
371 11:44:40.156355 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
372 11:44:40.163352 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
373 11:44:40.166402 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
374 11:44:40.169829 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
375 11:44:40.176098 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
376 11:44:40.180158 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
377 11:44:40.183426 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
378 11:44:40.186444 TCO_STS: 0000 0000
379 11:44:40.189302 GEN_PMCON: e0015238 00000200
380 11:44:40.192666 GBLRST_CAUSE: 00000000 00000000
381 11:44:40.193110 prev_sleep_state 5
382 11:44:40.196795 Boot Count incremented to 49492
383 11:44:40.203115 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 11:44:40.206745 CBFS @ c08000 size 3f8000
385 11:44:40.213129 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
386 11:44:40.213574 CBFS: Locating 'fspm.bin'
387 11:44:40.220059 CBFS: Found @ offset 5ffc0 size 71000
388 11:44:40.223029 Chrome EC: UHEPI supported
389 11:44:40.229891 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
390 11:44:40.232815 Probing TPM: done!
391 11:44:40.239757 Connected to device vid:did:rid of 1ae0:0028:00
392 11:44:40.249508 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
393 11:44:40.255618 Initialized TPM device CR50 revision 0
394 11:44:40.264883 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
395 11:44:40.271421 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
396 11:44:40.275388 MRC cache found, size 1948
397 11:44:40.278491 bootmode is set to: 2
398 11:44:40.280853 PRMRR disabled by config.
399 11:44:40.284853 SPD INDEX = 1
400 11:44:40.287917 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
401 11:44:40.291394 CBFS @ c08000 size 3f8000
402 11:44:40.297966 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
403 11:44:40.298504 CBFS: Locating 'spd.bin'
404 11:44:40.301138 CBFS: Found @ offset 5fb80 size 400
405 11:44:40.304143 SPD: module type is LPDDR3
406 11:44:40.307310 SPD: module part is
407 11:44:40.314641 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
408 11:44:40.317975 SPD: device width 4 bits, bus width 8 bits
409 11:44:40.320886 SPD: module size is 4096 MB (per channel)
410 11:44:40.324165 memory slot: 0 configuration done.
411 11:44:40.327141 memory slot: 2 configuration done.
412 11:44:40.378877 CBMEM:
413 11:44:40.382059 IMD: root @ 99fff000 254 entries.
414 11:44:40.385522 IMD: root @ 99ffec00 62 entries.
415 11:44:40.388640 External stage cache:
416 11:44:40.392081 IMD: root @ 9abff000 254 entries.
417 11:44:40.395205 IMD: root @ 9abfec00 62 entries.
418 11:44:40.402015 Chrome EC: clear events_b mask to 0x0000000020004000
419 11:44:40.414603 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
420 11:44:40.425507 tlcl_write: response is 0
421 11:44:40.437213 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
422 11:44:40.443822 MRC: TPM MRC hash updated successfully.
423 11:44:40.444264 2 DIMMs found
424 11:44:40.446625 SMM Memory Map
425 11:44:40.450194 SMRAM : 0x9a000000 0x1000000
426 11:44:40.453639 Subregion 0: 0x9a000000 0xa00000
427 11:44:40.456529 Subregion 1: 0x9aa00000 0x200000
428 11:44:40.460180 Subregion 2: 0x9ac00000 0x400000
429 11:44:40.463620 top_of_ram = 0x9a000000
430 11:44:40.466413 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
431 11:44:40.473191 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
432 11:44:40.476693 MTRR Range: Start=ff000000 End=0 (Size 1000000)
433 11:44:40.483070 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
434 11:44:40.486580 CBFS @ c08000 size 3f8000
435 11:44:40.489673 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
436 11:44:40.493595 CBFS: Locating 'fallback/postcar'
437 11:44:40.499849 CBFS: Found @ offset 107000 size 4b44
438 11:44:40.502786 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
439 11:44:40.515530 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
440 11:44:40.518596 Processing 180 relocs. Offset value of 0x97c0c000
441 11:44:40.527504 Accumulated console time in romstage 286 ms
442 11:44:40.527939
443 11:44:40.528278
444 11:44:40.536988 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
445 11:44:40.543903 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
446 11:44:40.546927 CBFS @ c08000 size 3f8000
447 11:44:40.553058 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
448 11:44:40.556532 CBFS: Locating 'fallback/ramstage'
449 11:44:40.560102 CBFS: Found @ offset 43380 size 1b9e8
450 11:44:40.566822 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
451 11:44:40.599454 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
452 11:44:40.602423 Processing 3976 relocs. Offset value of 0x98db0000
453 11:44:40.609101 Accumulated console time in postcar 52 ms
454 11:44:40.609644
455 11:44:40.610000
456 11:44:40.618994 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
457 11:44:40.625654 FMAP: area RO_VPD found @ c00000 (16384 bytes)
458 11:44:40.628875 WARNING: RO_VPD is uninitialized or empty.
459 11:44:40.631912 FMAP: area RW_VPD found @ af8000 (8192 bytes)
460 11:44:40.638790 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 11:44:40.639402 Normal boot.
462 11:44:40.645353 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
463 11:44:40.648598 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
464 11:44:40.651508 CBFS @ c08000 size 3f8000
465 11:44:40.658680 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
466 11:44:40.662230 CBFS: Locating 'cpu_microcode_blob.bin'
467 11:44:40.665387 CBFS: Found @ offset 14700 size 2ec00
468 11:44:40.668241 microcode: sig=0x806ec pf=0x4 revision=0xc9
469 11:44:40.671774 Skip microcode update
470 11:44:40.678482 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 11:44:40.679049 CBFS @ c08000 size 3f8000
472 11:44:40.685122 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 11:44:40.688671 CBFS: Locating 'fsps.bin'
474 11:44:40.691632 CBFS: Found @ offset d1fc0 size 35000
475 11:44:40.717551 Detected 4 core, 8 thread CPU.
476 11:44:40.720383 Setting up SMI for CPU
477 11:44:40.723811 IED base = 0x9ac00000
478 11:44:40.724360 IED size = 0x00400000
479 11:44:40.726804 Will perform SMM setup.
480 11:44:40.733680 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
481 11:44:40.740444 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
482 11:44:40.743593 Processing 16 relocs. Offset value of 0x00030000
483 11:44:40.747300 Attempting to start 7 APs
484 11:44:40.750210 Waiting for 10ms after sending INIT.
485 11:44:40.767122 Waiting for 1st SIPI to complete...done.
486 11:44:40.767681 AP: slot 7 apic_id 5.
487 11:44:40.770115 AP: slot 2 apic_id 4.
488 11:44:40.773904 Waiting for 2nd SIPI to complete...done.
489 11:44:40.777064 AP: slot 4 apic_id 1.
490 11:44:40.780242 AP: slot 1 apic_id 3.
491 11:44:40.780798 AP: slot 5 apic_id 2.
492 11:44:40.783572 AP: slot 3 apic_id 6.
493 11:44:40.786669 AP: slot 6 apic_id 7.
494 11:44:40.794010 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
495 11:44:40.796863 Processing 13 relocs. Offset value of 0x00038000
496 11:44:40.803359 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
497 11:44:40.810508 Installing SMM handler to 0x9a000000
498 11:44:40.816495 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
499 11:44:40.820597 Processing 658 relocs. Offset value of 0x9a010000
500 11:44:40.830339 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
501 11:44:40.833467 Processing 13 relocs. Offset value of 0x9a008000
502 11:44:40.839965 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
503 11:44:40.846615 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
504 11:44:40.852855 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
505 11:44:40.856656 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
506 11:44:40.863468 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
507 11:44:40.869822 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
508 11:44:40.873329 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
509 11:44:40.879683 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
510 11:44:40.883049 Clearing SMI status registers
511 11:44:40.885872 SMI_STS: PM1
512 11:44:40.886314 PM1_STS: PWRBTN
513 11:44:40.889422 TCO_STS: SECOND_TO
514 11:44:40.892720 New SMBASE 0x9a000000
515 11:44:40.896374 In relocation handler: CPU 0
516 11:44:40.899507 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
517 11:44:40.903018 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 11:44:40.906086 Relocation complete.
519 11:44:40.909632 New SMBASE 0x99fff000
520 11:44:40.913153 In relocation handler: CPU 4
521 11:44:40.916274 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
522 11:44:40.919405 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 11:44:40.922990 Relocation complete.
524 11:44:40.926051 New SMBASE 0x99fff400
525 11:44:40.926497 In relocation handler: CPU 3
526 11:44:40.932499 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
527 11:44:40.936718 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 11:44:40.940008 Relocation complete.
529 11:44:40.940549 New SMBASE 0x99ffe800
530 11:44:40.942771 In relocation handler: CPU 6
531 11:44:40.949083 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
532 11:44:40.953252 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 11:44:40.956031 Relocation complete.
534 11:44:40.956476 New SMBASE 0x99ffec00
535 11:44:40.959314 In relocation handler: CPU 5
536 11:44:40.966126 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
537 11:44:40.969424 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 11:44:40.972598 Relocation complete.
539 11:44:40.973149 New SMBASE 0x99fffc00
540 11:44:40.976112 In relocation handler: CPU 1
541 11:44:40.979500 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
542 11:44:40.985998 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 11:44:40.988896 Relocation complete.
544 11:44:40.989341 New SMBASE 0x99ffe400
545 11:44:40.992396 In relocation handler: CPU 7
546 11:44:40.995903 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
547 11:44:41.002416 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 11:44:41.005824 Relocation complete.
549 11:44:41.006398 New SMBASE 0x99fff800
550 11:44:41.008756 In relocation handler: CPU 2
551 11:44:41.012306 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
552 11:44:41.018657 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 11:44:41.019256 Relocation complete.
554 11:44:41.022414 Initializing CPU #0
555 11:44:41.025803 CPU: vendor Intel device 806ec
556 11:44:41.028954 CPU: family 06, model 8e, stepping 0c
557 11:44:41.032256 Clearing out pending MCEs
558 11:44:41.035373 Setting up local APIC...
559 11:44:41.035818 apic_id: 0x00 done.
560 11:44:41.038597 Turbo is available but hidden
561 11:44:41.042727 Turbo is available and visible
562 11:44:41.045419 VMX status: enabled
563 11:44:41.048725 IA32_FEATURE_CONTROL status: locked
564 11:44:41.051866 Skip microcode update
565 11:44:41.052309 CPU #0 initialized
566 11:44:41.055505 Initializing CPU #4
567 11:44:41.059080 Initializing CPU #1
568 11:44:41.059671 Initializing CPU #5
569 11:44:41.062203 CPU: vendor Intel device 806ec
570 11:44:41.065791 CPU: family 06, model 8e, stepping 0c
571 11:44:41.068669 CPU: vendor Intel device 806ec
572 11:44:41.071943 CPU: family 06, model 8e, stepping 0c
573 11:44:41.074915 Clearing out pending MCEs
574 11:44:41.078487 Clearing out pending MCEs
575 11:44:41.081599 Setting up local APIC...
576 11:44:41.082047 Initializing CPU #3
577 11:44:41.085546 Initializing CPU #6
578 11:44:41.088690 CPU: vendor Intel device 806ec
579 11:44:41.091803 CPU: family 06, model 8e, stepping 0c
580 11:44:41.095435 CPU: vendor Intel device 806ec
581 11:44:41.098435 CPU: family 06, model 8e, stepping 0c
582 11:44:41.102005 Clearing out pending MCEs
583 11:44:41.105209 Clearing out pending MCEs
584 11:44:41.105766 Setting up local APIC...
585 11:44:41.108472 apic_id: 0x03 done.
586 11:44:41.112247 Setting up local APIC...
587 11:44:41.114980 CPU: vendor Intel device 806ec
588 11:44:41.118510 CPU: family 06, model 8e, stepping 0c
589 11:44:41.121841 Clearing out pending MCEs
590 11:44:41.122448 Initializing CPU #7
591 11:44:41.125156 Initializing CPU #2
592 11:44:41.128060 CPU: vendor Intel device 806ec
593 11:44:41.131276 CPU: family 06, model 8e, stepping 0c
594 11:44:41.135041 CPU: vendor Intel device 806ec
595 11:44:41.138623 CPU: family 06, model 8e, stepping 0c
596 11:44:41.141846 Clearing out pending MCEs
597 11:44:41.144898 Clearing out pending MCEs
598 11:44:41.147793 Setting up local APIC...
599 11:44:41.148262 Setting up local APIC...
600 11:44:41.151191 apic_id: 0x02 done.
601 11:44:41.155207 VMX status: enabled
602 11:44:41.155757 VMX status: enabled
603 11:44:41.158126 IA32_FEATURE_CONTROL status: locked
604 11:44:41.161593 IA32_FEATURE_CONTROL status: locked
605 11:44:41.164511 Skip microcode update
606 11:44:41.168258 Skip microcode update
607 11:44:41.168851 CPU #1 initialized
608 11:44:41.171678 CPU #5 initialized
609 11:44:41.172247 apic_id: 0x01 done.
610 11:44:41.174849 apic_id: 0x06 done.
611 11:44:41.178268 Setting up local APIC...
612 11:44:41.181104 apic_id: 0x05 done.
613 11:44:41.181551 Setting up local APIC...
614 11:44:41.185267 apic_id: 0x07 done.
615 11:44:41.188183 VMX status: enabled
616 11:44:41.188634 VMX status: enabled
617 11:44:41.191325 IA32_FEATURE_CONTROL status: locked
618 11:44:41.194460 IA32_FEATURE_CONTROL status: locked
619 11:44:41.198077 Skip microcode update
620 11:44:41.201036 apic_id: 0x04 done.
621 11:44:41.201573 VMX status: enabled
622 11:44:41.204808 VMX status: enabled
623 11:44:41.207658 IA32_FEATURE_CONTROL status: locked
624 11:44:41.211302 IA32_FEATURE_CONTROL status: locked
625 11:44:41.214884 Skip microcode update
626 11:44:41.215474 Skip microcode update
627 11:44:41.217694 CPU #7 initialized
628 11:44:41.221065 CPU #2 initialized
629 11:44:41.221636 VMX status: enabled
630 11:44:41.224166 Skip microcode update
631 11:44:41.227773 CPU #3 initialized
632 11:44:41.228221 CPU #6 initialized
633 11:44:41.230675 IA32_FEATURE_CONTROL status: locked
634 11:44:41.234265 Skip microcode update
635 11:44:41.237712 CPU #4 initialized
636 11:44:41.240857 bsp_do_flight_plan done after 463 msecs.
637 11:44:41.244162 CPU: frequency set to 4200 MHz
638 11:44:41.244620 Enabling SMIs.
639 11:44:41.247227 Locking SMM.
640 11:44:41.261030 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
641 11:44:41.264181 CBFS @ c08000 size 3f8000
642 11:44:41.271156 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
643 11:44:41.271625 CBFS: Locating 'vbt.bin'
644 11:44:41.274705 CBFS: Found @ offset 5f5c0 size 499
645 11:44:41.280840 Found a VBT of 4608 bytes after decompression
646 11:44:41.462041 Display FSP Version Info HOB
647 11:44:41.465310 Reference Code - CPU = 9.0.1e.30
648 11:44:41.468098 uCode Version = 0.0.0.ca
649 11:44:41.472228 TXT ACM version = ff.ff.ff.ffff
650 11:44:41.475294 Display FSP Version Info HOB
651 11:44:41.478690 Reference Code - ME = 9.0.1e.30
652 11:44:41.481789 MEBx version = 0.0.0.0
653 11:44:41.484697 ME Firmware Version = Consumer SKU
654 11:44:41.488448 Display FSP Version Info HOB
655 11:44:41.491653 Reference Code - CML PCH = 9.0.1e.30
656 11:44:41.494965 PCH-CRID Status = Disabled
657 11:44:41.498048 PCH-CRID Original Value = ff.ff.ff.ffff
658 11:44:41.501636 PCH-CRID New Value = ff.ff.ff.ffff
659 11:44:41.504545 OPROM - RST - RAID = ff.ff.ff.ffff
660 11:44:41.508578 ChipsetInit Base Version = ff.ff.ff.ffff
661 11:44:41.511641 ChipsetInit Oem Version = ff.ff.ff.ffff
662 11:44:41.515064 Display FSP Version Info HOB
663 11:44:41.522244 Reference Code - SA - System Agent = 9.0.1e.30
664 11:44:41.525155 Reference Code - MRC = 0.7.1.6c
665 11:44:41.525716 SA - PCIe Version = 9.0.1e.30
666 11:44:41.528095 SA-CRID Status = Disabled
667 11:44:41.531610 SA-CRID Original Value = 0.0.0.c
668 11:44:41.534644 SA-CRID New Value = 0.0.0.c
669 11:44:41.538145 OPROM - VBIOS = ff.ff.ff.ffff
670 11:44:41.541255 RTC Init
671 11:44:41.544634 Set power on after power failure.
672 11:44:41.545089 Disabling Deep S3
673 11:44:41.547591 Disabling Deep S3
674 11:44:41.548044 Disabling Deep S4
675 11:44:41.551068 Disabling Deep S4
676 11:44:41.551567 Disabling Deep S5
677 11:44:41.554925 Disabling Deep S5
678 11:44:41.560905 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
679 11:44:41.561365 Enumerating buses...
680 11:44:41.567976 Show all devs... Before device enumeration.
681 11:44:41.568692 Root Device: enabled 1
682 11:44:41.571191 CPU_CLUSTER: 0: enabled 1
683 11:44:41.574594 DOMAIN: 0000: enabled 1
684 11:44:41.577833 APIC: 00: enabled 1
685 11:44:41.578386 PCI: 00:00.0: enabled 1
686 11:44:41.581361 PCI: 00:02.0: enabled 1
687 11:44:41.584216 PCI: 00:04.0: enabled 0
688 11:44:41.587954 PCI: 00:05.0: enabled 0
689 11:44:41.588521 PCI: 00:12.0: enabled 1
690 11:44:41.590625 PCI: 00:12.5: enabled 0
691 11:44:41.593947 PCI: 00:12.6: enabled 0
692 11:44:41.594392 PCI: 00:14.0: enabled 1
693 11:44:41.597730 PCI: 00:14.1: enabled 0
694 11:44:41.600960 PCI: 00:14.3: enabled 1
695 11:44:41.604154 PCI: 00:14.5: enabled 0
696 11:44:41.604597 PCI: 00:15.0: enabled 1
697 11:44:41.607482 PCI: 00:15.1: enabled 1
698 11:44:41.610696 PCI: 00:15.2: enabled 0
699 11:44:41.614246 PCI: 00:15.3: enabled 0
700 11:44:41.614795 PCI: 00:16.0: enabled 1
701 11:44:41.617554 PCI: 00:16.1: enabled 0
702 11:44:41.620252 PCI: 00:16.2: enabled 0
703 11:44:41.623943 PCI: 00:16.3: enabled 0
704 11:44:41.624387 PCI: 00:16.4: enabled 0
705 11:44:41.627029 PCI: 00:16.5: enabled 0
706 11:44:41.630563 PCI: 00:17.0: enabled 1
707 11:44:41.633636 PCI: 00:19.0: enabled 1
708 11:44:41.634189 PCI: 00:19.1: enabled 0
709 11:44:41.637300 PCI: 00:19.2: enabled 0
710 11:44:41.640232 PCI: 00:1a.0: enabled 0
711 11:44:41.640725 PCI: 00:1c.0: enabled 0
712 11:44:41.643827 PCI: 00:1c.1: enabled 0
713 11:44:41.646896 PCI: 00:1c.2: enabled 0
714 11:44:41.650409 PCI: 00:1c.3: enabled 0
715 11:44:41.650860 PCI: 00:1c.4: enabled 0
716 11:44:41.654062 PCI: 00:1c.5: enabled 0
717 11:44:41.656599 PCI: 00:1c.6: enabled 0
718 11:44:41.660016 PCI: 00:1c.7: enabled 0
719 11:44:41.660481 PCI: 00:1d.0: enabled 1
720 11:44:41.663609 PCI: 00:1d.1: enabled 0
721 11:44:41.667261 PCI: 00:1d.2: enabled 0
722 11:44:41.670142 PCI: 00:1d.3: enabled 0
723 11:44:41.670594 PCI: 00:1d.4: enabled 0
724 11:44:41.674004 PCI: 00:1d.5: enabled 1
725 11:44:41.676738 PCI: 00:1e.0: enabled 1
726 11:44:41.677191 PCI: 00:1e.1: enabled 0
727 11:44:41.680027 PCI: 00:1e.2: enabled 1
728 11:44:41.683479 PCI: 00:1e.3: enabled 1
729 11:44:41.686904 PCI: 00:1f.0: enabled 1
730 11:44:41.687522 PCI: 00:1f.1: enabled 1
731 11:44:41.689953 PCI: 00:1f.2: enabled 1
732 11:44:41.693666 PCI: 00:1f.3: enabled 1
733 11:44:41.696622 PCI: 00:1f.4: enabled 1
734 11:44:41.697077 PCI: 00:1f.5: enabled 1
735 11:44:41.699732 PCI: 00:1f.6: enabled 0
736 11:44:41.702975 USB0 port 0: enabled 1
737 11:44:41.703499 I2C: 00:15: enabled 1
738 11:44:41.706265 I2C: 00:5d: enabled 1
739 11:44:41.709544 GENERIC: 0.0: enabled 1
740 11:44:41.713300 I2C: 00:1a: enabled 1
741 11:44:41.713857 I2C: 00:38: enabled 1
742 11:44:41.716576 I2C: 00:39: enabled 1
743 11:44:41.719749 I2C: 00:3a: enabled 1
744 11:44:41.720334 I2C: 00:3b: enabled 1
745 11:44:41.723626 PCI: 00:00.0: enabled 1
746 11:44:41.726850 SPI: 00: enabled 1
747 11:44:41.727500 SPI: 01: enabled 1
748 11:44:41.729660 PNP: 0c09.0: enabled 1
749 11:44:41.732788 USB2 port 0: enabled 1
750 11:44:41.733240 USB2 port 1: enabled 1
751 11:44:41.736691 USB2 port 2: enabled 0
752 11:44:41.739775 USB2 port 3: enabled 0
753 11:44:41.740230 USB2 port 5: enabled 0
754 11:44:41.743444 USB2 port 6: enabled 1
755 11:44:41.746245 USB2 port 9: enabled 1
756 11:44:41.749257 USB3 port 0: enabled 1
757 11:44:41.749712 USB3 port 1: enabled 1
758 11:44:41.752838 USB3 port 2: enabled 1
759 11:44:41.755975 USB3 port 3: enabled 1
760 11:44:41.756436 USB3 port 4: enabled 0
761 11:44:41.759429 APIC: 03: enabled 1
762 11:44:41.762855 APIC: 04: enabled 1
763 11:44:41.763327 APIC: 06: enabled 1
764 11:44:41.766351 APIC: 01: enabled 1
765 11:44:41.766803 APIC: 02: enabled 1
766 11:44:41.769761 APIC: 07: enabled 1
767 11:44:41.772666 APIC: 05: enabled 1
768 11:44:41.773110 Compare with tree...
769 11:44:41.776299 Root Device: enabled 1
770 11:44:41.779418 CPU_CLUSTER: 0: enabled 1
771 11:44:41.782771 APIC: 00: enabled 1
772 11:44:41.783243 APIC: 03: enabled 1
773 11:44:41.786403 APIC: 04: enabled 1
774 11:44:41.789607 APIC: 06: enabled 1
775 11:44:41.790059 APIC: 01: enabled 1
776 11:44:41.793240 APIC: 02: enabled 1
777 11:44:41.796396 APIC: 07: enabled 1
778 11:44:41.796842 APIC: 05: enabled 1
779 11:44:41.799585 DOMAIN: 0000: enabled 1
780 11:44:41.803016 PCI: 00:00.0: enabled 1
781 11:44:41.806257 PCI: 00:02.0: enabled 1
782 11:44:41.806846 PCI: 00:04.0: enabled 0
783 11:44:41.809101 PCI: 00:05.0: enabled 0
784 11:44:41.812674 PCI: 00:12.0: enabled 1
785 11:44:41.816508 PCI: 00:12.5: enabled 0
786 11:44:41.819536 PCI: 00:12.6: enabled 0
787 11:44:41.819986 PCI: 00:14.0: enabled 1
788 11:44:41.822605 USB0 port 0: enabled 1
789 11:44:41.825806 USB2 port 0: enabled 1
790 11:44:41.829891 USB2 port 1: enabled 1
791 11:44:41.832756 USB2 port 2: enabled 0
792 11:44:41.833206 USB2 port 3: enabled 0
793 11:44:41.835837 USB2 port 5: enabled 0
794 11:44:41.839353 USB2 port 6: enabled 1
795 11:44:41.843144 USB2 port 9: enabled 1
796 11:44:41.846301 USB3 port 0: enabled 1
797 11:44:41.849262 USB3 port 1: enabled 1
798 11:44:41.849715 USB3 port 2: enabled 1
799 11:44:41.852455 USB3 port 3: enabled 1
800 11:44:41.855707 USB3 port 4: enabled 0
801 11:44:41.859150 PCI: 00:14.1: enabled 0
802 11:44:41.862873 PCI: 00:14.3: enabled 1
803 11:44:41.863354 PCI: 00:14.5: enabled 0
804 11:44:41.866123 PCI: 00:15.0: enabled 1
805 11:44:41.868718 I2C: 00:15: enabled 1
806 11:44:41.872204 PCI: 00:15.1: enabled 1
807 11:44:41.872652 I2C: 00:5d: enabled 1
808 11:44:41.875821 GENERIC: 0.0: enabled 1
809 11:44:41.879135 PCI: 00:15.2: enabled 0
810 11:44:41.882541 PCI: 00:15.3: enabled 0
811 11:44:41.885834 PCI: 00:16.0: enabled 1
812 11:44:41.886286 PCI: 00:16.1: enabled 0
813 11:44:41.888995 PCI: 00:16.2: enabled 0
814 11:44:41.892061 PCI: 00:16.3: enabled 0
815 11:44:41.895374 PCI: 00:16.4: enabled 0
816 11:44:41.898852 PCI: 00:16.5: enabled 0
817 11:44:41.899360 PCI: 00:17.0: enabled 1
818 11:44:41.902516 PCI: 00:19.0: enabled 1
819 11:44:41.905389 I2C: 00:1a: enabled 1
820 11:44:41.908688 I2C: 00:38: enabled 1
821 11:44:41.911807 I2C: 00:39: enabled 1
822 11:44:41.912259 I2C: 00:3a: enabled 1
823 11:44:41.915782 I2C: 00:3b: enabled 1
824 11:44:41.919049 PCI: 00:19.1: enabled 0
825 11:44:41.922526 PCI: 00:19.2: enabled 0
826 11:44:41.923074 PCI: 00:1a.0: enabled 0
827 11:44:41.925263 PCI: 00:1c.0: enabled 0
828 11:44:41.928627 PCI: 00:1c.1: enabled 0
829 11:44:41.931681 PCI: 00:1c.2: enabled 0
830 11:44:41.935660 PCI: 00:1c.3: enabled 0
831 11:44:41.936210 PCI: 00:1c.4: enabled 0
832 11:44:41.939161 PCI: 00:1c.5: enabled 0
833 11:44:41.942111 PCI: 00:1c.6: enabled 0
834 11:44:41.945238 PCI: 00:1c.7: enabled 0
835 11:44:41.948220 PCI: 00:1d.0: enabled 1
836 11:44:41.948678 PCI: 00:1d.1: enabled 0
837 11:44:41.952175 PCI: 00:1d.2: enabled 0
838 11:44:41.955844 PCI: 00:1d.3: enabled 0
839 11:44:41.958996 PCI: 00:1d.4: enabled 0
840 11:44:41.961800 PCI: 00:1d.5: enabled 1
841 11:44:41.962259 PCI: 00:00.0: enabled 1
842 11:44:41.965255 PCI: 00:1e.0: enabled 1
843 11:44:41.968707 PCI: 00:1e.1: enabled 0
844 11:44:41.971812 PCI: 00:1e.2: enabled 1
845 11:44:41.972366 SPI: 00: enabled 1
846 11:44:41.975448 PCI: 00:1e.3: enabled 1
847 11:44:41.978028 SPI: 01: enabled 1
848 11:44:41.981841 PCI: 00:1f.0: enabled 1
849 11:44:41.982300 PNP: 0c09.0: enabled 1
850 11:44:41.985190 PCI: 00:1f.1: enabled 1
851 11:44:41.988058 PCI: 00:1f.2: enabled 1
852 11:44:41.991606 PCI: 00:1f.3: enabled 1
853 11:44:41.994949 PCI: 00:1f.4: enabled 1
854 11:44:41.995566 PCI: 00:1f.5: enabled 1
855 11:44:41.998244 PCI: 00:1f.6: enabled 0
856 11:44:42.001518 Root Device scanning...
857 11:44:42.004875 scan_static_bus for Root Device
858 11:44:42.008588 CPU_CLUSTER: 0 enabled
859 11:44:42.009160 DOMAIN: 0000 enabled
860 11:44:42.011258 DOMAIN: 0000 scanning...
861 11:44:42.014996 PCI: pci_scan_bus for bus 00
862 11:44:42.018089 PCI: 00:00.0 [8086/0000] ops
863 11:44:42.021576 PCI: 00:00.0 [8086/9b61] enabled
864 11:44:42.025077 PCI: 00:02.0 [8086/0000] bus ops
865 11:44:42.028488 PCI: 00:02.0 [8086/9b41] enabled
866 11:44:42.031426 PCI: 00:04.0 [8086/1903] disabled
867 11:44:42.034668 PCI: 00:08.0 [8086/1911] enabled
868 11:44:42.038544 PCI: 00:12.0 [8086/02f9] enabled
869 11:44:42.041459 PCI: 00:14.0 [8086/0000] bus ops
870 11:44:42.045278 PCI: 00:14.0 [8086/02ed] enabled
871 11:44:42.048037 PCI: 00:14.2 [8086/02ef] enabled
872 11:44:42.051230 PCI: 00:14.3 [8086/02f0] enabled
873 11:44:42.054815 PCI: 00:15.0 [8086/0000] bus ops
874 11:44:42.058083 PCI: 00:15.0 [8086/02e8] enabled
875 11:44:42.061084 PCI: 00:15.1 [8086/0000] bus ops
876 11:44:42.064610 PCI: 00:15.1 [8086/02e9] enabled
877 11:44:42.068029 PCI: 00:16.0 [8086/0000] ops
878 11:44:42.071425 PCI: 00:16.0 [8086/02e0] enabled
879 11:44:42.074737 PCI: 00:17.0 [8086/0000] ops
880 11:44:42.078285 PCI: 00:17.0 [8086/02d3] enabled
881 11:44:42.081363 PCI: 00:19.0 [8086/0000] bus ops
882 11:44:42.084735 PCI: 00:19.0 [8086/02c5] enabled
883 11:44:42.087646 PCI: 00:1d.0 [8086/0000] bus ops
884 11:44:42.091224 PCI: 00:1d.0 [8086/02b0] enabled
885 11:44:42.097585 PCI: Static device PCI: 00:1d.5 not found, disabling it.
886 11:44:42.098038 PCI: 00:1e.0 [8086/0000] ops
887 11:44:42.100896 PCI: 00:1e.0 [8086/02a8] enabled
888 11:44:42.104336 PCI: 00:1e.2 [8086/0000] bus ops
889 11:44:42.107828 PCI: 00:1e.2 [8086/02aa] enabled
890 11:44:42.110632 PCI: 00:1e.3 [8086/0000] bus ops
891 11:44:42.114167 PCI: 00:1e.3 [8086/02ab] enabled
892 11:44:42.117740 PCI: 00:1f.0 [8086/0000] bus ops
893 11:44:42.121287 PCI: 00:1f.0 [8086/0284] enabled
894 11:44:42.127940 PCI: Static device PCI: 00:1f.1 not found, disabling it.
895 11:44:42.134215 PCI: Static device PCI: 00:1f.2 not found, disabling it.
896 11:44:42.137745 PCI: 00:1f.3 [8086/0000] bus ops
897 11:44:42.140896 PCI: 00:1f.3 [8086/02c8] enabled
898 11:44:42.144418 PCI: 00:1f.4 [8086/0000] bus ops
899 11:44:42.147648 PCI: 00:1f.4 [8086/02a3] enabled
900 11:44:42.150568 PCI: 00:1f.5 [8086/0000] bus ops
901 11:44:42.154424 PCI: 00:1f.5 [8086/02a4] enabled
902 11:44:42.157477 PCI: Leftover static devices:
903 11:44:42.157941 PCI: 00:05.0
904 11:44:42.160768 PCI: 00:12.5
905 11:44:42.161213 PCI: 00:12.6
906 11:44:42.161565 PCI: 00:14.1
907 11:44:42.163967 PCI: 00:14.5
908 11:44:42.164413 PCI: 00:15.2
909 11:44:42.168041 PCI: 00:15.3
910 11:44:42.168599 PCI: 00:16.1
911 11:44:42.168954 PCI: 00:16.2
912 11:44:42.170928 PCI: 00:16.3
913 11:44:42.171418 PCI: 00:16.4
914 11:44:42.174163 PCI: 00:16.5
915 11:44:42.174605 PCI: 00:19.1
916 11:44:42.177717 PCI: 00:19.2
917 11:44:42.178265 PCI: 00:1a.0
918 11:44:42.178623 PCI: 00:1c.0
919 11:44:42.180688 PCI: 00:1c.1
920 11:44:42.181132 PCI: 00:1c.2
921 11:44:42.183845 PCI: 00:1c.3
922 11:44:42.184398 PCI: 00:1c.4
923 11:44:42.184757 PCI: 00:1c.5
924 11:44:42.187221 PCI: 00:1c.6
925 11:44:42.187685 PCI: 00:1c.7
926 11:44:42.190860 PCI: 00:1d.1
927 11:44:42.191357 PCI: 00:1d.2
928 11:44:42.191714 PCI: 00:1d.3
929 11:44:42.194066 PCI: 00:1d.4
930 11:44:42.194633 PCI: 00:1d.5
931 11:44:42.197470 PCI: 00:1e.1
932 11:44:42.198033 PCI: 00:1f.1
933 11:44:42.200932 PCI: 00:1f.2
934 11:44:42.201400 PCI: 00:1f.6
935 11:44:42.203913 PCI: Check your devicetree.cb.
936 11:44:42.207291 PCI: 00:02.0 scanning...
937 11:44:42.211031 scan_generic_bus for PCI: 00:02.0
938 11:44:42.214254 scan_generic_bus for PCI: 00:02.0 done
939 11:44:42.220432 scan_bus: scanning of bus PCI: 00:02.0 took 10193 usecs
940 11:44:42.220984 PCI: 00:14.0 scanning...
941 11:44:42.224028 scan_static_bus for PCI: 00:14.0
942 11:44:42.226811 USB0 port 0 enabled
943 11:44:42.230914 USB0 port 0 scanning...
944 11:44:42.233513 scan_static_bus for USB0 port 0
945 11:44:42.236732 USB2 port 0 enabled
946 11:44:42.237184 USB2 port 1 enabled
947 11:44:42.240019 USB2 port 2 disabled
948 11:44:42.240568 USB2 port 3 disabled
949 11:44:42.243731 USB2 port 5 disabled
950 11:44:42.247374 USB2 port 6 enabled
951 11:44:42.247937 USB2 port 9 enabled
952 11:44:42.250220 USB3 port 0 enabled
953 11:44:42.253364 USB3 port 1 enabled
954 11:44:42.253822 USB3 port 2 enabled
955 11:44:42.256960 USB3 port 3 enabled
956 11:44:42.257357 USB3 port 4 disabled
957 11:44:42.260185 USB2 port 0 scanning...
958 11:44:42.263389 scan_static_bus for USB2 port 0
959 11:44:42.266985 scan_static_bus for USB2 port 0 done
960 11:44:42.273466 scan_bus: scanning of bus USB2 port 0 took 9694 usecs
961 11:44:42.276547 USB2 port 1 scanning...
962 11:44:42.280751 scan_static_bus for USB2 port 1
963 11:44:42.283720 scan_static_bus for USB2 port 1 done
964 11:44:42.286602 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
965 11:44:42.289782 USB2 port 6 scanning...
966 11:44:42.293691 scan_static_bus for USB2 port 6
967 11:44:42.296647 scan_static_bus for USB2 port 6 done
968 11:44:42.302986 scan_bus: scanning of bus USB2 port 6 took 9705 usecs
969 11:44:42.306606 USB2 port 9 scanning...
970 11:44:42.310140 scan_static_bus for USB2 port 9
971 11:44:42.312949 scan_static_bus for USB2 port 9 done
972 11:44:42.320005 scan_bus: scanning of bus USB2 port 9 took 9705 usecs
973 11:44:42.320551 USB3 port 0 scanning...
974 11:44:42.322950 scan_static_bus for USB3 port 0
975 11:44:42.326815 scan_static_bus for USB3 port 0 done
976 11:44:42.333283 scan_bus: scanning of bus USB3 port 0 took 9705 usecs
977 11:44:42.336517 USB3 port 1 scanning...
978 11:44:42.339395 scan_static_bus for USB3 port 1
979 11:44:42.343077 scan_static_bus for USB3 port 1 done
980 11:44:42.349676 scan_bus: scanning of bus USB3 port 1 took 9696 usecs
981 11:44:42.350255 USB3 port 2 scanning...
982 11:44:42.352874 scan_static_bus for USB3 port 2
983 11:44:42.356136 scan_static_bus for USB3 port 2 done
984 11:44:42.362991 scan_bus: scanning of bus USB3 port 2 took 9704 usecs
985 11:44:42.366496 USB3 port 3 scanning...
986 11:44:42.369817 scan_static_bus for USB3 port 3
987 11:44:42.373056 scan_static_bus for USB3 port 3 done
988 11:44:42.379399 scan_bus: scanning of bus USB3 port 3 took 9689 usecs
989 11:44:42.382441 scan_static_bus for USB0 port 0 done
990 11:44:42.386183 scan_bus: scanning of bus USB0 port 0 took 155307 usecs
991 11:44:42.392914 scan_static_bus for PCI: 00:14.0 done
992 11:44:42.395980 scan_bus: scanning of bus PCI: 00:14.0 took 172925 usecs
993 11:44:42.399987 PCI: 00:15.0 scanning...
994 11:44:42.402785 scan_generic_bus for PCI: 00:15.0
995 11:44:42.405668 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
996 11:44:42.412326 scan_generic_bus for PCI: 00:15.0 done
997 11:44:42.416255 scan_bus: scanning of bus PCI: 00:15.0 took 14290 usecs
998 11:44:42.419612 PCI: 00:15.1 scanning...
999 11:44:42.422898 scan_generic_bus for PCI: 00:15.1
1000 11:44:42.425648 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1001 11:44:42.432764 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1002 11:44:42.436048 scan_generic_bus for PCI: 00:15.1 done
1003 11:44:42.439462 scan_bus: scanning of bus PCI: 00:15.1 took 18619 usecs
1004 11:44:42.442512 PCI: 00:19.0 scanning...
1005 11:44:42.445690 scan_generic_bus for PCI: 00:19.0
1006 11:44:42.452524 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1007 11:44:42.455641 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1008 11:44:42.458836 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1009 11:44:42.462593 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1010 11:44:42.469317 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1011 11:44:42.472500 scan_generic_bus for PCI: 00:19.0 done
1012 11:44:42.475618 scan_bus: scanning of bus PCI: 00:19.0 took 30743 usecs
1013 11:44:42.478974 PCI: 00:1d.0 scanning...
1014 11:44:42.482572 do_pci_scan_bridge for PCI: 00:1d.0
1015 11:44:42.485979 PCI: pci_scan_bus for bus 01
1016 11:44:42.489203 PCI: 01:00.0 [1c5c/1327] enabled
1017 11:44:42.492244 Enabling Common Clock Configuration
1018 11:44:42.499416 L1 Sub-State supported from root port 29
1019 11:44:42.499971 L1 Sub-State Support = 0xf
1020 11:44:42.502613 CommonModeRestoreTime = 0x28
1021 11:44:42.508430 Power On Value = 0x16, Power On Scale = 0x0
1022 11:44:42.508966 ASPM: Enabled L1
1023 11:44:42.515444 scan_bus: scanning of bus PCI: 00:1d.0 took 32791 usecs
1024 11:44:42.518764 PCI: 00:1e.2 scanning...
1025 11:44:42.522811 scan_generic_bus for PCI: 00:1e.2
1026 11:44:42.525491 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1027 11:44:42.528390 scan_generic_bus for PCI: 00:1e.2 done
1028 11:44:42.535542 scan_bus: scanning of bus PCI: 00:1e.2 took 14003 usecs
1029 11:44:42.538396 PCI: 00:1e.3 scanning...
1030 11:44:42.541727 scan_generic_bus for PCI: 00:1e.3
1031 11:44:42.545294 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1032 11:44:42.548227 scan_generic_bus for PCI: 00:1e.3 done
1033 11:44:42.555199 scan_bus: scanning of bus PCI: 00:1e.3 took 14012 usecs
1034 11:44:42.555655 PCI: 00:1f.0 scanning...
1035 11:44:42.558346 scan_static_bus for PCI: 00:1f.0
1036 11:44:42.561635 PNP: 0c09.0 enabled
1037 11:44:42.565040 scan_static_bus for PCI: 00:1f.0 done
1038 11:44:42.571488 scan_bus: scanning of bus PCI: 00:1f.0 took 12044 usecs
1039 11:44:42.575214 PCI: 00:1f.3 scanning...
1040 11:44:42.578522 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1041 11:44:42.582349 PCI: 00:1f.4 scanning...
1042 11:44:42.585227 scan_generic_bus for PCI: 00:1f.4
1043 11:44:42.588460 scan_generic_bus for PCI: 00:1f.4 done
1044 11:44:42.595173 scan_bus: scanning of bus PCI: 00:1f.4 took 10175 usecs
1045 11:44:42.598027 PCI: 00:1f.5 scanning...
1046 11:44:42.601195 scan_generic_bus for PCI: 00:1f.5
1047 11:44:42.605204 scan_generic_bus for PCI: 00:1f.5 done
1048 11:44:42.611548 scan_bus: scanning of bus PCI: 00:1f.5 took 10184 usecs
1049 11:44:42.618145 scan_bus: scanning of bus DOMAIN: 0000 took 604944 usecs
1050 11:44:42.621769 scan_static_bus for Root Device done
1051 11:44:42.625048 scan_bus: scanning of bus Root Device took 624810 usecs
1052 11:44:42.627976 done
1053 11:44:42.631174 Chrome EC: UHEPI supported
1054 11:44:42.635213 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1055 11:44:42.641086 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1056 11:44:42.648060 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1057 11:44:42.654399 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1058 11:44:42.657814 SPI flash protection: WPSW=0 SRP0=0
1059 11:44:42.664142 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1060 11:44:42.667631 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1061 11:44:42.671357 found VGA at PCI: 00:02.0
1062 11:44:42.674216 Setting up VGA for PCI: 00:02.0
1063 11:44:42.681132 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1064 11:44:42.684405 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1065 11:44:42.687475 Allocating resources...
1066 11:44:42.690797 Reading resources...
1067 11:44:42.694827 Root Device read_resources bus 0 link: 0
1068 11:44:42.698009 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1069 11:44:42.704180 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1070 11:44:42.707573 DOMAIN: 0000 read_resources bus 0 link: 0
1071 11:44:42.714242 PCI: 00:14.0 read_resources bus 0 link: 0
1072 11:44:42.717974 USB0 port 0 read_resources bus 0 link: 0
1073 11:44:42.726186 USB0 port 0 read_resources bus 0 link: 0 done
1074 11:44:42.729706 PCI: 00:14.0 read_resources bus 0 link: 0 done
1075 11:44:42.736675 PCI: 00:15.0 read_resources bus 1 link: 0
1076 11:44:42.739936 PCI: 00:15.0 read_resources bus 1 link: 0 done
1077 11:44:42.746530 PCI: 00:15.1 read_resources bus 2 link: 0
1078 11:44:42.749897 PCI: 00:15.1 read_resources bus 2 link: 0 done
1079 11:44:42.757336 PCI: 00:19.0 read_resources bus 3 link: 0
1080 11:44:42.763906 PCI: 00:19.0 read_resources bus 3 link: 0 done
1081 11:44:42.766981 PCI: 00:1d.0 read_resources bus 1 link: 0
1082 11:44:42.773941 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1083 11:44:42.776887 PCI: 00:1e.2 read_resources bus 4 link: 0
1084 11:44:42.783593 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1085 11:44:42.787200 PCI: 00:1e.3 read_resources bus 5 link: 0
1086 11:44:42.793678 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1087 11:44:42.797301 PCI: 00:1f.0 read_resources bus 0 link: 0
1088 11:44:42.804051 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1089 11:44:42.810367 DOMAIN: 0000 read_resources bus 0 link: 0 done
1090 11:44:42.813953 Root Device read_resources bus 0 link: 0 done
1091 11:44:42.817286 Done reading resources.
1092 11:44:42.823465 Show resources in subtree (Root Device)...After reading.
1093 11:44:42.827018 Root Device child on link 0 CPU_CLUSTER: 0
1094 11:44:42.830490 CPU_CLUSTER: 0 child on link 0 APIC: 00
1095 11:44:42.831039 APIC: 00
1096 11:44:42.833393 APIC: 03
1097 11:44:42.833855 APIC: 04
1098 11:44:42.836594 APIC: 06
1099 11:44:42.837147 APIC: 01
1100 11:44:42.837506 APIC: 02
1101 11:44:42.840403 APIC: 07
1102 11:44:42.840851 APIC: 05
1103 11:44:42.843995 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1104 11:44:42.853232 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1105 11:44:42.909804 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1106 11:44:42.910358 PCI: 00:00.0
1107 11:44:42.911117 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1108 11:44:42.911528 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1109 11:44:42.911867 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1110 11:44:42.912192 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1111 11:44:42.914107 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1112 11:44:42.921071 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1113 11:44:42.931478 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1114 11:44:42.940563 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1115 11:44:42.951072 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1116 11:44:42.956956 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1117 11:44:42.967132 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1118 11:44:42.977314 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1119 11:44:42.986883 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1120 11:44:42.997321 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1121 11:44:43.006661 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1122 11:44:43.017079 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1123 11:44:43.017648 PCI: 00:02.0
1124 11:44:43.026629 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1125 11:44:43.036893 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1126 11:44:43.046760 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1127 11:44:43.047378 PCI: 00:04.0
1128 11:44:43.050119 PCI: 00:08.0
1129 11:44:43.059698 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1130 11:44:43.060268 PCI: 00:12.0
1131 11:44:43.069645 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 11:44:43.076707 PCI: 00:14.0 child on link 0 USB0 port 0
1133 11:44:43.086471 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1134 11:44:43.089579 USB0 port 0 child on link 0 USB2 port 0
1135 11:44:43.092916 USB2 port 0
1136 11:44:43.093376 USB2 port 1
1137 11:44:43.095899 USB2 port 2
1138 11:44:43.096354 USB2 port 3
1139 11:44:43.099557 USB2 port 5
1140 11:44:43.100012 USB2 port 6
1141 11:44:43.102593 USB2 port 9
1142 11:44:43.103051 USB3 port 0
1143 11:44:43.106147 USB3 port 1
1144 11:44:43.106610 USB3 port 2
1145 11:44:43.109265 USB3 port 3
1146 11:44:43.109819 USB3 port 4
1147 11:44:43.112673 PCI: 00:14.2
1148 11:44:43.122773 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1149 11:44:43.132927 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1150 11:44:43.133496 PCI: 00:14.3
1151 11:44:43.142623 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 11:44:43.149029 PCI: 00:15.0 child on link 0 I2C: 01:15
1153 11:44:43.159434 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 11:44:43.160000 I2C: 01:15
1155 11:44:43.162347 PCI: 00:15.1 child on link 0 I2C: 02:5d
1156 11:44:43.172196 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 11:44:43.175382 I2C: 02:5d
1158 11:44:43.175833 GENERIC: 0.0
1159 11:44:43.178981 PCI: 00:16.0
1160 11:44:43.189107 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 11:44:43.189839 PCI: 00:17.0
1162 11:44:43.198749 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1163 11:44:43.208418 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1164 11:44:43.215023 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1165 11:44:43.225498 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1166 11:44:43.231884 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1167 11:44:43.241875 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1168 11:44:43.244964 PCI: 00:19.0 child on link 0 I2C: 03:1a
1169 11:44:43.254961 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1170 11:44:43.258090 I2C: 03:1a
1171 11:44:43.258545 I2C: 03:38
1172 11:44:43.261052 I2C: 03:39
1173 11:44:43.261448 I2C: 03:3a
1174 11:44:43.264976 I2C: 03:3b
1175 11:44:43.268321 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1176 11:44:43.278506 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1177 11:44:43.288067 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1178 11:44:43.297874 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1179 11:44:43.298444 PCI: 01:00.0
1180 11:44:43.307884 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 11:44:43.310965 PCI: 00:1e.0
1182 11:44:43.321314 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1183 11:44:43.331329 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1184 11:44:43.334265 PCI: 00:1e.2 child on link 0 SPI: 00
1185 11:44:43.344727 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 11:44:43.345285 SPI: 00
1187 11:44:43.350682 PCI: 00:1e.3 child on link 0 SPI: 01
1188 11:44:43.360659 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 11:44:43.361221 SPI: 01
1190 11:44:43.364302 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1191 11:44:43.373893 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1192 11:44:43.383807 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1193 11:44:43.384270 PNP: 0c09.0
1194 11:44:43.394425 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1195 11:44:43.394992 PCI: 00:1f.3
1196 11:44:43.403716 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1197 11:44:43.413416 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1198 11:44:43.417134 PCI: 00:1f.4
1199 11:44:43.426751 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1200 11:44:43.437168 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1201 11:44:43.437722 PCI: 00:1f.5
1202 11:44:43.447030 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1203 11:44:43.453371 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1204 11:44:43.460117 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1205 11:44:43.466513 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1206 11:44:43.470001 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1207 11:44:43.473775 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1208 11:44:43.476827 PCI: 00:17.0 18 * [0x60 - 0x67] io
1209 11:44:43.480022 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1210 11:44:43.486781 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1211 11:44:43.493091 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1212 11:44:43.503164 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1213 11:44:43.509937 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1214 11:44:43.515975 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1215 11:44:43.519809 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1216 11:44:43.529577 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1217 11:44:43.532872 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1218 11:44:43.539324 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1219 11:44:43.542866 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1220 11:44:43.549221 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1221 11:44:43.552572 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1222 11:44:43.555702 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1223 11:44:43.562687 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1224 11:44:43.565585 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1225 11:44:43.572653 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1226 11:44:43.576056 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1227 11:44:43.582494 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1228 11:44:43.585564 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1229 11:44:43.592435 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1230 11:44:43.595973 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1231 11:44:43.602763 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1232 11:44:43.605934 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1233 11:44:43.611988 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1234 11:44:43.615593 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1235 11:44:43.622542 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1236 11:44:43.625599 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1237 11:44:43.628373 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1238 11:44:43.635700 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1239 11:44:43.638620 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1240 11:44:43.648916 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1241 11:44:43.652112 avoid_fixed_resources: DOMAIN: 0000
1242 11:44:43.658876 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1243 11:44:43.664981 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1244 11:44:43.671758 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1245 11:44:43.678637 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1246 11:44:43.688505 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1247 11:44:43.695310 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1248 11:44:43.701844 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1249 11:44:43.711647 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1250 11:44:43.718090 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1251 11:44:43.725039 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1252 11:44:43.731610 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1253 11:44:43.741489 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1254 11:44:43.742194 Setting resources...
1255 11:44:43.748196 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1256 11:44:43.751134 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1257 11:44:43.757499 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1258 11:44:43.761067 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1259 11:44:43.764040 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1260 11:44:43.771621 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1261 11:44:43.777600 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1262 11:44:43.784474 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1263 11:44:43.790598 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1264 11:44:43.797846 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1265 11:44:43.800573 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1266 11:44:43.803815 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1267 11:44:43.810814 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1268 11:44:43.814019 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1269 11:44:43.820484 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1270 11:44:43.824230 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1271 11:44:43.830227 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1272 11:44:43.833436 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1273 11:44:43.840722 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1274 11:44:43.843771 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1275 11:44:43.850502 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1276 11:44:43.853527 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1277 11:44:43.860575 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1278 11:44:43.863291 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1279 11:44:43.870043 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1280 11:44:43.873761 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1281 11:44:43.880219 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1282 11:44:43.883156 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1283 11:44:43.886491 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1284 11:44:43.893483 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1285 11:44:43.896173 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1286 11:44:43.903207 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1287 11:44:43.909500 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1288 11:44:43.916804 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1289 11:44:43.926533 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1290 11:44:43.933223 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1291 11:44:43.936633 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1292 11:44:43.946309 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1293 11:44:43.949559 Root Device assign_resources, bus 0 link: 0
1294 11:44:43.952375 DOMAIN: 0000 assign_resources, bus 0 link: 0
1295 11:44:43.962579 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1296 11:44:43.969316 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1297 11:44:43.979267 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1298 11:44:43.985814 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1299 11:44:43.995643 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1300 11:44:44.002798 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1301 11:44:44.009259 PCI: 00:14.0 assign_resources, bus 0 link: 0
1302 11:44:44.012486 PCI: 00:14.0 assign_resources, bus 0 link: 0
1303 11:44:44.022775 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1304 11:44:44.028810 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1305 11:44:44.035491 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1306 11:44:44.045746 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1307 11:44:44.048990 PCI: 00:15.0 assign_resources, bus 1 link: 0
1308 11:44:44.055687 PCI: 00:15.0 assign_resources, bus 1 link: 0
1309 11:44:44.062691 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1310 11:44:44.069144 PCI: 00:15.1 assign_resources, bus 2 link: 0
1311 11:44:44.072066 PCI: 00:15.1 assign_resources, bus 2 link: 0
1312 11:44:44.078841 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1313 11:44:44.088941 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1314 11:44:44.095401 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1315 11:44:44.105392 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1316 11:44:44.112017 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1317 11:44:44.118625 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1318 11:44:44.126030 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1319 11:44:44.136059 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1320 11:44:44.139331 PCI: 00:19.0 assign_resources, bus 3 link: 0
1321 11:44:44.145566 PCI: 00:19.0 assign_resources, bus 3 link: 0
1322 11:44:44.152478 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1323 11:44:44.161589 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1324 11:44:44.171811 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1325 11:44:44.175528 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1326 11:44:44.182244 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1327 11:44:44.188375 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1328 11:44:44.195115 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1329 11:44:44.204913 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1330 11:44:44.208101 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1331 11:44:44.214736 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1332 11:44:44.221328 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1333 11:44:44.228044 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1334 11:44:44.231274 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1335 11:44:44.234376 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1336 11:44:44.241997 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1337 11:44:44.245156 LPC: Trying to open IO window from 800 size 1ff
1338 11:44:44.255006 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1339 11:44:44.261434 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1340 11:44:44.271659 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1341 11:44:44.278344 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1342 11:44:44.284494 DOMAIN: 0000 assign_resources, bus 0 link: 0
1343 11:44:44.287756 Root Device assign_resources, bus 0 link: 0
1344 11:44:44.291270 Done setting resources.
1345 11:44:44.298075 Show resources in subtree (Root Device)...After assigning values.
1346 11:44:44.300910 Root Device child on link 0 CPU_CLUSTER: 0
1347 11:44:44.304296 CPU_CLUSTER: 0 child on link 0 APIC: 00
1348 11:44:44.307637 APIC: 00
1349 11:44:44.308075 APIC: 03
1350 11:44:44.311058 APIC: 04
1351 11:44:44.311784 APIC: 06
1352 11:44:44.312286 APIC: 01
1353 11:44:44.314260 APIC: 02
1354 11:44:44.314729 APIC: 07
1355 11:44:44.315077 APIC: 05
1356 11:44:44.321005 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1357 11:44:44.330729 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1358 11:44:44.340834 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1359 11:44:44.344074 PCI: 00:00.0
1360 11:44:44.353788 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1361 11:44:44.360619 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1362 11:44:44.370331 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1363 11:44:44.380185 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1364 11:44:44.390335 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1365 11:44:44.400580 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1366 11:44:44.406619 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1367 11:44:44.416820 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1368 11:44:44.426265 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1369 11:44:44.436223 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1370 11:44:44.446346 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1371 11:44:44.456767 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1372 11:44:44.463173 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1373 11:44:44.472399 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1374 11:44:44.482396 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1375 11:44:44.492444 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1376 11:44:44.495588 PCI: 00:02.0
1377 11:44:44.505845 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1378 11:44:44.515381 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1379 11:44:44.525316 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1380 11:44:44.525858 PCI: 00:04.0
1381 11:44:44.528745 PCI: 00:08.0
1382 11:44:44.538838 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1383 11:44:44.539432 PCI: 00:12.0
1384 11:44:44.548615 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1385 11:44:44.554897 PCI: 00:14.0 child on link 0 USB0 port 0
1386 11:44:44.564767 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1387 11:44:44.568722 USB0 port 0 child on link 0 USB2 port 0
1388 11:44:44.571832 USB2 port 0
1389 11:44:44.572390 USB2 port 1
1390 11:44:44.575529 USB2 port 2
1391 11:44:44.576097 USB2 port 3
1392 11:44:44.578505 USB2 port 5
1393 11:44:44.579058 USB2 port 6
1394 11:44:44.581570 USB2 port 9
1395 11:44:44.585134 USB3 port 0
1396 11:44:44.585698 USB3 port 1
1397 11:44:44.587976 USB3 port 2
1398 11:44:44.588471 USB3 port 3
1399 11:44:44.591877 USB3 port 4
1400 11:44:44.592458 PCI: 00:14.2
1401 11:44:44.602108 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1402 11:44:44.611329 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1403 11:44:44.614202 PCI: 00:14.3
1404 11:44:44.624522 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1405 11:44:44.627836 PCI: 00:15.0 child on link 0 I2C: 01:15
1406 11:44:44.637450 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1407 11:44:44.641095 I2C: 01:15
1408 11:44:44.644109 PCI: 00:15.1 child on link 0 I2C: 02:5d
1409 11:44:44.654061 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1410 11:44:44.657467 I2C: 02:5d
1411 11:44:44.657936 GENERIC: 0.0
1412 11:44:44.661437 PCI: 00:16.0
1413 11:44:44.671062 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1414 11:44:44.671634 PCI: 00:17.0
1415 11:44:44.684369 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1416 11:44:44.693821 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1417 11:44:44.700979 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1418 11:44:44.710589 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1419 11:44:44.720585 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1420 11:44:44.730266 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1421 11:44:44.733552 PCI: 00:19.0 child on link 0 I2C: 03:1a
1422 11:44:44.743818 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1423 11:44:44.746450 I2C: 03:1a
1424 11:44:44.746907 I2C: 03:38
1425 11:44:44.750330 I2C: 03:39
1426 11:44:44.750872 I2C: 03:3a
1427 11:44:44.753792 I2C: 03:3b
1428 11:44:44.756607 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1429 11:44:44.766244 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1430 11:44:44.776717 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1431 11:44:44.786744 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1432 11:44:44.789554 PCI: 01:00.0
1433 11:44:44.799900 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1434 11:44:44.800478 PCI: 00:1e.0
1435 11:44:44.812841 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1436 11:44:44.823074 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1437 11:44:44.826341 PCI: 00:1e.2 child on link 0 SPI: 00
1438 11:44:44.836029 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1439 11:44:44.836490 SPI: 00
1440 11:44:44.842714 PCI: 00:1e.3 child on link 0 SPI: 01
1441 11:44:44.852225 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1442 11:44:44.852767 SPI: 01
1443 11:44:44.855891 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1444 11:44:44.865623 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1445 11:44:44.875942 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1446 11:44:44.876497 PNP: 0c09.0
1447 11:44:44.885518 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1448 11:44:44.886080 PCI: 00:1f.3
1449 11:44:44.899152 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1450 11:44:44.908914 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1451 11:44:44.909468 PCI: 00:1f.4
1452 11:44:44.918325 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1453 11:44:44.928697 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1454 11:44:44.931706 PCI: 00:1f.5
1455 11:44:44.942255 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1456 11:44:44.945067 Done allocating resources.
1457 11:44:44.948550 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1458 11:44:44.951628 Enabling resources...
1459 11:44:44.954615 PCI: 00:00.0 subsystem <- 8086/9b61
1460 11:44:44.958426 PCI: 00:00.0 cmd <- 06
1461 11:44:44.961461 PCI: 00:02.0 subsystem <- 8086/9b41
1462 11:44:44.964444 PCI: 00:02.0 cmd <- 03
1463 11:44:44.968075 PCI: 00:08.0 cmd <- 06
1464 11:44:44.971624 PCI: 00:12.0 subsystem <- 8086/02f9
1465 11:44:44.975012 PCI: 00:12.0 cmd <- 02
1466 11:44:44.977925 PCI: 00:14.0 subsystem <- 8086/02ed
1467 11:44:44.981439 PCI: 00:14.0 cmd <- 02
1468 11:44:44.981990 PCI: 00:14.2 cmd <- 02
1469 11:44:44.987624 PCI: 00:14.3 subsystem <- 8086/02f0
1470 11:44:44.988072 PCI: 00:14.3 cmd <- 02
1471 11:44:44.991273 PCI: 00:15.0 subsystem <- 8086/02e8
1472 11:44:44.994254 PCI: 00:15.0 cmd <- 02
1473 11:44:44.997521 PCI: 00:15.1 subsystem <- 8086/02e9
1474 11:44:45.001219 PCI: 00:15.1 cmd <- 02
1475 11:44:45.004014 PCI: 00:16.0 subsystem <- 8086/02e0
1476 11:44:45.007647 PCI: 00:16.0 cmd <- 02
1477 11:44:45.011067 PCI: 00:17.0 subsystem <- 8086/02d3
1478 11:44:45.014278 PCI: 00:17.0 cmd <- 03
1479 11:44:45.017053 PCI: 00:19.0 subsystem <- 8086/02c5
1480 11:44:45.020776 PCI: 00:19.0 cmd <- 02
1481 11:44:45.024207 PCI: 00:1d.0 bridge ctrl <- 0013
1482 11:44:45.027258 PCI: 00:1d.0 subsystem <- 8086/02b0
1483 11:44:45.030831 PCI: 00:1d.0 cmd <- 06
1484 11:44:45.034151 PCI: 00:1e.0 subsystem <- 8086/02a8
1485 11:44:45.037460 PCI: 00:1e.0 cmd <- 06
1486 11:44:45.040496 PCI: 00:1e.2 subsystem <- 8086/02aa
1487 11:44:45.043562 PCI: 00:1e.2 cmd <- 06
1488 11:44:45.046927 PCI: 00:1e.3 subsystem <- 8086/02ab
1489 11:44:45.047534 PCI: 00:1e.3 cmd <- 02
1490 11:44:45.053981 PCI: 00:1f.0 subsystem <- 8086/0284
1491 11:44:45.054549 PCI: 00:1f.0 cmd <- 407
1492 11:44:45.056684 PCI: 00:1f.3 subsystem <- 8086/02c8
1493 11:44:45.060306 PCI: 00:1f.3 cmd <- 02
1494 11:44:45.063503 PCI: 00:1f.4 subsystem <- 8086/02a3
1495 11:44:45.067123 PCI: 00:1f.4 cmd <- 03
1496 11:44:45.069923 PCI: 00:1f.5 subsystem <- 8086/02a4
1497 11:44:45.073388 PCI: 00:1f.5 cmd <- 406
1498 11:44:45.082495 PCI: 01:00.0 cmd <- 02
1499 11:44:45.088142 done.
1500 11:44:45.097520 ME: Version: 14.0.39.1367
1501 11:44:45.103858 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 9
1502 11:44:45.106963 Initializing devices...
1503 11:44:45.107633 Root Device init ...
1504 11:44:45.113590 Chrome EC: Set SMI mask to 0x0000000000000000
1505 11:44:45.117041 Chrome EC: clear events_b mask to 0x0000000000000000
1506 11:44:45.123158 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1507 11:44:45.130358 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1508 11:44:45.137106 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1509 11:44:45.139998 Chrome EC: Set WAKE mask to 0x0000000000000000
1510 11:44:45.143256 Root Device init finished in 35229 usecs
1511 11:44:45.147244 CPU_CLUSTER: 0 init ...
1512 11:44:45.153839 CPU_CLUSTER: 0 init finished in 2447 usecs
1513 11:44:45.158323 PCI: 00:00.0 init ...
1514 11:44:45.161393 CPU TDP: 15 Watts
1515 11:44:45.164175 CPU PL2 = 64 Watts
1516 11:44:45.167384 PCI: 00:00.0 init finished in 7073 usecs
1517 11:44:45.171203 PCI: 00:02.0 init ...
1518 11:44:45.174367 PCI: 00:02.0 init finished in 2254 usecs
1519 11:44:45.177543 PCI: 00:08.0 init ...
1520 11:44:45.180954 PCI: 00:08.0 init finished in 2253 usecs
1521 11:44:45.184321 PCI: 00:12.0 init ...
1522 11:44:45.187678 PCI: 00:12.0 init finished in 2244 usecs
1523 11:44:45.190934 PCI: 00:14.0 init ...
1524 11:44:45.193938 PCI: 00:14.0 init finished in 2245 usecs
1525 11:44:45.197295 PCI: 00:14.2 init ...
1526 11:44:45.200893 PCI: 00:14.2 init finished in 2243 usecs
1527 11:44:45.203993 PCI: 00:14.3 init ...
1528 11:44:45.207504 PCI: 00:14.3 init finished in 2273 usecs
1529 11:44:45.210495 PCI: 00:15.0 init ...
1530 11:44:45.214149 DW I2C bus 0 at 0xd121f000 (400 KHz)
1531 11:44:45.217403 PCI: 00:15.0 init finished in 5980 usecs
1532 11:44:45.220711 PCI: 00:15.1 init ...
1533 11:44:45.224461 DW I2C bus 1 at 0xd1220000 (400 KHz)
1534 11:44:45.230598 PCI: 00:15.1 init finished in 5978 usecs
1535 11:44:45.231044 PCI: 00:16.0 init ...
1536 11:44:45.237158 PCI: 00:16.0 init finished in 2252 usecs
1537 11:44:45.240553 PCI: 00:19.0 init ...
1538 11:44:45.243734 DW I2C bus 4 at 0xd1222000 (400 KHz)
1539 11:44:45.247430 PCI: 00:19.0 init finished in 5977 usecs
1540 11:44:45.250613 PCI: 00:1d.0 init ...
1541 11:44:45.253862 Initializing PCH PCIe bridge.
1542 11:44:45.256971 PCI: 00:1d.0 init finished in 5277 usecs
1543 11:44:45.259980 PCI: 00:1f.0 init ...
1544 11:44:45.263192 IOAPIC: Initializing IOAPIC at 0xfec00000
1545 11:44:45.269831 IOAPIC: Bootstrap Processor Local APIC = 0x00
1546 11:44:45.270278 IOAPIC: ID = 0x02
1547 11:44:45.274142 IOAPIC: Dumping registers
1548 11:44:45.276750 reg 0x0000: 0x02000000
1549 11:44:45.280646 reg 0x0001: 0x00770020
1550 11:44:45.281209 reg 0x0002: 0x00000000
1551 11:44:45.287132 PCI: 00:1f.0 init finished in 23548 usecs
1552 11:44:45.290173 PCI: 00:1f.4 init ...
1553 11:44:45.292780 PCI: 00:1f.4 init finished in 2264 usecs
1554 11:44:45.303799 PCI: 01:00.0 init ...
1555 11:44:45.307249 PCI: 01:00.0 init finished in 2244 usecs
1556 11:44:45.311459 PNP: 0c09.0 init ...
1557 11:44:45.315008 Google Chrome EC uptime: 11.053 seconds
1558 11:44:45.321065 Google Chrome AP resets since EC boot: 0
1559 11:44:45.324608 Google Chrome most recent AP reset causes:
1560 11:44:45.331024 Google Chrome EC reset flags at last EC boot: reset-pin
1561 11:44:45.334879 PNP: 0c09.0 init finished in 20574 usecs
1562 11:44:45.338157 Devices initialized
1563 11:44:45.341687 Show all devs... After init.
1564 11:44:45.342245 Root Device: enabled 1
1565 11:44:45.344443 CPU_CLUSTER: 0: enabled 1
1566 11:44:45.347774 DOMAIN: 0000: enabled 1
1567 11:44:45.348333 APIC: 00: enabled 1
1568 11:44:45.350920 PCI: 00:00.0: enabled 1
1569 11:44:45.354496 PCI: 00:02.0: enabled 1
1570 11:44:45.357399 PCI: 00:04.0: enabled 0
1571 11:44:45.357850 PCI: 00:05.0: enabled 0
1572 11:44:45.361061 PCI: 00:12.0: enabled 1
1573 11:44:45.364355 PCI: 00:12.5: enabled 0
1574 11:44:45.367575 PCI: 00:12.6: enabled 0
1575 11:44:45.368023 PCI: 00:14.0: enabled 1
1576 11:44:45.370600 PCI: 00:14.1: enabled 0
1577 11:44:45.374600 PCI: 00:14.3: enabled 1
1578 11:44:45.375191 PCI: 00:14.5: enabled 0
1579 11:44:45.377914 PCI: 00:15.0: enabled 1
1580 11:44:45.381034 PCI: 00:15.1: enabled 1
1581 11:44:45.383885 PCI: 00:15.2: enabled 0
1582 11:44:45.384333 PCI: 00:15.3: enabled 0
1583 11:44:45.388037 PCI: 00:16.0: enabled 1
1584 11:44:45.391298 PCI: 00:16.1: enabled 0
1585 11:44:45.394099 PCI: 00:16.2: enabled 0
1586 11:44:45.394548 PCI: 00:16.3: enabled 0
1587 11:44:45.397217 PCI: 00:16.4: enabled 0
1588 11:44:45.400361 PCI: 00:16.5: enabled 0
1589 11:44:45.404084 PCI: 00:17.0: enabled 1
1590 11:44:45.404538 PCI: 00:19.0: enabled 1
1591 11:44:45.407016 PCI: 00:19.1: enabled 0
1592 11:44:45.410451 PCI: 00:19.2: enabled 0
1593 11:44:45.411000 PCI: 00:1a.0: enabled 0
1594 11:44:45.413597 PCI: 00:1c.0: enabled 0
1595 11:44:45.416986 PCI: 00:1c.1: enabled 0
1596 11:44:45.420932 PCI: 00:1c.2: enabled 0
1597 11:44:45.421484 PCI: 00:1c.3: enabled 0
1598 11:44:45.423461 PCI: 00:1c.4: enabled 0
1599 11:44:45.426850 PCI: 00:1c.5: enabled 0
1600 11:44:45.430280 PCI: 00:1c.6: enabled 0
1601 11:44:45.430735 PCI: 00:1c.7: enabled 0
1602 11:44:45.433227 PCI: 00:1d.0: enabled 1
1603 11:44:45.436696 PCI: 00:1d.1: enabled 0
1604 11:44:45.440084 PCI: 00:1d.2: enabled 0
1605 11:44:45.440550 PCI: 00:1d.3: enabled 0
1606 11:44:45.443109 PCI: 00:1d.4: enabled 0
1607 11:44:45.446699 PCI: 00:1d.5: enabled 0
1608 11:44:45.450564 PCI: 00:1e.0: enabled 1
1609 11:44:45.451157 PCI: 00:1e.1: enabled 0
1610 11:44:45.453764 PCI: 00:1e.2: enabled 1
1611 11:44:45.456622 PCI: 00:1e.3: enabled 1
1612 11:44:45.459849 PCI: 00:1f.0: enabled 1
1613 11:44:45.460304 PCI: 00:1f.1: enabled 0
1614 11:44:45.463062 PCI: 00:1f.2: enabled 0
1615 11:44:45.466458 PCI: 00:1f.3: enabled 1
1616 11:44:45.469560 PCI: 00:1f.4: enabled 1
1617 11:44:45.470015 PCI: 00:1f.5: enabled 1
1618 11:44:45.473159 PCI: 00:1f.6: enabled 0
1619 11:44:45.476828 USB0 port 0: enabled 1
1620 11:44:45.477381 I2C: 01:15: enabled 1
1621 11:44:45.479736 I2C: 02:5d: enabled 1
1622 11:44:45.482747 GENERIC: 0.0: enabled 1
1623 11:44:45.483241 I2C: 03:1a: enabled 1
1624 11:44:45.486423 I2C: 03:38: enabled 1
1625 11:44:45.490082 I2C: 03:39: enabled 1
1626 11:44:45.490629 I2C: 03:3a: enabled 1
1627 11:44:45.493042 I2C: 03:3b: enabled 1
1628 11:44:45.496100 PCI: 00:00.0: enabled 1
1629 11:44:45.496549 SPI: 00: enabled 1
1630 11:44:45.499247 SPI: 01: enabled 1
1631 11:44:45.503257 PNP: 0c09.0: enabled 1
1632 11:44:45.503807 USB2 port 0: enabled 1
1633 11:44:45.506402 USB2 port 1: enabled 1
1634 11:44:45.509727 USB2 port 2: enabled 0
1635 11:44:45.512487 USB2 port 3: enabled 0
1636 11:44:45.512978 USB2 port 5: enabled 0
1637 11:44:45.516403 USB2 port 6: enabled 1
1638 11:44:45.519110 USB2 port 9: enabled 1
1639 11:44:45.519560 USB3 port 0: enabled 1
1640 11:44:45.523178 USB3 port 1: enabled 1
1641 11:44:45.526063 USB3 port 2: enabled 1
1642 11:44:45.529021 USB3 port 3: enabled 1
1643 11:44:45.529471 USB3 port 4: enabled 0
1644 11:44:45.532542 APIC: 03: enabled 1
1645 11:44:45.533006 APIC: 04: enabled 1
1646 11:44:45.536020 APIC: 06: enabled 1
1647 11:44:45.539450 APIC: 01: enabled 1
1648 11:44:45.539904 APIC: 02: enabled 1
1649 11:44:45.542488 APIC: 07: enabled 1
1650 11:44:45.546060 APIC: 05: enabled 1
1651 11:44:45.546633 PCI: 00:08.0: enabled 1
1652 11:44:45.549692 PCI: 00:14.2: enabled 1
1653 11:44:45.552151 PCI: 01:00.0: enabled 1
1654 11:44:45.555663 Disabling ACPI via APMC:
1655 11:44:45.559169 done.
1656 11:44:45.562655 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1657 11:44:45.566151 ELOG: NV offset 0xaf0000 size 0x4000
1658 11:44:45.573280 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1659 11:44:45.579989 ELOG: Event(17) added with size 13 at 2023-04-03 11:44:45 UTC
1660 11:44:45.586247 ELOG: Event(92) added with size 9 at 2023-04-03 11:44:45 UTC
1661 11:44:45.592753 ELOG: Event(93) added with size 9 at 2023-04-03 11:44:45 UTC
1662 11:44:45.599701 ELOG: Event(9A) added with size 9 at 2023-04-03 11:44:45 UTC
1663 11:44:45.606511 ELOG: Event(9E) added with size 10 at 2023-04-03 11:44:45 UTC
1664 11:44:45.612758 ELOG: Event(9F) added with size 14 at 2023-04-03 11:44:45 UTC
1665 11:44:45.615965 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1666 11:44:45.623309 ELOG: Event(A1) added with size 10 at 2023-04-03 11:44:45 UTC
1667 11:44:45.633078 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1668 11:44:45.639629 ELOG: Event(A0) added with size 9 at 2023-04-03 11:44:45 UTC
1669 11:44:45.643273 elog_add_boot_reason: Logged dev mode boot
1670 11:44:45.646152 Finalize devices...
1671 11:44:45.646609 PCI: 00:17.0 final
1672 11:44:45.649717 Devices finalized
1673 11:44:45.653086 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1674 11:44:45.659484 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1675 11:44:45.662836 ME: HFSTS1 : 0x90000245
1676 11:44:45.665768 ME: HFSTS2 : 0x3B850126
1677 11:44:45.672904 ME: HFSTS3 : 0x00000020
1678 11:44:45.676621 ME: HFSTS4 : 0x00004800
1679 11:44:45.680008 ME: HFSTS5 : 0x00000000
1680 11:44:45.683240 ME: HFSTS6 : 0x40400006
1681 11:44:45.686083 ME: Manufacturing Mode : NO
1682 11:44:45.689508 ME: FW Partition Table : OK
1683 11:44:45.692458 ME: Bringup Loader Failure : NO
1684 11:44:45.696500 ME: Firmware Init Complete : YES
1685 11:44:45.699537 ME: Boot Options Present : NO
1686 11:44:45.703155 ME: Update In Progress : NO
1687 11:44:45.706400 ME: D0i3 Support : YES
1688 11:44:45.709673 ME: Low Power State Enabled : NO
1689 11:44:45.712477 ME: CPU Replaced : NO
1690 11:44:45.716027 ME: CPU Replacement Valid : YES
1691 11:44:45.718875 ME: Current Working State : 5
1692 11:44:45.722978 ME: Current Operation State : 1
1693 11:44:45.725854 ME: Current Operation Mode : 0
1694 11:44:45.728966 ME: Error Code : 0
1695 11:44:45.732241 ME: CPU Debug Disabled : YES
1696 11:44:45.735525 ME: TXT Support : NO
1697 11:44:45.742537 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1698 11:44:45.748962 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1699 11:44:45.749387 CBFS @ c08000 size 3f8000
1700 11:44:45.755235 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1701 11:44:45.758620 CBFS: Locating 'fallback/dsdt.aml'
1702 11:44:45.762017 CBFS: Found @ offset 10bb80 size 3fa5
1703 11:44:45.769223 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 11:44:45.771677 CBFS @ c08000 size 3f8000
1705 11:44:45.778485 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 11:44:45.778991 CBFS: Locating 'fallback/slic'
1707 11:44:45.784243 CBFS: 'fallback/slic' not found.
1708 11:44:45.790373 ACPI: Writing ACPI tables at 99b3e000.
1709 11:44:45.790827 ACPI: * FACS
1710 11:44:45.793670 ACPI: * DSDT
1711 11:44:45.797430 Ramoops buffer: 0x100000@0x99a3d000.
1712 11:44:45.800972 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1713 11:44:45.807482 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1714 11:44:45.810562 Google Chrome EC: version:
1715 11:44:45.813901 ro: helios_v2.0.2659-56403530b
1716 11:44:45.817118 rw: helios_v2.0.2849-c41de27e7d
1717 11:44:45.817677 running image: 1
1718 11:44:45.821592 ACPI: * FADT
1719 11:44:45.822138 SCI is IRQ9
1720 11:44:45.827916 ACPI: added table 1/32, length now 40
1721 11:44:45.828466 ACPI: * SSDT
1722 11:44:45.830919 Found 1 CPU(s) with 8 core(s) each.
1723 11:44:45.834811 Error: Could not locate 'wifi_sar' in VPD.
1724 11:44:45.841375 Checking CBFS for default SAR values
1725 11:44:45.844477 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 11:44:45.847631 CBFS @ c08000 size 3f8000
1727 11:44:45.854207 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 11:44:45.857364 CBFS: Locating 'wifi_sar_defaults.hex'
1729 11:44:45.860466 CBFS: Found @ offset 5fac0 size 77
1730 11:44:45.864009 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1731 11:44:45.870773 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1732 11:44:45.874136 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1733 11:44:45.880387 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1734 11:44:45.883907 failed to find key in VPD: dsm_calib_r0_0
1735 11:44:45.894427 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1736 11:44:45.897593 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1737 11:44:45.903648 failed to find key in VPD: dsm_calib_r0_1
1738 11:44:45.910431 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1739 11:44:45.917598 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1740 11:44:45.920370 failed to find key in VPD: dsm_calib_r0_2
1741 11:44:45.930189 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1742 11:44:45.933120 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1743 11:44:45.940034 failed to find key in VPD: dsm_calib_r0_3
1744 11:44:45.946703 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1745 11:44:45.953395 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1746 11:44:45.956428 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1747 11:44:45.962808 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1748 11:44:45.966839 EC returned error result code 1
1749 11:44:45.970459 EC returned error result code 1
1750 11:44:45.973345 EC returned error result code 1
1751 11:44:45.976690 PS2K: Bad resp from EC. Vivaldi disabled!
1752 11:44:45.983480 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1753 11:44:45.990238 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1754 11:44:45.993750 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1755 11:44:46.000163 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1756 11:44:46.003765 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1757 11:44:46.009900 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1758 11:44:46.016220 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1759 11:44:46.023265 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1760 11:44:46.026655 ACPI: added table 2/32, length now 44
1761 11:44:46.027259 ACPI: * MCFG
1762 11:44:46.033161 ACPI: added table 3/32, length now 48
1763 11:44:46.033720 ACPI: * TPM2
1764 11:44:46.036181 TPM2 log created at 99a2d000
1765 11:44:46.039715 ACPI: added table 4/32, length now 52
1766 11:44:46.043540 ACPI: * MADT
1767 11:44:46.044099 SCI is IRQ9
1768 11:44:46.046544 ACPI: added table 5/32, length now 56
1769 11:44:46.049715 current = 99b43ac0
1770 11:44:46.050271 ACPI: * DMAR
1771 11:44:46.052593 ACPI: added table 6/32, length now 60
1772 11:44:46.055603 ACPI: * IGD OpRegion
1773 11:44:46.058934 GMA: Found VBT in CBFS
1774 11:44:46.062099 GMA: Found valid VBT in CBFS
1775 11:44:46.065657 ACPI: added table 7/32, length now 64
1776 11:44:46.066110 ACPI: * HPET
1777 11:44:46.072277 ACPI: added table 8/32, length now 68
1778 11:44:46.072829 ACPI: done.
1779 11:44:46.075712 ACPI tables: 31744 bytes.
1780 11:44:46.079619 smbios_write_tables: 99a2c000
1781 11:44:46.082918 EC returned error result code 3
1782 11:44:46.086079 Couldn't obtain OEM name from CBI
1783 11:44:46.088870 Create SMBIOS type 17
1784 11:44:46.092316 PCI: 00:00.0 (Intel Cannonlake)
1785 11:44:46.092766 PCI: 00:14.3 (Intel WiFi)
1786 11:44:46.095635 SMBIOS tables: 939 bytes.
1787 11:44:46.099255 Writing table forward entry at 0x00000500
1788 11:44:46.105420 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1789 11:44:46.109096 Writing coreboot table at 0x99b62000
1790 11:44:46.115921 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1791 11:44:46.122432 1. 0000000000001000-000000000009ffff: RAM
1792 11:44:46.125777 2. 00000000000a0000-00000000000fffff: RESERVED
1793 11:44:46.129044 3. 0000000000100000-0000000099a2bfff: RAM
1794 11:44:46.135264 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1795 11:44:46.142316 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1796 11:44:46.145419 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1797 11:44:46.151516 7. 000000009a000000-000000009f7fffff: RESERVED
1798 11:44:46.154885 8. 00000000e0000000-00000000efffffff: RESERVED
1799 11:44:46.161371 9. 00000000fc000000-00000000fc000fff: RESERVED
1800 11:44:46.165531 10. 00000000fe000000-00000000fe00ffff: RESERVED
1801 11:44:46.171459 11. 00000000fed10000-00000000fed17fff: RESERVED
1802 11:44:46.175156 12. 00000000fed80000-00000000fed83fff: RESERVED
1803 11:44:46.178604 13. 00000000fed90000-00000000fed91fff: RESERVED
1804 11:44:46.184816 14. 00000000feda0000-00000000feda1fff: RESERVED
1805 11:44:46.188439 15. 0000000100000000-000000045e7fffff: RAM
1806 11:44:46.194966 Graphics framebuffer located at 0xc0000000
1807 11:44:46.195562 Passing 5 GPIOs to payload:
1808 11:44:46.201803 NAME | PORT | POLARITY | VALUE
1809 11:44:46.207783 write protect | undefined | high | low
1810 11:44:46.211277 lid | undefined | high | high
1811 11:44:46.218368 power | undefined | high | low
1812 11:44:46.221522 oprom | undefined | high | low
1813 11:44:46.227957 EC in RW | 0x000000cb | high | low
1814 11:44:46.228526 Board ID: 4
1815 11:44:46.234595 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1816 11:44:46.237847 CBFS @ c08000 size 3f8000
1817 11:44:46.241101 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1818 11:44:46.247925 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1819 11:44:46.251194 coreboot table: 1492 bytes.
1820 11:44:46.254642 IMD ROOT 0. 99fff000 00001000
1821 11:44:46.257750 IMD SMALL 1. 99ffe000 00001000
1822 11:44:46.261248 FSP MEMORY 2. 99c4e000 003b0000
1823 11:44:46.264147 CONSOLE 3. 99c2e000 00020000
1824 11:44:46.267264 FMAP 4. 99c2d000 0000054e
1825 11:44:46.270666 TIME STAMP 5. 99c2c000 00000910
1826 11:44:46.274764 VBOOT WORK 6. 99c18000 00014000
1827 11:44:46.277938 MRC DATA 7. 99c16000 00001958
1828 11:44:46.281102 ROMSTG STCK 8. 99c15000 00001000
1829 11:44:46.284181 AFTER CAR 9. 99c0b000 0000a000
1830 11:44:46.287530 RAMSTAGE 10. 99baf000 0005c000
1831 11:44:46.290935 REFCODE 11. 99b7a000 00035000
1832 11:44:46.293889 SMM BACKUP 12. 99b6a000 00010000
1833 11:44:46.297690 COREBOOT 13. 99b62000 00008000
1834 11:44:46.300441 ACPI 14. 99b3e000 00024000
1835 11:44:46.303981 ACPI GNVS 15. 99b3d000 00001000
1836 11:44:46.307451 RAMOOPS 16. 99a3d000 00100000
1837 11:44:46.310294 TPM2 TCGLOG17. 99a2d000 00010000
1838 11:44:46.313801 SMBIOS 18. 99a2c000 00000800
1839 11:44:46.317021 IMD small region:
1840 11:44:46.320328 IMD ROOT 0. 99ffec00 00000400
1841 11:44:46.324055 FSP RUNTIME 1. 99ffebe0 00000004
1842 11:44:46.327062 EC HOSTEVENT 2. 99ffebc0 00000008
1843 11:44:46.330679 POWER STATE 3. 99ffeb80 00000040
1844 11:44:46.333599 ROMSTAGE 4. 99ffeb60 00000004
1845 11:44:46.337095 MEM INFO 5. 99ffe9a0 000001b9
1846 11:44:46.340676 VPD 6. 99ffe920 0000006c
1847 11:44:46.343813 MTRR: Physical address space:
1848 11:44:46.350554 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1849 11:44:46.356923 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1850 11:44:46.363430 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1851 11:44:46.369732 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1852 11:44:46.377095 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1853 11:44:46.380241 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1854 11:44:46.387355 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1855 11:44:46.393848 MTRR: Fixed MSR 0x250 0x0606060606060606
1856 11:44:46.396670 MTRR: Fixed MSR 0x258 0x0606060606060606
1857 11:44:46.399806 MTRR: Fixed MSR 0x259 0x0000000000000000
1858 11:44:46.403437 MTRR: Fixed MSR 0x268 0x0606060606060606
1859 11:44:46.406350 MTRR: Fixed MSR 0x269 0x0606060606060606
1860 11:44:46.412787 MTRR: Fixed MSR 0x26a 0x0606060606060606
1861 11:44:46.416502 MTRR: Fixed MSR 0x26b 0x0606060606060606
1862 11:44:46.419619 MTRR: Fixed MSR 0x26c 0x0606060606060606
1863 11:44:46.422680 MTRR: Fixed MSR 0x26d 0x0606060606060606
1864 11:44:46.429053 MTRR: Fixed MSR 0x26e 0x0606060606060606
1865 11:44:46.432422 MTRR: Fixed MSR 0x26f 0x0606060606060606
1866 11:44:46.436032 call enable_fixed_mtrr()
1867 11:44:46.439044 CPU physical address size: 39 bits
1868 11:44:46.442934 MTRR: default type WB/UC MTRR counts: 6/8.
1869 11:44:46.445670 MTRR: WB selected as default type.
1870 11:44:46.452581 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1871 11:44:46.458683 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1872 11:44:46.465775 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1873 11:44:46.472187 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1874 11:44:46.479123 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1875 11:44:46.485481 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1876 11:44:46.488455 MTRR: Fixed MSR 0x250 0x0606060606060606
1877 11:44:46.495641 MTRR: Fixed MSR 0x258 0x0606060606060606
1878 11:44:46.498846 MTRR: Fixed MSR 0x259 0x0000000000000000
1879 11:44:46.501827 MTRR: Fixed MSR 0x268 0x0606060606060606
1880 11:44:46.505294 MTRR: Fixed MSR 0x269 0x0606060606060606
1881 11:44:46.508901 MTRR: Fixed MSR 0x26a 0x0606060606060606
1882 11:44:46.515151 MTRR: Fixed MSR 0x26b 0x0606060606060606
1883 11:44:46.518497 MTRR: Fixed MSR 0x26c 0x0606060606060606
1884 11:44:46.521824 MTRR: Fixed MSR 0x26d 0x0606060606060606
1885 11:44:46.525134 MTRR: Fixed MSR 0x26e 0x0606060606060606
1886 11:44:46.531403 MTRR: Fixed MSR 0x26f 0x0606060606060606
1887 11:44:46.531853
1888 11:44:46.532201 MTRR check
1889 11:44:46.534792 Fixed MTRRs : Enabled
1890 11:44:46.538406 Variable MTRRs: Enabled
1891 11:44:46.538950
1892 11:44:46.539365 call enable_fixed_mtrr()
1893 11:44:46.544855 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1894 11:44:46.547841 CPU physical address size: 39 bits
1895 11:44:46.554845 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1896 11:44:46.558011 MTRR: Fixed MSR 0x250 0x0606060606060606
1897 11:44:46.561145 MTRR: Fixed MSR 0x258 0x0606060606060606
1898 11:44:46.568181 MTRR: Fixed MSR 0x259 0x0000000000000000
1899 11:44:46.571441 MTRR: Fixed MSR 0x268 0x0606060606060606
1900 11:44:46.574825 MTRR: Fixed MSR 0x269 0x0606060606060606
1901 11:44:46.578161 MTRR: Fixed MSR 0x26a 0x0606060606060606
1902 11:44:46.584461 MTRR: Fixed MSR 0x26b 0x0606060606060606
1903 11:44:46.587697 MTRR: Fixed MSR 0x26c 0x0606060606060606
1904 11:44:46.591463 MTRR: Fixed MSR 0x26d 0x0606060606060606
1905 11:44:46.594392 MTRR: Fixed MSR 0x26e 0x0606060606060606
1906 11:44:46.597869 MTRR: Fixed MSR 0x26f 0x0606060606060606
1907 11:44:46.604088 MTRR: Fixed MSR 0x250 0x0606060606060606
1908 11:44:46.607487 call enable_fixed_mtrr()
1909 11:44:46.610853 MTRR: Fixed MSR 0x258 0x0606060606060606
1910 11:44:46.614738 MTRR: Fixed MSR 0x259 0x0000000000000000
1911 11:44:46.617914 MTRR: Fixed MSR 0x268 0x0606060606060606
1912 11:44:46.623904 MTRR: Fixed MSR 0x269 0x0606060606060606
1913 11:44:46.627135 MTRR: Fixed MSR 0x26a 0x0606060606060606
1914 11:44:46.630436 MTRR: Fixed MSR 0x26b 0x0606060606060606
1915 11:44:46.634152 MTRR: Fixed MSR 0x26c 0x0606060606060606
1916 11:44:46.636996 MTRR: Fixed MSR 0x26d 0x0606060606060606
1917 11:44:46.643757 MTRR: Fixed MSR 0x26e 0x0606060606060606
1918 11:44:46.646790 MTRR: Fixed MSR 0x26f 0x0606060606060606
1919 11:44:46.650614 CPU physical address size: 39 bits
1920 11:44:46.653956 call enable_fixed_mtrr()
1921 11:44:46.657061 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 11:44:46.660467 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 11:44:46.667384 MTRR: Fixed MSR 0x258 0x0606060606060606
1924 11:44:46.670220 MTRR: Fixed MSR 0x259 0x0000000000000000
1925 11:44:46.673621 MTRR: Fixed MSR 0x268 0x0606060606060606
1926 11:44:46.677009 MTRR: Fixed MSR 0x269 0x0606060606060606
1927 11:44:46.683767 MTRR: Fixed MSR 0x26a 0x0606060606060606
1928 11:44:46.687064 MTRR: Fixed MSR 0x26b 0x0606060606060606
1929 11:44:46.690433 MTRR: Fixed MSR 0x26c 0x0606060606060606
1930 11:44:46.693656 MTRR: Fixed MSR 0x26d 0x0606060606060606
1931 11:44:46.700517 MTRR: Fixed MSR 0x26e 0x0606060606060606
1932 11:44:46.703754 MTRR: Fixed MSR 0x26f 0x0606060606060606
1933 11:44:46.706903 MTRR: Fixed MSR 0x258 0x0606060606060606
1934 11:44:46.710427 call enable_fixed_mtrr()
1935 11:44:46.713286 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 11:44:46.716460 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 11:44:46.723721 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 11:44:46.726663 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 11:44:46.729731 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 11:44:46.733662 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 11:44:46.739681 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 11:44:46.743060 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 11:44:46.746246 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 11:44:46.749681 CPU physical address size: 39 bits
1945 11:44:46.753431 call enable_fixed_mtrr()
1946 11:44:46.756591 MTRR: Fixed MSR 0x250 0x0606060606060606
1947 11:44:46.759790 MTRR: Fixed MSR 0x258 0x0606060606060606
1948 11:44:46.765978 MTRR: Fixed MSR 0x259 0x0000000000000000
1949 11:44:46.769323 MTRR: Fixed MSR 0x268 0x0606060606060606
1950 11:44:46.772782 MTRR: Fixed MSR 0x269 0x0606060606060606
1951 11:44:46.776485 MTRR: Fixed MSR 0x26a 0x0606060606060606
1952 11:44:46.782583 MTRR: Fixed MSR 0x26b 0x0606060606060606
1953 11:44:46.786534 MTRR: Fixed MSR 0x26c 0x0606060606060606
1954 11:44:46.789416 MTRR: Fixed MSR 0x26d 0x0606060606060606
1955 11:44:46.792655 MTRR: Fixed MSR 0x26e 0x0606060606060606
1956 11:44:46.799407 MTRR: Fixed MSR 0x26f 0x0606060606060606
1957 11:44:46.802393 MTRR: Fixed MSR 0x250 0x0606060606060606
1958 11:44:46.806311 call enable_fixed_mtrr()
1959 11:44:46.809742 MTRR: Fixed MSR 0x258 0x0606060606060606
1960 11:44:46.812933 MTRR: Fixed MSR 0x259 0x0000000000000000
1961 11:44:46.815781 MTRR: Fixed MSR 0x268 0x0606060606060606
1962 11:44:46.822799 MTRR: Fixed MSR 0x269 0x0606060606060606
1963 11:44:46.826012 MTRR: Fixed MSR 0x26a 0x0606060606060606
1964 11:44:46.829470 MTRR: Fixed MSR 0x26b 0x0606060606060606
1965 11:44:46.832680 MTRR: Fixed MSR 0x26c 0x0606060606060606
1966 11:44:46.839669 MTRR: Fixed MSR 0x26d 0x0606060606060606
1967 11:44:46.842760 MTRR: Fixed MSR 0x26e 0x0606060606060606
1968 11:44:46.845797 MTRR: Fixed MSR 0x26f 0x0606060606060606
1969 11:44:46.848911 CPU physical address size: 39 bits
1970 11:44:46.852141 call enable_fixed_mtrr()
1971 11:44:46.855258 CPU physical address size: 39 bits
1972 11:44:46.858773 CPU physical address size: 39 bits
1973 11:44:46.862024 CPU physical address size: 39 bits
1974 11:44:46.865592 CBFS @ c08000 size 3f8000
1975 11:44:46.871911 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1976 11:44:46.875476 CBFS: Locating 'fallback/payload'
1977 11:44:46.878549 CBFS: Found @ offset 1c96c0 size 3f798
1978 11:44:46.885197 Checking segment from ROM address 0xffdd16f8
1979 11:44:46.889156 Checking segment from ROM address 0xffdd1714
1980 11:44:46.891900 Loading segment from ROM address 0xffdd16f8
1981 11:44:46.895187 code (compression=0)
1982 11:44:46.905137 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1983 11:44:46.911918 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1984 11:44:46.915285 it's not compressed!
1985 11:44:47.006471 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1986 11:44:47.013018 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1987 11:44:47.016345 Loading segment from ROM address 0xffdd1714
1988 11:44:47.019857 Entry Point 0x30000000
1989 11:44:47.023407 Loaded segments
1990 11:44:47.029319 Finalizing chipset.
1991 11:44:47.031981 Finalizing SMM.
1992 11:44:47.035236 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1993 11:44:47.038750 mp_park_aps done after 0 msecs.
1994 11:44:47.045568 Jumping to boot code at 30000000(99b62000)
1995 11:44:47.051732 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1996 11:44:47.052286
1997 11:44:47.052664
1998 11:44:47.053001
1999 11:44:47.054841 Starting depthcharge on Helios...
2000 11:44:47.055366
2001 11:44:47.056390 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2002 11:44:47.056901 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2003 11:44:47.057335 Setting prompt string to ['hatch:']
2004 11:44:47.057750 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2005 11:44:47.065129 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2006 11:44:47.065592
2007 11:44:47.071453 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2008 11:44:47.071908
2009 11:44:47.078313 board_setup: Info: eMMC controller not present; skipping
2010 11:44:47.078874
2011 11:44:47.081401 New NVMe Controller 0x30053ac0 @ 00:1d:00
2012 11:44:47.081852
2013 11:44:47.088235 board_setup: Info: SDHCI controller not present; skipping
2014 11:44:47.088783
2015 11:44:47.094577 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2016 11:44:47.095029
2017 11:44:47.095434 Wipe memory regions:
2018 11:44:47.095775
2019 11:44:47.097533 [0x00000000001000, 0x000000000a0000)
2020 11:44:47.097989
2021 11:44:47.104374 [0x00000000100000, 0x00000030000000)
2022 11:44:47.168025
2023 11:44:47.171446 [0x00000030657430, 0x00000099a2c000)
2024 11:44:47.317776
2025 11:44:47.320592 [0x00000100000000, 0x0000045e800000)
2026 11:44:48.777066
2027 11:44:48.777609 R8152: Initializing
2028 11:44:48.777970
2029 11:44:48.780858 Version 9 (ocp_data = 6010)
2030 11:44:48.784740
2031 11:44:48.785283 R8152: Done initializing
2032 11:44:48.785676
2033 11:44:48.787847 Adding net device
2034 11:44:49.270297
2035 11:44:49.270858 R8152: Initializing
2036 11:44:49.271265
2037 11:44:49.273912 Version 6 (ocp_data = 5c30)
2038 11:44:49.274346
2039 11:44:49.276973 R8152: Done initializing
2040 11:44:49.277067
2041 11:44:49.279944 net_add_device: Attemp to include the same device
2042 11:44:49.283697
2043 11:44:49.290982 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2044 11:44:49.291434
2045 11:44:49.291753
2046 11:44:49.292093
2047 11:44:49.292774 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2049 11:44:49.394236 hatch: tftpboot 192.168.201.1 9849714/tftp-deploy-4slgp0dr/kernel/bzImage 9849714/tftp-deploy-4slgp0dr/kernel/cmdline 9849714/tftp-deploy-4slgp0dr/ramdisk/ramdisk.cpio.gz
2050 11:44:49.394802 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2051 11:44:49.395226 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2052 11:44:49.400184 tftpboot 192.168.201.1 9849714/tftp-deploy-4slgp0dr/kernel/bzImoy-4slgp0dr/kernel/cmdline 9849714/tftp-deploy-4slgp0dr/ramdisk/ramdisk.cpio.gz
2053 11:44:49.400610
2054 11:44:49.400905 Waiting for link
2055 11:44:49.601064
2056 11:44:49.601632 done.
2057 11:44:49.601998
2058 11:44:49.602332 MAC: 00:24:32:50:1a:59
2059 11:44:49.602659
2060 11:44:49.604449 Sending DHCP discover... done.
2061 11:44:49.604896
2062 11:44:49.607475 Waiting for reply... done.
2063 11:44:49.608075
2064 11:44:49.610937 Sending DHCP request... done.
2065 11:44:49.611417
2066 11:44:49.614296 Waiting for reply... done.
2067 11:44:49.614850
2068 11:44:49.617677 My ip is 192.168.201.14
2069 11:44:49.618144
2070 11:44:49.620752 The DHCP server ip is 192.168.201.1
2071 11:44:49.621199
2072 11:44:49.623851 TFTP server IP predefined by user: 192.168.201.1
2073 11:44:49.624319
2074 11:44:49.633712 Bootfile predefined by user: 9849714/tftp-deploy-4slgp0dr/kernel/bzImage
2075 11:44:49.634258
2076 11:44:49.637424 Sending tftp read request... done.
2077 11:44:49.637949
2078 11:44:49.642152 Waiting for the transfer...
2079 11:44:49.642593
2080 11:44:50.322022 00000000 ################################################################
2081 11:44:50.322567
2082 11:44:51.000866 00080000 ################################################################
2083 11:44:51.001402
2084 11:44:51.691145 00100000 ################################################################
2085 11:44:51.691690
2086 11:44:52.390189 00180000 ################################################################
2087 11:44:52.390738
2088 11:44:53.082783 00200000 ################################################################
2089 11:44:53.083382
2090 11:44:53.785685 00280000 ################################################################
2091 11:44:53.786270
2092 11:44:54.489105 00300000 ################################################################
2093 11:44:54.489649
2094 11:44:55.193423 00380000 ################################################################
2095 11:44:55.194092
2096 11:44:55.876915 00400000 ################################################################
2097 11:44:55.877495
2098 11:44:56.581663 00480000 ################################################################
2099 11:44:56.582225
2100 11:44:57.268149 00500000 ################################################################
2101 11:44:57.268702
2102 11:44:57.970070 00580000 ################################################################
2103 11:44:57.970612
2104 11:44:58.666981 00600000 ################################################################
2105 11:44:58.667552
2106 11:44:59.339342 00680000 ################################################################
2107 11:44:59.339886
2108 11:45:00.036040 00700000 ################################################################
2109 11:45:00.036581
2110 11:45:00.056300 00780000 ## done.
2111 11:45:00.056750
2112 11:45:00.059574 The bootfile was 7880592 bytes long.
2113 11:45:00.060124
2114 11:45:00.063563 Sending tftp read request... done.
2115 11:45:00.064106
2116 11:45:00.066551 Waiting for the transfer...
2117 11:45:00.066983
2118 11:45:00.756400 00000000 ################################################################
2119 11:45:00.756939
2120 11:45:01.474332 00080000 ################################################################
2121 11:45:01.474941
2122 11:45:02.214689 00100000 ################################################################
2123 11:45:02.215305
2124 11:45:02.927620 00180000 ################################################################
2125 11:45:02.928195
2126 11:45:03.637921 00200000 ################################################################
2127 11:45:03.638460
2128 11:45:04.376310 00280000 ################################################################
2129 11:45:04.376858
2130 11:45:05.115806 00300000 ################################################################
2131 11:45:05.116366
2132 11:45:05.831553 00380000 ################################################################
2133 11:45:05.832143
2134 11:45:06.562365 00400000 ################################################################
2135 11:45:06.562942
2136 11:45:07.293889 00480000 ################################################################
2137 11:45:07.294458
2138 11:45:08.029092 00500000 ################################################################
2139 11:45:08.029704
2140 11:45:08.355404 00580000 ############################# done.
2141 11:45:08.356056
2142 11:45:08.358299 Sending tftp read request... done.
2143 11:45:08.358747
2144 11:45:08.362124 Waiting for the transfer...
2145 11:45:08.362676
2146 11:45:08.363030 00000000 # done.
2147 11:45:08.363425
2148 11:45:08.371835 Command line loaded dynamically from TFTP file: 9849714/tftp-deploy-4slgp0dr/kernel/cmdline
2149 11:45:08.372482
2150 11:45:08.395143 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9849714/extract-nfsrootfs-vlyae_8a,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2151 11:45:08.395721
2152 11:45:08.401059 ec_init(0): CrosEC protocol v3 supported (256, 256)
2153 11:45:08.404749
2154 11:45:08.407881 Shutting down all USB controllers.
2155 11:45:08.408329
2156 11:45:08.408681 Removing current net device
2157 11:45:08.411917
2158 11:45:08.412480 Finalizing coreboot
2159 11:45:08.412841
2160 11:45:08.418487 Exiting depthcharge with code 4 at timestamp: 28702596
2161 11:45:08.419039
2162 11:45:08.419441
2163 11:45:08.419809 Starting kernel ...
2164 11:45:08.420145
2165 11:45:08.421346 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2166 11:45:08.421942 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2167 11:45:08.422431 Setting prompt string to ['Linux version [0-9]']
2168 11:45:08.422800 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2169 11:45:08.423206 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2170 11:45:08.424116
2172 11:49:29.422201 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2174 11:49:29.422437 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2176 11:49:29.422626 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2179 11:49:29.422926 end: 2 depthcharge-action (duration 00:05:00) [common]
2181 11:49:29.423202 Cleaning after the job
2182 11:49:29.423303 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849714/tftp-deploy-4slgp0dr/ramdisk
2183 11:49:29.423821 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849714/tftp-deploy-4slgp0dr/kernel
2184 11:49:29.424430 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849714/tftp-deploy-4slgp0dr/nfsrootfs
2185 11:49:29.474882 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849714/tftp-deploy-4slgp0dr/modules
2186 11:49:29.475293 start: 4.1 power-off (timeout 00:00:30) [common]
2187 11:49:29.475475 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2188 11:49:29.551894 >> Command sent successfully.
2189 11:49:29.554309 Returned 0 in 0 seconds
2190 11:49:29.655127 end: 4.1 power-off (duration 00:00:00) [common]
2192 11:49:29.655488 start: 4.2 read-feedback (timeout 00:10:00) [common]
2193 11:49:29.655754 Listened to connection for namespace 'common' for up to 1s
2195 11:49:29.656363 Listened to connection for namespace 'common' for up to 1s
2196 11:49:30.660718 Finalising connection for namespace 'common'
2197 11:49:30.660915 Disconnecting from shell: Finalise
2198 11:49:30.661005
2199 11:49:30.761796 end: 4.2 read-feedback (duration 00:00:01) [common]
2200 11:49:30.761954 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9849714
2201 11:49:30.925234 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9849714
2202 11:49:30.925451 JobError: Your job cannot terminate cleanly.