Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 14:01:10.262117 lava-dispatcher, installed at version: 2023.03
2 14:01:10.262346 start: 0 validate
3 14:01:10.262490 Start time: 2023-05-03 14:01:10.262479+00:00 (UTC)
4 14:01:10.262637 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:01:10.262794 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230421.0%2Famd64%2Finitrd.cpio.gz exists
6 14:01:10.554654 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:01:10.554865 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1187-g8497d3390dc2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:01:10.847938 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:01:10.848139 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230421.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:01:14.085603 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:01:14.085810 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1187-g8497d3390dc2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:01:14.379261 validate duration: 4.12
14 14:01:14.379557 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:01:14.379666 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:01:14.379763 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:01:14.379893 Not decompressing ramdisk as can be used compressed.
18 14:01:14.379991 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230421.0/amd64/initrd.cpio.gz
19 14:01:14.380064 saving as /var/lib/lava/dispatcher/tmp/10185369/tftp-deploy-u1fvjzwp/ramdisk/initrd.cpio.gz
20 14:01:14.380131 total size: 5672815 (5MB)
21 14:01:14.956573 progress 0% (0MB)
22 14:01:14.958307 progress 5% (0MB)
23 14:01:14.960056 progress 10% (0MB)
24 14:01:14.961619 progress 15% (0MB)
25 14:01:14.963356 progress 20% (1MB)
26 14:01:14.965073 progress 25% (1MB)
27 14:01:14.966621 progress 30% (1MB)
28 14:01:14.968335 progress 35% (1MB)
29 14:01:14.970052 progress 40% (2MB)
30 14:01:14.971580 progress 45% (2MB)
31 14:01:14.973288 progress 50% (2MB)
32 14:01:14.975035 progress 55% (3MB)
33 14:01:14.976595 progress 60% (3MB)
34 14:01:14.978309 progress 65% (3MB)
35 14:01:14.980017 progress 70% (3MB)
36 14:01:14.981558 progress 75% (4MB)
37 14:01:14.983260 progress 80% (4MB)
38 14:01:14.985025 progress 85% (4MB)
39 14:01:14.986558 progress 90% (4MB)
40 14:01:14.988281 progress 95% (5MB)
41 14:01:14.990018 progress 100% (5MB)
42 14:01:14.990145 5MB downloaded in 0.61s (8.87MB/s)
43 14:01:14.990312 end: 1.1.1 http-download (duration 00:00:01) [common]
45 14:01:14.990577 end: 1.1 download-retry (duration 00:00:01) [common]
46 14:01:14.990676 start: 1.2 download-retry (timeout 00:09:59) [common]
47 14:01:14.990771 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 14:01:14.990917 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1187-g8497d3390dc2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:01:14.990999 saving as /var/lib/lava/dispatcher/tmp/10185369/tftp-deploy-u1fvjzwp/kernel/bzImage
50 14:01:14.991068 total size: 7880592 (7MB)
51 14:01:14.991134 No compression specified
52 14:01:14.992323 progress 0% (0MB)
53 14:01:14.994714 progress 5% (0MB)
54 14:01:14.997022 progress 10% (0MB)
55 14:01:14.999330 progress 15% (1MB)
56 14:01:15.001616 progress 20% (1MB)
57 14:01:15.003939 progress 25% (1MB)
58 14:01:15.006235 progress 30% (2MB)
59 14:01:15.008520 progress 35% (2MB)
60 14:01:15.010841 progress 40% (3MB)
61 14:01:15.013128 progress 45% (3MB)
62 14:01:15.015366 progress 50% (3MB)
63 14:01:15.017615 progress 55% (4MB)
64 14:01:15.019860 progress 60% (4MB)
65 14:01:15.022121 progress 65% (4MB)
66 14:01:15.024367 progress 70% (5MB)
67 14:01:15.026616 progress 75% (5MB)
68 14:01:15.028868 progress 80% (6MB)
69 14:01:15.031099 progress 85% (6MB)
70 14:01:15.033346 progress 90% (6MB)
71 14:01:15.035636 progress 95% (7MB)
72 14:01:15.037909 progress 100% (7MB)
73 14:01:15.038099 7MB downloaded in 0.05s (159.82MB/s)
74 14:01:15.038254 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:01:15.038509 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:01:15.038607 start: 1.3 download-retry (timeout 00:09:59) [common]
78 14:01:15.038703 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 14:01:15.038848 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230421.0/amd64/full.rootfs.tar.xz
80 14:01:15.038925 saving as /var/lib/lava/dispatcher/tmp/10185369/tftp-deploy-u1fvjzwp/nfsrootfs/full.rootfs.tar
81 14:01:15.038993 total size: 125572608 (119MB)
82 14:01:15.039059 Using unxz to decompress xz
83 14:01:15.043000 progress 0% (0MB)
84 14:01:15.578524 progress 5% (6MB)
85 14:01:16.111322 progress 10% (12MB)
86 14:01:16.645355 progress 15% (17MB)
87 14:01:17.193566 progress 20% (23MB)
88 14:01:17.561636 progress 25% (29MB)
89 14:01:17.930027 progress 30% (35MB)
90 14:01:18.205487 progress 35% (41MB)
91 14:01:18.421046 progress 40% (47MB)
92 14:01:18.814693 progress 45% (53MB)
93 14:01:19.218158 progress 50% (59MB)
94 14:01:19.589039 progress 55% (65MB)
95 14:01:19.979793 progress 60% (71MB)
96 14:01:20.346677 progress 65% (77MB)
97 14:01:20.774008 progress 70% (83MB)
98 14:01:21.233122 progress 75% (89MB)
99 14:01:21.688775 progress 80% (95MB)
100 14:01:21.803627 progress 85% (101MB)
101 14:01:21.979282 progress 90% (107MB)
102 14:01:22.345136 progress 95% (113MB)
103 14:01:22.749132 progress 100% (119MB)
104 14:01:22.754511 119MB downloaded in 7.72s (15.52MB/s)
105 14:01:22.754957 end: 1.3.1 http-download (duration 00:00:08) [common]
107 14:01:22.755505 end: 1.3 download-retry (duration 00:00:08) [common]
108 14:01:22.755688 start: 1.4 download-retry (timeout 00:09:52) [common]
109 14:01:22.755868 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 14:01:22.756133 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1187-g8497d3390dc2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:01:22.756280 saving as /var/lib/lava/dispatcher/tmp/10185369/tftp-deploy-u1fvjzwp/modules/modules.tar
112 14:01:22.756418 total size: 250620 (0MB)
113 14:01:22.756554 Using unxz to decompress xz
114 14:01:22.762014 progress 13% (0MB)
115 14:01:22.762680 progress 26% (0MB)
116 14:01:22.763137 progress 39% (0MB)
117 14:01:22.764499 progress 52% (0MB)
118 14:01:22.766469 progress 65% (0MB)
119 14:01:22.768498 progress 78% (0MB)
120 14:01:22.770543 progress 91% (0MB)
121 14:01:22.772559 progress 100% (0MB)
122 14:01:22.778570 0MB downloaded in 0.02s (10.79MB/s)
123 14:01:22.778974 end: 1.4.1 http-download (duration 00:00:00) [common]
125 14:01:22.779528 end: 1.4 download-retry (duration 00:00:00) [common]
126 14:01:22.779711 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 14:01:22.779903 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 14:01:25.802377 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10185369/extract-nfsrootfs-xsya5iio
129 14:01:25.802592 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 14:01:25.802706 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
131 14:01:25.802884 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp
132 14:01:25.803021 makedir: /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin
133 14:01:25.803128 makedir: /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/tests
134 14:01:25.803232 makedir: /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/results
135 14:01:25.803340 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-add-keys
136 14:01:25.803487 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-add-sources
137 14:01:25.803621 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-background-process-start
138 14:01:25.803754 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-background-process-stop
139 14:01:25.803884 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-common-functions
140 14:01:25.804014 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-echo-ipv4
141 14:01:25.804142 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-install-packages
142 14:01:25.804270 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-installed-packages
143 14:01:25.804406 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-os-build
144 14:01:25.804539 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-probe-channel
145 14:01:25.804667 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-probe-ip
146 14:01:25.804797 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-target-ip
147 14:01:25.804929 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-target-mac
148 14:01:25.805057 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-target-storage
149 14:01:25.805188 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-test-case
150 14:01:25.805316 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-test-event
151 14:01:25.805444 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-test-feedback
152 14:01:25.805572 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-test-raise
153 14:01:25.805699 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-test-reference
154 14:01:25.805827 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-test-runner
155 14:01:25.805954 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-test-set
156 14:01:25.806080 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-test-shell
157 14:01:25.806210 Updating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-install-packages (oe)
158 14:01:25.806368 Updating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/bin/lava-installed-packages (oe)
159 14:01:25.806501 Creating /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/environment
160 14:01:25.806603 LAVA metadata
161 14:01:25.806678 - LAVA_JOB_ID=10185369
162 14:01:25.806745 - LAVA_DISPATCHER_IP=192.168.201.1
163 14:01:25.806851 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
164 14:01:25.806923 skipped lava-vland-overlay
165 14:01:25.807002 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 14:01:25.807088 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
167 14:01:25.807153 skipped lava-multinode-overlay
168 14:01:25.807231 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 14:01:25.807315 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
170 14:01:25.807392 Loading test definitions
171 14:01:25.807488 start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
172 14:01:25.807564 Using /lava-10185369 at stage 0
173 14:01:25.807665 Fetching tests from https://github.com/kernelci/test-definitions
174 14:01:25.807747 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/0/tests/0_ltp-ipc'
175 14:01:32.492562 Running '/usr/bin/git checkout kernelci.org
176 14:01:32.652849 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
177 14:01:32.653696 uuid=10185369_1.5.2.3.1 testdef=None
178 14:01:32.653867 end: 1.5.2.3.1 git-repo-action (duration 00:00:07) [common]
180 14:01:32.654140 start: 1.5.2.3.2 test-overlay (timeout 00:09:42) [common]
181 14:01:32.655010 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 14:01:32.655271 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:42) [common]
184 14:01:32.656431 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 14:01:32.656711 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:42) [common]
187 14:01:32.657844 runner path: /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/0/tests/0_ltp-ipc test_uuid 10185369_1.5.2.3.1
188 14:01:32.657941 SKIPFILE='skipfile-lkft.yaml'
189 14:01:32.658011 SKIP_INSTALL='true'
190 14:01:32.658076 TST_CMDFILES='ipc'
191 14:01:32.658227 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 14:01:32.658454 Creating lava-test-runner.conf files
194 14:01:32.658523 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10185369/lava-overlay-j7v7sebp/lava-10185369/0 for stage 0
195 14:01:32.658620 - 0_ltp-ipc
196 14:01:32.658734 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
197 14:01:32.658833 start: 1.5.2.4 compress-overlay (timeout 00:09:42) [common]
198 14:01:40.917005 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
199 14:01:40.917177 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:33) [common]
200 14:01:40.917279 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
201 14:01:40.917388 end: 1.5.2 lava-overlay (duration 00:00:15) [common]
202 14:01:40.917487 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
203 14:01:41.070402 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
204 14:01:41.070789 start: 1.5.4 extract-modules (timeout 00:09:33) [common]
205 14:01:41.070942 extracting modules file /var/lib/lava/dispatcher/tmp/10185369/tftp-deploy-u1fvjzwp/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10185369/extract-nfsrootfs-xsya5iio
206 14:01:41.089125 extracting modules file /var/lib/lava/dispatcher/tmp/10185369/tftp-deploy-u1fvjzwp/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10185369/extract-overlay-ramdisk-ly_ynlf7/ramdisk
207 14:01:41.102897 end: 1.5.4 extract-modules (duration 00:00:00) [common]
208 14:01:41.103035 start: 1.5.5 apply-overlay-tftp (timeout 00:09:33) [common]
209 14:01:41.103134 [common] Applying overlay to NFS
210 14:01:41.103210 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10185369/compress-overlay-oajd852c/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10185369/extract-nfsrootfs-xsya5iio
211 14:01:42.095296 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
212 14:01:42.095479 start: 1.5.6 configure-preseed-file (timeout 00:09:32) [common]
213 14:01:42.095583 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
214 14:01:42.095684 start: 1.5.7 compress-ramdisk (timeout 00:09:32) [common]
215 14:01:42.095776 Building ramdisk /var/lib/lava/dispatcher/tmp/10185369/extract-overlay-ramdisk-ly_ynlf7/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10185369/extract-overlay-ramdisk-ly_ynlf7/ramdisk
216 14:01:42.169744 >> 27177 blocks
217 14:01:42.815309 rename /var/lib/lava/dispatcher/tmp/10185369/extract-overlay-ramdisk-ly_ynlf7/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10185369/tftp-deploy-u1fvjzwp/ramdisk/ramdisk.cpio.gz
218 14:01:42.815771 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
219 14:01:42.815902 start: 1.5.8 prepare-kernel (timeout 00:09:32) [common]
220 14:01:42.816014 start: 1.5.8.1 prepare-fit (timeout 00:09:32) [common]
221 14:01:42.816115 No mkimage arch provided, not using FIT.
222 14:01:42.816214 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
223 14:01:42.816298 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
224 14:01:42.816422 end: 1.5 prepare-tftp-overlay (duration 00:00:20) [common]
225 14:01:42.816533 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:32) [common]
226 14:01:42.816617 No LXC device requested
227 14:01:42.816703 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
228 14:01:42.816797 start: 1.7 deploy-device-env (timeout 00:09:32) [common]
229 14:01:42.816883 end: 1.7 deploy-device-env (duration 00:00:00) [common]
230 14:01:42.816958 Checking files for TFTP limit of 4294967296 bytes.
231 14:01:42.817390 end: 1 tftp-deploy (duration 00:00:28) [common]
232 14:01:42.817508 start: 2 depthcharge-action (timeout 00:05:00) [common]
233 14:01:42.817607 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
234 14:01:42.817740 substitutions:
235 14:01:42.817817 - {DTB}: None
236 14:01:42.817883 - {INITRD}: 10185369/tftp-deploy-u1fvjzwp/ramdisk/ramdisk.cpio.gz
237 14:01:42.817946 - {KERNEL}: 10185369/tftp-deploy-u1fvjzwp/kernel/bzImage
238 14:01:42.818008 - {LAVA_MAC}: None
239 14:01:42.818068 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10185369/extract-nfsrootfs-xsya5iio
240 14:01:42.818131 - {NFS_SERVER_IP}: 192.168.201.1
241 14:01:42.818188 - {PRESEED_CONFIG}: None
242 14:01:42.818246 - {PRESEED_LOCAL}: None
243 14:01:42.818303 - {RAMDISK}: 10185369/tftp-deploy-u1fvjzwp/ramdisk/ramdisk.cpio.gz
244 14:01:42.818361 - {ROOT_PART}: None
245 14:01:42.818418 - {ROOT}: None
246 14:01:42.818476 - {SERVER_IP}: 192.168.201.1
247 14:01:42.818533 - {TEE}: None
248 14:01:42.818590 Parsed boot commands:
249 14:01:42.818648 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
250 14:01:42.818831 Parsed boot commands: tftpboot 192.168.201.1 10185369/tftp-deploy-u1fvjzwp/kernel/bzImage 10185369/tftp-deploy-u1fvjzwp/kernel/cmdline 10185369/tftp-deploy-u1fvjzwp/ramdisk/ramdisk.cpio.gz
251 14:01:42.818925 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
252 14:01:42.819019 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
253 14:01:42.819118 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
254 14:01:42.819213 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
255 14:01:42.819286 Not connected, no need to disconnect.
256 14:01:42.819363 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
257 14:01:42.819450 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
258 14:01:42.819519 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-11'
259 14:01:42.823281 Setting prompt string to ['lava-test: # ']
260 14:01:42.823657 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
261 14:01:42.823780 end: 2.2.1 reset-connection (duration 00:00:00) [common]
262 14:01:42.823886 start: 2.2.2 reset-device (timeout 00:05:00) [common]
263 14:01:42.823986 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
264 14:01:42.824189 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=reboot'
265 14:01:47.963825 >> Command sent successfully.
266 14:01:47.966832 Returned 0 in 5 seconds
267 14:01:48.067269 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
269 14:01:48.067622 end: 2.2.2 reset-device (duration 00:00:05) [common]
270 14:01:48.067738 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
271 14:01:48.067840 Setting prompt string to 'Starting depthcharge on Voema...'
272 14:01:48.067913 Changing prompt to 'Starting depthcharge on Voema...'
273 14:01:48.067992 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
274 14:01:48.068272 [Enter `^Ec?' for help]
275 14:01:49.731223
276 14:01:49.731511
277 14:01:49.740963 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
278 14:01:49.744554 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
279 14:01:49.750571 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
280 14:01:49.754146 CPU: AES supported, TXT NOT supported, VT supported
281 14:01:49.760508 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
282 14:01:49.767354 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
283 14:01:49.770572 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
284 14:01:49.773983 VBOOT: Loading verstage.
285 14:01:49.777806 FMAP: Found "FLASH" version 1.1 at 0x1804000.
286 14:01:49.784565 FMAP: base = 0x0 size = 0x2000000 #areas = 32
287 14:01:49.788346 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
288 14:01:49.798291 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
289 14:01:49.804930 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
290 14:01:49.805023
291 14:01:49.805095
292 14:01:49.814930 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
293 14:01:49.831288 Probing TPM: . done!
294 14:01:49.835128 TPM ready after 0 ms
295 14:01:49.838315 Connected to device vid:did:rid of 1ae0:0028:00
296 14:01:49.849704 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
297 14:01:49.856051 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
298 14:01:49.859573 Initialized TPM device CR50 revision 0
299 14:01:49.909579 tlcl_send_startup: Startup return code is 0
300 14:01:49.909676 TPM: setup succeeded
301 14:01:49.924942 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
302 14:01:49.939167 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
303 14:01:49.952262 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
304 14:01:49.962316 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 14:01:49.965785 Chrome EC: UHEPI supported
306 14:01:49.968803 Phase 1
307 14:01:49.972336 FMAP: area GBB found @ 1805000 (458752 bytes)
308 14:01:49.982284 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
309 14:01:49.989108 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
310 14:01:49.995644 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
311 14:01:50.001962 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
312 14:01:50.005855 Recovery requested (1009000e)
313 14:01:50.009131 TPM: Extending digest for VBOOT: boot mode into PCR 0
314 14:01:50.020230 tlcl_extend: response is 0
315 14:01:50.026848 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
316 14:01:50.036819 tlcl_extend: response is 0
317 14:01:50.043187 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
318 14:01:50.050380 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
319 14:01:50.056800 BS: verstage times (exec / console): total (unknown) / 142 ms
320 14:01:50.056892
321 14:01:50.056965
322 14:01:50.070274 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
323 14:01:50.076536 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
324 14:01:50.079652 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
325 14:01:50.083159 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
326 14:01:50.089870 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
327 14:01:50.093198 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
328 14:01:50.096421 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
329 14:01:50.099890 TCO_STS: 0000 0000
330 14:01:50.103132 GEN_PMCON: d0015038 00002200
331 14:01:50.106251 GBLRST_CAUSE: 00000000 00000000
332 14:01:50.106343 HPR_CAUSE0: 00000000
333 14:01:50.109750 prev_sleep_state 5
334 14:01:50.113222 Boot Count incremented to 16834
335 14:01:50.119712 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
336 14:01:50.126541 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
337 14:01:50.132875 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
338 14:01:50.139746 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
339 14:01:50.144098 Chrome EC: UHEPI supported
340 14:01:50.151001 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
341 14:01:50.163561 Probing TPM: done!
342 14:01:50.170402 Connected to device vid:did:rid of 1ae0:0028:00
343 14:01:50.180332 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
344 14:01:50.183909 Initialized TPM device CR50 revision 0
345 14:01:50.198183 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
346 14:01:50.205256 MRC: Hash idx 0x100b comparison successful.
347 14:01:50.208036 MRC cache found, size faa8
348 14:01:50.208128 bootmode is set to: 2
349 14:01:50.211885 SPD index = 2
350 14:01:50.218426 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
351 14:01:50.221705 SPD: module type is LPDDR4X
352 14:01:50.224871 SPD: module part number is MT53D1G64D4NW-046
353 14:01:50.231427 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
354 14:01:50.238260 SPD: device width 16 bits, bus width 16 bits
355 14:01:50.241166 SPD: module size is 2048 MB (per channel)
356 14:01:50.670514 CBMEM:
357 14:01:50.673555 IMD: root @ 0x76fff000 254 entries.
358 14:01:50.677000 IMD: root @ 0x76ffec00 62 entries.
359 14:01:50.680259 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
360 14:01:50.686628 FMAP: area RW_VPD found @ f35000 (8192 bytes)
361 14:01:50.690208 External stage cache:
362 14:01:50.693398 IMD: root @ 0x7b3ff000 254 entries.
363 14:01:50.696679 IMD: root @ 0x7b3fec00 62 entries.
364 14:01:50.711845 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
365 14:01:50.718344 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
366 14:01:50.724930 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
367 14:01:50.739038 MRC: 'RECOVERY_MRC_CACHE' does not need update.
368 14:01:50.742522 cse_lite: Skip switching to RW in the recovery path
369 14:01:50.745677 8 DIMMs found
370 14:01:50.745825 SMM Memory Map
371 14:01:50.749324 SMRAM : 0x7b000000 0x800000
372 14:01:50.752026 Subregion 0: 0x7b000000 0x200000
373 14:01:50.755429 Subregion 1: 0x7b200000 0x200000
374 14:01:50.758863 Subregion 2: 0x7b400000 0x400000
375 14:01:50.762548 top_of_ram = 0x77000000
376 14:01:50.769103 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
377 14:01:50.772377 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
378 14:01:50.779027 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
379 14:01:50.785320 MTRR Range: Start=ff000000 End=0 (Size 1000000)
380 14:01:50.792043 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
381 14:01:50.798655 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
382 14:01:50.808644 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
383 14:01:50.811917 Processing 211 relocs. Offset value of 0x74c0b000
384 14:01:50.821323 BS: romstage times (exec / console): total (unknown) / 277 ms
385 14:01:50.826814
386 14:01:50.826960
387 14:01:50.836794 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
388 14:01:50.840537 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
389 14:01:50.850259 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
390 14:01:50.856904 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
391 14:01:50.863640 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
392 14:01:50.870120 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
393 14:01:50.913841 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
394 14:01:50.920249 Processing 5008 relocs. Offset value of 0x75d98000
395 14:01:50.923612 BS: postcar times (exec / console): total (unknown) / 59 ms
396 14:01:50.926610
397 14:01:50.926756
398 14:01:50.936542 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
399 14:01:50.936693 Normal boot
400 14:01:50.940321 FW_CONFIG value is 0x804c02
401 14:01:50.943556 PCI: 00:07.0 disabled by fw_config
402 14:01:50.947496 PCI: 00:07.1 disabled by fw_config
403 14:01:50.951130 PCI: 00:0d.2 disabled by fw_config
404 14:01:50.953860 PCI: 00:1c.7 disabled by fw_config
405 14:01:50.960546 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
406 14:01:50.967614 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
407 14:01:50.970660 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 14:01:50.973946 GENERIC: 0.0 disabled by fw_config
409 14:01:50.980882 GENERIC: 1.0 disabled by fw_config
410 14:01:50.984003 fw_config match found: DB_USB=USB3_ACTIVE
411 14:01:50.987291 fw_config match found: DB_USB=USB3_ACTIVE
412 14:01:50.990587 fw_config match found: DB_USB=USB3_ACTIVE
413 14:01:50.997511 fw_config match found: DB_USB=USB3_ACTIVE
414 14:01:51.000258 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
415 14:01:51.007142 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
416 14:01:51.017078 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
417 14:01:51.023764 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
418 14:01:51.027284 microcode: sig=0x806c1 pf=0x80 revision=0x86
419 14:01:51.033600 microcode: Update skipped, already up-to-date
420 14:01:51.040485 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
421 14:01:51.067834 Detected 4 core, 8 thread CPU.
422 14:01:51.071022 Setting up SMI for CPU
423 14:01:51.074345 IED base = 0x7b400000
424 14:01:51.074488 IED size = 0x00400000
425 14:01:51.077495 Will perform SMM setup.
426 14:01:51.084199 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
427 14:01:51.090681 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
428 14:01:51.097887 Processing 16 relocs. Offset value of 0x00030000
429 14:01:51.100591 Attempting to start 7 APs
430 14:01:51.104545 Waiting for 10ms after sending INIT.
431 14:01:51.119522 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
432 14:01:51.123172 AP: slot 4 apic_id 7.
433 14:01:51.126404 AP: slot 5 apic_id 6.
434 14:01:51.126549 AP: slot 7 apic_id 2.
435 14:01:51.129748 AP: slot 3 apic_id 3.
436 14:01:51.132833 AP: slot 2 apic_id 4.
437 14:01:51.132976 AP: slot 6 apic_id 5.
438 14:01:51.133108 done.
439 14:01:51.139477 Waiting for 2nd SIPI to complete...done.
440 14:01:51.146080 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
441 14:01:51.152850 Processing 13 relocs. Offset value of 0x00038000
442 14:01:51.156287 Unable to locate Global NVS
443 14:01:51.163041 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
444 14:01:51.166217 Installing permanent SMM handler to 0x7b000000
445 14:01:51.176329 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
446 14:01:51.179730 Processing 794 relocs. Offset value of 0x7b010000
447 14:01:51.189606 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
448 14:01:51.192941 Processing 13 relocs. Offset value of 0x7b008000
449 14:01:51.199498 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
450 14:01:51.206168 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
451 14:01:51.209490 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
452 14:01:51.216036 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
453 14:01:51.222623 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
454 14:01:51.228905 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
455 14:01:51.235521 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
456 14:01:51.235614 Unable to locate Global NVS
457 14:01:51.245850 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
458 14:01:51.249185 Clearing SMI status registers
459 14:01:51.249278 SMI_STS: PM1
460 14:01:51.252327 PM1_STS: PWRBTN
461 14:01:51.259044 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
462 14:01:51.262459 In relocation handler: CPU 0
463 14:01:51.265553 New SMBASE=0x7b000000 IEDBASE=0x7b400000
464 14:01:51.272061 Writing SMRR. base = 0x7b000006, mask=0xff800c00
465 14:01:51.272155 Relocation complete.
466 14:01:51.282012 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
467 14:01:51.282134 In relocation handler: CPU 1
468 14:01:51.288794 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
469 14:01:51.288891 Relocation complete.
470 14:01:51.298728 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
471 14:01:51.298822 In relocation handler: CPU 2
472 14:01:51.305391 New SMBASE=0x7afff800 IEDBASE=0x7b400000
473 14:01:51.308804 Writing SMRR. base = 0x7b000006, mask=0xff800c00
474 14:01:51.312201 Relocation complete.
475 14:01:51.318641 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
476 14:01:51.321935 In relocation handler: CPU 6
477 14:01:51.325677 New SMBASE=0x7affe800 IEDBASE=0x7b400000
478 14:01:51.328519 Relocation complete.
479 14:01:51.335418 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
480 14:01:51.338582 In relocation handler: CPU 7
481 14:01:51.341855 New SMBASE=0x7affe400 IEDBASE=0x7b400000
482 14:01:51.348621 Writing SMRR. base = 0x7b000006, mask=0xff800c00
483 14:01:51.348714 Relocation complete.
484 14:01:51.355017 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
485 14:01:51.358443 In relocation handler: CPU 3
486 14:01:51.364760 New SMBASE=0x7afff400 IEDBASE=0x7b400000
487 14:01:51.364854 Relocation complete.
488 14:01:51.371835 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
489 14:01:51.375045 In relocation handler: CPU 4
490 14:01:51.381722 New SMBASE=0x7afff000 IEDBASE=0x7b400000
491 14:01:51.381816 Relocation complete.
492 14:01:51.388323 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
493 14:01:51.391241 In relocation handler: CPU 5
494 14:01:51.394524 New SMBASE=0x7affec00 IEDBASE=0x7b400000
495 14:01:51.401913 Writing SMRR. base = 0x7b000006, mask=0xff800c00
496 14:01:51.402006 Relocation complete.
497 14:01:51.405571 Initializing CPU #0
498 14:01:51.408923 CPU: vendor Intel device 806c1
499 14:01:51.412265 CPU: family 06, model 8c, stepping 01
500 14:01:51.415603 Clearing out pending MCEs
501 14:01:51.418759 Setting up local APIC...
502 14:01:51.418851 apic_id: 0x00 done.
503 14:01:51.422059 Turbo is available but hidden
504 14:01:51.425366 Turbo is available and visible
505 14:01:51.432159 microcode: Update skipped, already up-to-date
506 14:01:51.432254 CPU #0 initialized
507 14:01:51.435437 Initializing CPU #6
508 14:01:51.438766 Initializing CPU #2
509 14:01:51.441839 CPU: vendor Intel device 806c1
510 14:01:51.445487 CPU: family 06, model 8c, stepping 01
511 14:01:51.448810 CPU: vendor Intel device 806c1
512 14:01:51.452175 CPU: family 06, model 8c, stepping 01
513 14:01:51.455374 Clearing out pending MCEs
514 14:01:51.455466 Clearing out pending MCEs
515 14:01:51.458932 Setting up local APIC...
516 14:01:51.462047 Initializing CPU #1
517 14:01:51.462138 apic_id: 0x05 done.
518 14:01:51.465375 Setting up local APIC...
519 14:01:51.468844 Initializing CPU #4
520 14:01:51.468935 Initializing CPU #5
521 14:01:51.472142 CPU: vendor Intel device 806c1
522 14:01:51.475257 CPU: family 06, model 8c, stepping 01
523 14:01:51.478737 CPU: vendor Intel device 806c1
524 14:01:51.485265 CPU: family 06, model 8c, stepping 01
525 14:01:51.485361 Clearing out pending MCEs
526 14:01:51.488684 Clearing out pending MCEs
527 14:01:51.491953 Setting up local APIC...
528 14:01:51.495269 microcode: Update skipped, already up-to-date
529 14:01:51.498184 apic_id: 0x04 done.
530 14:01:51.501543 CPU #6 initialized
531 14:01:51.505134 microcode: Update skipped, already up-to-date
532 14:01:51.508146 Initializing CPU #7
533 14:01:51.508241 Initializing CPU #3
534 14:01:51.511769 CPU: vendor Intel device 806c1
535 14:01:51.514894 CPU: family 06, model 8c, stepping 01
536 14:01:51.518469 CPU: vendor Intel device 806c1
537 14:01:51.521740 CPU: family 06, model 8c, stepping 01
538 14:01:51.525020 Clearing out pending MCEs
539 14:01:51.528312 Clearing out pending MCEs
540 14:01:51.531254 Setting up local APIC...
541 14:01:51.535212 CPU: vendor Intel device 806c1
542 14:01:51.538435 CPU: family 06, model 8c, stepping 01
543 14:01:51.538527 apic_id: 0x07 done.
544 14:01:51.541538 Setting up local APIC...
545 14:01:51.544771 CPU #2 initialized
546 14:01:51.544862 apic_id: 0x02 done.
547 14:01:51.548245 Setting up local APIC...
548 14:01:51.555282 microcode: Update skipped, already up-to-date
549 14:01:51.555374 apic_id: 0x06 done.
550 14:01:51.558290 CPU #4 initialized
551 14:01:51.561373 microcode: Update skipped, already up-to-date
552 14:01:51.567920 microcode: Update skipped, already up-to-date
553 14:01:51.568013 CPU #5 initialized
554 14:01:51.571216 Clearing out pending MCEs
555 14:01:51.575062 CPU #7 initialized
556 14:01:51.575154 apic_id: 0x03 done.
557 14:01:51.577739 Setting up local APIC...
558 14:01:51.581238 microcode: Update skipped, already up-to-date
559 14:01:51.584682 apic_id: 0x01 done.
560 14:01:51.587967 CPU #3 initialized
561 14:01:51.591501 microcode: Update skipped, already up-to-date
562 14:01:51.594437 CPU #1 initialized
563 14:01:51.598019 bsp_do_flight_plan done after 454 msecs.
564 14:01:51.601067 CPU: frequency set to 4400 MHz
565 14:01:51.601160 Enabling SMIs.
566 14:01:51.607587 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
567 14:01:51.624604 SATAXPCIE1 indicates PCIe NVMe is present
568 14:01:51.627795 Probing TPM: done!
569 14:01:51.631636 Connected to device vid:did:rid of 1ae0:0028:00
570 14:01:51.642022 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
571 14:01:51.645301 Initialized TPM device CR50 revision 0
572 14:01:51.648714 Enabling S0i3.4
573 14:01:51.655029 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
574 14:01:51.658333 Found a VBT of 8704 bytes after decompression
575 14:01:51.664828 cse_lite: CSE RO boot. HybridStorageMode disabled
576 14:01:51.671480 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
577 14:01:51.747257 FSPS returned 0
578 14:01:51.750633 Executing Phase 1 of FspMultiPhaseSiInit
579 14:01:51.760147 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
580 14:01:51.763559 port C0 DISC req: usage 1 usb3 1 usb2 5
581 14:01:51.767056 Raw Buffer output 0 00000511
582 14:01:51.769910 Raw Buffer output 1 00000000
583 14:01:51.774016 pmc_send_ipc_cmd succeeded
584 14:01:51.780231 port C1 DISC req: usage 1 usb3 2 usb2 3
585 14:01:51.780383 Raw Buffer output 0 00000321
586 14:01:51.783855 Raw Buffer output 1 00000000
587 14:01:51.788240 pmc_send_ipc_cmd succeeded
588 14:01:51.793103 Detected 4 core, 8 thread CPU.
589 14:01:51.796185 Detected 4 core, 8 thread CPU.
590 14:01:51.996556 Display FSP Version Info HOB
591 14:01:51.999532 Reference Code - CPU = a.0.4c.31
592 14:01:52.003177 uCode Version = 0.0.0.86
593 14:01:52.006336 TXT ACM version = ff.ff.ff.ffff
594 14:01:52.009472 Reference Code - ME = a.0.4c.31
595 14:01:52.012805 MEBx version = 0.0.0.0
596 14:01:52.016135 ME Firmware Version = Consumer SKU
597 14:01:52.019453 Reference Code - PCH = a.0.4c.31
598 14:01:52.023184 PCH-CRID Status = Disabled
599 14:01:52.026366 PCH-CRID Original Value = ff.ff.ff.ffff
600 14:01:52.029425 PCH-CRID New Value = ff.ff.ff.ffff
601 14:01:52.033016 OPROM - RST - RAID = ff.ff.ff.ffff
602 14:01:52.036315 PCH Hsio Version = 4.0.0.0
603 14:01:52.039752 Reference Code - SA - System Agent = a.0.4c.31
604 14:01:52.042911 Reference Code - MRC = 2.0.0.1
605 14:01:52.045962 SA - PCIe Version = a.0.4c.31
606 14:01:52.049764 SA-CRID Status = Disabled
607 14:01:52.052541 SA-CRID Original Value = 0.0.0.1
608 14:01:52.055924 SA-CRID New Value = 0.0.0.1
609 14:01:52.059325 OPROM - VBIOS = ff.ff.ff.ffff
610 14:01:52.062639 IO Manageability Engine FW Version = 11.1.4.0
611 14:01:52.066051 PHY Build Version = 0.0.0.e0
612 14:01:52.069437 Thunderbolt(TM) FW Version = 0.0.0.0
613 14:01:52.076258 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
614 14:01:52.079531 ITSS IRQ Polarities Before:
615 14:01:52.079624 IPC0: 0xffffffff
616 14:01:52.082884 IPC1: 0xffffffff
617 14:01:52.082976 IPC2: 0xffffffff
618 14:01:52.086380 IPC3: 0xffffffff
619 14:01:52.089714 ITSS IRQ Polarities After:
620 14:01:52.089805 IPC0: 0xffffffff
621 14:01:52.092773 IPC1: 0xffffffff
622 14:01:52.092865 IPC2: 0xffffffff
623 14:01:52.096070 IPC3: 0xffffffff
624 14:01:52.099428 Found PCIe Root Port #9 at PCI: 00:1d.0.
625 14:01:52.112736 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
626 14:01:52.122488 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
627 14:01:52.135605 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
628 14:01:52.142470 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
629 14:01:52.142562 Enumerating buses...
630 14:01:52.148921 Show all devs... Before device enumeration.
631 14:01:52.152366 Root Device: enabled 1
632 14:01:52.152470 DOMAIN: 0000: enabled 1
633 14:01:52.155802 CPU_CLUSTER: 0: enabled 1
634 14:01:52.159090 PCI: 00:00.0: enabled 1
635 14:01:52.162450 PCI: 00:02.0: enabled 1
636 14:01:52.162543 PCI: 00:04.0: enabled 1
637 14:01:52.165736 PCI: 00:05.0: enabled 1
638 14:01:52.168720 PCI: 00:06.0: enabled 0
639 14:01:52.168814 PCI: 00:07.0: enabled 0
640 14:01:52.172003 PCI: 00:07.1: enabled 0
641 14:01:52.175315 PCI: 00:07.2: enabled 0
642 14:01:52.179186 PCI: 00:07.3: enabled 0
643 14:01:52.179280 PCI: 00:08.0: enabled 1
644 14:01:52.182411 PCI: 00:09.0: enabled 0
645 14:01:52.185856 PCI: 00:0a.0: enabled 0
646 14:01:52.188848 PCI: 00:0d.0: enabled 1
647 14:01:52.188942 PCI: 00:0d.1: enabled 0
648 14:01:52.192166 PCI: 00:0d.2: enabled 0
649 14:01:52.195650 PCI: 00:0d.3: enabled 0
650 14:01:52.198913 PCI: 00:0e.0: enabled 0
651 14:01:52.199007 PCI: 00:10.2: enabled 1
652 14:01:52.202117 PCI: 00:10.6: enabled 0
653 14:01:52.205376 PCI: 00:10.7: enabled 0
654 14:01:52.205469 PCI: 00:12.0: enabled 0
655 14:01:52.208574 PCI: 00:12.6: enabled 0
656 14:01:52.211944 PCI: 00:13.0: enabled 0
657 14:01:52.215743 PCI: 00:14.0: enabled 1
658 14:01:52.215837 PCI: 00:14.1: enabled 0
659 14:01:52.218667 PCI: 00:14.2: enabled 1
660 14:01:52.222145 PCI: 00:14.3: enabled 1
661 14:01:52.225447 PCI: 00:15.0: enabled 1
662 14:01:52.225541 PCI: 00:15.1: enabled 1
663 14:01:52.228542 PCI: 00:15.2: enabled 1
664 14:01:52.232233 PCI: 00:15.3: enabled 1
665 14:01:52.235475 PCI: 00:16.0: enabled 1
666 14:01:52.235569 PCI: 00:16.1: enabled 0
667 14:01:52.238578 PCI: 00:16.2: enabled 0
668 14:01:52.242189 PCI: 00:16.3: enabled 0
669 14:01:52.245052 PCI: 00:16.4: enabled 0
670 14:01:52.245146 PCI: 00:16.5: enabled 0
671 14:01:52.248388 PCI: 00:17.0: enabled 1
672 14:01:52.252287 PCI: 00:19.0: enabled 0
673 14:01:52.252380 PCI: 00:19.1: enabled 1
674 14:01:52.255468 PCI: 00:19.2: enabled 0
675 14:01:52.258267 PCI: 00:1c.0: enabled 1
676 14:01:52.262123 PCI: 00:1c.1: enabled 0
677 14:01:52.262217 PCI: 00:1c.2: enabled 0
678 14:01:52.265145 PCI: 00:1c.3: enabled 0
679 14:01:52.268285 PCI: 00:1c.4: enabled 0
680 14:01:52.272030 PCI: 00:1c.5: enabled 0
681 14:01:52.272123 PCI: 00:1c.6: enabled 1
682 14:01:52.275151 PCI: 00:1c.7: enabled 0
683 14:01:52.278262 PCI: 00:1d.0: enabled 1
684 14:01:52.281772 PCI: 00:1d.1: enabled 0
685 14:01:52.281865 PCI: 00:1d.2: enabled 1
686 14:01:52.285187 PCI: 00:1d.3: enabled 0
687 14:01:52.288253 PCI: 00:1e.0: enabled 1
688 14:01:52.288346 PCI: 00:1e.1: enabled 0
689 14:01:52.291962 PCI: 00:1e.2: enabled 1
690 14:01:52.295358 PCI: 00:1e.3: enabled 1
691 14:01:52.298228 PCI: 00:1f.0: enabled 1
692 14:01:52.298322 PCI: 00:1f.1: enabled 0
693 14:01:52.301915 PCI: 00:1f.2: enabled 1
694 14:01:52.305241 PCI: 00:1f.3: enabled 1
695 14:01:52.308348 PCI: 00:1f.4: enabled 0
696 14:01:52.308457 PCI: 00:1f.5: enabled 1
697 14:01:52.311440 PCI: 00:1f.6: enabled 0
698 14:01:52.315339 PCI: 00:1f.7: enabled 0
699 14:01:52.315436 APIC: 00: enabled 1
700 14:01:52.318131 GENERIC: 0.0: enabled 1
701 14:01:52.321659 GENERIC: 0.0: enabled 1
702 14:01:52.324680 GENERIC: 1.0: enabled 1
703 14:01:52.324774 GENERIC: 0.0: enabled 1
704 14:01:52.328194 GENERIC: 1.0: enabled 1
705 14:01:52.331561 USB0 port 0: enabled 1
706 14:01:52.334704 GENERIC: 0.0: enabled 1
707 14:01:52.334797 USB0 port 0: enabled 1
708 14:01:52.338043 GENERIC: 0.0: enabled 1
709 14:01:52.341577 I2C: 00:1a: enabled 1
710 14:01:52.341671 I2C: 00:31: enabled 1
711 14:01:52.344733 I2C: 00:32: enabled 1
712 14:01:52.348315 I2C: 00:10: enabled 1
713 14:01:52.348454 I2C: 00:15: enabled 1
714 14:01:52.351580 GENERIC: 0.0: enabled 0
715 14:01:52.354959 GENERIC: 1.0: enabled 0
716 14:01:52.358276 GENERIC: 0.0: enabled 1
717 14:01:52.358369 SPI: 00: enabled 1
718 14:01:52.361460 SPI: 00: enabled 1
719 14:01:52.361554 PNP: 0c09.0: enabled 1
720 14:01:52.364757 GENERIC: 0.0: enabled 1
721 14:01:52.368136 USB3 port 0: enabled 1
722 14:01:52.371664 USB3 port 1: enabled 1
723 14:01:52.371757 USB3 port 2: enabled 0
724 14:01:52.374936 USB3 port 3: enabled 0
725 14:01:52.378138 USB2 port 0: enabled 0
726 14:01:52.378232 USB2 port 1: enabled 1
727 14:01:52.381923 USB2 port 2: enabled 1
728 14:01:52.384550 USB2 port 3: enabled 0
729 14:01:52.387896 USB2 port 4: enabled 1
730 14:01:52.387989 USB2 port 5: enabled 0
731 14:01:52.391432 USB2 port 6: enabled 0
732 14:01:52.394587 USB2 port 7: enabled 0
733 14:01:52.394679 USB2 port 8: enabled 0
734 14:01:52.398732 USB2 port 9: enabled 0
735 14:01:52.401092 USB3 port 0: enabled 0
736 14:01:52.404509 USB3 port 1: enabled 1
737 14:01:52.404600 USB3 port 2: enabled 0
738 14:01:52.407696 USB3 port 3: enabled 0
739 14:01:52.411078 GENERIC: 0.0: enabled 1
740 14:01:52.411169 GENERIC: 1.0: enabled 1
741 14:01:52.414485 APIC: 01: enabled 1
742 14:01:52.418100 APIC: 04: enabled 1
743 14:01:52.418192 APIC: 03: enabled 1
744 14:01:52.421144 APIC: 07: enabled 1
745 14:01:52.421235 APIC: 06: enabled 1
746 14:01:52.424563 APIC: 05: enabled 1
747 14:01:52.427845 APIC: 02: enabled 1
748 14:01:52.427937 Compare with tree...
749 14:01:52.431519 Root Device: enabled 1
750 14:01:52.434439 DOMAIN: 0000: enabled 1
751 14:01:52.438247 PCI: 00:00.0: enabled 1
752 14:01:52.438338 PCI: 00:02.0: enabled 1
753 14:01:52.441424 PCI: 00:04.0: enabled 1
754 14:01:52.444342 GENERIC: 0.0: enabled 1
755 14:01:52.447847 PCI: 00:05.0: enabled 1
756 14:01:52.451294 PCI: 00:06.0: enabled 0
757 14:01:52.451385 PCI: 00:07.0: enabled 0
758 14:01:52.454491 GENERIC: 0.0: enabled 1
759 14:01:52.458033 PCI: 00:07.1: enabled 0
760 14:01:52.460967 GENERIC: 1.0: enabled 1
761 14:01:52.464263 PCI: 00:07.2: enabled 0
762 14:01:52.464355 GENERIC: 0.0: enabled 1
763 14:01:52.467595 PCI: 00:07.3: enabled 0
764 14:01:52.470788 GENERIC: 1.0: enabled 1
765 14:01:52.474774 PCI: 00:08.0: enabled 1
766 14:01:52.477481 PCI: 00:09.0: enabled 0
767 14:01:52.477573 PCI: 00:0a.0: enabled 0
768 14:01:52.481065 PCI: 00:0d.0: enabled 1
769 14:01:52.484308 USB0 port 0: enabled 1
770 14:01:52.487528 USB3 port 0: enabled 1
771 14:01:52.490845 USB3 port 1: enabled 1
772 14:01:52.494676 USB3 port 2: enabled 0
773 14:01:52.494768 USB3 port 3: enabled 0
774 14:01:52.497847 PCI: 00:0d.1: enabled 0
775 14:01:52.501245 PCI: 00:0d.2: enabled 0
776 14:01:52.504079 GENERIC: 0.0: enabled 1
777 14:01:52.507468 PCI: 00:0d.3: enabled 0
778 14:01:52.507560 PCI: 00:0e.0: enabled 0
779 14:01:52.510910 PCI: 00:10.2: enabled 1
780 14:01:52.514398 PCI: 00:10.6: enabled 0
781 14:01:52.517250 PCI: 00:10.7: enabled 0
782 14:01:52.520575 PCI: 00:12.0: enabled 0
783 14:01:52.520667 PCI: 00:12.6: enabled 0
784 14:01:52.524334 PCI: 00:13.0: enabled 0
785 14:01:52.527443 PCI: 00:14.0: enabled 1
786 14:01:52.530736 USB0 port 0: enabled 1
787 14:01:52.534180 USB2 port 0: enabled 0
788 14:01:52.534272 USB2 port 1: enabled 1
789 14:01:52.537426 USB2 port 2: enabled 1
790 14:01:52.540732 USB2 port 3: enabled 0
791 14:01:52.544303 USB2 port 4: enabled 1
792 14:01:52.547356 USB2 port 5: enabled 0
793 14:01:52.547448 USB2 port 6: enabled 0
794 14:01:52.550986 USB2 port 7: enabled 0
795 14:01:52.554028 USB2 port 8: enabled 0
796 14:01:52.557211 USB2 port 9: enabled 0
797 14:01:52.560616 USB3 port 0: enabled 0
798 14:01:52.563810 USB3 port 1: enabled 1
799 14:01:52.563903 USB3 port 2: enabled 0
800 14:01:52.567119 USB3 port 3: enabled 0
801 14:01:52.570399 PCI: 00:14.1: enabled 0
802 14:01:52.573894 PCI: 00:14.2: enabled 1
803 14:01:52.577134 PCI: 00:14.3: enabled 1
804 14:01:52.577225 GENERIC: 0.0: enabled 1
805 14:01:52.580631 PCI: 00:15.0: enabled 1
806 14:01:52.583771 I2C: 00:1a: enabled 1
807 14:01:52.587203 I2C: 00:31: enabled 1
808 14:01:52.590542 I2C: 00:32: enabled 1
809 14:01:52.590634 PCI: 00:15.1: enabled 1
810 14:01:52.593685 I2C: 00:10: enabled 1
811 14:01:52.596858 PCI: 00:15.2: enabled 1
812 14:01:52.600390 PCI: 00:15.3: enabled 1
813 14:01:52.600488 PCI: 00:16.0: enabled 1
814 14:01:52.604033 PCI: 00:16.1: enabled 0
815 14:01:52.607503 PCI: 00:16.2: enabled 0
816 14:01:52.610317 PCI: 00:16.3: enabled 0
817 14:01:52.613902 PCI: 00:16.4: enabled 0
818 14:01:52.613994 PCI: 00:16.5: enabled 0
819 14:01:52.617107 PCI: 00:17.0: enabled 1
820 14:01:52.620453 PCI: 00:19.0: enabled 0
821 14:01:52.623801 PCI: 00:19.1: enabled 1
822 14:01:52.627091 I2C: 00:15: enabled 1
823 14:01:52.627183 PCI: 00:19.2: enabled 0
824 14:01:52.630486 PCI: 00:1d.0: enabled 1
825 14:01:52.633763 GENERIC: 0.0: enabled 1
826 14:01:52.636901 PCI: 00:1e.0: enabled 1
827 14:01:52.640121 PCI: 00:1e.1: enabled 0
828 14:01:52.640212 PCI: 00:1e.2: enabled 1
829 14:01:52.644270 SPI: 00: enabled 1
830 14:01:52.647257 PCI: 00:1e.3: enabled 1
831 14:01:52.647349 SPI: 00: enabled 1
832 14:01:52.651129 PCI: 00:1f.0: enabled 1
833 14:01:52.654522 PNP: 0c09.0: enabled 1
834 14:01:52.657548 PCI: 00:1f.1: enabled 0
835 14:01:52.657644 PCI: 00:1f.2: enabled 1
836 14:01:52.661216 GENERIC: 0.0: enabled 1
837 14:01:52.664517 GENERIC: 0.0: enabled 1
838 14:01:52.667517 GENERIC: 1.0: enabled 1
839 14:01:52.670798 PCI: 00:1f.3: enabled 1
840 14:01:52.674255 PCI: 00:1f.4: enabled 0
841 14:01:52.674405 PCI: 00:1f.5: enabled 1
842 14:01:52.677534 PCI: 00:1f.6: enabled 0
843 14:01:52.681359 PCI: 00:1f.7: enabled 0
844 14:01:52.684226 CPU_CLUSTER: 0: enabled 1
845 14:01:52.684370 APIC: 00: enabled 1
846 14:01:52.687621 APIC: 01: enabled 1
847 14:01:52.690878 APIC: 04: enabled 1
848 14:01:52.691022 APIC: 03: enabled 1
849 14:01:52.694042 APIC: 07: enabled 1
850 14:01:52.697351 APIC: 06: enabled 1
851 14:01:52.747565 APIC: 05: enabled 1
852 14:01:52.747722 APIC: 02: enabled 1
853 14:01:52.747858 Root Device scanning...
854 14:01:52.748204 scan_static_bus for Root Device
855 14:01:52.748344 DOMAIN: 0000 enabled
856 14:01:52.748484 CPU_CLUSTER: 0 enabled
857 14:01:52.748613 DOMAIN: 0000 scanning...
858 14:01:52.748741 PCI: pci_scan_bus for bus 00
859 14:01:52.748870 PCI: 00:00.0 [8086/0000] ops
860 14:01:52.748995 PCI: 00:00.0 [8086/9a12] enabled
861 14:01:52.749119 PCI: 00:02.0 [8086/0000] bus ops
862 14:01:52.749244 PCI: 00:02.0 [8086/9a40] enabled
863 14:01:52.749388 PCI: 00:04.0 [8086/0000] bus ops
864 14:01:52.749516 PCI: 00:04.0 [8086/9a03] enabled
865 14:01:52.749641 PCI: 00:05.0 [8086/9a19] enabled
866 14:01:52.751849 PCI: 00:07.0 [0000/0000] hidden
867 14:01:52.752000 PCI: 00:08.0 [8086/9a11] enabled
868 14:01:52.754750 PCI: 00:0a.0 [8086/9a0d] disabled
869 14:01:52.754898 PCI: 00:0d.0 [8086/0000] bus ops
870 14:01:52.758434 PCI: 00:0d.0 [8086/9a13] enabled
871 14:01:52.761689 PCI: 00:14.0 [8086/0000] bus ops
872 14:01:52.765230 PCI: 00:14.0 [8086/a0ed] enabled
873 14:01:52.768183 PCI: 00:14.2 [8086/a0ef] enabled
874 14:01:52.771663 PCI: 00:14.3 [8086/0000] bus ops
875 14:01:52.774983 PCI: 00:14.3 [8086/a0f0] enabled
876 14:01:52.778570 PCI: 00:15.0 [8086/0000] bus ops
877 14:01:52.781668 PCI: 00:15.0 [8086/a0e8] enabled
878 14:01:52.784532 PCI: 00:15.1 [8086/0000] bus ops
879 14:01:52.787905 PCI: 00:15.1 [8086/a0e9] enabled
880 14:01:52.791132 PCI: 00:15.2 [8086/0000] bus ops
881 14:01:52.794654 PCI: 00:15.2 [8086/a0ea] enabled
882 14:01:52.798058 PCI: 00:15.3 [8086/0000] bus ops
883 14:01:52.801611 PCI: 00:15.3 [8086/a0eb] enabled
884 14:01:52.804482 PCI: 00:16.0 [8086/0000] ops
885 14:01:52.807845 PCI: 00:16.0 [8086/a0e0] enabled
886 14:01:52.814606 PCI: Static device PCI: 00:17.0 not found, disabling it.
887 14:01:52.817899 PCI: 00:19.0 [8086/0000] bus ops
888 14:01:52.821341 PCI: 00:19.0 [8086/a0c5] disabled
889 14:01:52.824667 PCI: 00:19.1 [8086/0000] bus ops
890 14:01:52.827739 PCI: 00:19.1 [8086/a0c6] enabled
891 14:01:52.830980 PCI: 00:1d.0 [8086/0000] bus ops
892 14:01:52.834460 PCI: 00:1d.0 [8086/a0b0] enabled
893 14:01:52.837712 PCI: 00:1e.0 [8086/0000] ops
894 14:01:52.840968 PCI: 00:1e.0 [8086/a0a8] enabled
895 14:01:52.844135 PCI: 00:1e.2 [8086/0000] bus ops
896 14:01:52.847931 PCI: 00:1e.2 [8086/a0aa] enabled
897 14:01:52.850932 PCI: 00:1e.3 [8086/0000] bus ops
898 14:01:52.854397 PCI: 00:1e.3 [8086/a0ab] enabled
899 14:01:52.857882 PCI: 00:1f.0 [8086/0000] bus ops
900 14:01:52.860887 PCI: 00:1f.0 [8086/a087] enabled
901 14:01:52.861031 RTC Init
902 14:01:52.863953 Set power on after power failure.
903 14:01:52.867707 Disabling Deep S3
904 14:01:52.867852 Disabling Deep S3
905 14:01:52.870829 Disabling Deep S4
906 14:01:52.873741 Disabling Deep S4
907 14:01:52.873884 Disabling Deep S5
908 14:01:52.877456 Disabling Deep S5
909 14:01:52.880365 PCI: 00:1f.2 [0000/0000] hidden
910 14:01:52.883660 PCI: 00:1f.3 [8086/0000] bus ops
911 14:01:52.887109 PCI: 00:1f.3 [8086/a0c8] enabled
912 14:01:52.890381 PCI: 00:1f.5 [8086/0000] bus ops
913 14:01:52.893984 PCI: 00:1f.5 [8086/a0a4] enabled
914 14:01:52.897642 PCI: Leftover static devices:
915 14:01:52.897734 PCI: 00:10.2
916 14:01:52.900586 PCI: 00:10.6
917 14:01:52.900677 PCI: 00:10.7
918 14:01:52.900750 PCI: 00:06.0
919 14:01:52.903814 PCI: 00:07.1
920 14:01:52.903905 PCI: 00:07.2
921 14:01:52.907186 PCI: 00:07.3
922 14:01:52.907278 PCI: 00:09.0
923 14:01:52.907349 PCI: 00:0d.1
924 14:01:52.910445 PCI: 00:0d.2
925 14:01:52.910536 PCI: 00:0d.3
926 14:01:52.913781 PCI: 00:0e.0
927 14:01:52.913874 PCI: 00:12.0
928 14:01:52.913946 PCI: 00:12.6
929 14:01:52.917066 PCI: 00:13.0
930 14:01:52.917158 PCI: 00:14.1
931 14:01:52.920517 PCI: 00:16.1
932 14:01:52.920608 PCI: 00:16.2
933 14:01:52.923492 PCI: 00:16.3
934 14:01:52.923584 PCI: 00:16.4
935 14:01:52.923656 PCI: 00:16.5
936 14:01:52.927203 PCI: 00:17.0
937 14:01:52.927295 PCI: 00:19.2
938 14:01:52.930061 PCI: 00:1e.1
939 14:01:52.930153 PCI: 00:1f.1
940 14:01:52.930224 PCI: 00:1f.4
941 14:01:52.933388 PCI: 00:1f.6
942 14:01:52.933482 PCI: 00:1f.7
943 14:01:52.937226 PCI: Check your devicetree.cb.
944 14:01:52.939966 PCI: 00:02.0 scanning...
945 14:01:52.943260 scan_generic_bus for PCI: 00:02.0
946 14:01:52.947212 scan_generic_bus for PCI: 00:02.0 done
947 14:01:52.953727 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
948 14:01:52.953819 PCI: 00:04.0 scanning...
949 14:01:52.959844 scan_generic_bus for PCI: 00:04.0
950 14:01:52.959965 GENERIC: 0.0 enabled
951 14:01:52.966665 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
952 14:01:52.970165 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
953 14:01:52.973415 PCI: 00:0d.0 scanning...
954 14:01:52.976328 scan_static_bus for PCI: 00:0d.0
955 14:01:52.979708 USB0 port 0 enabled
956 14:01:52.983463 USB0 port 0 scanning...
957 14:01:52.986516 scan_static_bus for USB0 port 0
958 14:01:52.986606 USB3 port 0 enabled
959 14:01:52.989703 USB3 port 1 enabled
960 14:01:52.992869 USB3 port 2 disabled
961 14:01:52.992958 USB3 port 3 disabled
962 14:01:52.996190 USB3 port 0 scanning...
963 14:01:52.999646 scan_static_bus for USB3 port 0
964 14:01:53.003331 scan_static_bus for USB3 port 0 done
965 14:01:53.009918 scan_bus: bus USB3 port 0 finished in 6 msecs
966 14:01:53.010010 USB3 port 1 scanning...
967 14:01:53.013021 scan_static_bus for USB3 port 1
968 14:01:53.016298 scan_static_bus for USB3 port 1 done
969 14:01:53.023048 scan_bus: bus USB3 port 1 finished in 6 msecs
970 14:01:53.026603 scan_static_bus for USB0 port 0 done
971 14:01:53.029557 scan_bus: bus USB0 port 0 finished in 43 msecs
972 14:01:53.033063 scan_static_bus for PCI: 00:0d.0 done
973 14:01:53.039633 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
974 14:01:53.042960 PCI: 00:14.0 scanning...
975 14:01:53.046073 scan_static_bus for PCI: 00:14.0
976 14:01:53.046163 USB0 port 0 enabled
977 14:01:53.049101 USB0 port 0 scanning...
978 14:01:53.052827 scan_static_bus for USB0 port 0
979 14:01:53.055729 USB2 port 0 disabled
980 14:01:53.055818 USB2 port 1 enabled
981 14:01:53.059407 USB2 port 2 enabled
982 14:01:53.062575 USB2 port 3 disabled
983 14:01:53.062665 USB2 port 4 enabled
984 14:01:53.066060 USB2 port 5 disabled
985 14:01:53.069430 USB2 port 6 disabled
986 14:01:53.069523 USB2 port 7 disabled
987 14:01:53.072705 USB2 port 8 disabled
988 14:01:53.075979 USB2 port 9 disabled
989 14:01:53.076069 USB3 port 0 disabled
990 14:01:53.079356 USB3 port 1 enabled
991 14:01:53.079446 USB3 port 2 disabled
992 14:01:53.082438 USB3 port 3 disabled
993 14:01:53.085804 USB2 port 1 scanning...
994 14:01:53.089668 scan_static_bus for USB2 port 1
995 14:01:53.092278 scan_static_bus for USB2 port 1 done
996 14:01:53.096048 scan_bus: bus USB2 port 1 finished in 6 msecs
997 14:01:53.099038 USB2 port 2 scanning...
998 14:01:53.102655 scan_static_bus for USB2 port 2
999 14:01:53.105602 scan_static_bus for USB2 port 2 done
1000 14:01:53.112316 scan_bus: bus USB2 port 2 finished in 6 msecs
1001 14:01:53.112443 USB2 port 4 scanning...
1002 14:01:53.115817 scan_static_bus for USB2 port 4
1003 14:01:53.122476 scan_static_bus for USB2 port 4 done
1004 14:01:53.125874 scan_bus: bus USB2 port 4 finished in 6 msecs
1005 14:01:53.128624 USB3 port 1 scanning...
1006 14:01:53.132066 scan_static_bus for USB3 port 1
1007 14:01:53.135809 scan_static_bus for USB3 port 1 done
1008 14:01:53.139120 scan_bus: bus USB3 port 1 finished in 6 msecs
1009 14:01:53.142635 scan_static_bus for USB0 port 0 done
1010 14:01:53.148812 scan_bus: bus USB0 port 0 finished in 93 msecs
1011 14:01:53.152168 scan_static_bus for PCI: 00:14.0 done
1012 14:01:53.155824 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1013 14:01:53.159084 PCI: 00:14.3 scanning...
1014 14:01:53.162316 scan_static_bus for PCI: 00:14.3
1015 14:01:53.165377 GENERIC: 0.0 enabled
1016 14:01:53.168482 scan_static_bus for PCI: 00:14.3 done
1017 14:01:53.171832 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1018 14:01:53.175225 PCI: 00:15.0 scanning...
1019 14:01:53.178455 scan_static_bus for PCI: 00:15.0
1020 14:01:53.182036 I2C: 00:1a enabled
1021 14:01:53.182157 I2C: 00:31 enabled
1022 14:01:53.185233 I2C: 00:32 enabled
1023 14:01:53.188677 scan_static_bus for PCI: 00:15.0 done
1024 14:01:53.195153 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1025 14:01:53.195253 PCI: 00:15.1 scanning...
1026 14:01:53.198429 scan_static_bus for PCI: 00:15.1
1027 14:01:53.201663 I2C: 00:10 enabled
1028 14:01:53.205189 scan_static_bus for PCI: 00:15.1 done
1029 14:01:53.211787 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1030 14:01:53.211879 PCI: 00:15.2 scanning...
1031 14:01:53.215215 scan_static_bus for PCI: 00:15.2
1032 14:01:53.221874 scan_static_bus for PCI: 00:15.2 done
1033 14:01:53.225563 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1034 14:01:53.228624 PCI: 00:15.3 scanning...
1035 14:01:53.232417 scan_static_bus for PCI: 00:15.3
1036 14:01:53.235265 scan_static_bus for PCI: 00:15.3 done
1037 14:01:53.239121 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1038 14:01:53.241844 PCI: 00:19.1 scanning...
1039 14:01:53.245155 scan_static_bus for PCI: 00:19.1
1040 14:01:53.248516 I2C: 00:15 enabled
1041 14:01:53.251832 scan_static_bus for PCI: 00:19.1 done
1042 14:01:53.255096 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1043 14:01:53.258443 PCI: 00:1d.0 scanning...
1044 14:01:53.261709 do_pci_scan_bridge for PCI: 00:1d.0
1045 14:01:53.264997 PCI: pci_scan_bus for bus 01
1046 14:01:53.268214 PCI: 01:00.0 [15b7/5009] enabled
1047 14:01:53.271523 GENERIC: 0.0 enabled
1048 14:01:53.274877 Enabling Common Clock Configuration
1049 14:01:53.278214 L1 Sub-State supported from root port 29
1050 14:01:53.281477 L1 Sub-State Support = 0x5
1051 14:01:53.284970 CommonModeRestoreTime = 0x28
1052 14:01:53.288071 Power On Value = 0x16, Power On Scale = 0x0
1053 14:01:53.291476 ASPM: Enabled L1
1054 14:01:53.294920 PCIe: Max_Payload_Size adjusted to 128
1055 14:01:53.301547 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1056 14:01:53.301641 PCI: 00:1e.2 scanning...
1057 14:01:53.304818 scan_generic_bus for PCI: 00:1e.2
1058 14:01:53.307920 SPI: 00 enabled
1059 14:01:53.314563 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1060 14:01:53.317896 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1061 14:01:53.321168 PCI: 00:1e.3 scanning...
1062 14:01:53.324333 scan_generic_bus for PCI: 00:1e.3
1063 14:01:53.327532 SPI: 00 enabled
1064 14:01:53.331180 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1065 14:01:53.337510 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1066 14:01:53.340666 PCI: 00:1f.0 scanning...
1067 14:01:53.344028 scan_static_bus for PCI: 00:1f.0
1068 14:01:53.344120 PNP: 0c09.0 enabled
1069 14:01:53.347318 PNP: 0c09.0 scanning...
1070 14:01:53.350796 scan_static_bus for PNP: 0c09.0
1071 14:01:53.353993 scan_static_bus for PNP: 0c09.0 done
1072 14:01:53.360673 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1073 14:01:53.364279 scan_static_bus for PCI: 00:1f.0 done
1074 14:01:53.367488 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1075 14:01:53.370924 PCI: 00:1f.2 scanning...
1076 14:01:53.374040 scan_static_bus for PCI: 00:1f.2
1077 14:01:53.377333 GENERIC: 0.0 enabled
1078 14:01:53.377424 GENERIC: 0.0 scanning...
1079 14:01:53.380577 scan_static_bus for GENERIC: 0.0
1080 14:01:53.384083 GENERIC: 0.0 enabled
1081 14:01:53.387394 GENERIC: 1.0 enabled
1082 14:01:53.390916 scan_static_bus for GENERIC: 0.0 done
1083 14:01:53.394386 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1084 14:01:53.400501 scan_static_bus for PCI: 00:1f.2 done
1085 14:01:53.404037 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1086 14:01:53.407351 PCI: 00:1f.3 scanning...
1087 14:01:53.410325 scan_static_bus for PCI: 00:1f.3
1088 14:01:53.414146 scan_static_bus for PCI: 00:1f.3 done
1089 14:01:53.417584 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1090 14:01:53.420244 PCI: 00:1f.5 scanning...
1091 14:01:53.423644 scan_generic_bus for PCI: 00:1f.5
1092 14:01:53.427184 scan_generic_bus for PCI: 00:1f.5 done
1093 14:01:53.433857 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1094 14:01:53.437327 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1095 14:01:53.440677 scan_static_bus for Root Device done
1096 14:01:53.446934 scan_bus: bus Root Device finished in 736 msecs
1097 14:01:53.447026 done
1098 14:01:53.453456 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1099 14:01:53.456759 Chrome EC: UHEPI supported
1100 14:01:53.463693 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1101 14:01:53.470545 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1102 14:01:53.473483 SPI flash protection: WPSW=0 SRP0=1
1103 14:01:53.479908 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1104 14:01:53.483046 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1105 14:01:53.486363 found VGA at PCI: 00:02.0
1106 14:01:53.489631 Setting up VGA for PCI: 00:02.0
1107 14:01:53.496367 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1108 14:01:53.499665 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1109 14:01:53.503060 Allocating resources...
1110 14:01:53.506625 Reading resources...
1111 14:01:53.509818 Root Device read_resources bus 0 link: 0
1112 14:01:53.512791 DOMAIN: 0000 read_resources bus 0 link: 0
1113 14:01:53.519396 PCI: 00:04.0 read_resources bus 1 link: 0
1114 14:01:53.523137 PCI: 00:04.0 read_resources bus 1 link: 0 done
1115 14:01:53.529328 PCI: 00:0d.0 read_resources bus 0 link: 0
1116 14:01:53.532540 USB0 port 0 read_resources bus 0 link: 0
1117 14:01:53.539476 USB0 port 0 read_resources bus 0 link: 0 done
1118 14:01:53.542870 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1119 14:01:53.545875 PCI: 00:14.0 read_resources bus 0 link: 0
1120 14:01:53.552992 USB0 port 0 read_resources bus 0 link: 0
1121 14:01:53.556262 USB0 port 0 read_resources bus 0 link: 0 done
1122 14:01:53.562885 PCI: 00:14.0 read_resources bus 0 link: 0 done
1123 14:01:53.566290 PCI: 00:14.3 read_resources bus 0 link: 0
1124 14:01:53.572757 PCI: 00:14.3 read_resources bus 0 link: 0 done
1125 14:01:53.576070 PCI: 00:15.0 read_resources bus 0 link: 0
1126 14:01:53.583247 PCI: 00:15.0 read_resources bus 0 link: 0 done
1127 14:01:53.586106 PCI: 00:15.1 read_resources bus 0 link: 0
1128 14:01:53.592711 PCI: 00:15.1 read_resources bus 0 link: 0 done
1129 14:01:53.596059 PCI: 00:19.1 read_resources bus 0 link: 0
1130 14:01:53.603195 PCI: 00:19.1 read_resources bus 0 link: 0 done
1131 14:01:53.606607 PCI: 00:1d.0 read_resources bus 1 link: 0
1132 14:01:53.613390 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1133 14:01:53.616543 PCI: 00:1e.2 read_resources bus 2 link: 0
1134 14:01:53.623065 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1135 14:01:53.626326 PCI: 00:1e.3 read_resources bus 3 link: 0
1136 14:01:53.633049 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1137 14:01:53.636195 PCI: 00:1f.0 read_resources bus 0 link: 0
1138 14:01:53.642608 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1139 14:01:53.646374 PCI: 00:1f.2 read_resources bus 0 link: 0
1140 14:01:53.649636 GENERIC: 0.0 read_resources bus 0 link: 0
1141 14:01:53.656415 GENERIC: 0.0 read_resources bus 0 link: 0 done
1142 14:01:53.659910 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1143 14:01:53.667399 DOMAIN: 0000 read_resources bus 0 link: 0 done
1144 14:01:53.670561 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1145 14:01:53.677153 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1146 14:01:53.680346 Root Device read_resources bus 0 link: 0 done
1147 14:01:53.683611 Done reading resources.
1148 14:01:53.690125 Show resources in subtree (Root Device)...After reading.
1149 14:01:53.693413 Root Device child on link 0 DOMAIN: 0000
1150 14:01:53.697139 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1151 14:01:53.706714 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1152 14:01:53.717077 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1153 14:01:53.720310 PCI: 00:00.0
1154 14:01:53.730015 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1155 14:01:53.736501 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1156 14:01:53.746709 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1157 14:01:53.756560 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1158 14:01:53.766377 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1159 14:01:53.776649 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1160 14:01:53.786784 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1161 14:01:53.793069 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1162 14:01:53.802658 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1163 14:01:53.812824 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1164 14:01:53.822866 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1165 14:01:53.832765 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1166 14:01:53.839152 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1167 14:01:53.849107 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1168 14:01:53.859539 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1169 14:01:53.869041 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1170 14:01:53.879003 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1171 14:01:53.889274 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1172 14:01:53.899164 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1173 14:01:53.905795 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1174 14:01:53.909133 PCI: 00:02.0
1175 14:01:53.919254 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1176 14:01:53.929051 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1177 14:01:53.938924 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1178 14:01:53.942126 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1179 14:01:53.951982 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1180 14:01:53.955344 GENERIC: 0.0
1181 14:01:53.955489 PCI: 00:05.0
1182 14:01:53.965395 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1183 14:01:53.971732 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1184 14:01:53.971879 GENERIC: 0.0
1185 14:01:53.975465 PCI: 00:08.0
1186 14:01:53.985645 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 14:01:53.985793 PCI: 00:0a.0
1188 14:01:53.988373 PCI: 00:0d.0 child on link 0 USB0 port 0
1189 14:01:53.998598 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1190 14:01:54.005206 USB0 port 0 child on link 0 USB3 port 0
1191 14:01:54.005353 USB3 port 0
1192 14:01:54.008590 USB3 port 1
1193 14:01:54.008733 USB3 port 2
1194 14:01:54.011769 USB3 port 3
1195 14:01:54.015049 PCI: 00:14.0 child on link 0 USB0 port 0
1196 14:01:54.025322 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1197 14:01:54.032011 USB0 port 0 child on link 0 USB2 port 0
1198 14:01:54.032161 USB2 port 0
1199 14:01:54.035066 USB2 port 1
1200 14:01:54.035210 USB2 port 2
1201 14:01:54.038693 USB2 port 3
1202 14:01:54.038837 USB2 port 4
1203 14:01:54.041753 USB2 port 5
1204 14:01:54.041897 USB2 port 6
1205 14:01:54.044984 USB2 port 7
1206 14:01:54.045126 USB2 port 8
1207 14:01:54.048848 USB2 port 9
1208 14:01:54.048995 USB3 port 0
1209 14:01:54.051701 USB3 port 1
1210 14:01:54.051848 USB3 port 2
1211 14:01:54.054985 USB3 port 3
1212 14:01:54.055128 PCI: 00:14.2
1213 14:01:54.064917 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 14:01:54.074715 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1215 14:01:54.081585 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1216 14:01:54.091531 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1217 14:01:54.091679 GENERIC: 0.0
1218 14:01:54.098458 PCI: 00:15.0 child on link 0 I2C: 00:1a
1219 14:01:54.108390 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 14:01:54.108544 I2C: 00:1a
1221 14:01:54.111618 I2C: 00:31
1222 14:01:54.111761 I2C: 00:32
1223 14:01:54.115082 PCI: 00:15.1 child on link 0 I2C: 00:10
1224 14:01:54.124643 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1225 14:01:54.128127 I2C: 00:10
1226 14:01:54.128268 PCI: 00:15.2
1227 14:01:54.137860 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 14:01:54.141684 PCI: 00:15.3
1229 14:01:54.151605 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 14:01:54.151699 PCI: 00:16.0
1231 14:01:54.161641 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 14:01:54.164722 PCI: 00:19.0
1233 14:01:54.167938 PCI: 00:19.1 child on link 0 I2C: 00:15
1234 14:01:54.177769 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 14:01:54.181136 I2C: 00:15
1236 14:01:54.184671 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1237 14:01:54.194363 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1238 14:01:54.204375 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1239 14:01:54.211071 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1240 14:01:54.214529 GENERIC: 0.0
1241 14:01:54.214619 PCI: 01:00.0
1242 14:01:54.224147 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 14:01:54.234116 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1244 14:01:54.237267 PCI: 00:1e.0
1245 14:01:54.247323 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1246 14:01:54.251050 PCI: 00:1e.2 child on link 0 SPI: 00
1247 14:01:54.260540 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1248 14:01:54.263777 SPI: 00
1249 14:01:54.267559 PCI: 00:1e.3 child on link 0 SPI: 00
1250 14:01:54.277226 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1251 14:01:54.277317 SPI: 00
1252 14:01:54.284320 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1253 14:01:54.290695 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1254 14:01:54.293837 PNP: 0c09.0
1255 14:01:54.303924 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1256 14:01:54.307194 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1257 14:01:54.317132 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1258 14:01:54.323748 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1259 14:01:54.330580 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1260 14:01:54.330671 GENERIC: 0.0
1261 14:01:54.333927 GENERIC: 1.0
1262 14:01:54.334017 PCI: 00:1f.3
1263 14:01:54.346760 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1264 14:01:54.356868 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1265 14:01:54.356960 PCI: 00:1f.5
1266 14:01:54.366794 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1267 14:01:54.370380 CPU_CLUSTER: 0 child on link 0 APIC: 00
1268 14:01:54.370471 APIC: 00
1269 14:01:54.373596 APIC: 01
1270 14:01:54.373686 APIC: 04
1271 14:01:54.377064 APIC: 03
1272 14:01:54.377154 APIC: 07
1273 14:01:54.377227 APIC: 06
1274 14:01:54.380109 APIC: 05
1275 14:01:54.380199 APIC: 02
1276 14:01:54.389700 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1277 14:01:54.393311 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1278 14:01:54.399966 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1279 14:01:54.406712 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1280 14:01:54.409887 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1281 14:01:54.413012 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1282 14:01:54.423307 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1283 14:01:54.429974 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1284 14:01:54.436188 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1285 14:01:54.443268 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1286 14:01:54.449892 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1287 14:01:54.456389 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1288 14:01:54.466317 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1289 14:01:54.472991 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1290 14:01:54.476343 DOMAIN: 0000: Resource ranges:
1291 14:01:54.479456 * Base: 1000, Size: 800, Tag: 100
1292 14:01:54.483082 * Base: 1900, Size: e700, Tag: 100
1293 14:01:54.489836 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1294 14:01:54.496343 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1295 14:01:54.502721 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1296 14:01:54.509326 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1297 14:01:54.516217 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1298 14:01:54.525977 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1299 14:01:54.532564 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1300 14:01:54.539131 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1301 14:01:54.549004 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1302 14:01:54.555640 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1303 14:01:54.562255 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1304 14:01:54.572109 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1305 14:01:54.579210 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1306 14:01:54.585475 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1307 14:01:54.595601 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1308 14:01:54.602319 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1309 14:01:54.608693 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1310 14:01:54.618539 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1311 14:01:54.625283 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1312 14:01:54.631847 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1313 14:01:54.641710 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1314 14:01:54.648308 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1315 14:01:54.655273 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1316 14:01:54.665100 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1317 14:01:54.671460 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1318 14:01:54.675101 DOMAIN: 0000: Resource ranges:
1319 14:01:54.678701 * Base: 7fc00000, Size: 40400000, Tag: 200
1320 14:01:54.685377 * Base: d0000000, Size: 28000000, Tag: 200
1321 14:01:54.688107 * Base: fa000000, Size: 1000000, Tag: 200
1322 14:01:54.691356 * Base: fb001000, Size: 2fff000, Tag: 200
1323 14:01:54.695106 * Base: fe010000, Size: 2e000, Tag: 200
1324 14:01:54.701446 * Base: fe03f000, Size: d41000, Tag: 200
1325 14:01:54.705163 * Base: fed88000, Size: 8000, Tag: 200
1326 14:01:54.708031 * Base: fed93000, Size: d000, Tag: 200
1327 14:01:54.711676 * Base: feda2000, Size: 1e000, Tag: 200
1328 14:01:54.718030 * Base: fede0000, Size: 1220000, Tag: 200
1329 14:01:54.721603 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1330 14:01:54.728448 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1331 14:01:54.734613 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1332 14:01:54.741747 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1333 14:01:54.748204 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1334 14:01:54.754424 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1335 14:01:54.761183 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1336 14:01:54.767865 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1337 14:01:54.774424 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1338 14:01:54.780914 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1339 14:01:54.787677 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1340 14:01:54.794303 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1341 14:01:54.801025 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1342 14:01:54.807681 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1343 14:01:54.814396 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1344 14:01:54.820726 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1345 14:01:54.827372 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1346 14:01:54.834399 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1347 14:01:54.840907 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1348 14:01:54.847590 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1349 14:01:54.853849 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1350 14:01:54.860981 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1351 14:01:54.867251 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1352 14:01:54.873933 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1353 14:01:54.883986 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1354 14:01:54.887304 PCI: 00:1d.0: Resource ranges:
1355 14:01:54.890521 * Base: 7fc00000, Size: 100000, Tag: 200
1356 14:01:54.897235 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1357 14:01:54.903955 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1358 14:01:54.914048 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1359 14:01:54.920238 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1360 14:01:54.923531 Root Device assign_resources, bus 0 link: 0
1361 14:01:54.930009 DOMAIN: 0000 assign_resources, bus 0 link: 0
1362 14:01:54.936953 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1363 14:01:54.946858 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1364 14:01:54.953557 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1365 14:01:54.963197 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1366 14:01:54.966480 PCI: 00:04.0 assign_resources, bus 1 link: 0
1367 14:01:54.970178 PCI: 00:04.0 assign_resources, bus 1 link: 0
1368 14:01:54.979875 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1369 14:01:54.986365 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1370 14:01:54.996479 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1371 14:01:54.999847 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1372 14:01:55.006010 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1373 14:01:55.012916 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1374 14:01:55.016249 PCI: 00:14.0 assign_resources, bus 0 link: 0
1375 14:01:55.022985 PCI: 00:14.0 assign_resources, bus 0 link: 0
1376 14:01:55.029543 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1377 14:01:55.039375 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1378 14:01:55.046018 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1379 14:01:55.052552 PCI: 00:14.3 assign_resources, bus 0 link: 0
1380 14:01:55.056084 PCI: 00:14.3 assign_resources, bus 0 link: 0
1381 14:01:55.065593 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1382 14:01:55.068974 PCI: 00:15.0 assign_resources, bus 0 link: 0
1383 14:01:55.072242 PCI: 00:15.0 assign_resources, bus 0 link: 0
1384 14:01:55.082129 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1385 14:01:55.085682 PCI: 00:15.1 assign_resources, bus 0 link: 0
1386 14:01:55.092307 PCI: 00:15.1 assign_resources, bus 0 link: 0
1387 14:01:55.098992 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1388 14:01:55.109034 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1389 14:01:55.115625 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1390 14:01:55.125614 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1391 14:01:55.128505 PCI: 00:19.1 assign_resources, bus 0 link: 0
1392 14:01:55.132054 PCI: 00:19.1 assign_resources, bus 0 link: 0
1393 14:01:55.141689 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1394 14:01:55.151528 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1395 14:01:55.161880 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1396 14:01:55.164811 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1397 14:01:55.171497 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1398 14:01:55.181859 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1399 14:01:55.184656 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1400 14:01:55.194615 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1401 14:01:55.197853 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1402 14:01:55.204564 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1403 14:01:55.211461 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1404 14:01:55.214689 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1405 14:01:55.221694 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1406 14:01:55.224558 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1407 14:01:55.231070 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1408 14:01:55.234853 LPC: Trying to open IO window from 800 size 1ff
1409 14:01:55.244451 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1410 14:01:55.251006 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1411 14:01:55.260786 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1412 14:01:55.264297 DOMAIN: 0000 assign_resources, bus 0 link: 0
1413 14:01:55.267699 Root Device assign_resources, bus 0 link: 0
1414 14:01:55.270715 Done setting resources.
1415 14:01:55.277555 Show resources in subtree (Root Device)...After assigning values.
1416 14:01:55.280792 Root Device child on link 0 DOMAIN: 0000
1417 14:01:55.287926 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1418 14:01:55.297677 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1419 14:01:55.307853 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1420 14:01:55.307946 PCI: 00:00.0
1421 14:01:55.317768 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1422 14:01:55.327656 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1423 14:01:55.337127 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1424 14:01:55.344120 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1425 14:01:55.353813 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1426 14:01:55.363592 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1427 14:01:55.373509 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1428 14:01:55.383690 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1429 14:01:55.393640 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1430 14:01:55.400289 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1431 14:01:55.410215 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1432 14:01:55.419775 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1433 14:01:55.430246 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1434 14:01:55.439974 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1435 14:01:55.446330 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1436 14:01:55.456489 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1437 14:01:55.466622 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1438 14:01:55.476413 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1439 14:01:55.486154 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1440 14:01:55.496238 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1441 14:01:55.496332 PCI: 00:02.0
1442 14:01:55.509399 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1443 14:01:55.519153 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1444 14:01:55.529240 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1445 14:01:55.532950 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1446 14:01:55.542673 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1447 14:01:55.546048 GENERIC: 0.0
1448 14:01:55.546139 PCI: 00:05.0
1449 14:01:55.556019 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1450 14:01:55.562779 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1451 14:01:55.562872 GENERIC: 0.0
1452 14:01:55.565728 PCI: 00:08.0
1453 14:01:55.575963 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1454 14:01:55.576060 PCI: 00:0a.0
1455 14:01:55.582619 PCI: 00:0d.0 child on link 0 USB0 port 0
1456 14:01:55.592804 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1457 14:01:55.596122 USB0 port 0 child on link 0 USB3 port 0
1458 14:01:55.599003 USB3 port 0
1459 14:01:55.599095 USB3 port 1
1460 14:01:55.602669 USB3 port 2
1461 14:01:55.602761 USB3 port 3
1462 14:01:55.609125 PCI: 00:14.0 child on link 0 USB0 port 0
1463 14:01:55.618869 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1464 14:01:55.622244 USB0 port 0 child on link 0 USB2 port 0
1465 14:01:55.625543 USB2 port 0
1466 14:01:55.625634 USB2 port 1
1467 14:01:55.628919 USB2 port 2
1468 14:01:55.629010 USB2 port 3
1469 14:01:55.632303 USB2 port 4
1470 14:01:55.632401 USB2 port 5
1471 14:01:55.635422 USB2 port 6
1472 14:01:55.635513 USB2 port 7
1473 14:01:55.639066 USB2 port 8
1474 14:01:55.639157 USB2 port 9
1475 14:01:55.642360 USB3 port 0
1476 14:01:55.642452 USB3 port 1
1477 14:01:55.645765 USB3 port 2
1478 14:01:55.645855 USB3 port 3
1479 14:01:55.648620 PCI: 00:14.2
1480 14:01:55.658648 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1481 14:01:55.668536 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1482 14:01:55.675428 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1483 14:01:55.685441 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1484 14:01:55.685535 GENERIC: 0.0
1485 14:01:55.688451 PCI: 00:15.0 child on link 0 I2C: 00:1a
1486 14:01:55.702175 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1487 14:01:55.702268 I2C: 00:1a
1488 14:01:55.705178 I2C: 00:31
1489 14:01:55.705269 I2C: 00:32
1490 14:01:55.708497 PCI: 00:15.1 child on link 0 I2C: 00:10
1491 14:01:55.718656 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1492 14:01:55.721692 I2C: 00:10
1493 14:01:55.721813 PCI: 00:15.2
1494 14:01:55.735440 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1495 14:01:55.735532 PCI: 00:15.3
1496 14:01:55.745150 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1497 14:01:55.748292 PCI: 00:16.0
1498 14:01:55.758445 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1499 14:01:55.758537 PCI: 00:19.0
1500 14:01:55.764921 PCI: 00:19.1 child on link 0 I2C: 00:15
1501 14:01:55.774860 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1502 14:01:55.775000 I2C: 00:15
1503 14:01:55.778291 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1504 14:01:55.788342 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1505 14:01:55.801422 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1506 14:01:55.811829 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1507 14:01:55.811975 GENERIC: 0.0
1508 14:01:55.814796 PCI: 01:00.0
1509 14:01:55.824897 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1510 14:01:55.834546 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1511 14:01:55.837807 PCI: 00:1e.0
1512 14:01:55.848118 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1513 14:01:55.851343 PCI: 00:1e.2 child on link 0 SPI: 00
1514 14:01:55.861097 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1515 14:01:55.864719 SPI: 00
1516 14:01:55.867826 PCI: 00:1e.3 child on link 0 SPI: 00
1517 14:01:55.877986 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1518 14:01:55.881403 SPI: 00
1519 14:01:55.884613 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1520 14:01:55.891210 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1521 14:01:55.894390 PNP: 0c09.0
1522 14:01:55.904280 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1523 14:01:55.907551 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1524 14:01:55.917660 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1525 14:01:55.927539 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1526 14:01:55.931059 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1527 14:01:55.934102 GENERIC: 0.0
1528 14:01:55.934232 GENERIC: 1.0
1529 14:01:55.937736 PCI: 00:1f.3
1530 14:01:55.947608 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1531 14:01:55.957266 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1532 14:01:55.957358 PCI: 00:1f.5
1533 14:01:55.967364 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1534 14:01:55.973786 CPU_CLUSTER: 0 child on link 0 APIC: 00
1535 14:01:55.973916 APIC: 00
1536 14:01:55.977233 APIC: 01
1537 14:01:55.977324 APIC: 04
1538 14:01:55.977406 APIC: 03
1539 14:01:55.980655 APIC: 07
1540 14:01:55.980736 APIC: 06
1541 14:01:55.980818 APIC: 05
1542 14:01:55.984061 APIC: 02
1543 14:01:55.987166 Done allocating resources.
1544 14:01:55.993895 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2475 ms
1545 14:01:55.997099 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1546 14:01:56.000255 Configure GPIOs for I2S audio on UP4.
1547 14:01:56.008233 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1548 14:01:56.011798 Enabling resources...
1549 14:01:56.014977 PCI: 00:00.0 subsystem <- 8086/9a12
1550 14:01:56.018443 PCI: 00:00.0 cmd <- 06
1551 14:01:56.021468 PCI: 00:02.0 subsystem <- 8086/9a40
1552 14:01:56.024864 PCI: 00:02.0 cmd <- 03
1553 14:01:56.028259 PCI: 00:04.0 subsystem <- 8086/9a03
1554 14:01:56.031465 PCI: 00:04.0 cmd <- 02
1555 14:01:56.034644 PCI: 00:05.0 subsystem <- 8086/9a19
1556 14:01:56.034738 PCI: 00:05.0 cmd <- 02
1557 14:01:56.041388 PCI: 00:08.0 subsystem <- 8086/9a11
1558 14:01:56.041484 PCI: 00:08.0 cmd <- 06
1559 14:01:56.044791 PCI: 00:0d.0 subsystem <- 8086/9a13
1560 14:01:56.047890 PCI: 00:0d.0 cmd <- 02
1561 14:01:56.051147 PCI: 00:14.0 subsystem <- 8086/a0ed
1562 14:01:56.054675 PCI: 00:14.0 cmd <- 02
1563 14:01:56.058082 PCI: 00:14.2 subsystem <- 8086/a0ef
1564 14:01:56.061295 PCI: 00:14.2 cmd <- 02
1565 14:01:56.064562 PCI: 00:14.3 subsystem <- 8086/a0f0
1566 14:01:56.067880 PCI: 00:14.3 cmd <- 02
1567 14:01:56.071200 PCI: 00:15.0 subsystem <- 8086/a0e8
1568 14:01:56.074229 PCI: 00:15.0 cmd <- 02
1569 14:01:56.077832 PCI: 00:15.1 subsystem <- 8086/a0e9
1570 14:01:56.081233 PCI: 00:15.1 cmd <- 02
1571 14:01:56.084478 PCI: 00:15.2 subsystem <- 8086/a0ea
1572 14:01:56.084573 PCI: 00:15.2 cmd <- 02
1573 14:01:56.090962 PCI: 00:15.3 subsystem <- 8086/a0eb
1574 14:01:56.091064 PCI: 00:15.3 cmd <- 02
1575 14:01:56.094400 PCI: 00:16.0 subsystem <- 8086/a0e0
1576 14:01:56.097886 PCI: 00:16.0 cmd <- 02
1577 14:01:56.101189 PCI: 00:19.1 subsystem <- 8086/a0c6
1578 14:01:56.103998 PCI: 00:19.1 cmd <- 02
1579 14:01:56.107337 PCI: 00:1d.0 bridge ctrl <- 0013
1580 14:01:56.110909 PCI: 00:1d.0 subsystem <- 8086/a0b0
1581 14:01:56.114229 PCI: 00:1d.0 cmd <- 06
1582 14:01:56.118014 PCI: 00:1e.0 subsystem <- 8086/a0a8
1583 14:01:56.121195 PCI: 00:1e.0 cmd <- 06
1584 14:01:56.123958 PCI: 00:1e.2 subsystem <- 8086/a0aa
1585 14:01:56.127494 PCI: 00:1e.2 cmd <- 06
1586 14:01:56.130732 PCI: 00:1e.3 subsystem <- 8086/a0ab
1587 14:01:56.134104 PCI: 00:1e.3 cmd <- 02
1588 14:01:56.137172 PCI: 00:1f.0 subsystem <- 8086/a087
1589 14:01:56.137266 PCI: 00:1f.0 cmd <- 407
1590 14:01:56.144124 PCI: 00:1f.3 subsystem <- 8086/a0c8
1591 14:01:56.144247 PCI: 00:1f.3 cmd <- 02
1592 14:01:56.147432 PCI: 00:1f.5 subsystem <- 8086/a0a4
1593 14:01:56.150503 PCI: 00:1f.5 cmd <- 406
1594 14:01:56.155683 PCI: 01:00.0 cmd <- 02
1595 14:01:56.159618 done.
1596 14:01:56.162951 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1597 14:01:56.166222 Initializing devices...
1598 14:01:56.169640 Root Device init
1599 14:01:56.172978 Chrome EC: Set SMI mask to 0x0000000000000000
1600 14:01:56.179932 Chrome EC: clear events_b mask to 0x0000000000000000
1601 14:01:56.186652 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1602 14:01:56.189970 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1603 14:01:56.196207 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1604 14:01:56.202877 Chrome EC: Set WAKE mask to 0x0000000000000000
1605 14:01:56.206175 fw_config match found: DB_USB=USB3_ACTIVE
1606 14:01:56.212768 Configure Right Type-C port orientation for retimer
1607 14:01:56.216381 Root Device init finished in 42 msecs
1608 14:01:56.219600 PCI: 00:00.0 init
1609 14:01:56.222685 CPU TDP = 9 Watts
1610 14:01:56.222777 CPU PL1 = 9 Watts
1611 14:01:56.226366 CPU PL2 = 40 Watts
1612 14:01:56.226492 CPU PL4 = 83 Watts
1613 14:01:56.229603 PCI: 00:00.0 init finished in 8 msecs
1614 14:01:56.233026 PCI: 00:02.0 init
1615 14:01:56.236388 GMA: Found VBT in CBFS
1616 14:01:56.239469 GMA: Found valid VBT in CBFS
1617 14:01:56.242959 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1618 14:01:56.253116 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1619 14:01:56.256193 PCI: 00:02.0 init finished in 18 msecs
1620 14:01:56.259453 PCI: 00:05.0 init
1621 14:01:56.263413 PCI: 00:05.0 init finished in 0 msecs
1622 14:01:56.265872 PCI: 00:08.0 init
1623 14:01:56.269269 PCI: 00:08.0 init finished in 0 msecs
1624 14:01:56.272523 PCI: 00:14.0 init
1625 14:01:56.276080 PCI: 00:14.0 init finished in 0 msecs
1626 14:01:56.276172 PCI: 00:14.2 init
1627 14:01:56.279245 PCI: 00:14.2 init finished in 0 msecs
1628 14:01:56.282866 PCI: 00:15.0 init
1629 14:01:56.286251 I2C bus 0 version 0x3230302a
1630 14:01:56.289585 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1631 14:01:56.293142 PCI: 00:15.0 init finished in 6 msecs
1632 14:01:56.296063 PCI: 00:15.1 init
1633 14:01:56.299978 I2C bus 1 version 0x3230302a
1634 14:01:56.302748 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1635 14:01:56.306242 PCI: 00:15.1 init finished in 6 msecs
1636 14:01:56.309724 PCI: 00:15.2 init
1637 14:01:56.312772 I2C bus 2 version 0x3230302a
1638 14:01:56.316483 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1639 14:01:56.319695 PCI: 00:15.2 init finished in 6 msecs
1640 14:01:56.319786 PCI: 00:15.3 init
1641 14:01:56.322829 I2C bus 3 version 0x3230302a
1642 14:01:56.326583 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1643 14:01:56.333034 PCI: 00:15.3 init finished in 6 msecs
1644 14:01:56.333127 PCI: 00:16.0 init
1645 14:01:56.336076 PCI: 00:16.0 init finished in 0 msecs
1646 14:01:56.339668 PCI: 00:19.1 init
1647 14:01:56.343009 I2C bus 5 version 0x3230302a
1648 14:01:56.346468 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1649 14:01:56.350357 PCI: 00:19.1 init finished in 6 msecs
1650 14:01:56.353193 PCI: 00:1d.0 init
1651 14:01:56.356696 Initializing PCH PCIe bridge.
1652 14:01:56.359900 PCI: 00:1d.0 init finished in 3 msecs
1653 14:01:56.362775 PCI: 00:1f.0 init
1654 14:01:56.366566 IOAPIC: Initializing IOAPIC at 0xfec00000
1655 14:01:56.373138 IOAPIC: Bootstrap Processor Local APIC = 0x00
1656 14:01:56.373230 IOAPIC: ID = 0x02
1657 14:01:56.376034 IOAPIC: Dumping registers
1658 14:01:56.379463 reg 0x0000: 0x02000000
1659 14:01:56.379555 reg 0x0001: 0x00770020
1660 14:01:56.382868 reg 0x0002: 0x00000000
1661 14:01:56.386199 PCI: 00:1f.0 init finished in 21 msecs
1662 14:01:56.389975 PCI: 00:1f.2 init
1663 14:01:56.392713 Disabling ACPI via APMC.
1664 14:01:56.396596 APMC done.
1665 14:01:56.399872 PCI: 00:1f.2 init finished in 6 msecs
1666 14:01:56.411693 PCI: 01:00.0 init
1667 14:01:56.414278 PCI: 01:00.0 init finished in 0 msecs
1668 14:01:56.418017 PNP: 0c09.0 init
1669 14:01:56.421390 Google Chrome EC uptime: 8.356 seconds
1670 14:01:56.427633 Google Chrome AP resets since EC boot: 1
1671 14:01:56.430992 Google Chrome most recent AP reset causes:
1672 14:01:56.434201 0.451: 32775 shutdown: entering G3
1673 14:01:56.441018 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1674 14:01:56.444139 PNP: 0c09.0 init finished in 23 msecs
1675 14:01:56.449891 Devices initialized
1676 14:01:56.453376 Show all devs... After init.
1677 14:01:56.456454 Root Device: enabled 1
1678 14:01:56.456546 DOMAIN: 0000: enabled 1
1679 14:01:56.460215 CPU_CLUSTER: 0: enabled 1
1680 14:01:56.463447 PCI: 00:00.0: enabled 1
1681 14:01:56.466569 PCI: 00:02.0: enabled 1
1682 14:01:56.466661 PCI: 00:04.0: enabled 1
1683 14:01:56.469856 PCI: 00:05.0: enabled 1
1684 14:01:56.473194 PCI: 00:06.0: enabled 0
1685 14:01:56.476384 PCI: 00:07.0: enabled 0
1686 14:01:56.476484 PCI: 00:07.1: enabled 0
1687 14:01:56.480015 PCI: 00:07.2: enabled 0
1688 14:01:56.483015 PCI: 00:07.3: enabled 0
1689 14:01:56.486351 PCI: 00:08.0: enabled 1
1690 14:01:56.486443 PCI: 00:09.0: enabled 0
1691 14:01:56.490215 PCI: 00:0a.0: enabled 0
1692 14:01:56.492947 PCI: 00:0d.0: enabled 1
1693 14:01:56.496367 PCI: 00:0d.1: enabled 0
1694 14:01:56.496468 PCI: 00:0d.2: enabled 0
1695 14:01:56.499605 PCI: 00:0d.3: enabled 0
1696 14:01:56.503281 PCI: 00:0e.0: enabled 0
1697 14:01:56.503374 PCI: 00:10.2: enabled 1
1698 14:01:56.506563 PCI: 00:10.6: enabled 0
1699 14:01:56.509821 PCI: 00:10.7: enabled 0
1700 14:01:56.513212 PCI: 00:12.0: enabled 0
1701 14:01:56.513304 PCI: 00:12.6: enabled 0
1702 14:01:56.516498 PCI: 00:13.0: enabled 0
1703 14:01:56.519806 PCI: 00:14.0: enabled 1
1704 14:01:56.522940 PCI: 00:14.1: enabled 0
1705 14:01:56.523032 PCI: 00:14.2: enabled 1
1706 14:01:56.526159 PCI: 00:14.3: enabled 1
1707 14:01:56.530071 PCI: 00:15.0: enabled 1
1708 14:01:56.533270 PCI: 00:15.1: enabled 1
1709 14:01:56.533361 PCI: 00:15.2: enabled 1
1710 14:01:56.536172 PCI: 00:15.3: enabled 1
1711 14:01:56.539415 PCI: 00:16.0: enabled 1
1712 14:01:56.539507 PCI: 00:16.1: enabled 0
1713 14:01:56.542943 PCI: 00:16.2: enabled 0
1714 14:01:56.546231 PCI: 00:16.3: enabled 0
1715 14:01:56.549938 PCI: 00:16.4: enabled 0
1716 14:01:56.550030 PCI: 00:16.5: enabled 0
1717 14:01:56.552982 PCI: 00:17.0: enabled 0
1718 14:01:56.556236 PCI: 00:19.0: enabled 0
1719 14:01:56.559339 PCI: 00:19.1: enabled 1
1720 14:01:56.559431 PCI: 00:19.2: enabled 0
1721 14:01:56.562745 PCI: 00:1c.0: enabled 1
1722 14:01:56.566082 PCI: 00:1c.1: enabled 0
1723 14:01:56.569599 PCI: 00:1c.2: enabled 0
1724 14:01:56.569691 PCI: 00:1c.3: enabled 0
1725 14:01:56.572647 PCI: 00:1c.4: enabled 0
1726 14:01:56.576195 PCI: 00:1c.5: enabled 0
1727 14:01:56.579498 PCI: 00:1c.6: enabled 1
1728 14:01:56.579590 PCI: 00:1c.7: enabled 0
1729 14:01:56.582542 PCI: 00:1d.0: enabled 1
1730 14:01:56.585963 PCI: 00:1d.1: enabled 0
1731 14:01:56.586055 PCI: 00:1d.2: enabled 1
1732 14:01:56.589407 PCI: 00:1d.3: enabled 0
1733 14:01:56.592731 PCI: 00:1e.0: enabled 1
1734 14:01:56.595883 PCI: 00:1e.1: enabled 0
1735 14:01:56.595975 PCI: 00:1e.2: enabled 1
1736 14:01:56.599287 PCI: 00:1e.3: enabled 1
1737 14:01:56.603076 PCI: 00:1f.0: enabled 1
1738 14:01:56.605775 PCI: 00:1f.1: enabled 0
1739 14:01:56.605866 PCI: 00:1f.2: enabled 1
1740 14:01:56.609166 PCI: 00:1f.3: enabled 1
1741 14:01:56.612587 PCI: 00:1f.4: enabled 0
1742 14:01:56.615937 PCI: 00:1f.5: enabled 1
1743 14:01:56.616028 PCI: 00:1f.6: enabled 0
1744 14:01:56.619128 PCI: 00:1f.7: enabled 0
1745 14:01:56.622454 APIC: 00: enabled 1
1746 14:01:56.622545 GENERIC: 0.0: enabled 1
1747 14:01:56.625708 GENERIC: 0.0: enabled 1
1748 14:01:56.629119 GENERIC: 1.0: enabled 1
1749 14:01:56.632377 GENERIC: 0.0: enabled 1
1750 14:01:56.632477 GENERIC: 1.0: enabled 1
1751 14:01:56.635641 USB0 port 0: enabled 1
1752 14:01:56.639167 GENERIC: 0.0: enabled 1
1753 14:01:56.639258 USB0 port 0: enabled 1
1754 14:01:56.642459 GENERIC: 0.0: enabled 1
1755 14:01:56.646025 I2C: 00:1a: enabled 1
1756 14:01:56.648853 I2C: 00:31: enabled 1
1757 14:01:56.648945 I2C: 00:32: enabled 1
1758 14:01:56.652288 I2C: 00:10: enabled 1
1759 14:01:56.655700 I2C: 00:15: enabled 1
1760 14:01:56.655791 GENERIC: 0.0: enabled 0
1761 14:01:56.658851 GENERIC: 1.0: enabled 0
1762 14:01:56.662059 GENERIC: 0.0: enabled 1
1763 14:01:56.662150 SPI: 00: enabled 1
1764 14:01:56.665646 SPI: 00: enabled 1
1765 14:01:56.669054 PNP: 0c09.0: enabled 1
1766 14:01:56.669146 GENERIC: 0.0: enabled 1
1767 14:01:56.672330 USB3 port 0: enabled 1
1768 14:01:56.675334 USB3 port 1: enabled 1
1769 14:01:56.678544 USB3 port 2: enabled 0
1770 14:01:56.678664 USB3 port 3: enabled 0
1771 14:01:56.682026 USB2 port 0: enabled 0
1772 14:01:56.685528 USB2 port 1: enabled 1
1773 14:01:56.685621 USB2 port 2: enabled 1
1774 14:01:56.689000 USB2 port 3: enabled 0
1775 14:01:56.692050 USB2 port 4: enabled 1
1776 14:01:56.695224 USB2 port 5: enabled 0
1777 14:01:56.695315 USB2 port 6: enabled 0
1778 14:01:56.698971 USB2 port 7: enabled 0
1779 14:01:56.701842 USB2 port 8: enabled 0
1780 14:01:56.701933 USB2 port 9: enabled 0
1781 14:01:56.705926 USB3 port 0: enabled 0
1782 14:01:56.708797 USB3 port 1: enabled 1
1783 14:01:56.708888 USB3 port 2: enabled 0
1784 14:01:56.711929 USB3 port 3: enabled 0
1785 14:01:56.715357 GENERIC: 0.0: enabled 1
1786 14:01:56.718805 GENERIC: 1.0: enabled 1
1787 14:01:56.718913 APIC: 01: enabled 1
1788 14:01:56.722057 APIC: 04: enabled 1
1789 14:01:56.722148 APIC: 03: enabled 1
1790 14:01:56.725349 APIC: 07: enabled 1
1791 14:01:56.728697 APIC: 06: enabled 1
1792 14:01:56.728788 APIC: 05: enabled 1
1793 14:01:56.732055 APIC: 02: enabled 1
1794 14:01:56.735067 PCI: 01:00.0: enabled 1
1795 14:01:56.738590 BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
1796 14:01:56.745314 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1797 14:01:56.748432 ELOG: NV offset 0xf30000 size 0x1000
1798 14:01:56.755414 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1799 14:01:56.761646 ELOG: Event(17) added with size 13 at 2023-05-03 14:01:56 UTC
1800 14:01:56.768291 ELOG: Event(92) added with size 9 at 2023-05-03 14:01:56 UTC
1801 14:01:56.774857 ELOG: Event(93) added with size 9 at 2023-05-03 14:01:56 UTC
1802 14:01:56.781591 ELOG: Event(9E) added with size 10 at 2023-05-03 14:01:56 UTC
1803 14:01:56.788281 ELOG: Event(9F) added with size 14 at 2023-05-03 14:01:56 UTC
1804 14:01:56.794641 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1805 14:01:56.801527 ELOG: Event(A1) added with size 10 at 2023-05-03 14:01:56 UTC
1806 14:01:56.808119 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1807 14:01:56.814493 ELOG: Event(A0) added with size 9 at 2023-05-03 14:01:56 UTC
1808 14:01:56.818321 elog_add_boot_reason: Logged dev mode boot
1809 14:01:56.824747 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1810 14:01:56.824838 Finalize devices...
1811 14:01:56.827940 Devices finalized
1812 14:01:56.834706 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1813 14:01:56.837989 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1814 14:01:56.844326 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1815 14:01:56.847845 ME: HFSTS1 : 0x80030055
1816 14:01:56.854426 ME: HFSTS2 : 0x30280116
1817 14:01:56.857819 ME: HFSTS3 : 0x00000050
1818 14:01:56.861086 ME: HFSTS4 : 0x00004000
1819 14:01:56.867729 ME: HFSTS5 : 0x00000000
1820 14:01:56.871176 ME: HFSTS6 : 0x40400006
1821 14:01:56.874263 ME: Manufacturing Mode : YES
1822 14:01:56.877846 ME: SPI Protection Mode Enabled : NO
1823 14:01:56.880905 ME: FW Partition Table : OK
1824 14:01:56.887598 ME: Bringup Loader Failure : NO
1825 14:01:56.891061 ME: Firmware Init Complete : NO
1826 14:01:56.894171 ME: Boot Options Present : NO
1827 14:01:56.897640 ME: Update In Progress : NO
1828 14:01:56.900683 ME: D0i3 Support : YES
1829 14:01:56.904296 ME: Low Power State Enabled : NO
1830 14:01:56.907417 ME: CPU Replaced : YES
1831 14:01:56.914354 ME: CPU Replacement Valid : YES
1832 14:01:56.917540 ME: Current Working State : 5
1833 14:01:56.920418 ME: Current Operation State : 1
1834 14:01:56.924383 ME: Current Operation Mode : 3
1835 14:01:56.927775 ME: Error Code : 0
1836 14:01:56.930499 ME: Enhanced Debug Mode : NO
1837 14:01:56.934327 ME: CPU Debug Disabled : YES
1838 14:01:56.937118 ME: TXT Support : NO
1839 14:01:56.943997 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1840 14:01:56.950568 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1841 14:01:56.954016 CBFS: 'fallback/slic' not found.
1842 14:01:56.960605 ACPI: Writing ACPI tables at 76b01000.
1843 14:01:56.960697 ACPI: * FACS
1844 14:01:56.963957 ACPI: * DSDT
1845 14:01:56.966944 Ramoops buffer: 0x100000@0x76a00000.
1846 14:01:56.970667 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1847 14:01:56.977012 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1848 14:01:56.980168 Google Chrome EC: version:
1849 14:01:56.983584 ro: voema_v2.0.10114-a447f03e46
1850 14:01:56.986750 rw: voema_v2.0.10114-a447f03e46
1851 14:01:56.986900 running image: 2
1852 14:01:56.993528 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1853 14:01:56.998143 ACPI: * FADT
1854 14:01:56.998290 SCI is IRQ9
1855 14:01:57.004360 ACPI: added table 1/32, length now 40
1856 14:01:57.004524 ACPI: * SSDT
1857 14:01:57.007745 Found 1 CPU(s) with 8 core(s) each.
1858 14:01:57.014826 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1859 14:01:57.017727 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1860 14:01:57.021459 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1861 14:01:57.024639 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1862 14:01:57.031373 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1863 14:01:57.037891 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1864 14:01:57.041094 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1865 14:01:57.047975 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1866 14:01:57.054700 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1867 14:01:57.057950 \_SB.PCI0.RP09: Added StorageD3Enable property
1868 14:01:57.061253 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1869 14:01:57.068008 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1870 14:01:57.074409 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1871 14:01:57.077780 PS2K: Passing 80 keymaps to kernel
1872 14:01:57.084033 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1873 14:01:57.091108 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1874 14:01:57.097527 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1875 14:01:57.104019 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1876 14:01:57.111023 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1877 14:01:57.117569 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1878 14:01:57.123765 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1879 14:01:57.130717 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1880 14:01:57.133761 ACPI: added table 2/32, length now 44
1881 14:01:57.133908 ACPI: * MCFG
1882 14:01:57.137170 ACPI: added table 3/32, length now 48
1883 14:01:57.140606 ACPI: * TPM2
1884 14:01:57.144009 TPM2 log created at 0x769f0000
1885 14:01:57.147442 ACPI: added table 4/32, length now 52
1886 14:01:57.147593 ACPI: * MADT
1887 14:01:57.150939 SCI is IRQ9
1888 14:01:57.153766 ACPI: added table 5/32, length now 56
1889 14:01:57.157167 current = 76b09850
1890 14:01:57.157315 ACPI: * DMAR
1891 14:01:57.160603 ACPI: added table 6/32, length now 60
1892 14:01:57.163929 ACPI: added table 7/32, length now 64
1893 14:01:57.167253 ACPI: * HPET
1894 14:01:57.170604 ACPI: added table 8/32, length now 68
1895 14:01:57.170752 ACPI: done.
1896 14:01:57.173980 ACPI tables: 35216 bytes.
1897 14:01:57.177330 smbios_write_tables: 769ef000
1898 14:01:57.180405 EC returned error result code 3
1899 14:01:57.183652 Couldn't obtain OEM name from CBI
1900 14:01:57.187045 Create SMBIOS type 16
1901 14:01:57.190343 Create SMBIOS type 17
1902 14:01:57.193793 GENERIC: 0.0 (WIFI Device)
1903 14:01:57.193939 SMBIOS tables: 1734 bytes.
1904 14:01:57.200654 Writing table forward entry at 0x00000500
1905 14:01:57.207364 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1906 14:01:57.210302 Writing coreboot table at 0x76b25000
1907 14:01:57.213502 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1908 14:01:57.220334 1. 0000000000001000-000000000009ffff: RAM
1909 14:01:57.223706 2. 00000000000a0000-00000000000fffff: RESERVED
1910 14:01:57.226684 3. 0000000000100000-00000000769eefff: RAM
1911 14:01:57.233486 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1912 14:01:57.239962 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1913 14:01:57.243336 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1914 14:01:57.250015 7. 0000000077000000-000000007fbfffff: RESERVED
1915 14:01:57.253325 8. 00000000c0000000-00000000cfffffff: RESERVED
1916 14:01:57.259990 9. 00000000f8000000-00000000f9ffffff: RESERVED
1917 14:01:57.263438 10. 00000000fb000000-00000000fb000fff: RESERVED
1918 14:01:57.270132 11. 00000000fe000000-00000000fe00ffff: RESERVED
1919 14:01:57.273459 12. 00000000fed80000-00000000fed87fff: RESERVED
1920 14:01:57.279700 13. 00000000fed90000-00000000fed92fff: RESERVED
1921 14:01:57.283052 14. 00000000feda0000-00000000feda1fff: RESERVED
1922 14:01:57.286525 15. 00000000fedc0000-00000000feddffff: RESERVED
1923 14:01:57.293516 16. 0000000100000000-00000004803fffff: RAM
1924 14:01:57.296880 Passing 4 GPIOs to payload:
1925 14:01:57.299745 NAME | PORT | POLARITY | VALUE
1926 14:01:57.306738 lid | undefined | high | high
1927 14:01:57.309697 power | undefined | high | low
1928 14:01:57.316507 oprom | undefined | high | low
1929 14:01:57.323310 EC in RW | 0x000000e5 | high | high
1930 14:01:57.326427 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f1ab
1931 14:01:57.329925 coreboot table: 1576 bytes.
1932 14:01:57.333050 IMD ROOT 0. 0x76fff000 0x00001000
1933 14:01:57.339780 IMD SMALL 1. 0x76ffe000 0x00001000
1934 14:01:57.342950 FSP MEMORY 2. 0x76c4e000 0x003b0000
1935 14:01:57.346574 VPD 3. 0x76c4d000 0x00000367
1936 14:01:57.349638 RO MCACHE 4. 0x76c4c000 0x00000fdc
1937 14:01:57.353085 CONSOLE 5. 0x76c2c000 0x00020000
1938 14:01:57.356613 FMAP 6. 0x76c2b000 0x00000578
1939 14:01:57.360015 TIME STAMP 7. 0x76c2a000 0x00000910
1940 14:01:57.362822 VBOOT WORK 8. 0x76c16000 0x00014000
1941 14:01:57.369581 ROMSTG STCK 9. 0x76c15000 0x00001000
1942 14:01:57.373369 AFTER CAR 10. 0x76c0a000 0x0000b000
1943 14:01:57.376169 RAMSTAGE 11. 0x76b97000 0x00073000
1944 14:01:57.379637 REFCODE 12. 0x76b42000 0x00055000
1945 14:01:57.383222 SMM BACKUP 13. 0x76b32000 0x00010000
1946 14:01:57.385992 4f444749 14. 0x76b30000 0x00002000
1947 14:01:57.389682 EXT VBT15. 0x76b2d000 0x0000219f
1948 14:01:57.393121 COREBOOT 16. 0x76b25000 0x00008000
1949 14:01:57.396129 ACPI 17. 0x76b01000 0x00024000
1950 14:01:57.399624 ACPI GNVS 18. 0x76b00000 0x00001000
1951 14:01:57.406061 RAMOOPS 19. 0x76a00000 0x00100000
1952 14:01:57.409526 TPM2 TCGLOG20. 0x769f0000 0x00010000
1953 14:01:57.413124 SMBIOS 21. 0x769ef000 0x00000800
1954 14:01:57.413214 IMD small region:
1955 14:01:57.419404 IMD ROOT 0. 0x76ffec00 0x00000400
1956 14:01:57.422683 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1957 14:01:57.425838 POWER STATE 2. 0x76ffeb80 0x00000044
1958 14:01:57.429348 ROMSTAGE 3. 0x76ffeb60 0x00000004
1959 14:01:57.432673 MEM INFO 4. 0x76ffe980 0x000001e0
1960 14:01:57.439424 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1961 14:01:57.442690 MTRR: Physical address space:
1962 14:01:57.449530 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1963 14:01:57.455968 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1964 14:01:57.462829 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1965 14:01:57.469338 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1966 14:01:57.472606 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1967 14:01:57.479338 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1968 14:01:57.485993 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1969 14:01:57.489119 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 14:01:57.495671 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 14:01:57.499120 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 14:01:57.502410 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 14:01:57.505788 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 14:01:57.512585 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 14:01:57.515854 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 14:01:57.519071 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 14:01:57.522015 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 14:01:57.529292 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 14:01:57.532147 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 14:01:57.535658 call enable_fixed_mtrr()
1981 14:01:57.539059 CPU physical address size: 39 bits
1982 14:01:57.545872 MTRR: default type WB/UC MTRR counts: 6/7.
1983 14:01:57.548850 MTRR: WB selected as default type.
1984 14:01:57.555726 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1985 14:01:57.558848 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1986 14:01:57.565792 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1987 14:01:57.572252 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1988 14:01:57.578828 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1989 14:01:57.585374 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1990 14:01:57.592827 MTRR: Fixed MSR 0x250 0x0606060606060606
1991 14:01:57.596347 MTRR: Fixed MSR 0x258 0x0606060606060606
1992 14:01:57.599548 MTRR: Fixed MSR 0x259 0x0000000000000000
1993 14:01:57.602717 MTRR: Fixed MSR 0x268 0x0606060606060606
1994 14:01:57.609197 MTRR: Fixed MSR 0x269 0x0606060606060606
1995 14:01:57.612774 MTRR: Fixed MSR 0x26a 0x0606060606060606
1996 14:01:57.616001 MTRR: Fixed MSR 0x26b 0x0606060606060606
1997 14:01:57.619239 MTRR: Fixed MSR 0x26c 0x0606060606060606
1998 14:01:57.625717 MTRR: Fixed MSR 0x26d 0x0606060606060606
1999 14:01:57.628985 MTRR: Fixed MSR 0x26e 0x0606060606060606
2000 14:01:57.632367 MTRR: Fixed MSR 0x26f 0x0606060606060606
2001 14:01:57.635777 MTRR: Fixed MSR 0x250 0x0606060606060606
2002 14:01:57.642584 MTRR: Fixed MSR 0x250 0x0606060606060606
2003 14:01:57.645874 MTRR: Fixed MSR 0x258 0x0606060606060606
2004 14:01:57.649127 MTRR: Fixed MSR 0x259 0x0000000000000000
2005 14:01:57.652387 MTRR: Fixed MSR 0x268 0x0606060606060606
2006 14:01:57.656126 MTRR: Fixed MSR 0x269 0x0606060606060606
2007 14:01:57.662234 MTRR: Fixed MSR 0x26a 0x0606060606060606
2008 14:01:57.665754 MTRR: Fixed MSR 0x26b 0x0606060606060606
2009 14:01:57.668922 MTRR: Fixed MSR 0x26c 0x0606060606060606
2010 14:01:57.672196 MTRR: Fixed MSR 0x26d 0x0606060606060606
2011 14:01:57.679574 MTRR: Fixed MSR 0x26e 0x0606060606060606
2012 14:01:57.682133 MTRR: Fixed MSR 0x26f 0x0606060606060606
2013 14:01:57.685401 call enable_fixed_mtrr()
2014 14:01:57.685493
2015 14:01:57.685567 MTRR check
2016 14:01:57.689371 CPU physical address size: 39 bits
2017 14:01:57.692052 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 14:01:57.699037 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 14:01:57.702066 MTRR: Fixed MSR 0x258 0x0606060606060606
2020 14:01:57.705771 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 14:01:57.708504 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 14:01:57.715186 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 14:01:57.718494 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 14:01:57.721870 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 14:01:57.725699 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 14:01:57.728923 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 14:01:57.735401 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 14:01:57.738683 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 14:01:57.746217 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 14:01:57.749465 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 14:01:57.752361 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 14:01:57.755761 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 14:01:57.762210 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 14:01:57.765996 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 14:01:57.769285 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 14:01:57.772501 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 14:01:57.778781 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 14:01:57.781923 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 14:01:57.785932 call enable_fixed_mtrr()
2040 14:01:57.789053 call enable_fixed_mtrr()
2041 14:01:57.792253 call enable_fixed_mtrr()
2042 14:01:57.795616 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 14:01:57.798870 CPU physical address size: 39 bits
2044 14:01:57.806285 MTRR: Fixed MSR 0x259 0x0000000000000000
2045 14:01:57.809602 MTRR: Fixed MSR 0x268 0x0606060606060606
2046 14:01:57.813284 MTRR: Fixed MSR 0x269 0x0606060606060606
2047 14:01:57.816234 MTRR: Fixed MSR 0x26a 0x0606060606060606
2048 14:01:57.822898 MTRR: Fixed MSR 0x26b 0x0606060606060606
2049 14:01:57.826687 MTRR: Fixed MSR 0x26c 0x0606060606060606
2050 14:01:57.830013 MTRR: Fixed MSR 0x26d 0x0606060606060606
2051 14:01:57.832833 MTRR: Fixed MSR 0x26e 0x0606060606060606
2052 14:01:57.839446 MTRR: Fixed MSR 0x26f 0x0606060606060606
2053 14:01:57.843241 MTRR: Fixed MSR 0x250 0x0606060606060606
2054 14:01:57.846127 MTRR: Fixed MSR 0x250 0x0606060606060606
2055 14:01:57.849520 MTRR: Fixed MSR 0x258 0x0606060606060606
2056 14:01:57.852952 MTRR: Fixed MSR 0x259 0x0000000000000000
2057 14:01:57.859267 MTRR: Fixed MSR 0x268 0x0606060606060606
2058 14:01:57.863006 MTRR: Fixed MSR 0x269 0x0606060606060606
2059 14:01:57.865989 MTRR: Fixed MSR 0x26a 0x0606060606060606
2060 14:01:57.869331 MTRR: Fixed MSR 0x26b 0x0606060606060606
2061 14:01:57.875970 MTRR: Fixed MSR 0x26c 0x0606060606060606
2062 14:01:57.879456 MTRR: Fixed MSR 0x26d 0x0606060606060606
2063 14:01:57.882494 MTRR: Fixed MSR 0x26e 0x0606060606060606
2064 14:01:57.886392 MTRR: Fixed MSR 0x26f 0x0606060606060606
2065 14:01:57.894622 MTRR: Fixed MSR 0x258 0x0606060606060606
2066 14:01:57.894715 call enable_fixed_mtrr()
2067 14:01:57.901349 MTRR: Fixed MSR 0x259 0x0000000000000000
2068 14:01:57.904532 MTRR: Fixed MSR 0x268 0x0606060606060606
2069 14:01:57.908303 MTRR: Fixed MSR 0x269 0x0606060606060606
2070 14:01:57.911613 MTRR: Fixed MSR 0x26a 0x0606060606060606
2071 14:01:57.917852 MTRR: Fixed MSR 0x26b 0x0606060606060606
2072 14:01:57.921235 MTRR: Fixed MSR 0x26c 0x0606060606060606
2073 14:01:57.924532 MTRR: Fixed MSR 0x26d 0x0606060606060606
2074 14:01:57.927761 MTRR: Fixed MSR 0x26e 0x0606060606060606
2075 14:01:57.934136 MTRR: Fixed MSR 0x26f 0x0606060606060606
2076 14:01:57.937939 CPU physical address size: 39 bits
2077 14:01:57.943075 call enable_fixed_mtrr()
2078 14:01:57.945795 call enable_fixed_mtrr()
2079 14:01:57.949323 CPU physical address size: 39 bits
2080 14:01:57.952559 CPU physical address size: 39 bits
2081 14:01:57.957150 CPU physical address size: 39 bits
2082 14:01:57.963560 CPU physical address size: 39 bits
2083 14:01:57.963651 Fixed MTRRs : Enabled
2084 14:01:57.967132 Variable MTRRs: Enabled
2085 14:01:57.967223
2086 14:01:57.973749 BS: BS_WRITE_TABLES exit times (exec / console): 378 / 150 ms
2087 14:01:57.976874 Checking cr50 for pending updates
2088 14:01:57.983530 Reading cr50 TPM mode
2089 14:01:57.994237 BS: BS_PAYLOAD_LOAD entry times (exec / console): 9 / 6 ms
2090 14:01:58.003762 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2091 14:01:58.006992 Checking segment from ROM address 0xffc02b38
2092 14:01:58.010287 Checking segment from ROM address 0xffc02b54
2093 14:01:58.017209 Loading segment from ROM address 0xffc02b38
2094 14:01:58.017302 code (compression=0)
2095 14:01:58.027080 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2096 14:01:58.033611 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2097 14:01:58.036948 it's not compressed!
2098 14:01:58.186729 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2099 14:01:58.193447 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2100 14:01:58.200291 Loading segment from ROM address 0xffc02b54
2101 14:01:58.203484 Entry Point 0x30000000
2102 14:01:58.203576 Loaded segments
2103 14:01:58.209902 BS: BS_PAYLOAD_LOAD run times (exec / console): 146 / 63 ms
2104 14:01:58.255866 Finalizing chipset.
2105 14:01:58.258994 Finalizing SMM.
2106 14:01:58.259087 APMC done.
2107 14:01:58.265381 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2108 14:01:58.268729 mp_park_aps done after 0 msecs.
2109 14:01:58.272539 Jumping to boot code at 0x30000000(0x76b25000)
2110 14:01:58.282299 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2111 14:01:58.282392
2112 14:01:58.282464
2113 14:01:58.285160
2114 14:01:58.285251 Starting depthcharge on Voema...
2115 14:01:58.285621 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2116 14:01:58.285735 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2117 14:01:58.285831 Setting prompt string to ['volteer:']
2118 14:01:58.285922 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2119 14:01:58.288665
2120 14:01:58.295237 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2121 14:01:58.295329
2122 14:01:58.301802 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2123 14:01:58.301894
2124 14:01:58.308525 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2125 14:01:58.308617
2126 14:01:58.311694 Failed to find eMMC card reader
2127 14:01:58.311786
2128 14:01:58.311857 Wipe memory regions:
2129 14:01:58.314946
2130 14:01:58.318386 [0x00000000001000, 0x000000000a0000)
2131 14:01:58.318478
2132 14:01:58.321635 [0x00000000100000, 0x00000030000000)
2133 14:01:58.360368
2134 14:01:58.364201 [0x00000032662db0, 0x000000769ef000)
2135 14:01:58.416349
2136 14:01:58.419774 [0x00000100000000, 0x00000480400000)
2137 14:01:59.095375
2138 14:01:59.098574 ec_init: CrosEC protocol v3 supported (256, 256)
2139 14:01:59.529342
2140 14:01:59.529496 R8152: Initializing
2141 14:01:59.529575
2142 14:01:59.532863 Version 6 (ocp_data = 5c30)
2143 14:01:59.532966
2144 14:01:59.536183 R8152: Done initializing
2145 14:01:59.536274
2146 14:01:59.539329 Adding net device
2147 14:01:59.840943
2148 14:01:59.843975 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2149 14:01:59.844073
2150 14:01:59.844146
2151 14:01:59.844219
2152 14:01:59.847194 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2154 14:01:59.947626 volteer: tftpboot 192.168.201.1 10185369/tftp-deploy-u1fvjzwp/kernel/bzImage 10185369/tftp-deploy-u1fvjzwp/kernel/cmdline 10185369/tftp-deploy-u1fvjzwp/ramdisk/ramdisk.cpio.gz
2155 14:01:59.947770 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2156 14:01:59.947864 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2157 14:01:59.952417 tftpboot 192.168.201.1 10185369/tftp-deploy-u1fvjzwp/kernel/bzIploy-u1fvjzwp/kernel/cmdline 10185369/tftp-deploy-u1fvjzwp/ramdisk/ramdisk.cpio.gz
2158 14:01:59.952514
2159 14:01:59.952587 Waiting for link
2160 14:02:00.155563
2161 14:02:00.155737 done.
2162 14:02:00.155834
2163 14:02:00.155903 MAC: 00:24:32:30:77:d1
2164 14:02:00.155968
2165 14:02:00.159214 Sending DHCP discover... done.
2166 14:02:00.159306
2167 14:02:00.162117 Waiting for reply... done.
2168 14:02:00.162209
2169 14:02:00.165697 Sending DHCP request... done.
2170 14:02:00.165809
2171 14:02:00.172200 Waiting for reply... done.
2172 14:02:00.172319
2173 14:02:00.172428 My ip is 192.168.201.13
2174 14:02:00.172499
2175 14:02:00.175743 The DHCP server ip is 192.168.201.1
2176 14:02:00.175886
2177 14:02:00.182197 TFTP server IP predefined by user: 192.168.201.1
2178 14:02:00.182289
2179 14:02:00.188565 Bootfile predefined by user: 10185369/tftp-deploy-u1fvjzwp/kernel/bzImage
2180 14:02:00.188657
2181 14:02:00.191887 Sending tftp read request... done.
2182 14:02:00.191978
2183 14:02:00.195340 Waiting for the transfer...
2184 14:02:00.198670
2185 14:02:00.767071 00000000 ################################################################
2186 14:02:00.767319
2187 14:02:01.352331 00080000 ################################################################
2188 14:02:01.352516
2189 14:02:01.930477 00100000 ################################################################
2190 14:02:01.930641
2191 14:02:02.517814 00180000 ################################################################
2192 14:02:02.517973
2193 14:02:03.102194 00200000 ################################################################
2194 14:02:03.102373
2195 14:02:03.688365 00280000 ################################################################
2196 14:02:03.688531
2197 14:02:04.275732 00300000 ################################################################
2198 14:02:04.275907
2199 14:02:04.843908 00380000 ################################################################
2200 14:02:04.844066
2201 14:02:05.439014 00400000 ################################################################
2202 14:02:05.439175
2203 14:02:06.032333 00480000 ################################################################
2204 14:02:06.032502
2205 14:02:06.590638 00500000 ################################################################
2206 14:02:06.590806
2207 14:02:07.139761 00580000 ################################################################
2208 14:02:07.139924
2209 14:02:07.689549 00600000 ################################################################
2210 14:02:07.689735
2211 14:02:08.244133 00680000 ################################################################
2212 14:02:08.244295
2213 14:02:08.794583 00700000 ################################################################
2214 14:02:08.794858
2215 14:02:08.813314 00780000 ## done.
2216 14:02:08.813473
2217 14:02:08.816587 The bootfile was 7880592 bytes long.
2218 14:02:08.816733
2219 14:02:08.819782 Sending tftp read request... done.
2220 14:02:08.819924
2221 14:02:08.823383 Waiting for the transfer...
2222 14:02:08.823524
2223 14:02:09.393703 00000000 ################################################################
2224 14:02:09.393857
2225 14:02:09.986504 00080000 ################################################################
2226 14:02:09.986685
2227 14:02:10.547518 00100000 ################################################################
2228 14:02:10.547682
2229 14:02:11.122909 00180000 ################################################################
2230 14:02:11.123071
2231 14:02:11.706107 00200000 ################################################################
2232 14:02:11.706266
2233 14:02:12.269428 00280000 ################################################################
2234 14:02:12.269588
2235 14:02:12.850983 00300000 ################################################################
2236 14:02:12.851168
2237 14:02:13.380276 00380000 ################################################################
2238 14:02:13.380448
2239 14:02:13.917053 00400000 ################################################################
2240 14:02:13.917208
2241 14:02:14.503122 00480000 ################################################################
2242 14:02:14.503374
2243 14:02:15.062018 00500000 ################################################################
2244 14:02:15.062180
2245 14:02:15.309064 00580000 ############################# done.
2246 14:02:15.309215
2247 14:02:15.312592 Sending tftp read request... done.
2248 14:02:15.315598
2249 14:02:15.315754 Waiting for the transfer...
2250 14:02:15.315839
2251 14:02:15.319207 00000000 # done.
2252 14:02:15.319302
2253 14:02:15.329022 Command line loaded dynamically from TFTP file: 10185369/tftp-deploy-u1fvjzwp/kernel/cmdline
2254 14:02:15.329116
2255 14:02:15.348545 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10185369/extract-nfsrootfs-xsya5iio,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2256 14:02:15.354288
2257 14:02:15.357867 Shutting down all USB controllers.
2258 14:02:15.357960
2259 14:02:15.358033 Removing current net device
2260 14:02:15.358102
2261 14:02:15.361572 Finalizing coreboot
2262 14:02:15.361664
2263 14:02:15.367914 Exiting depthcharge with code 4 at timestamp: 25663336
2264 14:02:15.368008
2265 14:02:15.368080
2266 14:02:15.368147 Starting kernel ...
2267 14:02:15.368213
2268 14:02:15.368277
2269 14:02:15.368680 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2270 14:02:15.368792 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2271 14:02:15.368877 Setting prompt string to ['Linux version [0-9]']
2272 14:02:15.368954 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2273 14:02:15.369028 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2275 14:06:42.369050 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2277 14:06:42.369277 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2279 14:06:42.369449 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2282 14:06:42.369729 end: 2 depthcharge-action (duration 00:05:00) [common]
2284 14:06:42.370036 Cleaning after the job
2285 14:06:42.370140 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185369/tftp-deploy-u1fvjzwp/ramdisk
2286 14:06:42.371063 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185369/tftp-deploy-u1fvjzwp/kernel
2287 14:06:42.372170 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185369/tftp-deploy-u1fvjzwp/nfsrootfs
2288 14:06:42.466220 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10185369/tftp-deploy-u1fvjzwp/modules
2289 14:06:42.466692 start: 4.1 power-off (timeout 00:00:30) [common]
2290 14:06:42.466885 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=off'
2291 14:06:42.546176 >> Command sent successfully.
2292 14:06:42.548810 Returned 0 in 0 seconds
2293 14:06:42.649218 end: 4.1 power-off (duration 00:00:00) [common]
2295 14:06:42.649557 start: 4.2 read-feedback (timeout 00:10:00) [common]
2296 14:06:42.649845 Listened to connection for namespace 'common' for up to 1s
2297 14:06:43.650811 Finalising connection for namespace 'common'
2298 14:06:43.651005 Disconnecting from shell: Finalise
2299 14:06:43.651091
2300 14:06:43.751420 end: 4.2 read-feedback (duration 00:00:01) [common]
2301 14:06:43.751551 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10185369
2302 14:06:44.186924 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10185369
2303 14:06:44.187128 JobError: Your job cannot terminate cleanly.