Boot log: acer-cb317-1h-c3z6-dedede

    1 14:27:25.225114  lava-dispatcher, installed at version: 2023.05.1
    2 14:27:25.225356  start: 0 validate
    3 14:27:25.225506  Start time: 2023-06-06 14:27:25.225498+00:00 (UTC)
    4 14:27:25.225650  Using caching service: 'http://localhost/cache/?uri=%s'
    5 14:27:25.225796  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230527.0%2Fx86%2Frootfs.cpio.gz exists
    6 14:27:25.524135  Using caching service: 'http://localhost/cache/?uri=%s'
    7 14:27:25.524918  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1308-ge1d2f27f3d7b0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 14:27:25.806680  Using caching service: 'http://localhost/cache/?uri=%s'
    9 14:27:25.807424  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1308-ge1d2f27f3d7b0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 14:27:28.973594  validate duration: 3.75
   12 14:27:28.974821  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 14:27:28.975332  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 14:27:28.975834  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 14:27:28.976413  Not decompressing ramdisk as can be used compressed.
   16 14:27:28.976847  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230527.0/x86/rootfs.cpio.gz
   17 14:27:28.977176  saving as /var/lib/lava/dispatcher/tmp/10607748/tftp-deploy-mm5ps2vh/ramdisk/rootfs.cpio.gz
   18 14:27:28.977488  total size: 8430069 (8MB)
   19 14:27:29.535358  progress   0% (0MB)
   20 14:27:29.544612  progress   5% (0MB)
   21 14:27:29.550969  progress  10% (0MB)
   22 14:27:29.556117  progress  15% (1MB)
   23 14:27:29.560390  progress  20% (1MB)
   24 14:27:29.563927  progress  25% (2MB)
   25 14:27:29.566764  progress  30% (2MB)
   26 14:27:29.569601  progress  35% (2MB)
   27 14:27:29.572295  progress  40% (3MB)
   28 14:27:29.575115  progress  45% (3MB)
   29 14:27:29.577972  progress  50% (4MB)
   30 14:27:29.580747  progress  55% (4MB)
   31 14:27:29.583529  progress  60% (4MB)
   32 14:27:29.586331  progress  65% (5MB)
   33 14:27:29.589068  progress  70% (5MB)
   34 14:27:29.591609  progress  75% (6MB)
   35 14:27:29.594394  progress  80% (6MB)
   36 14:27:29.597049  progress  85% (6MB)
   37 14:27:29.599634  progress  90% (7MB)
   38 14:27:29.602187  progress  95% (7MB)
   39 14:27:29.604742  progress 100% (8MB)
   40 14:27:29.604915  8MB downloaded in 0.63s (12.81MB/s)
   41 14:27:29.605085  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 14:27:29.605356  end: 1.1 download-retry (duration 00:00:01) [common]
   44 14:27:29.605497  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 14:27:29.605629  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 14:27:29.605816  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1308-ge1d2f27f3d7b0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 14:27:29.605934  saving as /var/lib/lava/dispatcher/tmp/10607748/tftp-deploy-mm5ps2vh/kernel/bzImage
   48 14:27:29.606037  total size: 7884688 (7MB)
   49 14:27:29.606138  No compression specified
   50 14:27:29.607947  progress   0% (0MB)
   51 14:27:29.610612  progress   5% (0MB)
   52 14:27:29.613197  progress  10% (0MB)
   53 14:27:29.615712  progress  15% (1MB)
   54 14:27:29.618204  progress  20% (1MB)
   55 14:27:29.620631  progress  25% (1MB)
   56 14:27:29.623070  progress  30% (2MB)
   57 14:27:29.625503  progress  35% (2MB)
   58 14:27:29.627969  progress  40% (3MB)
   59 14:27:29.630394  progress  45% (3MB)
   60 14:27:29.632851  progress  50% (3MB)
   61 14:27:29.635300  progress  55% (4MB)
   62 14:27:29.637731  progress  60% (4MB)
   63 14:27:29.640137  progress  65% (4MB)
   64 14:27:29.642532  progress  70% (5MB)
   65 14:27:29.644999  progress  75% (5MB)
   66 14:27:29.647442  progress  80% (6MB)
   67 14:27:29.649893  progress  85% (6MB)
   68 14:27:29.652247  progress  90% (6MB)
   69 14:27:29.654581  progress  95% (7MB)
   70 14:27:29.657060  progress 100% (7MB)
   71 14:27:29.657301  7MB downloaded in 0.05s (146.69MB/s)
   72 14:27:29.657508  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 14:27:29.657913  end: 1.2 download-retry (duration 00:00:00) [common]
   75 14:27:29.658047  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 14:27:29.658175  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 14:27:29.658363  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1308-ge1d2f27f3d7b0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 14:27:29.658474  saving as /var/lib/lava/dispatcher/tmp/10607748/tftp-deploy-mm5ps2vh/modules/modules.tar
   79 14:27:29.658575  total size: 250548 (0MB)
   80 14:27:29.658676  Using unxz to decompress xz
   81 14:27:29.662884  progress  13% (0MB)
   82 14:27:29.663365  progress  26% (0MB)
   83 14:27:29.663670  progress  39% (0MB)
   84 14:27:29.665101  progress  52% (0MB)
   85 14:27:29.667158  progress  65% (0MB)
   86 14:27:29.669089  progress  78% (0MB)
   87 14:27:29.671348  progress  91% (0MB)
   88 14:27:29.673413  progress 100% (0MB)
   89 14:27:29.679703  0MB downloaded in 0.02s (11.31MB/s)
   90 14:27:29.680056  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 14:27:29.680529  end: 1.3 download-retry (duration 00:00:00) [common]
   93 14:27:29.680694  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   94 14:27:29.680840  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
   95 14:27:29.680981  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 14:27:29.681113  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
   97 14:27:29.681385  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq
   98 14:27:29.681582  makedir: /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin
   99 14:27:29.681737  makedir: /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/tests
  100 14:27:29.681886  makedir: /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/results
  101 14:27:29.682055  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-add-keys
  102 14:27:29.682264  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-add-sources
  103 14:27:29.682447  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-background-process-start
  104 14:27:29.682629  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-background-process-stop
  105 14:27:29.682833  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-common-functions
  106 14:27:29.683023  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-echo-ipv4
  107 14:27:29.683226  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-install-packages
  108 14:27:29.683417  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-installed-packages
  109 14:27:29.683603  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-os-build
  110 14:27:29.683795  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-probe-channel
  111 14:27:29.683982  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-probe-ip
  112 14:27:29.684168  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-target-ip
  113 14:27:29.684342  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-target-mac
  114 14:27:29.684521  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-target-storage
  115 14:27:29.684710  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-test-case
  116 14:27:29.684907  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-test-event
  117 14:27:29.685093  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-test-feedback
  118 14:27:29.685295  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-test-raise
  119 14:27:29.685482  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-test-reference
  120 14:27:29.685688  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-test-runner
  121 14:27:29.685867  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-test-set
  122 14:27:29.686069  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-test-shell
  123 14:27:29.686253  Updating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-install-packages (oe)
  124 14:27:29.686480  Updating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/bin/lava-installed-packages (oe)
  125 14:27:29.686657  Creating /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/environment
  126 14:27:29.686821  LAVA metadata
  127 14:27:29.686942  - LAVA_JOB_ID=10607748
  128 14:27:29.687066  - LAVA_DISPATCHER_IP=192.168.201.1
  129 14:27:29.687229  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  130 14:27:29.687338  skipped lava-vland-overlay
  131 14:27:29.687485  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 14:27:29.687624  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  133 14:27:29.687731  skipped lava-multinode-overlay
  134 14:27:29.687871  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 14:27:29.688010  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  136 14:27:29.688136  Loading test definitions
  137 14:27:29.688303  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  138 14:27:29.688431  Using /lava-10607748 at stage 0
  139 14:27:29.688934  uuid=10607748_1.4.2.3.1 testdef=None
  140 14:27:29.689090  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 14:27:29.689245  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  142 14:27:29.690155  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 14:27:29.690560  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  145 14:27:29.691655  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 14:27:29.692100  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  148 14:27:29.693115  runner path: /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/0/tests/0_dmesg test_uuid 10607748_1.4.2.3.1
  149 14:27:29.693350  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 14:27:29.693779  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  152 14:27:29.693906  Using /lava-10607748 at stage 1
  153 14:27:29.694395  uuid=10607748_1.4.2.3.5 testdef=None
  154 14:27:29.694534  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  155 14:27:29.694665  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  156 14:27:29.695480  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  158 14:27:29.695888  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  159 14:27:29.696985  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  161 14:27:29.697401  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  162 14:27:29.698481  runner path: /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/1/tests/1_bootrr test_uuid 10607748_1.4.2.3.5
  163 14:27:29.698698  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  165 14:27:29.699096  Creating lava-test-runner.conf files
  166 14:27:29.699200  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/0 for stage 0
  167 14:27:29.699333  - 0_dmesg
  168 14:27:29.699481  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10607748/lava-overlay-yhb7u7iq/lava-10607748/1 for stage 1
  169 14:27:29.699619  - 1_bootrr
  170 14:27:29.699770  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  171 14:27:29.699902  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  172 14:27:29.712137  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  173 14:27:29.712288  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  174 14:27:29.712422  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  175 14:27:29.712553  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  176 14:27:29.712695  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  177 14:27:29.983229  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  178 14:27:29.983635  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  179 14:27:29.983770  extracting modules file /var/lib/lava/dispatcher/tmp/10607748/tftp-deploy-mm5ps2vh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10607748/extract-overlay-ramdisk-tt1ahrxw/ramdisk
  180 14:27:29.998147  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  181 14:27:29.998311  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  182 14:27:29.998419  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10607748/compress-overlay-ejo1e7pd/overlay-1.4.2.4.tar.gz to ramdisk
  183 14:27:29.998504  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10607748/compress-overlay-ejo1e7pd/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10607748/extract-overlay-ramdisk-tt1ahrxw/ramdisk
  184 14:27:30.008822  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  185 14:27:30.008979  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  186 14:27:30.009086  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  187 14:27:30.009189  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  188 14:27:30.009285  Building ramdisk /var/lib/lava/dispatcher/tmp/10607748/extract-overlay-ramdisk-tt1ahrxw/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10607748/extract-overlay-ramdisk-tt1ahrxw/ramdisk
  189 14:27:30.152462  >> 49788 blocks

  190 14:27:31.108387  rename /var/lib/lava/dispatcher/tmp/10607748/extract-overlay-ramdisk-tt1ahrxw/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10607748/tftp-deploy-mm5ps2vh/ramdisk/ramdisk.cpio.gz
  191 14:27:31.108893  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  192 14:27:31.109106  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  193 14:27:31.109278  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  194 14:27:31.109440  No mkimage arch provided, not using FIT.
  195 14:27:31.109608  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  196 14:27:31.109770  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  197 14:27:31.109960  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  198 14:27:31.110130  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  199 14:27:31.110284  No LXC device requested
  200 14:27:31.110421  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  201 14:27:31.110565  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  202 14:27:31.110699  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  203 14:27:31.110813  Checking files for TFTP limit of 4294967296 bytes.
  204 14:27:31.111405  end: 1 tftp-deploy (duration 00:00:02) [common]
  205 14:27:31.111573  start: 2 depthcharge-action (timeout 00:05:00) [common]
  206 14:27:31.111712  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  207 14:27:31.111898  substitutions:
  208 14:27:31.112006  - {DTB}: None
  209 14:27:31.112108  - {INITRD}: 10607748/tftp-deploy-mm5ps2vh/ramdisk/ramdisk.cpio.gz
  210 14:27:31.112204  - {KERNEL}: 10607748/tftp-deploy-mm5ps2vh/kernel/bzImage
  211 14:27:31.112301  - {LAVA_MAC}: None
  212 14:27:31.112397  - {PRESEED_CONFIG}: None
  213 14:27:31.112496  - {PRESEED_LOCAL}: None
  214 14:27:31.112612  - {RAMDISK}: 10607748/tftp-deploy-mm5ps2vh/ramdisk/ramdisk.cpio.gz
  215 14:27:31.112722  - {ROOT_PART}: None
  216 14:27:31.112832  - {ROOT}: None
  217 14:27:31.112950  - {SERVER_IP}: 192.168.201.1
  218 14:27:31.113067  - {TEE}: None
  219 14:27:31.113180  Parsed boot commands:
  220 14:27:31.113292  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  221 14:27:31.113602  Parsed boot commands: tftpboot 192.168.201.1 10607748/tftp-deploy-mm5ps2vh/kernel/bzImage 10607748/tftp-deploy-mm5ps2vh/kernel/cmdline 10607748/tftp-deploy-mm5ps2vh/ramdisk/ramdisk.cpio.gz
  222 14:27:31.113773  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  223 14:27:31.113941  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  224 14:27:31.114116  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  225 14:27:31.114277  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  226 14:27:31.114359  Not connected, no need to disconnect.
  227 14:27:31.114445  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  228 14:27:31.114538  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  229 14:27:31.114621  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-2'
  230 14:27:31.118413  Setting prompt string to ['lava-test: # ']
  231 14:27:31.118818  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  232 14:27:31.118939  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  233 14:27:31.119049  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  234 14:27:31.119151  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  235 14:27:31.119369  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-2' '--port=1' '--command=reboot'
  236 14:27:36.254998  >> Command sent successfully.

  237 14:27:36.257775  Returned 0 in 5 seconds
  238 14:27:36.358217  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  240 14:27:36.358621  end: 2.2.2 reset-device (duration 00:00:05) [common]
  241 14:27:36.358735  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  242 14:27:36.358839  Setting prompt string to 'Starting depthcharge on Magolor...'
  243 14:27:36.358915  Changing prompt to 'Starting depthcharge on Magolor...'
  244 14:27:36.358990  depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
  245 14:27:36.359269  [Enter `^Ec?' for help]

  246 14:27:37.527874  

  247 14:27:37.528049  

  248 14:27:37.538458  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...

  249 14:27:37.541757  CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz

  250 14:27:37.545633  CPU: ID 906c0, Jasperlake A0, ucode: 2400001f

  251 14:27:37.552023  CPU: AES supported, TXT NOT supported, VT supported

  252 14:27:37.555324  MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1

  253 14:27:37.562117  PCH: device id 4d87 (rev 01) is Jasperlake Super

  254 14:27:37.565321  IGD: device id 4e55 (rev 01) is Jasperlake GT4

  255 14:27:37.568496  VBOOT: Loading verstage.

  256 14:27:37.575663  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  257 14:27:37.578361  FMAP: base = 0xff000000 size = 0x1000000 #areas = 32

  258 14:27:37.582278  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  259 14:27:37.590059  CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec

  260 14:27:37.590163  

  261 14:27:37.590255  

  262 14:27:37.600178  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...

  263 14:27:37.616704  Probing TPM: . done!

  264 14:27:37.619983  TPM ready after 0 ms

  265 14:27:37.623107  Connected to device vid:did:rid of 1ae0:0028:00

  266 14:27:37.633731  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  267 14:27:37.641080  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  268 14:27:37.747808  Initialized TPM device CR50 revision 0

  269 14:27:37.757726  tlcl_send_startup: Startup return code is 0

  270 14:27:37.757903  TPM: setup succeeded

  271 14:27:37.773768  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  272 14:27:37.788059  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  273 14:27:37.799960  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  274 14:27:37.809471  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  275 14:27:37.813458  Chrome EC: UHEPI supported

  276 14:27:37.816102  Phase 1

  277 14:27:37.819986  FMAP: area GBB found @ c05000 (12288 bytes)

  278 14:27:37.826572  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  279 14:27:37.833682  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  280 14:27:37.836960  Recovery requested (1009000e)

  281 14:27:37.840419  TPM: Extending digest for VBOOT: boot mode into PCR 0

  282 14:27:37.852203  tlcl_extend: response is 0

  283 14:27:37.858720  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  284 14:27:37.868288  tlcl_extend: response is 0

  285 14:27:37.874725  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  286 14:27:37.878354  CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4

  287 14:27:37.885040  BS: verstage times (exec / console): total (unknown) / 124 ms

  288 14:27:37.885143  

  289 14:27:37.888181  

  290 14:27:37.898458  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...

  291 14:27:37.904645  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  292 14:27:37.907910  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  293 14:27:37.911878  gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000

  294 14:27:37.918611  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  295 14:27:37.921257  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  296 14:27:37.924417  gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000

  297 14:27:37.927843  TCO_STS:   0000 0001

  298 14:27:37.931847  GEN_PMCON: d0015038 00002200

  299 14:27:37.935193  GBLRST_CAUSE: 00000000 00000000

  300 14:27:37.935290  prev_sleep_state 5

  301 14:27:37.938981  Boot Count incremented to 3334

  302 14:27:37.945789  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  303 14:27:37.949154  CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000

  304 14:27:37.953061  Chrome EC: UHEPI supported

  305 14:27:37.959633  FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)

  306 14:27:37.965632  Probing TPM:  done!

  307 14:27:37.972822  Connected to device vid:did:rid of 1ae0:0028:00

  308 14:27:37.982353  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  309 14:27:37.990187  Initialized TPM device CR50 revision 0

  310 14:27:38.000610  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  311 14:27:38.006837  MRC: Hash idx 0x100b comparison successful.

  312 14:27:38.009992  MRC cache found, size 5458

  313 14:27:38.010092  bootmode is set to: 2

  314 14:27:38.013937  SPD INDEX = 0

  315 14:27:38.016662  CBFS: Found 'spd.bin' @0x40c40 size 0x600

  316 14:27:38.020250  SPD: module type is LPDDR4X

  317 14:27:38.026901  SPD: module part number is MT53E512M32D2NP-046 WT:E

  318 14:27:38.033286  SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb

  319 14:27:38.036617  SPD: device width 16 bits, bus width 32 bits

  320 14:27:38.039928  SPD: module size is 4096 MB (per channel)

  321 14:27:38.043840  meminit_channels: DRAM half-populated

  322 14:27:38.126384  CBMEM:

  323 14:27:38.129761  IMD: root @ 0x76fff000 254 entries.

  324 14:27:38.132963  IMD: root @ 0x76ffec00 62 entries.

  325 14:27:38.136793  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  326 14:27:38.143450  WARNING: RO_VPD is uninitialized or empty.

  327 14:27:38.146711  FMAP: area RW_VPD found @ bfc000 (8192 bytes)

  328 14:27:38.149992  External stage cache:

  329 14:27:38.153215  IMD: root @ 0x7b3ff000 254 entries.

  330 14:27:38.156595  IMD: root @ 0x7b3fec00 62 entries.

  331 14:27:38.166854  FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)

  332 14:27:38.173559  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  333 14:27:38.180105  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

  334 14:27:38.188581  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  335 14:27:38.195057  cse_lite: Skip switching to RW in the recovery path

  336 14:27:38.195182  1 DIMMs found

  337 14:27:38.195297  SMM Memory Map

  338 14:27:38.198167  SMRAM       : 0x7b000000 0x800000

  339 14:27:38.205149   Subregion 0: 0x7b000000 0x200000

  340 14:27:38.207909   Subregion 1: 0x7b200000 0x200000

  341 14:27:38.211817   Subregion 2: 0x7b400000 0x400000

  342 14:27:38.211915  top_of_ram = 0x77000000

  343 14:27:38.218326  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  344 14:27:38.224729  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  345 14:27:38.228004  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  346 14:27:38.234659  CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c

  347 14:27:38.237833  Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)

  348 14:27:38.250553  Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90

  349 14:27:38.253974  Processing 188 relocs. Offset value of 0x74c0e000

  350 14:27:38.264072  BS: romstage times (exec / console): total (unknown) / 255 ms

  351 14:27:38.267993  

  352 14:27:38.268094  

  353 14:27:38.277887  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...

  354 14:27:38.285079  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  355 14:27:38.288236  CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488

  356 14:27:38.294575  Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)

  357 14:27:38.350861  Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70

  358 14:27:38.357507  Processing 4805 relocs. Offset value of 0x75da8000

  359 14:27:38.360881  BS: postcar times (exec / console): total (unknown) / 42 ms

  360 14:27:38.364107  

  361 14:27:38.364202  

  362 14:27:38.373773  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...

  363 14:27:38.373872  Normal boot

  364 14:27:38.378471  EC returned error result code 3

  365 14:27:38.381841  FW_CONFIG value is 0x204

  366 14:27:38.385149  GENERIC: 0.0 disabled by fw_config

  367 14:27:38.391748  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  368 14:27:38.395041  I2C: 00:10 disabled by fw_config

  369 14:27:38.398811  I2C: 00:10 disabled by fw_config

  370 14:27:38.401936  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  371 14:27:38.408298  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  372 14:27:38.411963  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  373 14:27:38.418263  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  374 14:27:38.421758  fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED

  375 14:27:38.424822  I2C: 00:10 disabled by fw_config

  376 14:27:38.431436  fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED

  377 14:27:38.438549  fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED

  378 14:27:38.441761  I2C: 00:1a disabled by fw_config

  379 14:27:38.445136  I2C: 00:1a disabled by fw_config

  380 14:27:38.451676  fw_config match found: AUDIO_AMP=UNPROVISIONED

  381 14:27:38.454893  fw_config match found: AUDIO_AMP=UNPROVISIONED

  382 14:27:38.458162  GENERIC: 0.0 disabled by fw_config

  383 14:27:38.464885  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  384 14:27:38.468091  CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000

  385 14:27:38.474814  microcode: sig=0x906c0 pf=0x1 revision=0x2400001f

  386 14:27:38.478036  microcode: Update skipped, already up-to-date

  387 14:27:38.484646  CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906

  388 14:27:38.510667  Detected 2 core, 2 thread CPU.

  389 14:27:38.513789  Setting up SMI for CPU

  390 14:27:38.516926  IED base = 0x7b400000

  391 14:27:38.517050  IED size = 0x00400000

  392 14:27:38.520085  Will perform SMM setup.

  393 14:27:38.523825  CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.

  394 14:27:38.533520  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  395 14:27:38.537259  Processing 16 relocs. Offset value of 0x00030000

  396 14:27:38.540653  Attempting to start 1 APs

  397 14:27:38.543855  Waiting for 10ms after sending INIT.

  398 14:27:38.560583  Waiting for 1st SIPI to complete...done.

  399 14:27:38.563846  Waiting for 2nd SIPI to complete...done.

  400 14:27:38.567163  AP: slot 1 apic_id 2.

  401 14:27:38.573832  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  402 14:27:38.580401  Processing 13 relocs. Offset value of 0x00038000

  403 14:27:38.580500  Unable to locate Global NVS

  404 14:27:38.590139  SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)

  405 14:27:38.593630  Installing permanent SMM handler to 0x7b000000

  406 14:27:38.603473  Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10

  407 14:27:38.606674  Processing 704 relocs. Offset value of 0x7b010000

  408 14:27:38.614079  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  409 14:27:38.621157  Processing 13 relocs. Offset value of 0x7b008000

  410 14:27:38.624212  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  411 14:27:38.627921  Unable to locate Global NVS

  412 14:27:38.634159  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)

  413 14:27:38.637963  Clearing SMI status registers

  414 14:27:38.641648  SMI_STS: PM1 

  415 14:27:38.641745  PM1_STS: PWRBTN 

  416 14:27:38.644865  TCO_STS: INTRD_DET 

  417 14:27:38.644955  GPE0 STD STS: 

  418 14:27:38.654590  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  419 14:27:38.654719  In relocation handler: CPU 0

  420 14:27:38.661398  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  421 14:27:38.664695  Writing SMRR. base = 0x7b000006, mask=0xff800800

  422 14:27:38.667879  Relocation complete.

  423 14:27:38.674532  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  424 14:27:38.677881  In relocation handler: CPU 1

  425 14:27:38.681333  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  426 14:27:38.687877  Writing SMRR. base = 0x7b000006, mask=0xff800800

  427 14:27:38.687978  Relocation complete.

  428 14:27:38.691074  Initializing CPU #0

  429 14:27:38.694532  CPU: vendor Intel device 906c0

  430 14:27:38.697859  CPU: family 06, model 9c, stepping 00

  431 14:27:38.701215  Clearing out pending MCEs

  432 14:27:38.704511  Setting up local APIC...

  433 14:27:38.704607   apic_id: 0x00 done.

  434 14:27:38.707842  Turbo is available but hidden

  435 14:27:38.711085  Turbo is available and visible

  436 14:27:38.714316  microcode: Update skipped, already up-to-date

  437 14:27:38.717754  CPU #0 initialized

  438 14:27:38.720929  Initializing CPU #1

  439 14:27:38.724818  CPU: vendor Intel device 906c0

  440 14:27:38.727994  CPU: family 06, model 9c, stepping 00

  441 14:27:38.731203  Clearing out pending MCEs

  442 14:27:38.731297  Setting up local APIC...

  443 14:27:38.734521   apic_id: 0x02 done.

  444 14:27:38.737648  microcode: Update skipped, already up-to-date

  445 14:27:38.741404  CPU #1 initialized

  446 14:27:38.744448  bsp_do_flight_plan done after 177 msecs.

  447 14:27:38.747431  CPU: frequency set to 2800 MHz

  448 14:27:38.751350  Enabling SMIs.

  449 14:27:38.757803  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 289 ms

  450 14:27:38.766337  Probing TPM:  done!

  451 14:27:38.773161  Connected to device vid:did:rid of 1ae0:0028:00

  452 14:27:38.783136  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  453 14:27:38.786685  Initialized TPM device CR50 revision 0

  454 14:27:38.789914  CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc

  455 14:27:38.796473  Found a VBT of 7680 bytes after decompression

  456 14:27:38.802907  WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called

  457 14:27:38.838303  Detected 2 core, 2 thread CPU.

  458 14:27:38.841490  Detected 2 core, 2 thread CPU.

  459 14:27:39.205327  Display FSP Version Info HOB

  460 14:27:39.208492  Reference Code - CPU = 8.7.22.30

  461 14:27:39.212465  uCode Version = 24.0.0.1f

  462 14:27:39.215770  TXT ACM version = ff.ff.ff.ffff

  463 14:27:39.219164  Reference Code - ME = 8.7.22.30

  464 14:27:39.222512  MEBx version = 0.0.0.0

  465 14:27:39.225908  ME Firmware Version = Consumer SKU

  466 14:27:39.229229  Reference Code - PCH = 8.7.22.30

  467 14:27:39.229331  PCH-CRID Status = Disabled

  468 14:27:39.235866  PCH-CRID Original Value = ff.ff.ff.ffff

  469 14:27:39.239323  PCH-CRID New Value = ff.ff.ff.ffff

  470 14:27:39.242642  OPROM - RST - RAID = ff.ff.ff.ffff

  471 14:27:39.246107  PCH Hsio Version = 4.0.0.0

  472 14:27:39.249381  Reference Code - SA - System Agent = 8.7.22.30

  473 14:27:39.252717  Reference Code - MRC = 0.0.4.68

  474 14:27:39.256051  SA - PCIe Version = 8.7.22.30

  475 14:27:39.259331  SA-CRID Status = Disabled

  476 14:27:39.262485  SA-CRID Original Value = 0.0.0.0

  477 14:27:39.262586  SA-CRID New Value = 0.0.0.0

  478 14:27:39.265957  OPROM - VBIOS = ff.ff.ff.ffff

  479 14:27:39.272503  IO Manageability Engine FW Version = ff.ff.ff.ffff

  480 14:27:39.275764  PHY Build Version = ff.ff.ff.ffff

  481 14:27:39.278828  Thunderbolt(TM) FW Version = ff.ff.ff.ffff

  482 14:27:39.285900  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  483 14:27:39.289078  ITSS IRQ Polarities Before:

  484 14:27:39.289335  IPC0: 0xffffffff

  485 14:27:39.292690  IPC1: 0xffffffff

  486 14:27:39.292955  IPC2: 0xffffffff

  487 14:27:39.295830  IPC3: 0xffffffff

  488 14:27:39.299019  ITSS IRQ Polarities After:

  489 14:27:39.299248  IPC0: 0xffffffff

  490 14:27:39.303037  IPC1: 0xffffffff

  491 14:27:39.303367  IPC2: 0xffffffff

  492 14:27:39.306100  IPC3: 0xffffffff

  493 14:27:39.319301  pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.

  494 14:27:39.322605  BS: BS_DEV_INIT_CHIPS run times (exec / console): 405 / 156 ms

  495 14:27:39.325455  Enumerating buses...

  496 14:27:39.328861  Show all devs... Before device enumeration.

  497 14:27:39.332118  Root Device: enabled 1

  498 14:27:39.335999  CPU_CLUSTER: 0: enabled 1

  499 14:27:39.338684  DOMAIN: 0000: enabled 1

  500 14:27:39.339011  PCI: 00:00.0: enabled 1

  501 14:27:39.342909  PCI: 00:02.0: enabled 1

  502 14:27:39.345994  PCI: 00:04.0: enabled 1

  503 14:27:39.349286  PCI: 00:05.0: enabled 1

  504 14:27:39.349612  PCI: 00:09.0: enabled 0

  505 14:27:39.352609  PCI: 00:12.6: enabled 0

  506 14:27:39.356025  PCI: 00:14.0: enabled 1

  507 14:27:39.358755  PCI: 00:14.1: enabled 0

  508 14:27:39.359081  PCI: 00:14.2: enabled 0

  509 14:27:39.362098  PCI: 00:14.3: enabled 1

  510 14:27:39.365466  PCI: 00:14.5: enabled 1

  511 14:27:39.368673  PCI: 00:15.0: enabled 1

  512 14:27:39.369001  PCI: 00:15.1: enabled 1

  513 14:27:39.372108  PCI: 00:15.2: enabled 1

  514 14:27:39.375239  PCI: 00:15.3: enabled 1

  515 14:27:39.375582  PCI: 00:16.0: enabled 1

  516 14:27:39.378601  PCI: 00:16.1: enabled 0

  517 14:27:39.381982  PCI: 00:16.4: enabled 0

  518 14:27:39.385648  PCI: 00:16.5: enabled 0

  519 14:27:39.385979  PCI: 00:17.0: enabled 0

  520 14:27:39.388723  PCI: 00:19.0: enabled 1

  521 14:27:39.391733  PCI: 00:19.1: enabled 0

  522 14:27:39.395330  PCI: 00:19.2: enabled 1

  523 14:27:39.395693  PCI: 00:1a.0: enabled 1

  524 14:27:39.398457  PCI: 00:1c.0: enabled 0

  525 14:27:39.401764  PCI: 00:1c.1: enabled 0

  526 14:27:39.405269  PCI: 00:1c.2: enabled 0

  527 14:27:39.405606  PCI: 00:1c.3: enabled 0

  528 14:27:39.408551  PCI: 00:1c.4: enabled 0

  529 14:27:39.411685  PCI: 00:1c.5: enabled 0

  530 14:27:39.412022  PCI: 00:1c.6: enabled 0

  531 14:27:39.415336  PCI: 00:1c.7: enabled 1

  532 14:27:39.418557  PCI: 00:1e.0: enabled 0

  533 14:27:39.421689  PCI: 00:1e.1: enabled 0

  534 14:27:39.422026  PCI: 00:1e.2: enabled 1

  535 14:27:39.425410  PCI: 00:1e.3: enabled 0

  536 14:27:39.428644  PCI: 00:1f.0: enabled 1

  537 14:27:39.432133  PCI: 00:1f.1: enabled 1

  538 14:27:39.432468  PCI: 00:1f.2: enabled 1

  539 14:27:39.434896  PCI: 00:1f.3: enabled 1

  540 14:27:39.438222  PCI: 00:1f.4: enabled 0

  541 14:27:39.441497  PCI: 00:1f.5: enabled 1

  542 14:27:39.441832  PCI: 00:1f.7: enabled 0

  543 14:27:39.444883  GENERIC: 0.0: enabled 1

  544 14:27:39.448205  GENERIC: 0.0: enabled 1

  545 14:27:39.448561  USB0 port 0: enabled 1

  546 14:27:39.451413  GENERIC: 0.0: enabled 1

  547 14:27:39.454957  I2C: 00:2c: enabled 1

  548 14:27:39.458264  I2C: 00:15: enabled 1

  549 14:27:39.458728  GENERIC: 0.0: enabled 0

  550 14:27:39.461455  I2C: 00:15: enabled 1

  551 14:27:39.464813  I2C: 00:10: enabled 0

  552 14:27:39.465156  I2C: 00:10: enabled 0

  553 14:27:39.468213  I2C: 00:2c: enabled 1

  554 14:27:39.471321  I2C: 00:40: enabled 1

  555 14:27:39.471723  I2C: 00:10: enabled 1

  556 14:27:39.474449  I2C: 00:39: enabled 1

  557 14:27:39.477972  I2C: 00:36: enabled 1

  558 14:27:39.478363  I2C: 00:10: enabled 0

  559 14:27:39.481273  I2C: 00:0c: enabled 1

  560 14:27:39.484648  I2C: 00:50: enabled 1

  561 14:27:39.485049  I2C: 00:1a: enabled 1

  562 14:27:39.487847  I2C: 00:1a: enabled 0

  563 14:27:39.491019  I2C: 00:1a: enabled 0

  564 14:27:39.491397  I2C: 00:28: enabled 1

  565 14:27:39.494759  I2C: 00:29: enabled 1

  566 14:27:39.497843  PCI: 00:00.0: enabled 1

  567 14:27:39.498180  SPI: 00: enabled 1

  568 14:27:39.501126  PNP: 0c09.0: enabled 1

  569 14:27:39.504859  GENERIC: 0.0: enabled 0

  570 14:27:39.507626  USB2 port 0: enabled 1

  571 14:27:39.507958  USB2 port 1: enabled 1

  572 14:27:39.511245  USB2 port 2: enabled 1

  573 14:27:39.514223  USB2 port 3: enabled 1

  574 14:27:39.514573  USB2 port 4: enabled 0

  575 14:27:39.517919  USB2 port 5: enabled 1

  576 14:27:39.521046  USB2 port 6: enabled 0

  577 14:27:39.524197  USB2 port 7: enabled 1

  578 14:27:39.524531  USB3 port 0: enabled 1

  579 14:27:39.528062  USB3 port 1: enabled 1

  580 14:27:39.531225  USB3 port 2: enabled 1

  581 14:27:39.531683  USB3 port 3: enabled 1

  582 14:27:39.534072  APIC: 00: enabled 1

  583 14:27:39.537370  APIC: 02: enabled 1

  584 14:27:39.537770  Compare with tree...

  585 14:27:39.540617  Root Device: enabled 1

  586 14:27:39.543957   CPU_CLUSTER: 0: enabled 1

  587 14:27:39.544309    APIC: 00: enabled 1

  588 14:27:39.547181    APIC: 02: enabled 1

  589 14:27:39.551090   DOMAIN: 0000: enabled 1

  590 14:27:39.554146    PCI: 00:00.0: enabled 1

  591 14:27:39.554390    PCI: 00:02.0: enabled 1

  592 14:27:39.557531    PCI: 00:04.0: enabled 1

  593 14:27:39.560898     GENERIC: 0.0: enabled 1

  594 14:27:39.564134    PCI: 00:05.0: enabled 1

  595 14:27:39.567430     GENERIC: 0.0: enabled 1

  596 14:27:39.567580    PCI: 00:09.0: enabled 0

  597 14:27:39.570806    PCI: 00:12.6: enabled 0

  598 14:27:39.574156    PCI: 00:14.0: enabled 1

  599 14:27:39.577411     USB0 port 0: enabled 1

  600 14:27:39.580852      USB2 port 0: enabled 1

  601 14:27:39.583457      USB2 port 1: enabled 1

  602 14:27:39.583604      USB2 port 2: enabled 1

  603 14:27:39.587419      USB2 port 3: enabled 1

  604 14:27:39.590234      USB2 port 4: enabled 0

  605 14:27:39.593534      USB2 port 5: enabled 1

  606 14:27:39.596803      USB2 port 6: enabled 0

  607 14:27:39.596941      USB2 port 7: enabled 1

  608 14:27:39.600743      USB3 port 0: enabled 1

  609 14:27:39.603801      USB3 port 1: enabled 1

  610 14:27:39.606928      USB3 port 2: enabled 1

  611 14:27:39.610600      USB3 port 3: enabled 1

  612 14:27:39.610729    PCI: 00:14.1: enabled 0

  613 14:27:39.613732    PCI: 00:14.2: enabled 0

  614 14:27:39.616859    PCI: 00:14.3: enabled 1

  615 14:27:39.620578     GENERIC: 0.0: enabled 1

  616 14:27:39.623715    PCI: 00:14.5: enabled 1

  617 14:27:39.623846    PCI: 00:15.0: enabled 1

  618 14:27:39.626884     I2C: 00:2c: enabled 1

  619 14:27:39.629926     I2C: 00:15: enabled 1

  620 14:27:39.633782    PCI: 00:15.1: enabled 1

  621 14:27:39.637059    PCI: 00:15.2: enabled 1

  622 14:27:39.637188     GENERIC: 0.0: enabled 0

  623 14:27:39.640102     I2C: 00:15: enabled 1

  624 14:27:39.643801     I2C: 00:10: enabled 0

  625 14:27:39.647129     I2C: 00:10: enabled 0

  626 14:27:39.647256     I2C: 00:2c: enabled 1

  627 14:27:39.650463     I2C: 00:40: enabled 1

  628 14:27:39.653817     I2C: 00:10: enabled 1

  629 14:27:39.657115     I2C: 00:39: enabled 1

  630 14:27:39.660367    PCI: 00:15.3: enabled 1

  631 14:27:39.660495     I2C: 00:36: enabled 1

  632 14:27:39.663781     I2C: 00:10: enabled 0

  633 14:27:39.667205     I2C: 00:0c: enabled 1

  634 14:27:39.670464     I2C: 00:50: enabled 1

  635 14:27:39.670592    PCI: 00:16.0: enabled 1

  636 14:27:39.673939    PCI: 00:16.1: enabled 0

  637 14:27:39.676601    PCI: 00:16.4: enabled 0

  638 14:27:39.679826    PCI: 00:16.5: enabled 0

  639 14:27:39.683202    PCI: 00:17.0: enabled 0

  640 14:27:39.683332    PCI: 00:19.0: enabled 1

  641 14:27:39.686599     I2C: 00:1a: enabled 1

  642 14:27:39.689925     I2C: 00:1a: enabled 0

  643 14:27:39.693254     I2C: 00:1a: enabled 0

  644 14:27:39.693383     I2C: 00:28: enabled 1

  645 14:27:39.696637     I2C: 00:29: enabled 1

  646 14:27:39.699805    PCI: 00:19.1: enabled 0

  647 14:27:39.703777    PCI: 00:19.2: enabled 1

  648 14:27:39.703907    PCI: 00:1a.0: enabled 1

  649 14:27:39.707120    PCI: 00:1e.0: enabled 0

  650 14:27:39.709768    PCI: 00:1e.1: enabled 0

  651 14:27:39.713575    PCI: 00:1e.2: enabled 1

  652 14:27:39.716686     SPI: 00: enabled 1

  653 14:27:39.716814    PCI: 00:1e.3: enabled 0

  654 14:27:39.719815    PCI: 00:1f.0: enabled 1

  655 14:27:39.722997     PNP: 0c09.0: enabled 1

  656 14:27:39.726805    PCI: 00:1f.1: enabled 1

  657 14:27:39.730036    PCI: 00:1f.2: enabled 1

  658 14:27:39.730165    PCI: 00:1f.3: enabled 1

  659 14:27:39.733353     GENERIC: 0.0: enabled 0

  660 14:27:39.736520    PCI: 00:1f.4: enabled 0

  661 14:27:39.739866    PCI: 00:1f.5: enabled 1

  662 14:27:39.739997    PCI: 00:1f.7: enabled 0

  663 14:27:39.743083  Root Device scanning...

  664 14:27:39.746846  scan_static_bus for Root Device

  665 14:27:39.749915  CPU_CLUSTER: 0 enabled

  666 14:27:39.753159  DOMAIN: 0000 enabled

  667 14:27:39.753286  DOMAIN: 0000 scanning...

  668 14:27:39.756823  PCI: pci_scan_bus for bus 00

  669 14:27:39.760038  PCI: 00:00.0 [8086/0000] ops

  670 14:27:39.763311  PCI: 00:00.0 [8086/4e22] enabled

  671 14:27:39.766662  PCI: 00:02.0 [8086/0000] bus ops

  672 14:27:39.770001  PCI: 00:02.0 [8086/4e55] enabled

  673 14:27:39.773379  PCI: 00:04.0 [8086/0000] bus ops

  674 14:27:39.776769  PCI: 00:04.0 [8086/4e03] enabled

  675 14:27:39.780160  PCI: 00:05.0 [8086/0000] bus ops

  676 14:27:39.783376  PCI: 00:05.0 [8086/4e19] enabled

  677 14:27:39.786670  PCI: 00:08.0 [8086/4e11] enabled

  678 14:27:39.790117  PCI: 00:14.0 [8086/0000] bus ops

  679 14:27:39.793431  PCI: 00:14.0 [8086/4ded] enabled

  680 14:27:39.796807  PCI: 00:14.2 [8086/4def] disabled

  681 14:27:39.800123  PCI: 00:14.3 [8086/0000] bus ops

  682 14:27:39.803511  PCI: 00:14.3 [8086/4df0] enabled

  683 14:27:39.806793  PCI: 00:14.5 [8086/0000] ops

  684 14:27:39.809446  PCI: 00:14.5 [8086/4df8] enabled

  685 14:27:39.812759  PCI: 00:15.0 [8086/0000] bus ops

  686 14:27:39.816084  PCI: 00:15.0 [8086/4de8] enabled

  687 14:27:39.819938  PCI: 00:15.1 [8086/0000] bus ops

  688 14:27:39.822972  PCI: 00:15.1 [8086/4de9] enabled

  689 14:27:39.826601  PCI: 00:15.2 [8086/0000] bus ops

  690 14:27:39.829628  PCI: 00:15.2 [8086/4dea] enabled

  691 14:27:39.833127  PCI: 00:15.3 [8086/0000] bus ops

  692 14:27:39.836400  PCI: 00:15.3 [8086/4deb] enabled

  693 14:27:39.839357  PCI: 00:16.0 [8086/0000] ops

  694 14:27:39.842679  PCI: 00:16.0 [8086/4de0] enabled

  695 14:27:39.846399  PCI: 00:19.0 [8086/0000] bus ops

  696 14:27:39.849790  PCI: 00:19.0 [8086/4dc5] enabled

  697 14:27:39.852941  PCI: 00:19.2 [8086/0000] ops

  698 14:27:39.856267  PCI: 00:19.2 [8086/4dc7] enabled

  699 14:27:39.859333  PCI: 00:1a.0 [8086/0000] ops

  700 14:27:39.862641  PCI: 00:1a.0 [8086/4dc4] enabled

  701 14:27:39.865760  PCI: 00:1e.0 [8086/0000] ops

  702 14:27:39.869602  PCI: 00:1e.0 [8086/4da8] disabled

  703 14:27:39.873554  PCI: 00:1e.2 [8086/0000] bus ops

  704 14:27:39.873685  PCI: 00:1e.2 [8086/4daa] enabled

  705 14:27:39.877603  PCI: 00:1f.0 [8086/0000] bus ops

  706 14:27:39.881042  PCI: 00:1f.0 [8086/4d87] enabled

  707 14:27:39.887100  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  708 14:27:39.887235  RTC Init

  709 14:27:39.890333  Set power on after power failure.

  710 14:27:39.893660  Disabling Deep S3

  711 14:27:39.893790  Disabling Deep S3

  712 14:27:39.897571  Disabling Deep S4

  713 14:27:39.900272  Disabling Deep S4

  714 14:27:39.900399  Disabling Deep S5

  715 14:27:39.903684  Disabling Deep S5

  716 14:27:39.906832  PCI: 00:1f.2 [0000/0000] hidden

  717 14:27:39.910221  PCI: 00:1f.3 [8086/0000] bus ops

  718 14:27:39.913491  PCI: 00:1f.3 [8086/4dc8] enabled

  719 14:27:39.916979  PCI: 00:1f.5 [8086/0000] bus ops

  720 14:27:39.920201  PCI: 00:1f.5 [8086/4da4] enabled

  721 14:27:39.924113  PCI: Leftover static devices:

  722 14:27:39.924241  PCI: 00:12.6

  723 14:27:39.924358  PCI: 00:09.0

  724 14:27:39.927293  PCI: 00:14.1

  725 14:27:39.927420  PCI: 00:16.1

  726 14:27:39.930365  PCI: 00:16.4

  727 14:27:39.930494  PCI: 00:16.5

  728 14:27:39.930612  PCI: 00:17.0

  729 14:27:39.933367  PCI: 00:19.1

  730 14:27:39.933496  PCI: 00:1e.1

  731 14:27:39.937102  PCI: 00:1e.3

  732 14:27:39.937232  PCI: 00:1f.1

  733 14:27:39.940322  PCI: 00:1f.4

  734 14:27:39.940449  PCI: 00:1f.7

  735 14:27:39.943527  PCI: Check your devicetree.cb.

  736 14:27:39.946792  PCI: 00:02.0 scanning...

  737 14:27:39.950651  scan_generic_bus for PCI: 00:02.0

  738 14:27:39.953752  scan_generic_bus for PCI: 00:02.0 done

  739 14:27:39.956805  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  740 14:27:39.960162  PCI: 00:04.0 scanning...

  741 14:27:39.963565  scan_generic_bus for PCI: 00:04.0

  742 14:27:39.966813  GENERIC: 0.0 enabled

  743 14:27:39.973317  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  744 14:27:39.977042  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  745 14:27:39.980410  PCI: 00:05.0 scanning...

  746 14:27:39.983212  scan_generic_bus for PCI: 00:05.0

  747 14:27:39.987110  GENERIC: 0.0 enabled

  748 14:27:39.989871  bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done

  749 14:27:39.996745  scan_bus: bus PCI: 00:05.0 finished in 11 msecs

  750 14:27:40.000186  PCI: 00:14.0 scanning...

  751 14:27:40.003365  scan_static_bus for PCI: 00:14.0

  752 14:27:40.003502  USB0 port 0 enabled

  753 14:27:40.006869  USB0 port 0 scanning...

  754 14:27:40.010179  scan_static_bus for USB0 port 0

  755 14:27:40.013335  USB2 port 0 enabled

  756 14:27:40.013465  USB2 port 1 enabled

  757 14:27:40.016504  USB2 port 2 enabled

  758 14:27:40.019760  USB2 port 3 enabled

  759 14:27:40.019888  USB2 port 4 disabled

  760 14:27:40.023121  USB2 port 5 enabled

  761 14:27:40.023249  USB2 port 6 disabled

  762 14:27:40.026436  USB2 port 7 enabled

  763 14:27:40.029852  USB3 port 0 enabled

  764 14:27:40.029981  USB3 port 1 enabled

  765 14:27:40.033050  USB3 port 2 enabled

  766 14:27:40.036169  USB3 port 3 enabled

  767 14:27:40.036296  USB2 port 0 scanning...

  768 14:27:40.039267  scan_static_bus for USB2 port 0

  769 14:27:40.043092  scan_static_bus for USB2 port 0 done

  770 14:27:40.049355  scan_bus: bus USB2 port 0 finished in 6 msecs

  771 14:27:40.052388  USB2 port 1 scanning...

  772 14:27:40.056205  scan_static_bus for USB2 port 1

  773 14:27:40.059346  scan_static_bus for USB2 port 1 done

  774 14:27:40.062482  scan_bus: bus USB2 port 1 finished in 6 msecs

  775 14:27:40.065694  USB2 port 2 scanning...

  776 14:27:40.068949  scan_static_bus for USB2 port 2

  777 14:27:40.072850  scan_static_bus for USB2 port 2 done

  778 14:27:40.076119  scan_bus: bus USB2 port 2 finished in 6 msecs

  779 14:27:40.079324  USB2 port 3 scanning...

  780 14:27:40.082567  scan_static_bus for USB2 port 3

  781 14:27:40.085650  scan_static_bus for USB2 port 3 done

  782 14:27:40.092454  scan_bus: bus USB2 port 3 finished in 6 msecs

  783 14:27:40.092591  USB2 port 5 scanning...

  784 14:27:40.095736  scan_static_bus for USB2 port 5

  785 14:27:40.099082  scan_static_bus for USB2 port 5 done

  786 14:27:40.105710  scan_bus: bus USB2 port 5 finished in 6 msecs

  787 14:27:40.109200  USB2 port 7 scanning...

  788 14:27:40.112532  scan_static_bus for USB2 port 7

  789 14:27:40.115834  scan_static_bus for USB2 port 7 done

  790 14:27:40.119197  scan_bus: bus USB2 port 7 finished in 6 msecs

  791 14:27:40.122439  USB3 port 0 scanning...

  792 14:27:40.125879  scan_static_bus for USB3 port 0

  793 14:27:40.128534  scan_static_bus for USB3 port 0 done

  794 14:27:40.131938  scan_bus: bus USB3 port 0 finished in 6 msecs

  795 14:27:40.135127  USB3 port 1 scanning...

  796 14:27:40.138974  scan_static_bus for USB3 port 1

  797 14:27:40.142309  scan_static_bus for USB3 port 1 done

  798 14:27:40.148793  scan_bus: bus USB3 port 1 finished in 6 msecs

  799 14:27:40.148932  USB3 port 2 scanning...

  800 14:27:40.151975  scan_static_bus for USB3 port 2

  801 14:27:40.158362  scan_static_bus for USB3 port 2 done

  802 14:27:40.161717  scan_bus: bus USB3 port 2 finished in 6 msecs

  803 14:27:40.165443  USB3 port 3 scanning...

  804 14:27:40.168612  scan_static_bus for USB3 port 3

  805 14:27:40.171733  scan_static_bus for USB3 port 3 done

  806 14:27:40.175062  scan_bus: bus USB3 port 3 finished in 6 msecs

  807 14:27:40.178368  scan_static_bus for USB0 port 0 done

  808 14:27:40.184801  scan_bus: bus USB0 port 0 finished in 172 msecs

  809 14:27:40.188127  scan_static_bus for PCI: 00:14.0 done

  810 14:27:40.191228  scan_bus: bus PCI: 00:14.0 finished in 189 msecs

  811 14:27:40.195075  PCI: 00:14.3 scanning...

  812 14:27:40.198401  scan_static_bus for PCI: 00:14.3

  813 14:27:40.201594  GENERIC: 0.0 enabled

  814 14:27:40.205050  scan_static_bus for PCI: 00:14.3 done

  815 14:27:40.208357  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  816 14:27:40.211096  PCI: 00:15.0 scanning...

  817 14:27:40.214477  scan_static_bus for PCI: 00:15.0

  818 14:27:40.217862  I2C: 00:2c enabled

  819 14:27:40.217997  I2C: 00:15 enabled

  820 14:27:40.224932  scan_static_bus for PCI: 00:15.0 done

  821 14:27:40.228345  scan_bus: bus PCI: 00:15.0 finished in 11 msecs

  822 14:27:40.231060  PCI: 00:15.1 scanning...

  823 14:27:40.235061  scan_static_bus for PCI: 00:15.1

  824 14:27:40.237731  scan_static_bus for PCI: 00:15.1 done

  825 14:27:40.241032  scan_bus: bus PCI: 00:15.1 finished in 7 msecs

  826 14:27:40.244972  PCI: 00:15.2 scanning...

  827 14:27:40.247598  scan_static_bus for PCI: 00:15.2

  828 14:27:40.251377  GENERIC: 0.0 disabled

  829 14:27:40.251523  I2C: 00:15 enabled

  830 14:27:40.254378  I2C: 00:10 disabled

  831 14:27:40.258131  I2C: 00:10 disabled

  832 14:27:40.258268  I2C: 00:2c enabled

  833 14:27:40.261401  I2C: 00:40 enabled

  834 14:27:40.261533  I2C: 00:10 enabled

  835 14:27:40.264695  I2C: 00:39 enabled

  836 14:27:40.268024  scan_static_bus for PCI: 00:15.2 done

  837 14:27:40.274313  scan_bus: bus PCI: 00:15.2 finished in 23 msecs

  838 14:27:40.274452  PCI: 00:15.3 scanning...

  839 14:27:40.278022  scan_static_bus for PCI: 00:15.3

  840 14:27:40.281259  I2C: 00:36 enabled

  841 14:27:40.284608  I2C: 00:10 disabled

  842 14:27:40.284740  I2C: 00:0c enabled

  843 14:27:40.287915  I2C: 00:50 enabled

  844 14:27:40.291185  scan_static_bus for PCI: 00:15.3 done

  845 14:27:40.294394  scan_bus: bus PCI: 00:15.3 finished in 14 msecs

  846 14:27:40.297687  PCI: 00:19.0 scanning...

  847 14:27:40.301027  scan_static_bus for PCI: 00:19.0

  848 14:27:40.304294  I2C: 00:1a enabled

  849 14:27:40.304398  I2C: 00:1a disabled

  850 14:27:40.307677  I2C: 00:1a disabled

  851 14:27:40.310954  I2C: 00:28 enabled

  852 14:27:40.311049  I2C: 00:29 enabled

  853 14:27:40.314241  scan_static_bus for PCI: 00:19.0 done

  854 14:27:40.321010  scan_bus: bus PCI: 00:19.0 finished in 17 msecs

  855 14:27:40.324221  PCI: 00:1e.2 scanning...

  856 14:27:40.327467  scan_generic_bus for PCI: 00:1e.2

  857 14:27:40.327561  SPI: 00 enabled

  858 14:27:40.334098  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

  859 14:27:40.337565  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

  860 14:27:40.341012  PCI: 00:1f.0 scanning...

  861 14:27:40.344309  scan_static_bus for PCI: 00:1f.0

  862 14:27:40.347414  PNP: 0c09.0 enabled

  863 14:27:40.350773  PNP: 0c09.0 scanning...

  864 14:27:40.354105  scan_static_bus for PNP: 0c09.0

  865 14:27:40.357357  scan_static_bus for PNP: 0c09.0 done

  866 14:27:40.360523  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

  867 14:27:40.364084  scan_static_bus for PCI: 00:1f.0 done

  868 14:27:40.370794  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

  869 14:27:40.370914  PCI: 00:1f.3 scanning...

  870 14:27:40.373821  scan_static_bus for PCI: 00:1f.3

  871 14:27:40.377032  GENERIC: 0.0 disabled

  872 14:27:40.380736  scan_static_bus for PCI: 00:1f.3 done

  873 14:27:40.387022  scan_bus: bus PCI: 00:1f.3 finished in 9 msecs

  874 14:27:40.387116  PCI: 00:1f.5 scanning...

  875 14:27:40.394223  scan_generic_bus for PCI: 00:1f.5

  876 14:27:40.397444  scan_generic_bus for PCI: 00:1f.5 done

  877 14:27:40.400593  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

  878 14:27:40.407389  scan_bus: bus DOMAIN: 0000 finished in 646 msecs

  879 14:27:40.410737  scan_static_bus for Root Device done

  880 14:27:40.414012  scan_bus: bus Root Device finished in 665 msecs

  881 14:27:40.414111  done

  882 14:27:40.420782  BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1085 ms

  883 14:27:40.424096  Chrome EC: UHEPI supported

  884 14:27:40.430721  FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)

  885 14:27:40.437547  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

  886 14:27:40.440217  SPI flash protection: WPSW=0 SRP0=1

  887 14:27:40.443624  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

  888 14:27:40.450802  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

  889 14:27:40.454776  found VGA at PCI: 00:02.0

  890 14:27:40.458082  Setting up VGA for PCI: 00:02.0

  891 14:27:40.461385  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

  892 14:27:40.464840  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

  893 14:27:40.469320  Allocating resources...

  894 14:27:40.472390  Reading resources...

  895 14:27:40.475568  Root Device read_resources bus 0 link: 0

  896 14:27:40.479331  CPU_CLUSTER: 0 read_resources bus 0 link: 0

  897 14:27:40.538275  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

  898 14:27:40.538459  DOMAIN: 0000 read_resources bus 0 link: 0

  899 14:27:40.538747  PCI: 00:04.0 read_resources bus 1 link: 0

  900 14:27:40.538824  PCI: 00:04.0 read_resources bus 1 link: 0 done

  901 14:27:40.538895  PCI: 00:05.0 read_resources bus 2 link: 0

  902 14:27:40.538963  PCI: 00:05.0 read_resources bus 2 link: 0 done

  903 14:27:40.539041  PCI: 00:14.0 read_resources bus 0 link: 0

  904 14:27:40.539126  USB0 port 0 read_resources bus 0 link: 0

  905 14:27:40.539239  USB0 port 0 read_resources bus 0 link: 0 done

  906 14:27:40.539339  PCI: 00:14.0 read_resources bus 0 link: 0 done

  907 14:27:40.539459  PCI: 00:14.3 read_resources bus 0 link: 0

  908 14:27:40.539535  PCI: 00:14.3 read_resources bus 0 link: 0 done

  909 14:27:40.593817  PCI: 00:15.0 read_resources bus 0 link: 0

  910 14:27:40.594176  PCI: 00:15.0 read_resources bus 0 link: 0 done

  911 14:27:40.594294  PCI: 00:15.2 read_resources bus 0 link: 0

  912 14:27:40.594397  PCI: 00:15.2 read_resources bus 0 link: 0 done

  913 14:27:40.594508  PCI: 00:15.3 read_resources bus 0 link: 0

  914 14:27:40.594606  PCI: 00:15.3 read_resources bus 0 link: 0 done

  915 14:27:40.594676  PCI: 00:19.0 read_resources bus 0 link: 0

  916 14:27:40.594742  PCI: 00:19.0 read_resources bus 0 link: 0 done

  917 14:27:40.595056  PCI: 00:1e.2 read_resources bus 3 link: 0

  918 14:27:40.595131  PCI: 00:1e.2 read_resources bus 3 link: 0 done

  919 14:27:40.595428  PCI: 00:1f.0 read_resources bus 0 link: 0

  920 14:27:40.610061  PCI: 00:1f.0 read_resources bus 0 link: 0 done

  921 14:27:40.610340  PCI: 00:1f.3 read_resources bus 0 link: 0

  922 14:27:40.610430  PCI: 00:1f.3 read_resources bus 0 link: 0 done

  923 14:27:40.613818  DOMAIN: 0000 read_resources bus 0 link: 0 done

  924 14:27:40.617030  Root Device read_resources bus 0 link: 0 done

  925 14:27:40.620141  Done reading resources.

  926 14:27:40.627011  Show resources in subtree (Root Device)...After reading.

  927 14:27:40.630372   Root Device child on link 0 CPU_CLUSTER: 0

  928 14:27:40.633791    CPU_CLUSTER: 0 child on link 0 APIC: 00

  929 14:27:40.636928     APIC: 00

  930 14:27:40.637020     APIC: 02

  931 14:27:40.640177    DOMAIN: 0000 child on link 0 PCI: 00:00.0

  932 14:27:40.650374    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

  933 14:27:40.660307    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

  934 14:27:40.663005     PCI: 00:00.0

  935 14:27:40.673009     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

  936 14:27:40.679712     PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

  937 14:27:40.689862     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

  938 14:27:40.699793     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

  939 14:27:40.709930     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

  940 14:27:40.719953     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

  941 14:27:40.725961     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

  942 14:27:40.735857     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

  943 14:27:40.745799     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

  944 14:27:40.755860     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

  945 14:27:40.766329     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

  946 14:27:40.772903     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

  947 14:27:40.782942     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

  948 14:27:40.792704     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

  949 14:27:40.802568     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

  950 14:27:40.812691     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

  951 14:27:40.822076     PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10

  952 14:27:40.828573     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

  953 14:27:40.838808     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

  954 14:27:40.841986     PCI: 00:02.0

  955 14:27:40.852189     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

  956 14:27:40.862188     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

  957 14:27:40.871848     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

  958 14:27:40.875183     PCI: 00:04.0 child on link 0 GENERIC: 0.0

  959 14:27:40.885112     PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

  960 14:27:40.885207      GENERIC: 0.0

  961 14:27:40.891755     PCI: 00:05.0 child on link 0 GENERIC: 0.0

  962 14:27:40.901859     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

  963 14:27:40.901955      GENERIC: 0.0

  964 14:27:40.905121     PCI: 00:08.0

  965 14:27:40.914782     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  966 14:27:40.918354     PCI: 00:14.0 child on link 0 USB0 port 0

  967 14:27:40.928556     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

  968 14:27:40.935100      USB0 port 0 child on link 0 USB2 port 0

  969 14:27:40.935194       USB2 port 0

  970 14:27:40.938198       USB2 port 1

  971 14:27:40.938292       USB2 port 2

  972 14:27:40.941369       USB2 port 3

  973 14:27:40.941463       USB2 port 4

  974 14:27:40.944475       USB2 port 5

  975 14:27:40.944568       USB2 port 6

  976 14:27:40.948326       USB2 port 7

  977 14:27:40.948419       USB3 port 0

  978 14:27:40.951556       USB3 port 1

  979 14:27:40.951649       USB3 port 2

  980 14:27:40.954872       USB3 port 3

  981 14:27:40.954965     PCI: 00:14.2

  982 14:27:40.961423     PCI: 00:14.3 child on link 0 GENERIC: 0.0

  983 14:27:40.971379     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

  984 14:27:40.971500      GENERIC: 0.0

  985 14:27:40.974546     PCI: 00:14.5

  986 14:27:40.984481     PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  987 14:27:40.987796     PCI: 00:15.0 child on link 0 I2C: 00:2c

  988 14:27:40.997857     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  989 14:27:41.001022      I2C: 00:2c

  990 14:27:41.001143      I2C: 00:15

  991 14:27:41.001221     PCI: 00:15.1

  992 14:27:41.010903     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  993 14:27:41.017670     PCI: 00:15.2 child on link 0 GENERIC: 0.0

  994 14:27:41.027762     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  995 14:27:41.027857      GENERIC: 0.0

  996 14:27:41.030764      I2C: 00:15

  997 14:27:41.030857      I2C: 00:10

  998 14:27:41.034421      I2C: 00:10

  999 14:27:41.034514      I2C: 00:2c

 1000 14:27:41.037458      I2C: 00:40

 1001 14:27:41.037550      I2C: 00:10

 1002 14:27:41.040785      I2C: 00:39

 1003 14:27:41.044061     PCI: 00:15.3 child on link 0 I2C: 00:36

 1004 14:27:41.054176     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1005 14:27:41.054271      I2C: 00:36

 1006 14:27:41.057474      I2C: 00:10

 1007 14:27:41.057566      I2C: 00:0c

 1008 14:27:41.060799      I2C: 00:50

 1009 14:27:41.060897     PCI: 00:16.0

 1010 14:27:41.070844     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1011 14:27:41.077454     PCI: 00:19.0 child on link 0 I2C: 00:1a

 1012 14:27:41.087438     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1013 14:27:41.087540      I2C: 00:1a

 1014 14:27:41.090791      I2C: 00:1a

 1015 14:27:41.090885      I2C: 00:1a

 1016 14:27:41.090957      I2C: 00:28

 1017 14:27:41.094144      I2C: 00:29

 1018 14:27:41.094236     PCI: 00:19.2

 1019 14:27:41.107411     PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1020 14:27:41.116949     PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1021 14:27:41.117043     PCI: 00:1a.0

 1022 14:27:41.127048     PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1023 14:27:41.130754     PCI: 00:1e.0

 1024 14:27:41.134467     PCI: 00:1e.2 child on link 0 SPI: 00

 1025 14:27:41.144947     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1026 14:27:41.145050      SPI: 00

 1027 14:27:41.148791     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1028 14:27:41.158500     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1029 14:27:41.158595      PNP: 0c09.0

 1030 14:27:41.168125      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1031 14:27:41.171794     PCI: 00:1f.2

 1032 14:27:41.178359     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1033 14:27:41.188386     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1

 1034 14:27:41.191805     PCI: 00:1f.3 child on link 0 GENERIC: 0.0

 1035 14:27:41.201878     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1036 14:27:41.211804     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1037 14:27:41.215137      GENERIC: 0.0

 1038 14:27:41.218528     PCI: 00:1f.5

 1039 14:27:41.225049     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1040 14:27:41.234915  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1041 14:27:41.241272  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1042 14:27:41.247961  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1043 14:27:41.254588   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1044 14:27:41.261245   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1045 14:27:41.268046   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1046 14:27:41.271042   DOMAIN: 0000: Resource ranges:

 1047 14:27:41.277877   * Base: 1000, Size: 800, Tag: 100

 1048 14:27:41.281120   * Base: 1900, Size: e700, Tag: 100

 1049 14:27:41.284234    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1050 14:27:41.291178  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1051 14:27:41.297805  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1052 14:27:41.307210   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1053 14:27:41.313843   update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)

 1054 14:27:41.320614   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1055 14:27:41.330598   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1056 14:27:41.337602   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1057 14:27:41.343646   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1058 14:27:41.353895   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1059 14:27:41.360236   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1060 14:27:41.367180   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1061 14:27:41.376781   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1062 14:27:41.383584   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1063 14:27:41.390151   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1064 14:27:41.396838   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1065 14:27:41.406685   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1066 14:27:41.413419   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1067 14:27:41.420132   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1068 14:27:41.430181   update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)

 1069 14:27:41.436904   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1070 14:27:41.443471   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1071 14:27:41.452804   update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)

 1072 14:27:41.459380   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1073 14:27:41.463244   DOMAIN: 0000: Resource ranges:

 1074 14:27:41.466604   * Base: 7fc00000, Size: 40400000, Tag: 200

 1075 14:27:41.472748   * Base: d0000000, Size: 2b000000, Tag: 200

 1076 14:27:41.476412   * Base: fb001000, Size: 2fff000, Tag: 200

 1077 14:27:41.479591   * Base: fe010000, Size: 22000, Tag: 200

 1078 14:27:41.482744   * Base: fe033000, Size: a4d000, Tag: 200

 1079 14:27:41.489583   * Base: fea88000, Size: 2f8000, Tag: 200

 1080 14:27:41.492668   * Base: fed88000, Size: 8000, Tag: 200

 1081 14:27:41.496450   * Base: fed93000, Size: d000, Tag: 200

 1082 14:27:41.499525   * Base: feda2000, Size: 125e000, Tag: 200

 1083 14:27:41.506351   * Base: 180400000, Size: 7e7fc00000, Tag: 100200

 1084 14:27:41.513028    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1085 14:27:41.519414    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1086 14:27:41.526283    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1087 14:27:41.533068    PCI: 00:1f.3 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1088 14:27:41.539386    PCI: 00:04.0 10 *  [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem

 1089 14:27:41.546163    PCI: 00:14.0 10 *  [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem

 1090 14:27:41.552906    PCI: 00:14.3 10 *  [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem

 1091 14:27:41.558957    PCI: 00:1f.3 10 *  [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem

 1092 14:27:41.565526    PCI: 00:08.0 10 *  [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem

 1093 14:27:41.572267    PCI: 00:14.5 10 *  [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem

 1094 14:27:41.579164    PCI: 00:15.0 10 *  [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem

 1095 14:27:41.585322    PCI: 00:15.1 10 *  [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem

 1096 14:27:41.592118    PCI: 00:15.2 10 *  [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem

 1097 14:27:41.599153    PCI: 00:15.3 10 *  [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem

 1098 14:27:41.605313    PCI: 00:16.0 10 *  [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem

 1099 14:27:41.612215    PCI: 00:19.0 10 *  [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem

 1100 14:27:41.618476    PCI: 00:19.2 18 *  [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem

 1101 14:27:41.625424    PCI: 00:1a.0 10 *  [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem

 1102 14:27:41.632357    PCI: 00:1e.2 10 *  [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem

 1103 14:27:41.638871    PCI: 00:1f.5 10 *  [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem

 1104 14:27:41.645438  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1105 14:27:41.651462  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1106 14:27:41.658747  Root Device assign_resources, bus 0 link: 0

 1107 14:27:41.661536  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1108 14:27:41.671855  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1109 14:27:41.678520  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1110 14:27:41.685050  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1111 14:27:41.695013  PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64

 1112 14:27:41.698081  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1113 14:27:41.704477  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1114 14:27:41.712380  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1115 14:27:41.715439  PCI: 00:05.0 assign_resources, bus 2 link: 0

 1116 14:27:41.722230  PCI: 00:05.0 assign_resources, bus 2 link: 0

 1117 14:27:41.729117  PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64

 1118 14:27:41.738848  PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64

 1119 14:27:41.742213  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1120 14:27:41.745474  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1121 14:27:41.755442  PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64

 1122 14:27:41.758877  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1123 14:27:41.762215  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1124 14:27:41.772215  PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64

 1125 14:27:41.778869  PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64

 1126 14:27:41.785521  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1127 14:27:41.788853  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1128 14:27:41.798741  PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64

 1129 14:27:41.805077  PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64

 1130 14:27:41.808255  PCI: 00:15.2 assign_resources, bus 0 link: 0

 1131 14:27:41.815210  PCI: 00:15.2 assign_resources, bus 0 link: 0

 1132 14:27:41.821383  PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64

 1133 14:27:41.828200  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1134 14:27:41.831800  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1135 14:27:41.841704  PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64

 1136 14:27:41.847976  PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64

 1137 14:27:41.851212  PCI: 00:19.0 assign_resources, bus 0 link: 0

 1138 14:27:41.858027  PCI: 00:19.0 assign_resources, bus 0 link: 0

 1139 14:27:41.864682  PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64

 1140 14:27:41.874702  PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64

 1141 14:27:41.881430  PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64

 1142 14:27:41.887579  PCI: 00:1e.2 assign_resources, bus 3 link: 0

 1143 14:27:41.890871  PCI: 00:1e.2 assign_resources, bus 3 link: 0

 1144 14:27:41.894280  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1145 14:27:41.901297  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1146 14:27:41.904508  LPC: Trying to open IO window from 800 size 1ff

 1147 14:27:41.914129  PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64

 1148 14:27:41.920712  PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64

 1149 14:27:41.927169  PCI: 00:1f.3 assign_resources, bus 0 link: 0

 1150 14:27:41.930736  PCI: 00:1f.3 assign_resources, bus 0 link: 0

 1151 14:27:41.937150  PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem

 1152 14:27:41.944351  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1153 14:27:41.947414  Root Device assign_resources, bus 0 link: 0

 1154 14:27:41.950739  Done setting resources.

 1155 14:27:41.957413  Show resources in subtree (Root Device)...After assigning values.

 1156 14:27:41.960625   Root Device child on link 0 CPU_CLUSTER: 0

 1157 14:27:41.963923    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1158 14:27:41.967253     APIC: 00

 1159 14:27:41.967386     APIC: 02

 1160 14:27:41.973829    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1161 14:27:41.980543    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1162 14:27:41.990629    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1163 14:27:41.993965     PCI: 00:00.0

 1164 14:27:42.003838     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1165 14:27:42.010399     PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1166 14:27:42.020239     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1167 14:27:42.030058     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1168 14:27:42.040495     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1169 14:27:42.050461     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1170 14:27:42.060160     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1171 14:27:42.066944     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1172 14:27:42.076917     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1173 14:27:42.086831     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1174 14:27:42.096939     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1175 14:27:42.106300     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1176 14:27:42.113479     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1177 14:27:42.123210     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1178 14:27:42.132991     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1179 14:27:42.142880     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1180 14:27:42.153101     PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1181 14:27:42.163062     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1182 14:27:42.169714     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1183 14:27:42.172909     PCI: 00:02.0

 1184 14:27:42.183031     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1185 14:27:42.192990     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1186 14:27:42.202870     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1187 14:27:42.205675     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1188 14:27:42.219399     PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10

 1189 14:27:42.219504      GENERIC: 0.0

 1190 14:27:42.222671     PCI: 00:05.0 child on link 0 GENERIC: 0.0

 1191 14:27:42.235632     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1192 14:27:42.235731      GENERIC: 0.0

 1193 14:27:42.238897     PCI: 00:08.0

 1194 14:27:42.248982     PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10

 1195 14:27:42.252372     PCI: 00:14.0 child on link 0 USB0 port 0

 1196 14:27:42.262390     PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10

 1197 14:27:42.268860      USB0 port 0 child on link 0 USB2 port 0

 1198 14:27:42.268968       USB2 port 0

 1199 14:27:42.272113       USB2 port 1

 1200 14:27:42.272207       USB2 port 2

 1201 14:27:42.275375       USB2 port 3

 1202 14:27:42.275480       USB2 port 4

 1203 14:27:42.278539       USB2 port 5

 1204 14:27:42.278633       USB2 port 6

 1205 14:27:42.281852       USB2 port 7

 1206 14:27:42.281946       USB3 port 0

 1207 14:27:42.285656       USB3 port 1

 1208 14:27:42.285751       USB3 port 2

 1209 14:27:42.288969       USB3 port 3

 1210 14:27:42.289063     PCI: 00:14.2

 1211 14:27:42.295068     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1212 14:27:42.305293     PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10

 1213 14:27:42.305417      GENERIC: 0.0

 1214 14:27:42.308588     PCI: 00:14.5

 1215 14:27:42.318452     PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10

 1216 14:27:42.321810     PCI: 00:15.0 child on link 0 I2C: 00:2c

 1217 14:27:42.332185     PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10

 1218 14:27:42.335451      I2C: 00:2c

 1219 14:27:42.335558      I2C: 00:15

 1220 14:27:42.338644     PCI: 00:15.1

 1221 14:27:42.348439     PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10

 1222 14:27:42.351628     PCI: 00:15.2 child on link 0 GENERIC: 0.0

 1223 14:27:42.361891     PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10

 1224 14:27:42.365079      GENERIC: 0.0

 1225 14:27:42.365186      I2C: 00:15

 1226 14:27:42.368166      I2C: 00:10

 1227 14:27:42.368261      I2C: 00:10

 1228 14:27:42.371828      I2C: 00:2c

 1229 14:27:42.371926      I2C: 00:40

 1230 14:27:42.375224      I2C: 00:10

 1231 14:27:42.375318      I2C: 00:39

 1232 14:27:42.381854     PCI: 00:15.3 child on link 0 I2C: 00:36

 1233 14:27:42.391711     PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10

 1234 14:27:42.391831      I2C: 00:36

 1235 14:27:42.394845      I2C: 00:10

 1236 14:27:42.394972      I2C: 00:0c

 1237 14:27:42.397938      I2C: 00:50

 1238 14:27:42.398040     PCI: 00:16.0

 1239 14:27:42.407912     PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10

 1240 14:27:42.411365     PCI: 00:19.0 child on link 0 I2C: 00:1a

 1241 14:27:42.424804     PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10

 1242 14:27:42.424916      I2C: 00:1a

 1243 14:27:42.428072      I2C: 00:1a

 1244 14:27:42.428168      I2C: 00:1a

 1245 14:27:42.428241      I2C: 00:28

 1246 14:27:42.431328      I2C: 00:29

 1247 14:27:42.431422     PCI: 00:19.2

 1248 14:27:42.444457     PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1249 14:27:42.454884     PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18

 1250 14:27:42.454992     PCI: 00:1a.0

 1251 14:27:42.464504     PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10

 1252 14:27:42.467744     PCI: 00:1e.0

 1253 14:27:42.471366     PCI: 00:1e.2 child on link 0 SPI: 00

 1254 14:27:42.481121     PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10

 1255 14:27:42.484354      SPI: 00

 1256 14:27:42.487730     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1257 14:27:42.498088     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1258 14:27:42.498205      PNP: 0c09.0

 1259 14:27:42.507370      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1260 14:27:42.507491     PCI: 00:1f.2

 1261 14:27:42.517793     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1262 14:27:42.527673     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1

 1263 14:27:42.530894     PCI: 00:1f.3 child on link 0 GENERIC: 0.0

 1264 14:27:42.540917     PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10

 1265 14:27:42.550798     PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20

 1266 14:27:42.553944      GENERIC: 0.0

 1267 14:27:42.554044     PCI: 00:1f.5

 1268 14:27:42.567394     PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10

 1269 14:27:42.567526  Done allocating resources.

 1270 14:27:42.573924  BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2098 ms

 1271 14:27:42.577154  Enabling resources...

 1272 14:27:42.580760  PCI: 00:00.0 subsystem <- 8086/4e22

 1273 14:27:42.583897  PCI: 00:00.0 cmd <- 06

 1274 14:27:42.587275  PCI: 00:02.0 subsystem <- 8086/4e55

 1275 14:27:42.590494  PCI: 00:02.0 cmd <- 03

 1276 14:27:42.593901  PCI: 00:04.0 subsystem <- 8086/4e03

 1277 14:27:42.597248  PCI: 00:04.0 cmd <- 02

 1278 14:27:42.600405  PCI: 00:05.0 bridge ctrl <- 0003

 1279 14:27:42.604208  PCI: 00:05.0 subsystem <- 8086/4e19

 1280 14:27:42.604303  PCI: 00:05.0 cmd <- 02

 1281 14:27:42.607403  PCI: 00:08.0 cmd <- 06

 1282 14:27:42.610744  PCI: 00:14.0 subsystem <- 8086/4ded

 1283 14:27:42.613995  PCI: 00:14.0 cmd <- 02

 1284 14:27:42.617789  PCI: 00:14.3 subsystem <- 8086/4df0

 1285 14:27:42.621026  PCI: 00:14.3 cmd <- 02

 1286 14:27:42.624492  PCI: 00:14.5 subsystem <- 8086/4df8

 1287 14:27:42.627027  PCI: 00:14.5 cmd <- 06

 1288 14:27:42.630789  PCI: 00:15.0 subsystem <- 8086/4de8

 1289 14:27:42.634112  PCI: 00:15.0 cmd <- 02

 1290 14:27:42.637162  PCI: 00:15.1 subsystem <- 8086/4de9

 1291 14:27:42.637257  PCI: 00:15.1 cmd <- 02

 1292 14:27:42.643923  PCI: 00:15.2 subsystem <- 8086/4dea

 1293 14:27:42.644026  PCI: 00:15.2 cmd <- 02

 1294 14:27:42.647153  PCI: 00:15.3 subsystem <- 8086/4deb

 1295 14:27:42.650497  PCI: 00:15.3 cmd <- 02

 1296 14:27:42.653734  PCI: 00:16.0 subsystem <- 8086/4de0

 1297 14:27:42.656995  PCI: 00:16.0 cmd <- 02

 1298 14:27:42.660720  PCI: 00:19.0 subsystem <- 8086/4dc5

 1299 14:27:42.663959  PCI: 00:19.0 cmd <- 02

 1300 14:27:42.667216  PCI: 00:19.2 subsystem <- 8086/4dc7

 1301 14:27:42.670403  PCI: 00:19.2 cmd <- 06

 1302 14:27:42.673721  PCI: 00:1a.0 subsystem <- 8086/4dc4

 1303 14:27:42.673845  PCI: 00:1a.0 cmd <- 06

 1304 14:27:42.680396  PCI: 00:1e.2 subsystem <- 8086/4daa

 1305 14:27:42.680517  PCI: 00:1e.2 cmd <- 06

 1306 14:27:42.684204  PCI: 00:1f.0 subsystem <- 8086/4d87

 1307 14:27:42.687184  PCI: 00:1f.0 cmd <- 407

 1308 14:27:42.690968  PCI: 00:1f.3 subsystem <- 8086/4dc8

 1309 14:27:42.694245  PCI: 00:1f.3 cmd <- 02

 1310 14:27:42.697084  PCI: 00:1f.5 subsystem <- 8086/4da4

 1311 14:27:42.700442  PCI: 00:1f.5 cmd <- 406

 1312 14:27:42.704443  done.

 1313 14:27:42.707880  BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms

 1314 14:27:42.711260  Initializing devices...

 1315 14:27:42.714591  Root Device init

 1316 14:27:42.714695  mainboard: EC init

 1317 14:27:42.721105  Chrome EC: Set SMI mask to 0x0000000000000000

 1318 14:27:42.727425  Chrome EC: clear events_b mask to 0x0000000000000000

 1319 14:27:42.730890  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1320 14:27:42.737636  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e

 1321 14:27:42.744579  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e

 1322 14:27:42.751201  Chrome EC: Set WAKE mask to 0x0000000000000000

 1323 14:27:42.754495  Root Device init finished in 37 msecs

 1324 14:27:42.757754  PCI: 00:00.0 init

 1325 14:27:42.761052  CPU TDP = 6 Watts

 1326 14:27:42.761153  CPU PL1 = 7 Watts

 1327 14:27:42.764437  CPU PL2 = 12 Watts

 1328 14:27:42.767595  PCI: 00:00.0 init finished in 6 msecs

 1329 14:27:42.770880  PCI: 00:02.0 init

 1330 14:27:42.770979  GMA: Found VBT in CBFS

 1331 14:27:42.774612  GMA: Found valid VBT in CBFS

 1332 14:27:42.781005  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1333 14:27:42.787422                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1334 14:27:42.794421  PCI: 00:02.0 init finished in 18 msecs

 1335 14:27:42.794554  PCI: 00:08.0 init

 1336 14:27:42.797513  PCI: 00:08.0 init finished in 0 msecs

 1337 14:27:42.800789  PCI: 00:14.0 init

 1338 14:27:42.804168  XHCI: Updated LFPS sampling OFF time to 9 ms

 1339 14:27:42.810753  PCI: 00:14.0 init finished in 4 msecs

 1340 14:27:42.810871  PCI: 00:15.0 init

 1341 14:27:42.814668  I2C bus 0 version 0x3230302a

 1342 14:27:42.817443  DW I2C bus 0 at 0x7fd2a000 (400 KHz)

 1343 14:27:42.824174  PCI: 00:15.0 init finished in 6 msecs

 1344 14:27:42.824294  PCI: 00:15.1 init

 1345 14:27:42.827368  I2C bus 1 version 0x3230302a

 1346 14:27:42.830678  DW I2C bus 1 at 0x7fd2b000 (400 KHz)

 1347 14:27:42.834017  PCI: 00:15.1 init finished in 6 msecs

 1348 14:27:42.837234  PCI: 00:15.2 init

 1349 14:27:42.840480  I2C bus 2 version 0x3230302a

 1350 14:27:42.844358  DW I2C bus 2 at 0x7fd2c000 (400 KHz)

 1351 14:27:42.847603  PCI: 00:15.2 init finished in 6 msecs

 1352 14:27:42.850977  PCI: 00:15.3 init

 1353 14:27:42.854226  I2C bus 3 version 0x3230302a

 1354 14:27:42.857497  DW I2C bus 3 at 0x7fd2d000 (400 KHz)

 1355 14:27:42.860727  PCI: 00:15.3 init finished in 6 msecs

 1356 14:27:42.864237  PCI: 00:16.0 init

 1357 14:27:42.867405  PCI: 00:16.0 init finished in 0 msecs

 1358 14:27:42.867507  PCI: 00:19.0 init

 1359 14:27:42.870714  I2C bus 4 version 0x3230302a

 1360 14:27:42.874077  DW I2C bus 4 at 0x7fd2f000 (400 KHz)

 1361 14:27:42.877430  PCI: 00:19.0 init finished in 6 msecs

 1362 14:27:42.880550  PCI: 00:1a.0 init

 1363 14:27:42.884205  PCI: 00:1a.0 init finished in 0 msecs

 1364 14:27:42.887575  PCI: 00:1f.0 init

 1365 14:27:42.890834  IOAPIC: Initializing IOAPIC at 0xfec00000

 1366 14:27:42.897226  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1367 14:27:42.897335  IOAPIC: ID = 0x02

 1368 14:27:42.900483  IOAPIC: Dumping registers

 1369 14:27:42.904150    reg 0x0000: 0x02000000

 1370 14:27:42.904248    reg 0x0001: 0x00770020

 1371 14:27:42.907345    reg 0x0002: 0x00000000

 1372 14:27:42.910745  PCI: 00:1f.0 init finished in 21 msecs

 1373 14:27:42.914101  PCI: 00:1f.2 init

 1374 14:27:42.917985  Disabling ACPI via APMC.

 1375 14:27:42.920733  APMC done.

 1376 14:27:42.924176  PCI: 00:1f.2 init finished in 5 msecs

 1377 14:27:42.935320  PNP: 0c09.0 init

 1378 14:27:42.938489  Google Chrome EC uptime: 6.631 seconds

 1379 14:27:42.944920  Google Chrome AP resets since EC boot: 0

 1380 14:27:42.948811  Google Chrome most recent AP reset causes:

 1381 14:27:42.955417  Google Chrome EC reset flags at last EC boot: reset-pin

 1382 14:27:42.958715  PNP: 0c09.0 init finished in 18 msecs

 1383 14:27:42.958814  Devices initialized

 1384 14:27:42.962101  Show all devs... After init.

 1385 14:27:42.965437  Root Device: enabled 1

 1386 14:27:42.968854  CPU_CLUSTER: 0: enabled 1

 1387 14:27:42.972171  DOMAIN: 0000: enabled 1

 1388 14:27:42.972267  PCI: 00:00.0: enabled 1

 1389 14:27:42.975354  PCI: 00:02.0: enabled 1

 1390 14:27:42.978569  PCI: 00:04.0: enabled 1

 1391 14:27:42.978664  PCI: 00:05.0: enabled 1

 1392 14:27:42.981876  PCI: 00:09.0: enabled 0

 1393 14:27:42.985183  PCI: 00:12.6: enabled 0

 1394 14:27:42.988422  PCI: 00:14.0: enabled 1

 1395 14:27:42.988528  PCI: 00:14.1: enabled 0

 1396 14:27:42.991480  PCI: 00:14.2: enabled 0

 1397 14:27:42.994719  PCI: 00:14.3: enabled 1

 1398 14:27:42.998476  PCI: 00:14.5: enabled 1

 1399 14:27:42.998594  PCI: 00:15.0: enabled 1

 1400 14:27:43.001645  PCI: 00:15.1: enabled 1

 1401 14:27:43.005071  PCI: 00:15.2: enabled 1

 1402 14:27:43.008301  PCI: 00:15.3: enabled 1

 1403 14:27:43.008407  PCI: 00:16.0: enabled 1

 1404 14:27:43.011427  PCI: 00:16.1: enabled 0

 1405 14:27:43.014928  PCI: 00:16.4: enabled 0

 1406 14:27:43.015030  PCI: 00:16.5: enabled 0

 1407 14:27:43.018163  PCI: 00:17.0: enabled 0

 1408 14:27:43.021479  PCI: 00:19.0: enabled 1

 1409 14:27:43.024530  PCI: 00:19.1: enabled 0

 1410 14:27:43.024630  PCI: 00:19.2: enabled 1

 1411 14:27:43.027891  PCI: 00:1a.0: enabled 1

 1412 14:27:43.031753  PCI: 00:1c.0: enabled 0

 1413 14:27:43.035030  PCI: 00:1c.1: enabled 0

 1414 14:27:43.035129  PCI: 00:1c.2: enabled 0

 1415 14:27:43.038282  PCI: 00:1c.3: enabled 0

 1416 14:27:43.041482  PCI: 00:1c.4: enabled 0

 1417 14:27:43.044796  PCI: 00:1c.5: enabled 0

 1418 14:27:43.044894  PCI: 00:1c.6: enabled 0

 1419 14:27:43.047965  PCI: 00:1c.7: enabled 1

 1420 14:27:43.051066  PCI: 00:1e.0: enabled 0

 1421 14:27:43.051163  PCI: 00:1e.1: enabled 0

 1422 14:27:43.054791  PCI: 00:1e.2: enabled 1

 1423 14:27:43.058009  PCI: 00:1e.3: enabled 0

 1424 14:27:43.061543  PCI: 00:1f.0: enabled 1

 1425 14:27:43.061650  PCI: 00:1f.1: enabled 0

 1426 14:27:43.064321  PCI: 00:1f.2: enabled 1

 1427 14:27:43.067654  PCI: 00:1f.3: enabled 1

 1428 14:27:43.070989  PCI: 00:1f.4: enabled 0

 1429 14:27:43.071087  PCI: 00:1f.5: enabled 1

 1430 14:27:43.074364  PCI: 00:1f.7: enabled 0

 1431 14:27:43.077706  GENERIC: 0.0: enabled 1

 1432 14:27:43.080921  GENERIC: 0.0: enabled 1

 1433 14:27:43.081019  USB0 port 0: enabled 1

 1434 14:27:43.084708  GENERIC: 0.0: enabled 1

 1435 14:27:43.087784  I2C: 00:2c: enabled 1

 1436 14:27:43.087888  I2C: 00:15: enabled 1

 1437 14:27:43.091042  GENERIC: 0.0: enabled 0

 1438 14:27:43.094320  I2C: 00:15: enabled 1

 1439 14:27:43.094413  I2C: 00:10: enabled 0

 1440 14:27:43.097548  I2C: 00:10: enabled 0

 1441 14:27:43.100786  I2C: 00:2c: enabled 1

 1442 14:27:43.100878  I2C: 00:40: enabled 1

 1443 14:27:43.103974  I2C: 00:10: enabled 1

 1444 14:27:43.107810  I2C: 00:39: enabled 1

 1445 14:27:43.110987  I2C: 00:36: enabled 1

 1446 14:27:43.111078  I2C: 00:10: enabled 0

 1447 14:27:43.114239  I2C: 00:0c: enabled 1

 1448 14:27:43.117360  I2C: 00:50: enabled 1

 1449 14:27:43.117451  I2C: 00:1a: enabled 1

 1450 14:27:43.120644  I2C: 00:1a: enabled 0

 1451 14:27:43.124468  I2C: 00:1a: enabled 0

 1452 14:27:43.124561  I2C: 00:28: enabled 1

 1453 14:27:43.127646  I2C: 00:29: enabled 1

 1454 14:27:43.130937  PCI: 00:00.0: enabled 1

 1455 14:27:43.131029  SPI: 00: enabled 1

 1456 14:27:43.134246  PNP: 0c09.0: enabled 1

 1457 14:27:43.137467  GENERIC: 0.0: enabled 0

 1458 14:27:43.137560  USB2 port 0: enabled 1

 1459 14:27:43.140871  USB2 port 1: enabled 1

 1460 14:27:43.144223  USB2 port 2: enabled 1

 1461 14:27:43.144316  USB2 port 3: enabled 1

 1462 14:27:43.147550  USB2 port 4: enabled 0

 1463 14:27:43.150920  USB2 port 5: enabled 1

 1464 14:27:43.154046  USB2 port 6: enabled 0

 1465 14:27:43.154138  USB2 port 7: enabled 1

 1466 14:27:43.157277  USB3 port 0: enabled 1

 1467 14:27:43.160410  USB3 port 1: enabled 1

 1468 14:27:43.160502  USB3 port 2: enabled 1

 1469 14:27:43.164184  USB3 port 3: enabled 1

 1470 14:27:43.167417  APIC: 00: enabled 1

 1471 14:27:43.167518  APIC: 02: enabled 1

 1472 14:27:43.170877  PCI: 00:08.0: enabled 1

 1473 14:27:43.177532  BS: BS_DEV_INIT run times (exec / console): 25 / 437 ms

 1474 14:27:43.180231  FMAP: area RW_ELOG found @ bfa000 (4096 bytes)

 1475 14:27:43.183572  ELOG: NV offset 0xbfa000 size 0x1000

 1476 14:27:43.191360  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1477 14:27:43.198139  ELOG: Event(17) added with size 13 at 2023-06-06 14:27:39 UTC

 1478 14:27:43.205049  ELOG: Event(92) added with size 9 at 2023-06-06 14:27:39 UTC

 1479 14:27:43.211294  ELOG: Event(93) added with size 9 at 2023-06-06 14:27:39 UTC

 1480 14:27:43.218441  ELOG: Event(9E) added with size 10 at 2023-06-06 14:27:39 UTC

 1481 14:27:43.224680  ELOG: Event(9F) added with size 14 at 2023-06-06 14:27:39 UTC

 1482 14:27:43.228387  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1483 14:27:43.234991  ELOG: Event(A1) added with size 10 at 2023-06-06 14:27:39 UTC

 1484 14:27:43.244795  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1485 14:27:43.248090  ELOG: Event(A0) added with size 9 at 2023-06-06 14:27:39 UTC

 1486 14:27:43.254821  elog_add_boot_reason: Logged dev mode boot

 1487 14:27:43.261216  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms

 1488 14:27:43.261311  Finalize devices...

 1489 14:27:43.264655  Devices finalized

 1490 14:27:43.268320  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1491 14:27:43.274779  FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)

 1492 14:27:43.281551  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1493 14:27:43.284836  ME: HFSTS1                  : 0x80030045

 1494 14:27:43.288256  ME: HFSTS2                  : 0x30280136

 1495 14:27:43.291419  ME: HFSTS3                  : 0x00000050

 1496 14:27:43.298156  ME: HFSTS4                  : 0x00004000

 1497 14:27:43.301450  ME: HFSTS5                  : 0x00000000

 1498 14:27:43.304594  ME: HFSTS6                  : 0x40400006

 1499 14:27:43.307949  ME: Manufacturing Mode      : NO

 1500 14:27:43.311178  ME: FW Partition Table      : OK

 1501 14:27:43.314880  ME: Bringup Loader Failure  : NO

 1502 14:27:43.318028  ME: Firmware Init Complete  : NO

 1503 14:27:43.321093  ME: Boot Options Present    : NO

 1504 14:27:43.324953  ME: Update In Progress      : NO

 1505 14:27:43.328015  ME: D0i3 Support            : YES

 1506 14:27:43.331397  ME: Low Power State Enabled : NO

 1507 14:27:43.334556  ME: CPU Replaced            : YES

 1508 14:27:43.337797  ME: CPU Replacement Valid   : YES

 1509 14:27:43.341529  ME: Current Working State   : 5

 1510 14:27:43.344757  ME: Current Operation State : 1

 1511 14:27:43.348010  ME: Current Operation Mode  : 3

 1512 14:27:43.351204  ME: Error Code              : 0

 1513 14:27:43.354658  ME: CPU Debug Disabled      : YES

 1514 14:27:43.358030  ME: TXT Support             : NO

 1515 14:27:43.364590  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms

 1516 14:27:43.367954  CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2

 1517 14:27:43.375055  ACPI: Writing ACPI tables at 76b27000.

 1518 14:27:43.375217  ACPI:    * FACS

 1519 14:27:43.378298  ACPI:    * DSDT

 1520 14:27:43.381625  Ramoops buffer: 0x100000@0x76a26000.

 1521 14:27:43.385206  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1522 14:27:43.391127  FMAP: area RW_VPD found @ bfc000 (8192 bytes)

 1523 14:27:43.394510  Google Chrome EC: version:

 1524 14:27:43.397909  	ro: magolor_1.1.9999-103b6f9

 1525 14:27:43.398041  	rw: magolor_1.1.9999-103b6f9

 1526 14:27:43.401266    running image: 1

 1527 14:27:43.407806  PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000

 1528 14:27:43.411479  ACPI:    * FADT

 1529 14:27:43.411680  SCI is IRQ9

 1530 14:27:43.414837  ACPI: added table 1/32, length now 40

 1531 14:27:43.418117  ACPI:     * SSDT

 1532 14:27:43.421322  Found 1 CPU(s) with 2 core(s) each.

 1533 14:27:43.424686  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1534 14:27:43.431666  \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h

 1535 14:27:43.434520  Could not locate 'wifi_sar' in VPD.

 1536 14:27:43.438168  Checking CBFS for default SAR values

 1537 14:27:43.444918  wifi_sar_defaults.hex has bad len in CBFS

 1538 14:27:43.447763  failed from getting SAR limits!

 1539 14:27:43.451466  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1540 14:27:43.454613  \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c

 1541 14:27:43.461728  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15

 1542 14:27:43.464406  \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15

 1543 14:27:43.471647  \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c

 1544 14:27:43.475018  \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40

 1545 14:27:43.481396  \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10

 1546 14:27:43.487937  \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39

 1547 14:27:43.494587  \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h

 1548 14:27:43.498013  \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch

 1549 14:27:43.504836  \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h

 1550 14:27:43.511586  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a

 1551 14:27:43.514960  \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28

 1552 14:27:43.521382  \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29

 1553 14:27:43.524493  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1554 14:27:43.531498  PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]

 1555 14:27:43.534757  PS2K: Passing 101 keymaps to kernel

 1556 14:27:43.541664  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1557 14:27:43.548161  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1

 1558 14:27:43.551104  \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2

 1559 14:27:43.558264  \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3

 1560 14:27:43.561468  \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5

 1561 14:27:43.567831  \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7

 1562 14:27:43.574354  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1563 14:27:43.581080  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1

 1564 14:27:43.584373  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1565 14:27:43.590834  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3

 1566 14:27:43.594229  ACPI: added table 2/32, length now 44

 1567 14:27:43.597527  ACPI:    * MCFG

 1568 14:27:43.600908  ACPI: added table 3/32, length now 48

 1569 14:27:43.601238  ACPI:    * TPM2

 1570 14:27:43.604332  TPM2 log created at 0x76a16000

 1571 14:27:43.607715  ACPI: added table 4/32, length now 52

 1572 14:27:43.610988  ACPI:    * MADT

 1573 14:27:43.611309  SCI is IRQ9

 1574 14:27:43.614394  ACPI: added table 5/32, length now 56

 1575 14:27:43.617925  current = 76b2d580

 1576 14:27:43.621123  ACPI:    * DMAR

 1577 14:27:43.624520  ACPI: added table 6/32, length now 60

 1578 14:27:43.627726  ACPI: added table 7/32, length now 64

 1579 14:27:43.628057  ACPI:    * HPET

 1580 14:27:43.630886  ACPI: added table 8/32, length now 68

 1581 14:27:43.634075  ACPI: done.

 1582 14:27:43.637878  ACPI tables: 26304 bytes.

 1583 14:27:43.641008  smbios_write_tables: 76a15000

 1584 14:27:43.644164  EC returned error result code 3

 1585 14:27:43.647303  Couldn't obtain OEM name from CBI

 1586 14:27:43.651185  Create SMBIOS type 16

 1587 14:27:43.651799  Create SMBIOS type 17

 1588 14:27:43.654195  GENERIC: 0.0 (WIFI Device)

 1589 14:27:43.657386  SMBIOS tables: 913 bytes.

 1590 14:27:43.660785  Writing table forward entry at 0x00000500

 1591 14:27:43.667068  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929

 1592 14:27:43.671027  Writing coreboot table at 0x76b4b000

 1593 14:27:43.677368   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1594 14:27:43.680762   1. 0000000000001000-000000000009ffff: RAM

 1595 14:27:43.687142   2. 00000000000a0000-00000000000fffff: RESERVED

 1596 14:27:43.690536   3. 0000000000100000-0000000076a14fff: RAM

 1597 14:27:43.697027   4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES

 1598 14:27:43.700316   5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE

 1599 14:27:43.707111   6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES

 1600 14:27:43.710304   7. 0000000077000000-000000007fbfffff: RESERVED

 1601 14:27:43.716930   8. 00000000c0000000-00000000cfffffff: RESERVED

 1602 14:27:43.720342   9. 00000000fb000000-00000000fb000fff: RESERVED

 1603 14:27:43.727161  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1604 14:27:43.730365  11. 00000000fea80000-00000000fea87fff: RESERVED

 1605 14:27:43.737046  12. 00000000fed80000-00000000fed87fff: RESERVED

 1606 14:27:43.740281  13. 00000000fed90000-00000000fed92fff: RESERVED

 1607 14:27:43.743548  14. 00000000feda0000-00000000feda1fff: RESERVED

 1608 14:27:43.750257  15. 0000000100000000-00000001803fffff: RAM

 1609 14:27:43.753462  Passing 4 GPIOs to payload:

 1610 14:27:43.756547              NAME |       PORT | POLARITY |     VALUE

 1611 14:27:43.763292               lid |  undefined |     high |      high

 1612 14:27:43.766501             power |  undefined |     high |       low

 1613 14:27:43.773342             oprom |  undefined |     high |       low

 1614 14:27:43.780135          EC in RW | 0x000000b9 |     high |       low

 1615 14:27:43.783341  Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 8445

 1616 14:27:43.786728  coreboot table: 1504 bytes.

 1617 14:27:43.789935  IMD ROOT    0. 0x76fff000 0x00001000

 1618 14:27:43.796697  IMD SMALL   1. 0x76ffe000 0x00001000

 1619 14:27:43.799958  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1620 14:27:43.803145  CONSOLE     3. 0x76c2e000 0x00020000

 1621 14:27:43.806353  FMAP        4. 0x76c2d000 0x00000578

 1622 14:27:43.809723  TIME STAMP  5. 0x76c2c000 0x00000910

 1623 14:27:43.813093  VBOOT WORK  6. 0x76c18000 0x00014000

 1624 14:27:43.816491  ROMSTG STCK 7. 0x76c17000 0x00001000

 1625 14:27:43.819914  AFTER CAR   8. 0x76c0d000 0x0000a000

 1626 14:27:43.823262  RAMSTAGE    9. 0x76ba7000 0x00066000

 1627 14:27:43.829871  REFCODE    10. 0x76b67000 0x00040000

 1628 14:27:43.833131  SMM BACKUP 11. 0x76b57000 0x00010000

 1629 14:27:43.836458  4f444749   12. 0x76b55000 0x00002000

 1630 14:27:43.839929  EXT VBT13. 0x76b53000 0x00001c43

 1631 14:27:43.843158  COREBOOT   14. 0x76b4b000 0x00008000

 1632 14:27:43.846528  ACPI       15. 0x76b27000 0x00024000

 1633 14:27:43.849953  ACPI GNVS  16. 0x76b26000 0x00001000

 1634 14:27:43.853560  RAMOOPS    17. 0x76a26000 0x00100000

 1635 14:27:43.856382  TPM2 TCGLOG18. 0x76a16000 0x00010000

 1636 14:27:43.860219  SMBIOS     19. 0x76a15000 0x00000800

 1637 14:27:43.863334  IMD small region:

 1638 14:27:43.866589    IMD ROOT    0. 0x76ffec00 0x00000400

 1639 14:27:43.869828    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1640 14:27:43.876560    VPD         2. 0x76ffeb60 0x0000006c

 1641 14:27:43.879706    POWER STATE 3. 0x76ffeb20 0x00000040

 1642 14:27:43.882962    ROMSTAGE    4. 0x76ffeb00 0x00000004

 1643 14:27:43.886947    MEM INFO    5. 0x76ffe920 0x000001e0

 1644 14:27:43.893389  BS: BS_WRITE_TABLES run times (exec / console): 6 / 517 ms

 1645 14:27:43.896704  MTRR: Physical address space:

 1646 14:27:43.903332  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1647 14:27:43.909910  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1648 14:27:43.913194  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1649 14:27:43.919399  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1650 14:27:43.926132  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1651 14:27:43.932756  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1652 14:27:43.939398  0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6

 1653 14:27:43.942752  MTRR: Fixed MSR 0x250 0x0606060606060606

 1654 14:27:43.946092  MTRR: Fixed MSR 0x258 0x0606060606060606

 1655 14:27:43.952534  MTRR: Fixed MSR 0x259 0x0000000000000000

 1656 14:27:43.955843  MTRR: Fixed MSR 0x268 0x0606060606060606

 1657 14:27:43.959121  MTRR: Fixed MSR 0x269 0x0606060606060606

 1658 14:27:43.962264  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1659 14:27:43.969200  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1660 14:27:43.972388  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1661 14:27:43.975838  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1662 14:27:43.978873  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1663 14:27:43.982771  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1664 14:27:43.986442  call enable_fixed_mtrr()

 1665 14:27:43.989526  CPU physical address size: 39 bits

 1666 14:27:43.995998  MTRR: default type WB/UC MTRR counts: 6/5.

 1667 14:27:43.999739  MTRR: UC selected as default type.

 1668 14:27:44.006197  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1669 14:27:44.009629  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1670 14:27:44.016063  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1671 14:27:44.022779  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1672 14:27:44.029415  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1673 14:27:44.029537  

 1674 14:27:44.032730  MTRR check

 1675 14:27:44.032823  Fixed MTRRs   : Enabled

 1676 14:27:44.036037  Variable MTRRs: Enabled

 1677 14:27:44.036131  

 1678 14:27:44.038746  MTRR: Fixed MSR 0x250 0x0606060606060606

 1679 14:27:44.045983  MTRR: Fixed MSR 0x258 0x0606060606060606

 1680 14:27:44.048686  MTRR: Fixed MSR 0x259 0x0000000000000000

 1681 14:27:44.052001  MTRR: Fixed MSR 0x268 0x0606060606060606

 1682 14:27:44.055854  MTRR: Fixed MSR 0x269 0x0606060606060606

 1683 14:27:44.062076  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1684 14:27:44.065336  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1685 14:27:44.068585  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1686 14:27:44.072187  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1687 14:27:44.078706  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1688 14:27:44.081841  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1689 14:27:44.088649  BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms

 1690 14:27:44.088770  call enable_fixed_mtrr()

 1691 14:27:44.093239  Checking cr50 for pending updates

 1692 14:27:44.096596  CPU physical address size: 39 bits

 1693 14:27:44.100409  Reading cr50 TPM mode

 1694 14:27:44.109847  BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms

 1695 14:27:44.117821  CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38

 1696 14:27:44.121158  Checking segment from ROM address 0xfff9d5b8

 1697 14:27:44.127629  Checking segment from ROM address 0xfff9d5d4

 1698 14:27:44.130976  Loading segment from ROM address 0xfff9d5b8

 1699 14:27:44.134255    code (compression=0)

 1700 14:27:44.140450    New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00

 1701 14:27:44.150435  Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00

 1702 14:27:44.153785  it's not compressed!

 1703 14:27:44.279869  [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0

 1704 14:27:44.286736  Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370

 1705 14:27:44.294203  Loading segment from ROM address 0xfff9d5d4

 1706 14:27:44.297305    Entry Point 0x30000000

 1707 14:27:44.297422  Loaded segments

 1708 14:27:44.303681  BS: BS_PAYLOAD_LOAD run times (exec / console): 127 / 60 ms

 1709 14:27:44.319831  Finalizing chipset.

 1710 14:27:44.323125  Finalizing SMM.

 1711 14:27:44.323245  APMC done.

 1712 14:27:44.329759  BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms

 1713 14:27:44.333091  mp_park_aps done after 0 msecs.

 1714 14:27:44.336858  Jumping to boot code at 0x30000000(0x76b4b000)

 1715 14:27:44.346318  CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes

 1716 14:27:44.346443  

 1717 14:27:44.346556  

 1718 14:27:44.346658  

 1719 14:27:44.349718  Starting depthcharge on Magolor...

 1720 14:27:44.349830  

 1721 14:27:44.350248  end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
 1722 14:27:44.350405  start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
 1723 14:27:44.350532  Setting prompt string to ['dedede:']
 1724 14:27:44.350653  bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
 1725 14:27:44.359738  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1726 14:27:44.359849  

 1727 14:27:44.366382  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1728 14:27:44.366500  

 1729 14:27:44.369749  fw_config match found: AUDIO_AMP=UNPROVISIONED

 1730 14:27:44.369862  

 1731 14:27:44.373079  Wipe memory regions:

 1732 14:27:44.373197  

 1733 14:27:44.376380  	[0x00000000001000, 0x000000000a0000)

 1734 14:27:44.376494  

 1735 14:27:44.379634  	[0x00000000100000, 0x00000030000000)

 1736 14:27:44.509343  

 1737 14:27:44.512323  	[0x00000031062170, 0x00000076a15000)

 1738 14:27:44.681231  

 1739 14:27:44.684541  	[0x00000100000000, 0x00000180400000)

 1740 14:27:45.746848  

 1741 14:27:45.747004  R8152: Initializing

 1742 14:27:45.747086  

 1743 14:27:45.749958  Version 9 (ocp_data = 6010)

 1744 14:27:45.750053  

 1745 14:27:45.753308  R8152: Done initializing

 1746 14:27:45.753389  

 1747 14:27:45.756607  Adding net device

 1748 14:27:45.756688  

 1749 14:27:45.759983  [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48

 1750 14:27:45.760069  

 1751 14:27:45.760156  

 1752 14:27:45.763128  

 1753 14:27:45.763427  Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1755 14:27:45.863813  dedede: tftpboot 192.168.201.1 10607748/tftp-deploy-mm5ps2vh/kernel/bzImage 10607748/tftp-deploy-mm5ps2vh/kernel/cmdline 10607748/tftp-deploy-mm5ps2vh/ramdisk/ramdisk.cpio.gz

 1756 14:27:45.864035  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1757 14:27:45.864166  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
 1758 14:27:45.868614  tftpboot 192.168.201.1 10607748/tftp-deploy-mm5ps2vh/kernel/bzImploy-mm5ps2vh/kernel/cmdline 10607748/tftp-deploy-mm5ps2vh/ramdisk/ramdisk.cpio.gz

 1759 14:27:45.868711  

 1760 14:27:45.868813  Waiting for link

 1761 14:27:46.070749  

 1762 14:27:46.070909  done.

 1763 14:27:46.071027  

 1764 14:27:46.071140  MAC: 00:e0:4c:78:86:ac

 1765 14:27:46.071250  

 1766 14:27:46.074032  Sending DHCP discover... done.

 1767 14:27:46.074162  

 1768 14:27:46.077330  Waiting for reply... done.

 1769 14:27:46.077454  

 1770 14:27:46.080672  Sending DHCP request... done.

 1771 14:27:46.080796  

 1772 14:27:46.083995  Waiting for reply... done.

 1773 14:27:46.084132  

 1774 14:27:46.087331  My ip is 192.168.201.16

 1775 14:27:46.087455  

 1776 14:27:46.090465  The DHCP server ip is 192.168.201.1

 1777 14:27:46.090595  

 1778 14:27:46.093847  TFTP server IP predefined by user: 192.168.201.1

 1779 14:27:46.093950  

 1780 14:27:46.100439  Bootfile predefined by user: 10607748/tftp-deploy-mm5ps2vh/kernel/bzImage

 1781 14:27:46.100567  

 1782 14:27:46.103725  Sending tftp read request... done.

 1783 14:27:46.103821  

 1784 14:27:46.110236  Waiting for the transfer... 

 1785 14:27:46.110363  

 1786 14:27:46.451875  00000000 ################################################################

 1787 14:27:46.452096  

 1788 14:27:46.720481  00080000 ################################################################

 1789 14:27:46.720646  

 1790 14:27:46.994599  00100000 ################################################################

 1791 14:27:46.994758  

 1792 14:27:47.256307  00180000 ################################################################

 1793 14:27:47.256468  

 1794 14:27:47.550540  00200000 ################################################################

 1795 14:27:47.550759  

 1796 14:27:47.849293  00280000 ################################################################

 1797 14:27:47.849509  

 1798 14:27:48.125692  00300000 ################################################################

 1799 14:27:48.125843  

 1800 14:27:48.421662  00380000 ################################################################

 1801 14:27:48.421826  

 1802 14:27:48.713380  00400000 ################################################################

 1803 14:27:48.713543  

 1804 14:27:48.989161  00480000 ################################################################

 1805 14:27:48.989317  

 1806 14:27:49.290321  00500000 ################################################################

 1807 14:27:49.290476  

 1808 14:27:49.624312  00580000 ################################################################

 1809 14:27:49.624464  

 1810 14:27:49.898799  00600000 ################################################################

 1811 14:27:49.898963  

 1812 14:27:50.168694  00680000 ################################################################

 1813 14:27:50.168855  

 1814 14:27:50.429716  00700000 ################################################################

 1815 14:27:50.429876  

 1816 14:27:50.438997  00780000 ### done.

 1817 14:27:50.439095  

 1818 14:27:50.442322  The bootfile was 7884688 bytes long.

 1819 14:27:50.442447  

 1820 14:27:50.445543  Sending tftp read request... done.

 1821 14:27:50.445638  

 1822 14:27:50.448789  Waiting for the transfer... 

 1823 14:27:50.448883  

 1824 14:27:50.713844  00000000 ################################################################

 1825 14:27:50.714011  

 1826 14:27:50.973283  00080000 ################################################################

 1827 14:27:50.973434  

 1828 14:27:51.264905  00100000 ################################################################

 1829 14:27:51.265077  

 1830 14:27:51.553805  00180000 ################################################################

 1831 14:27:51.553992  

 1832 14:27:51.813763  00200000 ################################################################

 1833 14:27:51.813929  

 1834 14:27:52.071890  00280000 ################################################################

 1835 14:27:52.072052  

 1836 14:27:52.331067  00300000 ################################################################

 1837 14:27:52.331229  

 1838 14:27:52.592789  00380000 ################################################################

 1839 14:27:52.592938  

 1840 14:27:52.854034  00400000 ################################################################

 1841 14:27:52.854179  

 1842 14:27:53.122797  00480000 ################################################################

 1843 14:27:53.122947  

 1844 14:27:53.386218  00500000 ################################################################

 1845 14:27:53.386423  

 1846 14:27:53.655946  00580000 ################################################################

 1847 14:27:53.656131  

 1848 14:27:53.953522  00600000 ################################################################

 1849 14:27:53.953678  

 1850 14:27:54.218292  00680000 ################################################################

 1851 14:27:54.218479  

 1852 14:27:54.494659  00700000 ################################################################

 1853 14:27:54.494818  

 1854 14:27:54.755729  00780000 ################################################################

 1855 14:27:54.755872  

 1856 14:27:54.973056  00800000 ###################################################### done.

 1857 14:27:54.973257  

 1858 14:27:54.976471  Sending tftp read request... done.

 1859 14:27:54.976572  

 1860 14:27:54.979780  Waiting for the transfer... 

 1861 14:27:54.979878  

 1862 14:27:54.979952  00000000 # done.

 1863 14:27:54.980023  

 1864 14:27:54.989551  Command line loaded dynamically from TFTP file: 10607748/tftp-deploy-mm5ps2vh/kernel/cmdline

 1865 14:27:54.989663  

 1866 14:27:55.002583  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 1867 14:27:55.002745  

 1868 14:27:55.005817  ec_init: CrosEC protocol v3 supported (256, 256)

 1869 14:27:55.014054  

 1870 14:27:55.017218  Shutting down all USB controllers.

 1871 14:27:55.017372  

 1872 14:27:55.017477  Removing current net device

 1873 14:27:55.017578  

 1874 14:27:55.020523  Finalizing coreboot

 1875 14:27:55.020639  

 1876 14:27:55.027044  Exiting depthcharge with code 4 at timestamp: 17536862

 1877 14:27:55.027164  

 1878 14:27:55.027270  

 1879 14:27:55.027402  Starting kernel ...

 1880 14:27:55.027520  

 1881 14:27:55.027621  

 1882 14:27:55.028277  end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
 1883 14:27:55.028416  start: 2.2.5 auto-login-action (timeout 00:04:36) [common]
 1884 14:27:55.028531  Setting prompt string to ['Linux version [0-9]']
 1885 14:27:55.028648  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1886 14:27:55.028734  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 1888 14:32:31.028711  end: 2.2.5 auto-login-action (duration 00:04:36) [common]
 1890 14:32:31.029064  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 276 seconds'
 1892 14:32:31.029325  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 1895 14:32:31.029765  end: 2 depthcharge-action (duration 00:05:00) [common]
 1897 14:32:31.030137  Cleaning after the job
 1898 14:32:31.030272  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607748/tftp-deploy-mm5ps2vh/ramdisk
 1899 14:32:31.031587  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607748/tftp-deploy-mm5ps2vh/kernel
 1900 14:32:31.032700  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607748/tftp-deploy-mm5ps2vh/modules
 1901 14:32:31.033143  start: 5.1 power-off (timeout 00:00:30) [common]
 1902 14:32:31.033473  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-2' '--port=1' '--command=off'
 1903 14:32:31.110923  >> Command sent successfully.

 1904 14:32:31.113867  Returned 0 in 0 seconds
 1905 14:32:31.214301  end: 5.1 power-off (duration 00:00:00) [common]
 1907 14:32:31.214783  start: 5.2 read-feedback (timeout 00:10:00) [common]
 1908 14:32:31.215103  Listened to connection for namespace 'common' for up to 1s
 1910 14:32:31.215627  Listened to connection for namespace 'common' for up to 1s
 1911 14:32:32.215548  Finalising connection for namespace 'common'
 1912 14:32:32.215739  Disconnecting from shell: Finalise
 1913 14:32:32.215827  
 1914 14:32:32.316187  end: 5.2 read-feedback (duration 00:00:01) [common]
 1915 14:32:32.316367  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10607748
 1916 14:32:32.331499  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10607748
 1917 14:32:32.331689  JobError: Your job cannot terminate cleanly.