Boot log: asus-C436FA-Flip-hatch

    1 14:27:22.551666  lava-dispatcher, installed at version: 2023.05.1
    2 14:27:22.551904  start: 0 validate
    3 14:27:22.552044  Start time: 2023-06-06 14:27:22.552033+00:00 (UTC)
    4 14:27:22.552169  Using caching service: 'http://localhost/cache/?uri=%s'
    5 14:27:22.552297  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230527.0%2Fx86%2Frootfs.cpio.gz exists
    6 14:27:22.838954  Using caching service: 'http://localhost/cache/?uri=%s'
    7 14:27:22.839720  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1308-ge1d2f27f3d7b0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 14:27:23.129199  Using caching service: 'http://localhost/cache/?uri=%s'
    9 14:27:23.129395  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1308-ge1d2f27f3d7b0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 14:27:28.376033  validate duration: 5.82
   12 14:27:28.377646  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 14:27:28.378345  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 14:27:28.378924  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 14:27:28.379983  Not decompressing ramdisk as can be used compressed.
   16 14:27:28.380611  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230527.0/x86/rootfs.cpio.gz
   17 14:27:28.381087  saving as /var/lib/lava/dispatcher/tmp/10607772/tftp-deploy-o2t0431k/ramdisk/rootfs.cpio.gz
   18 14:27:28.381495  total size: 8430069 (8MB)
   19 14:27:28.928706  progress   0% (0MB)
   20 14:27:28.930974  progress   5% (0MB)
   21 14:27:28.933254  progress  10% (0MB)
   22 14:27:28.935546  progress  15% (1MB)
   23 14:27:28.937850  progress  20% (1MB)
   24 14:27:28.940106  progress  25% (2MB)
   25 14:27:28.942377  progress  30% (2MB)
   26 14:27:28.944854  progress  35% (2MB)
   27 14:27:28.946927  progress  40% (3MB)
   28 14:27:28.949279  progress  45% (3MB)
   29 14:27:28.951523  progress  50% (4MB)
   30 14:27:28.953780  progress  55% (4MB)
   31 14:27:28.956017  progress  60% (4MB)
   32 14:27:28.958204  progress  65% (5MB)
   33 14:27:28.960436  progress  70% (5MB)
   34 14:27:28.962475  progress  75% (6MB)
   35 14:27:28.964739  progress  80% (6MB)
   36 14:27:28.966965  progress  85% (6MB)
   37 14:27:28.969247  progress  90% (7MB)
   38 14:27:28.971462  progress  95% (7MB)
   39 14:27:28.973738  progress 100% (8MB)
   40 14:27:28.973879  8MB downloaded in 0.59s (13.57MB/s)
   41 14:27:28.974028  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 14:27:28.974295  end: 1.1 download-retry (duration 00:00:01) [common]
   44 14:27:28.974382  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 14:27:28.974471  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 14:27:28.974698  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1308-ge1d2f27f3d7b0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 14:27:28.974772  saving as /var/lib/lava/dispatcher/tmp/10607772/tftp-deploy-o2t0431k/kernel/bzImage
   48 14:27:28.974860  total size: 7884688 (7MB)
   49 14:27:28.974957  No compression specified
   50 14:27:28.976122  progress   0% (0MB)
   51 14:27:28.978270  progress   5% (0MB)
   52 14:27:28.980370  progress  10% (0MB)
   53 14:27:28.982414  progress  15% (1MB)
   54 14:27:28.984518  progress  20% (1MB)
   55 14:27:28.986563  progress  25% (1MB)
   56 14:27:28.988672  progress  30% (2MB)
   57 14:27:28.990744  progress  35% (2MB)
   58 14:27:28.992875  progress  40% (3MB)
   59 14:27:28.994919  progress  45% (3MB)
   60 14:27:28.997008  progress  50% (3MB)
   61 14:27:28.999051  progress  55% (4MB)
   62 14:27:29.001113  progress  60% (4MB)
   63 14:27:29.003131  progress  65% (4MB)
   64 14:27:29.005208  progress  70% (5MB)
   65 14:27:29.007245  progress  75% (5MB)
   66 14:27:29.009329  progress  80% (6MB)
   67 14:27:29.011355  progress  85% (6MB)
   68 14:27:29.013465  progress  90% (6MB)
   69 14:27:29.015479  progress  95% (7MB)
   70 14:27:29.017614  progress 100% (7MB)
   71 14:27:29.017811  7MB downloaded in 0.04s (175.09MB/s)
   72 14:27:29.017950  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 14:27:29.018180  end: 1.2 download-retry (duration 00:00:00) [common]
   75 14:27:29.018268  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 14:27:29.018358  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 14:27:29.018514  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1308-ge1d2f27f3d7b0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 14:27:29.018586  saving as /var/lib/lava/dispatcher/tmp/10607772/tftp-deploy-o2t0431k/modules/modules.tar
   79 14:27:29.018653  total size: 250548 (0MB)
   80 14:27:29.018715  Using unxz to decompress xz
   81 14:27:29.022271  progress  13% (0MB)
   82 14:27:29.022677  progress  26% (0MB)
   83 14:27:29.022917  progress  39% (0MB)
   84 14:27:29.024265  progress  52% (0MB)
   85 14:27:29.026133  progress  65% (0MB)
   86 14:27:29.027950  progress  78% (0MB)
   87 14:27:29.029939  progress  91% (0MB)
   88 14:27:29.031783  progress 100% (0MB)
   89 14:27:29.037601  0MB downloaded in 0.02s (12.62MB/s)
   90 14:27:29.037863  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 14:27:29.038139  end: 1.3 download-retry (duration 00:00:00) [common]
   93 14:27:29.038244  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   94 14:27:29.038346  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
   95 14:27:29.038435  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 14:27:29.038524  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
   97 14:27:29.038760  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx
   98 14:27:29.038924  makedir: /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin
   99 14:27:29.039047  makedir: /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/tests
  100 14:27:29.039161  makedir: /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/results
  101 14:27:29.039273  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-add-keys
  102 14:27:29.039418  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-add-sources
  103 14:27:29.039550  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-background-process-start
  104 14:27:29.039685  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-background-process-stop
  105 14:27:29.039811  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-common-functions
  106 14:27:29.039982  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-echo-ipv4
  107 14:27:29.040106  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-install-packages
  108 14:27:29.040229  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-installed-packages
  109 14:27:29.040353  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-os-build
  110 14:27:29.040475  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-probe-channel
  111 14:27:29.040602  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-probe-ip
  112 14:27:29.040727  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-target-ip
  113 14:27:29.040855  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-target-mac
  114 14:27:29.040979  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-target-storage
  115 14:27:29.041106  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-test-case
  116 14:27:29.041229  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-test-event
  117 14:27:29.041350  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-test-feedback
  118 14:27:29.041474  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-test-raise
  119 14:27:29.041605  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-test-reference
  120 14:27:29.041736  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-test-runner
  121 14:27:29.041861  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-test-set
  122 14:27:29.041984  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-test-shell
  123 14:27:29.042109  Updating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-install-packages (oe)
  124 14:27:29.042258  Updating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/bin/lava-installed-packages (oe)
  125 14:27:29.042377  Creating /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/environment
  126 14:27:29.042480  LAVA metadata
  127 14:27:29.042560  - LAVA_JOB_ID=10607772
  128 14:27:29.042628  - LAVA_DISPATCHER_IP=192.168.201.1
  129 14:27:29.042728  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  130 14:27:29.042802  skipped lava-vland-overlay
  131 14:27:29.042879  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 14:27:29.042967  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  133 14:27:29.043033  skipped lava-multinode-overlay
  134 14:27:29.043107  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 14:27:29.043193  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  136 14:27:29.043271  Loading test definitions
  137 14:27:29.043373  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  138 14:27:29.043451  Using /lava-10607772 at stage 0
  139 14:27:29.043815  uuid=10607772_1.4.2.3.1 testdef=None
  140 14:27:29.043973  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 14:27:29.044094  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  142 14:27:29.044700  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 14:27:29.044946  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  145 14:27:29.045623  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 14:27:29.045859  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  148 14:27:29.046482  runner path: /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/0/tests/0_dmesg test_uuid 10607772_1.4.2.3.1
  149 14:27:29.046636  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 14:27:29.046866  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  152 14:27:29.046939  Using /lava-10607772 at stage 1
  153 14:27:29.047293  uuid=10607772_1.4.2.3.5 testdef=None
  154 14:27:29.047381  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  155 14:27:29.047471  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  156 14:27:29.047974  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  158 14:27:29.048199  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  159 14:27:29.048864  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  161 14:27:29.049095  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  162 14:27:29.049726  runner path: /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/1/tests/1_bootrr test_uuid 10607772_1.4.2.3.5
  163 14:27:29.049878  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  165 14:27:29.050096  Creating lava-test-runner.conf files
  166 14:27:29.050162  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/0 for stage 0
  167 14:27:29.050254  - 0_dmesg
  168 14:27:29.050361  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10607772/lava-overlay-2_yqifmx/lava-10607772/1 for stage 1
  169 14:27:29.050453  - 1_bootrr
  170 14:27:29.050548  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  171 14:27:29.050638  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  172 14:27:29.059373  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  173 14:27:29.059485  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  174 14:27:29.059576  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  175 14:27:29.059666  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  176 14:27:29.059752  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  177 14:27:29.309552  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  178 14:27:29.309919  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  179 14:27:29.310037  extracting modules file /var/lib/lava/dispatcher/tmp/10607772/tftp-deploy-o2t0431k/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10607772/extract-overlay-ramdisk-zl169bpv/ramdisk
  180 14:27:29.323286  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  181 14:27:29.323422  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  182 14:27:29.323518  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10607772/compress-overlay-msgv3et2/overlay-1.4.2.4.tar.gz to ramdisk
  183 14:27:29.323593  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10607772/compress-overlay-msgv3et2/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10607772/extract-overlay-ramdisk-zl169bpv/ramdisk
  184 14:27:29.332822  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  185 14:27:29.332944  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  186 14:27:29.333067  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  187 14:27:29.333183  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  188 14:27:29.333279  Building ramdisk /var/lib/lava/dispatcher/tmp/10607772/extract-overlay-ramdisk-zl169bpv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10607772/extract-overlay-ramdisk-zl169bpv/ramdisk
  189 14:27:29.471283  >> 49788 blocks

  190 14:27:30.353804  rename /var/lib/lava/dispatcher/tmp/10607772/extract-overlay-ramdisk-zl169bpv/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10607772/tftp-deploy-o2t0431k/ramdisk/ramdisk.cpio.gz
  191 14:27:30.354239  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  192 14:27:30.354367  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  193 14:27:30.354504  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  194 14:27:30.354639  No mkimage arch provided, not using FIT.
  195 14:27:30.354760  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  196 14:27:30.354878  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  197 14:27:30.355019  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  198 14:27:30.355144  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  199 14:27:30.355261  No LXC device requested
  200 14:27:30.355344  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  201 14:27:30.355436  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  202 14:27:30.355521  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  203 14:27:30.355599  Checking files for TFTP limit of 4294967296 bytes.
  204 14:27:30.356052  end: 1 tftp-deploy (duration 00:00:02) [common]
  205 14:27:30.356164  start: 2 depthcharge-action (timeout 00:05:00) [common]
  206 14:27:30.356258  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  207 14:27:30.356382  substitutions:
  208 14:27:30.356450  - {DTB}: None
  209 14:27:30.356514  - {INITRD}: 10607772/tftp-deploy-o2t0431k/ramdisk/ramdisk.cpio.gz
  210 14:27:30.356577  - {KERNEL}: 10607772/tftp-deploy-o2t0431k/kernel/bzImage
  211 14:27:30.356637  - {LAVA_MAC}: None
  212 14:27:30.356695  - {PRESEED_CONFIG}: None
  213 14:27:30.356753  - {PRESEED_LOCAL}: None
  214 14:27:30.356810  - {RAMDISK}: 10607772/tftp-deploy-o2t0431k/ramdisk/ramdisk.cpio.gz
  215 14:27:30.356868  - {ROOT_PART}: None
  216 14:27:30.356924  - {ROOT}: None
  217 14:27:30.356981  - {SERVER_IP}: 192.168.201.1
  218 14:27:30.357036  - {TEE}: None
  219 14:27:30.357092  Parsed boot commands:
  220 14:27:30.357149  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  221 14:27:30.357318  Parsed boot commands: tftpboot 192.168.201.1 10607772/tftp-deploy-o2t0431k/kernel/bzImage 10607772/tftp-deploy-o2t0431k/kernel/cmdline 10607772/tftp-deploy-o2t0431k/ramdisk/ramdisk.cpio.gz
  222 14:27:30.357408  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  223 14:27:30.357505  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  224 14:27:30.357600  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  225 14:27:30.357687  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  226 14:27:30.357765  Not connected, no need to disconnect.
  227 14:27:30.357842  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  228 14:27:30.357928  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  229 14:27:30.357995  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
  230 14:27:30.361459  Setting prompt string to ['lava-test: # ']
  231 14:27:30.361821  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  232 14:27:30.361961  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  233 14:27:30.362097  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  234 14:27:30.362225  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  235 14:27:30.362561  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
  236 14:27:35.496021  >> Command sent successfully.

  237 14:27:35.498500  Returned 0 in 5 seconds
  238 14:27:35.598909  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  240 14:27:35.599246  end: 2.2.2 reset-device (duration 00:00:05) [common]
  241 14:27:35.599352  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  242 14:27:35.599446  Setting prompt string to 'Starting depthcharge on Helios...'
  243 14:27:35.599514  Changing prompt to 'Starting depthcharge on Helios...'
  244 14:27:35.599589  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  245 14:27:35.599869  [Enter `^Ec?' for help]

  246 14:27:36.220266  

  247 14:27:36.220436  

  248 14:27:36.230300  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  249 14:27:36.233102  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  250 14:27:36.239824  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  251 14:27:36.243173  CPU: AES supported, TXT NOT supported, VT supported

  252 14:27:36.249947  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  253 14:27:36.253328  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  254 14:27:36.259858  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  255 14:27:36.263236  VBOOT: Loading verstage.

  256 14:27:36.266755  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  257 14:27:36.273494  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  258 14:27:36.276356  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  259 14:27:36.279707  CBFS @ c08000 size 3f8000

  260 14:27:36.286415  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  261 14:27:36.289755  CBFS: Locating 'fallback/verstage'

  262 14:27:36.293257  CBFS: Found @ offset 10fb80 size 1072c

  263 14:27:36.296761  

  264 14:27:36.296846  

  265 14:27:36.306436  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  266 14:27:36.320626  Probing TPM: . done!

  267 14:27:36.323979  TPM ready after 0 ms

  268 14:27:36.327296  Connected to device vid:did:rid of 1ae0:0028:00

  269 14:27:36.337491  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  270 14:27:36.340839  Initialized TPM device CR50 revision 0

  271 14:27:36.387872  tlcl_send_startup: Startup return code is 0

  272 14:27:36.388035  TPM: setup succeeded

  273 14:27:36.400591  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  274 14:27:36.404568  Chrome EC: UHEPI supported

  275 14:27:36.407887  Phase 1

  276 14:27:36.411308  FMAP: area GBB found @ c05000 (12288 bytes)

  277 14:27:36.418158  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  278 14:27:36.421009  Phase 2

  279 14:27:36.421128  Phase 3

  280 14:27:36.424321  FMAP: area GBB found @ c05000 (12288 bytes)

  281 14:27:36.431365  VB2:vb2_report_dev_firmware() This is developer signed firmware

  282 14:27:36.437593  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  283 14:27:36.440971  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  284 14:27:36.447645  VB2:vb2_verify_keyblock() Checking keyblock signature...

  285 14:27:36.463447  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  286 14:27:36.466394  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  287 14:27:36.472941  VB2:vb2_verify_fw_preamble() Verifying preamble.

  288 14:27:36.477331  Phase 4

  289 14:27:36.480748  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)

  290 14:27:36.487692  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  291 14:27:36.667102  VB2:vb2_rsa_verify_digest() Digest check failed!

  292 14:27:36.673445  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  293 14:27:36.673528  Saving nvdata

  294 14:27:36.676848  Reboot requested (10020007)

  295 14:27:36.680306  board_reset() called!

  296 14:27:36.680396  full_reset() called!

  297 14:27:41.186754  

  298 14:27:41.186895  

  299 14:27:41.196586  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  300 14:27:41.199764  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  301 14:27:41.206457  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  302 14:27:41.210199  CPU: AES supported, TXT NOT supported, VT supported

  303 14:27:41.216393  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  304 14:27:41.220273  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  305 14:27:41.226426  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  306 14:27:41.230283  VBOOT: Loading verstage.

  307 14:27:41.233663  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  308 14:27:41.240304  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  309 14:27:41.246408  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  310 14:27:41.246489  CBFS @ c08000 size 3f8000

  311 14:27:41.253199  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  312 14:27:41.256567  CBFS: Locating 'fallback/verstage'

  313 14:27:41.259721  CBFS: Found @ offset 10fb80 size 1072c

  314 14:27:41.263641  

  315 14:27:41.263744  

  316 14:27:41.273682  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  317 14:27:41.287873  Probing TPM: . done!

  318 14:27:41.291021  TPM ready after 0 ms

  319 14:27:41.294644  Connected to device vid:did:rid of 1ae0:0028:00

  320 14:27:41.304755  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  321 14:27:41.308170  Initialized TPM device CR50 revision 0

  322 14:27:41.355577  tlcl_send_startup: Startup return code is 0

  323 14:27:41.355673  TPM: setup succeeded

  324 14:27:41.368296  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  325 14:27:41.371630  Chrome EC: UHEPI supported

  326 14:27:41.375512  Phase 1

  327 14:27:41.378734  FMAP: area GBB found @ c05000 (12288 bytes)

  328 14:27:41.384986  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  329 14:27:41.391642  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  330 14:27:41.395421  Recovery requested (1009000e)

  331 14:27:41.400952  Saving nvdata

  332 14:27:41.406794  tlcl_extend: response is 0

  333 14:27:41.415741  tlcl_extend: response is 0

  334 14:27:41.422599  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  335 14:27:41.426334  CBFS @ c08000 size 3f8000

  336 14:27:41.432671  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  337 14:27:41.436070  CBFS: Locating 'fallback/romstage'

  338 14:27:41.439411  CBFS: Found @ offset 80 size 145fc

  339 14:27:41.442591  Accumulated console time in verstage 98 ms

  340 14:27:41.442698  

  341 14:27:41.442777  

  342 14:27:41.455906  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  343 14:27:41.462645  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  344 14:27:41.465982  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  345 14:27:41.469483  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  346 14:27:41.476114  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  347 14:27:41.479531  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  348 14:27:41.482437  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  349 14:27:41.485828  TCO_STS:   0000 0000

  350 14:27:41.489336  GEN_PMCON: e0015238 00000200

  351 14:27:41.492756  GBLRST_CAUSE: 00000000 00000000

  352 14:27:41.493198  prev_sleep_state 5

  353 14:27:41.496092  Boot Count incremented to 63697

  354 14:27:41.502533  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  355 14:27:41.505783  CBFS @ c08000 size 3f8000

  356 14:27:41.512019  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  357 14:27:41.512153  CBFS: Locating 'fspm.bin'

  358 14:27:41.519056  CBFS: Found @ offset 5ffc0 size 71000

  359 14:27:41.522151  Chrome EC: UHEPI supported

  360 14:27:41.528562  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  361 14:27:41.532460  Probing TPM:  done!

  362 14:27:41.539201  Connected to device vid:did:rid of 1ae0:0028:00

  363 14:27:41.548580  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  364 14:27:41.554717  Initialized TPM device CR50 revision 0

  365 14:27:41.563997  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  366 14:27:41.570765  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  367 14:27:41.574073  MRC cache found, size 1948

  368 14:27:41.577422  bootmode is set to: 2

  369 14:27:41.580752  PRMRR disabled by config.

  370 14:27:41.583560  SPD INDEX = 1

  371 14:27:41.586963  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  372 14:27:41.590240  CBFS @ c08000 size 3f8000

  373 14:27:41.597128  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  374 14:27:41.597290  CBFS: Locating 'spd.bin'

  375 14:27:41.600392  CBFS: Found @ offset 5fb80 size 400

  376 14:27:41.603745  SPD: module type is LPDDR3

  377 14:27:41.607305  SPD: module part is 

  378 14:27:41.613363  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  379 14:27:41.616619  SPD: device width 4 bits, bus width 8 bits

  380 14:27:41.619925  SPD: module size is 4096 MB (per channel)

  381 14:27:41.623679  memory slot: 0 configuration done.

  382 14:27:41.626934  memory slot: 2 configuration done.

  383 14:27:41.678187  CBMEM:

  384 14:27:41.681597  IMD: root @ 99fff000 254 entries.

  385 14:27:41.684506  IMD: root @ 99ffec00 62 entries.

  386 14:27:41.687811  External stage cache:

  387 14:27:41.691197  IMD: root @ 9abff000 254 entries.

  388 14:27:41.694531  IMD: root @ 9abfec00 62 entries.

  389 14:27:41.697808  Chrome EC: clear events_b mask to 0x0000000020004000

  390 14:27:41.714179  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  391 14:27:41.727495  tlcl_write: response is 0

  392 14:27:41.736677  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  393 14:27:41.743231  MRC: TPM MRC hash updated successfully.

  394 14:27:41.743341  2 DIMMs found

  395 14:27:41.746473  SMM Memory Map

  396 14:27:41.749643  SMRAM       : 0x9a000000 0x1000000

  397 14:27:41.753000   Subregion 0: 0x9a000000 0xa00000

  398 14:27:41.756304   Subregion 1: 0x9aa00000 0x200000

  399 14:27:41.759578   Subregion 2: 0x9ac00000 0x400000

  400 14:27:41.762939  top_of_ram = 0x9a000000

  401 14:27:41.766397  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  402 14:27:41.773000  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  403 14:27:41.776512  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  404 14:27:41.783043  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  405 14:27:41.786451  CBFS @ c08000 size 3f8000

  406 14:27:41.789229  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  407 14:27:41.792527  CBFS: Locating 'fallback/postcar'

  408 14:27:41.799191  CBFS: Found @ offset 107000 size 4b44

  409 14:27:41.802606  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  410 14:27:41.815525  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  411 14:27:41.818674  Processing 180 relocs. Offset value of 0x97c0c000

  412 14:27:41.827031  Accumulated console time in romstage 286 ms

  413 14:27:41.827138  

  414 14:27:41.827242  

  415 14:27:41.837002  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  416 14:27:41.843932  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  417 14:27:41.847153  CBFS @ c08000 size 3f8000

  418 14:27:41.850343  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  419 14:27:41.857122  CBFS: Locating 'fallback/ramstage'

  420 14:27:41.860445  CBFS: Found @ offset 43380 size 1b9e8

  421 14:27:41.867159  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  422 14:27:41.899169  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  423 14:27:41.902465  Processing 3976 relocs. Offset value of 0x98db0000

  424 14:27:41.909191  Accumulated console time in postcar 52 ms

  425 14:27:41.909269  

  426 14:27:41.909334  

  427 14:27:41.919196  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  428 14:27:41.925925  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  429 14:27:41.928828  WARNING: RO_VPD is uninitialized or empty.

  430 14:27:41.932123  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  431 14:27:41.938767  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  432 14:27:41.938855  Normal boot.

  433 14:27:41.945671  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  434 14:27:41.948958  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  435 14:27:41.952024  CBFS @ c08000 size 3f8000

  436 14:27:41.958562  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  437 14:27:41.962070  CBFS: Locating 'cpu_microcode_blob.bin'

  438 14:27:41.965322  CBFS: Found @ offset 14700 size 2ec00

  439 14:27:41.968598  microcode: sig=0x806ec pf=0x4 revision=0xc9

  440 14:27:41.971803  Skip microcode update

  441 14:27:41.978613  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  442 14:27:41.978734  CBFS @ c08000 size 3f8000

  443 14:27:41.985238  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  444 14:27:41.988659  CBFS: Locating 'fsps.bin'

  445 14:27:41.992137  CBFS: Found @ offset d1fc0 size 35000

  446 14:27:42.017324  Detected 4 core, 8 thread CPU.

  447 14:27:42.020737  Setting up SMI for CPU

  448 14:27:42.023954  IED base = 0x9ac00000

  449 14:27:42.024040  IED size = 0x00400000

  450 14:27:42.027371  Will perform SMM setup.

  451 14:27:42.034075  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  452 14:27:42.040186  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  453 14:27:42.043485  Processing 16 relocs. Offset value of 0x00030000

  454 14:27:42.047228  Attempting to start 7 APs

  455 14:27:42.050362  Waiting for 10ms after sending INIT.

  456 14:27:42.066741  Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.

  457 14:27:42.066864  done.

  458 14:27:42.070491  AP: slot 7 apic_id 3.

  459 14:27:42.073558  AP: slot 6 apic_id 2.

  460 14:27:42.076944  Waiting for 2nd SIPI to complete...done.

  461 14:27:42.080159  AP: slot 2 apic_id 6.

  462 14:27:42.080266  AP: slot 5 apic_id 7.

  463 14:27:42.083479  AP: slot 1 apic_id 4.

  464 14:27:42.086693  AP: slot 4 apic_id 5.

  465 14:27:42.093570  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  466 14:27:42.097078  Processing 13 relocs. Offset value of 0x00038000

  467 14:27:42.103689  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  468 14:27:42.110262  Installing SMM handler to 0x9a000000

  469 14:27:42.116844  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  470 14:27:42.120083  Processing 658 relocs. Offset value of 0x9a010000

  471 14:27:42.130087  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  472 14:27:42.133541  Processing 13 relocs. Offset value of 0x9a008000

  473 14:27:42.139980  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  474 14:27:42.146847  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  475 14:27:42.150140  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  476 14:27:42.156630  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  477 14:27:42.163419  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  478 14:27:42.169861  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  479 14:27:42.173440  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  480 14:27:42.180188  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  481 14:27:42.183075  Clearing SMI status registers

  482 14:27:42.186465  SMI_STS: PM1 

  483 14:27:42.187135  PM1_STS: PWRBTN 

  484 14:27:42.189760  TCO_STS: SECOND_TO 

  485 14:27:42.192997  New SMBASE 0x9a000000

  486 14:27:42.196923  In relocation handler: CPU 0

  487 14:27:42.199709  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  488 14:27:42.202754  Writing SMRR. base = 0x9a000006, mask=0xff000800

  489 14:27:42.206078  Relocation complete.

  490 14:27:42.209330  New SMBASE 0x99fff400

  491 14:27:42.209421  In relocation handler: CPU 3

  492 14:27:42.216605  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  493 14:27:42.219413  Writing SMRR. base = 0x9a000006, mask=0xff000800

  494 14:27:42.222747  Relocation complete.

  495 14:27:42.222897  New SMBASE 0x99fffc00

  496 14:27:42.225971  In relocation handler: CPU 1

  497 14:27:42.233149  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  498 14:27:42.236557  Writing SMRR. base = 0x9a000006, mask=0xff000800

  499 14:27:42.239338  Relocation complete.

  500 14:27:42.239488  New SMBASE 0x99fff000

  501 14:27:42.242628  In relocation handler: CPU 4

  502 14:27:42.249797  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  503 14:27:42.252706  Writing SMRR. base = 0x9a000006, mask=0xff000800

  504 14:27:42.255972  Relocation complete.

  505 14:27:42.256091  New SMBASE 0x99ffe800

  506 14:27:42.259390  In relocation handler: CPU 6

  507 14:27:42.262805  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  508 14:27:42.269699  Writing SMRR. base = 0x9a000006, mask=0xff000800

  509 14:27:42.272684  Relocation complete.

  510 14:27:42.272845  New SMBASE 0x99ffe400

  511 14:27:42.275715  In relocation handler: CPU 7

  512 14:27:42.279517  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  513 14:27:42.285650  Writing SMRR. base = 0x9a000006, mask=0xff000800

  514 14:27:42.289459  Relocation complete.

  515 14:27:42.289546  New SMBASE 0x99fff800

  516 14:27:42.292687  In relocation handler: CPU 2

  517 14:27:42.295980  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  518 14:27:42.302631  Writing SMRR. base = 0x9a000006, mask=0xff000800

  519 14:27:42.302750  Relocation complete.

  520 14:27:42.305893  New SMBASE 0x99ffec00

  521 14:27:42.309280  In relocation handler: CPU 5

  522 14:27:42.312575  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  523 14:27:42.319343  Writing SMRR. base = 0x9a000006, mask=0xff000800

  524 14:27:42.319435  Relocation complete.

  525 14:27:42.322609  Initializing CPU #0

  526 14:27:42.325481  CPU: vendor Intel device 806ec

  527 14:27:42.329350  CPU: family 06, model 8e, stepping 0c

  528 14:27:42.332531  Clearing out pending MCEs

  529 14:27:42.335985  Setting up local APIC...

  530 14:27:42.336118   apic_id: 0x00 done.

  531 14:27:42.339191  Turbo is available but hidden

  532 14:27:42.342481  Turbo is available and visible

  533 14:27:42.345948  VMX status: enabled

  534 14:27:42.348760  IA32_FEATURE_CONTROL status: locked

  535 14:27:42.352195  Skip microcode update

  536 14:27:42.352321  CPU #0 initialized

  537 14:27:42.355513  Initializing CPU #3

  538 14:27:42.355635  Initializing CPU #1

  539 14:27:42.358850  Initializing CPU #4

  540 14:27:42.362218  CPU: vendor Intel device 806ec

  541 14:27:42.365538  CPU: family 06, model 8e, stepping 0c

  542 14:27:42.368819  CPU: vendor Intel device 806ec

  543 14:27:42.372130  CPU: family 06, model 8e, stepping 0c

  544 14:27:42.375466  Clearing out pending MCEs

  545 14:27:42.378672  Clearing out pending MCEs

  546 14:27:42.382095  Setting up local APIC...

  547 14:27:42.385172  CPU: vendor Intel device 806ec

  548 14:27:42.388887  CPU: family 06, model 8e, stepping 0c

  549 14:27:42.391763  Clearing out pending MCEs

  550 14:27:42.391874   apic_id: 0x04 done.

  551 14:27:42.395142  Setting up local APIC...

  552 14:27:42.398691  Initializing CPU #7

  553 14:27:42.398798  Initializing CPU #6

  554 14:27:42.401774  CPU: vendor Intel device 806ec

  555 14:27:42.405229  CPU: family 06, model 8e, stepping 0c

  556 14:27:42.408667  CPU: vendor Intel device 806ec

  557 14:27:42.411846  CPU: family 06, model 8e, stepping 0c

  558 14:27:42.415188  Clearing out pending MCEs

  559 14:27:42.418583  Clearing out pending MCEs

  560 14:27:42.421819  Setting up local APIC...

  561 14:27:42.421897  Initializing CPU #2

  562 14:27:42.425297  Initializing CPU #5

  563 14:27:42.428744  CPU: vendor Intel device 806ec

  564 14:27:42.431997  CPU: family 06, model 8e, stepping 0c

  565 14:27:42.435236  CPU: vendor Intel device 806ec

  566 14:27:42.438523  CPU: family 06, model 8e, stepping 0c

  567 14:27:42.441871  Clearing out pending MCEs

  568 14:27:42.444749  Clearing out pending MCEs

  569 14:27:42.444832  Setting up local APIC...

  570 14:27:42.448226   apic_id: 0x03 done.

  571 14:27:42.451604  Setting up local APIC...

  572 14:27:42.454899  Setting up local APIC...

  573 14:27:42.454975   apic_id: 0x02 done.

  574 14:27:42.458324  VMX status: enabled

  575 14:27:42.458412  VMX status: enabled

  576 14:27:42.464956  IA32_FEATURE_CONTROL status: locked

  577 14:27:42.468314  IA32_FEATURE_CONTROL status: locked

  578 14:27:42.468416  Skip microcode update

  579 14:27:42.471641  Skip microcode update

  580 14:27:42.474951  CPU #7 initialized

  581 14:27:42.475060  CPU #6 initialized

  582 14:27:42.478292   apic_id: 0x01 done.

  583 14:27:42.478412   apic_id: 0x07 done.

  584 14:27:42.481549  Setting up local APIC...

  585 14:27:42.484931  VMX status: enabled

  586 14:27:42.485112  VMX status: enabled

  587 14:27:42.487933   apic_id: 0x05 done.

  588 14:27:42.491857  IA32_FEATURE_CONTROL status: locked

  589 14:27:42.494835  VMX status: enabled

  590 14:27:42.495000  Skip microcode update

  591 14:27:42.501680  IA32_FEATURE_CONTROL status: locked

  592 14:27:42.501894  CPU #1 initialized

  593 14:27:42.504840  Skip microcode update

  594 14:27:42.508542  IA32_FEATURE_CONTROL status: locked

  595 14:27:42.511679  CPU #4 initialized

  596 14:27:42.511988  VMX status: enabled

  597 14:27:42.515145   apic_id: 0x06 done.

  598 14:27:42.518556  IA32_FEATURE_CONTROL status: locked

  599 14:27:42.519043  VMX status: enabled

  600 14:27:42.521580  Skip microcode update

  601 14:27:42.524937  IA32_FEATURE_CONTROL status: locked

  602 14:27:42.528324  CPU #5 initialized

  603 14:27:42.528790  Skip microcode update

  604 14:27:42.531666  Skip microcode update

  605 14:27:42.534785  CPU #2 initialized

  606 14:27:42.535285  CPU #3 initialized

  607 14:27:42.541812  bsp_do_flight_plan done after 461 msecs.

  608 14:27:42.544452  CPU: frequency set to 4200 MHz

  609 14:27:42.544551  Enabling SMIs.

  610 14:27:42.544640  Locking SMM.

  611 14:27:42.561236  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  612 14:27:42.564037  CBFS @ c08000 size 3f8000

  613 14:27:42.570646  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  614 14:27:42.570754  CBFS: Locating 'vbt.bin'

  615 14:27:42.574109  CBFS: Found @ offset 5f5c0 size 499

  616 14:27:42.580603  Found a VBT of 4608 bytes after decompression

  617 14:27:42.766345  Display FSP Version Info HOB

  618 14:27:42.769635  Reference Code - CPU = 9.0.1e.30

  619 14:27:42.772855  uCode Version = 0.0.0.ca

  620 14:27:42.776154  TXT ACM version = ff.ff.ff.ffff

  621 14:27:42.779563  Display FSP Version Info HOB

  622 14:27:42.782985  Reference Code - ME = 9.0.1e.30

  623 14:27:42.786289  MEBx version = 0.0.0.0

  624 14:27:42.789668  ME Firmware Version = Consumer SKU

  625 14:27:42.792614  Display FSP Version Info HOB

  626 14:27:42.796427  Reference Code - CML PCH = 9.0.1e.30

  627 14:27:42.799206  PCH-CRID Status = Disabled

  628 14:27:42.802774  PCH-CRID Original Value = ff.ff.ff.ffff

  629 14:27:42.806125  PCH-CRID New Value = ff.ff.ff.ffff

  630 14:27:42.809411  OPROM - RST - RAID = ff.ff.ff.ffff

  631 14:27:42.812803  ChipsetInit Base Version = ff.ff.ff.ffff

  632 14:27:42.816215  ChipsetInit Oem Version = ff.ff.ff.ffff

  633 14:27:42.819799  Display FSP Version Info HOB

  634 14:27:42.825920  Reference Code - SA - System Agent = 9.0.1e.30

  635 14:27:42.829224  Reference Code - MRC = 0.7.1.6c

  636 14:27:42.829310  SA - PCIe Version = 9.0.1e.30

  637 14:27:42.832405  SA-CRID Status = Disabled

  638 14:27:42.836036  SA-CRID Original Value = 0.0.0.c

  639 14:27:42.839363  SA-CRID New Value = 0.0.0.c

  640 14:27:42.842741  OPROM - VBIOS = ff.ff.ff.ffff

  641 14:27:42.845991  RTC Init

  642 14:27:42.848976  Set power on after power failure.

  643 14:27:42.849063  Disabling Deep S3

  644 14:27:42.852305  Disabling Deep S3

  645 14:27:42.852390  Disabling Deep S4

  646 14:27:42.855547  Disabling Deep S4

  647 14:27:42.855632  Disabling Deep S5

  648 14:27:42.858908  Disabling Deep S5

  649 14:27:42.865479  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1

  650 14:27:42.865563  Enumerating buses...

  651 14:27:42.872061  Show all devs... Before device enumeration.

  652 14:27:42.872160  Root Device: enabled 1

  653 14:27:42.875402  CPU_CLUSTER: 0: enabled 1

  654 14:27:42.878749  DOMAIN: 0000: enabled 1

  655 14:27:42.882124  APIC: 00: enabled 1

  656 14:27:42.882208  PCI: 00:00.0: enabled 1

  657 14:27:42.885473  PCI: 00:02.0: enabled 1

  658 14:27:42.888812  PCI: 00:04.0: enabled 0

  659 14:27:42.892185  PCI: 00:05.0: enabled 0

  660 14:27:42.892264  PCI: 00:12.0: enabled 1

  661 14:27:42.895370  PCI: 00:12.5: enabled 0

  662 14:27:42.898722  PCI: 00:12.6: enabled 0

  663 14:27:42.898824  PCI: 00:14.0: enabled 1

  664 14:27:42.902004  PCI: 00:14.1: enabled 0

  665 14:27:42.905777  PCI: 00:14.3: enabled 1

  666 14:27:42.909036  PCI: 00:14.5: enabled 0

  667 14:27:42.909121  PCI: 00:15.0: enabled 1

  668 14:27:42.912318  PCI: 00:15.1: enabled 1

  669 14:27:42.915719  PCI: 00:15.2: enabled 0

  670 14:27:42.919036  PCI: 00:15.3: enabled 0

  671 14:27:42.919121  PCI: 00:16.0: enabled 1

  672 14:27:42.921865  PCI: 00:16.1: enabled 0

  673 14:27:42.925706  PCI: 00:16.2: enabled 0

  674 14:27:42.928893  PCI: 00:16.3: enabled 0

  675 14:27:42.928977  PCI: 00:16.4: enabled 0

  676 14:27:42.931837  PCI: 00:16.5: enabled 0

  677 14:27:42.935762  PCI: 00:17.0: enabled 1

  678 14:27:42.935854  PCI: 00:19.0: enabled 1

  679 14:27:42.938749  PCI: 00:19.1: enabled 0

  680 14:27:42.942406  PCI: 00:19.2: enabled 0

  681 14:27:42.945577  PCI: 00:1a.0: enabled 0

  682 14:27:42.945661  PCI: 00:1c.0: enabled 0

  683 14:27:42.948772  PCI: 00:1c.1: enabled 0

  684 14:27:42.952190  PCI: 00:1c.2: enabled 0

  685 14:27:42.955591  PCI: 00:1c.3: enabled 0

  686 14:27:42.955677  PCI: 00:1c.4: enabled 0

  687 14:27:42.958985  PCI: 00:1c.5: enabled 0

  688 14:27:42.962275  PCI: 00:1c.6: enabled 0

  689 14:27:42.965375  PCI: 00:1c.7: enabled 0

  690 14:27:42.965461  PCI: 00:1d.0: enabled 1

  691 14:27:42.968811  PCI: 00:1d.1: enabled 0

  692 14:27:42.972082  PCI: 00:1d.2: enabled 0

  693 14:27:42.972168  PCI: 00:1d.3: enabled 0

  694 14:27:42.975446  PCI: 00:1d.4: enabled 0

  695 14:27:42.978261  PCI: 00:1d.5: enabled 1

  696 14:27:42.982121  PCI: 00:1e.0: enabled 1

  697 14:27:42.982205  PCI: 00:1e.1: enabled 0

  698 14:27:42.984836  PCI: 00:1e.2: enabled 1

  699 14:27:42.988750  PCI: 00:1e.3: enabled 1

  700 14:27:42.991561  PCI: 00:1f.0: enabled 1

  701 14:27:42.991645  PCI: 00:1f.1: enabled 1

  702 14:27:42.994864  PCI: 00:1f.2: enabled 1

  703 14:27:42.998208  PCI: 00:1f.3: enabled 1

  704 14:27:43.001592  PCI: 00:1f.4: enabled 1

  705 14:27:43.001729  PCI: 00:1f.5: enabled 1

  706 14:27:43.004738  PCI: 00:1f.6: enabled 0

  707 14:27:43.008093  USB0 port 0: enabled 1

  708 14:27:43.008211  I2C: 00:15: enabled 1

  709 14:27:43.011838  I2C: 00:5d: enabled 1

  710 14:27:43.015136  GENERIC: 0.0: enabled 1

  711 14:27:43.015234  I2C: 00:1a: enabled 1

  712 14:27:43.018470  I2C: 00:38: enabled 1

  713 14:27:43.021355  I2C: 00:39: enabled 1

  714 14:27:43.024673  I2C: 00:3a: enabled 1

  715 14:27:43.024807  I2C: 00:3b: enabled 1

  716 14:27:43.028048  PCI: 00:00.0: enabled 1

  717 14:27:43.031326  SPI: 00: enabled 1

  718 14:27:43.031427  SPI: 01: enabled 1

  719 14:27:43.034760  PNP: 0c09.0: enabled 1

  720 14:27:43.038036  USB2 port 0: enabled 1

  721 14:27:43.038121  USB2 port 1: enabled 1

  722 14:27:43.041619  USB2 port 2: enabled 0

  723 14:27:43.044665  USB2 port 3: enabled 0

  724 14:27:43.044751  USB2 port 5: enabled 0

  725 14:27:43.048010  USB2 port 6: enabled 1

  726 14:27:43.051183  USB2 port 9: enabled 1

  727 14:27:43.051270  USB3 port 0: enabled 1

  728 14:27:43.054798  USB3 port 1: enabled 1

  729 14:27:43.058047  USB3 port 2: enabled 1

  730 14:27:43.061323  USB3 port 3: enabled 1

  731 14:27:43.061410  USB3 port 4: enabled 0

  732 14:27:43.064780  APIC: 04: enabled 1

  733 14:27:43.064866  APIC: 06: enabled 1

  734 14:27:43.068068  APIC: 01: enabled 1

  735 14:27:43.071379  APIC: 05: enabled 1

  736 14:27:43.071465  APIC: 07: enabled 1

  737 14:27:43.074632  APIC: 02: enabled 1

  738 14:27:43.077926  APIC: 03: enabled 1

  739 14:27:43.078013  Compare with tree...

  740 14:27:43.081404  Root Device: enabled 1

  741 14:27:43.084281   CPU_CLUSTER: 0: enabled 1

  742 14:27:43.084368    APIC: 00: enabled 1

  743 14:27:43.088055    APIC: 04: enabled 1

  744 14:27:43.091490    APIC: 06: enabled 1

  745 14:27:43.091576    APIC: 01: enabled 1

  746 14:27:43.094249    APIC: 05: enabled 1

  747 14:27:43.098059    APIC: 07: enabled 1

  748 14:27:43.098146    APIC: 02: enabled 1

  749 14:27:43.101461    APIC: 03: enabled 1

  750 14:27:43.104273   DOMAIN: 0000: enabled 1

  751 14:27:43.107592    PCI: 00:00.0: enabled 1

  752 14:27:43.107679    PCI: 00:02.0: enabled 1

  753 14:27:43.110888    PCI: 00:04.0: enabled 0

  754 14:27:43.114698    PCI: 00:05.0: enabled 0

  755 14:27:43.117867    PCI: 00:12.0: enabled 1

  756 14:27:43.121206    PCI: 00:12.5: enabled 0

  757 14:27:43.121293    PCI: 00:12.6: enabled 0

  758 14:27:43.124632    PCI: 00:14.0: enabled 1

  759 14:27:43.128073     USB0 port 0: enabled 1

  760 14:27:43.131364      USB2 port 0: enabled 1

  761 14:27:43.134642      USB2 port 1: enabled 1

  762 14:27:43.134730      USB2 port 2: enabled 0

  763 14:27:43.137417      USB2 port 3: enabled 0

  764 14:27:43.141184      USB2 port 5: enabled 0

  765 14:27:43.144552      USB2 port 6: enabled 1

  766 14:27:43.147784      USB2 port 9: enabled 1

  767 14:27:43.150990      USB3 port 0: enabled 1

  768 14:27:43.151077      USB3 port 1: enabled 1

  769 14:27:43.154166      USB3 port 2: enabled 1

  770 14:27:43.157556      USB3 port 3: enabled 1

  771 14:27:43.160716      USB3 port 4: enabled 0

  772 14:27:43.163969    PCI: 00:14.1: enabled 0

  773 14:27:43.164059    PCI: 00:14.3: enabled 1

  774 14:27:43.167685    PCI: 00:14.5: enabled 0

  775 14:27:43.170764    PCI: 00:15.0: enabled 1

  776 14:27:43.174086     I2C: 00:15: enabled 1

  777 14:27:43.177370    PCI: 00:15.1: enabled 1

  778 14:27:43.177457     I2C: 00:5d: enabled 1

  779 14:27:43.180696     GENERIC: 0.0: enabled 1

  780 14:27:43.184056    PCI: 00:15.2: enabled 0

  781 14:27:43.187420    PCI: 00:15.3: enabled 0

  782 14:27:43.190681    PCI: 00:16.0: enabled 1

  783 14:27:43.190768    PCI: 00:16.1: enabled 0

  784 14:27:43.194167    PCI: 00:16.2: enabled 0

  785 14:27:43.197538    PCI: 00:16.3: enabled 0

  786 14:27:43.200333    PCI: 00:16.4: enabled 0

  787 14:27:43.203720    PCI: 00:16.5: enabled 0

  788 14:27:43.203807    PCI: 00:17.0: enabled 1

  789 14:27:43.206986    PCI: 00:19.0: enabled 1

  790 14:27:43.210291     I2C: 00:1a: enabled 1

  791 14:27:43.213613     I2C: 00:38: enabled 1

  792 14:27:43.213700     I2C: 00:39: enabled 1

  793 14:27:43.217523     I2C: 00:3a: enabled 1

  794 14:27:43.220545     I2C: 00:3b: enabled 1

  795 14:27:43.223782    PCI: 00:19.1: enabled 0

  796 14:27:43.223898    PCI: 00:19.2: enabled 0

  797 14:27:43.227048    PCI: 00:1a.0: enabled 0

  798 14:27:43.230388    PCI: 00:1c.0: enabled 0

  799 14:27:43.233696    PCI: 00:1c.1: enabled 0

  800 14:27:43.237001    PCI: 00:1c.2: enabled 0

  801 14:27:43.237094    PCI: 00:1c.3: enabled 0

  802 14:27:43.240293    PCI: 00:1c.4: enabled 0

  803 14:27:43.243600    PCI: 00:1c.5: enabled 0

  804 14:27:43.247047    PCI: 00:1c.6: enabled 0

  805 14:27:43.250497    PCI: 00:1c.7: enabled 0

  806 14:27:43.250599    PCI: 00:1d.0: enabled 1

  807 14:27:43.253801    PCI: 00:1d.1: enabled 0

  808 14:27:43.257044    PCI: 00:1d.2: enabled 0

  809 14:27:43.260327    PCI: 00:1d.3: enabled 0

  810 14:27:43.263428    PCI: 00:1d.4: enabled 0

  811 14:27:43.263541    PCI: 00:1d.5: enabled 1

  812 14:27:43.266965     PCI: 00:00.0: enabled 1

  813 14:27:43.270051    PCI: 00:1e.0: enabled 1

  814 14:27:43.273528    PCI: 00:1e.1: enabled 0

  815 14:27:43.276967    PCI: 00:1e.2: enabled 1

  816 14:27:43.277084     SPI: 00: enabled 1

  817 14:27:43.280113    PCI: 00:1e.3: enabled 1

  818 14:27:43.283470     SPI: 01: enabled 1

  819 14:27:43.286752    PCI: 00:1f.0: enabled 1

  820 14:27:43.286869     PNP: 0c09.0: enabled 1

  821 14:27:43.290145    PCI: 00:1f.1: enabled 1

  822 14:27:43.293170    PCI: 00:1f.2: enabled 1

  823 14:27:43.296691    PCI: 00:1f.3: enabled 1

  824 14:27:43.296792    PCI: 00:1f.4: enabled 1

  825 14:27:43.300024    PCI: 00:1f.5: enabled 1

  826 14:27:43.303204    PCI: 00:1f.6: enabled 0

  827 14:27:43.306676  Root Device scanning...

  828 14:27:43.309961  scan_static_bus for Root Device

  829 14:27:43.313424  CPU_CLUSTER: 0 enabled

  830 14:27:43.313538  DOMAIN: 0000 enabled

  831 14:27:43.316823  DOMAIN: 0000 scanning...

  832 14:27:43.319981  PCI: pci_scan_bus for bus 00

  833 14:27:43.323217  PCI: 00:00.0 [8086/0000] ops

  834 14:27:43.326861  PCI: 00:00.0 [8086/9b61] enabled

  835 14:27:43.329686  PCI: 00:02.0 [8086/0000] bus ops

  836 14:27:43.333057  PCI: 00:02.0 [8086/9b41] enabled

  837 14:27:43.336512  PCI: 00:04.0 [8086/1903] disabled

  838 14:27:43.339791  PCI: 00:08.0 [8086/1911] enabled

  839 14:27:43.343220  PCI: 00:12.0 [8086/02f9] enabled

  840 14:27:43.346375  PCI: 00:14.0 [8086/0000] bus ops

  841 14:27:43.349709  PCI: 00:14.0 [8086/02ed] enabled

  842 14:27:43.353047  PCI: 00:14.2 [8086/02ef] enabled

  843 14:27:43.356378  PCI: 00:14.3 [8086/02f0] enabled

  844 14:27:43.359576  PCI: 00:15.0 [8086/0000] bus ops

  845 14:27:43.362987  PCI: 00:15.0 [8086/02e8] enabled

  846 14:27:43.366290  PCI: 00:15.1 [8086/0000] bus ops

  847 14:27:43.369859  PCI: 00:15.1 [8086/02e9] enabled

  848 14:27:43.373041  PCI: 00:16.0 [8086/0000] ops

  849 14:27:43.376373  PCI: 00:16.0 [8086/02e0] enabled

  850 14:27:43.379864  PCI: 00:17.0 [8086/0000] ops

  851 14:27:43.383041  PCI: 00:17.0 [8086/02d3] enabled

  852 14:27:43.386179  PCI: 00:19.0 [8086/0000] bus ops

  853 14:27:43.389445  PCI: 00:19.0 [8086/02c5] enabled

  854 14:27:43.392849  PCI: 00:1d.0 [8086/0000] bus ops

  855 14:27:43.396643  PCI: 00:1d.0 [8086/02b0] enabled

  856 14:27:43.399512  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  857 14:27:43.402880  PCI: 00:1e.0 [8086/0000] ops

  858 14:27:43.406159  PCI: 00:1e.0 [8086/02a8] enabled

  859 14:27:43.409565  PCI: 00:1e.2 [8086/0000] bus ops

  860 14:27:43.412924  PCI: 00:1e.2 [8086/02aa] enabled

  861 14:27:43.416327  PCI: 00:1e.3 [8086/0000] bus ops

  862 14:27:43.419630  PCI: 00:1e.3 [8086/02ab] enabled

  863 14:27:43.423059  PCI: 00:1f.0 [8086/0000] bus ops

  864 14:27:43.426492  PCI: 00:1f.0 [8086/0284] enabled

  865 14:27:43.432836  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  866 14:27:43.439570  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  867 14:27:43.442854  PCI: 00:1f.3 [8086/0000] bus ops

  868 14:27:43.446157  PCI: 00:1f.3 [8086/02c8] enabled

  869 14:27:43.449575  PCI: 00:1f.4 [8086/0000] bus ops

  870 14:27:43.452767  PCI: 00:1f.4 [8086/02a3] enabled

  871 14:27:43.456243  PCI: 00:1f.5 [8086/0000] bus ops

  872 14:27:43.459652  PCI: 00:1f.5 [8086/02a4] enabled

  873 14:27:43.462884  PCI: Leftover static devices:

  874 14:27:43.462980  PCI: 00:05.0

  875 14:27:43.463046  PCI: 00:12.5

  876 14:27:43.466215  PCI: 00:12.6

  877 14:27:43.466292  PCI: 00:14.1

  878 14:27:43.469269  PCI: 00:14.5

  879 14:27:43.469368  PCI: 00:15.2

  880 14:27:43.469459  PCI: 00:15.3

  881 14:27:43.472535  PCI: 00:16.1

  882 14:27:43.472620  PCI: 00:16.2

  883 14:27:43.476204  PCI: 00:16.3

  884 14:27:43.476294  PCI: 00:16.4

  885 14:27:43.479532  PCI: 00:16.5

  886 14:27:43.479634  PCI: 00:19.1

  887 14:27:43.479727  PCI: 00:19.2

  888 14:27:43.482681  PCI: 00:1a.0

  889 14:27:43.482792  PCI: 00:1c.0

  890 14:27:43.485837  PCI: 00:1c.1

  891 14:27:43.485922  PCI: 00:1c.2

  892 14:27:43.486005  PCI: 00:1c.3

  893 14:27:43.489334  PCI: 00:1c.4

  894 14:27:43.489450  PCI: 00:1c.5

  895 14:27:43.492708  PCI: 00:1c.6

  896 14:27:43.492790  PCI: 00:1c.7

  897 14:27:43.492855  PCI: 00:1d.1

  898 14:27:43.495724  PCI: 00:1d.2

  899 14:27:43.495827  PCI: 00:1d.3

  900 14:27:43.498951  PCI: 00:1d.4

  901 14:27:43.499053  PCI: 00:1d.5

  902 14:27:43.502336  PCI: 00:1e.1

  903 14:27:43.502438  PCI: 00:1f.1

  904 14:27:43.502530  PCI: 00:1f.2

  905 14:27:43.505583  PCI: 00:1f.6

  906 14:27:43.508986  PCI: Check your devicetree.cb.

  907 14:27:43.509072  PCI: 00:02.0 scanning...

  908 14:27:43.516257  scan_generic_bus for PCI: 00:02.0

  909 14:27:43.519189  scan_generic_bus for PCI: 00:02.0 done

  910 14:27:43.522513  scan_bus: scanning of bus PCI: 00:02.0 took 10187 usecs

  911 14:27:43.525903  PCI: 00:14.0 scanning...

  912 14:27:43.529251  scan_static_bus for PCI: 00:14.0

  913 14:27:43.532537  USB0 port 0 enabled

  914 14:27:43.535728  USB0 port 0 scanning...

  915 14:27:43.539104  scan_static_bus for USB0 port 0

  916 14:27:43.539190  USB2 port 0 enabled

  917 14:27:43.542339  USB2 port 1 enabled

  918 14:27:43.545777  USB2 port 2 disabled

  919 14:27:43.545862  USB2 port 3 disabled

  920 14:27:43.548987  USB2 port 5 disabled

  921 14:27:43.549071  USB2 port 6 enabled

  922 14:27:43.552363  USB2 port 9 enabled

  923 14:27:43.555661  USB3 port 0 enabled

  924 14:27:43.555772  USB3 port 1 enabled

  925 14:27:43.559091  USB3 port 2 enabled

  926 14:27:43.559202  USB3 port 3 enabled

  927 14:27:43.562256  USB3 port 4 disabled

  928 14:27:43.565711  USB2 port 0 scanning...

  929 14:27:43.569069  scan_static_bus for USB2 port 0

  930 14:27:43.572405  scan_static_bus for USB2 port 0 done

  931 14:27:43.579088  scan_bus: scanning of bus USB2 port 0 took 9687 usecs

  932 14:27:43.579174  USB2 port 1 scanning...

  933 14:27:43.582203  scan_static_bus for USB2 port 1

  934 14:27:43.588917  scan_static_bus for USB2 port 1 done

  935 14:27:43.592100  scan_bus: scanning of bus USB2 port 1 took 9686 usecs

  936 14:27:43.595724  USB2 port 6 scanning...

  937 14:27:43.598967  scan_static_bus for USB2 port 6

  938 14:27:43.602086  scan_static_bus for USB2 port 6 done

  939 14:27:43.608742  scan_bus: scanning of bus USB2 port 6 took 9704 usecs

  940 14:27:43.608828  USB2 port 9 scanning...

  941 14:27:43.612207  scan_static_bus for USB2 port 9

  942 14:27:43.618904  scan_static_bus for USB2 port 9 done

  943 14:27:43.622320  scan_bus: scanning of bus USB2 port 9 took 9705 usecs

  944 14:27:43.625631  USB3 port 0 scanning...

  945 14:27:43.628926  scan_static_bus for USB3 port 0

  946 14:27:43.632116  scan_static_bus for USB3 port 0 done

  947 14:27:43.638589  scan_bus: scanning of bus USB3 port 0 took 9696 usecs

  948 14:27:43.638675  USB3 port 1 scanning...

  949 14:27:43.642587  scan_static_bus for USB3 port 1

  950 14:27:43.648792  scan_static_bus for USB3 port 1 done

  951 14:27:43.651999  scan_bus: scanning of bus USB3 port 1 took 9703 usecs

  952 14:27:43.655351  USB3 port 2 scanning...

  953 14:27:43.658810  scan_static_bus for USB3 port 2

  954 14:27:43.662050  scan_static_bus for USB3 port 2 done

  955 14:27:43.668619  scan_bus: scanning of bus USB3 port 2 took 9706 usecs

  956 14:27:43.668701  USB3 port 3 scanning...

  957 14:27:43.672255  scan_static_bus for USB3 port 3

  958 14:27:43.678843  scan_static_bus for USB3 port 3 done

  959 14:27:43.682128  scan_bus: scanning of bus USB3 port 3 took 9690 usecs

  960 14:27:43.685252  scan_static_bus for USB0 port 0 done

  961 14:27:43.691852  scan_bus: scanning of bus USB0 port 0 took 155304 usecs

  962 14:27:43.695283  scan_static_bus for PCI: 00:14.0 done

  963 14:27:43.702131  scan_bus: scanning of bus PCI: 00:14.0 took 172914 usecs

  964 14:27:43.705332  PCI: 00:15.0 scanning...

  965 14:27:43.708477  scan_generic_bus for PCI: 00:15.0

  966 14:27:43.711688  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

  967 14:27:43.715249  scan_generic_bus for PCI: 00:15.0 done

  968 14:27:43.721667  scan_bus: scanning of bus PCI: 00:15.0 took 14291 usecs

  969 14:27:43.725082  PCI: 00:15.1 scanning...

  970 14:27:43.728612  scan_generic_bus for PCI: 00:15.1

  971 14:27:43.732003  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

  972 14:27:43.735224  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

  973 14:27:43.738398  scan_generic_bus for PCI: 00:15.1 done

  974 14:27:43.744897  scan_bus: scanning of bus PCI: 00:15.1 took 18598 usecs

  975 14:27:43.748168  PCI: 00:19.0 scanning...

  976 14:27:43.751696  scan_generic_bus for PCI: 00:19.0

  977 14:27:43.754858  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

  978 14:27:43.758290  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

  979 14:27:43.765139  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

  980 14:27:43.768328  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

  981 14:27:43.771772  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

  982 14:27:43.774979  scan_generic_bus for PCI: 00:19.0 done

  983 14:27:43.781236  scan_bus: scanning of bus PCI: 00:19.0 took 30730 usecs

  984 14:27:43.785040  PCI: 00:1d.0 scanning...

  985 14:27:43.788143  do_pci_scan_bridge for PCI: 00:1d.0

  986 14:27:43.791251  PCI: pci_scan_bus for bus 01

  987 14:27:43.794513  PCI: 01:00.0 [1c5c/1327] enabled

  988 14:27:43.797986  Enabling Common Clock Configuration

  989 14:27:43.801232  L1 Sub-State supported from root port 29

  990 14:27:43.804570  L1 Sub-State Support = 0xf

  991 14:27:43.808469  CommonModeRestoreTime = 0x28

  992 14:27:43.811464  Power On Value = 0x16, Power On Scale = 0x0

  993 14:27:43.814501  ASPM: Enabled L1

  994 14:27:43.818176  scan_bus: scanning of bus PCI: 00:1d.0 took 32782 usecs

  995 14:27:43.821590  PCI: 00:1e.2 scanning...

  996 14:27:43.824972  scan_generic_bus for PCI: 00:1e.2

  997 14:27:43.827736  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

  998 14:27:43.834480  scan_generic_bus for PCI: 00:1e.2 done

  999 14:27:43.837873  scan_bus: scanning of bus PCI: 00:1e.2 took 14002 usecs

 1000 14:27:43.841165  PCI: 00:1e.3 scanning...

 1001 14:27:43.844526  scan_generic_bus for PCI: 00:1e.3

 1002 14:27:43.848116  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1003 14:27:43.854811  scan_generic_bus for PCI: 00:1e.3 done

 1004 14:27:43.858109  scan_bus: scanning of bus PCI: 00:1e.3 took 14008 usecs

 1005 14:27:43.861400  PCI: 00:1f.0 scanning...

 1006 14:27:43.864697  scan_static_bus for PCI: 00:1f.0

 1007 14:27:43.867997  PNP: 0c09.0 enabled

 1008 14:27:43.871298  scan_static_bus for PCI: 00:1f.0 done

 1009 14:27:43.874673  scan_bus: scanning of bus PCI: 00:1f.0 took 12036 usecs

 1010 14:27:43.877953  PCI: 00:1f.3 scanning...

 1011 14:27:43.884531  scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs

 1012 14:27:43.887747  PCI: 00:1f.4 scanning...

 1013 14:27:43.891043  scan_generic_bus for PCI: 00:1f.4

 1014 14:27:43.894271  scan_generic_bus for PCI: 00:1f.4 done

 1015 14:27:43.901114  scan_bus: scanning of bus PCI: 00:1f.4 took 10194 usecs

 1016 14:27:43.901196  PCI: 00:1f.5 scanning...

 1017 14:27:43.907838  scan_generic_bus for PCI: 00:1f.5

 1018 14:27:43.911265  scan_generic_bus for PCI: 00:1f.5 done

 1019 14:27:43.914627  scan_bus: scanning of bus PCI: 00:1f.5 took 10194 usecs

 1020 14:27:43.920883  scan_bus: scanning of bus DOMAIN: 0000 took 604921 usecs

 1021 14:27:43.924676  scan_static_bus for Root Device done

 1022 14:27:43.931241  scan_bus: scanning of bus Root Device took 624790 usecs

 1023 14:27:43.931334  done

 1024 14:27:43.934599  Chrome EC: UHEPI supported

 1025 14:27:43.941237  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1026 14:27:43.947532  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1027 14:27:43.950820  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1028 14:27:43.958985  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1029 14:27:43.962460  SPI flash protection: WPSW=0 SRP0=0

 1030 14:27:43.969262  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1031 14:27:43.972523  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2

 1032 14:27:43.975816  found VGA at PCI: 00:02.0

 1033 14:27:43.979072  Setting up VGA for PCI: 00:02.0

 1034 14:27:43.985761  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1035 14:27:43.989101  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1036 14:27:43.992505  Allocating resources...

 1037 14:27:43.995715  Reading resources...

 1038 14:27:43.998945  Root Device read_resources bus 0 link: 0

 1039 14:27:44.002367  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1040 14:27:44.008590  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1041 14:27:44.012025  DOMAIN: 0000 read_resources bus 0 link: 0

 1042 14:27:44.019087  PCI: 00:14.0 read_resources bus 0 link: 0

 1043 14:27:44.022424  USB0 port 0 read_resources bus 0 link: 0

 1044 14:27:44.030363  USB0 port 0 read_resources bus 0 link: 0 done

 1045 14:27:44.034047  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1046 14:27:44.041249  PCI: 00:15.0 read_resources bus 1 link: 0

 1047 14:27:44.044634  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1048 14:27:44.051315  PCI: 00:15.1 read_resources bus 2 link: 0

 1049 14:27:44.054258  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1050 14:27:44.062291  PCI: 00:19.0 read_resources bus 3 link: 0

 1051 14:27:44.068921  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1052 14:27:44.072323  PCI: 00:1d.0 read_resources bus 1 link: 0

 1053 14:27:44.078450  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1054 14:27:44.081713  PCI: 00:1e.2 read_resources bus 4 link: 0

 1055 14:27:44.088412  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1056 14:27:44.091772  PCI: 00:1e.3 read_resources bus 5 link: 0

 1057 14:27:44.098725  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1058 14:27:44.101652  PCI: 00:1f.0 read_resources bus 0 link: 0

 1059 14:27:44.108687  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1060 14:27:44.115295  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1061 14:27:44.118655  Root Device read_resources bus 0 link: 0 done

 1062 14:27:44.122057  Done reading resources.

 1063 14:27:44.125508  Show resources in subtree (Root Device)...After reading.

 1064 14:27:44.131615   Root Device child on link 0 CPU_CLUSTER: 0

 1065 14:27:44.135171    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1066 14:27:44.135255     APIC: 00

 1067 14:27:44.138240     APIC: 04

 1068 14:27:44.138324     APIC: 06

 1069 14:27:44.141475     APIC: 01

 1070 14:27:44.141559     APIC: 05

 1071 14:27:44.141626     APIC: 07

 1072 14:27:44.145281     APIC: 02

 1073 14:27:44.145365     APIC: 03

 1074 14:27:44.148468    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1075 14:27:44.204707    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1076 14:27:44.205051    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1077 14:27:44.205129     PCI: 00:00.0

 1078 14:27:44.205232     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1079 14:27:44.205323     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1080 14:27:44.205430     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1081 14:27:44.245134     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1082 14:27:44.245478     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1083 14:27:44.245685     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1084 14:27:44.245773     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1085 14:27:44.248820     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1086 14:27:44.255510     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1087 14:27:44.262236     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1088 14:27:44.272225     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1089 14:27:44.282280     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1090 14:27:44.292064     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1091 14:27:44.302060     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1092 14:27:44.312122     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1093 14:27:44.318823     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1094 14:27:44.321583     PCI: 00:02.0

 1095 14:27:44.331555     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1096 14:27:44.341618     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1097 14:27:44.351493     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1098 14:27:44.351582     PCI: 00:04.0

 1099 14:27:44.355130     PCI: 00:08.0

 1100 14:27:44.364804     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1101 14:27:44.364921     PCI: 00:12.0

 1102 14:27:44.374608     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1103 14:27:44.381229     PCI: 00:14.0 child on link 0 USB0 port 0

 1104 14:27:44.391456     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1105 14:27:44.394680      USB0 port 0 child on link 0 USB2 port 0

 1106 14:27:44.394787       USB2 port 0

 1107 14:27:44.397975       USB2 port 1

 1108 14:27:44.398082       USB2 port 2

 1109 14:27:44.401278       USB2 port 3

 1110 14:27:44.404591       USB2 port 5

 1111 14:27:44.404672       USB2 port 6

 1112 14:27:44.407811       USB2 port 9

 1113 14:27:44.407915       USB3 port 0

 1114 14:27:44.411267       USB3 port 1

 1115 14:27:44.411369       USB3 port 2

 1116 14:27:44.414660       USB3 port 3

 1117 14:27:44.414764       USB3 port 4

 1118 14:27:44.418033     PCI: 00:14.2

 1119 14:27:44.427815     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1120 14:27:44.438014     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1121 14:27:44.438124     PCI: 00:14.3

 1122 14:27:44.447518     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1123 14:27:44.450859     PCI: 00:15.0 child on link 0 I2C: 01:15

 1124 14:27:44.461081     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1125 14:27:44.464618      I2C: 01:15

 1126 14:27:44.467490     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1127 14:27:44.477725     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1128 14:27:44.481013      I2C: 02:5d

 1129 14:27:44.481122      GENERIC: 0.0

 1130 14:27:44.484021     PCI: 00:16.0

 1131 14:27:44.493915     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1132 14:27:44.494028     PCI: 00:17.0

 1133 14:27:44.504435     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1134 14:27:44.514220     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1135 14:27:44.520954     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1136 14:27:44.530828     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1137 14:27:44.537719     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1138 14:27:44.547179     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1139 14:27:44.550467     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1140 14:27:44.560513     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1141 14:27:44.563817      I2C: 03:1a

 1142 14:27:44.563934      I2C: 03:38

 1143 14:27:44.567122      I2C: 03:39

 1144 14:27:44.567269      I2C: 03:3a

 1145 14:27:44.567371      I2C: 03:3b

 1146 14:27:44.573837     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1147 14:27:44.580246     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1148 14:27:44.590449     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1149 14:27:44.600253     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1150 14:27:44.603609      PCI: 01:00.0

 1151 14:27:44.613504      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1152 14:27:44.613664     PCI: 00:1e.0

 1153 14:27:44.626559     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1154 14:27:44.636728     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1155 14:27:44.640045     PCI: 00:1e.2 child on link 0 SPI: 00

 1156 14:27:44.650262     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1157 14:27:44.650378      SPI: 00

 1158 14:27:44.653359     PCI: 00:1e.3 child on link 0 SPI: 01

 1159 14:27:44.663245     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1160 14:27:44.666582      SPI: 01

 1161 14:27:44.669796     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1162 14:27:44.679898     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1163 14:27:44.686275     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1164 14:27:44.689266      PNP: 0c09.0

 1165 14:27:44.699281      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1166 14:27:44.699373     PCI: 00:1f.3

 1167 14:27:44.709665     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1168 14:27:44.719530     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1169 14:27:44.722876     PCI: 00:1f.4

 1170 14:27:44.729357     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1171 14:27:44.739546     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1172 14:27:44.742775     PCI: 00:1f.5

 1173 14:27:44.752305     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1174 14:27:44.755739  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1175 14:27:44.762456  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1176 14:27:44.769233  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1177 14:27:44.772474  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1178 14:27:44.779000  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1179 14:27:44.782350  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1180 14:27:44.785812  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1181 14:27:44.792381  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1182 14:27:44.798753  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1183 14:27:44.805537  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1184 14:27:44.815042  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1185 14:27:44.822117  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1186 14:27:44.825562  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1187 14:27:44.831642  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1188 14:27:44.838546  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1189 14:27:44.841803  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1190 14:27:44.848415  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1191 14:27:44.851875  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1192 14:27:44.858472  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1193 14:27:44.861728  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1194 14:27:44.868403  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1195 14:27:44.871249  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1196 14:27:44.877983  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1197 14:27:44.881265  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1198 14:27:44.884723  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1199 14:27:44.891317  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1200 14:27:44.894694  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1201 14:27:44.901196  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1202 14:27:44.904418  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1203 14:27:44.911619  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1204 14:27:44.914598  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1205 14:27:44.921096  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1206 14:27:44.924705  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1207 14:27:44.930994  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1208 14:27:44.934443  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1209 14:27:44.941264  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1210 14:27:44.944595  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1211 14:27:44.954655  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1212 14:27:44.957405  avoid_fixed_resources: DOMAIN: 0000

 1213 14:27:44.961177  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1214 14:27:44.967868  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1215 14:27:44.977378  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1216 14:27:44.984269  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1217 14:27:44.990902  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1218 14:27:45.000885  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1219 14:27:45.007427  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1220 14:27:45.014379  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1221 14:27:45.020693  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1222 14:27:45.030787  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1223 14:27:45.037365  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1224 14:27:45.044226  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1225 14:27:45.047397  Setting resources...

 1226 14:27:45.054084  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1227 14:27:45.057597  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1228 14:27:45.060906  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1229 14:27:45.064432  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1230 14:27:45.067240  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1231 14:27:45.074015  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1232 14:27:45.080550  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1233 14:27:45.087120  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1234 14:27:45.093827  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1235 14:27:45.100541  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1236 14:27:45.103995  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1237 14:27:45.110555  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1238 14:27:45.113922  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1239 14:27:45.120254  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1240 14:27:45.123475  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1241 14:27:45.130253  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1242 14:27:45.133424  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1243 14:27:45.140511  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1244 14:27:45.143820  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1245 14:27:45.149925  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1246 14:27:45.153256  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1247 14:27:45.159969  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1248 14:27:45.163298  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1249 14:27:45.170012  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1250 14:27:45.173178  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1251 14:27:45.176546  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1252 14:27:45.183290  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1253 14:27:45.186634  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1254 14:27:45.193093  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1255 14:27:45.196504  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1256 14:27:45.203008  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1257 14:27:45.206311  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1258 14:27:45.216279  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1259 14:27:45.223177  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1260 14:27:45.229361  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1261 14:27:45.236165  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1262 14:27:45.242587  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1263 14:27:45.249244  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1264 14:27:45.252677  Root Device assign_resources, bus 0 link: 0

 1265 14:27:45.259378  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1266 14:27:45.265689  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1267 14:27:45.275663  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1268 14:27:45.282232  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1269 14:27:45.292142  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1270 14:27:45.298948  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1271 14:27:45.308996  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1272 14:27:45.312409  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1273 14:27:45.315541  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1274 14:27:45.325711  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1275 14:27:45.331999  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1276 14:27:45.341796  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1277 14:27:45.348762  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1278 14:27:45.355252  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1279 14:27:45.358655  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1280 14:27:45.368784  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1281 14:27:45.372014  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1282 14:27:45.375354  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1283 14:27:45.385432  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1284 14:27:45.392010  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1285 14:27:45.401832  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1286 14:27:45.408526  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1287 14:27:45.415335  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1288 14:27:45.424834  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1289 14:27:45.431355  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1290 14:27:45.438302  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1291 14:27:45.444716  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1292 14:27:45.448298  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1293 14:27:45.457917  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1294 14:27:45.467943  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1295 14:27:45.474727  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1296 14:27:45.481462  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1297 14:27:45.487575  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1298 14:27:45.491268  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1299 14:27:45.501446  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1300 14:27:45.508061  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1301 14:27:45.514668  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1302 14:27:45.517920  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1303 14:27:45.527535  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1304 14:27:45.530960  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1305 14:27:45.534260  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1306 14:27:45.541249  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1307 14:27:45.544717  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1308 14:27:45.551061  LPC: Trying to open IO window from 800 size 1ff

 1309 14:27:45.557962  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1310 14:27:45.567801  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1311 14:27:45.574551  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1312 14:27:45.584441  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1313 14:27:45.587770  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1314 14:27:45.594419  Root Device assign_resources, bus 0 link: 0

 1315 14:27:45.594527  Done setting resources.

 1316 14:27:45.601176  Show resources in subtree (Root Device)...After assigning values.

 1317 14:27:45.607889   Root Device child on link 0 CPU_CLUSTER: 0

 1318 14:27:45.610705    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1319 14:27:45.610786     APIC: 00

 1320 14:27:45.614525     APIC: 04

 1321 14:27:45.614605     APIC: 06

 1322 14:27:45.614668     APIC: 01

 1323 14:27:45.617334     APIC: 05

 1324 14:27:45.617414     APIC: 07

 1325 14:27:45.617478     APIC: 02

 1326 14:27:45.621147     APIC: 03

 1327 14:27:45.624089    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1328 14:27:45.634110    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1329 14:27:45.647343    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1330 14:27:45.647429     PCI: 00:00.0

 1331 14:27:45.657097     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1332 14:27:45.666944     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1333 14:27:45.676741     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1334 14:27:45.683480     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1335 14:27:45.693406     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1336 14:27:45.703311     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1337 14:27:45.713349     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1338 14:27:45.722988     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1339 14:27:45.733022     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1340 14:27:45.739632     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1341 14:27:45.749499     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1342 14:27:45.759445     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1343 14:27:45.769011     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1344 14:27:45.779298     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1345 14:27:45.789216     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1346 14:27:45.795825     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1347 14:27:45.799183     PCI: 00:02.0

 1348 14:27:45.809015     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1349 14:27:45.819081     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1350 14:27:45.829158     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1351 14:27:45.831844     PCI: 00:04.0

 1352 14:27:45.831965     PCI: 00:08.0

 1353 14:27:45.842315     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1354 14:27:45.845571     PCI: 00:12.0

 1355 14:27:45.855029     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1356 14:27:45.858363     PCI: 00:14.0 child on link 0 USB0 port 0

 1357 14:27:45.868457     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1358 14:27:45.874988      USB0 port 0 child on link 0 USB2 port 0

 1359 14:27:45.875073       USB2 port 0

 1360 14:27:45.878178       USB2 port 1

 1361 14:27:45.878277       USB2 port 2

 1362 14:27:45.881853       USB2 port 3

 1363 14:27:45.881937       USB2 port 5

 1364 14:27:45.884970       USB2 port 6

 1365 14:27:45.885054       USB2 port 9

 1366 14:27:45.888189       USB3 port 0

 1367 14:27:45.888272       USB3 port 1

 1368 14:27:45.891493       USB3 port 2

 1369 14:27:45.891577       USB3 port 3

 1370 14:27:45.894771       USB3 port 4

 1371 14:27:45.894855     PCI: 00:14.2

 1372 14:27:45.908368     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1373 14:27:45.918370     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1374 14:27:45.918481     PCI: 00:14.3

 1375 14:27:45.927931     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1376 14:27:45.934640     PCI: 00:15.0 child on link 0 I2C: 01:15

 1377 14:27:45.944439     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1378 14:27:45.944521      I2C: 01:15

 1379 14:27:45.951002     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1380 14:27:45.960978     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1381 14:27:45.961062      I2C: 02:5d

 1382 14:27:45.964374      GENERIC: 0.0

 1383 14:27:45.964452     PCI: 00:16.0

 1384 14:27:45.974383     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1385 14:27:45.977830     PCI: 00:17.0

 1386 14:27:45.987906     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1387 14:27:45.997438     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1388 14:27:46.007409     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1389 14:27:46.014040     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1390 14:27:46.024110     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1391 14:27:46.034036     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1392 14:27:46.040772     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1393 14:27:46.050533     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1394 14:27:46.050619      I2C: 03:1a

 1395 14:27:46.053318      I2C: 03:38

 1396 14:27:46.053401      I2C: 03:39

 1397 14:27:46.057212      I2C: 03:3a

 1398 14:27:46.057308      I2C: 03:3b

 1399 14:27:46.060471     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1400 14:27:46.070065     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1401 14:27:46.080085     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1402 14:27:46.089910     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1403 14:27:46.093028      PCI: 01:00.0

 1404 14:27:46.103458      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1405 14:27:46.106282     PCI: 00:1e.0

 1406 14:27:46.116199     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1407 14:27:46.126279     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1408 14:27:46.129682     PCI: 00:1e.2 child on link 0 SPI: 00

 1409 14:27:46.139526     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1410 14:27:46.142801      SPI: 00

 1411 14:27:46.146063     PCI: 00:1e.3 child on link 0 SPI: 01

 1412 14:27:46.155817     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1413 14:27:46.155939      SPI: 01

 1414 14:27:46.162625     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1415 14:27:46.169360     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1416 14:27:46.179004     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1417 14:27:46.182291      PNP: 0c09.0

 1418 14:27:46.188888      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1419 14:27:46.192039     PCI: 00:1f.3

 1420 14:27:46.202337     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1421 14:27:46.212163     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1422 14:27:46.215312     PCI: 00:1f.4

 1423 14:27:46.222003     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1424 14:27:46.231958     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1425 14:27:46.235209     PCI: 00:1f.5

 1426 14:27:46.245005     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1427 14:27:46.248296  Done allocating resources.

 1428 14:27:46.254891  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1429 14:27:46.254992  Enabling resources...

 1430 14:27:46.262234  PCI: 00:00.0 subsystem <- 8086/9b61

 1431 14:27:46.262338  PCI: 00:00.0 cmd <- 06

 1432 14:27:46.265277  PCI: 00:02.0 subsystem <- 8086/9b41

 1433 14:27:46.268745  PCI: 00:02.0 cmd <- 03

 1434 14:27:46.271978  PCI: 00:08.0 cmd <- 06

 1435 14:27:46.275304  PCI: 00:12.0 subsystem <- 8086/02f9

 1436 14:27:46.278568  PCI: 00:12.0 cmd <- 02

 1437 14:27:46.282021  PCI: 00:14.0 subsystem <- 8086/02ed

 1438 14:27:46.285429  PCI: 00:14.0 cmd <- 02

 1439 14:27:46.288769  PCI: 00:14.2 cmd <- 02

 1440 14:27:46.292141  PCI: 00:14.3 subsystem <- 8086/02f0

 1441 14:27:46.292251  PCI: 00:14.3 cmd <- 02

 1442 14:27:46.298642  PCI: 00:15.0 subsystem <- 8086/02e8

 1443 14:27:46.298742  PCI: 00:15.0 cmd <- 02

 1444 14:27:46.305441  PCI: 00:15.1 subsystem <- 8086/02e9

 1445 14:27:46.305526  PCI: 00:15.1 cmd <- 02

 1446 14:27:46.308563  PCI: 00:16.0 subsystem <- 8086/02e0

 1447 14:27:46.311700  PCI: 00:16.0 cmd <- 02

 1448 14:27:46.315380  PCI: 00:17.0 subsystem <- 8086/02d3

 1449 14:27:46.318634  PCI: 00:17.0 cmd <- 03

 1450 14:27:46.321853  PCI: 00:19.0 subsystem <- 8086/02c5

 1451 14:27:46.325081  PCI: 00:19.0 cmd <- 02

 1452 14:27:46.328380  PCI: 00:1d.0 bridge ctrl <- 0013

 1453 14:27:46.331805  PCI: 00:1d.0 subsystem <- 8086/02b0

 1454 14:27:46.335109  PCI: 00:1d.0 cmd <- 06

 1455 14:27:46.338415  PCI: 00:1e.0 subsystem <- 8086/02a8

 1456 14:27:46.341710  PCI: 00:1e.0 cmd <- 06

 1457 14:27:46.345065  PCI: 00:1e.2 subsystem <- 8086/02aa

 1458 14:27:46.348385  PCI: 00:1e.2 cmd <- 06

 1459 14:27:46.351626  PCI: 00:1e.3 subsystem <- 8086/02ab

 1460 14:27:46.351709  PCI: 00:1e.3 cmd <- 02

 1461 14:27:46.358281  PCI: 00:1f.0 subsystem <- 8086/0284

 1462 14:27:46.358366  PCI: 00:1f.0 cmd <- 407

 1463 14:27:46.364850  PCI: 00:1f.3 subsystem <- 8086/02c8

 1464 14:27:46.364935  PCI: 00:1f.3 cmd <- 02

 1465 14:27:46.368164  PCI: 00:1f.4 subsystem <- 8086/02a3

 1466 14:27:46.371546  PCI: 00:1f.4 cmd <- 03

 1467 14:27:46.374800  PCI: 00:1f.5 subsystem <- 8086/02a4

 1468 14:27:46.378210  PCI: 00:1f.5 cmd <- 406

 1469 14:27:46.387144  PCI: 01:00.0 cmd <- 02

 1470 14:27:46.392762  done.

 1471 14:27:46.406046  ME: Version: 14.0.39.1367

 1472 14:27:46.412641  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13

 1473 14:27:46.415819  Initializing devices...

 1474 14:27:46.415954  Root Device init ...

 1475 14:27:46.422738  Chrome EC: Set SMI mask to 0x0000000000000000

 1476 14:27:46.426058  Chrome EC: clear events_b mask to 0x0000000000000000

 1477 14:27:46.432231  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1478 14:27:46.439216  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1479 14:27:46.445810  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1480 14:27:46.449134  Chrome EC: Set WAKE mask to 0x0000000000000000

 1481 14:27:46.451877  Root Device init finished in 35178 usecs

 1482 14:27:46.455643  CPU_CLUSTER: 0 init ...

 1483 14:27:46.462266  CPU_CLUSTER: 0 init finished in 2447 usecs

 1484 14:27:46.466711  PCI: 00:00.0 init ...

 1485 14:27:46.470073  CPU TDP: 15 Watts

 1486 14:27:46.473358  CPU PL2 = 64 Watts

 1487 14:27:46.476688  PCI: 00:00.0 init finished in 7082 usecs

 1488 14:27:46.479536  PCI: 00:02.0 init ...

 1489 14:27:46.483319  PCI: 00:02.0 init finished in 2254 usecs

 1490 14:27:46.486705  PCI: 00:08.0 init ...

 1491 14:27:46.489986  PCI: 00:08.0 init finished in 2254 usecs

 1492 14:27:46.493431  PCI: 00:12.0 init ...

 1493 14:27:46.496203  PCI: 00:12.0 init finished in 2253 usecs

 1494 14:27:46.499519  PCI: 00:14.0 init ...

 1495 14:27:46.502865  PCI: 00:14.0 init finished in 2246 usecs

 1496 14:27:46.506258  PCI: 00:14.2 init ...

 1497 14:27:46.509527  PCI: 00:14.2 init finished in 2254 usecs

 1498 14:27:46.513208  PCI: 00:14.3 init ...

 1499 14:27:46.516268  PCI: 00:14.3 init finished in 2261 usecs

 1500 14:27:46.519462  PCI: 00:15.0 init ...

 1501 14:27:46.522582  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1502 14:27:46.526191  PCI: 00:15.0 init finished in 5978 usecs

 1503 14:27:46.529430  PCI: 00:15.1 init ...

 1504 14:27:46.532903  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1505 14:27:46.539197  PCI: 00:15.1 init finished in 5978 usecs

 1506 14:27:46.539306  PCI: 00:16.0 init ...

 1507 14:27:46.545814  PCI: 00:16.0 init finished in 2253 usecs

 1508 14:27:46.549084  PCI: 00:19.0 init ...

 1509 14:27:46.552394  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1510 14:27:46.555612  PCI: 00:19.0 init finished in 5980 usecs

 1511 14:27:46.558938  PCI: 00:1d.0 init ...

 1512 14:27:46.562231  Initializing PCH PCIe bridge.

 1513 14:27:46.565648  PCI: 00:1d.0 init finished in 5286 usecs

 1514 14:27:46.569017  PCI: 00:1f.0 init ...

 1515 14:27:46.572259  IOAPIC: Initializing IOAPIC at 0xfec00000

 1516 14:27:46.578802  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1517 14:27:46.578909  IOAPIC: ID = 0x02

 1518 14:27:46.582317  IOAPIC: Dumping registers

 1519 14:27:46.585665    reg 0x0000: 0x02000000

 1520 14:27:46.588833    reg 0x0001: 0x00770020

 1521 14:27:46.588937    reg 0x0002: 0x00000000

 1522 14:27:46.595625  PCI: 00:1f.0 init finished in 23540 usecs

 1523 14:27:46.599100  PCI: 00:1f.4 init ...

 1524 14:27:46.601797  PCI: 00:1f.4 init finished in 2264 usecs

 1525 14:27:46.612542  PCI: 01:00.0 init ...

 1526 14:27:46.615757  PCI: 01:00.0 init finished in 2254 usecs

 1527 14:27:46.620272  PNP: 0c09.0 init ...

 1528 14:27:46.623732  Google Chrome EC uptime: 11.102 seconds

 1529 14:27:46.630376  Google Chrome AP resets since EC boot: 0

 1530 14:27:46.633403  Google Chrome most recent AP reset causes:

 1531 14:27:46.640085  Google Chrome EC reset flags at last EC boot: reset-pin

 1532 14:27:46.643243  PNP: 0c09.0 init finished in 20580 usecs

 1533 14:27:46.646812  Devices initialized

 1534 14:27:46.649881  Show all devs... After init.

 1535 14:27:46.649984  Root Device: enabled 1

 1536 14:27:46.653182  CPU_CLUSTER: 0: enabled 1

 1537 14:27:46.656665  DOMAIN: 0000: enabled 1

 1538 14:27:46.656769  APIC: 00: enabled 1

 1539 14:27:46.660074  PCI: 00:00.0: enabled 1

 1540 14:27:46.663236  PCI: 00:02.0: enabled 1

 1541 14:27:46.666642  PCI: 00:04.0: enabled 0

 1542 14:27:46.666753  PCI: 00:05.0: enabled 0

 1543 14:27:46.669836  PCI: 00:12.0: enabled 1

 1544 14:27:46.673251  PCI: 00:12.5: enabled 0

 1545 14:27:46.676706  PCI: 00:12.6: enabled 0

 1546 14:27:46.676820  PCI: 00:14.0: enabled 1

 1547 14:27:46.679488  PCI: 00:14.1: enabled 0

 1548 14:27:46.682766  PCI: 00:14.3: enabled 1

 1549 14:27:46.686025  PCI: 00:14.5: enabled 0

 1550 14:27:46.686127  PCI: 00:15.0: enabled 1

 1551 14:27:46.689441  PCI: 00:15.1: enabled 1

 1552 14:27:46.692763  PCI: 00:15.2: enabled 0

 1553 14:27:46.692878  PCI: 00:15.3: enabled 0

 1554 14:27:46.696117  PCI: 00:16.0: enabled 1

 1555 14:27:46.699567  PCI: 00:16.1: enabled 0

 1556 14:27:46.702808  PCI: 00:16.2: enabled 0

 1557 14:27:46.702914  PCI: 00:16.3: enabled 0

 1558 14:27:46.705616  PCI: 00:16.4: enabled 0

 1559 14:27:46.709493  PCI: 00:16.5: enabled 0

 1560 14:27:46.712304  PCI: 00:17.0: enabled 1

 1561 14:27:46.712408  PCI: 00:19.0: enabled 1

 1562 14:27:46.715707  PCI: 00:19.1: enabled 0

 1563 14:27:46.719042  PCI: 00:19.2: enabled 0

 1564 14:27:46.722313  PCI: 00:1a.0: enabled 0

 1565 14:27:46.722432  PCI: 00:1c.0: enabled 0

 1566 14:27:46.725672  PCI: 00:1c.1: enabled 0

 1567 14:27:46.728995  PCI: 00:1c.2: enabled 0

 1568 14:27:46.732369  PCI: 00:1c.3: enabled 0

 1569 14:27:46.732490  PCI: 00:1c.4: enabled 0

 1570 14:27:46.735512  PCI: 00:1c.5: enabled 0

 1571 14:27:46.738992  PCI: 00:1c.6: enabled 0

 1572 14:27:46.741943  PCI: 00:1c.7: enabled 0

 1573 14:27:46.742050  PCI: 00:1d.0: enabled 1

 1574 14:27:46.745647  PCI: 00:1d.1: enabled 0

 1575 14:27:46.748906  PCI: 00:1d.2: enabled 0

 1576 14:27:46.749006  PCI: 00:1d.3: enabled 0

 1577 14:27:46.752164  PCI: 00:1d.4: enabled 0

 1578 14:27:46.755816  PCI: 00:1d.5: enabled 0

 1579 14:27:46.758771  PCI: 00:1e.0: enabled 1

 1580 14:27:46.758856  PCI: 00:1e.1: enabled 0

 1581 14:27:46.762426  PCI: 00:1e.2: enabled 1

 1582 14:27:46.765583  PCI: 00:1e.3: enabled 1

 1583 14:27:46.768909  PCI: 00:1f.0: enabled 1

 1584 14:27:46.768995  PCI: 00:1f.1: enabled 0

 1585 14:27:46.772207  PCI: 00:1f.2: enabled 0

 1586 14:27:46.775627  PCI: 00:1f.3: enabled 1

 1587 14:27:46.779081  PCI: 00:1f.4: enabled 1

 1588 14:27:46.779163  PCI: 00:1f.5: enabled 1

 1589 14:27:46.782373  PCI: 00:1f.6: enabled 0

 1590 14:27:46.785163  USB0 port 0: enabled 1

 1591 14:27:46.785245  I2C: 01:15: enabled 1

 1592 14:27:46.788867  I2C: 02:5d: enabled 1

 1593 14:27:46.792267  GENERIC: 0.0: enabled 1

 1594 14:27:46.792349  I2C: 03:1a: enabled 1

 1595 14:27:46.795132  I2C: 03:38: enabled 1

 1596 14:27:46.798599  I2C: 03:39: enabled 1

 1597 14:27:46.798681  I2C: 03:3a: enabled 1

 1598 14:27:46.801919  I2C: 03:3b: enabled 1

 1599 14:27:46.805384  PCI: 00:00.0: enabled 1

 1600 14:27:46.805466  SPI: 00: enabled 1

 1601 14:27:46.808630  SPI: 01: enabled 1

 1602 14:27:46.811989  PNP: 0c09.0: enabled 1

 1603 14:27:46.812073  USB2 port 0: enabled 1

 1604 14:27:46.815226  USB2 port 1: enabled 1

 1605 14:27:46.818698  USB2 port 2: enabled 0

 1606 14:27:46.821508  USB2 port 3: enabled 0

 1607 14:27:46.821593  USB2 port 5: enabled 0

 1608 14:27:46.824834  USB2 port 6: enabled 1

 1609 14:27:46.828109  USB2 port 9: enabled 1

 1610 14:27:46.828193  USB3 port 0: enabled 1

 1611 14:27:46.831391  USB3 port 1: enabled 1

 1612 14:27:46.834767  USB3 port 2: enabled 1

 1613 14:27:46.838070  USB3 port 3: enabled 1

 1614 14:27:46.838155  USB3 port 4: enabled 0

 1615 14:27:46.841605  APIC: 04: enabled 1

 1616 14:27:46.844709  APIC: 06: enabled 1

 1617 14:27:46.844794  APIC: 01: enabled 1

 1618 14:27:46.847819  APIC: 05: enabled 1

 1619 14:27:46.847923  APIC: 07: enabled 1

 1620 14:27:46.851406  APIC: 02: enabled 1

 1621 14:27:46.854778  APIC: 03: enabled 1

 1622 14:27:46.854893  PCI: 00:08.0: enabled 1

 1623 14:27:46.857878  PCI: 00:14.2: enabled 1

 1624 14:27:46.861080  PCI: 01:00.0: enabled 1

 1625 14:27:46.864291  Disabling ACPI via APMC:

 1626 14:27:46.867835  done.

 1627 14:27:46.871016  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1628 14:27:46.874373  ELOG: NV offset 0xaf0000 size 0x4000

 1629 14:27:46.881651  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1630 14:27:46.888384  ELOG: Event(17) added with size 13 at 2023-06-06 14:27:46 UTC

 1631 14:27:46.894985  ELOG: Event(92) added with size 9 at 2023-06-06 14:27:46 UTC

 1632 14:27:46.901757  ELOG: Event(93) added with size 9 at 2023-06-06 14:27:46 UTC

 1633 14:27:46.908636  ELOG: Event(9A) added with size 9 at 2023-06-06 14:27:46 UTC

 1634 14:27:46.915439  ELOG: Event(9E) added with size 10 at 2023-06-06 14:27:46 UTC

 1635 14:27:46.921534  ELOG: Event(9F) added with size 14 at 2023-06-06 14:27:46 UTC

 1636 14:27:46.924905  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1637 14:27:46.932258  ELOG: Event(A1) added with size 10 at 2023-06-06 14:27:46 UTC

 1638 14:27:46.942260  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1639 14:27:46.948932  ELOG: Event(A0) added with size 9 at 2023-06-06 14:27:46 UTC

 1640 14:27:46.952276  elog_add_boot_reason: Logged dev mode boot

 1641 14:27:46.955570  Finalize devices...

 1642 14:27:46.955655  PCI: 00:17.0 final

 1643 14:27:46.958654  Devices finalized

 1644 14:27:46.961731  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1645 14:27:46.968649  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1646 14:27:46.972206  ME: HFSTS1                  : 0x90000245

 1647 14:27:46.975249  ME: HFSTS2                  : 0x3B850126

 1648 14:27:46.981869  ME: HFSTS3                  : 0x00000020

 1649 14:27:46.985068  ME: HFSTS4                  : 0x00004800

 1650 14:27:46.988407  ME: HFSTS5                  : 0x00000000

 1651 14:27:46.991693  ME: HFSTS6                  : 0x40400006

 1652 14:27:46.995098  ME: Manufacturing Mode      : NO

 1653 14:27:46.998497  ME: FW Partition Table      : OK

 1654 14:27:47.001821  ME: Bringup Loader Failure  : NO

 1655 14:27:47.005196  ME: Firmware Init Complete  : YES

 1656 14:27:47.008212  ME: Boot Options Present    : NO

 1657 14:27:47.011386  ME: Update In Progress      : NO

 1658 14:27:47.014809  ME: D0i3 Support            : YES

 1659 14:27:47.018313  ME: Low Power State Enabled : NO

 1660 14:27:47.021683  ME: CPU Replaced            : NO

 1661 14:27:47.024979  ME: CPU Replacement Valid   : YES

 1662 14:27:47.028315  ME: Current Working State   : 5

 1663 14:27:47.031233  ME: Current Operation State : 1

 1664 14:27:47.034962  ME: Current Operation Mode  : 0

 1665 14:27:47.038235  ME: Error Code              : 0

 1666 14:27:47.041675  ME: CPU Debug Disabled      : YES

 1667 14:27:47.044573  ME: TXT Support             : NO

 1668 14:27:47.051203  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1669 14:27:47.057830  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1670 14:27:47.057944  CBFS @ c08000 size 3f8000

 1671 14:27:47.064438  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1672 14:27:47.067988  CBFS: Locating 'fallback/dsdt.aml'

 1673 14:27:47.070952  CBFS: Found @ offset 10bb80 size 3fa5

 1674 14:27:47.077979  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1675 14:27:47.081304  CBFS @ c08000 size 3f8000

 1676 14:27:47.084280  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1677 14:27:47.087630  CBFS: Locating 'fallback/slic'

 1678 14:27:47.096279  CBFS: 'fallback/slic' not found.

 1679 14:27:47.099718  ACPI: Writing ACPI tables at 99b3e000.

 1680 14:27:47.099804  ACPI:    * FACS

 1681 14:27:47.103028  ACPI:    * DSDT

 1682 14:27:47.106454  Ramoops buffer: 0x100000@0x99a3d000.

 1683 14:27:47.109204  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1684 14:27:47.116057  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1685 14:27:47.119504  Google Chrome EC: version:

 1686 14:27:47.122907  	ro: helios_v2.0.2659-56403530b

 1687 14:27:47.125693  	rw: helios_v2.0.2849-c41de27e7d

 1688 14:27:47.125779    running image: 1

 1689 14:27:47.130241  ACPI:    * FADT

 1690 14:27:47.130326  SCI is IRQ9

 1691 14:27:47.136699  ACPI: added table 1/32, length now 40

 1692 14:27:47.136783  ACPI:     * SSDT

 1693 14:27:47.140043  Found 1 CPU(s) with 8 core(s) each.

 1694 14:27:47.143366  Error: Could not locate 'wifi_sar' in VPD.

 1695 14:27:47.150249  Checking CBFS for default SAR values

 1696 14:27:47.153596  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1697 14:27:47.156827  CBFS @ c08000 size 3f8000

 1698 14:27:47.163470  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1699 14:27:47.166865  CBFS: Locating 'wifi_sar_defaults.hex'

 1700 14:27:47.169789  CBFS: Found @ offset 5fac0 size 77

 1701 14:27:47.173511  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1702 14:27:47.180050  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1703 14:27:47.183701  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1704 14:27:47.189723  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1705 14:27:47.193303  failed to find key in VPD: dsm_calib_r0_0

 1706 14:27:47.203281  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1707 14:27:47.206461  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1708 14:27:47.209714  failed to find key in VPD: dsm_calib_r0_1

 1709 14:27:47.219493  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1710 14:27:47.226065  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1711 14:27:47.229409  failed to find key in VPD: dsm_calib_r0_2

 1712 14:27:47.239399  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1713 14:27:47.242706  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1714 14:27:47.249658  failed to find key in VPD: dsm_calib_r0_3

 1715 14:27:47.255731  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1716 14:27:47.262599  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1717 14:27:47.266038  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1718 14:27:47.272829  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1719 14:27:47.276155  EC returned error result code 1

 1720 14:27:47.279363  EC returned error result code 1

 1721 14:27:47.282742  EC returned error result code 1

 1722 14:27:47.286020  PS2K: Bad resp from EC. Vivaldi disabled!

 1723 14:27:47.293025  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1724 14:27:47.299353  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1725 14:27:47.302978  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1726 14:27:47.309368  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1727 14:27:47.312707  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1728 14:27:47.319637  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1729 14:27:47.326067  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1730 14:27:47.332670  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1731 14:27:47.336071  ACPI: added table 2/32, length now 44

 1732 14:27:47.336184  ACPI:    * MCFG

 1733 14:27:47.342791  ACPI: added table 3/32, length now 48

 1734 14:27:47.342900  ACPI:    * TPM2

 1735 14:27:47.346079  TPM2 log created at 99a2d000

 1736 14:27:47.348957  ACPI: added table 4/32, length now 52

 1737 14:27:47.352260  ACPI:    * MADT

 1738 14:27:47.352372  SCI is IRQ9

 1739 14:27:47.355750  ACPI: added table 5/32, length now 56

 1740 14:27:47.359163  current = 99b43ac0

 1741 14:27:47.359281  ACPI:    * DMAR

 1742 14:27:47.362512  ACPI: added table 6/32, length now 60

 1743 14:27:47.365833  ACPI:    * IGD OpRegion

 1744 14:27:47.369250  GMA: Found VBT in CBFS

 1745 14:27:47.372592  GMA: Found valid VBT in CBFS

 1746 14:27:47.375499  ACPI: added table 7/32, length now 64

 1747 14:27:47.375606  ACPI:    * HPET

 1748 14:27:47.379227  ACPI: added table 8/32, length now 68

 1749 14:27:47.382465  ACPI: done.

 1750 14:27:47.385572  ACPI tables: 31744 bytes.

 1751 14:27:47.388896  smbios_write_tables: 99a2c000

 1752 14:27:47.392221  EC returned error result code 3

 1753 14:27:47.395438  Couldn't obtain OEM name from CBI

 1754 14:27:47.398945  Create SMBIOS type 17

 1755 14:27:47.399060  PCI: 00:00.0 (Intel Cannonlake)

 1756 14:27:47.402228  PCI: 00:14.3 (Intel WiFi)

 1757 14:27:47.405281  SMBIOS tables: 939 bytes.

 1758 14:27:47.409012  Writing table forward entry at 0x00000500

 1759 14:27:47.415394  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1760 14:27:47.418763  Writing coreboot table at 0x99b62000

 1761 14:27:47.425164   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1762 14:27:47.428452   1. 0000000000001000-000000000009ffff: RAM

 1763 14:27:47.435183   2. 00000000000a0000-00000000000fffff: RESERVED

 1764 14:27:47.438510   3. 0000000000100000-0000000099a2bfff: RAM

 1765 14:27:47.445280   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1766 14:27:47.448575   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1767 14:27:47.455270   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1768 14:27:47.461911   7. 000000009a000000-000000009f7fffff: RESERVED

 1769 14:27:47.465237   8. 00000000e0000000-00000000efffffff: RESERVED

 1770 14:27:47.468140   9. 00000000fc000000-00000000fc000fff: RESERVED

 1771 14:27:47.474773  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1772 14:27:47.478137  11. 00000000fed10000-00000000fed17fff: RESERVED

 1773 14:27:47.484839  12. 00000000fed80000-00000000fed83fff: RESERVED

 1774 14:27:47.488187  13. 00000000fed90000-00000000fed91fff: RESERVED

 1775 14:27:47.495092  14. 00000000feda0000-00000000feda1fff: RESERVED

 1776 14:27:47.498251  15. 0000000100000000-000000045e7fffff: RAM

 1777 14:27:47.501585  Graphics framebuffer located at 0xc0000000

 1778 14:27:47.504934  Passing 5 GPIOs to payload:

 1779 14:27:47.511225              NAME |       PORT | POLARITY |     VALUE

 1780 14:27:47.514840     write protect |  undefined |     high |       low

 1781 14:27:47.521170               lid |  undefined |     high |      high

 1782 14:27:47.524543             power |  undefined |     high |       low

 1783 14:27:47.531487             oprom |  undefined |     high |       low

 1784 14:27:47.538115          EC in RW | 0x000000cb |     high |       low

 1785 14:27:47.538201  Board ID: 4

 1786 14:27:47.544312  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1787 14:27:47.544397  CBFS @ c08000 size 3f8000

 1788 14:27:47.551546  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1789 14:27:47.557817  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa

 1790 14:27:47.561252  coreboot table: 1492 bytes.

 1791 14:27:47.564534  IMD ROOT    0. 99fff000 00001000

 1792 14:27:47.567833  IMD SMALL   1. 99ffe000 00001000

 1793 14:27:47.571268  FSP MEMORY  2. 99c4e000 003b0000

 1794 14:27:47.574128  CONSOLE     3. 99c2e000 00020000

 1795 14:27:47.577412  FMAP        4. 99c2d000 0000054e

 1796 14:27:47.581219  TIME STAMP  5. 99c2c000 00000910

 1797 14:27:47.584504  VBOOT WORK  6. 99c18000 00014000

 1798 14:27:47.587801  MRC DATA    7. 99c16000 00001958

 1799 14:27:47.591234  ROMSTG STCK 8. 99c15000 00001000

 1800 14:27:47.594468  AFTER CAR   9. 99c0b000 0000a000

 1801 14:27:47.597735  RAMSTAGE   10. 99baf000 0005c000

 1802 14:27:47.600894  REFCODE    11. 99b7a000 00035000

 1803 14:27:47.604166  SMM BACKUP 12. 99b6a000 00010000

 1804 14:27:47.607473  COREBOOT   13. 99b62000 00008000

 1805 14:27:47.610789  ACPI       14. 99b3e000 00024000

 1806 14:27:47.613937  ACPI GNVS  15. 99b3d000 00001000

 1807 14:27:47.617189  RAMOOPS    16. 99a3d000 00100000

 1808 14:27:47.620424  TPM2 TCGLOG17. 99a2d000 00010000

 1809 14:27:47.624100  SMBIOS     18. 99a2c000 00000800

 1810 14:27:47.624179  IMD small region:

 1811 14:27:47.630590    IMD ROOT    0. 99ffec00 00000400

 1812 14:27:47.633729    FSP RUNTIME 1. 99ffebe0 00000004

 1813 14:27:47.637238    EC HOSTEVENT 2. 99ffebc0 00000008

 1814 14:27:47.640361    POWER STATE 3. 99ffeb80 00000040

 1815 14:27:47.643714    ROMSTAGE    4. 99ffeb60 00000004

 1816 14:27:47.646997    MEM INFO    5. 99ffe9a0 000001b9

 1817 14:27:47.650301    VPD         6. 99ffe920 0000006c

 1818 14:27:47.653678  MTRR: Physical address space:

 1819 14:27:47.660542  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1820 14:27:47.667128  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1821 14:27:47.673393  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1822 14:27:47.676699  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1823 14:27:47.683308  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1824 14:27:47.690072  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1825 14:27:47.696767  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1826 14:27:47.700105  MTRR: Fixed MSR 0x250 0x0606060606060606

 1827 14:27:47.706561  MTRR: Fixed MSR 0x258 0x0606060606060606

 1828 14:27:47.709685  MTRR: Fixed MSR 0x259 0x0000000000000000

 1829 14:27:47.713040  MTRR: Fixed MSR 0x268 0x0606060606060606

 1830 14:27:47.716354  MTRR: Fixed MSR 0x269 0x0606060606060606

 1831 14:27:47.722954  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1832 14:27:47.726559  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1833 14:27:47.729654  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1834 14:27:47.733277  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1835 14:27:47.736589  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1836 14:27:47.742792  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1837 14:27:47.746098  call enable_fixed_mtrr()

 1838 14:27:47.749437  CPU physical address size: 39 bits

 1839 14:27:47.752738  MTRR: default type WB/UC MTRR counts: 6/8.

 1840 14:27:47.756072  MTRR: WB selected as default type.

 1841 14:27:47.762654  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1842 14:27:47.769192  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1843 14:27:47.776040  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1844 14:27:47.782638  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1845 14:27:47.789394  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1846 14:27:47.792251  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1847 14:27:47.800027  MTRR: Fixed MSR 0x250 0x0606060606060606

 1848 14:27:47.803538  MTRR: Fixed MSR 0x258 0x0606060606060606

 1849 14:27:47.806720  MTRR: Fixed MSR 0x259 0x0000000000000000

 1850 14:27:47.809965  MTRR: Fixed MSR 0x268 0x0606060606060606

 1851 14:27:47.816489  MTRR: Fixed MSR 0x269 0x0606060606060606

 1852 14:27:47.819704  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1853 14:27:47.823274  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1854 14:27:47.826179  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1855 14:27:47.832942  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1856 14:27:47.836205  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1857 14:27:47.839426  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1858 14:27:47.839512  

 1859 14:27:47.843019  MTRR check

 1860 14:27:47.843104  Fixed MTRRs   : Enabled

 1861 14:27:47.846409  Variable MTRRs: Enabled

 1862 14:27:47.846493  

 1863 14:27:47.849274  call enable_fixed_mtrr()

 1864 14:27:47.856445  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1865 14:27:47.859254  CPU physical address size: 39 bits

 1866 14:27:47.862707  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1867 14:27:47.866019  MTRR: Fixed MSR 0x250 0x0606060606060606

 1868 14:27:47.872710  MTRR: Fixed MSR 0x258 0x0606060606060606

 1869 14:27:47.875986  MTRR: Fixed MSR 0x259 0x0000000000000000

 1870 14:27:47.879398  MTRR: Fixed MSR 0x268 0x0606060606060606

 1871 14:27:47.882771  MTRR: Fixed MSR 0x269 0x0606060606060606

 1872 14:27:47.889436  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1873 14:27:47.892826  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1874 14:27:47.895746  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1875 14:27:47.899708  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1876 14:27:47.905749  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1877 14:27:47.909112  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1878 14:27:47.912370  MTRR: Fixed MSR 0x250 0x0606060606060606

 1879 14:27:47.915647  call enable_fixed_mtrr()

 1880 14:27:47.919365  MTRR: Fixed MSR 0x258 0x0606060606060606

 1881 14:27:47.922646  MTRR: Fixed MSR 0x259 0x0000000000000000

 1882 14:27:47.929306  MTRR: Fixed MSR 0x268 0x0606060606060606

 1883 14:27:47.932212  MTRR: Fixed MSR 0x269 0x0606060606060606

 1884 14:27:47.935586  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1885 14:27:47.939105  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1886 14:27:47.945530  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1887 14:27:47.948612  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1888 14:27:47.952393  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1889 14:27:47.955753  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1890 14:27:47.959106  CPU physical address size: 39 bits

 1891 14:27:47.962337  call enable_fixed_mtrr()

 1892 14:27:47.965693  CBFS @ c08000 size 3f8000

 1893 14:27:47.972468  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1894 14:27:47.975242  CBFS: Locating 'fallback/payload'

 1895 14:27:47.978685  CPU physical address size: 39 bits

 1896 14:27:47.982151  MTRR: Fixed MSR 0x250 0x0606060606060606

 1897 14:27:47.985429  MTRR: Fixed MSR 0x258 0x0606060606060606

 1898 14:27:47.991898  MTRR: Fixed MSR 0x259 0x0000000000000000

 1899 14:27:47.995273  MTRR: Fixed MSR 0x268 0x0606060606060606

 1900 14:27:47.998618  MTRR: Fixed MSR 0x269 0x0606060606060606

 1901 14:27:48.001934  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1902 14:27:48.008657  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1903 14:27:48.011861  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1904 14:27:48.015239  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1905 14:27:48.018486  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1906 14:27:48.021682  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1907 14:27:48.028234  MTRR: Fixed MSR 0x250 0x0606060606060606

 1908 14:27:48.031750  call enable_fixed_mtrr()

 1909 14:27:48.035093  MTRR: Fixed MSR 0x258 0x0606060606060606

 1910 14:27:48.038605  MTRR: Fixed MSR 0x259 0x0000000000000000

 1911 14:27:48.041809  MTRR: Fixed MSR 0x268 0x0606060606060606

 1912 14:27:48.048008  MTRR: Fixed MSR 0x269 0x0606060606060606

 1913 14:27:48.051683  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1914 14:27:48.054714  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1915 14:27:48.057896  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1916 14:27:48.061186  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1917 14:27:48.067960  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1918 14:27:48.071236  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1919 14:27:48.074582  CPU physical address size: 39 bits

 1920 14:27:48.077940  call enable_fixed_mtrr()

 1921 14:27:48.081266  MTRR: Fixed MSR 0x250 0x0606060606060606

 1922 14:27:48.084618  MTRR: Fixed MSR 0x250 0x0606060606060606

 1923 14:27:48.091158  MTRR: Fixed MSR 0x258 0x0606060606060606

 1924 14:27:48.094393  MTRR: Fixed MSR 0x259 0x0000000000000000

 1925 14:27:48.097703  MTRR: Fixed MSR 0x268 0x0606060606060606

 1926 14:27:48.101193  MTRR: Fixed MSR 0x269 0x0606060606060606

 1927 14:27:48.107831  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1928 14:27:48.111023  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1929 14:27:48.114253  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1930 14:27:48.117538  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1931 14:27:48.124075  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1932 14:27:48.127891  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1933 14:27:48.131007  MTRR: Fixed MSR 0x258 0x0606060606060606

 1934 14:27:48.134280  call enable_fixed_mtrr()

 1935 14:27:48.137628  MTRR: Fixed MSR 0x259 0x0000000000000000

 1936 14:27:48.140576  MTRR: Fixed MSR 0x268 0x0606060606060606

 1937 14:27:48.147732  MTRR: Fixed MSR 0x269 0x0606060606060606

 1938 14:27:48.150815  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1939 14:27:48.153797  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1940 14:27:48.157413  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1941 14:27:48.163751  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1942 14:27:48.166980  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1943 14:27:48.170268  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1944 14:27:48.173625  CPU physical address size: 39 bits

 1945 14:27:48.177331  call enable_fixed_mtrr()

 1946 14:27:48.180717  CPU physical address size: 39 bits

 1947 14:27:48.183577  CPU physical address size: 39 bits

 1948 14:27:48.186850  CBFS: Found @ offset 1c96c0 size 3f798

 1949 14:27:48.193548  Checking segment from ROM address 0xffdd16f8

 1950 14:27:48.196995  Checking segment from ROM address 0xffdd1714

 1951 14:27:48.200239  Loading segment from ROM address 0xffdd16f8

 1952 14:27:48.203630    code (compression=0)

 1953 14:27:48.213565    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1954 14:27:48.220291  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1955 14:27:48.223587  it's not compressed!

 1956 14:27:48.315344  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1957 14:27:48.321916  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1958 14:27:48.325261  Loading segment from ROM address 0xffdd1714

 1959 14:27:48.328777    Entry Point 0x30000000

 1960 14:27:48.331990  Loaded segments

 1961 14:27:48.337492  Finalizing chipset.

 1962 14:27:48.340633  Finalizing SMM.

 1963 14:27:48.344084  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 1964 14:27:48.347595  mp_park_aps done after 0 msecs.

 1965 14:27:48.353659  Jumping to boot code at 30000000(99b62000)

 1966 14:27:48.360820  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 1967 14:27:48.360911  

 1968 14:27:48.360977  

 1969 14:27:48.361042  

 1970 14:27:48.364010  Starting depthcharge on Helios...

 1971 14:27:48.364094  

 1972 14:27:48.364430  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 1973 14:27:48.364531  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 1974 14:27:48.364618  Setting prompt string to ['hatch:']
 1975 14:27:48.364694  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 1976 14:27:48.373858  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1977 14:27:48.373948  

 1978 14:27:48.380188  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1979 14:27:48.380273  

 1980 14:27:48.387199  board_setup: Info: eMMC controller not present; skipping

 1981 14:27:48.387301  

 1982 14:27:48.390579  New NVMe Controller 0x30053ac0 @ 00:1d:00

 1983 14:27:48.390681  

 1984 14:27:48.396542  board_setup: Info: SDHCI controller not present; skipping

 1985 14:27:48.396668  

 1986 14:27:48.403562  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 1987 14:27:48.403665  

 1988 14:27:48.403733  Wipe memory regions:

 1989 14:27:48.403798  

 1990 14:27:48.406859  	[0x00000000001000, 0x000000000a0000)

 1991 14:27:48.406959  

 1992 14:27:48.413525  	[0x00000000100000, 0x00000030000000)

 1993 14:27:48.476495  

 1994 14:27:48.479578  	[0x00000030657430, 0x00000099a2c000)

 1995 14:27:48.616973  

 1996 14:27:48.620217  	[0x00000100000000, 0x0000045e800000)

 1997 14:27:50.002570  

 1998 14:27:50.002731  R8152: Initializing

 1999 14:27:50.002802  

 2000 14:27:50.005833  Version 9 (ocp_data = 6010)

 2001 14:27:50.010128  

 2002 14:27:50.010229  R8152: Done initializing

 2003 14:27:50.010296  

 2004 14:27:50.013494  Adding net device

 2005 14:27:50.622665  

 2006 14:27:50.622808  R8152: Initializing

 2007 14:27:50.622879  

 2008 14:27:50.625966  Version 6 (ocp_data = 5c30)

 2009 14:27:50.626051  

 2010 14:27:50.629374  R8152: Done initializing

 2011 14:27:50.629458  

 2012 14:27:50.632727  net_add_device: Attemp to include the same device

 2013 14:27:50.636480  

 2014 14:27:50.643357  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2015 14:27:50.643442  

 2016 14:27:50.643506  

 2017 14:27:50.643583  

 2018 14:27:50.643942  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2020 14:27:50.744345  hatch: tftpboot 192.168.201.1 10607772/tftp-deploy-o2t0431k/kernel/bzImage 10607772/tftp-deploy-o2t0431k/kernel/cmdline 10607772/tftp-deploy-o2t0431k/ramdisk/ramdisk.cpio.gz

 2021 14:27:50.744534  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2022 14:27:50.744671  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2023 14:27:50.748810  tftpboot 192.168.201.1 10607772/tftp-deploy-o2t0431k/kernel/bzImploy-o2t0431k/kernel/cmdline 10607772/tftp-deploy-o2t0431k/ramdisk/ramdisk.cpio.gz

 2024 14:27:50.748958  

 2025 14:27:50.749055  Waiting for link

 2026 14:27:50.949747  

 2027 14:27:50.949931  done.

 2028 14:27:50.950038  

 2029 14:27:50.950136  MAC: 00:24:32:50:1a:5f

 2030 14:27:50.950229  

 2031 14:27:50.953060  Sending DHCP discover... done.

 2032 14:27:50.953167  

 2033 14:27:50.956420  Waiting for reply... done.

 2034 14:27:50.956495  

 2035 14:27:50.959718  Sending DHCP request... done.

 2036 14:27:50.959832  

 2037 14:27:50.962894  Waiting for reply... done.

 2038 14:27:50.962998  

 2039 14:27:50.966092  My ip is 192.168.201.21

 2040 14:27:50.966196  

 2041 14:27:50.969560  The DHCP server ip is 192.168.201.1

 2042 14:27:50.969662  

 2043 14:27:50.976244  TFTP server IP predefined by user: 192.168.201.1

 2044 14:27:50.976341  

 2045 14:27:50.982364  Bootfile predefined by user: 10607772/tftp-deploy-o2t0431k/kernel/bzImage

 2046 14:27:50.982472  

 2047 14:27:50.986077  Sending tftp read request... done.

 2048 14:27:50.986187  

 2049 14:27:50.989093  Waiting for the transfer... 

 2050 14:27:50.989177  

 2051 14:27:51.514071  00000000 ################################################################

 2052 14:27:51.514229  

 2053 14:27:52.048240  00080000 ################################################################

 2054 14:27:52.048447  

 2055 14:27:52.582505  00100000 ################################################################

 2056 14:27:52.582659  

 2057 14:27:53.115198  00180000 ################################################################

 2058 14:27:53.115357  

 2059 14:27:53.649978  00200000 ################################################################

 2060 14:27:53.650131  

 2061 14:27:54.177637  00280000 ################################################################

 2062 14:27:54.177791  

 2063 14:27:54.710705  00300000 ################################################################

 2064 14:27:54.710888  

 2065 14:27:55.243831  00380000 ################################################################

 2066 14:27:55.244068  

 2067 14:27:55.787541  00400000 ################################################################

 2068 14:27:55.787732  

 2069 14:27:56.316604  00480000 ################################################################

 2070 14:27:56.316791  

 2071 14:27:56.831933  00500000 ################################################################

 2072 14:27:56.832095  

 2073 14:27:57.366341  00580000 ################################################################

 2074 14:27:57.366492  

 2075 14:27:57.915428  00600000 ################################################################

 2076 14:27:57.915583  

 2077 14:27:58.474428  00680000 ################################################################

 2078 14:27:58.474594  

 2079 14:27:59.023815  00700000 ################################################################

 2080 14:27:59.023979  

 2081 14:27:59.044902  00780000 ### done.

 2082 14:27:59.044999  

 2083 14:27:59.048155  The bootfile was 7884688 bytes long.

 2084 14:27:59.048245  

 2085 14:27:59.051506  Sending tftp read request... done.

 2086 14:27:59.051608  

 2087 14:27:59.054941  Waiting for the transfer... 

 2088 14:27:59.055033  

 2089 14:27:59.592348  00000000 ################################################################

 2090 14:27:59.592497  

 2091 14:28:00.194240  00080000 ################################################################

 2092 14:28:00.194425  

 2093 14:28:00.834165  00100000 ################################################################

 2094 14:28:00.834909  

 2095 14:28:01.401699  00180000 ################################################################

 2096 14:28:01.401885  

 2097 14:28:01.972756  00200000 ################################################################

 2098 14:28:01.972904  

 2099 14:28:02.571270  00280000 ################################################################

 2100 14:28:02.571417  

 2101 14:28:03.108837  00300000 ################################################################

 2102 14:28:03.109026  

 2103 14:28:03.654746  00380000 ################################################################

 2104 14:28:03.654909  

 2105 14:28:04.187474  00400000 ################################################################

 2106 14:28:04.187639  

 2107 14:28:04.754251  00480000 ################################################################

 2108 14:28:04.754463  

 2109 14:28:05.401982  00500000 ################################################################

 2110 14:28:05.402193  

 2111 14:28:06.024182  00580000 ################################################################

 2112 14:28:06.024344  

 2113 14:28:06.617348  00600000 ################################################################

 2114 14:28:06.617509  

 2115 14:28:07.182438  00680000 ################################################################

 2116 14:28:07.182598  

 2117 14:28:07.760443  00700000 ################################################################

 2118 14:28:07.760605  

 2119 14:28:08.308484  00780000 ################################################################

 2120 14:28:08.308646  

 2121 14:28:08.775633  00800000 #################################################### done.

 2122 14:28:08.775811  

 2123 14:28:08.779021  Sending tftp read request... done.

 2124 14:28:08.779119  

 2125 14:28:08.782440  Waiting for the transfer... 

 2126 14:28:08.782528  

 2127 14:28:08.782596  00000000 # done.

 2128 14:28:08.782661  

 2129 14:28:08.792215  Command line loaded dynamically from TFTP file: 10607772/tftp-deploy-o2t0431k/kernel/cmdline

 2130 14:28:08.792302  

 2131 14:28:08.808845  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2132 14:28:08.808947  

 2133 14:28:08.815001  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2134 14:28:08.819731  

 2135 14:28:08.822967  Shutting down all USB controllers.

 2136 14:28:08.823053  

 2137 14:28:08.823119  Removing current net device

 2138 14:28:08.830827  

 2139 14:28:08.830913  Finalizing coreboot

 2140 14:28:08.830997  

 2141 14:28:08.837175  Exiting depthcharge with code 4 at timestamp: 27822014

 2142 14:28:08.837307  

 2143 14:28:08.837407  

 2144 14:28:08.837508  Starting kernel ...

 2145 14:28:08.837598  

 2146 14:28:08.838371  end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
 2147 14:28:08.838520  start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
 2148 14:28:08.838640  Setting prompt string to ['Linux version [0-9]']
 2149 14:28:08.838753  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2150 14:28:08.838864  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2151 14:28:08.840380  

 2153 14:32:30.838867  end: 2.2.5 auto-login-action (duration 00:04:22) [common]
 2155 14:32:30.839381  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
 2157 14:32:30.839706  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2160 14:32:30.840348  end: 2 depthcharge-action (duration 00:05:00) [common]
 2162 14:32:30.840829  Cleaning after the job
 2163 14:32:30.840998  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607772/tftp-deploy-o2t0431k/ramdisk
 2164 14:32:30.842684  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607772/tftp-deploy-o2t0431k/kernel
 2165 14:32:30.844384  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607772/tftp-deploy-o2t0431k/modules
 2166 14:32:30.844943  start: 5.1 power-off (timeout 00:00:30) [common]
 2167 14:32:30.845322  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
 2168 14:32:30.922270  >> Command sent successfully.

 2169 14:32:30.924921  Returned 0 in 0 seconds
 2170 14:32:31.025424  end: 5.1 power-off (duration 00:00:00) [common]
 2172 14:32:31.026052  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2173 14:32:31.026456  Listened to connection for namespace 'common' for up to 1s
 2175 14:32:31.027026  Listened to connection for namespace 'common' for up to 1s
 2176 14:32:32.027335  Finalising connection for namespace 'common'
 2177 14:32:32.027556  Disconnecting from shell: Finalise
 2178 14:32:32.027687  
 2179 14:32:32.127977  end: 5.2 read-feedback (duration 00:00:01) [common]
 2180 14:32:32.128147  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10607772
 2181 14:32:32.145197  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10607772
 2182 14:32:32.145448  JobError: Your job cannot terminate cleanly.