Boot log: asus-cx9400-volteer
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 14:27:21.365666 lava-dispatcher, installed at version: 2023.05.1
2 14:27:21.365877 start: 0 validate
3 14:27:21.366014 Start time: 2023-06-06 14:27:21.366006+00:00 (UTC)
4 14:27:21.366149 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:27:21.366279 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
6 14:27:21.651810 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:27:21.651997 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1308-ge1d2f27f3d7b0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:27:25.156546 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:27:25.156800 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:27:25.447806 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:27:25.447992 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1308-ge1d2f27f3d7b0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:27:25.953400 validate duration: 4.59
14 14:27:25.953657 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:27:25.953754 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:27:25.953838 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:27:25.953959 Not decompressing ramdisk as can be used compressed.
18 14:27:25.954046 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230527.0/amd64/initrd.cpio.gz
19 14:27:25.954110 saving as /var/lib/lava/dispatcher/tmp/10607770/tftp-deploy-mfk3i9dl/ramdisk/initrd.cpio.gz
20 14:27:25.954169 total size: 5432865 (5MB)
21 14:27:25.955261 progress 0% (0MB)
22 14:27:25.956833 progress 5% (0MB)
23 14:27:25.958226 progress 10% (0MB)
24 14:27:25.959598 progress 15% (0MB)
25 14:27:25.961200 progress 20% (1MB)
26 14:27:25.962582 progress 25% (1MB)
27 14:27:25.963933 progress 30% (1MB)
28 14:27:25.965477 progress 35% (1MB)
29 14:27:25.966834 progress 40% (2MB)
30 14:27:25.968175 progress 45% (2MB)
31 14:27:25.969588 progress 50% (2MB)
32 14:27:25.971130 progress 55% (2MB)
33 14:27:25.972481 progress 60% (3MB)
34 14:27:25.973920 progress 65% (3MB)
35 14:27:25.975468 progress 70% (3MB)
36 14:27:25.976993 progress 75% (3MB)
37 14:27:25.978606 progress 80% (4MB)
38 14:27:25.980017 progress 85% (4MB)
39 14:27:25.981654 progress 90% (4MB)
40 14:27:25.983009 progress 95% (4MB)
41 14:27:25.984424 progress 100% (5MB)
42 14:27:25.984658 5MB downloaded in 0.03s (169.96MB/s)
43 14:27:25.984834 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:27:25.985169 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:27:25.985286 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:27:25.985370 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:27:25.985498 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1308-ge1d2f27f3d7b0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:27:25.985572 saving as /var/lib/lava/dispatcher/tmp/10607770/tftp-deploy-mfk3i9dl/kernel/bzImage
50 14:27:25.985633 total size: 7884688 (7MB)
51 14:27:25.985692 No compression specified
52 14:27:25.986793 progress 0% (0MB)
53 14:27:25.988981 progress 5% (0MB)
54 14:27:25.991036 progress 10% (0MB)
55 14:27:25.993166 progress 15% (1MB)
56 14:27:25.995184 progress 20% (1MB)
57 14:27:25.997298 progress 25% (1MB)
58 14:27:25.999384 progress 30% (2MB)
59 14:27:26.001453 progress 35% (2MB)
60 14:27:26.003523 progress 40% (3MB)
61 14:27:26.005623 progress 45% (3MB)
62 14:27:26.007651 progress 50% (3MB)
63 14:27:26.009669 progress 55% (4MB)
64 14:27:26.011645 progress 60% (4MB)
65 14:27:26.013674 progress 65% (4MB)
66 14:27:26.015776 progress 70% (5MB)
67 14:27:26.017925 progress 75% (5MB)
68 14:27:26.020058 progress 80% (6MB)
69 14:27:26.022265 progress 85% (6MB)
70 14:27:26.024461 progress 90% (6MB)
71 14:27:26.026726 progress 95% (7MB)
72 14:27:26.028966 progress 100% (7MB)
73 14:27:26.029153 7MB downloaded in 0.04s (172.80MB/s)
74 14:27:26.029294 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:27:26.029559 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:27:26.029646 start: 1.3 download-retry (timeout 00:10:00) [common]
78 14:27:26.029765 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 14:27:26.029897 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230527.0/amd64/full.rootfs.tar.xz
80 14:27:26.029982 saving as /var/lib/lava/dispatcher/tmp/10607770/tftp-deploy-mfk3i9dl/nfsrootfs/full.rootfs.tar
81 14:27:26.030057 total size: 133381488 (127MB)
82 14:27:26.030117 Using unxz to decompress xz
83 14:27:26.033798 progress 0% (0MB)
84 14:27:26.383966 progress 5% (6MB)
85 14:27:26.745323 progress 10% (12MB)
86 14:27:27.035079 progress 15% (19MB)
87 14:27:27.222510 progress 20% (25MB)
88 14:27:27.472115 progress 25% (31MB)
89 14:27:27.833521 progress 30% (38MB)
90 14:27:28.185731 progress 35% (44MB)
91 14:27:28.596943 progress 40% (50MB)
92 14:27:28.989167 progress 45% (57MB)
93 14:27:29.364401 progress 50% (63MB)
94 14:27:29.751458 progress 55% (69MB)
95 14:27:30.124543 progress 60% (76MB)
96 14:27:30.506726 progress 65% (82MB)
97 14:27:30.892941 progress 70% (89MB)
98 14:27:31.281483 progress 75% (95MB)
99 14:27:31.827305 progress 80% (101MB)
100 14:27:32.281469 progress 85% (108MB)
101 14:27:32.568416 progress 90% (114MB)
102 14:27:32.943613 progress 95% (120MB)
103 14:27:33.345969 progress 100% (127MB)
104 14:27:33.351640 127MB downloaded in 7.32s (17.37MB/s)
105 14:27:33.351968 end: 1.3.1 http-download (duration 00:00:07) [common]
107 14:27:33.352287 end: 1.3 download-retry (duration 00:00:07) [common]
108 14:27:33.352376 start: 1.4 download-retry (timeout 00:09:53) [common]
109 14:27:33.352466 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 14:27:33.352640 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1308-ge1d2f27f3d7b0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:27:33.352713 saving as /var/lib/lava/dispatcher/tmp/10607770/tftp-deploy-mfk3i9dl/modules/modules.tar
112 14:27:33.352773 total size: 250548 (0MB)
113 14:27:33.352840 Using unxz to decompress xz
114 14:27:33.356399 progress 13% (0MB)
115 14:27:33.356842 progress 26% (0MB)
116 14:27:33.357075 progress 39% (0MB)
117 14:27:33.358383 progress 52% (0MB)
118 14:27:33.360398 progress 65% (0MB)
119 14:27:33.362263 progress 78% (0MB)
120 14:27:33.364224 progress 91% (0MB)
121 14:27:33.366139 progress 100% (0MB)
122 14:27:33.372032 0MB downloaded in 0.02s (12.41MB/s)
123 14:27:33.372308 end: 1.4.1 http-download (duration 00:00:00) [common]
125 14:27:33.372610 end: 1.4 download-retry (duration 00:00:00) [common]
126 14:27:33.372707 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 14:27:33.372805 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 14:27:35.471681 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10607770/extract-nfsrootfs-d88qqccr
129 14:27:35.471888 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 14:27:35.471990 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 14:27:35.472176 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan
132 14:27:35.472339 makedir: /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin
133 14:27:35.472476 makedir: /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/tests
134 14:27:35.472615 makedir: /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/results
135 14:27:35.472727 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-add-keys
136 14:27:35.472884 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-add-sources
137 14:27:35.473011 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-background-process-start
138 14:27:35.473139 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-background-process-stop
139 14:27:35.473263 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-common-functions
140 14:27:35.473381 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-echo-ipv4
141 14:27:35.473505 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-install-packages
142 14:27:35.473633 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-installed-packages
143 14:27:35.473756 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-os-build
144 14:27:35.473884 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-probe-channel
145 14:27:35.474010 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-probe-ip
146 14:27:35.474194 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-target-ip
147 14:27:35.474336 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-target-mac
148 14:27:35.474489 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-target-storage
149 14:27:35.474646 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-test-case
150 14:27:35.474837 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-test-event
151 14:27:35.474994 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-test-feedback
152 14:27:35.475148 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-test-raise
153 14:27:35.475299 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-test-reference
154 14:27:35.475458 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-test-runner
155 14:27:35.475611 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-test-set
156 14:27:35.475749 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-test-shell
157 14:27:35.475872 Updating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-install-packages (oe)
158 14:27:35.476020 Updating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/bin/lava-installed-packages (oe)
159 14:27:35.476140 Creating /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/environment
160 14:27:35.476263 LAVA metadata
161 14:27:35.476362 - LAVA_JOB_ID=10607770
162 14:27:35.476459 - LAVA_DISPATCHER_IP=192.168.201.1
163 14:27:35.476629 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 14:27:35.476698 skipped lava-vland-overlay
165 14:27:35.476788 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 14:27:35.476885 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 14:27:35.476949 skipped lava-multinode-overlay
168 14:27:35.477021 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 14:27:35.477098 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 14:27:35.477172 Loading test definitions
171 14:27:35.477262 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 14:27:35.477337 Using /lava-10607770 at stage 0
173 14:27:35.477644 uuid=10607770_1.5.2.3.1 testdef=None
174 14:27:35.477765 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 14:27:35.477880 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 14:27:35.478600 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 14:27:35.478985 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 14:27:35.479793 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 14:27:35.480020 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 14:27:35.481327 runner path: /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/0/tests/0_dmesg test_uuid 10607770_1.5.2.3.1
183 14:27:35.481513 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 14:27:35.481733 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 14:27:35.481804 Using /lava-10607770 at stage 1
187 14:27:35.482122 uuid=10607770_1.5.2.3.5 testdef=None
188 14:27:35.482209 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 14:27:35.482324 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 14:27:35.482824 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 14:27:35.483052 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 14:27:35.483760 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 14:27:35.484016 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 14:27:35.484659 runner path: /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/1/tests/1_bootrr test_uuid 10607770_1.5.2.3.5
197 14:27:35.484837 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 14:27:35.485037 Creating lava-test-runner.conf files
200 14:27:35.485100 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/0 for stage 0
201 14:27:35.485216 - 0_dmesg
202 14:27:35.485293 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10607770/lava-overlay-zqwcctan/lava-10607770/1 for stage 1
203 14:27:35.485380 - 1_bootrr
204 14:27:35.485489 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 14:27:35.485584 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 14:27:35.493712 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 14:27:35.493859 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 14:27:35.493957 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 14:27:35.494045 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 14:27:35.494131 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 14:27:35.627228 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 14:27:35.627601 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 14:27:35.627722 extracting modules file /var/lib/lava/dispatcher/tmp/10607770/tftp-deploy-mfk3i9dl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10607770/extract-nfsrootfs-d88qqccr
214 14:27:35.641492 extracting modules file /var/lib/lava/dispatcher/tmp/10607770/tftp-deploy-mfk3i9dl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10607770/extract-overlay-ramdisk-fkhviwoc/ramdisk
215 14:27:35.654466 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 14:27:35.654636 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 14:27:35.654733 [common] Applying overlay to NFS
218 14:27:35.654804 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10607770/compress-overlay-cibdwtm8/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10607770/extract-nfsrootfs-d88qqccr
219 14:27:35.662738 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 14:27:35.662882 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 14:27:35.662983 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 14:27:35.663071 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 14:27:35.663153 Building ramdisk /var/lib/lava/dispatcher/tmp/10607770/extract-overlay-ramdisk-fkhviwoc/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10607770/extract-overlay-ramdisk-fkhviwoc/ramdisk
224 14:27:35.727580 >> 26159 blocks
225 14:27:36.315139 rename /var/lib/lava/dispatcher/tmp/10607770/extract-overlay-ramdisk-fkhviwoc/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10607770/tftp-deploy-mfk3i9dl/ramdisk/ramdisk.cpio.gz
226 14:27:36.315568 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 14:27:36.315697 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
228 14:27:36.315797 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
229 14:27:36.315895 No mkimage arch provided, not using FIT.
230 14:27:36.315981 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 14:27:36.316066 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 14:27:36.316264 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 14:27:36.316398 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
234 14:27:36.316535 No LXC device requested
235 14:27:36.316666 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 14:27:36.316792 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
237 14:27:36.316876 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 14:27:36.316944 Checking files for TFTP limit of 4294967296 bytes.
239 14:27:36.317387 end: 1 tftp-deploy (duration 00:00:10) [common]
240 14:27:36.317490 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 14:27:36.317597 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 14:27:36.317729 substitutions:
243 14:27:36.317794 - {DTB}: None
244 14:27:36.317855 - {INITRD}: 10607770/tftp-deploy-mfk3i9dl/ramdisk/ramdisk.cpio.gz
245 14:27:36.317913 - {KERNEL}: 10607770/tftp-deploy-mfk3i9dl/kernel/bzImage
246 14:27:36.317993 - {LAVA_MAC}: None
247 14:27:36.318063 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10607770/extract-nfsrootfs-d88qqccr
248 14:27:36.318122 - {NFS_SERVER_IP}: 192.168.201.1
249 14:27:36.318177 - {PRESEED_CONFIG}: None
250 14:27:36.318230 - {PRESEED_LOCAL}: None
251 14:27:36.318283 - {RAMDISK}: 10607770/tftp-deploy-mfk3i9dl/ramdisk/ramdisk.cpio.gz
252 14:27:36.318337 - {ROOT_PART}: None
253 14:27:36.318428 - {ROOT}: None
254 14:27:36.318481 - {SERVER_IP}: 192.168.201.1
255 14:27:36.318534 - {TEE}: None
256 14:27:36.318588 Parsed boot commands:
257 14:27:36.318640 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 14:27:36.318845 Parsed boot commands: tftpboot 192.168.201.1 10607770/tftp-deploy-mfk3i9dl/kernel/bzImage 10607770/tftp-deploy-mfk3i9dl/kernel/cmdline 10607770/tftp-deploy-mfk3i9dl/ramdisk/ramdisk.cpio.gz
259 14:27:36.318935 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 14:27:36.319021 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 14:27:36.319142 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 14:27:36.319230 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 14:27:36.319301 Not connected, no need to disconnect.
264 14:27:36.319375 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 14:27:36.319459 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 14:27:36.319553 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-13'
267 14:27:36.323275 Setting prompt string to ['lava-test: # ']
268 14:27:36.323669 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 14:27:36.323789 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 14:27:36.323911 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 14:27:36.324016 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 14:27:36.324241 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=reboot'
273 14:27:41.463960 >> Command sent successfully.
274 14:27:41.466568 Returned 0 in 5 seconds
275 14:27:41.566969 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 14:27:41.567298 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 14:27:41.567400 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 14:27:41.567506 Setting prompt string to 'Starting depthcharge on Voema...'
280 14:27:41.567581 Changing prompt to 'Starting depthcharge on Voema...'
281 14:27:41.567686 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 14:27:41.568060 [Enter `^Ec?' for help]
283 14:27:43.129566
284 14:27:43.129721
285 14:27:43.139997 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 14:27:43.146099 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
287 14:27:43.149260 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 14:27:43.152425 CPU: AES supported, TXT NOT supported, VT supported
289 14:27:43.159885 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 14:27:43.162882 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 14:27:43.170154 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 14:27:43.173240 VBOOT: Loading verstage.
293 14:27:43.176261 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 14:27:43.183114 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 14:27:43.186258 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 14:27:43.196656 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 14:27:43.203619 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 14:27:43.203748
299 14:27:43.203821
300 14:27:43.213715 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 14:27:43.230405 Probing TPM: . done!
302 14:27:43.233552 TPM ready after 0 ms
303 14:27:43.237163 Connected to device vid:did:rid of 1ae0:0028:00
304 14:27:43.248277 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
305 14:27:43.254615 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 14:27:43.258364 Initialized TPM device CR50 revision 0
307 14:27:43.322500 tlcl_send_startup: Startup return code is 0
308 14:27:43.322644 TPM: setup succeeded
309 14:27:43.337081 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 14:27:43.351332 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 14:27:43.364401 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 14:27:43.373591 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 14:27:43.377387 Chrome EC: UHEPI supported
314 14:27:43.381020 Phase 1
315 14:27:43.383991 FMAP: area GBB found @ 1805000 (458752 bytes)
316 14:27:43.394054 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 14:27:43.400290 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 14:27:43.407034 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 14:27:43.413889 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 14:27:43.416946 Recovery requested (1009000e)
321 14:27:43.420697 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 14:27:43.432367 tlcl_extend: response is 0
323 14:27:43.438618 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 14:27:43.448630 tlcl_extend: response is 0
325 14:27:43.455349 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 14:27:43.461601 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 14:27:43.468009 BS: verstage times (exec / console): total (unknown) / 142 ms
328 14:27:43.468107
329 14:27:43.468176
330 14:27:43.481728 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 14:27:43.488371 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 14:27:43.491427 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 14:27:43.494988 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 14:27:43.501270 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 14:27:43.504961 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 14:27:43.507926 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
337 14:27:43.511657 TCO_STS: 0000 0000
338 14:27:43.514715 GEN_PMCON: d0015038 00002200
339 14:27:43.517938 GBLRST_CAUSE: 00000000 00000000
340 14:27:43.521686 HPR_CAUSE0: 00000000
341 14:27:43.521791 prev_sleep_state 5
342 14:27:43.524898 Boot Count incremented to 18627
343 14:27:43.531566 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 14:27:43.538038 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 14:27:43.547911 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 14:27:43.554546 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 14:27:43.557553 Chrome EC: UHEPI supported
348 14:27:43.564284 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 14:27:43.575590 Probing TPM: done!
350 14:27:43.581955 Connected to device vid:did:rid of 1ae0:0028:00
351 14:27:43.591986 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
352 14:27:43.595339 Initialized TPM device CR50 revision 0
353 14:27:43.610290 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 14:27:43.617081 MRC: Hash idx 0x100b comparison successful.
355 14:27:43.620214 MRC cache found, size faa8
356 14:27:43.620307 bootmode is set to: 2
357 14:27:43.623453 SPD index = 2
358 14:27:43.630259 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 14:27:43.633389 SPD: module type is LPDDR4X
360 14:27:43.636393 SPD: module part number is MT53D1G64D4NW-046
361 14:27:43.643316 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
362 14:27:43.646324 SPD: device width 16 bits, bus width 16 bits
363 14:27:43.653160 SPD: module size is 2048 MB (per channel)
364 14:27:44.082019 CBMEM:
365 14:27:44.085097 IMD: root @ 0x76fff000 254 entries.
366 14:27:44.088946 IMD: root @ 0x76ffec00 62 entries.
367 14:27:44.091728 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 14:27:44.098251 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 14:27:44.102038 External stage cache:
370 14:27:44.105285 IMD: root @ 0x7b3ff000 254 entries.
371 14:27:44.108372 IMD: root @ 0x7b3fec00 62 entries.
372 14:27:44.122973 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 14:27:44.129696 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 14:27:44.136305 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 14:27:44.150211 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 14:27:44.156748 cse_lite: Skip switching to RW in the recovery path
377 14:27:44.156855 8 DIMMs found
378 14:27:44.159847 SMM Memory Map
379 14:27:44.163562 SMRAM : 0x7b000000 0x800000
380 14:27:44.166671 Subregion 0: 0x7b000000 0x200000
381 14:27:44.170342 Subregion 1: 0x7b200000 0x200000
382 14:27:44.173573 Subregion 2: 0x7b400000 0x400000
383 14:27:44.173661 top_of_ram = 0x77000000
384 14:27:44.179646 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 14:27:44.186788 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 14:27:44.189724 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 14:27:44.196444 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 14:27:44.203305 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 14:27:44.209546 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 14:27:44.219734 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 14:27:44.226704 Processing 211 relocs. Offset value of 0x74c0b000
392 14:27:44.233339 BS: romstage times (exec / console): total (unknown) / 277 ms
393 14:27:44.239038
394 14:27:44.239134
395 14:27:44.248580 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 14:27:44.252269 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 14:27:44.262135 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 14:27:44.268913 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 14:27:44.275135 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 14:27:44.281897 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 14:27:44.325581 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 14:27:44.332371 Processing 5008 relocs. Offset value of 0x75d98000
403 14:27:44.335545 BS: postcar times (exec / console): total (unknown) / 59 ms
404 14:27:44.338504
405 14:27:44.338589
406 14:27:44.348490 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 14:27:44.348650 Normal boot
408 14:27:44.352245 FW_CONFIG value is 0x804c02
409 14:27:44.355563 PCI: 00:07.0 disabled by fw_config
410 14:27:44.358585 PCI: 00:07.1 disabled by fw_config
411 14:27:44.362169 PCI: 00:0d.2 disabled by fw_config
412 14:27:44.368659 PCI: 00:1c.7 disabled by fw_config
413 14:27:44.371809 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 14:27:44.378506 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 14:27:44.381522 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 14:27:44.388416 GENERIC: 0.0 disabled by fw_config
417 14:27:44.392012 GENERIC: 1.0 disabled by fw_config
418 14:27:44.394982 fw_config match found: DB_USB=USB3_ACTIVE
419 14:27:44.398676 fw_config match found: DB_USB=USB3_ACTIVE
420 14:27:44.401598 fw_config match found: DB_USB=USB3_ACTIVE
421 14:27:44.408194 fw_config match found: DB_USB=USB3_ACTIVE
422 14:27:44.411297 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 14:27:44.421376 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 14:27:44.428240 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 14:27:44.434479 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 14:27:44.438170 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 14:27:44.444978 microcode: Update skipped, already up-to-date
428 14:27:44.451418 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 14:27:44.479460 Detected 4 core, 8 thread CPU.
430 14:27:44.482548 Setting up SMI for CPU
431 14:27:44.485669 IED base = 0x7b400000
432 14:27:44.485756 IED size = 0x00400000
433 14:27:44.488708 Will perform SMM setup.
434 14:27:44.495869 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
435 14:27:44.502284 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 14:27:44.509026 Processing 16 relocs. Offset value of 0x00030000
437 14:27:44.512272 Attempting to start 7 APs
438 14:27:44.515263 Waiting for 10ms after sending INIT.
439 14:27:44.530995 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
440 14:27:44.534118 AP: slot 3 apic_id 5.
441 14:27:44.537883 AP: slot 7 apic_id 4.
442 14:27:44.537974 AP: slot 2 apic_id 3.
443 14:27:44.540927 AP: slot 6 apic_id 2.
444 14:27:44.544461 AP: slot 4 apic_id 7.
445 14:27:44.544602 AP: slot 5 apic_id 6.
446 14:27:44.544671 done.
447 14:27:44.550603 Waiting for 2nd SIPI to complete...done.
448 14:27:44.557541 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 14:27:44.564299 Processing 13 relocs. Offset value of 0x00038000
450 14:27:44.567364 Unable to locate Global NVS
451 14:27:44.573922 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 14:27:44.577353 Installing permanent SMM handler to 0x7b000000
453 14:27:44.587012 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 14:27:44.590665 Processing 794 relocs. Offset value of 0x7b010000
455 14:27:44.600402 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 14:27:44.603833 Processing 13 relocs. Offset value of 0x7b008000
457 14:27:44.609994 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 14:27:44.616538 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 14:27:44.623398 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 14:27:44.626507 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 14:27:44.633466 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 14:27:44.639763 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 14:27:44.646544 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 14:27:44.650138 Unable to locate Global NVS
465 14:27:44.656244 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 14:27:44.659998 Clearing SMI status registers
467 14:27:44.662943 SMI_STS: PM1
468 14:27:44.663029 PM1_STS: PWRBTN
469 14:27:44.669763 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 14:27:44.673401 In relocation handler: CPU 0
471 14:27:44.676152 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 14:27:44.683137 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 14:27:44.686151 Relocation complete.
474 14:27:44.692729 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 14:27:44.695884 In relocation handler: CPU 1
476 14:27:44.698988 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 14:27:44.702520 Relocation complete.
478 14:27:44.708934 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
479 14:27:44.712570 In relocation handler: CPU 7
480 14:27:44.715521 New SMBASE=0x7affe400 IEDBASE=0x7b400000
481 14:27:44.719292 Writing SMRR. base = 0x7b000006, mask=0xff800c00
482 14:27:44.722385 Relocation complete.
483 14:27:44.729111 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
484 14:27:44.732363 In relocation handler: CPU 4
485 14:27:44.735517 New SMBASE=0x7afff000 IEDBASE=0x7b400000
486 14:27:44.738658 Relocation complete.
487 14:27:44.745499 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
488 14:27:44.748486 In relocation handler: CPU 5
489 14:27:44.752122 New SMBASE=0x7affec00 IEDBASE=0x7b400000
490 14:27:44.758881 Writing SMRR. base = 0x7b000006, mask=0xff800c00
491 14:27:44.762111 Relocation complete.
492 14:27:44.768225 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
493 14:27:44.772214 In relocation handler: CPU 3
494 14:27:44.775339 New SMBASE=0x7afff400 IEDBASE=0x7b400000
495 14:27:44.778492 Relocation complete.
496 14:27:44.785001 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
497 14:27:44.788377 In relocation handler: CPU 2
498 14:27:44.791354 New SMBASE=0x7afff800 IEDBASE=0x7b400000
499 14:27:44.795029 Relocation complete.
500 14:27:44.801736 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
501 14:27:44.805156 In relocation handler: CPU 6
502 14:27:44.808197 New SMBASE=0x7affe800 IEDBASE=0x7b400000
503 14:27:44.811368 Writing SMRR. base = 0x7b000006, mask=0xff800c00
504 14:27:44.814690 Relocation complete.
505 14:27:44.817821 Initializing CPU #0
506 14:27:44.820903 CPU: vendor Intel device 806c1
507 14:27:44.824748 CPU: family 06, model 8c, stepping 01
508 14:27:44.827754 Clearing out pending MCEs
509 14:27:44.827836 Setting up local APIC...
510 14:27:44.831077 apic_id: 0x00 done.
511 14:27:44.834137 Turbo is available but hidden
512 14:27:44.837928 Turbo is available and visible
513 14:27:44.841019 microcode: Update skipped, already up-to-date
514 14:27:44.844179 CPU #0 initialized
515 14:27:44.847927 Initializing CPU #1
516 14:27:44.848014 Initializing CPU #6
517 14:27:44.850920 Initializing CPU #4
518 14:27:44.853916 Initializing CPU #5
519 14:27:44.857618 CPU: vendor Intel device 806c1
520 14:27:44.860794 CPU: family 06, model 8c, stepping 01
521 14:27:44.860880 Initializing CPU #7
522 14:27:44.863934 Initializing CPU #3
523 14:27:44.867063 CPU: vendor Intel device 806c1
524 14:27:44.870802 CPU: family 06, model 8c, stepping 01
525 14:27:44.873749 CPU: vendor Intel device 806c1
526 14:27:44.877478 CPU: family 06, model 8c, stepping 01
527 14:27:44.880652 Clearing out pending MCEs
528 14:27:44.883720 Clearing out pending MCEs
529 14:27:44.883805 Setting up local APIC...
530 14:27:44.887391 CPU: vendor Intel device 806c1
531 14:27:44.893989 CPU: family 06, model 8c, stepping 01
532 14:27:44.894078 Clearing out pending MCEs
533 14:27:44.896935 Clearing out pending MCEs
534 14:27:44.901072 Initializing CPU #2
535 14:27:44.904695 CPU: vendor Intel device 806c1
536 14:27:44.908341 CPU: family 06, model 8c, stepping 01
537 14:27:44.908425 CPU: vendor Intel device 806c1
538 14:27:44.914985 CPU: family 06, model 8c, stepping 01
539 14:27:44.915068 Clearing out pending MCEs
540 14:27:44.918118 Clearing out pending MCEs
541 14:27:44.921548 apic_id: 0x04 done.
542 14:27:44.924785 Setting up local APIC...
543 14:27:44.924879 Setting up local APIC...
544 14:27:44.928440 Setting up local APIC...
545 14:27:44.931579 apic_id: 0x03 done.
546 14:27:44.934699 Setting up local APIC...
547 14:27:44.938378 microcode: Update skipped, already up-to-date
548 14:27:44.941291 apic_id: 0x05 done.
549 14:27:44.941386 CPU #7 initialized
550 14:27:44.948204 microcode: Update skipped, already up-to-date
551 14:27:44.948295 apic_id: 0x02 done.
552 14:27:44.954443 microcode: Update skipped, already up-to-date
553 14:27:44.957585 microcode: Update skipped, already up-to-date
554 14:27:44.961306 CPU #2 initialized
555 14:27:44.961391 CPU: vendor Intel device 806c1
556 14:27:44.968128 CPU: family 06, model 8c, stepping 01
557 14:27:44.968215 CPU #3 initialized
558 14:27:44.971137 apic_id: 0x06 done.
559 14:27:44.974274 Setting up local APIC...
560 14:27:44.974385 Clearing out pending MCEs
561 14:27:44.978030 CPU #6 initialized
562 14:27:44.981145 Setting up local APIC...
563 14:27:44.981253 apic_id: 0x07 done.
564 14:27:44.987458 microcode: Update skipped, already up-to-date
565 14:27:44.991169 microcode: Update skipped, already up-to-date
566 14:27:44.994266 CPU #5 initialized
567 14:27:44.994378 CPU #4 initialized
568 14:27:44.997346 apic_id: 0x01 done.
569 14:27:45.000881 microcode: Update skipped, already up-to-date
570 14:27:45.003944 CPU #1 initialized
571 14:27:45.007326 bsp_do_flight_plan done after 454 msecs.
572 14:27:45.011133 CPU: frequency set to 4400 MHz
573 14:27:45.014106 Enabling SMIs.
574 14:27:45.020441 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
575 14:27:45.035402 SATAXPCIE1 indicates PCIe NVMe is present
576 14:27:45.039090 Probing TPM: done!
577 14:27:45.042246 Connected to device vid:did:rid of 1ae0:0028:00
578 14:27:45.052980 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
579 14:27:45.056748 Initialized TPM device CR50 revision 0
580 14:27:45.059918 Enabling S0i3.4
581 14:27:45.066498 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 14:27:45.069712 Found a VBT of 8704 bytes after decompression
583 14:27:45.075967 cse_lite: CSE RO boot. HybridStorageMode disabled
584 14:27:45.082715 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 14:27:45.158011 FSPS returned 0
586 14:27:45.161046 Executing Phase 1 of FspMultiPhaseSiInit
587 14:27:45.170862 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 14:27:45.174694 port C0 DISC req: usage 1 usb3 1 usb2 5
589 14:27:45.177738 Raw Buffer output 0 00000511
590 14:27:45.180852 Raw Buffer output 1 00000000
591 14:27:45.184527 pmc_send_ipc_cmd succeeded
592 14:27:45.191343 port C1 DISC req: usage 1 usb3 2 usb2 3
593 14:27:45.191438 Raw Buffer output 0 00000321
594 14:27:45.194480 Raw Buffer output 1 00000000
595 14:27:45.198686 pmc_send_ipc_cmd succeeded
596 14:27:45.204336 Detected 4 core, 8 thread CPU.
597 14:27:45.207436 Detected 4 core, 8 thread CPU.
598 14:27:45.407344 Display FSP Version Info HOB
599 14:27:45.410414 Reference Code - CPU = a.0.4c.31
600 14:27:45.413613 uCode Version = 0.0.0.86
601 14:27:45.416888 TXT ACM version = ff.ff.ff.ffff
602 14:27:45.419994 Reference Code - ME = a.0.4c.31
603 14:27:45.423592 MEBx version = 0.0.0.0
604 14:27:45.426714 ME Firmware Version = Consumer SKU
605 14:27:45.430317 Reference Code - PCH = a.0.4c.31
606 14:27:45.433775 PCH-CRID Status = Disabled
607 14:27:45.436819 PCH-CRID Original Value = ff.ff.ff.ffff
608 14:27:45.440158 PCH-CRID New Value = ff.ff.ff.ffff
609 14:27:45.443129 OPROM - RST - RAID = ff.ff.ff.ffff
610 14:27:45.446821 PCH Hsio Version = 4.0.0.0
611 14:27:45.450292 Reference Code - SA - System Agent = a.0.4c.31
612 14:27:45.452978 Reference Code - MRC = 2.0.0.1
613 14:27:45.456370 SA - PCIe Version = a.0.4c.31
614 14:27:45.460209 SA-CRID Status = Disabled
615 14:27:45.463372 SA-CRID Original Value = 0.0.0.1
616 14:27:45.466382 SA-CRID New Value = 0.0.0.1
617 14:27:45.469575 OPROM - VBIOS = ff.ff.ff.ffff
618 14:27:45.473246 IO Manageability Engine FW Version = 11.1.4.0
619 14:27:45.476445 PHY Build Version = 0.0.0.e0
620 14:27:45.479606 Thunderbolt(TM) FW Version = 0.0.0.0
621 14:27:45.487106 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
622 14:27:45.490958 ITSS IRQ Polarities Before:
623 14:27:45.491055 IPC0: 0xffffffff
624 14:27:45.493958 IPC1: 0xffffffff
625 14:27:45.494069 IPC2: 0xffffffff
626 14:27:45.497015 IPC3: 0xffffffff
627 14:27:45.500824 ITSS IRQ Polarities After:
628 14:27:45.500913 IPC0: 0xffffffff
629 14:27:45.503858 IPC1: 0xffffffff
630 14:27:45.503946 IPC2: 0xffffffff
631 14:27:45.507075 IPC3: 0xffffffff
632 14:27:45.510264 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 14:27:45.524014 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 14:27:45.533594 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 14:27:45.546769 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 14:27:45.553141 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
637 14:27:45.553262 Enumerating buses...
638 14:27:45.560260 Show all devs... Before device enumeration.
639 14:27:45.560388 Root Device: enabled 1
640 14:27:45.563133 DOMAIN: 0000: enabled 1
641 14:27:45.566825 CPU_CLUSTER: 0: enabled 1
642 14:27:45.570113 PCI: 00:00.0: enabled 1
643 14:27:45.573155 PCI: 00:02.0: enabled 1
644 14:27:45.573281 PCI: 00:04.0: enabled 1
645 14:27:45.576379 PCI: 00:05.0: enabled 1
646 14:27:45.579475 PCI: 00:06.0: enabled 0
647 14:27:45.579597 PCI: 00:07.0: enabled 0
648 14:27:45.583314 PCI: 00:07.1: enabled 0
649 14:27:45.586473 PCI: 00:07.2: enabled 0
650 14:27:45.589527 PCI: 00:07.3: enabled 0
651 14:27:45.589649 PCI: 00:08.0: enabled 1
652 14:27:45.592813 PCI: 00:09.0: enabled 0
653 14:27:45.596359 PCI: 00:0a.0: enabled 0
654 14:27:45.599447 PCI: 00:0d.0: enabled 1
655 14:27:45.599554 PCI: 00:0d.1: enabled 0
656 14:27:45.603056 PCI: 00:0d.2: enabled 0
657 14:27:45.606193 PCI: 00:0d.3: enabled 0
658 14:27:45.609264 PCI: 00:0e.0: enabled 0
659 14:27:45.609375 PCI: 00:10.2: enabled 1
660 14:27:45.612976 PCI: 00:10.6: enabled 0
661 14:27:45.616107 PCI: 00:10.7: enabled 0
662 14:27:45.619174 PCI: 00:12.0: enabled 0
663 14:27:45.619281 PCI: 00:12.6: enabled 0
664 14:27:45.622275 PCI: 00:13.0: enabled 0
665 14:27:45.626048 PCI: 00:14.0: enabled 1
666 14:27:45.629204 PCI: 00:14.1: enabled 0
667 14:27:45.629290 PCI: 00:14.2: enabled 1
668 14:27:45.632381 PCI: 00:14.3: enabled 1
669 14:27:45.635974 PCI: 00:15.0: enabled 1
670 14:27:45.636060 PCI: 00:15.1: enabled 1
671 14:27:45.638943 PCI: 00:15.2: enabled 1
672 14:27:45.642570 PCI: 00:15.3: enabled 1
673 14:27:45.645489 PCI: 00:16.0: enabled 1
674 14:27:45.645572 PCI: 00:16.1: enabled 0
675 14:27:45.649114 PCI: 00:16.2: enabled 0
676 14:27:45.652065 PCI: 00:16.3: enabled 0
677 14:27:45.655482 PCI: 00:16.4: enabled 0
678 14:27:45.655595 PCI: 00:16.5: enabled 0
679 14:27:45.659059 PCI: 00:17.0: enabled 1
680 14:27:45.662051 PCI: 00:19.0: enabled 0
681 14:27:45.665644 PCI: 00:19.1: enabled 1
682 14:27:45.665731 PCI: 00:19.2: enabled 0
683 14:27:45.668506 PCI: 00:1c.0: enabled 1
684 14:27:45.672081 PCI: 00:1c.1: enabled 0
685 14:27:45.675275 PCI: 00:1c.2: enabled 0
686 14:27:45.675362 PCI: 00:1c.3: enabled 0
687 14:27:45.679105 PCI: 00:1c.4: enabled 0
688 14:27:45.681691 PCI: 00:1c.5: enabled 0
689 14:27:45.685362 PCI: 00:1c.6: enabled 1
690 14:27:45.685449 PCI: 00:1c.7: enabled 0
691 14:27:45.688441 PCI: 00:1d.0: enabled 1
692 14:27:45.691588 PCI: 00:1d.1: enabled 0
693 14:27:45.695323 PCI: 00:1d.2: enabled 1
694 14:27:45.695424 PCI: 00:1d.3: enabled 0
695 14:27:45.698273 PCI: 00:1e.0: enabled 1
696 14:27:45.702030 PCI: 00:1e.1: enabled 0
697 14:27:45.702128 PCI: 00:1e.2: enabled 1
698 14:27:45.705040 PCI: 00:1e.3: enabled 1
699 14:27:45.708666 PCI: 00:1f.0: enabled 1
700 14:27:45.711834 PCI: 00:1f.1: enabled 0
701 14:27:45.711937 PCI: 00:1f.2: enabled 1
702 14:27:45.714930 PCI: 00:1f.3: enabled 1
703 14:27:45.718093 PCI: 00:1f.4: enabled 0
704 14:27:45.721893 PCI: 00:1f.5: enabled 1
705 14:27:45.721979 PCI: 00:1f.6: enabled 0
706 14:27:45.725103 PCI: 00:1f.7: enabled 0
707 14:27:45.728239 APIC: 00: enabled 1
708 14:27:45.728326 GENERIC: 0.0: enabled 1
709 14:27:45.731280 GENERIC: 0.0: enabled 1
710 14:27:45.734972 GENERIC: 1.0: enabled 1
711 14:27:45.738047 GENERIC: 0.0: enabled 1
712 14:27:45.738134 GENERIC: 1.0: enabled 1
713 14:27:45.741658 USB0 port 0: enabled 1
714 14:27:45.744702 GENERIC: 0.0: enabled 1
715 14:27:45.748204 USB0 port 0: enabled 1
716 14:27:45.748290 GENERIC: 0.0: enabled 1
717 14:27:45.751029 I2C: 00:1a: enabled 1
718 14:27:45.754679 I2C: 00:31: enabled 1
719 14:27:45.754766 I2C: 00:32: enabled 1
720 14:27:45.757720 I2C: 00:10: enabled 1
721 14:27:45.761187 I2C: 00:15: enabled 1
722 14:27:45.761260 GENERIC: 0.0: enabled 0
723 14:27:45.764695 GENERIC: 1.0: enabled 0
724 14:27:45.767678 GENERIC: 0.0: enabled 1
725 14:27:45.771187 SPI: 00: enabled 1
726 14:27:45.771271 SPI: 00: enabled 1
727 14:27:45.774267 PNP: 0c09.0: enabled 1
728 14:27:45.777706 GENERIC: 0.0: enabled 1
729 14:27:45.777807 USB3 port 0: enabled 1
730 14:27:45.780771 USB3 port 1: enabled 1
731 14:27:45.784506 USB3 port 2: enabled 0
732 14:27:45.784611 USB3 port 3: enabled 0
733 14:27:45.787569 USB2 port 0: enabled 0
734 14:27:45.790715 USB2 port 1: enabled 1
735 14:27:45.794522 USB2 port 2: enabled 1
736 14:27:45.794607 USB2 port 3: enabled 0
737 14:27:45.797571 USB2 port 4: enabled 1
738 14:27:45.801142 USB2 port 5: enabled 0
739 14:27:45.801231 USB2 port 6: enabled 0
740 14:27:45.804223 USB2 port 7: enabled 0
741 14:27:45.807220 USB2 port 8: enabled 0
742 14:27:45.810889 USB2 port 9: enabled 0
743 14:27:45.810978 USB3 port 0: enabled 0
744 14:27:45.814084 USB3 port 1: enabled 1
745 14:27:45.817211 USB3 port 2: enabled 0
746 14:27:45.817299 USB3 port 3: enabled 0
747 14:27:45.820397 GENERIC: 0.0: enabled 1
748 14:27:45.824083 GENERIC: 1.0: enabled 1
749 14:27:45.827254 APIC: 01: enabled 1
750 14:27:45.827346 APIC: 03: enabled 1
751 14:27:45.830400 APIC: 05: enabled 1
752 14:27:45.830490 APIC: 07: enabled 1
753 14:27:45.833661 APIC: 06: enabled 1
754 14:27:45.837377 APIC: 02: enabled 1
755 14:27:45.837466 APIC: 04: enabled 1
756 14:27:45.840473 Compare with tree...
757 14:27:45.843669 Root Device: enabled 1
758 14:27:45.843759 DOMAIN: 0000: enabled 1
759 14:27:45.846710 PCI: 00:00.0: enabled 1
760 14:27:45.850293 PCI: 00:02.0: enabled 1
761 14:27:45.853299 PCI: 00:04.0: enabled 1
762 14:27:45.856990 GENERIC: 0.0: enabled 1
763 14:27:45.857082 PCI: 00:05.0: enabled 1
764 14:27:45.859903 PCI: 00:06.0: enabled 0
765 14:27:45.863341 PCI: 00:07.0: enabled 0
766 14:27:45.866938 GENERIC: 0.0: enabled 1
767 14:27:45.869867 PCI: 00:07.1: enabled 0
768 14:27:45.869969 GENERIC: 1.0: enabled 1
769 14:27:45.873385 PCI: 00:07.2: enabled 0
770 14:27:45.876492 GENERIC: 0.0: enabled 1
771 14:27:45.879904 PCI: 00:07.3: enabled 0
772 14:27:45.882897 GENERIC: 1.0: enabled 1
773 14:27:45.886410 PCI: 00:08.0: enabled 1
774 14:27:45.886523 PCI: 00:09.0: enabled 0
775 14:27:45.890061 PCI: 00:0a.0: enabled 0
776 14:27:45.893224 PCI: 00:0d.0: enabled 1
777 14:27:45.896234 USB0 port 0: enabled 1
778 14:27:45.900108 USB3 port 0: enabled 1
779 14:27:45.900224 USB3 port 1: enabled 1
780 14:27:45.903160 USB3 port 2: enabled 0
781 14:27:45.906511 USB3 port 3: enabled 0
782 14:27:45.909428 PCI: 00:0d.1: enabled 0
783 14:27:45.913215 PCI: 00:0d.2: enabled 0
784 14:27:45.913325 GENERIC: 0.0: enabled 1
785 14:27:45.916255 PCI: 00:0d.3: enabled 0
786 14:27:45.919408 PCI: 00:0e.0: enabled 0
787 14:27:45.923238 PCI: 00:10.2: enabled 1
788 14:27:45.926411 PCI: 00:10.6: enabled 0
789 14:27:45.926501 PCI: 00:10.7: enabled 0
790 14:27:45.929561 PCI: 00:12.0: enabled 0
791 14:27:45.932641 PCI: 00:12.6: enabled 0
792 14:27:45.936434 PCI: 00:13.0: enabled 0
793 14:27:45.939442 PCI: 00:14.0: enabled 1
794 14:27:45.939556 USB0 port 0: enabled 1
795 14:27:45.942588 USB2 port 0: enabled 0
796 14:27:45.945765 USB2 port 1: enabled 1
797 14:27:45.949444 USB2 port 2: enabled 1
798 14:27:45.952596 USB2 port 3: enabled 0
799 14:27:45.955643 USB2 port 4: enabled 1
800 14:27:45.955762 USB2 port 5: enabled 0
801 14:27:45.959039 USB2 port 6: enabled 0
802 14:27:45.962669 USB2 port 7: enabled 0
803 14:27:45.965581 USB2 port 8: enabled 0
804 14:27:45.969106 USB2 port 9: enabled 0
805 14:27:45.972452 USB3 port 0: enabled 0
806 14:27:45.972560 USB3 port 1: enabled 1
807 14:27:45.975471 USB3 port 2: enabled 0
808 14:27:45.978679 USB3 port 3: enabled 0
809 14:27:45.982210 PCI: 00:14.1: enabled 0
810 14:27:45.985608 PCI: 00:14.2: enabled 1
811 14:27:45.985723 PCI: 00:14.3: enabled 1
812 14:27:45.988687 GENERIC: 0.0: enabled 1
813 14:27:45.992215 PCI: 00:15.0: enabled 1
814 14:27:45.995321 I2C: 00:1a: enabled 1
815 14:27:45.998466 I2C: 00:31: enabled 1
816 14:27:45.998552 I2C: 00:32: enabled 1
817 14:27:46.002170 PCI: 00:15.1: enabled 1
818 14:27:46.005179 I2C: 00:10: enabled 1
819 14:27:46.008775 PCI: 00:15.2: enabled 1
820 14:27:46.012262 PCI: 00:15.3: enabled 1
821 14:27:46.012343 PCI: 00:16.0: enabled 1
822 14:27:46.015352 PCI: 00:16.1: enabled 0
823 14:27:46.018519 PCI: 00:16.2: enabled 0
824 14:27:46.021637 PCI: 00:16.3: enabled 0
825 14:27:46.025291 PCI: 00:16.4: enabled 0
826 14:27:46.025377 PCI: 00:16.5: enabled 0
827 14:27:46.028371 PCI: 00:17.0: enabled 1
828 14:27:46.031468 PCI: 00:19.0: enabled 0
829 14:27:46.035154 PCI: 00:19.1: enabled 1
830 14:27:46.035240 I2C: 00:15: enabled 1
831 14:27:46.038330 PCI: 00:19.2: enabled 0
832 14:27:46.041546 PCI: 00:1d.0: enabled 1
833 14:27:46.044649 GENERIC: 0.0: enabled 1
834 14:27:46.048482 PCI: 00:1e.0: enabled 1
835 14:27:46.051658 PCI: 00:1e.1: enabled 0
836 14:27:46.051753 PCI: 00:1e.2: enabled 1
837 14:27:46.054968 SPI: 00: enabled 1
838 14:27:46.058108 PCI: 00:1e.3: enabled 1
839 14:27:46.058276 SPI: 00: enabled 1
840 14:27:46.061595 PCI: 00:1f.0: enabled 1
841 14:27:46.064474 PNP: 0c09.0: enabled 1
842 14:27:46.068138 PCI: 00:1f.1: enabled 0
843 14:27:46.071232 PCI: 00:1f.2: enabled 1
844 14:27:46.071369 GENERIC: 0.0: enabled 1
845 14:27:46.074623 GENERIC: 0.0: enabled 1
846 14:27:46.078138 GENERIC: 1.0: enabled 1
847 14:27:46.129533 PCI: 00:1f.3: enabled 1
848 14:27:46.129695 PCI: 00:1f.4: enabled 0
849 14:27:46.129986 PCI: 00:1f.5: enabled 1
850 14:27:46.130083 PCI: 00:1f.6: enabled 0
851 14:27:46.130174 PCI: 00:1f.7: enabled 0
852 14:27:46.130266 CPU_CLUSTER: 0: enabled 1
853 14:27:46.130356 APIC: 00: enabled 1
854 14:27:46.130443 APIC: 01: enabled 1
855 14:27:46.130563 APIC: 03: enabled 1
856 14:27:46.130653 APIC: 05: enabled 1
857 14:27:46.130759 APIC: 07: enabled 1
858 14:27:46.130853 APIC: 06: enabled 1
859 14:27:46.130945 APIC: 02: enabled 1
860 14:27:46.131055 APIC: 04: enabled 1
861 14:27:46.131144 Root Device scanning...
862 14:27:46.131248 scan_static_bus for Root Device
863 14:27:46.131333 DOMAIN: 0000 enabled
864 14:27:46.131419 CPU_CLUSTER: 0 enabled
865 14:27:46.131563 DOMAIN: 0000 scanning...
866 14:27:46.131630 PCI: pci_scan_bus for bus 00
867 14:27:46.163462 PCI: 00:00.0 [8086/0000] ops
868 14:27:46.163593 PCI: 00:00.0 [8086/9a12] enabled
869 14:27:46.164173 PCI: 00:02.0 [8086/0000] bus ops
870 14:27:46.164296 PCI: 00:02.0 [8086/9a40] enabled
871 14:27:46.164606 PCI: 00:04.0 [8086/0000] bus ops
872 14:27:46.164682 PCI: 00:04.0 [8086/9a03] enabled
873 14:27:46.164764 PCI: 00:05.0 [8086/9a19] enabled
874 14:27:46.164842 PCI: 00:07.0 [0000/0000] hidden
875 14:27:46.164922 PCI: 00:08.0 [8086/9a11] enabled
876 14:27:46.167790 PCI: 00:0a.0 [8086/9a0d] disabled
877 14:27:46.167926 PCI: 00:0d.0 [8086/0000] bus ops
878 14:27:46.171001 PCI: 00:0d.0 [8086/9a13] enabled
879 14:27:46.174456 PCI: 00:14.0 [8086/0000] bus ops
880 14:27:46.177473 PCI: 00:14.0 [8086/a0ed] enabled
881 14:27:46.181042 PCI: 00:14.2 [8086/a0ef] enabled
882 14:27:46.184385 PCI: 00:14.3 [8086/0000] bus ops
883 14:27:46.187427 PCI: 00:14.3 [8086/a0f0] enabled
884 14:27:46.191070 PCI: 00:15.0 [8086/0000] bus ops
885 14:27:46.193925 PCI: 00:15.0 [8086/a0e8] enabled
886 14:27:46.197594 PCI: 00:15.1 [8086/0000] bus ops
887 14:27:46.201089 PCI: 00:15.1 [8086/a0e9] enabled
888 14:27:46.203991 PCI: 00:15.2 [8086/0000] bus ops
889 14:27:46.207119 PCI: 00:15.2 [8086/a0ea] enabled
890 14:27:46.210874 PCI: 00:15.3 [8086/0000] bus ops
891 14:27:46.213958 PCI: 00:15.3 [8086/a0eb] enabled
892 14:27:46.217219 PCI: 00:16.0 [8086/0000] ops
893 14:27:46.220305 PCI: 00:16.0 [8086/a0e0] enabled
894 14:27:46.224069 PCI: Static device PCI: 00:17.0 not found, disabling it.
895 14:27:46.227266 PCI: 00:19.0 [8086/0000] bus ops
896 14:27:46.230414 PCI: 00:19.0 [8086/a0c5] disabled
897 14:27:46.233454 PCI: 00:19.1 [8086/0000] bus ops
898 14:27:46.237311 PCI: 00:19.1 [8086/a0c6] enabled
899 14:27:46.240471 PCI: 00:1d.0 [8086/0000] bus ops
900 14:27:46.243620 PCI: 00:1d.0 [8086/a0b0] enabled
901 14:27:46.246930 PCI: 00:1e.0 [8086/0000] ops
902 14:27:46.250062 PCI: 00:1e.0 [8086/a0a8] enabled
903 14:27:46.253741 PCI: 00:1e.2 [8086/0000] bus ops
904 14:27:46.256897 PCI: 00:1e.2 [8086/a0aa] enabled
905 14:27:46.260009 PCI: 00:1e.3 [8086/0000] bus ops
906 14:27:46.263060 PCI: 00:1e.3 [8086/a0ab] enabled
907 14:27:46.266657 PCI: 00:1f.0 [8086/0000] bus ops
908 14:27:46.269889 PCI: 00:1f.0 [8086/a087] enabled
909 14:27:46.273355 RTC Init
910 14:27:46.276331 Set power on after power failure.
911 14:27:46.276458 Disabling Deep S3
912 14:27:46.280062 Disabling Deep S3
913 14:27:46.282985 Disabling Deep S4
914 14:27:46.283090 Disabling Deep S4
915 14:27:46.286414 Disabling Deep S5
916 14:27:46.286523 Disabling Deep S5
917 14:27:46.289410 PCI: 00:1f.2 [0000/0000] hidden
918 14:27:46.292909 PCI: 00:1f.3 [8086/0000] bus ops
919 14:27:46.296311 PCI: 00:1f.3 [8086/a0c8] enabled
920 14:27:46.299326 PCI: 00:1f.5 [8086/0000] bus ops
921 14:27:46.302906 PCI: 00:1f.5 [8086/a0a4] enabled
922 14:27:46.306287 PCI: Leftover static devices:
923 14:27:46.309248 PCI: 00:10.2
924 14:27:46.309361 PCI: 00:10.6
925 14:27:46.309460 PCI: 00:10.7
926 14:27:46.312950 PCI: 00:06.0
927 14:27:46.313028 PCI: 00:07.1
928 14:27:46.315980 PCI: 00:07.2
929 14:27:46.316085 PCI: 00:07.3
930 14:27:46.319225 PCI: 00:09.0
931 14:27:46.319332 PCI: 00:0d.1
932 14:27:46.319427 PCI: 00:0d.2
933 14:27:46.322364 PCI: 00:0d.3
934 14:27:46.322464 PCI: 00:0e.0
935 14:27:46.326132 PCI: 00:12.0
936 14:27:46.326216 PCI: 00:12.6
937 14:27:46.326283 PCI: 00:13.0
938 14:27:46.329239 PCI: 00:14.1
939 14:27:46.329322 PCI: 00:16.1
940 14:27:46.332328 PCI: 00:16.2
941 14:27:46.332410 PCI: 00:16.3
942 14:27:46.335551 PCI: 00:16.4
943 14:27:46.335637 PCI: 00:16.5
944 14:27:46.335706 PCI: 00:17.0
945 14:27:46.339312 PCI: 00:19.2
946 14:27:46.339399 PCI: 00:1e.1
947 14:27:46.342398 PCI: 00:1f.1
948 14:27:46.342502 PCI: 00:1f.4
949 14:27:46.342576 PCI: 00:1f.6
950 14:27:46.345532 PCI: 00:1f.7
951 14:27:46.349230 PCI: Check your devicetree.cb.
952 14:27:46.352303 PCI: 00:02.0 scanning...
953 14:27:46.355418 scan_generic_bus for PCI: 00:02.0
954 14:27:46.359278 scan_generic_bus for PCI: 00:02.0 done
955 14:27:46.361861 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
956 14:27:46.365500 PCI: 00:04.0 scanning...
957 14:27:46.368807 scan_generic_bus for PCI: 00:04.0
958 14:27:46.371834 GENERIC: 0.0 enabled
959 14:27:46.378501 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
960 14:27:46.381654 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
961 14:27:46.385256 PCI: 00:0d.0 scanning...
962 14:27:46.388398 scan_static_bus for PCI: 00:0d.0
963 14:27:46.391315 USB0 port 0 enabled
964 14:27:46.391397 USB0 port 0 scanning...
965 14:27:46.394957 scan_static_bus for USB0 port 0
966 14:27:46.397919 USB3 port 0 enabled
967 14:27:46.401686 USB3 port 1 enabled
968 14:27:46.401767 USB3 port 2 disabled
969 14:27:46.404391 USB3 port 3 disabled
970 14:27:46.407898 USB3 port 0 scanning...
971 14:27:46.410968 scan_static_bus for USB3 port 0
972 14:27:46.414494 scan_static_bus for USB3 port 0 done
973 14:27:46.417944 scan_bus: bus USB3 port 0 finished in 6 msecs
974 14:27:46.421076 USB3 port 1 scanning...
975 14:27:46.424533 scan_static_bus for USB3 port 1
976 14:27:46.427821 scan_static_bus for USB3 port 1 done
977 14:27:46.434595 scan_bus: bus USB3 port 1 finished in 6 msecs
978 14:27:46.437793 scan_static_bus for USB0 port 0 done
979 14:27:46.440980 scan_bus: bus USB0 port 0 finished in 43 msecs
980 14:27:46.443983 scan_static_bus for PCI: 00:0d.0 done
981 14:27:46.451021 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
982 14:27:46.454041 PCI: 00:14.0 scanning...
983 14:27:46.457148 scan_static_bus for PCI: 00:14.0
984 14:27:46.457257 USB0 port 0 enabled
985 14:27:46.460828 USB0 port 0 scanning...
986 14:27:46.463891 scan_static_bus for USB0 port 0
987 14:27:46.467053 USB2 port 0 disabled
988 14:27:46.467136 USB2 port 1 enabled
989 14:27:46.470695 USB2 port 2 enabled
990 14:27:46.473741 USB2 port 3 disabled
991 14:27:46.473823 USB2 port 4 enabled
992 14:27:46.477626 USB2 port 5 disabled
993 14:27:46.477709 USB2 port 6 disabled
994 14:27:46.480689 USB2 port 7 disabled
995 14:27:46.483817 USB2 port 8 disabled
996 14:27:46.483900 USB2 port 9 disabled
997 14:27:46.486922 USB3 port 0 disabled
998 14:27:46.490663 USB3 port 1 enabled
999 14:27:46.490746 USB3 port 2 disabled
1000 14:27:46.493803 USB3 port 3 disabled
1001 14:27:46.496805 USB2 port 1 scanning...
1002 14:27:46.500397 scan_static_bus for USB2 port 1
1003 14:27:46.503445 scan_static_bus for USB2 port 1 done
1004 14:27:46.506960 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 14:27:46.510011 USB2 port 2 scanning...
1006 14:27:46.513597 scan_static_bus for USB2 port 2
1007 14:27:46.516477 scan_static_bus for USB2 port 2 done
1008 14:27:46.522885 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 14:27:46.522971 USB2 port 4 scanning...
1010 14:27:46.526376 scan_static_bus for USB2 port 4
1011 14:27:46.533035 scan_static_bus for USB2 port 4 done
1012 14:27:46.536161 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 14:27:46.539316 USB3 port 1 scanning...
1014 14:27:46.543069 scan_static_bus for USB3 port 1
1015 14:27:46.546459 scan_static_bus for USB3 port 1 done
1016 14:27:46.549909 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 14:27:46.553039 scan_static_bus for USB0 port 0 done
1018 14:27:46.559312 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 14:27:46.562403 scan_static_bus for PCI: 00:14.0 done
1020 14:27:46.566313 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1021 14:27:46.569396 PCI: 00:14.3 scanning...
1022 14:27:46.572546 scan_static_bus for PCI: 00:14.3
1023 14:27:46.575704 GENERIC: 0.0 enabled
1024 14:27:46.579053 scan_static_bus for PCI: 00:14.3 done
1025 14:27:46.585779 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1026 14:27:46.585864 PCI: 00:15.0 scanning...
1027 14:27:46.588900 scan_static_bus for PCI: 00:15.0
1028 14:27:46.592004 I2C: 00:1a enabled
1029 14:27:46.595706 I2C: 00:31 enabled
1030 14:27:46.595781 I2C: 00:32 enabled
1031 14:27:46.598902 scan_static_bus for PCI: 00:15.0 done
1032 14:27:46.605785 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1033 14:27:46.608803 PCI: 00:15.1 scanning...
1034 14:27:46.612305 scan_static_bus for PCI: 00:15.1
1035 14:27:46.612405 I2C: 00:10 enabled
1036 14:27:46.615287 scan_static_bus for PCI: 00:15.1 done
1037 14:27:46.622040 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1038 14:27:46.624961 PCI: 00:15.2 scanning...
1039 14:27:46.628682 scan_static_bus for PCI: 00:15.2
1040 14:27:46.632210 scan_static_bus for PCI: 00:15.2 done
1041 14:27:46.635076 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1042 14:27:46.638771 PCI: 00:15.3 scanning...
1043 14:27:46.641935 scan_static_bus for PCI: 00:15.3
1044 14:27:46.645131 scan_static_bus for PCI: 00:15.3 done
1045 14:27:46.651401 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1046 14:27:46.651512 PCI: 00:19.1 scanning...
1047 14:27:46.655227 scan_static_bus for PCI: 00:19.1
1048 14:27:46.658316 I2C: 00:15 enabled
1049 14:27:46.661403 scan_static_bus for PCI: 00:19.1 done
1050 14:27:46.668229 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1051 14:27:46.668340 PCI: 00:1d.0 scanning...
1052 14:27:46.674997 do_pci_scan_bridge for PCI: 00:1d.0
1053 14:27:46.675086 PCI: pci_scan_bus for bus 01
1054 14:27:46.678070 PCI: 01:00.0 [15b7/5009] enabled
1055 14:27:46.681828 GENERIC: 0.0 enabled
1056 14:27:46.684969 Enabling Common Clock Configuration
1057 14:27:46.691304 L1 Sub-State supported from root port 29
1058 14:27:46.691387 L1 Sub-State Support = 0x5
1059 14:27:46.694437 CommonModeRestoreTime = 0x28
1060 14:27:46.701225 Power On Value = 0x16, Power On Scale = 0x0
1061 14:27:46.701308 ASPM: Enabled L1
1062 14:27:46.704190 PCIe: Max_Payload_Size adjusted to 128
1063 14:27:46.711085 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1064 14:27:46.714020 PCI: 00:1e.2 scanning...
1065 14:27:46.717666 scan_generic_bus for PCI: 00:1e.2
1066 14:27:46.717750 SPI: 00 enabled
1067 14:27:46.724185 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1068 14:27:46.731308 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1069 14:27:46.731431 PCI: 00:1e.3 scanning...
1070 14:27:46.734950 scan_generic_bus for PCI: 00:1e.3
1071 14:27:46.738061 SPI: 00 enabled
1072 14:27:46.744520 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1073 14:27:46.748381 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1074 14:27:46.751437 PCI: 00:1f.0 scanning...
1075 14:27:46.754517 scan_static_bus for PCI: 00:1f.0
1076 14:27:46.754622 PNP: 0c09.0 enabled
1077 14:27:46.757689 PNP: 0c09.0 scanning...
1078 14:27:46.760813 scan_static_bus for PNP: 0c09.0
1079 14:27:46.764667 scan_static_bus for PNP: 0c09.0 done
1080 14:27:46.770970 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1081 14:27:46.774787 scan_static_bus for PCI: 00:1f.0 done
1082 14:27:46.777748 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1083 14:27:46.780974 PCI: 00:1f.2 scanning...
1084 14:27:46.784064 scan_static_bus for PCI: 00:1f.2
1085 14:27:46.787818 GENERIC: 0.0 enabled
1086 14:27:46.790857 GENERIC: 0.0 scanning...
1087 14:27:46.793889 scan_static_bus for GENERIC: 0.0
1088 14:27:46.793992 GENERIC: 0.0 enabled
1089 14:27:46.797641 GENERIC: 1.0 enabled
1090 14:27:46.800829 scan_static_bus for GENERIC: 0.0 done
1091 14:27:46.807729 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1092 14:27:46.811007 scan_static_bus for PCI: 00:1f.2 done
1093 14:27:46.814043 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1094 14:27:46.817115 PCI: 00:1f.3 scanning...
1095 14:27:46.820402 scan_static_bus for PCI: 00:1f.3
1096 14:27:46.824072 scan_static_bus for PCI: 00:1f.3 done
1097 14:27:46.830533 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1098 14:27:46.830648 PCI: 00:1f.5 scanning...
1099 14:27:46.834122 scan_generic_bus for PCI: 00:1f.5
1100 14:27:46.840420 scan_generic_bus for PCI: 00:1f.5 done
1101 14:27:46.844072 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1102 14:27:46.850427 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1103 14:27:46.854132 scan_static_bus for Root Device done
1104 14:27:46.857163 scan_bus: bus Root Device finished in 736 msecs
1105 14:27:46.857237 done
1106 14:27:46.863435 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1107 14:27:46.867194 Chrome EC: UHEPI supported
1108 14:27:46.873497 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1109 14:27:46.880451 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1110 14:27:46.883614 SPI flash protection: WPSW=0 SRP0=1
1111 14:27:46.886838 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1112 14:27:46.893675 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1113 14:27:46.896811 found VGA at PCI: 00:02.0
1114 14:27:46.899912 Setting up VGA for PCI: 00:02.0
1115 14:27:46.903615 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1116 14:27:46.909890 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1117 14:27:46.913596 Allocating resources...
1118 14:27:46.913675 Reading resources...
1119 14:27:46.919914 Root Device read_resources bus 0 link: 0
1120 14:27:46.922935 DOMAIN: 0000 read_resources bus 0 link: 0
1121 14:27:46.929700 PCI: 00:04.0 read_resources bus 1 link: 0
1122 14:27:46.932818 PCI: 00:04.0 read_resources bus 1 link: 0 done
1123 14:27:46.939271 PCI: 00:0d.0 read_resources bus 0 link: 0
1124 14:27:46.942868 USB0 port 0 read_resources bus 0 link: 0
1125 14:27:46.949410 USB0 port 0 read_resources bus 0 link: 0 done
1126 14:27:46.952458 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1127 14:27:46.956003 PCI: 00:14.0 read_resources bus 0 link: 0
1128 14:27:46.962873 USB0 port 0 read_resources bus 0 link: 0
1129 14:27:46.966007 USB0 port 0 read_resources bus 0 link: 0 done
1130 14:27:46.972744 PCI: 00:14.0 read_resources bus 0 link: 0 done
1131 14:27:46.975893 PCI: 00:14.3 read_resources bus 0 link: 0
1132 14:27:46.982622 PCI: 00:14.3 read_resources bus 0 link: 0 done
1133 14:27:46.985730 PCI: 00:15.0 read_resources bus 0 link: 0
1134 14:27:46.992649 PCI: 00:15.0 read_resources bus 0 link: 0 done
1135 14:27:46.995760 PCI: 00:15.1 read_resources bus 0 link: 0
1136 14:27:47.002498 PCI: 00:15.1 read_resources bus 0 link: 0 done
1137 14:27:47.005608 PCI: 00:19.1 read_resources bus 0 link: 0
1138 14:27:47.012546 PCI: 00:19.1 read_resources bus 0 link: 0 done
1139 14:27:47.016344 PCI: 00:1d.0 read_resources bus 1 link: 0
1140 14:27:47.022616 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1141 14:27:47.025804 PCI: 00:1e.2 read_resources bus 2 link: 0
1142 14:27:47.032562 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1143 14:27:47.036281 PCI: 00:1e.3 read_resources bus 3 link: 0
1144 14:27:47.042677 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1145 14:27:47.045691 PCI: 00:1f.0 read_resources bus 0 link: 0
1146 14:27:47.052452 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1147 14:27:47.055985 PCI: 00:1f.2 read_resources bus 0 link: 0
1148 14:27:47.058997 GENERIC: 0.0 read_resources bus 0 link: 0
1149 14:27:47.066164 GENERIC: 0.0 read_resources bus 0 link: 0 done
1150 14:27:47.069980 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1151 14:27:47.076752 DOMAIN: 0000 read_resources bus 0 link: 0 done
1152 14:27:47.079841 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1153 14:27:47.086730 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1154 14:27:47.089784 Root Device read_resources bus 0 link: 0 done
1155 14:27:47.092921 Done reading resources.
1156 14:27:47.099846 Show resources in subtree (Root Device)...After reading.
1157 14:27:47.103010 Root Device child on link 0 DOMAIN: 0000
1158 14:27:47.106647 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1159 14:27:47.116212 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1160 14:27:47.126200 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1161 14:27:47.129295 PCI: 00:00.0
1162 14:27:47.139233 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1163 14:27:47.149281 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1164 14:27:47.155931 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1165 14:27:47.165779 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1166 14:27:47.176029 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1167 14:27:47.185990 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1168 14:27:47.195419 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1169 14:27:47.202263 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1170 14:27:47.212284 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1171 14:27:47.221975 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1172 14:27:47.231978 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1173 14:27:47.242033 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1174 14:27:47.252091 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1175 14:27:47.258778 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1176 14:27:47.268429 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1177 14:27:47.278500 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1178 14:27:47.288216 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1179 14:27:47.298188 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1180 14:27:47.308181 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1181 14:27:47.318184 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1182 14:27:47.318288 PCI: 00:02.0
1183 14:27:47.328141 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1184 14:27:47.338142 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1185 14:27:47.348100 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1186 14:27:47.351221 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 14:27:47.361204 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1188 14:27:47.364326 GENERIC: 0.0
1189 14:27:47.364409 PCI: 00:05.0
1190 14:27:47.374192 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 14:27:47.381246 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1192 14:27:47.381330 GENERIC: 0.0
1193 14:27:47.384256 PCI: 00:08.0
1194 14:27:47.394159 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 14:27:47.394244 PCI: 00:0a.0
1196 14:27:47.400861 PCI: 00:0d.0 child on link 0 USB0 port 0
1197 14:27:47.410924 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1198 14:27:47.414047 USB0 port 0 child on link 0 USB3 port 0
1199 14:27:47.417222 USB3 port 0
1200 14:27:47.417304 USB3 port 1
1201 14:27:47.420337 USB3 port 2
1202 14:27:47.420419 USB3 port 3
1203 14:27:47.427311 PCI: 00:14.0 child on link 0 USB0 port 0
1204 14:27:47.437165 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 14:27:47.440307 USB0 port 0 child on link 0 USB2 port 0
1206 14:27:47.440430 USB2 port 0
1207 14:27:47.443448 USB2 port 1
1208 14:27:47.447207 USB2 port 2
1209 14:27:47.447306 USB2 port 3
1210 14:27:47.450290 USB2 port 4
1211 14:27:47.450402 USB2 port 5
1212 14:27:47.453387 USB2 port 6
1213 14:27:47.453495 USB2 port 7
1214 14:27:47.457165 USB2 port 8
1215 14:27:47.457249 USB2 port 9
1216 14:27:47.460358 USB3 port 0
1217 14:27:47.460468 USB3 port 1
1218 14:27:47.463441 USB3 port 2
1219 14:27:47.463523 USB3 port 3
1220 14:27:47.466746 PCI: 00:14.2
1221 14:27:47.476634 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 14:27:47.486532 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 14:27:47.489531 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1224 14:27:47.499603 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 14:27:47.502776 GENERIC: 0.0
1226 14:27:47.506600 PCI: 00:15.0 child on link 0 I2C: 00:1a
1227 14:27:47.516133 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 14:27:47.519253 I2C: 00:1a
1229 14:27:47.519333 I2C: 00:31
1230 14:27:47.523011 I2C: 00:32
1231 14:27:47.526134 PCI: 00:15.1 child on link 0 I2C: 00:10
1232 14:27:47.536011 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 14:27:47.536113 I2C: 00:10
1234 14:27:47.539056 PCI: 00:15.2
1235 14:27:47.549213 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 14:27:47.549296 PCI: 00:15.3
1237 14:27:47.558766 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 14:27:47.562455 PCI: 00:16.0
1239 14:27:47.572274 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 14:27:47.572353 PCI: 00:19.0
1241 14:27:47.579113 PCI: 00:19.1 child on link 0 I2C: 00:15
1242 14:27:47.588501 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 14:27:47.588596 I2C: 00:15
1244 14:27:47.595466 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1245 14:27:47.601895 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1246 14:27:47.612002 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1247 14:27:47.621972 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1248 14:27:47.622066 GENERIC: 0.0
1249 14:27:47.625121 PCI: 01:00.0
1250 14:27:47.635095 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 14:27:47.644937 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1252 14:27:47.648685 PCI: 00:1e.0
1253 14:27:47.658695 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1254 14:27:47.661893 PCI: 00:1e.2 child on link 0 SPI: 00
1255 14:27:47.671702 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1256 14:27:47.674957 SPI: 00
1257 14:27:47.678017 PCI: 00:1e.3 child on link 0 SPI: 00
1258 14:27:47.687836 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 14:27:47.687923 SPI: 00
1260 14:27:47.691527 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1261 14:27:47.701184 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1262 14:27:47.704512 PNP: 0c09.0
1263 14:27:47.711014 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1264 14:27:47.717386 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1265 14:27:47.724006 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1266 14:27:47.734483 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1267 14:27:47.740706 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1268 14:27:47.740790 GENERIC: 0.0
1269 14:27:47.744374 GENERIC: 1.0
1270 14:27:47.744469 PCI: 00:1f.3
1271 14:27:47.754298 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1272 14:27:47.764297 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1273 14:27:47.767428 PCI: 00:1f.5
1274 14:27:47.776811 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1275 14:27:47.780566 CPU_CLUSTER: 0 child on link 0 APIC: 00
1276 14:27:47.780648 APIC: 00
1277 14:27:47.783715 APIC: 01
1278 14:27:47.783796 APIC: 03
1279 14:27:47.786972 APIC: 05
1280 14:27:47.787053 APIC: 07
1281 14:27:47.787117 APIC: 06
1282 14:27:47.790063 APIC: 02
1283 14:27:47.790143 APIC: 04
1284 14:27:47.796690 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1285 14:27:47.803587 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1286 14:27:47.810104 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1287 14:27:47.816386 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1288 14:27:47.819854 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1289 14:27:47.823377 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1290 14:27:47.830005 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1291 14:27:47.839643 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1292 14:27:47.846332 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1293 14:27:47.853343 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1294 14:27:47.859447 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1295 14:27:47.866309 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1296 14:27:47.876286 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1297 14:27:47.882608 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1298 14:27:47.885800 DOMAIN: 0000: Resource ranges:
1299 14:27:47.888918 * Base: 1000, Size: 800, Tag: 100
1300 14:27:47.892728 * Base: 1900, Size: e700, Tag: 100
1301 14:27:47.899460 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1302 14:27:47.905577 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1303 14:27:47.912278 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1304 14:27:47.918884 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1305 14:27:47.928909 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1306 14:27:47.935456 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1307 14:27:47.942141 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1308 14:27:47.952285 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1309 14:27:47.958507 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1310 14:27:47.965293 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1311 14:27:47.974639 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1312 14:27:47.981433 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1313 14:27:47.988412 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1314 14:27:47.998106 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1315 14:27:48.004605 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1316 14:27:48.011242 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1317 14:27:48.021071 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1318 14:27:48.027613 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1319 14:27:48.034156 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1320 14:27:48.043937 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1321 14:27:48.050889 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1322 14:27:48.057228 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1323 14:27:48.067157 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1324 14:27:48.074050 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1325 14:27:48.080276 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1326 14:27:48.084086 DOMAIN: 0000: Resource ranges:
1327 14:27:48.090332 * Base: 7fc00000, Size: 40400000, Tag: 200
1328 14:27:48.093501 * Base: d0000000, Size: 28000000, Tag: 200
1329 14:27:48.097153 * Base: fa000000, Size: 1000000, Tag: 200
1330 14:27:48.103358 * Base: fb001000, Size: 2fff000, Tag: 200
1331 14:27:48.106917 * Base: fe010000, Size: 2e000, Tag: 200
1332 14:27:48.109860 * Base: fe03f000, Size: d41000, Tag: 200
1333 14:27:48.113515 * Base: fed88000, Size: 8000, Tag: 200
1334 14:27:48.116739 * Base: fed93000, Size: d000, Tag: 200
1335 14:27:48.123392 * Base: feda2000, Size: 1e000, Tag: 200
1336 14:27:48.127018 * Base: fede0000, Size: 1220000, Tag: 200
1337 14:27:48.129869 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1338 14:27:48.139948 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1339 14:27:48.146554 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1340 14:27:48.153402 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1341 14:27:48.159626 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1342 14:27:48.166417 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1343 14:27:48.173202 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1344 14:27:48.179658 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1345 14:27:48.185971 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1346 14:27:48.192781 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1347 14:27:48.199004 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1348 14:27:48.205795 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1349 14:27:48.212416 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1350 14:27:48.219305 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1351 14:27:48.226180 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1352 14:27:48.232259 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1353 14:27:48.238842 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1354 14:27:48.245625 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1355 14:27:48.251940 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1356 14:27:48.259003 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1357 14:27:48.265591 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1358 14:27:48.271823 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1359 14:27:48.278666 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1360 14:27:48.284964 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1361 14:27:48.291863 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1362 14:27:48.294978 PCI: 00:1d.0: Resource ranges:
1363 14:27:48.301353 * Base: 7fc00000, Size: 100000, Tag: 200
1364 14:27:48.308115 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1365 14:27:48.314997 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1366 14:27:48.321838 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1367 14:27:48.327922 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1368 14:27:48.334719 Root Device assign_resources, bus 0 link: 0
1369 14:27:48.337848 DOMAIN: 0000 assign_resources, bus 0 link: 0
1370 14:27:48.347854 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1371 14:27:48.354244 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1372 14:27:48.364244 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1373 14:27:48.370976 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1374 14:27:48.377547 PCI: 00:04.0 assign_resources, bus 1 link: 0
1375 14:27:48.380674 PCI: 00:04.0 assign_resources, bus 1 link: 0
1376 14:27:48.387577 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1377 14:27:48.397042 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1378 14:27:48.403947 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1379 14:27:48.410792 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1380 14:27:48.413952 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1381 14:27:48.423814 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1382 14:27:48.426954 PCI: 00:14.0 assign_resources, bus 0 link: 0
1383 14:27:48.430120 PCI: 00:14.0 assign_resources, bus 0 link: 0
1384 14:27:48.440149 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1385 14:27:48.446863 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1386 14:27:48.456494 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1387 14:27:48.460067 PCI: 00:14.3 assign_resources, bus 0 link: 0
1388 14:27:48.466672 PCI: 00:14.3 assign_resources, bus 0 link: 0
1389 14:27:48.473092 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1390 14:27:48.480325 PCI: 00:15.0 assign_resources, bus 0 link: 0
1391 14:27:48.483134 PCI: 00:15.0 assign_resources, bus 0 link: 0
1392 14:27:48.490018 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1393 14:27:48.496240 PCI: 00:15.1 assign_resources, bus 0 link: 0
1394 14:27:48.499957 PCI: 00:15.1 assign_resources, bus 0 link: 0
1395 14:27:48.509298 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1396 14:27:48.516255 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1397 14:27:48.526324 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1398 14:27:48.532451 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1399 14:27:48.539168 PCI: 00:19.1 assign_resources, bus 0 link: 0
1400 14:27:48.542186 PCI: 00:19.1 assign_resources, bus 0 link: 0
1401 14:27:48.552054 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1402 14:27:48.562438 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1403 14:27:48.568897 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1404 14:27:48.575349 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1405 14:27:48.581677 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1406 14:27:48.592080 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1407 14:27:48.595245 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1408 14:27:48.605268 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1409 14:27:48.608387 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1410 14:27:48.611516 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1411 14:27:48.621527 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1412 14:27:48.625226 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1413 14:27:48.631289 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1414 14:27:48.634991 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1415 14:27:48.641316 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1416 14:27:48.644414 LPC: Trying to open IO window from 800 size 1ff
1417 14:27:48.654407 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1418 14:27:48.661272 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1419 14:27:48.668117 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1420 14:27:48.674164 DOMAIN: 0000 assign_resources, bus 0 link: 0
1421 14:27:48.677829 Root Device assign_resources, bus 0 link: 0
1422 14:27:48.681147 Done setting resources.
1423 14:27:48.687670 Show resources in subtree (Root Device)...After assigning values.
1424 14:27:48.690975 Root Device child on link 0 DOMAIN: 0000
1425 14:27:48.697242 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1426 14:27:48.704133 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1427 14:27:48.713756 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1428 14:27:48.716882 PCI: 00:00.0
1429 14:27:48.726804 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1430 14:27:48.736658 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1431 14:27:48.747086 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1432 14:27:48.753355 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1433 14:27:48.763409 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1434 14:27:48.773244 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1435 14:27:48.782949 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1436 14:27:48.792910 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1437 14:27:48.802984 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1438 14:27:48.809761 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1439 14:27:48.819801 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1440 14:27:48.829620 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1441 14:27:48.838953 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1442 14:27:48.849417 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1443 14:27:48.855733 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1444 14:27:48.865739 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1445 14:27:48.875774 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1446 14:27:48.885630 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1447 14:27:48.895243 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1448 14:27:48.905070 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1449 14:27:48.905186 PCI: 00:02.0
1450 14:27:48.918462 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1451 14:27:48.928416 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1452 14:27:48.938421 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1453 14:27:48.941600 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1454 14:27:48.951249 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1455 14:27:48.954993 GENERIC: 0.0
1456 14:27:48.955107 PCI: 00:05.0
1457 14:27:48.964664 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1458 14:27:48.971487 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1459 14:27:48.971588 GENERIC: 0.0
1460 14:27:48.974617 PCI: 00:08.0
1461 14:27:48.984796 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1462 14:27:48.984910 PCI: 00:0a.0
1463 14:27:48.991032 PCI: 00:0d.0 child on link 0 USB0 port 0
1464 14:27:49.000776 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1465 14:27:49.004364 USB0 port 0 child on link 0 USB3 port 0
1466 14:27:49.007356 USB3 port 0
1467 14:27:49.007465 USB3 port 1
1468 14:27:49.010826 USB3 port 2
1469 14:27:49.010925 USB3 port 3
1470 14:27:49.017390 PCI: 00:14.0 child on link 0 USB0 port 0
1471 14:27:49.027330 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1472 14:27:49.030455 USB0 port 0 child on link 0 USB2 port 0
1473 14:27:49.034222 USB2 port 0
1474 14:27:49.034339 USB2 port 1
1475 14:27:49.037298 USB2 port 2
1476 14:27:49.037402 USB2 port 3
1477 14:27:49.040402 USB2 port 4
1478 14:27:49.043482 USB2 port 5
1479 14:27:49.043584 USB2 port 6
1480 14:27:49.047163 USB2 port 7
1481 14:27:49.047265 USB2 port 8
1482 14:27:49.050230 USB2 port 9
1483 14:27:49.050338 USB3 port 0
1484 14:27:49.053790 USB3 port 1
1485 14:27:49.053900 USB3 port 2
1486 14:27:49.056838 USB3 port 3
1487 14:27:49.056920 PCI: 00:14.2
1488 14:27:49.066669 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1489 14:27:49.080396 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1490 14:27:49.083413 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1491 14:27:49.093336 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1492 14:27:49.096424 GENERIC: 0.0
1493 14:27:49.099545 PCI: 00:15.0 child on link 0 I2C: 00:1a
1494 14:27:49.109713 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1495 14:27:49.109798 I2C: 00:1a
1496 14:27:49.113243 I2C: 00:31
1497 14:27:49.113344 I2C: 00:32
1498 14:27:49.119577 PCI: 00:15.1 child on link 0 I2C: 00:10
1499 14:27:49.129407 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1500 14:27:49.129515 I2C: 00:10
1501 14:27:49.132651 PCI: 00:15.2
1502 14:27:49.142536 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1503 14:27:49.146270 PCI: 00:15.3
1504 14:27:49.155990 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1505 14:27:49.156075 PCI: 00:16.0
1506 14:27:49.165797 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1507 14:27:49.168885 PCI: 00:19.0
1508 14:27:49.172686 PCI: 00:19.1 child on link 0 I2C: 00:15
1509 14:27:49.182500 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1510 14:27:49.185784 I2C: 00:15
1511 14:27:49.188883 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1512 14:27:49.198731 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1513 14:27:49.208639 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1514 14:27:49.222130 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1515 14:27:49.222220 GENERIC: 0.0
1516 14:27:49.225125 PCI: 01:00.0
1517 14:27:49.235281 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1518 14:27:49.245205 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1519 14:27:49.245288 PCI: 00:1e.0
1520 14:27:49.258127 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1521 14:27:49.261586 PCI: 00:1e.2 child on link 0 SPI: 00
1522 14:27:49.271592 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1523 14:27:49.271677 SPI: 00
1524 14:27:49.278239 PCI: 00:1e.3 child on link 0 SPI: 00
1525 14:27:49.288073 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1526 14:27:49.288160 SPI: 00
1527 14:27:49.294364 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1528 14:27:49.301063 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1529 14:27:49.304730 PNP: 0c09.0
1530 14:27:49.310981 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1531 14:27:49.317857 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1532 14:27:49.327395 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1533 14:27:49.334218 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1534 14:27:49.340756 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1535 14:27:49.340862 GENERIC: 0.0
1536 14:27:49.344224 GENERIC: 1.0
1537 14:27:49.344306 PCI: 00:1f.3
1538 14:27:49.357166 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1539 14:27:49.367012 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1540 14:27:49.367130 PCI: 00:1f.5
1541 14:27:49.377243 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1542 14:27:49.383543 CPU_CLUSTER: 0 child on link 0 APIC: 00
1543 14:27:49.383620 APIC: 00
1544 14:27:49.383693 APIC: 01
1545 14:27:49.386800 APIC: 03
1546 14:27:49.386872 APIC: 05
1547 14:27:49.390484 APIC: 07
1548 14:27:49.390553 APIC: 06
1549 14:27:49.390614 APIC: 02
1550 14:27:49.393557 APIC: 04
1551 14:27:49.396693 Done allocating resources.
1552 14:27:49.399859 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1553 14:27:49.407288 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1554 14:27:49.410337 Configure GPIOs for I2S audio on UP4.
1555 14:27:49.417851 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1556 14:27:49.420909 Enabling resources...
1557 14:27:49.423986 PCI: 00:00.0 subsystem <- 8086/9a12
1558 14:27:49.427689 PCI: 00:00.0 cmd <- 06
1559 14:27:49.430852 PCI: 00:02.0 subsystem <- 8086/9a40
1560 14:27:49.433912 PCI: 00:02.0 cmd <- 03
1561 14:27:49.437454 PCI: 00:04.0 subsystem <- 8086/9a03
1562 14:27:49.440322 PCI: 00:04.0 cmd <- 02
1563 14:27:49.443866 PCI: 00:05.0 subsystem <- 8086/9a19
1564 14:27:49.443942 PCI: 00:05.0 cmd <- 02
1565 14:27:49.450202 PCI: 00:08.0 subsystem <- 8086/9a11
1566 14:27:49.450280 PCI: 00:08.0 cmd <- 06
1567 14:27:49.453772 PCI: 00:0d.0 subsystem <- 8086/9a13
1568 14:27:49.456795 PCI: 00:0d.0 cmd <- 02
1569 14:27:49.460466 PCI: 00:14.0 subsystem <- 8086/a0ed
1570 14:27:49.463486 PCI: 00:14.0 cmd <- 02
1571 14:27:49.466604 PCI: 00:14.2 subsystem <- 8086/a0ef
1572 14:27:49.470145 PCI: 00:14.2 cmd <- 02
1573 14:27:49.473124 PCI: 00:14.3 subsystem <- 8086/a0f0
1574 14:27:49.476735 PCI: 00:14.3 cmd <- 02
1575 14:27:49.480374 PCI: 00:15.0 subsystem <- 8086/a0e8
1576 14:27:49.483516 PCI: 00:15.0 cmd <- 02
1577 14:27:49.486627 PCI: 00:15.1 subsystem <- 8086/a0e9
1578 14:27:49.489799 PCI: 00:15.1 cmd <- 02
1579 14:27:49.492886 PCI: 00:15.2 subsystem <- 8086/a0ea
1580 14:27:49.496670 PCI: 00:15.2 cmd <- 02
1581 14:27:49.499748 PCI: 00:15.3 subsystem <- 8086/a0eb
1582 14:27:49.499824 PCI: 00:15.3 cmd <- 02
1583 14:27:49.506462 PCI: 00:16.0 subsystem <- 8086/a0e0
1584 14:27:49.506567 PCI: 00:16.0 cmd <- 02
1585 14:27:49.509581 PCI: 00:19.1 subsystem <- 8086/a0c6
1586 14:27:49.512845 PCI: 00:19.1 cmd <- 02
1587 14:27:49.516416 PCI: 00:1d.0 bridge ctrl <- 0013
1588 14:27:49.519551 PCI: 00:1d.0 subsystem <- 8086/a0b0
1589 14:27:49.522660 PCI: 00:1d.0 cmd <- 06
1590 14:27:49.525844 PCI: 00:1e.0 subsystem <- 8086/a0a8
1591 14:27:49.529574 PCI: 00:1e.0 cmd <- 06
1592 14:27:49.532539 PCI: 00:1e.2 subsystem <- 8086/a0aa
1593 14:27:49.536203 PCI: 00:1e.2 cmd <- 06
1594 14:27:49.539414 PCI: 00:1e.3 subsystem <- 8086/a0ab
1595 14:27:49.542417 PCI: 00:1e.3 cmd <- 02
1596 14:27:49.546029 PCI: 00:1f.0 subsystem <- 8086/a087
1597 14:27:49.549050 PCI: 00:1f.0 cmd <- 407
1598 14:27:49.552616 PCI: 00:1f.3 subsystem <- 8086/a0c8
1599 14:27:49.555539 PCI: 00:1f.3 cmd <- 02
1600 14:27:49.559104 PCI: 00:1f.5 subsystem <- 8086/a0a4
1601 14:27:49.559187 PCI: 00:1f.5 cmd <- 406
1602 14:27:49.564833 PCI: 01:00.0 cmd <- 02
1603 14:27:49.569022 done.
1604 14:27:49.572163 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1605 14:27:49.575851 Initializing devices...
1606 14:27:49.578852 Root Device init
1607 14:27:49.582408 Chrome EC: Set SMI mask to 0x0000000000000000
1608 14:27:49.588632 Chrome EC: clear events_b mask to 0x0000000000000000
1609 14:27:49.595461 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1610 14:27:49.601745 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1611 14:27:49.605513 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1612 14:27:49.611913 Chrome EC: Set WAKE mask to 0x0000000000000000
1613 14:27:49.614998 fw_config match found: DB_USB=USB3_ACTIVE
1614 14:27:49.621798 Configure Right Type-C port orientation for retimer
1615 14:27:49.624885 Root Device init finished in 43 msecs
1616 14:27:49.628645 PCI: 00:00.0 init
1617 14:27:49.631818 CPU TDP = 9 Watts
1618 14:27:49.631900 CPU PL1 = 9 Watts
1619 14:27:49.634954 CPU PL2 = 40 Watts
1620 14:27:49.635035 CPU PL4 = 83 Watts
1621 14:27:49.641761 PCI: 00:00.0 init finished in 8 msecs
1622 14:27:49.641844 PCI: 00:02.0 init
1623 14:27:49.644876 GMA: Found VBT in CBFS
1624 14:27:49.647961 GMA: Found valid VBT in CBFS
1625 14:27:49.654546 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1626 14:27:49.661402 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1627 14:27:49.664424 PCI: 00:02.0 init finished in 18 msecs
1628 14:27:49.667958 PCI: 00:05.0 init
1629 14:27:49.671409 PCI: 00:05.0 init finished in 0 msecs
1630 14:27:49.674788 PCI: 00:08.0 init
1631 14:27:49.677683 PCI: 00:08.0 init finished in 0 msecs
1632 14:27:49.680956 PCI: 00:14.0 init
1633 14:27:49.684534 PCI: 00:14.0 init finished in 0 msecs
1634 14:27:49.687372 PCI: 00:14.2 init
1635 14:27:49.691215 PCI: 00:14.2 init finished in 0 msecs
1636 14:27:49.691311 PCI: 00:15.0 init
1637 14:27:49.694384 I2C bus 0 version 0x3230302a
1638 14:27:49.697557 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1639 14:27:49.704286 PCI: 00:15.0 init finished in 6 msecs
1640 14:27:49.704382 PCI: 00:15.1 init
1641 14:27:49.707323 I2C bus 1 version 0x3230302a
1642 14:27:49.710933 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1643 14:27:49.714089 PCI: 00:15.1 init finished in 6 msecs
1644 14:27:49.717740 PCI: 00:15.2 init
1645 14:27:49.720904 I2C bus 2 version 0x3230302a
1646 14:27:49.724078 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1647 14:27:49.727181 PCI: 00:15.2 init finished in 6 msecs
1648 14:27:49.730908 PCI: 00:15.3 init
1649 14:27:49.733975 I2C bus 3 version 0x3230302a
1650 14:27:49.737173 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1651 14:27:49.740786 PCI: 00:15.3 init finished in 6 msecs
1652 14:27:49.743986 PCI: 00:16.0 init
1653 14:27:49.746977 PCI: 00:16.0 init finished in 0 msecs
1654 14:27:49.750143 PCI: 00:19.1 init
1655 14:27:49.753926 I2C bus 5 version 0x3230302a
1656 14:27:49.756806 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1657 14:27:49.760520 PCI: 00:19.1 init finished in 6 msecs
1658 14:27:49.760620 PCI: 00:1d.0 init
1659 14:27:49.763571 Initializing PCH PCIe bridge.
1660 14:27:49.770369 PCI: 00:1d.0 init finished in 3 msecs
1661 14:27:49.770451 PCI: 00:1f.0 init
1662 14:27:49.777509 IOAPIC: Initializing IOAPIC at 0xfec00000
1663 14:27:49.779940 IOAPIC: Bootstrap Processor Local APIC = 0x00
1664 14:27:49.783360 IOAPIC: ID = 0x02
1665 14:27:49.783458 IOAPIC: Dumping registers
1666 14:27:49.787016 reg 0x0000: 0x02000000
1667 14:27:49.790381 reg 0x0001: 0x00770020
1668 14:27:49.793234 reg 0x0002: 0x00000000
1669 14:27:49.796825 PCI: 00:1f.0 init finished in 21 msecs
1670 14:27:49.799734 PCI: 00:1f.2 init
1671 14:27:49.799816 Disabling ACPI via APMC.
1672 14:27:49.806112 APMC done.
1673 14:27:49.809166 PCI: 00:1f.2 init finished in 6 msecs
1674 14:27:49.820900 PCI: 01:00.0 init
1675 14:27:49.823964 PCI: 01:00.0 init finished in 0 msecs
1676 14:27:49.827697 PNP: 0c09.0 init
1677 14:27:49.830830 Google Chrome EC uptime: 8.254 seconds
1678 14:27:49.837699 Google Chrome AP resets since EC boot: 1
1679 14:27:49.840907 Google Chrome most recent AP reset causes:
1680 14:27:49.843910 0.451: 32775 shutdown: entering G3
1681 14:27:49.850558 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1682 14:27:49.853650 PNP: 0c09.0 init finished in 22 msecs
1683 14:27:49.859707 Devices initialized
1684 14:27:49.863120 Show all devs... After init.
1685 14:27:49.866098 Root Device: enabled 1
1686 14:27:49.866183 DOMAIN: 0000: enabled 1
1687 14:27:49.869282 CPU_CLUSTER: 0: enabled 1
1688 14:27:49.872937 PCI: 00:00.0: enabled 1
1689 14:27:49.876011 PCI: 00:02.0: enabled 1
1690 14:27:49.876093 PCI: 00:04.0: enabled 1
1691 14:27:49.879701 PCI: 00:05.0: enabled 1
1692 14:27:49.882861 PCI: 00:06.0: enabled 0
1693 14:27:49.885709 PCI: 00:07.0: enabled 0
1694 14:27:49.885792 PCI: 00:07.1: enabled 0
1695 14:27:49.889221 PCI: 00:07.2: enabled 0
1696 14:27:49.892302 PCI: 00:07.3: enabled 0
1697 14:27:49.895798 PCI: 00:08.0: enabled 1
1698 14:27:49.895883 PCI: 00:09.0: enabled 0
1699 14:27:49.899163 PCI: 00:0a.0: enabled 0
1700 14:27:49.902102 PCI: 00:0d.0: enabled 1
1701 14:27:49.905773 PCI: 00:0d.1: enabled 0
1702 14:27:49.905855 PCI: 00:0d.2: enabled 0
1703 14:27:49.909308 PCI: 00:0d.3: enabled 0
1704 14:27:49.912274 PCI: 00:0e.0: enabled 0
1705 14:27:49.915838 PCI: 00:10.2: enabled 1
1706 14:27:49.915920 PCI: 00:10.6: enabled 0
1707 14:27:49.919003 PCI: 00:10.7: enabled 0
1708 14:27:49.922145 PCI: 00:12.0: enabled 0
1709 14:27:49.925881 PCI: 00:12.6: enabled 0
1710 14:27:49.925963 PCI: 00:13.0: enabled 0
1711 14:27:49.929081 PCI: 00:14.0: enabled 1
1712 14:27:49.932220 PCI: 00:14.1: enabled 0
1713 14:27:49.932318 PCI: 00:14.2: enabled 1
1714 14:27:49.935343 PCI: 00:14.3: enabled 1
1715 14:27:49.938531 PCI: 00:15.0: enabled 1
1716 14:27:49.942089 PCI: 00:15.1: enabled 1
1717 14:27:49.942170 PCI: 00:15.2: enabled 1
1718 14:27:49.945290 PCI: 00:15.3: enabled 1
1719 14:27:49.948816 PCI: 00:16.0: enabled 1
1720 14:27:49.952222 PCI: 00:16.1: enabled 0
1721 14:27:49.952344 PCI: 00:16.2: enabled 0
1722 14:27:49.955363 PCI: 00:16.3: enabled 0
1723 14:27:49.958564 PCI: 00:16.4: enabled 0
1724 14:27:49.961738 PCI: 00:16.5: enabled 0
1725 14:27:49.961819 PCI: 00:17.0: enabled 0
1726 14:27:49.965382 PCI: 00:19.0: enabled 0
1727 14:27:49.968390 PCI: 00:19.1: enabled 1
1728 14:27:49.972152 PCI: 00:19.2: enabled 0
1729 14:27:49.972234 PCI: 00:1c.0: enabled 1
1730 14:27:49.975335 PCI: 00:1c.1: enabled 0
1731 14:27:49.978351 PCI: 00:1c.2: enabled 0
1732 14:27:49.981968 PCI: 00:1c.3: enabled 0
1733 14:27:49.982052 PCI: 00:1c.4: enabled 0
1734 14:27:49.985101 PCI: 00:1c.5: enabled 0
1735 14:27:49.988169 PCI: 00:1c.6: enabled 1
1736 14:27:49.988254 PCI: 00:1c.7: enabled 0
1737 14:27:49.991956 PCI: 00:1d.0: enabled 1
1738 14:27:49.995008 PCI: 00:1d.1: enabled 0
1739 14:27:49.998130 PCI: 00:1d.2: enabled 1
1740 14:27:49.998214 PCI: 00:1d.3: enabled 0
1741 14:27:50.001695 PCI: 00:1e.0: enabled 1
1742 14:27:50.005215 PCI: 00:1e.1: enabled 0
1743 14:27:50.008112 PCI: 00:1e.2: enabled 1
1744 14:27:50.008259 PCI: 00:1e.3: enabled 1
1745 14:27:50.011624 PCI: 00:1f.0: enabled 1
1746 14:27:50.015026 PCI: 00:1f.1: enabled 0
1747 14:27:50.018198 PCI: 00:1f.2: enabled 1
1748 14:27:50.018379 PCI: 00:1f.3: enabled 1
1749 14:27:50.021435 PCI: 00:1f.4: enabled 0
1750 14:27:50.024630 PCI: 00:1f.5: enabled 1
1751 14:27:50.027605 PCI: 00:1f.6: enabled 0
1752 14:27:50.027714 PCI: 00:1f.7: enabled 0
1753 14:27:50.031354 APIC: 00: enabled 1
1754 14:27:50.034522 GENERIC: 0.0: enabled 1
1755 14:27:50.034629 GENERIC: 0.0: enabled 1
1756 14:27:50.037597 GENERIC: 1.0: enabled 1
1757 14:27:50.041377 GENERIC: 0.0: enabled 1
1758 14:27:50.044625 GENERIC: 1.0: enabled 1
1759 14:27:50.044708 USB0 port 0: enabled 1
1760 14:27:50.047664 GENERIC: 0.0: enabled 1
1761 14:27:50.050844 USB0 port 0: enabled 1
1762 14:27:50.054491 GENERIC: 0.0: enabled 1
1763 14:27:50.054573 I2C: 00:1a: enabled 1
1764 14:27:50.057534 I2C: 00:31: enabled 1
1765 14:27:50.061175 I2C: 00:32: enabled 1
1766 14:27:50.061271 I2C: 00:10: enabled 1
1767 14:27:50.064375 I2C: 00:15: enabled 1
1768 14:27:50.067414 GENERIC: 0.0: enabled 0
1769 14:27:50.067495 GENERIC: 1.0: enabled 0
1770 14:27:50.071032 GENERIC: 0.0: enabled 1
1771 14:27:50.074144 SPI: 00: enabled 1
1772 14:27:50.074261 SPI: 00: enabled 1
1773 14:27:50.077610 PNP: 0c09.0: enabled 1
1774 14:27:50.080799 GENERIC: 0.0: enabled 1
1775 14:27:50.080881 USB3 port 0: enabled 1
1776 14:27:50.083801 USB3 port 1: enabled 1
1777 14:27:50.087567 USB3 port 2: enabled 0
1778 14:27:50.090712 USB3 port 3: enabled 0
1779 14:27:50.090823 USB2 port 0: enabled 0
1780 14:27:50.093895 USB2 port 1: enabled 1
1781 14:27:50.096943 USB2 port 2: enabled 1
1782 14:27:50.097048 USB2 port 3: enabled 0
1783 14:27:50.100722 USB2 port 4: enabled 1
1784 14:27:50.103825 USB2 port 5: enabled 0
1785 14:27:50.106898 USB2 port 6: enabled 0
1786 14:27:50.106983 USB2 port 7: enabled 0
1787 14:27:50.110556 USB2 port 8: enabled 0
1788 14:27:50.113480 USB2 port 9: enabled 0
1789 14:27:50.113564 USB3 port 0: enabled 0
1790 14:27:50.116936 USB3 port 1: enabled 1
1791 14:27:50.120449 USB3 port 2: enabled 0
1792 14:27:50.123690 USB3 port 3: enabled 0
1793 14:27:50.123774 GENERIC: 0.0: enabled 1
1794 14:27:50.126556 GENERIC: 1.0: enabled 1
1795 14:27:50.130113 APIC: 01: enabled 1
1796 14:27:50.130197 APIC: 03: enabled 1
1797 14:27:50.133098 APIC: 05: enabled 1
1798 14:27:50.136789 APIC: 07: enabled 1
1799 14:27:50.136874 APIC: 06: enabled 1
1800 14:27:50.139950 APIC: 02: enabled 1
1801 14:27:50.140034 APIC: 04: enabled 1
1802 14:27:50.143613 PCI: 01:00.0: enabled 1
1803 14:27:50.149834 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1804 14:27:50.153510 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1805 14:27:50.156643 ELOG: NV offset 0xf30000 size 0x1000
1806 14:27:50.165067 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1807 14:27:50.171251 ELOG: Event(17) added with size 13 at 2023-06-06 14:27:50 UTC
1808 14:27:50.177932 ELOG: Event(92) added with size 9 at 2023-06-06 14:27:50 UTC
1809 14:27:50.184837 ELOG: Event(93) added with size 9 at 2023-06-06 14:27:50 UTC
1810 14:27:50.190984 ELOG: Event(9E) added with size 10 at 2023-06-06 14:27:50 UTC
1811 14:27:50.197903 ELOG: Event(9F) added with size 14 at 2023-06-06 14:27:50 UTC
1812 14:27:50.204010 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1813 14:27:50.210959 ELOG: Event(A1) added with size 10 at 2023-06-06 14:27:50 UTC
1814 14:27:50.217277 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1815 14:27:50.223816 ELOG: Event(A0) added with size 9 at 2023-06-06 14:27:50 UTC
1816 14:27:50.227275 elog_add_boot_reason: Logged dev mode boot
1817 14:27:50.233837 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1818 14:27:50.237333 Finalize devices...
1819 14:27:50.237432 Devices finalized
1820 14:27:50.244065 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1821 14:27:50.247281 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1822 14:27:50.254101 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1823 14:27:50.257293 ME: HFSTS1 : 0x80030055
1824 14:27:50.263968 ME: HFSTS2 : 0x30280116
1825 14:27:50.266927 ME: HFSTS3 : 0x00000050
1826 14:27:50.270451 ME: HFSTS4 : 0x00004000
1827 14:27:50.277334 ME: HFSTS5 : 0x00000000
1828 14:27:50.280381 ME: HFSTS6 : 0x40400006
1829 14:27:50.283723 ME: Manufacturing Mode : YES
1830 14:27:50.286762 ME: SPI Protection Mode Enabled : NO
1831 14:27:50.293470 ME: FW Partition Table : OK
1832 14:27:50.296476 ME: Bringup Loader Failure : NO
1833 14:27:50.300194 ME: Firmware Init Complete : NO
1834 14:27:50.303200 ME: Boot Options Present : NO
1835 14:27:50.306921 ME: Update In Progress : NO
1836 14:27:50.310151 ME: D0i3 Support : YES
1837 14:27:50.313190 ME: Low Power State Enabled : NO
1838 14:27:50.319988 ME: CPU Replaced : YES
1839 14:27:50.323109 ME: CPU Replacement Valid : YES
1840 14:27:50.326257 ME: Current Working State : 5
1841 14:27:50.330024 ME: Current Operation State : 1
1842 14:27:50.333124 ME: Current Operation Mode : 3
1843 14:27:50.336566 ME: Error Code : 0
1844 14:27:50.340095 ME: Enhanced Debug Mode : NO
1845 14:27:50.343065 ME: CPU Debug Disabled : YES
1846 14:27:50.346566 ME: TXT Support : NO
1847 14:27:50.353390 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1848 14:27:50.362907 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1849 14:27:50.366587 CBFS: 'fallback/slic' not found.
1850 14:27:50.369633 ACPI: Writing ACPI tables at 76b01000.
1851 14:27:50.369738 ACPI: * FACS
1852 14:27:50.372764 ACPI: * DSDT
1853 14:27:50.376358 Ramoops buffer: 0x100000@0x76a00000.
1854 14:27:50.379562 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1855 14:27:50.385978 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1856 14:27:50.389591 Google Chrome EC: version:
1857 14:27:50.392799 ro: voema_v2.0.10114-a447f03e46
1858 14:27:50.395919 rw: voema_v2.0.10114-a447f03e46
1859 14:27:50.396027 running image: 2
1860 14:27:50.402807 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1861 14:27:50.407721 ACPI: * FADT
1862 14:27:50.407802 SCI is IRQ9
1863 14:27:50.413889 ACPI: added table 1/32, length now 40
1864 14:27:50.413975 ACPI: * SSDT
1865 14:27:50.417053 Found 1 CPU(s) with 8 core(s) each.
1866 14:27:50.423953 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1867 14:27:50.427014 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1868 14:27:50.430149 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1869 14:27:50.436963 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1870 14:27:50.440008 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1871 14:27:50.446957 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1872 14:27:50.449920 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1873 14:27:50.456545 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1874 14:27:50.463310 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1875 14:27:50.466454 \_SB.PCI0.RP09: Added StorageD3Enable property
1876 14:27:50.473342 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1877 14:27:50.476428 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1878 14:27:50.482827 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1879 14:27:50.486463 PS2K: Passing 80 keymaps to kernel
1880 14:27:50.493019 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1881 14:27:50.499118 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1882 14:27:50.506030 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1883 14:27:50.512405 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1884 14:27:50.519284 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1885 14:27:50.525612 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1886 14:27:50.532475 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1887 14:27:50.538778 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1888 14:27:50.542494 ACPI: added table 2/32, length now 44
1889 14:27:50.545582 ACPI: * MCFG
1890 14:27:50.548629 ACPI: added table 3/32, length now 48
1891 14:27:50.548703 ACPI: * TPM2
1892 14:27:50.552217 TPM2 log created at 0x769f0000
1893 14:27:50.555320 ACPI: added table 4/32, length now 52
1894 14:27:50.558866 ACPI: * MADT
1895 14:27:50.558967 SCI is IRQ9
1896 14:27:50.561995 ACPI: added table 5/32, length now 56
1897 14:27:50.565103 current = 76b09850
1898 14:27:50.565203 ACPI: * DMAR
1899 14:27:50.572016 ACPI: added table 6/32, length now 60
1900 14:27:50.575070 ACPI: added table 7/32, length now 64
1901 14:27:50.575170 ACPI: * HPET
1902 14:27:50.581834 ACPI: added table 8/32, length now 68
1903 14:27:50.581939 ACPI: done.
1904 14:27:50.584890 ACPI tables: 35216 bytes.
1905 14:27:50.587946 smbios_write_tables: 769ef000
1906 14:27:50.591545 EC returned error result code 3
1907 14:27:50.594998 Couldn't obtain OEM name from CBI
1908 14:27:50.597900 Create SMBIOS type 16
1909 14:27:50.598014 Create SMBIOS type 17
1910 14:27:50.601607 GENERIC: 0.0 (WIFI Device)
1911 14:27:50.604734 SMBIOS tables: 1734 bytes.
1912 14:27:50.607860 Writing table forward entry at 0x00000500
1913 14:27:50.614761 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1914 14:27:50.617832 Writing coreboot table at 0x76b25000
1915 14:27:50.624858 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1916 14:27:50.627949 1. 0000000000001000-000000000009ffff: RAM
1917 14:27:50.634838 2. 00000000000a0000-00000000000fffff: RESERVED
1918 14:27:50.637908 3. 0000000000100000-00000000769eefff: RAM
1919 14:27:50.644238 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1920 14:27:50.647418 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1921 14:27:50.654013 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1922 14:27:50.661045 7. 0000000077000000-000000007fbfffff: RESERVED
1923 14:27:50.664007 8. 00000000c0000000-00000000cfffffff: RESERVED
1924 14:27:50.667642 9. 00000000f8000000-00000000f9ffffff: RESERVED
1925 14:27:50.673883 10. 00000000fb000000-00000000fb000fff: RESERVED
1926 14:27:50.677570 11. 00000000fe000000-00000000fe00ffff: RESERVED
1927 14:27:50.683793 12. 00000000fed80000-00000000fed87fff: RESERVED
1928 14:27:50.687401 13. 00000000fed90000-00000000fed92fff: RESERVED
1929 14:27:50.693531 14. 00000000feda0000-00000000feda1fff: RESERVED
1930 14:27:50.697109 15. 00000000fedc0000-00000000feddffff: RESERVED
1931 14:27:50.700591 16. 0000000100000000-00000004803fffff: RAM
1932 14:27:50.703568 Passing 4 GPIOs to payload:
1933 14:27:50.709983 NAME | PORT | POLARITY | VALUE
1934 14:27:50.716879 lid | undefined | high | high
1935 14:27:50.719881 power | undefined | high | low
1936 14:27:50.726779 oprom | undefined | high | low
1937 14:27:50.729933 EC in RW | 0x000000e5 | high | high
1938 14:27:50.736791 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e1d1
1939 14:27:50.739938 coreboot table: 1576 bytes.
1940 14:27:50.742998 IMD ROOT 0. 0x76fff000 0x00001000
1941 14:27:50.746738 IMD SMALL 1. 0x76ffe000 0x00001000
1942 14:27:50.752940 FSP MEMORY 2. 0x76c4e000 0x003b0000
1943 14:27:50.756769 VPD 3. 0x76c4d000 0x00000367
1944 14:27:50.759868 RO MCACHE 4. 0x76c4c000 0x00000fdc
1945 14:27:50.762951 CONSOLE 5. 0x76c2c000 0x00020000
1946 14:27:50.766454 FMAP 6. 0x76c2b000 0x00000578
1947 14:27:50.769393 TIME STAMP 7. 0x76c2a000 0x00000910
1948 14:27:50.772913 VBOOT WORK 8. 0x76c16000 0x00014000
1949 14:27:50.775901 ROMSTG STCK 9. 0x76c15000 0x00001000
1950 14:27:50.782793 AFTER CAR 10. 0x76c0a000 0x0000b000
1951 14:27:50.785918 RAMSTAGE 11. 0x76b97000 0x00073000
1952 14:27:50.789635 REFCODE 12. 0x76b42000 0x00055000
1953 14:27:50.792697 SMM BACKUP 13. 0x76b32000 0x00010000
1954 14:27:50.795842 4f444749 14. 0x76b30000 0x00002000
1955 14:27:50.798998 EXT VBT15. 0x76b2d000 0x0000219f
1956 14:27:50.802418 COREBOOT 16. 0x76b25000 0x00008000
1957 14:27:50.805971 ACPI 17. 0x76b01000 0x00024000
1958 14:27:50.809020 ACPI GNVS 18. 0x76b00000 0x00001000
1959 14:27:50.815763 RAMOOPS 19. 0x76a00000 0x00100000
1960 14:27:50.818865 TPM2 TCGLOG20. 0x769f0000 0x00010000
1961 14:27:50.822765 SMBIOS 21. 0x769ef000 0x00000800
1962 14:27:50.822864 IMD small region:
1963 14:27:50.828945 IMD ROOT 0. 0x76ffec00 0x00000400
1964 14:27:50.832044 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1965 14:27:50.835694 POWER STATE 2. 0x76ffeb80 0x00000044
1966 14:27:50.838744 ROMSTAGE 3. 0x76ffeb60 0x00000004
1967 14:27:50.841890 MEM INFO 4. 0x76ffe980 0x000001e0
1968 14:27:50.848769 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1969 14:27:50.851873 MTRR: Physical address space:
1970 14:27:50.858821 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1971 14:27:50.865080 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1972 14:27:50.872090 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1973 14:27:50.878601 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1974 14:27:50.884983 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1975 14:27:50.888554 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1976 14:27:50.895365 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1977 14:27:50.901439 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 14:27:50.905049 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 14:27:50.908485 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 14:27:50.911564 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 14:27:50.918374 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 14:27:50.921494 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 14:27:50.924588 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 14:27:50.928263 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 14:27:50.931427 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 14:27:50.937773 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 14:27:50.941401 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 14:27:50.945142 call enable_fixed_mtrr()
1989 14:27:50.948339 CPU physical address size: 39 bits
1990 14:27:50.955157 MTRR: default type WB/UC MTRR counts: 6/7.
1991 14:27:50.958405 MTRR: WB selected as default type.
1992 14:27:50.964659 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1993 14:27:50.968361 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1994 14:27:50.974635 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1995 14:27:50.981356 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1996 14:27:50.988001 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1997 14:27:50.994363 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1998 14:27:50.998002
1999 14:27:50.998106 MTRR check
2000 14:27:51.001409 Fixed MTRRs : Enabled
2001 14:27:51.001515 Variable MTRRs: Enabled
2002 14:27:51.001606
2003 14:27:51.008138 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 14:27:51.011260 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 14:27:51.014811 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 14:27:51.018289 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 14:27:51.024513 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 14:27:51.027628 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 14:27:51.031375 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 14:27:51.034574 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 14:27:51.040942 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 14:27:51.044229 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 14:27:51.047874 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 14:27:51.055236 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2015 14:27:51.058416 call enable_fixed_mtrr()
2016 14:27:51.062041 Checking cr50 for pending updates
2017 14:27:51.065161 CPU physical address size: 39 bits
2018 14:27:51.068986 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 14:27:51.072664 MTRR: Fixed MSR 0x250 0x0606060606060606
2020 14:27:51.078875 MTRR: Fixed MSR 0x258 0x0606060606060606
2021 14:27:51.082606 MTRR: Fixed MSR 0x259 0x0000000000000000
2022 14:27:51.085597 MTRR: Fixed MSR 0x268 0x0606060606060606
2023 14:27:51.088875 MTRR: Fixed MSR 0x269 0x0606060606060606
2024 14:27:51.095440 MTRR: Fixed MSR 0x26a 0x0606060606060606
2025 14:27:51.098826 MTRR: Fixed MSR 0x26b 0x0606060606060606
2026 14:27:51.102212 MTRR: Fixed MSR 0x26c 0x0606060606060606
2027 14:27:51.105132 MTRR: Fixed MSR 0x26d 0x0606060606060606
2028 14:27:51.108616 MTRR: Fixed MSR 0x26e 0x0606060606060606
2029 14:27:51.115334 MTRR: Fixed MSR 0x26f 0x0606060606060606
2030 14:27:51.121760 MTRR: Fixed MSR 0x258 0x0606060606060606
2031 14:27:51.121861 call enable_fixed_mtrr()
2032 14:27:51.128424 MTRR: Fixed MSR 0x259 0x0000000000000000
2033 14:27:51.131529 MTRR: Fixed MSR 0x268 0x0606060606060606
2034 14:27:51.135348 MTRR: Fixed MSR 0x269 0x0606060606060606
2035 14:27:51.138449 MTRR: Fixed MSR 0x26a 0x0606060606060606
2036 14:27:51.141477 MTRR: Fixed MSR 0x26b 0x0606060606060606
2037 14:27:51.148406 MTRR: Fixed MSR 0x26c 0x0606060606060606
2038 14:27:51.151499 MTRR: Fixed MSR 0x26d 0x0606060606060606
2039 14:27:51.155152 MTRR: Fixed MSR 0x26e 0x0606060606060606
2040 14:27:51.158384 MTRR: Fixed MSR 0x26f 0x0606060606060606
2041 14:27:51.163211 CPU physical address size: 39 bits
2042 14:27:51.169961 call enable_fixed_mtrr()
2043 14:27:51.173062 MTRR: Fixed MSR 0x250 0x0606060606060606
2044 14:27:51.176186 MTRR: Fixed MSR 0x250 0x0606060606060606
2045 14:27:51.183086 MTRR: Fixed MSR 0x258 0x0606060606060606
2046 14:27:51.186168 MTRR: Fixed MSR 0x259 0x0000000000000000
2047 14:27:51.189277 MTRR: Fixed MSR 0x268 0x0606060606060606
2048 14:27:51.193136 MTRR: Fixed MSR 0x269 0x0606060606060606
2049 14:27:51.196119 MTRR: Fixed MSR 0x26a 0x0606060606060606
2050 14:27:51.202959 MTRR: Fixed MSR 0x26b 0x0606060606060606
2051 14:27:51.205953 MTRR: Fixed MSR 0x26c 0x0606060606060606
2052 14:27:51.209431 MTRR: Fixed MSR 0x26d 0x0606060606060606
2053 14:27:51.212764 MTRR: Fixed MSR 0x26e 0x0606060606060606
2054 14:27:51.219253 MTRR: Fixed MSR 0x26f 0x0606060606060606
2055 14:27:51.222280 MTRR: Fixed MSR 0x258 0x0606060606060606
2056 14:27:51.228830 MTRR: Fixed MSR 0x259 0x0000000000000000
2057 14:27:51.232290 MTRR: Fixed MSR 0x268 0x0606060606060606
2058 14:27:51.236016 MTRR: Fixed MSR 0x269 0x0606060606060606
2059 14:27:51.239113 MTRR: Fixed MSR 0x26a 0x0606060606060606
2060 14:27:51.245467 MTRR: Fixed MSR 0x26b 0x0606060606060606
2061 14:27:51.249138 MTRR: Fixed MSR 0x26c 0x0606060606060606
2062 14:27:51.252356 MTRR: Fixed MSR 0x26d 0x0606060606060606
2063 14:27:51.255504 MTRR: Fixed MSR 0x26e 0x0606060606060606
2064 14:27:51.262206 MTRR: Fixed MSR 0x26f 0x0606060606060606
2065 14:27:51.265389 call enable_fixed_mtrr()
2066 14:27:51.268541 call enable_fixed_mtrr()
2067 14:27:51.272280 MTRR: Fixed MSR 0x250 0x0606060606060606
2068 14:27:51.275329 MTRR: Fixed MSR 0x250 0x0606060606060606
2069 14:27:51.278454 MTRR: Fixed MSR 0x258 0x0606060606060606
2070 14:27:51.285238 MTRR: Fixed MSR 0x259 0x0000000000000000
2071 14:27:51.289025 MTRR: Fixed MSR 0x268 0x0606060606060606
2072 14:27:51.292131 MTRR: Fixed MSR 0x269 0x0606060606060606
2073 14:27:51.295179 MTRR: Fixed MSR 0x26a 0x0606060606060606
2074 14:27:51.301973 MTRR: Fixed MSR 0x26b 0x0606060606060606
2075 14:27:51.305116 MTRR: Fixed MSR 0x26c 0x0606060606060606
2076 14:27:51.308126 MTRR: Fixed MSR 0x26d 0x0606060606060606
2077 14:27:51.311876 MTRR: Fixed MSR 0x26e 0x0606060606060606
2078 14:27:51.318162 MTRR: Fixed MSR 0x26f 0x0606060606060606
2079 14:27:51.321620 MTRR: Fixed MSR 0x258 0x0606060606060606
2080 14:27:51.328038 MTRR: Fixed MSR 0x259 0x0000000000000000
2081 14:27:51.331625 MTRR: Fixed MSR 0x268 0x0606060606060606
2082 14:27:51.334540 MTRR: Fixed MSR 0x269 0x0606060606060606
2083 14:27:51.338018 MTRR: Fixed MSR 0x26a 0x0606060606060606
2084 14:27:51.344633 MTRR: Fixed MSR 0x26b 0x0606060606060606
2085 14:27:51.347725 MTRR: Fixed MSR 0x26c 0x0606060606060606
2086 14:27:51.351470 MTRR: Fixed MSR 0x26d 0x0606060606060606
2087 14:27:51.354582 MTRR: Fixed MSR 0x26e 0x0606060606060606
2088 14:27:51.358266 MTRR: Fixed MSR 0x26f 0x0606060606060606
2089 14:27:51.364396 call enable_fixed_mtrr()
2090 14:27:51.367452 call enable_fixed_mtrr()
2091 14:27:51.371307 CPU physical address size: 39 bits
2092 14:27:51.374434 CPU physical address size: 39 bits
2093 14:27:51.377610 CPU physical address size: 39 bits
2094 14:27:51.381467 Reading cr50 TPM mode
2095 14:27:51.384706 CPU physical address size: 39 bits
2096 14:27:51.391532 CPU physical address size: 39 bits
2097 14:27:51.395414 BS: BS_PAYLOAD_LOAD entry times (exec / console): 324 / 6 ms
2098 14:27:51.404962 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2099 14:27:51.408110 Checking segment from ROM address 0xffc02b38
2100 14:27:51.411268 Checking segment from ROM address 0xffc02b54
2101 14:27:51.418167 Loading segment from ROM address 0xffc02b38
2102 14:27:51.418314 code (compression=0)
2103 14:27:51.428197 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2104 14:27:51.437961 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2105 14:27:51.438109 it's not compressed!
2106 14:27:51.579149 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2107 14:27:51.585385 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2108 14:27:51.592408 Loading segment from ROM address 0xffc02b54
2109 14:27:51.595499 Entry Point 0x30000000
2110 14:27:51.595582 Loaded segments
2111 14:27:51.602440 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2112 14:27:51.647128 Finalizing chipset.
2113 14:27:51.650437 Finalizing SMM.
2114 14:27:51.650560 APMC done.
2115 14:27:51.656799 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2116 14:27:51.660244 mp_park_aps done after 0 msecs.
2117 14:27:51.663426 Jumping to boot code at 0x30000000(0x76b25000)
2118 14:27:51.673476 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2119 14:27:51.673582
2120 14:27:51.673657
2121 14:27:51.676623
2122 14:27:51.676709 Starting depthcharge on Voema...
2123 14:27:51.677069 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2124 14:27:51.677174 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2125 14:27:51.677258 Setting prompt string to ['volteer:']
2126 14:27:51.677361 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2127 14:27:51.680371
2128 14:27:51.686608 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2129 14:27:51.686716
2130 14:27:51.693624 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2131 14:27:51.693709
2132 14:27:51.699885 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2133 14:27:51.699963
2134 14:27:51.703055 Failed to find eMMC card reader
2135 14:27:51.703148
2136 14:27:51.706681 Wipe memory regions:
2137 14:27:51.706783
2138 14:27:51.709786 [0x00000000001000, 0x000000000a0000)
2139 14:27:51.709863
2140 14:27:51.712871 [0x00000000100000, 0x00000030000000)
2141 14:27:51.747555
2142 14:27:51.750466 [0x00000032662db0, 0x000000769ef000)
2143 14:27:51.798281
2144 14:27:51.801384 [0x00000100000000, 0x00000480400000)
2145 14:27:52.444309
2146 14:27:52.447389 ec_init: CrosEC protocol v3 supported (256, 256)
2147 14:27:52.878744
2148 14:27:52.878881 R8152: Initializing
2149 14:27:52.878949
2150 14:27:52.881892 Version 6 (ocp_data = 5c30)
2151 14:27:52.881974
2152 14:27:52.885173 R8152: Done initializing
2153 14:27:52.885254
2154 14:27:52.888344 Adding net device
2155 14:27:53.189906
2156 14:27:53.192878 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2157 14:27:53.192966
2158 14:27:53.193035
2159 14:27:53.193096
2160 14:27:53.196260 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2162 14:27:53.296640 volteer: tftpboot 192.168.201.1 10607770/tftp-deploy-mfk3i9dl/kernel/bzImage 10607770/tftp-deploy-mfk3i9dl/kernel/cmdline 10607770/tftp-deploy-mfk3i9dl/ramdisk/ramdisk.cpio.gz
2163 14:27:53.296793 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2164 14:27:53.296955 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2165 14:27:53.301427 tftpboot 192.168.201.1 10607770/tftp-deploy-mfk3i9dl/kernel/bzIploy-mfk3i9dl/kernel/cmdline 10607770/tftp-deploy-mfk3i9dl/ramdisk/ramdisk.cpio.gz
2166 14:27:53.301514
2167 14:27:53.301580 Waiting for link
2168 14:27:53.505191
2169 14:27:53.505331 done.
2170 14:27:53.505401
2171 14:27:53.505462 MAC: 00:24:32:30:7d:ab
2172 14:27:53.505520
2173 14:27:53.508745 Sending DHCP discover... done.
2174 14:27:53.508844
2175 14:27:53.511737 Waiting for reply... done.
2176 14:27:53.511891
2177 14:27:53.514889 Sending DHCP request... done.
2178 14:27:53.514987
2179 14:27:53.613742 Waiting for reply... done.
2180 14:27:53.613904
2181 14:27:53.614001 My ip is 192.168.201.20
2182 14:27:53.614090
2183 14:27:53.620306 The DHCP server ip is 192.168.201.1
2184 14:27:53.620421
2185 14:27:53.623325 TFTP server IP predefined by user: 192.168.201.1
2186 14:27:53.623435
2187 14:27:53.630325 Bootfile predefined by user: 10607770/tftp-deploy-mfk3i9dl/kernel/bzImage
2188 14:27:53.630411
2189 14:27:53.633378 Sending tftp read request... done.
2190 14:27:53.633461
2191 14:27:53.640346 Waiting for the transfer...
2192 14:27:53.640474
2193 14:27:54.198369 00000000 ################################################################
2194 14:27:54.198496
2195 14:27:54.744062 00080000 ################################################################
2196 14:27:54.744226
2197 14:27:55.283235 00100000 ################################################################
2198 14:27:55.283395
2199 14:27:55.821437 00180000 ################################################################
2200 14:27:55.821599
2201 14:27:56.351005 00200000 ################################################################
2202 14:27:56.351148
2203 14:27:56.886860 00280000 ################################################################
2204 14:27:56.886997
2205 14:27:57.431015 00300000 ################################################################
2206 14:27:57.431156
2207 14:27:57.999108 00380000 ################################################################
2208 14:27:57.999276
2209 14:27:58.541226 00400000 ################################################################
2210 14:27:58.541374
2211 14:27:59.081182 00480000 ################################################################
2212 14:27:59.081339
2213 14:27:59.615315 00500000 ################################################################
2214 14:27:59.615470
2215 14:28:00.130950 00580000 ################################################################
2216 14:28:00.131157
2217 14:28:00.662911 00600000 ################################################################
2218 14:28:00.663139
2219 14:28:01.256281 00680000 ################################################################
2220 14:28:01.256434
2221 14:28:01.802554 00700000 ################################################################
2222 14:28:01.802701
2223 14:28:01.822919 00780000 ### done.
2224 14:28:01.823053
2225 14:28:01.825862 The bootfile was 7884688 bytes long.
2226 14:28:01.825944
2227 14:28:01.829605 Sending tftp read request... done.
2228 14:28:01.829691
2229 14:28:01.832612 Waiting for the transfer...
2230 14:28:01.832688
2231 14:28:02.359287 00000000 ################################################################
2232 14:28:02.359433
2233 14:28:02.910344 00080000 ################################################################
2234 14:28:02.910486
2235 14:28:03.450324 00100000 ################################################################
2236 14:28:03.450504
2237 14:28:03.989277 00180000 ################################################################
2238 14:28:03.989426
2239 14:28:04.532181 00200000 ################################################################
2240 14:28:04.532359
2241 14:28:05.078933 00280000 ################################################################
2242 14:28:05.079119
2243 14:28:05.595804 00300000 ################################################################
2244 14:28:05.595954
2245 14:28:06.171810 00380000 ################################################################
2246 14:28:06.171957
2247 14:28:06.714699 00400000 ################################################################
2248 14:28:06.714862
2249 14:28:07.249231 00480000 ################################################################
2250 14:28:07.249371
2251 14:28:07.779536 00500000 ################################################################ done.
2252 14:28:07.779713
2253 14:28:07.782675 Sending tftp read request... done.
2254 14:28:07.782792
2255 14:28:07.785783 Waiting for the transfer...
2256 14:28:07.785902
2257 14:28:07.786000 00000000 # done.
2258 14:28:07.786094
2259 14:28:07.795640 Command line loaded dynamically from TFTP file: 10607770/tftp-deploy-mfk3i9dl/kernel/cmdline
2260 14:28:07.795753
2261 14:28:07.818915 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10607770/extract-nfsrootfs-d88qqccr,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2262 14:28:07.822565
2263 14:28:07.825681 Shutting down all USB controllers.
2264 14:28:07.825767
2265 14:28:07.825844 Removing current net device
2266 14:28:07.825907
2267 14:28:07.828875 Finalizing coreboot
2268 14:28:07.828958
2269 14:28:07.835760 Exiting depthcharge with code 4 at timestamp: 24732772
2270 14:28:07.835844
2271 14:28:07.835910
2272 14:28:07.835971 Starting kernel ...
2273 14:28:07.836030
2274 14:28:07.836106
2275 14:28:07.836461 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2276 14:28:07.836577 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2277 14:28:07.836655 Setting prompt string to ['Linux version [0-9]']
2278 14:28:07.836722 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2279 14:28:07.836790 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2281 14:32:35.837423 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2283 14:32:35.838384 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2285 14:32:35.839145 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2288 14:32:35.840404 end: 2 depthcharge-action (duration 00:05:00) [common]
2290 14:32:35.841575 Cleaning after the job
2291 14:32:35.842005 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607770/tftp-deploy-mfk3i9dl/ramdisk
2292 14:32:35.845575 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607770/tftp-deploy-mfk3i9dl/kernel
2293 14:32:35.849927 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607770/tftp-deploy-mfk3i9dl/nfsrootfs
2294 14:32:35.936588 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607770/tftp-deploy-mfk3i9dl/modules
2295 14:32:35.937044 start: 5.1 power-off (timeout 00:00:30) [common]
2296 14:32:35.937218 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=off'
2297 14:32:36.014510 >> Command sent successfully.
2298 14:32:36.019250 Returned 0 in 0 seconds
2299 14:32:36.120141 end: 5.1 power-off (duration 00:00:00) [common]
2301 14:32:36.121596 start: 5.2 read-feedback (timeout 00:10:00) [common]
2302 14:32:36.122850 Listened to connection for namespace 'common' for up to 1s
2303 14:32:37.123586 Finalising connection for namespace 'common'
2304 14:32:37.124197 Disconnecting from shell: Finalise
2305 14:32:37.124617
2306 14:32:37.225546 end: 5.2 read-feedback (duration 00:00:01) [common]
2307 14:32:37.226098 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10607770
2308 14:32:37.514496 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10607770
2309 14:32:37.514689 JobError: Your job cannot terminate cleanly.