Boot log: asus-cx9400-volteer
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 14:27:27.118971 lava-dispatcher, installed at version: 2023.05.1
2 14:27:27.119192 start: 0 validate
3 14:27:27.119333 Start time: 2023-06-06 14:27:27.119325+00:00 (UTC)
4 14:27:27.119476 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:27:27.119613 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230527.0%2Fx86%2Frootfs.cpio.gz exists
6 14:27:27.407496 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:27:27.407740 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1308-ge1d2f27f3d7b0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:27:30.913333 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:27:30.913532 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1308-ge1d2f27f3d7b0%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 14:27:31.915471 validate duration: 4.80
12 14:27:31.915765 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:27:31.915870 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:27:31.915960 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:27:31.916081 Not decompressing ramdisk as can be used compressed.
16 14:27:31.916172 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230527.0/x86/rootfs.cpio.gz
17 14:27:31.916242 saving as /var/lib/lava/dispatcher/tmp/10607809/tftp-deploy-qu8m7zm4/ramdisk/rootfs.cpio.gz
18 14:27:31.916305 total size: 8430069 (8MB)
19 14:27:31.917519 progress 0% (0MB)
20 14:27:31.919873 progress 5% (0MB)
21 14:27:31.922266 progress 10% (0MB)
22 14:27:31.924626 progress 15% (1MB)
23 14:27:31.926917 progress 20% (1MB)
24 14:27:31.929322 progress 25% (2MB)
25 14:27:31.931719 progress 30% (2MB)
26 14:27:31.934047 progress 35% (2MB)
27 14:27:31.936271 progress 40% (3MB)
28 14:27:31.938664 progress 45% (3MB)
29 14:27:31.941077 progress 50% (4MB)
30 14:27:31.943334 progress 55% (4MB)
31 14:27:31.945595 progress 60% (4MB)
32 14:27:31.947800 progress 65% (5MB)
33 14:27:31.950960 progress 70% (5MB)
34 14:27:31.954174 progress 75% (6MB)
35 14:27:31.957710 progress 80% (6MB)
36 14:27:31.961194 progress 85% (6MB)
37 14:27:31.964671 progress 90% (7MB)
38 14:27:31.968195 progress 95% (7MB)
39 14:27:31.971765 progress 100% (8MB)
40 14:27:31.972010 8MB downloaded in 0.06s (144.34MB/s)
41 14:27:31.972226 end: 1.1.1 http-download (duration 00:00:00) [common]
43 14:27:31.972612 end: 1.1 download-retry (duration 00:00:00) [common]
44 14:27:31.972740 start: 1.2 download-retry (timeout 00:10:00) [common]
45 14:27:31.972876 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 14:27:31.973067 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1308-ge1d2f27f3d7b0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 14:27:31.973177 saving as /var/lib/lava/dispatcher/tmp/10607809/tftp-deploy-qu8m7zm4/kernel/bzImage
48 14:27:31.973279 total size: 7884688 (7MB)
49 14:27:31.973368 No compression specified
50 14:27:31.974956 progress 0% (0MB)
51 14:27:31.978375 progress 5% (0MB)
52 14:27:31.981711 progress 10% (0MB)
53 14:27:31.985041 progress 15% (1MB)
54 14:27:31.988377 progress 20% (1MB)
55 14:27:31.991670 progress 25% (1MB)
56 14:27:31.995119 progress 30% (2MB)
57 14:27:31.998468 progress 35% (2MB)
58 14:27:32.001819 progress 40% (3MB)
59 14:27:32.005078 progress 45% (3MB)
60 14:27:32.008439 progress 50% (3MB)
61 14:27:32.011744 progress 55% (4MB)
62 14:27:32.014983 progress 60% (4MB)
63 14:27:32.018306 progress 65% (4MB)
64 14:27:32.021638 progress 70% (5MB)
65 14:27:32.024943 progress 75% (5MB)
66 14:27:32.028230 progress 80% (6MB)
67 14:27:32.031453 progress 85% (6MB)
68 14:27:32.034745 progress 90% (6MB)
69 14:27:32.037960 progress 95% (7MB)
70 14:27:32.041276 progress 100% (7MB)
71 14:27:32.041608 7MB downloaded in 0.07s (110.06MB/s)
72 14:27:32.041833 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:27:32.042210 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:27:32.042350 start: 1.3 download-retry (timeout 00:10:00) [common]
76 14:27:32.042476 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 14:27:32.042671 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1308-ge1d2f27f3d7b0/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 14:27:32.042773 saving as /var/lib/lava/dispatcher/tmp/10607809/tftp-deploy-qu8m7zm4/modules/modules.tar
79 14:27:32.042882 total size: 250548 (0MB)
80 14:27:32.042978 Using unxz to decompress xz
81 14:27:32.047789 progress 13% (0MB)
82 14:27:32.048356 progress 26% (0MB)
83 14:27:32.048729 progress 39% (0MB)
84 14:27:32.050058 progress 52% (0MB)
85 14:27:32.052095 progress 65% (0MB)
86 14:27:32.053944 progress 78% (0MB)
87 14:27:32.056107 progress 91% (0MB)
88 14:27:32.058238 progress 100% (0MB)
89 14:27:32.064487 0MB downloaded in 0.02s (11.07MB/s)
90 14:27:32.064950 end: 1.3.1 http-download (duration 00:00:00) [common]
92 14:27:32.065403 end: 1.3 download-retry (duration 00:00:00) [common]
93 14:27:32.065554 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 14:27:32.065705 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 14:27:32.065838 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 14:27:32.065980 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 14:27:32.066287 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr
98 14:27:32.066493 makedir: /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin
99 14:27:32.066659 makedir: /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/tests
100 14:27:32.066824 makedir: /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/results
101 14:27:32.066999 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-add-keys
102 14:27:32.067223 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-add-sources
103 14:27:32.067421 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-background-process-start
104 14:27:32.067621 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-background-process-stop
105 14:27:32.067821 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-common-functions
106 14:27:32.068014 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-echo-ipv4
107 14:27:32.068207 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-install-packages
108 14:27:32.068394 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-installed-packages
109 14:27:32.068589 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-os-build
110 14:27:32.068782 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-probe-channel
111 14:27:32.068973 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-probe-ip
112 14:27:32.069167 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-target-ip
113 14:27:32.069357 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-target-mac
114 14:27:32.069548 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-target-storage
115 14:27:32.069741 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-test-case
116 14:27:32.069933 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-test-event
117 14:27:32.070122 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-test-feedback
118 14:27:32.070312 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-test-raise
119 14:27:32.070507 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-test-reference
120 14:27:32.070706 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-test-runner
121 14:27:32.070896 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-test-set
122 14:27:32.071085 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-test-shell
123 14:27:32.071279 Updating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-install-packages (oe)
124 14:27:32.071496 Updating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/bin/lava-installed-packages (oe)
125 14:27:32.071687 Creating /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/environment
126 14:27:32.071850 LAVA metadata
127 14:27:32.071973 - LAVA_JOB_ID=10607809
128 14:27:32.072087 - LAVA_DISPATCHER_IP=192.168.201.1
129 14:27:32.072270 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 14:27:32.072386 skipped lava-vland-overlay
131 14:27:32.072515 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 14:27:32.072663 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 14:27:32.072779 skipped lava-multinode-overlay
134 14:27:32.072902 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 14:27:32.073045 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 14:27:32.073180 Loading test definitions
137 14:27:32.073333 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 14:27:32.073456 Using /lava-10607809 at stage 0
139 14:27:32.073974 uuid=10607809_1.4.2.3.1 testdef=None
140 14:27:32.074113 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 14:27:32.074247 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 14:27:32.075069 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 14:27:32.075442 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 14:27:32.076455 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 14:27:32.076853 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 14:27:32.077849 runner path: /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/0/tests/0_dmesg test_uuid 10607809_1.4.2.3.1
149 14:27:32.078078 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 14:27:32.078481 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 14:27:32.078599 Using /lava-10607809 at stage 1
153 14:27:32.079089 uuid=10607809_1.4.2.3.5 testdef=None
154 14:27:32.079233 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 14:27:32.079366 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 14:27:32.080105 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 14:27:32.080484 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 14:27:32.081547 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 14:27:32.081954 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 14:27:32.082954 runner path: /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/1/tests/1_bootrr test_uuid 10607809_1.4.2.3.5
163 14:27:32.083178 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 14:27:32.083527 Creating lava-test-runner.conf files
166 14:27:32.083629 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/0 for stage 0
167 14:27:32.083768 - 0_dmesg
168 14:27:32.083891 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10607809/lava-overlay-kvmv97kr/lava-10607809/1 for stage 1
169 14:27:32.084031 - 1_bootrr
170 14:27:32.084180 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 14:27:32.084315 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 14:27:32.096984 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 14:27:32.097193 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 14:27:32.097338 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 14:27:32.097475 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 14:27:32.097612 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 14:27:32.367117 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 14:27:32.367501 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 14:27:32.367626 extracting modules file /var/lib/lava/dispatcher/tmp/10607809/tftp-deploy-qu8m7zm4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10607809/extract-overlay-ramdisk-sxdo7mea/ramdisk
180 14:27:32.380459 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 14:27:32.380638 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 14:27:32.380739 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10607809/compress-overlay-y6l1xjy1/overlay-1.4.2.4.tar.gz to ramdisk
183 14:27:32.380824 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10607809/compress-overlay-y6l1xjy1/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10607809/extract-overlay-ramdisk-sxdo7mea/ramdisk
184 14:27:32.389514 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 14:27:32.389681 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 14:27:32.389776 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 14:27:32.389869 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 14:27:32.389958 Building ramdisk /var/lib/lava/dispatcher/tmp/10607809/extract-overlay-ramdisk-sxdo7mea/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10607809/extract-overlay-ramdisk-sxdo7mea/ramdisk
189 14:27:32.508984 >> 49788 blocks
190 14:27:33.373242 rename /var/lib/lava/dispatcher/tmp/10607809/extract-overlay-ramdisk-sxdo7mea/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10607809/tftp-deploy-qu8m7zm4/ramdisk/ramdisk.cpio.gz
191 14:27:33.373662 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 14:27:33.373813 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 14:27:33.373944 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 14:27:33.374079 No mkimage arch provided, not using FIT.
195 14:27:33.374163 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 14:27:33.374248 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 14:27:33.374350 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 14:27:33.374499 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 14:27:33.374597 No LXC device requested
200 14:27:33.374678 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 14:27:33.374766 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 14:27:33.374846 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 14:27:33.374917 Checking files for TFTP limit of 4294967296 bytes.
204 14:27:33.375338 end: 1 tftp-deploy (duration 00:00:01) [common]
205 14:27:33.375446 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 14:27:33.375541 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 14:27:33.375694 substitutions:
208 14:27:33.375762 - {DTB}: None
209 14:27:33.375826 - {INITRD}: 10607809/tftp-deploy-qu8m7zm4/ramdisk/ramdisk.cpio.gz
210 14:27:33.375887 - {KERNEL}: 10607809/tftp-deploy-qu8m7zm4/kernel/bzImage
211 14:27:33.375946 - {LAVA_MAC}: None
212 14:27:33.376005 - {PRESEED_CONFIG}: None
213 14:27:33.376061 - {PRESEED_LOCAL}: None
214 14:27:33.376132 - {RAMDISK}: 10607809/tftp-deploy-qu8m7zm4/ramdisk/ramdisk.cpio.gz
215 14:27:33.376220 - {ROOT_PART}: None
216 14:27:33.376275 - {ROOT}: None
217 14:27:33.376332 - {SERVER_IP}: 192.168.201.1
218 14:27:33.376388 - {TEE}: None
219 14:27:33.376443 Parsed boot commands:
220 14:27:33.376547 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 14:27:33.376747 Parsed boot commands: tftpboot 192.168.201.1 10607809/tftp-deploy-qu8m7zm4/kernel/bzImage 10607809/tftp-deploy-qu8m7zm4/kernel/cmdline 10607809/tftp-deploy-qu8m7zm4/ramdisk/ramdisk.cpio.gz
222 14:27:33.376863 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 14:27:33.376949 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 14:27:33.377042 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 14:27:33.377130 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 14:27:33.377199 Not connected, no need to disconnect.
227 14:27:33.377273 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 14:27:33.377386 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 14:27:33.377455 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-1'
230 14:27:33.381198 Setting prompt string to ['lava-test: # ']
231 14:27:33.381572 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 14:27:33.381704 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 14:27:33.381836 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 14:27:33.381957 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 14:27:33.382192 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=reboot'
236 14:27:38.514484 >> Command sent successfully.
237 14:27:38.517409 Returned 0 in 5 seconds
238 14:27:38.617811 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 14:27:38.618203 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 14:27:38.618320 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 14:27:38.618421 Setting prompt string to 'Starting depthcharge on Voema...'
243 14:27:38.618504 Changing prompt to 'Starting depthcharge on Voema...'
244 14:27:38.618591 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 14:27:38.618937 [Enter `^Ec?' for help]
246 14:27:40.220531
247 14:27:40.220779
248 14:27:40.230751 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 14:27:40.234160 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
250 14:27:40.240718 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 14:27:40.243932 CPU: AES supported, TXT NOT supported, VT supported
252 14:27:40.250674 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 14:27:40.253883 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 14:27:40.260726 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 14:27:40.264003 VBOOT: Loading verstage.
256 14:27:40.267302 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 14:27:40.274115 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 14:27:40.277317 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 14:27:40.287444 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 14:27:40.294409 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 14:27:40.294586
262 14:27:40.294691
263 14:27:40.307670 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 14:27:40.321303 Probing TPM: . done!
265 14:27:40.324461 TPM ready after 0 ms
266 14:27:40.328287 Connected to device vid:did:rid of 1ae0:0028:00
267 14:27:40.339281 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
268 14:27:40.345843 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 14:27:40.349173 Initialized TPM device CR50 revision 0
270 14:27:40.442273 tlcl_send_startup: Startup return code is 0
271 14:27:40.442415 TPM: setup succeeded
272 14:27:40.457917 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 14:27:40.471773 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 14:27:40.484966 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 14:27:40.494863 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 14:27:40.498539 Chrome EC: UHEPI supported
277 14:27:40.502146 Phase 1
278 14:27:40.505374 FMAP: area GBB found @ 1805000 (458752 bytes)
279 14:27:40.515340 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 14:27:40.521877 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 14:27:40.528708 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 14:27:40.535259 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 14:27:40.538610 Recovery requested (1009000e)
284 14:27:40.541944 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 14:27:40.553422 tlcl_extend: response is 0
286 14:27:40.560656 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 14:27:40.570262 tlcl_extend: response is 0
288 14:27:40.576966 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 14:27:40.583314 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 14:27:40.590083 BS: verstage times (exec / console): total (unknown) / 142 ms
291 14:27:40.590210
292 14:27:40.590283
293 14:27:40.603471 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 14:27:40.610236 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 14:27:40.613260 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 14:27:40.616521 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 14:27:40.623392 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 14:27:40.626648 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 14:27:40.629932 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 14:27:40.633180 TCO_STS: 0000 0000
301 14:27:40.637005 GEN_PMCON: d0015038 00002200
302 14:27:40.639810 GBLRST_CAUSE: 00000000 00000000
303 14:27:40.639908 HPR_CAUSE0: 00000000
304 14:27:40.643452 prev_sleep_state 5
305 14:27:40.646735 Boot Count incremented to 22964
306 14:27:40.653354 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 14:27:40.660564 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 14:27:40.667842 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 14:27:40.674298 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 14:27:40.677527 Chrome EC: UHEPI supported
311 14:27:40.684139 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 14:27:40.697467 Probing TPM: done!
313 14:27:40.703780 Connected to device vid:did:rid of 1ae0:0028:00
314 14:27:40.713971 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
315 14:27:40.717591 Initialized TPM device CR50 revision 0
316 14:27:40.732398 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 14:27:40.738915 MRC: Hash idx 0x100b comparison successful.
318 14:27:40.742259 MRC cache found, size faa8
319 14:27:40.742354 bootmode is set to: 2
320 14:27:40.745399 SPD index = 0
321 14:27:40.752351 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 14:27:40.755341 SPD: module type is LPDDR4X
323 14:27:40.762256 SPD: module part number is MT53E512M64D4NW-046
324 14:27:40.765446 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
325 14:27:40.772147 SPD: device width 16 bits, bus width 16 bits
326 14:27:40.775533 SPD: module size is 1024 MB (per channel)
327 14:27:41.208309 CBMEM:
328 14:27:41.211779 IMD: root @ 0x76fff000 254 entries.
329 14:27:41.215222 IMD: root @ 0x76ffec00 62 entries.
330 14:27:41.218227 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 14:27:41.225023 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 14:27:41.228300 External stage cache:
333 14:27:41.231901 IMD: root @ 0x7b3ff000 254 entries.
334 14:27:41.235064 IMD: root @ 0x7b3fec00 62 entries.
335 14:27:41.250233 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 14:27:41.256664 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 14:27:41.263222 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 14:27:41.277600 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 14:27:41.284113 cse_lite: Skip switching to RW in the recovery path
340 14:27:41.284257 8 DIMMs found
341 14:27:41.284351 SMM Memory Map
342 14:27:41.287408 SMRAM : 0x7b000000 0x800000
343 14:27:41.293998 Subregion 0: 0x7b000000 0x200000
344 14:27:41.297343 Subregion 1: 0x7b200000 0x200000
345 14:27:41.300687 Subregion 2: 0x7b400000 0x400000
346 14:27:41.300828 top_of_ram = 0x77000000
347 14:27:41.307187 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 14:27:41.313871 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 14:27:41.317136 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 14:27:41.323884 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 14:27:41.330442 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 14:27:41.337119 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 14:27:41.347102 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 14:27:41.350424 Processing 211 relocs. Offset value of 0x74c0b000
355 14:27:41.360025 BS: romstage times (exec / console): total (unknown) / 277 ms
356 14:27:41.366197
357 14:27:41.366350
358 14:27:41.375934 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 14:27:41.379622 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 14:27:41.389724 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 14:27:41.396167 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 14:27:41.403080 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 14:27:41.409569 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 14:27:41.456636 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 14:27:41.463055 Processing 5008 relocs. Offset value of 0x75d98000
366 14:27:41.466346 BS: postcar times (exec / console): total (unknown) / 59 ms
367 14:27:41.469434
368 14:27:41.469570
369 14:27:41.479773 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 14:27:41.479913 Normal boot
371 14:27:41.482963 FW_CONFIG value is 0x804c02
372 14:27:41.486127 PCI: 00:07.0 disabled by fw_config
373 14:27:41.489272 PCI: 00:07.1 disabled by fw_config
374 14:27:41.492650 PCI: 00:0d.2 disabled by fw_config
375 14:27:41.496398 PCI: 00:1c.7 disabled by fw_config
376 14:27:41.502739 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 14:27:41.509529 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 14:27:41.512659 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 14:27:41.516366 GENERIC: 0.0 disabled by fw_config
380 14:27:41.522553 GENERIC: 1.0 disabled by fw_config
381 14:27:41.526097 fw_config match found: DB_USB=USB3_ACTIVE
382 14:27:41.529498 fw_config match found: DB_USB=USB3_ACTIVE
383 14:27:41.532712 fw_config match found: DB_USB=USB3_ACTIVE
384 14:27:41.539413 fw_config match found: DB_USB=USB3_ACTIVE
385 14:27:41.542783 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 14:27:41.549348 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 14:27:41.559117 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 14:27:41.565983 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 14:27:41.569185 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 14:27:41.575621 microcode: Update skipped, already up-to-date
391 14:27:41.582462 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 14:27:41.610042 Detected 4 core, 8 thread CPU.
393 14:27:41.613582 Setting up SMI for CPU
394 14:27:41.616963 IED base = 0x7b400000
395 14:27:41.617084 IED size = 0x00400000
396 14:27:41.620159 Will perform SMM setup.
397 14:27:41.626701 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
398 14:27:41.633322 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 14:27:41.639924 Processing 16 relocs. Offset value of 0x00030000
400 14:27:41.643207 Attempting to start 7 APs
401 14:27:41.646531 Waiting for 10ms after sending INIT.
402 14:27:41.661926 Waiting for 1st SIPI to complete...done.
403 14:27:41.662071 AP: slot 1 apic_id 1.
404 14:27:41.668936 Waiting for 2nd SIPI to complete...done.
405 14:27:41.669052 AP: slot 2 apic_id 3.
406 14:27:41.672242 AP: slot 6 apic_id 2.
407 14:27:41.675519 AP: slot 4 apic_id 7.
408 14:27:41.675616 AP: slot 5 apic_id 6.
409 14:27:41.678799 AP: slot 3 apic_id 5.
410 14:27:41.682099 AP: slot 7 apic_id 4.
411 14:27:41.688549 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 14:27:41.695380 Processing 13 relocs. Offset value of 0x00038000
413 14:27:41.695496 Unable to locate Global NVS
414 14:27:41.705071 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 14:27:41.708891 Installing permanent SMM handler to 0x7b000000
416 14:27:41.718617 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 14:27:41.721838 Processing 794 relocs. Offset value of 0x7b010000
418 14:27:41.728633 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 14:27:41.735173 Processing 13 relocs. Offset value of 0x7b008000
420 14:27:41.742088 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 14:27:41.748394 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 14:27:41.751797 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 14:27:41.758393 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 14:27:41.765076 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 14:27:41.771710 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 14:27:41.778237 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 14:27:41.778378 Unable to locate Global NVS
428 14:27:41.788209 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 14:27:41.791860 Clearing SMI status registers
430 14:27:41.791957 SMI_STS: PM1
431 14:27:41.795022 PM1_STS: PWRBTN
432 14:27:41.801954 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 14:27:41.805202 In relocation handler: CPU 0
434 14:27:41.808398 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 14:27:41.814879 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 14:27:41.814976 Relocation complete.
437 14:27:41.821855 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 14:27:41.824969 In relocation handler: CPU 1
439 14:27:41.831950 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 14:27:41.832081 Relocation complete.
441 14:27:41.838597 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
442 14:27:41.841619 In relocation handler: CPU 7
443 14:27:41.848131 New SMBASE=0x7affe400 IEDBASE=0x7b400000
444 14:27:41.851476 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 14:27:41.854681 Relocation complete.
446 14:27:41.861630 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
447 14:27:41.864912 In relocation handler: CPU 3
448 14:27:41.868089 New SMBASE=0x7afff400 IEDBASE=0x7b400000
449 14:27:41.871748 Relocation complete.
450 14:27:41.878124 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
451 14:27:41.881482 In relocation handler: CPU 2
452 14:27:41.884633 New SMBASE=0x7afff800 IEDBASE=0x7b400000
453 14:27:41.887842 Relocation complete.
454 14:27:41.894896 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
455 14:27:41.898055 In relocation handler: CPU 6
456 14:27:41.901995 New SMBASE=0x7affe800 IEDBASE=0x7b400000
457 14:27:41.906046 Writing SMRR. base = 0x7b000006, mask=0xff800c00
458 14:27:41.909422 Relocation complete.
459 14:27:41.916024 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
460 14:27:41.919282 In relocation handler: CPU 5
461 14:27:41.922920 New SMBASE=0x7affec00 IEDBASE=0x7b400000
462 14:27:41.926117 Writing SMRR. base = 0x7b000006, mask=0xff800c00
463 14:27:41.929399 Relocation complete.
464 14:27:41.936277 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
465 14:27:41.939386 In relocation handler: CPU 4
466 14:27:41.942578 New SMBASE=0x7afff000 IEDBASE=0x7b400000
467 14:27:41.946325 Relocation complete.
468 14:27:41.949413 Initializing CPU #0
469 14:27:41.952925 CPU: vendor Intel device 806c1
470 14:27:41.956256 CPU: family 06, model 8c, stepping 01
471 14:27:41.959396 Clearing out pending MCEs
472 14:27:41.959517 Setting up local APIC...
473 14:27:41.962910 apic_id: 0x00 done.
474 14:27:41.966223 Turbo is available but hidden
475 14:27:41.969599 Turbo is available and visible
476 14:27:41.973017 microcode: Update skipped, already up-to-date
477 14:27:41.976021 CPU #0 initialized
478 14:27:41.976127 Initializing CPU #5
479 14:27:41.979342 Initializing CPU #4
480 14:27:41.982981 CPU: vendor Intel device 806c1
481 14:27:41.986214 CPU: family 06, model 8c, stepping 01
482 14:27:41.989404 CPU: vendor Intel device 806c1
483 14:27:41.992680 CPU: family 06, model 8c, stepping 01
484 14:27:41.995976 Clearing out pending MCEs
485 14:27:41.999534 Clearing out pending MCEs
486 14:27:42.002716 Setting up local APIC...
487 14:27:42.002848 Initializing CPU #6
488 14:27:42.006162 Initializing CPU #2
489 14:27:42.009150 CPU: vendor Intel device 806c1
490 14:27:42.013020 CPU: family 06, model 8c, stepping 01
491 14:27:42.016095 CPU: vendor Intel device 806c1
492 14:27:42.019466 CPU: family 06, model 8c, stepping 01
493 14:27:42.022617 Clearing out pending MCEs
494 14:27:42.025904 Clearing out pending MCEs
495 14:27:42.026104 Setting up local APIC...
496 14:27:42.029205 Initializing CPU #3
497 14:27:42.033008 apic_id: 0x02 done.
498 14:27:42.033215 Setting up local APIC...
499 14:27:42.036207 Initializing CPU #1
500 14:27:42.039342 microcode: Update skipped, already up-to-date
501 14:27:42.042590 apic_id: 0x03 done.
502 14:27:42.045897 apic_id: 0x06 done.
503 14:27:42.046023 Setting up local APIC...
504 14:27:42.049197 Initializing CPU #7
505 14:27:42.052943 CPU: vendor Intel device 806c1
506 14:27:42.056487 CPU: family 06, model 8c, stepping 01
507 14:27:42.059685 microcode: Update skipped, already up-to-date
508 14:27:42.062900 Clearing out pending MCEs
509 14:27:42.066350 CPU: vendor Intel device 806c1
510 14:27:42.069399 CPU: family 06, model 8c, stepping 01
511 14:27:42.072785 CPU: vendor Intel device 806c1
512 14:27:42.076180 CPU: family 06, model 8c, stepping 01
513 14:27:42.079483 Clearing out pending MCEs
514 14:27:42.082840 Clearing out pending MCEs
515 14:27:42.085859 CPU #5 initialized
516 14:27:42.086023 apic_id: 0x07 done.
517 14:27:42.089716 Setting up local APIC...
518 14:27:42.092760 CPU #6 initialized
519 14:27:42.096160 microcode: Update skipped, already up-to-date
520 14:27:42.099511 Setting up local APIC...
521 14:27:42.099603 CPU #2 initialized
522 14:27:42.102633 apic_id: 0x05 done.
523 14:27:42.105985 Setting up local APIC...
524 14:27:42.106076 apic_id: 0x01 done.
525 14:27:42.112561 microcode: Update skipped, already up-to-date
526 14:27:42.112658 apic_id: 0x04 done.
527 14:27:42.115849 CPU #3 initialized
528 14:27:42.119704 microcode: Update skipped, already up-to-date
529 14:27:42.126083 microcode: Update skipped, already up-to-date
530 14:27:42.129383 microcode: Update skipped, already up-to-date
531 14:27:42.132667 CPU #4 initialized
532 14:27:42.132833 CPU #7 initialized
533 14:27:42.136439 CPU #1 initialized
534 14:27:42.139560 bsp_do_flight_plan done after 468 msecs.
535 14:27:42.142866 CPU: frequency set to 4000 MHz
536 14:27:42.142987 Enabling SMIs.
537 14:27:42.149467 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 14:27:42.166683 SATAXPCIE1 indicates PCIe NVMe is present
539 14:27:42.170174 Probing TPM: done!
540 14:27:42.173721 Connected to device vid:did:rid of 1ae0:0028:00
541 14:27:42.184285 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
542 14:27:42.187229 Initialized TPM device CR50 revision 0
543 14:27:42.190903 Enabling S0i3.4
544 14:27:42.197449 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 14:27:42.201003 Found a VBT of 8704 bytes after decompression
546 14:27:42.207445 cse_lite: CSE RO boot. HybridStorageMode disabled
547 14:27:42.213946 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 14:27:42.289968 FSPS returned 0
549 14:27:42.292955 Executing Phase 1 of FspMultiPhaseSiInit
550 14:27:42.303228 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 14:27:42.306362 port C0 DISC req: usage 1 usb3 1 usb2 5
552 14:27:42.309982 Raw Buffer output 0 00000511
553 14:27:42.313212 Raw Buffer output 1 00000000
554 14:27:42.317060 pmc_send_ipc_cmd succeeded
555 14:27:42.323765 port C1 DISC req: usage 1 usb3 2 usb2 3
556 14:27:42.323917 Raw Buffer output 0 00000321
557 14:27:42.327035 Raw Buffer output 1 00000000
558 14:27:42.330726 pmc_send_ipc_cmd succeeded
559 14:27:42.336405 Detected 4 core, 8 thread CPU.
560 14:27:42.339702 Detected 4 core, 8 thread CPU.
561 14:27:42.573751 Display FSP Version Info HOB
562 14:27:42.576869 Reference Code - CPU = a.0.4c.31
563 14:27:42.580311 uCode Version = 0.0.0.86
564 14:27:42.583844 TXT ACM version = ff.ff.ff.ffff
565 14:27:42.586974 Reference Code - ME = a.0.4c.31
566 14:27:42.590249 MEBx version = 0.0.0.0
567 14:27:42.593530 ME Firmware Version = Consumer SKU
568 14:27:42.597055 Reference Code - PCH = a.0.4c.31
569 14:27:42.600442 PCH-CRID Status = Disabled
570 14:27:42.603584 PCH-CRID Original Value = ff.ff.ff.ffff
571 14:27:42.607124 PCH-CRID New Value = ff.ff.ff.ffff
572 14:27:42.610089 OPROM - RST - RAID = ff.ff.ff.ffff
573 14:27:42.613850 PCH Hsio Version = 4.0.0.0
574 14:27:42.617089 Reference Code - SA - System Agent = a.0.4c.31
575 14:27:42.620412 Reference Code - MRC = 2.0.0.1
576 14:27:42.623820 SA - PCIe Version = a.0.4c.31
577 14:27:42.627068 SA-CRID Status = Disabled
578 14:27:42.630377 SA-CRID Original Value = 0.0.0.1
579 14:27:42.633814 SA-CRID New Value = 0.0.0.1
580 14:27:42.637199 OPROM - VBIOS = ff.ff.ff.ffff
581 14:27:42.640311 IO Manageability Engine FW Version = 11.1.4.0
582 14:27:42.643635 PHY Build Version = 0.0.0.e0
583 14:27:42.646955 Thunderbolt(TM) FW Version = 0.0.0.0
584 14:27:42.653499 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 14:27:42.656789 ITSS IRQ Polarities Before:
586 14:27:42.656914 IPC0: 0xffffffff
587 14:27:42.660047 IPC1: 0xffffffff
588 14:27:42.660156 IPC2: 0xffffffff
589 14:27:42.663368 IPC3: 0xffffffff
590 14:27:42.666761 ITSS IRQ Polarities After:
591 14:27:42.666873 IPC0: 0xffffffff
592 14:27:42.669947 IPC1: 0xffffffff
593 14:27:42.670042 IPC2: 0xffffffff
594 14:27:42.673307 IPC3: 0xffffffff
595 14:27:42.677042 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 14:27:42.690080 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 14:27:42.699882 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 14:27:42.713391 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 14:27:42.719747 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
600 14:27:42.719835 Enumerating buses...
601 14:27:42.726568 Show all devs... Before device enumeration.
602 14:27:42.726683 Root Device: enabled 1
603 14:27:42.729920 DOMAIN: 0000: enabled 1
604 14:27:42.733113 CPU_CLUSTER: 0: enabled 1
605 14:27:42.736370 PCI: 00:00.0: enabled 1
606 14:27:42.736456 PCI: 00:02.0: enabled 1
607 14:27:42.739719 PCI: 00:04.0: enabled 1
608 14:27:42.743037 PCI: 00:05.0: enabled 1
609 14:27:42.746279 PCI: 00:06.0: enabled 0
610 14:27:42.746365 PCI: 00:07.0: enabled 0
611 14:27:42.749728 PCI: 00:07.1: enabled 0
612 14:27:42.752895 PCI: 00:07.2: enabled 0
613 14:27:42.756265 PCI: 00:07.3: enabled 0
614 14:27:42.756368 PCI: 00:08.0: enabled 1
615 14:27:42.759464 PCI: 00:09.0: enabled 0
616 14:27:42.763109 PCI: 00:0a.0: enabled 0
617 14:27:42.766414 PCI: 00:0d.0: enabled 1
618 14:27:42.766499 PCI: 00:0d.1: enabled 0
619 14:27:42.769819 PCI: 00:0d.2: enabled 0
620 14:27:42.772997 PCI: 00:0d.3: enabled 0
621 14:27:42.776367 PCI: 00:0e.0: enabled 0
622 14:27:42.776452 PCI: 00:10.2: enabled 1
623 14:27:42.779582 PCI: 00:10.6: enabled 0
624 14:27:42.782901 PCI: 00:10.7: enabled 0
625 14:27:42.786128 PCI: 00:12.0: enabled 0
626 14:27:42.786241 PCI: 00:12.6: enabled 0
627 14:27:42.789571 PCI: 00:13.0: enabled 0
628 14:27:42.792771 PCI: 00:14.0: enabled 1
629 14:27:42.792870 PCI: 00:14.1: enabled 0
630 14:27:42.795999 PCI: 00:14.2: enabled 1
631 14:27:42.799137 PCI: 00:14.3: enabled 1
632 14:27:42.802459 PCI: 00:15.0: enabled 1
633 14:27:42.802545 PCI: 00:15.1: enabled 1
634 14:27:42.806214 PCI: 00:15.2: enabled 1
635 14:27:42.809525 PCI: 00:15.3: enabled 1
636 14:27:42.812605 PCI: 00:16.0: enabled 1
637 14:27:42.812707 PCI: 00:16.1: enabled 0
638 14:27:42.815769 PCI: 00:16.2: enabled 0
639 14:27:42.819380 PCI: 00:16.3: enabled 0
640 14:27:42.822490 PCI: 00:16.4: enabled 0
641 14:27:42.822575 PCI: 00:16.5: enabled 0
642 14:27:42.826014 PCI: 00:17.0: enabled 1
643 14:27:42.829212 PCI: 00:19.0: enabled 0
644 14:27:42.832604 PCI: 00:19.1: enabled 1
645 14:27:42.832716 PCI: 00:19.2: enabled 0
646 14:27:42.835797 PCI: 00:1c.0: enabled 1
647 14:27:42.839355 PCI: 00:1c.1: enabled 0
648 14:27:42.839443 PCI: 00:1c.2: enabled 0
649 14:27:42.842508 PCI: 00:1c.3: enabled 0
650 14:27:42.845680 PCI: 00:1c.4: enabled 0
651 14:27:42.849036 PCI: 00:1c.5: enabled 0
652 14:27:42.849123 PCI: 00:1c.6: enabled 1
653 14:27:42.852297 PCI: 00:1c.7: enabled 0
654 14:27:42.855840 PCI: 00:1d.0: enabled 1
655 14:27:42.859213 PCI: 00:1d.1: enabled 0
656 14:27:42.859308 PCI: 00:1d.2: enabled 1
657 14:27:42.862400 PCI: 00:1d.3: enabled 0
658 14:27:42.865786 PCI: 00:1e.0: enabled 1
659 14:27:42.868882 PCI: 00:1e.1: enabled 0
660 14:27:42.868968 PCI: 00:1e.2: enabled 1
661 14:27:42.872095 PCI: 00:1e.3: enabled 1
662 14:27:42.875446 PCI: 00:1f.0: enabled 1
663 14:27:42.875578 PCI: 00:1f.1: enabled 0
664 14:27:42.878773 PCI: 00:1f.2: enabled 1
665 14:27:42.882114 PCI: 00:1f.3: enabled 1
666 14:27:42.885437 PCI: 00:1f.4: enabled 0
667 14:27:42.885530 PCI: 00:1f.5: enabled 1
668 14:27:42.888713 PCI: 00:1f.6: enabled 0
669 14:27:42.892331 PCI: 00:1f.7: enabled 0
670 14:27:42.895754 APIC: 00: enabled 1
671 14:27:42.895856 GENERIC: 0.0: enabled 1
672 14:27:42.899194 GENERIC: 0.0: enabled 1
673 14:27:42.902590 GENERIC: 1.0: enabled 1
674 14:27:42.902680 GENERIC: 0.0: enabled 1
675 14:27:42.905905 GENERIC: 1.0: enabled 1
676 14:27:42.908739 USB0 port 0: enabled 1
677 14:27:42.912617 GENERIC: 0.0: enabled 1
678 14:27:42.912740 USB0 port 0: enabled 1
679 14:27:42.916138 GENERIC: 0.0: enabled 1
680 14:27:42.919178 I2C: 00:1a: enabled 1
681 14:27:42.919257 I2C: 00:31: enabled 1
682 14:27:42.922418 I2C: 00:32: enabled 1
683 14:27:42.925708 I2C: 00:10: enabled 1
684 14:27:42.925792 I2C: 00:15: enabled 1
685 14:27:42.929057 GENERIC: 0.0: enabled 0
686 14:27:42.932558 GENERIC: 1.0: enabled 0
687 14:27:42.935746 GENERIC: 0.0: enabled 1
688 14:27:42.935848 SPI: 00: enabled 1
689 14:27:42.939309 SPI: 00: enabled 1
690 14:27:42.939430 PNP: 0c09.0: enabled 1
691 14:27:42.942482 GENERIC: 0.0: enabled 1
692 14:27:42.946067 USB3 port 0: enabled 1
693 14:27:42.949090 USB3 port 1: enabled 1
694 14:27:42.949178 USB3 port 2: enabled 0
695 14:27:42.952370 USB3 port 3: enabled 0
696 14:27:42.955876 USB2 port 0: enabled 0
697 14:27:42.955961 USB2 port 1: enabled 1
698 14:27:42.959298 USB2 port 2: enabled 1
699 14:27:42.962637 USB2 port 3: enabled 0
700 14:27:42.962727 USB2 port 4: enabled 1
701 14:27:42.966124 USB2 port 5: enabled 0
702 14:27:42.968964 USB2 port 6: enabled 0
703 14:27:42.972428 USB2 port 7: enabled 0
704 14:27:42.972525 USB2 port 8: enabled 0
705 14:27:42.975803 USB2 port 9: enabled 0
706 14:27:42.979486 USB3 port 0: enabled 0
707 14:27:42.979673 USB3 port 1: enabled 1
708 14:27:42.982567 USB3 port 2: enabled 0
709 14:27:42.986238 USB3 port 3: enabled 0
710 14:27:42.989137 GENERIC: 0.0: enabled 1
711 14:27:42.989276 GENERIC: 1.0: enabled 1
712 14:27:42.992806 APIC: 01: enabled 1
713 14:27:42.995990 APIC: 03: enabled 1
714 14:27:42.996145 APIC: 05: enabled 1
715 14:27:42.999221 APIC: 07: enabled 1
716 14:27:42.999398 APIC: 06: enabled 1
717 14:27:43.002677 APIC: 02: enabled 1
718 14:27:43.005953 APIC: 04: enabled 1
719 14:27:43.006161 Compare with tree...
720 14:27:43.009392 Root Device: enabled 1
721 14:27:43.012977 DOMAIN: 0000: enabled 1
722 14:27:43.013285 PCI: 00:00.0: enabled 1
723 14:27:43.016268 PCI: 00:02.0: enabled 1
724 14:27:43.019934 PCI: 00:04.0: enabled 1
725 14:27:43.023199 GENERIC: 0.0: enabled 1
726 14:27:43.026282 PCI: 00:05.0: enabled 1
727 14:27:43.026708 PCI: 00:06.0: enabled 0
728 14:27:43.029618 PCI: 00:07.0: enabled 0
729 14:27:43.032861 GENERIC: 0.0: enabled 1
730 14:27:43.036339 PCI: 00:07.1: enabled 0
731 14:27:43.039378 GENERIC: 1.0: enabled 1
732 14:27:43.039872 PCI: 00:07.2: enabled 0
733 14:27:43.042850 GENERIC: 0.0: enabled 1
734 14:27:43.046347 PCI: 00:07.3: enabled 0
735 14:27:43.049891 GENERIC: 1.0: enabled 1
736 14:27:43.052761 PCI: 00:08.0: enabled 1
737 14:27:43.053161 PCI: 00:09.0: enabled 0
738 14:27:43.056502 PCI: 00:0a.0: enabled 0
739 14:27:43.059309 PCI: 00:0d.0: enabled 1
740 14:27:43.062831 USB0 port 0: enabled 1
741 14:27:43.066095 USB3 port 0: enabled 1
742 14:27:43.066460 USB3 port 1: enabled 1
743 14:27:43.069847 USB3 port 2: enabled 0
744 14:27:43.072740 USB3 port 3: enabled 0
745 14:27:43.076087 PCI: 00:0d.1: enabled 0
746 14:27:43.079500 PCI: 00:0d.2: enabled 0
747 14:27:43.082990 GENERIC: 0.0: enabled 1
748 14:27:43.083352 PCI: 00:0d.3: enabled 0
749 14:27:43.086389 PCI: 00:0e.0: enabled 0
750 14:27:43.089802 PCI: 00:10.2: enabled 1
751 14:27:43.092852 PCI: 00:10.6: enabled 0
752 14:27:43.096037 PCI: 00:10.7: enabled 0
753 14:27:43.096410 PCI: 00:12.0: enabled 0
754 14:27:43.099791 PCI: 00:12.6: enabled 0
755 14:27:43.103107 PCI: 00:13.0: enabled 0
756 14:27:43.106373 PCI: 00:14.0: enabled 1
757 14:27:43.106787 USB0 port 0: enabled 1
758 14:27:43.109628 USB2 port 0: enabled 0
759 14:27:43.112930 USB2 port 1: enabled 1
760 14:27:43.116210 USB2 port 2: enabled 1
761 14:27:43.119431 USB2 port 3: enabled 0
762 14:27:43.122814 USB2 port 4: enabled 1
763 14:27:43.123232 USB2 port 5: enabled 0
764 14:27:43.126142 USB2 port 6: enabled 0
765 14:27:43.129422 USB2 port 7: enabled 0
766 14:27:43.133203 USB2 port 8: enabled 0
767 14:27:43.135966 USB2 port 9: enabled 0
768 14:27:43.136490 USB3 port 0: enabled 0
769 14:27:43.139466 USB3 port 1: enabled 1
770 14:27:43.143386 USB3 port 2: enabled 0
771 14:27:43.147018 USB3 port 3: enabled 0
772 14:27:43.147594 PCI: 00:14.1: enabled 0
773 14:27:43.150457 PCI: 00:14.2: enabled 1
774 14:27:43.153931 PCI: 00:14.3: enabled 1
775 14:27:43.157557 GENERIC: 0.0: enabled 1
776 14:27:43.160680 PCI: 00:15.0: enabled 1
777 14:27:43.160901 I2C: 00:1a: enabled 1
778 14:27:43.164187 I2C: 00:31: enabled 1
779 14:27:43.167465 I2C: 00:32: enabled 1
780 14:27:43.170548 PCI: 00:15.1: enabled 1
781 14:27:43.170680 I2C: 00:10: enabled 1
782 14:27:43.173976 PCI: 00:15.2: enabled 1
783 14:27:43.177310 PCI: 00:15.3: enabled 1
784 14:27:43.180521 PCI: 00:16.0: enabled 1
785 14:27:43.180708 PCI: 00:16.1: enabled 0
786 14:27:43.230546 PCI: 00:16.2: enabled 0
787 14:27:43.230690 PCI: 00:16.3: enabled 0
788 14:27:43.230949 PCI: 00:16.4: enabled 0
789 14:27:43.231021 PCI: 00:16.5: enabled 0
790 14:27:43.231086 PCI: 00:17.0: enabled 1
791 14:27:43.231147 PCI: 00:19.0: enabled 0
792 14:27:43.231206 PCI: 00:19.1: enabled 1
793 14:27:43.231264 I2C: 00:15: enabled 1
794 14:27:43.231321 PCI: 00:19.2: enabled 0
795 14:27:43.231389 PCI: 00:1d.0: enabled 1
796 14:27:43.231449 GENERIC: 0.0: enabled 1
797 14:27:43.231517 PCI: 00:1e.0: enabled 1
798 14:27:43.231579 PCI: 00:1e.1: enabled 0
799 14:27:43.231636 PCI: 00:1e.2: enabled 1
800 14:27:43.231707 SPI: 00: enabled 1
801 14:27:43.231767 PCI: 00:1e.3: enabled 1
802 14:27:43.231824 SPI: 00: enabled 1
803 14:27:43.231880 PCI: 00:1f.0: enabled 1
804 14:27:43.231936 PNP: 0c09.0: enabled 1
805 14:27:43.282724 PCI: 00:1f.1: enabled 0
806 14:27:43.282892 PCI: 00:1f.2: enabled 1
807 14:27:43.283162 GENERIC: 0.0: enabled 1
808 14:27:43.283244 GENERIC: 0.0: enabled 1
809 14:27:43.283320 GENERIC: 1.0: enabled 1
810 14:27:43.283393 PCI: 00:1f.3: enabled 1
811 14:27:43.283464 PCI: 00:1f.4: enabled 0
812 14:27:43.283535 PCI: 00:1f.5: enabled 1
813 14:27:43.283603 PCI: 00:1f.6: enabled 0
814 14:27:43.283672 PCI: 00:1f.7: enabled 0
815 14:27:43.283739 CPU_CLUSTER: 0: enabled 1
816 14:27:43.283806 APIC: 00: enabled 1
817 14:27:43.283872 APIC: 01: enabled 1
818 14:27:43.283938 APIC: 03: enabled 1
819 14:27:43.284004 APIC: 05: enabled 1
820 14:27:43.284070 APIC: 07: enabled 1
821 14:27:43.284135 APIC: 06: enabled 1
822 14:27:43.284215 APIC: 02: enabled 1
823 14:27:43.284284 APIC: 04: enabled 1
824 14:27:43.284351 Root Device scanning...
825 14:27:43.307521 scan_static_bus for Root Device
826 14:27:43.307629 DOMAIN: 0000 enabled
827 14:27:43.307899 CPU_CLUSTER: 0 enabled
828 14:27:43.307980 DOMAIN: 0000 scanning...
829 14:27:43.308055 PCI: pci_scan_bus for bus 00
830 14:27:43.308126 PCI: 00:00.0 [8086/0000] ops
831 14:27:43.308195 PCI: 00:00.0 [8086/9a12] enabled
832 14:27:43.308264 PCI: 00:02.0 [8086/0000] bus ops
833 14:27:43.311174 PCI: 00:02.0 [8086/9a40] enabled
834 14:27:43.314442 PCI: 00:04.0 [8086/0000] bus ops
835 14:27:43.318012 PCI: 00:04.0 [8086/9a03] enabled
836 14:27:43.321252 PCI: 00:05.0 [8086/9a19] enabled
837 14:27:43.324499 PCI: 00:07.0 [0000/0000] hidden
838 14:27:43.327893 PCI: 00:08.0 [8086/9a11] enabled
839 14:27:43.331278 PCI: 00:0a.0 [8086/9a0d] disabled
840 14:27:43.334597 PCI: 00:0d.0 [8086/0000] bus ops
841 14:27:43.337931 PCI: 00:0d.0 [8086/9a13] enabled
842 14:27:43.341145 PCI: 00:14.0 [8086/0000] bus ops
843 14:27:43.344325 PCI: 00:14.0 [8086/a0ed] enabled
844 14:27:43.348123 PCI: 00:14.2 [8086/a0ef] enabled
845 14:27:43.351365 PCI: 00:14.3 [8086/0000] bus ops
846 14:27:43.354866 PCI: 00:14.3 [8086/a0f0] enabled
847 14:27:43.358162 PCI: 00:15.0 [8086/0000] bus ops
848 14:27:43.361351 PCI: 00:15.0 [8086/a0e8] enabled
849 14:27:43.364531 PCI: 00:15.1 [8086/0000] bus ops
850 14:27:43.367934 PCI: 00:15.1 [8086/a0e9] enabled
851 14:27:43.371184 PCI: 00:15.2 [8086/0000] bus ops
852 14:27:43.374428 PCI: 00:15.2 [8086/a0ea] enabled
853 14:27:43.378047 PCI: 00:15.3 [8086/0000] bus ops
854 14:27:43.381556 PCI: 00:15.3 [8086/a0eb] enabled
855 14:27:43.381734 PCI: 00:16.0 [8086/0000] ops
856 14:27:43.384332 PCI: 00:16.0 [8086/a0e0] enabled
857 14:27:43.391211 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 14:27:43.394511 PCI: 00:19.0 [8086/0000] bus ops
859 14:27:43.397774 PCI: 00:19.0 [8086/a0c5] disabled
860 14:27:43.401042 PCI: 00:19.1 [8086/0000] bus ops
861 14:27:43.404298 PCI: 00:19.1 [8086/a0c6] enabled
862 14:27:43.407736 PCI: 00:1d.0 [8086/0000] bus ops
863 14:27:43.410987 PCI: 00:1d.0 [8086/a0b0] enabled
864 14:27:43.414311 PCI: 00:1e.0 [8086/0000] ops
865 14:27:43.418023 PCI: 00:1e.0 [8086/a0a8] enabled
866 14:27:43.421296 PCI: 00:1e.2 [8086/0000] bus ops
867 14:27:43.424535 PCI: 00:1e.2 [8086/a0aa] enabled
868 14:27:43.427825 PCI: 00:1e.3 [8086/0000] bus ops
869 14:27:43.431009 PCI: 00:1e.3 [8086/a0ab] enabled
870 14:27:43.434419 PCI: 00:1f.0 [8086/0000] bus ops
871 14:27:43.437689 PCI: 00:1f.0 [8086/a087] enabled
872 14:27:43.437797 RTC Init
873 14:27:43.444351 Set power on after power failure.
874 14:27:43.444449 Disabling Deep S3
875 14:27:43.447673 Disabling Deep S3
876 14:27:43.447774 Disabling Deep S4
877 14:27:43.450856 Disabling Deep S4
878 14:27:43.450953 Disabling Deep S5
879 14:27:43.454250 Disabling Deep S5
880 14:27:43.457829 PCI: 00:1f.2 [0000/0000] hidden
881 14:27:43.460738 PCI: 00:1f.3 [8086/0000] bus ops
882 14:27:43.464457 PCI: 00:1f.3 [8086/a0c8] enabled
883 14:27:43.467639 PCI: 00:1f.5 [8086/0000] bus ops
884 14:27:43.471005 PCI: 00:1f.5 [8086/a0a4] enabled
885 14:27:43.474279 PCI: Leftover static devices:
886 14:27:43.474370 PCI: 00:10.2
887 14:27:43.477645 PCI: 00:10.6
888 14:27:43.477730 PCI: 00:10.7
889 14:27:43.477802 PCI: 00:06.0
890 14:27:43.481024 PCI: 00:07.1
891 14:27:43.481117 PCI: 00:07.2
892 14:27:43.484539 PCI: 00:07.3
893 14:27:43.484652 PCI: 00:09.0
894 14:27:43.487555 PCI: 00:0d.1
895 14:27:43.487652 PCI: 00:0d.2
896 14:27:43.487735 PCI: 00:0d.3
897 14:27:43.490970 PCI: 00:0e.0
898 14:27:43.491066 PCI: 00:12.0
899 14:27:43.494503 PCI: 00:12.6
900 14:27:43.494599 PCI: 00:13.0
901 14:27:43.494674 PCI: 00:14.1
902 14:27:43.497569 PCI: 00:16.1
903 14:27:43.497684 PCI: 00:16.2
904 14:27:43.500815 PCI: 00:16.3
905 14:27:43.500912 PCI: 00:16.4
906 14:27:43.500988 PCI: 00:16.5
907 14:27:43.504179 PCI: 00:17.0
908 14:27:43.504275 PCI: 00:19.2
909 14:27:43.507515 PCI: 00:1e.1
910 14:27:43.507610 PCI: 00:1f.1
911 14:27:43.510999 PCI: 00:1f.4
912 14:27:43.511095 PCI: 00:1f.6
913 14:27:43.511178 PCI: 00:1f.7
914 14:27:43.514335 PCI: Check your devicetree.cb.
915 14:27:43.517581 PCI: 00:02.0 scanning...
916 14:27:43.520788 scan_generic_bus for PCI: 00:02.0
917 14:27:43.524107 scan_generic_bus for PCI: 00:02.0 done
918 14:27:43.530769 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 14:27:43.534067 PCI: 00:04.0 scanning...
920 14:27:43.537318 scan_generic_bus for PCI: 00:04.0
921 14:27:43.537524 GENERIC: 0.0 enabled
922 14:27:43.543992 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 14:27:43.550980 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 14:27:43.551121 PCI: 00:0d.0 scanning...
925 14:27:43.554127 scan_static_bus for PCI: 00:0d.0
926 14:27:43.557359 USB0 port 0 enabled
927 14:27:43.560739 USB0 port 0 scanning...
928 14:27:43.564131 scan_static_bus for USB0 port 0
929 14:27:43.564312 USB3 port 0 enabled
930 14:27:43.567507 USB3 port 1 enabled
931 14:27:43.570741 USB3 port 2 disabled
932 14:27:43.570854 USB3 port 3 disabled
933 14:27:43.573999 USB3 port 0 scanning...
934 14:27:43.577457 scan_static_bus for USB3 port 0
935 14:27:43.580717 scan_static_bus for USB3 port 0 done
936 14:27:43.587340 scan_bus: bus USB3 port 0 finished in 6 msecs
937 14:27:43.587513 USB3 port 1 scanning...
938 14:27:43.591015 scan_static_bus for USB3 port 1
939 14:27:43.594015 scan_static_bus for USB3 port 1 done
940 14:27:43.600602 scan_bus: bus USB3 port 1 finished in 6 msecs
941 14:27:43.604073 scan_static_bus for USB0 port 0 done
942 14:27:43.607746 scan_bus: bus USB0 port 0 finished in 43 msecs
943 14:27:43.610962 scan_static_bus for PCI: 00:0d.0 done
944 14:27:43.617688 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 14:27:43.620547 PCI: 00:14.0 scanning...
946 14:27:43.624483 scan_static_bus for PCI: 00:14.0
947 14:27:43.624571 USB0 port 0 enabled
948 14:27:43.627330 USB0 port 0 scanning...
949 14:27:43.631049 scan_static_bus for USB0 port 0
950 14:27:43.634419 USB2 port 0 disabled
951 14:27:43.634530 USB2 port 1 enabled
952 14:27:43.637372 USB2 port 2 enabled
953 14:27:43.640629 USB2 port 3 disabled
954 14:27:43.640743 USB2 port 4 enabled
955 14:27:43.643970 USB2 port 5 disabled
956 14:27:43.647780 USB2 port 6 disabled
957 14:27:43.647866 USB2 port 7 disabled
958 14:27:43.650658 USB2 port 8 disabled
959 14:27:43.650745 USB2 port 9 disabled
960 14:27:43.654340 USB3 port 0 disabled
961 14:27:43.657595 USB3 port 1 enabled
962 14:27:43.657683 USB3 port 2 disabled
963 14:27:43.660674 USB3 port 3 disabled
964 14:27:43.664345 USB2 port 1 scanning...
965 14:27:43.667621 scan_static_bus for USB2 port 1
966 14:27:43.670990 scan_static_bus for USB2 port 1 done
967 14:27:43.674695 scan_bus: bus USB2 port 1 finished in 6 msecs
968 14:27:43.677854 USB2 port 2 scanning...
969 14:27:43.681076 scan_static_bus for USB2 port 2
970 14:27:43.684349 scan_static_bus for USB2 port 2 done
971 14:27:43.691131 scan_bus: bus USB2 port 2 finished in 6 msecs
972 14:27:43.691364 USB2 port 4 scanning...
973 14:27:43.694278 scan_static_bus for USB2 port 4
974 14:27:43.697474 scan_static_bus for USB2 port 4 done
975 14:27:43.704143 scan_bus: bus USB2 port 4 finished in 6 msecs
976 14:27:43.707594 USB3 port 1 scanning...
977 14:27:43.710613 scan_static_bus for USB3 port 1
978 14:27:43.714362 scan_static_bus for USB3 port 1 done
979 14:27:43.717610 scan_bus: bus USB3 port 1 finished in 6 msecs
980 14:27:43.721432 scan_static_bus for USB0 port 0 done
981 14:27:43.725277 scan_bus: bus USB0 port 0 finished in 93 msecs
982 14:27:43.728404 scan_static_bus for PCI: 00:14.0 done
983 14:27:43.734946 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
984 14:27:43.738765 PCI: 00:14.3 scanning...
985 14:27:43.741961 scan_static_bus for PCI: 00:14.3
986 14:27:43.742050 GENERIC: 0.0 enabled
987 14:27:43.748611 scan_static_bus for PCI: 00:14.3 done
988 14:27:43.751893 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 14:27:43.755062 PCI: 00:15.0 scanning...
990 14:27:43.758417 scan_static_bus for PCI: 00:15.0
991 14:27:43.758528 I2C: 00:1a enabled
992 14:27:43.761686 I2C: 00:31 enabled
993 14:27:43.764891 I2C: 00:32 enabled
994 14:27:43.768655 scan_static_bus for PCI: 00:15.0 done
995 14:27:43.771962 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 14:27:43.774892 PCI: 00:15.1 scanning...
997 14:27:43.778173 scan_static_bus for PCI: 00:15.1
998 14:27:43.781691 I2C: 00:10 enabled
999 14:27:43.785083 scan_static_bus for PCI: 00:15.1 done
1000 14:27:43.788377 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 14:27:43.791705 PCI: 00:15.2 scanning...
1002 14:27:43.795092 scan_static_bus for PCI: 00:15.2
1003 14:27:43.798450 scan_static_bus for PCI: 00:15.2 done
1004 14:27:43.801786 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 14:27:43.805010 PCI: 00:15.3 scanning...
1006 14:27:43.808796 scan_static_bus for PCI: 00:15.3
1007 14:27:43.811814 scan_static_bus for PCI: 00:15.3 done
1008 14:27:43.818592 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 14:27:43.821686 PCI: 00:19.1 scanning...
1010 14:27:43.825312 scan_static_bus for PCI: 00:19.1
1011 14:27:43.825465 I2C: 00:15 enabled
1012 14:27:43.828149 scan_static_bus for PCI: 00:19.1 done
1013 14:27:43.834903 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 14:27:43.838179 PCI: 00:1d.0 scanning...
1015 14:27:43.841473 do_pci_scan_bridge for PCI: 00:1d.0
1016 14:27:43.844804 PCI: pci_scan_bus for bus 01
1017 14:27:43.848085 PCI: 01:00.0 [1c5c/174a] enabled
1018 14:27:43.848252 GENERIC: 0.0 enabled
1019 14:27:43.851358 Enabling Common Clock Configuration
1020 14:27:43.858389 L1 Sub-State supported from root port 29
1021 14:27:43.861787 L1 Sub-State Support = 0xf
1022 14:27:43.861901 CommonModeRestoreTime = 0x28
1023 14:27:43.868295 Power On Value = 0x16, Power On Scale = 0x0
1024 14:27:43.868417 ASPM: Enabled L1
1025 14:27:43.871607 PCIe: Max_Payload_Size adjusted to 128
1026 14:27:43.878318 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 14:27:43.881581 PCI: 00:1e.2 scanning...
1028 14:27:43.885101 scan_generic_bus for PCI: 00:1e.2
1029 14:27:43.885223 SPI: 00 enabled
1030 14:27:43.891799 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 14:27:43.895082 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 14:27:43.898415 PCI: 00:1e.3 scanning...
1033 14:27:43.901411 scan_generic_bus for PCI: 00:1e.3
1034 14:27:43.904698 SPI: 00 enabled
1035 14:27:43.911652 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 14:27:43.914851 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 14:27:43.918071 PCI: 00:1f.0 scanning...
1038 14:27:43.921554 scan_static_bus for PCI: 00:1f.0
1039 14:27:43.924662 PNP: 0c09.0 enabled
1040 14:27:43.924809 PNP: 0c09.0 scanning...
1041 14:27:43.928287 scan_static_bus for PNP: 0c09.0
1042 14:27:43.931667 scan_static_bus for PNP: 0c09.0 done
1043 14:27:43.938081 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 14:27:43.941483 scan_static_bus for PCI: 00:1f.0 done
1045 14:27:43.944679 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 14:27:43.947985 PCI: 00:1f.2 scanning...
1047 14:27:43.951831 scan_static_bus for PCI: 00:1f.2
1048 14:27:43.954779 GENERIC: 0.0 enabled
1049 14:27:43.958170 GENERIC: 0.0 scanning...
1050 14:27:43.961841 scan_static_bus for GENERIC: 0.0
1051 14:27:43.961948 GENERIC: 0.0 enabled
1052 14:27:43.964709 GENERIC: 1.0 enabled
1053 14:27:43.968115 scan_static_bus for GENERIC: 0.0 done
1054 14:27:43.975051 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 14:27:43.978290 scan_static_bus for PCI: 00:1f.2 done
1056 14:27:43.981677 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 14:27:43.984959 PCI: 00:1f.3 scanning...
1058 14:27:43.988025 scan_static_bus for PCI: 00:1f.3
1059 14:27:43.991254 scan_static_bus for PCI: 00:1f.3 done
1060 14:27:43.997942 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 14:27:43.998080 PCI: 00:1f.5 scanning...
1062 14:27:44.001316 scan_generic_bus for PCI: 00:1f.5
1063 14:27:44.007902 scan_generic_bus for PCI: 00:1f.5 done
1064 14:27:44.011312 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 14:27:44.014929 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1066 14:27:44.021360 scan_static_bus for Root Device done
1067 14:27:44.024658 scan_bus: bus Root Device finished in 736 msecs
1068 14:27:44.024762 done
1069 14:27:44.031762 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1070 14:27:44.034901 Chrome EC: UHEPI supported
1071 14:27:44.041548 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 14:27:44.048056 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 14:27:44.051322 SPI flash protection: WPSW=0 SRP0=0
1074 14:27:44.054679 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 14:27:44.061365 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 14:27:44.064656 found VGA at PCI: 00:02.0
1077 14:27:44.068061 Setting up VGA for PCI: 00:02.0
1078 14:27:44.071287 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 14:27:44.078003 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 14:27:44.081238 Allocating resources...
1081 14:27:44.081403 Reading resources...
1082 14:27:44.087985 Root Device read_resources bus 0 link: 0
1083 14:27:44.091623 DOMAIN: 0000 read_resources bus 0 link: 0
1084 14:27:44.094756 PCI: 00:04.0 read_resources bus 1 link: 0
1085 14:27:44.101921 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 14:27:44.104669 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 14:27:44.111889 USB0 port 0 read_resources bus 0 link: 0
1088 14:27:44.115206 USB0 port 0 read_resources bus 0 link: 0 done
1089 14:27:44.121791 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 14:27:44.125090 PCI: 00:14.0 read_resources bus 0 link: 0
1091 14:27:44.128406 USB0 port 0 read_resources bus 0 link: 0
1092 14:27:44.136144 USB0 port 0 read_resources bus 0 link: 0 done
1093 14:27:44.139233 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 14:27:44.146271 PCI: 00:14.3 read_resources bus 0 link: 0
1095 14:27:44.149705 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 14:27:44.156217 PCI: 00:15.0 read_resources bus 0 link: 0
1097 14:27:44.159581 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 14:27:44.166177 PCI: 00:15.1 read_resources bus 0 link: 0
1099 14:27:44.169539 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 14:27:44.176539 PCI: 00:19.1 read_resources bus 0 link: 0
1101 14:27:44.179859 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 14:27:44.186836 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 14:27:44.189890 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 14:27:44.196816 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 14:27:44.200035 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 14:27:44.206703 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 14:27:44.210099 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 14:27:44.216709 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 14:27:44.220115 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 14:27:44.223293 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 14:27:44.230007 GENERIC: 0.0 read_resources bus 0 link: 0
1112 14:27:44.233309 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 14:27:44.240202 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 14:27:44.246822 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 14:27:44.249828 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 14:27:44.253369 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 14:27:44.260348 Root Device read_resources bus 0 link: 0 done
1118 14:27:44.263735 Done reading resources.
1119 14:27:44.266977 Show resources in subtree (Root Device)...After reading.
1120 14:27:44.273852 Root Device child on link 0 DOMAIN: 0000
1121 14:27:44.277210 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 14:27:44.287251 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 14:27:44.297095 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 14:27:44.297190 PCI: 00:00.0
1125 14:27:44.306818 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 14:27:44.316746 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 14:27:44.326852 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 14:27:44.336521 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 14:27:44.343224 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 14:27:44.353055 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 14:27:44.363291 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 14:27:44.373267 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 14:27:44.383108 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 14:27:44.393261 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 14:27:44.399721 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 14:27:44.409502 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 14:27:44.419529 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 14:27:44.429589 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 14:27:44.435861 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 14:27:44.446376 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 14:27:44.455984 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 14:27:44.465916 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 14:27:44.476210 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 14:27:44.486272 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 14:27:44.486359 PCI: 00:02.0
1146 14:27:44.496059 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 14:27:44.509362 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 14:27:44.516083 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 14:27:44.522678 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 14:27:44.532550 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 14:27:44.532649 GENERIC: 0.0
1152 14:27:44.536200 PCI: 00:05.0
1153 14:27:44.546036 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 14:27:44.549314 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 14:27:44.549399 GENERIC: 0.0
1156 14:27:44.552654 PCI: 00:08.0
1157 14:27:44.562899 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 14:27:44.562991 PCI: 00:0a.0
1159 14:27:44.569236 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 14:27:44.579049 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 14:27:44.582649 USB0 port 0 child on link 0 USB3 port 0
1162 14:27:44.585974 USB3 port 0
1163 14:27:44.586058 USB3 port 1
1164 14:27:44.589123 USB3 port 2
1165 14:27:44.589206 USB3 port 3
1166 14:27:44.596069 PCI: 00:14.0 child on link 0 USB0 port 0
1167 14:27:44.605858 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 14:27:44.609354 USB0 port 0 child on link 0 USB2 port 0
1169 14:27:44.609521 USB2 port 0
1170 14:27:44.612533 USB2 port 1
1171 14:27:44.615769 USB2 port 2
1172 14:27:44.615903 USB2 port 3
1173 14:27:44.619563 USB2 port 4
1174 14:27:44.619786 USB2 port 5
1175 14:27:44.623066 USB2 port 6
1176 14:27:44.623309 USB2 port 7
1177 14:27:44.626173 USB2 port 8
1178 14:27:44.626349 USB2 port 9
1179 14:27:44.629443 USB3 port 0
1180 14:27:44.629619 USB3 port 1
1181 14:27:44.632744 USB3 port 2
1182 14:27:44.632935 USB3 port 3
1183 14:27:44.636125 PCI: 00:14.2
1184 14:27:44.645989 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 14:27:44.655760 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 14:27:44.658992 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 14:27:44.669216 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 14:27:44.672322 GENERIC: 0.0
1189 14:27:44.675787 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 14:27:44.685936 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 14:27:44.686103 I2C: 00:1a
1192 14:27:44.689227 I2C: 00:31
1193 14:27:44.689351 I2C: 00:32
1194 14:27:44.695958 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 14:27:44.705820 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 14:27:44.705916 I2C: 00:10
1197 14:27:44.709126 PCI: 00:15.2
1198 14:27:44.719265 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 14:27:44.719696 PCI: 00:15.3
1200 14:27:44.729233 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 14:27:44.732311 PCI: 00:16.0
1202 14:27:44.742808 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 14:27:44.743563 PCI: 00:19.0
1204 14:27:44.745915 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 14:27:44.755676 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 14:27:44.759140 I2C: 00:15
1207 14:27:44.762600 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 14:27:44.772357 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 14:27:44.782615 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 14:27:44.792422 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 14:27:44.792699 GENERIC: 0.0
1212 14:27:44.795824 PCI: 01:00.0
1213 14:27:44.805798 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 14:27:44.812256 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1215 14:27:44.822386 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1216 14:27:44.825615 PCI: 00:1e.0
1217 14:27:44.835489 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1218 14:27:44.838926 PCI: 00:1e.2 child on link 0 SPI: 00
1219 14:27:44.848711 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 14:27:44.851932 SPI: 00
1221 14:27:44.855587 PCI: 00:1e.3 child on link 0 SPI: 00
1222 14:27:44.865588 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 14:27:44.865710 SPI: 00
1224 14:27:44.868834 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1225 14:27:44.879045 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1226 14:27:44.882343 PNP: 0c09.0
1227 14:27:44.889061 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1228 14:27:44.895617 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1229 14:27:44.902285 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1230 14:27:44.911891 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1231 14:27:44.918889 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1232 14:27:44.919010 GENERIC: 0.0
1233 14:27:44.922191 GENERIC: 1.0
1234 14:27:44.922282 PCI: 00:1f.3
1235 14:27:44.931925 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 14:27:44.941925 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 14:27:44.945196 PCI: 00:1f.5
1238 14:27:44.955375 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1239 14:27:44.959061 CPU_CLUSTER: 0 child on link 0 APIC: 00
1240 14:27:44.959488 APIC: 00
1241 14:27:44.962297 APIC: 01
1242 14:27:44.962818 APIC: 03
1243 14:27:44.963168 APIC: 05
1244 14:27:44.965525 APIC: 07
1245 14:27:44.966087 APIC: 06
1246 14:27:44.966581 APIC: 02
1247 14:27:44.968794 APIC: 04
1248 14:27:44.975587 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1249 14:27:44.982300 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1250 14:27:44.989031 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1251 14:27:44.995712 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1252 14:27:44.998781 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1253 14:27:45.001991 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1254 14:27:45.005566 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1255 14:27:45.011801 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 14:27:45.022121 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1257 14:27:45.028559 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1258 14:27:45.035463 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1259 14:27:45.042030 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1260 14:27:45.048656 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1261 14:27:45.058688 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1262 14:27:45.065493 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1263 14:27:45.068725 DOMAIN: 0000: Resource ranges:
1264 14:27:45.072095 * Base: 1000, Size: 800, Tag: 100
1265 14:27:45.075075 * Base: 1900, Size: e700, Tag: 100
1266 14:27:45.081941 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1267 14:27:45.088408 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1268 14:27:45.094568 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1269 14:27:45.101647 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1270 14:27:45.108289 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1271 14:27:45.118329 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1272 14:27:45.124936 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1273 14:27:45.131343 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1274 14:27:45.141392 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1275 14:27:45.147797 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1276 14:27:45.154544 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1277 14:27:45.164289 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1278 14:27:45.170824 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1279 14:27:45.177544 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1280 14:27:45.187527 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1281 14:27:45.194358 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1282 14:27:45.201040 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1283 14:27:45.210742 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1284 14:27:45.217727 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1285 14:27:45.224352 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1286 14:27:45.234101 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1287 14:27:45.240646 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1288 14:27:45.247358 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1289 14:27:45.257211 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1290 14:27:45.263940 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1291 14:27:45.267464 DOMAIN: 0000: Resource ranges:
1292 14:27:45.270693 * Base: 7fc00000, Size: 40400000, Tag: 200
1293 14:27:45.273907 * Base: d0000000, Size: 28000000, Tag: 200
1294 14:27:45.280672 * Base: fa000000, Size: 1000000, Tag: 200
1295 14:27:45.283868 * Base: fb001000, Size: 2fff000, Tag: 200
1296 14:27:45.287205 * Base: fe010000, Size: 2e000, Tag: 200
1297 14:27:45.294093 * Base: fe03f000, Size: d41000, Tag: 200
1298 14:27:45.297464 * Base: fed88000, Size: 8000, Tag: 200
1299 14:27:45.300715 * Base: fed93000, Size: d000, Tag: 200
1300 14:27:45.303915 * Base: feda2000, Size: 1e000, Tag: 200
1301 14:27:45.307367 * Base: fede0000, Size: 1220000, Tag: 200
1302 14:27:45.313705 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1303 14:27:45.320719 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1304 14:27:45.327042 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1305 14:27:45.333942 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1306 14:27:45.340681 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1307 14:27:45.347134 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1308 14:27:45.353794 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1309 14:27:45.360488 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1310 14:27:45.367058 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1311 14:27:45.373866 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1312 14:27:45.380436 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1313 14:27:45.387120 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1314 14:27:45.393630 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1315 14:27:45.400342 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1316 14:27:45.407047 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1317 14:27:45.413764 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1318 14:27:45.420151 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1319 14:27:45.426838 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1320 14:27:45.433658 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1321 14:27:45.440301 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1322 14:27:45.447021 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1323 14:27:45.453664 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1324 14:27:45.460288 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1325 14:27:45.466985 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1326 14:27:45.476709 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1327 14:27:45.476952 PCI: 00:1d.0: Resource ranges:
1328 14:27:45.483383 * Base: 7fc00000, Size: 100000, Tag: 200
1329 14:27:45.490411 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1330 14:27:45.497137 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1331 14:27:45.503805 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1332 14:27:45.510389 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1333 14:27:45.516947 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1334 14:27:45.535997 Root Device assign_resources, bus 0 link: 0
1335 14:27:45.536137 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 14:27:45.536688 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1337 14:27:45.543580 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1338 14:27:45.553373 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1339 14:27:45.559853 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1340 14:27:45.563281 PCI: 00:04.0 assign_resources, bus 1 link: 0
1341 14:27:45.569883 PCI: 00:04.0 assign_resources, bus 1 link: 0
1342 14:27:45.576842 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1343 14:27:45.586867 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1344 14:27:45.593496 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1345 14:27:45.600015 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1346 14:27:45.603373 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1347 14:27:45.613174 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1348 14:27:45.616524 PCI: 00:14.0 assign_resources, bus 0 link: 0
1349 14:27:45.619889 PCI: 00:14.0 assign_resources, bus 0 link: 0
1350 14:27:45.629735 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1351 14:27:45.636604 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1352 14:27:45.646533 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1353 14:27:45.649695 PCI: 00:14.3 assign_resources, bus 0 link: 0
1354 14:27:45.653083 PCI: 00:14.3 assign_resources, bus 0 link: 0
1355 14:27:45.663272 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1356 14:27:45.666759 PCI: 00:15.0 assign_resources, bus 0 link: 0
1357 14:27:45.673477 PCI: 00:15.0 assign_resources, bus 0 link: 0
1358 14:27:45.679607 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1359 14:27:45.683418 PCI: 00:15.1 assign_resources, bus 0 link: 0
1360 14:27:45.690217 PCI: 00:15.1 assign_resources, bus 0 link: 0
1361 14:27:45.696833 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1362 14:27:45.706808 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1363 14:27:45.713440 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1364 14:27:45.723321 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1365 14:27:45.726593 PCI: 00:19.1 assign_resources, bus 0 link: 0
1366 14:27:45.733166 PCI: 00:19.1 assign_resources, bus 0 link: 0
1367 14:27:45.740061 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1368 14:27:45.750017 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1369 14:27:45.760108 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1370 14:27:45.763128 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 14:27:45.773342 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1372 14:27:45.779973 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1373 14:27:45.786512 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1374 14:27:45.792922 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 14:27:45.800016 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1376 14:27:45.806640 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1377 14:27:45.809964 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1378 14:27:45.816583 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1379 14:27:45.823089 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1380 14:27:45.826450 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1381 14:27:45.833367 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 14:27:45.836568 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1383 14:27:45.843252 LPC: Trying to open IO window from 800 size 1ff
1384 14:27:45.849878 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1385 14:27:45.859834 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1386 14:27:45.866248 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1387 14:27:45.869731 DOMAIN: 0000 assign_resources, bus 0 link: 0
1388 14:27:45.876299 Root Device assign_resources, bus 0 link: 0
1389 14:27:45.879798 Done setting resources.
1390 14:27:45.886436 Show resources in subtree (Root Device)...After assigning values.
1391 14:27:45.889668 Root Device child on link 0 DOMAIN: 0000
1392 14:27:45.892699 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1393 14:27:45.902834 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1394 14:27:45.912621 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1395 14:27:45.912726 PCI: 00:00.0
1396 14:27:45.922630 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1397 14:27:45.932490 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1398 14:27:45.942903 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1399 14:27:45.952448 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1400 14:27:45.962904 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1401 14:27:45.969362 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1402 14:27:45.979195 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1403 14:27:45.988986 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1404 14:27:45.999106 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1405 14:27:46.008942 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1406 14:27:46.019180 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1407 14:27:46.025904 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1408 14:27:46.035436 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1409 14:27:46.045711 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1410 14:27:46.055848 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1411 14:27:46.065639 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1412 14:27:46.075573 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1413 14:27:46.082347 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1414 14:27:46.092187 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1415 14:27:46.102593 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1416 14:27:46.105896 PCI: 00:02.0
1417 14:27:46.115749 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1418 14:27:46.125684 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1419 14:27:46.135751 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1420 14:27:46.139012 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1421 14:27:46.148755 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1422 14:27:46.151979 GENERIC: 0.0
1423 14:27:46.152062 PCI: 00:05.0
1424 14:27:46.162136 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1425 14:27:46.168907 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1426 14:27:46.168996 GENERIC: 0.0
1427 14:27:46.172333 PCI: 00:08.0
1428 14:27:46.181841 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1429 14:27:46.181927 PCI: 00:0a.0
1430 14:27:46.188379 PCI: 00:0d.0 child on link 0 USB0 port 0
1431 14:27:46.198530 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1432 14:27:46.201706 USB0 port 0 child on link 0 USB3 port 0
1433 14:27:46.205042 USB3 port 0
1434 14:27:46.205143 USB3 port 1
1435 14:27:46.208597 USB3 port 2
1436 14:27:46.208681 USB3 port 3
1437 14:27:46.215187 PCI: 00:14.0 child on link 0 USB0 port 0
1438 14:27:46.225159 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1439 14:27:46.228578 USB0 port 0 child on link 0 USB2 port 0
1440 14:27:46.231811 USB2 port 0
1441 14:27:46.231943 USB2 port 1
1442 14:27:46.235107 USB2 port 2
1443 14:27:46.235225 USB2 port 3
1444 14:27:46.238457 USB2 port 4
1445 14:27:46.238547 USB2 port 5
1446 14:27:46.241737 USB2 port 6
1447 14:27:46.241825 USB2 port 7
1448 14:27:46.245157 USB2 port 8
1449 14:27:46.245264 USB2 port 9
1450 14:27:46.248255 USB3 port 0
1451 14:27:46.251407 USB3 port 1
1452 14:27:46.251548 USB3 port 2
1453 14:27:46.254828 USB3 port 3
1454 14:27:46.254931 PCI: 00:14.2
1455 14:27:46.265041 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1456 14:27:46.274858 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1457 14:27:46.281781 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1458 14:27:46.291501 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1459 14:27:46.291591 GENERIC: 0.0
1460 14:27:46.298052 PCI: 00:15.0 child on link 0 I2C: 00:1a
1461 14:27:46.308261 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1462 14:27:46.308350 I2C: 00:1a
1463 14:27:46.311410 I2C: 00:31
1464 14:27:46.311494 I2C: 00:32
1465 14:27:46.314850 PCI: 00:15.1 child on link 0 I2C: 00:10
1466 14:27:46.327891 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1467 14:27:46.327997 I2C: 00:10
1468 14:27:46.331643 PCI: 00:15.2
1469 14:27:46.341737 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1470 14:27:46.341894 PCI: 00:15.3
1471 14:27:46.351652 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1472 14:27:46.354735 PCI: 00:16.0
1473 14:27:46.364657 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1474 14:27:46.364760 PCI: 00:19.0
1475 14:27:46.371348 PCI: 00:19.1 child on link 0 I2C: 00:15
1476 14:27:46.381309 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1477 14:27:46.381396 I2C: 00:15
1478 14:27:46.388018 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1479 14:27:46.394701 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1480 14:27:46.408111 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1481 14:27:46.417930 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1482 14:27:46.421424 GENERIC: 0.0
1483 14:27:46.421509 PCI: 01:00.0
1484 14:27:46.431254 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1485 14:27:46.441407 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1486 14:27:46.451434 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1487 14:27:46.454414 PCI: 00:1e.0
1488 14:27:46.464333 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1489 14:27:46.471006 PCI: 00:1e.2 child on link 0 SPI: 00
1490 14:27:46.480989 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1491 14:27:46.481107 SPI: 00
1492 14:27:46.484435 PCI: 00:1e.3 child on link 0 SPI: 00
1493 14:27:46.494263 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1494 14:27:46.497979 SPI: 00
1495 14:27:46.501251 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1496 14:27:46.510960 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1497 14:27:46.511047 PNP: 0c09.0
1498 14:27:46.521047 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 14:27:46.524221 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1500 14:27:46.534242 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1501 14:27:46.544219 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1502 14:27:46.547545 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1503 14:27:46.550867 GENERIC: 0.0
1504 14:27:46.550951 GENERIC: 1.0
1505 14:27:46.554272 PCI: 00:1f.3
1506 14:27:46.564054 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1507 14:27:46.574030 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1508 14:27:46.577456 PCI: 00:1f.5
1509 14:27:46.587499 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1510 14:27:46.590869 CPU_CLUSTER: 0 child on link 0 APIC: 00
1511 14:27:46.590975 APIC: 00
1512 14:27:46.594209 APIC: 01
1513 14:27:46.594325 APIC: 03
1514 14:27:46.594425 APIC: 05
1515 14:27:46.597536 APIC: 07
1516 14:27:46.597646 APIC: 06
1517 14:27:46.600615 APIC: 02
1518 14:27:46.600730 APIC: 04
1519 14:27:46.603974 Done allocating resources.
1520 14:27:46.610553 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1521 14:27:46.614059 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1522 14:27:46.620732 Configure GPIOs for I2S audio on UP4.
1523 14:27:46.627429 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1524 14:27:46.627514 Enabling resources...
1525 14:27:46.634283 PCI: 00:00.0 subsystem <- 8086/9a12
1526 14:27:46.634408 PCI: 00:00.0 cmd <- 06
1527 14:27:46.637726 PCI: 00:02.0 subsystem <- 8086/9a40
1528 14:27:46.640701 PCI: 00:02.0 cmd <- 03
1529 14:27:46.644239 PCI: 00:04.0 subsystem <- 8086/9a03
1530 14:27:46.647604 PCI: 00:04.0 cmd <- 02
1531 14:27:46.651000 PCI: 00:05.0 subsystem <- 8086/9a19
1532 14:27:46.654285 PCI: 00:05.0 cmd <- 02
1533 14:27:46.657715 PCI: 00:08.0 subsystem <- 8086/9a11
1534 14:27:46.660944 PCI: 00:08.0 cmd <- 06
1535 14:27:46.664256 PCI: 00:0d.0 subsystem <- 8086/9a13
1536 14:27:46.667916 PCI: 00:0d.0 cmd <- 02
1537 14:27:46.671006 PCI: 00:14.0 subsystem <- 8086/a0ed
1538 14:27:46.671120 PCI: 00:14.0 cmd <- 02
1539 14:27:46.677544 PCI: 00:14.2 subsystem <- 8086/a0ef
1540 14:27:46.677656 PCI: 00:14.2 cmd <- 02
1541 14:27:46.680828 PCI: 00:14.3 subsystem <- 8086/a0f0
1542 14:27:46.684075 PCI: 00:14.3 cmd <- 02
1543 14:27:46.687443 PCI: 00:15.0 subsystem <- 8086/a0e8
1544 14:27:46.690927 PCI: 00:15.0 cmd <- 02
1545 14:27:46.694289 PCI: 00:15.1 subsystem <- 8086/a0e9
1546 14:27:46.697618 PCI: 00:15.1 cmd <- 02
1547 14:27:46.700899 PCI: 00:15.2 subsystem <- 8086/a0ea
1548 14:27:46.704245 PCI: 00:15.2 cmd <- 02
1549 14:27:46.707555 PCI: 00:15.3 subsystem <- 8086/a0eb
1550 14:27:46.710771 PCI: 00:15.3 cmd <- 02
1551 14:27:46.713964 PCI: 00:16.0 subsystem <- 8086/a0e0
1552 14:27:46.717261 PCI: 00:16.0 cmd <- 02
1553 14:27:46.720408 PCI: 00:19.1 subsystem <- 8086/a0c6
1554 14:27:46.720513 PCI: 00:19.1 cmd <- 02
1555 14:27:46.723750 PCI: 00:1d.0 bridge ctrl <- 0013
1556 14:27:46.730548 PCI: 00:1d.0 subsystem <- 8086/a0b0
1557 14:27:46.730659 PCI: 00:1d.0 cmd <- 06
1558 14:27:46.733664 PCI: 00:1e.0 subsystem <- 8086/a0a8
1559 14:27:46.737302 PCI: 00:1e.0 cmd <- 06
1560 14:27:46.740543 PCI: 00:1e.2 subsystem <- 8086/a0aa
1561 14:27:46.743929 PCI: 00:1e.2 cmd <- 06
1562 14:27:46.747103 PCI: 00:1e.3 subsystem <- 8086/a0ab
1563 14:27:46.750643 PCI: 00:1e.3 cmd <- 02
1564 14:27:46.754117 PCI: 00:1f.0 subsystem <- 8086/a087
1565 14:27:46.757199 PCI: 00:1f.0 cmd <- 407
1566 14:27:46.760513 PCI: 00:1f.3 subsystem <- 8086/a0c8
1567 14:27:46.763847 PCI: 00:1f.3 cmd <- 02
1568 14:27:46.767169 PCI: 00:1f.5 subsystem <- 8086/a0a4
1569 14:27:46.770331 PCI: 00:1f.5 cmd <- 406
1570 14:27:46.774041 PCI: 01:00.0 cmd <- 02
1571 14:27:46.777800 done.
1572 14:27:46.781134 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1573 14:27:46.784418 Initializing devices...
1574 14:27:46.788219 Root Device init
1575 14:27:46.791068 Chrome EC: Set SMI mask to 0x0000000000000000
1576 14:27:46.798195 Chrome EC: clear events_b mask to 0x0000000000000000
1577 14:27:46.804716 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1578 14:27:46.807923 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1579 14:27:46.814474 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1580 14:27:46.821012 Chrome EC: Set WAKE mask to 0x0000000000000000
1581 14:27:46.824670 fw_config match found: DB_USB=USB3_ACTIVE
1582 14:27:46.831409 Configure Right Type-C port orientation for retimer
1583 14:27:46.834607 Root Device init finished in 43 msecs
1584 14:27:46.837762 PCI: 00:00.0 init
1585 14:27:46.841100 CPU TDP = 9 Watts
1586 14:27:46.841213 CPU PL1 = 9 Watts
1587 14:27:46.844293 CPU PL2 = 40 Watts
1588 14:27:46.844402 CPU PL4 = 83 Watts
1589 14:27:46.847669 PCI: 00:00.0 init finished in 8 msecs
1590 14:27:46.851458 PCI: 00:02.0 init
1591 14:27:46.854725 GMA: Found VBT in CBFS
1592 14:27:46.858165 GMA: Found valid VBT in CBFS
1593 14:27:46.861478 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1594 14:27:46.871568 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1595 14:27:46.874762 PCI: 00:02.0 init finished in 18 msecs
1596 14:27:46.877834 PCI: 00:05.0 init
1597 14:27:46.881382 PCI: 00:05.0 init finished in 0 msecs
1598 14:27:46.881459 PCI: 00:08.0 init
1599 14:27:46.888078 PCI: 00:08.0 init finished in 0 msecs
1600 14:27:46.888172 PCI: 00:14.0 init
1601 14:27:46.894736 PCI: 00:14.0 init finished in 0 msecs
1602 14:27:46.894819 PCI: 00:14.2 init
1603 14:27:46.898011 PCI: 00:14.2 init finished in 0 msecs
1604 14:27:46.901700 PCI: 00:15.0 init
1605 14:27:46.904990 I2C bus 0 version 0x3230302a
1606 14:27:46.908372 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1607 14:27:46.911456 PCI: 00:15.0 init finished in 6 msecs
1608 14:27:46.915134 PCI: 00:15.1 init
1609 14:27:46.918004 I2C bus 1 version 0x3230302a
1610 14:27:46.921765 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1611 14:27:46.925068 PCI: 00:15.1 init finished in 6 msecs
1612 14:27:46.928313 PCI: 00:15.2 init
1613 14:27:46.931765 I2C bus 2 version 0x3230302a
1614 14:27:46.935045 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1615 14:27:46.938311 PCI: 00:15.2 init finished in 6 msecs
1616 14:27:46.938420 PCI: 00:15.3 init
1617 14:27:46.941593 I2C bus 3 version 0x3230302a
1618 14:27:46.945041 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1619 14:27:46.951448 PCI: 00:15.3 init finished in 6 msecs
1620 14:27:46.951551 PCI: 00:16.0 init
1621 14:27:46.954455 PCI: 00:16.0 init finished in 0 msecs
1622 14:27:46.958358 PCI: 00:19.1 init
1623 14:27:46.961519 I2C bus 5 version 0x3230302a
1624 14:27:46.965019 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1625 14:27:46.968404 PCI: 00:19.1 init finished in 6 msecs
1626 14:27:46.971572 PCI: 00:1d.0 init
1627 14:27:46.974890 Initializing PCH PCIe bridge.
1628 14:27:46.978298 PCI: 00:1d.0 init finished in 3 msecs
1629 14:27:46.981987 PCI: 00:1f.0 init
1630 14:27:46.985324 IOAPIC: Initializing IOAPIC at 0xfec00000
1631 14:27:46.988504 IOAPIC: Bootstrap Processor Local APIC = 0x00
1632 14:27:46.991996 IOAPIC: ID = 0x02
1633 14:27:46.995195 IOAPIC: Dumping registers
1634 14:27:46.998464 reg 0x0000: 0x02000000
1635 14:27:46.998558 reg 0x0001: 0x00770020
1636 14:27:47.001663 reg 0x0002: 0x00000000
1637 14:27:47.004958 PCI: 00:1f.0 init finished in 21 msecs
1638 14:27:47.008269 PCI: 00:1f.2 init
1639 14:27:47.012020 Disabling ACPI via APMC.
1640 14:27:47.015302 APMC done.
1641 14:27:47.018319 PCI: 00:1f.2 init finished in 5 msecs
1642 14:27:47.029202 PCI: 01:00.0 init
1643 14:27:47.032919 PCI: 01:00.0 init finished in 0 msecs
1644 14:27:47.035755 PNP: 0c09.0 init
1645 14:27:47.042901 Google Chrome EC uptime: 8.464 seconds
1646 14:27:47.045754 Google Chrome AP resets since EC boot: 1
1647 14:27:47.049317 Google Chrome most recent AP reset causes:
1648 14:27:47.052412 0.349: 32775 shutdown: entering G3
1649 14:27:47.059143 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1650 14:27:47.062596 PNP: 0c09.0 init finished in 23 msecs
1651 14:27:47.068926 Devices initialized
1652 14:27:47.072237 Show all devs... After init.
1653 14:27:47.075567 Root Device: enabled 1
1654 14:27:47.075652 DOMAIN: 0000: enabled 1
1655 14:27:47.078997 CPU_CLUSTER: 0: enabled 1
1656 14:27:47.082295 PCI: 00:00.0: enabled 1
1657 14:27:47.085561 PCI: 00:02.0: enabled 1
1658 14:27:47.085645 PCI: 00:04.0: enabled 1
1659 14:27:47.088679 PCI: 00:05.0: enabled 1
1660 14:27:47.091994 PCI: 00:06.0: enabled 0
1661 14:27:47.095658 PCI: 00:07.0: enabled 0
1662 14:27:47.095762 PCI: 00:07.1: enabled 0
1663 14:27:47.098978 PCI: 00:07.2: enabled 0
1664 14:27:47.102410 PCI: 00:07.3: enabled 0
1665 14:27:47.105385 PCI: 00:08.0: enabled 1
1666 14:27:47.105469 PCI: 00:09.0: enabled 0
1667 14:27:47.108684 PCI: 00:0a.0: enabled 0
1668 14:27:47.111994 PCI: 00:0d.0: enabled 1
1669 14:27:47.112154 PCI: 00:0d.1: enabled 0
1670 14:27:47.115740 PCI: 00:0d.2: enabled 0
1671 14:27:47.118851 PCI: 00:0d.3: enabled 0
1672 14:27:47.122029 PCI: 00:0e.0: enabled 0
1673 14:27:47.122139 PCI: 00:10.2: enabled 1
1674 14:27:47.125488 PCI: 00:10.6: enabled 0
1675 14:27:47.128717 PCI: 00:10.7: enabled 0
1676 14:27:47.132021 PCI: 00:12.0: enabled 0
1677 14:27:47.132104 PCI: 00:12.6: enabled 0
1678 14:27:47.135700 PCI: 00:13.0: enabled 0
1679 14:27:47.138969 PCI: 00:14.0: enabled 1
1680 14:27:47.142392 PCI: 00:14.1: enabled 0
1681 14:27:47.142476 PCI: 00:14.2: enabled 1
1682 14:27:47.145595 PCI: 00:14.3: enabled 1
1683 14:27:47.148914 PCI: 00:15.0: enabled 1
1684 14:27:47.149010 PCI: 00:15.1: enabled 1
1685 14:27:47.152195 PCI: 00:15.2: enabled 1
1686 14:27:47.155359 PCI: 00:15.3: enabled 1
1687 14:27:47.158568 PCI: 00:16.0: enabled 1
1688 14:27:47.158652 PCI: 00:16.1: enabled 0
1689 14:27:47.161999 PCI: 00:16.2: enabled 0
1690 14:27:47.165590 PCI: 00:16.3: enabled 0
1691 14:27:47.168641 PCI: 00:16.4: enabled 0
1692 14:27:47.168751 PCI: 00:16.5: enabled 0
1693 14:27:47.171993 PCI: 00:17.0: enabled 0
1694 14:27:47.175416 PCI: 00:19.0: enabled 0
1695 14:27:47.178872 PCI: 00:19.1: enabled 1
1696 14:27:47.178949 PCI: 00:19.2: enabled 0
1697 14:27:47.182061 PCI: 00:1c.0: enabled 1
1698 14:27:47.185351 PCI: 00:1c.1: enabled 0
1699 14:27:47.185435 PCI: 00:1c.2: enabled 0
1700 14:27:47.188599 PCI: 00:1c.3: enabled 0
1701 14:27:47.192216 PCI: 00:1c.4: enabled 0
1702 14:27:47.195447 PCI: 00:1c.5: enabled 0
1703 14:27:47.195531 PCI: 00:1c.6: enabled 1
1704 14:27:47.198881 PCI: 00:1c.7: enabled 0
1705 14:27:47.202067 PCI: 00:1d.0: enabled 1
1706 14:27:47.205363 PCI: 00:1d.1: enabled 0
1707 14:27:47.205446 PCI: 00:1d.2: enabled 1
1708 14:27:47.208701 PCI: 00:1d.3: enabled 0
1709 14:27:47.212162 PCI: 00:1e.0: enabled 1
1710 14:27:47.215371 PCI: 00:1e.1: enabled 0
1711 14:27:47.215456 PCI: 00:1e.2: enabled 1
1712 14:27:47.218680 PCI: 00:1e.3: enabled 1
1713 14:27:47.221996 PCI: 00:1f.0: enabled 1
1714 14:27:47.225287 PCI: 00:1f.1: enabled 0
1715 14:27:47.225372 PCI: 00:1f.2: enabled 1
1716 14:27:47.228530 PCI: 00:1f.3: enabled 1
1717 14:27:47.231933 PCI: 00:1f.4: enabled 0
1718 14:27:47.232018 PCI: 00:1f.5: enabled 1
1719 14:27:47.235202 PCI: 00:1f.6: enabled 0
1720 14:27:47.238373 PCI: 00:1f.7: enabled 0
1721 14:27:47.241934 APIC: 00: enabled 1
1722 14:27:47.242018 GENERIC: 0.0: enabled 1
1723 14:27:47.245219 GENERIC: 0.0: enabled 1
1724 14:27:47.248488 GENERIC: 1.0: enabled 1
1725 14:27:47.248572 GENERIC: 0.0: enabled 1
1726 14:27:47.251736 GENERIC: 1.0: enabled 1
1727 14:27:47.255011 USB0 port 0: enabled 1
1728 14:27:47.258329 GENERIC: 0.0: enabled 1
1729 14:27:47.258413 USB0 port 0: enabled 1
1730 14:27:47.261622 GENERIC: 0.0: enabled 1
1731 14:27:47.265206 I2C: 00:1a: enabled 1
1732 14:27:47.265290 I2C: 00:31: enabled 1
1733 14:27:47.268734 I2C: 00:32: enabled 1
1734 14:27:47.271773 I2C: 00:10: enabled 1
1735 14:27:47.271858 I2C: 00:15: enabled 1
1736 14:27:47.274954 GENERIC: 0.0: enabled 0
1737 14:27:47.278483 GENERIC: 1.0: enabled 0
1738 14:27:47.281640 GENERIC: 0.0: enabled 1
1739 14:27:47.281725 SPI: 00: enabled 1
1740 14:27:47.285192 SPI: 00: enabled 1
1741 14:27:47.288363 PNP: 0c09.0: enabled 1
1742 14:27:47.288456 GENERIC: 0.0: enabled 1
1743 14:27:47.291683 USB3 port 0: enabled 1
1744 14:27:47.294813 USB3 port 1: enabled 1
1745 14:27:47.294897 USB3 port 2: enabled 0
1746 14:27:47.298403 USB3 port 3: enabled 0
1747 14:27:47.301691 USB2 port 0: enabled 0
1748 14:27:47.305043 USB2 port 1: enabled 1
1749 14:27:47.305128 USB2 port 2: enabled 1
1750 14:27:47.308362 USB2 port 3: enabled 0
1751 14:27:47.311756 USB2 port 4: enabled 1
1752 14:27:47.311840 USB2 port 5: enabled 0
1753 14:27:47.314972 USB2 port 6: enabled 0
1754 14:27:47.318359 USB2 port 7: enabled 0
1755 14:27:47.318443 USB2 port 8: enabled 0
1756 14:27:47.321641 USB2 port 9: enabled 0
1757 14:27:47.324997 USB3 port 0: enabled 0
1758 14:27:47.328601 USB3 port 1: enabled 1
1759 14:27:47.328685 USB3 port 2: enabled 0
1760 14:27:47.331899 USB3 port 3: enabled 0
1761 14:27:47.335210 GENERIC: 0.0: enabled 1
1762 14:27:47.335294 GENERIC: 1.0: enabled 1
1763 14:27:47.338443 APIC: 01: enabled 1
1764 14:27:47.341848 APIC: 03: enabled 1
1765 14:27:47.341932 APIC: 05: enabled 1
1766 14:27:47.345017 APIC: 07: enabled 1
1767 14:27:47.348219 APIC: 06: enabled 1
1768 14:27:47.348303 APIC: 02: enabled 1
1769 14:27:47.351473 APIC: 04: enabled 1
1770 14:27:47.351556 PCI: 01:00.0: enabled 1
1771 14:27:47.357998 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1772 14:27:47.365095 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1773 14:27:47.368233 ELOG: NV offset 0xf30000 size 0x1000
1774 14:27:47.374730 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1775 14:27:47.381398 ELOG: Event(17) added with size 13 at 2023-06-06 14:27:43 UTC
1776 14:27:47.388287 ELOG: Event(92) added with size 9 at 2023-06-06 14:27:43 UTC
1777 14:27:47.394911 ELOG: Event(93) added with size 9 at 2023-06-06 14:27:43 UTC
1778 14:27:47.401669 ELOG: Event(9E) added with size 10 at 2023-06-06 14:27:43 UTC
1779 14:27:47.408098 ELOG: Event(9F) added with size 14 at 2023-06-06 14:27:43 UTC
1780 14:27:47.411373 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1781 14:27:47.418531 ELOG: Event(A1) added with size 10 at 2023-06-06 14:27:43 UTC
1782 14:27:47.425009 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1783 14:27:47.431661 ELOG: Event(A0) added with size 9 at 2023-06-06 14:27:43 UTC
1784 14:27:47.438380 elog_add_boot_reason: Logged dev mode boot
1785 14:27:47.441648 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1786 14:27:47.444964 Finalize devices...
1787 14:27:47.448160 Devices finalized
1788 14:27:47.451798 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1789 14:27:47.458445 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1790 14:27:47.461806 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1791 14:27:47.468402 ME: HFSTS1 : 0x80030055
1792 14:27:47.471696 ME: HFSTS2 : 0x30280116
1793 14:27:47.478565 ME: HFSTS3 : 0x00000050
1794 14:27:47.481776 ME: HFSTS4 : 0x00004000
1795 14:27:47.485244 ME: HFSTS5 : 0x00000000
1796 14:27:47.491767 ME: HFSTS6 : 0x00400006
1797 14:27:47.495216 ME: Manufacturing Mode : YES
1798 14:27:47.498351 ME: SPI Protection Mode Enabled : NO
1799 14:27:47.501924 ME: FW Partition Table : OK
1800 14:27:47.505125 ME: Bringup Loader Failure : NO
1801 14:27:47.508449 ME: Firmware Init Complete : NO
1802 14:27:47.511806 ME: Boot Options Present : NO
1803 14:27:47.515118 ME: Update In Progress : NO
1804 14:27:47.521855 ME: D0i3 Support : YES
1805 14:27:47.525101 ME: Low Power State Enabled : NO
1806 14:27:47.528428 ME: CPU Replaced : YES
1807 14:27:47.531670 ME: CPU Replacement Valid : YES
1808 14:27:47.534980 ME: Current Working State : 5
1809 14:27:47.538576 ME: Current Operation State : 1
1810 14:27:47.541818 ME: Current Operation Mode : 3
1811 14:27:47.545243 ME: Error Code : 0
1812 14:27:47.548451 ME: Enhanced Debug Mode : NO
1813 14:27:47.554888 ME: CPU Debug Disabled : YES
1814 14:27:47.558171 ME: TXT Support : NO
1815 14:27:47.561570 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1816 14:27:47.572010 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1817 14:27:47.575318 CBFS: 'fallback/slic' not found.
1818 14:27:47.578483 ACPI: Writing ACPI tables at 76b01000.
1819 14:27:47.578595 ACPI: * FACS
1820 14:27:47.581822 ACPI: * DSDT
1821 14:27:47.585131 Ramoops buffer: 0x100000@0x76a00000.
1822 14:27:47.588227 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1823 14:27:47.594846 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1824 14:27:47.598448 Google Chrome EC: version:
1825 14:27:47.601546 ro: voema_v2.0.7540-147f8d37d1
1826 14:27:47.605046 rw: voema_v2.0.7540-147f8d37d1
1827 14:27:47.605128 running image: 2
1828 14:27:47.611767 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1829 14:27:47.617095 ACPI: * FADT
1830 14:27:47.617177 SCI is IRQ9
1831 14:27:47.623362 ACPI: added table 1/32, length now 40
1832 14:27:47.623471 ACPI: * SSDT
1833 14:27:47.626650 Found 1 CPU(s) with 8 core(s) each.
1834 14:27:47.633298 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1835 14:27:47.636682 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1836 14:27:47.640301 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1837 14:27:47.643505 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1838 14:27:47.650081 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1839 14:27:47.656708 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1840 14:27:47.660196 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1841 14:27:47.666430 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1842 14:27:47.673529 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1843 14:27:47.676860 \_SB.PCI0.RP09: Added StorageD3Enable property
1844 14:27:47.680135 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1845 14:27:47.686704 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1846 14:27:47.693481 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1847 14:27:47.696668 PS2K: Passing 80 keymaps to kernel
1848 14:27:47.703344 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1849 14:27:47.710097 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1850 14:27:47.716428 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1851 14:27:47.719972 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1852 14:27:47.726567 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1853 14:27:47.733171 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1854 14:27:47.739620 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1855 14:27:47.746633 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1856 14:27:47.753230 ACPI: added table 2/32, length now 44
1857 14:27:47.753321 ACPI: * MCFG
1858 14:27:47.756569 ACPI: added table 3/32, length now 48
1859 14:27:47.759859 ACPI: * TPM2
1860 14:27:47.763188 TPM2 log created at 0x769f0000
1861 14:27:47.766597 ACPI: added table 4/32, length now 52
1862 14:27:47.766680 ACPI: * MADT
1863 14:27:47.769841 SCI is IRQ9
1864 14:27:47.773263 ACPI: added table 5/32, length now 56
1865 14:27:47.773348 current = 76b09850
1866 14:27:47.776639 ACPI: * DMAR
1867 14:27:47.779946 ACPI: added table 6/32, length now 60
1868 14:27:47.783357 ACPI: added table 7/32, length now 64
1869 14:27:47.796102 ACPI: * HPET
1870 14:27:47.796308 ACPI: added table 8/32, length now 68
1871 14:27:47.796411 ACPI: done.
1872 14:27:47.796501 ACPI tables: 35216 bytes.
1873 14:27:47.796827 smbios_write_tables: 769ef000
1874 14:27:47.799745 EC returned error result code 3
1875 14:27:47.802989 Couldn't obtain OEM name from CBI
1876 14:27:47.806197 Create SMBIOS type 16
1877 14:27:47.806279 Create SMBIOS type 17
1878 14:27:47.809611 GENERIC: 0.0 (WIFI Device)
1879 14:27:47.813073 SMBIOS tables: 1750 bytes.
1880 14:27:47.816423 Writing table forward entry at 0x00000500
1881 14:27:47.823090 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1882 14:27:47.826334 Writing coreboot table at 0x76b25000
1883 14:27:47.832787 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1884 14:27:47.836672 1. 0000000000001000-000000000009ffff: RAM
1885 14:27:47.842932 2. 00000000000a0000-00000000000fffff: RESERVED
1886 14:27:47.846276 3. 0000000000100000-00000000769eefff: RAM
1887 14:27:47.853336 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1888 14:27:47.856608 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1889 14:27:47.863194 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1890 14:27:47.869503 7. 0000000077000000-000000007fbfffff: RESERVED
1891 14:27:47.873310 8. 00000000c0000000-00000000cfffffff: RESERVED
1892 14:27:47.876598 9. 00000000f8000000-00000000f9ffffff: RESERVED
1893 14:27:47.883284 10. 00000000fb000000-00000000fb000fff: RESERVED
1894 14:27:47.886601 11. 00000000fe000000-00000000fe00ffff: RESERVED
1895 14:27:47.893096 12. 00000000fed80000-00000000fed87fff: RESERVED
1896 14:27:47.896379 13. 00000000fed90000-00000000fed92fff: RESERVED
1897 14:27:47.903102 14. 00000000feda0000-00000000feda1fff: RESERVED
1898 14:27:47.906388 15. 00000000fedc0000-00000000feddffff: RESERVED
1899 14:27:47.909650 16. 0000000100000000-00000002803fffff: RAM
1900 14:27:47.913062 Passing 4 GPIOs to payload:
1901 14:27:47.920035 NAME | PORT | POLARITY | VALUE
1902 14:27:47.923052 lid | undefined | high | high
1903 14:27:47.930088 power | undefined | high | low
1904 14:27:47.933450 oprom | undefined | high | low
1905 14:27:47.939997 EC in RW | 0x000000e5 | high | high
1906 14:27:47.946753 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 8ff2
1907 14:27:47.950011 coreboot table: 1576 bytes.
1908 14:27:47.953159 IMD ROOT 0. 0x76fff000 0x00001000
1909 14:27:47.956681 IMD SMALL 1. 0x76ffe000 0x00001000
1910 14:27:47.960007 FSP MEMORY 2. 0x76c4e000 0x003b0000
1911 14:27:47.963705 VPD 3. 0x76c4d000 0x00000367
1912 14:27:47.966545 RO MCACHE 4. 0x76c4c000 0x00000fdc
1913 14:27:47.973412 CONSOLE 5. 0x76c2c000 0x00020000
1914 14:27:47.976264 FMAP 6. 0x76c2b000 0x00000578
1915 14:27:47.980064 TIME STAMP 7. 0x76c2a000 0x00000910
1916 14:27:47.983330 VBOOT WORK 8. 0x76c16000 0x00014000
1917 14:27:47.986689 ROMSTG STCK 9. 0x76c15000 0x00001000
1918 14:27:47.990003 AFTER CAR 10. 0x76c0a000 0x0000b000
1919 14:27:47.993258 RAMSTAGE 11. 0x76b97000 0x00073000
1920 14:27:47.996376 REFCODE 12. 0x76b42000 0x00055000
1921 14:27:48.003508 SMM BACKUP 13. 0x76b32000 0x00010000
1922 14:27:48.006453 4f444749 14. 0x76b30000 0x00002000
1923 14:27:48.009826 EXT VBT15. 0x76b2d000 0x0000219f
1924 14:27:48.013110 COREBOOT 16. 0x76b25000 0x00008000
1925 14:27:48.016365 ACPI 17. 0x76b01000 0x00024000
1926 14:27:48.019818 ACPI GNVS 18. 0x76b00000 0x00001000
1927 14:27:48.023073 RAMOOPS 19. 0x76a00000 0x00100000
1928 14:27:48.026529 TPM2 TCGLOG20. 0x769f0000 0x00010000
1929 14:27:48.029955 SMBIOS 21. 0x769ef000 0x00000800
1930 14:27:48.033089 IMD small region:
1931 14:27:48.036578 IMD ROOT 0. 0x76ffec00 0x00000400
1932 14:27:48.039996 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1933 14:27:48.043096 POWER STATE 2. 0x76ffeb80 0x00000044
1934 14:27:48.049814 ROMSTAGE 3. 0x76ffeb60 0x00000004
1935 14:27:48.053122 MEM INFO 4. 0x76ffe980 0x000001e0
1936 14:27:48.060004 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1937 14:27:48.060088 MTRR: Physical address space:
1938 14:27:48.066687 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1939 14:27:48.072986 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1940 14:27:48.079933 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1941 14:27:48.086552 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1942 14:27:48.092910 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1943 14:27:48.099536 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1944 14:27:48.106212 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1945 14:27:48.109573 MTRR: Fixed MSR 0x250 0x0606060606060606
1946 14:27:48.112867 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 14:27:48.116138 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 14:27:48.123242 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 14:27:48.126524 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 14:27:48.129859 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 14:27:48.133213 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 14:27:48.136198 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 14:27:48.142959 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 14:27:48.146158 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 14:27:48.149405 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 14:27:48.153151 call enable_fixed_mtrr()
1957 14:27:48.156624 CPU physical address size: 39 bits
1958 14:27:48.163075 MTRR: default type WB/UC MTRR counts: 6/6.
1959 14:27:48.166400 MTRR: UC selected as default type.
1960 14:27:48.172967 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1961 14:27:48.176654 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1962 14:27:48.182993 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1963 14:27:48.189679 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1964 14:27:48.196317 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1965 14:27:48.203178 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1966 14:27:48.209702 MTRR: Fixed MSR 0x250 0x0606060606060606
1967 14:27:48.213008 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 14:27:48.216210 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 14:27:48.219929 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 14:27:48.226190 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 14:27:48.229506 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 14:27:48.232785 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 14:27:48.236183 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 14:27:48.239916 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 14:27:48.246449 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 14:27:48.249640 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 14:27:48.249725
1978 14:27:48.252986 MTRR check
1979 14:27:48.253071 Fixed MTRRs : Enabled
1980 14:27:48.256109 Variable MTRRs: Enabled
1981 14:27:48.256194
1982 14:27:48.259760 call enable_fixed_mtrr()
1983 14:27:48.266147 BS: BS_WRITE_TABLES exit times (exec / console): 48 / 151 ms
1984 14:27:48.269374 CPU physical address size: 39 bits
1985 14:27:48.273710 Checking cr50 for pending updates
1986 14:27:48.277399 MTRR: Fixed MSR 0x250 0x0606060606060606
1987 14:27:48.280714 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 14:27:48.283975 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 14:27:48.290639 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 14:27:48.294332 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 14:27:48.297197 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 14:27:48.300626 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 14:27:48.307230 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 14:27:48.310606 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 14:27:48.313757 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 14:27:48.317125 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 14:27:48.323772 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 14:27:48.327118 MTRR: Fixed MSR 0x258 0x0606060606060606
1999 14:27:48.330499 call enable_fixed_mtrr()
2000 14:27:48.333889 MTRR: Fixed MSR 0x259 0x0000000000000000
2001 14:27:48.336881 MTRR: Fixed MSR 0x268 0x0606060606060606
2002 14:27:48.343480 MTRR: Fixed MSR 0x269 0x0606060606060606
2003 14:27:48.347136 MTRR: Fixed MSR 0x26a 0x0606060606060606
2004 14:27:48.350351 MTRR: Fixed MSR 0x26b 0x0606060606060606
2005 14:27:48.353847 MTRR: Fixed MSR 0x26c 0x0606060606060606
2006 14:27:48.360463 MTRR: Fixed MSR 0x26d 0x0606060606060606
2007 14:27:48.363620 MTRR: Fixed MSR 0x26e 0x0606060606060606
2008 14:27:48.367175 MTRR: Fixed MSR 0x26f 0x0606060606060606
2009 14:27:48.370305 CPU physical address size: 39 bits
2010 14:27:48.374546 call enable_fixed_mtrr()
2011 14:27:48.377806 MTRR: Fixed MSR 0x250 0x0606060606060606
2012 14:27:48.384393 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 14:27:48.387740 MTRR: Fixed MSR 0x258 0x0606060606060606
2014 14:27:48.391362 MTRR: Fixed MSR 0x259 0x0000000000000000
2015 14:27:48.394741 MTRR: Fixed MSR 0x268 0x0606060606060606
2016 14:27:48.401064 MTRR: Fixed MSR 0x269 0x0606060606060606
2017 14:27:48.404736 MTRR: Fixed MSR 0x26a 0x0606060606060606
2018 14:27:48.408181 MTRR: Fixed MSR 0x26b 0x0606060606060606
2019 14:27:48.411059 MTRR: Fixed MSR 0x26c 0x0606060606060606
2020 14:27:48.418115 MTRR: Fixed MSR 0x26d 0x0606060606060606
2021 14:27:48.421010 MTRR: Fixed MSR 0x26e 0x0606060606060606
2022 14:27:48.424368 MTRR: Fixed MSR 0x26f 0x0606060606060606
2023 14:27:48.431134 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 14:27:48.431218 call enable_fixed_mtrr()
2025 14:27:48.437649 MTRR: Fixed MSR 0x259 0x0000000000000000
2026 14:27:48.441531 MTRR: Fixed MSR 0x268 0x0606060606060606
2027 14:27:48.444351 MTRR: Fixed MSR 0x269 0x0606060606060606
2028 14:27:48.447764 MTRR: Fixed MSR 0x26a 0x0606060606060606
2029 14:27:48.451086 MTRR: Fixed MSR 0x26b 0x0606060606060606
2030 14:27:48.457951 MTRR: Fixed MSR 0x26c 0x0606060606060606
2031 14:27:48.461181 MTRR: Fixed MSR 0x26d 0x0606060606060606
2032 14:27:48.464321 MTRR: Fixed MSR 0x26e 0x0606060606060606
2033 14:27:48.467962 MTRR: Fixed MSR 0x26f 0x0606060606060606
2034 14:27:48.471851 CPU physical address size: 39 bits
2035 14:27:48.478670 call enable_fixed_mtrr()
2036 14:27:48.482936 CPU physical address size: 39 bits
2037 14:27:48.483020 Reading cr50 TPM mode
2038 14:27:48.486735 CPU physical address size: 39 bits
2039 14:27:48.490077 MTRR: Fixed MSR 0x250 0x0606060606060606
2040 14:27:48.493276 MTRR: Fixed MSR 0x250 0x0606060606060606
2041 14:27:48.500064 MTRR: Fixed MSR 0x258 0x0606060606060606
2042 14:27:48.503585 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 14:27:48.506407 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 14:27:48.509825 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 14:27:48.516434 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 14:27:48.519698 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 14:27:48.523059 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 14:27:48.526514 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 14:27:48.533190 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 14:27:48.536472 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 14:27:48.539783 MTRR: Fixed MSR 0x258 0x0606060606060606
2052 14:27:48.543143 call enable_fixed_mtrr()
2053 14:27:48.546564 MTRR: Fixed MSR 0x259 0x0000000000000000
2054 14:27:48.553085 MTRR: Fixed MSR 0x268 0x0606060606060606
2055 14:27:48.556243 MTRR: Fixed MSR 0x269 0x0606060606060606
2056 14:27:48.559835 MTRR: Fixed MSR 0x26a 0x0606060606060606
2057 14:27:48.563020 MTRR: Fixed MSR 0x26b 0x0606060606060606
2058 14:27:48.566204 MTRR: Fixed MSR 0x26c 0x0606060606060606
2059 14:27:48.573008 MTRR: Fixed MSR 0x26d 0x0606060606060606
2060 14:27:48.576289 MTRR: Fixed MSR 0x26e 0x0606060606060606
2061 14:27:48.579318 MTRR: Fixed MSR 0x26f 0x0606060606060606
2062 14:27:48.582964 CPU physical address size: 39 bits
2063 14:27:48.589637 call enable_fixed_mtrr()
2064 14:27:48.592952 BS: BS_PAYLOAD_LOAD entry times (exec / console): 215 / 7 ms
2065 14:27:48.596585 CPU physical address size: 39 bits
2066 14:27:48.606254 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2067 14:27:48.609640 Checking segment from ROM address 0xffc02b38
2068 14:27:48.612979 Checking segment from ROM address 0xffc02b54
2069 14:27:48.619711 Loading segment from ROM address 0xffc02b38
2070 14:27:48.619796 code (compression=0)
2071 14:27:48.629506 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2072 14:27:48.639604 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2073 14:27:48.639690 it's not compressed!
2074 14:27:48.779243 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2075 14:27:48.785985 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2076 14:27:48.792571 Loading segment from ROM address 0xffc02b54
2077 14:27:48.792656 Entry Point 0x30000000
2078 14:27:48.796051 Loaded segments
2079 14:27:48.802619 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2080 14:27:48.845680 Finalizing chipset.
2081 14:27:48.848921 Finalizing SMM.
2082 14:27:48.849014 APMC done.
2083 14:27:48.855207 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2084 14:27:48.858558 mp_park_aps done after 0 msecs.
2085 14:27:48.861954 Jumping to boot code at 0x30000000(0x76b25000)
2086 14:27:48.871966 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2087 14:27:48.872058
2088 14:27:48.872123
2089 14:27:48.872223
2090 14:27:48.875141 Starting depthcharge on Voema...
2091 14:27:48.875224
2092 14:27:48.875565 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2093 14:27:48.875658 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2094 14:27:48.875747 Setting prompt string to ['volteer:']
2095 14:27:48.875827 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2096 14:27:48.885184 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2097 14:27:48.885269
2098 14:27:48.891912 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2099 14:27:48.892017
2100 14:27:48.895187 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2101 14:27:48.898696
2102 14:27:48.901821 Failed to find eMMC card reader
2103 14:27:48.901921
2104 14:27:48.901989 Wipe memory regions:
2105 14:27:48.902052
2106 14:27:48.908579 [0x00000000001000, 0x000000000a0000)
2107 14:27:48.908725
2108 14:27:48.911659 [0x00000000100000, 0x00000030000000)
2109 14:27:48.937031
2110 14:27:48.940174 [0x00000032662db0, 0x000000769ef000)
2111 14:27:48.975311
2112 14:27:48.978169 [0x00000100000000, 0x00000280400000)
2113 14:27:49.180352
2114 14:27:49.183707 ec_init: CrosEC protocol v3 supported (256, 256)
2115 14:27:49.183797
2116 14:27:49.190564 update_port_state: port C0 state: usb enable 1 mux conn 0
2117 14:27:49.190649
2118 14:27:49.197273 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2119 14:27:49.201917
2120 14:27:49.205461 pmc_check_ipc_sts: STS_BUSY done after 1562 us
2121 14:27:49.205545
2122 14:27:49.208318 send_conn_disc_msg: pmc_send_cmd succeeded
2123 14:27:49.641303
2124 14:27:49.641435 R8152: Initializing
2125 14:27:49.641504
2126 14:27:49.644684 Version 6 (ocp_data = 5c30)
2127 14:27:49.644829
2128 14:27:49.647915 R8152: Done initializing
2129 14:27:49.647993
2130 14:27:49.651053 Adding net device
2131 14:27:49.952870
2132 14:27:49.956019 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2133 14:27:49.956107
2134 14:27:49.956176
2135 14:27:49.956235
2136 14:27:49.959487 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2138 14:27:50.059889 volteer: tftpboot 192.168.201.1 10607809/tftp-deploy-qu8m7zm4/kernel/bzImage 10607809/tftp-deploy-qu8m7zm4/kernel/cmdline 10607809/tftp-deploy-qu8m7zm4/ramdisk/ramdisk.cpio.gz
2139 14:27:50.060038 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2140 14:27:50.060123 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2141 14:27:50.064086 tftpboot 192.168.201.1 10607809/tftp-deploy-qu8m7zm4/kernel/bzImaploy-qu8m7zm4/kernel/cmdline 10607809/tftp-deploy-qu8m7zm4/ramdisk/ramdisk.cpio.gz
2142 14:27:50.064174
2143 14:27:50.064240 Waiting for link
2144 14:27:50.269841
2145 14:27:50.270035 done.
2146 14:27:50.270157
2147 14:27:50.270273 MAC: 00:24:32:30:78:74
2148 14:27:50.270386
2149 14:27:50.272956 Sending DHCP discover... done.
2150 14:27:50.273052
2151 14:27:50.275864 Waiting for reply... done.
2152 14:27:50.275951
2153 14:27:50.279224 Sending DHCP request... done.
2154 14:27:50.279343
2155 14:27:50.282949 Waiting for reply... done.
2156 14:27:50.283036
2157 14:27:50.286082 My ip is 192.168.201.14
2158 14:27:50.286187
2159 14:27:50.289409 The DHCP server ip is 192.168.201.1
2160 14:27:50.289496
2161 14:27:50.292733 TFTP server IP predefined by user: 192.168.201.1
2162 14:27:50.292844
2163 14:27:50.299156 Bootfile predefined by user: 10607809/tftp-deploy-qu8m7zm4/kernel/bzImage
2164 14:27:50.302414
2165 14:27:50.305702 Sending tftp read request... done.
2166 14:27:50.305803
2167 14:27:50.309645 Waiting for the transfer...
2168 14:27:50.309777
2169 14:27:50.828520 00000000 ################################################################
2170 14:27:50.828666
2171 14:27:51.349022 00080000 ################################################################
2172 14:27:51.349179
2173 14:27:51.864825 00100000 ################################################################
2174 14:27:51.864959
2175 14:27:52.385536 00180000 ################################################################
2176 14:27:52.385668
2177 14:27:52.906750 00200000 ################################################################
2178 14:27:52.906885
2179 14:27:53.424930 00280000 ################################################################
2180 14:27:53.425061
2181 14:27:53.941915 00300000 ################################################################
2182 14:27:53.942097
2183 14:27:54.473942 00380000 ################################################################
2184 14:27:54.474078
2185 14:27:55.005127 00400000 ################################################################
2186 14:27:55.005324
2187 14:27:55.549578 00480000 ################################################################
2188 14:27:55.549714
2189 14:27:56.095099 00500000 ################################################################
2190 14:27:56.095237
2191 14:27:56.628696 00580000 ################################################################
2192 14:27:56.628885
2193 14:27:57.165966 00600000 ################################################################
2194 14:27:57.166110
2195 14:27:57.711714 00680000 ################################################################
2196 14:27:57.711885
2197 14:27:58.267697 00700000 ################################################################
2198 14:27:58.267849
2199 14:27:58.290334 00780000 ### done.
2200 14:27:58.290429
2201 14:27:58.293568 The bootfile was 7884688 bytes long.
2202 14:27:58.293649
2203 14:27:58.296693 Sending tftp read request... done.
2204 14:27:58.296833
2205 14:27:58.300082 Waiting for the transfer...
2206 14:27:58.300170
2207 14:27:58.822373 00000000 ################################################################
2208 14:27:58.822560
2209 14:27:59.341362 00080000 ################################################################
2210 14:27:59.341509
2211 14:27:59.852685 00100000 ################################################################
2212 14:27:59.852869
2213 14:28:00.361779 00180000 ################################################################
2214 14:28:00.361918
2215 14:28:00.872439 00200000 ################################################################
2216 14:28:00.872661
2217 14:28:01.383148 00280000 ################################################################
2218 14:28:01.383313
2219 14:28:01.894030 00300000 ################################################################
2220 14:28:01.894203
2221 14:28:02.405033 00380000 ################################################################
2222 14:28:02.405187
2223 14:28:02.918964 00400000 ################################################################
2224 14:28:02.919124
2225 14:28:03.438646 00480000 ################################################################
2226 14:28:03.438810
2227 14:28:03.955290 00500000 ################################################################
2228 14:28:03.955468
2229 14:28:04.472521 00580000 ################################################################
2230 14:28:04.472692
2231 14:28:05.000734 00600000 ################################################################
2232 14:28:05.000894
2233 14:28:05.543538 00680000 ################################################################
2234 14:28:05.543676
2235 14:28:06.067545 00700000 ################################################################
2236 14:28:06.067698
2237 14:28:06.600424 00780000 ################################################################
2238 14:28:06.600568
2239 14:28:07.038076 00800000 ##################################################### done.
2240 14:28:07.038212
2241 14:28:07.041548 Sending tftp read request... done.
2242 14:28:07.041629
2243 14:28:07.044743 Waiting for the transfer...
2244 14:28:07.044862
2245 14:28:07.048123 00000000 # done.
2246 14:28:07.048224
2247 14:28:07.054787 Command line loaded dynamically from TFTP file: 10607809/tftp-deploy-qu8m7zm4/kernel/cmdline
2248 14:28:07.054872
2249 14:28:07.067977 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2250 14:28:07.074215
2251 14:28:07.077245 Shutting down all USB controllers.
2252 14:28:07.077333
2253 14:28:07.077400 Removing current net device
2254 14:28:07.077463
2255 14:28:07.080560 Finalizing coreboot
2256 14:28:07.080644
2257 14:28:07.086893 Exiting depthcharge with code 4 at timestamp: 26904859
2258 14:28:07.086984
2259 14:28:07.087059
2260 14:28:07.087124 Starting kernel ...
2261 14:28:07.087183
2262 14:28:07.087243
2263 14:28:07.087622 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2264 14:28:07.087722 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2265 14:28:07.087800 Setting prompt string to ['Linux version [0-9]']
2266 14:28:07.087870 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2267 14:28:07.087939 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2269 14:32:33.088640 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2271 14:32:33.089776 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2273 14:32:33.090635 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2276 14:32:33.092045 end: 2 depthcharge-action (duration 00:05:00) [common]
2278 14:32:33.093224 Cleaning after the job
2279 14:32:33.093350 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607809/tftp-deploy-qu8m7zm4/ramdisk
2280 14:32:33.094438 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607809/tftp-deploy-qu8m7zm4/kernel
2281 14:32:33.095377 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10607809/tftp-deploy-qu8m7zm4/modules
2282 14:32:33.095689 start: 5.1 power-off (timeout 00:00:30) [common]
2283 14:32:33.095846 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=off'
2284 14:32:33.174344 >> Command sent successfully.
2285 14:32:33.184490 Returned 0 in 0 seconds
2286 14:32:33.285786 end: 5.1 power-off (duration 00:00:00) [common]
2288 14:32:33.287277 start: 5.2 read-feedback (timeout 00:10:00) [common]
2289 14:32:33.288670 Listened to connection for namespace 'common' for up to 1s
2290 14:32:34.289059 Finalising connection for namespace 'common'
2291 14:32:34.289695 Disconnecting from shell: Finalise
2292 14:32:34.290089
2293 14:32:34.391087 end: 5.2 read-feedback (duration 00:00:01) [common]
2294 14:32:34.391733 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10607809
2295 14:32:34.439728 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10607809
2296 14:32:34.439972 JobError: Your job cannot terminate cleanly.