Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Warnings: 0
- Kernel Errors: 0
1 14:58:21.156481 lava-dispatcher, installed at version: 2023.05.1
2 14:58:21.156698 start: 0 validate
3 14:58:21.156824 Start time: 2023-07-11 14:58:21.156816+00:00 (UTC)
4 14:58:21.156949 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:58:21.157076 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 14:58:21.159784 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:58:21.159917 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1431-g4d27d09c95c37%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:58:24.165706 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:58:24.166498 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1431-g4d27d09c95c37%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 14:58:25.168840 validate duration: 4.01
12 14:58:25.169131 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:58:25.169228 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:58:25.169314 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:58:25.169435 Not decompressing ramdisk as can be used compressed.
16 14:58:25.169519 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 14:58:25.169583 saving as /var/lib/lava/dispatcher/tmp/11061968/tftp-deploy-eutjuem8/ramdisk/rootfs.cpio.gz
18 14:58:25.169642 total size: 8418130 (8MB)
19 14:58:25.170700 progress 0% (0MB)
20 14:58:25.173101 progress 5% (0MB)
21 14:58:25.175396 progress 10% (0MB)
22 14:58:25.178208 progress 15% (1MB)
23 14:58:25.180631 progress 20% (1MB)
24 14:58:25.182920 progress 25% (2MB)
25 14:58:25.185230 progress 30% (2MB)
26 14:58:25.187382 progress 35% (2MB)
27 14:58:25.189664 progress 40% (3MB)
28 14:58:25.191964 progress 45% (3MB)
29 14:58:25.194250 progress 50% (4MB)
30 14:58:25.196639 progress 55% (4MB)
31 14:58:25.199061 progress 60% (4MB)
32 14:58:25.201109 progress 65% (5MB)
33 14:58:25.203348 progress 70% (5MB)
34 14:58:25.205611 progress 75% (6MB)
35 14:58:25.207857 progress 80% (6MB)
36 14:58:25.210045 progress 85% (6MB)
37 14:58:25.212313 progress 90% (7MB)
38 14:58:25.214505 progress 95% (7MB)
39 14:58:25.216591 progress 100% (8MB)
40 14:58:25.216822 8MB downloaded in 0.05s (170.18MB/s)
41 14:58:25.216980 end: 1.1.1 http-download (duration 00:00:00) [common]
43 14:58:25.217219 end: 1.1 download-retry (duration 00:00:00) [common]
44 14:58:25.217304 start: 1.2 download-retry (timeout 00:10:00) [common]
45 14:58:25.217387 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 14:58:25.217527 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1431-g4d27d09c95c37/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 14:58:25.217598 saving as /var/lib/lava/dispatcher/tmp/11061968/tftp-deploy-eutjuem8/kernel/bzImage
48 14:58:25.217657 total size: 7884688 (7MB)
49 14:58:25.217716 No compression specified
50 14:58:25.218847 progress 0% (0MB)
51 14:58:25.221069 progress 5% (0MB)
52 14:58:25.223243 progress 10% (0MB)
53 14:58:25.225345 progress 15% (1MB)
54 14:58:25.227525 progress 20% (1MB)
55 14:58:25.229655 progress 25% (1MB)
56 14:58:25.231791 progress 30% (2MB)
57 14:58:25.233886 progress 35% (2MB)
58 14:58:25.236020 progress 40% (3MB)
59 14:58:25.238108 progress 45% (3MB)
60 14:58:25.240279 progress 50% (3MB)
61 14:58:25.242353 progress 55% (4MB)
62 14:58:25.244433 progress 60% (4MB)
63 14:58:25.246486 progress 65% (4MB)
64 14:58:25.248528 progress 70% (5MB)
65 14:58:25.250563 progress 75% (5MB)
66 14:58:25.252619 progress 80% (6MB)
67 14:58:25.254655 progress 85% (6MB)
68 14:58:25.256691 progress 90% (6MB)
69 14:58:25.258739 progress 95% (7MB)
70 14:58:25.260797 progress 100% (7MB)
71 14:58:25.260983 7MB downloaded in 0.04s (173.57MB/s)
72 14:58:25.261124 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:58:25.261351 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:58:25.261436 start: 1.3 download-retry (timeout 00:10:00) [common]
76 14:58:25.261524 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 14:58:25.261650 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1431-g4d27d09c95c37/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 14:58:25.261717 saving as /var/lib/lava/dispatcher/tmp/11061968/tftp-deploy-eutjuem8/modules/modules.tar
79 14:58:25.261776 total size: 250436 (0MB)
80 14:58:25.261835 Using unxz to decompress xz
81 14:58:25.266154 progress 13% (0MB)
82 14:58:25.266569 progress 26% (0MB)
83 14:58:25.266832 progress 39% (0MB)
84 14:58:25.268408 progress 52% (0MB)
85 14:58:25.270207 progress 65% (0MB)
86 14:58:25.272213 progress 78% (0MB)
87 14:58:25.273979 progress 91% (0MB)
88 14:58:25.275909 progress 100% (0MB)
89 14:58:25.282064 0MB downloaded in 0.02s (11.78MB/s)
90 14:58:25.282366 end: 1.3.1 http-download (duration 00:00:00) [common]
92 14:58:25.282674 end: 1.3 download-retry (duration 00:00:00) [common]
93 14:58:25.282773 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 14:58:25.282874 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 14:58:25.282959 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 14:58:25.283044 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 14:58:25.283256 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr
98 14:58:25.283390 makedir: /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin
99 14:58:25.283496 makedir: /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/tests
100 14:58:25.283594 makedir: /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/results
101 14:58:25.283705 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-add-keys
102 14:58:25.283851 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-add-sources
103 14:58:25.283983 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-background-process-start
104 14:58:25.284113 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-background-process-stop
105 14:58:25.284238 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-common-functions
106 14:58:25.284362 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-echo-ipv4
107 14:58:25.284534 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-install-packages
108 14:58:25.284698 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-installed-packages
109 14:58:25.284824 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-os-build
110 14:58:25.284949 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-probe-channel
111 14:58:25.285072 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-probe-ip
112 14:58:25.285210 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-target-ip
113 14:58:25.285360 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-target-mac
114 14:58:25.285498 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-target-storage
115 14:58:25.285626 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-test-case
116 14:58:25.285752 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-test-event
117 14:58:25.285877 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-test-feedback
118 14:58:25.286005 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-test-raise
119 14:58:25.286150 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-test-reference
120 14:58:25.286289 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-test-runner
121 14:58:25.286410 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-test-set
122 14:58:25.286535 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-test-shell
123 14:58:25.286703 Updating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-install-packages (oe)
124 14:58:25.286858 Updating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/bin/lava-installed-packages (oe)
125 14:58:25.286979 Creating /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/environment
126 14:58:25.287078 LAVA metadata
127 14:58:25.287152 - LAVA_JOB_ID=11061968
128 14:58:25.287216 - LAVA_DISPATCHER_IP=192.168.201.1
129 14:58:25.287319 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 14:58:25.287389 skipped lava-vland-overlay
131 14:58:25.287464 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 14:58:25.287545 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 14:58:25.287607 skipped lava-multinode-overlay
134 14:58:25.287679 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 14:58:25.287760 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 14:58:25.287837 Loading test definitions
137 14:58:25.287928 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 14:58:25.288005 Using /lava-11061968 at stage 0
139 14:58:25.288334 uuid=11061968_1.4.2.3.1 testdef=None
140 14:58:25.288420 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 14:58:25.288539 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 14:58:25.289138 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 14:58:25.289365 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 14:58:25.290004 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 14:58:25.290232 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 14:58:25.290892 runner path: /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/0/tests/0_dmesg test_uuid 11061968_1.4.2.3.1
149 14:58:25.291045 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 14:58:25.291275 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 14:58:25.291346 Using /lava-11061968 at stage 1
153 14:58:25.291679 uuid=11061968_1.4.2.3.5 testdef=None
154 14:58:25.291766 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 14:58:25.291848 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 14:58:25.292320 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 14:58:25.292569 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 14:58:25.293252 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 14:58:25.293506 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 14:58:25.294134 runner path: /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/1/tests/1_bootrr test_uuid 11061968_1.4.2.3.5
163 14:58:25.294284 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 14:58:25.294492 Creating lava-test-runner.conf files
166 14:58:25.294554 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/0 for stage 0
167 14:58:25.294685 - 0_dmesg
168 14:58:25.294767 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11061968/lava-overlay-fmef05yr/lava-11061968/1 for stage 1
169 14:58:25.294858 - 1_bootrr
170 14:58:25.294951 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 14:58:25.295034 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 14:58:25.303595 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 14:58:25.303712 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 14:58:25.303799 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 14:58:25.303885 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 14:58:25.303971 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 14:58:25.562824 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 14:58:25.563302 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 14:58:25.563463 extracting modules file /var/lib/lava/dispatcher/tmp/11061968/tftp-deploy-eutjuem8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11061968/extract-overlay-ramdisk-tr_kej5l/ramdisk
180 14:58:25.583200 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 14:58:25.583391 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 14:58:25.583515 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11061968/compress-overlay-srbij82v/overlay-1.4.2.4.tar.gz to ramdisk
183 14:58:25.583618 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11061968/compress-overlay-srbij82v/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11061968/extract-overlay-ramdisk-tr_kej5l/ramdisk
184 14:58:25.596856 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 14:58:25.597032 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 14:58:25.597168 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 14:58:25.597298 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 14:58:25.597415 Building ramdisk /var/lib/lava/dispatcher/tmp/11061968/extract-overlay-ramdisk-tr_kej5l/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11061968/extract-overlay-ramdisk-tr_kej5l/ramdisk
189 14:58:25.731047 >> 49788 blocks
190 14:58:26.595390 rename /var/lib/lava/dispatcher/tmp/11061968/extract-overlay-ramdisk-tr_kej5l/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11061968/tftp-deploy-eutjuem8/ramdisk/ramdisk.cpio.gz
191 14:58:26.595840 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 14:58:26.595974 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 14:58:26.596074 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 14:58:26.596166 No mkimage arch provided, not using FIT.
195 14:58:26.596251 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 14:58:26.596333 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 14:58:26.596436 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 14:58:26.596605 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 14:58:26.596703 No LXC device requested
200 14:58:26.596783 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 14:58:26.596870 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 14:58:26.596948 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 14:58:26.597021 Checking files for TFTP limit of 4294967296 bytes.
204 14:58:26.597423 end: 1 tftp-deploy (duration 00:00:01) [common]
205 14:58:26.597520 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 14:58:26.597611 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 14:58:26.597730 substitutions:
208 14:58:26.597795 - {DTB}: None
209 14:58:26.597856 - {INITRD}: 11061968/tftp-deploy-eutjuem8/ramdisk/ramdisk.cpio.gz
210 14:58:26.597916 - {KERNEL}: 11061968/tftp-deploy-eutjuem8/kernel/bzImage
211 14:58:26.597973 - {LAVA_MAC}: None
212 14:58:26.598032 - {PRESEED_CONFIG}: None
213 14:58:26.598088 - {PRESEED_LOCAL}: None
214 14:58:26.598143 - {RAMDISK}: 11061968/tftp-deploy-eutjuem8/ramdisk/ramdisk.cpio.gz
215 14:58:26.598199 - {ROOT_PART}: None
216 14:58:26.598254 - {ROOT}: None
217 14:58:26.598307 - {SERVER_IP}: 192.168.201.1
218 14:58:26.598360 - {TEE}: None
219 14:58:26.598412 Parsed boot commands:
220 14:58:26.598465 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 14:58:26.598657 Parsed boot commands: tftpboot 192.168.201.1 11061968/tftp-deploy-eutjuem8/kernel/bzImage 11061968/tftp-deploy-eutjuem8/kernel/cmdline 11061968/tftp-deploy-eutjuem8/ramdisk/ramdisk.cpio.gz
222 14:58:26.598775 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 14:58:26.598860 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 14:58:26.598951 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 14:58:26.599041 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 14:58:26.599114 Not connected, no need to disconnect.
227 14:58:26.599189 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 14:58:26.599268 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 14:58:26.599339 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-13'
230 14:58:26.603479 Setting prompt string to ['lava-test: # ']
231 14:58:26.603847 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 14:58:26.603954 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 14:58:26.604053 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 14:58:26.604142 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 14:58:26.604334 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=reboot'
236 14:58:31.735878 >> Command sent successfully.
237 14:58:31.738420 Returned 0 in 5 seconds
238 14:58:31.838749 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 14:58:31.839089 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 14:58:31.839192 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 14:58:31.839284 Setting prompt string to 'Starting depthcharge on Voema...'
243 14:58:31.839354 Changing prompt to 'Starting depthcharge on Voema...'
244 14:58:31.839421 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 14:58:31.839684 [Enter `^Ec?' for help]
246 14:58:33.434966
247 14:58:33.435149
248 14:58:33.444979 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 14:58:33.451503 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
250 14:58:33.454788 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 14:58:33.458128 CPU: AES supported, TXT NOT supported, VT supported
252 14:58:33.464768 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 14:58:33.471560 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 14:58:33.475096 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 14:58:33.478455 VBOOT: Loading verstage.
256 14:58:33.481502 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 14:58:33.488102 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 14:58:33.491338 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 14:58:33.501968 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 14:58:33.508160 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 14:58:33.508247
262 14:58:33.508314
263 14:58:33.518997 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 14:58:33.535466 Probing TPM: . done!
265 14:58:33.538874 TPM ready after 0 ms
266 14:58:33.542128 Connected to device vid:did:rid of 1ae0:0028:00
267 14:58:33.553294 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
268 14:58:33.560461 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 14:58:33.563089 Initialized TPM device CR50 revision 0
270 14:58:33.620892 tlcl_send_startup: Startup return code is 0
271 14:58:33.621070 TPM: setup succeeded
272 14:58:33.635192 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 14:58:33.649188 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 14:58:33.662349 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 14:58:33.672024 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 14:58:33.675474 Chrome EC: UHEPI supported
277 14:58:33.679043 Phase 1
278 14:58:33.682472 FMAP: area GBB found @ 1805000 (458752 bytes)
279 14:58:33.692186 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 14:58:33.698873 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 14:58:33.705144 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 14:58:33.712481 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 14:58:33.715706 Recovery requested (1009000e)
284 14:58:33.718973 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 14:58:33.730139 tlcl_extend: response is 0
286 14:58:33.736985 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 14:58:33.746497 tlcl_extend: response is 0
288 14:58:33.753470 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 14:58:33.759825 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 14:58:33.766454 BS: verstage times (exec / console): total (unknown) / 142 ms
291 14:58:33.766541
292 14:58:33.766622
293 14:58:33.779479 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 14:58:33.786553 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 14:58:33.789536 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 14:58:33.792935 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 14:58:33.799959 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 14:58:33.803165 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 14:58:33.806213 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 14:58:33.809586 TCO_STS: 0000 0000
301 14:58:33.812912 GEN_PMCON: d0015038 00002200
302 14:58:33.815880 GBLRST_CAUSE: 00000000 00000000
303 14:58:33.819588 HPR_CAUSE0: 00000000
304 14:58:33.819672 prev_sleep_state 5
305 14:58:33.822765 Boot Count incremented to 19937
306 14:58:33.828976 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 14:58:33.835707 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 14:58:33.845926 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 14:58:33.852658 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 14:58:33.855899 Chrome EC: UHEPI supported
311 14:58:33.862351 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 14:58:33.873236 Probing TPM: done!
313 14:58:33.880351 Connected to device vid:did:rid of 1ae0:0028:00
314 14:58:33.889988 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
315 14:58:33.893593 Initialized TPM device CR50 revision 0
316 14:58:33.908606 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 14:58:33.914931 MRC: Hash idx 0x100b comparison successful.
318 14:58:33.918268 MRC cache found, size faa8
319 14:58:33.918353 bootmode is set to: 2
320 14:58:33.921852 SPD index = 2
321 14:58:33.928619 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 14:58:33.931825 SPD: module type is LPDDR4X
323 14:58:33.934830 SPD: module part number is MT53D1G64D4NW-046
324 14:58:33.942018 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
325 14:58:33.945389 SPD: device width 16 bits, bus width 16 bits
326 14:58:33.951128 SPD: module size is 2048 MB (per channel)
327 14:58:34.380135 CBMEM:
328 14:58:34.383421 IMD: root @ 0x76fff000 254 entries.
329 14:58:34.386537 IMD: root @ 0x76ffec00 62 entries.
330 14:58:34.390415 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 14:58:34.396662 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 14:58:34.400393 External stage cache:
333 14:58:34.403418 IMD: root @ 0x7b3ff000 254 entries.
334 14:58:34.406985 IMD: root @ 0x7b3fec00 62 entries.
335 14:58:34.421502 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 14:58:34.428044 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 14:58:34.434556 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 14:58:34.448567 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 14:58:34.455070 cse_lite: Skip switching to RW in the recovery path
340 14:58:34.455155 8 DIMMs found
341 14:58:34.455222 SMM Memory Map
342 14:58:34.461664 SMRAM : 0x7b000000 0x800000
343 14:58:34.464985 Subregion 0: 0x7b000000 0x200000
344 14:58:34.468233 Subregion 1: 0x7b200000 0x200000
345 14:58:34.471547 Subregion 2: 0x7b400000 0x400000
346 14:58:34.471647 top_of_ram = 0x77000000
347 14:58:34.478253 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 14:58:34.484705 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 14:58:34.488493 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 14:58:34.494903 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 14:58:34.501723 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 14:58:34.507928 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 14:58:34.518128 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 14:58:34.524863 Processing 211 relocs. Offset value of 0x74c0b000
355 14:58:34.531670 BS: romstage times (exec / console): total (unknown) / 277 ms
356 14:58:34.536911
357 14:58:34.537022
358 14:58:34.547391 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 14:58:34.550876 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 14:58:34.557845 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 14:58:34.567357 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 14:58:34.574203 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 14:58:34.580342 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 14:58:34.623562 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 14:58:34.630542 Processing 5008 relocs. Offset value of 0x75d98000
366 14:58:34.633706 BS: postcar times (exec / console): total (unknown) / 59 ms
367 14:58:34.637054
368 14:58:34.637140
369 14:58:34.646931 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 14:58:34.647017 Normal boot
371 14:58:34.650259 FW_CONFIG value is 0x804c02
372 14:58:34.653227 PCI: 00:07.0 disabled by fw_config
373 14:58:34.657416 PCI: 00:07.1 disabled by fw_config
374 14:58:34.660294 PCI: 00:0d.2 disabled by fw_config
375 14:58:34.666580 PCI: 00:1c.7 disabled by fw_config
376 14:58:34.669987 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 14:58:34.676853 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 14:58:34.680160 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 14:58:34.686378 GENERIC: 0.0 disabled by fw_config
380 14:58:34.689723 GENERIC: 1.0 disabled by fw_config
381 14:58:34.693379 fw_config match found: DB_USB=USB3_ACTIVE
382 14:58:34.696868 fw_config match found: DB_USB=USB3_ACTIVE
383 14:58:34.700005 fw_config match found: DB_USB=USB3_ACTIVE
384 14:58:34.706752 fw_config match found: DB_USB=USB3_ACTIVE
385 14:58:34.710258 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 14:58:34.716434 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 14:58:34.726430 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 14:58:34.732858 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 14:58:34.736062 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 14:58:34.742579 microcode: Update skipped, already up-to-date
391 14:58:34.749073 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 14:58:34.777303 Detected 4 core, 8 thread CPU.
393 14:58:34.781051 Setting up SMI for CPU
394 14:58:34.783848 IED base = 0x7b400000
395 14:58:34.783957 IED size = 0x00400000
396 14:58:34.787396 Will perform SMM setup.
397 14:58:34.793781 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
398 14:58:34.800347 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 14:58:34.807085 Processing 16 relocs. Offset value of 0x00030000
400 14:58:34.810334 Attempting to start 7 APs
401 14:58:34.813344 Waiting for 10ms after sending INIT.
402 14:58:34.828963 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 14:58:34.832238 AP: slot 4 apic_id 7.
404 14:58:34.835817 AP: slot 5 apic_id 6.
405 14:58:34.835901 AP: slot 3 apic_id 3.
406 14:58:34.839520 AP: slot 7 apic_id 2.
407 14:58:34.842469 AP: slot 2 apic_id 5.
408 14:58:34.842553 done.
409 14:58:34.845403 AP: slot 6 apic_id 4.
410 14:58:34.848932 Waiting for 2nd SIPI to complete...done.
411 14:58:34.855592 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 14:58:34.862033 Processing 13 relocs. Offset value of 0x00038000
413 14:58:34.865507 Unable to locate Global NVS
414 14:58:34.872158 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 14:58:34.875176 Installing permanent SMM handler to 0x7b000000
416 14:58:34.885367 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 14:58:34.888603 Processing 794 relocs. Offset value of 0x7b010000
418 14:58:34.898438 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 14:58:34.902159 Processing 13 relocs. Offset value of 0x7b008000
420 14:58:34.908770 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 14:58:34.915225 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 14:58:34.918330 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 14:58:34.925305 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 14:58:34.931987 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 14:58:34.938532 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 14:58:34.944795 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 14:58:34.948111 Unable to locate Global NVS
428 14:58:34.955213 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 14:58:34.958692 Clearing SMI status registers
430 14:58:34.958775 SMI_STS: PM1
431 14:58:34.961645 PM1_STS: PWRBTN
432 14:58:34.968326 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 14:58:34.971361 In relocation handler: CPU 0
434 14:58:34.974544 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 14:58:34.981567 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 14:58:34.984418 Relocation complete.
437 14:58:34.991283 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 14:58:34.994520 In relocation handler: CPU 1
439 14:58:34.998006 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 14:58:35.001070 Relocation complete.
441 14:58:35.007571 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
442 14:58:35.011677 In relocation handler: CPU 2
443 14:58:35.014379 New SMBASE=0x7afff800 IEDBASE=0x7b400000
444 14:58:35.014483 Relocation complete.
445 14:58:35.024373 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
446 14:58:35.027461 In relocation handler: CPU 6
447 14:58:35.030958 New SMBASE=0x7affe800 IEDBASE=0x7b400000
448 14:58:35.034284 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 14:58:35.037714 Relocation complete.
450 14:58:35.044148 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
451 14:58:35.047543 In relocation handler: CPU 4
452 14:58:35.050916 New SMBASE=0x7afff000 IEDBASE=0x7b400000
453 14:58:35.054250 Relocation complete.
454 14:58:35.060475 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
455 14:58:35.064598 In relocation handler: CPU 5
456 14:58:35.067551 New SMBASE=0x7affec00 IEDBASE=0x7b400000
457 14:58:35.073673 Writing SMRR. base = 0x7b000006, mask=0xff800c00
458 14:58:35.073760 Relocation complete.
459 14:58:35.083706 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
460 14:58:35.083801 In relocation handler: CPU 7
461 14:58:35.090481 New SMBASE=0x7affe400 IEDBASE=0x7b400000
462 14:58:35.093796 Writing SMRR. base = 0x7b000006, mask=0xff800c00
463 14:58:35.096959 Relocation complete.
464 14:58:35.103421 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
465 14:58:35.106632 In relocation handler: CPU 3
466 14:58:35.110286 New SMBASE=0x7afff400 IEDBASE=0x7b400000
467 14:58:35.113226 Relocation complete.
468 14:58:35.113312 Initializing CPU #0
469 14:58:35.116811 CPU: vendor Intel device 806c1
470 14:58:35.124031 CPU: family 06, model 8c, stepping 01
471 14:58:35.124136 Clearing out pending MCEs
472 14:58:35.126841 Setting up local APIC...
473 14:58:35.130139 apic_id: 0x00 done.
474 14:58:35.133625 Turbo is available but hidden
475 14:58:35.136913 Turbo is available and visible
476 14:58:35.140280 microcode: Update skipped, already up-to-date
477 14:58:35.143406 CPU #0 initialized
478 14:58:35.143490 Initializing CPU #5
479 14:58:35.146582 Initializing CPU #4
480 14:58:35.149822 CPU: vendor Intel device 806c1
481 14:58:35.153634 CPU: family 06, model 8c, stepping 01
482 14:58:35.156281 CPU: vendor Intel device 806c1
483 14:58:35.159860 CPU: family 06, model 8c, stepping 01
484 14:58:35.162965 Clearing out pending MCEs
485 14:58:35.166432 Clearing out pending MCEs
486 14:58:35.169593 Setting up local APIC...
487 14:58:35.169676 Initializing CPU #3
488 14:58:35.173320 Initializing CPU #7
489 14:58:35.176203 CPU: vendor Intel device 806c1
490 14:58:35.179825 CPU: family 06, model 8c, stepping 01
491 14:58:35.182916 CPU: vendor Intel device 806c1
492 14:58:35.186645 CPU: family 06, model 8c, stepping 01
493 14:58:35.189482 Clearing out pending MCEs
494 14:58:35.193321 Clearing out pending MCEs
495 14:58:35.193409 Setting up local APIC...
496 14:58:35.196513 Setting up local APIC...
497 14:58:35.199933 apic_id: 0x03 done.
498 14:58:35.203162 Setting up local APIC...
499 14:58:35.203247 Initializing CPU #2
500 14:58:35.206982 Initializing CPU #6
501 14:58:35.210519 CPU: vendor Intel device 806c1
502 14:58:35.213614 CPU: family 06, model 8c, stepping 01
503 14:58:35.217089 CPU: vendor Intel device 806c1
504 14:58:35.220519 CPU: family 06, model 8c, stepping 01
505 14:58:35.220604 Clearing out pending MCEs
506 14:58:35.223596 Clearing out pending MCEs
507 14:58:35.227312 Setting up local APIC...
508 14:58:35.230112 apic_id: 0x02 done.
509 14:58:35.233640 microcode: Update skipped, already up-to-date
510 14:58:35.237256 microcode: Update skipped, already up-to-date
511 14:58:35.240294 CPU #3 initialized
512 14:58:35.243747 CPU #7 initialized
513 14:58:35.243832 apic_id: 0x06 done.
514 14:58:35.246966 apic_id: 0x07 done.
515 14:58:35.250084 microcode: Update skipped, already up-to-date
516 14:58:35.256835 microcode: Update skipped, already up-to-date
517 14:58:35.256921 CPU #5 initialized
518 14:58:35.260105 Setting up local APIC...
519 14:58:35.263355 CPU #4 initialized
520 14:58:35.263439 apic_id: 0x04 done.
521 14:58:35.266765 apic_id: 0x05 done.
522 14:58:35.269988 microcode: Update skipped, already up-to-date
523 14:58:35.276680 microcode: Update skipped, already up-to-date
524 14:58:35.276767 CPU #6 initialized
525 14:58:35.280544 CPU #2 initialized
526 14:58:35.283505 Initializing CPU #1
527 14:58:35.286496 CPU: vendor Intel device 806c1
528 14:58:35.289803 CPU: family 06, model 8c, stepping 01
529 14:58:35.289888 Clearing out pending MCEs
530 14:58:35.293410 Setting up local APIC...
531 14:58:35.296894 apic_id: 0x01 done.
532 14:58:35.299801 microcode: Update skipped, already up-to-date
533 14:58:35.303197 CPU #1 initialized
534 14:58:35.306216 bsp_do_flight_plan done after 455 msecs.
535 14:58:35.309792 CPU: frequency set to 4400 MHz
536 14:58:35.312899 Enabling SMIs.
537 14:58:35.319527 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 14:58:35.334620 SATAXPCIE1 indicates PCIe NVMe is present
539 14:58:35.337768 Probing TPM: done!
540 14:58:35.341135 Connected to device vid:did:rid of 1ae0:0028:00
541 14:58:35.351694 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
542 14:58:35.354898 Initialized TPM device CR50 revision 0
543 14:58:35.358594 Enabling S0i3.4
544 14:58:35.364923 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 14:58:35.368367 Found a VBT of 8704 bytes after decompression
546 14:58:35.374740 cse_lite: CSE RO boot. HybridStorageMode disabled
547 14:58:35.381232 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 14:58:35.457524 FSPS returned 0
549 14:58:35.460664 Executing Phase 1 of FspMultiPhaseSiInit
550 14:58:35.470823 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 14:58:35.474070 port C0 DISC req: usage 1 usb3 1 usb2 5
552 14:58:35.477184 Raw Buffer output 0 00000511
553 14:58:35.480234 Raw Buffer output 1 00000000
554 14:58:35.484231 pmc_send_ipc_cmd succeeded
555 14:58:35.490814 port C1 DISC req: usage 1 usb3 2 usb2 3
556 14:58:35.490900 Raw Buffer output 0 00000321
557 14:58:35.494190 Raw Buffer output 1 00000000
558 14:58:35.498755 pmc_send_ipc_cmd succeeded
559 14:58:35.503712 Detected 4 core, 8 thread CPU.
560 14:58:35.506657 Detected 4 core, 8 thread CPU.
561 14:58:35.707132 Display FSP Version Info HOB
562 14:58:35.710225 Reference Code - CPU = a.0.4c.31
563 14:58:35.713612 uCode Version = 0.0.0.86
564 14:58:35.717435 TXT ACM version = ff.ff.ff.ffff
565 14:58:35.720013 Reference Code - ME = a.0.4c.31
566 14:58:35.723396 MEBx version = 0.0.0.0
567 14:58:35.727064 ME Firmware Version = Consumer SKU
568 14:58:35.730389 Reference Code - PCH = a.0.4c.31
569 14:58:35.733725 PCH-CRID Status = Disabled
570 14:58:35.736987 PCH-CRID Original Value = ff.ff.ff.ffff
571 14:58:35.740178 PCH-CRID New Value = ff.ff.ff.ffff
572 14:58:35.743605 OPROM - RST - RAID = ff.ff.ff.ffff
573 14:58:35.746550 PCH Hsio Version = 4.0.0.0
574 14:58:35.749908 Reference Code - SA - System Agent = a.0.4c.31
575 14:58:35.753475 Reference Code - MRC = 2.0.0.1
576 14:58:35.757042 SA - PCIe Version = a.0.4c.31
577 14:58:35.760091 SA-CRID Status = Disabled
578 14:58:35.763169 SA-CRID Original Value = 0.0.0.1
579 14:58:35.766476 SA-CRID New Value = 0.0.0.1
580 14:58:35.770264 OPROM - VBIOS = ff.ff.ff.ffff
581 14:58:35.773532 IO Manageability Engine FW Version = 11.1.4.0
582 14:58:35.776384 PHY Build Version = 0.0.0.e0
583 14:58:35.779805 Thunderbolt(TM) FW Version = 0.0.0.0
584 14:58:35.786701 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 14:58:35.790502 ITSS IRQ Polarities Before:
586 14:58:35.790652 IPC0: 0xffffffff
587 14:58:35.793821 IPC1: 0xffffffff
588 14:58:35.793906 IPC2: 0xffffffff
589 14:58:35.797388 IPC3: 0xffffffff
590 14:58:35.797472 ITSS IRQ Polarities After:
591 14:58:35.800380 IPC0: 0xffffffff
592 14:58:35.803848 IPC1: 0xffffffff
593 14:58:35.803932 IPC2: 0xffffffff
594 14:58:35.807072 IPC3: 0xffffffff
595 14:58:35.810916 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 14:58:35.823999 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 14:58:35.833773 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 14:58:35.847175 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 14:58:35.853065 BS: BS_DEV_INIT_CHIPS run times (exec / console): 292 / 236 ms
600 14:58:35.853156 Enumerating buses...
601 14:58:35.860195 Show all devs... Before device enumeration.
602 14:58:35.860280 Root Device: enabled 1
603 14:58:35.863386 DOMAIN: 0000: enabled 1
604 14:58:35.866547 CPU_CLUSTER: 0: enabled 1
605 14:58:35.870270 PCI: 00:00.0: enabled 1
606 14:58:35.870354 PCI: 00:02.0: enabled 1
607 14:58:35.873410 PCI: 00:04.0: enabled 1
608 14:58:35.876643 PCI: 00:05.0: enabled 1
609 14:58:35.880027 PCI: 00:06.0: enabled 0
610 14:58:35.880111 PCI: 00:07.0: enabled 0
611 14:58:35.882880 PCI: 00:07.1: enabled 0
612 14:58:35.886394 PCI: 00:07.2: enabled 0
613 14:58:35.889551 PCI: 00:07.3: enabled 0
614 14:58:35.889634 PCI: 00:08.0: enabled 1
615 14:58:35.892757 PCI: 00:09.0: enabled 0
616 14:58:35.896280 PCI: 00:0a.0: enabled 0
617 14:58:35.899378 PCI: 00:0d.0: enabled 1
618 14:58:35.899462 PCI: 00:0d.1: enabled 0
619 14:58:35.902651 PCI: 00:0d.2: enabled 0
620 14:58:35.905981 PCI: 00:0d.3: enabled 0
621 14:58:35.909505 PCI: 00:0e.0: enabled 0
622 14:58:35.909589 PCI: 00:10.2: enabled 1
623 14:58:35.913031 PCI: 00:10.6: enabled 0
624 14:58:35.916350 PCI: 00:10.7: enabled 0
625 14:58:35.919316 PCI: 00:12.0: enabled 0
626 14:58:35.919400 PCI: 00:12.6: enabled 0
627 14:58:35.922942 PCI: 00:13.0: enabled 0
628 14:58:35.926280 PCI: 00:14.0: enabled 1
629 14:58:35.926364 PCI: 00:14.1: enabled 0
630 14:58:35.929528 PCI: 00:14.2: enabled 1
631 14:58:35.932587 PCI: 00:14.3: enabled 1
632 14:58:35.935701 PCI: 00:15.0: enabled 1
633 14:58:35.935786 PCI: 00:15.1: enabled 1
634 14:58:35.939534 PCI: 00:15.2: enabled 1
635 14:58:35.942576 PCI: 00:15.3: enabled 1
636 14:58:35.945933 PCI: 00:16.0: enabled 1
637 14:58:35.946041 PCI: 00:16.1: enabled 0
638 14:58:35.949528 PCI: 00:16.2: enabled 0
639 14:58:35.952392 PCI: 00:16.3: enabled 0
640 14:58:35.956289 PCI: 00:16.4: enabled 0
641 14:58:35.956374 PCI: 00:16.5: enabled 0
642 14:58:35.959569 PCI: 00:17.0: enabled 1
643 14:58:35.962457 PCI: 00:19.0: enabled 0
644 14:58:35.962581 PCI: 00:19.1: enabled 1
645 14:58:35.965782 PCI: 00:19.2: enabled 0
646 14:58:35.970715 PCI: 00:1c.0: enabled 1
647 14:58:35.972394 PCI: 00:1c.1: enabled 0
648 14:58:35.972479 PCI: 00:1c.2: enabled 0
649 14:58:35.975928 PCI: 00:1c.3: enabled 0
650 14:58:35.978850 PCI: 00:1c.4: enabled 0
651 14:58:35.982159 PCI: 00:1c.5: enabled 0
652 14:58:35.982248 PCI: 00:1c.6: enabled 1
653 14:58:35.985758 PCI: 00:1c.7: enabled 0
654 14:58:35.989101 PCI: 00:1d.0: enabled 1
655 14:58:35.992717 PCI: 00:1d.1: enabled 0
656 14:58:35.992803 PCI: 00:1d.2: enabled 1
657 14:58:35.995520 PCI: 00:1d.3: enabled 0
658 14:58:35.999603 PCI: 00:1e.0: enabled 1
659 14:58:36.002347 PCI: 00:1e.1: enabled 0
660 14:58:36.002465 PCI: 00:1e.2: enabled 1
661 14:58:36.005470 PCI: 00:1e.3: enabled 1
662 14:58:36.009153 PCI: 00:1f.0: enabled 1
663 14:58:36.009244 PCI: 00:1f.1: enabled 0
664 14:58:36.012459 PCI: 00:1f.2: enabled 1
665 14:58:36.015736 PCI: 00:1f.3: enabled 1
666 14:58:36.018928 PCI: 00:1f.4: enabled 0
667 14:58:36.019015 PCI: 00:1f.5: enabled 1
668 14:58:36.022353 PCI: 00:1f.6: enabled 0
669 14:58:36.025849 PCI: 00:1f.7: enabled 0
670 14:58:36.025937 APIC: 00: enabled 1
671 14:58:36.028952 GENERIC: 0.0: enabled 1
672 14:58:36.031923 GENERIC: 0.0: enabled 1
673 14:58:36.035242 GENERIC: 1.0: enabled 1
674 14:58:36.035332 GENERIC: 0.0: enabled 1
675 14:58:36.038894 GENERIC: 1.0: enabled 1
676 14:58:36.042053 USB0 port 0: enabled 1
677 14:58:36.045492 GENERIC: 0.0: enabled 1
678 14:58:36.045583 USB0 port 0: enabled 1
679 14:58:36.048732 GENERIC: 0.0: enabled 1
680 14:58:36.052129 I2C: 00:1a: enabled 1
681 14:58:36.052216 I2C: 00:31: enabled 1
682 14:58:36.055496 I2C: 00:32: enabled 1
683 14:58:36.058944 I2C: 00:10: enabled 1
684 14:58:36.059030 I2C: 00:15: enabled 1
685 14:58:36.062000 GENERIC: 0.0: enabled 0
686 14:58:36.065859 GENERIC: 1.0: enabled 0
687 14:58:36.068932 GENERIC: 0.0: enabled 1
688 14:58:36.069020 SPI: 00: enabled 1
689 14:58:36.072047 SPI: 00: enabled 1
690 14:58:36.075416 PNP: 0c09.0: enabled 1
691 14:58:36.075502 GENERIC: 0.0: enabled 1
692 14:58:36.078602 USB3 port 0: enabled 1
693 14:58:36.082218 USB3 port 1: enabled 1
694 14:58:36.082303 USB3 port 2: enabled 0
695 14:58:36.085074 USB3 port 3: enabled 0
696 14:58:36.088495 USB2 port 0: enabled 0
697 14:58:36.092102 USB2 port 1: enabled 1
698 14:58:36.092187 USB2 port 2: enabled 1
699 14:58:36.095337 USB2 port 3: enabled 0
700 14:58:36.098536 USB2 port 4: enabled 1
701 14:58:36.098664 USB2 port 5: enabled 0
702 14:58:36.101700 USB2 port 6: enabled 0
703 14:58:36.104913 USB2 port 7: enabled 0
704 14:58:36.104998 USB2 port 8: enabled 0
705 14:58:36.108329 USB2 port 9: enabled 0
706 14:58:36.111611 USB3 port 0: enabled 0
707 14:58:36.115319 USB3 port 1: enabled 1
708 14:58:36.115405 USB3 port 2: enabled 0
709 14:58:36.118280 USB3 port 3: enabled 0
710 14:58:36.122030 GENERIC: 0.0: enabled 1
711 14:58:36.122116 GENERIC: 1.0: enabled 1
712 14:58:36.124911 APIC: 01: enabled 1
713 14:58:36.128582 APIC: 05: enabled 1
714 14:58:36.128668 APIC: 03: enabled 1
715 14:58:36.131752 APIC: 07: enabled 1
716 14:58:36.134835 APIC: 06: enabled 1
717 14:58:36.134921 APIC: 04: enabled 1
718 14:58:36.138199 APIC: 02: enabled 1
719 14:58:36.138310 Compare with tree...
720 14:58:36.141618 Root Device: enabled 1
721 14:58:36.145083 DOMAIN: 0000: enabled 1
722 14:58:36.148499 PCI: 00:00.0: enabled 1
723 14:58:36.148584 PCI: 00:02.0: enabled 1
724 14:58:36.151984 PCI: 00:04.0: enabled 1
725 14:58:36.154837 GENERIC: 0.0: enabled 1
726 14:58:36.158224 PCI: 00:05.0: enabled 1
727 14:58:36.161604 PCI: 00:06.0: enabled 0
728 14:58:36.161715 PCI: 00:07.0: enabled 0
729 14:58:36.164917 GENERIC: 0.0: enabled 1
730 14:58:36.168470 PCI: 00:07.1: enabled 0
731 14:58:36.171782 GENERIC: 1.0: enabled 1
732 14:58:36.174874 PCI: 00:07.2: enabled 0
733 14:58:36.177946 GENERIC: 0.0: enabled 1
734 14:58:36.178057 PCI: 00:07.3: enabled 0
735 14:58:36.181589 GENERIC: 1.0: enabled 1
736 14:58:36.184775 PCI: 00:08.0: enabled 1
737 14:58:36.188091 PCI: 00:09.0: enabled 0
738 14:58:36.191714 PCI: 00:0a.0: enabled 0
739 14:58:36.191799 PCI: 00:0d.0: enabled 1
740 14:58:36.194891 USB0 port 0: enabled 1
741 14:58:36.198125 USB3 port 0: enabled 1
742 14:58:36.201573 USB3 port 1: enabled 1
743 14:58:36.204724 USB3 port 2: enabled 0
744 14:58:36.204808 USB3 port 3: enabled 0
745 14:58:36.207852 PCI: 00:0d.1: enabled 0
746 14:58:36.211230 PCI: 00:0d.2: enabled 0
747 14:58:36.214799 GENERIC: 0.0: enabled 1
748 14:58:36.218032 PCI: 00:0d.3: enabled 0
749 14:58:36.218117 PCI: 00:0e.0: enabled 0
750 14:58:36.221248 PCI: 00:10.2: enabled 1
751 14:58:36.224721 PCI: 00:10.6: enabled 0
752 14:58:36.228132 PCI: 00:10.7: enabled 0
753 14:58:36.231091 PCI: 00:12.0: enabled 0
754 14:58:36.231176 PCI: 00:12.6: enabled 0
755 14:58:36.234449 PCI: 00:13.0: enabled 0
756 14:58:36.237696 PCI: 00:14.0: enabled 1
757 14:58:36.241466 USB0 port 0: enabled 1
758 14:58:36.244528 USB2 port 0: enabled 0
759 14:58:36.244614 USB2 port 1: enabled 1
760 14:58:36.247777 USB2 port 2: enabled 1
761 14:58:36.250783 USB2 port 3: enabled 0
762 14:58:36.254218 USB2 port 4: enabled 1
763 14:58:36.257398 USB2 port 5: enabled 0
764 14:58:36.260759 USB2 port 6: enabled 0
765 14:58:36.260843 USB2 port 7: enabled 0
766 14:58:36.264325 USB2 port 8: enabled 0
767 14:58:36.267579 USB2 port 9: enabled 0
768 14:58:36.270821 USB3 port 0: enabled 0
769 14:58:36.274063 USB3 port 1: enabled 1
770 14:58:36.277408 USB3 port 2: enabled 0
771 14:58:36.277494 USB3 port 3: enabled 0
772 14:58:36.280744 PCI: 00:14.1: enabled 0
773 14:58:36.284405 PCI: 00:14.2: enabled 1
774 14:58:36.287777 PCI: 00:14.3: enabled 1
775 14:58:36.290559 GENERIC: 0.0: enabled 1
776 14:58:36.290688 PCI: 00:15.0: enabled 1
777 14:58:36.293838 I2C: 00:1a: enabled 1
778 14:58:36.297200 I2C: 00:31: enabled 1
779 14:58:36.300387 I2C: 00:32: enabled 1
780 14:58:36.303939 PCI: 00:15.1: enabled 1
781 14:58:36.304023 I2C: 00:10: enabled 1
782 14:58:36.307105 PCI: 00:15.2: enabled 1
783 14:58:36.310490 PCI: 00:15.3: enabled 1
784 14:58:36.313867 PCI: 00:16.0: enabled 1
785 14:58:36.316903 PCI: 00:16.1: enabled 0
786 14:58:36.316988 PCI: 00:16.2: enabled 0
787 14:58:36.320405 PCI: 00:16.3: enabled 0
788 14:58:36.323756 PCI: 00:16.4: enabled 0
789 14:58:36.327571 PCI: 00:16.5: enabled 0
790 14:58:36.327664 PCI: 00:17.0: enabled 1
791 14:58:36.330454 PCI: 00:19.0: enabled 0
792 14:58:36.333543 PCI: 00:19.1: enabled 1
793 14:58:36.337249 I2C: 00:15: enabled 1
794 14:58:36.340122 PCI: 00:19.2: enabled 0
795 14:58:36.340215 PCI: 00:1d.0: enabled 1
796 14:58:36.343831 GENERIC: 0.0: enabled 1
797 14:58:36.347113 PCI: 00:1e.0: enabled 1
798 14:58:36.350449 PCI: 00:1e.1: enabled 0
799 14:58:36.353475 PCI: 00:1e.2: enabled 1
800 14:58:36.353562 SPI: 00: enabled 1
801 14:58:36.356811 PCI: 00:1e.3: enabled 1
802 14:58:36.360088 SPI: 00: enabled 1
803 14:58:36.363439 PCI: 00:1f.0: enabled 1
804 14:58:36.363523 PNP: 0c09.0: enabled 1
805 14:58:36.366555 PCI: 00:1f.1: enabled 0
806 14:58:36.370486 PCI: 00:1f.2: enabled 1
807 14:58:36.373380 GENERIC: 0.0: enabled 1
808 14:58:36.376742 GENERIC: 0.0: enabled 1
809 14:58:36.376828 GENERIC: 1.0: enabled 1
810 14:58:36.380297 PCI: 00:1f.3: enabled 1
811 14:58:36.383492 PCI: 00:1f.4: enabled 0
812 14:58:36.386783 PCI: 00:1f.5: enabled 1
813 14:58:36.438572 PCI: 00:1f.6: enabled 0
814 14:58:36.438726 PCI: 00:1f.7: enabled 0
815 14:58:36.438799 CPU_CLUSTER: 0: enabled 1
816 14:58:36.439052 APIC: 00: enabled 1
817 14:58:36.439124 APIC: 01: enabled 1
818 14:58:36.439216 APIC: 05: enabled 1
819 14:58:36.439281 APIC: 03: enabled 1
820 14:58:36.439341 APIC: 07: enabled 1
821 14:58:36.439669 APIC: 06: enabled 1
822 14:58:36.439753 APIC: 04: enabled 1
823 14:58:36.439820 APIC: 02: enabled 1
824 14:58:36.440081 Root Device scanning...
825 14:58:36.440189 scan_static_bus for Root Device
826 14:58:36.440284 DOMAIN: 0000 enabled
827 14:58:36.440374 CPU_CLUSTER: 0 enabled
828 14:58:36.440462 DOMAIN: 0000 scanning...
829 14:58:36.440975 PCI: pci_scan_bus for bus 00
830 14:58:36.441085 PCI: 00:00.0 [8086/0000] ops
831 14:58:36.441419 PCI: 00:00.0 [8086/9a12] enabled
832 14:58:36.441519 PCI: 00:02.0 [8086/0000] bus ops
833 14:58:36.457529 PCI: 00:02.0 [8086/9a40] enabled
834 14:58:36.457665 PCI: 00:04.0 [8086/0000] bus ops
835 14:58:36.457919 PCI: 00:04.0 [8086/9a03] enabled
836 14:58:36.457986 PCI: 00:05.0 [8086/9a19] enabled
837 14:58:36.458342 PCI: 00:07.0 [0000/0000] hidden
838 14:58:36.460951 PCI: 00:08.0 [8086/9a11] enabled
839 14:58:36.461036 PCI: 00:0a.0 [8086/9a0d] disabled
840 14:58:36.464409 PCI: 00:0d.0 [8086/0000] bus ops
841 14:58:36.467797 PCI: 00:0d.0 [8086/9a13] enabled
842 14:58:36.470940 PCI: 00:14.0 [8086/0000] bus ops
843 14:58:36.474184 PCI: 00:14.0 [8086/a0ed] enabled
844 14:58:36.477704 PCI: 00:14.2 [8086/a0ef] enabled
845 14:58:36.481187 PCI: 00:14.3 [8086/0000] bus ops
846 14:58:36.484311 PCI: 00:14.3 [8086/a0f0] enabled
847 14:58:36.487717 PCI: 00:15.0 [8086/0000] bus ops
848 14:58:36.490911 PCI: 00:15.0 [8086/a0e8] enabled
849 14:58:36.494106 PCI: 00:15.1 [8086/0000] bus ops
850 14:58:36.497611 PCI: 00:15.1 [8086/a0e9] enabled
851 14:58:36.500915 PCI: 00:15.2 [8086/0000] bus ops
852 14:58:36.504493 PCI: 00:15.2 [8086/a0ea] enabled
853 14:58:36.507639 PCI: 00:15.3 [8086/0000] bus ops
854 14:58:36.510892 PCI: 00:15.3 [8086/a0eb] enabled
855 14:58:36.514362 PCI: 00:16.0 [8086/0000] ops
856 14:58:36.517382 PCI: 00:16.0 [8086/a0e0] enabled
857 14:58:36.524012 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 14:58:36.527726 PCI: 00:19.0 [8086/0000] bus ops
859 14:58:36.530505 PCI: 00:19.0 [8086/a0c5] disabled
860 14:58:36.534086 PCI: 00:19.1 [8086/0000] bus ops
861 14:58:36.537189 PCI: 00:19.1 [8086/a0c6] enabled
862 14:58:36.540675 PCI: 00:1d.0 [8086/0000] bus ops
863 14:58:36.544017 PCI: 00:1d.0 [8086/a0b0] enabled
864 14:58:36.547047 PCI: 00:1e.0 [8086/0000] ops
865 14:58:36.550463 PCI: 00:1e.0 [8086/a0a8] enabled
866 14:58:36.553584 PCI: 00:1e.2 [8086/0000] bus ops
867 14:58:36.557136 PCI: 00:1e.2 [8086/a0aa] enabled
868 14:58:36.560374 PCI: 00:1e.3 [8086/0000] bus ops
869 14:58:36.563625 PCI: 00:1e.3 [8086/a0ab] enabled
870 14:58:36.567096 PCI: 00:1f.0 [8086/0000] bus ops
871 14:58:36.570463 PCI: 00:1f.0 [8086/a087] enabled
872 14:58:36.573281 RTC Init
873 14:58:36.576786 Set power on after power failure.
874 14:58:36.576882 Disabling Deep S3
875 14:58:36.580105 Disabling Deep S3
876 14:58:36.580193 Disabling Deep S4
877 14:58:36.583723 Disabling Deep S4
878 14:58:36.583807 Disabling Deep S5
879 14:58:36.586790 Disabling Deep S5
880 14:58:36.589766 PCI: 00:1f.2 [0000/0000] hidden
881 14:58:36.593310 PCI: 00:1f.3 [8086/0000] bus ops
882 14:58:36.597172 PCI: 00:1f.3 [8086/a0c8] enabled
883 14:58:36.599903 PCI: 00:1f.5 [8086/0000] bus ops
884 14:58:36.603118 PCI: 00:1f.5 [8086/a0a4] enabled
885 14:58:36.606559 PCI: Leftover static devices:
886 14:58:36.606711 PCI: 00:10.2
887 14:58:36.609775 PCI: 00:10.6
888 14:58:36.609860 PCI: 00:10.7
889 14:58:36.613185 PCI: 00:06.0
890 14:58:36.613268 PCI: 00:07.1
891 14:58:36.616327 PCI: 00:07.2
892 14:58:36.616411 PCI: 00:07.3
893 14:58:36.616477 PCI: 00:09.0
894 14:58:36.619901 PCI: 00:0d.1
895 14:58:36.619984 PCI: 00:0d.2
896 14:58:36.623088 PCI: 00:0d.3
897 14:58:36.623171 PCI: 00:0e.0
898 14:58:36.623237 PCI: 00:12.0
899 14:58:36.626161 PCI: 00:12.6
900 14:58:36.626244 PCI: 00:13.0
901 14:58:36.629684 PCI: 00:14.1
902 14:58:36.629768 PCI: 00:16.1
903 14:58:36.629833 PCI: 00:16.2
904 14:58:36.633012 PCI: 00:16.3
905 14:58:36.633097 PCI: 00:16.4
906 14:58:36.636101 PCI: 00:16.5
907 14:58:36.636211 PCI: 00:17.0
908 14:58:36.639574 PCI: 00:19.2
909 14:58:36.639658 PCI: 00:1e.1
910 14:58:36.639724 PCI: 00:1f.1
911 14:58:36.642678 PCI: 00:1f.4
912 14:58:36.642762 PCI: 00:1f.6
913 14:58:36.646434 PCI: 00:1f.7
914 14:58:36.649563 PCI: Check your devicetree.cb.
915 14:58:36.649646 PCI: 00:02.0 scanning...
916 14:58:36.653092 scan_generic_bus for PCI: 00:02.0
917 14:58:36.659497 scan_generic_bus for PCI: 00:02.0 done
918 14:58:36.662746 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 14:58:36.665898 PCI: 00:04.0 scanning...
920 14:58:36.669163 scan_generic_bus for PCI: 00:04.0
921 14:58:36.672980 GENERIC: 0.0 enabled
922 14:58:36.675850 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 14:58:36.682304 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 14:58:36.685706 PCI: 00:0d.0 scanning...
925 14:58:36.689047 scan_static_bus for PCI: 00:0d.0
926 14:58:36.689135 USB0 port 0 enabled
927 14:58:36.692570 USB0 port 0 scanning...
928 14:58:36.695557 scan_static_bus for USB0 port 0
929 14:58:36.698692 USB3 port 0 enabled
930 14:58:36.698781 USB3 port 1 enabled
931 14:58:36.702125 USB3 port 2 disabled
932 14:58:36.705329 USB3 port 3 disabled
933 14:58:36.705415 USB3 port 0 scanning...
934 14:58:36.708992 scan_static_bus for USB3 port 0
935 14:58:36.715736 scan_static_bus for USB3 port 0 done
936 14:58:36.718893 scan_bus: bus USB3 port 0 finished in 6 msecs
937 14:58:36.722347 USB3 port 1 scanning...
938 14:58:36.725779 scan_static_bus for USB3 port 1
939 14:58:36.729012 scan_static_bus for USB3 port 1 done
940 14:58:36.732439 scan_bus: bus USB3 port 1 finished in 6 msecs
941 14:58:36.735356 scan_static_bus for USB0 port 0 done
942 14:58:36.742211 scan_bus: bus USB0 port 0 finished in 43 msecs
943 14:58:36.745437 scan_static_bus for PCI: 00:0d.0 done
944 14:58:36.748355 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 14:58:36.752235 PCI: 00:14.0 scanning...
946 14:58:36.755307 scan_static_bus for PCI: 00:14.0
947 14:58:36.758429 USB0 port 0 enabled
948 14:58:36.761685 USB0 port 0 scanning...
949 14:58:36.764835 scan_static_bus for USB0 port 0
950 14:58:36.764929 USB2 port 0 disabled
951 14:58:36.768227 USB2 port 1 enabled
952 14:58:36.771829 USB2 port 2 enabled
953 14:58:36.771921 USB2 port 3 disabled
954 14:58:36.774706 USB2 port 4 enabled
955 14:58:36.774791 USB2 port 5 disabled
956 14:58:36.778333 USB2 port 6 disabled
957 14:58:36.781800 USB2 port 7 disabled
958 14:58:36.781890 USB2 port 8 disabled
959 14:58:36.785199 USB2 port 9 disabled
960 14:58:36.788504 USB3 port 0 disabled
961 14:58:36.788594 USB3 port 1 enabled
962 14:58:36.791376 USB3 port 2 disabled
963 14:58:36.795039 USB3 port 3 disabled
964 14:58:36.795128 USB2 port 1 scanning...
965 14:58:36.797915 scan_static_bus for USB2 port 1
966 14:58:36.804595 scan_static_bus for USB2 port 1 done
967 14:58:36.808093 scan_bus: bus USB2 port 1 finished in 6 msecs
968 14:58:36.811334 USB2 port 2 scanning...
969 14:58:36.814482 scan_static_bus for USB2 port 2
970 14:58:36.818003 scan_static_bus for USB2 port 2 done
971 14:58:36.821561 scan_bus: bus USB2 port 2 finished in 6 msecs
972 14:58:36.824471 USB2 port 4 scanning...
973 14:58:36.827997 scan_static_bus for USB2 port 4
974 14:58:36.831462 scan_static_bus for USB2 port 4 done
975 14:58:36.834599 scan_bus: bus USB2 port 4 finished in 6 msecs
976 14:58:36.837640 USB3 port 1 scanning...
977 14:58:36.841438 scan_static_bus for USB3 port 1
978 14:58:36.844453 scan_static_bus for USB3 port 1 done
979 14:58:36.851194 scan_bus: bus USB3 port 1 finished in 6 msecs
980 14:58:36.854393 scan_static_bus for USB0 port 0 done
981 14:58:36.857820 scan_bus: bus USB0 port 0 finished in 93 msecs
982 14:58:36.860873 scan_static_bus for PCI: 00:14.0 done
983 14:58:36.867621 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
984 14:58:36.870626 PCI: 00:14.3 scanning...
985 14:58:36.874106 scan_static_bus for PCI: 00:14.3
986 14:58:36.874192 GENERIC: 0.0 enabled
987 14:58:36.880907 scan_static_bus for PCI: 00:14.3 done
988 14:58:36.884345 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 14:58:36.887413 PCI: 00:15.0 scanning...
990 14:58:36.890512 scan_static_bus for PCI: 00:15.0
991 14:58:36.890613 I2C: 00:1a enabled
992 14:58:36.894014 I2C: 00:31 enabled
993 14:58:36.897033 I2C: 00:32 enabled
994 14:58:36.900273 scan_static_bus for PCI: 00:15.0 done
995 14:58:36.903526 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 14:58:36.907221 PCI: 00:15.1 scanning...
997 14:58:36.910410 scan_static_bus for PCI: 00:15.1
998 14:58:36.913660 I2C: 00:10 enabled
999 14:58:36.917008 scan_static_bus for PCI: 00:15.1 done
1000 14:58:36.920349 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 14:58:36.923656 PCI: 00:15.2 scanning...
1002 14:58:36.926654 scan_static_bus for PCI: 00:15.2
1003 14:58:36.930325 scan_static_bus for PCI: 00:15.2 done
1004 14:58:36.936711 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 14:58:36.936796 PCI: 00:15.3 scanning...
1006 14:58:36.940412 scan_static_bus for PCI: 00:15.3
1007 14:58:36.946761 scan_static_bus for PCI: 00:15.3 done
1008 14:58:36.950070 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 14:58:36.953391 PCI: 00:19.1 scanning...
1010 14:58:36.956537 scan_static_bus for PCI: 00:19.1
1011 14:58:36.960079 I2C: 00:15 enabled
1012 14:58:36.963332 scan_static_bus for PCI: 00:19.1 done
1013 14:58:36.966430 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 14:58:36.970054 PCI: 00:1d.0 scanning...
1015 14:58:36.973412 do_pci_scan_bridge for PCI: 00:1d.0
1016 14:58:36.976513 PCI: pci_scan_bus for bus 01
1017 14:58:36.979991 PCI: 01:00.0 [15b7/5009] enabled
1018 14:58:36.983089 GENERIC: 0.0 enabled
1019 14:58:36.986327 Enabling Common Clock Configuration
1020 14:58:36.989883 L1 Sub-State supported from root port 29
1021 14:58:36.992838 L1 Sub-State Support = 0x5
1022 14:58:36.996019 CommonModeRestoreTime = 0x28
1023 14:58:36.999473 Power On Value = 0x16, Power On Scale = 0x0
1024 14:58:37.002756 ASPM: Enabled L1
1025 14:58:37.006342 PCIe: Max_Payload_Size adjusted to 128
1026 14:58:37.009678 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 14:58:37.012628 PCI: 00:1e.2 scanning...
1028 14:58:37.015802 scan_generic_bus for PCI: 00:1e.2
1029 14:58:37.019191 SPI: 00 enabled
1030 14:58:37.022716 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 14:58:37.029481 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 14:58:37.032726 PCI: 00:1e.3 scanning...
1033 14:58:37.036704 scan_generic_bus for PCI: 00:1e.3
1034 14:58:37.036789 SPI: 00 enabled
1035 14:58:37.043017 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 14:58:37.046389 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 14:58:37.049756 PCI: 00:1f.0 scanning...
1038 14:58:37.053250 scan_static_bus for PCI: 00:1f.0
1039 14:58:37.056705 PNP: 0c09.0 enabled
1040 14:58:37.059960 PNP: 0c09.0 scanning...
1041 14:58:37.063080 scan_static_bus for PNP: 0c09.0
1042 14:58:37.066664 scan_static_bus for PNP: 0c09.0 done
1043 14:58:37.070150 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 14:58:37.073022 scan_static_bus for PCI: 00:1f.0 done
1045 14:58:37.079384 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 14:58:37.079476 PCI: 00:1f.2 scanning...
1047 14:58:37.082855 scan_static_bus for PCI: 00:1f.2
1048 14:58:37.086916 GENERIC: 0.0 enabled
1049 14:58:37.089627 GENERIC: 0.0 scanning...
1050 14:58:37.093343 scan_static_bus for GENERIC: 0.0
1051 14:58:37.096357 GENERIC: 0.0 enabled
1052 14:58:37.096499 GENERIC: 1.0 enabled
1053 14:58:37.099651 scan_static_bus for GENERIC: 0.0 done
1054 14:58:37.106670 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 14:58:37.109757 scan_static_bus for PCI: 00:1f.2 done
1056 14:58:37.112965 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 14:58:37.116219 PCI: 00:1f.3 scanning...
1058 14:58:37.119518 scan_static_bus for PCI: 00:1f.3
1059 14:58:37.122575 scan_static_bus for PCI: 00:1f.3 done
1060 14:58:37.129685 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 14:58:37.132639 PCI: 00:1f.5 scanning...
1062 14:58:37.135820 scan_generic_bus for PCI: 00:1f.5
1063 14:58:37.139662 scan_generic_bus for PCI: 00:1f.5 done
1064 14:58:37.142406 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 14:58:37.149077 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1066 14:58:37.152562 scan_static_bus for Root Device done
1067 14:58:37.156015 scan_bus: bus Root Device finished in 736 msecs
1068 14:58:37.159416 done
1069 14:58:37.166010 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1070 14:58:37.166189 Chrome EC: UHEPI supported
1071 14:58:37.173174 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 14:58:37.178806 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 14:58:37.182570 SPI flash protection: WPSW=0 SRP0=1
1074 14:58:37.189072 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 14:58:37.192695 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 14:58:37.195949 found VGA at PCI: 00:02.0
1077 14:58:37.199051 Setting up VGA for PCI: 00:02.0
1078 14:58:37.205915 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 14:58:37.209137 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 14:58:37.212470 Allocating resources...
1081 14:58:37.215776 Reading resources...
1082 14:58:37.218910 Root Device read_resources bus 0 link: 0
1083 14:58:37.222531 DOMAIN: 0000 read_resources bus 0 link: 0
1084 14:58:37.228815 PCI: 00:04.0 read_resources bus 1 link: 0
1085 14:58:37.232209 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 14:58:37.239171 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 14:58:37.242241 USB0 port 0 read_resources bus 0 link: 0
1088 14:58:37.248885 USB0 port 0 read_resources bus 0 link: 0 done
1089 14:58:37.252342 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 14:58:37.258873 PCI: 00:14.0 read_resources bus 0 link: 0
1091 14:58:37.262179 USB0 port 0 read_resources bus 0 link: 0
1092 14:58:37.268789 USB0 port 0 read_resources bus 0 link: 0 done
1093 14:58:37.272184 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 14:58:37.279007 PCI: 00:14.3 read_resources bus 0 link: 0
1095 14:58:37.281457 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 14:58:37.288342 PCI: 00:15.0 read_resources bus 0 link: 0
1097 14:58:37.291277 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 14:58:37.298478 PCI: 00:15.1 read_resources bus 0 link: 0
1099 14:58:37.301281 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 14:58:37.308354 PCI: 00:19.1 read_resources bus 0 link: 0
1101 14:58:37.311291 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 14:58:37.318256 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 14:58:37.321458 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 14:58:37.327952 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 14:58:37.331661 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 14:58:37.338008 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 14:58:37.341526 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 14:58:37.347930 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 14:58:37.351476 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 14:58:37.358099 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 14:58:37.361444 GENERIC: 0.0 read_resources bus 0 link: 0
1112 14:58:37.367414 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 14:58:37.371106 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 14:58:37.377517 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 14:58:37.380702 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 14:58:37.387416 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 14:58:37.390979 Root Device read_resources bus 0 link: 0 done
1118 14:58:37.394080 Done reading resources.
1119 14:58:37.401068 Show resources in subtree (Root Device)...After reading.
1120 14:58:37.404104 Root Device child on link 0 DOMAIN: 0000
1121 14:58:37.406956 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 14:58:37.417286 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 14:58:37.427456 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 14:58:37.427932 PCI: 00:00.0
1125 14:58:37.437293 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 14:58:37.447059 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 14:58:37.457220 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 14:58:37.467047 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 14:58:37.477238 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 14:58:37.486865 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 14:58:37.493253 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 14:58:37.503277 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 14:58:37.513310 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 14:58:37.523513 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 14:58:37.532922 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 14:58:37.543191 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 14:58:37.549852 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 14:58:37.559479 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 14:58:37.569384 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 14:58:37.579367 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 14:58:37.589147 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 14:58:37.599152 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 14:58:37.605825 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 14:58:37.616002 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 14:58:37.618946 PCI: 00:02.0
1146 14:58:37.629180 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 14:58:37.639123 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 14:58:37.649614 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 14:58:37.652839 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 14:58:37.662267 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 14:58:37.665746 GENERIC: 0.0
1152 14:58:37.666263 PCI: 00:05.0
1153 14:58:37.675921 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 14:58:37.681954 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 14:58:37.682346 GENERIC: 0.0
1156 14:58:37.685203 PCI: 00:08.0
1157 14:58:37.695631 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 14:58:37.696117 PCI: 00:0a.0
1159 14:58:37.698891 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 14:58:37.708254 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 14:58:37.715059 USB0 port 0 child on link 0 USB3 port 0
1162 14:58:37.715448 USB3 port 0
1163 14:58:37.718244 USB3 port 1
1164 14:58:37.718662 USB3 port 2
1165 14:58:37.721666 USB3 port 3
1166 14:58:37.725207 PCI: 00:14.0 child on link 0 USB0 port 0
1167 14:58:37.735243 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 14:58:37.741177 USB0 port 0 child on link 0 USB2 port 0
1169 14:58:37.741568 USB2 port 0
1170 14:58:37.744495 USB2 port 1
1171 14:58:37.744969 USB2 port 2
1172 14:58:37.748184 USB2 port 3
1173 14:58:37.748567 USB2 port 4
1174 14:58:37.751757 USB2 port 5
1175 14:58:37.752138 USB2 port 6
1176 14:58:37.754726 USB2 port 7
1177 14:58:37.755370 USB2 port 8
1178 14:58:37.757882 USB2 port 9
1179 14:58:37.761384 USB3 port 0
1180 14:58:37.761763 USB3 port 1
1181 14:58:37.764609 USB3 port 2
1182 14:58:37.765074 USB3 port 3
1183 14:58:37.767547 PCI: 00:14.2
1184 14:58:37.777718 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 14:58:37.787508 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 14:58:37.791115 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 14:58:37.800929 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 14:58:37.804048 GENERIC: 0.0
1189 14:58:37.807229 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 14:58:37.817225 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 14:58:37.817399 I2C: 00:1a
1192 14:58:37.820110 I2C: 00:31
1193 14:58:37.820281 I2C: 00:32
1194 14:58:37.826872 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 14:58:37.836743 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 14:58:37.837016 I2C: 00:10
1197 14:58:37.840020 PCI: 00:15.2
1198 14:58:37.850122 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 14:58:37.850370 PCI: 00:15.3
1200 14:58:37.860238 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 14:58:37.863660 PCI: 00:16.0
1202 14:58:37.873110 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 14:58:37.873437 PCI: 00:19.0
1204 14:58:37.876526 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 14:58:37.886516 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 14:58:37.890043 I2C: 00:15
1207 14:58:37.893008 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 14:58:37.903173 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 14:58:37.913314 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 14:58:37.922983 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 14:58:37.923282 GENERIC: 0.0
1212 14:58:37.926512 PCI: 01:00.0
1213 14:58:37.935923 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 14:58:37.945991 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1215 14:58:37.946296 PCI: 00:1e.0
1216 14:58:37.959352 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1217 14:58:37.962750 PCI: 00:1e.2 child on link 0 SPI: 00
1218 14:58:37.972515 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 14:58:37.972887 SPI: 00
1220 14:58:37.975703 PCI: 00:1e.3 child on link 0 SPI: 00
1221 14:58:37.985925 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 14:58:37.989545 SPI: 00
1223 14:58:37.992135 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1224 14:58:38.002326 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1225 14:58:38.002952 PNP: 0c09.0
1226 14:58:38.012248 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1227 14:58:38.015674 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1228 14:58:38.025396 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1229 14:58:38.035383 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1230 14:58:38.038641 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1231 14:58:38.041740 GENERIC: 0.0
1232 14:58:38.042180 GENERIC: 1.0
1233 14:58:38.045785 PCI: 00:1f.3
1234 14:58:38.055152 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1235 14:58:38.065118 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1236 14:58:38.069050 PCI: 00:1f.5
1237 14:58:38.074653 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1238 14:58:38.082002 CPU_CLUSTER: 0 child on link 0 APIC: 00
1239 14:58:38.082534 APIC: 00
1240 14:58:38.082931 APIC: 01
1241 14:58:38.085263 APIC: 05
1242 14:58:38.085681 APIC: 03
1243 14:58:38.088422 APIC: 07
1244 14:58:38.088944 APIC: 06
1245 14:58:38.089281 APIC: 04
1246 14:58:38.091649 APIC: 02
1247 14:58:38.098278 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1248 14:58:38.104793 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1249 14:58:38.111492 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1250 14:58:38.114458 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1251 14:58:38.121280 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1252 14:58:38.124433 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1253 14:58:38.130902 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1254 14:58:38.137694 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1255 14:58:38.147537 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1256 14:58:38.154419 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1257 14:58:38.161100 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1258 14:58:38.167513 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1259 14:58:38.173734 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1260 14:58:38.184114 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1261 14:58:38.187092 DOMAIN: 0000: Resource ranges:
1262 14:58:38.190196 * Base: 1000, Size: 800, Tag: 100
1263 14:58:38.194044 * Base: 1900, Size: e700, Tag: 100
1264 14:58:38.197099 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1265 14:58:38.203535 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1266 14:58:38.209876 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1267 14:58:38.220040 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1268 14:58:38.226751 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1269 14:58:38.233442 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1270 14:58:38.243597 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1271 14:58:38.249744 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1272 14:58:38.256372 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1273 14:58:38.266430 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1274 14:58:38.273228 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1275 14:58:38.279864 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1276 14:58:38.289585 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1277 14:58:38.296581 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1278 14:58:38.303032 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1279 14:58:38.312871 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1280 14:58:38.319302 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1281 14:58:38.325802 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1282 14:58:38.336005 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1283 14:58:38.342141 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1284 14:58:38.348808 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1285 14:58:38.359251 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1286 14:58:38.365261 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1287 14:58:38.372011 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1288 14:58:38.382568 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1289 14:58:38.385316 DOMAIN: 0000: Resource ranges:
1290 14:58:38.388735 * Base: 7fc00000, Size: 40400000, Tag: 200
1291 14:58:38.391792 * Base: d0000000, Size: 28000000, Tag: 200
1292 14:58:38.398880 * Base: fa000000, Size: 1000000, Tag: 200
1293 14:58:38.402137 * Base: fb001000, Size: 2fff000, Tag: 200
1294 14:58:38.405010 * Base: fe010000, Size: 2e000, Tag: 200
1295 14:58:38.411822 * Base: fe03f000, Size: d41000, Tag: 200
1296 14:58:38.415200 * Base: fed88000, Size: 8000, Tag: 200
1297 14:58:38.418383 * Base: fed93000, Size: d000, Tag: 200
1298 14:58:38.421724 * Base: feda2000, Size: 1e000, Tag: 200
1299 14:58:38.425027 * Base: fede0000, Size: 1220000, Tag: 200
1300 14:58:38.431574 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1301 14:58:38.438106 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1302 14:58:38.444852 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1303 14:58:38.451345 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1304 14:58:38.458066 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1305 14:58:38.464630 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1306 14:58:38.471267 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1307 14:58:38.478169 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1308 14:58:38.484482 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1309 14:58:38.491069 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1310 14:58:38.497846 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1311 14:58:38.504299 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1312 14:58:38.511080 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1313 14:58:38.517837 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1314 14:58:38.524405 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1315 14:58:38.530649 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1316 14:58:38.537181 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1317 14:58:38.544534 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1318 14:58:38.550900 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1319 14:58:38.557120 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1320 14:58:38.564010 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1321 14:58:38.570238 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1322 14:58:38.577048 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1323 14:58:38.583616 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1324 14:58:38.593605 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1325 14:58:38.596845 PCI: 00:1d.0: Resource ranges:
1326 14:58:38.600206 * Base: 7fc00000, Size: 100000, Tag: 200
1327 14:58:38.606443 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1328 14:58:38.613248 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1329 14:58:38.623737 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1330 14:58:38.629879 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1331 14:58:38.633331 Root Device assign_resources, bus 0 link: 0
1332 14:58:38.639625 DOMAIN: 0000 assign_resources, bus 0 link: 0
1333 14:58:38.646215 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1334 14:58:38.656406 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1335 14:58:38.663044 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1336 14:58:38.672995 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1337 14:58:38.676439 PCI: 00:04.0 assign_resources, bus 1 link: 0
1338 14:58:38.679696 PCI: 00:04.0 assign_resources, bus 1 link: 0
1339 14:58:38.689301 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1340 14:58:38.695865 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1341 14:58:38.705919 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1342 14:58:38.709236 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1343 14:58:38.716105 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1344 14:58:38.722136 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1345 14:58:38.725416 PCI: 00:14.0 assign_resources, bus 0 link: 0
1346 14:58:38.731774 PCI: 00:14.0 assign_resources, bus 0 link: 0
1347 14:58:38.738817 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1348 14:58:38.748302 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1349 14:58:38.755515 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1350 14:58:38.761644 PCI: 00:14.3 assign_resources, bus 0 link: 0
1351 14:58:38.765105 PCI: 00:14.3 assign_resources, bus 0 link: 0
1352 14:58:38.774794 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1353 14:58:38.778376 PCI: 00:15.0 assign_resources, bus 0 link: 0
1354 14:58:38.781501 PCI: 00:15.0 assign_resources, bus 0 link: 0
1355 14:58:38.791455 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1356 14:58:38.795281 PCI: 00:15.1 assign_resources, bus 0 link: 0
1357 14:58:38.801306 PCI: 00:15.1 assign_resources, bus 0 link: 0
1358 14:58:38.808337 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1359 14:58:38.818075 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1360 14:58:38.824457 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1361 14:58:38.834907 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1362 14:58:38.837852 PCI: 00:19.1 assign_resources, bus 0 link: 0
1363 14:58:38.840969 PCI: 00:19.1 assign_resources, bus 0 link: 0
1364 14:58:38.851182 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1365 14:58:38.860903 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1366 14:58:38.871008 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1367 14:58:38.874327 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1368 14:58:38.880678 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1369 14:58:38.890684 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1370 14:58:38.893673 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 14:58:38.903891 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1372 14:58:38.906802 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1373 14:58:38.913312 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1374 14:58:38.920057 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1375 14:58:38.926477 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1376 14:58:38.930459 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1377 14:58:38.933152 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1378 14:58:38.939895 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1379 14:58:38.943210 LPC: Trying to open IO window from 800 size 1ff
1380 14:58:38.953621 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1381 14:58:38.960154 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1382 14:58:38.969727 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1383 14:58:38.973050 DOMAIN: 0000 assign_resources, bus 0 link: 0
1384 14:58:38.979379 Root Device assign_resources, bus 0 link: 0
1385 14:58:38.979957 Done setting resources.
1386 14:58:38.986543 Show resources in subtree (Root Device)...After assigning values.
1387 14:58:38.992592 Root Device child on link 0 DOMAIN: 0000
1388 14:58:38.996347 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1389 14:58:39.005747 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1390 14:58:39.015905 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1391 14:58:39.016092 PCI: 00:00.0
1392 14:58:39.025692 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1393 14:58:39.035936 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1394 14:58:39.045437 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1395 14:58:39.055462 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1396 14:58:39.065521 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1397 14:58:39.071696 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1398 14:58:39.081753 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1399 14:58:39.092113 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1400 14:58:39.101459 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1401 14:58:39.111394 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1402 14:58:39.121523 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1403 14:58:39.128228 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1404 14:58:39.138210 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1405 14:58:39.147893 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1406 14:58:39.158284 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1407 14:58:39.168062 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1408 14:58:39.177788 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1409 14:58:39.184469 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1410 14:58:39.194228 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1411 14:58:39.203987 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1412 14:58:39.207560 PCI: 00:02.0
1413 14:58:39.217341 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1414 14:58:39.227585 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1415 14:58:39.237889 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1416 14:58:39.240822 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1417 14:58:39.254620 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1418 14:58:39.255297 GENERIC: 0.0
1419 14:58:39.255848 PCI: 00:05.0
1420 14:58:39.266761 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1421 14:58:39.270564 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1422 14:58:39.273222 GENERIC: 0.0
1423 14:58:39.273454 PCI: 00:08.0
1424 14:58:39.283666 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1425 14:58:39.286519 PCI: 00:0a.0
1426 14:58:39.289949 PCI: 00:0d.0 child on link 0 USB0 port 0
1427 14:58:39.299865 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1428 14:58:39.306701 USB0 port 0 child on link 0 USB3 port 0
1429 14:58:39.306833 USB3 port 0
1430 14:58:39.309960 USB3 port 1
1431 14:58:39.310097 USB3 port 2
1432 14:58:39.313302 USB3 port 3
1433 14:58:39.316228 PCI: 00:14.0 child on link 0 USB0 port 0
1434 14:58:39.326962 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1435 14:58:39.333413 USB0 port 0 child on link 0 USB2 port 0
1436 14:58:39.333930 USB2 port 0
1437 14:58:39.336334 USB2 port 1
1438 14:58:39.336787 USB2 port 2
1439 14:58:39.339751 USB2 port 3
1440 14:58:39.340207 USB2 port 4
1441 14:58:39.343006 USB2 port 5
1442 14:58:39.343438 USB2 port 6
1443 14:58:39.346352 USB2 port 7
1444 14:58:39.346833 USB2 port 8
1445 14:58:39.349778 USB2 port 9
1446 14:58:39.350208 USB3 port 0
1447 14:58:39.353332 USB3 port 1
1448 14:58:39.353762 USB3 port 2
1449 14:58:39.356249 USB3 port 3
1450 14:58:39.359565 PCI: 00:14.2
1451 14:58:39.369841 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1452 14:58:39.379423 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1453 14:58:39.382951 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1454 14:58:39.392352 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1455 14:58:39.396180 GENERIC: 0.0
1456 14:58:39.399280 PCI: 00:15.0 child on link 0 I2C: 00:1a
1457 14:58:39.409072 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1458 14:58:39.412396 I2C: 00:1a
1459 14:58:39.412724 I2C: 00:31
1460 14:58:39.415888 I2C: 00:32
1461 14:58:39.419051 PCI: 00:15.1 child on link 0 I2C: 00:10
1462 14:58:39.428974 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1463 14:58:39.432577 I2C: 00:10
1464 14:58:39.432821 PCI: 00:15.2
1465 14:58:39.441808 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1466 14:58:39.445201 PCI: 00:15.3
1467 14:58:39.456109 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1468 14:58:39.456637 PCI: 00:16.0
1469 14:58:39.465598 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1470 14:58:39.469165 PCI: 00:19.0
1471 14:58:39.472193 PCI: 00:19.1 child on link 0 I2C: 00:15
1472 14:58:39.482015 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1473 14:58:39.485654 I2C: 00:15
1474 14:58:39.488731 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1475 14:58:39.498622 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1476 14:58:39.508378 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1477 14:58:39.521704 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1478 14:58:39.521970 GENERIC: 0.0
1479 14:58:39.525223 PCI: 01:00.0
1480 14:58:39.534988 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1481 14:58:39.544751 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1482 14:58:39.544935 PCI: 00:1e.0
1483 14:58:39.557938 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1484 14:58:39.561178 PCI: 00:1e.2 child on link 0 SPI: 00
1485 14:58:39.570995 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1486 14:58:39.574670 SPI: 00
1487 14:58:39.577761 PCI: 00:1e.3 child on link 0 SPI: 00
1488 14:58:39.588081 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1489 14:58:39.588505 SPI: 00
1490 14:58:39.594539 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1491 14:58:39.600849 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1492 14:58:39.604243 PNP: 0c09.0
1493 14:58:39.610528 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1494 14:58:39.617470 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1495 14:58:39.627348 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1496 14:58:39.633890 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1497 14:58:39.640227 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1498 14:58:39.640407 GENERIC: 0.0
1499 14:58:39.643635 GENERIC: 1.0
1500 14:58:39.643815 PCI: 00:1f.3
1501 14:58:39.657085 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1502 14:58:39.666971 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1503 14:58:39.667186 PCI: 00:1f.5
1504 14:58:39.677094 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1505 14:58:39.683731 CPU_CLUSTER: 0 child on link 0 APIC: 00
1506 14:58:39.684153 APIC: 00
1507 14:58:39.684487 APIC: 01
1508 14:58:39.687030 APIC: 05
1509 14:58:39.687497 APIC: 03
1510 14:58:39.690493 APIC: 07
1511 14:58:39.690947 APIC: 06
1512 14:58:39.691282 APIC: 04
1513 14:58:39.693704 APIC: 02
1514 14:58:39.697341 Done allocating resources.
1515 14:58:39.700203 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1516 14:58:39.707175 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1517 14:58:39.710222 Configure GPIOs for I2S audio on UP4.
1518 14:58:39.717306 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1519 14:58:39.720656 Enabling resources...
1520 14:58:39.723822 PCI: 00:00.0 subsystem <- 8086/9a12
1521 14:58:39.727513 PCI: 00:00.0 cmd <- 06
1522 14:58:39.730377 PCI: 00:02.0 subsystem <- 8086/9a40
1523 14:58:39.733797 PCI: 00:02.0 cmd <- 03
1524 14:58:39.736997 PCI: 00:04.0 subsystem <- 8086/9a03
1525 14:58:39.740762 PCI: 00:04.0 cmd <- 02
1526 14:58:39.743858 PCI: 00:05.0 subsystem <- 8086/9a19
1527 14:58:39.744010 PCI: 00:05.0 cmd <- 02
1528 14:58:39.750620 PCI: 00:08.0 subsystem <- 8086/9a11
1529 14:58:39.750771 PCI: 00:08.0 cmd <- 06
1530 14:58:39.753554 PCI: 00:0d.0 subsystem <- 8086/9a13
1531 14:58:39.757021 PCI: 00:0d.0 cmd <- 02
1532 14:58:39.760094 PCI: 00:14.0 subsystem <- 8086/a0ed
1533 14:58:39.763954 PCI: 00:14.0 cmd <- 02
1534 14:58:39.766725 PCI: 00:14.2 subsystem <- 8086/a0ef
1535 14:58:39.770209 PCI: 00:14.2 cmd <- 02
1536 14:58:39.773299 PCI: 00:14.3 subsystem <- 8086/a0f0
1537 14:58:39.776810 PCI: 00:14.3 cmd <- 02
1538 14:58:39.779884 PCI: 00:15.0 subsystem <- 8086/a0e8
1539 14:58:39.783083 PCI: 00:15.0 cmd <- 02
1540 14:58:39.786343 PCI: 00:15.1 subsystem <- 8086/a0e9
1541 14:58:39.790653 PCI: 00:15.1 cmd <- 02
1542 14:58:39.793486 PCI: 00:15.2 subsystem <- 8086/a0ea
1543 14:58:39.794046 PCI: 00:15.2 cmd <- 02
1544 14:58:39.800284 PCI: 00:15.3 subsystem <- 8086/a0eb
1545 14:58:39.801000 PCI: 00:15.3 cmd <- 02
1546 14:58:39.803696 PCI: 00:16.0 subsystem <- 8086/a0e0
1547 14:58:39.807206 PCI: 00:16.0 cmd <- 02
1548 14:58:39.810052 PCI: 00:19.1 subsystem <- 8086/a0c6
1549 14:58:39.813098 PCI: 00:19.1 cmd <- 02
1550 14:58:39.816884 PCI: 00:1d.0 bridge ctrl <- 0013
1551 14:58:39.820151 PCI: 00:1d.0 subsystem <- 8086/a0b0
1552 14:58:39.823756 PCI: 00:1d.0 cmd <- 06
1553 14:58:39.826732 PCI: 00:1e.0 subsystem <- 8086/a0a8
1554 14:58:39.830076 PCI: 00:1e.0 cmd <- 06
1555 14:58:39.833026 PCI: 00:1e.2 subsystem <- 8086/a0aa
1556 14:58:39.836392 PCI: 00:1e.2 cmd <- 06
1557 14:58:39.839898 PCI: 00:1e.3 subsystem <- 8086/a0ab
1558 14:58:39.843372 PCI: 00:1e.3 cmd <- 02
1559 14:58:39.846240 PCI: 00:1f.0 subsystem <- 8086/a087
1560 14:58:39.846701 PCI: 00:1f.0 cmd <- 407
1561 14:58:39.853441 PCI: 00:1f.3 subsystem <- 8086/a0c8
1562 14:58:39.853862 PCI: 00:1f.3 cmd <- 02
1563 14:58:39.856489 PCI: 00:1f.5 subsystem <- 8086/a0a4
1564 14:58:39.859402 PCI: 00:1f.5 cmd <- 406
1565 14:58:39.864612 PCI: 01:00.0 cmd <- 02
1566 14:58:39.868789 done.
1567 14:58:39.871953 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1568 14:58:39.875627 Initializing devices...
1569 14:58:39.878812 Root Device init
1570 14:58:39.882089 Chrome EC: Set SMI mask to 0x0000000000000000
1571 14:58:39.889039 Chrome EC: clear events_b mask to 0x0000000000000000
1572 14:58:39.895348 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1573 14:58:39.898862 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1574 14:58:39.905324 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1575 14:58:39.911966 Chrome EC: Set WAKE mask to 0x0000000000000000
1576 14:58:39.915898 fw_config match found: DB_USB=USB3_ACTIVE
1577 14:58:39.921900 Configure Right Type-C port orientation for retimer
1578 14:58:39.925384 Root Device init finished in 44 msecs
1579 14:58:39.928441 PCI: 00:00.0 init
1580 14:58:39.931828 CPU TDP = 9 Watts
1581 14:58:39.931958 CPU PL1 = 9 Watts
1582 14:58:39.935248 CPU PL2 = 40 Watts
1583 14:58:39.938274 CPU PL4 = 83 Watts
1584 14:58:39.942238 PCI: 00:00.0 init finished in 8 msecs
1585 14:58:39.942370 PCI: 00:02.0 init
1586 14:58:39.945302 GMA: Found VBT in CBFS
1587 14:58:39.948251 GMA: Found valid VBT in CBFS
1588 14:58:39.954962 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1589 14:58:39.962199 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1590 14:58:39.964917 PCI: 00:02.0 init finished in 18 msecs
1591 14:58:39.968378 PCI: 00:05.0 init
1592 14:58:39.971469 PCI: 00:05.0 init finished in 0 msecs
1593 14:58:39.974792 PCI: 00:08.0 init
1594 14:58:39.978569 PCI: 00:08.0 init finished in 0 msecs
1595 14:58:39.981391 PCI: 00:14.0 init
1596 14:58:39.984691 PCI: 00:14.0 init finished in 0 msecs
1597 14:58:39.987942 PCI: 00:14.2 init
1598 14:58:39.991499 PCI: 00:14.2 init finished in 0 msecs
1599 14:58:39.994702 PCI: 00:15.0 init
1600 14:58:39.998383 I2C bus 0 version 0x3230302a
1601 14:58:40.001305 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1602 14:58:40.004606 PCI: 00:15.0 init finished in 6 msecs
1603 14:58:40.005044 PCI: 00:15.1 init
1604 14:58:40.007938 I2C bus 1 version 0x3230302a
1605 14:58:40.011464 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1606 14:58:40.017991 PCI: 00:15.1 init finished in 6 msecs
1607 14:58:40.018415 PCI: 00:15.2 init
1608 14:58:40.021705 I2C bus 2 version 0x3230302a
1609 14:58:40.024594 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1610 14:58:40.028187 PCI: 00:15.2 init finished in 6 msecs
1611 14:58:40.031318 PCI: 00:15.3 init
1612 14:58:40.034675 I2C bus 3 version 0x3230302a
1613 14:58:40.037791 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1614 14:58:40.041200 PCI: 00:15.3 init finished in 6 msecs
1615 14:58:40.044390 PCI: 00:16.0 init
1616 14:58:40.047426 PCI: 00:16.0 init finished in 0 msecs
1617 14:58:40.050881 PCI: 00:19.1 init
1618 14:58:40.054357 I2C bus 5 version 0x3230302a
1619 14:58:40.057497 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1620 14:58:40.060888 PCI: 00:19.1 init finished in 6 msecs
1621 14:58:40.063989 PCI: 00:1d.0 init
1622 14:58:40.067179 Initializing PCH PCIe bridge.
1623 14:58:40.070788 PCI: 00:1d.0 init finished in 3 msecs
1624 14:58:40.074156 PCI: 00:1f.0 init
1625 14:58:40.077066 IOAPIC: Initializing IOAPIC at 0xfec00000
1626 14:58:40.080758 IOAPIC: Bootstrap Processor Local APIC = 0x00
1627 14:58:40.084238 IOAPIC: ID = 0x02
1628 14:58:40.087221 IOAPIC: Dumping registers
1629 14:58:40.087401 reg 0x0000: 0x02000000
1630 14:58:40.090481 reg 0x0001: 0x00770020
1631 14:58:40.093667 reg 0x0002: 0x00000000
1632 14:58:40.097130 PCI: 00:1f.0 init finished in 21 msecs
1633 14:58:40.100409 PCI: 00:1f.2 init
1634 14:58:40.104119 Disabling ACPI via APMC.
1635 14:58:40.104285 APMC done.
1636 14:58:40.110083 PCI: 00:1f.2 init finished in 5 msecs
1637 14:58:40.120743 PCI: 01:00.0 init
1638 14:58:40.123970 PCI: 01:00.0 init finished in 0 msecs
1639 14:58:40.127755 PNP: 0c09.0 init
1640 14:58:40.131165 Google Chrome EC uptime: 8.286 seconds
1641 14:58:40.137515 Google Chrome AP resets since EC boot: 1
1642 14:58:40.140629 Google Chrome most recent AP reset causes:
1643 14:58:40.144069 0.482: 32775 shutdown: entering G3
1644 14:58:40.151085 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1645 14:58:40.154234 PNP: 0c09.0 init finished in 22 msecs
1646 14:58:40.159738 Devices initialized
1647 14:58:40.163290 Show all devs... After init.
1648 14:58:40.166565 Root Device: enabled 1
1649 14:58:40.167023 DOMAIN: 0000: enabled 1
1650 14:58:40.170027 CPU_CLUSTER: 0: enabled 1
1651 14:58:40.172921 PCI: 00:00.0: enabled 1
1652 14:58:40.176339 PCI: 00:02.0: enabled 1
1653 14:58:40.176759 PCI: 00:04.0: enabled 1
1654 14:58:40.179652 PCI: 00:05.0: enabled 1
1655 14:58:40.182908 PCI: 00:06.0: enabled 0
1656 14:58:40.186190 PCI: 00:07.0: enabled 0
1657 14:58:40.186414 PCI: 00:07.1: enabled 0
1658 14:58:40.189339 PCI: 00:07.2: enabled 0
1659 14:58:40.192983 PCI: 00:07.3: enabled 0
1660 14:58:40.196618 PCI: 00:08.0: enabled 1
1661 14:58:40.196843 PCI: 00:09.0: enabled 0
1662 14:58:40.199841 PCI: 00:0a.0: enabled 0
1663 14:58:40.202911 PCI: 00:0d.0: enabled 1
1664 14:58:40.206412 PCI: 00:0d.1: enabled 0
1665 14:58:40.206768 PCI: 00:0d.2: enabled 0
1666 14:58:40.209483 PCI: 00:0d.3: enabled 0
1667 14:58:40.212862 PCI: 00:0e.0: enabled 0
1668 14:58:40.213086 PCI: 00:10.2: enabled 1
1669 14:58:40.216451 PCI: 00:10.6: enabled 0
1670 14:58:40.219773 PCI: 00:10.7: enabled 0
1671 14:58:40.223308 PCI: 00:12.0: enabled 0
1672 14:58:40.223727 PCI: 00:12.6: enabled 0
1673 14:58:40.225881 PCI: 00:13.0: enabled 0
1674 14:58:40.229263 PCI: 00:14.0: enabled 1
1675 14:58:40.233159 PCI: 00:14.1: enabled 0
1676 14:58:40.233573 PCI: 00:14.2: enabled 1
1677 14:58:40.236518 PCI: 00:14.3: enabled 1
1678 14:58:40.240015 PCI: 00:15.0: enabled 1
1679 14:58:40.242739 PCI: 00:15.1: enabled 1
1680 14:58:40.243190 PCI: 00:15.2: enabled 1
1681 14:58:40.246190 PCI: 00:15.3: enabled 1
1682 14:58:40.249366 PCI: 00:16.0: enabled 1
1683 14:58:40.252664 PCI: 00:16.1: enabled 0
1684 14:58:40.252958 PCI: 00:16.2: enabled 0
1685 14:58:40.255932 PCI: 00:16.3: enabled 0
1686 14:58:40.259148 PCI: 00:16.4: enabled 0
1687 14:58:40.259472 PCI: 00:16.5: enabled 0
1688 14:58:40.262938 PCI: 00:17.0: enabled 0
1689 14:58:40.265815 PCI: 00:19.0: enabled 0
1690 14:58:40.268947 PCI: 00:19.1: enabled 1
1691 14:58:40.269241 PCI: 00:19.2: enabled 0
1692 14:58:40.273100 PCI: 00:1c.0: enabled 1
1693 14:58:40.275809 PCI: 00:1c.1: enabled 0
1694 14:58:40.278845 PCI: 00:1c.2: enabled 0
1695 14:58:40.279171 PCI: 00:1c.3: enabled 0
1696 14:58:40.282357 PCI: 00:1c.4: enabled 0
1697 14:58:40.285722 PCI: 00:1c.5: enabled 0
1698 14:58:40.289202 PCI: 00:1c.6: enabled 1
1699 14:58:40.289495 PCI: 00:1c.7: enabled 0
1700 14:58:40.292267 PCI: 00:1d.0: enabled 1
1701 14:58:40.295552 PCI: 00:1d.1: enabled 0
1702 14:58:40.295941 PCI: 00:1d.2: enabled 1
1703 14:58:40.298829 PCI: 00:1d.3: enabled 0
1704 14:58:40.302314 PCI: 00:1e.0: enabled 1
1705 14:58:40.305397 PCI: 00:1e.1: enabled 0
1706 14:58:40.305621 PCI: 00:1e.2: enabled 1
1707 14:58:40.308531 PCI: 00:1e.3: enabled 1
1708 14:58:40.311749 PCI: 00:1f.0: enabled 1
1709 14:58:40.315538 PCI: 00:1f.1: enabled 0
1710 14:58:40.315688 PCI: 00:1f.2: enabled 1
1711 14:58:40.318526 PCI: 00:1f.3: enabled 1
1712 14:58:40.322451 PCI: 00:1f.4: enabled 0
1713 14:58:40.325112 PCI: 00:1f.5: enabled 1
1714 14:58:40.325263 PCI: 00:1f.6: enabled 0
1715 14:58:40.328279 PCI: 00:1f.7: enabled 0
1716 14:58:40.331880 APIC: 00: enabled 1
1717 14:58:40.332030 GENERIC: 0.0: enabled 1
1718 14:58:40.335568 GENERIC: 0.0: enabled 1
1719 14:58:40.338570 GENERIC: 1.0: enabled 1
1720 14:58:40.342086 GENERIC: 0.0: enabled 1
1721 14:58:40.342236 GENERIC: 1.0: enabled 1
1722 14:58:40.344997 USB0 port 0: enabled 1
1723 14:58:40.348420 GENERIC: 0.0: enabled 1
1724 14:58:40.351665 USB0 port 0: enabled 1
1725 14:58:40.351816 GENERIC: 0.0: enabled 1
1726 14:58:40.355178 I2C: 00:1a: enabled 1
1727 14:58:40.358553 I2C: 00:31: enabled 1
1728 14:58:40.358724 I2C: 00:32: enabled 1
1729 14:58:40.361563 I2C: 00:10: enabled 1
1730 14:58:40.364959 I2C: 00:15: enabled 1
1731 14:58:40.365109 GENERIC: 0.0: enabled 0
1732 14:58:40.368450 GENERIC: 1.0: enabled 0
1733 14:58:40.371525 GENERIC: 0.0: enabled 1
1734 14:58:40.371676 SPI: 00: enabled 1
1735 14:58:40.374942 SPI: 00: enabled 1
1736 14:58:40.378245 PNP: 0c09.0: enabled 1
1737 14:58:40.381514 GENERIC: 0.0: enabled 1
1738 14:58:40.381595 USB3 port 0: enabled 1
1739 14:58:40.384534 USB3 port 1: enabled 1
1740 14:58:40.388022 USB3 port 2: enabled 0
1741 14:58:40.388109 USB3 port 3: enabled 0
1742 14:58:40.391392 USB2 port 0: enabled 0
1743 14:58:40.394770 USB2 port 1: enabled 1
1744 14:58:40.394872 USB2 port 2: enabled 1
1745 14:58:40.398031 USB2 port 3: enabled 0
1746 14:58:40.401406 USB2 port 4: enabled 1
1747 14:58:40.404828 USB2 port 5: enabled 0
1748 14:58:40.404914 USB2 port 6: enabled 0
1749 14:58:40.408025 USB2 port 7: enabled 0
1750 14:58:40.411468 USB2 port 8: enabled 0
1751 14:58:40.411561 USB2 port 9: enabled 0
1752 14:58:40.414493 USB3 port 0: enabled 0
1753 14:58:40.417665 USB3 port 1: enabled 1
1754 14:58:40.420768 USB3 port 2: enabled 0
1755 14:58:40.420856 USB3 port 3: enabled 0
1756 14:58:40.424850 GENERIC: 0.0: enabled 1
1757 14:58:40.427438 GENERIC: 1.0: enabled 1
1758 14:58:40.427538 APIC: 01: enabled 1
1759 14:58:40.430598 APIC: 05: enabled 1
1760 14:58:40.434289 APIC: 03: enabled 1
1761 14:58:40.434399 APIC: 07: enabled 1
1762 14:58:40.437396 APIC: 06: enabled 1
1763 14:58:40.440960 APIC: 04: enabled 1
1764 14:58:40.441081 APIC: 02: enabled 1
1765 14:58:40.443981 PCI: 01:00.0: enabled 1
1766 14:58:40.451274 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1767 14:58:40.454238 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1768 14:58:40.457412 ELOG: NV offset 0xf30000 size 0x1000
1769 14:58:40.464779 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1770 14:58:40.471461 ELOG: Event(17) added with size 13 at 2023-07-11 14:58:40 UTC
1771 14:58:40.478196 ELOG: Event(92) added with size 9 at 2023-07-11 14:58:40 UTC
1772 14:58:40.484590 ELOG: Event(93) added with size 9 at 2023-07-11 14:58:40 UTC
1773 14:58:40.491208 ELOG: Event(9E) added with size 10 at 2023-07-11 14:58:40 UTC
1774 14:58:40.497697 ELOG: Event(9F) added with size 14 at 2023-07-11 14:58:40 UTC
1775 14:58:40.504522 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1776 14:58:40.510797 ELOG: Event(A1) added with size 10 at 2023-07-11 14:58:40 UTC
1777 14:58:40.517355 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1778 14:58:40.523690 ELOG: Event(A0) added with size 9 at 2023-07-11 14:58:40 UTC
1779 14:58:40.527094 elog_add_boot_reason: Logged dev mode boot
1780 14:58:40.533715 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1781 14:58:40.536739 Finalize devices...
1782 14:58:40.536821 Devices finalized
1783 14:58:40.544112 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1784 14:58:40.546778 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1785 14:58:40.553344 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1786 14:58:40.557102 ME: HFSTS1 : 0x80030055
1787 14:58:40.563261 ME: HFSTS2 : 0x30280116
1788 14:58:40.566897 ME: HFSTS3 : 0x00000050
1789 14:58:40.573572 ME: HFSTS4 : 0x00004000
1790 14:58:40.576676 ME: HFSTS5 : 0x00000000
1791 14:58:40.579982 ME: HFSTS6 : 0x40400006
1792 14:58:40.583388 ME: Manufacturing Mode : YES
1793 14:58:40.590187 ME: SPI Protection Mode Enabled : NO
1794 14:58:40.593572 ME: FW Partition Table : OK
1795 14:58:40.597009 ME: Bringup Loader Failure : NO
1796 14:58:40.600216 ME: Firmware Init Complete : NO
1797 14:58:40.603568 ME: Boot Options Present : NO
1798 14:58:40.606914 ME: Update In Progress : NO
1799 14:58:40.610167 ME: D0i3 Support : YES
1800 14:58:40.613359 ME: Low Power State Enabled : NO
1801 14:58:40.620200 ME: CPU Replaced : YES
1802 14:58:40.623622 ME: CPU Replacement Valid : YES
1803 14:58:40.626736 ME: Current Working State : 5
1804 14:58:40.629701 ME: Current Operation State : 1
1805 14:58:40.633139 ME: Current Operation Mode : 3
1806 14:58:40.636550 ME: Error Code : 0
1807 14:58:40.639647 ME: Enhanced Debug Mode : NO
1808 14:58:40.643435 ME: CPU Debug Disabled : YES
1809 14:58:40.646422 ME: TXT Support : NO
1810 14:58:40.653476 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1811 14:58:40.662872 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1812 14:58:40.666208 CBFS: 'fallback/slic' not found.
1813 14:58:40.669423 ACPI: Writing ACPI tables at 76b01000.
1814 14:58:40.669692 ACPI: * FACS
1815 14:58:40.672541 ACPI: * DSDT
1816 14:58:40.676242 Ramoops buffer: 0x100000@0x76a00000.
1817 14:58:40.679617 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1818 14:58:40.686152 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1819 14:58:40.689169 Google Chrome EC: version:
1820 14:58:40.692697 ro: voema_v2.0.10114-a447f03e46
1821 14:58:40.695651 rw: voema_v2.0.10114-a447f03e46
1822 14:58:40.695922 running image: 2
1823 14:58:40.702392 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1824 14:58:40.707366 ACPI: * FADT
1825 14:58:40.707637 SCI is IRQ9
1826 14:58:40.714560 ACPI: added table 1/32, length now 40
1827 14:58:40.714958 ACPI: * SSDT
1828 14:58:40.717753 Found 1 CPU(s) with 8 core(s) each.
1829 14:58:40.724591 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1830 14:58:40.727654 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1831 14:58:40.730584 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1832 14:58:40.733734 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1833 14:58:40.740659 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1834 14:58:40.746995 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1835 14:58:40.750417 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1836 14:58:40.757123 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1837 14:58:40.764158 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1838 14:58:40.767137 \_SB.PCI0.RP09: Added StorageD3Enable property
1839 14:58:40.774127 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1840 14:58:40.777513 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1841 14:58:40.783809 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1842 14:58:40.787002 PS2K: Passing 80 keymaps to kernel
1843 14:58:40.793597 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1844 14:58:40.800189 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1845 14:58:40.806967 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1846 14:58:40.813893 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1847 14:58:40.819863 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1848 14:58:40.826709 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1849 14:58:40.833534 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1850 14:58:40.840099 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1851 14:58:40.843375 ACPI: added table 2/32, length now 44
1852 14:58:40.846409 ACPI: * MCFG
1853 14:58:40.850307 ACPI: added table 3/32, length now 48
1854 14:58:40.850878 ACPI: * TPM2
1855 14:58:40.853173 TPM2 log created at 0x769f0000
1856 14:58:40.856417 ACPI: added table 4/32, length now 52
1857 14:58:40.859777 ACPI: * MADT
1858 14:58:40.860212 SCI is IRQ9
1859 14:58:40.863506 ACPI: added table 5/32, length now 56
1860 14:58:40.866510 current = 76b09850
1861 14:58:40.866995 ACPI: * DMAR
1862 14:58:40.873431 ACPI: added table 6/32, length now 60
1863 14:58:40.876456 ACPI: added table 7/32, length now 64
1864 14:58:40.877025 ACPI: * HPET
1865 14:58:40.879611 ACPI: added table 8/32, length now 68
1866 14:58:40.883147 ACPI: done.
1867 14:58:40.886289 ACPI tables: 35216 bytes.
1868 14:58:40.886845 smbios_write_tables: 769ef000
1869 14:58:40.891244 EC returned error result code 3
1870 14:58:40.894250 Couldn't obtain OEM name from CBI
1871 14:58:40.898270 Create SMBIOS type 16
1872 14:58:40.901453 Create SMBIOS type 17
1873 14:58:40.904756 GENERIC: 0.0 (WIFI Device)
1874 14:58:40.908409 SMBIOS tables: 1734 bytes.
1875 14:58:40.911635 Writing table forward entry at 0x00000500
1876 14:58:40.917805 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1877 14:58:40.921259 Writing coreboot table at 0x76b25000
1878 14:58:40.927833 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1879 14:58:40.931719 1. 0000000000001000-000000000009ffff: RAM
1880 14:58:40.935049 2. 00000000000a0000-00000000000fffff: RESERVED
1881 14:58:40.941157 3. 0000000000100000-00000000769eefff: RAM
1882 14:58:40.944663 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1883 14:58:40.951412 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1884 14:58:40.957662 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1885 14:58:40.960877 7. 0000000077000000-000000007fbfffff: RESERVED
1886 14:58:40.971396 8. 00000000c0000000-00000000cfffffff: RESERVED
1887 14:58:40.971966 9. 00000000f8000000-00000000f9ffffff: RESERVED
1888 14:58:40.974241 10. 00000000fb000000-00000000fb000fff: RESERVED
1889 14:58:40.981110 11. 00000000fe000000-00000000fe00ffff: RESERVED
1890 14:58:40.984312 12. 00000000fed80000-00000000fed87fff: RESERVED
1891 14:58:40.991121 13. 00000000fed90000-00000000fed92fff: RESERVED
1892 14:58:40.994363 14. 00000000feda0000-00000000feda1fff: RESERVED
1893 14:58:41.001006 15. 00000000fedc0000-00000000feddffff: RESERVED
1894 14:58:41.003833 16. 0000000100000000-00000004803fffff: RAM
1895 14:58:41.007794 Passing 4 GPIOs to payload:
1896 14:58:41.010696 NAME | PORT | POLARITY | VALUE
1897 14:58:41.017127 lid | undefined | high | high
1898 14:58:41.024349 power | undefined | high | low
1899 14:58:41.027480 oprom | undefined | high | low
1900 14:58:41.034043 EC in RW | 0x000000e5 | high | high
1901 14:58:41.040721 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e1d1
1902 14:58:41.044001 coreboot table: 1576 bytes.
1903 14:58:41.047144 IMD ROOT 0. 0x76fff000 0x00001000
1904 14:58:41.050286 IMD SMALL 1. 0x76ffe000 0x00001000
1905 14:58:41.053527 FSP MEMORY 2. 0x76c4e000 0x003b0000
1906 14:58:41.056678 VPD 3. 0x76c4d000 0x00000367
1907 14:58:41.060014 RO MCACHE 4. 0x76c4c000 0x00000fdc
1908 14:58:41.063360 CONSOLE 5. 0x76c2c000 0x00020000
1909 14:58:41.066894 FMAP 6. 0x76c2b000 0x00000578
1910 14:58:41.073437 TIME STAMP 7. 0x76c2a000 0x00000910
1911 14:58:41.076692 VBOOT WORK 8. 0x76c16000 0x00014000
1912 14:58:41.080200 ROMSTG STCK 9. 0x76c15000 0x00001000
1913 14:58:41.083705 AFTER CAR 10. 0x76c0a000 0x0000b000
1914 14:58:41.086631 RAMSTAGE 11. 0x76b97000 0x00073000
1915 14:58:41.089711 REFCODE 12. 0x76b42000 0x00055000
1916 14:58:41.093210 SMM BACKUP 13. 0x76b32000 0x00010000
1917 14:58:41.100322 4f444749 14. 0x76b30000 0x00002000
1918 14:58:41.103319 EXT VBT15. 0x76b2d000 0x0000219f
1919 14:58:41.106642 COREBOOT 16. 0x76b25000 0x00008000
1920 14:58:41.109768 ACPI 17. 0x76b01000 0x00024000
1921 14:58:41.112877 ACPI GNVS 18. 0x76b00000 0x00001000
1922 14:58:41.116375 RAMOOPS 19. 0x76a00000 0x00100000
1923 14:58:41.119537 TPM2 TCGLOG20. 0x769f0000 0x00010000
1924 14:58:41.122880 SMBIOS 21. 0x769ef000 0x00000800
1925 14:58:41.126424 IMD small region:
1926 14:58:41.129805 IMD ROOT 0. 0x76ffec00 0x00000400
1927 14:58:41.133159 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1928 14:58:41.136664 POWER STATE 2. 0x76ffeb80 0x00000044
1929 14:58:41.142788 ROMSTAGE 3. 0x76ffeb60 0x00000004
1930 14:58:41.146185 MEM INFO 4. 0x76ffe980 0x000001e0
1931 14:58:41.152539 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1932 14:58:41.155729 MTRR: Physical address space:
1933 14:58:41.159459 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1934 14:58:41.165737 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1935 14:58:41.172470 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1936 14:58:41.179066 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1937 14:58:41.186059 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1938 14:58:41.192592 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1939 14:58:41.198831 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1940 14:58:41.202275 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 14:58:41.205787 MTRR: Fixed MSR 0x258 0x0606060606060606
1942 14:58:41.209256 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 14:58:41.215702 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 14:58:41.218929 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 14:58:41.222051 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 14:58:41.225467 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 14:58:41.232521 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 14:58:41.235563 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 14:58:41.238651 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 14:58:41.241850 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 14:58:41.246955 call enable_fixed_mtrr()
1952 14:58:41.250604 CPU physical address size: 39 bits
1953 14:58:41.257016 MTRR: default type WB/UC MTRR counts: 6/7.
1954 14:58:41.260585 MTRR: WB selected as default type.
1955 14:58:41.266698 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1956 14:58:41.270091 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1957 14:58:41.276939 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1958 14:58:41.283102 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1959 14:58:41.289760 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1960 14:58:41.296290 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1961 14:58:41.300177
1962 14:58:41.300356 MTRR check
1963 14:58:41.303506 Fixed MTRRs : Enabled
1964 14:58:41.303687 Variable MTRRs: Enabled
1965 14:58:41.303830
1966 14:58:41.309923 MTRR: Fixed MSR 0x250 0x0606060606060606
1967 14:58:41.313248 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 14:58:41.317020 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 14:58:41.320190 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 14:58:41.327120 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 14:58:41.330620 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 14:58:41.333554 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 14:58:41.336810 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 14:58:41.343586 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 14:58:41.347094 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 14:58:41.349862 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 14:58:41.356878 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
1978 14:58:41.360409 call enable_fixed_mtrr()
1979 14:58:41.364190 Checking cr50 for pending updates
1980 14:58:41.367047 CPU physical address size: 39 bits
1981 14:58:41.371074 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 14:58:41.374335 MTRR: Fixed MSR 0x250 0x0606060606060606
1983 14:58:41.380787 MTRR: Fixed MSR 0x258 0x0606060606060606
1984 14:58:41.384211 MTRR: Fixed MSR 0x259 0x0000000000000000
1985 14:58:41.387627 MTRR: Fixed MSR 0x268 0x0606060606060606
1986 14:58:41.390574 MTRR: Fixed MSR 0x269 0x0606060606060606
1987 14:58:41.397238 MTRR: Fixed MSR 0x26a 0x0606060606060606
1988 14:58:41.400889 MTRR: Fixed MSR 0x26b 0x0606060606060606
1989 14:58:41.403761 MTRR: Fixed MSR 0x26c 0x0606060606060606
1990 14:58:41.406921 MTRR: Fixed MSR 0x26d 0x0606060606060606
1991 14:58:41.413482 MTRR: Fixed MSR 0x26e 0x0606060606060606
1992 14:58:41.416954 MTRR: Fixed MSR 0x26f 0x0606060606060606
1993 14:58:41.423270 MTRR: Fixed MSR 0x258 0x0606060606060606
1994 14:58:41.423345 call enable_fixed_mtrr()
1995 14:58:41.430250 MTRR: Fixed MSR 0x259 0x0000000000000000
1996 14:58:41.433257 MTRR: Fixed MSR 0x268 0x0606060606060606
1997 14:58:41.436485 MTRR: Fixed MSR 0x269 0x0606060606060606
1998 14:58:41.440315 MTRR: Fixed MSR 0x26a 0x0606060606060606
1999 14:58:41.447122 MTRR: Fixed MSR 0x26b 0x0606060606060606
2000 14:58:41.450086 MTRR: Fixed MSR 0x26c 0x0606060606060606
2001 14:58:41.453292 MTRR: Fixed MSR 0x26d 0x0606060606060606
2002 14:58:41.456412 MTRR: Fixed MSR 0x26e 0x0606060606060606
2003 14:58:41.459627 MTRR: Fixed MSR 0x26f 0x0606060606060606
2004 14:58:41.466188 CPU physical address size: 39 bits
2005 14:58:41.470022 call enable_fixed_mtrr()
2006 14:58:41.473171 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 14:58:41.480123 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 14:58:41.483453 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 14:58:41.486660 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 14:58:41.490500 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 14:58:41.496502 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 14:58:41.500053 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 14:58:41.503108 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 14:58:41.506437 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 14:58:41.513305 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 14:58:41.516598 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 14:58:41.519899 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 14:58:41.526851 MTRR: Fixed MSR 0x258 0x0606060606060606
2019 14:58:41.526935 call enable_fixed_mtrr()
2020 14:58:41.533381 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 14:58:41.537436 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 14:58:41.540413 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 14:58:41.543684 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 14:58:41.549935 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 14:58:41.553468 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 14:58:41.556930 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 14:58:41.560398 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 14:58:41.566781 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 14:58:41.569946 CPU physical address size: 39 bits
2030 14:58:41.574146 call enable_fixed_mtrr()
2031 14:58:41.577826 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 14:58:41.584306 MTRR: Fixed MSR 0x250 0x0606060606060606
2033 14:58:41.587304 MTRR: Fixed MSR 0x258 0x0606060606060606
2034 14:58:41.590737 MTRR: Fixed MSR 0x259 0x0000000000000000
2035 14:58:41.594280 MTRR: Fixed MSR 0x268 0x0606060606060606
2036 14:58:41.600794 MTRR: Fixed MSR 0x269 0x0606060606060606
2037 14:58:41.603702 MTRR: Fixed MSR 0x26a 0x0606060606060606
2038 14:58:41.607217 MTRR: Fixed MSR 0x26b 0x0606060606060606
2039 14:58:41.610457 MTRR: Fixed MSR 0x26c 0x0606060606060606
2040 14:58:41.616946 MTRR: Fixed MSR 0x26d 0x0606060606060606
2041 14:58:41.620527 MTRR: Fixed MSR 0x26e 0x0606060606060606
2042 14:58:41.623641 MTRR: Fixed MSR 0x26f 0x0606060606060606
2043 14:58:41.631053 MTRR: Fixed MSR 0x258 0x0606060606060606
2044 14:58:41.631136 call enable_fixed_mtrr()
2045 14:58:41.637356 MTRR: Fixed MSR 0x259 0x0000000000000000
2046 14:58:41.641248 MTRR: Fixed MSR 0x268 0x0606060606060606
2047 14:58:41.643894 MTRR: Fixed MSR 0x269 0x0606060606060606
2048 14:58:41.647770 MTRR: Fixed MSR 0x26a 0x0606060606060606
2049 14:58:41.654207 MTRR: Fixed MSR 0x26b 0x0606060606060606
2050 14:58:41.657168 MTRR: Fixed MSR 0x26c 0x0606060606060606
2051 14:58:41.660965 MTRR: Fixed MSR 0x26d 0x0606060606060606
2052 14:58:41.664180 MTRR: Fixed MSR 0x26e 0x0606060606060606
2053 14:58:41.670781 MTRR: Fixed MSR 0x26f 0x0606060606060606
2054 14:58:41.673766 CPU physical address size: 39 bits
2055 14:58:41.678414 call enable_fixed_mtrr()
2056 14:58:41.681172 Reading cr50 TPM mode
2057 14:58:41.685216 CPU physical address size: 39 bits
2058 14:58:41.688763 CPU physical address size: 39 bits
2059 14:58:41.695483 BS: BS_PAYLOAD_LOAD entry times (exec / console): 322 / 6 ms
2060 14:58:41.698234 CPU physical address size: 39 bits
2061 14:58:41.705440 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2062 14:58:41.708384 Checking segment from ROM address 0xffc02b38
2063 14:58:41.714831 Checking segment from ROM address 0xffc02b54
2064 14:58:41.718209 Loading segment from ROM address 0xffc02b38
2065 14:58:41.721613 code (compression=0)
2066 14:58:41.728188 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2067 14:58:41.738088 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2068 14:58:41.741303 it's not compressed!
2069 14:58:41.879821 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2070 14:58:41.886720 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2071 14:58:41.893483 Loading segment from ROM address 0xffc02b54
2072 14:58:41.896822 Entry Point 0x30000000
2073 14:58:41.896901 Loaded segments
2074 14:58:41.903253 BS: BS_PAYLOAD_LOAD run times (exec / console): 140 / 63 ms
2075 14:58:41.948343 Finalizing chipset.
2076 14:58:41.951556 Finalizing SMM.
2077 14:58:41.951683 APMC done.
2078 14:58:41.958404 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2079 14:58:41.961653 mp_park_aps done after 0 msecs.
2080 14:58:41.964920 Jumping to boot code at 0x30000000(0x76b25000)
2081 14:58:41.974995 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2082 14:58:41.975117
2083 14:58:41.978055
2084 14:58:41.978164
2085 14:58:41.978541 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2086 14:58:41.978684 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2087 14:58:41.978771 Setting prompt string to ['volteer:']
2088 14:58:41.978853 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2089 14:58:41.981255 Starting depthcharge on Voema...
2090 14:58:41.981374
2091 14:58:41.987909 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2092 14:58:41.988017
2093 14:58:41.995071 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2094 14:58:41.995185
2095 14:58:42.001073 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2096 14:58:42.001185
2097 14:58:42.004512 Failed to find eMMC card reader
2098 14:58:42.004601
2099 14:58:42.007761 Wipe memory regions:
2100 14:58:42.007838
2101 14:58:42.011698 [0x00000000001000, 0x000000000a0000)
2102 14:58:42.011790
2103 14:58:42.014269 [0x00000000100000, 0x00000030000000)
2104 14:58:42.048652
2105 14:58:42.052296 [0x00000032662db0, 0x000000769ef000)
2106 14:58:42.099851
2107 14:58:42.102707 [0x00000100000000, 0x00000480400000)
2108 14:58:42.747469
2109 14:58:42.750487 ec_init: CrosEC protocol v3 supported (256, 256)
2110 14:58:43.181742
2111 14:58:43.181878 R8152: Initializing
2112 14:58:43.181944
2113 14:58:43.184824 Version 6 (ocp_data = 5c30)
2114 14:58:43.184905
2115 14:58:43.188128 R8152: Done initializing
2116 14:58:43.188267
2117 14:58:43.191416 Adding net device
2118 14:58:43.493303
2119 14:58:43.496008 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2120 14:58:43.496095
2121 14:58:43.496160
2122 14:58:43.496221
2123 14:58:43.499635 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2125 14:58:43.600005 volteer: tftpboot 192.168.201.1 11061968/tftp-deploy-eutjuem8/kernel/bzImage 11061968/tftp-deploy-eutjuem8/kernel/cmdline 11061968/tftp-deploy-eutjuem8/ramdisk/ramdisk.cpio.gz
2126 14:58:43.600146 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2127 14:58:43.600227 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2128 14:58:43.604429 tftpboot 192.168.201.1 11061968/tftp-deploy-eutjuem8/kernel/bzIploy-eutjuem8/kernel/cmdline 11061968/tftp-deploy-eutjuem8/ramdisk/ramdisk.cpio.gz
2129 14:58:43.604516
2130 14:58:43.604580 Waiting for link
2131 14:58:43.807677
2132 14:58:43.807820 done.
2133 14:58:43.807887
2134 14:58:43.807947 MAC: 00:24:32:30:7d:ab
2135 14:58:43.808004
2136 14:58:43.810820 Sending DHCP discover... done.
2137 14:58:43.810902
2138 14:58:43.814197 Waiting for reply... done.
2139 14:58:43.814278
2140 14:58:43.818522 Sending DHCP request... done.
2141 14:58:43.818646
2142 14:58:43.824529 Waiting for reply... done.
2143 14:58:43.824610
2144 14:58:43.824674 My ip is 192.168.201.20
2145 14:58:43.824734
2146 14:58:43.827639 The DHCP server ip is 192.168.201.1
2147 14:58:43.830743
2148 14:58:43.834576 TFTP server IP predefined by user: 192.168.201.1
2149 14:58:43.834680
2150 14:58:43.841032 Bootfile predefined by user: 11061968/tftp-deploy-eutjuem8/kernel/bzImage
2151 14:58:43.841114
2152 14:58:43.843819 Sending tftp read request... done.
2153 14:58:43.843900
2154 14:58:43.851029 Waiting for the transfer...
2155 14:58:43.851113
2156 14:58:44.425443 00000000 ################################################################
2157 14:58:44.425574
2158 14:58:44.997454 00080000 ################################################################
2159 14:58:44.997591
2160 14:58:45.569921 00100000 ################################################################
2161 14:58:45.570069
2162 14:58:46.138319 00180000 ################################################################
2163 14:58:46.138461
2164 14:58:46.710832 00200000 ################################################################
2165 14:58:46.710982
2166 14:58:47.285224 00280000 ################################################################
2167 14:58:47.285369
2168 14:58:47.855066 00300000 ################################################################
2169 14:58:47.855216
2170 14:58:48.415101 00380000 ################################################################
2171 14:58:48.415252
2172 14:58:48.989076 00400000 ################################################################
2173 14:58:48.989214
2174 14:58:49.551216 00480000 ################################################################
2175 14:58:49.551368
2176 14:58:50.124260 00500000 ################################################################
2177 14:58:50.124410
2178 14:58:50.692549 00580000 ################################################################
2179 14:58:50.692698
2180 14:58:51.270157 00600000 ################################################################
2181 14:58:51.270311
2182 14:58:51.847838 00680000 ################################################################
2183 14:58:51.847989
2184 14:58:52.443753 00700000 ################################################################
2185 14:58:52.443904
2186 14:58:52.467746 00780000 ### done.
2187 14:58:52.467834
2188 14:58:52.471099 The bootfile was 7884688 bytes long.
2189 14:58:52.471183
2190 14:58:52.474401 Sending tftp read request... done.
2191 14:58:52.474484
2192 14:58:52.477700 Waiting for the transfer...
2193 14:58:52.477784
2194 14:58:53.122003 00000000 ################################################################
2195 14:58:53.122193
2196 14:58:53.793787 00080000 ################################################################
2197 14:58:53.793940
2198 14:58:54.411716 00100000 ################################################################
2199 14:58:54.411949
2200 14:58:55.079777 00180000 ################################################################
2201 14:58:55.080384
2202 14:58:55.750267 00200000 ################################################################
2203 14:58:55.750647
2204 14:58:56.357795 00280000 ################################################################
2205 14:58:56.357938
2206 14:58:57.012147 00300000 ################################################################
2207 14:58:57.012422
2208 14:58:57.689843 00380000 ################################################################
2209 14:58:57.690381
2210 14:58:58.378155 00400000 ################################################################
2211 14:58:58.378698
2212 14:58:59.035443 00480000 ################################################################
2213 14:58:59.035978
2214 14:58:59.702550 00500000 ################################################################
2215 14:58:59.703114
2216 14:59:00.393609 00580000 ################################################################
2217 14:59:00.394143
2218 14:59:01.073937 00600000 ################################################################
2219 14:59:01.074109
2220 14:59:01.777518 00680000 ################################################################
2221 14:59:01.778004
2222 14:59:02.466048 00700000 ################################################################
2223 14:59:02.466676
2224 14:59:03.102517 00780000 ################################################################
2225 14:59:03.103211
2226 14:59:03.669238 00800000 ####################################################### done.
2227 14:59:03.669372
2228 14:59:03.672608 Sending tftp read request... done.
2229 14:59:03.672693
2230 14:59:03.675851 Waiting for the transfer...
2231 14:59:03.675936
2232 14:59:03.679343 00000000 # done.
2233 14:59:03.679428
2234 14:59:03.685422 Command line loaded dynamically from TFTP file: 11061968/tftp-deploy-eutjuem8/kernel/cmdline
2235 14:59:03.685514
2236 14:59:03.699047 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2237 14:59:03.704046
2238 14:59:03.707141 Shutting down all USB controllers.
2239 14:59:03.707317
2240 14:59:03.707430 Removing current net device
2241 14:59:03.707536
2242 14:59:03.710456 Finalizing coreboot
2243 14:59:03.710655
2244 14:59:03.716989 Exiting depthcharge with code 4 at timestamp: 30309083
2245 14:59:03.717165
2246 14:59:03.717303
2247 14:59:03.717433 Starting kernel ...
2248 14:59:03.717559
2249 14:59:03.717756
2250 14:59:03.718411 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2251 14:59:03.718639 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2252 14:59:03.718824 Setting prompt string to ['Linux version [0-9]']
2253 14:59:03.719052 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2254 14:59:03.719211 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2256 15:03:26.718882 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2258 15:03:26.719090 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2260 15:03:26.719261 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2263 15:03:26.719520 end: 2 depthcharge-action (duration 00:05:00) [common]
2265 15:03:26.719755 Cleaning after the job
2266 15:03:26.719850 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11061968/tftp-deploy-eutjuem8/ramdisk
2267 15:03:26.721188 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11061968/tftp-deploy-eutjuem8/kernel
2268 15:03:26.722734 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11061968/tftp-deploy-eutjuem8/modules
2269 15:03:26.723123 start: 5.1 power-off (timeout 00:00:30) [common]
2270 15:03:26.723303 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=off'
2271 15:03:26.800290 >> Command sent successfully.
2272 15:03:26.802765 Returned 0 in 0 seconds
2273 15:03:26.903118 end: 5.1 power-off (duration 00:00:00) [common]
2275 15:03:26.903447 start: 5.2 read-feedback (timeout 00:10:00) [common]
2276 15:03:26.903710 Listened to connection for namespace 'common' for up to 1s
2277 15:03:27.904632 Finalising connection for namespace 'common'
2278 15:03:27.904791 Disconnecting from shell: Finalise
2279 15:03:27.904883
2280 15:03:28.005170 end: 5.2 read-feedback (duration 00:00:01) [common]
2281 15:03:28.005344 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11061968
2282 15:03:28.022995 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11061968
2283 15:03:28.023197 JobError: Your job cannot terminate cleanly.