Boot log: asus-C436FA-Flip-hatch

    1 14:58:04.728195  lava-dispatcher, installed at version: 2023.05.1
    2 14:58:04.728397  start: 0 validate
    3 14:58:04.728522  Start time: 2023-07-11 14:58:04.728514+00:00 (UTC)
    4 14:58:04.728643  Using caching service: 'http://localhost/cache/?uri=%s'
    5 14:58:04.728769  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 14:58:04.998424  Using caching service: 'http://localhost/cache/?uri=%s'
    7 14:58:04.998652  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1431-g4d27d09c95c37%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 14:58:05.269083  Using caching service: 'http://localhost/cache/?uri=%s'
    9 14:58:05.269873  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1431-g4d27d09c95c37%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 14:58:07.797869  validate duration: 3.07
   12 14:58:07.798157  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 14:58:07.798254  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 14:58:07.798339  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 14:58:07.798469  Not decompressing ramdisk as can be used compressed.
   16 14:58:07.798556  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 14:58:07.798622  saving as /var/lib/lava/dispatcher/tmp/11061938/tftp-deploy-9hf46asq/ramdisk/rootfs.cpio.gz
   18 14:58:07.798683  total size: 8418130 (8MB)
   19 14:58:08.328088  progress   0% (0MB)
   20 14:58:08.341680  progress   5% (0MB)
   21 14:58:08.353263  progress  10% (0MB)
   22 14:58:08.363030  progress  15% (1MB)
   23 14:58:08.369106  progress  20% (1MB)
   24 14:58:08.373908  progress  25% (2MB)
   25 14:58:08.378087  progress  30% (2MB)
   26 14:58:08.381392  progress  35% (2MB)
   27 14:58:08.384739  progress  40% (3MB)
   28 14:58:08.387972  progress  45% (3MB)
   29 14:58:08.390759  progress  50% (4MB)
   30 14:58:08.393496  progress  55% (4MB)
   31 14:58:08.395997  progress  60% (4MB)
   32 14:58:08.398262  progress  65% (5MB)
   33 14:58:08.400519  progress  70% (5MB)
   34 14:58:08.402769  progress  75% (6MB)
   35 14:58:08.404997  progress  80% (6MB)
   36 14:58:08.407196  progress  85% (6MB)
   37 14:58:08.409402  progress  90% (7MB)
   38 14:58:08.411602  progress  95% (7MB)
   39 14:58:08.413665  progress 100% (8MB)
   40 14:58:08.413896  8MB downloaded in 0.62s (13.05MB/s)
   41 14:58:08.414047  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 14:58:08.414290  end: 1.1 download-retry (duration 00:00:01) [common]
   44 14:58:08.414377  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 14:58:08.414460  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 14:58:08.414604  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1431-g4d27d09c95c37/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 14:58:08.414678  saving as /var/lib/lava/dispatcher/tmp/11061938/tftp-deploy-9hf46asq/kernel/bzImage
   48 14:58:08.414740  total size: 7884688 (7MB)
   49 14:58:08.414801  No compression specified
   50 14:58:08.415855  progress   0% (0MB)
   51 14:58:08.418007  progress   5% (0MB)
   52 14:58:08.420114  progress  10% (0MB)
   53 14:58:08.422197  progress  15% (1MB)
   54 14:58:08.424331  progress  20% (1MB)
   55 14:58:08.426406  progress  25% (1MB)
   56 14:58:08.428483  progress  30% (2MB)
   57 14:58:08.430581  progress  35% (2MB)
   58 14:58:08.432710  progress  40% (3MB)
   59 14:58:08.434848  progress  45% (3MB)
   60 14:58:08.436997  progress  50% (3MB)
   61 14:58:08.439034  progress  55% (4MB)
   62 14:58:08.441123  progress  60% (4MB)
   63 14:58:08.443166  progress  65% (4MB)
   64 14:58:08.445247  progress  70% (5MB)
   65 14:58:08.447274  progress  75% (5MB)
   66 14:58:08.449356  progress  80% (6MB)
   67 14:58:08.451388  progress  85% (6MB)
   68 14:58:08.453461  progress  90% (6MB)
   69 14:58:08.455491  progress  95% (7MB)
   70 14:58:08.457590  progress 100% (7MB)
   71 14:58:08.457828  7MB downloaded in 0.04s (174.53MB/s)
   72 14:58:08.458014  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 14:58:08.458245  end: 1.2 download-retry (duration 00:00:00) [common]
   75 14:58:08.458332  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 14:58:08.458424  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 14:58:08.458558  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1431-g4d27d09c95c37/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 14:58:08.458629  saving as /var/lib/lava/dispatcher/tmp/11061938/tftp-deploy-9hf46asq/modules/modules.tar
   79 14:58:08.458692  total size: 250436 (0MB)
   80 14:58:08.458754  Using unxz to decompress xz
   81 14:58:08.462975  progress  13% (0MB)
   82 14:58:08.463376  progress  26% (0MB)
   83 14:58:08.463612  progress  39% (0MB)
   84 14:58:08.465178  progress  52% (0MB)
   85 14:58:08.466952  progress  65% (0MB)
   86 14:58:08.468904  progress  78% (0MB)
   87 14:58:08.470653  progress  91% (0MB)
   88 14:58:08.472527  progress 100% (0MB)
   89 14:58:08.477865  0MB downloaded in 0.02s (12.46MB/s)
   90 14:58:08.478130  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 14:58:08.478399  end: 1.3 download-retry (duration 00:00:00) [common]
   93 14:58:08.478501  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   94 14:58:08.478603  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
   95 14:58:08.478689  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 14:58:08.478776  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
   97 14:58:08.478997  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif
   98 14:58:08.479134  makedir: /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin
   99 14:58:08.479242  makedir: /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/tests
  100 14:58:08.479344  makedir: /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/results
  101 14:58:08.479459  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-add-keys
  102 14:58:08.479613  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-add-sources
  103 14:58:08.479755  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-background-process-start
  104 14:58:08.479891  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-background-process-stop
  105 14:58:08.480021  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-common-functions
  106 14:58:08.480148  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-echo-ipv4
  107 14:58:08.480275  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-install-packages
  108 14:58:08.480402  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-installed-packages
  109 14:58:08.480527  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-os-build
  110 14:58:08.480654  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-probe-channel
  111 14:58:08.480783  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-probe-ip
  112 14:58:08.480983  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-target-ip
  113 14:58:08.481129  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-target-mac
  114 14:58:08.481257  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-target-storage
  115 14:58:08.481387  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-test-case
  116 14:58:08.481517  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-test-event
  117 14:58:08.481643  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-test-feedback
  118 14:58:08.481769  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-test-raise
  119 14:58:08.481901  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-test-reference
  120 14:58:08.482032  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-test-runner
  121 14:58:08.482157  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-test-set
  122 14:58:08.482286  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-test-shell
  123 14:58:08.482416  Updating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-install-packages (oe)
  124 14:58:08.482571  Updating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/bin/lava-installed-packages (oe)
  125 14:58:08.482703  Creating /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/environment
  126 14:58:08.482809  LAVA metadata
  127 14:58:08.482883  - LAVA_JOB_ID=11061938
  128 14:58:08.482950  - LAVA_DISPATCHER_IP=192.168.201.1
  129 14:58:08.483050  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  130 14:58:08.483121  skipped lava-vland-overlay
  131 14:58:08.483196  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 14:58:08.483280  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  133 14:58:08.483343  skipped lava-multinode-overlay
  134 14:58:08.483416  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 14:58:08.483497  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  136 14:58:08.483575  Loading test definitions
  137 14:58:08.483702  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  138 14:58:08.483796  Using /lava-11061938 at stage 0
  139 14:58:08.484114  uuid=11061938_1.4.2.3.1 testdef=None
  140 14:58:08.484203  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 14:58:08.484288  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  142 14:58:08.484822  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 14:58:08.485070  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  145 14:58:08.485719  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 14:58:08.485950  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  148 14:58:08.486586  runner path: /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/0/tests/0_dmesg test_uuid 11061938_1.4.2.3.1
  149 14:58:08.486743  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 14:58:08.486997  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  152 14:58:08.487070  Using /lava-11061938 at stage 1
  153 14:58:08.487374  uuid=11061938_1.4.2.3.5 testdef=None
  154 14:58:08.487463  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  155 14:58:08.487546  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  156 14:58:08.488069  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  158 14:58:08.488293  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  159 14:58:08.488946  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  161 14:58:08.489171  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  162 14:58:08.489789  runner path: /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/1/tests/1_bootrr test_uuid 11061938_1.4.2.3.5
  163 14:58:08.489938  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  165 14:58:08.490148  Creating lava-test-runner.conf files
  166 14:58:08.490211  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/0 for stage 0
  167 14:58:08.490300  - 0_dmesg
  168 14:58:08.490384  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11061938/lava-overlay-0px5oaif/lava-11061938/1 for stage 1
  169 14:58:08.490474  - 1_bootrr
  170 14:58:08.490567  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  171 14:58:08.490650  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  172 14:58:08.499264  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  173 14:58:08.499366  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  174 14:58:08.499451  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  175 14:58:08.499536  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  176 14:58:08.499620  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  177 14:58:08.755798  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  178 14:58:08.756198  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  179 14:58:08.756321  extracting modules file /var/lib/lava/dispatcher/tmp/11061938/tftp-deploy-9hf46asq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11061938/extract-overlay-ramdisk-392frrj5/ramdisk
  180 14:58:08.769921  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  181 14:58:08.770050  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  182 14:58:08.770141  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11061938/compress-overlay-nx70hu94/overlay-1.4.2.4.tar.gz to ramdisk
  183 14:58:08.770217  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11061938/compress-overlay-nx70hu94/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11061938/extract-overlay-ramdisk-392frrj5/ramdisk
  184 14:58:08.779195  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  185 14:58:08.779315  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  186 14:58:08.779413  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  187 14:58:08.779508  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  188 14:58:08.779592  Building ramdisk /var/lib/lava/dispatcher/tmp/11061938/extract-overlay-ramdisk-392frrj5/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11061938/extract-overlay-ramdisk-392frrj5/ramdisk
  189 14:58:08.925446  >> 49788 blocks

  190 14:58:09.766385  rename /var/lib/lava/dispatcher/tmp/11061938/extract-overlay-ramdisk-392frrj5/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11061938/tftp-deploy-9hf46asq/ramdisk/ramdisk.cpio.gz
  191 14:58:09.766854  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  192 14:58:09.766996  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  193 14:58:09.767101  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  194 14:58:09.767204  No mkimage arch provided, not using FIT.
  195 14:58:09.767292  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  196 14:58:09.767382  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  197 14:58:09.767489  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  198 14:58:09.767582  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  199 14:58:09.767695  No LXC device requested
  200 14:58:09.767793  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  201 14:58:09.767883  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  202 14:58:09.767981  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  203 14:58:09.768052  Checking files for TFTP limit of 4294967296 bytes.
  204 14:58:09.768465  end: 1 tftp-deploy (duration 00:00:02) [common]
  205 14:58:09.768567  start: 2 depthcharge-action (timeout 00:05:00) [common]
  206 14:58:09.768654  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  207 14:58:09.768779  substitutions:
  208 14:58:09.768863  - {DTB}: None
  209 14:58:09.768977  - {INITRD}: 11061938/tftp-deploy-9hf46asq/ramdisk/ramdisk.cpio.gz
  210 14:58:09.769068  - {KERNEL}: 11061938/tftp-deploy-9hf46asq/kernel/bzImage
  211 14:58:09.769127  - {LAVA_MAC}: None
  212 14:58:09.769184  - {PRESEED_CONFIG}: None
  213 14:58:09.769253  - {PRESEED_LOCAL}: None
  214 14:58:09.769308  - {RAMDISK}: 11061938/tftp-deploy-9hf46asq/ramdisk/ramdisk.cpio.gz
  215 14:58:09.769364  - {ROOT_PART}: None
  216 14:58:09.769418  - {ROOT}: None
  217 14:58:09.769473  - {SERVER_IP}: 192.168.201.1
  218 14:58:09.769527  - {TEE}: None
  219 14:58:09.769581  Parsed boot commands:
  220 14:58:09.769635  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  221 14:58:09.769810  Parsed boot commands: tftpboot 192.168.201.1 11061938/tftp-deploy-9hf46asq/kernel/bzImage 11061938/tftp-deploy-9hf46asq/kernel/cmdline 11061938/tftp-deploy-9hf46asq/ramdisk/ramdisk.cpio.gz
  222 14:58:09.769900  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  223 14:58:09.769983  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  224 14:58:09.770072  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  225 14:58:09.770158  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  226 14:58:09.770230  Not connected, no need to disconnect.
  227 14:58:09.770305  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  228 14:58:09.770417  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  229 14:58:09.770488  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
  230 14:58:09.774551  Setting prompt string to ['lava-test: # ']
  231 14:58:09.774908  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  232 14:58:09.775012  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  233 14:58:09.775109  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  234 14:58:09.775202  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  235 14:58:09.775396  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
  236 14:58:14.928044  >> Command sent successfully.

  237 14:58:14.940572  Returned 0 in 5 seconds
  238 14:58:15.041651  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  240 14:58:15.042483  end: 2.2.2 reset-device (duration 00:00:05) [common]
  241 14:58:15.042776  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  242 14:58:15.043029  Setting prompt string to 'Starting depthcharge on Helios...'
  243 14:58:15.043196  Changing prompt to 'Starting depthcharge on Helios...'
  244 14:58:15.043351  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  245 14:58:15.043927  [Enter `^Ec?' for help]

  246 14:58:15.652648  

  247 14:58:15.653246  

  248 14:58:15.662878  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  249 14:58:15.665771  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  250 14:58:15.672619  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  251 14:58:15.675701  CPU: AES supported, TXT NOT supported, VT supported

  252 14:58:15.683009  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  253 14:58:15.686512  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  254 14:58:15.692632  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  255 14:58:15.695612  VBOOT: Loading verstage.

  256 14:58:15.699145  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  257 14:58:15.705800  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  258 14:58:15.709011  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  259 14:58:15.712704  CBFS @ c08000 size 3f8000

  260 14:58:15.719182  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  261 14:58:15.722553  CBFS: Locating 'fallback/verstage'

  262 14:58:15.726342  CBFS: Found @ offset 10fb80 size 1072c

  263 14:58:15.726917  

  264 14:58:15.729087  

  265 14:58:15.739012  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  266 14:58:15.753067  Probing TPM: . done!

  267 14:58:15.756607  TPM ready after 0 ms

  268 14:58:15.759912  Connected to device vid:did:rid of 1ae0:0028:00

  269 14:58:15.770418  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  270 14:58:15.773952  Initialized TPM device CR50 revision 0

  271 14:58:15.815823  tlcl_send_startup: Startup return code is 0

  272 14:58:15.816375  TPM: setup succeeded

  273 14:58:15.828876  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  274 14:58:15.832416  Chrome EC: UHEPI supported

  275 14:58:15.835992  Phase 1

  276 14:58:15.839123  FMAP: area GBB found @ c05000 (12288 bytes)

  277 14:58:15.845788  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  278 14:58:15.849178  Phase 2

  279 14:58:15.849656  Phase 3

  280 14:58:15.852421  FMAP: area GBB found @ c05000 (12288 bytes)

  281 14:58:15.859519  VB2:vb2_report_dev_firmware() This is developer signed firmware

  282 14:58:15.865576  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  283 14:58:15.869145  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  284 14:58:15.875502  VB2:vb2_verify_keyblock() Checking keyblock signature...

  285 14:58:15.891434  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  286 14:58:15.894677  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  287 14:58:15.901733  VB2:vb2_verify_fw_preamble() Verifying preamble.

  288 14:58:15.905005  Phase 4

  289 14:58:15.909029  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)

  290 14:58:15.915252  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  291 14:58:16.094954  VB2:vb2_rsa_verify_digest() Digest check failed!

  292 14:58:16.101808  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  293 14:58:16.102405  Saving nvdata

  294 14:58:16.105170  Reboot requested (10020007)

  295 14:58:16.108054  board_reset() called!

  296 14:58:16.108535  full_reset() called!

  297 14:58:20.619555  

  298 14:58:20.620148  

  299 14:58:20.629341  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  300 14:58:20.632614  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  301 14:58:20.639212  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  302 14:58:20.642680  CPU: AES supported, TXT NOT supported, VT supported

  303 14:58:20.649144  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  304 14:58:20.652318  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  305 14:58:20.659202  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  306 14:58:20.662152  VBOOT: Loading verstage.

  307 14:58:20.665863  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  308 14:58:20.672087  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  309 14:58:20.675356  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  310 14:58:20.678927  CBFS @ c08000 size 3f8000

  311 14:58:20.685514  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  312 14:58:20.689062  CBFS: Locating 'fallback/verstage'

  313 14:58:20.692262  CBFS: Found @ offset 10fb80 size 1072c

  314 14:58:20.696208  

  315 14:58:20.696772  

  316 14:58:20.706410  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  317 14:58:20.720059  Probing TPM: . done!

  318 14:58:20.723345  TPM ready after 0 ms

  319 14:58:20.726985  Connected to device vid:did:rid of 1ae0:0028:00

  320 14:58:20.737071  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  321 14:58:20.740618  Initialized TPM device CR50 revision 0

  322 14:58:20.782989  tlcl_send_startup: Startup return code is 0

  323 14:58:20.783538  TPM: setup succeeded

  324 14:58:20.796101  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  325 14:58:20.799674  Chrome EC: UHEPI supported

  326 14:58:20.802729  Phase 1

  327 14:58:20.805936  FMAP: area GBB found @ c05000 (12288 bytes)

  328 14:58:20.812484  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  329 14:58:20.819154  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  330 14:58:20.822740  Recovery requested (1009000e)

  331 14:58:20.828728  Saving nvdata

  332 14:58:20.834484  tlcl_extend: response is 0

  333 14:58:20.843504  tlcl_extend: response is 0

  334 14:58:20.850703  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  335 14:58:20.853836  CBFS @ c08000 size 3f8000

  336 14:58:20.860486  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  337 14:58:20.864302  CBFS: Locating 'fallback/romstage'

  338 14:58:20.866648  CBFS: Found @ offset 80 size 145fc

  339 14:58:20.870815  Accumulated console time in verstage 99 ms

  340 14:58:20.871425  

  341 14:58:20.871867  

  342 14:58:20.883512  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  343 14:58:20.890203  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  344 14:58:20.893202  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  345 14:58:20.896731  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  346 14:58:20.903401  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  347 14:58:20.907217  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  348 14:58:20.909741  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  349 14:58:20.913739  TCO_STS:   0000 0000

  350 14:58:20.917152  GEN_PMCON: e0015238 00000200

  351 14:58:20.920227  GBLRST_CAUSE: 00000000 00000000

  352 14:58:20.920707  prev_sleep_state 5

  353 14:58:20.922812  Boot Count incremented to 66637

  354 14:58:20.930242  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  355 14:58:20.933479  CBFS @ c08000 size 3f8000

  356 14:58:20.940514  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  357 14:58:20.941099  CBFS: Locating 'fspm.bin'

  358 14:58:20.947055  CBFS: Found @ offset 5ffc0 size 71000

  359 14:58:20.950162  Chrome EC: UHEPI supported

  360 14:58:20.956229  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  361 14:58:20.959953  Probing TPM:  done!

  362 14:58:20.966517  Connected to device vid:did:rid of 1ae0:0028:00

  363 14:58:20.976681  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  364 14:58:20.982630  Initialized TPM device CR50 revision 0

  365 14:58:20.991593  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  366 14:58:20.998054  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  367 14:58:21.001669  MRC cache found, size 1948

  368 14:58:21.004632  bootmode is set to: 2

  369 14:58:21.008286  PRMRR disabled by config.

  370 14:58:21.008835  SPD INDEX = 1

  371 14:58:21.015008  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  372 14:58:21.018129  CBFS @ c08000 size 3f8000

  373 14:58:21.024376  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  374 14:58:21.024840  CBFS: Locating 'spd.bin'

  375 14:58:21.027827  CBFS: Found @ offset 5fb80 size 400

  376 14:58:21.031480  SPD: module type is LPDDR3

  377 14:58:21.034779  SPD: module part is 

  378 14:58:21.041222  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  379 14:58:21.045008  SPD: device width 4 bits, bus width 8 bits

  380 14:58:21.048083  SPD: module size is 4096 MB (per channel)

  381 14:58:21.051247  memory slot: 0 configuration done.

  382 14:58:21.054352  memory slot: 2 configuration done.

  383 14:58:21.106208  CBMEM:

  384 14:58:21.109598  IMD: root @ 99fff000 254 entries.

  385 14:58:21.113057  IMD: root @ 99ffec00 62 entries.

  386 14:58:21.116207  External stage cache:

  387 14:58:21.119457  IMD: root @ 9abff000 254 entries.

  388 14:58:21.122928  IMD: root @ 9abfec00 62 entries.

  389 14:58:21.126227  Chrome EC: clear events_b mask to 0x0000000020004000

  390 14:58:21.142491  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  391 14:58:21.155451  tlcl_write: response is 0

  392 14:58:21.164546  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  393 14:58:21.171610  MRC: TPM MRC hash updated successfully.

  394 14:58:21.172209  2 DIMMs found

  395 14:58:21.174723  SMM Memory Map

  396 14:58:21.178012  SMRAM       : 0x9a000000 0x1000000

  397 14:58:21.181278   Subregion 0: 0x9a000000 0xa00000

  398 14:58:21.184235   Subregion 1: 0x9aa00000 0x200000

  399 14:58:21.187533   Subregion 2: 0x9ac00000 0x400000

  400 14:58:21.191221  top_of_ram = 0x9a000000

  401 14:58:21.194314  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  402 14:58:21.201101  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  403 14:58:21.204042  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  404 14:58:21.210749  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  405 14:58:21.214137  CBFS @ c08000 size 3f8000

  406 14:58:21.217546  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  407 14:58:21.220647  CBFS: Locating 'fallback/postcar'

  408 14:58:21.227424  CBFS: Found @ offset 107000 size 4b44

  409 14:58:21.230371  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  410 14:58:21.243518  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  411 14:58:21.247573  Processing 180 relocs. Offset value of 0x97c0c000

  412 14:58:21.255226  Accumulated console time in romstage 286 ms

  413 14:58:21.255850  

  414 14:58:21.256230  

  415 14:58:21.265328  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  416 14:58:21.271654  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  417 14:58:21.275099  CBFS @ c08000 size 3f8000

  418 14:58:21.278651  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  419 14:58:21.285192  CBFS: Locating 'fallback/ramstage'

  420 14:58:21.288707  CBFS: Found @ offset 43380 size 1b9e8

  421 14:58:21.295219  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  422 14:58:21.327024  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  423 14:58:21.330045  Processing 3976 relocs. Offset value of 0x98db0000

  424 14:58:21.336678  Accumulated console time in postcar 52 ms

  425 14:58:21.337154  

  426 14:58:21.337529  

  427 14:58:21.346711  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  428 14:58:21.353431  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  429 14:58:21.357157  WARNING: RO_VPD is uninitialized or empty.

  430 14:58:21.360293  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  431 14:58:21.367058  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  432 14:58:21.367612  Normal boot.

  433 14:58:21.373461  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  434 14:58:21.377078  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  435 14:58:21.380202  CBFS @ c08000 size 3f8000

  436 14:58:21.387186  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  437 14:58:21.390225  CBFS: Locating 'cpu_microcode_blob.bin'

  438 14:58:21.393290  CBFS: Found @ offset 14700 size 2ec00

  439 14:58:21.396699  microcode: sig=0x806ec pf=0x4 revision=0xc9

  440 14:58:21.399761  Skip microcode update

  441 14:58:21.403616  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  442 14:58:21.406510  CBFS @ c08000 size 3f8000

  443 14:58:21.413558  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  444 14:58:21.416599  CBFS: Locating 'fsps.bin'

  445 14:58:21.420174  CBFS: Found @ offset d1fc0 size 35000

  446 14:58:21.445033  Detected 4 core, 8 thread CPU.

  447 14:58:21.448355  Setting up SMI for CPU

  448 14:58:21.451897  IED base = 0x9ac00000

  449 14:58:21.452394  IED size = 0x00400000

  450 14:58:21.455031  Will perform SMM setup.

  451 14:58:21.461872  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  452 14:58:21.468419  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  453 14:58:21.471474  Processing 16 relocs. Offset value of 0x00030000

  454 14:58:21.475292  Attempting to start 7 APs

  455 14:58:21.478623  Waiting for 10ms after sending INIT.

  456 14:58:21.494736  Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.

  457 14:58:21.495339  done.

  458 14:58:21.497938  AP: slot 1 apic_id 3.

  459 14:58:21.501417  AP: slot 4 apic_id 2.

  460 14:58:21.504540  Waiting for 2nd SIPI to complete...done.

  461 14:58:21.508170  AP: slot 7 apic_id 7.

  462 14:58:21.508666  AP: slot 2 apic_id 6.

  463 14:58:21.511169  AP: slot 5 apic_id 4.

  464 14:58:21.515397  AP: slot 6 apic_id 5.

  465 14:58:21.521142  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  466 14:58:21.525205  Processing 13 relocs. Offset value of 0x00038000

  467 14:58:21.531601  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  468 14:58:21.538013  Installing SMM handler to 0x9a000000

  469 14:58:21.544306  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  470 14:58:21.548011  Processing 658 relocs. Offset value of 0x9a010000

  471 14:58:21.557615  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  472 14:58:21.561027  Processing 13 relocs. Offset value of 0x9a008000

  473 14:58:21.567681  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  474 14:58:21.574582  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  475 14:58:21.577645  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  476 14:58:21.584546  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  477 14:58:21.591421  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  478 14:58:21.598114  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  479 14:58:21.601194  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  480 14:58:21.607396  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  481 14:58:21.610929  Clearing SMI status registers

  482 14:58:21.614676  SMI_STS: PM1 

  483 14:58:21.615159  PM1_STS: PWRBTN 

  484 14:58:21.617764  TCO_STS: SECOND_TO 

  485 14:58:21.621240  New SMBASE 0x9a000000

  486 14:58:21.624135  In relocation handler: CPU 0

  487 14:58:21.627517  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  488 14:58:21.631092  Writing SMRR. base = 0x9a000006, mask=0xff000800

  489 14:58:21.634864  Relocation complete.

  490 14:58:21.637650  New SMBASE 0x99fff400

  491 14:58:21.638244  In relocation handler: CPU 3

  492 14:58:21.644265  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  493 14:58:21.647881  Writing SMRR. base = 0x9a000006, mask=0xff000800

  494 14:58:21.651182  Relocation complete.

  495 14:58:21.651811  New SMBASE 0x99ffe400

  496 14:58:21.654637  In relocation handler: CPU 7

  497 14:58:21.660881  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  498 14:58:21.664029  Writing SMRR. base = 0x9a000006, mask=0xff000800

  499 14:58:21.667351  Relocation complete.

  500 14:58:21.667859  New SMBASE 0x99fff800

  501 14:58:21.670959  In relocation handler: CPU 2

  502 14:58:21.677938  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  503 14:58:21.680697  Writing SMRR. base = 0x9a000006, mask=0xff000800

  504 14:58:21.684012  Relocation complete.

  505 14:58:21.684493  New SMBASE 0x99ffec00

  506 14:58:21.687501  In relocation handler: CPU 5

  507 14:58:21.691026  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  508 14:58:21.697648  Writing SMRR. base = 0x9a000006, mask=0xff000800

  509 14:58:21.701208  Relocation complete.

  510 14:58:21.701798  New SMBASE 0x99ffe800

  511 14:58:21.704353  In relocation handler: CPU 6

  512 14:58:21.707401  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  513 14:58:21.714031  Writing SMRR. base = 0x9a000006, mask=0xff000800

  514 14:58:21.714586  Relocation complete.

  515 14:58:21.717364  New SMBASE 0x99fff000

  516 14:58:21.721169  In relocation handler: CPU 4

  517 14:58:21.724503  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  518 14:58:21.731169  Writing SMRR. base = 0x9a000006, mask=0xff000800

  519 14:58:21.731812  Relocation complete.

  520 14:58:21.734304  New SMBASE 0x99fffc00

  521 14:58:21.737765  In relocation handler: CPU 1

  522 14:58:21.740468  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  523 14:58:21.747802  Writing SMRR. base = 0x9a000006, mask=0xff000800

  524 14:58:21.748412  Relocation complete.

  525 14:58:21.751022  Initializing CPU #0

  526 14:58:21.754268  CPU: vendor Intel device 806ec

  527 14:58:21.757359  CPU: family 06, model 8e, stepping 0c

  528 14:58:21.760719  Clearing out pending MCEs

  529 14:58:21.764075  Setting up local APIC...

  530 14:58:21.764676   apic_id: 0x00 done.

  531 14:58:21.767891  Turbo is available but hidden

  532 14:58:21.770873  Turbo is available and visible

  533 14:58:21.774116  VMX status: enabled

  534 14:58:21.777043  IA32_FEATURE_CONTROL status: locked

  535 14:58:21.780193  Skip microcode update

  536 14:58:21.780675  CPU #0 initialized

  537 14:58:21.783847  Initializing CPU #3

  538 14:58:21.784433  Initializing CPU #6

  539 14:58:21.787351  Initializing CPU #4

  540 14:58:21.790732  Initializing CPU #1

  541 14:58:21.793852  CPU: vendor Intel device 806ec

  542 14:58:21.797009  CPU: family 06, model 8e, stepping 0c

  543 14:58:21.800436  CPU: vendor Intel device 806ec

  544 14:58:21.803794  CPU: family 06, model 8e, stepping 0c

  545 14:58:21.807220  Clearing out pending MCEs

  546 14:58:21.807864  Clearing out pending MCEs

  547 14:58:21.810639  Setting up local APIC...

  548 14:58:21.813994  Initializing CPU #5

  549 14:58:21.817435  CPU: vendor Intel device 806ec

  550 14:58:21.820173  CPU: family 06, model 8e, stepping 0c

  551 14:58:21.823869  CPU: vendor Intel device 806ec

  552 14:58:21.827266  CPU: family 06, model 8e, stepping 0c

  553 14:58:21.830545  Clearing out pending MCEs

  554 14:58:21.831130  Clearing out pending MCEs

  555 14:58:21.833669  Setting up local APIC...

  556 14:58:21.836872  Initializing CPU #7

  557 14:58:21.837459  Initializing CPU #2

  558 14:58:21.840252  CPU: vendor Intel device 806ec

  559 14:58:21.847619  CPU: family 06, model 8e, stepping 0c

  560 14:58:21.848274  CPU: vendor Intel device 806ec

  561 14:58:21.853563  CPU: family 06, model 8e, stepping 0c

  562 14:58:21.854155  Clearing out pending MCEs

  563 14:58:21.857383   apic_id: 0x03 done.

  564 14:58:21.860390  Setting up local APIC...

  565 14:58:21.863948  Setting up local APIC...

  566 14:58:21.864536   apic_id: 0x05 done.

  567 14:58:21.866797  Setting up local APIC...

  568 14:58:21.870135   apic_id: 0x02 done.

  569 14:58:21.870728  VMX status: enabled

  570 14:58:21.873740  VMX status: enabled

  571 14:58:21.876605  IA32_FEATURE_CONTROL status: locked

  572 14:58:21.879957  IA32_FEATURE_CONTROL status: locked

  573 14:58:21.883362  Skip microcode update

  574 14:58:21.884017  Skip microcode update

  575 14:58:21.886920  CPU #1 initialized

  576 14:58:21.889956  CPU #4 initialized

  577 14:58:21.893470  CPU: vendor Intel device 806ec

  578 14:58:21.896880  CPU: family 06, model 8e, stepping 0c

  579 14:58:21.897597  Clearing out pending MCEs

  580 14:58:21.900188  Clearing out pending MCEs

  581 14:58:21.903535  Setting up local APIC...

  582 14:58:21.906273   apic_id: 0x01 done.

  583 14:58:21.906987   apic_id: 0x07 done.

  584 14:58:21.909676  Setting up local APIC...

  585 14:58:21.913215  VMX status: enabled

  586 14:58:21.913695   apic_id: 0x04 done.

  587 14:58:21.917342  VMX status: enabled

  588 14:58:21.920038  VMX status: enabled

  589 14:58:21.923948  IA32_FEATURE_CONTROL status: locked

  590 14:58:21.926843  IA32_FEATURE_CONTROL status: locked

  591 14:58:21.927430  Skip microcode update

  592 14:58:21.930272  Skip microcode update

  593 14:58:21.933368  CPU #6 initialized

  594 14:58:21.933950  CPU #5 initialized

  595 14:58:21.936943   apic_id: 0x06 done.

  596 14:58:21.940464  VMX status: enabled

  597 14:58:21.941050  VMX status: enabled

  598 14:58:21.943392  IA32_FEATURE_CONTROL status: locked

  599 14:58:21.946494  IA32_FEATURE_CONTROL status: locked

  600 14:58:21.949998  Skip microcode update

  601 14:58:21.953159  Skip microcode update

  602 14:58:21.953786  CPU #7 initialized

  603 14:58:21.956509  CPU #2 initialized

  604 14:58:21.960208  IA32_FEATURE_CONTROL status: locked

  605 14:58:21.962885  Skip microcode update

  606 14:58:21.963365  CPU #3 initialized

  607 14:58:21.966938  bsp_do_flight_plan done after 461 msecs.

  608 14:58:21.970096  CPU: frequency set to 4200 MHz

  609 14:58:21.973053  Enabling SMIs.

  610 14:58:21.973637  Locking SMM.

  611 14:58:21.988872  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  612 14:58:21.992031  CBFS @ c08000 size 3f8000

  613 14:58:21.998783  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  614 14:58:21.999362  CBFS: Locating 'vbt.bin'

  615 14:58:22.001980  CBFS: Found @ offset 5f5c0 size 499

  616 14:58:22.008799  Found a VBT of 4608 bytes after decompression

  617 14:58:22.189271  Display FSP Version Info HOB

  618 14:58:22.193348  Reference Code - CPU = 9.0.1e.30

  619 14:58:22.196170  uCode Version = 0.0.0.ca

  620 14:58:22.200278  TXT ACM version = ff.ff.ff.ffff

  621 14:58:22.202881  Display FSP Version Info HOB

  622 14:58:22.206773  Reference Code - ME = 9.0.1e.30

  623 14:58:22.209304  MEBx version = 0.0.0.0

  624 14:58:22.213367  ME Firmware Version = Consumer SKU

  625 14:58:22.216316  Display FSP Version Info HOB

  626 14:58:22.219624  Reference Code - CML PCH = 9.0.1e.30

  627 14:58:22.222784  PCH-CRID Status = Disabled

  628 14:58:22.225979  PCH-CRID Original Value = ff.ff.ff.ffff

  629 14:58:22.229033  PCH-CRID New Value = ff.ff.ff.ffff

  630 14:58:22.232644  OPROM - RST - RAID = ff.ff.ff.ffff

  631 14:58:22.236068  ChipsetInit Base Version = ff.ff.ff.ffff

  632 14:58:22.239512  ChipsetInit Oem Version = ff.ff.ff.ffff

  633 14:58:22.242760  Display FSP Version Info HOB

  634 14:58:22.249430  Reference Code - SA - System Agent = 9.0.1e.30

  635 14:58:22.253061  Reference Code - MRC = 0.7.1.6c

  636 14:58:22.253638  SA - PCIe Version = 9.0.1e.30

  637 14:58:22.255859  SA-CRID Status = Disabled

  638 14:58:22.259319  SA-CRID Original Value = 0.0.0.c

  639 14:58:22.262408  SA-CRID New Value = 0.0.0.c

  640 14:58:22.266010  OPROM - VBIOS = ff.ff.ff.ffff

  641 14:58:22.269348  RTC Init

  642 14:58:22.272361  Set power on after power failure.

  643 14:58:22.272949  Disabling Deep S3

  644 14:58:22.275865  Disabling Deep S3

  645 14:58:22.276435  Disabling Deep S4

  646 14:58:22.279376  Disabling Deep S4

  647 14:58:22.280074  Disabling Deep S5

  648 14:58:22.282873  Disabling Deep S5

  649 14:58:22.289258  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1

  650 14:58:22.289817  Enumerating buses...

  651 14:58:22.296005  Show all devs... Before device enumeration.

  652 14:58:22.296583  Root Device: enabled 1

  653 14:58:22.299026  CPU_CLUSTER: 0: enabled 1

  654 14:58:22.302443  DOMAIN: 0000: enabled 1

  655 14:58:22.305815  APIC: 00: enabled 1

  656 14:58:22.306396  PCI: 00:00.0: enabled 1

  657 14:58:22.308566  PCI: 00:02.0: enabled 1

  658 14:58:22.311945  PCI: 00:04.0: enabled 0

  659 14:58:22.315688  PCI: 00:05.0: enabled 0

  660 14:58:22.316284  PCI: 00:12.0: enabled 1

  661 14:58:22.318964  PCI: 00:12.5: enabled 0

  662 14:58:22.322565  PCI: 00:12.6: enabled 0

  663 14:58:22.323142  PCI: 00:14.0: enabled 1

  664 14:58:22.325507  PCI: 00:14.1: enabled 0

  665 14:58:22.328698  PCI: 00:14.3: enabled 1

  666 14:58:22.332256  PCI: 00:14.5: enabled 0

  667 14:58:22.332839  PCI: 00:15.0: enabled 1

  668 14:58:22.335550  PCI: 00:15.1: enabled 1

  669 14:58:22.338493  PCI: 00:15.2: enabled 0

  670 14:58:22.342116  PCI: 00:15.3: enabled 0

  671 14:58:22.342695  PCI: 00:16.0: enabled 1

  672 14:58:22.345261  PCI: 00:16.1: enabled 0

  673 14:58:22.348631  PCI: 00:16.2: enabled 0

  674 14:58:22.351575  PCI: 00:16.3: enabled 0

  675 14:58:22.352105  PCI: 00:16.4: enabled 0

  676 14:58:22.355325  PCI: 00:16.5: enabled 0

  677 14:58:22.358173  PCI: 00:17.0: enabled 1

  678 14:58:22.361372  PCI: 00:19.0: enabled 1

  679 14:58:22.361870  PCI: 00:19.1: enabled 0

  680 14:58:22.365522  PCI: 00:19.2: enabled 0

  681 14:58:22.368816  PCI: 00:1a.0: enabled 0

  682 14:58:22.371321  PCI: 00:1c.0: enabled 0

  683 14:58:22.371850  PCI: 00:1c.1: enabled 0

  684 14:58:22.375028  PCI: 00:1c.2: enabled 0

  685 14:58:22.379093  PCI: 00:1c.3: enabled 0

  686 14:58:22.379714  PCI: 00:1c.4: enabled 0

  687 14:58:22.381760  PCI: 00:1c.5: enabled 0

  688 14:58:22.385051  PCI: 00:1c.6: enabled 0

  689 14:58:22.387934  PCI: 00:1c.7: enabled 0

  690 14:58:22.388420  PCI: 00:1d.0: enabled 1

  691 14:58:22.391831  PCI: 00:1d.1: enabled 0

  692 14:58:22.394729  PCI: 00:1d.2: enabled 0

  693 14:58:22.398296  PCI: 00:1d.3: enabled 0

  694 14:58:22.398874  PCI: 00:1d.4: enabled 0

  695 14:58:22.401396  PCI: 00:1d.5: enabled 1

  696 14:58:22.404651  PCI: 00:1e.0: enabled 1

  697 14:58:22.407782  PCI: 00:1e.1: enabled 0

  698 14:58:22.408344  PCI: 00:1e.2: enabled 1

  699 14:58:22.411064  PCI: 00:1e.3: enabled 1

  700 14:58:22.415120  PCI: 00:1f.0: enabled 1

  701 14:58:22.415757  PCI: 00:1f.1: enabled 1

  702 14:58:22.417913  PCI: 00:1f.2: enabled 1

  703 14:58:22.421210  PCI: 00:1f.3: enabled 1

  704 14:58:22.424632  PCI: 00:1f.4: enabled 1

  705 14:58:22.425221  PCI: 00:1f.5: enabled 1

  706 14:58:22.428216  PCI: 00:1f.6: enabled 0

  707 14:58:22.431337  USB0 port 0: enabled 1

  708 14:58:22.432080  I2C: 00:15: enabled 1

  709 14:58:22.434922  I2C: 00:5d: enabled 1

  710 14:58:22.437634  GENERIC: 0.0: enabled 1

  711 14:58:22.441477  I2C: 00:1a: enabled 1

  712 14:58:22.442074  I2C: 00:38: enabled 1

  713 14:58:22.445026  I2C: 00:39: enabled 1

  714 14:58:22.448283  I2C: 00:3a: enabled 1

  715 14:58:22.448858  I2C: 00:3b: enabled 1

  716 14:58:22.450881  PCI: 00:00.0: enabled 1

  717 14:58:22.454406  SPI: 00: enabled 1

  718 14:58:22.454981  SPI: 01: enabled 1

  719 14:58:22.457544  PNP: 0c09.0: enabled 1

  720 14:58:22.460878  USB2 port 0: enabled 1

  721 14:58:22.461349  USB2 port 1: enabled 1

  722 14:58:22.464065  USB2 port 2: enabled 0

  723 14:58:22.467512  USB2 port 3: enabled 0

  724 14:58:22.468035  USB2 port 5: enabled 0

  725 14:58:22.470946  USB2 port 6: enabled 1

  726 14:58:22.474378  USB2 port 9: enabled 1

  727 14:58:22.477637  USB3 port 0: enabled 1

  728 14:58:22.478147  USB3 port 1: enabled 1

  729 14:58:22.481061  USB3 port 2: enabled 1

  730 14:58:22.484383  USB3 port 3: enabled 1

  731 14:58:22.484960  USB3 port 4: enabled 0

  732 14:58:22.488084  APIC: 03: enabled 1

  733 14:58:22.490493  APIC: 06: enabled 1

  734 14:58:22.490963  APIC: 01: enabled 1

  735 14:58:22.493690  APIC: 02: enabled 1

  736 14:58:22.494162  APIC: 04: enabled 1

  737 14:58:22.497340  APIC: 05: enabled 1

  738 14:58:22.501194  APIC: 07: enabled 1

  739 14:58:22.501767  Compare with tree...

  740 14:58:22.503984  Root Device: enabled 1

  741 14:58:22.507518   CPU_CLUSTER: 0: enabled 1

  742 14:58:22.510382    APIC: 00: enabled 1

  743 14:58:22.510860    APIC: 03: enabled 1

  744 14:58:22.514212    APIC: 06: enabled 1

  745 14:58:22.517754    APIC: 01: enabled 1

  746 14:58:22.518330    APIC: 02: enabled 1

  747 14:58:22.520588    APIC: 04: enabled 1

  748 14:58:22.523964    APIC: 05: enabled 1

  749 14:58:22.524440    APIC: 07: enabled 1

  750 14:58:22.527293   DOMAIN: 0000: enabled 1

  751 14:58:22.530571    PCI: 00:00.0: enabled 1

  752 14:58:22.533807    PCI: 00:02.0: enabled 1

  753 14:58:22.534399    PCI: 00:04.0: enabled 0

  754 14:58:22.538136    PCI: 00:05.0: enabled 0

  755 14:58:22.540585    PCI: 00:12.0: enabled 1

  756 14:58:22.543823    PCI: 00:12.5: enabled 0

  757 14:58:22.547026    PCI: 00:12.6: enabled 0

  758 14:58:22.547604    PCI: 00:14.0: enabled 1

  759 14:58:22.550660     USB0 port 0: enabled 1

  760 14:58:22.554084      USB2 port 0: enabled 1

  761 14:58:22.557683      USB2 port 1: enabled 1

  762 14:58:22.560632      USB2 port 2: enabled 0

  763 14:58:22.561113      USB2 port 3: enabled 0

  764 14:58:22.563752      USB2 port 5: enabled 0

  765 14:58:22.566796      USB2 port 6: enabled 1

  766 14:58:22.570507      USB2 port 9: enabled 1

  767 14:58:22.574121      USB3 port 0: enabled 1

  768 14:58:22.577019      USB3 port 1: enabled 1

  769 14:58:22.577499      USB3 port 2: enabled 1

  770 14:58:22.580333      USB3 port 3: enabled 1

  771 14:58:22.583540      USB3 port 4: enabled 0

  772 14:58:22.587349    PCI: 00:14.1: enabled 0

  773 14:58:22.591116    PCI: 00:14.3: enabled 1

  774 14:58:22.591592    PCI: 00:14.5: enabled 0

  775 14:58:22.593893    PCI: 00:15.0: enabled 1

  776 14:58:22.597035     I2C: 00:15: enabled 1

  777 14:58:22.600225    PCI: 00:15.1: enabled 1

  778 14:58:22.603792     I2C: 00:5d: enabled 1

  779 14:58:22.604386     GENERIC: 0.0: enabled 1

  780 14:58:22.606785    PCI: 00:15.2: enabled 0

  781 14:58:22.610437    PCI: 00:15.3: enabled 0

  782 14:58:22.613222    PCI: 00:16.0: enabled 1

  783 14:58:22.616908    PCI: 00:16.1: enabled 0

  784 14:58:22.617386    PCI: 00:16.2: enabled 0

  785 14:58:22.619857    PCI: 00:16.3: enabled 0

  786 14:58:22.622974    PCI: 00:16.4: enabled 0

  787 14:58:22.626910    PCI: 00:16.5: enabled 0

  788 14:58:22.627384    PCI: 00:17.0: enabled 1

  789 14:58:22.630363    PCI: 00:19.0: enabled 1

  790 14:58:22.633981     I2C: 00:1a: enabled 1

  791 14:58:22.636579     I2C: 00:38: enabled 1

  792 14:58:22.640429     I2C: 00:39: enabled 1

  793 14:58:22.640991     I2C: 00:3a: enabled 1

  794 14:58:22.643927     I2C: 00:3b: enabled 1

  795 14:58:22.647102    PCI: 00:19.1: enabled 0

  796 14:58:22.649954    PCI: 00:19.2: enabled 0

  797 14:58:22.650436    PCI: 00:1a.0: enabled 0

  798 14:58:22.653349    PCI: 00:1c.0: enabled 0

  799 14:58:22.656515    PCI: 00:1c.1: enabled 0

  800 14:58:22.660130    PCI: 00:1c.2: enabled 0

  801 14:58:22.663229    PCI: 00:1c.3: enabled 0

  802 14:58:22.663856    PCI: 00:1c.4: enabled 0

  803 14:58:22.666091    PCI: 00:1c.5: enabled 0

  804 14:58:22.669973    PCI: 00:1c.6: enabled 0

  805 14:58:22.673031    PCI: 00:1c.7: enabled 0

  806 14:58:22.675993    PCI: 00:1d.0: enabled 1

  807 14:58:22.676574    PCI: 00:1d.1: enabled 0

  808 14:58:22.679816    PCI: 00:1d.2: enabled 0

  809 14:58:22.682661    PCI: 00:1d.3: enabled 0

  810 14:58:22.686107    PCI: 00:1d.4: enabled 0

  811 14:58:22.689616    PCI: 00:1d.5: enabled 1

  812 14:58:22.690153     PCI: 00:00.0: enabled 1

  813 14:58:22.692818    PCI: 00:1e.0: enabled 1

  814 14:58:22.696105    PCI: 00:1e.1: enabled 0

  815 14:58:22.699390    PCI: 00:1e.2: enabled 1

  816 14:58:22.702738     SPI: 00: enabled 1

  817 14:58:22.703200    PCI: 00:1e.3: enabled 1

  818 14:58:22.706032     SPI: 01: enabled 1

  819 14:58:22.709657    PCI: 00:1f.0: enabled 1

  820 14:58:22.712730     PNP: 0c09.0: enabled 1

  821 14:58:22.713175    PCI: 00:1f.1: enabled 1

  822 14:58:22.715753    PCI: 00:1f.2: enabled 1

  823 14:58:22.719456    PCI: 00:1f.3: enabled 1

  824 14:58:22.722699    PCI: 00:1f.4: enabled 1

  825 14:58:22.723132    PCI: 00:1f.5: enabled 1

  826 14:58:22.726020    PCI: 00:1f.6: enabled 0

  827 14:58:22.729101  Root Device scanning...

  828 14:58:22.732336  scan_static_bus for Root Device

  829 14:58:22.735701  CPU_CLUSTER: 0 enabled

  830 14:58:22.736136  DOMAIN: 0000 enabled

  831 14:58:22.739024  DOMAIN: 0000 scanning...

  832 14:58:22.742496  PCI: pci_scan_bus for bus 00

  833 14:58:22.745667  PCI: 00:00.0 [8086/0000] ops

  834 14:58:22.749199  PCI: 00:00.0 [8086/9b61] enabled

  835 14:58:22.752844  PCI: 00:02.0 [8086/0000] bus ops

  836 14:58:22.755920  PCI: 00:02.0 [8086/9b41] enabled

  837 14:58:22.759663  PCI: 00:04.0 [8086/1903] disabled

  838 14:58:22.762528  PCI: 00:08.0 [8086/1911] enabled

  839 14:58:22.766589  PCI: 00:12.0 [8086/02f9] enabled

  840 14:58:22.768680  PCI: 00:14.0 [8086/0000] bus ops

  841 14:58:22.772211  PCI: 00:14.0 [8086/02ed] enabled

  842 14:58:22.775600  PCI: 00:14.2 [8086/02ef] enabled

  843 14:58:22.779259  PCI: 00:14.3 [8086/02f0] enabled

  844 14:58:22.782033  PCI: 00:15.0 [8086/0000] bus ops

  845 14:58:22.785786  PCI: 00:15.0 [8086/02e8] enabled

  846 14:58:22.789066  PCI: 00:15.1 [8086/0000] bus ops

  847 14:58:22.792179  PCI: 00:15.1 [8086/02e9] enabled

  848 14:58:22.795739  PCI: 00:16.0 [8086/0000] ops

  849 14:58:22.798659  PCI: 00:16.0 [8086/02e0] enabled

  850 14:58:22.802578  PCI: 00:17.0 [8086/0000] ops

  851 14:58:22.805702  PCI: 00:17.0 [8086/02d3] enabled

  852 14:58:22.808890  PCI: 00:19.0 [8086/0000] bus ops

  853 14:58:22.812068  PCI: 00:19.0 [8086/02c5] enabled

  854 14:58:22.815725  PCI: 00:1d.0 [8086/0000] bus ops

  855 14:58:22.818737  PCI: 00:1d.0 [8086/02b0] enabled

  856 14:58:22.825663  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  857 14:58:22.826113  PCI: 00:1e.0 [8086/0000] ops

  858 14:58:22.828988  PCI: 00:1e.0 [8086/02a8] enabled

  859 14:58:22.832195  PCI: 00:1e.2 [8086/0000] bus ops

  860 14:58:22.835438  PCI: 00:1e.2 [8086/02aa] enabled

  861 14:58:22.838727  PCI: 00:1e.3 [8086/0000] bus ops

  862 14:58:22.842248  PCI: 00:1e.3 [8086/02ab] enabled

  863 14:58:22.845576  PCI: 00:1f.0 [8086/0000] bus ops

  864 14:58:22.848618  PCI: 00:1f.0 [8086/0284] enabled

  865 14:58:22.856117  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  866 14:58:22.862120  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  867 14:58:22.865187  PCI: 00:1f.3 [8086/0000] bus ops

  868 14:58:22.868494  PCI: 00:1f.3 [8086/02c8] enabled

  869 14:58:22.872142  PCI: 00:1f.4 [8086/0000] bus ops

  870 14:58:22.875349  PCI: 00:1f.4 [8086/02a3] enabled

  871 14:58:22.878859  PCI: 00:1f.5 [8086/0000] bus ops

  872 14:58:22.882285  PCI: 00:1f.5 [8086/02a4] enabled

  873 14:58:22.885290  PCI: Leftover static devices:

  874 14:58:22.885726  PCI: 00:05.0

  875 14:58:22.888436  PCI: 00:12.5

  876 14:58:22.888988  PCI: 00:12.6

  877 14:58:22.889345  PCI: 00:14.1

  878 14:58:22.891982  PCI: 00:14.5

  879 14:58:22.892420  PCI: 00:15.2

  880 14:58:22.895324  PCI: 00:15.3

  881 14:58:22.895818  PCI: 00:16.1

  882 14:58:22.896346  PCI: 00:16.2

  883 14:58:22.898870  PCI: 00:16.3

  884 14:58:22.899322  PCI: 00:16.4

  885 14:58:22.902569  PCI: 00:16.5

  886 14:58:22.903004  PCI: 00:19.1

  887 14:58:22.905184  PCI: 00:19.2

  888 14:58:22.905643  PCI: 00:1a.0

  889 14:58:22.906045  PCI: 00:1c.0

  890 14:58:22.908432  PCI: 00:1c.1

  891 14:58:22.908868  PCI: 00:1c.2

  892 14:58:22.911941  PCI: 00:1c.3

  893 14:58:22.912393  PCI: 00:1c.4

  894 14:58:22.912742  PCI: 00:1c.5

  895 14:58:22.915193  PCI: 00:1c.6

  896 14:58:22.915630  PCI: 00:1c.7

  897 14:58:22.918912  PCI: 00:1d.1

  898 14:58:22.919347  PCI: 00:1d.2

  899 14:58:22.919738  PCI: 00:1d.3

  900 14:58:22.922411  PCI: 00:1d.4

  901 14:58:22.922847  PCI: 00:1d.5

  902 14:58:22.925300  PCI: 00:1e.1

  903 14:58:22.925737  PCI: 00:1f.1

  904 14:58:22.928650  PCI: 00:1f.2

  905 14:58:22.929090  PCI: 00:1f.6

  906 14:58:22.931818  PCI: Check your devicetree.cb.

  907 14:58:22.935128  PCI: 00:02.0 scanning...

  908 14:58:22.938489  scan_generic_bus for PCI: 00:02.0

  909 14:58:22.941981  scan_generic_bus for PCI: 00:02.0 done

  910 14:58:22.948468  scan_bus: scanning of bus PCI: 00:02.0 took 10194 usecs

  911 14:58:22.948907  PCI: 00:14.0 scanning...

  912 14:58:22.952591  scan_static_bus for PCI: 00:14.0

  913 14:58:22.955276  USB0 port 0 enabled

  914 14:58:22.958807  USB0 port 0 scanning...

  915 14:58:22.962113  scan_static_bus for USB0 port 0

  916 14:58:22.962568  USB2 port 0 enabled

  917 14:58:22.964777  USB2 port 1 enabled

  918 14:58:22.968552  USB2 port 2 disabled

  919 14:58:22.968987  USB2 port 3 disabled

  920 14:58:22.971563  USB2 port 5 disabled

  921 14:58:22.974669  USB2 port 6 enabled

  922 14:58:22.975104  USB2 port 9 enabled

  923 14:58:22.978463  USB3 port 0 enabled

  924 14:58:22.981865  USB3 port 1 enabled

  925 14:58:22.982300  USB3 port 2 enabled

  926 14:58:22.984958  USB3 port 3 enabled

  927 14:58:22.985393  USB3 port 4 disabled

  928 14:58:22.988244  USB2 port 0 scanning...

  929 14:58:22.991319  scan_static_bus for USB2 port 0

  930 14:58:22.994744  scan_static_bus for USB2 port 0 done

  931 14:58:23.001641  scan_bus: scanning of bus USB2 port 0 took 9697 usecs

  932 14:58:23.004775  USB2 port 1 scanning...

  933 14:58:23.007968  scan_static_bus for USB2 port 1

  934 14:58:23.011318  scan_static_bus for USB2 port 1 done

  935 14:58:23.015079  scan_bus: scanning of bus USB2 port 1 took 9692 usecs

  936 14:58:23.018119  USB2 port 6 scanning...

  937 14:58:23.021357  scan_static_bus for USB2 port 6

  938 14:58:23.024911  scan_static_bus for USB2 port 6 done

  939 14:58:23.031232  scan_bus: scanning of bus USB2 port 6 took 9712 usecs

  940 14:58:23.034814  USB2 port 9 scanning...

  941 14:58:23.038043  scan_static_bus for USB2 port 9

  942 14:58:23.041277  scan_static_bus for USB2 port 9 done

  943 14:58:23.044715  scan_bus: scanning of bus USB2 port 9 took 9707 usecs

  944 14:58:23.048209  USB3 port 0 scanning...

  945 14:58:23.051157  scan_static_bus for USB3 port 0

  946 14:58:23.054608  scan_static_bus for USB3 port 0 done

  947 14:58:23.061195  scan_bus: scanning of bus USB3 port 0 took 9709 usecs

  948 14:58:23.064626  USB3 port 1 scanning...

  949 14:58:23.067725  scan_static_bus for USB3 port 1

  950 14:58:23.071237  scan_static_bus for USB3 port 1 done

  951 14:58:23.077823  scan_bus: scanning of bus USB3 port 1 took 9698 usecs

  952 14:58:23.078261  USB3 port 2 scanning...

  953 14:58:23.081024  scan_static_bus for USB3 port 2

  954 14:58:23.084153  scan_static_bus for USB3 port 2 done

  955 14:58:23.090930  scan_bus: scanning of bus USB3 port 2 took 9701 usecs

  956 14:58:23.094743  USB3 port 3 scanning...

  957 14:58:23.097781  scan_static_bus for USB3 port 3

  958 14:58:23.100973  scan_static_bus for USB3 port 3 done

  959 14:58:23.107884  scan_bus: scanning of bus USB3 port 3 took 9699 usecs

  960 14:58:23.111374  scan_static_bus for USB0 port 0 done

  961 14:58:23.114628  scan_bus: scanning of bus USB0 port 0 took 155378 usecs

  962 14:58:23.117595  scan_static_bus for PCI: 00:14.0 done

  963 14:58:23.125165  scan_bus: scanning of bus PCI: 00:14.0 took 173001 usecs

  964 14:58:23.127448  PCI: 00:15.0 scanning...

  965 14:58:23.130926  scan_generic_bus for PCI: 00:15.0

  966 14:58:23.133985  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

  967 14:58:23.138039  scan_generic_bus for PCI: 00:15.0 done

  968 14:58:23.144136  scan_bus: scanning of bus PCI: 00:15.0 took 14308 usecs

  969 14:58:23.147705  PCI: 00:15.1 scanning...

  970 14:58:23.150750  scan_generic_bus for PCI: 00:15.1

  971 14:58:23.154993  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

  972 14:58:23.157608  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

  973 14:58:23.164121  scan_generic_bus for PCI: 00:15.1 done

  974 14:58:23.167626  scan_bus: scanning of bus PCI: 00:15.1 took 18607 usecs

  975 14:58:23.171239  PCI: 00:19.0 scanning...

  976 14:58:23.174336  scan_generic_bus for PCI: 00:19.0

  977 14:58:23.177200  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

  978 14:58:23.184368  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

  979 14:58:23.187299  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

  980 14:58:23.190625  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

  981 14:58:23.194262  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

  982 14:58:23.200795  scan_generic_bus for PCI: 00:19.0 done

  983 14:58:23.204152  scan_bus: scanning of bus PCI: 00:19.0 took 30736 usecs

  984 14:58:23.207109  PCI: 00:1d.0 scanning...

  985 14:58:23.210816  do_pci_scan_bridge for PCI: 00:1d.0

  986 14:58:23.213890  PCI: pci_scan_bus for bus 01

  987 14:58:23.217253  PCI: 01:00.0 [1c5c/1327] enabled

  988 14:58:23.220457  Enabling Common Clock Configuration

  989 14:58:23.227471  L1 Sub-State supported from root port 29

  990 14:58:23.227958  L1 Sub-State Support = 0xf

  991 14:58:23.230326  CommonModeRestoreTime = 0x28

  992 14:58:23.237380  Power On Value = 0x16, Power On Scale = 0x0

  993 14:58:23.237815  ASPM: Enabled L1

  994 14:58:23.244224  scan_bus: scanning of bus PCI: 00:1d.0 took 32795 usecs

  995 14:58:23.244664  PCI: 00:1e.2 scanning...

  996 14:58:23.250893  scan_generic_bus for PCI: 00:1e.2

  997 14:58:23.254097  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

  998 14:58:23.257645  scan_generic_bus for PCI: 00:1e.2 done

  999 14:58:23.264175  scan_bus: scanning of bus PCI: 00:1e.2 took 13996 usecs

 1000 14:58:23.264613  PCI: 00:1e.3 scanning...

 1001 14:58:23.268114  scan_generic_bus for PCI: 00:1e.3

 1002 14:58:23.274243  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1003 14:58:23.277197  scan_generic_bus for PCI: 00:1e.3 done

 1004 14:58:23.280787  scan_bus: scanning of bus PCI: 00:1e.3 took 14005 usecs

 1005 14:58:23.284067  PCI: 00:1f.0 scanning...

 1006 14:58:23.287129  scan_static_bus for PCI: 00:1f.0

 1007 14:58:23.290656  PNP: 0c09.0 enabled

 1008 14:58:23.293898  scan_static_bus for PCI: 00:1f.0 done

 1009 14:58:23.300469  scan_bus: scanning of bus PCI: 00:1f.0 took 12055 usecs

 1010 14:58:23.300909  PCI: 00:1f.3 scanning...

 1011 14:58:23.307479  scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs

 1012 14:58:23.310902  PCI: 00:1f.4 scanning...

 1013 14:58:23.314010  scan_generic_bus for PCI: 00:1f.4

 1014 14:58:23.317512  scan_generic_bus for PCI: 00:1f.4 done

 1015 14:58:23.323697  scan_bus: scanning of bus PCI: 00:1f.4 took 10191 usecs

 1016 14:58:23.326881  PCI: 00:1f.5 scanning...

 1017 14:58:23.330613  scan_generic_bus for PCI: 00:1f.5

 1018 14:58:23.333529  scan_generic_bus for PCI: 00:1f.5 done

 1019 14:58:23.340195  scan_bus: scanning of bus PCI: 00:1f.5 took 10185 usecs

 1020 14:58:23.343800  scan_bus: scanning of bus DOMAIN: 0000 took 605079 usecs

 1021 14:58:23.346915  scan_static_bus for Root Device done

 1022 14:58:23.353664  scan_bus: scanning of bus Root Device took 624962 usecs

 1023 14:58:23.354101  done

 1024 14:58:23.356979  Chrome EC: UHEPI supported

 1025 14:58:23.363693  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1026 14:58:23.370385  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1027 14:58:23.376665  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1028 14:58:23.383754  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1029 14:58:23.387423  SPI flash protection: WPSW=0 SRP0=0

 1030 14:58:23.393627  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1031 14:58:23.396896  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2

 1032 14:58:23.399974  found VGA at PCI: 00:02.0

 1033 14:58:23.403591  Setting up VGA for PCI: 00:02.0

 1034 14:58:23.406801  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1035 14:58:23.413250  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1036 14:58:23.416789  Allocating resources...

 1037 14:58:23.417243  Reading resources...

 1038 14:58:23.423439  Root Device read_resources bus 0 link: 0

 1039 14:58:23.426616  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1040 14:58:23.433436  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1041 14:58:23.436658  DOMAIN: 0000 read_resources bus 0 link: 0

 1042 14:58:23.443704  PCI: 00:14.0 read_resources bus 0 link: 0

 1043 14:58:23.447042  USB0 port 0 read_resources bus 0 link: 0

 1044 14:58:23.454494  USB0 port 0 read_resources bus 0 link: 0 done

 1045 14:58:23.457505  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1046 14:58:23.464763  PCI: 00:15.0 read_resources bus 1 link: 0

 1047 14:58:23.468383  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1048 14:58:23.474933  PCI: 00:15.1 read_resources bus 2 link: 0

 1049 14:58:23.478383  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1050 14:58:23.485508  PCI: 00:19.0 read_resources bus 3 link: 0

 1051 14:58:23.492293  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1052 14:58:23.495687  PCI: 00:1d.0 read_resources bus 1 link: 0

 1053 14:58:23.502099  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1054 14:58:23.505976  PCI: 00:1e.2 read_resources bus 4 link: 0

 1055 14:58:23.512817  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1056 14:58:23.515912  PCI: 00:1e.3 read_resources bus 5 link: 0

 1057 14:58:23.522786  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1058 14:58:23.525825  PCI: 00:1f.0 read_resources bus 0 link: 0

 1059 14:58:23.532217  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1060 14:58:23.535593  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1061 14:58:23.542805  Root Device read_resources bus 0 link: 0 done

 1062 14:58:23.545664  Done reading resources.

 1063 14:58:23.549303  Show resources in subtree (Root Device)...After reading.

 1064 14:58:23.556023   Root Device child on link 0 CPU_CLUSTER: 0

 1065 14:58:23.559172    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1066 14:58:23.559603     APIC: 00

 1067 14:58:23.562331     APIC: 03

 1068 14:58:23.562763     APIC: 06

 1069 14:58:23.563101     APIC: 01

 1070 14:58:23.566258     APIC: 02

 1071 14:58:23.566686     APIC: 04

 1072 14:58:23.569216     APIC: 05

 1073 14:58:23.569683     APIC: 07

 1074 14:58:23.572164    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1075 14:58:23.582791    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1076 14:58:23.592511    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1077 14:58:23.592971     PCI: 00:00.0

 1078 14:58:23.642642     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1079 14:58:23.643265     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1080 14:58:23.643755     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1081 14:58:23.644585     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1082 14:58:23.645257     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1083 14:58:23.692247     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1084 14:58:23.692813     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1085 14:58:23.693295     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1086 14:58:23.693742     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1087 14:58:23.694109     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1088 14:58:23.741410     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1089 14:58:23.742221     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1090 14:58:23.743016     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1091 14:58:23.744140     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1092 14:58:23.744514     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1093 14:58:23.791152     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1094 14:58:23.791607     PCI: 00:02.0

 1095 14:58:23.792325     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1096 14:58:23.792846     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1097 14:58:23.794117     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1098 14:58:23.794587     PCI: 00:04.0

 1099 14:58:23.794955     PCI: 00:08.0

 1100 14:58:23.795589     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1101 14:58:23.795984     PCI: 00:12.0

 1102 14:58:23.805809     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1103 14:58:23.806249     PCI: 00:14.0 child on link 0 USB0 port 0

 1104 14:58:23.815555     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1105 14:58:23.819088      USB0 port 0 child on link 0 USB2 port 0

 1106 14:58:23.819587       USB2 port 0

 1107 14:58:23.822075       USB2 port 1

 1108 14:58:23.822695       USB2 port 2

 1109 14:58:23.825302       USB2 port 3

 1110 14:58:23.825827       USB2 port 5

 1111 14:58:23.828854       USB2 port 6

 1112 14:58:23.832255       USB2 port 9

 1113 14:58:23.832709       USB3 port 0

 1114 14:58:23.835364       USB3 port 1

 1115 14:58:23.835905       USB3 port 2

 1116 14:58:23.838735       USB3 port 3

 1117 14:58:23.839300       USB3 port 4

 1118 14:58:23.841806     PCI: 00:14.2

 1119 14:58:23.852073     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1120 14:58:23.862181     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1121 14:58:23.862629     PCI: 00:14.3

 1122 14:58:23.871579     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1123 14:58:23.875112     PCI: 00:15.0 child on link 0 I2C: 01:15

 1124 14:58:23.884992     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1125 14:58:23.888956      I2C: 01:15

 1126 14:58:23.891686     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1127 14:58:23.901660     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1128 14:58:23.905395      I2C: 02:5d

 1129 14:58:23.905854      GENERIC: 0.0

 1130 14:58:23.908661     PCI: 00:16.0

 1131 14:58:23.918322     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1132 14:58:23.918785     PCI: 00:17.0

 1133 14:58:23.928891     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1134 14:58:23.938377     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1135 14:58:23.945135     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1136 14:58:23.951728     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1137 14:58:23.961832     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1138 14:58:23.971418     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1139 14:58:23.975222     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1140 14:58:23.984817     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1141 14:58:23.987999      I2C: 03:1a

 1142 14:58:23.988430      I2C: 03:38

 1143 14:58:23.988805      I2C: 03:39

 1144 14:58:23.991306      I2C: 03:3a

 1145 14:58:23.991913      I2C: 03:3b

 1146 14:58:23.998081     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1147 14:58:24.005303     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1148 14:58:24.014718     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1149 14:58:24.024630     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1150 14:58:24.028126      PCI: 01:00.0

 1151 14:58:24.037943      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1152 14:58:24.038380     PCI: 00:1e.0

 1153 14:58:24.047986     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1154 14:58:24.057989     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1155 14:58:24.064481     PCI: 00:1e.2 child on link 0 SPI: 00

 1156 14:58:24.074356     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1157 14:58:24.074793      SPI: 00

 1158 14:58:24.077464     PCI: 00:1e.3 child on link 0 SPI: 01

 1159 14:58:24.087755     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1160 14:58:24.090988      SPI: 01

 1161 14:58:24.094121     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1162 14:58:24.100939     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1163 14:58:24.111028     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1164 14:58:24.114418      PNP: 0c09.0

 1165 14:58:24.120947      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1166 14:58:24.124377     PCI: 00:1f.3

 1167 14:58:24.134034     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1168 14:58:24.144623     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1169 14:58:24.145061     PCI: 00:1f.4

 1170 14:58:24.154379     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1171 14:58:24.164348     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1172 14:58:24.167264     PCI: 00:1f.5

 1173 14:58:24.174549     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1174 14:58:24.180958  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1175 14:58:24.187697  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1176 14:58:24.194055  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1177 14:58:24.197615  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1178 14:58:24.201024  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1179 14:58:24.204191  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1180 14:58:24.207285  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1181 14:58:24.213885  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1182 14:58:24.220485  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1183 14:58:24.230381  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1184 14:58:24.237091  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1185 14:58:24.243483  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1186 14:58:24.250318  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1187 14:58:24.257079  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1188 14:58:24.260017  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1189 14:58:24.266766  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1190 14:58:24.269972  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1191 14:58:24.277358  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1192 14:58:24.280078  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1193 14:58:24.286563  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1194 14:58:24.290063  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1195 14:58:24.296479  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1196 14:58:24.299942  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1197 14:58:24.306468  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1198 14:58:24.310174  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1199 14:58:24.316440  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1200 14:58:24.320191  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1201 14:58:24.323628  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1202 14:58:24.330009  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1203 14:58:24.333394  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1204 14:58:24.339609  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1205 14:58:24.343274  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1206 14:58:24.349763  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1207 14:58:24.353311  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1208 14:58:24.359818  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1209 14:58:24.362939  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1210 14:58:24.369473  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1211 14:58:24.376104  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1212 14:58:24.379561  avoid_fixed_resources: DOMAIN: 0000

 1213 14:58:24.386464  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1214 14:58:24.393536  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1215 14:58:24.399451  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1216 14:58:24.409518  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1217 14:58:24.416041  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1218 14:58:24.422677  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1219 14:58:24.432722  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1220 14:58:24.439708  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1221 14:58:24.445788  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1222 14:58:24.452294  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1223 14:58:24.462294  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1224 14:58:24.468744  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1225 14:58:24.469182  Setting resources...

 1226 14:58:24.476341  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1227 14:58:24.482473  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1228 14:58:24.485635  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1229 14:58:24.488786  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1230 14:58:24.492645  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1231 14:58:24.498832  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1232 14:58:24.505515  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1233 14:58:24.511915  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1234 14:58:24.518764  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1235 14:58:24.525376  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1236 14:58:24.528883  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1237 14:58:24.535581  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1238 14:58:24.538539  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1239 14:58:24.545411  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1240 14:58:24.548644  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1241 14:58:24.552120  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1242 14:58:24.558782  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1243 14:58:24.562398  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1244 14:58:24.569015  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1245 14:58:24.571938  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1246 14:58:24.578788  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1247 14:58:24.581830  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1248 14:58:24.588827  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1249 14:58:24.592128  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1250 14:58:24.598837  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1251 14:58:24.601792  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1252 14:58:24.608598  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1253 14:58:24.611996  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1254 14:58:24.615689  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1255 14:58:24.621873  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1256 14:58:24.625152  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1257 14:58:24.631698  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1258 14:58:24.638389  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1259 14:58:24.645295  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1260 14:58:24.652005  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1261 14:58:24.662162  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1262 14:58:24.665259  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1263 14:58:24.672140  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1264 14:58:24.678570  Root Device assign_resources, bus 0 link: 0

 1265 14:58:24.682362  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1266 14:58:24.691725  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1267 14:58:24.698540  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1268 14:58:24.708205  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1269 14:58:24.715332  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1270 14:58:24.725037  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1271 14:58:24.731223  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1272 14:58:24.735308  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1273 14:58:24.741498  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1274 14:58:24.748078  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1275 14:58:24.758254  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1276 14:58:24.764664  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1277 14:58:24.774613  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1278 14:58:24.778219  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1279 14:58:24.785294  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1280 14:58:24.791310  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1281 14:58:24.794666  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1282 14:58:24.801254  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1283 14:58:24.808223  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1284 14:58:24.817847  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1285 14:58:24.824429  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1286 14:58:24.830913  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1287 14:58:24.841226  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1288 14:58:24.847359  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1289 14:58:24.854017  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1290 14:58:24.864376  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1291 14:58:24.867549  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1292 14:58:24.874093  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1293 14:58:24.880982  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1294 14:58:24.891330  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1295 14:58:24.900779  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1296 14:58:24.903897  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1297 14:58:24.910871  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1298 14:58:24.917213  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1299 14:58:24.923815  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1300 14:58:24.933527  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1301 14:58:24.937264  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1302 14:58:24.943608  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1303 14:58:24.950431  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1304 14:58:24.953780  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1305 14:58:24.960886  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1306 14:58:24.963833  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1307 14:58:24.970441  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1308 14:58:24.973936  LPC: Trying to open IO window from 800 size 1ff

 1309 14:58:24.983705  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1310 14:58:24.990323  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1311 14:58:25.000350  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1312 14:58:25.006927  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1313 14:58:25.013308  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1314 14:58:25.016881  Root Device assign_resources, bus 0 link: 0

 1315 14:58:25.020256  Done setting resources.

 1316 14:58:25.027175  Show resources in subtree (Root Device)...After assigning values.

 1317 14:58:25.030063   Root Device child on link 0 CPU_CLUSTER: 0

 1318 14:58:25.033224    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1319 14:58:25.037000     APIC: 00

 1320 14:58:25.037488     APIC: 03

 1321 14:58:25.037860     APIC: 06

 1322 14:58:25.040161     APIC: 01

 1323 14:58:25.040606     APIC: 02

 1324 14:58:25.043738     APIC: 04

 1325 14:58:25.044168     APIC: 05

 1326 14:58:25.044508     APIC: 07

 1327 14:58:25.049914    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1328 14:58:25.059731    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1329 14:58:25.069501    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1330 14:58:25.069935     PCI: 00:00.0

 1331 14:58:25.080017     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1332 14:58:25.089859     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1333 14:58:25.099279     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1334 14:58:25.109447     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1335 14:58:25.118957     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1336 14:58:25.129419     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1337 14:58:25.135681     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1338 14:58:25.145682     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1339 14:58:25.155687     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1340 14:58:25.165799     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1341 14:58:25.172647     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1342 14:58:25.182361     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1343 14:58:25.192064     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1344 14:58:25.201536     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1345 14:58:25.211474     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1346 14:58:25.221668     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1347 14:58:25.221753     PCI: 00:02.0

 1348 14:58:25.234577     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1349 14:58:25.244639     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1350 14:58:25.251358     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1351 14:58:25.254978     PCI: 00:04.0

 1352 14:58:25.255062     PCI: 00:08.0

 1353 14:58:25.267968     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1354 14:58:25.268054     PCI: 00:12.0

 1355 14:58:25.278122     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1356 14:58:25.284411     PCI: 00:14.0 child on link 0 USB0 port 0

 1357 14:58:25.294201     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1358 14:58:25.297685      USB0 port 0 child on link 0 USB2 port 0

 1359 14:58:25.300966       USB2 port 0

 1360 14:58:25.301050       USB2 port 1

 1361 14:58:25.304184       USB2 port 2

 1362 14:58:25.304301       USB2 port 3

 1363 14:58:25.307857       USB2 port 5

 1364 14:58:25.307940       USB2 port 6

 1365 14:58:25.310845       USB2 port 9

 1366 14:58:25.310928       USB3 port 0

 1367 14:58:25.313974       USB3 port 1

 1368 14:58:25.314058       USB3 port 2

 1369 14:58:25.317448       USB3 port 3

 1370 14:58:25.317531       USB3 port 4

 1371 14:58:25.320875     PCI: 00:14.2

 1372 14:58:25.330653     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1373 14:58:25.340437     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1374 14:58:25.343910     PCI: 00:14.3

 1375 14:58:25.353557     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1376 14:58:25.357620     PCI: 00:15.0 child on link 0 I2C: 01:15

 1377 14:58:25.367011     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1378 14:58:25.370352      I2C: 01:15

 1379 14:58:25.373440     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1380 14:58:25.383450     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1381 14:58:25.387073      I2C: 02:5d

 1382 14:58:25.387156      GENERIC: 0.0

 1383 14:58:25.390207     PCI: 00:16.0

 1384 14:58:25.399876     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1385 14:58:25.399961     PCI: 00:17.0

 1386 14:58:25.410110     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1387 14:58:25.419901     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1388 14:58:25.429739     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1389 14:58:25.439677     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1390 14:58:25.450010     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1391 14:58:25.459130     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1392 14:58:25.463001     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1393 14:58:25.472698     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1394 14:58:25.475924      I2C: 03:1a

 1395 14:58:25.476008      I2C: 03:38

 1396 14:58:25.479301      I2C: 03:39

 1397 14:58:25.479385      I2C: 03:3a

 1398 14:58:25.479451      I2C: 03:3b

 1399 14:58:25.486176     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1400 14:58:25.495809     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1401 14:58:25.506525     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1402 14:58:25.515451     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1403 14:58:25.515536      PCI: 01:00.0

 1404 14:58:25.528789      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1405 14:58:25.528878     PCI: 00:1e.0

 1406 14:58:25.538783     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1407 14:58:25.548456     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1408 14:58:25.556077     PCI: 00:1e.2 child on link 0 SPI: 00

 1409 14:58:25.565434     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1410 14:58:25.565519      SPI: 00

 1411 14:58:25.568547     PCI: 00:1e.3 child on link 0 SPI: 01

 1412 14:58:25.581491     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1413 14:58:25.581577      SPI: 01

 1414 14:58:25.585177     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1415 14:58:25.594660     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1416 14:58:25.604790     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1417 14:58:25.604877      PNP: 0c09.0

 1418 14:58:25.614664      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1419 14:58:25.614749     PCI: 00:1f.3

 1420 14:58:25.624608     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1421 14:58:25.634384     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1422 14:58:25.637722     PCI: 00:1f.4

 1423 14:58:25.647504     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1424 14:58:25.657627     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1425 14:58:25.657714     PCI: 00:1f.5

 1426 14:58:25.667553     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1427 14:58:25.671370  Done allocating resources.

 1428 14:58:25.677626  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1429 14:58:25.680602  Enabling resources...

 1430 14:58:25.684218  PCI: 00:00.0 subsystem <- 8086/9b61

 1431 14:58:25.687495  PCI: 00:00.0 cmd <- 06

 1432 14:58:25.690822  PCI: 00:02.0 subsystem <- 8086/9b41

 1433 14:58:25.694366  PCI: 00:02.0 cmd <- 03

 1434 14:58:25.694451  PCI: 00:08.0 cmd <- 06

 1435 14:58:25.701000  PCI: 00:12.0 subsystem <- 8086/02f9

 1436 14:58:25.701085  PCI: 00:12.0 cmd <- 02

 1437 14:58:25.704416  PCI: 00:14.0 subsystem <- 8086/02ed

 1438 14:58:25.707448  PCI: 00:14.0 cmd <- 02

 1439 14:58:25.711464  PCI: 00:14.2 cmd <- 02

 1440 14:58:25.714096  PCI: 00:14.3 subsystem <- 8086/02f0

 1441 14:58:25.717524  PCI: 00:14.3 cmd <- 02

 1442 14:58:25.720752  PCI: 00:15.0 subsystem <- 8086/02e8

 1443 14:58:25.724166  PCI: 00:15.0 cmd <- 02

 1444 14:58:25.727892  PCI: 00:15.1 subsystem <- 8086/02e9

 1445 14:58:25.731238  PCI: 00:15.1 cmd <- 02

 1446 14:58:25.734191  PCI: 00:16.0 subsystem <- 8086/02e0

 1447 14:58:25.737334  PCI: 00:16.0 cmd <- 02

 1448 14:58:25.740872  PCI: 00:17.0 subsystem <- 8086/02d3

 1449 14:58:25.740957  PCI: 00:17.0 cmd <- 03

 1450 14:58:25.747327  PCI: 00:19.0 subsystem <- 8086/02c5

 1451 14:58:25.747410  PCI: 00:19.0 cmd <- 02

 1452 14:58:25.751393  PCI: 00:1d.0 bridge ctrl <- 0013

 1453 14:58:25.754096  PCI: 00:1d.0 subsystem <- 8086/02b0

 1454 14:58:25.757344  PCI: 00:1d.0 cmd <- 06

 1455 14:58:25.761492  PCI: 00:1e.0 subsystem <- 8086/02a8

 1456 14:58:25.764060  PCI: 00:1e.0 cmd <- 06

 1457 14:58:25.767147  PCI: 00:1e.2 subsystem <- 8086/02aa

 1458 14:58:25.770719  PCI: 00:1e.2 cmd <- 06

 1459 14:58:25.773956  PCI: 00:1e.3 subsystem <- 8086/02ab

 1460 14:58:25.777496  PCI: 00:1e.3 cmd <- 02

 1461 14:58:25.780579  PCI: 00:1f.0 subsystem <- 8086/0284

 1462 14:58:25.784122  PCI: 00:1f.0 cmd <- 407

 1463 14:58:25.787694  PCI: 00:1f.3 subsystem <- 8086/02c8

 1464 14:58:25.790535  PCI: 00:1f.3 cmd <- 02

 1465 14:58:25.794342  PCI: 00:1f.4 subsystem <- 8086/02a3

 1466 14:58:25.797316  PCI: 00:1f.4 cmd <- 03

 1467 14:58:25.800194  PCI: 00:1f.5 subsystem <- 8086/02a4

 1468 14:58:25.800278  PCI: 00:1f.5 cmd <- 406

 1469 14:58:25.810804  PCI: 01:00.0 cmd <- 02

 1470 14:58:25.816801  done.

 1471 14:58:25.827977  ME: Version: 14.0.39.1367

 1472 14:58:25.834476  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11

 1473 14:58:25.837588  Initializing devices...

 1474 14:58:25.837672  Root Device init ...

 1475 14:58:25.844158  Chrome EC: Set SMI mask to 0x0000000000000000

 1476 14:58:25.847921  Chrome EC: clear events_b mask to 0x0000000000000000

 1477 14:58:25.854308  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1478 14:58:25.860900  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1479 14:58:25.867812  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1480 14:58:25.870877  Chrome EC: Set WAKE mask to 0x0000000000000000

 1481 14:58:25.874166  Root Device init finished in 35171 usecs

 1482 14:58:25.877622  CPU_CLUSTER: 0 init ...

 1483 14:58:25.884223  CPU_CLUSTER: 0 init finished in 2440 usecs

 1484 14:58:25.888845  PCI: 00:00.0 init ...

 1485 14:58:25.892018  CPU TDP: 15 Watts

 1486 14:58:25.895093  CPU PL2 = 64 Watts

 1487 14:58:25.898519  PCI: 00:00.0 init finished in 7074 usecs

 1488 14:58:25.901630  PCI: 00:02.0 init ...

 1489 14:58:25.905129  PCI: 00:02.0 init finished in 2254 usecs

 1490 14:58:25.908214  PCI: 00:08.0 init ...

 1491 14:58:25.911752  PCI: 00:08.0 init finished in 2254 usecs

 1492 14:58:25.915333  PCI: 00:12.0 init ...

 1493 14:58:25.918269  PCI: 00:12.0 init finished in 2253 usecs

 1494 14:58:25.921984  PCI: 00:14.0 init ...

 1495 14:58:25.925015  PCI: 00:14.0 init finished in 2253 usecs

 1496 14:58:25.928368  PCI: 00:14.2 init ...

 1497 14:58:25.931309  PCI: 00:14.2 init finished in 2254 usecs

 1498 14:58:25.935333  PCI: 00:14.3 init ...

 1499 14:58:25.938385  PCI: 00:14.3 init finished in 2269 usecs

 1500 14:58:25.941625  PCI: 00:15.0 init ...

 1501 14:58:25.944989  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1502 14:58:25.947993  PCI: 00:15.0 init finished in 5973 usecs

 1503 14:58:25.951664  PCI: 00:15.1 init ...

 1504 14:58:25.955144  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1505 14:58:25.961556  PCI: 00:15.1 init finished in 5980 usecs

 1506 14:58:25.961640  PCI: 00:16.0 init ...

 1507 14:58:25.967827  PCI: 00:16.0 init finished in 2251 usecs

 1508 14:58:25.971179  PCI: 00:19.0 init ...

 1509 14:58:25.974934  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1510 14:58:25.977884  PCI: 00:19.0 init finished in 5979 usecs

 1511 14:58:25.981192  PCI: 00:1d.0 init ...

 1512 14:58:25.984519  Initializing PCH PCIe bridge.

 1513 14:58:25.987976  PCI: 00:1d.0 init finished in 5288 usecs

 1514 14:58:25.991262  PCI: 00:1f.0 init ...

 1515 14:58:25.994360  IOAPIC: Initializing IOAPIC at 0xfec00000

 1516 14:58:26.001110  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1517 14:58:26.001194  IOAPIC: ID = 0x02

 1518 14:58:26.004285  IOAPIC: Dumping registers

 1519 14:58:26.007670    reg 0x0000: 0x02000000

 1520 14:58:26.010873    reg 0x0001: 0x00770020

 1521 14:58:26.010957    reg 0x0002: 0x00000000

 1522 14:58:26.017756  PCI: 00:1f.0 init finished in 23526 usecs

 1523 14:58:26.020796  PCI: 00:1f.4 init ...

 1524 14:58:26.024242  PCI: 00:1f.4 init finished in 2265 usecs

 1525 14:58:26.035321  PCI: 01:00.0 init ...

 1526 14:58:26.037859  PCI: 01:00.0 init finished in 2253 usecs

 1527 14:58:26.042535  PNP: 0c09.0 init ...

 1528 14:58:26.045456  Google Chrome EC uptime: 11.085 seconds

 1529 14:58:26.052115  Google Chrome AP resets since EC boot: 0

 1530 14:58:26.055337  Google Chrome most recent AP reset causes:

 1531 14:58:26.062454  Google Chrome EC reset flags at last EC boot: reset-pin

 1532 14:58:26.065757  PNP: 0c09.0 init finished in 20568 usecs

 1533 14:58:26.069270  Devices initialized

 1534 14:58:26.069354  Show all devs... After init.

 1535 14:58:26.072012  Root Device: enabled 1

 1536 14:58:26.075393  CPU_CLUSTER: 0: enabled 1

 1537 14:58:26.078569  DOMAIN: 0000: enabled 1

 1538 14:58:26.078653  APIC: 00: enabled 1

 1539 14:58:26.082246  PCI: 00:00.0: enabled 1

 1540 14:58:26.085158  PCI: 00:02.0: enabled 1

 1541 14:58:26.088634  PCI: 00:04.0: enabled 0

 1542 14:58:26.088717  PCI: 00:05.0: enabled 0

 1543 14:58:26.092070  PCI: 00:12.0: enabled 1

 1544 14:58:26.095148  PCI: 00:12.5: enabled 0

 1545 14:58:26.095232  PCI: 00:12.6: enabled 0

 1546 14:58:26.098535  PCI: 00:14.0: enabled 1

 1547 14:58:26.102000  PCI: 00:14.1: enabled 0

 1548 14:58:26.105255  PCI: 00:14.3: enabled 1

 1549 14:58:26.105339  PCI: 00:14.5: enabled 0

 1550 14:58:26.108850  PCI: 00:15.0: enabled 1

 1551 14:58:26.111969  PCI: 00:15.1: enabled 1

 1552 14:58:26.114978  PCI: 00:15.2: enabled 0

 1553 14:58:26.115061  PCI: 00:15.3: enabled 0

 1554 14:58:26.118457  PCI: 00:16.0: enabled 1

 1555 14:58:26.121465  PCI: 00:16.1: enabled 0

 1556 14:58:26.125116  PCI: 00:16.2: enabled 0

 1557 14:58:26.125200  PCI: 00:16.3: enabled 0

 1558 14:58:26.128176  PCI: 00:16.4: enabled 0

 1559 14:58:26.131950  PCI: 00:16.5: enabled 0

 1560 14:58:26.134802  PCI: 00:17.0: enabled 1

 1561 14:58:26.134885  PCI: 00:19.0: enabled 1

 1562 14:58:26.138408  PCI: 00:19.1: enabled 0

 1563 14:58:26.142026  PCI: 00:19.2: enabled 0

 1564 14:58:26.142109  PCI: 00:1a.0: enabled 0

 1565 14:58:26.144751  PCI: 00:1c.0: enabled 0

 1566 14:58:26.148451  PCI: 00:1c.1: enabled 0

 1567 14:58:26.151432  PCI: 00:1c.2: enabled 0

 1568 14:58:26.151542  PCI: 00:1c.3: enabled 0

 1569 14:58:26.154922  PCI: 00:1c.4: enabled 0

 1570 14:58:26.158205  PCI: 00:1c.5: enabled 0

 1571 14:58:26.161401  PCI: 00:1c.6: enabled 0

 1572 14:58:26.161484  PCI: 00:1c.7: enabled 0

 1573 14:58:26.164702  PCI: 00:1d.0: enabled 1

 1574 14:58:26.168144  PCI: 00:1d.1: enabled 0

 1575 14:58:26.171308  PCI: 00:1d.2: enabled 0

 1576 14:58:26.171391  PCI: 00:1d.3: enabled 0

 1577 14:58:26.175037  PCI: 00:1d.4: enabled 0

 1578 14:58:26.178001  PCI: 00:1d.5: enabled 0

 1579 14:58:26.178085  PCI: 00:1e.0: enabled 1

 1580 14:58:26.181535  PCI: 00:1e.1: enabled 0

 1581 14:58:26.185417  PCI: 00:1e.2: enabled 1

 1582 14:58:26.187876  PCI: 00:1e.3: enabled 1

 1583 14:58:26.187960  PCI: 00:1f.0: enabled 1

 1584 14:58:26.191454  PCI: 00:1f.1: enabled 0

 1585 14:58:26.194686  PCI: 00:1f.2: enabled 0

 1586 14:58:26.197717  PCI: 00:1f.3: enabled 1

 1587 14:58:26.197802  PCI: 00:1f.4: enabled 1

 1588 14:58:26.201304  PCI: 00:1f.5: enabled 1

 1589 14:58:26.204530  PCI: 00:1f.6: enabled 0

 1590 14:58:26.207826  USB0 port 0: enabled 1

 1591 14:58:26.207909  I2C: 01:15: enabled 1

 1592 14:58:26.211204  I2C: 02:5d: enabled 1

 1593 14:58:26.214575  GENERIC: 0.0: enabled 1

 1594 14:58:26.214658  I2C: 03:1a: enabled 1

 1595 14:58:26.217697  I2C: 03:38: enabled 1

 1596 14:58:26.221236  I2C: 03:39: enabled 1

 1597 14:58:26.221319  I2C: 03:3a: enabled 1

 1598 14:58:26.224682  I2C: 03:3b: enabled 1

 1599 14:58:26.227686  PCI: 00:00.0: enabled 1

 1600 14:58:26.227770  SPI: 00: enabled 1

 1601 14:58:26.231293  SPI: 01: enabled 1

 1602 14:58:26.234160  PNP: 0c09.0: enabled 1

 1603 14:58:26.234243  USB2 port 0: enabled 1

 1604 14:58:26.237611  USB2 port 1: enabled 1

 1605 14:58:26.240709  USB2 port 2: enabled 0

 1606 14:58:26.240793  USB2 port 3: enabled 0

 1607 14:58:26.244268  USB2 port 5: enabled 0

 1608 14:58:26.247864  USB2 port 6: enabled 1

 1609 14:58:26.250510  USB2 port 9: enabled 1

 1610 14:58:26.250593  USB3 port 0: enabled 1

 1611 14:58:26.254173  USB3 port 1: enabled 1

 1612 14:58:26.257348  USB3 port 2: enabled 1

 1613 14:58:26.257432  USB3 port 3: enabled 1

 1614 14:58:26.260829  USB3 port 4: enabled 0

 1615 14:58:26.263876  APIC: 03: enabled 1

 1616 14:58:26.263959  APIC: 06: enabled 1

 1617 14:58:26.267310  APIC: 01: enabled 1

 1618 14:58:26.270925  APIC: 02: enabled 1

 1619 14:58:26.271009  APIC: 04: enabled 1

 1620 14:58:26.273881  APIC: 05: enabled 1

 1621 14:58:26.273964  APIC: 07: enabled 1

 1622 14:58:26.277180  PCI: 00:08.0: enabled 1

 1623 14:58:26.280444  PCI: 00:14.2: enabled 1

 1624 14:58:26.284017  PCI: 01:00.0: enabled 1

 1625 14:58:26.287750  Disabling ACPI via APMC:

 1626 14:58:26.287834  done.

 1627 14:58:26.294245  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1628 14:58:26.297410  ELOG: NV offset 0xaf0000 size 0x4000

 1629 14:58:26.304142  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1630 14:58:26.310876  ELOG: Event(17) added with size 13 at 2023-07-11 14:58:26 UTC

 1631 14:58:26.317715  ELOG: Event(92) added with size 9 at 2023-07-11 14:58:26 UTC

 1632 14:58:26.323803  ELOG: Event(93) added with size 9 at 2023-07-11 14:58:26 UTC

 1633 14:58:26.330543  ELOG: Event(9A) added with size 9 at 2023-07-11 14:58:26 UTC

 1634 14:58:26.337509  ELOG: Event(9E) added with size 10 at 2023-07-11 14:58:26 UTC

 1635 14:58:26.343943  ELOG: Event(9F) added with size 14 at 2023-07-11 14:58:26 UTC

 1636 14:58:26.347221  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1637 14:58:26.354178  ELOG: Event(A1) added with size 10 at 2023-07-11 14:58:26 UTC

 1638 14:58:26.364476  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1639 14:58:26.370772  ELOG: Event(A0) added with size 9 at 2023-07-11 14:58:26 UTC

 1640 14:58:26.374294  elog_add_boot_reason: Logged dev mode boot

 1641 14:58:26.377709  Finalize devices...

 1642 14:58:26.377821  PCI: 00:17.0 final

 1643 14:58:26.380881  Devices finalized

 1644 14:58:26.383996  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1645 14:58:26.390617  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1646 14:58:26.394276  ME: HFSTS1                  : 0x90000245

 1647 14:58:26.397245  ME: HFSTS2                  : 0x3B850126

 1648 14:58:26.403568  ME: HFSTS3                  : 0x00000020

 1649 14:58:26.407157  ME: HFSTS4                  : 0x00004800

 1650 14:58:26.410270  ME: HFSTS5                  : 0x00000000

 1651 14:58:26.413466  ME: HFSTS6                  : 0x40400006

 1652 14:58:26.416795  ME: Manufacturing Mode      : NO

 1653 14:58:26.420412  ME: FW Partition Table      : OK

 1654 14:58:26.423434  ME: Bringup Loader Failure  : NO

 1655 14:58:26.426846  ME: Firmware Init Complete  : YES

 1656 14:58:26.430105  ME: Boot Options Present    : NO

 1657 14:58:26.433669  ME: Update In Progress      : NO

 1658 14:58:26.436889  ME: D0i3 Support            : YES

 1659 14:58:26.440265  ME: Low Power State Enabled : NO

 1660 14:58:26.443509  ME: CPU Replaced            : NO

 1661 14:58:26.446635  ME: CPU Replacement Valid   : YES

 1662 14:58:26.450307  ME: Current Working State   : 5

 1663 14:58:26.453215  ME: Current Operation State : 1

 1664 14:58:26.456774  ME: Current Operation Mode  : 0

 1665 14:58:26.459859  ME: Error Code              : 0

 1666 14:58:26.463286  ME: CPU Debug Disabled      : YES

 1667 14:58:26.466501  ME: TXT Support             : NO

 1668 14:58:26.473598  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1669 14:58:26.479925  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1670 14:58:26.480004  CBFS @ c08000 size 3f8000

 1671 14:58:26.486332  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1672 14:58:26.489541  CBFS: Locating 'fallback/dsdt.aml'

 1673 14:58:26.493254  CBFS: Found @ offset 10bb80 size 3fa5

 1674 14:58:26.499746  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1675 14:58:26.502742  CBFS @ c08000 size 3f8000

 1676 14:58:26.509567  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1677 14:58:26.509668  CBFS: Locating 'fallback/slic'

 1678 14:58:26.514661  CBFS: 'fallback/slic' not found.

 1679 14:58:26.521319  ACPI: Writing ACPI tables at 99b3e000.

 1680 14:58:26.521421  ACPI:    * FACS

 1681 14:58:26.524382  ACPI:    * DSDT

 1682 14:58:26.527582  Ramoops buffer: 0x100000@0x99a3d000.

 1683 14:58:26.531246  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1684 14:58:26.537758  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1685 14:58:26.540868  Google Chrome EC: version:

 1686 14:58:26.544406  	ro: helios_v2.0.2659-56403530b

 1687 14:58:26.547902  	rw: helios_v2.0.2849-c41de27e7d

 1688 14:58:26.547981    running image: 1

 1689 14:58:26.552173  ACPI:    * FADT

 1690 14:58:26.552275  SCI is IRQ9

 1691 14:58:26.558597  ACPI: added table 1/32, length now 40

 1692 14:58:26.558722  ACPI:     * SSDT

 1693 14:58:26.561983  Found 1 CPU(s) with 8 core(s) each.

 1694 14:58:26.565277  Error: Could not locate 'wifi_sar' in VPD.

 1695 14:58:26.572071  Checking CBFS for default SAR values

 1696 14:58:26.575095  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1697 14:58:26.578729  CBFS @ c08000 size 3f8000

 1698 14:58:26.585111  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1699 14:58:26.588664  CBFS: Locating 'wifi_sar_defaults.hex'

 1700 14:58:26.591517  CBFS: Found @ offset 5fac0 size 77

 1701 14:58:26.595197  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1702 14:58:26.601892  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1703 14:58:26.605090  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1704 14:58:26.611604  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1705 14:58:26.614621  failed to find key in VPD: dsm_calib_r0_0

 1706 14:58:26.624923  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1707 14:58:26.627841  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1708 14:58:26.632014  failed to find key in VPD: dsm_calib_r0_1

 1709 14:58:26.641730  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1710 14:58:26.647963  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1711 14:58:26.651764  failed to find key in VPD: dsm_calib_r0_2

 1712 14:58:26.661355  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1713 14:58:26.664714  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1714 14:58:26.670898  failed to find key in VPD: dsm_calib_r0_3

 1715 14:58:26.677656  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1716 14:58:26.684320  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1717 14:58:26.687720  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1718 14:58:26.690766  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1719 14:58:26.695017  EC returned error result code 1

 1720 14:58:26.698800  EC returned error result code 1

 1721 14:58:26.702639  EC returned error result code 1

 1722 14:58:26.709585  PS2K: Bad resp from EC. Vivaldi disabled!

 1723 14:58:26.712605  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1724 14:58:26.719381  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1725 14:58:26.725631  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1726 14:58:26.729383  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1727 14:58:26.735502  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1728 14:58:26.742337  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1729 14:58:26.748900  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1730 14:58:26.752077  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1731 14:58:26.758662  ACPI: added table 2/32, length now 44

 1732 14:58:26.758748  ACPI:    * MCFG

 1733 14:58:26.762009  ACPI: added table 3/32, length now 48

 1734 14:58:26.765264  ACPI:    * TPM2

 1735 14:58:26.769369  TPM2 log created at 99a2d000

 1736 14:58:26.771912  ACPI: added table 4/32, length now 52

 1737 14:58:26.771997  ACPI:    * MADT

 1738 14:58:26.775315  SCI is IRQ9

 1739 14:58:26.778485  ACPI: added table 5/32, length now 56

 1740 14:58:26.778569  current = 99b43ac0

 1741 14:58:26.781946  ACPI:    * DMAR

 1742 14:58:26.785125  ACPI: added table 6/32, length now 60

 1743 14:58:26.788937  ACPI:    * IGD OpRegion

 1744 14:58:26.789048  GMA: Found VBT in CBFS

 1745 14:58:26.791811  GMA: Found valid VBT in CBFS

 1746 14:58:26.795305  ACPI: added table 7/32, length now 64

 1747 14:58:26.798890  ACPI:    * HPET

 1748 14:58:26.801937  ACPI: added table 8/32, length now 68

 1749 14:58:26.802022  ACPI: done.

 1750 14:58:26.805479  ACPI tables: 31744 bytes.

 1751 14:58:26.809000  smbios_write_tables: 99a2c000

 1752 14:58:26.812691  EC returned error result code 3

 1753 14:58:26.815541  Couldn't obtain OEM name from CBI

 1754 14:58:26.818885  Create SMBIOS type 17

 1755 14:58:26.821974  PCI: 00:00.0 (Intel Cannonlake)

 1756 14:58:26.825582  PCI: 00:14.3 (Intel WiFi)

 1757 14:58:26.828666  SMBIOS tables: 939 bytes.

 1758 14:58:26.831874  Writing table forward entry at 0x00000500

 1759 14:58:26.838750  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1760 14:58:26.841842  Writing coreboot table at 0x99b62000

 1761 14:58:26.848602   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1762 14:58:26.851782   1. 0000000000001000-000000000009ffff: RAM

 1763 14:58:26.855424   2. 00000000000a0000-00000000000fffff: RESERVED

 1764 14:58:26.861812   3. 0000000000100000-0000000099a2bfff: RAM

 1765 14:58:26.865096   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1766 14:58:26.871550   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1767 14:58:26.878663   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1768 14:58:26.881676   7. 000000009a000000-000000009f7fffff: RESERVED

 1769 14:58:26.888196   8. 00000000e0000000-00000000efffffff: RESERVED

 1770 14:58:26.891820   9. 00000000fc000000-00000000fc000fff: RESERVED

 1771 14:58:26.895046  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1772 14:58:26.901784  11. 00000000fed10000-00000000fed17fff: RESERVED

 1773 14:58:26.904749  12. 00000000fed80000-00000000fed83fff: RESERVED

 1774 14:58:26.911127  13. 00000000fed90000-00000000fed91fff: RESERVED

 1775 14:58:26.915053  14. 00000000feda0000-00000000feda1fff: RESERVED

 1776 14:58:26.921005  15. 0000000100000000-000000045e7fffff: RAM

 1777 14:58:26.924482  Graphics framebuffer located at 0xc0000000

 1778 14:58:26.927860  Passing 5 GPIOs to payload:

 1779 14:58:26.931428              NAME |       PORT | POLARITY |     VALUE

 1780 14:58:26.938204     write protect |  undefined |     high |       low

 1781 14:58:26.941791               lid |  undefined |     high |      high

 1782 14:58:26.948160             power |  undefined |     high |       low

 1783 14:58:26.954986             oprom |  undefined |     high |       low

 1784 14:58:26.957631          EC in RW | 0x000000cb |     high |       low

 1785 14:58:26.961316  Board ID: 4

 1786 14:58:26.964664  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1787 14:58:26.967574  CBFS @ c08000 size 3f8000

 1788 14:58:26.974699  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1789 14:58:26.980799  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa

 1790 14:58:26.980884  coreboot table: 1492 bytes.

 1791 14:58:26.984058  IMD ROOT    0. 99fff000 00001000

 1792 14:58:26.987535  IMD SMALL   1. 99ffe000 00001000

 1793 14:58:26.990707  FSP MEMORY  2. 99c4e000 003b0000

 1794 14:58:26.994633  CONSOLE     3. 99c2e000 00020000

 1795 14:58:26.997495  FMAP        4. 99c2d000 0000054e

 1796 14:58:27.000974  TIME STAMP  5. 99c2c000 00000910

 1797 14:58:27.003924  VBOOT WORK  6. 99c18000 00014000

 1798 14:58:27.007400  MRC DATA    7. 99c16000 00001958

 1799 14:58:27.010649  ROMSTG STCK 8. 99c15000 00001000

 1800 14:58:27.014385  AFTER CAR   9. 99c0b000 0000a000

 1801 14:58:27.017384  RAMSTAGE   10. 99baf000 0005c000

 1802 14:58:27.020621  REFCODE    11. 99b7a000 00035000

 1803 14:58:27.023866  SMM BACKUP 12. 99b6a000 00010000

 1804 14:58:27.027278  COREBOOT   13. 99b62000 00008000

 1805 14:58:27.030928  ACPI       14. 99b3e000 00024000

 1806 14:58:27.033974  ACPI GNVS  15. 99b3d000 00001000

 1807 14:58:27.037704  RAMOOPS    16. 99a3d000 00100000

 1808 14:58:27.040715  TPM2 TCGLOG17. 99a2d000 00010000

 1809 14:58:27.044009  SMBIOS     18. 99a2c000 00000800

 1810 14:58:27.047058  IMD small region:

 1811 14:58:27.050456    IMD ROOT    0. 99ffec00 00000400

 1812 14:58:27.053935    FSP RUNTIME 1. 99ffebe0 00000004

 1813 14:58:27.057321    EC HOSTEVENT 2. 99ffebc0 00000008

 1814 14:58:27.060635    POWER STATE 3. 99ffeb80 00000040

 1815 14:58:27.063791    ROMSTAGE    4. 99ffeb60 00000004

 1816 14:58:27.067107    MEM INFO    5. 99ffe9a0 000001b9

 1817 14:58:27.070297    VPD         6. 99ffe920 0000006c

 1818 14:58:27.073735  MTRR: Physical address space:

 1819 14:58:27.080325  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1820 14:58:27.087501  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1821 14:58:27.093648  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1822 14:58:27.100542  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1823 14:58:27.106916  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1824 14:58:27.113519  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1825 14:58:27.120179  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1826 14:58:27.123468  MTRR: Fixed MSR 0x250 0x0606060606060606

 1827 14:58:27.126871  MTRR: Fixed MSR 0x258 0x0606060606060606

 1828 14:58:27.130243  MTRR: Fixed MSR 0x259 0x0000000000000000

 1829 14:58:27.136261  MTRR: Fixed MSR 0x268 0x0606060606060606

 1830 14:58:27.139629  MTRR: Fixed MSR 0x269 0x0606060606060606

 1831 14:58:27.143050  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1832 14:58:27.146151  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1833 14:58:27.152689  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1834 14:58:27.156484  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1835 14:58:27.159547  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1836 14:58:27.163136  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1837 14:58:27.166231  call enable_fixed_mtrr()

 1838 14:58:27.169973  CPU physical address size: 39 bits

 1839 14:58:27.176008  MTRR: default type WB/UC MTRR counts: 6/8.

 1840 14:58:27.179447  MTRR: WB selected as default type.

 1841 14:58:27.185892  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1842 14:58:27.189402  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1843 14:58:27.196241  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1844 14:58:27.202631  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1845 14:58:27.209315  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1846 14:58:27.216142  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1847 14:58:27.219034  MTRR: Fixed MSR 0x250 0x0606060606060606

 1848 14:58:27.225527  MTRR: Fixed MSR 0x258 0x0606060606060606

 1849 14:58:27.228916  MTRR: Fixed MSR 0x259 0x0000000000000000

 1850 14:58:27.232306  MTRR: Fixed MSR 0x268 0x0606060606060606

 1851 14:58:27.235458  MTRR: Fixed MSR 0x269 0x0606060606060606

 1852 14:58:27.242391  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1853 14:58:27.245397  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1854 14:58:27.249196  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1855 14:58:27.252108  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1856 14:58:27.259006  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1857 14:58:27.262042  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1858 14:58:27.262125  

 1859 14:58:27.262191  MTRR check

 1860 14:58:27.265412  Fixed MTRRs   : Enabled

 1861 14:58:27.269011  Variable MTRRs: Enabled

 1862 14:58:27.269094  

 1863 14:58:27.272179  call enable_fixed_mtrr()

 1864 14:58:27.275779  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1865 14:58:27.278758  CPU physical address size: 39 bits

 1866 14:58:27.285761  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1867 14:58:27.289063  MTRR: Fixed MSR 0x250 0x0606060606060606

 1868 14:58:27.292230  MTRR: Fixed MSR 0x258 0x0606060606060606

 1869 14:58:27.298907  MTRR: Fixed MSR 0x259 0x0000000000000000

 1870 14:58:27.302204  MTRR: Fixed MSR 0x268 0x0606060606060606

 1871 14:58:27.305659  MTRR: Fixed MSR 0x269 0x0606060606060606

 1872 14:58:27.308542  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1873 14:58:27.315222  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1874 14:58:27.318584  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1875 14:58:27.321915  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1876 14:58:27.325169  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1877 14:58:27.328716  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1878 14:58:27.336131  MTRR: Fixed MSR 0x250 0x0606060606060606

 1879 14:58:27.338755  call enable_fixed_mtrr()

 1880 14:58:27.341677  MTRR: Fixed MSR 0x258 0x0606060606060606

 1881 14:58:27.345402  MTRR: Fixed MSR 0x259 0x0000000000000000

 1882 14:58:27.348488  MTRR: Fixed MSR 0x268 0x0606060606060606

 1883 14:58:27.351709  MTRR: Fixed MSR 0x269 0x0606060606060606

 1884 14:58:27.359081  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1885 14:58:27.361814  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1886 14:58:27.365373  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1887 14:58:27.368577  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1888 14:58:27.375235  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1889 14:58:27.378206  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1890 14:58:27.381861  CPU physical address size: 39 bits

 1891 14:58:27.384735  call enable_fixed_mtrr()

 1892 14:58:27.388421  MTRR: Fixed MSR 0x250 0x0606060606060606

 1893 14:58:27.391541  MTRR: Fixed MSR 0x250 0x0606060606060606

 1894 14:58:27.398556  MTRR: Fixed MSR 0x258 0x0606060606060606

 1895 14:58:27.401837  MTRR: Fixed MSR 0x259 0x0000000000000000

 1896 14:58:27.404759  MTRR: Fixed MSR 0x268 0x0606060606060606

 1897 14:58:27.408132  MTRR: Fixed MSR 0x269 0x0606060606060606

 1898 14:58:27.415455  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1899 14:58:27.418204  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1900 14:58:27.421767  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1901 14:58:27.424875  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1902 14:58:27.428408  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1903 14:58:27.435196  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1904 14:58:27.437892  MTRR: Fixed MSR 0x258 0x0606060606060606

 1905 14:58:27.441661  call enable_fixed_mtrr()

 1906 14:58:27.445046  MTRR: Fixed MSR 0x259 0x0000000000000000

 1907 14:58:27.447870  MTRR: Fixed MSR 0x268 0x0606060606060606

 1908 14:58:27.455156  MTRR: Fixed MSR 0x269 0x0606060606060606

 1909 14:58:27.458454  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1910 14:58:27.461169  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1911 14:58:27.464983  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1912 14:58:27.468252  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1913 14:58:27.474772  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1914 14:58:27.478521  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1915 14:58:27.481538  CPU physical address size: 39 bits

 1916 14:58:27.484467  call enable_fixed_mtrr()

 1917 14:58:27.487794  CPU physical address size: 39 bits

 1918 14:58:27.491203  CPU physical address size: 39 bits

 1919 14:58:27.494690  MTRR: Fixed MSR 0x250 0x0606060606060606

 1920 14:58:27.498241  MTRR: Fixed MSR 0x250 0x0606060606060606

 1921 14:58:27.504395  MTRR: Fixed MSR 0x258 0x0606060606060606

 1922 14:58:27.507944  MTRR: Fixed MSR 0x259 0x0000000000000000

 1923 14:58:27.511595  MTRR: Fixed MSR 0x268 0x0606060606060606

 1924 14:58:27.514381  MTRR: Fixed MSR 0x269 0x0606060606060606

 1925 14:58:27.521089  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1926 14:58:27.524447  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1927 14:58:27.527549  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1928 14:58:27.531217  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1929 14:58:27.537552  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1930 14:58:27.540787  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1931 14:58:27.543943  MTRR: Fixed MSR 0x258 0x0606060606060606

 1932 14:58:27.547677  call enable_fixed_mtrr()

 1933 14:58:27.550992  MTRR: Fixed MSR 0x259 0x0000000000000000

 1934 14:58:27.553965  MTRR: Fixed MSR 0x268 0x0606060606060606

 1935 14:58:27.560830  MTRR: Fixed MSR 0x269 0x0606060606060606

 1936 14:58:27.564225  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1937 14:58:27.567397  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1938 14:58:27.570559  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1939 14:58:27.577801  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1940 14:58:27.580535  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1941 14:58:27.583921  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1942 14:58:27.586912  CPU physical address size: 39 bits

 1943 14:58:27.590571  call enable_fixed_mtrr()

 1944 14:58:27.594016  CBFS @ c08000 size 3f8000

 1945 14:58:27.600654  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1946 14:58:27.604214  CBFS: Locating 'fallback/payload'

 1947 14:58:27.607054  CPU physical address size: 39 bits

 1948 14:58:27.610763  CBFS: Found @ offset 1c96c0 size 3f798

 1949 14:58:27.613982  Checking segment from ROM address 0xffdd16f8

 1950 14:58:27.620232  Checking segment from ROM address 0xffdd1714

 1951 14:58:27.623742  Loading segment from ROM address 0xffdd16f8

 1952 14:58:27.627456    code (compression=0)

 1953 14:58:27.633578    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1954 14:58:27.643416  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1955 14:58:27.643925  it's not compressed!

 1956 14:58:27.737486  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1957 14:58:27.743628  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1958 14:58:27.750540  Loading segment from ROM address 0xffdd1714

 1959 14:58:27.750974    Entry Point 0x30000000

 1960 14:58:27.753416  Loaded segments

 1961 14:58:27.759195  Finalizing chipset.

 1962 14:58:27.762547  Finalizing SMM.

 1963 14:58:27.766126  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 1964 14:58:27.769425  mp_park_aps done after 0 msecs.

 1965 14:58:27.775592  Jumping to boot code at 30000000(99b62000)

 1966 14:58:27.782325  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 1967 14:58:27.782796  

 1968 14:58:27.783165  

 1969 14:58:27.783532  

 1970 14:58:27.786139  Starting depthcharge on Helios...

 1971 14:58:27.786686  

 1972 14:58:27.788060  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 1973 14:58:27.788700  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 1974 14:58:27.789218  Setting prompt string to ['hatch:']
 1975 14:58:27.789768  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 1976 14:58:27.795743  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1977 14:58:27.796392  

 1978 14:58:27.802451  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1979 14:58:27.803028  

 1980 14:58:27.808581  board_setup: Info: eMMC controller not present; skipping

 1981 14:58:27.809135  

 1982 14:58:27.812499  New NVMe Controller 0x30053ac0 @ 00:1d:00

 1983 14:58:27.813062  

 1984 14:58:27.818614  board_setup: Info: SDHCI controller not present; skipping

 1985 14:58:27.819207  

 1986 14:58:27.825243  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 1987 14:58:27.825900  

 1988 14:58:27.826415  Wipe memory regions:

 1989 14:58:27.826908  

 1990 14:58:27.828610  	[0x00000000001000, 0x000000000a0000)

 1991 14:58:27.829190  

 1992 14:58:27.831768  	[0x00000000100000, 0x00000030000000)

 1993 14:58:27.898310  

 1994 14:58:27.902177  	[0x00000030657430, 0x00000099a2c000)

 1995 14:58:28.039367  

 1996 14:58:28.042436  	[0x00000100000000, 0x0000045e800000)

 1997 14:58:29.424056  

 1998 14:58:29.424208  R8152: Initializing

 1999 14:58:29.424286  

 2000 14:58:29.427461  Version 9 (ocp_data = 6010)

 2001 14:58:29.431277  

 2002 14:58:29.431361  R8152: Done initializing

 2003 14:58:29.431430  

 2004 14:58:29.434474  Adding net device

 2005 14:58:30.044262  

 2006 14:58:30.044426  R8152: Initializing

 2007 14:58:30.044533  

 2008 14:58:30.047335  Version 6 (ocp_data = 5c30)

 2009 14:58:30.047407  

 2010 14:58:30.051061  R8152: Done initializing

 2011 14:58:30.051138  

 2012 14:58:30.054039  net_add_device: Attemp to include the same device

 2013 14:58:30.057320  

 2014 14:58:30.064572  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2015 14:58:30.064653  

 2016 14:58:30.064720  

 2017 14:58:30.064786  

 2018 14:58:30.065063  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2020 14:58:30.165345  hatch: tftpboot 192.168.201.1 11061938/tftp-deploy-9hf46asq/kernel/bzImage 11061938/tftp-deploy-9hf46asq/kernel/cmdline 11061938/tftp-deploy-9hf46asq/ramdisk/ramdisk.cpio.gz

 2021 14:58:30.165465  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2022 14:58:30.165551  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2023 14:58:30.169674  tftpboot 192.168.201.1 11061938/tftp-deploy-9hf46asq/kernel/bzIploy-9hf46asq/kernel/cmdline 11061938/tftp-deploy-9hf46asq/ramdisk/ramdisk.cpio.gz

 2024 14:58:30.169758  

 2025 14:58:30.169827  Waiting for link

 2026 14:58:30.370340  

 2027 14:58:30.370471  done.

 2028 14:58:30.370543  

 2029 14:58:30.370606  MAC: 00:24:32:50:1a:5f

 2030 14:58:30.370667  

 2031 14:58:30.373726  Sending DHCP discover... done.

 2032 14:58:30.373805  

 2033 14:58:30.377175  Waiting for reply... done.

 2034 14:58:30.377254  

 2035 14:58:30.380796  Sending DHCP request... done.

 2036 14:58:30.380899  

 2037 14:58:30.384275  Waiting for reply... done.

 2038 14:58:30.384349  

 2039 14:58:30.387139  My ip is 192.168.201.21

 2040 14:58:30.387211  

 2041 14:58:30.390205  The DHCP server ip is 192.168.201.1

 2042 14:58:30.390273  

 2043 14:58:30.396933  TFTP server IP predefined by user: 192.168.201.1

 2044 14:58:30.397007  

 2045 14:58:30.404354  Bootfile predefined by user: 11061938/tftp-deploy-9hf46asq/kernel/bzImage

 2046 14:58:30.404436  

 2047 14:58:30.406793  Sending tftp read request... done.

 2048 14:58:30.406867  

 2049 14:58:30.410125  Waiting for the transfer... 

 2050 14:58:30.410208  

 2051 14:58:30.926031  00000000 ################################################################

 2052 14:58:30.926178  

 2053 14:58:31.440586  00080000 ################################################################

 2054 14:58:31.440730  

 2055 14:58:31.976293  00100000 ################################################################

 2056 14:58:31.976443  

 2057 14:58:32.547666  00180000 ################################################################

 2058 14:58:32.547830  

 2059 14:58:33.188244  00200000 ################################################################

 2060 14:58:33.188740  

 2061 14:58:33.787087  00280000 ################################################################

 2062 14:58:33.787228  

 2063 14:58:34.395392  00300000 ################################################################

 2064 14:58:34.395530  

 2065 14:58:35.002474  00380000 ################################################################

 2066 14:58:35.002696  

 2067 14:58:35.550295  00400000 ################################################################

 2068 14:58:35.550458  

 2069 14:58:36.085298  00480000 ################################################################

 2070 14:58:36.085455  

 2071 14:58:36.672896  00500000 ################################################################

 2072 14:58:36.673433  

 2073 14:58:37.342736  00580000 ################################################################

 2074 14:58:37.342875  

 2075 14:58:37.944629  00600000 ################################################################

 2076 14:58:37.944766  

 2077 14:58:38.590557  00680000 ################################################################

 2078 14:58:38.591063  

 2079 14:58:39.254393  00700000 ################################################################

 2080 14:58:39.254917  

 2081 14:58:39.281458  00780000 ### done.

 2082 14:58:39.281894  

 2083 14:58:39.284498  The bootfile was 7884688 bytes long.

 2084 14:58:39.284925  

 2085 14:58:39.288154  Sending tftp read request... done.

 2086 14:58:39.288577  

 2087 14:58:39.291349  Waiting for the transfer... 

 2088 14:58:39.291815  

 2089 14:58:39.972880  00000000 ################################################################

 2090 14:58:39.973405  

 2091 14:58:40.645644  00080000 ################################################################

 2092 14:58:40.646168  

 2093 14:58:41.328960  00100000 ################################################################

 2094 14:58:41.329489  

 2095 14:58:42.014310  00180000 ################################################################

 2096 14:58:42.014832  

 2097 14:58:42.691511  00200000 ################################################################

 2098 14:58:42.692092  

 2099 14:58:43.371783  00280000 ################################################################

 2100 14:58:43.372353  

 2101 14:58:44.044749  00300000 ################################################################

 2102 14:58:44.045268  

 2103 14:58:44.714280  00380000 ################################################################

 2104 14:58:44.714839  

 2105 14:58:45.358851  00400000 ################################################################

 2106 14:58:45.359376  

 2107 14:58:46.035460  00480000 ################################################################

 2108 14:58:46.036012  

 2109 14:58:46.718134  00500000 ################################################################

 2110 14:58:46.718647  

 2111 14:58:47.395821  00580000 ################################################################

 2112 14:58:47.396442  

 2113 14:58:48.082718  00600000 ################################################################

 2114 14:58:48.083279  

 2115 14:58:48.776277  00680000 ################################################################

 2116 14:58:48.776878  

 2117 14:58:49.463235  00700000 ################################################################

 2118 14:58:49.463823  

 2119 14:58:50.115569  00780000 ################################################################

 2120 14:58:50.116157  

 2121 14:58:50.629826  00800000 #################################################### done.

 2122 14:58:50.630371  

 2123 14:58:50.633091  Sending tftp read request... done.

 2124 14:58:50.633563  

 2125 14:58:50.636400  Waiting for the transfer... 

 2126 14:58:50.636878  

 2127 14:58:50.637248  00000000 # done.

 2128 14:58:50.637609  

 2129 14:58:50.646703  Command line loaded dynamically from TFTP file: 11061938/tftp-deploy-9hf46asq/kernel/cmdline

 2130 14:58:50.647275  

 2131 14:58:50.663082  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2132 14:58:50.663699  

 2133 14:58:50.669706  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2134 14:58:50.674810  

 2135 14:58:50.678242  Shutting down all USB controllers.

 2136 14:58:50.678809  

 2137 14:58:50.679180  Removing current net device

 2138 14:58:50.685610  

 2139 14:58:50.686192  Finalizing coreboot

 2140 14:58:50.686575  

 2141 14:58:50.692592  Exiting depthcharge with code 4 at timestamp: 30258502

 2142 14:58:50.693161  

 2143 14:58:50.693533  

 2144 14:58:50.693876  Starting kernel ...

 2145 14:58:50.694294  

 2146 14:58:50.695810  end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
 2147 14:58:50.696365  start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
 2148 14:58:50.696781  Setting prompt string to ['Linux version [0-9]']
 2149 14:58:50.697166  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2150 14:58:50.697546  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2151 14:58:50.698424  

 2153 15:03:09.697373  end: 2.2.5 auto-login-action (duration 00:04:19) [common]
 2155 15:03:09.698479  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
 2157 15:03:09.699346  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2160 15:03:09.700782  end: 2 depthcharge-action (duration 00:05:00) [common]
 2162 15:03:09.702020  Cleaning after the job
 2163 15:03:09.702179  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11061938/tftp-deploy-9hf46asq/ramdisk
 2164 15:03:09.703584  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11061938/tftp-deploy-9hf46asq/kernel
 2165 15:03:09.704876  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11061938/tftp-deploy-9hf46asq/modules
 2166 15:03:09.705213  start: 5.1 power-off (timeout 00:00:30) [common]
 2167 15:03:09.705369  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
 2168 15:03:09.783264  >> Command sent successfully.

 2169 15:03:09.787259  Returned 0 in 0 seconds
 2170 15:03:09.888408  end: 5.1 power-off (duration 00:00:00) [common]
 2172 15:03:09.889963  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2173 15:03:09.891261  Listened to connection for namespace 'common' for up to 1s
 2174 15:03:10.892063  Finalising connection for namespace 'common'
 2175 15:03:10.892770  Disconnecting from shell: Finalise
 2176 15:03:10.893249  

 2177 15:03:10.994417  end: 5.2 read-feedback (duration 00:00:01) [common]
 2178 15:03:10.995084  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11061938
 2179 15:03:11.012930  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11061938
 2180 15:03:11.013061  JobError: Your job cannot terminate cleanly.