Boot log: acer-cbv514-1h-34uz-brya
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 15:43:19.462968 lava-dispatcher, installed at version: 2023.05.1
2 15:43:19.463173 start: 0 validate
3 15:43:19.463367 Start time: 2023-08-07 15:43:19.463359+00:00 (UTC)
4 15:43:19.463484 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:43:19.463609 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 15:43:19.735134 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:43:19.735987 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:43:20.007687 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:43:20.008511 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:43:22.361956 validate duration: 2.90
12 15:43:22.362235 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:43:22.362334 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:43:22.362425 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:43:22.362551 Not decompressing ramdisk as can be used compressed.
16 15:43:22.362635 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 15:43:22.362701 saving as /var/lib/lava/dispatcher/tmp/11224166/tftp-deploy-vufhk2os/ramdisk/rootfs.cpio.gz
18 15:43:22.362760 total size: 8418130 (8MB)
19 15:43:22.873377 progress 0% (0MB)
20 15:43:22.879571 progress 5% (0MB)
21 15:43:22.881772 progress 10% (0MB)
22 15:43:22.884133 progress 15% (1MB)
23 15:43:22.886482 progress 20% (1MB)
24 15:43:22.888739 progress 25% (2MB)
25 15:43:22.890950 progress 30% (2MB)
26 15:43:22.893116 progress 35% (2MB)
27 15:43:22.895394 progress 40% (3MB)
28 15:43:22.897703 progress 45% (3MB)
29 15:43:22.900068 progress 50% (4MB)
30 15:43:22.902271 progress 55% (4MB)
31 15:43:22.904442 progress 60% (4MB)
32 15:43:22.906509 progress 65% (5MB)
33 15:43:22.908697 progress 70% (5MB)
34 15:43:22.910858 progress 75% (6MB)
35 15:43:22.913051 progress 80% (6MB)
36 15:43:22.915467 progress 85% (6MB)
37 15:43:22.917628 progress 90% (7MB)
38 15:43:22.919824 progress 95% (7MB)
39 15:43:22.921828 progress 100% (8MB)
40 15:43:22.922053 8MB downloaded in 0.56s (14.35MB/s)
41 15:43:22.922201 end: 1.1.1 http-download (duration 00:00:01) [common]
43 15:43:22.922440 end: 1.1 download-retry (duration 00:00:01) [common]
44 15:43:22.922525 start: 1.2 download-retry (timeout 00:09:59) [common]
45 15:43:22.922612 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 15:43:22.922750 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:43:22.922821 saving as /var/lib/lava/dispatcher/tmp/11224166/tftp-deploy-vufhk2os/kernel/bzImage
48 15:43:22.922881 total size: 7884688 (7MB)
49 15:43:22.922939 No compression specified
50 15:43:22.924086 progress 0% (0MB)
51 15:43:22.926208 progress 5% (0MB)
52 15:43:22.928302 progress 10% (0MB)
53 15:43:22.930342 progress 15% (1MB)
54 15:43:22.932430 progress 20% (1MB)
55 15:43:22.934472 progress 25% (1MB)
56 15:43:22.936555 progress 30% (2MB)
57 15:43:22.938594 progress 35% (2MB)
58 15:43:22.940704 progress 40% (3MB)
59 15:43:22.942739 progress 45% (3MB)
60 15:43:22.944841 progress 50% (3MB)
61 15:43:22.946837 progress 55% (4MB)
62 15:43:22.948908 progress 60% (4MB)
63 15:43:22.950998 progress 65% (4MB)
64 15:43:22.953031 progress 70% (5MB)
65 15:43:22.955016 progress 75% (5MB)
66 15:43:22.957062 progress 80% (6MB)
67 15:43:22.959055 progress 85% (6MB)
68 15:43:22.961088 progress 90% (6MB)
69 15:43:22.963112 progress 95% (7MB)
70 15:43:22.965166 progress 100% (7MB)
71 15:43:22.965354 7MB downloaded in 0.04s (177.06MB/s)
72 15:43:22.965495 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:43:22.965722 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:43:22.965809 start: 1.3 download-retry (timeout 00:09:59) [common]
76 15:43:22.965898 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 15:43:22.966033 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:43:22.966103 saving as /var/lib/lava/dispatcher/tmp/11224166/tftp-deploy-vufhk2os/modules/modules.tar
79 15:43:22.966164 total size: 250796 (0MB)
80 15:43:22.966224 Using unxz to decompress xz
81 15:43:22.970213 progress 13% (0MB)
82 15:43:22.970601 progress 26% (0MB)
83 15:43:22.970836 progress 39% (0MB)
84 15:43:22.972452 progress 52% (0MB)
85 15:43:22.974283 progress 65% (0MB)
86 15:43:22.976174 progress 78% (0MB)
87 15:43:22.978025 progress 91% (0MB)
88 15:43:22.979780 progress 100% (0MB)
89 15:43:22.985265 0MB downloaded in 0.02s (12.53MB/s)
90 15:43:22.985535 end: 1.3.1 http-download (duration 00:00:00) [common]
92 15:43:22.985809 end: 1.3 download-retry (duration 00:00:00) [common]
93 15:43:22.985910 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 15:43:22.986005 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 15:43:22.986087 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 15:43:22.986175 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 15:43:22.986396 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1
98 15:43:22.986531 makedir: /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin
99 15:43:22.986637 makedir: /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/tests
100 15:43:22.986738 makedir: /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/results
101 15:43:22.986853 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-add-keys
102 15:43:22.987005 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-add-sources
103 15:43:22.987138 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-background-process-start
104 15:43:22.987322 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-background-process-stop
105 15:43:22.987453 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-common-functions
106 15:43:22.987581 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-echo-ipv4
107 15:43:22.987714 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-install-packages
108 15:43:22.987843 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-installed-packages
109 15:43:22.987974 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-os-build
110 15:43:22.988102 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-probe-channel
111 15:43:22.988230 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-probe-ip
112 15:43:22.988356 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-target-ip
113 15:43:22.988483 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-target-mac
114 15:43:22.988609 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-target-storage
115 15:43:22.988738 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-test-case
116 15:43:22.988865 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-test-event
117 15:43:22.988991 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-test-feedback
118 15:43:22.989118 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-test-raise
119 15:43:22.989249 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-test-reference
120 15:43:22.989380 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-test-runner
121 15:43:22.989509 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-test-set
122 15:43:22.989640 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-test-shell
123 15:43:22.989773 Updating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-install-packages (oe)
124 15:43:22.989929 Updating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/bin/lava-installed-packages (oe)
125 15:43:22.990055 Creating /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/environment
126 15:43:22.990156 LAVA metadata
127 15:43:22.990233 - LAVA_JOB_ID=11224166
128 15:43:22.990299 - LAVA_DISPATCHER_IP=192.168.201.1
129 15:43:22.990403 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 15:43:22.990471 skipped lava-vland-overlay
131 15:43:22.990546 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 15:43:22.990632 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 15:43:22.990697 skipped lava-multinode-overlay
134 15:43:22.990770 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 15:43:22.990850 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 15:43:22.990926 Loading test definitions
137 15:43:22.991014 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 15:43:22.991089 Using /lava-11224166 at stage 0
139 15:43:22.991462 uuid=11224166_1.4.2.3.1 testdef=None
140 15:43:22.991552 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 15:43:22.991639 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 15:43:22.992190 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 15:43:22.992418 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 15:43:22.993060 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 15:43:22.993289 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 15:43:22.993911 runner path: /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/0/tests/0_dmesg test_uuid 11224166_1.4.2.3.1
149 15:43:22.994068 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 15:43:22.994296 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 15:43:22.994368 Using /lava-11224166 at stage 1
153 15:43:22.994666 uuid=11224166_1.4.2.3.5 testdef=None
154 15:43:22.994755 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 15:43:22.994840 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 15:43:22.995365 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 15:43:22.995584 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 15:43:22.996235 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 15:43:22.996504 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 15:43:22.997136 runner path: /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/1/tests/1_bootrr test_uuid 11224166_1.4.2.3.5
163 15:43:22.997290 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 15:43:22.997501 Creating lava-test-runner.conf files
166 15:43:22.997565 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/0 for stage 0
167 15:43:22.997654 - 0_dmesg
168 15:43:22.997736 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224166/lava-overlay-n6m962o1/lava-11224166/1 for stage 1
169 15:43:22.997828 - 1_bootrr
170 15:43:22.997924 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 15:43:22.998011 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 15:43:23.006489 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 15:43:23.006595 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 15:43:23.006680 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 15:43:23.006767 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 15:43:23.006852 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 15:43:23.252663 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 15:43:23.253037 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 15:43:23.253154 extracting modules file /var/lib/lava/dispatcher/tmp/11224166/tftp-deploy-vufhk2os/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224166/extract-overlay-ramdisk-hwj5ymh5/ramdisk
180 15:43:23.266413 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 15:43:23.266527 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 15:43:23.266613 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224166/compress-overlay-qtein3yo/overlay-1.4.2.4.tar.gz to ramdisk
183 15:43:23.266685 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224166/compress-overlay-qtein3yo/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11224166/extract-overlay-ramdisk-hwj5ymh5/ramdisk
184 15:43:23.275474 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 15:43:23.275587 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 15:43:23.275677 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 15:43:23.275767 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 15:43:23.275851 Building ramdisk /var/lib/lava/dispatcher/tmp/11224166/extract-overlay-ramdisk-hwj5ymh5/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11224166/extract-overlay-ramdisk-hwj5ymh5/ramdisk
189 15:43:23.398094 >> 49788 blocks
190 15:43:24.217297 rename /var/lib/lava/dispatcher/tmp/11224166/extract-overlay-ramdisk-hwj5ymh5/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11224166/tftp-deploy-vufhk2os/ramdisk/ramdisk.cpio.gz
191 15:43:24.217745 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 15:43:24.217877 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 15:43:24.217981 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 15:43:24.218084 No mkimage arch provided, not using FIT.
195 15:43:24.218173 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 15:43:24.218257 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 15:43:24.218361 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 15:43:24.218452 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 15:43:24.218531 No LXC device requested
200 15:43:24.218610 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 15:43:24.218695 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 15:43:24.218772 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 15:43:24.218841 Checking files for TFTP limit of 4294967296 bytes.
204 15:43:24.219252 end: 1 tftp-deploy (duration 00:00:02) [common]
205 15:43:24.219372 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 15:43:24.219460 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 15:43:24.219581 substitutions:
208 15:43:24.219648 - {DTB}: None
209 15:43:24.219709 - {INITRD}: 11224166/tftp-deploy-vufhk2os/ramdisk/ramdisk.cpio.gz
210 15:43:24.219768 - {KERNEL}: 11224166/tftp-deploy-vufhk2os/kernel/bzImage
211 15:43:24.219825 - {LAVA_MAC}: None
212 15:43:24.219880 - {PRESEED_CONFIG}: None
213 15:43:24.219934 - {PRESEED_LOCAL}: None
214 15:43:24.219988 - {RAMDISK}: 11224166/tftp-deploy-vufhk2os/ramdisk/ramdisk.cpio.gz
215 15:43:24.220044 - {ROOT_PART}: None
216 15:43:24.220098 - {ROOT}: None
217 15:43:24.220152 - {SERVER_IP}: 192.168.201.1
218 15:43:24.220206 - {TEE}: None
219 15:43:24.220260 Parsed boot commands:
220 15:43:24.220314 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 15:43:24.220485 Parsed boot commands: tftpboot 192.168.201.1 11224166/tftp-deploy-vufhk2os/kernel/bzImage 11224166/tftp-deploy-vufhk2os/kernel/cmdline 11224166/tftp-deploy-vufhk2os/ramdisk/ramdisk.cpio.gz
222 15:43:24.220572 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 15:43:24.220657 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 15:43:24.220748 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 15:43:24.220834 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 15:43:24.220906 Not connected, no need to disconnect.
227 15:43:24.220979 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 15:43:24.221075 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 15:43:24.221195 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-9'
230 15:43:24.225175 Setting prompt string to ['lava-test: # ']
231 15:43:24.225509 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 15:43:24.225616 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 15:43:24.225713 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 15:43:24.225830 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 15:43:24.226063 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-9' '--port=1' '--command=reboot'
236 15:43:29.376779 >> Command sent successfully.
237 15:43:29.383030 Returned 0 in 5 seconds
238 15:43:29.483791 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 15:43:29.485492 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 15:43:29.486092 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 15:43:29.486594 Setting prompt string to 'Starting depthcharge on Volmar...'
243 15:43:29.486996 Changing prompt to 'Starting depthcharge on Volmar...'
244 15:43:29.487435 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
245 15:43:29.488718 [Enter `^Ec?' for help]
246 15:43:30.859079
247 15:43:30.859801
248 15:43:30.866595 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
249 15:43:30.870531 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
250 15:43:30.874278 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
251 15:43:30.881828 CPU: AES supported, TXT NOT supported, VT supported
252 15:43:30.889113 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
253 15:43:30.889681 Cache size = 10 MiB
254 15:43:30.895738 MCH: device id 4609 (rev 04) is Alderlake-P
255 15:43:30.899800 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
256 15:43:30.903100 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
257 15:43:30.906533 VBOOT: Loading verstage.
258 15:43:30.910961 FMAP: Found "FLASH" version 1.1 at 0x1804000.
259 15:43:30.914582 FMAP: base = 0x0 size = 0x2000000 #areas = 37
260 15:43:30.922020 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
261 15:43:30.929239 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
262 15:43:30.935914 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
263 15:43:30.939559
264 15:43:30.940024
265 15:43:30.946438 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
266 15:43:30.953794 Probing TPM I2C: I2C bus 1 version 0x3230302a
267 15:43:30.957494 DW I2C bus 1 at 0xfe022000 (400 KHz)
268 15:43:30.961254 I2C TX abort detected (00000001)
269 15:43:30.964452 cr50_i2c_read: Address write failed
270 15:43:30.975448 .done! DID_VID 0x00281ae0
271 15:43:30.978825 TPM ready after 0 ms
272 15:43:30.982401 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
273 15:43:30.996063 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
274 15:43:31.002522 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
275 15:43:31.043566 tlcl_send_startup: Startup return code is 0
276 15:43:31.044150 TPM: setup succeeded
277 15:43:31.063887 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
278 15:43:31.087120 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
279 15:43:31.090846 Chrome EC: UHEPI supported
280 15:43:31.093950 Reading cr50 boot mode
281 15:43:31.108991 Cr50 says boot_mode is VERIFIED_RW(0x00).
282 15:43:31.109591 Phase 1
283 15:43:31.115754 FMAP: area GBB found @ 1805000 (458752 bytes)
284 15:43:31.123296 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
285 15:43:31.130447 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
286 15:43:31.137137 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
287 15:43:31.137752 Phase 2
288 15:43:31.138292 Phase 3
289 15:43:31.143984 FMAP: area GBB found @ 1805000 (458752 bytes)
290 15:43:31.147381 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
291 15:43:31.153785 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
292 15:43:31.160338 VB2:vb2_verify_keyblock() Checking keyblock signature...
293 15:43:31.166894 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
294 15:43:31.173591 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
295 15:43:31.181029 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
296 15:43:31.194526 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
297 15:43:31.198297 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
298 15:43:31.204988 VB2:vb2_verify_fw_preamble() Verifying preamble.
299 15:43:31.208374 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
300 15:43:31.215376 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
301 15:43:31.225202 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
302 15:43:31.228371 Phase 4
303 15:43:31.231868 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
304 15:43:31.238415 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
305 15:43:31.450681 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
306 15:43:31.456966 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
307 15:43:31.460429 Saving vboot hash.
308 15:43:31.467376 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
309 15:43:31.483151 tlcl_extend: response is 0
310 15:43:31.489816 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
311 15:43:31.496132 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
312 15:43:31.510469 tlcl_extend: response is 0
313 15:43:31.517405 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
314 15:43:31.532917 tlcl_lock_nv_write: response is 0
315 15:43:31.554817 tlcl_lock_nv_write: response is 0
316 15:43:31.555423 Slot A is selected
317 15:43:31.561943 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
318 15:43:31.568508 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
319 15:43:31.575298 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
320 15:43:31.581984 BS: verstage times (exec / console): total (unknown) / 264 ms
321 15:43:31.582568
322 15:43:31.582953
323 15:43:31.588498 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
324 15:43:31.592226 Google Chrome EC: version:
325 15:43:31.595560 ro: volmar_v2.0.14126-e605144e9c
326 15:43:31.599005 rw: volmar_v0.0.55-22d1557
327 15:43:31.602361 running image: 2
328 15:43:31.605922 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
329 15:43:31.615731 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
330 15:43:31.622042 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
331 15:43:31.628851 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
332 15:43:31.639014 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
333 15:43:31.649011 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
334 15:43:31.652139 EC took 971us to calculate image hash
335 15:43:31.662114 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
336 15:43:31.665357 VB2:sync_ec() select_rw=RW(active)
337 15:43:31.678711 Waited 309us to clear limit power flag.
338 15:43:31.681432 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 15:43:31.685073 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
340 15:43:31.688756 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
341 15:43:31.695252 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
342 15:43:31.698568 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
343 15:43:31.702146 TCO_STS: 0000 0000
344 15:43:31.705261 GEN_PMCON: d0015038 00002200
345 15:43:31.708225 GBLRST_CAUSE: 00000000 00000000
346 15:43:31.708699 HPR_CAUSE0: 00000000
347 15:43:31.711690 prev_sleep_state 5
348 15:43:31.715277 Abort disabling TXT, as CPU is not TXT capable.
349 15:43:31.723323 cse_lite: Number of partitions = 3
350 15:43:31.726378 cse_lite: Current partition = RO
351 15:43:31.726959 cse_lite: Next partition = RO
352 15:43:31.729829 cse_lite: Flags = 0x7
353 15:43:31.736173 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
354 15:43:31.746451 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
355 15:43:31.749714 FMAP: area SI_ME found @ 1000 (5238784 bytes)
356 15:43:31.756365 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
357 15:43:31.762869 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
358 15:43:31.769850 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
359 15:43:31.773149 cse_lite: CSE CBFS RW version : 16.1.25.2049
360 15:43:31.779737 cse_lite: Set Boot Partition Info Command (RW)
361 15:43:31.782839 HECI: Global Reset(Type:1) Command
362 15:43:33.194360
363 15:43:33.194933
364 15:43:33.201463 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
365 15:43:33.205078 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
366 15:43:33.211747 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
367 15:43:33.215099 CPU: AES supported, TXT NOT supported, VT supported
368 15:43:33.225656 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
369 15:43:33.226241 Cache size = 10 MiB
370 15:43:33.231849 MCH: device id 4609 (rev 04) is Alderlake-P
371 15:43:33.235116 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
372 15:43:33.242076 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
373 15:43:33.242657 VBOOT: Loading verstage.
374 15:43:33.248965 FMAP: Found "FLASH" version 1.1 at 0x1804000.
375 15:43:33.252743 FMAP: base = 0x0 size = 0x2000000 #areas = 37
376 15:43:33.256356 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
377 15:43:33.266748 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
378 15:43:33.273212 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
379 15:43:33.273840
380 15:43:33.274219
381 15:43:33.283437 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
382 15:43:33.289853 Probing TPM I2C: I2C bus 1 version 0x3230302a
383 15:43:33.293345 DW I2C bus 1 at 0xfe022000 (400 KHz)
384 15:43:33.296430 done! DID_VID 0x00281ae0
385 15:43:33.296976 TPM ready after 0 ms
386 15:43:33.301608 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
387 15:43:33.311881 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
388 15:43:33.318758 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
389 15:43:33.359250 tlcl_send_startup: Startup return code is 0
390 15:43:33.359839 TPM: setup succeeded
391 15:43:33.379987 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
392 15:43:33.401908 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
393 15:43:33.406117 Chrome EC: UHEPI supported
394 15:43:33.409143 Reading cr50 boot mode
395 15:43:33.423824 Cr50 says boot_mode is VERIFIED_RW(0x00).
396 15:43:33.424388 Phase 1
397 15:43:33.430078 FMAP: area GBB found @ 1805000 (458752 bytes)
398 15:43:33.437117 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
399 15:43:33.443472 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
400 15:43:33.450994 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
401 15:43:33.454015 Phase 2
402 15:43:33.454503 Phase 3
403 15:43:33.456888 FMAP: area GBB found @ 1805000 (458752 bytes)
404 15:43:33.463911 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
405 15:43:33.466752 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
406 15:43:33.473507 VB2:vb2_verify_keyblock() Checking keyblock signature...
407 15:43:33.480445 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
408 15:43:33.487101 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
409 15:43:33.496876 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
410 15:43:33.508917 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
411 15:43:33.512125 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
412 15:43:33.519150 VB2:vb2_verify_fw_preamble() Verifying preamble.
413 15:43:33.525999 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
414 15:43:33.532356 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
415 15:43:33.538810 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
416 15:43:33.543434 Phase 4
417 15:43:33.546379 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
418 15:43:33.553219 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
419 15:43:33.765877 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
420 15:43:33.771961 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
421 15:43:33.775597 Saving vboot hash.
422 15:43:33.782294 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
423 15:43:33.798054 tlcl_extend: response is 0
424 15:43:33.804457 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
425 15:43:33.810813 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
426 15:43:33.825750 tlcl_extend: response is 0
427 15:43:33.832139 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
428 15:43:33.850830 tlcl_lock_nv_write: response is 0
429 15:43:33.869554 tlcl_lock_nv_write: response is 0
430 15:43:33.870110 Slot A is selected
431 15:43:33.876268 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
432 15:43:33.882893 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
433 15:43:33.889690 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
434 15:43:33.896326 BS: verstage times (exec / console): total (unknown) / 256 ms
435 15:43:33.896914
436 15:43:33.897292
437 15:43:33.903122 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
438 15:43:33.906980 Google Chrome EC: version:
439 15:43:33.910467 ro: volmar_v2.0.14126-e605144e9c
440 15:43:33.913662 rw: volmar_v0.0.55-22d1557
441 15:43:33.917327 running image: 2
442 15:43:33.920370 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
443 15:43:33.930406 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
444 15:43:33.937165 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
445 15:43:33.943694 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
446 15:43:33.953905 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
447 15:43:33.963475 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
448 15:43:33.966987 EC took 941us to calculate image hash
449 15:43:33.976882 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
450 15:43:33.980132 VB2:sync_ec() select_rw=RW(active)
451 15:43:33.992708 Waited 299us to clear limit power flag.
452 15:43:33.995135 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
453 15:43:33.998576 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
454 15:43:34.002094 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
455 15:43:34.008387 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
456 15:43:34.012083 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
457 15:43:34.015121 TCO_STS: 0000 0000
458 15:43:34.018846 GEN_PMCON: d1001038 00002200
459 15:43:34.021776 GBLRST_CAUSE: 00000040 00000000
460 15:43:34.021955 HPR_CAUSE0: 00000000
461 15:43:34.026163 prev_sleep_state 5
462 15:43:34.028946 Abort disabling TXT, as CPU is not TXT capable.
463 15:43:34.037186 cse_lite: Number of partitions = 3
464 15:43:34.040125 cse_lite: Current partition = RW
465 15:43:34.040418 cse_lite: Next partition = RW
466 15:43:34.043311 cse_lite: Flags = 0x7
467 15:43:34.051002 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
468 15:43:34.060297 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
469 15:43:34.063771 FMAP: area SI_ME found @ 1000 (5238784 bytes)
470 15:43:34.070786 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
471 15:43:34.077169 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
472 15:43:34.083338 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
473 15:43:34.087086 cse_lite: CSE CBFS RW version : 16.1.25.2049
474 15:43:34.090412 Boot Count incremented to 3791
475 15:43:34.097038 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
476 15:43:34.103486 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
477 15:43:34.116476 Probing TPM I2C: done! DID_VID 0x00281ae0
478 15:43:34.119541 Locality already claimed
479 15:43:34.122857 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
480 15:43:34.142431 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
481 15:43:34.149305 MRC: Hash idx 0x100d comparison successful.
482 15:43:34.152560 MRC cache found, size f6c8
483 15:43:34.153237 bootmode is set to: 2
484 15:43:34.155972 EC returned error result code 3
485 15:43:34.159072 FW_CONFIG value from CBI is 0x131
486 15:43:34.166346 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
487 15:43:34.169625 SPD index = 0
488 15:43:34.175875 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
489 15:43:34.176374 SPD: module type is LPDDR4X
490 15:43:34.183074 SPD: module part number is K4U6E3S4AB-MGCL
491 15:43:34.189838 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
492 15:43:34.193063 SPD: device width 16 bits, bus width 16 bits
493 15:43:34.196775 SPD: module size is 1024 MB (per channel)
494 15:43:34.265490 CBMEM:
495 15:43:34.268911 IMD: root @ 0x76fff000 254 entries.
496 15:43:34.272413 IMD: root @ 0x76ffec00 62 entries.
497 15:43:34.279865 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
498 15:43:34.283087 RO_VPD is uninitialized or empty.
499 15:43:34.286576 FMAP: area RW_VPD found @ f29000 (8192 bytes)
500 15:43:34.290005 RW_VPD is uninitialized or empty.
501 15:43:34.297081 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
502 15:43:34.300137 External stage cache:
503 15:43:34.303027 IMD: root @ 0x7bbff000 254 entries.
504 15:43:34.306345 IMD: root @ 0x7bbfec00 62 entries.
505 15:43:34.313430 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
506 15:43:34.319968 MRC: Checking cached data update for 'RW_MRC_CACHE'.
507 15:43:34.323337 MRC: 'RW_MRC_CACHE' does not need update.
508 15:43:34.323811 8 DIMMs found
509 15:43:34.326800 SMM Memory Map
510 15:43:34.329656 SMRAM : 0x7b800000 0x800000
511 15:43:34.333441 Subregion 0: 0x7b800000 0x200000
512 15:43:34.336415 Subregion 1: 0x7ba00000 0x200000
513 15:43:34.339700 Subregion 2: 0x7bc00000 0x400000
514 15:43:34.343028 top_of_ram = 0x77000000
515 15:43:34.346431 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
516 15:43:34.353325 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
517 15:43:34.360085 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
518 15:43:34.363162 MTRR Range: Start=ff000000 End=0 (Size 1000000)
519 15:43:34.363679 Normal boot
520 15:43:34.373286 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
521 15:43:34.379973 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
522 15:43:34.386088 Processing 237 relocs. Offset value of 0x74ab9000
523 15:43:34.394588 BS: romstage times (exec / console): total (unknown) / 381 ms
524 15:43:34.402575
525 15:43:34.403140
526 15:43:34.409016 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
527 15:43:34.409590 Normal boot
528 15:43:34.415173 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
529 15:43:34.421802 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
530 15:43:34.428497 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
531 15:43:34.438821 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
532 15:43:34.486902 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
533 15:43:34.493614 Processing 5931 relocs. Offset value of 0x72a2f000
534 15:43:34.497150 BS: postcar times (exec / console): total (unknown) / 51 ms
535 15:43:34.500253
536 15:43:34.500727
537 15:43:34.507085 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
538 15:43:34.510834 Reserving BERT start 76a1e000, size 10000
539 15:43:34.513772 Normal boot
540 15:43:34.516930 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
541 15:43:34.524196 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
542 15:43:34.533818 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
543 15:43:34.536762 FMAP: area RW_VPD found @ f29000 (8192 bytes)
544 15:43:34.540646 Google Chrome EC: version:
545 15:43:34.543948 ro: volmar_v2.0.14126-e605144e9c
546 15:43:34.546973 rw: volmar_v0.0.55-22d1557
547 15:43:34.547581 running image: 2
548 15:43:34.553630 ACPI _SWS is PM1 Index 8 GPE Index -1
549 15:43:34.556770 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
550 15:43:34.560594 EC returned error result code 3
551 15:43:34.567416 FW_CONFIG value from CBI is 0x131
552 15:43:34.570518 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
553 15:43:34.573915 PCI: 00:1c.2 disabled by fw_config
554 15:43:34.580356 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
555 15:43:34.583951 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
556 15:43:34.590427 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
557 15:43:34.593995 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
558 15:43:34.600711 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
559 15:43:34.608255 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
560 15:43:34.611769 microcode: sig=0x906a4 pf=0x80 revision=0x423
561 15:43:34.618393 microcode: Update skipped, already up-to-date
562 15:43:34.624748 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
563 15:43:34.657659 Detected 6 core, 8 thread CPU.
564 15:43:34.659792 Setting up SMI for CPU
565 15:43:34.663795 IED base = 0x7bc00000
566 15:43:34.664270 IED size = 0x00400000
567 15:43:34.666518 Will perform SMM setup.
568 15:43:34.670149 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
569 15:43:34.673295 LAPIC 0x0 in XAPIC mode.
570 15:43:34.683451 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
571 15:43:34.686754 Processing 18 relocs. Offset value of 0x00030000
572 15:43:34.691214 Attempting to start 7 APs
573 15:43:34.694489 Waiting for 10ms after sending INIT.
574 15:43:34.708044 Waiting for SIPI to complete...
575 15:43:34.710999 done.
576 15:43:34.711541 LAPIC 0x14 in XAPIC mode.
577 15:43:34.714306 LAPIC 0x10 in XAPIC mode.
578 15:43:34.717898 LAPIC 0x9 in XAPIC mode.
579 15:43:34.720789 LAPIC 0x16 in XAPIC mode.
580 15:43:34.723963 Waiting for SIPI to complete...
581 15:43:34.724444 done.
582 15:43:34.727569 AP: slot 1 apic_id 16, MCU rev: 0x00000423
583 15:43:34.734344 AP: slot 2 apic_id 10, MCU rev: 0x00000423
584 15:43:34.734897 LAPIC 0x12 in XAPIC mode.
585 15:43:34.737505 LAPIC 0x8 in XAPIC mode.
586 15:43:34.741017 AP: slot 4 apic_id 14, MCU rev: 0x00000423
587 15:43:34.747484 AP: slot 3 apic_id 12, MCU rev: 0x00000423
588 15:43:34.747966 LAPIC 0x1 in XAPIC mode.
589 15:43:34.754197 AP: slot 6 apic_id 9, MCU rev: 0x00000423
590 15:43:34.757749 AP: slot 7 apic_id 8, MCU rev: 0x00000423
591 15:43:34.760728 AP: slot 5 apic_id 1, MCU rev: 0x00000423
592 15:43:34.764091 smm_setup_relocation_handler: enter
593 15:43:34.767559 smm_setup_relocation_handler: exit
594 15:43:34.777226 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
595 15:43:34.781003 Processing 11 relocs. Offset value of 0x00038000
596 15:43:34.787706 smm_module_setup_stub: stack_top = 0x7b804000
597 15:43:34.790635 smm_module_setup_stub: per cpu stack_size = 0x800
598 15:43:34.797005 smm_module_setup_stub: runtime.start32_offset = 0x4c
599 15:43:34.800176 smm_module_setup_stub: runtime.smm_size = 0x10000
600 15:43:34.807545 SMM Module: stub loaded at 38000. Will call 0x76a52094
601 15:43:34.810303 Installing permanent SMM handler to 0x7b800000
602 15:43:34.817466 smm_load_module: total_smm_space_needed e468, available -> 200000
603 15:43:34.827347 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
604 15:43:34.830445 Processing 255 relocs. Offset value of 0x7b9f6000
605 15:43:34.837092 smm_load_module: smram_start: 0x7b800000
606 15:43:34.840490 smm_load_module: smram_end: 7ba00000
607 15:43:34.843665 smm_load_module: handler start 0x7b9f6d5f
608 15:43:34.846858 smm_load_module: handler_size 98d0
609 15:43:34.850174 smm_load_module: fxsave_area 0x7b9ff000
610 15:43:34.854042 smm_load_module: fxsave_size 1000
611 15:43:34.857231 smm_load_module: CONFIG_MSEG_SIZE 0x0
612 15:43:34.864161 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
613 15:43:34.870351 smm_load_module: handler_mod_params.smbase = 0x7b800000
614 15:43:34.873674 smm_load_module: per_cpu_save_state_size = 0x400
615 15:43:34.877235 smm_load_module: num_cpus = 0x8
616 15:43:34.883560 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
617 15:43:34.887016 smm_load_module: total_save_state_size = 0x2000
618 15:43:34.890342 smm_load_module: cpu0 entry: 7b9e6000
619 15:43:34.896955 smm_create_map: cpus allowed in one segment 30
620 15:43:34.900331 smm_create_map: min # of segments needed 1
621 15:43:34.900778 CPU 0x0
622 15:43:34.903254 smbase 7b9e6000 entry 7b9ee000
623 15:43:34.909928 ss_start 7b9f5c00 code_end 7b9ee208
624 15:43:34.910012 CPU 0x1
625 15:43:34.913459 smbase 7b9e5c00 entry 7b9edc00
626 15:43:34.919739 ss_start 7b9f5800 code_end 7b9ede08
627 15:43:34.919820 CPU 0x2
628 15:43:34.923308 smbase 7b9e5800 entry 7b9ed800
629 15:43:34.926505 ss_start 7b9f5400 code_end 7b9eda08
630 15:43:34.930473 CPU 0x3
631 15:43:34.932977 smbase 7b9e5400 entry 7b9ed400
632 15:43:34.936545 ss_start 7b9f5000 code_end 7b9ed608
633 15:43:34.939855 CPU 0x4
634 15:43:34.943160 smbase 7b9e5000 entry 7b9ed000
635 15:43:34.946509 ss_start 7b9f4c00 code_end 7b9ed208
636 15:43:34.946592 CPU 0x5
637 15:43:34.949882 smbase 7b9e4c00 entry 7b9ecc00
638 15:43:34.956514 ss_start 7b9f4800 code_end 7b9ece08
639 15:43:34.956597 CPU 0x6
640 15:43:34.959800 smbase 7b9e4800 entry 7b9ec800
641 15:43:34.966482 ss_start 7b9f4400 code_end 7b9eca08
642 15:43:34.966566 CPU 0x7
643 15:43:34.970267 smbase 7b9e4400 entry 7b9ec400
644 15:43:34.973183 ss_start 7b9f4000 code_end 7b9ec608
645 15:43:34.983246 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
646 15:43:34.986625 Processing 11 relocs. Offset value of 0x7b9ee000
647 15:43:34.993515 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
648 15:43:34.999727 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
649 15:43:35.006616 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
650 15:43:35.013139 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
651 15:43:35.019630 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
652 15:43:35.023157 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
653 15:43:35.029496 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
654 15:43:35.036438 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
655 15:43:35.043079 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
656 15:43:35.050148 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
657 15:43:35.056480 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
658 15:43:35.063305 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
659 15:43:35.069657 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
660 15:43:35.076703 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
661 15:43:35.083062 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
662 15:43:35.086112 smm_module_setup_stub: stack_top = 0x7b804000
663 15:43:35.093058 smm_module_setup_stub: per cpu stack_size = 0x800
664 15:43:35.096351 smm_module_setup_stub: runtime.start32_offset = 0x4c
665 15:43:35.103249 smm_module_setup_stub: runtime.smm_size = 0x200000
666 15:43:35.106746 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
667 15:43:35.111830 Clearing SMI status registers
668 15:43:35.115331 SMI_STS: PM1
669 15:43:35.115803 PM1_STS: WAK PWRBTN
670 15:43:35.125212 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
671 15:43:35.128336 In relocation handler: CPU 0
672 15:43:35.131704 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
673 15:43:35.134979 Writing SMRR. base = 0x7b800006, mask=0xff800c00
674 15:43:35.138257 Relocation complete.
675 15:43:35.144967 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
676 15:43:35.148070 In relocation handler: CPU 5
677 15:43:35.151804 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
678 15:43:35.154746 Relocation complete.
679 15:43:35.161456 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
680 15:43:35.164905 In relocation handler: CPU 2
681 15:43:35.168571 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
682 15:43:35.171779 Writing SMRR. base = 0x7b800006, mask=0xff800c00
683 15:43:35.175196 Relocation complete.
684 15:43:35.181968 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
685 15:43:35.185616 In relocation handler: CPU 3
686 15:43:35.188201 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
687 15:43:35.194750 Writing SMRR. base = 0x7b800006, mask=0xff800c00
688 15:43:35.198586 Relocation complete.
689 15:43:35.205063 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
690 15:43:35.208639 In relocation handler: CPU 4
691 15:43:35.211935 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
692 15:43:35.214579 Writing SMRR. base = 0x7b800006, mask=0xff800c00
693 15:43:35.217928 Relocation complete.
694 15:43:35.224523 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
695 15:43:35.227908 In relocation handler: CPU 1
696 15:43:35.231310 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
697 15:43:35.238264 Writing SMRR. base = 0x7b800006, mask=0xff800c00
698 15:43:35.238842 Relocation complete.
699 15:43:35.244794 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
700 15:43:35.247767 In relocation handler: CPU 7
701 15:43:35.254515 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
702 15:43:35.258181 Writing SMRR. base = 0x7b800006, mask=0xff800c00
703 15:43:35.261273 Relocation complete.
704 15:43:35.267655 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
705 15:43:35.271132 In relocation handler: CPU 6
706 15:43:35.274228 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
707 15:43:35.277854 Relocation complete.
708 15:43:35.278321 Initializing CPU #0
709 15:43:35.281059 CPU: vendor Intel device 906a4
710 15:43:35.284642 CPU: family 06, model 9a, stepping 04
711 15:43:35.288183 Clearing out pending MCEs
712 15:43:35.291522 cpu: energy policy set to 7
713 15:43:35.294787 Turbo is available but hidden
714 15:43:35.298161 Turbo is available and visible
715 15:43:35.301274 microcode: Update skipped, already up-to-date
716 15:43:35.304460 CPU #0 initialized
717 15:43:35.305046 Initializing CPU #5
718 15:43:35.307871 Initializing CPU #2
719 15:43:35.311341 Initializing CPU #4
720 15:43:35.314744 CPU: vendor Intel device 906a4
721 15:43:35.317904 CPU: family 06, model 9a, stepping 04
722 15:43:35.318396 Initializing CPU #3
723 15:43:35.321210 CPU: vendor Intel device 906a4
724 15:43:35.324818 CPU: family 06, model 9a, stepping 04
725 15:43:35.327786 Initializing CPU #1
726 15:43:35.331094 Clearing out pending MCEs
727 15:43:35.334775 Clearing out pending MCEs
728 15:43:35.335392 cpu: energy policy set to 7
729 15:43:35.337979 Initializing CPU #7
730 15:43:35.341105 cpu: energy policy set to 7
731 15:43:35.344281 CPU: vendor Intel device 906a4
732 15:43:35.348326 CPU: family 06, model 9a, stepping 04
733 15:43:35.351084 microcode: Update skipped, already up-to-date
734 15:43:35.354895 CPU #2 initialized
735 15:43:35.357881 Clearing out pending MCEs
736 15:43:35.361528 microcode: Update skipped, already up-to-date
737 15:43:35.364793 CPU #4 initialized
738 15:43:35.367744 CPU: vendor Intel device 906a4
739 15:43:35.371170 CPU: family 06, model 9a, stepping 04
740 15:43:35.374909 cpu: energy policy set to 7
741 15:43:35.375541 Initializing CPU #6
742 15:43:35.377728 Clearing out pending MCEs
743 15:43:35.381053 CPU: vendor Intel device 906a4
744 15:43:35.384394 CPU: family 06, model 9a, stepping 04
745 15:43:35.391392 microcode: Update skipped, already up-to-date
746 15:43:35.391955 CPU #1 initialized
747 15:43:35.394323 CPU: vendor Intel device 906a4
748 15:43:35.397821 CPU: family 06, model 9a, stepping 04
749 15:43:35.401007 Clearing out pending MCEs
750 15:43:35.404433 Clearing out pending MCEs
751 15:43:35.407628 cpu: energy policy set to 7
752 15:43:35.411337 cpu: energy policy set to 7
753 15:43:35.411899 cpu: energy policy set to 7
754 15:43:35.417890 microcode: Update skipped, already up-to-date
755 15:43:35.418445 CPU #7 initialized
756 15:43:35.423900 microcode: Update skipped, already up-to-date
757 15:43:35.424484 CPU #3 initialized
758 15:43:35.427504 CPU: vendor Intel device 906a4
759 15:43:35.431076 CPU: family 06, model 9a, stepping 04
760 15:43:35.437667 microcode: Update skipped, already up-to-date
761 15:43:35.438243 CPU #6 initialized
762 15:43:35.440901 Clearing out pending MCEs
763 15:43:35.444490 cpu: energy policy set to 7
764 15:43:35.447599 microcode: Update skipped, already up-to-date
765 15:43:35.451032 CPU #5 initialized
766 15:43:35.454174 bsp_do_flight_plan done after 726 msecs.
767 15:43:35.457597 CPU: frequency set to 4400 MHz
768 15:43:35.460841 Enabling SMIs.
769 15:43:35.467431 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms
770 15:43:35.482855 Probing TPM I2C: done! DID_VID 0x00281ae0
771 15:43:35.485828 Locality already claimed
772 15:43:35.488954 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
773 15:43:35.500477 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
774 15:43:35.503748 Enabling GPIO PM b/c CR50 has long IRQ pulse support
775 15:43:35.510270 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
776 15:43:35.516869 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
777 15:43:35.519936 Found a VBT of 9216 bytes after decompression
778 15:43:35.523807 PCI 1.0, PIN A, using IRQ #16
779 15:43:35.526703 PCI 2.0, PIN A, using IRQ #17
780 15:43:35.530774 PCI 4.0, PIN A, using IRQ #18
781 15:43:35.533265 PCI 5.0, PIN A, using IRQ #16
782 15:43:35.537078 PCI 6.0, PIN A, using IRQ #16
783 15:43:35.540619 PCI 6.2, PIN C, using IRQ #18
784 15:43:35.543577 PCI 7.0, PIN A, using IRQ #19
785 15:43:35.546945 PCI 7.1, PIN B, using IRQ #20
786 15:43:35.550339 PCI 7.2, PIN C, using IRQ #21
787 15:43:35.553790 PCI 7.3, PIN D, using IRQ #22
788 15:43:35.556832 PCI 8.0, PIN A, using IRQ #23
789 15:43:35.560360 PCI D.0, PIN A, using IRQ #17
790 15:43:35.563481 PCI D.1, PIN B, using IRQ #19
791 15:43:35.564044 PCI 10.0, PIN A, using IRQ #24
792 15:43:35.566978 PCI 10.1, PIN B, using IRQ #25
793 15:43:35.570350 PCI 10.6, PIN C, using IRQ #20
794 15:43:35.573629 PCI 10.7, PIN D, using IRQ #21
795 15:43:35.576838 PCI 11.0, PIN A, using IRQ #26
796 15:43:35.580250 PCI 11.1, PIN B, using IRQ #27
797 15:43:35.583605 PCI 11.2, PIN C, using IRQ #28
798 15:43:35.586762 PCI 11.3, PIN D, using IRQ #29
799 15:43:35.589980 PCI 12.0, PIN A, using IRQ #30
800 15:43:35.593266 PCI 12.6, PIN B, using IRQ #31
801 15:43:35.596920 PCI 12.7, PIN C, using IRQ #22
802 15:43:35.600243 PCI 13.0, PIN A, using IRQ #32
803 15:43:35.603187 PCI 13.1, PIN B, using IRQ #33
804 15:43:35.607095 PCI 13.2, PIN C, using IRQ #34
805 15:43:35.609933 PCI 13.3, PIN D, using IRQ #35
806 15:43:35.613498 PCI 14.0, PIN B, using IRQ #23
807 15:43:35.616269 PCI 14.1, PIN A, using IRQ #36
808 15:43:35.616760 PCI 14.3, PIN C, using IRQ #17
809 15:43:35.619648 PCI 15.0, PIN A, using IRQ #37
810 15:43:35.623146 PCI 15.1, PIN B, using IRQ #38
811 15:43:35.627340 PCI 15.2, PIN C, using IRQ #39
812 15:43:35.630241 PCI 15.3, PIN D, using IRQ #40
813 15:43:35.633512 PCI 16.0, PIN A, using IRQ #18
814 15:43:35.636604 PCI 16.1, PIN B, using IRQ #19
815 15:43:35.639917 PCI 16.2, PIN C, using IRQ #20
816 15:43:35.643564 PCI 16.3, PIN D, using IRQ #21
817 15:43:35.646661 PCI 16.4, PIN A, using IRQ #18
818 15:43:35.649864 PCI 16.5, PIN B, using IRQ #19
819 15:43:35.653255 PCI 17.0, PIN A, using IRQ #22
820 15:43:35.656212 PCI 19.0, PIN A, using IRQ #41
821 15:43:35.659781 PCI 19.1, PIN B, using IRQ #42
822 15:43:35.663165 PCI 19.2, PIN C, using IRQ #43
823 15:43:35.666645 PCI 1C.0, PIN A, using IRQ #16
824 15:43:35.667271 PCI 1C.1, PIN B, using IRQ #17
825 15:43:35.669500 PCI 1C.2, PIN C, using IRQ #18
826 15:43:35.673414 PCI 1C.3, PIN D, using IRQ #19
827 15:43:35.676299 PCI 1C.4, PIN A, using IRQ #16
828 15:43:35.679608 PCI 1C.5, PIN B, using IRQ #17
829 15:43:35.683125 PCI 1C.6, PIN C, using IRQ #18
830 15:43:35.686620 PCI 1C.7, PIN D, using IRQ #19
831 15:43:35.689555 PCI 1D.0, PIN A, using IRQ #16
832 15:43:35.693204 PCI 1D.1, PIN B, using IRQ #17
833 15:43:35.696079 PCI 1D.2, PIN C, using IRQ #18
834 15:43:35.699811 PCI 1D.3, PIN D, using IRQ #19
835 15:43:35.702838 PCI 1E.0, PIN A, using IRQ #23
836 15:43:35.706543 PCI 1E.1, PIN B, using IRQ #20
837 15:43:35.709885 PCI 1E.2, PIN C, using IRQ #44
838 15:43:35.713057 PCI 1E.3, PIN D, using IRQ #45
839 15:43:35.716428 PCI 1F.3, PIN B, using IRQ #22
840 15:43:35.719605 PCI 1F.4, PIN C, using IRQ #23
841 15:43:35.720127 PCI 1F.6, PIN D, using IRQ #20
842 15:43:35.722643 PCI 1F.7, PIN A, using IRQ #21
843 15:43:35.729868 IRQ: Using dynamically assigned PCI IO-APIC IRQs
844 15:43:35.736126 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
845 15:43:35.917400 FSPS returned 0
846 15:43:35.920845 Executing Phase 1 of FspMultiPhaseSiInit
847 15:43:35.930741 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
848 15:43:35.934439 port C0 DISC req: usage 1 usb3 1 usb2 1
849 15:43:35.937729 Raw Buffer output 0 00000111
850 15:43:35.941005 Raw Buffer output 1 00000000
851 15:43:35.944550 pmc_send_ipc_cmd succeeded
852 15:43:35.947775 port C1 DISC req: usage 1 usb3 3 usb2 3
853 15:43:35.951408 Raw Buffer output 0 00000331
854 15:43:35.954136 Raw Buffer output 1 00000000
855 15:43:35.958251 pmc_send_ipc_cmd succeeded
856 15:43:35.961953 Detected 6 core, 8 thread CPU.
857 15:43:35.965941 Detected 6 core, 8 thread CPU.
858 15:43:35.970870 Detected 6 core, 8 thread CPU.
859 15:43:35.974187 Detected 6 core, 8 thread CPU.
860 15:43:35.977032 Detected 6 core, 8 thread CPU.
861 15:43:35.980413 Detected 6 core, 8 thread CPU.
862 15:43:35.984178 Detected 6 core, 8 thread CPU.
863 15:43:35.987297 Detected 6 core, 8 thread CPU.
864 15:43:35.990763 Detected 6 core, 8 thread CPU.
865 15:43:35.994316 Detected 6 core, 8 thread CPU.
866 15:43:35.996914 Detected 6 core, 8 thread CPU.
867 15:43:36.000451 Detected 6 core, 8 thread CPU.
868 15:43:36.003985 Detected 6 core, 8 thread CPU.
869 15:43:36.007467 Detected 6 core, 8 thread CPU.
870 15:43:36.010535 Detected 6 core, 8 thread CPU.
871 15:43:36.013899 Detected 6 core, 8 thread CPU.
872 15:43:36.017257 Detected 6 core, 8 thread CPU.
873 15:43:36.020385 Detected 6 core, 8 thread CPU.
874 15:43:36.023762 Detected 6 core, 8 thread CPU.
875 15:43:36.027121 Detected 6 core, 8 thread CPU.
876 15:43:36.030729 Detected 6 core, 8 thread CPU.
877 15:43:36.033879 Detected 6 core, 8 thread CPU.
878 15:43:36.323851 Detected 6 core, 8 thread CPU.
879 15:43:36.326998 Detected 6 core, 8 thread CPU.
880 15:43:36.330619 Detected 6 core, 8 thread CPU.
881 15:43:36.333896 Detected 6 core, 8 thread CPU.
882 15:43:36.337107 Detected 6 core, 8 thread CPU.
883 15:43:36.340433 Detected 6 core, 8 thread CPU.
884 15:43:36.343902 Detected 6 core, 8 thread CPU.
885 15:43:36.347530 Detected 6 core, 8 thread CPU.
886 15:43:36.350309 Detected 6 core, 8 thread CPU.
887 15:43:36.353648 Detected 6 core, 8 thread CPU.
888 15:43:36.357051 Detected 6 core, 8 thread CPU.
889 15:43:36.360303 Detected 6 core, 8 thread CPU.
890 15:43:36.363461 Detected 6 core, 8 thread CPU.
891 15:43:36.367134 Detected 6 core, 8 thread CPU.
892 15:43:36.370356 Detected 6 core, 8 thread CPU.
893 15:43:36.373608 Detected 6 core, 8 thread CPU.
894 15:43:36.377254 Detected 6 core, 8 thread CPU.
895 15:43:36.380057 Detected 6 core, 8 thread CPU.
896 15:43:36.383560 Detected 6 core, 8 thread CPU.
897 15:43:36.386864 Detected 6 core, 8 thread CPU.
898 15:43:36.390201 Display FSP Version Info HOB
899 15:43:36.394104 Reference Code - CPU = c.0.65.70
900 15:43:36.394678 uCode Version = 0.0.4.23
901 15:43:36.397115 TXT ACM version = ff.ff.ff.ffff
902 15:43:36.400315 Reference Code - ME = c.0.65.70
903 15:43:36.403485 MEBx version = 0.0.0.0
904 15:43:36.407024 ME Firmware Version = Lite SKU
905 15:43:36.410215 Reference Code - PCH = c.0.65.70
906 15:43:36.413622 PCH-CRID Status = Disabled
907 15:43:36.416807 PCH-CRID Original Value = ff.ff.ff.ffff
908 15:43:36.419970 PCH-CRID New Value = ff.ff.ff.ffff
909 15:43:36.423646 OPROM - RST - RAID = ff.ff.ff.ffff
910 15:43:36.426776 PCH Hsio Version = 4.0.0.0
911 15:43:36.430386 Reference Code - SA - System Agent = c.0.65.70
912 15:43:36.433546 Reference Code - MRC = 0.0.3.80
913 15:43:36.436923 SA - PCIe Version = c.0.65.70
914 15:43:36.440028 SA-CRID Status = Disabled
915 15:43:36.443333 SA-CRID Original Value = 0.0.0.4
916 15:43:36.446949 SA-CRID New Value = 0.0.0.4
917 15:43:36.450104 OPROM - VBIOS = ff.ff.ff.ffff
918 15:43:36.453497 IO Manageability Engine FW Version = 24.0.4.0
919 15:43:36.456846 PHY Build Version = 0.0.0.2016
920 15:43:36.460165 Thunderbolt(TM) FW Version = 0.0.0.0
921 15:43:36.466730 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
922 15:43:36.473001 BS: BS_DEV_INIT_CHIPS run times (exec / console): 492 / 507 ms
923 15:43:36.476728 Enumerating buses...
924 15:43:36.479811 Show all devs... Before device enumeration.
925 15:43:36.483415 Root Device: enabled 1
926 15:43:36.484020 CPU_CLUSTER: 0: enabled 1
927 15:43:36.486885 DOMAIN: 0000: enabled 1
928 15:43:36.490241 GPIO: 0: enabled 1
929 15:43:36.490811 PCI: 00:00.0: enabled 1
930 15:43:36.493553 PCI: 00:01.0: enabled 0
931 15:43:36.496912 PCI: 00:01.1: enabled 0
932 15:43:36.500230 PCI: 00:02.0: enabled 1
933 15:43:36.500805 PCI: 00:04.0: enabled 1
934 15:43:36.503606 PCI: 00:05.0: enabled 0
935 15:43:36.507095 PCI: 00:06.0: enabled 1
936 15:43:36.510547 PCI: 00:06.2: enabled 0
937 15:43:36.511118 PCI: 00:07.0: enabled 0
938 15:43:36.513559 PCI: 00:07.1: enabled 0
939 15:43:36.517529 PCI: 00:07.2: enabled 0
940 15:43:36.519958 PCI: 00:07.3: enabled 0
941 15:43:36.520515 PCI: 00:08.0: enabled 0
942 15:43:36.523638 PCI: 00:09.0: enabled 0
943 15:43:36.526154 PCI: 00:0a.0: enabled 1
944 15:43:36.529674 PCI: 00:0d.0: enabled 1
945 15:43:36.530146 PCI: 00:0d.1: enabled 0
946 15:43:36.533408 PCI: 00:0d.2: enabled 0
947 15:43:36.536267 PCI: 00:0d.3: enabled 0
948 15:43:36.536738 PCI: 00:0e.0: enabled 0
949 15:43:36.539595 PCI: 00:10.0: enabled 0
950 15:43:36.543243 PCI: 00:10.1: enabled 0
951 15:43:36.546235 PCI: 00:10.6: enabled 0
952 15:43:36.546799 PCI: 00:10.7: enabled 0
953 15:43:36.549401 PCI: 00:12.0: enabled 0
954 15:43:36.553338 PCI: 00:12.6: enabled 0
955 15:43:36.556428 PCI: 00:12.7: enabled 0
956 15:43:36.556991 PCI: 00:13.0: enabled 0
957 15:43:36.559871 PCI: 00:14.0: enabled 1
958 15:43:36.563259 PCI: 00:14.1: enabled 0
959 15:43:36.566736 PCI: 00:14.2: enabled 1
960 15:43:36.567347 PCI: 00:14.3: enabled 1
961 15:43:36.569884 PCI: 00:15.0: enabled 1
962 15:43:36.572676 PCI: 00:15.1: enabled 1
963 15:43:36.576198 PCI: 00:15.2: enabled 0
964 15:43:36.576761 PCI: 00:15.3: enabled 1
965 15:43:36.580059 PCI: 00:16.0: enabled 1
966 15:43:36.583104 PCI: 00:16.1: enabled 0
967 15:43:36.583743 PCI: 00:16.2: enabled 0
968 15:43:36.586566 PCI: 00:16.3: enabled 0
969 15:43:36.589768 PCI: 00:16.4: enabled 0
970 15:43:36.593086 PCI: 00:16.5: enabled 0
971 15:43:36.593654 PCI: 00:17.0: enabled 1
972 15:43:36.596109 PCI: 00:19.0: enabled 0
973 15:43:36.599588 PCI: 00:19.1: enabled 1
974 15:43:36.603165 PCI: 00:19.2: enabled 0
975 15:43:36.603770 PCI: 00:1a.0: enabled 0
976 15:43:36.606222 PCI: 00:1c.0: enabled 0
977 15:43:36.609574 PCI: 00:1c.1: enabled 0
978 15:43:36.613002 PCI: 00:1c.2: enabled 0
979 15:43:36.613572 PCI: 00:1c.3: enabled 0
980 15:43:36.616178 PCI: 00:1c.4: enabled 0
981 15:43:36.619949 PCI: 00:1c.5: enabled 0
982 15:43:36.620515 PCI: 00:1c.6: enabled 0
983 15:43:36.622912 PCI: 00:1c.7: enabled 0
984 15:43:36.626265 PCI: 00:1d.0: enabled 0
985 15:43:36.629722 PCI: 00:1d.1: enabled 0
986 15:43:36.630287 PCI: 00:1d.2: enabled 0
987 15:43:36.633479 PCI: 00:1d.3: enabled 0
988 15:43:36.635904 PCI: 00:1e.0: enabled 1
989 15:43:36.639854 PCI: 00:1e.1: enabled 0
990 15:43:36.640420 PCI: 00:1e.2: enabled 0
991 15:43:36.642804 PCI: 00:1e.3: enabled 1
992 15:43:36.646293 PCI: 00:1f.0: enabled 1
993 15:43:36.649320 PCI: 00:1f.1: enabled 0
994 15:43:36.649792 PCI: 00:1f.2: enabled 1
995 15:43:36.652981 PCI: 00:1f.3: enabled 1
996 15:43:36.656367 PCI: 00:1f.4: enabled 0
997 15:43:36.656934 PCI: 00:1f.5: enabled 1
998 15:43:36.659615 PCI: 00:1f.6: enabled 0
999 15:43:36.662659 PCI: 00:1f.7: enabled 0
1000 15:43:36.666480 GENERIC: 0.0: enabled 1
1001 15:43:36.667047 GENERIC: 0.0: enabled 1
1002 15:43:36.669456 GENERIC: 1.0: enabled 1
1003 15:43:36.672519 GENERIC: 0.0: enabled 1
1004 15:43:36.676478 GENERIC: 1.0: enabled 1
1005 15:43:36.677077 USB0 port 0: enabled 1
1006 15:43:36.679332 USB0 port 0: enabled 1
1007 15:43:36.682939 GENERIC: 0.0: enabled 1
1008 15:43:36.683555 I2C: 00:1a: enabled 1
1009 15:43:36.686521 I2C: 00:31: enabled 1
1010 15:43:36.689568 I2C: 00:32: enabled 1
1011 15:43:36.690137 I2C: 00:50: enabled 1
1012 15:43:36.692805 I2C: 00:10: enabled 1
1013 15:43:36.696073 I2C: 00:15: enabled 1
1014 15:43:36.699369 I2C: 00:2c: enabled 1
1015 15:43:36.699939 GENERIC: 0.0: enabled 1
1016 15:43:36.702265 SPI: 00: enabled 1
1017 15:43:36.705844 PNP: 0c09.0: enabled 1
1018 15:43:36.706313 GENERIC: 0.0: enabled 1
1019 15:43:36.709482 USB3 port 0: enabled 1
1020 15:43:36.712704 USB3 port 1: enabled 0
1021 15:43:36.713305 USB3 port 2: enabled 1
1022 15:43:36.715627 USB3 port 3: enabled 0
1023 15:43:36.719517 USB2 port 0: enabled 1
1024 15:43:36.722662 USB2 port 1: enabled 0
1025 15:43:36.723172 USB2 port 2: enabled 1
1026 15:43:36.725902 USB2 port 3: enabled 0
1027 15:43:36.729144 USB2 port 4: enabled 0
1028 15:43:36.729709 USB2 port 5: enabled 1
1029 15:43:36.732517 USB2 port 6: enabled 0
1030 15:43:36.735948 USB2 port 7: enabled 0
1031 15:43:36.736410 USB2 port 8: enabled 1
1032 15:43:36.739016 USB2 port 9: enabled 1
1033 15:43:36.742886 USB3 port 0: enabled 1
1034 15:43:36.745885 USB3 port 1: enabled 0
1035 15:43:36.746346 USB3 port 2: enabled 0
1036 15:43:36.749545 USB3 port 3: enabled 0
1037 15:43:36.752535 GENERIC: 0.0: enabled 1
1038 15:43:36.753001 GENERIC: 1.0: enabled 1
1039 15:43:36.755616 APIC: 00: enabled 1
1040 15:43:36.759624 APIC: 16: enabled 1
1041 15:43:36.760190 APIC: 10: enabled 1
1042 15:43:36.762654 APIC: 12: enabled 1
1043 15:43:36.763113 APIC: 14: enabled 1
1044 15:43:36.765775 APIC: 01: enabled 1
1045 15:43:36.769531 APIC: 09: enabled 1
1046 15:43:36.770097 APIC: 08: enabled 1
1047 15:43:36.772612 Compare with tree...
1048 15:43:36.775562 Root Device: enabled 1
1049 15:43:36.779618 CPU_CLUSTER: 0: enabled 1
1050 15:43:36.780196 APIC: 00: enabled 1
1051 15:43:36.782426 APIC: 16: enabled 1
1052 15:43:36.785881 APIC: 10: enabled 1
1053 15:43:36.786341 APIC: 12: enabled 1
1054 15:43:36.789214 APIC: 14: enabled 1
1055 15:43:36.792559 APIC: 01: enabled 1
1056 15:43:36.793156 APIC: 09: enabled 1
1057 15:43:36.795527 APIC: 08: enabled 1
1058 15:43:36.799196 DOMAIN: 0000: enabled 1
1059 15:43:36.799815 GPIO: 0: enabled 1
1060 15:43:36.803074 PCI: 00:00.0: enabled 1
1061 15:43:36.806131 PCI: 00:01.0: enabled 0
1062 15:43:36.809176 PCI: 00:01.1: enabled 0
1063 15:43:36.812578 PCI: 00:02.0: enabled 1
1064 15:43:36.813147 PCI: 00:04.0: enabled 1
1065 15:43:36.815866 GENERIC: 0.0: enabled 1
1066 15:43:36.818898 PCI: 00:05.0: enabled 0
1067 15:43:36.822391 PCI: 00:06.0: enabled 1
1068 15:43:36.826028 PCI: 00:06.2: enabled 0
1069 15:43:36.826491 PCI: 00:08.0: enabled 0
1070 15:43:36.829284 PCI: 00:09.0: enabled 0
1071 15:43:36.832857 PCI: 00:0a.0: enabled 1
1072 15:43:36.835729 PCI: 00:0d.0: enabled 1
1073 15:43:36.836190 USB0 port 0: enabled 1
1074 15:43:36.839111 USB3 port 0: enabled 1
1075 15:43:36.842251 USB3 port 1: enabled 0
1076 15:43:36.845673 USB3 port 2: enabled 1
1077 15:43:36.849400 USB3 port 3: enabled 0
1078 15:43:36.852301 PCI: 00:0d.1: enabled 0
1079 15:43:36.852862 PCI: 00:0d.2: enabled 0
1080 15:43:36.855799 PCI: 00:0d.3: enabled 0
1081 15:43:36.858611 PCI: 00:0e.0: enabled 0
1082 15:43:36.862337 PCI: 00:10.0: enabled 0
1083 15:43:36.865883 PCI: 00:10.1: enabled 0
1084 15:43:36.866449 PCI: 00:10.6: enabled 0
1085 15:43:36.869233 PCI: 00:10.7: enabled 0
1086 15:43:36.872772 PCI: 00:12.0: enabled 0
1087 15:43:36.875631 PCI: 00:12.6: enabled 0
1088 15:43:36.879115 PCI: 00:12.7: enabled 0
1089 15:43:36.879736 PCI: 00:13.0: enabled 0
1090 15:43:36.882043 PCI: 00:14.0: enabled 1
1091 15:43:36.885792 USB0 port 0: enabled 1
1092 15:43:36.889064 USB2 port 0: enabled 1
1093 15:43:36.892452 USB2 port 1: enabled 0
1094 15:43:36.893022 USB2 port 2: enabled 1
1095 15:43:36.896137 USB2 port 3: enabled 0
1096 15:43:36.898993 USB2 port 4: enabled 0
1097 15:43:36.902268 USB2 port 5: enabled 1
1098 15:43:36.905503 USB2 port 6: enabled 0
1099 15:43:36.906057 USB2 port 7: enabled 0
1100 15:43:36.909247 USB2 port 8: enabled 1
1101 15:43:36.912176 USB2 port 9: enabled 1
1102 15:43:36.915542 USB3 port 0: enabled 1
1103 15:43:36.918570 USB3 port 1: enabled 0
1104 15:43:36.921836 USB3 port 2: enabled 0
1105 15:43:36.922298 USB3 port 3: enabled 0
1106 15:43:36.925228 PCI: 00:14.1: enabled 0
1107 15:43:36.928616 PCI: 00:14.2: enabled 1
1108 15:43:36.931922 PCI: 00:14.3: enabled 1
1109 15:43:36.935458 GENERIC: 0.0: enabled 1
1110 15:43:36.936021 PCI: 00:15.0: enabled 1
1111 15:43:36.938528 I2C: 00:1a: enabled 1
1112 15:43:36.941967 I2C: 00:31: enabled 1
1113 15:43:36.945914 I2C: 00:32: enabled 1
1114 15:43:36.948582 PCI: 00:15.1: enabled 1
1115 15:43:36.949146 I2C: 00:50: enabled 1
1116 15:43:36.951895 PCI: 00:15.2: enabled 0
1117 15:43:36.955545 PCI: 00:15.3: enabled 1
1118 15:43:36.958745 I2C: 00:10: enabled 1
1119 15:43:36.959354 PCI: 00:16.0: enabled 1
1120 15:43:36.962337 PCI: 00:16.1: enabled 0
1121 15:43:36.965276 PCI: 00:16.2: enabled 0
1122 15:43:36.968458 PCI: 00:16.3: enabled 0
1123 15:43:36.971996 PCI: 00:16.4: enabled 0
1124 15:43:36.972561 PCI: 00:16.5: enabled 0
1125 15:43:36.975471 PCI: 00:17.0: enabled 1
1126 15:43:36.978624 PCI: 00:19.0: enabled 0
1127 15:43:36.981493 PCI: 00:19.1: enabled 1
1128 15:43:36.985107 I2C: 00:15: enabled 1
1129 15:43:36.985674 I2C: 00:2c: enabled 1
1130 15:43:36.988521 PCI: 00:19.2: enabled 0
1131 15:43:36.992052 PCI: 00:1a.0: enabled 0
1132 15:43:36.995506 PCI: 00:1e.0: enabled 1
1133 15:43:36.996077 PCI: 00:1e.1: enabled 0
1134 15:43:36.998772 PCI: 00:1e.2: enabled 0
1135 15:43:37.001819 PCI: 00:1e.3: enabled 1
1136 15:43:37.005112 SPI: 00: enabled 1
1137 15:43:37.008791 PCI: 00:1f.0: enabled 1
1138 15:43:37.009353 PNP: 0c09.0: enabled 1
1139 15:43:37.011857 PCI: 00:1f.1: enabled 0
1140 15:43:37.015147 PCI: 00:1f.2: enabled 1
1141 15:43:37.018552 GENERIC: 0.0: enabled 1
1142 15:43:37.021797 GENERIC: 0.0: enabled 1
1143 15:43:37.022443 GENERIC: 1.0: enabled 1
1144 15:43:37.024717 PCI: 00:1f.3: enabled 1
1145 15:43:37.028044 PCI: 00:1f.4: enabled 0
1146 15:43:37.031708 PCI: 00:1f.5: enabled 1
1147 15:43:37.034988 PCI: 00:1f.6: enabled 0
1148 15:43:37.035538 PCI: 00:1f.7: enabled 0
1149 15:43:37.038778 Root Device scanning...
1150 15:43:37.041749 scan_static_bus for Root Device
1151 15:43:37.044748 CPU_CLUSTER: 0 enabled
1152 15:43:37.045304 DOMAIN: 0000 enabled
1153 15:43:37.048193 DOMAIN: 0000 scanning...
1154 15:43:37.051515 PCI: pci_scan_bus for bus 00
1155 15:43:37.054851 PCI: 00:00.0 [8086/0000] ops
1156 15:43:37.058260 PCI: 00:00.0 [8086/4609] enabled
1157 15:43:37.061672 PCI: 00:02.0 [8086/0000] bus ops
1158 15:43:37.064967 PCI: 00:02.0 [8086/46b3] enabled
1159 15:43:37.068398 PCI: 00:04.0 [8086/0000] bus ops
1160 15:43:37.071751 PCI: 00:04.0 [8086/461d] enabled
1161 15:43:37.074961 PCI: 00:06.0 [8086/0000] bus ops
1162 15:43:37.078345 PCI: 00:06.0 [8086/464d] enabled
1163 15:43:37.081181 PCI: 00:08.0 [8086/464f] disabled
1164 15:43:37.084688 PCI: 00:0a.0 [8086/467d] enabled
1165 15:43:37.088386 PCI: 00:0d.0 [8086/0000] bus ops
1166 15:43:37.091303 PCI: 00:0d.0 [8086/461e] enabled
1167 15:43:37.094885 PCI: 00:14.0 [8086/0000] bus ops
1168 15:43:37.098438 PCI: 00:14.0 [8086/51ed] enabled
1169 15:43:37.101458 PCI: 00:14.2 [8086/51ef] enabled
1170 15:43:37.104823 PCI: 00:14.3 [8086/0000] bus ops
1171 15:43:37.108562 PCI: 00:14.3 [8086/51f0] enabled
1172 15:43:37.111763 PCI: 00:15.0 [8086/0000] bus ops
1173 15:43:37.115028 PCI: 00:15.0 [8086/51e8] enabled
1174 15:43:37.118092 PCI: 00:15.1 [8086/0000] bus ops
1175 15:43:37.121544 PCI: 00:15.1 [8086/51e9] enabled
1176 15:43:37.124675 PCI: 00:15.2 [8086/0000] bus ops
1177 15:43:37.127854 PCI: 00:15.2 [8086/51ea] disabled
1178 15:43:37.131444 PCI: 00:15.3 [8086/0000] bus ops
1179 15:43:37.135000 PCI: 00:15.3 [8086/51eb] enabled
1180 15:43:37.138115 PCI: 00:16.0 [8086/0000] ops
1181 15:43:37.141852 PCI: 00:16.0 [8086/51e0] enabled
1182 15:43:37.148164 PCI: Static device PCI: 00:17.0 not found, disabling it.
1183 15:43:37.151484 PCI: 00:19.0 [8086/0000] bus ops
1184 15:43:37.154869 PCI: 00:19.0 [8086/51c5] disabled
1185 15:43:37.158056 PCI: 00:19.1 [8086/0000] bus ops
1186 15:43:37.161699 PCI: 00:19.1 [8086/51c6] enabled
1187 15:43:37.164683 PCI: 00:1e.0 [8086/0000] ops
1188 15:43:37.167821 PCI: 00:1e.0 [8086/51a8] enabled
1189 15:43:37.171736 PCI: 00:1e.3 [8086/0000] bus ops
1190 15:43:37.174438 PCI: 00:1e.3 [8086/51ab] enabled
1191 15:43:37.177908 PCI: 00:1f.0 [8086/0000] bus ops
1192 15:43:37.181156 PCI: 00:1f.0 [8086/5182] enabled
1193 15:43:37.184704 RTC Init
1194 15:43:37.187893 Set power on after power failure.
1195 15:43:37.188357 Disabling Deep S3
1196 15:43:37.191325 Disabling Deep S3
1197 15:43:37.191881 Disabling Deep S4
1198 15:43:37.194536 Disabling Deep S4
1199 15:43:37.197939 Disabling Deep S5
1200 15:43:37.198491 Disabling Deep S5
1201 15:43:37.201325 PCI: 00:1f.2 [0000/0000] hidden
1202 15:43:37.204586 PCI: 00:1f.3 [8086/0000] bus ops
1203 15:43:37.207873 PCI: 00:1f.3 [8086/51c8] enabled
1204 15:43:37.211652 PCI: 00:1f.5 [8086/0000] bus ops
1205 15:43:37.215030 PCI: 00:1f.5 [8086/51a4] enabled
1206 15:43:37.217833 GPIO: 0 enabled
1207 15:43:37.221670 PCI: Leftover static devices:
1208 15:43:37.222271 PCI: 00:01.0
1209 15:43:37.222682 PCI: 00:01.1
1210 15:43:37.224440 PCI: 00:05.0
1211 15:43:37.224931 PCI: 00:06.2
1212 15:43:37.227858 PCI: 00:09.0
1213 15:43:37.228357 PCI: 00:0d.1
1214 15:43:37.228725 PCI: 00:0d.2
1215 15:43:37.231534 PCI: 00:0d.3
1216 15:43:37.231994 PCI: 00:0e.0
1217 15:43:37.234443 PCI: 00:10.0
1218 15:43:37.234901 PCI: 00:10.1
1219 15:43:37.235322 PCI: 00:10.6
1220 15:43:37.237864 PCI: 00:10.7
1221 15:43:37.238322 PCI: 00:12.0
1222 15:43:37.241301 PCI: 00:12.6
1223 15:43:37.241856 PCI: 00:12.7
1224 15:43:37.244639 PCI: 00:13.0
1225 15:43:37.245196 PCI: 00:14.1
1226 15:43:37.245558 PCI: 00:16.1
1227 15:43:37.248092 PCI: 00:16.2
1228 15:43:37.248555 PCI: 00:16.3
1229 15:43:37.251581 PCI: 00:16.4
1230 15:43:37.252039 PCI: 00:16.5
1231 15:43:37.252406 PCI: 00:17.0
1232 15:43:37.254828 PCI: 00:19.2
1233 15:43:37.255438 PCI: 00:1a.0
1234 15:43:37.258079 PCI: 00:1e.1
1235 15:43:37.258636 PCI: 00:1e.2
1236 15:43:37.259003 PCI: 00:1f.1
1237 15:43:37.261710 PCI: 00:1f.4
1238 15:43:37.262260 PCI: 00:1f.6
1239 15:43:37.264949 PCI: 00:1f.7
1240 15:43:37.267952 PCI: Check your devicetree.cb.
1241 15:43:37.268516 PCI: 00:02.0 scanning...
1242 15:43:37.271353 scan_generic_bus for PCI: 00:02.0
1243 15:43:37.277870 scan_generic_bus for PCI: 00:02.0 done
1244 15:43:37.281044 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1245 15:43:37.284270 PCI: 00:04.0 scanning...
1246 15:43:37.287880 scan_generic_bus for PCI: 00:04.0
1247 15:43:37.288447 GENERIC: 0.0 enabled
1248 15:43:37.294475 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1249 15:43:37.300888 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1250 15:43:37.304290 PCI: 00:06.0 scanning...
1251 15:43:37.308179 do_pci_scan_bridge for PCI: 00:06.0
1252 15:43:37.308733 PCI: pci_scan_bus for bus 01
1253 15:43:37.311015 PCI: 01:00.0 [15b7/5009] enabled
1254 15:43:37.318151 Enabling Common Clock Configuration
1255 15:43:37.321204 L1 Sub-State supported from root port 6
1256 15:43:37.324415 L1 Sub-State Support = 0x5
1257 15:43:37.327725 CommonModeRestoreTime = 0x6e
1258 15:43:37.330788 Power On Value = 0x5, Power On Scale = 0x2
1259 15:43:37.331295 ASPM: Enabled L1
1260 15:43:37.337525 PCIe: Max_Payload_Size adjusted to 256
1261 15:43:37.338083 PCI: 01:00.0: Enabled LTR
1262 15:43:37.344327 PCI: 01:00.0: Programmed LTR max latencies
1263 15:43:37.348005 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1264 15:43:37.351420 PCI: 00:0d.0 scanning...
1265 15:43:37.354713 scan_static_bus for PCI: 00:0d.0
1266 15:43:37.355301 USB0 port 0 enabled
1267 15:43:37.357839 USB0 port 0 scanning...
1268 15:43:37.361213 scan_static_bus for USB0 port 0
1269 15:43:37.364371 USB3 port 0 enabled
1270 15:43:37.364924 USB3 port 1 disabled
1271 15:43:37.367854 USB3 port 2 enabled
1272 15:43:37.371193 USB3 port 3 disabled
1273 15:43:37.371791 USB3 port 0 scanning...
1274 15:43:37.374705 scan_static_bus for USB3 port 0
1275 15:43:37.377765 scan_static_bus for USB3 port 0 done
1276 15:43:37.384755 scan_bus: bus USB3 port 0 finished in 6 msecs
1277 15:43:37.387725 USB3 port 2 scanning...
1278 15:43:37.391123 scan_static_bus for USB3 port 2
1279 15:43:37.394504 scan_static_bus for USB3 port 2 done
1280 15:43:37.397529 scan_bus: bus USB3 port 2 finished in 6 msecs
1281 15:43:37.400925 scan_static_bus for USB0 port 0 done
1282 15:43:37.407905 scan_bus: bus USB0 port 0 finished in 43 msecs
1283 15:43:37.410856 scan_static_bus for PCI: 00:0d.0 done
1284 15:43:37.414063 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1285 15:43:37.417902 PCI: 00:14.0 scanning...
1286 15:43:37.420867 scan_static_bus for PCI: 00:14.0
1287 15:43:37.423980 USB0 port 0 enabled
1288 15:43:37.424463 USB0 port 0 scanning...
1289 15:43:37.427345 scan_static_bus for USB0 port 0
1290 15:43:37.430810 USB2 port 0 enabled
1291 15:43:37.433969 USB2 port 1 disabled
1292 15:43:37.434525 USB2 port 2 enabled
1293 15:43:37.437661 USB2 port 3 disabled
1294 15:43:37.438216 USB2 port 4 disabled
1295 15:43:37.441370 USB2 port 5 enabled
1296 15:43:37.444221 USB2 port 6 disabled
1297 15:43:37.444678 USB2 port 7 disabled
1298 15:43:37.447721 USB2 port 8 enabled
1299 15:43:37.451336 USB2 port 9 enabled
1300 15:43:37.451899 USB3 port 0 enabled
1301 15:43:37.453928 USB3 port 1 disabled
1302 15:43:37.454386 USB3 port 2 disabled
1303 15:43:37.457608 USB3 port 3 disabled
1304 15:43:37.461589 USB2 port 0 scanning...
1305 15:43:37.464155 scan_static_bus for USB2 port 0
1306 15:43:37.467694 scan_static_bus for USB2 port 0 done
1307 15:43:37.471185 scan_bus: bus USB2 port 0 finished in 6 msecs
1308 15:43:37.474220 USB2 port 2 scanning...
1309 15:43:37.477475 scan_static_bus for USB2 port 2
1310 15:43:37.480458 scan_static_bus for USB2 port 2 done
1311 15:43:37.484384 scan_bus: bus USB2 port 2 finished in 6 msecs
1312 15:43:37.487531 USB2 port 5 scanning...
1313 15:43:37.491058 scan_static_bus for USB2 port 5
1314 15:43:37.494343 scan_static_bus for USB2 port 5 done
1315 15:43:37.500669 scan_bus: bus USB2 port 5 finished in 6 msecs
1316 15:43:37.501273 USB2 port 8 scanning...
1317 15:43:37.504153 scan_static_bus for USB2 port 8
1318 15:43:37.510635 scan_static_bus for USB2 port 8 done
1319 15:43:37.514347 scan_bus: bus USB2 port 8 finished in 6 msecs
1320 15:43:37.517405 USB2 port 9 scanning...
1321 15:43:37.520885 scan_static_bus for USB2 port 9
1322 15:43:37.523717 scan_static_bus for USB2 port 9 done
1323 15:43:37.527885 scan_bus: bus USB2 port 9 finished in 6 msecs
1324 15:43:37.530759 USB3 port 0 scanning...
1325 15:43:37.533709 scan_static_bus for USB3 port 0
1326 15:43:37.537413 scan_static_bus for USB3 port 0 done
1327 15:43:37.540589 scan_bus: bus USB3 port 0 finished in 6 msecs
1328 15:43:37.543809 scan_static_bus for USB0 port 0 done
1329 15:43:37.550620 scan_bus: bus USB0 port 0 finished in 120 msecs
1330 15:43:37.553857 scan_static_bus for PCI: 00:14.0 done
1331 15:43:37.557272 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1332 15:43:37.561048 PCI: 00:14.3 scanning...
1333 15:43:37.564173 scan_static_bus for PCI: 00:14.3
1334 15:43:37.567211 GENERIC: 0.0 enabled
1335 15:43:37.571007 scan_static_bus for PCI: 00:14.3 done
1336 15:43:37.573950 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1337 15:43:37.577127 PCI: 00:15.0 scanning...
1338 15:43:37.580621 scan_static_bus for PCI: 00:15.0
1339 15:43:37.583950 I2C: 00:1a enabled
1340 15:43:37.584480 I2C: 00:31 enabled
1341 15:43:37.587299 I2C: 00:32 enabled
1342 15:43:37.590475 scan_static_bus for PCI: 00:15.0 done
1343 15:43:37.597050 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1344 15:43:37.597611 PCI: 00:15.1 scanning...
1345 15:43:37.600348 scan_static_bus for PCI: 00:15.1
1346 15:43:37.603885 I2C: 00:50 enabled
1347 15:43:37.607509 scan_static_bus for PCI: 00:15.1 done
1348 15:43:37.610378 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1349 15:43:37.614084 PCI: 00:15.3 scanning...
1350 15:43:37.617252 scan_static_bus for PCI: 00:15.3
1351 15:43:37.620412 I2C: 00:10 enabled
1352 15:43:37.623761 scan_static_bus for PCI: 00:15.3 done
1353 15:43:37.627007 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1354 15:43:37.630511 PCI: 00:19.1 scanning...
1355 15:43:37.633874 scan_static_bus for PCI: 00:19.1
1356 15:43:37.636956 I2C: 00:15 enabled
1357 15:43:37.637525 I2C: 00:2c enabled
1358 15:43:37.640475 scan_static_bus for PCI: 00:19.1 done
1359 15:43:37.646846 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1360 15:43:37.650139 PCI: 00:1e.3 scanning...
1361 15:43:37.653391 scan_generic_bus for PCI: 00:1e.3
1362 15:43:37.653949 SPI: 00 enabled
1363 15:43:37.660084 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1364 15:43:37.666878 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1365 15:43:37.667494 PCI: 00:1f.0 scanning...
1366 15:43:37.670128 scan_static_bus for PCI: 00:1f.0
1367 15:43:37.673463 PNP: 0c09.0 enabled
1368 15:43:37.676815 PNP: 0c09.0 scanning...
1369 15:43:37.679900 scan_static_bus for PNP: 0c09.0
1370 15:43:37.683306 scan_static_bus for PNP: 0c09.0 done
1371 15:43:37.686615 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1372 15:43:37.689482 scan_static_bus for PCI: 00:1f.0 done
1373 15:43:37.696849 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1374 15:43:37.699679 PCI: 00:1f.2 scanning...
1375 15:43:37.703197 scan_static_bus for PCI: 00:1f.2
1376 15:43:37.703808 GENERIC: 0.0 enabled
1377 15:43:37.706371 GENERIC: 0.0 scanning...
1378 15:43:37.709919 scan_static_bus for GENERIC: 0.0
1379 15:43:37.712869 GENERIC: 0.0 enabled
1380 15:43:37.713434 GENERIC: 1.0 enabled
1381 15:43:37.716721 scan_static_bus for GENERIC: 0.0 done
1382 15:43:37.723411 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1383 15:43:37.726550 scan_static_bus for PCI: 00:1f.2 done
1384 15:43:37.729438 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1385 15:43:37.732770 PCI: 00:1f.3 scanning...
1386 15:43:37.736483 scan_static_bus for PCI: 00:1f.3
1387 15:43:37.739806 scan_static_bus for PCI: 00:1f.3 done
1388 15:43:37.746110 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1389 15:43:37.746677 PCI: 00:1f.5 scanning...
1390 15:43:37.752994 scan_generic_bus for PCI: 00:1f.5
1391 15:43:37.756207 scan_generic_bus for PCI: 00:1f.5 done
1392 15:43:37.759466 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1393 15:43:37.766458 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1394 15:43:37.769900 scan_static_bus for Root Device done
1395 15:43:37.772835 scan_bus: bus Root Device finished in 729 msecs
1396 15:43:37.773409 done
1397 15:43:37.779691 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1398 15:43:37.786483 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1399 15:43:37.793140 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1400 15:43:37.796418 SPI flash protection: WPSW=0 SRP0=0
1401 15:43:37.799816 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1402 15:43:37.806214 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1403 15:43:37.809928 found VGA at PCI: 00:02.0
1404 15:43:37.812761 Setting up VGA for PCI: 00:02.0
1405 15:43:37.816056 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1406 15:43:37.822759 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1407 15:43:37.826531 Allocating resources...
1408 15:43:37.827092 Reading resources...
1409 15:43:37.829539 Root Device read_resources bus 0 link: 0
1410 15:43:37.836080 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1411 15:43:37.839924 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1412 15:43:37.842506 DOMAIN: 0000 read_resources bus 0 link: 0
1413 15:43:37.849217 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1414 15:43:37.855973 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1415 15:43:37.862666 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1416 15:43:37.869623 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1417 15:43:37.875914 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1418 15:43:37.882633 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1419 15:43:37.889232 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1420 15:43:37.896015 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1421 15:43:37.899070 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1422 15:43:37.909063 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1423 15:43:37.916162 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1424 15:43:37.919528 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1425 15:43:37.925878 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1426 15:43:37.932548 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1427 15:43:37.939182 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1428 15:43:37.946213 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1429 15:43:37.952653 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1430 15:43:37.958836 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1431 15:43:37.965922 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1432 15:43:37.969169 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1433 15:43:37.976183 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1434 15:43:37.982513 PCI: 00:04.0 read_resources bus 1 link: 0
1435 15:43:37.985690 PCI: 00:04.0 read_resources bus 1 link: 0 done
1436 15:43:37.988942 PCI: 00:06.0 read_resources bus 1 link: 0
1437 15:43:37.995771 PCI: 00:06.0 read_resources bus 1 link: 0 done
1438 15:43:37.998891 PCI: 00:0d.0 read_resources bus 0 link: 0
1439 15:43:38.002220 USB0 port 0 read_resources bus 0 link: 0
1440 15:43:38.008986 USB0 port 0 read_resources bus 0 link: 0 done
1441 15:43:38.011973 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1442 15:43:38.015446 PCI: 00:14.0 read_resources bus 0 link: 0
1443 15:43:38.022068 USB0 port 0 read_resources bus 0 link: 0
1444 15:43:38.025283 USB0 port 0 read_resources bus 0 link: 0 done
1445 15:43:38.028892 PCI: 00:14.0 read_resources bus 0 link: 0 done
1446 15:43:38.035428 PCI: 00:14.3 read_resources bus 0 link: 0
1447 15:43:38.038686 PCI: 00:14.3 read_resources bus 0 link: 0 done
1448 15:43:38.042560 PCI: 00:15.0 read_resources bus 0 link: 0
1449 15:43:38.049074 PCI: 00:15.0 read_resources bus 0 link: 0 done
1450 15:43:38.052139 PCI: 00:15.1 read_resources bus 0 link: 0
1451 15:43:38.055844 PCI: 00:15.1 read_resources bus 0 link: 0 done
1452 15:43:38.062398 PCI: 00:15.3 read_resources bus 0 link: 0
1453 15:43:38.065552 PCI: 00:15.3 read_resources bus 0 link: 0 done
1454 15:43:38.068698 PCI: 00:19.1 read_resources bus 0 link: 0
1455 15:43:38.075139 PCI: 00:19.1 read_resources bus 0 link: 0 done
1456 15:43:38.078733 PCI: 00:1e.3 read_resources bus 2 link: 0
1457 15:43:38.085121 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1458 15:43:38.088583 PCI: 00:1f.0 read_resources bus 0 link: 0
1459 15:43:38.091886 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1460 15:43:38.098747 PCI: 00:1f.2 read_resources bus 0 link: 0
1461 15:43:38.101993 GENERIC: 0.0 read_resources bus 0 link: 0
1462 15:43:38.105728 GENERIC: 0.0 read_resources bus 0 link: 0 done
1463 15:43:38.111808 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1464 15:43:38.115329 DOMAIN: 0000 read_resources bus 0 link: 0 done
1465 15:43:38.121866 Root Device read_resources bus 0 link: 0 done
1466 15:43:38.122475 Done reading resources.
1467 15:43:38.128648 Show resources in subtree (Root Device)...After reading.
1468 15:43:38.131600 Root Device child on link 0 CPU_CLUSTER: 0
1469 15:43:38.138748 CPU_CLUSTER: 0 child on link 0 APIC: 00
1470 15:43:38.139362 APIC: 00
1471 15:43:38.139773 APIC: 16
1472 15:43:38.142068 APIC: 10
1473 15:43:38.142527 APIC: 12
1474 15:43:38.145655 APIC: 14
1475 15:43:38.146238 APIC: 01
1476 15:43:38.146604 APIC: 09
1477 15:43:38.148482 APIC: 08
1478 15:43:38.151897 DOMAIN: 0000 child on link 0 GPIO: 0
1479 15:43:38.162456 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1480 15:43:38.171770 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1481 15:43:38.172333 GPIO: 0
1482 15:43:38.172731 PCI: 00:00.0
1483 15:43:38.181873 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1484 15:43:38.192135 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1485 15:43:38.202031 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1486 15:43:38.212055 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1487 15:43:38.221706 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1488 15:43:38.228251 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1489 15:43:38.238358 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1490 15:43:38.248072 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1491 15:43:38.258349 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1492 15:43:38.268417 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1493 15:43:38.278144 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1494 15:43:38.288148 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1495 15:43:38.294706 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1496 15:43:38.304138 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1497 15:43:38.314240 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1498 15:43:38.324568 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1499 15:43:38.334430 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1500 15:43:38.344361 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1501 15:43:38.354168 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1502 15:43:38.364189 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1503 15:43:38.371172 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1504 15:43:38.380554 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1505 15:43:38.391101 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1506 15:43:38.401021 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1507 15:43:38.410674 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1508 15:43:38.421078 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1509 15:43:38.430785 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1510 15:43:38.437293 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1511 15:43:38.440657 PCI: 00:02.0
1512 15:43:38.450868 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1513 15:43:38.460367 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1514 15:43:38.470494 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1515 15:43:38.473875 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1516 15:43:38.483534 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1517 15:43:38.487330 GENERIC: 0.0
1518 15:43:38.490470 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1519 15:43:38.500239 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1520 15:43:38.510649 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1521 15:43:38.517669 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1522 15:43:38.520509 PCI: 01:00.0
1523 15:43:38.530751 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1524 15:43:38.540140 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1525 15:43:38.540659 PCI: 00:08.0
1526 15:43:38.543438 PCI: 00:0a.0
1527 15:43:38.553744 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1528 15:43:38.557032 PCI: 00:0d.0 child on link 0 USB0 port 0
1529 15:43:38.567279 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1530 15:43:38.571027 USB0 port 0 child on link 0 USB3 port 0
1531 15:43:38.574032 USB3 port 0
1532 15:43:38.577106 USB3 port 1
1533 15:43:38.577675 USB3 port 2
1534 15:43:38.580145 USB3 port 3
1535 15:43:38.584166 PCI: 00:14.0 child on link 0 USB0 port 0
1536 15:43:38.593734 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1537 15:43:38.597079 USB0 port 0 child on link 0 USB2 port 0
1538 15:43:38.600429 USB2 port 0
1539 15:43:38.600991 USB2 port 1
1540 15:43:38.603925 USB2 port 2
1541 15:43:38.604492 USB2 port 3
1542 15:43:38.606900 USB2 port 4
1543 15:43:38.607502 USB2 port 5
1544 15:43:38.609916 USB2 port 6
1545 15:43:38.610395 USB2 port 7
1546 15:43:38.613465 USB2 port 8
1547 15:43:38.616922 USB2 port 9
1548 15:43:38.617482 USB3 port 0
1549 15:43:38.620228 USB3 port 1
1550 15:43:38.620782 USB3 port 2
1551 15:43:38.623461 USB3 port 3
1552 15:43:38.623925 PCI: 00:14.2
1553 15:43:38.633483 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1554 15:43:38.643668 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1555 15:43:38.650695 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1556 15:43:38.660194 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1557 15:43:38.660776 GENERIC: 0.0
1558 15:43:38.663704 PCI: 00:15.0 child on link 0 I2C: 00:1a
1559 15:43:38.673597 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1560 15:43:38.676963 I2C: 00:1a
1561 15:43:38.677537 I2C: 00:31
1562 15:43:38.680070 I2C: 00:32
1563 15:43:38.683486 PCI: 00:15.1 child on link 0 I2C: 00:50
1564 15:43:38.693567 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1565 15:43:38.696691 I2C: 00:50
1566 15:43:38.697252 PCI: 00:15.2
1567 15:43:38.700076 PCI: 00:15.3 child on link 0 I2C: 00:10
1568 15:43:38.709962 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1569 15:43:38.713525 I2C: 00:10
1570 15:43:38.714089 PCI: 00:16.0
1571 15:43:38.723584 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1572 15:43:38.726370 PCI: 00:19.0
1573 15:43:38.730057 PCI: 00:19.1 child on link 0 I2C: 00:15
1574 15:43:38.739644 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1575 15:43:38.743289 I2C: 00:15
1576 15:43:38.743848 I2C: 00:2c
1577 15:43:38.746369 PCI: 00:1e.0
1578 15:43:38.756325 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1579 15:43:38.760197 PCI: 00:1e.3 child on link 0 SPI: 00
1580 15:43:38.769862 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1581 15:43:38.770426 SPI: 00
1582 15:43:38.776545 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1583 15:43:38.783142 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1584 15:43:38.786384 PNP: 0c09.0
1585 15:43:38.796325 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1586 15:43:38.800082 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1587 15:43:38.810164 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1588 15:43:38.816327 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1589 15:43:38.822898 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1590 15:43:38.823500 GENERIC: 0.0
1591 15:43:38.826096 GENERIC: 1.0
1592 15:43:38.826778 PCI: 00:1f.3
1593 15:43:38.836670 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1594 15:43:38.849555 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1595 15:43:38.850120 PCI: 00:1f.5
1596 15:43:38.859916 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1597 15:43:38.865902 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1598 15:43:38.872517 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1599 15:43:38.879462 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1600 15:43:38.882934 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1601 15:43:38.889130 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1602 15:43:38.892391 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1603 15:43:38.899400 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1604 15:43:38.905771 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1605 15:43:38.916197 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1606 15:43:38.922755 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1607 15:43:38.929317 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1608 15:43:38.935924 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1609 15:43:38.942672 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1610 15:43:38.949369 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1611 15:43:38.952483 DOMAIN: 0000: Resource ranges:
1612 15:43:38.959542 * Base: 1000, Size: 800, Tag: 100
1613 15:43:38.962917 * Base: 1900, Size: e700, Tag: 100
1614 15:43:38.965738 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1615 15:43:38.972444 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1616 15:43:38.978978 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1617 15:43:38.988725 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1618 15:43:38.995797 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1619 15:43:39.002014 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1620 15:43:39.012319 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1621 15:43:39.018756 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1622 15:43:39.025376 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1623 15:43:39.035911 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1624 15:43:39.042639 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1625 15:43:39.049007 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1626 15:43:39.056014 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1627 15:43:39.065783 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1628 15:43:39.072293 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1629 15:43:39.079188 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1630 15:43:39.089117 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1631 15:43:39.095392 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1632 15:43:39.101975 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1633 15:43:39.111892 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1634 15:43:39.119096 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1635 15:43:39.125405 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1636 15:43:39.135190 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1637 15:43:39.142306 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1638 15:43:39.148825 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1639 15:43:39.158812 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1640 15:43:39.165016 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1641 15:43:39.172215 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1642 15:43:39.182345 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1643 15:43:39.188354 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1644 15:43:39.195485 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1645 15:43:39.205171 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1646 15:43:39.211754 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1647 15:43:39.215290 DOMAIN: 0000: Resource ranges:
1648 15:43:39.218378 * Base: 80400000, Size: 3fc00000, Tag: 200
1649 15:43:39.224875 * Base: d0000000, Size: 28000000, Tag: 200
1650 15:43:39.228054 * Base: fa000000, Size: 1000000, Tag: 200
1651 15:43:39.231479 * Base: fb001000, Size: 17ff000, Tag: 200
1652 15:43:39.234969 * Base: fe800000, Size: 300000, Tag: 200
1653 15:43:39.241198 * Base: feb80000, Size: 80000, Tag: 200
1654 15:43:39.244766 * Base: fed00000, Size: 40000, Tag: 200
1655 15:43:39.247984 * Base: fed70000, Size: 10000, Tag: 200
1656 15:43:39.251275 * Base: fed88000, Size: 8000, Tag: 200
1657 15:43:39.258386 * Base: fed93000, Size: d000, Tag: 200
1658 15:43:39.261503 * Base: feda2000, Size: 1e000, Tag: 200
1659 15:43:39.264817 * Base: fede0000, Size: 1220000, Tag: 200
1660 15:43:39.271652 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1661 15:43:39.278012 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1662 15:43:39.284530 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1663 15:43:39.291698 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1664 15:43:39.298147 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1665 15:43:39.304912 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1666 15:43:39.311041 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1667 15:43:39.318223 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1668 15:43:39.324552 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1669 15:43:39.331004 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1670 15:43:39.337704 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1671 15:43:39.344824 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1672 15:43:39.350976 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1673 15:43:39.357624 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1674 15:43:39.364517 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1675 15:43:39.371119 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1676 15:43:39.377683 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1677 15:43:39.384246 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1678 15:43:39.391315 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1679 15:43:39.397725 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1680 15:43:39.404120 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1681 15:43:39.410662 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1682 15:43:39.414144 PCI: 00:06.0: Resource ranges:
1683 15:43:39.418030 * Base: 80400000, Size: 100000, Tag: 200
1684 15:43:39.424012 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1685 15:43:39.434065 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1686 15:43:39.440597 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1687 15:43:39.447097 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1688 15:43:39.453737 Root Device assign_resources, bus 0 link: 0
1689 15:43:39.457045 DOMAIN: 0000 assign_resources, bus 0 link: 0
1690 15:43:39.463536 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1691 15:43:39.473725 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1692 15:43:39.480303 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1693 15:43:39.490333 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1694 15:43:39.493349 PCI: 00:04.0 assign_resources, bus 1 link: 0
1695 15:43:39.500190 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1696 15:43:39.506430 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1697 15:43:39.517130 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1698 15:43:39.526467 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1699 15:43:39.529631 PCI: 00:06.0 assign_resources, bus 1 link: 0
1700 15:43:39.537011 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1701 15:43:39.546506 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1702 15:43:39.549713 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1703 15:43:39.560004 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1704 15:43:39.566593 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1705 15:43:39.569702 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1706 15:43:39.576163 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1707 15:43:39.582761 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1708 15:43:39.589848 PCI: 00:14.0 assign_resources, bus 0 link: 0
1709 15:43:39.592917 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1710 15:43:39.602963 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1711 15:43:39.609342 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1712 15:43:39.619891 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1713 15:43:39.623020 PCI: 00:14.3 assign_resources, bus 0 link: 0
1714 15:43:39.626359 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1715 15:43:39.635937 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1716 15:43:39.639270 PCI: 00:15.0 assign_resources, bus 0 link: 0
1717 15:43:39.646424 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1718 15:43:39.652975 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1719 15:43:39.655964 PCI: 00:15.1 assign_resources, bus 0 link: 0
1720 15:43:39.662792 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1721 15:43:39.669122 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1722 15:43:39.675773 PCI: 00:15.3 assign_resources, bus 0 link: 0
1723 15:43:39.679096 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1724 15:43:39.689113 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1725 15:43:39.695454 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1726 15:43:39.699108 PCI: 00:19.1 assign_resources, bus 0 link: 0
1727 15:43:39.705739 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1728 15:43:39.712635 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1729 15:43:39.718978 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1730 15:43:39.722210 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1731 15:43:39.728758 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1732 15:43:39.732197 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1733 15:43:39.735379 LPC: Trying to open IO window from 800 size 1ff
1734 15:43:39.745179 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1735 15:43:39.752223 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1736 15:43:39.761973 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1737 15:43:39.765427 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1738 15:43:39.772039 Root Device assign_resources, bus 0 link: 0 done
1739 15:43:39.772598 Done setting resources.
1740 15:43:39.778729 Show resources in subtree (Root Device)...After assigning values.
1741 15:43:39.785586 Root Device child on link 0 CPU_CLUSTER: 0
1742 15:43:39.788586 CPU_CLUSTER: 0 child on link 0 APIC: 00
1743 15:43:39.789149 APIC: 00
1744 15:43:39.791804 APIC: 16
1745 15:43:39.792266 APIC: 10
1746 15:43:39.792702 APIC: 12
1747 15:43:39.795188 APIC: 14
1748 15:43:39.795696 APIC: 01
1749 15:43:39.798962 APIC: 09
1750 15:43:39.799572 APIC: 08
1751 15:43:39.801882 DOMAIN: 0000 child on link 0 GPIO: 0
1752 15:43:39.811943 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1753 15:43:39.822390 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1754 15:43:39.822953 GPIO: 0
1755 15:43:39.824795 PCI: 00:00.0
1756 15:43:39.834846 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1757 15:43:39.841391 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1758 15:43:39.852032 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1759 15:43:39.861878 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1760 15:43:39.871697 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1761 15:43:39.881520 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1762 15:43:39.891568 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1763 15:43:39.898203 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1764 15:43:39.908159 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1765 15:43:39.918071 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1766 15:43:39.927877 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1767 15:43:39.937703 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1768 15:43:39.947614 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1769 15:43:39.957700 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1770 15:43:39.963983 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1771 15:43:39.974324 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1772 15:43:39.984293 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1773 15:43:39.993766 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1774 15:43:40.003862 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1775 15:43:40.013736 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1776 15:43:40.023948 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1777 15:43:40.033649 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1778 15:43:40.040627 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1779 15:43:40.050210 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1780 15:43:40.060113 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1781 15:43:40.069994 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1782 15:43:40.080160 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1783 15:43:40.089748 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1784 15:43:40.090211 PCI: 00:02.0
1785 15:43:40.103046 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1786 15:43:40.112886 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1787 15:43:40.123088 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1788 15:43:40.126368 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1789 15:43:40.136400 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1790 15:43:40.139774 GENERIC: 0.0
1791 15:43:40.142613 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1792 15:43:40.152651 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1793 15:43:40.162966 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1794 15:43:40.176042 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1795 15:43:40.176465 PCI: 01:00.0
1796 15:43:40.185834 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1797 15:43:40.195756 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1798 15:43:40.199211 PCI: 00:08.0
1799 15:43:40.199674 PCI: 00:0a.0
1800 15:43:40.209755 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1801 15:43:40.215821 PCI: 00:0d.0 child on link 0 USB0 port 0
1802 15:43:40.225904 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1803 15:43:40.229704 USB0 port 0 child on link 0 USB3 port 0
1804 15:43:40.232713 USB3 port 0
1805 15:43:40.233140 USB3 port 1
1806 15:43:40.235780 USB3 port 2
1807 15:43:40.236207 USB3 port 3
1808 15:43:40.242397 PCI: 00:14.0 child on link 0 USB0 port 0
1809 15:43:40.252637 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1810 15:43:40.255800 USB0 port 0 child on link 0 USB2 port 0
1811 15:43:40.258863 USB2 port 0
1812 15:43:40.259331 USB2 port 1
1813 15:43:40.262566 USB2 port 2
1814 15:43:40.262993 USB2 port 3
1815 15:43:40.265563 USB2 port 4
1816 15:43:40.265989 USB2 port 5
1817 15:43:40.268888 USB2 port 6
1818 15:43:40.269316 USB2 port 7
1819 15:43:40.272309 USB2 port 8
1820 15:43:40.272752 USB2 port 9
1821 15:43:40.275663 USB3 port 0
1822 15:43:40.276090 USB3 port 1
1823 15:43:40.279176 USB3 port 2
1824 15:43:40.282445 USB3 port 3
1825 15:43:40.282872 PCI: 00:14.2
1826 15:43:40.292536 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1827 15:43:40.302499 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1828 15:43:40.309206 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1829 15:43:40.318986 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1830 15:43:40.319537 GENERIC: 0.0
1831 15:43:40.325688 PCI: 00:15.0 child on link 0 I2C: 00:1a
1832 15:43:40.335680 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1833 15:43:40.336115 I2C: 00:1a
1834 15:43:40.339011 I2C: 00:31
1835 15:43:40.339549 I2C: 00:32
1836 15:43:40.342117 PCI: 00:15.1 child on link 0 I2C: 00:50
1837 15:43:40.355290 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1838 15:43:40.355726 I2C: 00:50
1839 15:43:40.359172 PCI: 00:15.2
1840 15:43:40.362198 PCI: 00:15.3 child on link 0 I2C: 00:10
1841 15:43:40.372012 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1842 15:43:40.372447 I2C: 00:10
1843 15:43:40.375310 PCI: 00:16.0
1844 15:43:40.385213 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1845 15:43:40.388492 PCI: 00:19.0
1846 15:43:40.391958 PCI: 00:19.1 child on link 0 I2C: 00:15
1847 15:43:40.401607 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1848 15:43:40.402038 I2C: 00:15
1849 15:43:40.405117 I2C: 00:2c
1850 15:43:40.405542 PCI: 00:1e.0
1851 15:43:40.418551 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1852 15:43:40.421726 PCI: 00:1e.3 child on link 0 SPI: 00
1853 15:43:40.431468 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1854 15:43:40.431901 SPI: 00
1855 15:43:40.438476 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1856 15:43:40.444928 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1857 15:43:40.448720 PNP: 0c09.0
1858 15:43:40.458112 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1859 15:43:40.461508 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1860 15:43:40.471519 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1861 15:43:40.478241 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1862 15:43:40.484909 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1863 15:43:40.485339 GENERIC: 0.0
1864 15:43:40.488220 GENERIC: 1.0
1865 15:43:40.488646 PCI: 00:1f.3
1866 15:43:40.501511 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1867 15:43:40.511558 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1868 15:43:40.511978 PCI: 00:1f.5
1869 15:43:40.521386 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1870 15:43:40.524485 Done allocating resources.
1871 15:43:40.531332 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1872 15:43:40.538266 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1873 15:43:40.541276 Configure audio over I2S with MAX98373 NAU88L25B.
1874 15:43:40.546139 Enabling BT offload
1875 15:43:40.553644 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1876 15:43:40.556992 Enabling resources...
1877 15:43:40.560259 PCI: 00:00.0 subsystem <- 8086/4609
1878 15:43:40.563644 PCI: 00:00.0 cmd <- 06
1879 15:43:40.567319 PCI: 00:02.0 subsystem <- 8086/46b3
1880 15:43:40.570120 PCI: 00:02.0 cmd <- 03
1881 15:43:40.573723 PCI: 00:04.0 subsystem <- 8086/461d
1882 15:43:40.574138 PCI: 00:04.0 cmd <- 02
1883 15:43:40.577093 PCI: 00:06.0 bridge ctrl <- 0013
1884 15:43:40.580131 PCI: 00:06.0 subsystem <- 8086/464d
1885 15:43:40.583314 PCI: 00:06.0 cmd <- 106
1886 15:43:40.586941 PCI: 00:0a.0 subsystem <- 8086/467d
1887 15:43:40.589996 PCI: 00:0a.0 cmd <- 02
1888 15:43:40.593777 PCI: 00:0d.0 subsystem <- 8086/461e
1889 15:43:40.596894 PCI: 00:0d.0 cmd <- 02
1890 15:43:40.600381 PCI: 00:14.0 subsystem <- 8086/51ed
1891 15:43:40.603100 PCI: 00:14.0 cmd <- 02
1892 15:43:40.606703 PCI: 00:14.2 subsystem <- 8086/51ef
1893 15:43:40.607117 PCI: 00:14.2 cmd <- 02
1894 15:43:40.613125 PCI: 00:14.3 subsystem <- 8086/51f0
1895 15:43:40.613538 PCI: 00:14.3 cmd <- 02
1896 15:43:40.616552 PCI: 00:15.0 subsystem <- 8086/51e8
1897 15:43:40.619952 PCI: 00:15.0 cmd <- 02
1898 15:43:40.623152 PCI: 00:15.1 subsystem <- 8086/51e9
1899 15:43:40.626557 PCI: 00:15.1 cmd <- 06
1900 15:43:40.629735 PCI: 00:15.3 subsystem <- 8086/51eb
1901 15:43:40.632970 PCI: 00:15.3 cmd <- 02
1902 15:43:40.636380 PCI: 00:16.0 subsystem <- 8086/51e0
1903 15:43:40.636818 PCI: 00:16.0 cmd <- 02
1904 15:43:40.643245 PCI: 00:19.1 subsystem <- 8086/51c6
1905 15:43:40.643668 PCI: 00:19.1 cmd <- 02
1906 15:43:40.646326 PCI: 00:1e.0 subsystem <- 8086/51a8
1907 15:43:40.649476 PCI: 00:1e.0 cmd <- 06
1908 15:43:40.652863 PCI: 00:1e.3 subsystem <- 8086/51ab
1909 15:43:40.656083 PCI: 00:1e.3 cmd <- 02
1910 15:43:40.659736 PCI: 00:1f.0 subsystem <- 8086/5182
1911 15:43:40.663081 PCI: 00:1f.0 cmd <- 407
1912 15:43:40.666630 PCI: 00:1f.3 subsystem <- 8086/51c8
1913 15:43:40.669711 PCI: 00:1f.3 cmd <- 02
1914 15:43:40.673185 PCI: 00:1f.5 subsystem <- 8086/51a4
1915 15:43:40.673647 PCI: 00:1f.5 cmd <- 406
1916 15:43:40.676127 PCI: 01:00.0 cmd <- 02
1917 15:43:40.676585 done.
1918 15:43:40.682825 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1919 15:43:40.686111 ME: Version: Unavailable
1920 15:43:40.689569 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1921 15:43:40.692747 Initializing devices...
1922 15:43:40.696092 Root Device init
1923 15:43:40.696506 mainboard: EC init
1924 15:43:40.702907 Chrome EC: Set SMI mask to 0x0000000000000000
1925 15:43:40.706058 Chrome EC: UHEPI supported
1926 15:43:40.709303 Chrome EC: clear events_b mask to 0x0000000000000000
1927 15:43:40.716115 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1928 15:43:40.723105 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1929 15:43:40.729697 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1930 15:43:40.735893 Chrome EC: Set WAKE mask to 0x0000000000000000
1931 15:43:40.739380 Root Device init finished in 41 msecs
1932 15:43:40.742633 PCI: 00:00.0 init
1933 15:43:40.746179 CPU TDP = 15 Watts
1934 15:43:40.746735 CPU PL1 = 15 Watts
1935 15:43:40.749362 CPU PL2 = 55 Watts
1936 15:43:40.752690 CPU PL4 = 123 Watts
1937 15:43:40.756272 PCI: 00:00.0 init finished in 8 msecs
1938 15:43:40.756832 PCI: 00:02.0 init
1939 15:43:40.759201 GMA: Found VBT in CBFS
1940 15:43:40.762439 GMA: Found valid VBT in CBFS
1941 15:43:40.769080 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1942 15:43:40.775785 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1943 15:43:40.779789 PCI: 00:02.0 init finished in 18 msecs
1944 15:43:40.782781 PCI: 00:06.0 init
1945 15:43:40.785918 Initializing PCH PCIe bridge.
1946 15:43:40.788941 PCI: 00:06.0 init finished in 3 msecs
1947 15:43:40.789462 PCI: 00:0a.0 init
1948 15:43:40.792552 PCI: 00:0a.0 init finished in 0 msecs
1949 15:43:40.795999 PCI: 00:14.0 init
1950 15:43:40.799087 PCI: 00:14.0 init finished in 0 msecs
1951 15:43:40.802270 PCI: 00:14.2 init
1952 15:43:40.806283 PCI: 00:14.2 init finished in 0 msecs
1953 15:43:40.806699 PCI: 00:15.0 init
1954 15:43:40.809360 I2C bus 0 version 0x3230302a
1955 15:43:40.812602 DW I2C bus 0 at 0x80655000 (400 KHz)
1956 15:43:40.819104 PCI: 00:15.0 init finished in 6 msecs
1957 15:43:40.819574 PCI: 00:15.1 init
1958 15:43:40.822355 I2C bus 1 version 0x3230302a
1959 15:43:40.825575 DW I2C bus 1 at 0x80656000 (400 KHz)
1960 15:43:40.829089 PCI: 00:15.1 init finished in 6 msecs
1961 15:43:40.832542 PCI: 00:15.3 init
1962 15:43:40.835749 I2C bus 3 version 0x3230302a
1963 15:43:40.839254 DW I2C bus 3 at 0x80657000 (400 KHz)
1964 15:43:40.842590 PCI: 00:15.3 init finished in 6 msecs
1965 15:43:40.845825 PCI: 00:16.0 init
1966 15:43:40.849343 PCI: 00:16.0 init finished in 0 msecs
1967 15:43:40.849759 PCI: 00:19.1 init
1968 15:43:40.852399 I2C bus 5 version 0x3230302a
1969 15:43:40.855938 DW I2C bus 5 at 0x80659000 (400 KHz)
1970 15:43:40.859339 PCI: 00:19.1 init finished in 6 msecs
1971 15:43:40.862264 PCI: 00:1f.0 init
1972 15:43:40.865953 IOAPIC: Initializing IOAPIC at 0xfec00000
1973 15:43:40.869440 IOAPIC: ID = 0x02
1974 15:43:40.872463 IOAPIC: Dumping registers
1975 15:43:40.872876 reg 0x0000: 0x02000000
1976 15:43:40.875915 reg 0x0001: 0x00770020
1977 15:43:40.879063 reg 0x0002: 0x00000000
1978 15:43:40.882230 IOAPIC: 120 interrupts
1979 15:43:40.885918 IOAPIC: Clearing IOAPIC at 0xfec00000
1980 15:43:40.888831 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1981 15:43:40.895915 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1982 15:43:40.899017 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1983 15:43:40.902636 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1984 15:43:40.908765 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1985 15:43:40.912215 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1986 15:43:40.919114 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1987 15:43:40.922061 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1988 15:43:40.929171 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1989 15:43:40.932400 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1990 15:43:40.938764 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1991 15:43:40.942340 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1992 15:43:40.945346 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1993 15:43:40.951995 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1994 15:43:40.955644 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1995 15:43:40.962181 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1996 15:43:40.965728 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1997 15:43:40.972395 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1998 15:43:40.975286 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1999 15:43:40.982000 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2000 15:43:40.985499 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2001 15:43:40.988693 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2002 15:43:40.995331 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2003 15:43:40.998952 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2004 15:43:41.005458 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2005 15:43:41.008871 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2006 15:43:41.015620 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2007 15:43:41.018721 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2008 15:43:41.022251 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2009 15:43:41.028800 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2010 15:43:41.032018 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2011 15:43:41.038574 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2012 15:43:41.042138 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2013 15:43:41.048681 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2014 15:43:41.052042 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2015 15:43:41.058401 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2016 15:43:41.062218 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2017 15:43:41.065377 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2018 15:43:41.072220 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2019 15:43:41.075107 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2020 15:43:41.081995 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2021 15:43:41.085696 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2022 15:43:41.091780 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2023 15:43:41.095152 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2024 15:43:41.101704 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2025 15:43:41.105150 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2026 15:43:41.108252 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2027 15:43:41.114946 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2028 15:43:41.118381 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2029 15:43:41.124996 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2030 15:43:41.128362 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2031 15:43:41.135298 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2032 15:43:41.138518 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2033 15:43:41.145406 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2034 15:43:41.148240 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2035 15:43:41.151775 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2036 15:43:41.158343 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2037 15:43:41.161530 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2038 15:43:41.168459 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2039 15:43:41.171640 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2040 15:43:41.178319 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2041 15:43:41.181836 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2042 15:43:41.184708 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2043 15:43:41.191546 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2044 15:43:41.194778 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2045 15:43:41.201574 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2046 15:43:41.205105 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2047 15:43:41.211650 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2048 15:43:41.214843 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2049 15:43:41.221524 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2050 15:43:41.225219 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2051 15:43:41.228168 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2052 15:43:41.234669 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2053 15:43:41.238004 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2054 15:43:41.244627 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2055 15:43:41.247851 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2056 15:43:41.254906 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2057 15:43:41.257898 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2058 15:43:41.264668 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2059 15:43:41.268192 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2060 15:43:41.271568 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2061 15:43:41.277963 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2062 15:43:41.281366 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2063 15:43:41.287855 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2064 15:43:41.291111 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2065 15:43:41.298052 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2066 15:43:41.301421 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2067 15:43:41.308082 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2068 15:43:41.311420 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2069 15:43:41.314333 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2070 15:43:41.320999 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2071 15:43:41.324420 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2072 15:43:41.331148 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2073 15:43:41.334503 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2074 15:43:41.341074 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2075 15:43:41.344646 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2076 15:43:41.347849 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2077 15:43:41.354784 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2078 15:43:41.357922 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2079 15:43:41.364376 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2080 15:43:41.367705 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2081 15:43:41.374130 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2082 15:43:41.377540 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2083 15:43:41.384387 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2084 15:43:41.387564 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2085 15:43:41.390702 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2086 15:43:41.397763 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2087 15:43:41.400960 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2088 15:43:41.407345 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2089 15:43:41.410801 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2090 15:43:41.417491 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2091 15:43:41.421032 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2092 15:43:41.427428 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2093 15:43:41.430838 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2094 15:43:41.434167 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2095 15:43:41.440647 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2096 15:43:41.444063 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2097 15:43:41.450700 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2098 15:43:41.453838 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2099 15:43:41.460834 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2100 15:43:41.464169 IOAPIC: Bootstrap Processor Local APIC = 0x00
2101 15:43:41.467790 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2102 15:43:41.474392 PCI: 00:1f.0 init finished in 607 msecs
2103 15:43:41.474822 PCI: 00:1f.2 init
2104 15:43:41.477604 apm_control: Disabling ACPI.
2105 15:43:41.482394 APMC done.
2106 15:43:41.485558 PCI: 00:1f.2 init finished in 6 msecs
2107 15:43:41.489096 PCI: 00:1f.3 init
2108 15:43:41.492362 PCI: 00:1f.3 init finished in 0 msecs
2109 15:43:41.492790 PCI: 01:00.0 init
2110 15:43:41.495573 PCI: 01:00.0 init finished in 0 msecs
2111 15:43:41.498907 PNP: 0c09.0 init
2112 15:43:41.502121 Google Chrome EC uptime: 12.076 seconds
2113 15:43:41.508676 Google Chrome AP resets since EC boot: 1
2114 15:43:41.511996 Google Chrome most recent AP reset causes:
2115 15:43:41.515313 0.342: 32775 shutdown: entering G3
2116 15:43:41.521871 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2117 15:43:41.525492 PNP: 0c09.0 init finished in 23 msecs
2118 15:43:41.528777 GENERIC: 0.0 init
2119 15:43:41.532044 GENERIC: 0.0 init finished in 0 msecs
2120 15:43:41.532475 GENERIC: 1.0 init
2121 15:43:41.538523 GENERIC: 1.0 init finished in 0 msecs
2122 15:43:41.538948 Devices initialized
2123 15:43:41.542007 Show all devs... After init.
2124 15:43:41.545430 Root Device: enabled 1
2125 15:43:41.548482 CPU_CLUSTER: 0: enabled 1
2126 15:43:41.548909 DOMAIN: 0000: enabled 1
2127 15:43:41.552065 GPIO: 0: enabled 1
2128 15:43:41.555199 PCI: 00:00.0: enabled 1
2129 15:43:41.555656 PCI: 00:01.0: enabled 0
2130 15:43:41.558609 PCI: 00:01.1: enabled 0
2131 15:43:41.561941 PCI: 00:02.0: enabled 1
2132 15:43:41.565427 PCI: 00:04.0: enabled 1
2133 15:43:41.565839 PCI: 00:05.0: enabled 0
2134 15:43:41.568823 PCI: 00:06.0: enabled 1
2135 15:43:41.572061 PCI: 00:06.2: enabled 0
2136 15:43:41.572477 PCI: 00:07.0: enabled 0
2137 15:43:41.575033 PCI: 00:07.1: enabled 0
2138 15:43:41.578428 PCI: 00:07.2: enabled 0
2139 15:43:41.581755 PCI: 00:07.3: enabled 0
2140 15:43:41.582218 PCI: 00:08.0: enabled 0
2141 15:43:41.585220 PCI: 00:09.0: enabled 0
2142 15:43:41.588570 PCI: 00:0a.0: enabled 1
2143 15:43:41.591752 PCI: 00:0d.0: enabled 1
2144 15:43:41.592173 PCI: 00:0d.1: enabled 0
2145 15:43:41.595183 PCI: 00:0d.2: enabled 0
2146 15:43:41.598832 PCI: 00:0d.3: enabled 0
2147 15:43:41.601604 PCI: 00:0e.0: enabled 0
2148 15:43:41.602021 PCI: 00:10.0: enabled 0
2149 15:43:41.605123 PCI: 00:10.1: enabled 0
2150 15:43:41.608281 PCI: 00:10.6: enabled 0
2151 15:43:41.611579 PCI: 00:10.7: enabled 0
2152 15:43:41.612073 PCI: 00:12.0: enabled 0
2153 15:43:41.615135 PCI: 00:12.6: enabled 0
2154 15:43:41.618631 PCI: 00:12.7: enabled 0
2155 15:43:41.619049 PCI: 00:13.0: enabled 0
2156 15:43:41.621909 PCI: 00:14.0: enabled 1
2157 15:43:41.624941 PCI: 00:14.1: enabled 0
2158 15:43:41.628118 PCI: 00:14.2: enabled 1
2159 15:43:41.628536 PCI: 00:14.3: enabled 1
2160 15:43:41.631569 PCI: 00:15.0: enabled 1
2161 15:43:41.634905 PCI: 00:15.1: enabled 1
2162 15:43:41.638117 PCI: 00:15.2: enabled 0
2163 15:43:41.638533 PCI: 00:15.3: enabled 1
2164 15:43:41.641674 PCI: 00:16.0: enabled 1
2165 15:43:41.644764 PCI: 00:16.1: enabled 0
2166 15:43:41.648236 PCI: 00:16.2: enabled 0
2167 15:43:41.648652 PCI: 00:16.3: enabled 0
2168 15:43:41.652041 PCI: 00:16.4: enabled 0
2169 15:43:41.654773 PCI: 00:16.5: enabled 0
2170 15:43:41.658166 PCI: 00:17.0: enabled 0
2171 15:43:41.658584 PCI: 00:19.0: enabled 0
2172 15:43:41.661522 PCI: 00:19.1: enabled 1
2173 15:43:41.664918 PCI: 00:19.2: enabled 0
2174 15:43:41.665337 PCI: 00:1a.0: enabled 0
2175 15:43:41.667772 PCI: 00:1c.0: enabled 0
2176 15:43:41.671359 PCI: 00:1c.1: enabled 0
2177 15:43:41.674706 PCI: 00:1c.2: enabled 0
2178 15:43:41.675125 PCI: 00:1c.3: enabled 0
2179 15:43:41.677752 PCI: 00:1c.4: enabled 0
2180 15:43:41.681403 PCI: 00:1c.5: enabled 0
2181 15:43:41.684295 PCI: 00:1c.6: enabled 0
2182 15:43:41.684711 PCI: 00:1c.7: enabled 0
2183 15:43:41.687947 PCI: 00:1d.0: enabled 0
2184 15:43:41.691305 PCI: 00:1d.1: enabled 0
2185 15:43:41.694464 PCI: 00:1d.2: enabled 0
2186 15:43:41.694913 PCI: 00:1d.3: enabled 0
2187 15:43:41.697763 PCI: 00:1e.0: enabled 1
2188 15:43:41.701125 PCI: 00:1e.1: enabled 0
2189 15:43:41.704466 PCI: 00:1e.2: enabled 0
2190 15:43:41.704926 PCI: 00:1e.3: enabled 1
2191 15:43:41.707764 PCI: 00:1f.0: enabled 1
2192 15:43:41.710935 PCI: 00:1f.1: enabled 0
2193 15:43:41.714236 PCI: 00:1f.2: enabled 1
2194 15:43:41.714651 PCI: 00:1f.3: enabled 1
2195 15:43:41.717572 PCI: 00:1f.4: enabled 0
2196 15:43:41.721193 PCI: 00:1f.5: enabled 1
2197 15:43:41.721611 PCI: 00:1f.6: enabled 0
2198 15:43:41.724332 PCI: 00:1f.7: enabled 0
2199 15:43:41.727775 GENERIC: 0.0: enabled 1
2200 15:43:41.731204 GENERIC: 0.0: enabled 1
2201 15:43:41.731663 GENERIC: 1.0: enabled 1
2202 15:43:41.734438 GENERIC: 0.0: enabled 1
2203 15:43:41.737734 GENERIC: 1.0: enabled 1
2204 15:43:41.741104 USB0 port 0: enabled 1
2205 15:43:41.741523 USB0 port 0: enabled 1
2206 15:43:41.744407 GENERIC: 0.0: enabled 1
2207 15:43:41.747803 I2C: 00:1a: enabled 1
2208 15:43:41.748223 I2C: 00:31: enabled 1
2209 15:43:41.750785 I2C: 00:32: enabled 1
2210 15:43:41.754062 I2C: 00:50: enabled 1
2211 15:43:41.754476 I2C: 00:10: enabled 1
2212 15:43:41.757591 I2C: 00:15: enabled 1
2213 15:43:41.761062 I2C: 00:2c: enabled 1
2214 15:43:41.761479 GENERIC: 0.0: enabled 1
2215 15:43:41.764159 SPI: 00: enabled 1
2216 15:43:41.767651 PNP: 0c09.0: enabled 1
2217 15:43:41.771081 GENERIC: 0.0: enabled 1
2218 15:43:41.771538 USB3 port 0: enabled 1
2219 15:43:41.774491 USB3 port 1: enabled 0
2220 15:43:41.777594 USB3 port 2: enabled 1
2221 15:43:41.778011 USB3 port 3: enabled 0
2222 15:43:41.780829 USB2 port 0: enabled 1
2223 15:43:41.783994 USB2 port 1: enabled 0
2224 15:43:41.784409 USB2 port 2: enabled 1
2225 15:43:41.787591 USB2 port 3: enabled 0
2226 15:43:41.790776 USB2 port 4: enabled 0
2227 15:43:41.794361 USB2 port 5: enabled 1
2228 15:43:41.794776 USB2 port 6: enabled 0
2229 15:43:41.797685 USB2 port 7: enabled 0
2230 15:43:41.800619 USB2 port 8: enabled 1
2231 15:43:41.801036 USB2 port 9: enabled 1
2232 15:43:41.804235 USB3 port 0: enabled 1
2233 15:43:41.807566 USB3 port 1: enabled 0
2234 15:43:41.810710 USB3 port 2: enabled 0
2235 15:43:41.811129 USB3 port 3: enabled 0
2236 15:43:41.814206 GENERIC: 0.0: enabled 1
2237 15:43:41.817491 GENERIC: 1.0: enabled 1
2238 15:43:41.817911 APIC: 00: enabled 1
2239 15:43:41.820676 APIC: 16: enabled 1
2240 15:43:41.823902 APIC: 10: enabled 1
2241 15:43:41.824320 APIC: 12: enabled 1
2242 15:43:41.827332 APIC: 14: enabled 1
2243 15:43:41.827774 APIC: 01: enabled 1
2244 15:43:41.830613 APIC: 09: enabled 1
2245 15:43:41.834045 APIC: 08: enabled 1
2246 15:43:41.834515 PCI: 01:00.0: enabled 1
2247 15:43:41.840592 BS: BS_DEV_INIT run times (exec / console): 11 / 1133 ms
2248 15:43:41.847172 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2249 15:43:41.850683 ELOG: NV offset 0xf20000 size 0x4000
2250 15:43:41.857287 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2251 15:43:41.864131 ELOG: Event(17) added with size 13 at 2023-08-07 15:44:02 UTC
2252 15:43:41.870712 ELOG: Event(9E) added with size 10 at 2023-08-07 15:44:02 UTC
2253 15:43:41.877035 ELOG: Event(9F) added with size 14 at 2023-08-07 15:44:02 UTC
2254 15:43:41.883917 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2255 15:43:41.890968 ELOG: Event(A0) added with size 9 at 2023-08-07 15:44:02 UTC
2256 15:43:41.893793 elog_add_boot_reason: Logged dev mode boot
2257 15:43:41.900549 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2258 15:43:41.901206 Finalize devices...
2259 15:43:41.904136 PCI: 00:16.0 final
2260 15:43:41.904640 PCI: 00:1f.2 final
2261 15:43:41.907330 GENERIC: 0.0 final
2262 15:43:41.914298 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2263 15:43:41.914753 GENERIC: 1.0 final
2264 15:43:41.920320 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2265 15:43:41.923812 Devices finalized
2266 15:43:41.926838 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2267 15:43:41.934162 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2268 15:43:41.941009 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2269 15:43:41.944699 ME: HFSTS1 : 0x90000245
2270 15:43:41.947480 ME: HFSTS2 : 0x82100116
2271 15:43:41.954193 ME: HFSTS3 : 0x00000050
2272 15:43:41.957329 ME: HFSTS4 : 0x00004000
2273 15:43:41.961160 ME: HFSTS5 : 0x00000000
2274 15:43:41.967614 ME: HFSTS6 : 0x40600006
2275 15:43:41.971027 ME: Manufacturing Mode : NO
2276 15:43:41.974390 ME: SPI Protection Mode Enabled : YES
2277 15:43:41.977510 ME: FPFs Committed : YES
2278 15:43:41.980786 ME: Manufacturing Vars Locked : YES
2279 15:43:41.983928 ME: FW Partition Table : OK
2280 15:43:41.990570 ME: Bringup Loader Failure : NO
2281 15:43:41.994086 ME: Firmware Init Complete : YES
2282 15:43:41.997061 ME: Boot Options Present : NO
2283 15:43:42.000701 ME: Update In Progress : NO
2284 15:43:42.004183 ME: D0i3 Support : YES
2285 15:43:42.007010 ME: Low Power State Enabled : NO
2286 15:43:42.010367 ME: CPU Replaced : YES
2287 15:43:42.016977 ME: CPU Replacement Valid : YES
2288 15:43:42.020509 ME: Current Working State : 5
2289 15:43:42.024037 ME: Current Operation State : 1
2290 15:43:42.026955 ME: Current Operation Mode : 0
2291 15:43:42.030444 ME: Error Code : 0
2292 15:43:42.034243 ME: Enhanced Debug Mode : NO
2293 15:43:42.037064 ME: CPU Debug Disabled : YES
2294 15:43:42.040243 ME: TXT Support : NO
2295 15:43:42.043873 ME: WP for RO is enabled : YES
2296 15:43:42.050386 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2297 15:43:42.057050 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2298 15:43:42.060391 Ramoops buffer: 0x100000@0x76899000.
2299 15:43:42.066773 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2300 15:43:42.073450 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2301 15:43:42.076930 CBFS: 'fallback/slic' not found.
2302 15:43:42.080211 ACPI: Writing ACPI tables at 7686d000.
2303 15:43:42.083460 ACPI: * FACS
2304 15:43:42.083896 ACPI: * DSDT
2305 15:43:42.089837 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2306 15:43:42.095354 ACPI: * FADT
2307 15:43:42.095781 SCI is IRQ9
2308 15:43:42.101892 ACPI: added table 1/32, length now 40
2309 15:43:42.102313 ACPI: * SSDT
2310 15:43:42.108443 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2311 15:43:42.111916 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2312 15:43:42.118249 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2313 15:43:42.121592 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2314 15:43:42.128299 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2315 15:43:42.131541 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2316 15:43:42.138516 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2317 15:43:42.145626 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2318 15:43:42.148480 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2319 15:43:42.155161 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2320 15:43:42.158604 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2321 15:43:42.165065 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2322 15:43:42.168108 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2323 15:43:42.175006 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2324 15:43:42.182107 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2325 15:43:42.185471 PS2K: Passing 80 keymaps to kernel
2326 15:43:42.191916 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2327 15:43:42.198349 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2328 15:43:42.204995 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2329 15:43:42.211584 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2330 15:43:42.218327 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2331 15:43:42.225311 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2332 15:43:42.228545 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2333 15:43:42.234781 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2334 15:43:42.241788 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2335 15:43:42.248712 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2336 15:43:42.252611 ACPI: added table 2/32, length now 44
2337 15:43:42.255783 ACPI: * MCFG
2338 15:43:42.259284 ACPI: added table 3/32, length now 48
2339 15:43:42.259752 ACPI: * TPM2
2340 15:43:42.262780 TPM2 log created at 0x7685d000
2341 15:43:42.265768 ACPI: added table 4/32, length now 52
2342 15:43:42.269139 ACPI: * LPIT
2343 15:43:42.272163 ACPI: added table 5/32, length now 56
2344 15:43:42.272633 ACPI: * MADT
2345 15:43:42.275532 SCI is IRQ9
2346 15:43:42.279072 ACPI: added table 6/32, length now 60
2347 15:43:42.282228 cmd_reg from pmc_make_ipc_cmd 1052838
2348 15:43:42.288941 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2349 15:43:42.295822 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2350 15:43:42.302619 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2351 15:43:42.305352 PMC CrashLog size in discovery mode: 0xC00
2352 15:43:42.308557 cpu crashlog bar addr: 0x80640000
2353 15:43:42.312122 cpu discovery table offset: 0x6030
2354 15:43:42.315469 cpu_crashlog_discovery_table buffer count: 0x3
2355 15:43:42.322133 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2356 15:43:42.328758 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2357 15:43:42.335371 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2358 15:43:42.342033 PMC crashLog size in discovery mode : 0xC00
2359 15:43:42.348600 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2360 15:43:42.351853 discover mode PMC crashlog size adjusted to: 0x200
2361 15:43:42.358569 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2362 15:43:42.365423 discover mode PMC crashlog size adjusted to: 0x0
2363 15:43:42.368153 m_cpu_crashLog_size : 0x3480 bytes
2364 15:43:42.372038 CPU crashLog present.
2365 15:43:42.374824 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2366 15:43:42.381917 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2367 15:43:42.385405 current = 76876550
2368 15:43:42.385968 ACPI: * DMAR
2369 15:43:42.392024 ACPI: added table 7/32, length now 64
2370 15:43:42.395375 ACPI: added table 8/32, length now 68
2371 15:43:42.395847 ACPI: * HPET
2372 15:43:42.398578 ACPI: added table 9/32, length now 72
2373 15:43:42.402015 ACPI: done.
2374 15:43:42.405320 ACPI tables: 38528 bytes.
2375 15:43:42.405880 smbios_write_tables: 76857000
2376 15:43:42.409547 EC returned error result code 3
2377 15:43:42.415962 Couldn't obtain OEM name from CBI
2378 15:43:42.416427 Create SMBIOS type 16
2379 15:43:42.419755 Create SMBIOS type 17
2380 15:43:42.423289 Create SMBIOS type 20
2381 15:43:42.424025 GENERIC: 0.0 (WIFI Device)
2382 15:43:42.426440 SMBIOS tables: 2156 bytes.
2383 15:43:42.429137 Writing table forward entry at 0x00000500
2384 15:43:42.436394 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2385 15:43:42.439198 Writing coreboot table at 0x76891000
2386 15:43:42.446238 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2387 15:43:42.452907 1. 0000000000001000-000000000009ffff: RAM
2388 15:43:42.455983 2. 00000000000a0000-00000000000fffff: RESERVED
2389 15:43:42.459036 3. 0000000000100000-0000000076856fff: RAM
2390 15:43:42.466038 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2391 15:43:42.472684 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2392 15:43:42.475727 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2393 15:43:42.482871 7. 0000000077000000-00000000803fffff: RESERVED
2394 15:43:42.486016 8. 00000000c0000000-00000000cfffffff: RESERVED
2395 15:43:42.492596 9. 00000000f8000000-00000000f9ffffff: RESERVED
2396 15:43:42.496093 10. 00000000fb000000-00000000fb000fff: RESERVED
2397 15:43:42.502573 11. 00000000fc800000-00000000fe7fffff: RESERVED
2398 15:43:42.505844 12. 00000000feb00000-00000000feb7ffff: RESERVED
2399 15:43:42.509174 13. 00000000fec00000-00000000fecfffff: RESERVED
2400 15:43:42.515929 14. 00000000fed40000-00000000fed6ffff: RESERVED
2401 15:43:42.519376 15. 00000000fed80000-00000000fed87fff: RESERVED
2402 15:43:42.525762 16. 00000000fed90000-00000000fed92fff: RESERVED
2403 15:43:42.529297 17. 00000000feda0000-00000000feda1fff: RESERVED
2404 15:43:42.535967 18. 00000000fedc0000-00000000feddffff: RESERVED
2405 15:43:42.538656 19. 0000000100000000-000000027fbfffff: RAM
2406 15:43:42.542356 Passing 4 GPIOs to payload:
2407 15:43:42.545681 NAME | PORT | POLARITY | VALUE
2408 15:43:42.552452 lid | undefined | high | high
2409 15:43:42.558858 power | undefined | high | low
2410 15:43:42.562181 oprom | undefined | high | low
2411 15:43:42.568786 EC in RW | 0x00000151 | high | high
2412 15:43:42.569337 Board ID: 3
2413 15:43:42.572175 FW config: 0x131
2414 15:43:42.579038 Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum 9a2e
2415 15:43:42.579637 coreboot table: 1748 bytes.
2416 15:43:42.586081 IMD ROOT 0. 0x76fff000 0x00001000
2417 15:43:42.588964 IMD SMALL 1. 0x76ffe000 0x00001000
2418 15:43:42.592394 FSP MEMORY 2. 0x76afe000 0x00500000
2419 15:43:42.595630 CONSOLE 3. 0x76ade000 0x00020000
2420 15:43:42.598660 RW MCACHE 4. 0x76add000 0x0000043c
2421 15:43:42.602056 RO MCACHE 5. 0x76adc000 0x00000fd8
2422 15:43:42.605488 FMAP 6. 0x76adb000 0x0000064a
2423 15:43:42.608858 TIME STAMP 7. 0x76ada000 0x00000910
2424 15:43:42.612187 VBOOT WORK 8. 0x76ac6000 0x00014000
2425 15:43:42.619109 MEM INFO 9. 0x76ac5000 0x000003b8
2426 15:43:42.621778 ROMSTG STCK10. 0x76ac4000 0x00001000
2427 15:43:42.625800 AFTER CAR 11. 0x76ab8000 0x0000c000
2428 15:43:42.628456 RAMSTAGE 12. 0x76a2e000 0x0008a000
2429 15:43:42.632007 ACPI BERT 13. 0x76a1e000 0x00010000
2430 15:43:42.635433 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2431 15:43:42.638796 REFCODE 15. 0x769ae000 0x0006f000
2432 15:43:42.641981 SMM BACKUP 16. 0x7699e000 0x00010000
2433 15:43:42.648728 IGD OPREGION17. 0x76999000 0x00004203
2434 15:43:42.651999 RAMOOPS 18. 0x76899000 0x00100000
2435 15:43:42.655344 COREBOOT 19. 0x76891000 0x00008000
2436 15:43:42.658529 ACPI 20. 0x7686d000 0x00024000
2437 15:43:42.662201 TPM2 TCGLOG21. 0x7685d000 0x00010000
2438 15:43:42.665245 PMC CRASHLOG22. 0x7685c000 0x00000c00
2439 15:43:42.668602 CPU CRASHLOG23. 0x76858000 0x00003480
2440 15:43:42.675423 SMBIOS 24. 0x76857000 0x00001000
2441 15:43:42.675984 IMD small region:
2442 15:43:42.678666 IMD ROOT 0. 0x76ffec00 0x00000400
2443 15:43:42.681763 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2444 15:43:42.688703 POWER STATE 2. 0x76ffeb80 0x00000044
2445 15:43:42.691631 ROMSTAGE 3. 0x76ffeb60 0x00000004
2446 15:43:42.695594 ACPI GNVS 4. 0x76ffeb00 0x00000048
2447 15:43:42.698677 TYPE_C INFO 5. 0x76ffeae0 0x0000000c
2448 15:43:42.705397 BS: BS_WRITE_TABLES run times (exec / console): 8 / 624 ms
2449 15:43:42.708494 MTRR: Physical address space:
2450 15:43:42.715055 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2451 15:43:42.722036 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2452 15:43:42.728914 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2453 15:43:42.731586 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2454 15:43:42.738098 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2455 15:43:42.745266 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2456 15:43:42.751684 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2457 15:43:42.755383 MTRR: Fixed MSR 0x250 0x0606060606060606
2458 15:43:42.761820 MTRR: Fixed MSR 0x258 0x0606060606060606
2459 15:43:42.765154 MTRR: Fixed MSR 0x259 0x0000000000000000
2460 15:43:42.768707 MTRR: Fixed MSR 0x268 0x0606060606060606
2461 15:43:42.771992 MTRR: Fixed MSR 0x269 0x0606060606060606
2462 15:43:42.775357 MTRR: Fixed MSR 0x26a 0x0606060606060606
2463 15:43:42.781620 MTRR: Fixed MSR 0x26b 0x0606060606060606
2464 15:43:42.784644 MTRR: Fixed MSR 0x26c 0x0606060606060606
2465 15:43:42.788139 MTRR: Fixed MSR 0x26d 0x0606060606060606
2466 15:43:42.791396 MTRR: Fixed MSR 0x26e 0x0606060606060606
2467 15:43:42.798239 MTRR: Fixed MSR 0x26f 0x0606060606060606
2468 15:43:42.801557 call enable_fixed_mtrr()
2469 15:43:42.804973 CPU physical address size: 39 bits
2470 15:43:42.808082 MTRR: default type WB/UC MTRR counts: 6/6.
2471 15:43:42.811690 MTRR: UC selected as default type.
2472 15:43:42.818595 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2473 15:43:42.824874 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2474 15:43:42.831362 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2475 15:43:42.837716 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2476 15:43:42.844448 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2477 15:43:42.851262 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2478 15:43:42.854544 MTRR: Fixed MSR 0x250 0x0606060606060606
2479 15:43:42.861061 MTRR: Fixed MSR 0x258 0x0606060606060606
2480 15:43:42.864410 MTRR: Fixed MSR 0x259 0x0000000000000000
2481 15:43:42.867635 MTRR: Fixed MSR 0x268 0x0606060606060606
2482 15:43:42.871298 MTRR: Fixed MSR 0x269 0x0606060606060606
2483 15:43:42.874149 MTRR: Fixed MSR 0x26a 0x0606060606060606
2484 15:43:42.880653 MTRR: Fixed MSR 0x26b 0x0606060606060606
2485 15:43:42.884106 MTRR: Fixed MSR 0x26c 0x0606060606060606
2486 15:43:42.887474 MTRR: Fixed MSR 0x26d 0x0606060606060606
2487 15:43:42.891104 MTRR: Fixed MSR 0x26e 0x0606060606060606
2488 15:43:42.897539 MTRR: Fixed MSR 0x26f 0x0606060606060606
2489 15:43:42.901072 MTRR: Fixed MSR 0x250 0x0606060606060606
2490 15:43:42.903890 MTRR: Fixed MSR 0x250 0x0606060606060606
2491 15:43:42.907700 MTRR: Fixed MSR 0x250 0x0606060606060606
2492 15:43:42.913973 MTRR: Fixed MSR 0x250 0x0606060606060606
2493 15:43:42.917767 MTRR: Fixed MSR 0x250 0x0606060606060606
2494 15:43:42.920587 MTRR: Fixed MSR 0x258 0x0606060606060606
2495 15:43:42.923794 MTRR: Fixed MSR 0x259 0x0000000000000000
2496 15:43:42.930552 MTRR: Fixed MSR 0x268 0x0606060606060606
2497 15:43:42.933737 MTRR: Fixed MSR 0x269 0x0606060606060606
2498 15:43:42.937498 MTRR: Fixed MSR 0x26a 0x0606060606060606
2499 15:43:42.940536 MTRR: Fixed MSR 0x26b 0x0606060606060606
2500 15:43:42.943401 MTRR: Fixed MSR 0x26c 0x0606060606060606
2501 15:43:42.950635 MTRR: Fixed MSR 0x26d 0x0606060606060606
2502 15:43:42.953877 MTRR: Fixed MSR 0x26e 0x0606060606060606
2503 15:43:42.956849 MTRR: Fixed MSR 0x26f 0x0606060606060606
2504 15:43:42.960067 MTRR: Fixed MSR 0x258 0x0606060606060606
2505 15:43:42.963339 call enable_fixed_mtrr()
2506 15:43:42.966918 MTRR: Fixed MSR 0x250 0x0606060606060606
2507 15:43:42.973488 MTRR: Fixed MSR 0x258 0x0606060606060606
2508 15:43:42.977022 MTRR: Fixed MSR 0x259 0x0000000000000000
2509 15:43:42.980010 MTRR: Fixed MSR 0x268 0x0606060606060606
2510 15:43:42.983747 MTRR: Fixed MSR 0x269 0x0606060606060606
2511 15:43:42.986907 CPU physical address size: 39 bits
2512 15:43:42.993724 MTRR: Fixed MSR 0x26a 0x0606060606060606
2513 15:43:42.996601 MTRR: Fixed MSR 0x258 0x0606060606060606
2514 15:43:43.000421 MTRR: Fixed MSR 0x26b 0x0606060606060606
2515 15:43:43.003507 MTRR: Fixed MSR 0x26c 0x0606060606060606
2516 15:43:43.010501 MTRR: Fixed MSR 0x26d 0x0606060606060606
2517 15:43:43.013393 MTRR: Fixed MSR 0x26e 0x0606060606060606
2518 15:43:43.016793 MTRR: Fixed MSR 0x26f 0x0606060606060606
2519 15:43:43.020759 MTRR: Fixed MSR 0x259 0x0000000000000000
2520 15:43:43.027131 MTRR: Fixed MSR 0x258 0x0606060606060606
2521 15:43:43.030287 MTRR: Fixed MSR 0x259 0x0000000000000000
2522 15:43:43.033677 MTRR: Fixed MSR 0x259 0x0000000000000000
2523 15:43:43.037173 MTRR: Fixed MSR 0x268 0x0606060606060606
2524 15:43:43.040010 MTRR: Fixed MSR 0x269 0x0606060606060606
2525 15:43:43.046899 MTRR: Fixed MSR 0x26a 0x0606060606060606
2526 15:43:43.049967 MTRR: Fixed MSR 0x26b 0x0606060606060606
2527 15:43:43.053264 MTRR: Fixed MSR 0x26c 0x0606060606060606
2528 15:43:43.056577 MTRR: Fixed MSR 0x26d 0x0606060606060606
2529 15:43:43.063444 MTRR: Fixed MSR 0x26e 0x0606060606060606
2530 15:43:43.066798 MTRR: Fixed MSR 0x26f 0x0606060606060606
2531 15:43:43.070148 MTRR: Fixed MSR 0x268 0x0606060606060606
2532 15:43:43.073468 call enable_fixed_mtrr()
2533 15:43:43.076479 MTRR: Fixed MSR 0x269 0x0606060606060606
2534 15:43:43.079839 call enable_fixed_mtrr()
2535 15:43:43.083192 MTRR: Fixed MSR 0x268 0x0606060606060606
2536 15:43:43.086425 MTRR: Fixed MSR 0x269 0x0606060606060606
2537 15:43:43.092851 MTRR: Fixed MSR 0x26a 0x0606060606060606
2538 15:43:43.096772 MTRR: Fixed MSR 0x26b 0x0606060606060606
2539 15:43:43.099744 MTRR: Fixed MSR 0x26c 0x0606060606060606
2540 15:43:43.103133 MTRR: Fixed MSR 0x26d 0x0606060606060606
2541 15:43:43.109903 MTRR: Fixed MSR 0x26e 0x0606060606060606
2542 15:43:43.113029 MTRR: Fixed MSR 0x26f 0x0606060606060606
2543 15:43:43.116628 CPU physical address size: 39 bits
2544 15:43:43.119637 call enable_fixed_mtrr()
2545 15:43:43.123407 CPU physical address size: 39 bits
2546 15:43:43.126722 CPU physical address size: 39 bits
2547 15:43:43.129861 MTRR: Fixed MSR 0x26a 0x0606060606060606
2548 15:43:43.133012 call enable_fixed_mtrr()
2549 15:43:43.136111 MTRR: Fixed MSR 0x258 0x0606060606060606
2550 15:43:43.139212 CPU physical address size: 39 bits
2551 15:43:43.142926 MTRR: Fixed MSR 0x259 0x0000000000000000
2552 15:43:43.149242 MTRR: Fixed MSR 0x26b 0x0606060606060606
2553 15:43:43.153195 MTRR: Fixed MSR 0x268 0x0606060606060606
2554 15:43:43.155787 MTRR: Fixed MSR 0x269 0x0606060606060606
2555 15:43:43.159774 MTRR: Fixed MSR 0x26c 0x0606060606060606
2556 15:43:43.166267 MTRR: Fixed MSR 0x26d 0x0606060606060606
2557 15:43:43.169702 MTRR: Fixed MSR 0x26e 0x0606060606060606
2558 15:43:43.172611 MTRR: Fixed MSR 0x26f 0x0606060606060606
2559 15:43:43.176230 MTRR: Fixed MSR 0x26a 0x0606060606060606
2560 15:43:43.179632 call enable_fixed_mtrr()
2561 15:43:43.182709 MTRR: Fixed MSR 0x26b 0x0606060606060606
2562 15:43:43.189055 MTRR: Fixed MSR 0x26c 0x0606060606060606
2563 15:43:43.192799 MTRR: Fixed MSR 0x26d 0x0606060606060606
2564 15:43:43.195762 MTRR: Fixed MSR 0x26e 0x0606060606060606
2565 15:43:43.199659 MTRR: Fixed MSR 0x26f 0x0606060606060606
2566 15:43:43.202773 CPU physical address size: 39 bits
2567 15:43:43.206023 call enable_fixed_mtrr()
2568 15:43:43.209042 CPU physical address size: 39 bits
2569 15:43:43.213043
2570 15:43:43.213505 MTRR check
2571 15:43:43.216413 Fixed MTRRs : Enabled
2572 15:43:43.216946 Variable MTRRs: Enabled
2573 15:43:43.217317
2574 15:43:43.223385 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2575 15:43:43.226528 Checking cr50 for pending updates
2576 15:43:43.238813 Reading cr50 TPM mode
2577 15:43:43.253810 BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms
2578 15:43:43.263465 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2579 15:43:43.267323 Checking segment from ROM address 0xf96cbe6c
2580 15:43:43.270905 Checking segment from ROM address 0xf96cbe88
2581 15:43:43.277509 Loading segment from ROM address 0xf96cbe6c
2582 15:43:43.278066 code (compression=1)
2583 15:43:43.287175 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2584 15:43:43.293436 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2585 15:43:43.297247 using LZMA
2586 15:43:43.319871 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2587 15:43:43.326455 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2588 15:43:43.334211 Loading segment from ROM address 0xf96cbe88
2589 15:43:43.337532 Entry Point 0x30000000
2590 15:43:43.338203 Loaded segments
2591 15:43:43.344412 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2592 15:43:43.350893 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2593 15:43:43.354490 Finalizing chipset.
2594 15:43:43.355048 apm_control: Finalizing SMM.
2595 15:43:43.357454 APMC done.
2596 15:43:43.361329 HECI: CSE device 16.1 is disabled
2597 15:43:43.364294 HECI: CSE device 16.2 is disabled
2598 15:43:43.367692 HECI: CSE device 16.3 is disabled
2599 15:43:43.370955 HECI: CSE device 16.4 is disabled
2600 15:43:43.374151 HECI: CSE device 16.5 is disabled
2601 15:43:43.377858 HECI: Sending End-of-Post
2602 15:43:43.385907 CSE: EOP requested action: continue boot
2603 15:43:43.388767 CSE EOP successful, continuing boot
2604 15:43:43.395530 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2605 15:43:43.398845 mp_park_aps done after 0 msecs.
2606 15:43:43.402690 Jumping to boot code at 0x30000000(0x76891000)
2607 15:43:43.412566 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2608 15:43:43.416497
2609 15:43:43.417052
2610 15:43:43.417415
2611 15:43:43.420167 Starting depthcharge on Volmar...
2612 15:43:43.420720
2613 15:43:43.421970 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2614 15:43:43.422528 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2615 15:43:43.422969 Setting prompt string to ['brya:']
2616 15:43:43.423445 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2617 15:43:43.426590 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2618 15:43:43.427058
2619 15:43:43.433157 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2620 15:43:43.433716
2621 15:43:43.439995 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2622 15:43:43.440457
2623 15:43:43.443404 configure_storage: Failed to remap 1C:2
2624 15:43:43.443965
2625 15:43:43.446219 Wipe memory regions:
2626 15:43:43.446680
2627 15:43:43.449960 [0x00000000001000, 0x000000000a0000)
2628 15:43:43.450518
2629 15:43:43.453169 [0x00000000100000, 0x00000030000000)
2630 15:43:43.560846
2631 15:43:43.563715 [0x00000032668e60, 0x00000076857000)
2632 15:43:43.712225
2633 15:43:43.715435 [0x00000100000000, 0x0000027fc00000)
2634 15:43:44.559690
2635 15:43:44.562745 ec_init: CrosEC protocol v3 supported (256, 256)
2636 15:43:45.172486
2637 15:43:45.172743 R8152: Initializing
2638 15:43:45.172944
2639 15:43:45.175481 Version 9 (ocp_data = 6010)
2640 15:43:45.175682
2641 15:43:45.178924 R8152: Done initializing
2642 15:43:45.179125
2643 15:43:45.182899 Adding net device
2644 15:43:45.484556
2645 15:43:45.487954 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2646 15:43:45.488518
2647 15:43:45.488884
2648 15:43:45.489223
2649 15:43:45.489991 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2651 15:43:45.591348 brya: tftpboot 192.168.201.1 11224166/tftp-deploy-vufhk2os/kernel/bzImage 11224166/tftp-deploy-vufhk2os/kernel/cmdline 11224166/tftp-deploy-vufhk2os/ramdisk/ramdisk.cpio.gz
2652 15:43:45.592007 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2653 15:43:45.592431 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2654 15:43:45.597185 tftpboot 192.168.201.1 11224166/tftp-deploy-vufhk2os/kernel/bzIploy-vufhk2os/kernel/cmdline 11224166/tftp-deploy-vufhk2os/ramdisk/ramdisk.cpio.gz
2655 15:43:45.597769
2656 15:43:45.598129 Waiting for link
2657 15:43:45.800384
2658 15:43:45.800966 done.
2659 15:43:45.801408
2660 15:43:45.801753 MAC: 00:e0:4c:68:05:70
2661 15:43:45.802157
2662 15:43:45.803390 Sending DHCP discover... done.
2663 15:43:45.803846
2664 15:43:45.806742 Waiting for reply... done.
2665 15:43:45.807429
2666 15:43:45.810786 Sending DHCP request... done.
2667 15:43:45.811489
2668 15:43:45.816836 Waiting for reply... done.
2669 15:43:45.817393
2670 15:43:45.817758 My ip is 192.168.201.16
2671 15:43:45.818101
2672 15:43:45.820002 The DHCP server ip is 192.168.201.1
2673 15:43:45.820469
2674 15:43:45.826627 TFTP server IP predefined by user: 192.168.201.1
2675 15:43:45.827182
2676 15:43:45.833511 Bootfile predefined by user: 11224166/tftp-deploy-vufhk2os/kernel/bzImage
2677 15:43:45.834076
2678 15:43:45.836598 Sending tftp read request... done.
2679 15:43:45.837162
2680 15:43:45.844974 Waiting for the transfer...
2681 15:43:45.845482
2682 15:43:46.248987 00000000 ################################################################
2683 15:43:46.249520
2684 15:43:46.584581 00080000 ################################################################
2685 15:43:46.584731
2686 15:43:46.883867 00100000 ################################################################
2687 15:43:46.884041
2688 15:43:47.181721 00180000 ################################################################
2689 15:43:47.181872
2690 15:43:47.479180 00200000 ################################################################
2691 15:43:47.479350
2692 15:43:47.777353 00280000 ################################################################
2693 15:43:47.777503
2694 15:43:48.076233 00300000 ################################################################
2695 15:43:48.076384
2696 15:43:48.375819 00380000 ################################################################
2697 15:43:48.375968
2698 15:43:48.677103 00400000 ################################################################
2699 15:43:48.677252
2700 15:43:48.977191 00480000 ################################################################
2701 15:43:48.977321
2702 15:43:49.275766 00500000 ################################################################
2703 15:43:49.275903
2704 15:43:49.570837 00580000 ################################################################
2705 15:43:49.570974
2706 15:43:49.870393 00600000 ################################################################
2707 15:43:49.870526
2708 15:43:50.166693 00680000 ################################################################
2709 15:43:50.166828
2710 15:43:50.464263 00700000 ################################################################
2711 15:43:50.464399
2712 15:43:50.475388 00780000 ### done.
2713 15:43:50.475472
2714 15:43:50.479019 The bootfile was 7884688 bytes long.
2715 15:43:50.482024
2716 15:43:50.485994 Sending tftp read request... done.
2717 15:43:50.486179
2718 15:43:50.486277 Waiting for the transfer...
2719 15:43:50.486357
2720 15:43:50.785405 00000000 ################################################################
2721 15:43:50.785545
2722 15:43:51.057586 00080000 ################################################################
2723 15:43:51.057760
2724 15:43:51.337055 00100000 ################################################################
2725 15:43:51.337192
2726 15:43:51.616413 00180000 ################################################################
2727 15:43:51.616542
2728 15:43:51.912816 00200000 ################################################################
2729 15:43:51.912946
2730 15:43:52.208806 00280000 ################################################################
2731 15:43:52.208934
2732 15:43:52.484229 00300000 ################################################################
2733 15:43:52.484367
2734 15:43:52.776844 00380000 ################################################################
2735 15:43:52.776971
2736 15:43:53.071560 00400000 ################################################################
2737 15:43:53.071685
2738 15:43:53.359507 00480000 ################################################################
2739 15:43:53.359639
2740 15:43:53.655547 00500000 ################################################################
2741 15:43:53.655685
2742 15:43:53.953045 00580000 ################################################################
2743 15:43:53.953193
2744 15:43:54.247958 00600000 ################################################################
2745 15:43:54.248092
2746 15:43:54.525290 00680000 ################################################################
2747 15:43:54.525423
2748 15:43:54.774362 00700000 ################################################################
2749 15:43:54.774488
2750 15:43:55.051660 00780000 ################################################################
2751 15:43:55.051785
2752 15:43:55.277878 00800000 #################################################### done.
2753 15:43:55.278003
2754 15:43:55.281205 Sending tftp read request... done.
2755 15:43:55.281370
2756 15:43:55.284364 Waiting for the transfer...
2757 15:43:55.284535
2758 15:43:55.287748 00000000 # done.
2759 15:43:55.287841
2760 15:43:55.294460 Command line loaded dynamically from TFTP file: 11224166/tftp-deploy-vufhk2os/kernel/cmdline
2761 15:43:55.294568
2762 15:43:55.311182 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2763 15:43:55.317074
2764 15:43:55.320391 Shutting down all USB controllers.
2765 15:43:55.320645
2766 15:43:55.320810 Removing current net device
2767 15:43:55.320988
2768 15:43:55.324114 Finalizing coreboot
2769 15:43:55.324424
2770 15:43:55.330592 Exiting depthcharge with code 4 at timestamp: 22146283
2771 15:43:55.330959
2772 15:43:55.331254
2773 15:43:55.331471 Starting kernel ...
2774 15:43:55.331667
2775 15:43:55.331857
2776 15:43:55.332679 end: 2.2.4 bootloader-commands (duration 00:00:12) [common]
2777 15:43:55.332995 start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
2778 15:43:55.333236 Setting prompt string to ['Linux version [0-9]']
2779 15:43:55.333455 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2780 15:43:55.333752 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2782 15:48:24.334056 end: 2.2.5 auto-login-action (duration 00:04:29) [common]
2784 15:48:24.335149 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
2786 15:48:24.336090 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2789 15:48:24.337461 end: 2 depthcharge-action (duration 00:05:00) [common]
2791 15:48:24.338649 Cleaning after the job
2792 15:48:24.338737 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224166/tftp-deploy-vufhk2os/ramdisk
2793 15:48:24.340093 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224166/tftp-deploy-vufhk2os/kernel
2794 15:48:24.341189 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224166/tftp-deploy-vufhk2os/modules
2795 15:48:24.341504 start: 5.1 power-off (timeout 00:00:30) [common]
2796 15:48:24.341661 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-9' '--port=1' '--command=off'
2797 15:48:24.420189 >> Command sent successfully.
2798 15:48:24.425727 Returned 0 in 0 seconds
2799 15:48:24.526869 end: 5.1 power-off (duration 00:00:00) [common]
2801 15:48:24.528516 start: 5.2 read-feedback (timeout 00:10:00) [common]
2802 15:48:24.529761 Listened to connection for namespace 'common' for up to 1s
2803 15:48:25.530439 Finalising connection for namespace 'common'
2804 15:48:25.531131 Disconnecting from shell: Finalise
2805 15:48:25.531606
2806 15:48:25.632669 end: 5.2 read-feedback (duration 00:00:01) [common]
2807 15:48:25.633273 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11224166
2808 15:48:25.688587 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11224166
2809 15:48:25.688800 JobError: Your job cannot terminate cleanly.