Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 15:43:13.814209 lava-dispatcher, installed at version: 2023.05.1
2 15:43:13.814445 start: 0 validate
3 15:43:13.814592 Start time: 2023-08-07 15:43:13.814584+00:00 (UTC)
4 15:43:13.814724 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:43:13.814856 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 15:43:14.096411 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:43:14.096609 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:43:14.356648 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:43:14.357612 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:43:17.075127 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:43:17.075358 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:43:17.347795 validate duration: 3.53
14 15:43:17.348066 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:43:17.348163 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:43:17.348248 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:43:17.348375 Not decompressing ramdisk as can be used compressed.
18 15:43:17.348465 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 15:43:17.348529 saving as /var/lib/lava/dispatcher/tmp/11224178/tftp-deploy-mdsgycf3/ramdisk/initrd.cpio.gz
20 15:43:17.348589 total size: 5432690 (5MB)
21 15:43:18.536732 progress 0% (0MB)
22 15:43:18.545623 progress 5% (0MB)
23 15:43:18.553154 progress 10% (0MB)
24 15:43:18.560831 progress 15% (0MB)
25 15:43:18.568429 progress 20% (1MB)
26 15:43:18.573284 progress 25% (1MB)
27 15:43:18.577131 progress 30% (1MB)
28 15:43:18.580584 progress 35% (1MB)
29 15:43:18.583314 progress 40% (2MB)
30 15:43:18.585904 progress 45% (2MB)
31 15:43:18.588284 progress 50% (2MB)
32 15:43:18.590770 progress 55% (2MB)
33 15:43:18.592792 progress 60% (3MB)
34 15:43:18.594738 progress 65% (3MB)
35 15:43:18.596928 progress 70% (3MB)
36 15:43:18.598684 progress 75% (3MB)
37 15:43:18.600487 progress 80% (4MB)
38 15:43:18.602155 progress 85% (4MB)
39 15:43:18.603903 progress 90% (4MB)
40 15:43:18.605462 progress 95% (4MB)
41 15:43:18.606989 progress 100% (5MB)
42 15:43:18.607202 5MB downloaded in 1.26s (4.12MB/s)
43 15:43:18.607355 end: 1.1.1 http-download (duration 00:00:01) [common]
45 15:43:18.607723 end: 1.1 download-retry (duration 00:00:01) [common]
46 15:43:18.607811 start: 1.2 download-retry (timeout 00:09:59) [common]
47 15:43:18.607896 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 15:43:18.608040 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:43:18.608116 saving as /var/lib/lava/dispatcher/tmp/11224178/tftp-deploy-mdsgycf3/kernel/bzImage
50 15:43:18.608178 total size: 7884688 (7MB)
51 15:43:18.608239 No compression specified
52 15:43:18.609394 progress 0% (0MB)
53 15:43:18.611587 progress 5% (0MB)
54 15:43:18.613740 progress 10% (0MB)
55 15:43:18.615838 progress 15% (1MB)
56 15:43:18.617927 progress 20% (1MB)
57 15:43:18.620067 progress 25% (1MB)
58 15:43:18.622197 progress 30% (2MB)
59 15:43:18.624327 progress 35% (2MB)
60 15:43:18.626409 progress 40% (3MB)
61 15:43:18.628535 progress 45% (3MB)
62 15:43:18.630611 progress 50% (3MB)
63 15:43:18.632720 progress 55% (4MB)
64 15:43:18.634756 progress 60% (4MB)
65 15:43:18.636834 progress 65% (4MB)
66 15:43:18.638877 progress 70% (5MB)
67 15:43:18.640928 progress 75% (5MB)
68 15:43:18.642960 progress 80% (6MB)
69 15:43:18.645039 progress 85% (6MB)
70 15:43:18.647064 progress 90% (6MB)
71 15:43:18.649179 progress 95% (7MB)
72 15:43:18.651245 progress 100% (7MB)
73 15:43:18.651435 7MB downloaded in 0.04s (173.85MB/s)
74 15:43:18.651575 end: 1.2.1 http-download (duration 00:00:00) [common]
76 15:43:18.651843 end: 1.2 download-retry (duration 00:00:00) [common]
77 15:43:18.651927 start: 1.3 download-retry (timeout 00:09:59) [common]
78 15:43:18.652010 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 15:43:18.652146 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 15:43:18.652219 saving as /var/lib/lava/dispatcher/tmp/11224178/tftp-deploy-mdsgycf3/nfsrootfs/full.rootfs.tar
81 15:43:18.652279 total size: 133380384 (127MB)
82 15:43:18.652338 Using unxz to decompress xz
83 15:43:18.656463 progress 0% (0MB)
84 15:43:19.003398 progress 5% (6MB)
85 15:43:19.358862 progress 10% (12MB)
86 15:43:19.659101 progress 15% (19MB)
87 15:43:19.847492 progress 20% (25MB)
88 15:43:20.100316 progress 25% (31MB)
89 15:43:20.453643 progress 30% (38MB)
90 15:43:20.805044 progress 35% (44MB)
91 15:43:21.211031 progress 40% (50MB)
92 15:43:21.611985 progress 45% (57MB)
93 15:43:21.979537 progress 50% (63MB)
94 15:43:22.386817 progress 55% (69MB)
95 15:43:22.758447 progress 60% (76MB)
96 15:43:23.140205 progress 65% (82MB)
97 15:43:23.530516 progress 70% (89MB)
98 15:43:23.914258 progress 75% (95MB)
99 15:43:24.363397 progress 80% (101MB)
100 15:43:24.821691 progress 85% (108MB)
101 15:43:25.098517 progress 90% (114MB)
102 15:43:25.457365 progress 95% (120MB)
103 15:43:25.855494 progress 100% (127MB)
104 15:43:25.861372 127MB downloaded in 7.21s (17.64MB/s)
105 15:43:25.861674 end: 1.3.1 http-download (duration 00:00:07) [common]
107 15:43:25.861939 end: 1.3 download-retry (duration 00:00:07) [common]
108 15:43:25.862030 start: 1.4 download-retry (timeout 00:09:51) [common]
109 15:43:25.862117 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 15:43:25.862271 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:43:25.862342 saving as /var/lib/lava/dispatcher/tmp/11224178/tftp-deploy-mdsgycf3/modules/modules.tar
112 15:43:25.862402 total size: 250796 (0MB)
113 15:43:25.862464 Using unxz to decompress xz
114 15:43:25.866521 progress 13% (0MB)
115 15:43:25.866920 progress 26% (0MB)
116 15:43:25.867157 progress 39% (0MB)
117 15:43:25.868580 progress 52% (0MB)
118 15:43:25.870464 progress 65% (0MB)
119 15:43:25.872424 progress 78% (0MB)
120 15:43:25.874395 progress 91% (0MB)
121 15:43:25.876140 progress 100% (0MB)
122 15:43:25.882036 0MB downloaded in 0.02s (12.19MB/s)
123 15:43:25.882303 end: 1.4.1 http-download (duration 00:00:00) [common]
125 15:43:25.882573 end: 1.4 download-retry (duration 00:00:00) [common]
126 15:43:25.882671 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
127 15:43:25.882775 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
128 15:43:28.252057 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11224178/extract-nfsrootfs-xhh5deaz
129 15:43:28.252291 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 15:43:28.252393 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
131 15:43:28.252588 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf
132 15:43:28.252753 makedir: /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin
133 15:43:28.252859 makedir: /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/tests
134 15:43:28.252966 makedir: /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/results
135 15:43:28.253067 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-add-keys
136 15:43:28.253240 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-add-sources
137 15:43:28.253373 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-background-process-start
138 15:43:28.253518 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-background-process-stop
139 15:43:28.253660 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-common-functions
140 15:43:28.253787 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-echo-ipv4
141 15:43:28.253944 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-install-packages
142 15:43:28.254089 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-installed-packages
143 15:43:28.254238 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-os-build
144 15:43:28.254367 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-probe-channel
145 15:43:28.254495 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-probe-ip
146 15:43:28.254621 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-target-ip
147 15:43:28.254751 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-target-mac
148 15:43:28.254878 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-target-storage
149 15:43:28.255012 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-test-case
150 15:43:28.255140 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-test-event
151 15:43:28.255267 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-test-feedback
152 15:43:28.255392 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-test-raise
153 15:43:28.255518 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-test-reference
154 15:43:28.255667 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-test-runner
155 15:43:28.255815 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-test-set
156 15:43:28.255945 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-test-shell
157 15:43:28.256091 Updating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-install-packages (oe)
158 15:43:28.256254 Updating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/bin/lava-installed-packages (oe)
159 15:43:28.256379 Creating /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/environment
160 15:43:28.256476 LAVA metadata
161 15:43:28.256548 - LAVA_JOB_ID=11224178
162 15:43:28.256613 - LAVA_DISPATCHER_IP=192.168.201.1
163 15:43:28.256712 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
164 15:43:28.256786 skipped lava-vland-overlay
165 15:43:28.256861 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 15:43:28.256954 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
167 15:43:28.257016 skipped lava-multinode-overlay
168 15:43:28.257090 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 15:43:28.257170 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
170 15:43:28.257242 Loading test definitions
171 15:43:28.257332 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
172 15:43:28.257405 Using /lava-11224178 at stage 0
173 15:43:28.257742 uuid=11224178_1.5.2.3.1 testdef=None
174 15:43:28.257833 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 15:43:28.257920 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
176 15:43:28.258433 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 15:43:28.258655 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
179 15:43:28.259778 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 15:43:28.260011 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
182 15:43:28.262412 runner path: /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/0/tests/0_dmesg test_uuid 11224178_1.5.2.3.1
183 15:43:28.262576 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 15:43:28.262808 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
186 15:43:28.262880 Using /lava-11224178 at stage 1
187 15:43:28.263194 uuid=11224178_1.5.2.3.5 testdef=None
188 15:43:28.263284 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 15:43:28.263387 start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
190 15:43:28.263967 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 15:43:28.264193 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
193 15:43:28.266892 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 15:43:28.267130 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
196 15:43:28.269936 runner path: /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/1/tests/1_bootrr test_uuid 11224178_1.5.2.3.5
197 15:43:28.270112 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 15:43:28.270320 Creating lava-test-runner.conf files
200 15:43:28.270383 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/0 for stage 0
201 15:43:28.270475 - 0_dmesg
202 15:43:28.270556 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224178/lava-overlay-_fmsnowf/lava-11224178/1 for stage 1
203 15:43:28.270656 - 1_bootrr
204 15:43:28.270753 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 15:43:28.270839 start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
206 15:43:28.278646 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 15:43:28.278772 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
208 15:43:28.278861 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 15:43:28.278950 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 15:43:28.279037 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
211 15:43:28.419612 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 15:43:28.420051 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
213 15:43:28.420180 extracting modules file /var/lib/lava/dispatcher/tmp/11224178/tftp-deploy-mdsgycf3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224178/extract-nfsrootfs-xhh5deaz
214 15:43:28.439442 extracting modules file /var/lib/lava/dispatcher/tmp/11224178/tftp-deploy-mdsgycf3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224178/extract-overlay-ramdisk-qur412jm/ramdisk
215 15:43:28.460758 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 15:43:28.460967 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
217 15:43:28.461102 [common] Applying overlay to NFS
218 15:43:28.461202 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224178/compress-overlay-v08z_ka2/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11224178/extract-nfsrootfs-xhh5deaz
219 15:43:28.471526 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 15:43:28.471677 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
221 15:43:28.471781 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 15:43:28.471872 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
223 15:43:28.471959 Building ramdisk /var/lib/lava/dispatcher/tmp/11224178/extract-overlay-ramdisk-qur412jm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11224178/extract-overlay-ramdisk-qur412jm/ramdisk
224 15:43:28.548956 >> 26159 blocks
225 15:43:29.092587 rename /var/lib/lava/dispatcher/tmp/11224178/extract-overlay-ramdisk-qur412jm/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11224178/tftp-deploy-mdsgycf3/ramdisk/ramdisk.cpio.gz
226 15:43:29.093039 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 15:43:29.093165 start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
228 15:43:29.093268 start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
229 15:43:29.093362 No mkimage arch provided, not using FIT.
230 15:43:29.093449 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 15:43:29.093534 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 15:43:29.093640 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 15:43:29.093729 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:48) [common]
234 15:43:29.093813 No LXC device requested
235 15:43:29.093892 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 15:43:29.093981 start: 1.7 deploy-device-env (timeout 00:09:48) [common]
237 15:43:29.094063 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 15:43:29.094135 Checking files for TFTP limit of 4294967296 bytes.
239 15:43:29.094549 end: 1 tftp-deploy (duration 00:00:12) [common]
240 15:43:29.094654 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 15:43:29.094743 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 15:43:29.094867 substitutions:
243 15:43:29.094932 - {DTB}: None
244 15:43:29.094992 - {INITRD}: 11224178/tftp-deploy-mdsgycf3/ramdisk/ramdisk.cpio.gz
245 15:43:29.095051 - {KERNEL}: 11224178/tftp-deploy-mdsgycf3/kernel/bzImage
246 15:43:29.095107 - {LAVA_MAC}: None
247 15:43:29.095163 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11224178/extract-nfsrootfs-xhh5deaz
248 15:43:29.095221 - {NFS_SERVER_IP}: 192.168.201.1
249 15:43:29.095276 - {PRESEED_CONFIG}: None
250 15:43:29.095330 - {PRESEED_LOCAL}: None
251 15:43:29.095383 - {RAMDISK}: 11224178/tftp-deploy-mdsgycf3/ramdisk/ramdisk.cpio.gz
252 15:43:29.095436 - {ROOT_PART}: None
253 15:43:29.095490 - {ROOT}: None
254 15:43:29.095544 - {SERVER_IP}: 192.168.201.1
255 15:43:29.095597 - {TEE}: None
256 15:43:29.095678 Parsed boot commands:
257 15:43:29.095746 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 15:43:29.095922 Parsed boot commands: tftpboot 192.168.201.1 11224178/tftp-deploy-mdsgycf3/kernel/bzImage 11224178/tftp-deploy-mdsgycf3/kernel/cmdline 11224178/tftp-deploy-mdsgycf3/ramdisk/ramdisk.cpio.gz
259 15:43:29.096012 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 15:43:29.096100 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 15:43:29.096192 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 15:43:29.096276 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 15:43:29.096347 Not connected, no need to disconnect.
264 15:43:29.096419 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 15:43:29.096502 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 15:43:29.096570 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
267 15:43:29.100642 Setting prompt string to ['lava-test: # ']
268 15:43:29.101004 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 15:43:29.101113 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 15:43:29.101211 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 15:43:29.101298 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 15:43:29.101519 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
273 15:43:34.241604 >> Command sent successfully.
274 15:43:34.244212 Returned 0 in 5 seconds
275 15:43:34.344665 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 15:43:34.345140 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 15:43:34.345307 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 15:43:34.345458 Setting prompt string to 'Starting depthcharge on Helios...'
280 15:43:34.345572 Changing prompt to 'Starting depthcharge on Helios...'
281 15:43:34.345690 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 15:43:34.346105 [Enter `^Ec?' for help]
283 15:43:34.965801
284 15:43:34.966339
285 15:43:34.975969 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 15:43:34.979565 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 15:43:34.986062 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 15:43:34.989134 CPU: AES supported, TXT NOT supported, VT supported
289 15:43:34.995895 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 15:43:34.999161 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 15:43:35.005909 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 15:43:35.009577 VBOOT: Loading verstage.
293 15:43:35.012693 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 15:43:35.019499 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 15:43:35.023007 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 15:43:35.025894 CBFS @ c08000 size 3f8000
297 15:43:35.032336 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 15:43:35.036223 CBFS: Locating 'fallback/verstage'
299 15:43:35.039002 CBFS: Found @ offset 10fb80 size 1072c
300 15:43:35.042319
301 15:43:35.042874
302 15:43:35.052361 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 15:43:35.066761 Probing TPM: . done!
304 15:43:35.070308 TPM ready after 0 ms
305 15:43:35.073444 Connected to device vid:did:rid of 1ae0:0028:00
306 15:43:35.083297 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
307 15:43:35.086688 Initialized TPM device CR50 revision 0
308 15:43:35.128230 tlcl_send_startup: Startup return code is 0
309 15:43:35.128795 TPM: setup succeeded
310 15:43:35.141169 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 15:43:35.144679 Chrome EC: UHEPI supported
312 15:43:35.148116 Phase 1
313 15:43:35.151810 FMAP: area GBB found @ c05000 (12288 bytes)
314 15:43:35.158470 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 15:43:35.158899 Phase 2
316 15:43:35.161789 Phase 3
317 15:43:35.164972 FMAP: area GBB found @ c05000 (12288 bytes)
318 15:43:35.171708 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 15:43:35.178091 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
320 15:43:35.181898 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
321 15:43:35.188140 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 15:43:35.203737 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
323 15:43:35.206979 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
324 15:43:35.213568 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 15:43:35.217399 Phase 4
326 15:43:35.221153 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
327 15:43:35.227394 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 15:43:35.406747 VB2:vb2_rsa_verify_digest() Digest check failed!
329 15:43:35.413595 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 15:43:35.413689 Saving nvdata
331 15:43:35.416839 Reboot requested (10020007)
332 15:43:35.419975 board_reset() called!
333 15:43:35.420058 full_reset() called!
334 15:43:39.932855
335 15:43:39.933558
336 15:43:39.942806 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
337 15:43:39.945723 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
338 15:43:39.952454 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
339 15:43:39.955814 CPU: AES supported, TXT NOT supported, VT supported
340 15:43:39.962393 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
341 15:43:39.965703 PCH: device id 0284 (rev 00) is Cometlake-U Premium
342 15:43:39.972379 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
343 15:43:39.975763 VBOOT: Loading verstage.
344 15:43:39.979047 FMAP: Found "FLASH" version 1.1 at 0xc04000.
345 15:43:39.985844 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
346 15:43:39.989011 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
347 15:43:39.992781 CBFS @ c08000 size 3f8000
348 15:43:39.999089 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
349 15:43:40.002252 CBFS: Locating 'fallback/verstage'
350 15:43:40.005505 CBFS: Found @ offset 10fb80 size 1072c
351 15:43:40.009641
352 15:43:40.010125
353 15:43:40.019691 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
354 15:43:40.033960 Probing TPM: . done!
355 15:43:40.037196 TPM ready after 0 ms
356 15:43:40.040652 Connected to device vid:did:rid of 1ae0:0028:00
357 15:43:40.051164 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
358 15:43:40.054587 Initialized TPM device CR50 revision 0
359 15:43:40.095566 tlcl_send_startup: Startup return code is 0
360 15:43:40.096057 TPM: setup succeeded
361 15:43:40.108419 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
362 15:43:40.112040 Chrome EC: UHEPI supported
363 15:43:40.115439 Phase 1
364 15:43:40.118698 FMAP: area GBB found @ c05000 (12288 bytes)
365 15:43:40.125495 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
366 15:43:40.131691 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
367 15:43:40.135570 Recovery requested (1009000e)
368 15:43:40.141042 Saving nvdata
369 15:43:40.147116 tlcl_extend: response is 0
370 15:43:40.156016 tlcl_extend: response is 0
371 15:43:40.163105 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 15:43:40.166069 CBFS @ c08000 size 3f8000
373 15:43:40.173078 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 15:43:40.176329 CBFS: Locating 'fallback/romstage'
375 15:43:40.179719 CBFS: Found @ offset 80 size 145fc
376 15:43:40.182808 Accumulated console time in verstage 98 ms
377 15:43:40.183264
378 15:43:40.183600
379 15:43:40.195991 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
380 15:43:40.202885 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
381 15:43:40.206175 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 15:43:40.209450 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 15:43:40.216147 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
384 15:43:40.219551 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 15:43:40.222865 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
386 15:43:40.225697 TCO_STS: 0000 0000
387 15:43:40.229118 GEN_PMCON: e0015238 00000200
388 15:43:40.232437 GBLRST_CAUSE: 00000000 00000000
389 15:43:40.232862 prev_sleep_state 5
390 15:43:40.236057 Boot Count incremented to 67573
391 15:43:40.242640 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 15:43:40.245952 CBFS @ c08000 size 3f8000
393 15:43:40.252539 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 15:43:40.252969 CBFS: Locating 'fspm.bin'
395 15:43:40.259357 CBFS: Found @ offset 5ffc0 size 71000
396 15:43:40.262573 Chrome EC: UHEPI supported
397 15:43:40.269067 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
398 15:43:40.272531 Probing TPM: done!
399 15:43:40.279210 Connected to device vid:did:rid of 1ae0:0028:00
400 15:43:40.289269 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
401 15:43:40.294999 Initialized TPM device CR50 revision 0
402 15:43:40.304297 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
403 15:43:40.310840 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
404 15:43:40.314155 MRC cache found, size 1948
405 15:43:40.317240 bootmode is set to: 2
406 15:43:40.320625 PRMRR disabled by config.
407 15:43:40.321046 SPD INDEX = 1
408 15:43:40.327151 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
409 15:43:40.330484 CBFS @ c08000 size 3f8000
410 15:43:40.337595 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
411 15:43:40.338141 CBFS: Locating 'spd.bin'
412 15:43:40.340562 CBFS: Found @ offset 5fb80 size 400
413 15:43:40.343999 SPD: module type is LPDDR3
414 15:43:40.347554 SPD: module part is
415 15:43:40.354545 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
416 15:43:40.357530 SPD: device width 4 bits, bus width 8 bits
417 15:43:40.360571 SPD: module size is 4096 MB (per channel)
418 15:43:40.364260 memory slot: 0 configuration done.
419 15:43:40.367249 memory slot: 2 configuration done.
420 15:43:40.418161 CBMEM:
421 15:43:40.421284 IMD: root @ 99fff000 254 entries.
422 15:43:40.424588 IMD: root @ 99ffec00 62 entries.
423 15:43:40.428000 External stage cache:
424 15:43:40.431529 IMD: root @ 9abff000 254 entries.
425 15:43:40.434808 IMD: root @ 9abfec00 62 entries.
426 15:43:40.438258 Chrome EC: clear events_b mask to 0x0000000020004000
427 15:43:40.453996 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 15:43:40.467532 tlcl_write: response is 0
429 15:43:40.476088 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
430 15:43:40.482752 MRC: TPM MRC hash updated successfully.
431 15:43:40.483420 2 DIMMs found
432 15:43:40.486124 SMM Memory Map
433 15:43:40.489483 SMRAM : 0x9a000000 0x1000000
434 15:43:40.492774 Subregion 0: 0x9a000000 0xa00000
435 15:43:40.496147 Subregion 1: 0x9aa00000 0x200000
436 15:43:40.499481 Subregion 2: 0x9ac00000 0x400000
437 15:43:40.502992 top_of_ram = 0x9a000000
438 15:43:40.506443 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
439 15:43:40.513037 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
440 15:43:40.516237 MTRR Range: Start=ff000000 End=0 (Size 1000000)
441 15:43:40.522856 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 15:43:40.526075 CBFS @ c08000 size 3f8000
443 15:43:40.529551 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 15:43:40.532458 CBFS: Locating 'fallback/postcar'
445 15:43:40.536149 CBFS: Found @ offset 107000 size 4b44
446 15:43:40.542473 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
447 15:43:40.555048 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
448 15:43:40.558414 Processing 180 relocs. Offset value of 0x97c0c000
449 15:43:40.566856 Accumulated console time in romstage 286 ms
450 15:43:40.567285
451 15:43:40.567618
452 15:43:40.576879 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
453 15:43:40.583600 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 15:43:40.587158 CBFS @ c08000 size 3f8000
455 15:43:40.590380 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 15:43:40.596855 CBFS: Locating 'fallback/ramstage'
457 15:43:40.600395 CBFS: Found @ offset 43380 size 1b9e8
458 15:43:40.606609 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 15:43:40.638537 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 15:43:40.641968 Processing 3976 relocs. Offset value of 0x98db0000
461 15:43:40.648532 Accumulated console time in postcar 52 ms
462 15:43:40.648943
463 15:43:40.649275
464 15:43:40.658520 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 15:43:40.665217 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 15:43:40.668222 WARNING: RO_VPD is uninitialized or empty.
467 15:43:40.672113 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 15:43:40.678673 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 15:43:40.679186 Normal boot.
470 15:43:40.685024 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 15:43:40.688335 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 15:43:40.691726 CBFS @ c08000 size 3f8000
473 15:43:40.698379 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 15:43:40.701694 CBFS: Locating 'cpu_microcode_blob.bin'
475 15:43:40.705121 CBFS: Found @ offset 14700 size 2ec00
476 15:43:40.708444 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 15:43:40.711945 Skip microcode update
478 15:43:40.714806 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 15:43:40.718001 CBFS @ c08000 size 3f8000
480 15:43:40.724667 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 15:43:40.728026 CBFS: Locating 'fsps.bin'
482 15:43:40.731468 CBFS: Found @ offset d1fc0 size 35000
483 15:43:40.756667 Detected 4 core, 8 thread CPU.
484 15:43:40.760160 Setting up SMI for CPU
485 15:43:40.763379 IED base = 0x9ac00000
486 15:43:40.763958 IED size = 0x00400000
487 15:43:40.766489 Will perform SMM setup.
488 15:43:40.773176 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 15:43:40.780047 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 15:43:40.783391 Processing 16 relocs. Offset value of 0x00030000
491 15:43:40.786641 Attempting to start 7 APs
492 15:43:40.789991 Waiting for 10ms after sending INIT.
493 15:43:40.806229 Waiting for 1st SIPI to complete...done.
494 15:43:40.806726 AP: slot 2 apic_id 6.
495 15:43:40.809629 AP: slot 5 apic_id 7.
496 15:43:40.813016 AP: slot 1 apic_id 3.
497 15:43:40.813461 AP: slot 4 apic_id 2.
498 15:43:40.815967 AP: slot 6 apic_id 4.
499 15:43:40.819367 AP: slot 7 apic_id 5.
500 15:43:40.820065 AP: slot 3 apic_id 1.
501 15:43:40.826183 Waiting for 2nd SIPI to complete...done.
502 15:43:40.832888 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 15:43:40.839201 Processing 13 relocs. Offset value of 0x00038000
504 15:43:40.846242 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
505 15:43:40.849069 Installing SMM handler to 0x9a000000
506 15:43:40.856215 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
507 15:43:40.862610 Processing 658 relocs. Offset value of 0x9a010000
508 15:43:40.868898 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
509 15:43:40.872308 Processing 13 relocs. Offset value of 0x9a008000
510 15:43:40.879030 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
511 15:43:40.885700 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
512 15:43:40.892572 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
513 15:43:40.895483 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
514 15:43:40.902080 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
515 15:43:40.908646 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
516 15:43:40.911929 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
517 15:43:40.918835 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
518 15:43:40.922250 Clearing SMI status registers
519 15:43:40.925702 SMI_STS: PM1
520 15:43:40.926117 PM1_STS: PWRBTN
521 15:43:40.929237 TCO_STS: SECOND_TO
522 15:43:40.932646 New SMBASE 0x9a000000
523 15:43:40.936102 In relocation handler: CPU 0
524 15:43:40.939420 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 15:43:40.942274 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 15:43:40.945694 Relocation complete.
527 15:43:40.949064 New SMBASE 0x99fff400
528 15:43:40.949483 In relocation handler: CPU 3
529 15:43:40.955878 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
530 15:43:40.958907 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 15:43:40.962439 Relocation complete.
532 15:43:40.965476 New SMBASE 0x99fffc00
533 15:43:40.965922 In relocation handler: CPU 1
534 15:43:40.972318 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
535 15:43:40.975891 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 15:43:40.979383 Relocation complete.
537 15:43:40.979919 New SMBASE 0x99fff000
538 15:43:40.982734 In relocation handler: CPU 4
539 15:43:40.989249 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
540 15:43:40.992516 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 15:43:40.995613 Relocation complete.
542 15:43:40.996072 New SMBASE 0x99fff800
543 15:43:40.999134 In relocation handler: CPU 2
544 15:43:41.002433 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
545 15:43:41.009031 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 15:43:41.012126 Relocation complete.
547 15:43:41.012564 New SMBASE 0x99ffec00
548 15:43:41.015580 In relocation handler: CPU 5
549 15:43:41.018791 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
550 15:43:41.025530 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 15:43:41.028947 Relocation complete.
552 15:43:41.029382 New SMBASE 0x99ffe400
553 15:43:41.032267 In relocation handler: CPU 7
554 15:43:41.035557 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
555 15:43:41.041831 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 15:43:41.042271 Relocation complete.
557 15:43:41.045097 New SMBASE 0x99ffe800
558 15:43:41.048638 In relocation handler: CPU 6
559 15:43:41.052028 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
560 15:43:41.058597 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 15:43:41.059033 Relocation complete.
562 15:43:41.061938 Initializing CPU #0
563 15:43:41.065515 CPU: vendor Intel device 806ec
564 15:43:41.068606 CPU: family 06, model 8e, stepping 0c
565 15:43:41.071771 Clearing out pending MCEs
566 15:43:41.075488 Setting up local APIC...
567 15:43:41.076002 apic_id: 0x00 done.
568 15:43:41.078838 Turbo is available but hidden
569 15:43:41.081815 Turbo is available and visible
570 15:43:41.085358 VMX status: enabled
571 15:43:41.088678 IA32_FEATURE_CONTROL status: locked
572 15:43:41.092093 Skip microcode update
573 15:43:41.092558 CPU #0 initialized
574 15:43:41.095392 Initializing CPU #3
575 15:43:41.095870 Initializing CPU #2
576 15:43:41.098746 Initializing CPU #5
577 15:43:41.102119 CPU: vendor Intel device 806ec
578 15:43:41.105209 CPU: family 06, model 8e, stepping 0c
579 15:43:41.108645 CPU: vendor Intel device 806ec
580 15:43:41.112025 CPU: family 06, model 8e, stepping 0c
581 15:43:41.115461 Clearing out pending MCEs
582 15:43:41.118499 Clearing out pending MCEs
583 15:43:41.121717 Setting up local APIC...
584 15:43:41.122144 Initializing CPU #7
585 15:43:41.125004 Initializing CPU #6
586 15:43:41.128412 CPU: vendor Intel device 806ec
587 15:43:41.131630 CPU: family 06, model 8e, stepping 0c
588 15:43:41.135096 CPU: vendor Intel device 806ec
589 15:43:41.138399 CPU: family 06, model 8e, stepping 0c
590 15:43:41.141769 Clearing out pending MCEs
591 15:43:41.145096 Clearing out pending MCEs
592 15:43:41.145520 Setting up local APIC...
593 15:43:41.148553 apic_id: 0x06 done.
594 15:43:41.151493 Setting up local APIC...
595 15:43:41.154894 CPU: vendor Intel device 806ec
596 15:43:41.158258 CPU: family 06, model 8e, stepping 0c
597 15:43:41.161683 Clearing out pending MCEs
598 15:43:41.162114 apic_id: 0x04 done.
599 15:43:41.164846 Setting up local APIC...
600 15:43:41.168148 apic_id: 0x07 done.
601 15:43:41.168721 VMX status: enabled
602 15:43:41.171450 VMX status: enabled
603 15:43:41.174474 Setting up local APIC...
604 15:43:41.177864 IA32_FEATURE_CONTROL status: locked
605 15:43:41.181290 IA32_FEATURE_CONTROL status: locked
606 15:43:41.184609 Skip microcode update
607 15:43:41.185033 Skip microcode update
608 15:43:41.188299 CPU #5 initialized
609 15:43:41.188723 CPU #2 initialized
610 15:43:41.191463 VMX status: enabled
611 15:43:41.194477 apic_id: 0x05 done.
612 15:43:41.197717 IA32_FEATURE_CONTROL status: locked
613 15:43:41.198142 VMX status: enabled
614 15:43:41.200925 Skip microcode update
615 15:43:41.204295 IA32_FEATURE_CONTROL status: locked
616 15:43:41.208013 CPU #6 initialized
617 15:43:41.208588 Skip microcode update
618 15:43:41.211457 apic_id: 0x01 done.
619 15:43:41.214777 CPU #7 initialized
620 15:43:41.215193 VMX status: enabled
621 15:43:41.217996 Initializing CPU #4
622 15:43:41.218431 Initializing CPU #1
623 15:43:41.221213 CPU: vendor Intel device 806ec
624 15:43:41.228171 CPU: family 06, model 8e, stepping 0c
625 15:43:41.228608 CPU: vendor Intel device 806ec
626 15:43:41.234754 CPU: family 06, model 8e, stepping 0c
627 15:43:41.235181 Clearing out pending MCEs
628 15:43:41.238065 Clearing out pending MCEs
629 15:43:41.241573 Setting up local APIC...
630 15:43:41.244675 IA32_FEATURE_CONTROL status: locked
631 15:43:41.248029 Setting up local APIC...
632 15:43:41.248456 Skip microcode update
633 15:43:41.251149 apic_id: 0x03 done.
634 15:43:41.254725 apic_id: 0x02 done.
635 15:43:41.255245 VMX status: enabled
636 15:43:41.257906 VMX status: enabled
637 15:43:41.261235 IA32_FEATURE_CONTROL status: locked
638 15:43:41.263981 IA32_FEATURE_CONTROL status: locked
639 15:43:41.267428 Skip microcode update
640 15:43:41.270892 Skip microcode update
641 15:43:41.271312 CPU #1 initialized
642 15:43:41.274204 CPU #4 initialized
643 15:43:41.274628 CPU #3 initialized
644 15:43:41.281034 bsp_do_flight_plan done after 452 msecs.
645 15:43:41.281599 CPU: frequency set to 4200 MHz
646 15:43:41.284310 Enabling SMIs.
647 15:43:41.284734 Locking SMM.
648 15:43:41.300291 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 15:43:41.303306 CBFS @ c08000 size 3f8000
650 15:43:41.310483 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 15:43:41.310912 CBFS: Locating 'vbt.bin'
652 15:43:41.316401 CBFS: Found @ offset 5f5c0 size 499
653 15:43:41.319852 Found a VBT of 4608 bytes after decompression
654 15:43:41.500168 Display FSP Version Info HOB
655 15:43:41.503470 Reference Code - CPU = 9.0.1e.30
656 15:43:41.506578 uCode Version = 0.0.0.ca
657 15:43:41.510052 TXT ACM version = ff.ff.ff.ffff
658 15:43:41.513370 Display FSP Version Info HOB
659 15:43:41.516682 Reference Code - ME = 9.0.1e.30
660 15:43:41.520030 MEBx version = 0.0.0.0
661 15:43:41.523157 ME Firmware Version = Consumer SKU
662 15:43:41.526449 Display FSP Version Info HOB
663 15:43:41.529867 Reference Code - CML PCH = 9.0.1e.30
664 15:43:41.533075 PCH-CRID Status = Disabled
665 15:43:41.536536 PCH-CRID Original Value = ff.ff.ff.ffff
666 15:43:41.539387 PCH-CRID New Value = ff.ff.ff.ffff
667 15:43:41.542711 OPROM - RST - RAID = ff.ff.ff.ffff
668 15:43:41.545934 ChipsetInit Base Version = ff.ff.ff.ffff
669 15:43:41.549532 ChipsetInit Oem Version = ff.ff.ff.ffff
670 15:43:41.552814 Display FSP Version Info HOB
671 15:43:41.559375 Reference Code - SA - System Agent = 9.0.1e.30
672 15:43:41.562803 Reference Code - MRC = 0.7.1.6c
673 15:43:41.563228 SA - PCIe Version = 9.0.1e.30
674 15:43:41.565810 SA-CRID Status = Disabled
675 15:43:41.569371 SA-CRID Original Value = 0.0.0.c
676 15:43:41.572610 SA-CRID New Value = 0.0.0.c
677 15:43:41.575998 OPROM - VBIOS = ff.ff.ff.ffff
678 15:43:41.579197 RTC Init
679 15:43:41.582572 Set power on after power failure.
680 15:43:41.582998 Disabling Deep S3
681 15:43:41.586005 Disabling Deep S3
682 15:43:41.586460 Disabling Deep S4
683 15:43:41.589366 Disabling Deep S4
684 15:43:41.589970 Disabling Deep S5
685 15:43:41.592677 Disabling Deep S5
686 15:43:41.599089 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 190 exit 1
687 15:43:41.599518 Enumerating buses...
688 15:43:41.606052 Show all devs... Before device enumeration.
689 15:43:41.606679 Root Device: enabled 1
690 15:43:41.609121 CPU_CLUSTER: 0: enabled 1
691 15:43:41.612395 DOMAIN: 0000: enabled 1
692 15:43:41.615705 APIC: 00: enabled 1
693 15:43:41.616103 PCI: 00:00.0: enabled 1
694 15:43:41.619214 PCI: 00:02.0: enabled 1
695 15:43:41.622741 PCI: 00:04.0: enabled 0
696 15:43:41.625821 PCI: 00:05.0: enabled 0
697 15:43:41.626404 PCI: 00:12.0: enabled 1
698 15:43:41.629108 PCI: 00:12.5: enabled 0
699 15:43:41.632224 PCI: 00:12.6: enabled 0
700 15:43:41.632697 PCI: 00:14.0: enabled 1
701 15:43:41.636120 PCI: 00:14.1: enabled 0
702 15:43:41.639351 PCI: 00:14.3: enabled 1
703 15:43:41.642782 PCI: 00:14.5: enabled 0
704 15:43:41.643204 PCI: 00:15.0: enabled 1
705 15:43:41.645628 PCI: 00:15.1: enabled 1
706 15:43:41.649013 PCI: 00:15.2: enabled 0
707 15:43:41.652334 PCI: 00:15.3: enabled 0
708 15:43:41.652757 PCI: 00:16.0: enabled 1
709 15:43:41.655930 PCI: 00:16.1: enabled 0
710 15:43:41.658973 PCI: 00:16.2: enabled 0
711 15:43:41.659420 PCI: 00:16.3: enabled 0
712 15:43:41.662357 PCI: 00:16.4: enabled 0
713 15:43:41.665388 PCI: 00:16.5: enabled 0
714 15:43:41.668766 PCI: 00:17.0: enabled 1
715 15:43:41.669351 PCI: 00:19.0: enabled 1
716 15:43:41.672377 PCI: 00:19.1: enabled 0
717 15:43:41.675763 PCI: 00:19.2: enabled 0
718 15:43:41.679165 PCI: 00:1a.0: enabled 0
719 15:43:41.679803 PCI: 00:1c.0: enabled 0
720 15:43:41.682484 PCI: 00:1c.1: enabled 0
721 15:43:41.685348 PCI: 00:1c.2: enabled 0
722 15:43:41.688607 PCI: 00:1c.3: enabled 0
723 15:43:41.689235 PCI: 00:1c.4: enabled 0
724 15:43:41.692040 PCI: 00:1c.5: enabled 0
725 15:43:41.695297 PCI: 00:1c.6: enabled 0
726 15:43:41.698646 PCI: 00:1c.7: enabled 0
727 15:43:41.699135 PCI: 00:1d.0: enabled 1
728 15:43:41.701846 PCI: 00:1d.1: enabled 0
729 15:43:41.705599 PCI: 00:1d.2: enabled 0
730 15:43:41.706207 PCI: 00:1d.3: enabled 0
731 15:43:41.708883 PCI: 00:1d.4: enabled 0
732 15:43:41.712314 PCI: 00:1d.5: enabled 1
733 15:43:41.715262 PCI: 00:1e.0: enabled 1
734 15:43:41.715846 PCI: 00:1e.1: enabled 0
735 15:43:41.718872 PCI: 00:1e.2: enabled 1
736 15:43:41.721939 PCI: 00:1e.3: enabled 1
737 15:43:41.725378 PCI: 00:1f.0: enabled 1
738 15:43:41.725820 PCI: 00:1f.1: enabled 1
739 15:43:41.728715 PCI: 00:1f.2: enabled 1
740 15:43:41.731979 PCI: 00:1f.3: enabled 1
741 15:43:41.735434 PCI: 00:1f.4: enabled 1
742 15:43:41.736061 PCI: 00:1f.5: enabled 1
743 15:43:41.738633 PCI: 00:1f.6: enabled 0
744 15:43:41.742071 USB0 port 0: enabled 1
745 15:43:41.742660 I2C: 00:15: enabled 1
746 15:43:41.745310 I2C: 00:5d: enabled 1
747 15:43:41.748249 GENERIC: 0.0: enabled 1
748 15:43:41.748820 I2C: 00:1a: enabled 1
749 15:43:41.752043 I2C: 00:38: enabled 1
750 15:43:41.754905 I2C: 00:39: enabled 1
751 15:43:41.755531 I2C: 00:3a: enabled 1
752 15:43:41.758167 I2C: 00:3b: enabled 1
753 15:43:41.761886 PCI: 00:00.0: enabled 1
754 15:43:41.762485 SPI: 00: enabled 1
755 15:43:41.765096 SPI: 01: enabled 1
756 15:43:41.768300 PNP: 0c09.0: enabled 1
757 15:43:41.768873 USB2 port 0: enabled 1
758 15:43:41.771580 USB2 port 1: enabled 1
759 15:43:41.775109 USB2 port 2: enabled 0
760 15:43:41.778270 USB2 port 3: enabled 0
761 15:43:41.778845 USB2 port 5: enabled 0
762 15:43:41.781535 USB2 port 6: enabled 1
763 15:43:41.784824 USB2 port 9: enabled 1
764 15:43:41.785424 USB3 port 0: enabled 1
765 15:43:41.788098 USB3 port 1: enabled 1
766 15:43:41.791476 USB3 port 2: enabled 1
767 15:43:41.794668 USB3 port 3: enabled 1
768 15:43:41.795213 USB3 port 4: enabled 0
769 15:43:41.798101 APIC: 03: enabled 1
770 15:43:41.798671 APIC: 06: enabled 1
771 15:43:41.801574 APIC: 01: enabled 1
772 15:43:41.804897 APIC: 02: enabled 1
773 15:43:41.805459 APIC: 07: enabled 1
774 15:43:41.808008 APIC: 04: enabled 1
775 15:43:41.811599 APIC: 05: enabled 1
776 15:43:41.812104 Compare with tree...
777 15:43:41.814835 Root Device: enabled 1
778 15:43:41.818237 CPU_CLUSTER: 0: enabled 1
779 15:43:41.818770 APIC: 00: enabled 1
780 15:43:41.821646 APIC: 03: enabled 1
781 15:43:41.824656 APIC: 06: enabled 1
782 15:43:41.825161 APIC: 01: enabled 1
783 15:43:41.828343 APIC: 02: enabled 1
784 15:43:41.831139 APIC: 07: enabled 1
785 15:43:41.831737 APIC: 04: enabled 1
786 15:43:41.835058 APIC: 05: enabled 1
787 15:43:41.837888 DOMAIN: 0000: enabled 1
788 15:43:41.841200 PCI: 00:00.0: enabled 1
789 15:43:41.841622 PCI: 00:02.0: enabled 1
790 15:43:41.844600 PCI: 00:04.0: enabled 0
791 15:43:41.847815 PCI: 00:05.0: enabled 0
792 15:43:41.851677 PCI: 00:12.0: enabled 1
793 15:43:41.854767 PCI: 00:12.5: enabled 0
794 15:43:41.855282 PCI: 00:12.6: enabled 0
795 15:43:41.858264 PCI: 00:14.0: enabled 1
796 15:43:41.861679 USB0 port 0: enabled 1
797 15:43:41.865059 USB2 port 0: enabled 1
798 15:43:41.868005 USB2 port 1: enabled 1
799 15:43:41.868433 USB2 port 2: enabled 0
800 15:43:41.871214 USB2 port 3: enabled 0
801 15:43:41.874406 USB2 port 5: enabled 0
802 15:43:41.878244 USB2 port 6: enabled 1
803 15:43:41.881631 USB2 port 9: enabled 1
804 15:43:41.884842 USB3 port 0: enabled 1
805 15:43:41.885422 USB3 port 1: enabled 1
806 15:43:41.888025 USB3 port 2: enabled 1
807 15:43:41.891521 USB3 port 3: enabled 1
808 15:43:41.894860 USB3 port 4: enabled 0
809 15:43:41.898140 PCI: 00:14.1: enabled 0
810 15:43:41.898840 PCI: 00:14.3: enabled 1
811 15:43:41.900869 PCI: 00:14.5: enabled 0
812 15:43:41.904174 PCI: 00:15.0: enabled 1
813 15:43:41.907555 I2C: 00:15: enabled 1
814 15:43:41.910996 PCI: 00:15.1: enabled 1
815 15:43:41.911413 I2C: 00:5d: enabled 1
816 15:43:41.914330 GENERIC: 0.0: enabled 1
817 15:43:41.917634 PCI: 00:15.2: enabled 0
818 15:43:41.920893 PCI: 00:15.3: enabled 0
819 15:43:41.924176 PCI: 00:16.0: enabled 1
820 15:43:41.924600 PCI: 00:16.1: enabled 0
821 15:43:41.927692 PCI: 00:16.2: enabled 0
822 15:43:41.930720 PCI: 00:16.3: enabled 0
823 15:43:41.934119 PCI: 00:16.4: enabled 0
824 15:43:41.937806 PCI: 00:16.5: enabled 0
825 15:43:41.938226 PCI: 00:17.0: enabled 1
826 15:43:41.940947 PCI: 00:19.0: enabled 1
827 15:43:41.944323 I2C: 00:1a: enabled 1
828 15:43:41.947593 I2C: 00:38: enabled 1
829 15:43:41.948182 I2C: 00:39: enabled 1
830 15:43:41.951068 I2C: 00:3a: enabled 1
831 15:43:41.954416 I2C: 00:3b: enabled 1
832 15:43:41.957549 PCI: 00:19.1: enabled 0
833 15:43:41.957969 PCI: 00:19.2: enabled 0
834 15:43:41.960755 PCI: 00:1a.0: enabled 0
835 15:43:41.963981 PCI: 00:1c.0: enabled 0
836 15:43:41.967468 PCI: 00:1c.1: enabled 0
837 15:43:41.970835 PCI: 00:1c.2: enabled 0
838 15:43:41.971309 PCI: 00:1c.3: enabled 0
839 15:43:41.973904 PCI: 00:1c.4: enabled 0
840 15:43:41.977383 PCI: 00:1c.5: enabled 0
841 15:43:41.980600 PCI: 00:1c.6: enabled 0
842 15:43:41.984302 PCI: 00:1c.7: enabled 0
843 15:43:41.984895 PCI: 00:1d.0: enabled 1
844 15:43:41.986940 PCI: 00:1d.1: enabled 0
845 15:43:41.990291 PCI: 00:1d.2: enabled 0
846 15:43:41.994086 PCI: 00:1d.3: enabled 0
847 15:43:41.997441 PCI: 00:1d.4: enabled 0
848 15:43:41.997862 PCI: 00:1d.5: enabled 1
849 15:43:42.000263 PCI: 00:00.0: enabled 1
850 15:43:42.003831 PCI: 00:1e.0: enabled 1
851 15:43:42.006987 PCI: 00:1e.1: enabled 0
852 15:43:42.010453 PCI: 00:1e.2: enabled 1
853 15:43:42.010879 SPI: 00: enabled 1
854 15:43:42.013847 PCI: 00:1e.3: enabled 1
855 15:43:42.017004 SPI: 01: enabled 1
856 15:43:42.017610 PCI: 00:1f.0: enabled 1
857 15:43:42.020390 PNP: 0c09.0: enabled 1
858 15:43:42.024148 PCI: 00:1f.1: enabled 1
859 15:43:42.026975 PCI: 00:1f.2: enabled 1
860 15:43:42.030284 PCI: 00:1f.3: enabled 1
861 15:43:42.030707 PCI: 00:1f.4: enabled 1
862 15:43:42.033771 PCI: 00:1f.5: enabled 1
863 15:43:42.037023 PCI: 00:1f.6: enabled 0
864 15:43:42.040396 Root Device scanning...
865 15:43:42.043965 scan_static_bus for Root Device
866 15:43:42.046912 CPU_CLUSTER: 0 enabled
867 15:43:42.047420 DOMAIN: 0000 enabled
868 15:43:42.050743 DOMAIN: 0000 scanning...
869 15:43:42.053528 PCI: pci_scan_bus for bus 00
870 15:43:42.056957 PCI: 00:00.0 [8086/0000] ops
871 15:43:42.060343 PCI: 00:00.0 [8086/9b61] enabled
872 15:43:42.063664 PCI: 00:02.0 [8086/0000] bus ops
873 15:43:42.066987 PCI: 00:02.0 [8086/9b41] enabled
874 15:43:42.070123 PCI: 00:04.0 [8086/1903] disabled
875 15:43:42.073627 PCI: 00:08.0 [8086/1911] enabled
876 15:43:42.076952 PCI: 00:12.0 [8086/02f9] enabled
877 15:43:42.080228 PCI: 00:14.0 [8086/0000] bus ops
878 15:43:42.083235 PCI: 00:14.0 [8086/02ed] enabled
879 15:43:42.086908 PCI: 00:14.2 [8086/02ef] enabled
880 15:43:42.090251 PCI: 00:14.3 [8086/02f0] enabled
881 15:43:42.093546 PCI: 00:15.0 [8086/0000] bus ops
882 15:43:42.096832 PCI: 00:15.0 [8086/02e8] enabled
883 15:43:42.100251 PCI: 00:15.1 [8086/0000] bus ops
884 15:43:42.103446 PCI: 00:15.1 [8086/02e9] enabled
885 15:43:42.106896 PCI: 00:16.0 [8086/0000] ops
886 15:43:42.110297 PCI: 00:16.0 [8086/02e0] enabled
887 15:43:42.113581 PCI: 00:17.0 [8086/0000] ops
888 15:43:42.117083 PCI: 00:17.0 [8086/02d3] enabled
889 15:43:42.120556 PCI: 00:19.0 [8086/0000] bus ops
890 15:43:42.123479 PCI: 00:19.0 [8086/02c5] enabled
891 15:43:42.126848 PCI: 00:1d.0 [8086/0000] bus ops
892 15:43:42.130192 PCI: 00:1d.0 [8086/02b0] enabled
893 15:43:42.133519 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 15:43:42.137009 PCI: 00:1e.0 [8086/0000] ops
895 15:43:42.140315 PCI: 00:1e.0 [8086/02a8] enabled
896 15:43:42.143535 PCI: 00:1e.2 [8086/0000] bus ops
897 15:43:42.146812 PCI: 00:1e.2 [8086/02aa] enabled
898 15:43:42.149997 PCI: 00:1e.3 [8086/0000] bus ops
899 15:43:42.153706 PCI: 00:1e.3 [8086/02ab] enabled
900 15:43:42.156545 PCI: 00:1f.0 [8086/0000] bus ops
901 15:43:42.159994 PCI: 00:1f.0 [8086/0284] enabled
902 15:43:42.166711 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 15:43:42.173052 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 15:43:42.176322 PCI: 00:1f.3 [8086/0000] bus ops
905 15:43:42.180057 PCI: 00:1f.3 [8086/02c8] enabled
906 15:43:42.183284 PCI: 00:1f.4 [8086/0000] bus ops
907 15:43:42.186611 PCI: 00:1f.4 [8086/02a3] enabled
908 15:43:42.189902 PCI: 00:1f.5 [8086/0000] bus ops
909 15:43:42.193271 PCI: 00:1f.5 [8086/02a4] enabled
910 15:43:42.196432 PCI: Leftover static devices:
911 15:43:42.196854 PCI: 00:05.0
912 15:43:42.197249 PCI: 00:12.5
913 15:43:42.199786 PCI: 00:12.6
914 15:43:42.200209 PCI: 00:14.1
915 15:43:42.203160 PCI: 00:14.5
916 15:43:42.203579 PCI: 00:15.2
917 15:43:42.203964 PCI: 00:15.3
918 15:43:42.206253 PCI: 00:16.1
919 15:43:42.206669 PCI: 00:16.2
920 15:43:42.209501 PCI: 00:16.3
921 15:43:42.210164 PCI: 00:16.4
922 15:43:42.212965 PCI: 00:16.5
923 15:43:42.213578 PCI: 00:19.1
924 15:43:42.214212 PCI: 00:19.2
925 15:43:42.216271 PCI: 00:1a.0
926 15:43:42.216906 PCI: 00:1c.0
927 15:43:42.219561 PCI: 00:1c.1
928 15:43:42.220224 PCI: 00:1c.2
929 15:43:42.220842 PCI: 00:1c.3
930 15:43:42.222921 PCI: 00:1c.4
931 15:43:42.223487 PCI: 00:1c.5
932 15:43:42.226055 PCI: 00:1c.6
933 15:43:42.226618 PCI: 00:1c.7
934 15:43:42.227138 PCI: 00:1d.1
935 15:43:42.229388 PCI: 00:1d.2
936 15:43:42.229982 PCI: 00:1d.3
937 15:43:42.232747 PCI: 00:1d.4
938 15:43:42.233311 PCI: 00:1d.5
939 15:43:42.236040 PCI: 00:1e.1
940 15:43:42.236600 PCI: 00:1f.1
941 15:43:42.237111 PCI: 00:1f.2
942 15:43:42.239251 PCI: 00:1f.6
943 15:43:42.242843 PCI: Check your devicetree.cb.
944 15:43:42.243470 PCI: 00:02.0 scanning...
945 15:43:42.249114 scan_generic_bus for PCI: 00:02.0
946 15:43:42.252499 scan_generic_bus for PCI: 00:02.0 done
947 15:43:42.255893 scan_bus: scanning of bus PCI: 00:02.0 took 10188 usecs
948 15:43:42.258893 PCI: 00:14.0 scanning...
949 15:43:42.262098 scan_static_bus for PCI: 00:14.0
950 15:43:42.265495 USB0 port 0 enabled
951 15:43:42.268773 USB0 port 0 scanning...
952 15:43:42.272247 scan_static_bus for USB0 port 0
953 15:43:42.272325 USB2 port 0 enabled
954 15:43:42.275668 USB2 port 1 enabled
955 15:43:42.278950 USB2 port 2 disabled
956 15:43:42.279072 USB2 port 3 disabled
957 15:43:42.282324 USB2 port 5 disabled
958 15:43:42.282431 USB2 port 6 enabled
959 15:43:42.285401 USB2 port 9 enabled
960 15:43:42.289169 USB3 port 0 enabled
961 15:43:42.289281 USB3 port 1 enabled
962 15:43:42.292358 USB3 port 2 enabled
963 15:43:42.295476 USB3 port 3 enabled
964 15:43:42.295612 USB3 port 4 disabled
965 15:43:42.298684 USB2 port 0 scanning...
966 15:43:42.302317 scan_static_bus for USB2 port 0
967 15:43:42.305703 scan_static_bus for USB2 port 0 done
968 15:43:42.312159 scan_bus: scanning of bus USB2 port 0 took 9746 usecs
969 15:43:42.312266 USB2 port 1 scanning...
970 15:43:42.315459 scan_static_bus for USB2 port 1
971 15:43:42.322108 scan_static_bus for USB2 port 1 done
972 15:43:42.325558 scan_bus: scanning of bus USB2 port 1 took 9697 usecs
973 15:43:42.328874 USB2 port 6 scanning...
974 15:43:42.332152 scan_static_bus for USB2 port 6
975 15:43:42.335456 scan_static_bus for USB2 port 6 done
976 15:43:42.342098 scan_bus: scanning of bus USB2 port 6 took 9711 usecs
977 15:43:42.342210 USB2 port 9 scanning...
978 15:43:42.345569 scan_static_bus for USB2 port 9
979 15:43:42.352331 scan_static_bus for USB2 port 9 done
980 15:43:42.355751 scan_bus: scanning of bus USB2 port 9 took 9709 usecs
981 15:43:42.358580 USB3 port 0 scanning...
982 15:43:42.361889 scan_static_bus for USB3 port 0
983 15:43:42.365618 scan_static_bus for USB3 port 0 done
984 15:43:42.371854 scan_bus: scanning of bus USB3 port 0 took 9697 usecs
985 15:43:42.371999 USB3 port 1 scanning...
986 15:43:42.375674 scan_static_bus for USB3 port 1
987 15:43:42.381864 scan_static_bus for USB3 port 1 done
988 15:43:42.385789 scan_bus: scanning of bus USB3 port 1 took 9687 usecs
989 15:43:42.388706 USB3 port 2 scanning...
990 15:43:42.392396 scan_static_bus for USB3 port 2
991 15:43:42.395699 scan_static_bus for USB3 port 2 done
992 15:43:42.402085 scan_bus: scanning of bus USB3 port 2 took 9706 usecs
993 15:43:42.402189 USB3 port 3 scanning...
994 15:43:42.405314 scan_static_bus for USB3 port 3
995 15:43:42.411867 scan_static_bus for USB3 port 3 done
996 15:43:42.415202 scan_bus: scanning of bus USB3 port 3 took 9708 usecs
997 15:43:42.419013 scan_static_bus for USB0 port 0 done
998 15:43:42.425623 scan_bus: scanning of bus USB0 port 0 took 155416 usecs
999 15:43:42.429048 scan_static_bus for PCI: 00:14.0 done
1000 15:43:42.435239 scan_bus: scanning of bus PCI: 00:14.0 took 173039 usecs
1001 15:43:42.438620 PCI: 00:15.0 scanning...
1002 15:43:42.442150 scan_generic_bus for PCI: 00:15.0
1003 15:43:42.445648 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 15:43:42.449013 scan_generic_bus for PCI: 00:15.0 done
1005 15:43:42.455149 scan_bus: scanning of bus PCI: 00:15.0 took 14290 usecs
1006 15:43:42.458504 PCI: 00:15.1 scanning...
1007 15:43:42.461839 scan_generic_bus for PCI: 00:15.1
1008 15:43:42.465264 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 15:43:42.468566 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 15:43:42.471877 scan_generic_bus for PCI: 00:15.1 done
1011 15:43:42.478652 scan_bus: scanning of bus PCI: 00:15.1 took 18616 usecs
1012 15:43:42.481808 PCI: 00:19.0 scanning...
1013 15:43:42.485190 scan_generic_bus for PCI: 00:19.0
1014 15:43:42.488501 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 15:43:42.491880 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 15:43:42.498690 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 15:43:42.502008 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 15:43:42.505151 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 15:43:42.508522 scan_generic_bus for PCI: 00:19.0 done
1020 15:43:42.515479 scan_bus: scanning of bus PCI: 00:19.0 took 30752 usecs
1021 15:43:42.518587 PCI: 00:1d.0 scanning...
1022 15:43:42.521951 do_pci_scan_bridge for PCI: 00:1d.0
1023 15:43:42.525294 PCI: pci_scan_bus for bus 01
1024 15:43:42.528585 PCI: 01:00.0 [1c5c/1327] enabled
1025 15:43:42.531938 Enabling Common Clock Configuration
1026 15:43:42.535256 L1 Sub-State supported from root port 29
1027 15:43:42.538439 L1 Sub-State Support = 0xf
1028 15:43:42.541839 CommonModeRestoreTime = 0x28
1029 15:43:42.545451 Power On Value = 0x16, Power On Scale = 0x0
1030 15:43:42.548679 ASPM: Enabled L1
1031 15:43:42.551619 scan_bus: scanning of bus PCI: 00:1d.0 took 32785 usecs
1032 15:43:42.555140 PCI: 00:1e.2 scanning...
1033 15:43:42.558427 scan_generic_bus for PCI: 00:1e.2
1034 15:43:42.561251 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1035 15:43:42.568256 scan_generic_bus for PCI: 00:1e.2 done
1036 15:43:42.571605 scan_bus: scanning of bus PCI: 00:1e.2 took 14008 usecs
1037 15:43:42.574494 PCI: 00:1e.3 scanning...
1038 15:43:42.578048 scan_generic_bus for PCI: 00:1e.3
1039 15:43:42.581219 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1040 15:43:42.584650 scan_generic_bus for PCI: 00:1e.3 done
1041 15:43:42.591651 scan_bus: scanning of bus PCI: 00:1e.3 took 14007 usecs
1042 15:43:42.594929 PCI: 00:1f.0 scanning...
1043 15:43:42.598290 scan_static_bus for PCI: 00:1f.0
1044 15:43:42.601498 PNP: 0c09.0 enabled
1045 15:43:42.604603 scan_static_bus for PCI: 00:1f.0 done
1046 15:43:42.608368 scan_bus: scanning of bus PCI: 00:1f.0 took 12059 usecs
1047 15:43:42.611591 PCI: 00:1f.3 scanning...
1048 15:43:42.618167 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1049 15:43:42.621225 PCI: 00:1f.4 scanning...
1050 15:43:42.624595 scan_generic_bus for PCI: 00:1f.4
1051 15:43:42.628163 scan_generic_bus for PCI: 00:1f.4 done
1052 15:43:42.635384 scan_bus: scanning of bus PCI: 00:1f.4 took 10197 usecs
1053 15:43:42.635939 PCI: 00:1f.5 scanning...
1054 15:43:42.638244 scan_generic_bus for PCI: 00:1f.5
1055 15:43:42.645193 scan_generic_bus for PCI: 00:1f.5 done
1056 15:43:42.648413 scan_bus: scanning of bus PCI: 00:1f.5 took 10189 usecs
1057 15:43:42.655156 scan_bus: scanning of bus DOMAIN: 0000 took 605083 usecs
1058 15:43:42.658577 scan_static_bus for Root Device done
1059 15:43:42.664733 scan_bus: scanning of bus Root Device took 624967 usecs
1060 15:43:42.665149 done
1061 15:43:42.667949 Chrome EC: UHEPI supported
1062 15:43:42.674626 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1063 15:43:42.681408 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1064 15:43:42.684779 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1065 15:43:42.693115 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1066 15:43:42.696438 SPI flash protection: WPSW=0 SRP0=0
1067 15:43:42.703045 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 15:43:42.706399 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1069 15:43:42.709540 found VGA at PCI: 00:02.0
1070 15:43:42.713032 Setting up VGA for PCI: 00:02.0
1071 15:43:42.719573 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 15:43:42.722947 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 15:43:42.726201 Allocating resources...
1074 15:43:42.729472 Reading resources...
1075 15:43:42.732897 Root Device read_resources bus 0 link: 0
1076 15:43:42.736289 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 15:43:42.742947 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 15:43:42.746189 DOMAIN: 0000 read_resources bus 0 link: 0
1079 15:43:42.753079 PCI: 00:14.0 read_resources bus 0 link: 0
1080 15:43:42.756373 USB0 port 0 read_resources bus 0 link: 0
1081 15:43:42.764181 USB0 port 0 read_resources bus 0 link: 0 done
1082 15:43:42.767548 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 15:43:42.774931 PCI: 00:15.0 read_resources bus 1 link: 0
1084 15:43:42.778164 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 15:43:42.784972 PCI: 00:15.1 read_resources bus 2 link: 0
1086 15:43:42.788202 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 15:43:42.796062 PCI: 00:19.0 read_resources bus 3 link: 0
1088 15:43:42.802331 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 15:43:42.806083 PCI: 00:1d.0 read_resources bus 1 link: 0
1090 15:43:42.812378 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1091 15:43:42.815966 PCI: 00:1e.2 read_resources bus 4 link: 0
1092 15:43:42.822777 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1093 15:43:42.825593 PCI: 00:1e.3 read_resources bus 5 link: 0
1094 15:43:42.832310 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1095 15:43:42.835549 PCI: 00:1f.0 read_resources bus 0 link: 0
1096 15:43:42.842251 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1097 15:43:42.848790 DOMAIN: 0000 read_resources bus 0 link: 0 done
1098 15:43:42.852119 Root Device read_resources bus 0 link: 0 done
1099 15:43:42.855673 Done reading resources.
1100 15:43:42.858969 Show resources in subtree (Root Device)...After reading.
1101 15:43:42.865584 Root Device child on link 0 CPU_CLUSTER: 0
1102 15:43:42.868937 CPU_CLUSTER: 0 child on link 0 APIC: 00
1103 15:43:42.869352 APIC: 00
1104 15:43:42.872208 APIC: 03
1105 15:43:42.872617 APIC: 06
1106 15:43:42.875734 APIC: 01
1107 15:43:42.876167 APIC: 02
1108 15:43:42.876493 APIC: 07
1109 15:43:42.879006 APIC: 04
1110 15:43:42.879555 APIC: 05
1111 15:43:42.882278 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 15:43:42.892078 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 15:43:42.901743 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1114 15:43:42.905068 PCI: 00:00.0
1115 15:43:42.955728 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 15:43:42.956172 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 15:43:42.956831 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 15:43:42.957193 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 15:43:42.957578 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 15:43:43.005210 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 15:43:43.005664 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 15:43:43.006325 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 15:43:43.006765 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 15:43:43.007123 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1125 15:43:43.007430 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1126 15:43:43.018043 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1127 15:43:43.024647 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1128 15:43:43.034589 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1129 15:43:43.044598 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1130 15:43:43.054448 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1131 15:43:43.054871 PCI: 00:02.0
1132 15:43:43.064503 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1133 15:43:43.077611 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1134 15:43:43.084558 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1135 15:43:43.087370 PCI: 00:04.0
1136 15:43:43.087831 PCI: 00:08.0
1137 15:43:43.097592 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 15:43:43.101077 PCI: 00:12.0
1139 15:43:43.110604 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 15:43:43.114045 PCI: 00:14.0 child on link 0 USB0 port 0
1141 15:43:43.124046 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1142 15:43:43.127224 USB0 port 0 child on link 0 USB2 port 0
1143 15:43:43.130499 USB2 port 0
1144 15:43:43.131114 USB2 port 1
1145 15:43:43.133845 USB2 port 2
1146 15:43:43.134469 USB2 port 3
1147 15:43:43.137187 USB2 port 5
1148 15:43:43.137807 USB2 port 6
1149 15:43:43.140271 USB2 port 9
1150 15:43:43.143711 USB3 port 0
1151 15:43:43.144245 USB3 port 1
1152 15:43:43.147255 USB3 port 2
1153 15:43:43.147905 USB3 port 3
1154 15:43:43.150588 USB3 port 4
1155 15:43:43.151121 PCI: 00:14.2
1156 15:43:43.160159 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 15:43:43.170419 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 15:43:43.173405 PCI: 00:14.3
1159 15:43:43.183332 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 15:43:43.186676 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 15:43:43.196647 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 15:43:43.197326 I2C: 01:15
1163 15:43:43.203537 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 15:43:43.213431 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 15:43:43.214107 I2C: 02:5d
1166 15:43:43.216932 GENERIC: 0.0
1167 15:43:43.217603 PCI: 00:16.0
1168 15:43:43.226162 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 15:43:43.229397 PCI: 00:17.0
1170 15:43:43.236501 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 15:43:43.246007 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 15:43:43.255892 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 15:43:43.262755 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 15:43:43.272864 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 15:43:43.279327 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 15:43:43.285919 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 15:43:43.296057 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 15:43:43.296175 I2C: 03:1a
1179 15:43:43.299422 I2C: 03:38
1180 15:43:43.299541 I2C: 03:39
1181 15:43:43.299647 I2C: 03:3a
1182 15:43:43.302745 I2C: 03:3b
1183 15:43:43.306051 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 15:43:43.316128 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 15:43:43.326072 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 15:43:43.336045 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 15:43:43.336157 PCI: 01:00.0
1188 15:43:43.345798 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 15:43:43.349122 PCI: 00:1e.0
1190 15:43:43.359652 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 15:43:43.369009 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 15:43:43.372733 PCI: 00:1e.2 child on link 0 SPI: 00
1193 15:43:43.382628 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 15:43:43.382715 SPI: 00
1195 15:43:43.389204 PCI: 00:1e.3 child on link 0 SPI: 01
1196 15:43:43.398959 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 15:43:43.399043 SPI: 01
1198 15:43:43.402189 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 15:43:43.412315 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 15:43:43.422464 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1201 15:43:43.422548 PNP: 0c09.0
1202 15:43:43.432571 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1203 15:43:43.432655 PCI: 00:1f.3
1204 15:43:43.442243 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 15:43:43.452037 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1206 15:43:43.455463 PCI: 00:1f.4
1207 15:43:43.465370 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1208 15:43:43.475147 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1209 15:43:43.475248 PCI: 00:1f.5
1210 15:43:43.485353 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1211 15:43:43.492132 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 15:43:43.498480 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 15:43:43.504907 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 15:43:43.508509 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1215 15:43:43.511585 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1216 15:43:43.515032 PCI: 00:17.0 18 * [0x60 - 0x67] io
1217 15:43:43.518555 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1218 15:43:43.524866 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1219 15:43:43.531783 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1220 15:43:43.538163 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1221 15:43:43.548152 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1222 15:43:43.554755 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1223 15:43:43.558117 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1224 15:43:43.568293 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1225 15:43:43.571557 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1226 15:43:43.574815 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1227 15:43:43.581401 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1228 15:43:43.584782 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1229 15:43:43.591678 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1230 15:43:43.595090 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1231 15:43:43.601981 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1232 15:43:43.604751 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1233 15:43:43.611124 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1234 15:43:43.614920 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1235 15:43:43.621634 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1236 15:43:43.625009 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1237 15:43:43.631145 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1238 15:43:43.634559 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1239 15:43:43.641410 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1240 15:43:43.644814 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1241 15:43:43.648121 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1242 15:43:43.654574 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1243 15:43:43.658068 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1244 15:43:43.664266 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1245 15:43:43.667760 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1246 15:43:43.674481 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1247 15:43:43.677844 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1248 15:43:43.687535 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1249 15:43:43.690900 avoid_fixed_resources: DOMAIN: 0000
1250 15:43:43.697966 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1251 15:43:43.704138 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1252 15:43:43.710881 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1253 15:43:43.717554 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1254 15:43:43.724367 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1255 15:43:43.734290 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1256 15:43:43.740991 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1257 15:43:43.747348 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 15:43:43.757514 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1259 15:43:43.764249 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1260 15:43:43.770413 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1261 15:43:43.777136 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1262 15:43:43.780466 Setting resources...
1263 15:43:43.787526 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1264 15:43:43.790199 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1265 15:43:43.793635 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1266 15:43:43.800551 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1267 15:43:43.803607 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1268 15:43:43.810218 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1269 15:43:43.813710 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 15:43:43.820360 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 15:43:43.830255 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1272 15:43:43.833257 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 15:43:43.839438 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 15:43:43.843041 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 15:43:43.849780 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1276 15:43:43.853228 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1277 15:43:43.860018 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1278 15:43:43.863314 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1279 15:43:43.869623 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1280 15:43:43.873011 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1281 15:43:43.876389 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1282 15:43:43.883267 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1283 15:43:43.886182 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1284 15:43:43.893201 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1285 15:43:43.896461 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1286 15:43:43.902997 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1287 15:43:43.906449 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1288 15:43:43.912642 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1289 15:43:43.916451 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1290 15:43:43.922844 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1291 15:43:43.926552 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1292 15:43:43.932986 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1293 15:43:43.936169 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1294 15:43:43.939687 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1295 15:43:43.949398 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1296 15:43:43.956098 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1297 15:43:43.962990 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1298 15:43:43.969263 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1299 15:43:43.976289 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1300 15:43:43.982912 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1301 15:43:43.986219 Root Device assign_resources, bus 0 link: 0
1302 15:43:43.992841 DOMAIN: 0000 assign_resources, bus 0 link: 0
1303 15:43:43.999526 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1304 15:43:44.009527 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1305 15:43:44.016200 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1306 15:43:44.026284 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1307 15:43:44.032869 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1308 15:43:44.042363 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1309 15:43:44.046084 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 15:43:44.052538 PCI: 00:14.0 assign_resources, bus 0 link: 0
1311 15:43:44.058876 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1312 15:43:44.065871 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1313 15:43:44.076044 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1314 15:43:44.082312 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1315 15:43:44.088880 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 15:43:44.092902 PCI: 00:15.0 assign_resources, bus 1 link: 0
1317 15:43:44.102558 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1318 15:43:44.106038 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 15:43:44.112220 PCI: 00:15.1 assign_resources, bus 2 link: 0
1320 15:43:44.118978 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1321 15:43:44.125795 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1322 15:43:44.135678 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1323 15:43:44.142269 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1324 15:43:44.148865 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1325 15:43:44.158775 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1326 15:43:44.165121 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1327 15:43:44.175264 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1328 15:43:44.178749 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 15:43:44.182123 PCI: 00:19.0 assign_resources, bus 3 link: 0
1330 15:43:44.191925 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1331 15:43:44.201405 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1332 15:43:44.208125 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1333 15:43:44.214880 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 15:43:44.221045 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1335 15:43:44.227755 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1336 15:43:44.234739 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1337 15:43:44.244220 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1338 15:43:44.247690 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 15:43:44.250669 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1340 15:43:44.260676 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1341 15:43:44.264151 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 15:43:44.271056 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1343 15:43:44.274222 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 15:43:44.280691 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1345 15:43:44.284064 LPC: Trying to open IO window from 800 size 1ff
1346 15:43:44.294087 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1347 15:43:44.300833 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1348 15:43:44.310763 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1349 15:43:44.317132 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1350 15:43:44.320641 DOMAIN: 0000 assign_resources, bus 0 link: 0
1351 15:43:44.327333 Root Device assign_resources, bus 0 link: 0
1352 15:43:44.330669 Done setting resources.
1353 15:43:44.337424 Show resources in subtree (Root Device)...After assigning values.
1354 15:43:44.340549 Root Device child on link 0 CPU_CLUSTER: 0
1355 15:43:44.343793 CPU_CLUSTER: 0 child on link 0 APIC: 00
1356 15:43:44.343866 APIC: 00
1357 15:43:44.347246 APIC: 03
1358 15:43:44.347361 APIC: 06
1359 15:43:44.350597 APIC: 01
1360 15:43:44.350671 APIC: 02
1361 15:43:44.350729 APIC: 07
1362 15:43:44.353969 APIC: 04
1363 15:43:44.354046 APIC: 05
1364 15:43:44.357148 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1365 15:43:44.367205 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1366 15:43:44.380299 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1367 15:43:44.380389 PCI: 00:00.0
1368 15:43:44.390048 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1369 15:43:44.400112 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1370 15:43:44.410187 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1371 15:43:44.419614 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1372 15:43:44.426243 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1373 15:43:44.436357 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1374 15:43:44.446414 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1375 15:43:44.455947 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1376 15:43:44.465932 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1377 15:43:44.472648 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1378 15:43:44.482677 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1379 15:43:44.492437 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1380 15:43:44.502436 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1381 15:43:44.512253 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1382 15:43:44.522083 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1383 15:43:44.532215 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1384 15:43:44.532299 PCI: 00:02.0
1385 15:43:44.541875 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1386 15:43:44.555324 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1387 15:43:44.561740 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1388 15:43:44.565007 PCI: 00:04.0
1389 15:43:44.565174 PCI: 00:08.0
1390 15:43:44.578638 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1391 15:43:44.578831 PCI: 00:12.0
1392 15:43:44.588241 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1393 15:43:44.591394 PCI: 00:14.0 child on link 0 USB0 port 0
1394 15:43:44.605177 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1395 15:43:44.608495 USB0 port 0 child on link 0 USB2 port 0
1396 15:43:44.608794 USB2 port 0
1397 15:43:44.611928 USB2 port 1
1398 15:43:44.614752 USB2 port 2
1399 15:43:44.615166 USB2 port 3
1400 15:43:44.618204 USB2 port 5
1401 15:43:44.618623 USB2 port 6
1402 15:43:44.621489 USB2 port 9
1403 15:43:44.621905 USB3 port 0
1404 15:43:44.624820 USB3 port 1
1405 15:43:44.625240 USB3 port 2
1406 15:43:44.628265 USB3 port 3
1407 15:43:44.628680 USB3 port 4
1408 15:43:44.631588 PCI: 00:14.2
1409 15:43:44.641210 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1410 15:43:44.651629 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1411 15:43:44.654450 PCI: 00:14.3
1412 15:43:44.664661 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1413 15:43:44.667845 PCI: 00:15.0 child on link 0 I2C: 01:15
1414 15:43:44.677889 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1415 15:43:44.681234 I2C: 01:15
1416 15:43:44.684266 PCI: 00:15.1 child on link 0 I2C: 02:5d
1417 15:43:44.694588 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1418 15:43:44.695012 I2C: 02:5d
1419 15:43:44.697689 GENERIC: 0.0
1420 15:43:44.698106 PCI: 00:16.0
1421 15:43:44.710888 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1422 15:43:44.711382 PCI: 00:17.0
1423 15:43:44.720704 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1424 15:43:44.730314 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1425 15:43:44.740368 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1426 15:43:44.750341 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1427 15:43:44.756503 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1428 15:43:44.769981 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1429 15:43:44.773453 PCI: 00:19.0 child on link 0 I2C: 03:1a
1430 15:43:44.783047 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1431 15:43:44.783131 I2C: 03:1a
1432 15:43:44.786411 I2C: 03:38
1433 15:43:44.786493 I2C: 03:39
1434 15:43:44.789596 I2C: 03:3a
1435 15:43:44.789677 I2C: 03:3b
1436 15:43:44.796449 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1437 15:43:44.802914 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1438 15:43:44.816039 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1439 15:43:44.826187 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1440 15:43:44.826278 PCI: 01:00.0
1441 15:43:44.836089 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1442 15:43:44.839496 PCI: 00:1e.0
1443 15:43:44.849660 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1444 15:43:44.859342 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1445 15:43:44.866051 PCI: 00:1e.2 child on link 0 SPI: 00
1446 15:43:44.875571 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1447 15:43:44.875663 SPI: 00
1448 15:43:44.878988 PCI: 00:1e.3 child on link 0 SPI: 01
1449 15:43:44.888773 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1450 15:43:44.892502 SPI: 01
1451 15:43:44.895765 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1452 15:43:44.905581 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1453 15:43:44.912348 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1454 15:43:44.915504 PNP: 0c09.0
1455 15:43:44.925605 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1456 15:43:44.925693 PCI: 00:1f.3
1457 15:43:44.935110 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1458 15:43:44.945934 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1459 15:43:44.948482 PCI: 00:1f.4
1460 15:43:44.958794 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1461 15:43:44.968765 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1462 15:43:44.969065 PCI: 00:1f.5
1463 15:43:44.978463 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1464 15:43:44.981827 Done allocating resources.
1465 15:43:44.988596 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1466 15:43:44.991828 Enabling resources...
1467 15:43:44.995255 PCI: 00:00.0 subsystem <- 8086/9b61
1468 15:43:44.998353 PCI: 00:00.0 cmd <- 06
1469 15:43:45.001563 PCI: 00:02.0 subsystem <- 8086/9b41
1470 15:43:45.005053 PCI: 00:02.0 cmd <- 03
1471 15:43:45.005476 PCI: 00:08.0 cmd <- 06
1472 15:43:45.011840 PCI: 00:12.0 subsystem <- 8086/02f9
1473 15:43:45.012318 PCI: 00:12.0 cmd <- 02
1474 15:43:45.015002 PCI: 00:14.0 subsystem <- 8086/02ed
1475 15:43:45.018368 PCI: 00:14.0 cmd <- 02
1476 15:43:45.021420 PCI: 00:14.2 cmd <- 02
1477 15:43:45.024996 PCI: 00:14.3 subsystem <- 8086/02f0
1478 15:43:45.028441 PCI: 00:14.3 cmd <- 02
1479 15:43:45.031491 PCI: 00:15.0 subsystem <- 8086/02e8
1480 15:43:45.035112 PCI: 00:15.0 cmd <- 02
1481 15:43:45.038429 PCI: 00:15.1 subsystem <- 8086/02e9
1482 15:43:45.041600 PCI: 00:15.1 cmd <- 02
1483 15:43:45.044963 PCI: 00:16.0 subsystem <- 8086/02e0
1484 15:43:45.048366 PCI: 00:16.0 cmd <- 02
1485 15:43:45.051085 PCI: 00:17.0 subsystem <- 8086/02d3
1486 15:43:45.051491 PCI: 00:17.0 cmd <- 03
1487 15:43:45.057882 PCI: 00:19.0 subsystem <- 8086/02c5
1488 15:43:45.058291 PCI: 00:19.0 cmd <- 02
1489 15:43:45.061192 PCI: 00:1d.0 bridge ctrl <- 0013
1490 15:43:45.064547 PCI: 00:1d.0 subsystem <- 8086/02b0
1491 15:43:45.067963 PCI: 00:1d.0 cmd <- 06
1492 15:43:45.071071 PCI: 00:1e.0 subsystem <- 8086/02a8
1493 15:43:45.074626 PCI: 00:1e.0 cmd <- 06
1494 15:43:45.077948 PCI: 00:1e.2 subsystem <- 8086/02aa
1495 15:43:45.081152 PCI: 00:1e.2 cmd <- 06
1496 15:43:45.084521 PCI: 00:1e.3 subsystem <- 8086/02ab
1497 15:43:45.087943 PCI: 00:1e.3 cmd <- 02
1498 15:43:45.090768 PCI: 00:1f.0 subsystem <- 8086/0284
1499 15:43:45.094264 PCI: 00:1f.0 cmd <- 407
1500 15:43:45.097675 PCI: 00:1f.3 subsystem <- 8086/02c8
1501 15:43:45.101060 PCI: 00:1f.3 cmd <- 02
1502 15:43:45.104333 PCI: 00:1f.4 subsystem <- 8086/02a3
1503 15:43:45.107304 PCI: 00:1f.4 cmd <- 03
1504 15:43:45.111175 PCI: 00:1f.5 subsystem <- 8086/02a4
1505 15:43:45.111604 PCI: 00:1f.5 cmd <- 406
1506 15:43:45.121502 PCI: 01:00.0 cmd <- 02
1507 15:43:45.126419 done.
1508 15:43:45.135584 ME: Version: 14.0.39.1367
1509 15:43:45.142332 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1510 15:43:45.145585 Initializing devices...
1511 15:43:45.146013 Root Device init ...
1512 15:43:45.151988 Chrome EC: Set SMI mask to 0x0000000000000000
1513 15:43:45.155458 Chrome EC: clear events_b mask to 0x0000000000000000
1514 15:43:45.162101 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1515 15:43:45.168359 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1516 15:43:45.175025 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1517 15:43:45.178439 Chrome EC: Set WAKE mask to 0x0000000000000000
1518 15:43:45.182073 Root Device init finished in 35156 usecs
1519 15:43:45.185531 CPU_CLUSTER: 0 init ...
1520 15:43:45.191709 CPU_CLUSTER: 0 init finished in 2446 usecs
1521 15:43:45.196096 PCI: 00:00.0 init ...
1522 15:43:45.199521 CPU TDP: 15 Watts
1523 15:43:45.203006 CPU PL2 = 64 Watts
1524 15:43:45.206322 PCI: 00:00.0 init finished in 7080 usecs
1525 15:43:45.209591 PCI: 00:02.0 init ...
1526 15:43:45.212697 PCI: 00:02.0 init finished in 2252 usecs
1527 15:43:45.215727 PCI: 00:08.0 init ...
1528 15:43:45.218802 PCI: 00:08.0 init finished in 2251 usecs
1529 15:43:45.222139 PCI: 00:12.0 init ...
1530 15:43:45.225997 PCI: 00:12.0 init finished in 2251 usecs
1531 15:43:45.229139 PCI: 00:14.0 init ...
1532 15:43:45.232571 PCI: 00:14.0 init finished in 2252 usecs
1533 15:43:45.235713 PCI: 00:14.2 init ...
1534 15:43:45.238974 PCI: 00:14.2 init finished in 2253 usecs
1535 15:43:45.242256 PCI: 00:14.3 init ...
1536 15:43:45.245358 PCI: 00:14.3 init finished in 2269 usecs
1537 15:43:45.248724 PCI: 00:15.0 init ...
1538 15:43:45.252241 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 15:43:45.255262 PCI: 00:15.0 init finished in 5976 usecs
1540 15:43:45.258968 PCI: 00:15.1 init ...
1541 15:43:45.262175 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 15:43:45.269035 PCI: 00:15.1 init finished in 5977 usecs
1543 15:43:45.269442 PCI: 00:16.0 init ...
1544 15:43:45.275228 PCI: 00:16.0 init finished in 2253 usecs
1545 15:43:45.278553 PCI: 00:19.0 init ...
1546 15:43:45.281884 DW I2C bus 4 at 0xd1222000 (400 KHz)
1547 15:43:45.285331 PCI: 00:19.0 init finished in 5976 usecs
1548 15:43:45.288707 PCI: 00:1d.0 init ...
1549 15:43:45.292070 Initializing PCH PCIe bridge.
1550 15:43:45.295436 PCI: 00:1d.0 init finished in 5287 usecs
1551 15:43:45.298309 PCI: 00:1f.0 init ...
1552 15:43:45.301706 IOAPIC: Initializing IOAPIC at 0xfec00000
1553 15:43:45.308487 IOAPIC: Bootstrap Processor Local APIC = 0x00
1554 15:43:45.308913 IOAPIC: ID = 0x02
1555 15:43:45.311788 IOAPIC: Dumping registers
1556 15:43:45.314845 reg 0x0000: 0x02000000
1557 15:43:45.318044 reg 0x0001: 0x00770020
1558 15:43:45.318128 reg 0x0002: 0x00000000
1559 15:43:45.324341 PCI: 00:1f.0 init finished in 23537 usecs
1560 15:43:45.327940 PCI: 00:1f.4 init ...
1561 15:43:45.331182 PCI: 00:1f.4 init finished in 2263 usecs
1562 15:43:45.341810 PCI: 01:00.0 init ...
1563 15:43:45.345070 PCI: 01:00.0 init finished in 2252 usecs
1564 15:43:45.349494 PNP: 0c09.0 init ...
1565 15:43:45.352896 Google Chrome EC uptime: 11.081 seconds
1566 15:43:45.359264 Google Chrome AP resets since EC boot: 0
1567 15:43:45.362686 Google Chrome most recent AP reset causes:
1568 15:43:45.369479 Google Chrome EC reset flags at last EC boot: reset-pin
1569 15:43:45.372778 PNP: 0c09.0 init finished in 20573 usecs
1570 15:43:45.375814 Devices initialized
1571 15:43:45.375893 Show all devs... After init.
1572 15:43:45.378962 Root Device: enabled 1
1573 15:43:45.382318 CPU_CLUSTER: 0: enabled 1
1574 15:43:45.385585 DOMAIN: 0000: enabled 1
1575 15:43:45.385664 APIC: 00: enabled 1
1576 15:43:45.389453 PCI: 00:00.0: enabled 1
1577 15:43:45.392592 PCI: 00:02.0: enabled 1
1578 15:43:45.396088 PCI: 00:04.0: enabled 0
1579 15:43:45.396167 PCI: 00:05.0: enabled 0
1580 15:43:45.398874 PCI: 00:12.0: enabled 1
1581 15:43:45.402100 PCI: 00:12.5: enabled 0
1582 15:43:45.402179 PCI: 00:12.6: enabled 0
1583 15:43:45.406023 PCI: 00:14.0: enabled 1
1584 15:43:45.408818 PCI: 00:14.1: enabled 0
1585 15:43:45.412076 PCI: 00:14.3: enabled 1
1586 15:43:45.412155 PCI: 00:14.5: enabled 0
1587 15:43:45.415536 PCI: 00:15.0: enabled 1
1588 15:43:45.418865 PCI: 00:15.1: enabled 1
1589 15:43:45.422277 PCI: 00:15.2: enabled 0
1590 15:43:45.422356 PCI: 00:15.3: enabled 0
1591 15:43:45.425694 PCI: 00:16.0: enabled 1
1592 15:43:45.429513 PCI: 00:16.1: enabled 0
1593 15:43:45.432139 PCI: 00:16.2: enabled 0
1594 15:43:45.432217 PCI: 00:16.3: enabled 0
1595 15:43:45.435450 PCI: 00:16.4: enabled 0
1596 15:43:45.438774 PCI: 00:16.5: enabled 0
1597 15:43:45.441896 PCI: 00:17.0: enabled 1
1598 15:43:45.441999 PCI: 00:19.0: enabled 1
1599 15:43:45.445419 PCI: 00:19.1: enabled 0
1600 15:43:45.448960 PCI: 00:19.2: enabled 0
1601 15:43:45.449063 PCI: 00:1a.0: enabled 0
1602 15:43:45.452022 PCI: 00:1c.0: enabled 0
1603 15:43:45.455294 PCI: 00:1c.1: enabled 0
1604 15:43:45.458593 PCI: 00:1c.2: enabled 0
1605 15:43:45.458695 PCI: 00:1c.3: enabled 0
1606 15:43:45.461986 PCI: 00:1c.4: enabled 0
1607 15:43:45.465408 PCI: 00:1c.5: enabled 0
1608 15:43:45.468644 PCI: 00:1c.6: enabled 0
1609 15:43:45.468719 PCI: 00:1c.7: enabled 0
1610 15:43:45.471797 PCI: 00:1d.0: enabled 1
1611 15:43:45.474890 PCI: 00:1d.1: enabled 0
1612 15:43:45.478191 PCI: 00:1d.2: enabled 0
1613 15:43:45.478267 PCI: 00:1d.3: enabled 0
1614 15:43:45.481912 PCI: 00:1d.4: enabled 0
1615 15:43:45.485349 PCI: 00:1d.5: enabled 0
1616 15:43:45.485431 PCI: 00:1e.0: enabled 1
1617 15:43:45.488419 PCI: 00:1e.1: enabled 0
1618 15:43:45.491616 PCI: 00:1e.2: enabled 1
1619 15:43:45.494956 PCI: 00:1e.3: enabled 1
1620 15:43:45.495030 PCI: 00:1f.0: enabled 1
1621 15:43:45.498329 PCI: 00:1f.1: enabled 0
1622 15:43:45.501657 PCI: 00:1f.2: enabled 0
1623 15:43:45.505021 PCI: 00:1f.3: enabled 1
1624 15:43:45.505091 PCI: 00:1f.4: enabled 1
1625 15:43:45.508474 PCI: 00:1f.5: enabled 1
1626 15:43:45.511609 PCI: 00:1f.6: enabled 0
1627 15:43:45.515024 USB0 port 0: enabled 1
1628 15:43:45.515092 I2C: 01:15: enabled 1
1629 15:43:45.517900 I2C: 02:5d: enabled 1
1630 15:43:45.521252 GENERIC: 0.0: enabled 1
1631 15:43:45.521330 I2C: 03:1a: enabled 1
1632 15:43:45.524628 I2C: 03:38: enabled 1
1633 15:43:45.528093 I2C: 03:39: enabled 1
1634 15:43:45.528162 I2C: 03:3a: enabled 1
1635 15:43:45.531332 I2C: 03:3b: enabled 1
1636 15:43:45.534794 PCI: 00:00.0: enabled 1
1637 15:43:45.534866 SPI: 00: enabled 1
1638 15:43:45.538106 SPI: 01: enabled 1
1639 15:43:45.541176 PNP: 0c09.0: enabled 1
1640 15:43:45.541247 USB2 port 0: enabled 1
1641 15:43:45.544486 USB2 port 1: enabled 1
1642 15:43:45.548038 USB2 port 2: enabled 0
1643 15:43:45.548115 USB2 port 3: enabled 0
1644 15:43:45.551130 USB2 port 5: enabled 0
1645 15:43:45.554203 USB2 port 6: enabled 1
1646 15:43:45.557902 USB2 port 9: enabled 1
1647 15:43:45.557977 USB3 port 0: enabled 1
1648 15:43:45.561067 USB3 port 1: enabled 1
1649 15:43:45.564448 USB3 port 2: enabled 1
1650 15:43:45.564516 USB3 port 3: enabled 1
1651 15:43:45.567778 USB3 port 4: enabled 0
1652 15:43:45.571100 APIC: 03: enabled 1
1653 15:43:45.571169 APIC: 06: enabled 1
1654 15:43:45.574537 APIC: 01: enabled 1
1655 15:43:45.577955 APIC: 02: enabled 1
1656 15:43:45.578024 APIC: 07: enabled 1
1657 15:43:45.580773 APIC: 04: enabled 1
1658 15:43:45.580844 APIC: 05: enabled 1
1659 15:43:45.584099 PCI: 00:08.0: enabled 1
1660 15:43:45.587445 PCI: 00:14.2: enabled 1
1661 15:43:45.590890 PCI: 01:00.0: enabled 1
1662 15:43:45.594665 Disabling ACPI via APMC:
1663 15:43:45.594740 done.
1664 15:43:45.600946 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 15:43:45.604028 ELOG: NV offset 0xaf0000 size 0x4000
1666 15:43:45.611019 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 15:43:45.617753 ELOG: Event(17) added with size 13 at 2023-08-07 15:43:45 UTC
1668 15:43:45.624033 ELOG: Event(92) added with size 9 at 2023-08-07 15:43:45 UTC
1669 15:43:45.630752 ELOG: Event(93) added with size 9 at 2023-08-07 15:43:45 UTC
1670 15:43:45.637498 ELOG: Event(9A) added with size 9 at 2023-08-07 15:43:45 UTC
1671 15:43:45.644160 ELOG: Event(9E) added with size 10 at 2023-08-07 15:43:45 UTC
1672 15:43:45.650830 ELOG: Event(9F) added with size 14 at 2023-08-07 15:43:45 UTC
1673 15:43:45.653962 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1674 15:43:45.661522 ELOG: Event(A1) added with size 10 at 2023-08-07 15:43:45 UTC
1675 15:43:45.671072 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 15:43:45.677751 ELOG: Event(A0) added with size 9 at 2023-08-07 15:43:45 UTC
1677 15:43:45.681195 elog_add_boot_reason: Logged dev mode boot
1678 15:43:45.684490 Finalize devices...
1679 15:43:45.684568 PCI: 00:17.0 final
1680 15:43:45.687857 Devices finalized
1681 15:43:45.691132 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1682 15:43:45.697911 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1683 15:43:45.701201 ME: HFSTS1 : 0x90000245
1684 15:43:45.704574 ME: HFSTS2 : 0x3B850126
1685 15:43:45.710800 ME: HFSTS3 : 0x00000020
1686 15:43:45.714570 ME: HFSTS4 : 0x00004800
1687 15:43:45.717620 ME: HFSTS5 : 0x00000000
1688 15:43:45.720904 ME: HFSTS6 : 0x40400006
1689 15:43:45.724056 ME: Manufacturing Mode : NO
1690 15:43:45.727489 ME: FW Partition Table : OK
1691 15:43:45.730964 ME: Bringup Loader Failure : NO
1692 15:43:45.734315 ME: Firmware Init Complete : YES
1693 15:43:45.737683 ME: Boot Options Present : NO
1694 15:43:45.741069 ME: Update In Progress : NO
1695 15:43:45.744344 ME: D0i3 Support : YES
1696 15:43:45.747746 ME: Low Power State Enabled : NO
1697 15:43:45.750710 ME: CPU Replaced : NO
1698 15:43:45.754156 ME: CPU Replacement Valid : YES
1699 15:43:45.757491 ME: Current Working State : 5
1700 15:43:45.760778 ME: Current Operation State : 1
1701 15:43:45.764317 ME: Current Operation Mode : 0
1702 15:43:45.767693 ME: Error Code : 0
1703 15:43:45.770660 ME: CPU Debug Disabled : YES
1704 15:43:45.774223 ME: TXT Support : NO
1705 15:43:45.780620 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1706 15:43:45.787267 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 15:43:45.787730 CBFS @ c08000 size 3f8000
1708 15:43:45.794140 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 15:43:45.797359 CBFS: Locating 'fallback/dsdt.aml'
1710 15:43:45.800634 CBFS: Found @ offset 10bb80 size 3fa5
1711 15:43:45.807444 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1712 15:43:45.810738 CBFS @ c08000 size 3f8000
1713 15:43:45.814323 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1714 15:43:45.817541 CBFS: Locating 'fallback/slic'
1715 15:43:45.822374 CBFS: 'fallback/slic' not found.
1716 15:43:45.828652 ACPI: Writing ACPI tables at 99b3e000.
1717 15:43:45.829067 ACPI: * FACS
1718 15:43:45.832215 ACPI: * DSDT
1719 15:43:45.835749 Ramoops buffer: 0x100000@0x99a3d000.
1720 15:43:45.838584 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1721 15:43:45.845263 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1722 15:43:45.848579 Google Chrome EC: version:
1723 15:43:45.852064 ro: helios_v2.0.2659-56403530b
1724 15:43:45.855295 rw: helios_v2.0.2849-c41de27e7d
1725 15:43:45.855788 running image: 1
1726 15:43:45.859736 ACPI: * FADT
1727 15:43:45.860149 SCI is IRQ9
1728 15:43:45.866085 ACPI: added table 1/32, length now 40
1729 15:43:45.866523 ACPI: * SSDT
1730 15:43:45.869754 Found 1 CPU(s) with 8 core(s) each.
1731 15:43:45.872848 Error: Could not locate 'wifi_sar' in VPD.
1732 15:43:45.879384 Checking CBFS for default SAR values
1733 15:43:45.882642 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1734 15:43:45.886219 CBFS @ c08000 size 3f8000
1735 15:43:45.892782 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1736 15:43:45.896190 CBFS: Locating 'wifi_sar_defaults.hex'
1737 15:43:45.898711 CBFS: Found @ offset 5fac0 size 77
1738 15:43:45.902492 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1739 15:43:45.908741 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1740 15:43:45.912003 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1741 15:43:45.919075 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1742 15:43:45.921834 failed to find key in VPD: dsm_calib_r0_0
1743 15:43:45.932201 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1744 15:43:45.935607 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1745 15:43:45.938996 failed to find key in VPD: dsm_calib_r0_1
1746 15:43:45.948659 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1747 15:43:45.955802 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1748 15:43:45.958567 failed to find key in VPD: dsm_calib_r0_2
1749 15:43:45.968404 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1750 15:43:45.971905 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1751 15:43:45.978453 failed to find key in VPD: dsm_calib_r0_3
1752 15:43:45.985065 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1753 15:43:45.992116 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1754 15:43:45.994979 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1755 15:43:45.998306 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1756 15:43:46.002250 EC returned error result code 1
1757 15:43:46.006222 EC returned error result code 1
1758 15:43:46.010057 EC returned error result code 1
1759 15:43:46.016860 PS2K: Bad resp from EC. Vivaldi disabled!
1760 15:43:46.019771 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1761 15:43:46.026247 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1762 15:43:46.033040 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1763 15:43:46.036380 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1764 15:43:46.042574 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1765 15:43:46.049215 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1766 15:43:46.055619 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1767 15:43:46.059409 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1768 15:43:46.065679 ACPI: added table 2/32, length now 44
1769 15:43:46.065760 ACPI: * MCFG
1770 15:43:46.068980 ACPI: added table 3/32, length now 48
1771 15:43:46.072296 ACPI: * TPM2
1772 15:43:46.075613 TPM2 log created at 99a2d000
1773 15:43:46.079076 ACPI: added table 4/32, length now 52
1774 15:43:46.079157 ACPI: * MADT
1775 15:43:46.082285 SCI is IRQ9
1776 15:43:46.085600 ACPI: added table 5/32, length now 56
1777 15:43:46.085681 current = 99b43ac0
1778 15:43:46.089253 ACPI: * DMAR
1779 15:43:46.092331 ACPI: added table 6/32, length now 60
1780 15:43:46.095498 ACPI: * IGD OpRegion
1781 15:43:46.095603 GMA: Found VBT in CBFS
1782 15:43:46.099073 GMA: Found valid VBT in CBFS
1783 15:43:46.102018 ACPI: added table 7/32, length now 64
1784 15:43:46.105668 ACPI: * HPET
1785 15:43:46.109053 ACPI: added table 8/32, length now 68
1786 15:43:46.109133 ACPI: done.
1787 15:43:46.112362 ACPI tables: 31744 bytes.
1788 15:43:46.115525 smbios_write_tables: 99a2c000
1789 15:43:46.118916 EC returned error result code 3
1790 15:43:46.122354 Couldn't obtain OEM name from CBI
1791 15:43:46.125722 Create SMBIOS type 17
1792 15:43:46.129111 PCI: 00:00.0 (Intel Cannonlake)
1793 15:43:46.132589 PCI: 00:14.3 (Intel WiFi)
1794 15:43:46.135758 SMBIOS tables: 939 bytes.
1795 15:43:46.139125 Writing table forward entry at 0x00000500
1796 15:43:46.145279 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1797 15:43:46.149061 Writing coreboot table at 0x99b62000
1798 15:43:46.155299 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1799 15:43:46.158925 1. 0000000000001000-000000000009ffff: RAM
1800 15:43:46.162263 2. 00000000000a0000-00000000000fffff: RESERVED
1801 15:43:46.168800 3. 0000000000100000-0000000099a2bfff: RAM
1802 15:43:46.172053 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1803 15:43:46.178878 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1804 15:43:46.185014 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1805 15:43:46.188457 7. 000000009a000000-000000009f7fffff: RESERVED
1806 15:43:46.195017 8. 00000000e0000000-00000000efffffff: RESERVED
1807 15:43:46.198669 9. 00000000fc000000-00000000fc000fff: RESERVED
1808 15:43:46.201781 10. 00000000fe000000-00000000fe00ffff: RESERVED
1809 15:43:46.208594 11. 00000000fed10000-00000000fed17fff: RESERVED
1810 15:43:46.211611 12. 00000000fed80000-00000000fed83fff: RESERVED
1811 15:43:46.218219 13. 00000000fed90000-00000000fed91fff: RESERVED
1812 15:43:46.221885 14. 00000000feda0000-00000000feda1fff: RESERVED
1813 15:43:46.228091 15. 0000000100000000-000000045e7fffff: RAM
1814 15:43:46.231490 Graphics framebuffer located at 0xc0000000
1815 15:43:46.234600 Passing 5 GPIOs to payload:
1816 15:43:46.237999 NAME | PORT | POLARITY | VALUE
1817 15:43:46.244577 write protect | undefined | high | low
1818 15:43:46.248016 lid | undefined | high | high
1819 15:43:46.254854 power | undefined | high | low
1820 15:43:46.261288 oprom | undefined | high | low
1821 15:43:46.264822 EC in RW | 0x000000cb | high | low
1822 15:43:46.267992 Board ID: 4
1823 15:43:46.271224 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1824 15:43:46.274478 CBFS @ c08000 size 3f8000
1825 15:43:46.281488 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1826 15:43:46.287611 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1827 15:43:46.287734 coreboot table: 1492 bytes.
1828 15:43:46.291006 IMD ROOT 0. 99fff000 00001000
1829 15:43:46.294317 IMD SMALL 1. 99ffe000 00001000
1830 15:43:46.297717 FSP MEMORY 2. 99c4e000 003b0000
1831 15:43:46.301266 CONSOLE 3. 99c2e000 00020000
1832 15:43:46.304597 FMAP 4. 99c2d000 0000054e
1833 15:43:46.307798 TIME STAMP 5. 99c2c000 00000910
1834 15:43:46.310972 VBOOT WORK 6. 99c18000 00014000
1835 15:43:46.314228 MRC DATA 7. 99c16000 00001958
1836 15:43:46.317561 ROMSTG STCK 8. 99c15000 00001000
1837 15:43:46.321172 AFTER CAR 9. 99c0b000 0000a000
1838 15:43:46.324417 RAMSTAGE 10. 99baf000 0005c000
1839 15:43:46.327584 REFCODE 11. 99b7a000 00035000
1840 15:43:46.331095 SMM BACKUP 12. 99b6a000 00010000
1841 15:43:46.334345 COREBOOT 13. 99b62000 00008000
1842 15:43:46.337616 ACPI 14. 99b3e000 00024000
1843 15:43:46.340896 ACPI GNVS 15. 99b3d000 00001000
1844 15:43:46.344171 RAMOOPS 16. 99a3d000 00100000
1845 15:43:46.347534 TPM2 TCGLOG17. 99a2d000 00010000
1846 15:43:46.351017 SMBIOS 18. 99a2c000 00000800
1847 15:43:46.353842 IMD small region:
1848 15:43:46.357243 IMD ROOT 0. 99ffec00 00000400
1849 15:43:46.360610 FSP RUNTIME 1. 99ffebe0 00000004
1850 15:43:46.364488 EC HOSTEVENT 2. 99ffebc0 00000008
1851 15:43:46.368031 POWER STATE 3. 99ffeb80 00000040
1852 15:43:46.370631 ROMSTAGE 4. 99ffeb60 00000004
1853 15:43:46.373848 MEM INFO 5. 99ffe9a0 000001b9
1854 15:43:46.377426 VPD 6. 99ffe920 0000006c
1855 15:43:46.380851 MTRR: Physical address space:
1856 15:43:46.387500 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1857 15:43:46.393683 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1858 15:43:46.400291 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1859 15:43:46.407278 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1860 15:43:46.413823 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1861 15:43:46.420478 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1862 15:43:46.426923 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1863 15:43:46.430091 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 15:43:46.433692 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 15:43:46.436598 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 15:43:46.443244 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 15:43:46.446599 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 15:43:46.450004 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 15:43:46.453322 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 15:43:46.456701 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 15:43:46.463296 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 15:43:46.466776 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 15:43:46.470123 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 15:43:46.473398 call enable_fixed_mtrr()
1875 15:43:46.476634 CPU physical address size: 39 bits
1876 15:43:46.483136 MTRR: default type WB/UC MTRR counts: 6/8.
1877 15:43:46.486364 MTRR: WB selected as default type.
1878 15:43:46.493037 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1879 15:43:46.496420 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1880 15:43:46.503293 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1881 15:43:46.509806 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1882 15:43:46.516088 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1883 15:43:46.523022 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1884 15:43:46.525968 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 15:43:46.532644 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 15:43:46.536242 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 15:43:46.539176 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 15:43:46.542914 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 15:43:46.549581 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 15:43:46.552976 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 15:43:46.556332 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 15:43:46.559721 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 15:43:46.566376 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 15:43:46.569818 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 15:43:46.570234
1896 15:43:46.570560 MTRR check
1897 15:43:46.572502 Fixed MTRRs : Enabled
1898 15:43:46.576001 Variable MTRRs: Enabled
1899 15:43:46.576414
1900 15:43:46.579330 call enable_fixed_mtrr()
1901 15:43:46.582470 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1902 15:43:46.586273 CPU physical address size: 39 bits
1903 15:43:46.592905 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1904 15:43:46.596333 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 15:43:46.599718 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 15:43:46.606516 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 15:43:46.609753 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 15:43:46.613028 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 15:43:46.616330 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 15:43:46.622949 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 15:43:46.625979 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 15:43:46.629146 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 15:43:46.632639 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 15:43:46.635953 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 15:43:46.642627 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 15:43:46.646221 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 15:43:46.649242 call enable_fixed_mtrr()
1918 15:43:46.652632 MTRR: Fixed MSR 0x259 0x0000000000000000
1919 15:43:46.655887 MTRR: Fixed MSR 0x268 0x0606060606060606
1920 15:43:46.662137 MTRR: Fixed MSR 0x269 0x0606060606060606
1921 15:43:46.666166 MTRR: Fixed MSR 0x26a 0x0606060606060606
1922 15:43:46.668943 MTRR: Fixed MSR 0x26b 0x0606060606060606
1923 15:43:46.672350 MTRR: Fixed MSR 0x26c 0x0606060606060606
1924 15:43:46.675687 MTRR: Fixed MSR 0x26d 0x0606060606060606
1925 15:43:46.682316 MTRR: Fixed MSR 0x26e 0x0606060606060606
1926 15:43:46.685675 MTRR: Fixed MSR 0x26f 0x0606060606060606
1927 15:43:46.688909 CPU physical address size: 39 bits
1928 15:43:46.692051 call enable_fixed_mtrr()
1929 15:43:46.695715 CBFS @ c08000 size 3f8000
1930 15:43:46.699134 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1931 15:43:46.705549 CPU physical address size: 39 bits
1932 15:43:46.708848 MTRR: Fixed MSR 0x250 0x0606060606060606
1933 15:43:46.712214 MTRR: Fixed MSR 0x250 0x0606060606060606
1934 15:43:46.715415 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 15:43:46.718672 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 15:43:46.725359 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 15:43:46.728533 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 15:43:46.732171 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 15:43:46.735343 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 15:43:46.741676 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 15:43:46.744786 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 15:43:46.747978 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 15:43:46.751575 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 15:43:46.757925 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 15:43:46.758019 call enable_fixed_mtrr()
1946 15:43:46.764472 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 15:43:46.767795 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 15:43:46.771132 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 15:43:46.774523 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 15:43:46.781062 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 15:43:46.784541 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 15:43:46.787830 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 15:43:46.791158 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 15:43:46.797593 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 15:43:46.800745 CPU physical address size: 39 bits
1956 15:43:46.804089 call enable_fixed_mtrr()
1957 15:43:46.807458 CBFS: Locating 'fallback/payload'
1958 15:43:46.811160 MTRR: Fixed MSR 0x250 0x0606060606060606
1959 15:43:46.814002 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 15:43:46.817487 MTRR: Fixed MSR 0x258 0x0606060606060606
1961 15:43:46.824121 MTRR: Fixed MSR 0x259 0x0000000000000000
1962 15:43:46.827511 MTRR: Fixed MSR 0x268 0x0606060606060606
1963 15:43:46.830897 MTRR: Fixed MSR 0x269 0x0606060606060606
1964 15:43:46.834334 MTRR: Fixed MSR 0x26a 0x0606060606060606
1965 15:43:46.840593 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 15:43:46.844130 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 15:43:46.847334 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 15:43:46.850424 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 15:43:46.854218 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 15:43:46.860362 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 15:43:46.863624 call enable_fixed_mtrr()
1972 15:43:46.867296 MTRR: Fixed MSR 0x259 0x0000000000000000
1973 15:43:46.870391 MTRR: Fixed MSR 0x268 0x0606060606060606
1974 15:43:46.873711 MTRR: Fixed MSR 0x269 0x0606060606060606
1975 15:43:46.880524 MTRR: Fixed MSR 0x26a 0x0606060606060606
1976 15:43:46.883835 MTRR: Fixed MSR 0x26b 0x0606060606060606
1977 15:43:46.887219 MTRR: Fixed MSR 0x26c 0x0606060606060606
1978 15:43:46.890557 MTRR: Fixed MSR 0x26d 0x0606060606060606
1979 15:43:46.893517 MTRR: Fixed MSR 0x26e 0x0606060606060606
1980 15:43:46.900125 MTRR: Fixed MSR 0x26f 0x0606060606060606
1981 15:43:46.903691 CPU physical address size: 39 bits
1982 15:43:46.906878 call enable_fixed_mtrr()
1983 15:43:46.910285 CBFS: Found @ offset 1c96c0 size 3f798
1984 15:43:46.913503 CPU physical address size: 39 bits
1985 15:43:46.916589 Checking segment from ROM address 0xffdd16f8
1986 15:43:46.920023 CPU physical address size: 39 bits
1987 15:43:46.926528 Checking segment from ROM address 0xffdd1714
1988 15:43:46.929885 Loading segment from ROM address 0xffdd16f8
1989 15:43:46.933385 code (compression=0)
1990 15:43:46.940116 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1991 15:43:46.949844 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1992 15:43:46.953105 it's not compressed!
1993 15:43:47.044519 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1994 15:43:47.051316 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1995 15:43:47.054464 Loading segment from ROM address 0xffdd1714
1996 15:43:47.057586 Entry Point 0x30000000
1997 15:43:47.060797 Loaded segments
1998 15:43:47.066585 Finalizing chipset.
1999 15:43:47.069908 Finalizing SMM.
2000 15:43:47.073309 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2001 15:43:47.076559 mp_park_aps done after 0 msecs.
2002 15:43:47.083168 Jumping to boot code at 30000000(99b62000)
2003 15:43:47.089777 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2004 15:43:47.090200
2005 15:43:47.090543
2006 15:43:47.090921
2007 15:43:47.093140 Starting depthcharge on Helios...
2008 15:43:47.093576
2009 15:43:47.094611 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2010 15:43:47.095083 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2011 15:43:47.095697 Setting prompt string to ['hatch:']
2012 15:43:47.096226 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2013 15:43:47.102867 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2014 15:43:47.103291
2015 15:43:47.109378 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2016 15:43:47.109796
2017 15:43:47.115829 board_setup: Info: eMMC controller not present; skipping
2018 15:43:47.116251
2019 15:43:47.119493 New NVMe Controller 0x30053ac0 @ 00:1d:00
2020 15:43:47.120007
2021 15:43:47.125712 board_setup: Info: SDHCI controller not present; skipping
2022 15:43:47.126129
2023 15:43:47.132743 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2024 15:43:47.133171
2025 15:43:47.133501 Wipe memory regions:
2026 15:43:47.133801
2027 15:43:47.135906 [0x00000000001000, 0x000000000a0000)
2028 15:43:47.136323
2029 15:43:47.142137 [0x00000000100000, 0x00000030000000)
2030 15:43:47.205956
2031 15:43:47.209055 [0x00000030657430, 0x00000099a2c000)
2032 15:43:47.346007
2033 15:43:47.349422 [0x00000100000000, 0x0000045e800000)
2034 15:43:48.731347
2035 15:43:48.731506 R8152: Initializing
2036 15:43:48.731615
2037 15:43:48.734570 Version 9 (ocp_data = 6010)
2038 15:43:48.738780
2039 15:43:48.738876 R8152: Done initializing
2040 15:43:48.738993
2041 15:43:48.742067 Adding net device
2042 15:43:49.351784
2043 15:43:49.352409 R8152: Initializing
2044 15:43:49.352867
2045 15:43:49.355034 Version 6 (ocp_data = 5c30)
2046 15:43:49.355445
2047 15:43:49.358373 R8152: Done initializing
2048 15:43:49.358782
2049 15:43:49.361779 net_add_device: Attemp to include the same device
2050 15:43:49.365659
2051 15:43:49.372217 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2052 15:43:49.372631
2053 15:43:49.372978
2054 15:43:49.373334
2055 15:43:49.374121 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 15:43:49.475090 hatch: tftpboot 192.168.201.1 11224178/tftp-deploy-mdsgycf3/kernel/bzImage 11224178/tftp-deploy-mdsgycf3/kernel/cmdline 11224178/tftp-deploy-mdsgycf3/ramdisk/ramdisk.cpio.gz
2058 15:43:49.475255 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 15:43:49.475341 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2060 15:43:49.479159 tftpboot 192.168.201.1 11224178/tftp-deploy-mdsgycf3/kernel/bzImploy-mdsgycf3/kernel/cmdline 11224178/tftp-deploy-mdsgycf3/ramdisk/ramdisk.cpio.gz
2061 15:43:49.479246
2062 15:43:49.479311 Waiting for link
2063 15:43:49.680683
2064 15:43:49.681174 done.
2065 15:43:49.681514
2066 15:43:49.681913 MAC: 00:24:32:50:1a:5f
2067 15:43:49.682404
2068 15:43:49.684028 Sending DHCP discover... done.
2069 15:43:49.684447
2070 15:43:49.687373 Waiting for reply... done.
2071 15:43:49.688050
2072 15:43:49.690733 Sending DHCP request... done.
2073 15:43:49.691169
2074 15:43:49.697091 Waiting for reply... done.
2075 15:43:49.697509
2076 15:43:49.697834 My ip is 192.168.201.21
2077 15:43:49.698139
2078 15:43:49.700599 The DHCP server ip is 192.168.201.1
2079 15:43:49.703923
2080 15:43:49.706914 TFTP server IP predefined by user: 192.168.201.1
2081 15:43:49.707330
2082 15:43:49.713744 Bootfile predefined by user: 11224178/tftp-deploy-mdsgycf3/kernel/bzImage
2083 15:43:49.714161
2084 15:43:49.716883 Sending tftp read request... done.
2085 15:43:49.717299
2086 15:43:49.725821 Waiting for the transfer...
2087 15:43:49.726299
2088 15:43:50.329007 00000000 ################################################################
2089 15:43:50.329152
2090 15:43:50.907840 00080000 ################################################################
2091 15:43:50.907990
2092 15:43:51.508031 00100000 ################################################################
2093 15:43:51.508180
2094 15:43:52.078988 00180000 ################################################################
2095 15:43:52.079122
2096 15:43:52.622637 00200000 ################################################################
2097 15:43:52.622766
2098 15:43:53.185747 00280000 ################################################################
2099 15:43:53.185894
2100 15:43:53.735539 00300000 ################################################################
2101 15:43:53.735729
2102 15:43:54.336976 00380000 ################################################################
2103 15:43:54.337119
2104 15:43:54.914260 00400000 ################################################################
2105 15:43:54.914407
2106 15:43:55.543793 00480000 ################################################################
2107 15:43:55.544281
2108 15:43:56.115752 00500000 ################################################################
2109 15:43:56.115890
2110 15:43:56.677649 00580000 ################################################################
2111 15:43:56.677788
2112 15:43:57.202260 00600000 ################################################################
2113 15:43:57.202422
2114 15:43:57.745789 00680000 ################################################################
2115 15:43:57.745953
2116 15:43:58.307229 00700000 ################################################################
2117 15:43:58.307365
2118 15:43:58.328064 00780000 ### done.
2119 15:43:58.328154
2120 15:43:58.331481 The bootfile was 7884688 bytes long.
2121 15:43:58.331563
2122 15:43:58.334321 Sending tftp read request... done.
2123 15:43:58.334404
2124 15:43:58.337744 Waiting for the transfer...
2125 15:43:58.337825
2126 15:43:58.882549 00000000 ################################################################
2127 15:43:58.882709
2128 15:43:59.416938 00080000 ################################################################
2129 15:43:59.417090
2130 15:43:59.931261 00100000 ################################################################
2131 15:43:59.931409
2132 15:44:00.463839 00180000 ################################################################
2133 15:44:00.463979
2134 15:44:00.986194 00200000 ################################################################
2135 15:44:00.986342
2136 15:44:01.536826 00280000 ################################################################
2137 15:44:01.536966
2138 15:44:02.179238 00300000 ################################################################
2139 15:44:02.179407
2140 15:44:02.845139 00380000 ################################################################
2141 15:44:02.845345
2142 15:44:03.523101 00400000 ################################################################
2143 15:44:03.523757
2144 15:44:04.177807 00480000 ################################################################
2145 15:44:04.177998
2146 15:44:04.739704 00500000 ############################################################### done.
2147 15:44:04.739896
2148 15:44:04.742654 Sending tftp read request... done.
2149 15:44:04.742741
2150 15:44:04.746020 Waiting for the transfer...
2151 15:44:04.746191
2152 15:44:04.746277 00000000 # done.
2153 15:44:04.746356
2154 15:44:04.756036 Command line loaded dynamically from TFTP file: 11224178/tftp-deploy-mdsgycf3/kernel/cmdline
2155 15:44:04.756214
2156 15:44:04.785960 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11224178/extract-nfsrootfs-xhh5deaz,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2157 15:44:04.786217
2158 15:44:04.789250 ec_init(0): CrosEC protocol v3 supported (256, 256)
2159 15:44:04.795322
2160 15:44:04.798490 Shutting down all USB controllers.
2161 15:44:04.799013
2162 15:44:04.799493 Removing current net device
2163 15:44:04.806073
2164 15:44:04.806670 Finalizing coreboot
2165 15:44:04.807189
2166 15:44:04.813100 Exiting depthcharge with code 4 at timestamp: 25035923
2167 15:44:04.813586
2168 15:44:04.814125
2169 15:44:04.814595 Starting kernel ...
2170 15:44:04.815121
2171 15:44:04.815617
2172 15:44:04.817405 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2173 15:44:04.817971 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2174 15:44:04.818375 Setting prompt string to ['Linux version [0-9]']
2175 15:44:04.818905 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2176 15:44:04.819329 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2178 15:48:28.818739 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2180 15:48:28.819759 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2182 15:48:28.820536 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2185 15:48:28.821788 end: 2 depthcharge-action (duration 00:05:00) [common]
2187 15:48:28.822861 Cleaning after the job
2188 15:48:28.823300 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224178/tftp-deploy-mdsgycf3/ramdisk
2189 15:48:28.827709 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224178/tftp-deploy-mdsgycf3/kernel
2190 15:48:28.833665 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224178/tftp-deploy-mdsgycf3/nfsrootfs
2191 15:48:28.928156 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224178/tftp-deploy-mdsgycf3/modules
2192 15:48:28.928585 start: 5.1 power-off (timeout 00:00:30) [common]
2193 15:48:28.928756 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2194 15:48:29.007747 >> Command sent successfully.
2195 15:48:29.018519 Returned 0 in 0 seconds
2196 15:48:29.119865 end: 5.1 power-off (duration 00:00:00) [common]
2198 15:48:29.121251 start: 5.2 read-feedback (timeout 00:10:00) [common]
2199 15:48:29.122415 Listened to connection for namespace 'common' for up to 1s
2201 15:48:29.123681 Listened to connection for namespace 'common' for up to 1s
2202 15:48:30.123016 Finalising connection for namespace 'common'
2203 15:48:30.123626 Disconnecting from shell: Finalise
2204 15:48:30.124120
2205 15:48:30.225200 end: 5.2 read-feedback (duration 00:00:01) [common]
2206 15:48:30.225343 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11224178
2207 15:48:30.561951 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11224178
2208 15:48:30.562185 JobError: Your job cannot terminate cleanly.