Boot log: asus-cx9400-volteer

    1 15:43:13.898144  lava-dispatcher, installed at version: 2023.05.1
    2 15:43:13.898356  start: 0 validate
    3 15:43:13.898488  Start time: 2023-08-07 15:43:13.898480+00:00 (UTC)
    4 15:43:13.898607  Using caching service: 'http://localhost/cache/?uri=%s'
    5 15:43:13.898740  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 15:43:14.172106  Using caching service: 'http://localhost/cache/?uri=%s'
    7 15:43:14.172888  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 15:43:17.178244  Using caching service: 'http://localhost/cache/?uri=%s'
    9 15:43:17.178965  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 15:43:17.182499  Using caching service: 'http://localhost/cache/?uri=%s'
   11 15:43:17.182620  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 15:43:18.683025  validate duration: 4.78
   14 15:43:18.683289  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 15:43:18.683402  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 15:43:18.683491  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 15:43:18.683623  Not decompressing ramdisk as can be used compressed.
   18 15:43:18.683722  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
   19 15:43:18.683787  saving as /var/lib/lava/dispatcher/tmp/11224164/tftp-deploy-_oddjmd6/ramdisk/initrd.cpio.gz
   20 15:43:18.683848  total size: 5432690 (5MB)
   21 15:43:18.685609  progress   0% (0MB)
   22 15:43:18.687698  progress   5% (0MB)
   23 15:43:18.689144  progress  10% (0MB)
   24 15:43:18.690613  progress  15% (0MB)
   25 15:43:18.692270  progress  20% (1MB)
   26 15:43:18.693688  progress  25% (1MB)
   27 15:43:18.695080  progress  30% (1MB)
   28 15:43:18.696679  progress  35% (1MB)
   29 15:43:18.698070  progress  40% (2MB)
   30 15:43:18.699457  progress  45% (2MB)
   31 15:43:18.700898  progress  50% (2MB)
   32 15:43:18.702454  progress  55% (2MB)
   33 15:43:18.703922  progress  60% (3MB)
   34 15:43:18.705317  progress  65% (3MB)
   35 15:43:18.706877  progress  70% (3MB)
   36 15:43:18.708309  progress  75% (3MB)
   37 15:43:18.709699  progress  80% (4MB)
   38 15:43:18.711087  progress  85% (4MB)
   39 15:43:18.712706  progress  90% (4MB)
   40 15:43:18.714121  progress  95% (4MB)
   41 15:43:18.715834  progress 100% (5MB)
   42 15:43:18.716174  5MB downloaded in 0.03s (160.30MB/s)
   43 15:43:18.716423  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 15:43:18.716915  end: 1.1 download-retry (duration 00:00:00) [common]
   46 15:43:18.717062  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 15:43:18.717206  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 15:43:18.717420  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 15:43:18.717544  saving as /var/lib/lava/dispatcher/tmp/11224164/tftp-deploy-_oddjmd6/kernel/bzImage
   50 15:43:18.717639  total size: 7884688 (7MB)
   51 15:43:18.717701  No compression specified
   52 15:43:18.718931  progress   0% (0MB)
   53 15:43:18.721148  progress   5% (0MB)
   54 15:43:18.723307  progress  10% (0MB)
   55 15:43:18.725497  progress  15% (1MB)
   56 15:43:18.727597  progress  20% (1MB)
   57 15:43:18.729838  progress  25% (1MB)
   58 15:43:18.732004  progress  30% (2MB)
   59 15:43:18.734106  progress  35% (2MB)
   60 15:43:18.736282  progress  40% (3MB)
   61 15:43:18.738371  progress  45% (3MB)
   62 15:43:18.740471  progress  50% (3MB)
   63 15:43:18.742537  progress  55% (4MB)
   64 15:43:18.744609  progress  60% (4MB)
   65 15:43:18.746668  progress  65% (4MB)
   66 15:43:18.748759  progress  70% (5MB)
   67 15:43:18.750825  progress  75% (5MB)
   68 15:43:18.753590  progress  80% (6MB)
   69 15:43:18.755825  progress  85% (6MB)
   70 15:43:18.757883  progress  90% (6MB)
   71 15:43:18.759970  progress  95% (7MB)
   72 15:43:18.762065  progress 100% (7MB)
   73 15:43:18.762258  7MB downloaded in 0.04s (168.54MB/s)
   74 15:43:18.762400  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 15:43:18.762626  end: 1.2 download-retry (duration 00:00:00) [common]
   77 15:43:18.762711  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 15:43:18.762799  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 15:43:18.762941  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
   80 15:43:18.763011  saving as /var/lib/lava/dispatcher/tmp/11224164/tftp-deploy-_oddjmd6/nfsrootfs/full.rootfs.tar
   81 15:43:18.763072  total size: 133380384 (127MB)
   82 15:43:18.763131  Using unxz to decompress xz
   83 15:43:18.767225  progress   0% (0MB)
   84 15:43:19.119094  progress   5% (6MB)
   85 15:43:19.484563  progress  10% (12MB)
   86 15:43:19.789517  progress  15% (19MB)
   87 15:43:19.980017  progress  20% (25MB)
   88 15:43:20.230123  progress  25% (31MB)
   89 15:43:20.582609  progress  30% (38MB)
   90 15:43:20.935354  progress  35% (44MB)
   91 15:43:21.344611  progress  40% (50MB)
   92 15:43:21.741911  progress  45% (57MB)
   93 15:43:22.113620  progress  50% (63MB)
   94 15:43:22.498365  progress  55% (69MB)
   95 15:43:22.869668  progress  60% (76MB)
   96 15:43:23.253590  progress  65% (82MB)
   97 15:43:23.629742  progress  70% (89MB)
   98 15:43:24.013333  progress  75% (95MB)
   99 15:43:24.461387  progress  80% (101MB)
  100 15:43:24.899584  progress  85% (108MB)
  101 15:43:25.176768  progress  90% (114MB)
  102 15:43:25.536861  progress  95% (120MB)
  103 15:43:25.937797  progress 100% (127MB)
  104 15:43:25.943707  127MB downloaded in 7.18s (17.71MB/s)
  105 15:43:25.943998  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 15:43:25.944258  end: 1.3 download-retry (duration 00:00:07) [common]
  108 15:43:25.944348  start: 1.4 download-retry (timeout 00:09:53) [common]
  109 15:43:25.944432  start: 1.4.1 http-download (timeout 00:09:53) [common]
  110 15:43:25.944587  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 15:43:25.944658  saving as /var/lib/lava/dispatcher/tmp/11224164/tftp-deploy-_oddjmd6/modules/modules.tar
  112 15:43:25.944719  total size: 250796 (0MB)
  113 15:43:25.944780  Using unxz to decompress xz
  114 15:43:25.948872  progress  13% (0MB)
  115 15:43:25.949262  progress  26% (0MB)
  116 15:43:25.949505  progress  39% (0MB)
  117 15:43:25.950853  progress  52% (0MB)
  118 15:43:25.952765  progress  65% (0MB)
  119 15:43:25.954667  progress  78% (0MB)
  120 15:43:25.956620  progress  91% (0MB)
  121 15:43:25.958361  progress 100% (0MB)
  122 15:43:25.964105  0MB downloaded in 0.02s (12.34MB/s)
  123 15:43:25.964348  end: 1.4.1 http-download (duration 00:00:00) [common]
  125 15:43:25.964615  end: 1.4 download-retry (duration 00:00:00) [common]
  126 15:43:25.964712  start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
  127 15:43:25.964812  start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
  128 15:43:28.395468  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11224164/extract-nfsrootfs-908n97x8
  129 15:43:28.395828  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  130 15:43:28.395938  start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
  131 15:43:28.396117  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv
  132 15:43:28.396258  makedir: /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin
  133 15:43:28.396369  makedir: /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/tests
  134 15:43:28.396475  makedir: /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/results
  135 15:43:28.396580  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-add-keys
  136 15:43:28.396729  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-add-sources
  137 15:43:28.396867  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-background-process-start
  138 15:43:28.397003  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-background-process-stop
  139 15:43:28.397135  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-common-functions
  140 15:43:28.397264  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-echo-ipv4
  141 15:43:28.397395  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-install-packages
  142 15:43:28.397529  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-installed-packages
  143 15:43:28.397659  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-os-build
  144 15:43:28.397792  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-probe-channel
  145 15:43:28.397924  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-probe-ip
  146 15:43:28.398054  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-target-ip
  147 15:43:28.398183  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-target-mac
  148 15:43:28.398312  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-target-storage
  149 15:43:28.398447  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-test-case
  150 15:43:28.398577  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-test-event
  151 15:43:28.398711  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-test-feedback
  152 15:43:28.398840  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-test-raise
  153 15:43:28.398968  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-test-reference
  154 15:43:28.399097  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-test-runner
  155 15:43:28.399228  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-test-set
  156 15:43:28.399358  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-test-shell
  157 15:43:28.399489  Updating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-install-packages (oe)
  158 15:43:28.399662  Updating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/bin/lava-installed-packages (oe)
  159 15:43:28.399793  Creating /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/environment
  160 15:43:28.399897  LAVA metadata
  161 15:43:28.399972  - LAVA_JOB_ID=11224164
  162 15:43:28.400038  - LAVA_DISPATCHER_IP=192.168.201.1
  163 15:43:28.400141  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
  164 15:43:28.400209  skipped lava-vland-overlay
  165 15:43:28.400285  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  166 15:43:28.400365  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
  167 15:43:28.400427  skipped lava-multinode-overlay
  168 15:43:28.400500  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  169 15:43:28.400583  start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
  170 15:43:28.400657  Loading test definitions
  171 15:43:28.400746  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
  172 15:43:28.400818  Using /lava-11224164 at stage 0
  173 15:43:28.401140  uuid=11224164_1.5.2.3.1 testdef=None
  174 15:43:28.401232  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  175 15:43:28.401318  start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
  176 15:43:28.401837  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  178 15:43:28.402060  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
  179 15:43:28.402710  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  181 15:43:28.402940  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
  182 15:43:28.403615  runner path: /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/0/tests/0_dmesg test_uuid 11224164_1.5.2.3.1
  183 15:43:28.403789  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  185 15:43:28.404023  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
  186 15:43:28.404095  Using /lava-11224164 at stage 1
  187 15:43:28.404407  uuid=11224164_1.5.2.3.5 testdef=None
  188 15:43:28.404497  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  189 15:43:28.404581  start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
  190 15:43:28.405058  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  192 15:43:28.405273  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
  193 15:43:28.405927  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  195 15:43:28.406155  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
  196 15:43:28.406791  runner path: /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/1/tests/1_bootrr test_uuid 11224164_1.5.2.3.5
  197 15:43:28.406946  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  199 15:43:28.407152  Creating lava-test-runner.conf files
  200 15:43:28.407249  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/0 for stage 0
  201 15:43:28.407385  - 0_dmesg
  202 15:43:28.407498  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224164/lava-overlay-dipa_2hv/lava-11224164/1 for stage 1
  203 15:43:28.407630  - 1_bootrr
  204 15:43:28.407743  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  205 15:43:28.407829  start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
  206 15:43:28.415217  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  207 15:43:28.415330  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
  208 15:43:28.415419  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  209 15:43:28.415504  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  210 15:43:28.415590  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
  211 15:43:28.556445  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  212 15:43:28.556834  start: 1.5.4 extract-modules (timeout 00:09:50) [common]
  213 15:43:28.556956  extracting modules file /var/lib/lava/dispatcher/tmp/11224164/tftp-deploy-_oddjmd6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224164/extract-nfsrootfs-908n97x8
  214 15:43:28.570957  extracting modules file /var/lib/lava/dispatcher/tmp/11224164/tftp-deploy-_oddjmd6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224164/extract-overlay-ramdisk-shum3yhc/ramdisk
  215 15:43:28.584727  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  216 15:43:28.584869  start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
  217 15:43:28.584963  [common] Applying overlay to NFS
  218 15:43:28.585035  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224164/compress-overlay-rex4lobx/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11224164/extract-nfsrootfs-908n97x8
  219 15:43:28.593783  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  220 15:43:28.593898  start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
  221 15:43:28.593989  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  222 15:43:28.594080  start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
  223 15:43:28.594157  Building ramdisk /var/lib/lava/dispatcher/tmp/11224164/extract-overlay-ramdisk-shum3yhc/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11224164/extract-overlay-ramdisk-shum3yhc/ramdisk
  224 15:43:28.667106  >> 26159 blocks

  225 15:43:29.205782  rename /var/lib/lava/dispatcher/tmp/11224164/extract-overlay-ramdisk-shum3yhc/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11224164/tftp-deploy-_oddjmd6/ramdisk/ramdisk.cpio.gz
  226 15:43:29.206226  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  227 15:43:29.206349  start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
  228 15:43:29.206451  start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
  229 15:43:29.206545  No mkimage arch provided, not using FIT.
  230 15:43:29.206634  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  231 15:43:29.206720  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  232 15:43:29.206823  end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
  233 15:43:29.206918  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
  234 15:43:29.206997  No LXC device requested
  235 15:43:29.207075  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  236 15:43:29.207162  start: 1.7 deploy-device-env (timeout 00:09:49) [common]
  237 15:43:29.207243  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  238 15:43:29.207314  Checking files for TFTP limit of 4294967296 bytes.
  239 15:43:29.207770  end: 1 tftp-deploy (duration 00:00:11) [common]
  240 15:43:29.207871  start: 2 depthcharge-action (timeout 00:05:00) [common]
  241 15:43:29.207960  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  242 15:43:29.208084  substitutions:
  243 15:43:29.208150  - {DTB}: None
  244 15:43:29.208214  - {INITRD}: 11224164/tftp-deploy-_oddjmd6/ramdisk/ramdisk.cpio.gz
  245 15:43:29.208273  - {KERNEL}: 11224164/tftp-deploy-_oddjmd6/kernel/bzImage
  246 15:43:29.208329  - {LAVA_MAC}: None
  247 15:43:29.208384  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11224164/extract-nfsrootfs-908n97x8
  248 15:43:29.208438  - {NFS_SERVER_IP}: 192.168.201.1
  249 15:43:29.208491  - {PRESEED_CONFIG}: None
  250 15:43:29.208544  - {PRESEED_LOCAL}: None
  251 15:43:29.208596  - {RAMDISK}: 11224164/tftp-deploy-_oddjmd6/ramdisk/ramdisk.cpio.gz
  252 15:43:29.208649  - {ROOT_PART}: None
  253 15:43:29.208704  - {ROOT}: None
  254 15:43:29.208757  - {SERVER_IP}: 192.168.201.1
  255 15:43:29.208810  - {TEE}: None
  256 15:43:29.208862  Parsed boot commands:
  257 15:43:29.208914  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  258 15:43:29.209090  Parsed boot commands: tftpboot 192.168.201.1 11224164/tftp-deploy-_oddjmd6/kernel/bzImage 11224164/tftp-deploy-_oddjmd6/kernel/cmdline 11224164/tftp-deploy-_oddjmd6/ramdisk/ramdisk.cpio.gz
  259 15:43:29.209178  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  260 15:43:29.209262  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  261 15:43:29.209355  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  262 15:43:29.209465  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  263 15:43:29.209551  Not connected, no need to disconnect.
  264 15:43:29.209625  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  265 15:43:29.209705  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  266 15:43:29.209774  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-10'
  267 15:43:29.213738  Setting prompt string to ['lava-test: # ']
  268 15:43:29.214104  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  269 15:43:29.214216  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  270 15:43:29.214314  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  271 15:43:29.214404  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  272 15:43:29.214594  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
  273 15:43:34.341948  >> Command sent successfully.

  274 15:43:34.345593  Returned 0 in 5 seconds
  275 15:43:34.446453  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  277 15:43:34.447966  end: 2.2.2 reset-device (duration 00:00:05) [common]
  278 15:43:34.448477  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  279 15:43:34.448929  Setting prompt string to 'Starting depthcharge on Voema...'
  280 15:43:34.449289  Changing prompt to 'Starting depthcharge on Voema...'
  281 15:43:34.449631  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  282 15:43:34.450834  [Enter `^Ec?' for help]

  283 15:43:36.106947  

  284 15:43:36.107549  

  285 15:43:36.117176  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  286 15:43:36.123102  CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz

  287 15:43:36.126454  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  288 15:43:36.129836  CPU: AES supported, TXT NOT supported, VT supported

  289 15:43:36.136559  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  290 15:43:36.143997  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  291 15:43:36.147109  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  292 15:43:36.150524  VBOOT: Loading verstage.

  293 15:43:36.153915  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  294 15:43:36.160617  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  295 15:43:36.163875  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  296 15:43:36.173951  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  297 15:43:36.180744  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  298 15:43:36.181188  

  299 15:43:36.181528  

  300 15:43:36.193636  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  301 15:43:36.207286  Probing TPM: . done!

  302 15:43:36.210950  TPM ready after 0 ms

  303 15:43:36.214256  Connected to device vid:did:rid of 1ae0:0028:00

  304 15:43:36.225292  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e

  305 15:43:36.232107  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  306 15:43:36.235423  Initialized TPM device CR50 revision 0

  307 15:43:36.286893  tlcl_send_startup: Startup return code is 0

  308 15:43:36.287535  TPM: setup succeeded

  309 15:43:36.302467  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  310 15:43:36.316734  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  311 15:43:36.329418  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  312 15:43:36.339324  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  313 15:43:36.343219  Chrome EC: UHEPI supported

  314 15:43:36.346131  Phase 1

  315 15:43:36.349830  FMAP: area GBB found @ 1805000 (458752 bytes)

  316 15:43:36.359461  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  317 15:43:36.366359  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  318 15:43:36.372600  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  319 15:43:36.379283  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  320 15:43:36.382669  Recovery requested (1009000e)

  321 15:43:36.385742  TPM: Extending digest for VBOOT: boot mode into PCR 0

  322 15:43:36.397831  tlcl_extend: response is 0

  323 15:43:36.404111  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  324 15:43:36.414295  tlcl_extend: response is 0

  325 15:43:36.420678  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  326 15:43:36.427273  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  327 15:43:36.433869  BS: verstage times (exec / console): total (unknown) / 142 ms

  328 15:43:36.434290  

  329 15:43:36.434618  

  330 15:43:36.447303  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  331 15:43:36.454039  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  332 15:43:36.457395  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  333 15:43:36.460091  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  334 15:43:36.467378  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  335 15:43:36.470807  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  336 15:43:36.473467  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  337 15:43:36.476839  TCO_STS:   0000 0000

  338 15:43:36.480139  GEN_PMCON: d0015038 00002200

  339 15:43:36.483565  GBLRST_CAUSE: 00000000 00000000

  340 15:43:36.487025  HPR_CAUSE0: 00000000

  341 15:43:36.487443  prev_sleep_state 5

  342 15:43:36.490382  Boot Count incremented to 19881

  343 15:43:36.497240  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  344 15:43:36.503628  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  345 15:43:36.513155  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  346 15:43:36.519910  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  347 15:43:36.523262  Chrome EC: UHEPI supported

  348 15:43:36.534504  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  349 15:43:36.547699  Probing TPM:  done!

  350 15:43:36.554052  Connected to device vid:did:rid of 1ae0:0028:00

  351 15:43:36.564283  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e

  352 15:43:36.567194  Initialized TPM device CR50 revision 0

  353 15:43:36.582333  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  354 15:43:36.589444  MRC: Hash idx 0x100b comparison successful.

  355 15:43:36.592390  MRC cache found, size faa8

  356 15:43:36.592817  bootmode is set to: 2

  357 15:43:36.595541  SPD index = 2

  358 15:43:36.602540  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  359 15:43:36.605767  SPD: module type is LPDDR4X

  360 15:43:36.608985  SPD: module part number is MT53D1G64D4NW-046

  361 15:43:36.615627  SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb

  362 15:43:36.619050  SPD: device width 16 bits, bus width 16 bits

  363 15:43:36.625344  SPD: module size is 2048 MB (per channel)

  364 15:43:37.055800  CBMEM:

  365 15:43:37.059264  IMD: root @ 0x76fff000 254 entries.

  366 15:43:37.062062  IMD: root @ 0x76ffec00 62 entries.

  367 15:43:37.065115  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  368 15:43:37.071821  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  369 15:43:37.075020  External stage cache:

  370 15:43:37.078261  IMD: root @ 0x7b3ff000 254 entries.

  371 15:43:37.081365  IMD: root @ 0x7b3fec00 62 entries.

  372 15:43:37.096980  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  373 15:43:37.103989  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  374 15:43:37.111053  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  375 15:43:37.123828  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  376 15:43:37.130264  cse_lite: Skip switching to RW in the recovery path

  377 15:43:37.130784  8 DIMMs found

  378 15:43:37.131222  SMM Memory Map

  379 15:43:37.136869  SMRAM       : 0x7b000000 0x800000

  380 15:43:37.139984   Subregion 0: 0x7b000000 0x200000

  381 15:43:37.143297   Subregion 1: 0x7b200000 0x200000

  382 15:43:37.146490   Subregion 2: 0x7b400000 0x400000

  383 15:43:37.147135  top_of_ram = 0x77000000

  384 15:43:37.153415  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  385 15:43:37.160000  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  386 15:43:37.163342  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  387 15:43:37.169861  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  388 15:43:37.176494  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  389 15:43:37.182824  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  390 15:43:37.193081  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  391 15:43:37.199726  Processing 211 relocs. Offset value of 0x74c0b000

  392 15:43:37.206350  BS: romstage times (exec / console): total (unknown) / 277 ms

  393 15:43:37.211859  

  394 15:43:37.212279  

  395 15:43:37.221852  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  396 15:43:37.225270  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  397 15:43:37.234882  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  398 15:43:37.241665  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  399 15:43:37.248201  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  400 15:43:37.254734  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  401 15:43:37.298627  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  402 15:43:37.305155  Processing 5008 relocs. Offset value of 0x75d98000

  403 15:43:37.311902  BS: postcar times (exec / console): total (unknown) / 59 ms

  404 15:43:37.312362  

  405 15:43:37.312707  

  406 15:43:37.322152  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  407 15:43:37.322585  Normal boot

  408 15:43:37.325317  FW_CONFIG value is 0x804c02

  409 15:43:37.328579  PCI: 00:07.0 disabled by fw_config

  410 15:43:37.332092  PCI: 00:07.1 disabled by fw_config

  411 15:43:37.335243  PCI: 00:0d.2 disabled by fw_config

  412 15:43:37.338571  PCI: 00:1c.7 disabled by fw_config

  413 15:43:37.345227  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  414 15:43:37.352020  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  415 15:43:37.355207  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  416 15:43:37.358493  GENERIC: 0.0 disabled by fw_config

  417 15:43:37.365050  GENERIC: 1.0 disabled by fw_config

  418 15:43:37.368554  fw_config match found: DB_USB=USB3_ACTIVE

  419 15:43:37.371960  fw_config match found: DB_USB=USB3_ACTIVE

  420 15:43:37.375323  fw_config match found: DB_USB=USB3_ACTIVE

  421 15:43:37.381901  fw_config match found: DB_USB=USB3_ACTIVE

  422 15:43:37.385238  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  423 15:43:37.391609  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  424 15:43:37.401790  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  425 15:43:37.408353  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  426 15:43:37.411262  microcode: sig=0x806c1 pf=0x80 revision=0x86

  427 15:43:37.418316  microcode: Update skipped, already up-to-date

  428 15:43:37.424577  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  429 15:43:37.452338  Detected 4 core, 8 thread CPU.

  430 15:43:37.455627  Setting up SMI for CPU

  431 15:43:37.458975  IED base = 0x7b400000

  432 15:43:37.462433  IED size = 0x00400000

  433 15:43:37.462857  Will perform SMM setup.

  434 15:43:37.469032  CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.

  435 15:43:37.475543  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  436 15:43:37.481734  Processing 16 relocs. Offset value of 0x00030000

  437 15:43:37.485294  Attempting to start 7 APs

  438 15:43:37.488258  Waiting for 10ms after sending INIT.

  439 15:43:37.504465  Waiting for 1st SIPI to complete...AP: slot 6 apic_id 1.

  440 15:43:37.507623  AP: slot 5 apic_id 4.

  441 15:43:37.511047  AP: slot 1 apic_id 5.

  442 15:43:37.511474  AP: slot 4 apic_id 7.

  443 15:43:37.514202  AP: slot 3 apic_id 6.

  444 15:43:37.517558  AP: slot 7 apic_id 2.

  445 15:43:37.517984  AP: slot 2 apic_id 3.

  446 15:43:37.518320  done.

  447 15:43:37.524234  Waiting for 2nd SIPI to complete...done.

  448 15:43:37.530985  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  449 15:43:37.537507  Processing 13 relocs. Offset value of 0x00038000

  450 15:43:37.540795  Unable to locate Global NVS

  451 15:43:37.547513  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  452 15:43:37.550834  Installing permanent SMM handler to 0x7b000000

  453 15:43:37.560513  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  454 15:43:37.563697  Processing 794 relocs. Offset value of 0x7b010000

  455 15:43:37.573680  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  456 15:43:37.577071  Processing 13 relocs. Offset value of 0x7b008000

  457 15:43:37.583680  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  458 15:43:37.590092  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  459 15:43:37.597105  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  460 15:43:37.600291  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  461 15:43:37.606715  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  462 15:43:37.613801  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  463 15:43:37.620023  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  464 15:43:37.623274  Unable to locate Global NVS

  465 15:43:37.630254  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  466 15:43:37.633229  Clearing SMI status registers

  467 15:43:37.636731  SMI_STS: PM1 

  468 15:43:37.637253  PM1_STS: PWRBTN 

  469 15:43:37.642931  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  470 15:43:37.646084  In relocation handler: CPU 0

  471 15:43:37.649826  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  472 15:43:37.655988  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  473 15:43:37.659599  Relocation complete.

  474 15:43:37.666267  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  475 15:43:37.669450  In relocation handler: CPU 6

  476 15:43:37.672653  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  477 15:43:37.675809  Relocation complete.

  478 15:43:37.682588  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  479 15:43:37.685720  In relocation handler: CPU 4

  480 15:43:37.688874  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  481 15:43:37.692216  Relocation complete.

  482 15:43:37.699164  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  483 15:43:37.702599  In relocation handler: CPU 5

  484 15:43:37.705537  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  485 15:43:37.709413  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  486 15:43:37.712376  Relocation complete.

  487 15:43:37.718772  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  488 15:43:37.722264  In relocation handler: CPU 1

  489 15:43:37.725857  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  490 15:43:37.728855  Relocation complete.

  491 15:43:37.735210  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  492 15:43:37.738238  In relocation handler: CPU 7

  493 15:43:37.742054  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  494 15:43:37.748448  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  495 15:43:37.751540  Relocation complete.

  496 15:43:37.758507  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  497 15:43:37.761403  In relocation handler: CPU 2

  498 15:43:37.764751  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  499 15:43:37.768674  Relocation complete.

  500 15:43:37.772700  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  501 15:43:37.776081  In relocation handler: CPU 3

  502 15:43:37.779878  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  503 15:43:37.786362  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  504 15:43:37.789213  Relocation complete.

  505 15:43:37.789812  Initializing CPU #0

  506 15:43:37.792944  CPU: vendor Intel device 806c1

  507 15:43:37.796399  CPU: family 06, model 8c, stepping 01

  508 15:43:37.799098  Clearing out pending MCEs

  509 15:43:37.802889  Setting up local APIC...

  510 15:43:37.806105   apic_id: 0x00 done.

  511 15:43:37.809001  Turbo is available but hidden

  512 15:43:37.812628  Turbo is available and visible

  513 15:43:37.815909  microcode: Update skipped, already up-to-date

  514 15:43:37.819228  CPU #0 initialized

  515 15:43:37.819867  Initializing CPU #5

  516 15:43:37.822380  Initializing CPU #1

  517 15:43:37.825869  CPU: vendor Intel device 806c1

  518 15:43:37.829064  CPU: family 06, model 8c, stepping 01

  519 15:43:37.832455  CPU: vendor Intel device 806c1

  520 15:43:37.835810  CPU: family 06, model 8c, stepping 01

  521 15:43:37.839118  Clearing out pending MCEs

  522 15:43:37.842301  Clearing out pending MCEs

  523 15:43:37.842894  Setting up local APIC...

  524 15:43:37.845371  Initializing CPU #4

  525 15:43:37.848679  Initializing CPU #3

  526 15:43:37.851982  CPU: vendor Intel device 806c1

  527 15:43:37.855190  CPU: family 06, model 8c, stepping 01

  528 15:43:37.858919  CPU: vendor Intel device 806c1

  529 15:43:37.862060  CPU: family 06, model 8c, stepping 01

  530 15:43:37.865407  Clearing out pending MCEs

  531 15:43:37.865961  Clearing out pending MCEs

  532 15:43:37.868881  Setting up local APIC...

  533 15:43:37.872216  Initializing CPU #6

  534 15:43:37.872800   apic_id: 0x04 done.

  535 15:43:37.875550  Setting up local APIC...

  536 15:43:37.878332  Setting up local APIC...

  537 15:43:37.881657  microcode: Update skipped, already up-to-date

  538 15:43:37.884968   apic_id: 0x05 done.

  539 15:43:37.888857  CPU #5 initialized

  540 15:43:37.891590  microcode: Update skipped, already up-to-date

  541 15:43:37.895364  CPU: vendor Intel device 806c1

  542 15:43:37.898459  CPU: family 06, model 8c, stepping 01

  543 15:43:37.901880  Initializing CPU #7

  544 15:43:37.902450  Initializing CPU #2

  545 15:43:37.904709  CPU: vendor Intel device 806c1

  546 15:43:37.908059  CPU: family 06, model 8c, stepping 01

  547 15:43:37.911742  CPU: vendor Intel device 806c1

  548 15:43:37.918418  CPU: family 06, model 8c, stepping 01

  549 15:43:37.918989   apic_id: 0x06 done.

  550 15:43:37.921597   apic_id: 0x07 done.

  551 15:43:37.924613  microcode: Update skipped, already up-to-date

  552 15:43:37.931043  microcode: Update skipped, already up-to-date

  553 15:43:37.931125  CPU #3 initialized

  554 15:43:37.934074  CPU #4 initialized

  555 15:43:37.934183  CPU #1 initialized

  556 15:43:37.937721  Clearing out pending MCEs

  557 15:43:37.941104  Clearing out pending MCEs

  558 15:43:37.944569  Clearing out pending MCEs

  559 15:43:37.947317  Setting up local APIC...

  560 15:43:37.947399  Setting up local APIC...

  561 15:43:37.951016  Setting up local APIC...

  562 15:43:37.954100   apic_id: 0x01 done.

  563 15:43:37.954182   apic_id: 0x03 done.

  564 15:43:37.957268   apic_id: 0x02 done.

  565 15:43:37.960600  microcode: Update skipped, already up-to-date

  566 15:43:37.967593  microcode: Update skipped, already up-to-date

  567 15:43:37.967702  CPU #2 initialized

  568 15:43:37.970927  CPU #7 initialized

  569 15:43:37.974493  microcode: Update skipped, already up-to-date

  570 15:43:37.977133  CPU #6 initialized

  571 15:43:37.980585  bsp_do_flight_plan done after 454 msecs.

  572 15:43:37.983940  CPU: frequency set to 4400 MHz

  573 15:43:37.987129  Enabling SMIs.

  574 15:43:37.993819  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  575 15:43:38.008440  SATAXPCIE1 indicates PCIe NVMe is present

  576 15:43:38.012282  Probing TPM:  done!

  577 15:43:38.015672  Connected to device vid:did:rid of 1ae0:0028:00

  578 15:43:38.026088  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e

  579 15:43:38.029510  Initialized TPM device CR50 revision 0

  580 15:43:38.032883  Enabling S0i3.4

  581 15:43:38.039412  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  582 15:43:38.042776  Found a VBT of 8704 bytes after decompression

  583 15:43:38.049498  cse_lite: CSE RO boot. HybridStorageMode disabled

  584 15:43:38.055963  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  585 15:43:38.131189  FSPS returned 0

  586 15:43:38.134551  Executing Phase 1 of FspMultiPhaseSiInit

  587 15:43:38.143992  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  588 15:43:38.147815  port C0 DISC req: usage 1 usb3 1 usb2 5

  589 15:43:38.151045  Raw Buffer output 0 00000511

  590 15:43:38.154384  Raw Buffer output 1 00000000

  591 15:43:38.157700  pmc_send_ipc_cmd succeeded

  592 15:43:38.164389  port C1 DISC req: usage 1 usb3 2 usb2 3

  593 15:43:38.164963  Raw Buffer output 0 00000321

  594 15:43:38.167515  Raw Buffer output 1 00000000

  595 15:43:38.171591  pmc_send_ipc_cmd succeeded

  596 15:43:38.176685  Detected 4 core, 8 thread CPU.

  597 15:43:38.180062  Detected 4 core, 8 thread CPU.

  598 15:43:38.380267  Display FSP Version Info HOB

  599 15:43:38.383467  Reference Code - CPU = a.0.4c.31

  600 15:43:38.387012  uCode Version = 0.0.0.86

  601 15:43:38.390207  TXT ACM version = ff.ff.ff.ffff

  602 15:43:38.393602  Reference Code - ME = a.0.4c.31

  603 15:43:38.396613  MEBx version = 0.0.0.0

  604 15:43:38.400069  ME Firmware Version = Consumer SKU

  605 15:43:38.403457  Reference Code - PCH = a.0.4c.31

  606 15:43:38.406983  PCH-CRID Status = Disabled

  607 15:43:38.409970  PCH-CRID Original Value = ff.ff.ff.ffff

  608 15:43:38.413276  PCH-CRID New Value = ff.ff.ff.ffff

  609 15:43:38.416582  OPROM - RST - RAID = ff.ff.ff.ffff

  610 15:43:38.419922  PCH Hsio Version = 4.0.0.0

  611 15:43:38.423500  Reference Code - SA - System Agent = a.0.4c.31

  612 15:43:38.426848  Reference Code - MRC = 2.0.0.1

  613 15:43:38.430051  SA - PCIe Version = a.0.4c.31

  614 15:43:38.433278  SA-CRID Status = Disabled

  615 15:43:38.436593  SA-CRID Original Value = 0.0.0.1

  616 15:43:38.440111  SA-CRID New Value = 0.0.0.1

  617 15:43:38.443276  OPROM - VBIOS = ff.ff.ff.ffff

  618 15:43:38.446475  IO Manageability Engine FW Version = 11.1.4.0

  619 15:43:38.449681  PHY Build Version = 0.0.0.e0

  620 15:43:38.453015  Thunderbolt(TM) FW Version = 0.0.0.0

  621 15:43:38.459793  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  622 15:43:38.463083  ITSS IRQ Polarities Before:

  623 15:43:38.463510  IPC0: 0xffffffff

  624 15:43:38.466283  IPC1: 0xffffffff

  625 15:43:38.466704  IPC2: 0xffffffff

  626 15:43:38.469498  IPC3: 0xffffffff

  627 15:43:38.472973  ITSS IRQ Polarities After:

  628 15:43:38.473524  IPC0: 0xffffffff

  629 15:43:38.476265  IPC1: 0xffffffff

  630 15:43:38.476708  IPC2: 0xffffffff

  631 15:43:38.479406  IPC3: 0xffffffff

  632 15:43:38.482796  Found PCIe Root Port #9 at PCI: 00:1d.0.

  633 15:43:38.495774  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  634 15:43:38.505636  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  635 15:43:38.518943  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  636 15:43:38.525369  BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms

  637 15:43:38.528788  Enumerating buses...

  638 15:43:38.532107  Show all devs... Before device enumeration.

  639 15:43:38.535475  Root Device: enabled 1

  640 15:43:38.538768  DOMAIN: 0000: enabled 1

  641 15:43:38.539275  CPU_CLUSTER: 0: enabled 1

  642 15:43:38.541944  PCI: 00:00.0: enabled 1

  643 15:43:38.545306  PCI: 00:02.0: enabled 1

  644 15:43:38.548733  PCI: 00:04.0: enabled 1

  645 15:43:38.549301  PCI: 00:05.0: enabled 1

  646 15:43:38.551885  PCI: 00:06.0: enabled 0

  647 15:43:38.555067  PCI: 00:07.0: enabled 0

  648 15:43:38.555749  PCI: 00:07.1: enabled 0

  649 15:43:38.558894  PCI: 00:07.2: enabled 0

  650 15:43:38.562132  PCI: 00:07.3: enabled 0

  651 15:43:38.565401  PCI: 00:08.0: enabled 1

  652 15:43:38.566106  PCI: 00:09.0: enabled 0

  653 15:43:38.568713  PCI: 00:0a.0: enabled 0

  654 15:43:38.572087  PCI: 00:0d.0: enabled 1

  655 15:43:38.575303  PCI: 00:0d.1: enabled 0

  656 15:43:38.575840  PCI: 00:0d.2: enabled 0

  657 15:43:38.578524  PCI: 00:0d.3: enabled 0

  658 15:43:38.582054  PCI: 00:0e.0: enabled 0

  659 15:43:38.584846  PCI: 00:10.2: enabled 1

  660 15:43:38.585265  PCI: 00:10.6: enabled 0

  661 15:43:38.588039  PCI: 00:10.7: enabled 0

  662 15:43:38.591459  PCI: 00:12.0: enabled 0

  663 15:43:38.594625  PCI: 00:12.6: enabled 0

  664 15:43:38.595255  PCI: 00:13.0: enabled 0

  665 15:43:38.597874  PCI: 00:14.0: enabled 1

  666 15:43:38.601365  PCI: 00:14.1: enabled 0

  667 15:43:38.604717  PCI: 00:14.2: enabled 1

  668 15:43:38.605131  PCI: 00:14.3: enabled 1

  669 15:43:38.607981  PCI: 00:15.0: enabled 1

  670 15:43:38.611621  PCI: 00:15.1: enabled 1

  671 15:43:38.612195  PCI: 00:15.2: enabled 1

  672 15:43:38.615149  PCI: 00:15.3: enabled 1

  673 15:43:38.617955  PCI: 00:16.0: enabled 1

  674 15:43:38.621615  PCI: 00:16.1: enabled 0

  675 15:43:38.622148  PCI: 00:16.2: enabled 0

  676 15:43:38.624635  PCI: 00:16.3: enabled 0

  677 15:43:38.627992  PCI: 00:16.4: enabled 0

  678 15:43:38.631311  PCI: 00:16.5: enabled 0

  679 15:43:38.631766  PCI: 00:17.0: enabled 1

  680 15:43:38.634464  PCI: 00:19.0: enabled 0

  681 15:43:38.637647  PCI: 00:19.1: enabled 1

  682 15:43:38.641250  PCI: 00:19.2: enabled 0

  683 15:43:38.641673  PCI: 00:1c.0: enabled 1

  684 15:43:38.644477  PCI: 00:1c.1: enabled 0

  685 15:43:38.647759  PCI: 00:1c.2: enabled 0

  686 15:43:38.651178  PCI: 00:1c.3: enabled 0

  687 15:43:38.651826  PCI: 00:1c.4: enabled 0

  688 15:43:38.654411  PCI: 00:1c.5: enabled 0

  689 15:43:38.657648  PCI: 00:1c.6: enabled 1

  690 15:43:38.660954  PCI: 00:1c.7: enabled 0

  691 15:43:38.661380  PCI: 00:1d.0: enabled 1

  692 15:43:38.664226  PCI: 00:1d.1: enabled 0

  693 15:43:38.667760  PCI: 00:1d.2: enabled 1

  694 15:43:38.668190  PCI: 00:1d.3: enabled 0

  695 15:43:38.671175  PCI: 00:1e.0: enabled 1

  696 15:43:38.674126  PCI: 00:1e.1: enabled 0

  697 15:43:38.677479  PCI: 00:1e.2: enabled 1

  698 15:43:38.677921  PCI: 00:1e.3: enabled 1

  699 15:43:38.681132  PCI: 00:1f.0: enabled 1

  700 15:43:38.684245  PCI: 00:1f.1: enabled 0

  701 15:43:38.687675  PCI: 00:1f.2: enabled 1

  702 15:43:38.688207  PCI: 00:1f.3: enabled 1

  703 15:43:38.690973  PCI: 00:1f.4: enabled 0

  704 15:43:38.694289  PCI: 00:1f.5: enabled 1

  705 15:43:38.697596  PCI: 00:1f.6: enabled 0

  706 15:43:38.698020  PCI: 00:1f.7: enabled 0

  707 15:43:38.700998  APIC: 00: enabled 1

  708 15:43:38.704285  GENERIC: 0.0: enabled 1

  709 15:43:38.704706  GENERIC: 0.0: enabled 1

  710 15:43:38.707692  GENERIC: 1.0: enabled 1

  711 15:43:38.710994  GENERIC: 0.0: enabled 1

  712 15:43:38.714329  GENERIC: 1.0: enabled 1

  713 15:43:38.714983  USB0 port 0: enabled 1

  714 15:43:38.717352  GENERIC: 0.0: enabled 1

  715 15:43:38.720715  USB0 port 0: enabled 1

  716 15:43:38.724102  GENERIC: 0.0: enabled 1

  717 15:43:38.724523  I2C: 00:1a: enabled 1

  718 15:43:38.727387  I2C: 00:31: enabled 1

  719 15:43:38.730579  I2C: 00:32: enabled 1

  720 15:43:38.731138  I2C: 00:10: enabled 1

  721 15:43:38.733811  I2C: 00:15: enabled 1

  722 15:43:38.736845  GENERIC: 0.0: enabled 0

  723 15:43:38.737355  GENERIC: 1.0: enabled 0

  724 15:43:38.740285  GENERIC: 0.0: enabled 1

  725 15:43:38.743443  SPI: 00: enabled 1

  726 15:43:38.743963  SPI: 00: enabled 1

  727 15:43:38.746619  PNP: 0c09.0: enabled 1

  728 15:43:38.750420  GENERIC: 0.0: enabled 1

  729 15:43:38.753589  USB3 port 0: enabled 1

  730 15:43:38.754013  USB3 port 1: enabled 1

  731 15:43:38.757091  USB3 port 2: enabled 0

  732 15:43:38.760324  USB3 port 3: enabled 0

  733 15:43:38.760749  USB2 port 0: enabled 0

  734 15:43:38.763761  USB2 port 1: enabled 1

  735 15:43:38.766935  USB2 port 2: enabled 1

  736 15:43:38.767362  USB2 port 3: enabled 0

  737 15:43:38.770266  USB2 port 4: enabled 1

  738 15:43:38.773131  USB2 port 5: enabled 0

  739 15:43:38.776497  USB2 port 6: enabled 0

  740 15:43:38.777002  USB2 port 7: enabled 0

  741 15:43:38.779937  USB2 port 8: enabled 0

  742 15:43:38.783341  USB2 port 9: enabled 0

  743 15:43:38.783988  USB3 port 0: enabled 0

  744 15:43:38.786637  USB3 port 1: enabled 1

  745 15:43:38.789897  USB3 port 2: enabled 0

  746 15:43:38.792995  USB3 port 3: enabled 0

  747 15:43:38.793532  GENERIC: 0.0: enabled 1

  748 15:43:38.796485  GENERIC: 1.0: enabled 1

  749 15:43:38.799952  APIC: 05: enabled 1

  750 15:43:38.800583  APIC: 03: enabled 1

  751 15:43:38.803061  APIC: 06: enabled 1

  752 15:43:38.806391  APIC: 07: enabled 1

  753 15:43:38.806903  APIC: 04: enabled 1

  754 15:43:38.809843  APIC: 01: enabled 1

  755 15:43:38.810379  APIC: 02: enabled 1

  756 15:43:38.812993  Compare with tree...

  757 15:43:38.816374  Root Device: enabled 1

  758 15:43:38.819676   DOMAIN: 0000: enabled 1

  759 15:43:38.820094    PCI: 00:00.0: enabled 1

  760 15:43:38.822659    PCI: 00:02.0: enabled 1

  761 15:43:38.825932    PCI: 00:04.0: enabled 1

  762 15:43:38.829273     GENERIC: 0.0: enabled 1

  763 15:43:38.832715    PCI: 00:05.0: enabled 1

  764 15:43:38.833136    PCI: 00:06.0: enabled 0

  765 15:43:38.836082    PCI: 00:07.0: enabled 0

  766 15:43:38.839372     GENERIC: 0.0: enabled 1

  767 15:43:38.842686    PCI: 00:07.1: enabled 0

  768 15:43:38.846080     GENERIC: 1.0: enabled 1

  769 15:43:38.846683    PCI: 00:07.2: enabled 0

  770 15:43:38.849227     GENERIC: 0.0: enabled 1

  771 15:43:38.852191    PCI: 00:07.3: enabled 0

  772 15:43:38.855603     GENERIC: 1.0: enabled 1

  773 15:43:38.858835    PCI: 00:08.0: enabled 1

  774 15:43:38.859289    PCI: 00:09.0: enabled 0

  775 15:43:38.862525    PCI: 00:0a.0: enabled 0

  776 15:43:38.866045    PCI: 00:0d.0: enabled 1

  777 15:43:38.869164     USB0 port 0: enabled 1

  778 15:43:38.872287      USB3 port 0: enabled 1

  779 15:43:38.875391      USB3 port 1: enabled 1

  780 15:43:38.875994      USB3 port 2: enabled 0

  781 15:43:38.878742      USB3 port 3: enabled 0

  782 15:43:38.882059    PCI: 00:0d.1: enabled 0

  783 15:43:38.885573    PCI: 00:0d.2: enabled 0

  784 15:43:38.889029     GENERIC: 0.0: enabled 1

  785 15:43:38.889505    PCI: 00:0d.3: enabled 0

  786 15:43:38.891795    PCI: 00:0e.0: enabled 0

  787 15:43:38.895610    PCI: 00:10.2: enabled 1

  788 15:43:38.898660    PCI: 00:10.6: enabled 0

  789 15:43:38.902056    PCI: 00:10.7: enabled 0

  790 15:43:38.902513    PCI: 00:12.0: enabled 0

  791 15:43:38.905492    PCI: 00:12.6: enabled 0

  792 15:43:38.908510    PCI: 00:13.0: enabled 0

  793 15:43:38.911910    PCI: 00:14.0: enabled 1

  794 15:43:38.915274     USB0 port 0: enabled 1

  795 15:43:38.915860      USB2 port 0: enabled 0

  796 15:43:38.918603      USB2 port 1: enabled 1

  797 15:43:38.922111      USB2 port 2: enabled 1

  798 15:43:38.925312      USB2 port 3: enabled 0

  799 15:43:38.928374      USB2 port 4: enabled 1

  800 15:43:38.931673      USB2 port 5: enabled 0

  801 15:43:38.932311      USB2 port 6: enabled 0

  802 15:43:38.934957      USB2 port 7: enabled 0

  803 15:43:38.938361      USB2 port 8: enabled 0

  804 15:43:38.941745      USB2 port 9: enabled 0

  805 15:43:38.944666      USB3 port 0: enabled 0

  806 15:43:38.948013      USB3 port 1: enabled 1

  807 15:43:38.948584      USB3 port 2: enabled 0

  808 15:43:38.951336      USB3 port 3: enabled 0

  809 15:43:38.954487    PCI: 00:14.1: enabled 0

  810 15:43:38.957792    PCI: 00:14.2: enabled 1

  811 15:43:38.961207    PCI: 00:14.3: enabled 1

  812 15:43:38.961630     GENERIC: 0.0: enabled 1

  813 15:43:38.964536    PCI: 00:15.0: enabled 1

  814 15:43:38.968264     I2C: 00:1a: enabled 1

  815 15:43:38.971228     I2C: 00:31: enabled 1

  816 15:43:38.974546     I2C: 00:32: enabled 1

  817 15:43:38.975179    PCI: 00:15.1: enabled 1

  818 15:43:38.977365     I2C: 00:10: enabled 1

  819 15:43:38.980819    PCI: 00:15.2: enabled 1

  820 15:43:38.984126    PCI: 00:15.3: enabled 1

  821 15:43:38.987150    PCI: 00:16.0: enabled 1

  822 15:43:38.987263    PCI: 00:16.1: enabled 0

  823 15:43:38.990667    PCI: 00:16.2: enabled 0

  824 15:43:38.994129    PCI: 00:16.3: enabled 0

  825 15:43:38.997170    PCI: 00:16.4: enabled 0

  826 15:43:39.000563    PCI: 00:16.5: enabled 0

  827 15:43:39.000657    PCI: 00:17.0: enabled 1

  828 15:43:39.003675    PCI: 00:19.0: enabled 0

  829 15:43:39.007072    PCI: 00:19.1: enabled 1

  830 15:43:39.010414     I2C: 00:15: enabled 1

  831 15:43:39.014338    PCI: 00:19.2: enabled 0

  832 15:43:39.014450    PCI: 00:1d.0: enabled 1

  833 15:43:39.017854     GENERIC: 0.0: enabled 1

  834 15:43:39.021656    PCI: 00:1e.0: enabled 1

  835 15:43:39.021808    PCI: 00:1e.1: enabled 0

  836 15:43:39.024729    PCI: 00:1e.2: enabled 1

  837 15:43:39.027884     SPI: 00: enabled 1

  838 15:43:39.031212    PCI: 00:1e.3: enabled 1

  839 15:43:39.031386     SPI: 00: enabled 1

  840 15:43:39.034810    PCI: 00:1f.0: enabled 1

  841 15:43:39.038296     PNP: 0c09.0: enabled 1

  842 15:43:39.041146    PCI: 00:1f.1: enabled 0

  843 15:43:39.044518    PCI: 00:1f.2: enabled 1

  844 15:43:39.044762     GENERIC: 0.0: enabled 1

  845 15:43:39.047940      GENERIC: 0.0: enabled 1

  846 15:43:39.084485      GENERIC: 1.0: enabled 1

  847 15:43:39.085043    PCI: 00:1f.3: enabled 1

  848 15:43:39.085390    PCI: 00:1f.4: enabled 0

  849 15:43:39.085867    PCI: 00:1f.5: enabled 1

  850 15:43:39.086417    PCI: 00:1f.6: enabled 0

  851 15:43:39.086856    PCI: 00:1f.7: enabled 0

  852 15:43:39.087171   CPU_CLUSTER: 0: enabled 1

  853 15:43:39.087822    APIC: 00: enabled 1

  854 15:43:39.088159    APIC: 05: enabled 1

  855 15:43:39.088463    APIC: 03: enabled 1

  856 15:43:39.088777    APIC: 06: enabled 1

  857 15:43:39.089122    APIC: 07: enabled 1

  858 15:43:39.091963    APIC: 04: enabled 1

  859 15:43:39.092386    APIC: 01: enabled 1

  860 15:43:39.092717    APIC: 02: enabled 1

  861 15:43:39.095038  Root Device scanning...

  862 15:43:39.095460  scan_static_bus for Root Device

  863 15:43:39.095859  DOMAIN: 0000 enabled

  864 15:43:39.098117  CPU_CLUSTER: 0 enabled

  865 15:43:39.101491  DOMAIN: 0000 scanning...

  866 15:43:39.101913  PCI: pci_scan_bus for bus 00

  867 15:43:39.104740  PCI: 00:00.0 [8086/0000] ops

  868 15:43:39.107968  PCI: 00:00.0 [8086/9a12] enabled

  869 15:43:39.111810  PCI: 00:02.0 [8086/0000] bus ops

  870 15:43:39.115042  PCI: 00:02.0 [8086/9a40] enabled

  871 15:43:39.118112  PCI: 00:04.0 [8086/0000] bus ops

  872 15:43:39.121571  PCI: 00:04.0 [8086/9a03] enabled

  873 15:43:39.124907  PCI: 00:05.0 [8086/9a19] enabled

  874 15:43:39.128330  PCI: 00:07.0 [0000/0000] hidden

  875 15:43:39.131197  PCI: 00:08.0 [8086/9a11] enabled

  876 15:43:39.134649  PCI: 00:0a.0 [8086/9a0d] disabled

  877 15:43:39.137935  PCI: 00:0d.0 [8086/0000] bus ops

  878 15:43:39.141193  PCI: 00:0d.0 [8086/9a13] enabled

  879 15:43:39.144513  PCI: 00:14.0 [8086/0000] bus ops

  880 15:43:39.147863  PCI: 00:14.0 [8086/a0ed] enabled

  881 15:43:39.151504  PCI: 00:14.2 [8086/a0ef] enabled

  882 15:43:39.154573  PCI: 00:14.3 [8086/0000] bus ops

  883 15:43:39.158015  PCI: 00:14.3 [8086/a0f0] enabled

  884 15:43:39.161632  PCI: 00:15.0 [8086/0000] bus ops

  885 15:43:39.164758  PCI: 00:15.0 [8086/a0e8] enabled

  886 15:43:39.167682  PCI: 00:15.1 [8086/0000] bus ops

  887 15:43:39.171008  PCI: 00:15.1 [8086/a0e9] enabled

  888 15:43:39.174330  PCI: 00:15.2 [8086/0000] bus ops

  889 15:43:39.177591  PCI: 00:15.2 [8086/a0ea] enabled

  890 15:43:39.181004  PCI: 00:15.3 [8086/0000] bus ops

  891 15:43:39.184132  PCI: 00:15.3 [8086/a0eb] enabled

  892 15:43:39.187572  PCI: 00:16.0 [8086/0000] ops

  893 15:43:39.190746  PCI: 00:16.0 [8086/a0e0] enabled

  894 15:43:39.197421  PCI: Static device PCI: 00:17.0 not found, disabling it.

  895 15:43:39.200808  PCI: 00:19.0 [8086/0000] bus ops

  896 15:43:39.204043  PCI: 00:19.0 [8086/a0c5] disabled

  897 15:43:39.207224  PCI: 00:19.1 [8086/0000] bus ops

  898 15:43:39.210816  PCI: 00:19.1 [8086/a0c6] enabled

  899 15:43:39.214127  PCI: 00:1d.0 [8086/0000] bus ops

  900 15:43:39.217387  PCI: 00:1d.0 [8086/a0b0] enabled

  901 15:43:39.220711  PCI: 00:1e.0 [8086/0000] ops

  902 15:43:39.224047  PCI: 00:1e.0 [8086/a0a8] enabled

  903 15:43:39.226804  PCI: 00:1e.2 [8086/0000] bus ops

  904 15:43:39.230127  PCI: 00:1e.2 [8086/a0aa] enabled

  905 15:43:39.233710  PCI: 00:1e.3 [8086/0000] bus ops

  906 15:43:39.236854  PCI: 00:1e.3 [8086/a0ab] enabled

  907 15:43:39.240056  PCI: 00:1f.0 [8086/0000] bus ops

  908 15:43:39.243394  PCI: 00:1f.0 [8086/a087] enabled

  909 15:43:39.246565  RTC Init

  910 15:43:39.250055  Set power on after power failure.

  911 15:43:39.250605  Disabling Deep S3

  912 15:43:39.253421  Disabling Deep S3

  913 15:43:39.254077  Disabling Deep S4

  914 15:43:39.256865  Disabling Deep S4

  915 15:43:39.260198  Disabling Deep S5

  916 15:43:39.260635  Disabling Deep S5

  917 15:43:39.263472  PCI: 00:1f.2 [0000/0000] hidden

  918 15:43:39.266720  PCI: 00:1f.3 [8086/0000] bus ops

  919 15:43:39.270125  PCI: 00:1f.3 [8086/a0c8] enabled

  920 15:43:39.272972  PCI: 00:1f.5 [8086/0000] bus ops

  921 15:43:39.276396  PCI: 00:1f.5 [8086/a0a4] enabled

  922 15:43:39.279698  PCI: Leftover static devices:

  923 15:43:39.280153  PCI: 00:10.2

  924 15:43:39.283004  PCI: 00:10.6

  925 15:43:39.283528  PCI: 00:10.7

  926 15:43:39.286441  PCI: 00:06.0

  927 15:43:39.286853  PCI: 00:07.1

  928 15:43:39.289716  PCI: 00:07.2

  929 15:43:39.290125  PCI: 00:07.3

  930 15:43:39.290448  PCI: 00:09.0

  931 15:43:39.293116  PCI: 00:0d.1

  932 15:43:39.293523  PCI: 00:0d.2

  933 15:43:39.296203  PCI: 00:0d.3

  934 15:43:39.296612  PCI: 00:0e.0

  935 15:43:39.296931  PCI: 00:12.0

  936 15:43:39.299586  PCI: 00:12.6

  937 15:43:39.300026  PCI: 00:13.0

  938 15:43:39.302987  PCI: 00:14.1

  939 15:43:39.303394  PCI: 00:16.1

  940 15:43:39.306305  PCI: 00:16.2

  941 15:43:39.306714  PCI: 00:16.3

  942 15:43:39.307037  PCI: 00:16.4

  943 15:43:39.309685  PCI: 00:16.5

  944 15:43:39.310092  PCI: 00:17.0

  945 15:43:39.312533  PCI: 00:19.2

  946 15:43:39.312944  PCI: 00:1e.1

  947 15:43:39.313266  PCI: 00:1f.1

  948 15:43:39.315856  PCI: 00:1f.4

  949 15:43:39.316265  PCI: 00:1f.6

  950 15:43:39.319169  PCI: 00:1f.7

  951 15:43:39.322353  PCI: Check your devicetree.cb.

  952 15:43:39.322860  PCI: 00:02.0 scanning...

  953 15:43:39.329204  scan_generic_bus for PCI: 00:02.0

  954 15:43:39.332389  scan_generic_bus for PCI: 00:02.0 done

  955 15:43:39.336092  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  956 15:43:39.338931  PCI: 00:04.0 scanning...

  957 15:43:39.342363  scan_generic_bus for PCI: 00:04.0

  958 15:43:39.345461  GENERIC: 0.0 enabled

  959 15:43:39.351761  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  960 15:43:39.355234  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  961 15:43:39.358955  PCI: 00:0d.0 scanning...

  962 15:43:39.362384  scan_static_bus for PCI: 00:0d.0

  963 15:43:39.362795  USB0 port 0 enabled

  964 15:43:39.365187  USB0 port 0 scanning...

  965 15:43:39.368479  scan_static_bus for USB0 port 0

  966 15:43:39.371870  USB3 port 0 enabled

  967 15:43:39.372282  USB3 port 1 enabled

  968 15:43:39.375622  USB3 port 2 disabled

  969 15:43:39.378758  USB3 port 3 disabled

  970 15:43:39.381761  USB3 port 0 scanning...

  971 15:43:39.385204  scan_static_bus for USB3 port 0

  972 15:43:39.388500  scan_static_bus for USB3 port 0 done

  973 15:43:39.391809  scan_bus: bus USB3 port 0 finished in 6 msecs

  974 15:43:39.395285  USB3 port 1 scanning...

  975 15:43:39.398145  scan_static_bus for USB3 port 1

  976 15:43:39.402415  scan_static_bus for USB3 port 1 done

  977 15:43:39.404840  scan_bus: bus USB3 port 1 finished in 6 msecs

  978 15:43:39.411777  scan_static_bus for USB0 port 0 done

  979 15:43:39.415119  scan_bus: bus USB0 port 0 finished in 43 msecs

  980 15:43:39.417786  scan_static_bus for PCI: 00:0d.0 done

  981 15:43:39.424701  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  982 15:43:39.425115  PCI: 00:14.0 scanning...

  983 15:43:39.427715  scan_static_bus for PCI: 00:14.0

  984 15:43:39.430981  USB0 port 0 enabled

  985 15:43:39.434698  USB0 port 0 scanning...

  986 15:43:39.438048  scan_static_bus for USB0 port 0

  987 15:43:39.438461  USB2 port 0 disabled

  988 15:43:39.441276  USB2 port 1 enabled

  989 15:43:39.444445  USB2 port 2 enabled

  990 15:43:39.444929  USB2 port 3 disabled

  991 15:43:39.447605  USB2 port 4 enabled

  992 15:43:39.451437  USB2 port 5 disabled

  993 15:43:39.451895  USB2 port 6 disabled

  994 15:43:39.454687  USB2 port 7 disabled

  995 15:43:39.457690  USB2 port 8 disabled

  996 15:43:39.458137  USB2 port 9 disabled

  997 15:43:39.460669  USB3 port 0 disabled

  998 15:43:39.464329  USB3 port 1 enabled

  999 15:43:39.464743  USB3 port 2 disabled

 1000 15:43:39.467403  USB3 port 3 disabled

 1001 15:43:39.470610  USB2 port 1 scanning...

 1002 15:43:39.474384  scan_static_bus for USB2 port 1

 1003 15:43:39.477353  scan_static_bus for USB2 port 1 done

 1004 15:43:39.480740  scan_bus: bus USB2 port 1 finished in 6 msecs

 1005 15:43:39.483951  USB2 port 2 scanning...

 1006 15:43:39.487207  scan_static_bus for USB2 port 2

 1007 15:43:39.490384  scan_static_bus for USB2 port 2 done

 1008 15:43:39.493641  scan_bus: bus USB2 port 2 finished in 6 msecs

 1009 15:43:39.496982  USB2 port 4 scanning...

 1010 15:43:39.500465  scan_static_bus for USB2 port 4

 1011 15:43:39.503987  scan_static_bus for USB2 port 4 done

 1012 15:43:39.510367  scan_bus: bus USB2 port 4 finished in 6 msecs

 1013 15:43:39.510783  USB3 port 1 scanning...

 1014 15:43:39.513638  scan_static_bus for USB3 port 1

 1015 15:43:39.520273  scan_static_bus for USB3 port 1 done

 1016 15:43:39.523666  scan_bus: bus USB3 port 1 finished in 6 msecs

 1017 15:43:39.526944  scan_static_bus for USB0 port 0 done

 1018 15:43:39.533659  scan_bus: bus USB0 port 0 finished in 93 msecs

 1019 15:43:39.536890  scan_static_bus for PCI: 00:14.0 done

 1020 15:43:39.540722  scan_bus: bus PCI: 00:14.0 finished in 109 msecs

 1021 15:43:39.543952  PCI: 00:14.3 scanning...

 1022 15:43:39.546985  scan_static_bus for PCI: 00:14.3

 1023 15:43:39.550095  GENERIC: 0.0 enabled

 1024 15:43:39.553318  scan_static_bus for PCI: 00:14.3 done

 1025 15:43:39.557109  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1026 15:43:39.560288  PCI: 00:15.0 scanning...

 1027 15:43:39.563701  scan_static_bus for PCI: 00:15.0

 1028 15:43:39.566831  I2C: 00:1a enabled

 1029 15:43:39.567248  I2C: 00:31 enabled

 1030 15:43:39.570110  I2C: 00:32 enabled

 1031 15:43:39.573133  scan_static_bus for PCI: 00:15.0 done

 1032 15:43:39.576905  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1033 15:43:39.579952  PCI: 00:15.1 scanning...

 1034 15:43:39.583239  scan_static_bus for PCI: 00:15.1

 1035 15:43:39.586630  I2C: 00:10 enabled

 1036 15:43:39.590284  scan_static_bus for PCI: 00:15.1 done

 1037 15:43:39.593465  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1038 15:43:39.596998  PCI: 00:15.2 scanning...

 1039 15:43:39.600233  scan_static_bus for PCI: 00:15.2

 1040 15:43:39.603542  scan_static_bus for PCI: 00:15.2 done

 1041 15:43:39.610172  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

 1042 15:43:39.610584  PCI: 00:15.3 scanning...

 1043 15:43:39.613482  scan_static_bus for PCI: 00:15.3

 1044 15:43:39.620191  scan_static_bus for PCI: 00:15.3 done

 1045 15:43:39.623616  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1046 15:43:39.626928  PCI: 00:19.1 scanning...

 1047 15:43:39.630235  scan_static_bus for PCI: 00:19.1

 1048 15:43:39.633713  I2C: 00:15 enabled

 1049 15:43:39.636483  scan_static_bus for PCI: 00:19.1 done

 1050 15:43:39.640175  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1051 15:43:39.643385  PCI: 00:1d.0 scanning...

 1052 15:43:39.646293  do_pci_scan_bridge for PCI: 00:1d.0

 1053 15:43:39.649653  PCI: pci_scan_bus for bus 01

 1054 15:43:39.653340  PCI: 01:00.0 [15b7/5009] enabled

 1055 15:43:39.656529  GENERIC: 0.0 enabled

 1056 15:43:39.659795  Enabling Common Clock Configuration

 1057 15:43:39.663160  L1 Sub-State supported from root port 29

 1058 15:43:39.666317  L1 Sub-State Support = 0x5

 1059 15:43:39.669677  CommonModeRestoreTime = 0x28

 1060 15:43:39.672926  Power On Value = 0x16, Power On Scale = 0x0

 1061 15:43:39.676165  ASPM: Enabled L1

 1062 15:43:39.679339  PCIe: Max_Payload_Size adjusted to 128

 1063 15:43:39.682582  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1064 15:43:39.685841  PCI: 00:1e.2 scanning...

 1065 15:43:39.689181  scan_generic_bus for PCI: 00:1e.2

 1066 15:43:39.692567  SPI: 00 enabled

 1067 15:43:39.696047  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1068 15:43:39.702456  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1069 15:43:39.706190  PCI: 00:1e.3 scanning...

 1070 15:43:39.709004  scan_generic_bus for PCI: 00:1e.3

 1071 15:43:39.709414  SPI: 00 enabled

 1072 15:43:39.716002  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1073 15:43:39.722180  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1074 15:43:39.722590  PCI: 00:1f.0 scanning...

 1075 15:43:39.725549  scan_static_bus for PCI: 00:1f.0

 1076 15:43:39.728849  PNP: 0c09.0 enabled

 1077 15:43:39.732366  PNP: 0c09.0 scanning...

 1078 15:43:39.735579  scan_static_bus for PNP: 0c09.0

 1079 15:43:39.738440  scan_static_bus for PNP: 0c09.0 done

 1080 15:43:39.741852  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1081 15:43:39.748931  scan_static_bus for PCI: 00:1f.0 done

 1082 15:43:39.752176  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1083 15:43:39.755123  PCI: 00:1f.2 scanning...

 1084 15:43:39.758300  scan_static_bus for PCI: 00:1f.2

 1085 15:43:39.761507  GENERIC: 0.0 enabled

 1086 15:43:39.761935  GENERIC: 0.0 scanning...

 1087 15:43:39.764719  scan_static_bus for GENERIC: 0.0

 1088 15:43:39.768090  GENERIC: 0.0 enabled

 1089 15:43:39.771385  GENERIC: 1.0 enabled

 1090 15:43:39.774712  scan_static_bus for GENERIC: 0.0 done

 1091 15:43:39.778555  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1092 15:43:39.781977  scan_static_bus for PCI: 00:1f.2 done

 1093 15:43:39.787968  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1094 15:43:39.791362  PCI: 00:1f.3 scanning...

 1095 15:43:39.795234  scan_static_bus for PCI: 00:1f.3

 1096 15:43:39.798621  scan_static_bus for PCI: 00:1f.3 done

 1097 15:43:39.801701  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1098 15:43:39.804446  PCI: 00:1f.5 scanning...

 1099 15:43:39.808485  scan_generic_bus for PCI: 00:1f.5

 1100 15:43:39.811581  scan_generic_bus for PCI: 00:1f.5 done

 1101 15:43:39.817809  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1102 15:43:39.821692  scan_bus: bus DOMAIN: 0000 finished in 716 msecs

 1103 15:43:39.825457  scan_static_bus for Root Device done

 1104 15:43:39.831259  scan_bus: bus Root Device finished in 736 msecs

 1105 15:43:39.831817  done

 1106 15:43:39.837619  BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms

 1107 15:43:39.841077  Chrome EC: UHEPI supported

 1108 15:43:39.847288  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1109 15:43:39.854140  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1110 15:43:39.857237  SPI flash protection: WPSW=0 SRP0=1

 1111 15:43:39.860281  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1112 15:43:39.867347  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1113 15:43:39.870514  found VGA at PCI: 00:02.0

 1114 15:43:39.873558  Setting up VGA for PCI: 00:02.0

 1115 15:43:39.877247  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1116 15:43:39.883972  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1117 15:43:39.887212  Allocating resources...

 1118 15:43:39.887618  Reading resources...

 1119 15:43:39.893928  Root Device read_resources bus 0 link: 0

 1120 15:43:39.896684  DOMAIN: 0000 read_resources bus 0 link: 0

 1121 15:43:39.900262  PCI: 00:04.0 read_resources bus 1 link: 0

 1122 15:43:39.906981  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1123 15:43:39.910402  PCI: 00:0d.0 read_resources bus 0 link: 0

 1124 15:43:39.916918  USB0 port 0 read_resources bus 0 link: 0

 1125 15:43:39.920095  USB0 port 0 read_resources bus 0 link: 0 done

 1126 15:43:39.926824  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1127 15:43:39.929978  PCI: 00:14.0 read_resources bus 0 link: 0

 1128 15:43:39.936874  USB0 port 0 read_resources bus 0 link: 0

 1129 15:43:39.940327  USB0 port 0 read_resources bus 0 link: 0 done

 1130 15:43:39.946532  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1131 15:43:39.949944  PCI: 00:14.3 read_resources bus 0 link: 0

 1132 15:43:39.956546  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1133 15:43:39.959824  PCI: 00:15.0 read_resources bus 0 link: 0

 1134 15:43:39.966448  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1135 15:43:39.969320  PCI: 00:15.1 read_resources bus 0 link: 0

 1136 15:43:39.975755  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1137 15:43:39.979075  PCI: 00:19.1 read_resources bus 0 link: 0

 1138 15:43:39.986413  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1139 15:43:39.989669  PCI: 00:1d.0 read_resources bus 1 link: 0

 1140 15:43:39.996204  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1141 15:43:39.999591  PCI: 00:1e.2 read_resources bus 2 link: 0

 1142 15:43:40.006164  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1143 15:43:40.009309  PCI: 00:1e.3 read_resources bus 3 link: 0

 1144 15:43:40.016038  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1145 15:43:40.019346  PCI: 00:1f.0 read_resources bus 0 link: 0

 1146 15:43:40.026088  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1147 15:43:40.029216  PCI: 00:1f.2 read_resources bus 0 link: 0

 1148 15:43:40.032277  GENERIC: 0.0 read_resources bus 0 link: 0

 1149 15:43:40.039614  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1150 15:43:40.042981  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1151 15:43:40.050267  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1152 15:43:40.053590  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1153 15:43:40.060299  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1154 15:43:40.063699  Root Device read_resources bus 0 link: 0 done

 1155 15:43:40.066569  Done reading resources.

 1156 15:43:40.073264  Show resources in subtree (Root Device)...After reading.

 1157 15:43:40.076418   Root Device child on link 0 DOMAIN: 0000

 1158 15:43:40.079789    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1159 15:43:40.089749    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1160 15:43:40.100120    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1161 15:43:40.102802     PCI: 00:00.0

 1162 15:43:40.112692     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1163 15:43:40.122725     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1164 15:43:40.129258     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1165 15:43:40.139570     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1166 15:43:40.148976     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1167 15:43:40.159051     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1168 15:43:40.169025     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1169 15:43:40.178795     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1170 15:43:40.185345     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1171 15:43:40.195517     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1172 15:43:40.205426     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1173 15:43:40.215134     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1174 15:43:40.225288     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1175 15:43:40.231528     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1176 15:43:40.241748     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1177 15:43:40.251570     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1178 15:43:40.261626     PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1179 15:43:40.271368     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1180 15:43:40.281442     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1181 15:43:40.291490     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1182 15:43:40.291997     PCI: 00:02.0

 1183 15:43:40.301156     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1184 15:43:40.314685     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1185 15:43:40.321204     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1186 15:43:40.324624     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1187 15:43:40.333947     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1188 15:43:40.337595      GENERIC: 0.0

 1189 15:43:40.340721     PCI: 00:05.0

 1190 15:43:40.350873     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1191 15:43:40.354565     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1192 15:43:40.357219      GENERIC: 0.0

 1193 15:43:40.357662     PCI: 00:08.0

 1194 15:43:40.367344     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1195 15:43:40.370259     PCI: 00:0a.0

 1196 15:43:40.373926     PCI: 00:0d.0 child on link 0 USB0 port 0

 1197 15:43:40.383690     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1198 15:43:40.386658      USB0 port 0 child on link 0 USB3 port 0

 1199 15:43:40.390093       USB3 port 0

 1200 15:43:40.390511       USB3 port 1

 1201 15:43:40.393429       USB3 port 2

 1202 15:43:40.393904       USB3 port 3

 1203 15:43:40.400032     PCI: 00:14.0 child on link 0 USB0 port 0

 1204 15:43:40.409998     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1205 15:43:40.413092      USB0 port 0 child on link 0 USB2 port 0

 1206 15:43:40.416666       USB2 port 0

 1207 15:43:40.417084       USB2 port 1

 1208 15:43:40.419742       USB2 port 2

 1209 15:43:40.420163       USB2 port 3

 1210 15:43:40.422725       USB2 port 4

 1211 15:43:40.423140       USB2 port 5

 1212 15:43:40.426467       USB2 port 6

 1213 15:43:40.426884       USB2 port 7

 1214 15:43:40.429959       USB2 port 8

 1215 15:43:40.432580       USB2 port 9

 1216 15:43:40.433035       USB3 port 0

 1217 15:43:40.436037       USB3 port 1

 1218 15:43:40.436454       USB3 port 2

 1219 15:43:40.439449       USB3 port 3

 1220 15:43:40.439914     PCI: 00:14.2

 1221 15:43:40.449400     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1222 15:43:40.459176     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1223 15:43:40.466043     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1224 15:43:40.475583     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1225 15:43:40.476110      GENERIC: 0.0

 1226 15:43:40.479079     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1227 15:43:40.489109     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1228 15:43:40.492309      I2C: 00:1a

 1229 15:43:40.492729      I2C: 00:31

 1230 15:43:40.495732      I2C: 00:32

 1231 15:43:40.499089     PCI: 00:15.1 child on link 0 I2C: 00:10

 1232 15:43:40.508809     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1233 15:43:40.512012      I2C: 00:10

 1234 15:43:40.512433     PCI: 00:15.2

 1235 15:43:40.522076     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1236 15:43:40.525173     PCI: 00:15.3

 1237 15:43:40.535148     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1238 15:43:40.535628     PCI: 00:16.0

 1239 15:43:40.544984     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1240 15:43:40.548358     PCI: 00:19.0

 1241 15:43:40.551794     PCI: 00:19.1 child on link 0 I2C: 00:15

 1242 15:43:40.561714     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1243 15:43:40.564612      I2C: 00:15

 1244 15:43:40.567996     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1245 15:43:40.578132     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1246 15:43:40.584958     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1247 15:43:40.594701     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1248 15:43:40.597572      GENERIC: 0.0

 1249 15:43:40.598003      PCI: 01:00.0

 1250 15:43:40.607733      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1251 15:43:40.617419      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1252 15:43:40.620803     PCI: 00:1e.0

 1253 15:43:40.630874     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1254 15:43:40.633939     PCI: 00:1e.2 child on link 0 SPI: 00

 1255 15:43:40.643555     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1256 15:43:40.647093      SPI: 00

 1257 15:43:40.650526     PCI: 00:1e.3 child on link 0 SPI: 00

 1258 15:43:40.660243     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1259 15:43:40.663580      SPI: 00

 1260 15:43:40.666828     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1261 15:43:40.673288     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1262 15:43:40.676928      PNP: 0c09.0

 1263 15:43:40.686750      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1264 15:43:40.690152     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1265 15:43:40.700080     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1266 15:43:40.709759     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1267 15:43:40.713177      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1268 15:43:40.716582       GENERIC: 0.0

 1269 15:43:40.716994       GENERIC: 1.0

 1270 15:43:40.719768     PCI: 00:1f.3

 1271 15:43:40.729377     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1272 15:43:40.739446     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1273 15:43:40.740057     PCI: 00:1f.5

 1274 15:43:40.749568     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1275 15:43:40.752824    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1276 15:43:40.755871     APIC: 00

 1277 15:43:40.756523     APIC: 05

 1278 15:43:40.757130     APIC: 03

 1279 15:43:40.759238     APIC: 06

 1280 15:43:40.759879     APIC: 07

 1281 15:43:40.762289     APIC: 04

 1282 15:43:40.762923     APIC: 01

 1283 15:43:40.763522     APIC: 02

 1284 15:43:40.772257  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1285 15:43:40.775415   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1286 15:43:40.782395   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1287 15:43:40.788961   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1288 15:43:40.792385    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1289 15:43:40.798932    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1290 15:43:40.805367   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1291 15:43:40.812074   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1292 15:43:40.818440   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1293 15:43:40.828638  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1294 15:43:40.834777  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1295 15:43:40.841445   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1296 15:43:40.848229   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1297 15:43:40.854679   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1298 15:43:40.857959   DOMAIN: 0000: Resource ranges:

 1299 15:43:40.861620   * Base: 1000, Size: 800, Tag: 100

 1300 15:43:40.868108   * Base: 1900, Size: e700, Tag: 100

 1301 15:43:40.871278    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1302 15:43:40.877586  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1303 15:43:40.884612  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1304 15:43:40.894485   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1305 15:43:40.901073   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1306 15:43:40.907302   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1307 15:43:40.917741   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1308 15:43:40.924149   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1309 15:43:40.930469   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1310 15:43:40.940539   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1311 15:43:40.946926   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1312 15:43:40.953451   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1313 15:43:40.963612   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1314 15:43:40.970479   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1315 15:43:40.977095   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1316 15:43:40.986696   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1317 15:43:40.993142   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1318 15:43:41.000104   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1319 15:43:41.009615   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1320 15:43:41.016163   update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)

 1321 15:43:41.022993   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1322 15:43:41.032928   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1323 15:43:41.039562   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1324 15:43:41.045733   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1325 15:43:41.055733   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1326 15:43:41.059140   DOMAIN: 0000: Resource ranges:

 1327 15:43:41.062498   * Base: 7fc00000, Size: 40400000, Tag: 200

 1328 15:43:41.065575   * Base: d0000000, Size: 28000000, Tag: 200

 1329 15:43:41.072289   * Base: fa000000, Size: 1000000, Tag: 200

 1330 15:43:41.075436   * Base: fb001000, Size: 2fff000, Tag: 200

 1331 15:43:41.078830   * Base: fe010000, Size: 2e000, Tag: 200

 1332 15:43:41.085528   * Base: fe03f000, Size: d41000, Tag: 200

 1333 15:43:41.088758   * Base: fed88000, Size: 8000, Tag: 200

 1334 15:43:41.092100   * Base: fed93000, Size: d000, Tag: 200

 1335 15:43:41.095380   * Base: feda2000, Size: 1e000, Tag: 200

 1336 15:43:41.098883   * Base: fede0000, Size: 1220000, Tag: 200

 1337 15:43:41.105204   * Base: 480400000, Size: 7b7fc00000, Tag: 100200

 1338 15:43:41.112001    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1339 15:43:41.118493    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1340 15:43:41.125086    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1341 15:43:41.131791    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1342 15:43:41.138385    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1343 15:43:41.145194    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1344 15:43:41.151506    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1345 15:43:41.158258    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1346 15:43:41.164998    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1347 15:43:41.171518    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1348 15:43:41.177971    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1349 15:43:41.184651    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1350 15:43:41.191056    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1351 15:43:41.197823    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1352 15:43:41.204268    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1353 15:43:41.211089    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1354 15:43:41.217640    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1355 15:43:41.224192    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1356 15:43:41.230726    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1357 15:43:41.237077    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1358 15:43:41.243720    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1359 15:43:41.250308    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1360 15:43:41.260330  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1361 15:43:41.267054  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1362 15:43:41.269976   PCI: 00:1d.0: Resource ranges:

 1363 15:43:41.273317   * Base: 7fc00000, Size: 100000, Tag: 200

 1364 15:43:41.280065    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1365 15:43:41.286646    PCI: 01:00.0 20 *  [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem

 1366 15:43:41.296241  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1367 15:43:41.303145  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1368 15:43:41.306069  Root Device assign_resources, bus 0 link: 0

 1369 15:43:41.312711  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1370 15:43:41.319291  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1371 15:43:41.329285  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1372 15:43:41.335918  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1373 15:43:41.345672  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1374 15:43:41.348988  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1375 15:43:41.355707  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1376 15:43:41.361977  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1377 15:43:41.372200  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1378 15:43:41.378410  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1379 15:43:41.382060  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1380 15:43:41.388710  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1381 15:43:41.395148  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1382 15:43:41.401679  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1383 15:43:41.405076  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1384 15:43:41.415051  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1385 15:43:41.421555  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1386 15:43:41.431216  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1387 15:43:41.434542  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1388 15:43:41.438421  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1389 15:43:41.447775  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1390 15:43:41.451055  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1391 15:43:41.457920  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1392 15:43:41.464569  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1393 15:43:41.468125  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1394 15:43:41.474842  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1395 15:43:41.480879  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1396 15:43:41.491183  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1397 15:43:41.497446  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1398 15:43:41.507272  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1399 15:43:41.510636  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1400 15:43:41.517261  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1401 15:43:41.523531  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1402 15:43:41.533699  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1403 15:43:41.543373  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1404 15:43:41.547046  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1405 15:43:41.556903  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1406 15:43:41.563318  PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64

 1407 15:43:41.569857  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1408 15:43:41.576562  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1409 15:43:41.583275  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1410 15:43:41.586664  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1411 15:43:41.593361  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1412 15:43:41.599711  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1413 15:43:41.603107  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1414 15:43:41.609334  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1415 15:43:41.612559  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1416 15:43:41.619369  LPC: Trying to open IO window from 800 size 1ff

 1417 15:43:41.626004  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1418 15:43:41.635741  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1419 15:43:41.642439  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1420 15:43:41.645697  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1421 15:43:41.652917  Root Device assign_resources, bus 0 link: 0

 1422 15:43:41.656029  Done setting resources.

 1423 15:43:41.662357  Show resources in subtree (Root Device)...After assigning values.

 1424 15:43:41.665485   Root Device child on link 0 DOMAIN: 0000

 1425 15:43:41.668892    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1426 15:43:41.679279    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1427 15:43:41.688702    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1428 15:43:41.689419     PCI: 00:00.0

 1429 15:43:41.698726     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1430 15:43:41.709024     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1431 15:43:41.718448     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1432 15:43:41.728675     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1433 15:43:41.738721     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1434 15:43:41.748373     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1435 15:43:41.754985     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1436 15:43:41.765285     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1437 15:43:41.775209     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1438 15:43:41.784933     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1439 15:43:41.794963     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1440 15:43:41.801577     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1441 15:43:41.811271     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1442 15:43:41.821123     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1443 15:43:41.831305     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1444 15:43:41.840872     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1445 15:43:41.851186     PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1446 15:43:41.861234     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1447 15:43:41.867827     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1448 15:43:41.877864     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1449 15:43:41.881098     PCI: 00:02.0

 1450 15:43:41.890822     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1451 15:43:41.900316     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1452 15:43:41.910565     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1453 15:43:41.917417     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1454 15:43:41.927289     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1455 15:43:41.927780      GENERIC: 0.0

 1456 15:43:41.930383     PCI: 00:05.0

 1457 15:43:41.940215     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1458 15:43:41.943336     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1459 15:43:41.946784      GENERIC: 0.0

 1460 15:43:41.947201     PCI: 00:08.0

 1461 15:43:41.956595     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1462 15:43:41.959941     PCI: 00:0a.0

 1463 15:43:41.963079     PCI: 00:0d.0 child on link 0 USB0 port 0

 1464 15:43:41.973019     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1465 15:43:41.979686      USB0 port 0 child on link 0 USB3 port 0

 1466 15:43:41.980109       USB3 port 0

 1467 15:43:41.982812       USB3 port 1

 1468 15:43:41.983223       USB3 port 2

 1469 15:43:41.985998       USB3 port 3

 1470 15:43:41.989453     PCI: 00:14.0 child on link 0 USB0 port 0

 1471 15:43:41.999346     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1472 15:43:42.006100      USB0 port 0 child on link 0 USB2 port 0

 1473 15:43:42.006511       USB2 port 0

 1474 15:43:42.009483       USB2 port 1

 1475 15:43:42.009895       USB2 port 2

 1476 15:43:42.012811       USB2 port 3

 1477 15:43:42.013219       USB2 port 4

 1478 15:43:42.016129       USB2 port 5

 1479 15:43:42.019436       USB2 port 6

 1480 15:43:42.019951       USB2 port 7

 1481 15:43:42.022626       USB2 port 8

 1482 15:43:42.023035       USB2 port 9

 1483 15:43:42.026259       USB3 port 0

 1484 15:43:42.026778       USB3 port 1

 1485 15:43:42.029341       USB3 port 2

 1486 15:43:42.029911       USB3 port 3

 1487 15:43:42.033015     PCI: 00:14.2

 1488 15:43:42.042539     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1489 15:43:42.051980     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1490 15:43:42.055511     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1491 15:43:42.068606     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1492 15:43:42.069130      GENERIC: 0.0

 1493 15:43:42.072293     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1494 15:43:42.085034     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1495 15:43:42.085517      I2C: 00:1a

 1496 15:43:42.085848      I2C: 00:31

 1497 15:43:42.088674      I2C: 00:32

 1498 15:43:42.091921     PCI: 00:15.1 child on link 0 I2C: 00:10

 1499 15:43:42.101955     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1500 15:43:42.104608      I2C: 00:10

 1501 15:43:42.105044     PCI: 00:15.2

 1502 15:43:42.118287     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1503 15:43:42.118770     PCI: 00:15.3

 1504 15:43:42.127890     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1505 15:43:42.131293     PCI: 00:16.0

 1506 15:43:42.140934     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1507 15:43:42.141359     PCI: 00:19.0

 1508 15:43:42.147523     PCI: 00:19.1 child on link 0 I2C: 00:15

 1509 15:43:42.157763     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1510 15:43:42.158186      I2C: 00:15

 1511 15:43:42.164437     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1512 15:43:42.171094     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1513 15:43:42.184015     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1514 15:43:42.194008     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1515 15:43:42.197152      GENERIC: 0.0

 1516 15:43:42.197571      PCI: 01:00.0

 1517 15:43:42.206954      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1518 15:43:42.217015      PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20

 1519 15:43:42.219789     PCI: 00:1e.0

 1520 15:43:42.230160     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1521 15:43:42.236799     PCI: 00:1e.2 child on link 0 SPI: 00

 1522 15:43:42.245997     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1523 15:43:42.246084      SPI: 00

 1524 15:43:42.249234     PCI: 00:1e.3 child on link 0 SPI: 00

 1525 15:43:42.259015     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1526 15:43:42.262277      SPI: 00

 1527 15:43:42.265636     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1528 15:43:42.275756     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1529 15:43:42.275844      PNP: 0c09.0

 1530 15:43:42.285662      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1531 15:43:42.288747     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1532 15:43:42.298849     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1533 15:43:42.308540     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1534 15:43:42.311767      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1535 15:43:42.314980       GENERIC: 0.0

 1536 15:43:42.318413       GENERIC: 1.0

 1537 15:43:42.318493     PCI: 00:1f.3

 1538 15:43:42.328528     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1539 15:43:42.338314     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1540 15:43:42.341656     PCI: 00:1f.5

 1541 15:43:42.351373     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1542 15:43:42.354783    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1543 15:43:42.358146     APIC: 00

 1544 15:43:42.358226     APIC: 05

 1545 15:43:42.358289     APIC: 03

 1546 15:43:42.361485     APIC: 06

 1547 15:43:42.361564     APIC: 07

 1548 15:43:42.364746     APIC: 04

 1549 15:43:42.364817     APIC: 01

 1550 15:43:42.364877     APIC: 02

 1551 15:43:42.368262  Done allocating resources.

 1552 15:43:42.374675  BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms

 1553 15:43:42.380806  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1554 15:43:42.384223  Configure GPIOs for I2S audio on UP4.

 1555 15:43:42.390886  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1556 15:43:42.394195  Enabling resources...

 1557 15:43:42.397464  PCI: 00:00.0 subsystem <- 8086/9a12

 1558 15:43:42.400569  PCI: 00:00.0 cmd <- 06

 1559 15:43:42.403844  PCI: 00:02.0 subsystem <- 8086/9a40

 1560 15:43:42.407564  PCI: 00:02.0 cmd <- 03

 1561 15:43:42.410865  PCI: 00:04.0 subsystem <- 8086/9a03

 1562 15:43:42.414175  PCI: 00:04.0 cmd <- 02

 1563 15:43:42.417075  PCI: 00:05.0 subsystem <- 8086/9a19

 1564 15:43:42.417160  PCI: 00:05.0 cmd <- 02

 1565 15:43:42.424025  PCI: 00:08.0 subsystem <- 8086/9a11

 1566 15:43:42.424112  PCI: 00:08.0 cmd <- 06

 1567 15:43:42.427350  PCI: 00:0d.0 subsystem <- 8086/9a13

 1568 15:43:42.430368  PCI: 00:0d.0 cmd <- 02

 1569 15:43:42.433900  PCI: 00:14.0 subsystem <- 8086/a0ed

 1570 15:43:42.437177  PCI: 00:14.0 cmd <- 02

 1571 15:43:42.440468  PCI: 00:14.2 subsystem <- 8086/a0ef

 1572 15:43:42.443899  PCI: 00:14.2 cmd <- 02

 1573 15:43:42.447109  PCI: 00:14.3 subsystem <- 8086/a0f0

 1574 15:43:42.450222  PCI: 00:14.3 cmd <- 02

 1575 15:43:42.453670  PCI: 00:15.0 subsystem <- 8086/a0e8

 1576 15:43:42.456941  PCI: 00:15.0 cmd <- 02

 1577 15:43:42.460320  PCI: 00:15.1 subsystem <- 8086/a0e9

 1578 15:43:42.463611  PCI: 00:15.1 cmd <- 02

 1579 15:43:42.467135  PCI: 00:15.2 subsystem <- 8086/a0ea

 1580 15:43:42.467284  PCI: 00:15.2 cmd <- 02

 1581 15:43:42.473607  PCI: 00:15.3 subsystem <- 8086/a0eb

 1582 15:43:42.473777  PCI: 00:15.3 cmd <- 02

 1583 15:43:42.480387  PCI: 00:16.0 subsystem <- 8086/a0e0

 1584 15:43:42.480706  PCI: 00:16.0 cmd <- 02

 1585 15:43:42.483483  PCI: 00:19.1 subsystem <- 8086/a0c6

 1586 15:43:42.486907  PCI: 00:19.1 cmd <- 02

 1587 15:43:42.489762  PCI: 00:1d.0 bridge ctrl <- 0013

 1588 15:43:42.493579  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1589 15:43:42.496857  PCI: 00:1d.0 cmd <- 06

 1590 15:43:42.500027  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1591 15:43:42.503182  PCI: 00:1e.0 cmd <- 06

 1592 15:43:42.506407  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1593 15:43:42.509706  PCI: 00:1e.2 cmd <- 06

 1594 15:43:42.513418  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1595 15:43:42.516546  PCI: 00:1e.3 cmd <- 02

 1596 15:43:42.519823  PCI: 00:1f.0 subsystem <- 8086/a087

 1597 15:43:42.523205  PCI: 00:1f.0 cmd <- 407

 1598 15:43:42.526359  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1599 15:43:42.526777  PCI: 00:1f.3 cmd <- 02

 1600 15:43:42.533261  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1601 15:43:42.533677  PCI: 00:1f.5 cmd <- 406

 1602 15:43:42.538095  PCI: 01:00.0 cmd <- 02

 1603 15:43:42.542917  done.

 1604 15:43:42.546069  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1605 15:43:42.549295  Initializing devices...

 1606 15:43:42.552344  Root Device init

 1607 15:43:42.555782  Chrome EC: Set SMI mask to 0x0000000000000000

 1608 15:43:42.562037  Chrome EC: clear events_b mask to 0x0000000000000000

 1609 15:43:42.569031  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1610 15:43:42.571762  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1611 15:43:42.578616  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1612 15:43:42.585193  Chrome EC: Set WAKE mask to 0x0000000000000000

 1613 15:43:42.588339  fw_config match found: DB_USB=USB3_ACTIVE

 1614 15:43:42.595179  Configure Right Type-C port orientation for retimer

 1615 15:43:42.598395  Root Device init finished in 42 msecs

 1616 15:43:42.601653  PCI: 00:00.0 init

 1617 15:43:42.605339  CPU TDP = 9 Watts

 1618 15:43:42.605510  CPU PL1 = 9 Watts

 1619 15:43:42.608366  CPU PL2 = 40 Watts

 1620 15:43:42.608540  CPU PL4 = 83 Watts

 1621 15:43:42.615011  PCI: 00:00.0 init finished in 8 msecs

 1622 15:43:42.615257  PCI: 00:02.0 init

 1623 15:43:42.618164  GMA: Found VBT in CBFS

 1624 15:43:42.621986  GMA: Found valid VBT in CBFS

 1625 15:43:42.628147  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1626 15:43:42.635032                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1627 15:43:42.638263  PCI: 00:02.0 init finished in 18 msecs

 1628 15:43:42.641606  PCI: 00:05.0 init

 1629 15:43:42.644701  PCI: 00:05.0 init finished in 0 msecs

 1630 15:43:42.648041  PCI: 00:08.0 init

 1631 15:43:42.651418  PCI: 00:08.0 init finished in 0 msecs

 1632 15:43:42.654793  PCI: 00:14.0 init

 1633 15:43:42.658087  PCI: 00:14.0 init finished in 0 msecs

 1634 15:43:42.658510  PCI: 00:14.2 init

 1635 15:43:42.664836  PCI: 00:14.2 init finished in 0 msecs

 1636 15:43:42.665259  PCI: 00:15.0 init

 1637 15:43:42.668053  I2C bus 0 version 0x3230302a

 1638 15:43:42.670908  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1639 15:43:42.677608  PCI: 00:15.0 init finished in 6 msecs

 1640 15:43:42.678056  PCI: 00:15.1 init

 1641 15:43:42.681126  I2C bus 1 version 0x3230302a

 1642 15:43:42.684432  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1643 15:43:42.687594  PCI: 00:15.1 init finished in 6 msecs

 1644 15:43:42.691058  PCI: 00:15.2 init

 1645 15:43:42.694278  I2C bus 2 version 0x3230302a

 1646 15:43:42.697550  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1647 15:43:42.700647  PCI: 00:15.2 init finished in 6 msecs

 1648 15:43:42.704055  PCI: 00:15.3 init

 1649 15:43:42.707525  I2C bus 3 version 0x3230302a

 1650 15:43:42.710644  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1651 15:43:42.714038  PCI: 00:15.3 init finished in 6 msecs

 1652 15:43:42.717034  PCI: 00:16.0 init

 1653 15:43:42.720664  PCI: 00:16.0 init finished in 0 msecs

 1654 15:43:42.724090  PCI: 00:19.1 init

 1655 15:43:42.726941  I2C bus 5 version 0x3230302a

 1656 15:43:42.730473  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1657 15:43:42.733540  PCI: 00:19.1 init finished in 6 msecs

 1658 15:43:42.733951  PCI: 00:1d.0 init

 1659 15:43:42.736890  Initializing PCH PCIe bridge.

 1660 15:43:42.743525  PCI: 00:1d.0 init finished in 3 msecs

 1661 15:43:42.744000  PCI: 00:1f.0 init

 1662 15:43:42.750037  IOAPIC: Initializing IOAPIC at 0xfec00000

 1663 15:43:42.753792  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1664 15:43:42.757038  IOAPIC: ID = 0x02

 1665 15:43:42.759875  IOAPIC: Dumping registers

 1666 15:43:42.760332    reg 0x0000: 0x02000000

 1667 15:43:42.763263    reg 0x0001: 0x00770020

 1668 15:43:42.766569    reg 0x0002: 0x00000000

 1669 15:43:42.769963  PCI: 00:1f.0 init finished in 21 msecs

 1670 15:43:42.773379  PCI: 00:1f.2 init

 1671 15:43:42.776740  Disabling ACPI via APMC.

 1672 15:43:42.777199  APMC done.

 1673 15:43:42.783350  PCI: 00:1f.2 init finished in 5 msecs

 1674 15:43:42.793408  PCI: 01:00.0 init

 1675 15:43:42.796759  PCI: 01:00.0 init finished in 0 msecs

 1676 15:43:42.800121  PNP: 0c09.0 init

 1677 15:43:42.803450  Google Chrome EC uptime: 8.382 seconds

 1678 15:43:42.809874  Google Chrome AP resets since EC boot: 1

 1679 15:43:42.813014  Google Chrome most recent AP reset causes:

 1680 15:43:42.816611  	0.455: 32775 shutdown: entering G3

 1681 15:43:42.822764  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1682 15:43:42.826239  PNP: 0c09.0 init finished in 22 msecs

 1683 15:43:42.832378  Devices initialized

 1684 15:43:42.835714  Show all devs... After init.

 1685 15:43:42.838922  Root Device: enabled 1

 1686 15:43:42.839391  DOMAIN: 0000: enabled 1

 1687 15:43:42.842264  CPU_CLUSTER: 0: enabled 1

 1688 15:43:42.845544  PCI: 00:00.0: enabled 1

 1689 15:43:42.848805  PCI: 00:02.0: enabled 1

 1690 15:43:42.849271  PCI: 00:04.0: enabled 1

 1691 15:43:42.852161  PCI: 00:05.0: enabled 1

 1692 15:43:42.855195  PCI: 00:06.0: enabled 0

 1693 15:43:42.858461  PCI: 00:07.0: enabled 0

 1694 15:43:42.858882  PCI: 00:07.1: enabled 0

 1695 15:43:42.862319  PCI: 00:07.2: enabled 0

 1696 15:43:42.865587  PCI: 00:07.3: enabled 0

 1697 15:43:42.868514  PCI: 00:08.0: enabled 1

 1698 15:43:42.868930  PCI: 00:09.0: enabled 0

 1699 15:43:42.871819  PCI: 00:0a.0: enabled 0

 1700 15:43:42.875343  PCI: 00:0d.0: enabled 1

 1701 15:43:42.878596  PCI: 00:0d.1: enabled 0

 1702 15:43:42.879145  PCI: 00:0d.2: enabled 0

 1703 15:43:42.881904  PCI: 00:0d.3: enabled 0

 1704 15:43:42.884841  PCI: 00:0e.0: enabled 0

 1705 15:43:42.888139  PCI: 00:10.2: enabled 1

 1706 15:43:42.888565  PCI: 00:10.6: enabled 0

 1707 15:43:42.891676  PCI: 00:10.7: enabled 0

 1708 15:43:42.894994  PCI: 00:12.0: enabled 0

 1709 15:43:42.897998  PCI: 00:12.6: enabled 0

 1710 15:43:42.898107  PCI: 00:13.0: enabled 0

 1711 15:43:42.901304  PCI: 00:14.0: enabled 1

 1712 15:43:42.904651  PCI: 00:14.1: enabled 0

 1713 15:43:42.907389  PCI: 00:14.2: enabled 1

 1714 15:43:42.907503  PCI: 00:14.3: enabled 1

 1715 15:43:42.910883  PCI: 00:15.0: enabled 1

 1716 15:43:42.914347  PCI: 00:15.1: enabled 1

 1717 15:43:42.914432  PCI: 00:15.2: enabled 1

 1718 15:43:42.917326  PCI: 00:15.3: enabled 1

 1719 15:43:42.920673  PCI: 00:16.0: enabled 1

 1720 15:43:42.924084  PCI: 00:16.1: enabled 0

 1721 15:43:42.924183  PCI: 00:16.2: enabled 0

 1722 15:43:42.927219  PCI: 00:16.3: enabled 0

 1723 15:43:42.930969  PCI: 00:16.4: enabled 0

 1724 15:43:42.934063  PCI: 00:16.5: enabled 0

 1725 15:43:42.934182  PCI: 00:17.0: enabled 0

 1726 15:43:42.937736  PCI: 00:19.0: enabled 0

 1727 15:43:42.940773  PCI: 00:19.1: enabled 1

 1728 15:43:42.944003  PCI: 00:19.2: enabled 0

 1729 15:43:42.944174  PCI: 00:1c.0: enabled 1

 1730 15:43:42.947283  PCI: 00:1c.1: enabled 0

 1731 15:43:42.950569  PCI: 00:1c.2: enabled 0

 1732 15:43:42.953937  PCI: 00:1c.3: enabled 0

 1733 15:43:42.954523  PCI: 00:1c.4: enabled 0

 1734 15:43:42.957379  PCI: 00:1c.5: enabled 0

 1735 15:43:42.960545  PCI: 00:1c.6: enabled 1

 1736 15:43:42.963834  PCI: 00:1c.7: enabled 0

 1737 15:43:42.964248  PCI: 00:1d.0: enabled 1

 1738 15:43:42.967332  PCI: 00:1d.1: enabled 0

 1739 15:43:42.970651  PCI: 00:1d.2: enabled 1

 1740 15:43:42.973956  PCI: 00:1d.3: enabled 0

 1741 15:43:42.974369  PCI: 00:1e.0: enabled 1

 1742 15:43:42.977342  PCI: 00:1e.1: enabled 0

 1743 15:43:42.980656  PCI: 00:1e.2: enabled 1

 1744 15:43:42.981116  PCI: 00:1e.3: enabled 1

 1745 15:43:42.984162  PCI: 00:1f.0: enabled 1

 1746 15:43:42.987070  PCI: 00:1f.1: enabled 0

 1747 15:43:42.990503  PCI: 00:1f.2: enabled 1

 1748 15:43:42.990915  PCI: 00:1f.3: enabled 1

 1749 15:43:42.993990  PCI: 00:1f.4: enabled 0

 1750 15:43:42.997324  PCI: 00:1f.5: enabled 1

 1751 15:43:43.000677  PCI: 00:1f.6: enabled 0

 1752 15:43:43.001089  PCI: 00:1f.7: enabled 0

 1753 15:43:43.003526  APIC: 00: enabled 1

 1754 15:43:43.007061  GENERIC: 0.0: enabled 1

 1755 15:43:43.007487  GENERIC: 0.0: enabled 1

 1756 15:43:43.010337  GENERIC: 1.0: enabled 1

 1757 15:43:43.013605  GENERIC: 0.0: enabled 1

 1758 15:43:43.017046  GENERIC: 1.0: enabled 1

 1759 15:43:43.017468  USB0 port 0: enabled 1

 1760 15:43:43.019938  GENERIC: 0.0: enabled 1

 1761 15:43:43.023581  USB0 port 0: enabled 1

 1762 15:43:43.026873  GENERIC: 0.0: enabled 1

 1763 15:43:43.027323  I2C: 00:1a: enabled 1

 1764 15:43:43.030140  I2C: 00:31: enabled 1

 1765 15:43:43.033596  I2C: 00:32: enabled 1

 1766 15:43:43.034071  I2C: 00:10: enabled 1

 1767 15:43:43.036613  I2C: 00:15: enabled 1

 1768 15:43:43.039617  GENERIC: 0.0: enabled 0

 1769 15:43:43.043294  GENERIC: 1.0: enabled 0

 1770 15:43:43.043766  GENERIC: 0.0: enabled 1

 1771 15:43:43.046391  SPI: 00: enabled 1

 1772 15:43:43.046814  SPI: 00: enabled 1

 1773 15:43:43.049977  PNP: 0c09.0: enabled 1

 1774 15:43:43.053085  GENERIC: 0.0: enabled 1

 1775 15:43:43.057167  USB3 port 0: enabled 1

 1776 15:43:43.057703  USB3 port 1: enabled 1

 1777 15:43:43.060038  USB3 port 2: enabled 0

 1778 15:43:43.063196  USB3 port 3: enabled 0

 1779 15:43:43.063707  USB2 port 0: enabled 0

 1780 15:43:43.066366  USB2 port 1: enabled 1

 1781 15:43:43.069911  USB2 port 2: enabled 1

 1782 15:43:43.072573  USB2 port 3: enabled 0

 1783 15:43:43.072993  USB2 port 4: enabled 1

 1784 15:43:43.075963  USB2 port 5: enabled 0

 1785 15:43:43.079414  USB2 port 6: enabled 0

 1786 15:43:43.079877  USB2 port 7: enabled 0

 1787 15:43:43.082900  USB2 port 8: enabled 0

 1788 15:43:43.085732  USB2 port 9: enabled 0

 1789 15:43:43.089157  USB3 port 0: enabled 0

 1790 15:43:43.089571  USB3 port 1: enabled 1

 1791 15:43:43.092626  USB3 port 2: enabled 0

 1792 15:43:43.096104  USB3 port 3: enabled 0

 1793 15:43:43.096518  GENERIC: 0.0: enabled 1

 1794 15:43:43.098819  GENERIC: 1.0: enabled 1

 1795 15:43:43.102210  APIC: 05: enabled 1

 1796 15:43:43.102624  APIC: 03: enabled 1

 1797 15:43:43.105616  APIC: 06: enabled 1

 1798 15:43:43.109079  APIC: 07: enabled 1

 1799 15:43:43.109493  APIC: 04: enabled 1

 1800 15:43:43.112462  APIC: 01: enabled 1

 1801 15:43:43.115700  APIC: 02: enabled 1

 1802 15:43:43.116115  PCI: 01:00.0: enabled 1

 1803 15:43:43.121844  BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms

 1804 15:43:43.125625  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1805 15:43:43.132262  ELOG: NV offset 0xf30000 size 0x1000

 1806 15:43:43.138309  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1807 15:43:43.145374  ELOG: Event(17) added with size 13 at 2023-08-07 15:43:43 UTC

 1808 15:43:43.151537  ELOG: Event(92) added with size 9 at 2023-08-07 15:43:43 UTC

 1809 15:43:43.158249  ELOG: Event(93) added with size 9 at 2023-08-07 15:43:43 UTC

 1810 15:43:43.164793  ELOG: Event(9E) added with size 10 at 2023-08-07 15:43:43 UTC

 1811 15:43:43.171549  ELOG: Event(9F) added with size 14 at 2023-08-07 15:43:43 UTC

 1812 15:43:43.174991  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1813 15:43:43.181237  ELOG: Event(A1) added with size 10 at 2023-08-07 15:43:43 UTC

 1814 15:43:43.191039  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1815 15:43:43.194483  ELOG: Event(A0) added with size 9 at 2023-08-07 15:43:43 UTC

 1816 15:43:43.201284  elog_add_boot_reason: Logged dev mode boot

 1817 15:43:43.207982  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms

 1818 15:43:43.208523  Finalize devices...

 1819 15:43:43.210781  Devices finalized

 1820 15:43:43.214136  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1821 15:43:43.220718  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1822 15:43:43.227382  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1823 15:43:43.230655  ME: HFSTS1                      : 0x80030055

 1824 15:43:43.233858  ME: HFSTS2                      : 0x30280116

 1825 15:43:43.240516  ME: HFSTS3                      : 0x00000050

 1826 15:43:43.243948  ME: HFSTS4                      : 0x00004000

 1827 15:43:43.249909  ME: HFSTS5                      : 0x00000000

 1828 15:43:43.253500  ME: HFSTS6                      : 0x40400006

 1829 15:43:43.256567  ME: Manufacturing Mode          : YES

 1830 15:43:43.260339  ME: SPI Protection Mode Enabled : NO

 1831 15:43:43.263268  ME: FW Partition Table          : OK

 1832 15:43:43.266885  ME: Bringup Loader Failure      : NO

 1833 15:43:43.273442  ME: Firmware Init Complete      : NO

 1834 15:43:43.276446  ME: Boot Options Present        : NO

 1835 15:43:43.280040  ME: Update In Progress          : NO

 1836 15:43:43.283023  ME: D0i3 Support                : YES

 1837 15:43:43.286601  ME: Low Power State Enabled     : NO

 1838 15:43:43.290143  ME: CPU Replaced                : YES

 1839 15:43:43.293335  ME: CPU Replacement Valid       : YES

 1840 15:43:43.296680  ME: Current Working State       : 5

 1841 15:43:43.302804  ME: Current Operation State     : 1

 1842 15:43:43.306151  ME: Current Operation Mode      : 3

 1843 15:43:43.309530  ME: Error Code                  : 0

 1844 15:43:43.312879  ME: Enhanced Debug Mode         : NO

 1845 15:43:43.316280  ME: CPU Debug Disabled          : YES

 1846 15:43:43.319511  ME: TXT Support                 : NO

 1847 15:43:43.326266  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1848 15:43:43.332946  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1849 15:43:43.336261  CBFS: 'fallback/slic' not found.

 1850 15:43:43.342617  ACPI: Writing ACPI tables at 76b01000.

 1851 15:43:43.342699  ACPI:    * FACS

 1852 15:43:43.345937  ACPI:    * DSDT

 1853 15:43:43.349258  Ramoops buffer: 0x100000@0x76a00000.

 1854 15:43:43.352615  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1855 15:43:43.359145  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1856 15:43:43.362346  Google Chrome EC: version:

 1857 15:43:43.365815  	ro: voema_v2.0.10114-a447f03e46

 1858 15:43:43.369090  	rw: voema_v2.0.10114-a447f03e46

 1859 15:43:43.369176    running image: 2

 1860 15:43:43.375378  PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000

 1861 15:43:43.380098  ACPI:    * FADT

 1862 15:43:43.380181  SCI is IRQ9

 1863 15:43:43.386634  ACPI: added table 1/32, length now 40

 1864 15:43:43.386714  ACPI:     * SSDT

 1865 15:43:43.389743  Found 1 CPU(s) with 8 core(s) each.

 1866 15:43:43.396463  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1867 15:43:43.399555  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1868 15:43:43.402790  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1869 15:43:43.409560  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1870 15:43:43.412933  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1871 15:43:43.419745  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1872 15:43:43.422531  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1873 15:43:43.429301  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1874 15:43:43.435843  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1875 15:43:43.439057  \_SB.PCI0.RP09: Added StorageD3Enable property

 1876 15:43:43.445493  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1877 15:43:43.448852  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1878 15:43:43.455431  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1879 15:43:43.458945  PS2K: Passing 80 keymaps to kernel

 1880 15:43:43.465447  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1881 15:43:43.471889  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1882 15:43:43.478462  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1883 15:43:43.485361  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1884 15:43:43.491770  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1885 15:43:43.498511  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1886 15:43:43.504973  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1887 15:43:43.511695  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1888 15:43:43.515013  ACPI: added table 2/32, length now 44

 1889 15:43:43.517987  ACPI:    * MCFG

 1890 15:43:43.521485  ACPI: added table 3/32, length now 48

 1891 15:43:43.521562  ACPI:    * TPM2

 1892 15:43:43.524920  TPM2 log created at 0x769f0000

 1893 15:43:43.528425  ACPI: added table 4/32, length now 52

 1894 15:43:43.531309  ACPI:    * MADT

 1895 15:43:43.531409  SCI is IRQ9

 1896 15:43:43.534861  ACPI: added table 5/32, length now 56

 1897 15:43:43.537741  current = 76b09850

 1898 15:43:43.537829  ACPI:    * DMAR

 1899 15:43:43.544859  ACPI: added table 6/32, length now 60

 1900 15:43:43.547582  ACPI: added table 7/32, length now 64

 1901 15:43:43.547708  ACPI:    * HPET

 1902 15:43:43.550975  ACPI: added table 8/32, length now 68

 1903 15:43:43.554320  ACPI: done.

 1904 15:43:43.557738  ACPI tables: 35216 bytes.

 1905 15:43:43.561129  smbios_write_tables: 769ef000

 1906 15:43:43.564493  EC returned error result code 3

 1907 15:43:43.567692  Couldn't obtain OEM name from CBI

 1908 15:43:43.571092  Create SMBIOS type 16

 1909 15:43:43.571242  Create SMBIOS type 17

 1910 15:43:43.574425  GENERIC: 0.0 (WIFI Device)

 1911 15:43:43.577650  SMBIOS tables: 1734 bytes.

 1912 15:43:43.581022  Writing table forward entry at 0x00000500

 1913 15:43:43.587508  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1914 15:43:43.590642  Writing coreboot table at 0x76b25000

 1915 15:43:43.597641   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1916 15:43:43.601153   1. 0000000000001000-000000000009ffff: RAM

 1917 15:43:43.607457   2. 00000000000a0000-00000000000fffff: RESERVED

 1918 15:43:43.610749   3. 0000000000100000-00000000769eefff: RAM

 1919 15:43:43.617584   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1920 15:43:43.620559   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1921 15:43:43.627328   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1922 15:43:43.634149   7. 0000000077000000-000000007fbfffff: RESERVED

 1923 15:43:43.637507   8. 00000000c0000000-00000000cfffffff: RESERVED

 1924 15:43:43.641024   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1925 15:43:43.647083  10. 00000000fb000000-00000000fb000fff: RESERVED

 1926 15:43:43.650293  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1927 15:43:43.657120  12. 00000000fed80000-00000000fed87fff: RESERVED

 1928 15:43:43.660419  13. 00000000fed90000-00000000fed92fff: RESERVED

 1929 15:43:43.667386  14. 00000000feda0000-00000000feda1fff: RESERVED

 1930 15:43:43.670180  15. 00000000fedc0000-00000000feddffff: RESERVED

 1931 15:43:43.673552  16. 0000000100000000-00000004803fffff: RAM

 1932 15:43:43.676733  Passing 4 GPIOs to payload:

 1933 15:43:43.683805              NAME |       PORT | POLARITY |     VALUE

 1934 15:43:43.690072               lid |  undefined |     high |      high

 1935 15:43:43.693266             power |  undefined |     high |       low

 1936 15:43:43.700301             oprom |  undefined |     high |       low

 1937 15:43:43.703124          EC in RW | 0x000000e5 |     high |      high

 1938 15:43:43.710066  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865

 1939 15:43:43.713088  coreboot table: 1576 bytes.

 1940 15:43:43.716195  IMD ROOT    0. 0x76fff000 0x00001000

 1941 15:43:43.719750  IMD SMALL   1. 0x76ffe000 0x00001000

 1942 15:43:43.726024  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1943 15:43:43.729652  VPD         3. 0x76c4d000 0x00000367

 1944 15:43:43.732725  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1945 15:43:43.736089  CONSOLE     5. 0x76c2c000 0x00020000

 1946 15:43:43.739367  FMAP        6. 0x76c2b000 0x00000578

 1947 15:43:43.742793  TIME STAMP  7. 0x76c2a000 0x00000910

 1948 15:43:43.746322  VBOOT WORK  8. 0x76c16000 0x00014000

 1949 15:43:43.749219  ROMSTG STCK 9. 0x76c15000 0x00001000

 1950 15:43:43.756064  AFTER CAR  10. 0x76c0a000 0x0000b000

 1951 15:43:43.759357  RAMSTAGE   11. 0x76b97000 0x00073000

 1952 15:43:43.762795  REFCODE    12. 0x76b42000 0x00055000

 1953 15:43:43.766041  SMM BACKUP 13. 0x76b32000 0x00010000

 1954 15:43:43.769379  4f444749   14. 0x76b30000 0x00002000

 1955 15:43:43.772791  EXT VBT15. 0x76b2d000 0x0000219f

 1956 15:43:43.775510  COREBOOT   16. 0x76b25000 0x00008000

 1957 15:43:43.778963  ACPI       17. 0x76b01000 0x00024000

 1958 15:43:43.785353  ACPI GNVS  18. 0x76b00000 0x00001000

 1959 15:43:43.788593  RAMOOPS    19. 0x76a00000 0x00100000

 1960 15:43:43.792110  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1961 15:43:43.795474  SMBIOS     21. 0x769ef000 0x00000800

 1962 15:43:43.798826  IMD small region:

 1963 15:43:43.802233    IMD ROOT    0. 0x76ffec00 0x00000400

 1964 15:43:43.805402    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1965 15:43:43.808691    POWER STATE 2. 0x76ffeb80 0x00000044

 1966 15:43:43.812104    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1967 15:43:43.815371    MEM INFO    4. 0x76ffe980 0x000001e0

 1968 15:43:43.821413  BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms

 1969 15:43:43.824772  MTRR: Physical address space:

 1970 15:43:43.831685  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1971 15:43:43.838034  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1972 15:43:43.844273  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1973 15:43:43.850888  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1974 15:43:43.857719  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1975 15:43:43.861239  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1976 15:43:43.868069  0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6

 1977 15:43:43.874694  MTRR: Fixed MSR 0x250 0x0606060606060606

 1978 15:43:43.877749  MTRR: Fixed MSR 0x258 0x0606060606060606

 1979 15:43:43.880982  MTRR: Fixed MSR 0x259 0x0000000000000000

 1980 15:43:43.884575  MTRR: Fixed MSR 0x268 0x0606060606060606

 1981 15:43:43.891099  MTRR: Fixed MSR 0x269 0x0606060606060606

 1982 15:43:43.894424  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1983 15:43:43.897662  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1984 15:43:43.900928  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1985 15:43:43.907613  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1986 15:43:43.911084  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1987 15:43:43.914197  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1988 15:43:43.918176  call enable_fixed_mtrr()

 1989 15:43:43.921371  CPU physical address size: 39 bits

 1990 15:43:43.928381  MTRR: default type WB/UC MTRR counts: 6/7.

 1991 15:43:43.931080  MTRR: WB selected as default type.

 1992 15:43:43.937801  MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1993 15:43:43.941463  MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1994 15:43:43.947974  MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1995 15:43:43.954509  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0

 1996 15:43:43.961047  MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1997 15:43:43.967695  MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0

 1998 15:43:43.975195  MTRR: Fixed MSR 0x250 0x0606060606060606

 1999 15:43:43.978661  MTRR: Fixed MSR 0x258 0x0606060606060606

 2000 15:43:43.982009  MTRR: Fixed MSR 0x259 0x0000000000000000

 2001 15:43:43.985130  MTRR: Fixed MSR 0x268 0x0606060606060606

 2002 15:43:43.991428  MTRR: Fixed MSR 0x269 0x0606060606060606

 2003 15:43:43.995076  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2004 15:43:43.998008  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2005 15:43:44.001433  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2006 15:43:44.007995  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2007 15:43:44.011351  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2008 15:43:44.014629  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2009 15:43:44.015042  

 2010 15:43:44.019037  MTRR check

 2011 15:43:44.022372  call enable_fixed_mtrr()

 2012 15:43:44.022788  Fixed MTRRs   : Enabled

 2013 15:43:44.025281  Variable MTRRs: Enabled

 2014 15:43:44.025691  

 2015 15:43:44.029047  CPU physical address size: 39 bits

 2016 15:43:44.032024  MTRR: Fixed MSR 0x250 0x0606060606060606

 2017 15:43:44.038826  MTRR: Fixed MSR 0x250 0x0606060606060606

 2018 15:43:44.042083  MTRR: Fixed MSR 0x258 0x0606060606060606

 2019 15:43:44.045213  MTRR: Fixed MSR 0x259 0x0000000000000000

 2020 15:43:44.048758  MTRR: Fixed MSR 0x268 0x0606060606060606

 2021 15:43:44.055331  MTRR: Fixed MSR 0x269 0x0606060606060606

 2022 15:43:44.058369  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2023 15:43:44.061730  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2024 15:43:44.064996  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2025 15:43:44.071706  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2026 15:43:44.075151  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2027 15:43:44.078345  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2028 15:43:44.085707  MTRR: Fixed MSR 0x258 0x0606060606060606

 2029 15:43:44.086231  call enable_fixed_mtrr()

 2030 15:43:44.092442  MTRR: Fixed MSR 0x259 0x0000000000000000

 2031 15:43:44.095731  MTRR: Fixed MSR 0x268 0x0606060606060606

 2032 15:43:44.098842  MTRR: Fixed MSR 0x269 0x0606060606060606

 2033 15:43:44.102082  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2034 15:43:44.108426  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2035 15:43:44.111854  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2036 15:43:44.115127  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2037 15:43:44.118454  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2038 15:43:44.125310  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2039 15:43:44.128109  CPU physical address size: 39 bits

 2040 15:43:44.133219  call enable_fixed_mtrr()

 2041 15:43:44.136298  MTRR: Fixed MSR 0x250 0x0606060606060606

 2042 15:43:44.142916  MTRR: Fixed MSR 0x250 0x0606060606060606

 2043 15:43:44.146617  MTRR: Fixed MSR 0x258 0x0606060606060606

 2044 15:43:44.149944  MTRR: Fixed MSR 0x259 0x0000000000000000

 2045 15:43:44.152881  MTRR: Fixed MSR 0x268 0x0606060606060606

 2046 15:43:44.159464  MTRR: Fixed MSR 0x269 0x0606060606060606

 2047 15:43:44.162588  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2048 15:43:44.166211  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2049 15:43:44.169388  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2050 15:43:44.175971  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2051 15:43:44.179329  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2052 15:43:44.182669  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2053 15:43:44.189751  MTRR: Fixed MSR 0x258 0x0606060606060606

 2054 15:43:44.189835  call enable_fixed_mtrr()

 2055 15:43:44.196490  MTRR: Fixed MSR 0x259 0x0000000000000000

 2056 15:43:44.199911  MTRR: Fixed MSR 0x268 0x0606060606060606

 2057 15:43:44.203160  MTRR: Fixed MSR 0x269 0x0606060606060606

 2058 15:43:44.206021  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2059 15:43:44.212674  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2060 15:43:44.216057  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2061 15:43:44.219542  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2062 15:43:44.222792  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2063 15:43:44.229021  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2064 15:43:44.232361  CPU physical address size: 39 bits

 2065 15:43:44.237606  call enable_fixed_mtrr()

 2066 15:43:44.240420  MTRR: Fixed MSR 0x250 0x0606060606060606

 2067 15:43:44.247281  MTRR: Fixed MSR 0x250 0x0606060606060606

 2068 15:43:44.250019  MTRR: Fixed MSR 0x258 0x0606060606060606

 2069 15:43:44.253246  MTRR: Fixed MSR 0x259 0x0000000000000000

 2070 15:43:44.259883  MTRR: Fixed MSR 0x268 0x0606060606060606

 2071 15:43:44.262876  MTRR: Fixed MSR 0x269 0x0606060606060606

 2072 15:43:44.265988  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2073 15:43:44.269508  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2074 15:43:44.275780  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2075 15:43:44.279221  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2076 15:43:44.282560  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2077 15:43:44.285886  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2078 15:43:44.293672  MTRR: Fixed MSR 0x258 0x0606060606060606

 2079 15:43:44.296929  MTRR: Fixed MSR 0x259 0x0000000000000000

 2080 15:43:44.300350  MTRR: Fixed MSR 0x268 0x0606060606060606

 2081 15:43:44.303614  MTRR: Fixed MSR 0x269 0x0606060606060606

 2082 15:43:44.310347  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2083 15:43:44.313811  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2084 15:43:44.316650  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2085 15:43:44.320076  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2086 15:43:44.326855  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2087 15:43:44.330211  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2088 15:43:44.333620  call enable_fixed_mtrr()

 2089 15:43:44.337047  call enable_fixed_mtrr()

 2090 15:43:44.343295  BS: BS_WRITE_TABLES exit times (exec / console): 52 / 152 ms

 2091 15:43:44.346406  CPU physical address size: 39 bits

 2092 15:43:44.350116  CPU physical address size: 39 bits

 2093 15:43:44.353539  Checking cr50 for pending updates

 2094 15:43:44.357206  CPU physical address size: 39 bits

 2095 15:43:44.360415  CPU physical address size: 39 bits

 2096 15:43:44.364249  Reading cr50 TPM mode

 2097 15:43:44.374257  BS: BS_PAYLOAD_LOAD entry times (exec / console): 20 / 6 ms

 2098 15:43:44.384515  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2099 15:43:44.387921  Checking segment from ROM address 0xffc02b38

 2100 15:43:44.390740  Checking segment from ROM address 0xffc02b54

 2101 15:43:44.397452  Loading segment from ROM address 0xffc02b38

 2102 15:43:44.397558    code (compression=0)

 2103 15:43:44.407464    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2104 15:43:44.417459  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2105 15:43:44.417546  it's not compressed!

 2106 15:43:44.558676  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2107 15:43:44.565011  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2108 15:43:44.571481  Loading segment from ROM address 0xffc02b54

 2109 15:43:44.574840    Entry Point 0x30000000

 2110 15:43:44.575029  Loaded segments

 2111 15:43:44.581425  BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms

 2112 15:43:44.626663  Finalizing chipset.

 2113 15:43:44.630161  Finalizing SMM.

 2114 15:43:44.630581  APMC done.

 2115 15:43:44.636974  BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms

 2116 15:43:44.640224  mp_park_aps done after 0 msecs.

 2117 15:43:44.643512  Jumping to boot code at 0x30000000(0x76b25000)

 2118 15:43:44.653591  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2119 15:43:44.654025  

 2120 15:43:44.654404  

 2121 15:43:44.657188  

 2122 15:43:44.657728  Starting depthcharge on Voema...

 2123 15:43:44.658838  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 2124 15:43:44.659374  start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
 2125 15:43:44.659825  Setting prompt string to ['volteer:']
 2126 15:43:44.660269  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
 2127 15:43:44.660959  

 2128 15:43:44.666450  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2129 15:43:44.666872  

 2130 15:43:44.672878  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2131 15:43:44.673299  

 2132 15:43:44.679605  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2133 15:43:44.680081  

 2134 15:43:44.682908  Failed to find eMMC card reader

 2135 15:43:44.683323  

 2136 15:43:44.683691  Wipe memory regions:

 2137 15:43:44.686364  

 2138 15:43:44.689732  	[0x00000000001000, 0x000000000a0000)

 2139 15:43:44.690150  

 2140 15:43:44.693040  	[0x00000000100000, 0x00000030000000)

 2141 15:43:44.728300  

 2142 15:43:44.731577  	[0x00000032662db0, 0x000000769ef000)

 2143 15:43:44.781037  

 2144 15:43:44.784220  	[0x00000100000000, 0x00000480400000)

 2145 15:43:45.414567  

 2146 15:43:45.417841  ec_init: CrosEC protocol v3 supported (256, 256)

 2147 15:43:45.849324  

 2148 15:43:45.849827  R8152: Initializing

 2149 15:43:45.850187  

 2150 15:43:45.852066  Version 6 (ocp_data = 5c30)

 2151 15:43:45.852504  

 2152 15:43:45.855343  R8152: Done initializing

 2153 15:43:45.855840  

 2154 15:43:45.858739  Adding net device

 2155 15:43:46.159686  

 2156 15:43:46.162931  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2157 15:43:46.163015  

 2158 15:43:46.163080  

 2159 15:43:46.163140  

 2160 15:43:46.166422  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2162 15:43:46.266765  volteer: tftpboot 192.168.201.1 11224164/tftp-deploy-_oddjmd6/kernel/bzImage 11224164/tftp-deploy-_oddjmd6/kernel/cmdline 11224164/tftp-deploy-_oddjmd6/ramdisk/ramdisk.cpio.gz

 2163 15:43:46.266914  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2164 15:43:46.267007  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 2165 15:43:46.271361  tftpboot 192.168.201.1 11224164/tftp-deploy-_oddjmd6/kernel/bzImploy-_oddjmd6/kernel/cmdline 11224164/tftp-deploy-_oddjmd6/ramdisk/ramdisk.cpio.gz

 2166 15:43:46.271471  

 2167 15:43:46.271570  Waiting for link

 2168 15:43:46.475230  

 2169 15:43:46.475367  done.

 2170 15:43:46.475433  

 2171 15:43:46.475493  MAC: 00:24:32:30:7a:04

 2172 15:43:46.475551  

 2173 15:43:46.478320  Sending DHCP discover... done.

 2174 15:43:46.478402  

 2175 15:43:46.481529  Waiting for reply... done.

 2176 15:43:46.481641  

 2177 15:43:46.484816  Sending DHCP request... done.

 2178 15:43:46.484899  

 2179 15:43:46.488192  Waiting for reply... done.

 2180 15:43:46.491472  

 2181 15:43:46.491552  My ip is 192.168.201.22

 2182 15:43:46.491617  

 2183 15:43:46.494761  The DHCP server ip is 192.168.201.1

 2184 15:43:46.494843  

 2185 15:43:46.501711  TFTP server IP predefined by user: 192.168.201.1

 2186 15:43:46.501801  

 2187 15:43:46.508423  Bootfile predefined by user: 11224164/tftp-deploy-_oddjmd6/kernel/bzImage

 2188 15:43:46.508516  

 2189 15:43:46.511213  Sending tftp read request... done.

 2190 15:43:46.511314  

 2191 15:43:46.514532  Waiting for the transfer... 

 2192 15:43:46.514634  

 2193 15:43:47.162152  00000000 ################################################################

 2194 15:43:47.162644  

 2195 15:43:47.856401  00080000 ################################################################

 2196 15:43:47.856914  

 2197 15:43:48.552955  00100000 ################################################################

 2198 15:43:48.553106  

 2199 15:43:49.142440  00180000 ################################################################

 2200 15:43:49.142618  

 2201 15:43:49.794363  00200000 ################################################################

 2202 15:43:49.795073  

 2203 15:43:50.414994  00280000 ################################################################

 2204 15:43:50.415135  

 2205 15:43:50.969373  00300000 ################################################################

 2206 15:43:50.969504  

 2207 15:43:51.533817  00380000 ################################################################

 2208 15:43:51.533951  

 2209 15:43:52.068430  00400000 ################################################################

 2210 15:43:52.068577  

 2211 15:43:52.607929  00480000 ################################################################

 2212 15:43:52.608088  

 2213 15:43:53.145897  00500000 ################################################################

 2214 15:43:53.146039  

 2215 15:43:53.738520  00580000 ################################################################

 2216 15:43:53.738653  

 2217 15:43:54.270917  00600000 ################################################################

 2218 15:43:54.271065  

 2219 15:43:54.816118  00680000 ################################################################

 2220 15:43:54.816264  

 2221 15:43:55.443102  00700000 ################################################################

 2222 15:43:55.443872  

 2223 15:43:55.468975  00780000 ### done.

 2224 15:43:55.469576  

 2225 15:43:55.471797  The bootfile was 7884688 bytes long.

 2226 15:43:55.472360  

 2227 15:43:55.475379  Sending tftp read request... done.

 2228 15:43:55.476135  

 2229 15:43:55.478351  Waiting for the transfer... 

 2230 15:43:55.478888  

 2231 15:43:56.062700  00000000 ################################################################

 2232 15:43:56.062834  

 2233 15:43:56.602146  00080000 ################################################################

 2234 15:43:56.602316  

 2235 15:43:57.171602  00100000 ################################################################

 2236 15:43:57.171760  

 2237 15:43:57.737458  00180000 ################################################################

 2238 15:43:57.737633  

 2239 15:43:58.281131  00200000 ################################################################

 2240 15:43:58.281292  

 2241 15:43:58.871398  00280000 ################################################################

 2242 15:43:58.871573  

 2243 15:43:59.448697  00300000 ################################################################

 2244 15:43:59.448883  

 2245 15:43:59.991209  00380000 ################################################################

 2246 15:43:59.991381  

 2247 15:44:00.603247  00400000 ################################################################

 2248 15:44:00.603421  

 2249 15:44:01.180347  00480000 ################################################################

 2250 15:44:01.180493  

 2251 15:44:01.747233  00500000 ############################################################### done.

 2252 15:44:01.747369  

 2253 15:44:01.750646  Sending tftp read request... done.

 2254 15:44:01.750728  

 2255 15:44:01.754003  Waiting for the transfer... 

 2256 15:44:01.754087  

 2257 15:44:01.754171  00000000 # done.

 2258 15:44:01.754250  

 2259 15:44:01.763990  Command line loaded dynamically from TFTP file: 11224164/tftp-deploy-_oddjmd6/kernel/cmdline

 2260 15:44:01.764076  

 2261 15:44:01.789737  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11224164/extract-nfsrootfs-908n97x8,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2262 15:44:01.793924  

 2263 15:44:01.797406  Shutting down all USB controllers.

 2264 15:44:01.797489  

 2265 15:44:01.797577  Removing current net device

 2266 15:44:01.797674  

 2267 15:44:01.800538  Finalizing coreboot

 2268 15:44:01.800622  

 2269 15:44:01.807026  Exiting depthcharge with code 4 at timestamp: 25727254

 2270 15:44:01.807108  

 2271 15:44:01.807189  

 2272 15:44:01.807285  Starting kernel ...

 2273 15:44:01.807385  

 2274 15:44:01.807816  end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
 2275 15:44:01.807914  start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
 2276 15:44:01.807990  Setting prompt string to ['Linux version [0-9]']
 2277 15:44:01.808057  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2278 15:44:01.808129  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2279 15:44:01.810433  

 2281 15:48:28.808760  end: 2.2.5 auto-login-action (duration 00:04:27) [common]
 2283 15:48:28.809839  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
 2285 15:48:28.810667  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2288 15:48:28.812139  end: 2 depthcharge-action (duration 00:05:00) [common]
 2290 15:48:28.813351  Cleaning after the job
 2291 15:48:28.813843  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224164/tftp-deploy-_oddjmd6/ramdisk
 2292 15:48:28.817957  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224164/tftp-deploy-_oddjmd6/kernel
 2293 15:48:28.823690  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224164/tftp-deploy-_oddjmd6/nfsrootfs
 2294 15:48:28.926259  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224164/tftp-deploy-_oddjmd6/modules
 2295 15:48:28.926715  start: 5.1 power-off (timeout 00:00:30) [common]
 2296 15:48:28.926887  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
 2297 15:48:29.006245  >> Command sent successfully.

 2298 15:48:29.017570  Returned 0 in 0 seconds
 2299 15:48:29.118928  end: 5.1 power-off (duration 00:00:00) [common]
 2301 15:48:29.120563  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2302 15:48:29.121756  Listened to connection for namespace 'common' for up to 1s
 2303 15:48:30.122442  Finalising connection for namespace 'common'
 2304 15:48:30.123171  Disconnecting from shell: Finalise
 2305 15:48:30.123730  

 2306 15:48:30.224424  end: 5.2 read-feedback (duration 00:00:01) [common]
 2307 15:48:30.224600  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11224164
 2308 15:48:30.564351  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11224164
 2309 15:48:30.564530  JobError: Your job cannot terminate cleanly.