Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 15:43:20.323655 lava-dispatcher, installed at version: 2023.05.1
2 15:43:20.323897 start: 0 validate
3 15:43:20.324043 Start time: 2023-08-07 15:43:20.324036+00:00 (UTC)
4 15:43:20.324174 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:43:20.324307 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
6 15:43:20.598275 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:43:20.598514 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:43:23.607673 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:43:23.608412 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:43:24.614987 validate duration: 4.29
12 15:43:24.615265 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:43:24.615363 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:43:24.615455 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:43:24.615576 Not decompressing ramdisk as can be used compressed.
16 15:43:24.615665 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
17 15:43:24.615730 saving as /var/lib/lava/dispatcher/tmp/11224154/tftp-deploy-imkkmuxk/ramdisk/rootfs.cpio.gz
18 15:43:24.615791 total size: 35760064 (34MB)
19 15:43:24.616948 progress 0% (0MB)
20 15:43:24.626913 progress 5% (1MB)
21 15:43:24.636514 progress 10% (3MB)
22 15:43:24.645852 progress 15% (5MB)
23 15:43:24.655377 progress 20% (6MB)
24 15:43:24.665245 progress 25% (8MB)
25 15:43:24.675236 progress 30% (10MB)
26 15:43:24.686006 progress 35% (11MB)
27 15:43:24.697663 progress 40% (13MB)
28 15:43:24.707576 progress 45% (15MB)
29 15:43:24.716931 progress 50% (17MB)
30 15:43:24.726478 progress 55% (18MB)
31 15:43:24.736083 progress 60% (20MB)
32 15:43:24.745627 progress 65% (22MB)
33 15:43:24.755095 progress 70% (23MB)
34 15:43:24.764656 progress 75% (25MB)
35 15:43:24.774299 progress 80% (27MB)
36 15:43:24.783694 progress 85% (29MB)
37 15:43:24.793473 progress 90% (30MB)
38 15:43:24.802958 progress 95% (32MB)
39 15:43:24.812765 progress 100% (34MB)
40 15:43:24.812993 34MB downloaded in 0.20s (172.94MB/s)
41 15:43:24.813216 end: 1.1.1 http-download (duration 00:00:00) [common]
43 15:43:24.813632 end: 1.1 download-retry (duration 00:00:00) [common]
44 15:43:24.813774 start: 1.2 download-retry (timeout 00:10:00) [common]
45 15:43:24.813900 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 15:43:24.814111 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:43:24.814193 saving as /var/lib/lava/dispatcher/tmp/11224154/tftp-deploy-imkkmuxk/kernel/bzImage
48 15:43:24.814259 total size: 7884688 (7MB)
49 15:43:24.814322 No compression specified
50 15:43:24.815473 progress 0% (0MB)
51 15:43:24.817658 progress 5% (0MB)
52 15:43:24.819858 progress 10% (0MB)
53 15:43:24.822039 progress 15% (1MB)
54 15:43:24.824176 progress 20% (1MB)
55 15:43:24.826513 progress 25% (1MB)
56 15:43:24.828718 progress 30% (2MB)
57 15:43:24.830875 progress 35% (2MB)
58 15:43:24.833019 progress 40% (3MB)
59 15:43:24.835161 progress 45% (3MB)
60 15:43:24.837307 progress 50% (3MB)
61 15:43:24.839450 progress 55% (4MB)
62 15:43:24.841534 progress 60% (4MB)
63 15:43:24.843641 progress 65% (4MB)
64 15:43:24.845740 progress 70% (5MB)
65 15:43:24.847893 progress 75% (5MB)
66 15:43:24.850007 progress 80% (6MB)
67 15:43:24.852116 progress 85% (6MB)
68 15:43:24.854255 progress 90% (6MB)
69 15:43:24.856353 progress 95% (7MB)
70 15:43:24.858484 progress 100% (7MB)
71 15:43:24.858684 7MB downloaded in 0.04s (169.28MB/s)
72 15:43:24.858833 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:43:24.859067 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:43:24.859156 start: 1.3 download-retry (timeout 00:10:00) [common]
76 15:43:24.859249 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 15:43:24.859386 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:43:24.859457 saving as /var/lib/lava/dispatcher/tmp/11224154/tftp-deploy-imkkmuxk/modules/modules.tar
79 15:43:24.859519 total size: 250796 (0MB)
80 15:43:24.859582 Using unxz to decompress xz
81 15:43:24.863737 progress 13% (0MB)
82 15:43:24.864161 progress 26% (0MB)
83 15:43:24.864408 progress 39% (0MB)
84 15:43:24.866033 progress 52% (0MB)
85 15:43:24.867880 progress 65% (0MB)
86 15:43:24.869826 progress 78% (0MB)
87 15:43:24.871728 progress 91% (0MB)
88 15:43:24.873483 progress 100% (0MB)
89 15:43:24.879218 0MB downloaded in 0.02s (12.15MB/s)
90 15:43:24.879510 end: 1.3.1 http-download (duration 00:00:00) [common]
92 15:43:24.879787 end: 1.3 download-retry (duration 00:00:00) [common]
93 15:43:24.879888 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 15:43:24.879991 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 15:43:24.880075 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 15:43:24.880159 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 15:43:24.880381 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3
98 15:43:24.880524 makedir: /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin
99 15:43:24.880637 makedir: /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/tests
100 15:43:24.880742 makedir: /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/results
101 15:43:24.880862 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-add-keys
102 15:43:24.881015 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-add-sources
103 15:43:24.881150 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-background-process-start
104 15:43:24.881292 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-background-process-stop
105 15:43:24.881425 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-common-functions
106 15:43:24.881554 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-echo-ipv4
107 15:43:24.881686 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-install-packages
108 15:43:24.881825 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-installed-packages
109 15:43:24.881956 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-os-build
110 15:43:24.882087 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-probe-channel
111 15:43:24.882216 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-probe-ip
112 15:43:24.882345 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-target-ip
113 15:43:24.882472 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-target-mac
114 15:43:24.882601 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-target-storage
115 15:43:24.882733 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-test-case
116 15:43:24.882862 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-test-event
117 15:43:24.882989 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-test-feedback
118 15:43:24.883122 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-test-raise
119 15:43:24.883258 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-test-reference
120 15:43:24.883393 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-test-runner
121 15:43:24.883525 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-test-set
122 15:43:24.883658 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-test-shell
123 15:43:24.883791 Updating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-install-packages (oe)
124 15:43:24.888540 Updating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/bin/lava-installed-packages (oe)
125 15:43:24.888695 Creating /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/environment
126 15:43:24.888812 LAVA metadata
127 15:43:24.888892 - LAVA_JOB_ID=11224154
128 15:43:24.888966 - LAVA_DISPATCHER_IP=192.168.201.1
129 15:43:24.889089 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 15:43:24.889163 skipped lava-vland-overlay
131 15:43:24.889241 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 15:43:24.889333 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 15:43:24.889400 skipped lava-multinode-overlay
134 15:43:24.889475 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 15:43:24.889562 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 15:43:24.889641 Loading test definitions
137 15:43:24.889742 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 15:43:24.889841 Using /lava-11224154 at stage 0
139 15:43:24.890174 uuid=11224154_1.4.2.3.1 testdef=None
140 15:43:24.890267 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 15:43:24.890361 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 15:43:24.890909 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 15:43:24.891212 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 15:43:24.891846 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 15:43:24.892081 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 15:43:24.899183 runner path: /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/0/tests/0_cros-ec test_uuid 11224154_1.4.2.3.1
149 15:43:24.899356 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 15:43:24.899575 Creating lava-test-runner.conf files
152 15:43:24.899641 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224154/lava-overlay-542xk7p3/lava-11224154/0 for stage 0
153 15:43:24.899736 - 0_cros-ec
154 15:43:24.899835 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
155 15:43:24.899925 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
156 15:43:24.906877 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
157 15:43:24.907013 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
158 15:43:24.907105 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
159 15:43:24.907192 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
160 15:43:24.907288 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
161 15:43:25.979391 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
162 15:43:25.979806 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
163 15:43:25.979958 extracting modules file /var/lib/lava/dispatcher/tmp/11224154/tftp-deploy-imkkmuxk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224154/extract-overlay-ramdisk-gyl93_ag/ramdisk
164 15:43:25.999985 end: 1.4.4 extract-modules (duration 00:00:00) [common]
165 15:43:26.000185 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
166 15:43:26.000315 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224154/compress-overlay-am96amge/overlay-1.4.2.4.tar.gz to ramdisk
167 15:43:26.000420 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224154/compress-overlay-am96amge/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11224154/extract-overlay-ramdisk-gyl93_ag/ramdisk
168 15:43:26.009578 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
169 15:43:26.009753 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
170 15:43:26.009901 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
171 15:43:26.010026 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
172 15:43:26.010141 Building ramdisk /var/lib/lava/dispatcher/tmp/11224154/extract-overlay-ramdisk-gyl93_ag/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11224154/extract-overlay-ramdisk-gyl93_ag/ramdisk
173 15:43:26.700016 >> 184082 blocks
174 15:43:30.332935 rename /var/lib/lava/dispatcher/tmp/11224154/extract-overlay-ramdisk-gyl93_ag/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11224154/tftp-deploy-imkkmuxk/ramdisk/ramdisk.cpio.gz
175 15:43:30.333385 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
176 15:43:30.333523 start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
177 15:43:30.333652 start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
178 15:43:30.333764 No mkimage arch provided, not using FIT.
179 15:43:30.333874 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
180 15:43:30.334003 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
181 15:43:30.334110 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
182 15:43:30.334206 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
183 15:43:30.334288 No LXC device requested
184 15:43:30.334370 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
185 15:43:30.334460 start: 1.6 deploy-device-env (timeout 00:09:54) [common]
186 15:43:30.334591 end: 1.6 deploy-device-env (duration 00:00:00) [common]
187 15:43:30.334664 Checking files for TFTP limit of 4294967296 bytes.
188 15:43:30.335079 end: 1 tftp-deploy (duration 00:00:06) [common]
189 15:43:30.335185 start: 2 depthcharge-action (timeout 00:05:00) [common]
190 15:43:30.335280 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
191 15:43:30.335403 substitutions:
192 15:43:30.335472 - {DTB}: None
193 15:43:30.335535 - {INITRD}: 11224154/tftp-deploy-imkkmuxk/ramdisk/ramdisk.cpio.gz
194 15:43:30.335666 - {KERNEL}: 11224154/tftp-deploy-imkkmuxk/kernel/bzImage
195 15:43:30.335804 - {LAVA_MAC}: None
196 15:43:30.335866 - {PRESEED_CONFIG}: None
197 15:43:30.335924 - {PRESEED_LOCAL}: None
198 15:43:30.335980 - {RAMDISK}: 11224154/tftp-deploy-imkkmuxk/ramdisk/ramdisk.cpio.gz
199 15:43:30.336037 - {ROOT_PART}: None
200 15:43:30.336109 - {ROOT}: None
201 15:43:30.336248 - {SERVER_IP}: 192.168.201.1
202 15:43:30.336314 - {TEE}: None
203 15:43:30.336371 Parsed boot commands:
204 15:43:30.336426 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
205 15:43:30.336648 Parsed boot commands: tftpboot 192.168.201.1 11224154/tftp-deploy-imkkmuxk/kernel/bzImage 11224154/tftp-deploy-imkkmuxk/kernel/cmdline 11224154/tftp-deploy-imkkmuxk/ramdisk/ramdisk.cpio.gz
206 15:43:30.336831 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
207 15:43:30.336956 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
208 15:43:30.337052 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
209 15:43:30.337145 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
210 15:43:30.337220 Not connected, no need to disconnect.
211 15:43:30.337296 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
212 15:43:30.337376 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
213 15:43:30.337444 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-2'
214 15:43:30.341588 Setting prompt string to ['lava-test: # ']
215 15:43:30.342004 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
216 15:43:30.342145 end: 2.2.1 reset-connection (duration 00:00:00) [common]
217 15:43:30.342278 start: 2.2.2 reset-device (timeout 00:05:00) [common]
218 15:43:30.342403 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
219 15:43:30.342633 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
220 15:43:35.475614 >> Command sent successfully.
221 15:43:35.478222 Returned 0 in 5 seconds
222 15:43:35.578855 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
224 15:43:35.580276 end: 2.2.2 reset-device (duration 00:00:05) [common]
225 15:43:35.580972 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
226 15:43:35.581545 Setting prompt string to 'Starting depthcharge on Voema...'
227 15:43:35.581917 Changing prompt to 'Starting depthcharge on Voema...'
228 15:43:35.582250 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
229 15:43:35.583329 [Enter `^Ec?' for help]
230 15:43:37.185293
231 15:43:37.186126
232 15:43:37.195331 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
233 15:43:37.198649 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
234 15:43:37.205218 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
235 15:43:37.208616 CPU: AES supported, TXT NOT supported, VT supported
236 15:43:37.215073 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
237 15:43:37.221516 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
238 15:43:37.224707 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
239 15:43:37.228177 VBOOT: Loading verstage.
240 15:43:37.234660 FMAP: Found "FLASH" version 1.1 at 0x1804000.
241 15:43:37.237831 FMAP: base = 0x0 size = 0x2000000 #areas = 32
242 15:43:37.241700 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
243 15:43:37.252407 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
244 15:43:37.258804 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
245 15:43:37.259321
246 15:43:37.259670
247 15:43:37.272015 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
248 15:43:37.285872 Probing TPM: . done!
249 15:43:37.289081 TPM ready after 0 ms
250 15:43:37.292316 Connected to device vid:did:rid of 1ae0:0028:00
251 15:43:37.303589 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
252 15:43:37.310749 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
253 15:43:37.313900 Initialized TPM device CR50 revision 0
254 15:43:37.442013 tlcl_send_startup: Startup return code is 0
255 15:43:37.442564 TPM: setup succeeded
256 15:43:37.457586 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
257 15:43:37.471551 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
258 15:43:37.484761 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
259 15:43:37.494500 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
260 15:43:37.497738 Chrome EC: UHEPI supported
261 15:43:37.500840 Phase 1
262 15:43:37.504503 FMAP: area GBB found @ 1805000 (458752 bytes)
263 15:43:37.514337 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
264 15:43:37.520922 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
265 15:43:37.527471 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
266 15:43:37.534530 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
267 15:43:37.537676 Recovery requested (1009000e)
268 15:43:37.540804 TPM: Extending digest for VBOOT: boot mode into PCR 0
269 15:43:37.552410 tlcl_extend: response is 0
270 15:43:37.558820 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
271 15:43:37.568697 tlcl_extend: response is 0
272 15:43:37.575827 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
273 15:43:37.582416 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
274 15:43:37.589051 BS: verstage times (exec / console): total (unknown) / 142 ms
275 15:43:37.589487
276 15:43:37.589898
277 15:43:37.601809 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
278 15:43:37.608961 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
279 15:43:37.612079 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
280 15:43:37.615247 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
281 15:43:37.621667 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
282 15:43:37.625483 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
283 15:43:37.628601 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
284 15:43:37.632236 TCO_STS: 0000 0000
285 15:43:37.636209 GEN_PMCON: d0015038 00002200
286 15:43:37.639842 GBLRST_CAUSE: 00000000 00000000
287 15:43:37.640450 HPR_CAUSE0: 00000000
288 15:43:37.642677 prev_sleep_state 5
289 15:43:37.645967 Boot Count incremented to 22745
290 15:43:37.653156 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 15:43:37.659610 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 15:43:37.665960 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 15:43:37.672418 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
294 15:43:37.676947 Chrome EC: UHEPI supported
295 15:43:37.684237 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
296 15:43:37.697278 Probing TPM: done!
297 15:43:37.704263 Connected to device vid:did:rid of 1ae0:0028:00
298 15:43:37.713850 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
299 15:43:37.717543 Initialized TPM device CR50 revision 0
300 15:43:37.732317 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
301 15:43:37.739073 MRC: Hash idx 0x100b comparison successful.
302 15:43:37.742185 MRC cache found, size faa8
303 15:43:37.742793 bootmode is set to: 2
304 15:43:37.745458 SPD index = 0
305 15:43:37.751869 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
306 15:43:37.755279 SPD: module type is LPDDR4X
307 15:43:37.758963 SPD: module part number is MT53E512M64D4NW-046
308 15:43:37.765248 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
309 15:43:37.768306 SPD: device width 16 bits, bus width 16 bits
310 15:43:37.775062 SPD: module size is 1024 MB (per channel)
311 15:43:38.207850 CBMEM:
312 15:43:38.210844 IMD: root @ 0x76fff000 254 entries.
313 15:43:38.214934 IMD: root @ 0x76ffec00 62 entries.
314 15:43:38.218345 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
315 15:43:38.222094 FMAP: area RW_VPD found @ f35000 (8192 bytes)
316 15:43:38.227248 External stage cache:
317 15:43:38.230455 IMD: root @ 0x7b3ff000 254 entries.
318 15:43:38.233656 IMD: root @ 0x7b3fec00 62 entries.
319 15:43:38.249480 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
320 15:43:38.255863 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
321 15:43:38.262508 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
322 15:43:38.276775 MRC: 'RECOVERY_MRC_CACHE' does not need update.
323 15:43:38.283205 cse_lite: Skip switching to RW in the recovery path
324 15:43:38.283290 8 DIMMs found
325 15:43:38.283358 SMM Memory Map
326 15:43:38.290189 SMRAM : 0x7b000000 0x800000
327 15:43:38.293352 Subregion 0: 0x7b000000 0x200000
328 15:43:38.296737 Subregion 1: 0x7b200000 0x200000
329 15:43:38.299876 Subregion 2: 0x7b400000 0x400000
330 15:43:38.299959 top_of_ram = 0x77000000
331 15:43:38.306221 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
332 15:43:38.312927 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
333 15:43:38.316494 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
334 15:43:38.323095 MTRR Range: Start=ff000000 End=0 (Size 1000000)
335 15:43:38.329396 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
336 15:43:38.335875 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
337 15:43:38.346201 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
338 15:43:38.352716 Processing 211 relocs. Offset value of 0x74c0b000
339 15:43:38.359368 BS: romstage times (exec / console): total (unknown) / 277 ms
340 15:43:38.365809
341 15:43:38.366272
342 15:43:38.375683 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
343 15:43:38.378849 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 15:43:38.388965 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 15:43:38.395696 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 15:43:38.402511 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
347 15:43:38.408886 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
348 15:43:38.456033 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
349 15:43:38.462622 Processing 5008 relocs. Offset value of 0x75d98000
350 15:43:38.465736 BS: postcar times (exec / console): total (unknown) / 59 ms
351 15:43:38.468984
352 15:43:38.469404
353 15:43:38.478972 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
354 15:43:38.479403 Normal boot
355 15:43:38.482132 FW_CONFIG value is 0x804c02
356 15:43:38.485191 PCI: 00:07.0 disabled by fw_config
357 15:43:38.488573 PCI: 00:07.1 disabled by fw_config
358 15:43:38.491954 PCI: 00:0d.2 disabled by fw_config
359 15:43:38.499006 PCI: 00:1c.7 disabled by fw_config
360 15:43:38.502158 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 15:43:38.508619 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 15:43:38.512212 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
363 15:43:38.518583 GENERIC: 0.0 disabled by fw_config
364 15:43:38.521820 GENERIC: 1.0 disabled by fw_config
365 15:43:38.525071 fw_config match found: DB_USB=USB3_ACTIVE
366 15:43:38.528918 fw_config match found: DB_USB=USB3_ACTIVE
367 15:43:38.532105 fw_config match found: DB_USB=USB3_ACTIVE
368 15:43:38.538420 fw_config match found: DB_USB=USB3_ACTIVE
369 15:43:38.542329 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 15:43:38.548470 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
371 15:43:38.558432 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
372 15:43:38.565364 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
373 15:43:38.568573 microcode: sig=0x806c1 pf=0x80 revision=0x86
374 15:43:38.575190 microcode: Update skipped, already up-to-date
375 15:43:38.581808 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
376 15:43:38.609210 Detected 4 core, 8 thread CPU.
377 15:43:38.612309 Setting up SMI for CPU
378 15:43:38.616077 IED base = 0x7b400000
379 15:43:38.616643 IED size = 0x00400000
380 15:43:38.619123 Will perform SMM setup.
381 15:43:38.625877 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
382 15:43:38.633089 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
383 15:43:38.639495 Processing 16 relocs. Offset value of 0x00030000
384 15:43:38.642733 Attempting to start 7 APs
385 15:43:38.645800 Waiting for 10ms after sending INIT.
386 15:43:38.661516 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
387 15:43:38.664882 AP: slot 3 apic_id 6.
388 15:43:38.667863 AP: slot 7 apic_id 7.
389 15:43:38.668302 AP: slot 5 apic_id 2.
390 15:43:38.671425 AP: slot 4 apic_id 3.
391 15:43:38.674770 AP: slot 6 apic_id 4.
392 15:43:38.675231 AP: slot 2 apic_id 5.
393 15:43:38.675614 done.
394 15:43:38.681438 Waiting for 2nd SIPI to complete...done.
395 15:43:38.687864 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 15:43:38.694334 Processing 13 relocs. Offset value of 0x00038000
397 15:43:38.697703 Unable to locate Global NVS
398 15:43:38.704447 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
399 15:43:38.707712 Installing permanent SMM handler to 0x7b000000
400 15:43:38.717527 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
401 15:43:38.721122 Processing 794 relocs. Offset value of 0x7b010000
402 15:43:38.731316 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
403 15:43:38.734358 Processing 13 relocs. Offset value of 0x7b008000
404 15:43:38.741240 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
405 15:43:38.747720 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
406 15:43:38.750847 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
407 15:43:38.757638 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
408 15:43:38.764059 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
409 15:43:38.771013 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
410 15:43:38.777671 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
411 15:43:38.778144 Unable to locate Global NVS
412 15:43:38.787291 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
413 15:43:38.790753 Clearing SMI status registers
414 15:43:38.791396 SMI_STS: PM1
415 15:43:38.793946 PM1_STS: PWRBTN
416 15:43:38.800323 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
417 15:43:38.804144 In relocation handler: CPU 0
418 15:43:38.807448 New SMBASE=0x7b000000 IEDBASE=0x7b400000
419 15:43:38.814101 Writing SMRR. base = 0x7b000006, mask=0xff800c00
420 15:43:38.814576 Relocation complete.
421 15:43:38.823915 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
422 15:43:38.827137 In relocation handler: CPU 1
423 15:43:38.831209 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
424 15:43:38.831771 Relocation complete.
425 15:43:38.840733 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
426 15:43:38.841205 In relocation handler: CPU 6
427 15:43:38.846942 New SMBASE=0x7affe800 IEDBASE=0x7b400000
428 15:43:38.850496 Writing SMRR. base = 0x7b000006, mask=0xff800c00
429 15:43:38.854043 Relocation complete.
430 15:43:38.860590 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
431 15:43:38.863685 In relocation handler: CPU 2
432 15:43:38.866824 New SMBASE=0x7afff800 IEDBASE=0x7b400000
433 15:43:38.870549 Relocation complete.
434 15:43:38.876588 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
435 15:43:38.880088 In relocation handler: CPU 3
436 15:43:38.883957 New SMBASE=0x7afff400 IEDBASE=0x7b400000
437 15:43:38.887553 Writing SMRR. base = 0x7b000006, mask=0xff800c00
438 15:43:38.891313 Relocation complete.
439 15:43:38.897874 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
440 15:43:38.901450 In relocation handler: CPU 7
441 15:43:38.904976 New SMBASE=0x7affe400 IEDBASE=0x7b400000
442 15:43:38.907927 Relocation complete.
443 15:43:38.914403 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
444 15:43:38.917555 In relocation handler: CPU 5
445 15:43:38.921002 New SMBASE=0x7affec00 IEDBASE=0x7b400000
446 15:43:38.927794 Writing SMRR. base = 0x7b000006, mask=0xff800c00
447 15:43:38.928063 Relocation complete.
448 15:43:38.937556 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
449 15:43:38.937810 In relocation handler: CPU 4
450 15:43:38.943978 New SMBASE=0x7afff000 IEDBASE=0x7b400000
451 15:43:38.944166 Relocation complete.
452 15:43:38.947414 Initializing CPU #0
453 15:43:38.950511 CPU: vendor Intel device 806c1
454 15:43:38.953616 CPU: family 06, model 8c, stepping 01
455 15:43:38.957197 Clearing out pending MCEs
456 15:43:38.960382 Setting up local APIC...
457 15:43:38.960644 apic_id: 0x00 done.
458 15:43:38.963727 Turbo is available but hidden
459 15:43:38.966976 Turbo is available and visible
460 15:43:38.973579 microcode: Update skipped, already up-to-date
461 15:43:38.973954 CPU #0 initialized
462 15:43:38.976791 Initializing CPU #4
463 15:43:38.980130 Initializing CPU #5
464 15:43:38.983869 CPU: vendor Intel device 806c1
465 15:43:38.987035 CPU: family 06, model 8c, stepping 01
466 15:43:38.990668 CPU: vendor Intel device 806c1
467 15:43:38.993504 CPU: family 06, model 8c, stepping 01
468 15:43:38.996672 Clearing out pending MCEs
469 15:43:38.997000 Clearing out pending MCEs
470 15:43:38.999960 Setting up local APIC...
471 15:43:39.003760 Initializing CPU #1
472 15:43:39.006927 Setting up local APIC...
473 15:43:39.007256 Initializing CPU #2
474 15:43:39.009940 Initializing CPU #6
475 15:43:39.013353 CPU: vendor Intel device 806c1
476 15:43:39.016810 CPU: family 06, model 8c, stepping 01
477 15:43:39.020423 CPU: vendor Intel device 806c1
478 15:43:39.023233 CPU: family 06, model 8c, stepping 01
479 15:43:39.026588 Clearing out pending MCEs
480 15:43:39.029755 Clearing out pending MCEs
481 15:43:39.030120 Setting up local APIC...
482 15:43:39.033488 Initializing CPU #3
483 15:43:39.036699 Initializing CPU #7
484 15:43:39.037096 CPU: vendor Intel device 806c1
485 15:43:39.043131 CPU: family 06, model 8c, stepping 01
486 15:43:39.046306 CPU: vendor Intel device 806c1
487 15:43:39.049584 CPU: family 06, model 8c, stepping 01
488 15:43:39.053422 Clearing out pending MCEs
489 15:43:39.053811 Clearing out pending MCEs
490 15:43:39.056759 Setting up local APIC...
491 15:43:39.059916 apic_id: 0x02 done.
492 15:43:39.063325 CPU: vendor Intel device 806c1
493 15:43:39.066345 CPU: family 06, model 8c, stepping 01
494 15:43:39.069958 Setting up local APIC...
495 15:43:39.073138 microcode: Update skipped, already up-to-date
496 15:43:39.076398 apic_id: 0x03 done.
497 15:43:39.076849 CPU #5 initialized
498 15:43:39.083090 microcode: Update skipped, already up-to-date
499 15:43:39.083431 apic_id: 0x07 done.
500 15:43:39.086205 Setting up local APIC...
501 15:43:39.089496 CPU #4 initialized
502 15:43:39.089961 Clearing out pending MCEs
503 15:43:39.092721 apic_id: 0x04 done.
504 15:43:39.096567 apic_id: 0x05 done.
505 15:43:39.099540 microcode: Update skipped, already up-to-date
506 15:43:39.102956 microcode: Update skipped, already up-to-date
507 15:43:39.106023 CPU #6 initialized
508 15:43:39.109897 Setting up local APIC...
509 15:43:39.113171 microcode: Update skipped, already up-to-date
510 15:43:39.116405 apic_id: 0x06 done.
511 15:43:39.116854 CPU #7 initialized
512 15:43:39.123099 microcode: Update skipped, already up-to-date
513 15:43:39.123531 CPU #2 initialized
514 15:43:39.126223 CPU #3 initialized
515 15:43:39.129122 apic_id: 0x01 done.
516 15:43:39.132699 microcode: Update skipped, already up-to-date
517 15:43:39.136344 CPU #1 initialized
518 15:43:39.139431 bsp_do_flight_plan done after 455 msecs.
519 15:43:39.142616 CPU: frequency set to 4000 MHz
520 15:43:39.143068 Enabling SMIs.
521 15:43:39.149021 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
522 15:43:39.166227 SATAXPCIE1 indicates PCIe NVMe is present
523 15:43:39.170307 Probing TPM: done!
524 15:43:39.173428 Connected to device vid:did:rid of 1ae0:0028:00
525 15:43:39.183751 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
526 15:43:39.187111 Initialized TPM device CR50 revision 0
527 15:43:39.190352 Enabling S0i3.4
528 15:43:39.197563 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
529 15:43:39.200275 Found a VBT of 8704 bytes after decompression
530 15:43:39.207045 cse_lite: CSE RO boot. HybridStorageMode disabled
531 15:43:39.213293 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
532 15:43:39.289833 FSPS returned 0
533 15:43:39.293177 Executing Phase 1 of FspMultiPhaseSiInit
534 15:43:39.302931 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
535 15:43:39.306303 port C0 DISC req: usage 1 usb3 1 usb2 5
536 15:43:39.310164 Raw Buffer output 0 00000511
537 15:43:39.313368 Raw Buffer output 1 00000000
538 15:43:39.316683 pmc_send_ipc_cmd succeeded
539 15:43:39.324059 port C1 DISC req: usage 1 usb3 2 usb2 3
540 15:43:39.324566 Raw Buffer output 0 00000321
541 15:43:39.326748 Raw Buffer output 1 00000000
542 15:43:39.330769 pmc_send_ipc_cmd succeeded
543 15:43:39.336207 Detected 4 core, 8 thread CPU.
544 15:43:39.339650 Detected 4 core, 8 thread CPU.
545 15:43:39.573713 Display FSP Version Info HOB
546 15:43:39.576901 Reference Code - CPU = a.0.4c.31
547 15:43:39.579980 uCode Version = 0.0.0.86
548 15:43:39.583241 TXT ACM version = ff.ff.ff.ffff
549 15:43:39.586444 Reference Code - ME = a.0.4c.31
550 15:43:39.590443 MEBx version = 0.0.0.0
551 15:43:39.593602 ME Firmware Version = Consumer SKU
552 15:43:39.596513 Reference Code - PCH = a.0.4c.31
553 15:43:39.600063 PCH-CRID Status = Disabled
554 15:43:39.603684 PCH-CRID Original Value = ff.ff.ff.ffff
555 15:43:39.606941 PCH-CRID New Value = ff.ff.ff.ffff
556 15:43:39.609648 OPROM - RST - RAID = ff.ff.ff.ffff
557 15:43:39.613270 PCH Hsio Version = 4.0.0.0
558 15:43:39.616278 Reference Code - SA - System Agent = a.0.4c.31
559 15:43:39.619499 Reference Code - MRC = 2.0.0.1
560 15:43:39.622791 SA - PCIe Version = a.0.4c.31
561 15:43:39.626737 SA-CRID Status = Disabled
562 15:43:39.630032 SA-CRID Original Value = 0.0.0.1
563 15:43:39.633110 SA-CRID New Value = 0.0.0.1
564 15:43:39.636314 OPROM - VBIOS = ff.ff.ff.ffff
565 15:43:39.639415 IO Manageability Engine FW Version = 11.1.4.0
566 15:43:39.642784 PHY Build Version = 0.0.0.e0
567 15:43:39.646127 Thunderbolt(TM) FW Version = 0.0.0.0
568 15:43:39.653226 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
569 15:43:39.656436 ITSS IRQ Polarities Before:
570 15:43:39.657023 IPC0: 0xffffffff
571 15:43:39.659651 IPC1: 0xffffffff
572 15:43:39.660074 IPC2: 0xffffffff
573 15:43:39.662800 IPC3: 0xffffffff
574 15:43:39.666451 ITSS IRQ Polarities After:
575 15:43:39.667138 IPC0: 0xffffffff
576 15:43:39.669437 IPC1: 0xffffffff
577 15:43:39.669912 IPC2: 0xffffffff
578 15:43:39.672761 IPC3: 0xffffffff
579 15:43:39.676022 Found PCIe Root Port #9 at PCI: 00:1d.0.
580 15:43:39.689051 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
581 15:43:39.699379 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
582 15:43:39.712321 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
583 15:43:39.718728 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
584 15:43:39.722285 Enumerating buses...
585 15:43:39.725913 Show all devs... Before device enumeration.
586 15:43:39.728777 Root Device: enabled 1
587 15:43:39.729268 DOMAIN: 0000: enabled 1
588 15:43:39.732158 CPU_CLUSTER: 0: enabled 1
589 15:43:39.735540 PCI: 00:00.0: enabled 1
590 15:43:39.738948 PCI: 00:02.0: enabled 1
591 15:43:39.741904 PCI: 00:04.0: enabled 1
592 15:43:39.742430 PCI: 00:05.0: enabled 1
593 15:43:39.745219 PCI: 00:06.0: enabled 0
594 15:43:39.748937 PCI: 00:07.0: enabled 0
595 15:43:39.749436 PCI: 00:07.1: enabled 0
596 15:43:39.752243 PCI: 00:07.2: enabled 0
597 15:43:39.755559 PCI: 00:07.3: enabled 0
598 15:43:39.758941 PCI: 00:08.0: enabled 1
599 15:43:39.759377 PCI: 00:09.0: enabled 0
600 15:43:39.762344 PCI: 00:0a.0: enabled 0
601 15:43:39.765312 PCI: 00:0d.0: enabled 1
602 15:43:39.768686 PCI: 00:0d.1: enabled 0
603 15:43:39.769125 PCI: 00:0d.2: enabled 0
604 15:43:39.771871 PCI: 00:0d.3: enabled 0
605 15:43:39.775196 PCI: 00:0e.0: enabled 0
606 15:43:39.778316 PCI: 00:10.2: enabled 1
607 15:43:39.778827 PCI: 00:10.6: enabled 0
608 15:43:39.781892 PCI: 00:10.7: enabled 0
609 15:43:39.785304 PCI: 00:12.0: enabled 0
610 15:43:39.788833 PCI: 00:12.6: enabled 0
611 15:43:39.789269 PCI: 00:13.0: enabled 0
612 15:43:39.791826 PCI: 00:14.0: enabled 1
613 15:43:39.795061 PCI: 00:14.1: enabled 0
614 15:43:39.795592 PCI: 00:14.2: enabled 1
615 15:43:39.798153 PCI: 00:14.3: enabled 1
616 15:43:39.802050 PCI: 00:15.0: enabled 1
617 15:43:39.804957 PCI: 00:15.1: enabled 1
618 15:43:39.805383 PCI: 00:15.2: enabled 1
619 15:43:39.808327 PCI: 00:15.3: enabled 1
620 15:43:39.811414 PCI: 00:16.0: enabled 1
621 15:43:39.815074 PCI: 00:16.1: enabled 0
622 15:43:39.815700 PCI: 00:16.2: enabled 0
623 15:43:39.818309 PCI: 00:16.3: enabled 0
624 15:43:39.821466 PCI: 00:16.4: enabled 0
625 15:43:39.824671 PCI: 00:16.5: enabled 0
626 15:43:39.825096 PCI: 00:17.0: enabled 1
627 15:43:39.827956 PCI: 00:19.0: enabled 0
628 15:43:39.831669 PCI: 00:19.1: enabled 1
629 15:43:39.834775 PCI: 00:19.2: enabled 0
630 15:43:39.835339 PCI: 00:1c.0: enabled 1
631 15:43:39.837896 PCI: 00:1c.1: enabled 0
632 15:43:39.841228 PCI: 00:1c.2: enabled 0
633 15:43:39.844463 PCI: 00:1c.3: enabled 0
634 15:43:39.844900 PCI: 00:1c.4: enabled 0
635 15:43:39.848193 PCI: 00:1c.5: enabled 0
636 15:43:39.851473 PCI: 00:1c.6: enabled 1
637 15:43:39.852183 PCI: 00:1c.7: enabled 0
638 15:43:39.854696 PCI: 00:1d.0: enabled 1
639 15:43:39.857839 PCI: 00:1d.1: enabled 0
640 15:43:39.860986 PCI: 00:1d.2: enabled 1
641 15:43:39.861413 PCI: 00:1d.3: enabled 0
642 15:43:39.865132 PCI: 00:1e.0: enabled 1
643 15:43:39.868055 PCI: 00:1e.1: enabled 0
644 15:43:39.871147 PCI: 00:1e.2: enabled 1
645 15:43:39.871794 PCI: 00:1e.3: enabled 1
646 15:43:39.874182 PCI: 00:1f.0: enabled 1
647 15:43:39.877346 PCI: 00:1f.1: enabled 0
648 15:43:39.881233 PCI: 00:1f.2: enabled 1
649 15:43:39.881718 PCI: 00:1f.3: enabled 1
650 15:43:39.884604 PCI: 00:1f.4: enabled 0
651 15:43:39.887906 PCI: 00:1f.5: enabled 1
652 15:43:39.891031 PCI: 00:1f.6: enabled 0
653 15:43:39.891473 PCI: 00:1f.7: enabled 0
654 15:43:39.894864 APIC: 00: enabled 1
655 15:43:39.897232 GENERIC: 0.0: enabled 1
656 15:43:39.897656 GENERIC: 0.0: enabled 1
657 15:43:39.900763 GENERIC: 1.0: enabled 1
658 15:43:39.904164 GENERIC: 0.0: enabled 1
659 15:43:39.907408 GENERIC: 1.0: enabled 1
660 15:43:39.907851 USB0 port 0: enabled 1
661 15:43:39.910604 GENERIC: 0.0: enabled 1
662 15:43:39.913897 USB0 port 0: enabled 1
663 15:43:39.917319 GENERIC: 0.0: enabled 1
664 15:43:39.917827 I2C: 00:1a: enabled 1
665 15:43:39.920644 I2C: 00:31: enabled 1
666 15:43:39.923659 I2C: 00:32: enabled 1
667 15:43:39.924148 I2C: 00:10: enabled 1
668 15:43:39.926928 I2C: 00:15: enabled 1
669 15:43:39.930231 GENERIC: 0.0: enabled 0
670 15:43:39.930748 GENERIC: 1.0: enabled 0
671 15:43:39.933565 GENERIC: 0.0: enabled 1
672 15:43:39.937042 SPI: 00: enabled 1
673 15:43:39.937465 SPI: 00: enabled 1
674 15:43:39.940735 PNP: 0c09.0: enabled 1
675 15:43:39.943965 GENERIC: 0.0: enabled 1
676 15:43:39.944552 USB3 port 0: enabled 1
677 15:43:39.947272 USB3 port 1: enabled 1
678 15:43:39.950230 USB3 port 2: enabled 0
679 15:43:39.954049 USB3 port 3: enabled 0
680 15:43:39.954474 USB2 port 0: enabled 0
681 15:43:39.956858 USB2 port 1: enabled 1
682 15:43:39.960297 USB2 port 2: enabled 1
683 15:43:39.960720 USB2 port 3: enabled 0
684 15:43:39.963814 USB2 port 4: enabled 1
685 15:43:39.967199 USB2 port 5: enabled 0
686 15:43:39.970422 USB2 port 6: enabled 0
687 15:43:39.970840 USB2 port 7: enabled 0
688 15:43:39.973703 USB2 port 8: enabled 0
689 15:43:39.976839 USB2 port 9: enabled 0
690 15:43:39.977357 USB3 port 0: enabled 0
691 15:43:39.980013 USB3 port 1: enabled 1
692 15:43:39.984046 USB3 port 2: enabled 0
693 15:43:39.984662 USB3 port 3: enabled 0
694 15:43:39.987284 GENERIC: 0.0: enabled 1
695 15:43:39.990610 GENERIC: 1.0: enabled 1
696 15:43:39.993753 APIC: 01: enabled 1
697 15:43:39.994300 APIC: 05: enabled 1
698 15:43:39.997076 APIC: 06: enabled 1
699 15:43:39.997674 APIC: 03: enabled 1
700 15:43:40.000477 APIC: 02: enabled 1
701 15:43:40.003700 APIC: 04: enabled 1
702 15:43:40.004220 APIC: 07: enabled 1
703 15:43:40.006921 Compare with tree...
704 15:43:40.009748 Root Device: enabled 1
705 15:43:40.010333 DOMAIN: 0000: enabled 1
706 15:43:40.013391 PCI: 00:00.0: enabled 1
707 15:43:40.016738 PCI: 00:02.0: enabled 1
708 15:43:40.020136 PCI: 00:04.0: enabled 1
709 15:43:40.023388 GENERIC: 0.0: enabled 1
710 15:43:40.023896 PCI: 00:05.0: enabled 1
711 15:43:40.026412 PCI: 00:06.0: enabled 0
712 15:43:40.029735 PCI: 00:07.0: enabled 0
713 15:43:40.032990 GENERIC: 0.0: enabled 1
714 15:43:40.036768 PCI: 00:07.1: enabled 0
715 15:43:40.040103 GENERIC: 1.0: enabled 1
716 15:43:40.040538 PCI: 00:07.2: enabled 0
717 15:43:40.043204 GENERIC: 0.0: enabled 1
718 15:43:40.046177 PCI: 00:07.3: enabled 0
719 15:43:40.049610 GENERIC: 1.0: enabled 1
720 15:43:40.052800 PCI: 00:08.0: enabled 1
721 15:43:40.053286 PCI: 00:09.0: enabled 0
722 15:43:40.056594 PCI: 00:0a.0: enabled 0
723 15:43:40.059879 PCI: 00:0d.0: enabled 1
724 15:43:40.063066 USB0 port 0: enabled 1
725 15:43:40.065907 USB3 port 0: enabled 1
726 15:43:40.066284 USB3 port 1: enabled 1
727 15:43:40.068943 USB3 port 2: enabled 0
728 15:43:40.072574 USB3 port 3: enabled 0
729 15:43:40.076139 PCI: 00:0d.1: enabled 0
730 15:43:40.079303 PCI: 00:0d.2: enabled 0
731 15:43:40.079460 GENERIC: 0.0: enabled 1
732 15:43:40.082360 PCI: 00:0d.3: enabled 0
733 15:43:40.085639 PCI: 00:0e.0: enabled 0
734 15:43:40.088816 PCI: 00:10.2: enabled 1
735 15:43:40.092594 PCI: 00:10.6: enabled 0
736 15:43:40.092760 PCI: 00:10.7: enabled 0
737 15:43:40.096056 PCI: 00:12.0: enabled 0
738 15:43:40.099290 PCI: 00:12.6: enabled 0
739 15:43:40.102754 PCI: 00:13.0: enabled 0
740 15:43:40.105716 PCI: 00:14.0: enabled 1
741 15:43:40.105870 USB0 port 0: enabled 1
742 15:43:40.109059 USB2 port 0: enabled 0
743 15:43:40.112360 USB2 port 1: enabled 1
744 15:43:40.115764 USB2 port 2: enabled 1
745 15:43:40.118950 USB2 port 3: enabled 0
746 15:43:40.122140 USB2 port 4: enabled 1
747 15:43:40.122273 USB2 port 5: enabled 0
748 15:43:40.125609 USB2 port 6: enabled 0
749 15:43:40.128824 USB2 port 7: enabled 0
750 15:43:40.132306 USB2 port 8: enabled 0
751 15:43:40.182272 USB2 port 9: enabled 0
752 15:43:40.182751 USB3 port 0: enabled 0
753 15:43:40.183094 USB3 port 1: enabled 1
754 15:43:40.183749 USB3 port 2: enabled 0
755 15:43:40.184090 USB3 port 3: enabled 0
756 15:43:40.184397 PCI: 00:14.1: enabled 0
757 15:43:40.184697 PCI: 00:14.2: enabled 1
758 15:43:40.184985 PCI: 00:14.3: enabled 1
759 15:43:40.185270 GENERIC: 0.0: enabled 1
760 15:43:40.185553 PCI: 00:15.0: enabled 1
761 15:43:40.185884 I2C: 00:1a: enabled 1
762 15:43:40.186175 I2C: 00:31: enabled 1
763 15:43:40.186457 I2C: 00:32: enabled 1
764 15:43:40.186733 PCI: 00:15.1: enabled 1
765 15:43:40.187009 I2C: 00:10: enabled 1
766 15:43:40.187283 PCI: 00:15.2: enabled 1
767 15:43:40.187561 PCI: 00:15.3: enabled 1
768 15:43:40.187835 PCI: 00:16.0: enabled 1
769 15:43:40.188113 PCI: 00:16.1: enabled 0
770 15:43:40.232447 PCI: 00:16.2: enabled 0
771 15:43:40.232920 PCI: 00:16.3: enabled 0
772 15:43:40.233274 PCI: 00:16.4: enabled 0
773 15:43:40.233633 PCI: 00:16.5: enabled 0
774 15:43:40.234098 PCI: 00:17.0: enabled 1
775 15:43:40.234592 PCI: 00:19.0: enabled 0
776 15:43:40.235074 PCI: 00:19.1: enabled 1
777 15:43:40.235857 I2C: 00:15: enabled 1
778 15:43:40.236227 PCI: 00:19.2: enabled 0
779 15:43:40.236560 PCI: 00:1d.0: enabled 1
780 15:43:40.236875 GENERIC: 0.0: enabled 1
781 15:43:40.237188 PCI: 00:1e.0: enabled 1
782 15:43:40.237649 PCI: 00:1e.1: enabled 0
783 15:43:40.238213 PCI: 00:1e.2: enabled 1
784 15:43:40.238587 SPI: 00: enabled 1
785 15:43:40.238890 PCI: 00:1e.3: enabled 1
786 15:43:40.239189 SPI: 00: enabled 1
787 15:43:40.239475 PCI: 00:1f.0: enabled 1
788 15:43:40.239861 PNP: 0c09.0: enabled 1
789 15:43:40.240274 PCI: 00:1f.1: enabled 0
790 15:43:40.240601 PCI: 00:1f.2: enabled 1
791 15:43:40.240894 GENERIC: 0.0: enabled 1
792 15:43:40.243581 GENERIC: 0.0: enabled 1
793 15:43:40.246560 GENERIC: 1.0: enabled 1
794 15:43:40.246988 PCI: 00:1f.3: enabled 1
795 15:43:40.249644 PCI: 00:1f.4: enabled 0
796 15:43:40.252959 PCI: 00:1f.5: enabled 1
797 15:43:40.256668 PCI: 00:1f.6: enabled 0
798 15:43:40.259480 PCI: 00:1f.7: enabled 0
799 15:43:40.259908 CPU_CLUSTER: 0: enabled 1
800 15:43:40.263255 APIC: 00: enabled 1
801 15:43:40.266595 APIC: 01: enabled 1
802 15:43:40.269791 APIC: 05: enabled 1
803 15:43:40.270225 APIC: 06: enabled 1
804 15:43:40.272919 APIC: 03: enabled 1
805 15:43:40.276237 APIC: 02: enabled 1
806 15:43:40.276664 APIC: 04: enabled 1
807 15:43:40.279534 APIC: 07: enabled 1
808 15:43:40.282822 Root Device scanning...
809 15:43:40.286250 scan_static_bus for Root Device
810 15:43:40.289169 DOMAIN: 0000 enabled
811 15:43:40.289648 CPU_CLUSTER: 0 enabled
812 15:43:40.293112 DOMAIN: 0000 scanning...
813 15:43:40.295963 PCI: pci_scan_bus for bus 00
814 15:43:40.299093 PCI: 00:00.0 [8086/0000] ops
815 15:43:40.302487 PCI: 00:00.0 [8086/9a12] enabled
816 15:43:40.306190 PCI: 00:02.0 [8086/0000] bus ops
817 15:43:40.309469 PCI: 00:02.0 [8086/9a40] enabled
818 15:43:40.312592 PCI: 00:04.0 [8086/0000] bus ops
819 15:43:40.315921 PCI: 00:04.0 [8086/9a03] enabled
820 15:43:40.319172 PCI: 00:05.0 [8086/9a19] enabled
821 15:43:40.322469 PCI: 00:07.0 [0000/0000] hidden
822 15:43:40.325835 PCI: 00:08.0 [8086/9a11] enabled
823 15:43:40.329039 PCI: 00:0a.0 [8086/9a0d] disabled
824 15:43:40.332517 PCI: 00:0d.0 [8086/0000] bus ops
825 15:43:40.335592 PCI: 00:0d.0 [8086/9a13] enabled
826 15:43:40.339308 PCI: 00:14.0 [8086/0000] bus ops
827 15:43:40.342027 PCI: 00:14.0 [8086/a0ed] enabled
828 15:43:40.345750 PCI: 00:14.2 [8086/a0ef] enabled
829 15:43:40.348946 PCI: 00:14.3 [8086/0000] bus ops
830 15:43:40.352100 PCI: 00:14.3 [8086/a0f0] enabled
831 15:43:40.355215 PCI: 00:15.0 [8086/0000] bus ops
832 15:43:40.358806 PCI: 00:15.0 [8086/a0e8] enabled
833 15:43:40.362451 PCI: 00:15.1 [8086/0000] bus ops
834 15:43:40.365353 PCI: 00:15.1 [8086/a0e9] enabled
835 15:43:40.368563 PCI: 00:15.2 [8086/0000] bus ops
836 15:43:40.371858 PCI: 00:15.2 [8086/a0ea] enabled
837 15:43:40.375128 PCI: 00:15.3 [8086/0000] bus ops
838 15:43:40.378249 PCI: 00:15.3 [8086/a0eb] enabled
839 15:43:40.381718 PCI: 00:16.0 [8086/0000] ops
840 15:43:40.384941 PCI: 00:16.0 [8086/a0e0] enabled
841 15:43:40.392025 PCI: Static device PCI: 00:17.0 not found, disabling it.
842 15:43:40.395658 PCI: 00:19.0 [8086/0000] bus ops
843 15:43:40.398143 PCI: 00:19.0 [8086/a0c5] disabled
844 15:43:40.402169 PCI: 00:19.1 [8086/0000] bus ops
845 15:43:40.405429 PCI: 00:19.1 [8086/a0c6] enabled
846 15:43:40.408686 PCI: 00:1d.0 [8086/0000] bus ops
847 15:43:40.411714 PCI: 00:1d.0 [8086/a0b0] enabled
848 15:43:40.415157 PCI: 00:1e.0 [8086/0000] ops
849 15:43:40.418137 PCI: 00:1e.0 [8086/a0a8] enabled
850 15:43:40.421175 PCI: 00:1e.2 [8086/0000] bus ops
851 15:43:40.424794 PCI: 00:1e.2 [8086/a0aa] enabled
852 15:43:40.428655 PCI: 00:1e.3 [8086/0000] bus ops
853 15:43:40.431630 PCI: 00:1e.3 [8086/a0ab] enabled
854 15:43:40.434902 PCI: 00:1f.0 [8086/0000] bus ops
855 15:43:40.438000 PCI: 00:1f.0 [8086/a087] enabled
856 15:43:40.438468 RTC Init
857 15:43:40.441283 Set power on after power failure.
858 15:43:40.444825 Disabling Deep S3
859 15:43:40.447816 Disabling Deep S3
860 15:43:40.448377 Disabling Deep S4
861 15:43:40.451884 Disabling Deep S4
862 15:43:40.452307 Disabling Deep S5
863 15:43:40.454486 Disabling Deep S5
864 15:43:40.458347 PCI: 00:1f.2 [0000/0000] hidden
865 15:43:40.461373 PCI: 00:1f.3 [8086/0000] bus ops
866 15:43:40.464533 PCI: 00:1f.3 [8086/a0c8] enabled
867 15:43:40.467622 PCI: 00:1f.5 [8086/0000] bus ops
868 15:43:40.471042 PCI: 00:1f.5 [8086/a0a4] enabled
869 15:43:40.474252 PCI: Leftover static devices:
870 15:43:40.474686 PCI: 00:10.2
871 15:43:40.478235 PCI: 00:10.6
872 15:43:40.478656 PCI: 00:10.7
873 15:43:40.479096 PCI: 00:06.0
874 15:43:40.480916 PCI: 00:07.1
875 15:43:40.481358 PCI: 00:07.2
876 15:43:40.484628 PCI: 00:07.3
877 15:43:40.485049 PCI: 00:09.0
878 15:43:40.487922 PCI: 00:0d.1
879 15:43:40.488391 PCI: 00:0d.2
880 15:43:40.488731 PCI: 00:0d.3
881 15:43:40.491305 PCI: 00:0e.0
882 15:43:40.491725 PCI: 00:12.0
883 15:43:40.494548 PCI: 00:12.6
884 15:43:40.494974 PCI: 00:13.0
885 15:43:40.495315 PCI: 00:14.1
886 15:43:40.497836 PCI: 00:16.1
887 15:43:40.498265 PCI: 00:16.2
888 15:43:40.501202 PCI: 00:16.3
889 15:43:40.501628 PCI: 00:16.4
890 15:43:40.504513 PCI: 00:16.5
891 15:43:40.504940 PCI: 00:17.0
892 15:43:40.505279 PCI: 00:19.2
893 15:43:40.507747 PCI: 00:1e.1
894 15:43:40.508177 PCI: 00:1f.1
895 15:43:40.510923 PCI: 00:1f.4
896 15:43:40.511348 PCI: 00:1f.6
897 15:43:40.511690 PCI: 00:1f.7
898 15:43:40.514245 PCI: Check your devicetree.cb.
899 15:43:40.517487 PCI: 00:02.0 scanning...
900 15:43:40.520640 scan_generic_bus for PCI: 00:02.0
901 15:43:40.524166 scan_generic_bus for PCI: 00:02.0 done
902 15:43:40.530571 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
903 15:43:40.534175 PCI: 00:04.0 scanning...
904 15:43:40.537143 scan_generic_bus for PCI: 00:04.0
905 15:43:40.537605 GENERIC: 0.0 enabled
906 15:43:40.543766 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
907 15:43:40.550665 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
908 15:43:40.551137 PCI: 00:0d.0 scanning...
909 15:43:40.553906 scan_static_bus for PCI: 00:0d.0
910 15:43:40.557309 USB0 port 0 enabled
911 15:43:40.560413 USB0 port 0 scanning...
912 15:43:40.563707 scan_static_bus for USB0 port 0
913 15:43:40.567514 USB3 port 0 enabled
914 15:43:40.568169 USB3 port 1 enabled
915 15:43:40.570828 USB3 port 2 disabled
916 15:43:40.571434 USB3 port 3 disabled
917 15:43:40.573397 USB3 port 0 scanning...
918 15:43:40.577291 scan_static_bus for USB3 port 0
919 15:43:40.580402 scan_static_bus for USB3 port 0 done
920 15:43:40.586728 scan_bus: bus USB3 port 0 finished in 6 msecs
921 15:43:40.587295 USB3 port 1 scanning...
922 15:43:40.590168 scan_static_bus for USB3 port 1
923 15:43:40.597229 scan_static_bus for USB3 port 1 done
924 15:43:40.600550 scan_bus: bus USB3 port 1 finished in 6 msecs
925 15:43:40.603857 scan_static_bus for USB0 port 0 done
926 15:43:40.607069 scan_bus: bus USB0 port 0 finished in 43 msecs
927 15:43:40.613677 scan_static_bus for PCI: 00:0d.0 done
928 15:43:40.616985 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
929 15:43:40.620377 PCI: 00:14.0 scanning...
930 15:43:40.623720 scan_static_bus for PCI: 00:14.0
931 15:43:40.627010 USB0 port 0 enabled
932 15:43:40.627612 USB0 port 0 scanning...
933 15:43:40.630236 scan_static_bus for USB0 port 0
934 15:43:40.633357 USB2 port 0 disabled
935 15:43:40.636640 USB2 port 1 enabled
936 15:43:40.637201 USB2 port 2 enabled
937 15:43:40.640425 USB2 port 3 disabled
938 15:43:40.640865 USB2 port 4 enabled
939 15:43:40.643560 USB2 port 5 disabled
940 15:43:40.646582 USB2 port 6 disabled
941 15:43:40.647011 USB2 port 7 disabled
942 15:43:40.650163 USB2 port 8 disabled
943 15:43:40.653343 USB2 port 9 disabled
944 15:43:40.653947 USB3 port 0 disabled
945 15:43:40.656754 USB3 port 1 enabled
946 15:43:40.660384 USB3 port 2 disabled
947 15:43:40.660967 USB3 port 3 disabled
948 15:43:40.663576 USB2 port 1 scanning...
949 15:43:40.666543 scan_static_bus for USB2 port 1
950 15:43:40.670278 scan_static_bus for USB2 port 1 done
951 15:43:40.676778 scan_bus: bus USB2 port 1 finished in 6 msecs
952 15:43:40.677230 USB2 port 2 scanning...
953 15:43:40.679975 scan_static_bus for USB2 port 2
954 15:43:40.686613 scan_static_bus for USB2 port 2 done
955 15:43:40.689726 scan_bus: bus USB2 port 2 finished in 6 msecs
956 15:43:40.692856 USB2 port 4 scanning...
957 15:43:40.696560 scan_static_bus for USB2 port 4
958 15:43:40.699516 scan_static_bus for USB2 port 4 done
959 15:43:40.703083 scan_bus: bus USB2 port 4 finished in 6 msecs
960 15:43:40.706477 USB3 port 1 scanning...
961 15:43:40.709799 scan_static_bus for USB3 port 1
962 15:43:40.712814 scan_static_bus for USB3 port 1 done
963 15:43:40.716154 scan_bus: bus USB3 port 1 finished in 6 msecs
964 15:43:40.720168 scan_static_bus for USB0 port 0 done
965 15:43:40.726805 scan_bus: bus USB0 port 0 finished in 93 msecs
966 15:43:40.730089 scan_static_bus for PCI: 00:14.0 done
967 15:43:40.733463 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
968 15:43:40.736752 PCI: 00:14.3 scanning...
969 15:43:40.739813 scan_static_bus for PCI: 00:14.3
970 15:43:40.743247 GENERIC: 0.0 enabled
971 15:43:40.746601 scan_static_bus for PCI: 00:14.3 done
972 15:43:40.752945 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
973 15:43:40.753375 PCI: 00:15.0 scanning...
974 15:43:40.756213 scan_static_bus for PCI: 00:15.0
975 15:43:40.759880 I2C: 00:1a enabled
976 15:43:40.763584 I2C: 00:31 enabled
977 15:43:40.764033 I2C: 00:32 enabled
978 15:43:40.766270 scan_static_bus for PCI: 00:15.0 done
979 15:43:40.772844 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
980 15:43:40.776712 PCI: 00:15.1 scanning...
981 15:43:40.779823 scan_static_bus for PCI: 00:15.1
982 15:43:40.780254 I2C: 00:10 enabled
983 15:43:40.783297 scan_static_bus for PCI: 00:15.1 done
984 15:43:40.789724 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
985 15:43:40.792916 PCI: 00:15.2 scanning...
986 15:43:40.796717 scan_static_bus for PCI: 00:15.2
987 15:43:40.799602 scan_static_bus for PCI: 00:15.2 done
988 15:43:40.802801 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
989 15:43:40.806239 PCI: 00:15.3 scanning...
990 15:43:40.809488 scan_static_bus for PCI: 00:15.3
991 15:43:40.812649 scan_static_bus for PCI: 00:15.3 done
992 15:43:40.818867 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
993 15:43:40.819300 PCI: 00:19.1 scanning...
994 15:43:40.822174 scan_static_bus for PCI: 00:19.1
995 15:43:40.825712 I2C: 00:15 enabled
996 15:43:40.828978 scan_static_bus for PCI: 00:19.1 done
997 15:43:40.835379 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
998 15:43:40.835805 PCI: 00:1d.0 scanning...
999 15:43:40.842495 do_pci_scan_bridge for PCI: 00:1d.0
1000 15:43:40.842923 PCI: pci_scan_bus for bus 01
1001 15:43:40.845919 PCI: 01:00.0 [1c5c/174a] enabled
1002 15:43:40.849132 GENERIC: 0.0 enabled
1003 15:43:40.852513 Enabling Common Clock Configuration
1004 15:43:40.858960 L1 Sub-State supported from root port 29
1005 15:43:40.859395 L1 Sub-State Support = 0xf
1006 15:43:40.862174 CommonModeRestoreTime = 0x28
1007 15:43:40.869180 Power On Value = 0x16, Power On Scale = 0x0
1008 15:43:40.869624 ASPM: Enabled L1
1009 15:43:40.872242 PCIe: Max_Payload_Size adjusted to 128
1010 15:43:40.879277 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1011 15:43:40.882077 PCI: 00:1e.2 scanning...
1012 15:43:40.885329 scan_generic_bus for PCI: 00:1e.2
1013 15:43:40.885943 SPI: 00 enabled
1014 15:43:40.892279 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1015 15:43:40.895487 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1016 15:43:40.898796 PCI: 00:1e.3 scanning...
1017 15:43:40.902018 scan_generic_bus for PCI: 00:1e.3
1018 15:43:40.905800 SPI: 00 enabled
1019 15:43:40.912237 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1020 15:43:40.915502 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1021 15:43:40.918616 PCI: 00:1f.0 scanning...
1022 15:43:40.921894 scan_static_bus for PCI: 00:1f.0
1023 15:43:40.924889 PNP: 0c09.0 enabled
1024 15:43:40.925247 PNP: 0c09.0 scanning...
1025 15:43:40.928708 scan_static_bus for PNP: 0c09.0
1026 15:43:40.931554 scan_static_bus for PNP: 0c09.0 done
1027 15:43:40.938009 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1028 15:43:40.941748 scan_static_bus for PCI: 00:1f.0 done
1029 15:43:40.944758 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1030 15:43:40.947986 PCI: 00:1f.2 scanning...
1031 15:43:40.951354 scan_static_bus for PCI: 00:1f.2
1032 15:43:40.954552 GENERIC: 0.0 enabled
1033 15:43:40.957671 GENERIC: 0.0 scanning...
1034 15:43:40.961658 scan_static_bus for GENERIC: 0.0
1035 15:43:40.961894 GENERIC: 0.0 enabled
1036 15:43:40.965119 GENERIC: 1.0 enabled
1037 15:43:40.967733 scan_static_bus for GENERIC: 0.0 done
1038 15:43:40.975020 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1039 15:43:40.978240 scan_static_bus for PCI: 00:1f.2 done
1040 15:43:40.981630 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1041 15:43:40.984858 PCI: 00:1f.3 scanning...
1042 15:43:40.988130 scan_static_bus for PCI: 00:1f.3
1043 15:43:40.991374 scan_static_bus for PCI: 00:1f.3 done
1044 15:43:40.997723 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1045 15:43:40.998124 PCI: 00:1f.5 scanning...
1046 15:43:41.004625 scan_generic_bus for PCI: 00:1f.5
1047 15:43:41.007995 scan_generic_bus for PCI: 00:1f.5 done
1048 15:43:41.011791 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1049 15:43:41.018173 scan_bus: bus DOMAIN: 0000 finished in 718 msecs
1050 15:43:41.021460 scan_static_bus for Root Device done
1051 15:43:41.024761 scan_bus: bus Root Device finished in 737 msecs
1052 15:43:41.025290 done
1053 15:43:41.031203 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1054 15:43:41.034375 Chrome EC: UHEPI supported
1055 15:43:41.040809 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1056 15:43:41.047754 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1057 15:43:41.051002 SPI flash protection: WPSW=1 SRP0=0
1058 15:43:41.054400 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1059 15:43:41.060929 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1060 15:43:41.064384 found VGA at PCI: 00:02.0
1061 15:43:41.067656 Setting up VGA for PCI: 00:02.0
1062 15:43:41.074138 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1063 15:43:41.077237 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1064 15:43:41.080749 Allocating resources...
1065 15:43:41.081168 Reading resources...
1066 15:43:41.087186 Root Device read_resources bus 0 link: 0
1067 15:43:41.090958 DOMAIN: 0000 read_resources bus 0 link: 0
1068 15:43:41.097573 PCI: 00:04.0 read_resources bus 1 link: 0
1069 15:43:41.100970 PCI: 00:04.0 read_resources bus 1 link: 0 done
1070 15:43:41.107059 PCI: 00:0d.0 read_resources bus 0 link: 0
1071 15:43:41.110416 USB0 port 0 read_resources bus 0 link: 0
1072 15:43:41.117046 USB0 port 0 read_resources bus 0 link: 0 done
1073 15:43:41.120042 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1074 15:43:41.123920 PCI: 00:14.0 read_resources bus 0 link: 0
1075 15:43:41.130858 USB0 port 0 read_resources bus 0 link: 0
1076 15:43:41.133733 USB0 port 0 read_resources bus 0 link: 0 done
1077 15:43:41.140268 PCI: 00:14.0 read_resources bus 0 link: 0 done
1078 15:43:41.143647 PCI: 00:14.3 read_resources bus 0 link: 0
1079 15:43:41.150711 PCI: 00:14.3 read_resources bus 0 link: 0 done
1080 15:43:41.153823 PCI: 00:15.0 read_resources bus 0 link: 0
1081 15:43:41.160415 PCI: 00:15.0 read_resources bus 0 link: 0 done
1082 15:43:41.164171 PCI: 00:15.1 read_resources bus 0 link: 0
1083 15:43:41.170586 PCI: 00:15.1 read_resources bus 0 link: 0 done
1084 15:43:41.173920 PCI: 00:19.1 read_resources bus 0 link: 0
1085 15:43:41.180858 PCI: 00:19.1 read_resources bus 0 link: 0 done
1086 15:43:41.184274 PCI: 00:1d.0 read_resources bus 1 link: 0
1087 15:43:41.191029 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1088 15:43:41.194223 PCI: 00:1e.2 read_resources bus 2 link: 0
1089 15:43:41.200829 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1090 15:43:41.204832 PCI: 00:1e.3 read_resources bus 3 link: 0
1091 15:43:41.211462 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1092 15:43:41.214327 PCI: 00:1f.0 read_resources bus 0 link: 0
1093 15:43:41.221051 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1094 15:43:41.223855 PCI: 00:1f.2 read_resources bus 0 link: 0
1095 15:43:41.227089 GENERIC: 0.0 read_resources bus 0 link: 0
1096 15:43:41.234303 GENERIC: 0.0 read_resources bus 0 link: 0 done
1097 15:43:41.238263 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1098 15:43:41.245302 DOMAIN: 0000 read_resources bus 0 link: 0 done
1099 15:43:41.248201 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1100 15:43:41.254772 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1101 15:43:41.258137 Root Device read_resources bus 0 link: 0 done
1102 15:43:41.261884 Done reading resources.
1103 15:43:41.268231 Show resources in subtree (Root Device)...After reading.
1104 15:43:41.271613 Root Device child on link 0 DOMAIN: 0000
1105 15:43:41.275063 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 15:43:41.284665 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 15:43:41.294980 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1108 15:43:41.298242 PCI: 00:00.0
1109 15:43:41.308118 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 15:43:41.314600 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 15:43:41.325047 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 15:43:41.335049 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 15:43:41.344897 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 15:43:41.354659 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 15:43:41.364281 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 15:43:41.370859 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 15:43:41.380714 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 15:43:41.391455 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1119 15:43:41.401161 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1120 15:43:41.410793 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1121 15:43:41.417412 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1122 15:43:41.427761 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1123 15:43:41.437710 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1124 15:43:41.447512 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1125 15:43:41.457387 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1126 15:43:41.467526 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1127 15:43:41.477406 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1128 15:43:41.484109 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1129 15:43:41.486992 PCI: 00:02.0
1130 15:43:41.496517 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1131 15:43:41.506493 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1132 15:43:41.517076 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1133 15:43:41.520183 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1134 15:43:41.530040 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1135 15:43:41.533133 GENERIC: 0.0
1136 15:43:41.533830 PCI: 00:05.0
1137 15:43:41.542296 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 15:43:41.549437 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1139 15:43:41.549553 GENERIC: 0.0
1140 15:43:41.552665 PCI: 00:08.0
1141 15:43:41.562720 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1142 15:43:41.562832 PCI: 00:0a.0
1143 15:43:41.569280 PCI: 00:0d.0 child on link 0 USB0 port 0
1144 15:43:41.578791 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1145 15:43:41.582650 USB0 port 0 child on link 0 USB3 port 0
1146 15:43:41.582755 USB3 port 0
1147 15:43:41.585957 USB3 port 1
1148 15:43:41.589041 USB3 port 2
1149 15:43:41.589118 USB3 port 3
1150 15:43:41.592405 PCI: 00:14.0 child on link 0 USB0 port 0
1151 15:43:41.602652 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 15:43:41.609027 USB0 port 0 child on link 0 USB2 port 0
1153 15:43:41.609109 USB2 port 0
1154 15:43:41.612103 USB2 port 1
1155 15:43:41.612184 USB2 port 2
1156 15:43:41.615925 USB2 port 3
1157 15:43:41.616016 USB2 port 4
1158 15:43:41.618905 USB2 port 5
1159 15:43:41.618986 USB2 port 6
1160 15:43:41.622489 USB2 port 7
1161 15:43:41.625191 USB2 port 8
1162 15:43:41.625271 USB2 port 9
1163 15:43:41.628757 USB3 port 0
1164 15:43:41.628838 USB3 port 1
1165 15:43:41.632074 USB3 port 2
1166 15:43:41.632184 USB3 port 3
1167 15:43:41.635418 PCI: 00:14.2
1168 15:43:41.645252 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1169 15:43:41.654880 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 15:43:41.658582 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1171 15:43:41.668815 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1172 15:43:41.672129 GENERIC: 0.0
1173 15:43:41.675271 PCI: 00:15.0 child on link 0 I2C: 00:1a
1174 15:43:41.684713 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 15:43:41.684795 I2C: 00:1a
1176 15:43:41.688504 I2C: 00:31
1177 15:43:41.688585 I2C: 00:32
1178 15:43:41.694799 PCI: 00:15.1 child on link 0 I2C: 00:10
1179 15:43:41.704939 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 15:43:41.705023 I2C: 00:10
1181 15:43:41.707845 PCI: 00:15.2
1182 15:43:41.717917 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 15:43:41.718003 PCI: 00:15.3
1184 15:43:41.728024 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 15:43:41.731242 PCI: 00:16.0
1186 15:43:41.741333 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 15:43:41.741419 PCI: 00:19.0
1188 15:43:41.744660 PCI: 00:19.1 child on link 0 I2C: 00:15
1189 15:43:41.754276 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 15:43:41.757529 I2C: 00:15
1191 15:43:41.760823 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1192 15:43:41.770830 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1193 15:43:41.780690 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1194 15:43:41.791112 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1195 15:43:41.791196 GENERIC: 0.0
1196 15:43:41.794202 PCI: 01:00.0
1197 15:43:41.803841 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 15:43:41.813746 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1199 15:43:41.820601 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1200 15:43:41.824089 PCI: 00:1e.0
1201 15:43:41.833888 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1202 15:43:41.837081 PCI: 00:1e.2 child on link 0 SPI: 00
1203 15:43:41.847272 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 15:43:41.850217 SPI: 00
1205 15:43:41.853624 PCI: 00:1e.3 child on link 0 SPI: 00
1206 15:43:41.863379 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1207 15:43:41.863470 SPI: 00
1208 15:43:41.869857 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1209 15:43:41.876991 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1210 15:43:41.879989 PNP: 0c09.0
1211 15:43:41.889954 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1212 15:43:41.893740 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1213 15:43:41.903721 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1214 15:43:41.913241 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1215 15:43:41.916671 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1216 15:43:41.919924 GENERIC: 0.0
1217 15:43:41.920309 GENERIC: 1.0
1218 15:43:41.923266 PCI: 00:1f.3
1219 15:43:41.933522 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 15:43:41.943471 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1221 15:43:41.943944 PCI: 00:1f.5
1222 15:43:41.953138 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1223 15:43:41.956948 CPU_CLUSTER: 0 child on link 0 APIC: 00
1224 15:43:41.960019 APIC: 00
1225 15:43:41.960437 APIC: 01
1226 15:43:41.960794 APIC: 05
1227 15:43:41.962981 APIC: 06
1228 15:43:41.963401 APIC: 03
1229 15:43:41.966576 APIC: 02
1230 15:43:41.967208 APIC: 04
1231 15:43:41.967567 APIC: 07
1232 15:43:41.976612 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1233 15:43:41.979612 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1234 15:43:41.986560 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1235 15:43:41.992806 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1236 15:43:41.996483 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1237 15:43:42.003393 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1238 15:43:42.006561 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1239 15:43:42.012938 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1240 15:43:42.019671 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1241 15:43:42.029074 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1242 15:43:42.036350 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1243 15:43:42.042436 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1244 15:43:42.049296 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 15:43:42.055500 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1246 15:43:42.065633 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1247 15:43:42.066149 DOMAIN: 0000: Resource ranges:
1248 15:43:42.072620 * Base: 1000, Size: 800, Tag: 100
1249 15:43:42.075683 * Base: 1900, Size: e700, Tag: 100
1250 15:43:42.078903 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1251 15:43:42.085390 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1252 15:43:42.092262 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1253 15:43:42.101966 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1254 15:43:42.108949 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1255 15:43:42.115465 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1256 15:43:42.125251 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1257 15:43:42.131576 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1258 15:43:42.138692 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1259 15:43:42.148566 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1260 15:43:42.154891 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1261 15:43:42.161435 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1262 15:43:42.171531 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1263 15:43:42.178446 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1264 15:43:42.184603 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1265 15:43:42.194425 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1266 15:43:42.201414 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1267 15:43:42.207865 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1268 15:43:42.217524 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1269 15:43:42.224771 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1270 15:43:42.231091 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1271 15:43:42.240787 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1272 15:43:42.247254 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1273 15:43:42.254307 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1274 15:43:42.264124 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1275 15:43:42.267524 DOMAIN: 0000: Resource ranges:
1276 15:43:42.270699 * Base: 7fc00000, Size: 40400000, Tag: 200
1277 15:43:42.273840 * Base: d0000000, Size: 28000000, Tag: 200
1278 15:43:42.280192 * Base: fa000000, Size: 1000000, Tag: 200
1279 15:43:42.283638 * Base: fb001000, Size: 2fff000, Tag: 200
1280 15:43:42.287614 * Base: fe010000, Size: 2e000, Tag: 200
1281 15:43:42.290547 * Base: fe03f000, Size: d41000, Tag: 200
1282 15:43:42.297001 * Base: fed88000, Size: 8000, Tag: 200
1283 15:43:42.300357 * Base: fed93000, Size: d000, Tag: 200
1284 15:43:42.303869 * Base: feda2000, Size: 1e000, Tag: 200
1285 15:43:42.307164 * Base: fede0000, Size: 1220000, Tag: 200
1286 15:43:42.313556 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1287 15:43:42.320261 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1288 15:43:42.326816 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1289 15:43:42.333199 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1290 15:43:42.339935 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1291 15:43:42.346775 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1292 15:43:42.353286 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1293 15:43:42.359904 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1294 15:43:42.366328 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1295 15:43:42.373111 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1296 15:43:42.379382 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1297 15:43:42.386380 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1298 15:43:42.392635 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1299 15:43:42.399362 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1300 15:43:42.406104 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1301 15:43:42.413139 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1302 15:43:42.419659 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1303 15:43:42.426024 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1304 15:43:42.432626 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1305 15:43:42.439195 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1306 15:43:42.445716 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1307 15:43:42.452171 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1308 15:43:42.459337 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1309 15:43:42.465886 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1310 15:43:42.475825 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1311 15:43:42.479014 PCI: 00:1d.0: Resource ranges:
1312 15:43:42.482129 * Base: 7fc00000, Size: 100000, Tag: 200
1313 15:43:42.489407 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1314 15:43:42.495518 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1315 15:43:42.502123 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1316 15:43:42.511821 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1317 15:43:42.518758 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1318 15:43:42.522064 Root Device assign_resources, bus 0 link: 0
1319 15:43:42.528412 DOMAIN: 0000 assign_resources, bus 0 link: 0
1320 15:43:42.535196 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1321 15:43:42.544878 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1322 15:43:42.551687 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1323 15:43:42.558308 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1324 15:43:42.564963 PCI: 00:04.0 assign_resources, bus 1 link: 0
1325 15:43:42.568062 PCI: 00:04.0 assign_resources, bus 1 link: 0
1326 15:43:42.577865 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1327 15:43:42.584539 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1328 15:43:42.594523 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1329 15:43:42.597607 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1330 15:43:42.604445 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1331 15:43:42.611561 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1332 15:43:42.614269 PCI: 00:14.0 assign_resources, bus 0 link: 0
1333 15:43:42.620534 PCI: 00:14.0 assign_resources, bus 0 link: 0
1334 15:43:42.627351 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1335 15:43:42.637427 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1336 15:43:42.643940 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1337 15:43:42.650404 PCI: 00:14.3 assign_resources, bus 0 link: 0
1338 15:43:42.653672 PCI: 00:14.3 assign_resources, bus 0 link: 0
1339 15:43:42.663360 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1340 15:43:42.666794 PCI: 00:15.0 assign_resources, bus 0 link: 0
1341 15:43:42.670318 PCI: 00:15.0 assign_resources, bus 0 link: 0
1342 15:43:42.680644 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1343 15:43:42.683979 PCI: 00:15.1 assign_resources, bus 0 link: 0
1344 15:43:42.690142 PCI: 00:15.1 assign_resources, bus 0 link: 0
1345 15:43:42.697121 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1346 15:43:42.706761 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1347 15:43:42.713111 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1348 15:43:42.723334 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1349 15:43:42.726569 PCI: 00:19.1 assign_resources, bus 0 link: 0
1350 15:43:42.729574 PCI: 00:19.1 assign_resources, bus 0 link: 0
1351 15:43:42.740347 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1352 15:43:42.749967 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 15:43:42.759644 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1354 15:43:42.763025 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 15:43:42.769893 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1356 15:43:42.779657 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1357 15:43:42.786118 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1358 15:43:42.792567 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1359 15:43:42.799466 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1360 15:43:42.806096 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1361 15:43:42.809603 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1362 15:43:42.816219 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1363 15:43:42.822529 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1364 15:43:42.825635 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1365 15:43:42.832670 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 15:43:42.835994 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1367 15:43:42.842042 LPC: Trying to open IO window from 800 size 1ff
1368 15:43:42.849168 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1369 15:43:42.858621 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1370 15:43:42.865421 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1371 15:43:42.872011 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 15:43:42.875059 Root Device assign_resources, bus 0 link: 0
1373 15:43:42.878396 Done setting resources.
1374 15:43:42.884952 Show resources in subtree (Root Device)...After assigning values.
1375 15:43:42.887972 Root Device child on link 0 DOMAIN: 0000
1376 15:43:42.891843 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1377 15:43:42.901456 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1378 15:43:42.910684 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1379 15:43:42.914730 PCI: 00:00.0
1380 15:43:42.924282 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1381 15:43:42.930953 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1382 15:43:42.941193 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1383 15:43:42.950773 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1384 15:43:42.960969 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1385 15:43:42.970654 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1386 15:43:42.980965 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1387 15:43:42.987641 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1388 15:43:42.997287 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1389 15:43:43.007249 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1390 15:43:43.016955 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1391 15:43:43.026710 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1392 15:43:43.033311 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1393 15:43:43.043517 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1394 15:43:43.054107 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1395 15:43:43.064045 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1396 15:43:43.073549 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1397 15:43:43.083823 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1398 15:43:43.093814 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1399 15:43:43.100262 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1400 15:43:43.103648 PCI: 00:02.0
1401 15:43:43.113408 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1402 15:43:43.123258 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1403 15:43:43.133184 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1404 15:43:43.140317 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1405 15:43:43.150199 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1406 15:43:43.150651 GENERIC: 0.0
1407 15:43:43.153177 PCI: 00:05.0
1408 15:43:43.163547 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1409 15:43:43.166792 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1410 15:43:43.170304 GENERIC: 0.0
1411 15:43:43.170726 PCI: 00:08.0
1412 15:43:43.179750 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1413 15:43:43.183077 PCI: 00:0a.0
1414 15:43:43.186356 PCI: 00:0d.0 child on link 0 USB0 port 0
1415 15:43:43.196609 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1416 15:43:43.203124 USB0 port 0 child on link 0 USB3 port 0
1417 15:43:43.203581 USB3 port 0
1418 15:43:43.206359 USB3 port 1
1419 15:43:43.206828 USB3 port 2
1420 15:43:43.209516 USB3 port 3
1421 15:43:43.212603 PCI: 00:14.0 child on link 0 USB0 port 0
1422 15:43:43.223028 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1423 15:43:43.229276 USB0 port 0 child on link 0 USB2 port 0
1424 15:43:43.229700 USB2 port 0
1425 15:43:43.232908 USB2 port 1
1426 15:43:43.233326 USB2 port 2
1427 15:43:43.236618 USB2 port 3
1428 15:43:43.237136 USB2 port 4
1429 15:43:43.239566 USB2 port 5
1430 15:43:43.239989 USB2 port 6
1431 15:43:43.242885 USB2 port 7
1432 15:43:43.243302 USB2 port 8
1433 15:43:43.245881 USB2 port 9
1434 15:43:43.249842 USB3 port 0
1435 15:43:43.250273 USB3 port 1
1436 15:43:43.252960 USB3 port 2
1437 15:43:43.253385 USB3 port 3
1438 15:43:43.255980 PCI: 00:14.2
1439 15:43:43.265886 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1440 15:43:43.275849 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1441 15:43:43.279028 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1442 15:43:43.288950 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1443 15:43:43.292704 GENERIC: 0.0
1444 15:43:43.295921 PCI: 00:15.0 child on link 0 I2C: 00:1a
1445 15:43:43.305847 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1446 15:43:43.308819 I2C: 00:1a
1447 15:43:43.309329 I2C: 00:31
1448 15:43:43.311990 I2C: 00:32
1449 15:43:43.315330 PCI: 00:15.1 child on link 0 I2C: 00:10
1450 15:43:43.325443 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1451 15:43:43.329118 I2C: 00:10
1452 15:43:43.329563 PCI: 00:15.2
1453 15:43:43.338431 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1454 15:43:43.341621 PCI: 00:15.3
1455 15:43:43.351383 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1456 15:43:43.351470 PCI: 00:16.0
1457 15:43:43.364644 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1458 15:43:43.364731 PCI: 00:19.0
1459 15:43:43.368404 PCI: 00:19.1 child on link 0 I2C: 00:15
1460 15:43:43.378248 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1461 15:43:43.381493 I2C: 00:15
1462 15:43:43.384865 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1463 15:43:43.394494 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1464 15:43:43.408044 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1465 15:43:43.417670 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1466 15:43:43.417816 GENERIC: 0.0
1467 15:43:43.421478 PCI: 01:00.0
1468 15:43:43.431325 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1469 15:43:43.441503 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1470 15:43:43.450822 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1471 15:43:43.454484 PCI: 00:1e.0
1472 15:43:43.464206 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1473 15:43:43.467974 PCI: 00:1e.2 child on link 0 SPI: 00
1474 15:43:43.477876 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1475 15:43:43.480790 SPI: 00
1476 15:43:43.484223 PCI: 00:1e.3 child on link 0 SPI: 00
1477 15:43:43.494273 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1478 15:43:43.497704 SPI: 00
1479 15:43:43.501000 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1480 15:43:43.510784 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1481 15:43:43.510869 PNP: 0c09.0
1482 15:43:43.520300 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1483 15:43:43.524145 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1484 15:43:43.533785 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1485 15:43:43.543418 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1486 15:43:43.547030 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1487 15:43:43.550067 GENERIC: 0.0
1488 15:43:43.550149 GENERIC: 1.0
1489 15:43:43.553676 PCI: 00:1f.3
1490 15:43:43.563129 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1491 15:43:43.573161 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1492 15:43:43.573255 PCI: 00:1f.5
1493 15:43:43.586540 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1494 15:43:43.590242 CPU_CLUSTER: 0 child on link 0 APIC: 00
1495 15:43:43.590331 APIC: 00
1496 15:43:43.593226 APIC: 01
1497 15:43:43.593310 APIC: 05
1498 15:43:43.593411 APIC: 06
1499 15:43:43.596776 APIC: 03
1500 15:43:43.596860 APIC: 02
1501 15:43:43.599892 APIC: 04
1502 15:43:43.599972 APIC: 07
1503 15:43:43.603251 Done allocating resources.
1504 15:43:43.609630 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1505 15:43:43.612967 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1506 15:43:43.619913 Configure GPIOs for I2S audio on UP4.
1507 15:43:43.626247 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1508 15:43:43.626333 Enabling resources...
1509 15:43:43.632774 PCI: 00:00.0 subsystem <- 8086/9a12
1510 15:43:43.632849 PCI: 00:00.0 cmd <- 06
1511 15:43:43.639312 PCI: 00:02.0 subsystem <- 8086/9a40
1512 15:43:43.639388 PCI: 00:02.0 cmd <- 03
1513 15:43:43.642552 PCI: 00:04.0 subsystem <- 8086/9a03
1514 15:43:43.646285 PCI: 00:04.0 cmd <- 02
1515 15:43:43.649437 PCI: 00:05.0 subsystem <- 8086/9a19
1516 15:43:43.652663 PCI: 00:05.0 cmd <- 02
1517 15:43:43.655663 PCI: 00:08.0 subsystem <- 8086/9a11
1518 15:43:43.659483 PCI: 00:08.0 cmd <- 06
1519 15:43:43.662848 PCI: 00:0d.0 subsystem <- 8086/9a13
1520 15:43:43.666138 PCI: 00:0d.0 cmd <- 02
1521 15:43:43.669052 PCI: 00:14.0 subsystem <- 8086/a0ed
1522 15:43:43.672595 PCI: 00:14.0 cmd <- 02
1523 15:43:43.675716 PCI: 00:14.2 subsystem <- 8086/a0ef
1524 15:43:43.678691 PCI: 00:14.2 cmd <- 02
1525 15:43:43.682314 PCI: 00:14.3 subsystem <- 8086/a0f0
1526 15:43:43.682386 PCI: 00:14.3 cmd <- 02
1527 15:43:43.688933 PCI: 00:15.0 subsystem <- 8086/a0e8
1528 15:43:43.689008 PCI: 00:15.0 cmd <- 02
1529 15:43:43.692280 PCI: 00:15.1 subsystem <- 8086/a0e9
1530 15:43:43.695484 PCI: 00:15.1 cmd <- 02
1531 15:43:43.698636 PCI: 00:15.2 subsystem <- 8086/a0ea
1532 15:43:43.701910 PCI: 00:15.2 cmd <- 02
1533 15:43:43.705449 PCI: 00:15.3 subsystem <- 8086/a0eb
1534 15:43:43.708630 PCI: 00:15.3 cmd <- 02
1535 15:43:43.711979 PCI: 00:16.0 subsystem <- 8086/a0e0
1536 15:43:43.715641 PCI: 00:16.0 cmd <- 02
1537 15:43:43.718408 PCI: 00:19.1 subsystem <- 8086/a0c6
1538 15:43:43.722016 PCI: 00:19.1 cmd <- 02
1539 15:43:43.725480 PCI: 00:1d.0 bridge ctrl <- 0013
1540 15:43:43.728556 PCI: 00:1d.0 subsystem <- 8086/a0b0
1541 15:43:43.731754 PCI: 00:1d.0 cmd <- 06
1542 15:43:43.735116 PCI: 00:1e.0 subsystem <- 8086/a0a8
1543 15:43:43.735203 PCI: 00:1e.0 cmd <- 06
1544 15:43:43.742120 PCI: 00:1e.2 subsystem <- 8086/a0aa
1545 15:43:43.742201 PCI: 00:1e.2 cmd <- 06
1546 15:43:43.745412 PCI: 00:1e.3 subsystem <- 8086/a0ab
1547 15:43:43.748440 PCI: 00:1e.3 cmd <- 02
1548 15:43:43.752206 PCI: 00:1f.0 subsystem <- 8086/a087
1549 15:43:43.755378 PCI: 00:1f.0 cmd <- 407
1550 15:43:43.758735 PCI: 00:1f.3 subsystem <- 8086/a0c8
1551 15:43:43.761954 PCI: 00:1f.3 cmd <- 02
1552 15:43:43.765225 PCI: 00:1f.5 subsystem <- 8086/a0a4
1553 15:43:43.768438 PCI: 00:1f.5 cmd <- 406
1554 15:43:43.772383 PCI: 01:00.0 cmd <- 02
1555 15:43:43.776904 done.
1556 15:43:43.780087 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1557 15:43:43.783172 Initializing devices...
1558 15:43:43.786372 Root Device init
1559 15:43:43.790074 Chrome EC: Set SMI mask to 0x0000000000000000
1560 15:43:43.796784 Chrome EC: clear events_b mask to 0x0000000000000000
1561 15:43:43.803239 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1562 15:43:43.806725 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1563 15:43:43.813393 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1564 15:43:43.819801 Chrome EC: Set WAKE mask to 0x0000000000000000
1565 15:43:43.822984 fw_config match found: DB_USB=USB3_ACTIVE
1566 15:43:43.829870 Configure Right Type-C port orientation for retimer
1567 15:43:43.832997 Root Device init finished in 43 msecs
1568 15:43:43.836181 PCI: 00:00.0 init
1569 15:43:43.839522 CPU TDP = 9 Watts
1570 15:43:43.839593 CPU PL1 = 9 Watts
1571 15:43:43.842696 CPU PL2 = 40 Watts
1572 15:43:43.842765 CPU PL4 = 83 Watts
1573 15:43:43.849222 PCI: 00:00.0 init finished in 8 msecs
1574 15:43:43.849308 PCI: 00:02.0 init
1575 15:43:43.852787 GMA: Found VBT in CBFS
1576 15:43:43.856092 GMA: Found valid VBT in CBFS
1577 15:43:43.862522 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1578 15:43:43.869424 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1579 15:43:43.872596 PCI: 00:02.0 init finished in 18 msecs
1580 15:43:43.875817 PCI: 00:05.0 init
1581 15:43:43.879241 PCI: 00:05.0 init finished in 0 msecs
1582 15:43:43.882321 PCI: 00:08.0 init
1583 15:43:43.885524 PCI: 00:08.0 init finished in 0 msecs
1584 15:43:43.889279 PCI: 00:14.0 init
1585 15:43:43.892456 PCI: 00:14.0 init finished in 0 msecs
1586 15:43:43.895767 PCI: 00:14.2 init
1587 15:43:43.898819 PCI: 00:14.2 init finished in 0 msecs
1588 15:43:43.898892 PCI: 00:15.0 init
1589 15:43:43.902161 I2C bus 0 version 0x3230302a
1590 15:43:43.905834 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1591 15:43:43.912446 PCI: 00:15.0 init finished in 6 msecs
1592 15:43:43.912527 PCI: 00:15.1 init
1593 15:43:43.915642 I2C bus 1 version 0x3230302a
1594 15:43:43.918835 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1595 15:43:43.921789 PCI: 00:15.1 init finished in 6 msecs
1596 15:43:43.925680 PCI: 00:15.2 init
1597 15:43:43.928857 I2C bus 2 version 0x3230302a
1598 15:43:43.932191 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1599 15:43:43.935396 PCI: 00:15.2 init finished in 6 msecs
1600 15:43:43.938532 PCI: 00:15.3 init
1601 15:43:43.941791 I2C bus 3 version 0x3230302a
1602 15:43:43.945100 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1603 15:43:43.948880 PCI: 00:15.3 init finished in 6 msecs
1604 15:43:43.952230 PCI: 00:16.0 init
1605 15:43:43.955219 PCI: 00:16.0 init finished in 0 msecs
1606 15:43:43.958467 PCI: 00:19.1 init
1607 15:43:43.958538 I2C bus 5 version 0x3230302a
1608 15:43:43.965364 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1609 15:43:43.968620 PCI: 00:19.1 init finished in 6 msecs
1610 15:43:43.968696 PCI: 00:1d.0 init
1611 15:43:43.971735 Initializing PCH PCIe bridge.
1612 15:43:43.974861 PCI: 00:1d.0 init finished in 3 msecs
1613 15:43:43.979464 PCI: 00:1f.0 init
1614 15:43:43.982610 IOAPIC: Initializing IOAPIC at 0xfec00000
1615 15:43:43.989529 IOAPIC: Bootstrap Processor Local APIC = 0x00
1616 15:43:43.989604 IOAPIC: ID = 0x02
1617 15:43:43.992476 IOAPIC: Dumping registers
1618 15:43:43.996293 reg 0x0000: 0x02000000
1619 15:43:43.999449 reg 0x0001: 0x00770020
1620 15:43:43.999521 reg 0x0002: 0x00000000
1621 15:43:44.006021 PCI: 00:1f.0 init finished in 21 msecs
1622 15:43:44.006094 PCI: 00:1f.2 init
1623 15:43:44.009215 Disabling ACPI via APMC.
1624 15:43:44.013010 APMC done.
1625 15:43:44.016603 PCI: 00:1f.2 init finished in 5 msecs
1626 15:43:44.028422 PCI: 01:00.0 init
1627 15:43:44.032062 PCI: 01:00.0 init finished in 0 msecs
1628 15:43:44.035427 PNP: 0c09.0 init
1629 15:43:44.038432 Google Chrome EC uptime: 8.437 seconds
1630 15:43:44.045034 Google Chrome AP resets since EC boot: 1
1631 15:43:44.048274 Google Chrome most recent AP reset causes:
1632 15:43:44.051563 0.346: 32775 shutdown: entering G3
1633 15:43:44.058439 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1634 15:43:44.061593 PNP: 0c09.0 init finished in 22 msecs
1635 15:43:44.067551 Devices initialized
1636 15:43:44.070549 Show all devs... After init.
1637 15:43:44.074157 Root Device: enabled 1
1638 15:43:44.074297 DOMAIN: 0000: enabled 1
1639 15:43:44.077181 CPU_CLUSTER: 0: enabled 1
1640 15:43:44.080461 PCI: 00:00.0: enabled 1
1641 15:43:44.084320 PCI: 00:02.0: enabled 1
1642 15:43:44.084391 PCI: 00:04.0: enabled 1
1643 15:43:44.087409 PCI: 00:05.0: enabled 1
1644 15:43:44.090817 PCI: 00:06.0: enabled 0
1645 15:43:44.093992 PCI: 00:07.0: enabled 0
1646 15:43:44.094068 PCI: 00:07.1: enabled 0
1647 15:43:44.097515 PCI: 00:07.2: enabled 0
1648 15:43:44.100461 PCI: 00:07.3: enabled 0
1649 15:43:44.104135 PCI: 00:08.0: enabled 1
1650 15:43:44.104218 PCI: 00:09.0: enabled 0
1651 15:43:44.107410 PCI: 00:0a.0: enabled 0
1652 15:43:44.110613 PCI: 00:0d.0: enabled 1
1653 15:43:44.113970 PCI: 00:0d.1: enabled 0
1654 15:43:44.114056 PCI: 00:0d.2: enabled 0
1655 15:43:44.117084 PCI: 00:0d.3: enabled 0
1656 15:43:44.120779 PCI: 00:0e.0: enabled 0
1657 15:43:44.120859 PCI: 00:10.2: enabled 1
1658 15:43:44.123863 PCI: 00:10.6: enabled 0
1659 15:43:44.126881 PCI: 00:10.7: enabled 0
1660 15:43:44.130128 PCI: 00:12.0: enabled 0
1661 15:43:44.130202 PCI: 00:12.6: enabled 0
1662 15:43:44.133809 PCI: 00:13.0: enabled 0
1663 15:43:44.136877 PCI: 00:14.0: enabled 1
1664 15:43:44.140442 PCI: 00:14.1: enabled 0
1665 15:43:44.140523 PCI: 00:14.2: enabled 1
1666 15:43:44.143495 PCI: 00:14.3: enabled 1
1667 15:43:44.147047 PCI: 00:15.0: enabled 1
1668 15:43:44.150184 PCI: 00:15.1: enabled 1
1669 15:43:44.150265 PCI: 00:15.2: enabled 1
1670 15:43:44.153433 PCI: 00:15.3: enabled 1
1671 15:43:44.157271 PCI: 00:16.0: enabled 1
1672 15:43:44.157352 PCI: 00:16.1: enabled 0
1673 15:43:44.160623 PCI: 00:16.2: enabled 0
1674 15:43:44.163618 PCI: 00:16.3: enabled 0
1675 15:43:44.166794 PCI: 00:16.4: enabled 0
1676 15:43:44.166882 PCI: 00:16.5: enabled 0
1677 15:43:44.170452 PCI: 00:17.0: enabled 0
1678 15:43:44.173808 PCI: 00:19.0: enabled 0
1679 15:43:44.176939 PCI: 00:19.1: enabled 1
1680 15:43:44.177037 PCI: 00:19.2: enabled 0
1681 15:43:44.180230 PCI: 00:1c.0: enabled 1
1682 15:43:44.183412 PCI: 00:1c.1: enabled 0
1683 15:43:44.186611 PCI: 00:1c.2: enabled 0
1684 15:43:44.186692 PCI: 00:1c.3: enabled 0
1685 15:43:44.190492 PCI: 00:1c.4: enabled 0
1686 15:43:44.193112 PCI: 00:1c.5: enabled 0
1687 15:43:44.196813 PCI: 00:1c.6: enabled 1
1688 15:43:44.196895 PCI: 00:1c.7: enabled 0
1689 15:43:44.199962 PCI: 00:1d.0: enabled 1
1690 15:43:44.203109 PCI: 00:1d.1: enabled 0
1691 15:43:44.206872 PCI: 00:1d.2: enabled 1
1692 15:43:44.206956 PCI: 00:1d.3: enabled 0
1693 15:43:44.209937 PCI: 00:1e.0: enabled 1
1694 15:43:44.213588 PCI: 00:1e.1: enabled 0
1695 15:43:44.213695 PCI: 00:1e.2: enabled 1
1696 15:43:44.216648 PCI: 00:1e.3: enabled 1
1697 15:43:44.219774 PCI: 00:1f.0: enabled 1
1698 15:43:44.223068 PCI: 00:1f.1: enabled 0
1699 15:43:44.223148 PCI: 00:1f.2: enabled 1
1700 15:43:44.226124 PCI: 00:1f.3: enabled 1
1701 15:43:44.229850 PCI: 00:1f.4: enabled 0
1702 15:43:44.233055 PCI: 00:1f.5: enabled 1
1703 15:43:44.233162 PCI: 00:1f.6: enabled 0
1704 15:43:44.236083 PCI: 00:1f.7: enabled 0
1705 15:43:44.239892 APIC: 00: enabled 1
1706 15:43:44.243085 GENERIC: 0.0: enabled 1
1707 15:43:44.243178 GENERIC: 0.0: enabled 1
1708 15:43:44.245920 GENERIC: 1.0: enabled 1
1709 15:43:44.249618 GENERIC: 0.0: enabled 1
1710 15:43:44.249725 GENERIC: 1.0: enabled 1
1711 15:43:44.252440 USB0 port 0: enabled 1
1712 15:43:44.256419 GENERIC: 0.0: enabled 1
1713 15:43:44.259566 USB0 port 0: enabled 1
1714 15:43:44.259647 GENERIC: 0.0: enabled 1
1715 15:43:44.262622 I2C: 00:1a: enabled 1
1716 15:43:44.265720 I2C: 00:31: enabled 1
1717 15:43:44.265854 I2C: 00:32: enabled 1
1718 15:43:44.269581 I2C: 00:10: enabled 1
1719 15:43:44.272700 I2C: 00:15: enabled 1
1720 15:43:44.272774 GENERIC: 0.0: enabled 0
1721 15:43:44.275833 GENERIC: 1.0: enabled 0
1722 15:43:44.279228 GENERIC: 0.0: enabled 1
1723 15:43:44.282373 SPI: 00: enabled 1
1724 15:43:44.282456 SPI: 00: enabled 1
1725 15:43:44.286165 PNP: 0c09.0: enabled 1
1726 15:43:44.289259 GENERIC: 0.0: enabled 1
1727 15:43:44.289330 USB3 port 0: enabled 1
1728 15:43:44.292564 USB3 port 1: enabled 1
1729 15:43:44.295800 USB3 port 2: enabled 0
1730 15:43:44.295873 USB3 port 3: enabled 0
1731 15:43:44.298954 USB2 port 0: enabled 0
1732 15:43:44.302818 USB2 port 1: enabled 1
1733 15:43:44.306034 USB2 port 2: enabled 1
1734 15:43:44.306113 USB2 port 3: enabled 0
1735 15:43:44.309126 USB2 port 4: enabled 1
1736 15:43:44.312463 USB2 port 5: enabled 0
1737 15:43:44.312536 USB2 port 6: enabled 0
1738 15:43:44.315674 USB2 port 7: enabled 0
1739 15:43:44.318772 USB2 port 8: enabled 0
1740 15:43:44.318842 USB2 port 9: enabled 0
1741 15:43:44.322477 USB3 port 0: enabled 0
1742 15:43:44.325442 USB3 port 1: enabled 1
1743 15:43:44.328576 USB3 port 2: enabled 0
1744 15:43:44.328654 USB3 port 3: enabled 0
1745 15:43:44.332459 GENERIC: 0.0: enabled 1
1746 15:43:44.335621 GENERIC: 1.0: enabled 1
1747 15:43:44.335705 APIC: 01: enabled 1
1748 15:43:44.338601 APIC: 05: enabled 1
1749 15:43:44.342211 APIC: 06: enabled 1
1750 15:43:44.342295 APIC: 03: enabled 1
1751 15:43:44.345375 APIC: 02: enabled 1
1752 15:43:44.348616 APIC: 04: enabled 1
1753 15:43:44.348693 APIC: 07: enabled 1
1754 15:43:44.351905 PCI: 01:00.0: enabled 1
1755 15:43:44.358529 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1756 15:43:44.362102 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1757 15:43:44.365242 ELOG: NV offset 0xf30000 size 0x1000
1758 15:43:44.372758 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1759 15:43:44.379253 ELOG: Event(17) added with size 13 at 2023-08-07 15:43:44 UTC
1760 15:43:44.385662 ELOG: Event(92) added with size 9 at 2023-08-07 15:43:44 UTC
1761 15:43:44.391968 ELOG: Event(93) added with size 9 at 2023-08-07 15:43:44 UTC
1762 15:43:44.399107 ELOG: Event(9E) added with size 10 at 2023-08-07 15:43:44 UTC
1763 15:43:44.405456 ELOG: Event(9F) added with size 14 at 2023-08-07 15:43:44 UTC
1764 15:43:44.411904 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1765 15:43:44.418858 ELOG: Event(A1) added with size 10 at 2023-08-07 15:43:44 UTC
1766 15:43:44.425239 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1767 15:43:44.431807 ELOG: Event(A0) added with size 9 at 2023-08-07 15:43:44 UTC
1768 15:43:44.434961 elog_add_boot_reason: Logged dev mode boot
1769 15:43:44.441853 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1770 15:43:44.444760 Finalize devices...
1771 15:43:44.444844 Devices finalized
1772 15:43:44.451398 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1773 15:43:44.455106 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1774 15:43:44.461607 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1775 15:43:44.464477 ME: HFSTS1 : 0x80030055
1776 15:43:44.471465 ME: HFSTS2 : 0x30280116
1777 15:43:44.474617 ME: HFSTS3 : 0x00000050
1778 15:43:44.481516 ME: HFSTS4 : 0x00004000
1779 15:43:44.484700 ME: HFSTS5 : 0x00000000
1780 15:43:44.487971 ME: HFSTS6 : 0x00400006
1781 15:43:44.491154 ME: Manufacturing Mode : YES
1782 15:43:44.498205 ME: SPI Protection Mode Enabled : NO
1783 15:43:44.501482 ME: FW Partition Table : OK
1784 15:43:44.504568 ME: Bringup Loader Failure : NO
1785 15:43:44.507916 ME: Firmware Init Complete : NO
1786 15:43:44.511121 ME: Boot Options Present : NO
1787 15:43:44.514704 ME: Update In Progress : NO
1788 15:43:44.517737 ME: D0i3 Support : YES
1789 15:43:44.520870 ME: Low Power State Enabled : NO
1790 15:43:44.527744 ME: CPU Replaced : YES
1791 15:43:44.530983 ME: CPU Replacement Valid : YES
1792 15:43:44.534247 ME: Current Working State : 5
1793 15:43:44.537509 ME: Current Operation State : 1
1794 15:43:44.541321 ME: Current Operation Mode : 3
1795 15:43:44.544546 ME: Error Code : 0
1796 15:43:44.547640 ME: Enhanced Debug Mode : NO
1797 15:43:44.551363 ME: CPU Debug Disabled : YES
1798 15:43:44.554489 ME: TXT Support : NO
1799 15:43:44.561093 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1800 15:43:44.570660 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1801 15:43:44.573719 CBFS: 'fallback/slic' not found.
1802 15:43:44.577361 ACPI: Writing ACPI tables at 76b01000.
1803 15:43:44.577443 ACPI: * FACS
1804 15:43:44.580483 ACPI: * DSDT
1805 15:43:44.583717 Ramoops buffer: 0x100000@0x76a00000.
1806 15:43:44.587564 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1807 15:43:44.593788 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1808 15:43:44.597346 Google Chrome EC: version:
1809 15:43:44.600548 ro: voema_v2.0.7540-147f8d37d1
1810 15:43:44.603735 rw: voema_v2.0.7540-147f8d37d1
1811 15:43:44.603839 running image: 2
1812 15:43:44.610307 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1813 15:43:44.615436 ACPI: * FADT
1814 15:43:44.615548 SCI is IRQ9
1815 15:43:44.622019 ACPI: added table 1/32, length now 40
1816 15:43:44.622123 ACPI: * SSDT
1817 15:43:44.625261 Found 1 CPU(s) with 8 core(s) each.
1818 15:43:44.631762 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1819 15:43:44.634845 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1820 15:43:44.638154 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1821 15:43:44.642094 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1822 15:43:44.648575 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1823 15:43:44.654894 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1824 15:43:44.658047 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1825 15:43:44.665227 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1826 15:43:44.671816 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1827 15:43:44.674853 \_SB.PCI0.RP09: Added StorageD3Enable property
1828 15:43:44.681687 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1829 15:43:44.685067 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1830 15:43:44.691554 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1831 15:43:44.694776 PS2K: Passing 80 keymaps to kernel
1832 15:43:44.701411 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1833 15:43:44.707885 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1834 15:43:44.714999 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1835 15:43:44.721519 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1836 15:43:44.727891 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1837 15:43:44.734870 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1838 15:43:44.741317 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1839 15:43:44.747813 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1840 15:43:44.751178 ACPI: added table 2/32, length now 44
1841 15:43:44.751296 ACPI: * MCFG
1842 15:43:44.754171 ACPI: added table 3/32, length now 48
1843 15:43:44.757520 ACPI: * TPM2
1844 15:43:44.760777 TPM2 log created at 0x769f0000
1845 15:43:44.763928 ACPI: added table 4/32, length now 52
1846 15:43:44.767223 ACPI: * MADT
1847 15:43:44.767332 SCI is IRQ9
1848 15:43:44.771104 ACPI: added table 5/32, length now 56
1849 15:43:44.774467 current = 76b09850
1850 15:43:44.774574 ACPI: * DMAR
1851 15:43:44.777621 ACPI: added table 6/32, length now 60
1852 15:43:44.781105 ACPI: added table 7/32, length now 64
1853 15:43:44.783933 ACPI: * HPET
1854 15:43:44.787487 ACPI: added table 8/32, length now 68
1855 15:43:44.787601 ACPI: done.
1856 15:43:44.790425 ACPI tables: 35216 bytes.
1857 15:43:44.794263 smbios_write_tables: 769ef000
1858 15:43:44.797533 EC returned error result code 3
1859 15:43:44.800726 Couldn't obtain OEM name from CBI
1860 15:43:44.803672 Create SMBIOS type 16
1861 15:43:44.807302 Create SMBIOS type 17
1862 15:43:44.810321 GENERIC: 0.0 (WIFI Device)
1863 15:43:44.810431 SMBIOS tables: 1750 bytes.
1864 15:43:44.816860 Writing table forward entry at 0x00000500
1865 15:43:44.823503 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1866 15:43:44.827008 Writing coreboot table at 0x76b25000
1867 15:43:44.833397 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1868 15:43:44.837121 1. 0000000000001000-000000000009ffff: RAM
1869 15:43:44.840377 2. 00000000000a0000-00000000000fffff: RESERVED
1870 15:43:44.847125 3. 0000000000100000-00000000769eefff: RAM
1871 15:43:44.850325 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1872 15:43:44.856581 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1873 15:43:44.863464 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1874 15:43:44.866858 7. 0000000077000000-000000007fbfffff: RESERVED
1875 15:43:44.873052 8. 00000000c0000000-00000000cfffffff: RESERVED
1876 15:43:44.876375 9. 00000000f8000000-00000000f9ffffff: RESERVED
1877 15:43:44.879506 10. 00000000fb000000-00000000fb000fff: RESERVED
1878 15:43:44.886578 11. 00000000fe000000-00000000fe00ffff: RESERVED
1879 15:43:44.889730 12. 00000000fed80000-00000000fed87fff: RESERVED
1880 15:43:44.896292 13. 00000000fed90000-00000000fed92fff: RESERVED
1881 15:43:44.899707 14. 00000000feda0000-00000000feda1fff: RESERVED
1882 15:43:44.906066 15. 00000000fedc0000-00000000feddffff: RESERVED
1883 15:43:44.909714 16. 0000000100000000-00000002803fffff: RAM
1884 15:43:44.912973 Passing 4 GPIOs to payload:
1885 15:43:44.915999 NAME | PORT | POLARITY | VALUE
1886 15:43:44.923236 lid | undefined | high | high
1887 15:43:44.929663 power | undefined | high | low
1888 15:43:44.932854 oprom | undefined | high | low
1889 15:43:44.939226 EC in RW | 0x000000e5 | high | high
1890 15:43:44.945783 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum d45
1891 15:43:44.949136 coreboot table: 1576 bytes.
1892 15:43:44.952778 IMD ROOT 0. 0x76fff000 0x00001000
1893 15:43:44.956194 IMD SMALL 1. 0x76ffe000 0x00001000
1894 15:43:44.959332 FSP MEMORY 2. 0x76c4e000 0x003b0000
1895 15:43:44.962368 VPD 3. 0x76c4d000 0x00000367
1896 15:43:44.965634 RO MCACHE 4. 0x76c4c000 0x00000fdc
1897 15:43:44.968837 CONSOLE 5. 0x76c2c000 0x00020000
1898 15:43:44.972686 FMAP 6. 0x76c2b000 0x00000578
1899 15:43:44.979044 TIME STAMP 7. 0x76c2a000 0x00000910
1900 15:43:44.982336 VBOOT WORK 8. 0x76c16000 0x00014000
1901 15:43:44.985623 ROMSTG STCK 9. 0x76c15000 0x00001000
1902 15:43:44.988800 AFTER CAR 10. 0x76c0a000 0x0000b000
1903 15:43:44.992251 RAMSTAGE 11. 0x76b97000 0x00073000
1904 15:43:44.995246 REFCODE 12. 0x76b42000 0x00055000
1905 15:43:44.998974 SMM BACKUP 13. 0x76b32000 0x00010000
1906 15:43:45.005526 4f444749 14. 0x76b30000 0x00002000
1907 15:43:45.008489 EXT VBT15. 0x76b2d000 0x0000219f
1908 15:43:45.011698 COREBOOT 16. 0x76b25000 0x00008000
1909 15:43:45.015455 ACPI 17. 0x76b01000 0x00024000
1910 15:43:45.018682 ACPI GNVS 18. 0x76b00000 0x00001000
1911 15:43:45.021680 RAMOOPS 19. 0x76a00000 0x00100000
1912 15:43:45.025398 TPM2 TCGLOG20. 0x769f0000 0x00010000
1913 15:43:45.028320 SMBIOS 21. 0x769ef000 0x00000800
1914 15:43:45.032031 IMD small region:
1915 15:43:45.035203 IMD ROOT 0. 0x76ffec00 0x00000400
1916 15:43:45.038497 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1917 15:43:45.041599 POWER STATE 2. 0x76ffeb80 0x00000044
1918 15:43:45.048151 ROMSTAGE 3. 0x76ffeb60 0x00000004
1919 15:43:45.051429 MEM INFO 4. 0x76ffe980 0x000001e0
1920 15:43:45.058342 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1921 15:43:45.058428 MTRR: Physical address space:
1922 15:43:45.064789 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1923 15:43:45.071144 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1924 15:43:45.078068 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1925 15:43:45.085035 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1926 15:43:45.091378 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1927 15:43:45.097726 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1928 15:43:45.104686 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1929 15:43:45.107941 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 15:43:45.111211 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 15:43:45.115274 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 15:43:45.121141 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 15:43:45.124406 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 15:43:45.127755 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 15:43:45.130881 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 15:43:45.137651 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 15:43:45.141226 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 15:43:45.144282 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 15:43:45.147530 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 15:43:45.151405 call enable_fixed_mtrr()
1941 15:43:45.155194 CPU physical address size: 39 bits
1942 15:43:45.161608 MTRR: default type WB/UC MTRR counts: 6/6.
1943 15:43:45.164845 MTRR: UC selected as default type.
1944 15:43:45.171302 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1945 15:43:45.175149 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1946 15:43:45.181162 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1947 15:43:45.188142 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1948 15:43:45.194559 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1949 15:43:45.201028 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1950 15:43:45.201133
1951 15:43:45.204879 MTRR check
1952 15:43:45.208114 Fixed MTRRs : Enabled
1953 15:43:45.208220 Variable MTRRs: Enabled
1954 15:43:45.208317
1955 15:43:45.214343 MTRR: Fixed MSR 0x250 0x0606060606060606
1956 15:43:45.217579 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 15:43:45.220747 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 15:43:45.224484 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 15:43:45.231082 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 15:43:45.234132 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 15:43:45.237449 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 15:43:45.240762 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 15:43:45.247691 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 15:43:45.250867 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 15:43:45.254461 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 15:43:45.260751 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1967 15:43:45.263929 call enable_fixed_mtrr()
1968 15:43:45.267358 Checking cr50 for pending updates
1969 15:43:45.271096 CPU physical address size: 39 bits
1970 15:43:45.274799 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 15:43:45.277975 MTRR: Fixed MSR 0x250 0x0606060606060606
1972 15:43:45.284624 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 15:43:45.287661 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 15:43:45.291218 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 15:43:45.294367 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 15:43:45.297838 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 15:43:45.304179 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 15:43:45.307453 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 15:43:45.311253 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 15:43:45.314303 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 15:43:45.320821 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 15:43:45.324113 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 15:43:45.327421 call enable_fixed_mtrr()
1984 15:43:45.331257 MTRR: Fixed MSR 0x259 0x0000000000000000
1985 15:43:45.334161 MTRR: Fixed MSR 0x268 0x0606060606060606
1986 15:43:45.341105 MTRR: Fixed MSR 0x269 0x0606060606060606
1987 15:43:45.344139 MTRR: Fixed MSR 0x26a 0x0606060606060606
1988 15:43:45.347317 MTRR: Fixed MSR 0x26b 0x0606060606060606
1989 15:43:45.351299 MTRR: Fixed MSR 0x26c 0x0606060606060606
1990 15:43:45.357688 MTRR: Fixed MSR 0x26d 0x0606060606060606
1991 15:43:45.360738 MTRR: Fixed MSR 0x26e 0x0606060606060606
1992 15:43:45.363819 MTRR: Fixed MSR 0x26f 0x0606060606060606
1993 15:43:45.367420 CPU physical address size: 39 bits
1994 15:43:45.375310 call enable_fixed_mtrr()
1995 15:43:45.375417 Reading cr50 TPM mode
1996 15:43:45.378504 MTRR: Fixed MSR 0x250 0x0606060606060606
1997 15:43:45.381678 MTRR: Fixed MSR 0x250 0x0606060606060606
1998 15:43:45.388426 MTRR: Fixed MSR 0x258 0x0606060606060606
1999 15:43:45.391592 MTRR: Fixed MSR 0x259 0x0000000000000000
2000 15:43:45.395089 MTRR: Fixed MSR 0x268 0x0606060606060606
2001 15:43:45.398225 MTRR: Fixed MSR 0x269 0x0606060606060606
2002 15:43:45.404857 MTRR: Fixed MSR 0x26a 0x0606060606060606
2003 15:43:45.408119 MTRR: Fixed MSR 0x26b 0x0606060606060606
2004 15:43:45.411688 MTRR: Fixed MSR 0x26c 0x0606060606060606
2005 15:43:45.415057 MTRR: Fixed MSR 0x26d 0x0606060606060606
2006 15:43:45.421451 MTRR: Fixed MSR 0x26e 0x0606060606060606
2007 15:43:45.424659 MTRR: Fixed MSR 0x26f 0x0606060606060606
2008 15:43:45.427794 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 15:43:45.434908 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 15:43:45.438195 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 15:43:45.441205 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 15:43:45.444813 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 15:43:45.451176 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 15:43:45.454364 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 15:43:45.457419 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 15:43:45.461316 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 15:43:45.467664 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 15:43:45.470829 call enable_fixed_mtrr()
2019 15:43:45.470931 call enable_fixed_mtrr()
2020 15:43:45.477485 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 15:43:45.480736 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 15:43:45.483871 MTRR: Fixed MSR 0x258 0x0606060606060606
2023 15:43:45.487074 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 15:43:45.493642 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 15:43:45.497317 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 15:43:45.500424 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 15:43:45.504056 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 15:43:45.510365 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 15:43:45.513544 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 15:43:45.516691 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 15:43:45.520459 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 15:43:45.527338 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 15:43:45.530610 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 15:43:45.534501 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 15:43:45.537827 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 15:43:45.544123 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 15:43:45.547412 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 15:43:45.550533 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 15:43:45.554425 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 15:43:45.560440 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 15:43:45.564046 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 15:43:45.567198 call enable_fixed_mtrr()
2043 15:43:45.570414 call enable_fixed_mtrr()
2044 15:43:45.574278 CPU physical address size: 39 bits
2045 15:43:45.577478 CPU physical address size: 39 bits
2046 15:43:45.580761 CPU physical address size: 39 bits
2047 15:43:45.583751 CPU physical address size: 39 bits
2048 15:43:45.587555 CPU physical address size: 39 bits
2049 15:43:45.594161 BS: BS_PAYLOAD_LOAD entry times (exec / console): 112 / 6 ms
2050 15:43:45.603841 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2051 15:43:45.607719 Checking segment from ROM address 0xffc02b38
2052 15:43:45.610713 Checking segment from ROM address 0xffc02b54
2053 15:43:45.617595 Loading segment from ROM address 0xffc02b38
2054 15:43:45.617702 code (compression=0)
2055 15:43:45.627054 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2056 15:43:45.637305 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2057 15:43:45.637412 it's not compressed!
2058 15:43:45.776978 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2059 15:43:45.783057 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2060 15:43:45.789720 Loading segment from ROM address 0xffc02b54
2061 15:43:45.793374 Entry Point 0x30000000
2062 15:43:45.793478 Loaded segments
2063 15:43:45.799590 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2064 15:43:45.842717 Finalizing chipset.
2065 15:43:45.846196 Finalizing SMM.
2066 15:43:45.846277 APMC done.
2067 15:43:45.852906 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2068 15:43:45.856056 mp_park_aps done after 0 msecs.
2069 15:43:45.859268 Jumping to boot code at 0x30000000(0x76b25000)
2070 15:43:45.869059 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2071 15:43:45.869158
2072 15:43:45.869225
2073 15:43:45.872791
2074 15:43:45.872895 Starting depthcharge on Voema...
2075 15:43:45.873302 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2076 15:43:45.873442 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2077 15:43:45.873560 Setting prompt string to ['volteer:']
2078 15:43:45.873671 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2079 15:43:45.876242
2080 15:43:45.882712 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2081 15:43:45.882820
2082 15:43:45.889075 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2083 15:43:45.889181
2084 15:43:45.895778 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2085 15:43:45.895891
2086 15:43:45.898859 Failed to find eMMC card reader
2087 15:43:45.898988
2088 15:43:45.899099 Wipe memory regions:
2089 15:43:45.902654
2090 15:43:45.905693 [0x00000000001000, 0x000000000a0000)
2091 15:43:45.905828
2092 15:43:45.908722 [0x00000000100000, 0x00000030000000)
2093 15:43:45.934989
2094 15:43:45.938110 [0x00000032662db0, 0x000000769ef000)
2095 15:43:45.973915
2096 15:43:45.976931 [0x00000100000000, 0x00000280400000)
2097 15:43:46.178658
2098 15:43:46.181993 ec_init: CrosEC protocol v3 supported (256, 256)
2099 15:43:46.182086
2100 15:43:46.188183 update_port_state: port C0 state: usb enable 1 mux conn 0
2101 15:43:46.188289
2102 15:43:46.198461 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2103 15:43:46.198540
2104 15:43:46.204939 pmc_check_ipc_sts: STS_BUSY done after 1511 us
2105 15:43:46.205047
2106 15:43:46.208236 send_conn_disc_msg: pmc_send_cmd succeeded
2107 15:43:46.639345
2108 15:43:46.639506 R8152: Initializing
2109 15:43:46.639607
2110 15:43:46.642413 Version 6 (ocp_data = 5c30)
2111 15:43:46.642515
2112 15:43:46.645811 R8152: Done initializing
2113 15:43:46.645920
2114 15:43:46.649094 Adding net device
2115 15:43:46.950628
2116 15:43:46.954161 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2117 15:43:46.954256
2118 15:43:46.954324
2119 15:43:46.954386
2120 15:43:46.957669 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2122 15:43:47.058076 volteer: tftpboot 192.168.201.1 11224154/tftp-deploy-imkkmuxk/kernel/bzImage 11224154/tftp-deploy-imkkmuxk/kernel/cmdline 11224154/tftp-deploy-imkkmuxk/ramdisk/ramdisk.cpio.gz
2123 15:43:47.058286 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2124 15:43:47.058447 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2125 15:43:47.062210 tftpboot 192.168.201.1 11224154/tftp-deploy-imkkmuxk/kernel/bzIploy-imkkmuxk/kernel/cmdline 11224154/tftp-deploy-imkkmuxk/ramdisk/ramdisk.cpio.gz
2126 15:43:47.062373
2127 15:43:47.062520 Waiting for link
2128 15:43:47.265847
2129 15:43:47.266015 done.
2130 15:43:47.266123
2131 15:43:47.266218 MAC: 00:24:32:30:79:06
2132 15:43:47.266310
2133 15:43:47.268880 Sending DHCP discover... done.
2134 15:43:47.268962
2135 15:43:47.272176 Waiting for reply... done.
2136 15:43:47.272281
2137 15:43:47.275414 Sending DHCP request... done.
2138 15:43:47.275523
2139 15:43:47.278610 Waiting for reply... done.
2140 15:43:47.278692
2141 15:43:47.282401 My ip is 192.168.201.23
2142 15:43:47.282476
2143 15:43:47.285474 The DHCP server ip is 192.168.201.1
2144 15:43:47.285550
2145 15:43:47.289057 TFTP server IP predefined by user: 192.168.201.1
2146 15:43:47.289175
2147 15:43:47.295434 Bootfile predefined by user: 11224154/tftp-deploy-imkkmuxk/kernel/bzImage
2148 15:43:47.295550
2149 15:43:47.298755 Sending tftp read request... done.
2150 15:43:47.302244
2151 15:43:47.305653 Waiting for the transfer...
2152 15:43:47.305766
2153 15:43:47.837866 00000000 ################################################################
2154 15:43:47.838005
2155 15:43:48.357878 00080000 ################################################################
2156 15:43:48.358033
2157 15:43:48.873506 00100000 ################################################################
2158 15:43:48.873685
2159 15:43:49.398876 00180000 ################################################################
2160 15:43:49.399045
2161 15:43:49.921474 00200000 ################################################################
2162 15:43:49.921637
2163 15:43:50.443361 00280000 ################################################################
2164 15:43:50.443523
2165 15:43:50.973689 00300000 ################################################################
2166 15:43:50.973874
2167 15:43:51.509769 00380000 ################################################################
2168 15:43:51.509939
2169 15:43:52.057023 00400000 ################################################################
2170 15:43:52.057172
2171 15:43:52.598171 00480000 ################################################################
2172 15:43:52.598469
2173 15:43:53.109715 00500000 ################################################################
2174 15:43:53.109878
2175 15:43:53.620303 00580000 ################################################################
2176 15:43:53.620444
2177 15:43:54.134833 00600000 ################################################################
2178 15:43:54.134975
2179 15:43:54.650833 00680000 ################################################################
2180 15:43:54.650974
2181 15:43:55.167249 00700000 ################################################################
2182 15:43:55.167421
2183 15:43:55.187961 00780000 ### done.
2184 15:43:55.188098
2185 15:43:55.191122 The bootfile was 7884688 bytes long.
2186 15:43:55.191199
2187 15:43:55.194427 Sending tftp read request... done.
2188 15:43:55.194549
2189 15:43:55.197542 Waiting for the transfer...
2190 15:43:55.197643
2191 15:43:55.718098 00000000 ################################################################
2192 15:43:55.718238
2193 15:43:56.245124 00080000 ################################################################
2194 15:43:56.245259
2195 15:43:56.761985 00100000 ################################################################
2196 15:43:56.762152
2197 15:43:57.279440 00180000 ################################################################
2198 15:43:57.279589
2199 15:43:57.799221 00200000 ################################################################
2200 15:43:57.799401
2201 15:43:58.328220 00280000 ################################################################
2202 15:43:58.328394
2203 15:43:58.861093 00300000 ################################################################
2204 15:43:58.861257
2205 15:43:59.379400 00380000 ################################################################
2206 15:43:59.379582
2207 15:43:59.952169 00400000 ################################################################
2208 15:43:59.952318
2209 15:44:00.510212 00480000 ################################################################
2210 15:44:00.510347
2211 15:44:01.086643 00500000 ################################################################
2212 15:44:01.086782
2213 15:44:01.638338 00580000 ################################################################
2214 15:44:01.638610
2215 15:44:02.153440 00600000 ################################################################
2216 15:44:02.153566
2217 15:44:02.683701 00680000 ################################################################
2218 15:44:02.683861
2219 15:44:03.205650 00700000 ################################################################
2220 15:44:03.205883
2221 15:44:03.722762 00780000 ################################################################
2222 15:44:03.722927
2223 15:44:04.329825 00800000 ################################################################
2224 15:44:04.330393
2225 15:44:04.923561 00880000 ################################################################
2226 15:44:04.924120
2227 15:44:05.595079 00900000 ################################################################
2228 15:44:05.595314
2229 15:44:06.210982 00980000 ################################################################
2230 15:44:06.211140
2231 15:44:06.894551 00a00000 ################################################################
2232 15:44:06.894884
2233 15:44:07.578888 00a80000 ################################################################
2234 15:44:07.579404
2235 15:44:08.304010 00b00000 ################################################################
2236 15:44:08.304512
2237 15:44:09.010490 00b80000 ################################################################
2238 15:44:09.011016
2239 15:44:09.735357 00c00000 ################################################################
2240 15:44:09.735856
2241 15:44:10.396339 00c80000 ################################################################
2242 15:44:10.396869
2243 15:44:11.015877 00d00000 ################################################################
2244 15:44:11.016058
2245 15:44:11.711639 00d80000 ################################################################
2246 15:44:11.712178
2247 15:44:12.411290 00e00000 ################################################################
2248 15:44:12.411831
2249 15:44:13.019789 00e80000 ################################################################
2250 15:44:13.019977
2251 15:44:13.639745 00f00000 ################################################################
2252 15:44:13.639892
2253 15:44:14.194184 00f80000 ################################################################
2254 15:44:14.194337
2255 15:44:14.748546 01000000 ################################################################
2256 15:44:14.748723
2257 15:44:15.296081 01080000 ################################################################
2258 15:44:15.296213
2259 15:44:15.924958 01100000 ################################################################
2260 15:44:15.925642
2261 15:44:16.593342 01180000 ################################################################
2262 15:44:16.593539
2263 15:44:17.226615 01200000 ################################################################
2264 15:44:17.226802
2265 15:44:17.917517 01280000 ################################################################
2266 15:44:17.918074
2267 15:44:18.629854 01300000 ################################################################
2268 15:44:18.630410
2269 15:44:19.336949 01380000 ################################################################
2270 15:44:19.337622
2271 15:44:20.049123 01400000 ################################################################
2272 15:44:20.049821
2273 15:44:20.695523 01480000 ################################################################
2274 15:44:20.695674
2275 15:44:21.235466 01500000 ################################################################
2276 15:44:21.235624
2277 15:44:21.842944 01580000 ################################################################
2278 15:44:21.843092
2279 15:44:22.461678 01600000 ################################################################
2280 15:44:22.461885
2281 15:44:23.151141 01680000 ################################################################
2282 15:44:23.151710
2283 15:44:23.833455 01700000 ################################################################
2284 15:44:23.834010
2285 15:44:24.527453 01780000 ################################################################
2286 15:44:24.528094
2287 15:44:25.165039 01800000 ################################################################
2288 15:44:25.165186
2289 15:44:25.780948 01880000 ################################################################
2290 15:44:25.781099
2291 15:44:26.420128 01900000 ################################################################
2292 15:44:26.420645
2293 15:44:27.122196 01980000 ################################################################
2294 15:44:27.122347
2295 15:44:27.687084 01a00000 ################################################################
2296 15:44:27.687235
2297 15:44:28.263379 01a80000 ################################################################
2298 15:44:28.263534
2299 15:44:28.832530 01b00000 ################################################################
2300 15:44:28.832697
2301 15:44:29.408006 01b80000 ################################################################
2302 15:44:29.408203
2303 15:44:30.038546 01c00000 ################################################################
2304 15:44:30.038696
2305 15:44:30.684156 01c80000 ################################################################
2306 15:44:30.684690
2307 15:44:31.403440 01d00000 ################################################################
2308 15:44:31.403992
2309 15:44:32.136858 01d80000 ################################################################
2310 15:44:32.137579
2311 15:44:32.787187 01e00000 ################################################################
2312 15:44:32.787338
2313 15:44:33.499963 01e80000 ################################################################
2314 15:44:33.500476
2315 15:44:34.186146 01f00000 ################################################################
2316 15:44:34.186835
2317 15:44:34.879807 01f80000 ################################################################
2318 15:44:34.880218
2319 15:44:35.598333 02000000 ################################################################
2320 15:44:35.598846
2321 15:44:36.311778 02080000 ################################################################
2322 15:44:36.312316
2323 15:44:37.024828 02100000 ################################################################
2324 15:44:37.025389
2325 15:44:37.697002 02180000 ################################################################
2326 15:44:37.697516
2327 15:44:38.272368 02200000 #################################################### done.
2328 15:44:38.272906
2329 15:44:38.275686 Sending tftp read request... done.
2330 15:44:38.276126
2331 15:44:38.279356 Waiting for the transfer...
2332 15:44:38.279799
2333 15:44:38.280246 00000000 # done.
2334 15:44:38.280681
2335 15:44:38.289177 Command line loaded dynamically from TFTP file: 11224154/tftp-deploy-imkkmuxk/kernel/cmdline
2336 15:44:38.289672
2337 15:44:38.305397 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2338 15:44:38.312308
2339 15:44:38.315271 Shutting down all USB controllers.
2340 15:44:38.315712
2341 15:44:38.316164 Removing current net device
2342 15:44:38.316590
2343 15:44:38.318928 Finalizing coreboot
2344 15:44:38.319479
2345 15:44:38.325188 Exiting depthcharge with code 4 at timestamp: 61193205
2346 15:44:38.325625
2347 15:44:38.326101
2348 15:44:38.326531 Starting kernel ...
2349 15:44:38.326946
2350 15:44:38.327352
2351 15:44:38.329886 end: 2.2.4 bootloader-commands (duration 00:00:52) [common]
2352 15:44:38.330447 start: 2.2.5 auto-login-action (timeout 00:03:52) [common]
2353 15:44:38.330882 Setting prompt string to ['Linux version [0-9]']
2354 15:44:38.331335 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2355 15:44:38.331769 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2357 15:48:30.330689 end: 2.2.5 auto-login-action (duration 00:03:52) [common]
2359 15:48:30.330996 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 232 seconds'
2361 15:48:30.331243 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2364 15:48:30.331654 end: 2 depthcharge-action (duration 00:05:00) [common]
2366 15:48:30.331903 Cleaning after the job
2367 15:48:30.331996 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224154/tftp-deploy-imkkmuxk/ramdisk
2368 15:48:30.336800 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224154/tftp-deploy-imkkmuxk/kernel
2369 15:48:30.338101 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224154/tftp-deploy-imkkmuxk/modules
2370 15:48:30.338449 start: 4.1 power-off (timeout 00:00:30) [common]
2371 15:48:30.338606 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
2372 15:48:30.416145 >> Command sent successfully.
2373 15:48:30.418701 Returned 0 in 0 seconds
2374 15:48:30.519124 end: 4.1 power-off (duration 00:00:00) [common]
2376 15:48:30.519504 start: 4.2 read-feedback (timeout 00:10:00) [common]
2377 15:48:30.519781 Listened to connection for namespace 'common' for up to 1s
2378 15:48:31.520751 Finalising connection for namespace 'common'
2379 15:48:31.520944 Disconnecting from shell: Finalise
2380 15:48:31.521047
2381 15:48:31.621408 end: 4.2 read-feedback (duration 00:00:01) [common]
2382 15:48:31.621569 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11224154
2383 15:48:31.710255 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11224154
2384 15:48:31.710456 JobError: Your job cannot terminate cleanly.