Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 15:43:32.685709 lava-dispatcher, installed at version: 2023.05.1
2 15:43:32.685963 start: 0 validate
3 15:43:32.686118 Start time: 2023-08-07 15:43:32.686108+00:00 (UTC)
4 15:43:32.686277 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:43:32.686430 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 15:43:32.973200 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:43:32.973419 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:43:33.238419 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:43:33.238629 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:43:35.799892 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:43:35.800097 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:43:36.810791 validate duration: 4.12
14 15:43:36.811200 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:43:36.811330 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:43:36.811432 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:43:36.811578 Not decompressing ramdisk as can be used compressed.
18 15:43:36.811681 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
19 15:43:36.811797 saving as /var/lib/lava/dispatcher/tmp/11224175/tftp-deploy-zthwsb0m/ramdisk/initrd.cpio.gz
20 15:43:36.811898 total size: 5432480 (5MB)
21 15:43:36.813325 progress 0% (0MB)
22 15:43:36.815649 progress 5% (0MB)
23 15:43:36.817699 progress 10% (0MB)
24 15:43:36.819965 progress 15% (0MB)
25 15:43:36.822149 progress 20% (1MB)
26 15:43:36.824121 progress 25% (1MB)
27 15:43:36.826163 progress 30% (1MB)
28 15:43:36.828300 progress 35% (1MB)
29 15:43:36.830394 progress 40% (2MB)
30 15:43:36.832830 progress 45% (2MB)
31 15:43:36.835202 progress 50% (2MB)
32 15:43:36.837904 progress 55% (2MB)
33 15:43:36.840153 progress 60% (3MB)
34 15:43:36.842337 progress 65% (3MB)
35 15:43:36.845128 progress 70% (3MB)
36 15:43:36.847658 progress 75% (3MB)
37 15:43:36.850148 progress 80% (4MB)
38 15:43:36.852647 progress 85% (4MB)
39 15:43:36.855435 progress 90% (4MB)
40 15:43:36.857827 progress 95% (4MB)
41 15:43:36.860145 progress 100% (5MB)
42 15:43:36.860499 5MB downloaded in 0.05s (106.61MB/s)
43 15:43:36.860721 end: 1.1.1 http-download (duration 00:00:00) [common]
45 15:43:36.861131 end: 1.1 download-retry (duration 00:00:00) [common]
46 15:43:36.861279 start: 1.2 download-retry (timeout 00:10:00) [common]
47 15:43:36.861417 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 15:43:36.861637 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:43:36.861755 saving as /var/lib/lava/dispatcher/tmp/11224175/tftp-deploy-zthwsb0m/kernel/bzImage
50 15:43:36.861868 total size: 7884688 (7MB)
51 15:43:36.861968 No compression specified
52 15:43:36.863697 progress 0% (0MB)
53 15:43:36.867342 progress 5% (0MB)
54 15:43:36.869847 progress 10% (0MB)
55 15:43:36.872218 progress 15% (1MB)
56 15:43:36.874570 progress 20% (1MB)
57 15:43:36.876948 progress 25% (1MB)
58 15:43:36.879308 progress 30% (2MB)
59 15:43:36.881658 progress 35% (2MB)
60 15:43:36.884018 progress 40% (3MB)
61 15:43:36.886434 progress 45% (3MB)
62 15:43:36.888824 progress 50% (3MB)
63 15:43:36.891148 progress 55% (4MB)
64 15:43:36.893458 progress 60% (4MB)
65 15:43:36.895776 progress 65% (4MB)
66 15:43:36.898071 progress 70% (5MB)
67 15:43:36.900386 progress 75% (5MB)
68 15:43:36.902691 progress 80% (6MB)
69 15:43:36.905005 progress 85% (6MB)
70 15:43:36.907327 progress 90% (6MB)
71 15:43:36.909634 progress 95% (7MB)
72 15:43:36.911981 progress 100% (7MB)
73 15:43:36.912222 7MB downloaded in 0.05s (149.34MB/s)
74 15:43:36.912389 end: 1.2.1 http-download (duration 00:00:00) [common]
76 15:43:36.912649 end: 1.2 download-retry (duration 00:00:00) [common]
77 15:43:36.912749 start: 1.3 download-retry (timeout 00:10:00) [common]
78 15:43:36.912847 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 15:43:36.913005 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
80 15:43:36.913084 saving as /var/lib/lava/dispatcher/tmp/11224175/tftp-deploy-zthwsb0m/nfsrootfs/full.rootfs.tar
81 15:43:36.913154 total size: 207157356 (197MB)
82 15:43:36.913222 Using unxz to decompress xz
83 15:43:36.917741 progress 0% (0MB)
84 15:43:37.573917 progress 5% (9MB)
85 15:43:38.202192 progress 10% (19MB)
86 15:43:38.949016 progress 15% (29MB)
87 15:43:39.370577 progress 20% (39MB)
88 15:43:39.798357 progress 25% (49MB)
89 15:43:40.504821 progress 30% (59MB)
90 15:43:41.131690 progress 35% (69MB)
91 15:43:41.829056 progress 40% (79MB)
92 15:43:42.470307 progress 45% (88MB)
93 15:43:43.171526 progress 50% (98MB)
94 15:43:43.909021 progress 55% (108MB)
95 15:43:44.693308 progress 60% (118MB)
96 15:43:44.848681 progress 65% (128MB)
97 15:43:45.004390 progress 70% (138MB)
98 15:43:45.109537 progress 75% (148MB)
99 15:43:45.188740 progress 80% (158MB)
100 15:43:45.268143 progress 85% (167MB)
101 15:43:45.381109 progress 90% (177MB)
102 15:43:45.695794 progress 95% (187MB)
103 15:43:46.361821 progress 100% (197MB)
104 15:43:46.369386 197MB downloaded in 9.46s (20.89MB/s)
105 15:43:46.369738 end: 1.3.1 http-download (duration 00:00:09) [common]
107 15:43:46.370047 end: 1.3 download-retry (duration 00:00:09) [common]
108 15:43:46.370151 start: 1.4 download-retry (timeout 00:09:50) [common]
109 15:43:46.370256 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 15:43:46.370425 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:43:46.370508 saving as /var/lib/lava/dispatcher/tmp/11224175/tftp-deploy-zthwsb0m/modules/modules.tar
112 15:43:46.370578 total size: 250796 (0MB)
113 15:43:46.370650 Using unxz to decompress xz
114 15:43:46.631375 progress 13% (0MB)
115 15:43:46.631874 progress 26% (0MB)
116 15:43:46.632149 progress 39% (0MB)
117 15:43:46.633873 progress 52% (0MB)
118 15:43:46.636185 progress 65% (0MB)
119 15:43:46.638486 progress 78% (0MB)
120 15:43:46.640801 progress 91% (0MB)
121 15:43:46.642880 progress 100% (0MB)
122 15:43:46.649802 0MB downloaded in 0.28s (0.86MB/s)
123 15:43:46.650110 end: 1.4.1 http-download (duration 00:00:00) [common]
125 15:43:46.650421 end: 1.4 download-retry (duration 00:00:00) [common]
126 15:43:46.650533 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
127 15:43:46.650645 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
128 15:43:50.652520 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11224175/extract-nfsrootfs-yms1l8vd
129 15:43:50.652754 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
130 15:43:50.652866 start: 1.5.2 lava-overlay (timeout 00:09:46) [common]
131 15:43:50.653072 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398
132 15:43:50.653227 makedir: /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin
133 15:43:50.653347 makedir: /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/tests
134 15:43:50.653467 makedir: /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/results
135 15:43:50.653583 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-add-keys
136 15:43:50.653746 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-add-sources
137 15:43:50.653894 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-background-process-start
138 15:43:50.654039 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-background-process-stop
139 15:43:50.654184 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-common-functions
140 15:43:50.654342 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-echo-ipv4
141 15:43:50.654493 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-install-packages
142 15:43:50.654637 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-installed-packages
143 15:43:50.654782 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-os-build
144 15:43:50.654928 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-probe-channel
145 15:43:50.655072 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-probe-ip
146 15:43:50.655214 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-target-ip
147 15:43:50.655526 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-target-mac
148 15:43:50.655673 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-target-storage
149 15:43:50.655821 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-test-case
150 15:43:50.655967 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-test-event
151 15:43:50.656110 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-test-feedback
152 15:43:50.656255 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-test-raise
153 15:43:50.656417 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-test-reference
154 15:43:50.656611 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-test-runner
155 15:43:50.656761 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-test-set
156 15:43:50.656908 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-test-shell
157 15:43:50.658478 Updating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-add-keys (debian)
158 15:43:50.658815 Updating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-add-sources (debian)
159 15:43:50.659210 Updating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-install-packages (debian)
160 15:43:50.659560 Updating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-installed-packages (debian)
161 15:43:50.659897 Updating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/bin/lava-os-build (debian)
162 15:43:50.660253 Creating /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/environment
163 15:43:50.660375 LAVA metadata
164 15:43:50.660459 - LAVA_JOB_ID=11224175
165 15:43:50.660535 - LAVA_DISPATCHER_IP=192.168.201.1
166 15:43:50.660663 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:46) [common]
167 15:43:50.660741 skipped lava-vland-overlay
168 15:43:50.660829 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 15:43:50.660921 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:46) [common]
170 15:43:50.660991 skipped lava-multinode-overlay
171 15:43:50.661074 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 15:43:50.661164 start: 1.5.2.3 test-definition (timeout 00:09:46) [common]
173 15:43:50.661250 Loading test definitions
174 15:43:50.661353 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:46) [common]
175 15:43:50.661435 Using /lava-11224175 at stage 0
176 15:43:50.661786 uuid=11224175_1.5.2.3.1 testdef=None
177 15:43:50.661889 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 15:43:50.661985 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
179 15:43:50.662507 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 15:43:50.662756 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
182 15:43:50.663407 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 15:43:50.663669 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
185 15:43:50.664278 runner path: /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/0/tests/0_timesync-off test_uuid 11224175_1.5.2.3.1
186 15:43:50.664454 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 15:43:50.664710 start: 1.5.2.3.5 git-repo-action (timeout 00:09:46) [common]
189 15:43:50.664793 Using /lava-11224175 at stage 0
190 15:43:50.664905 Fetching tests from https://github.com/kernelci/test-definitions.git
191 15:43:50.664992 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/0/tests/1_kselftest-filesystems'
192 15:43:58.039218 Running '/usr/bin/git checkout kernelci.org
193 15:43:58.093153 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
194 15:43:58.093980 uuid=11224175_1.5.2.3.5 testdef=None
195 15:43:58.094174 end: 1.5.2.3.5 git-repo-action (duration 00:00:07) [common]
197 15:43:58.094471 start: 1.5.2.3.6 test-overlay (timeout 00:09:39) [common]
198 15:43:58.095336 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 15:43:58.095607 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:39) [common]
201 15:43:58.096712 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 15:43:58.096981 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:39) [common]
204 15:43:58.098043 runner path: /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/0/tests/1_kselftest-filesystems test_uuid 11224175_1.5.2.3.5
205 15:43:58.098148 BOARD='asus-C436FA-Flip-hatch'
206 15:43:58.098222 BRANCH='cip'
207 15:43:58.098290 SKIPFILE='/dev/null'
208 15:43:58.098357 SKIP_INSTALL='True'
209 15:43:58.098420 TESTPROG_URL='None'
210 15:43:58.098482 TST_CASENAME=''
211 15:43:58.098545 TST_CMDFILES='filesystems'
212 15:43:58.098710 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 15:43:58.098944 Creating lava-test-runner.conf files
215 15:43:58.099018 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224175/lava-overlay-7syn6398/lava-11224175/0 for stage 0
216 15:43:58.099126 - 0_timesync-off
217 15:43:58.099207 - 1_kselftest-filesystems
218 15:43:58.099326 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
219 15:43:58.099427 start: 1.5.2.4 compress-overlay (timeout 00:09:39) [common]
220 15:44:06.422917 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
221 15:44:06.423082 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:30) [common]
222 15:44:06.423242 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 15:44:06.423360 end: 1.5.2 lava-overlay (duration 00:00:16) [common]
224 15:44:06.423468 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
225 15:44:06.582237 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 15:44:06.582649 start: 1.5.4 extract-modules (timeout 00:09:30) [common]
227 15:44:06.582779 extracting modules file /var/lib/lava/dispatcher/tmp/11224175/tftp-deploy-zthwsb0m/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224175/extract-nfsrootfs-yms1l8vd
228 15:44:06.598150 extracting modules file /var/lib/lava/dispatcher/tmp/11224175/tftp-deploy-zthwsb0m/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224175/extract-overlay-ramdisk-mk7algdt/ramdisk
229 15:44:06.613297 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 15:44:06.613445 start: 1.5.5 apply-overlay-tftp (timeout 00:09:30) [common]
231 15:44:06.613584 [common] Applying overlay to NFS
232 15:44:06.613665 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224175/compress-overlay-u_4x81hn/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11224175/extract-nfsrootfs-yms1l8vd
233 15:44:07.709824 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 15:44:07.709998 start: 1.5.6 configure-preseed-file (timeout 00:09:29) [common]
235 15:44:07.710107 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 15:44:07.710211 start: 1.5.7 compress-ramdisk (timeout 00:09:29) [common]
237 15:44:07.710306 Building ramdisk /var/lib/lava/dispatcher/tmp/11224175/extract-overlay-ramdisk-mk7algdt/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11224175/extract-overlay-ramdisk-mk7algdt/ramdisk
238 15:44:07.790083 >> 26159 blocks
239 15:44:08.391299 rename /var/lib/lava/dispatcher/tmp/11224175/extract-overlay-ramdisk-mk7algdt/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11224175/tftp-deploy-zthwsb0m/ramdisk/ramdisk.cpio.gz
240 15:44:08.391823 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 15:44:08.392024 start: 1.5.8 prepare-kernel (timeout 00:09:28) [common]
242 15:44:08.392191 start: 1.5.8.1 prepare-fit (timeout 00:09:28) [common]
243 15:44:08.392341 No mkimage arch provided, not using FIT.
244 15:44:08.392495 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 15:44:08.392646 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 15:44:08.392834 end: 1.5 prepare-tftp-overlay (duration 00:00:22) [common]
247 15:44:08.392992 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:28) [common]
248 15:44:08.393113 No LXC device requested
249 15:44:08.393210 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 15:44:08.393316 start: 1.7 deploy-device-env (timeout 00:09:28) [common]
251 15:44:08.393410 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 15:44:08.393489 Checking files for TFTP limit of 4294967296 bytes.
253 15:44:08.393933 end: 1 tftp-deploy (duration 00:00:32) [common]
254 15:44:08.394050 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 15:44:08.394150 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 15:44:08.394291 substitutions:
257 15:44:08.394372 - {DTB}: None
258 15:44:08.394440 - {INITRD}: 11224175/tftp-deploy-zthwsb0m/ramdisk/ramdisk.cpio.gz
259 15:44:08.394506 - {KERNEL}: 11224175/tftp-deploy-zthwsb0m/kernel/bzImage
260 15:44:08.394571 - {LAVA_MAC}: None
261 15:44:08.394633 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11224175/extract-nfsrootfs-yms1l8vd
262 15:44:08.394695 - {NFS_SERVER_IP}: 192.168.201.1
263 15:44:08.394757 - {PRESEED_CONFIG}: None
264 15:44:08.394817 - {PRESEED_LOCAL}: None
265 15:44:08.394876 - {RAMDISK}: 11224175/tftp-deploy-zthwsb0m/ramdisk/ramdisk.cpio.gz
266 15:44:08.394936 - {ROOT_PART}: None
267 15:44:08.394995 - {ROOT}: None
268 15:44:08.395054 - {SERVER_IP}: 192.168.201.1
269 15:44:08.395113 - {TEE}: None
270 15:44:08.395172 Parsed boot commands:
271 15:44:08.395239 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 15:44:08.395439 Parsed boot commands: tftpboot 192.168.201.1 11224175/tftp-deploy-zthwsb0m/kernel/bzImage 11224175/tftp-deploy-zthwsb0m/kernel/cmdline 11224175/tftp-deploy-zthwsb0m/ramdisk/ramdisk.cpio.gz
273 15:44:08.395540 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 15:44:08.395636 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 15:44:08.395741 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 15:44:08.395835 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 15:44:08.395914 Not connected, no need to disconnect.
278 15:44:08.395995 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 15:44:08.396087 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 15:44:08.396164 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
281 15:44:08.400462 Setting prompt string to ['lava-test: # ']
282 15:44:08.400900 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 15:44:08.401080 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 15:44:08.401231 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 15:44:08.401388 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 15:44:08.401751 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
287 15:44:13.554266 >> Command sent successfully.
288 15:44:13.557020 Returned 0 in 5 seconds
289 15:44:13.657797 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 15:44:13.659455 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 15:44:13.660055 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 15:44:13.660555 Setting prompt string to 'Starting depthcharge on Helios...'
294 15:44:13.661124 Changing prompt to 'Starting depthcharge on Helios...'
295 15:44:13.661711 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
296 15:44:13.663339 [Enter `^Ec?' for help]
297 15:44:14.279449
298 15:44:14.279641
299 15:44:14.289242 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 15:44:14.292747 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 15:44:14.299109 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 15:44:14.302598 CPU: AES supported, TXT NOT supported, VT supported
303 15:44:14.309434 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 15:44:14.313244 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 15:44:14.319777 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 15:44:14.323212 VBOOT: Loading verstage.
307 15:44:14.326068 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 15:44:14.333178 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 15:44:14.336661 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 15:44:14.339695 CBFS @ c08000 size 3f8000
311 15:44:14.346378 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 15:44:14.349661 CBFS: Locating 'fallback/verstage'
313 15:44:14.353000 CBFS: Found @ offset 10fb80 size 1072c
314 15:44:14.356199
315 15:44:14.356284
316 15:44:14.366323 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 15:44:14.380377 Probing TPM: . done!
318 15:44:14.384087 TPM ready after 0 ms
319 15:44:14.387087 Connected to device vid:did:rid of 1ae0:0028:00
320 15:44:14.397600 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
321 15:44:14.401093 Initialized TPM device CR50 revision 0
322 15:44:14.441896 tlcl_send_startup: Startup return code is 0
323 15:44:14.442411 TPM: setup succeeded
324 15:44:14.454703 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 15:44:14.458819 Chrome EC: UHEPI supported
326 15:44:14.461988 Phase 1
327 15:44:14.465531 FMAP: area GBB found @ c05000 (12288 bytes)
328 15:44:14.471917 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
329 15:44:14.472690 Phase 2
330 15:44:14.475120 Phase 3
331 15:44:14.478608 FMAP: area GBB found @ c05000 (12288 bytes)
332 15:44:14.485334 VB2:vb2_report_dev_firmware() This is developer signed firmware
333 15:44:14.491921 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
334 15:44:14.495001 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
335 15:44:14.501445 VB2:vb2_verify_keyblock() Checking keyblock signature...
336 15:44:14.516974 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
337 15:44:14.520482 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
338 15:44:14.527213 VB2:vb2_verify_fw_preamble() Verifying preamble.
339 15:44:14.531253 Phase 4
340 15:44:14.534582 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
341 15:44:14.541235 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
342 15:44:14.720632 VB2:vb2_rsa_verify_digest() Digest check failed!
343 15:44:14.727370 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
344 15:44:14.727508 Saving nvdata
345 15:44:14.730484 Reboot requested (10020007)
346 15:44:14.733947 board_reset() called!
347 15:44:14.734075 full_reset() called!
348 15:44:19.245432
349 15:44:19.245592
350 15:44:19.255901 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
351 15:44:19.259348 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
352 15:44:19.265937 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
353 15:44:19.269402 CPU: AES supported, TXT NOT supported, VT supported
354 15:44:19.275630 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
355 15:44:19.278979 PCH: device id 0284 (rev 00) is Cometlake-U Premium
356 15:44:19.285480 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
357 15:44:19.289201 VBOOT: Loading verstage.
358 15:44:19.292328 FMAP: Found "FLASH" version 1.1 at 0xc04000.
359 15:44:19.298747 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
360 15:44:19.302403 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 15:44:19.305913 CBFS @ c08000 size 3f8000
362 15:44:19.312390 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 15:44:19.315817 CBFS: Locating 'fallback/verstage'
364 15:44:19.319106 CBFS: Found @ offset 10fb80 size 1072c
365 15:44:19.322597
366 15:44:19.322705
367 15:44:19.332327 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
368 15:44:19.346678 Probing TPM: . done!
369 15:44:19.350553 TPM ready after 0 ms
370 15:44:19.354052 Connected to device vid:did:rid of 1ae0:0028:00
371 15:44:19.364002 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
372 15:44:19.367389 Initialized TPM device CR50 revision 0
373 15:44:19.408351 tlcl_send_startup: Startup return code is 0
374 15:44:19.408466 TPM: setup succeeded
375 15:44:19.420587 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
376 15:44:19.424660 Chrome EC: UHEPI supported
377 15:44:19.428163 Phase 1
378 15:44:19.431063 FMAP: area GBB found @ c05000 (12288 bytes)
379 15:44:19.437755 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
380 15:44:19.444698 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
381 15:44:19.448066 Recovery requested (1009000e)
382 15:44:19.453450 Saving nvdata
383 15:44:19.459527 tlcl_extend: response is 0
384 15:44:19.468516 tlcl_extend: response is 0
385 15:44:19.475401 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 15:44:19.479007 CBFS @ c08000 size 3f8000
387 15:44:19.485343 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 15:44:19.488714 CBFS: Locating 'fallback/romstage'
389 15:44:19.492176 CBFS: Found @ offset 80 size 145fc
390 15:44:19.495518 Accumulated console time in verstage 98 ms
391 15:44:19.495601
392 15:44:19.495671
393 15:44:19.508544 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
394 15:44:19.515178 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
395 15:44:19.518413 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
396 15:44:19.522007 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
397 15:44:19.528686 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
398 15:44:19.531937 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
399 15:44:19.535256 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
400 15:44:19.538248 TCO_STS: 0000 0000
401 15:44:19.542022 GEN_PMCON: e0015238 00000200
402 15:44:19.545435 GBLRST_CAUSE: 00000000 00000000
403 15:44:19.545538 prev_sleep_state 5
404 15:44:19.548310 Boot Count incremented to 62726
405 15:44:19.555191 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
406 15:44:19.558255 CBFS @ c08000 size 3f8000
407 15:44:19.564771 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
408 15:44:19.564865 CBFS: Locating 'fspm.bin'
409 15:44:19.571552 CBFS: Found @ offset 5ffc0 size 71000
410 15:44:19.574803 Chrome EC: UHEPI supported
411 15:44:19.581612 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
412 15:44:19.585198 Probing TPM: done!
413 15:44:19.592061 Connected to device vid:did:rid of 1ae0:0028:00
414 15:44:19.601702 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
415 15:44:19.607533 Initialized TPM device CR50 revision 0
416 15:44:19.616987 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 15:44:19.623593 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
418 15:44:19.627108 MRC cache found, size 1948
419 15:44:19.630563 bootmode is set to: 2
420 15:44:19.633466 PRMRR disabled by config.
421 15:44:19.633568 SPD INDEX = 1
422 15:44:19.640284 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 15:44:19.643673 CBFS @ c08000 size 3f8000
424 15:44:19.646777 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 15:44:19.649968 CBFS: Locating 'spd.bin'
426 15:44:19.653590 CBFS: Found @ offset 5fb80 size 400
427 15:44:19.656763 SPD: module type is LPDDR3
428 15:44:19.659949 SPD: module part is
429 15:44:19.666788 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
430 15:44:19.670215 SPD: device width 4 bits, bus width 8 bits
431 15:44:19.673525 SPD: module size is 4096 MB (per channel)
432 15:44:19.676842 memory slot: 0 configuration done.
433 15:44:19.680193 memory slot: 2 configuration done.
434 15:44:19.730947 CBMEM:
435 15:44:19.734147 IMD: root @ 99fff000 254 entries.
436 15:44:19.737506 IMD: root @ 99ffec00 62 entries.
437 15:44:19.740984 External stage cache:
438 15:44:19.744385 IMD: root @ 9abff000 254 entries.
439 15:44:19.747760 IMD: root @ 9abfec00 62 entries.
440 15:44:19.750669 Chrome EC: clear events_b mask to 0x0000000020004000
441 15:44:19.766286 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 15:44:19.780108 tlcl_write: response is 0
443 15:44:19.789247 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
444 15:44:19.795564 MRC: TPM MRC hash updated successfully.
445 15:44:19.795663 2 DIMMs found
446 15:44:19.798938 SMM Memory Map
447 15:44:19.802289 SMRAM : 0x9a000000 0x1000000
448 15:44:19.805688 Subregion 0: 0x9a000000 0xa00000
449 15:44:19.809198 Subregion 1: 0x9aa00000 0x200000
450 15:44:19.812628 Subregion 2: 0x9ac00000 0x400000
451 15:44:19.812710 top_of_ram = 0x9a000000
452 15:44:19.819037 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
453 15:44:19.825570 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
454 15:44:19.829024 MTRR Range: Start=ff000000 End=0 (Size 1000000)
455 15:44:19.836115 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
456 15:44:19.836214 CBFS @ c08000 size 3f8000
457 15:44:19.842193 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
458 15:44:19.845682 CBFS: Locating 'fallback/postcar'
459 15:44:19.849054 CBFS: Found @ offset 107000 size 4b44
460 15:44:19.856050 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
461 15:44:19.867387 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
462 15:44:19.870729 Processing 180 relocs. Offset value of 0x97c0c000
463 15:44:19.879190 Accumulated console time in romstage 286 ms
464 15:44:19.879307
465 15:44:19.879388
466 15:44:19.889577 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
467 15:44:19.896280 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
468 15:44:19.899279 CBFS @ c08000 size 3f8000
469 15:44:19.903029 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
470 15:44:19.906026 CBFS: Locating 'fallback/ramstage'
471 15:44:19.913273 CBFS: Found @ offset 43380 size 1b9e8
472 15:44:19.919758 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
473 15:44:19.951662 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
474 15:44:19.954527 Processing 3976 relocs. Offset value of 0x98db0000
475 15:44:19.961344 Accumulated console time in postcar 52 ms
476 15:44:19.961848
477 15:44:19.962265
478 15:44:19.970968 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
479 15:44:19.978090 FMAP: area RO_VPD found @ c00000 (16384 bytes)
480 15:44:19.981366 WARNING: RO_VPD is uninitialized or empty.
481 15:44:19.984412 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 15:44:19.991552 FMAP: area RW_VPD found @ af8000 (8192 bytes)
483 15:44:19.992021 Normal boot.
484 15:44:19.994396 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
485 15:44:20.001351 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 15:44:20.004656 CBFS @ c08000 size 3f8000
487 15:44:20.011647 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 15:44:20.014526 CBFS: Locating 'cpu_microcode_blob.bin'
489 15:44:20.018123 CBFS: Found @ offset 14700 size 2ec00
490 15:44:20.021139 microcode: sig=0x806ec pf=0x4 revision=0xc9
491 15:44:20.024523 Skip microcode update
492 15:44:20.028085 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 15:44:20.031056 CBFS @ c08000 size 3f8000
494 15:44:20.037919 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 15:44:20.041362 CBFS: Locating 'fsps.bin'
496 15:44:20.044482 CBFS: Found @ offset d1fc0 size 35000
497 15:44:20.068826 Detected 4 core, 8 thread CPU.
498 15:44:20.072450 Setting up SMI for CPU
499 15:44:20.075414 IED base = 0x9ac00000
500 15:44:20.075532 IED size = 0x00400000
501 15:44:20.078784 Will perform SMM setup.
502 15:44:20.085622 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
503 15:44:20.092530 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
504 15:44:20.095383 Processing 16 relocs. Offset value of 0x00030000
505 15:44:20.098967 Attempting to start 7 APs
506 15:44:20.102245 Waiting for 10ms after sending INIT.
507 15:44:20.118851 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
508 15:44:20.118979 done.
509 15:44:20.122108 AP: slot 7 apic_id 5.
510 15:44:20.125283 AP: slot 6 apic_id 4.
511 15:44:20.128947 Waiting for 2nd SIPI to complete...done.
512 15:44:20.131909 AP: slot 1 apic_id 3.
513 15:44:20.132012 AP: slot 4 apic_id 2.
514 15:44:20.135702 AP: slot 5 apic_id 7.
515 15:44:20.138661 AP: slot 2 apic_id 6.
516 15:44:20.145673 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 15:44:20.148571 Processing 13 relocs. Offset value of 0x00038000
518 15:44:20.155301 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 15:44:20.158594 Installing SMM handler to 0x9a000000
520 15:44:20.168474 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 15:44:20.171913 Processing 658 relocs. Offset value of 0x9a010000
522 15:44:20.181882 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 15:44:20.185316 Processing 13 relocs. Offset value of 0x9a008000
524 15:44:20.192136 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 15:44:20.198382 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 15:44:20.201884 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 15:44:20.208628 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 15:44:20.215006 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 15:44:20.221468 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 15:44:20.224982 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 15:44:20.231981 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 15:44:20.234805 Clearing SMI status registers
533 15:44:20.238475 SMI_STS: PM1
534 15:44:20.238560 PM1_STS: PWRBTN
535 15:44:20.241752 TCO_STS: SECOND_TO
536 15:44:20.245163 New SMBASE 0x9a000000
537 15:44:20.245256 In relocation handler: CPU 0
538 15:44:20.251411 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 15:44:20.255019 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 15:44:20.258213 Relocation complete.
541 15:44:20.261758 New SMBASE 0x99fff400
542 15:44:20.261844 In relocation handler: CPU 3
543 15:44:20.268072 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
544 15:44:20.271752 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 15:44:20.274987 Relocation complete.
546 15:44:20.275085 New SMBASE 0x99fff000
547 15:44:20.278208 In relocation handler: CPU 4
548 15:44:20.284815 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
549 15:44:20.288290 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 15:44:20.291874 Relocation complete.
551 15:44:20.291963 New SMBASE 0x99fffc00
552 15:44:20.295191 In relocation handler: CPU 1
553 15:44:20.298470 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
554 15:44:20.304796 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 15:44:20.308207 Relocation complete.
556 15:44:20.308293 New SMBASE 0x99ffec00
557 15:44:20.311650 In relocation handler: CPU 5
558 15:44:20.314650 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
559 15:44:20.321371 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 15:44:20.321469 Relocation complete.
561 15:44:20.324899 New SMBASE 0x99fff800
562 15:44:20.328337 In relocation handler: CPU 2
563 15:44:20.331890 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
564 15:44:20.338366 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 15:44:20.338453 Relocation complete.
566 15:44:20.341799 New SMBASE 0x99ffe400
567 15:44:20.345126 In relocation handler: CPU 7
568 15:44:20.348523 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
569 15:44:20.354656 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 15:44:20.354747 Relocation complete.
571 15:44:20.358421 New SMBASE 0x99ffe800
572 15:44:20.361435 In relocation handler: CPU 6
573 15:44:20.364890 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
574 15:44:20.371702 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 15:44:20.371796 Relocation complete.
576 15:44:20.375020 Initializing CPU #0
577 15:44:20.378128 CPU: vendor Intel device 806ec
578 15:44:20.381491 CPU: family 06, model 8e, stepping 0c
579 15:44:20.384795 Clearing out pending MCEs
580 15:44:20.388184 Setting up local APIC...
581 15:44:20.388278 apic_id: 0x00 done.
582 15:44:20.391768 Turbo is available but hidden
583 15:44:20.395078 Turbo is available and visible
584 15:44:20.397924 VMX status: enabled
585 15:44:20.401381 IA32_FEATURE_CONTROL status: locked
586 15:44:20.401474 Skip microcode update
587 15:44:20.404561 CPU #0 initialized
588 15:44:20.408003 Initializing CPU #3
589 15:44:20.408088 Initializing CPU #1
590 15:44:20.411296 Initializing CPU #4
591 15:44:20.414762 CPU: vendor Intel device 806ec
592 15:44:20.417727 CPU: family 06, model 8e, stepping 0c
593 15:44:20.421337 CPU: vendor Intel device 806ec
594 15:44:20.424335 CPU: family 06, model 8e, stepping 0c
595 15:44:20.427719 Clearing out pending MCEs
596 15:44:20.431041 Clearing out pending MCEs
597 15:44:20.431169 Setting up local APIC...
598 15:44:20.434384 CPU: vendor Intel device 806ec
599 15:44:20.441252 CPU: family 06, model 8e, stepping 0c
600 15:44:20.441343 Clearing out pending MCEs
601 15:44:20.444148 Initializing CPU #7
602 15:44:20.447635 Initializing CPU #6
603 15:44:20.447728 CPU: vendor Intel device 806ec
604 15:44:20.454532 CPU: family 06, model 8e, stepping 0c
605 15:44:20.457461 CPU: vendor Intel device 806ec
606 15:44:20.460822 CPU: family 06, model 8e, stepping 0c
607 15:44:20.464330 Clearing out pending MCEs
608 15:44:20.464424 Clearing out pending MCEs
609 15:44:20.467698 Setting up local APIC...
610 15:44:20.471034 Setting up local APIC...
611 15:44:20.471127 Initializing CPU #5
612 15:44:20.474187 Initializing CPU #2
613 15:44:20.477277 CPU: vendor Intel device 806ec
614 15:44:20.480654 CPU: family 06, model 8e, stepping 0c
615 15:44:20.484130 CPU: vendor Intel device 806ec
616 15:44:20.487123 CPU: family 06, model 8e, stepping 0c
617 15:44:20.490755 Clearing out pending MCEs
618 15:44:20.494088 Clearing out pending MCEs
619 15:44:20.497329 Setting up local APIC...
620 15:44:20.497422 Setting up local APIC...
621 15:44:20.500857 apic_id: 0x07 done.
622 15:44:20.503877 Setting up local APIC...
623 15:44:20.503970 apic_id: 0x01 done.
624 15:44:20.507372 apic_id: 0x03 done.
625 15:44:20.510790 apic_id: 0x02 done.
626 15:44:20.510883 VMX status: enabled
627 15:44:20.514181 VMX status: enabled
628 15:44:20.517035 IA32_FEATURE_CONTROL status: locked
629 15:44:20.520660 IA32_FEATURE_CONTROL status: locked
630 15:44:20.523555 Skip microcode update
631 15:44:20.527004 Skip microcode update
632 15:44:20.527097 CPU #1 initialized
633 15:44:20.530385 CPU #4 initialized
634 15:44:20.530490 VMX status: enabled
635 15:44:20.533778 apic_id: 0x06 done.
636 15:44:20.537226 VMX status: enabled
637 15:44:20.537319 VMX status: enabled
638 15:44:20.540546 IA32_FEATURE_CONTROL status: locked
639 15:44:20.543481 IA32_FEATURE_CONTROL status: locked
640 15:44:20.546976 Skip microcode update
641 15:44:20.550512 Skip microcode update
642 15:44:20.550621 CPU #5 initialized
643 15:44:20.553969 CPU #2 initialized
644 15:44:20.557158 apic_id: 0x05 done.
645 15:44:20.557283 Setting up local APIC...
646 15:44:20.560090 IA32_FEATURE_CONTROL status: locked
647 15:44:20.563607 VMX status: enabled
648 15:44:20.567065 apic_id: 0x04 done.
649 15:44:20.570551 IA32_FEATURE_CONTROL status: locked
650 15:44:20.570645 VMX status: enabled
651 15:44:20.573394 Skip microcode update
652 15:44:20.576706 IA32_FEATURE_CONTROL status: locked
653 15:44:20.580233 CPU #7 initialized
654 15:44:20.580328 Skip microcode update
655 15:44:20.583558 Skip microcode update
656 15:44:20.586619 CPU #6 initialized
657 15:44:20.586712 CPU #3 initialized
658 15:44:20.589907 bsp_do_flight_plan done after 461 msecs.
659 15:44:20.593647 CPU: frequency set to 4200 MHz
660 15:44:20.596897 Enabling SMIs.
661 15:44:20.596991 Locking SMM.
662 15:44:20.612580 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
663 15:44:20.615955 CBFS @ c08000 size 3f8000
664 15:44:20.622443 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
665 15:44:20.622540 CBFS: Locating 'vbt.bin'
666 15:44:20.625939 CBFS: Found @ offset 5f5c0 size 499
667 15:44:20.632590 Found a VBT of 4608 bytes after decompression
668 15:44:20.814867 Display FSP Version Info HOB
669 15:44:20.818242 Reference Code - CPU = 9.0.1e.30
670 15:44:20.821686 uCode Version = 0.0.0.ca
671 15:44:20.824443 TXT ACM version = ff.ff.ff.ffff
672 15:44:20.828137 Display FSP Version Info HOB
673 15:44:20.831134 Reference Code - ME = 9.0.1e.30
674 15:44:20.834350 MEBx version = 0.0.0.0
675 15:44:20.837631 ME Firmware Version = Consumer SKU
676 15:44:20.840998 Display FSP Version Info HOB
677 15:44:20.844495 Reference Code - CML PCH = 9.0.1e.30
678 15:44:20.847783 PCH-CRID Status = Disabled
679 15:44:20.851112 PCH-CRID Original Value = ff.ff.ff.ffff
680 15:44:20.854437 PCH-CRID New Value = ff.ff.ff.ffff
681 15:44:20.857739 OPROM - RST - RAID = ff.ff.ff.ffff
682 15:44:20.860843 ChipsetInit Base Version = ff.ff.ff.ffff
683 15:44:20.864355 ChipsetInit Oem Version = ff.ff.ff.ffff
684 15:44:20.867765 Display FSP Version Info HOB
685 15:44:20.874094 Reference Code - SA - System Agent = 9.0.1e.30
686 15:44:20.877518 Reference Code - MRC = 0.7.1.6c
687 15:44:20.881070 SA - PCIe Version = 9.0.1e.30
688 15:44:20.881169 SA-CRID Status = Disabled
689 15:44:20.884557 SA-CRID Original Value = 0.0.0.c
690 15:44:20.887590 SA-CRID New Value = 0.0.0.c
691 15:44:20.891085 OPROM - VBIOS = ff.ff.ff.ffff
692 15:44:20.894113 RTC Init
693 15:44:20.897562 Set power on after power failure.
694 15:44:20.897656 Disabling Deep S3
695 15:44:20.900769 Disabling Deep S3
696 15:44:20.900862 Disabling Deep S4
697 15:44:20.904187 Disabling Deep S4
698 15:44:20.907516 Disabling Deep S5
699 15:44:20.907609 Disabling Deep S5
700 15:44:20.914319 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
701 15:44:20.914412 Enumerating buses...
702 15:44:20.920699 Show all devs... Before device enumeration.
703 15:44:20.924278 Root Device: enabled 1
704 15:44:20.924370 CPU_CLUSTER: 0: enabled 1
705 15:44:20.927071 DOMAIN: 0000: enabled 1
706 15:44:20.930344 APIC: 00: enabled 1
707 15:44:20.930429 PCI: 00:00.0: enabled 1
708 15:44:20.933646 PCI: 00:02.0: enabled 1
709 15:44:20.937408 PCI: 00:04.0: enabled 0
710 15:44:20.940724 PCI: 00:05.0: enabled 0
711 15:44:20.940808 PCI: 00:12.0: enabled 1
712 15:44:20.944056 PCI: 00:12.5: enabled 0
713 15:44:20.946907 PCI: 00:12.6: enabled 0
714 15:44:20.950516 PCI: 00:14.0: enabled 1
715 15:44:20.950600 PCI: 00:14.1: enabled 0
716 15:44:20.953998 PCI: 00:14.3: enabled 1
717 15:44:20.956998 PCI: 00:14.5: enabled 0
718 15:44:20.957080 PCI: 00:15.0: enabled 1
719 15:44:20.960500 PCI: 00:15.1: enabled 1
720 15:44:20.964094 PCI: 00:15.2: enabled 0
721 15:44:20.967387 PCI: 00:15.3: enabled 0
722 15:44:20.967500 PCI: 00:16.0: enabled 1
723 15:44:20.970711 PCI: 00:16.1: enabled 0
724 15:44:20.974137 PCI: 00:16.2: enabled 0
725 15:44:20.977235 PCI: 00:16.3: enabled 0
726 15:44:20.977353 PCI: 00:16.4: enabled 0
727 15:44:20.980300 PCI: 00:16.5: enabled 0
728 15:44:20.983691 PCI: 00:17.0: enabled 1
729 15:44:20.987139 PCI: 00:19.0: enabled 1
730 15:44:20.987266 PCI: 00:19.1: enabled 0
731 15:44:20.990601 PCI: 00:19.2: enabled 0
732 15:44:20.993660 PCI: 00:1a.0: enabled 0
733 15:44:20.993747 PCI: 00:1c.0: enabled 0
734 15:44:20.997182 PCI: 00:1c.1: enabled 0
735 15:44:21.000673 PCI: 00:1c.2: enabled 0
736 15:44:21.003603 PCI: 00:1c.3: enabled 0
737 15:44:21.003688 PCI: 00:1c.4: enabled 0
738 15:44:21.007354 PCI: 00:1c.5: enabled 0
739 15:44:21.010285 PCI: 00:1c.6: enabled 0
740 15:44:21.013631 PCI: 00:1c.7: enabled 0
741 15:44:21.013724 PCI: 00:1d.0: enabled 1
742 15:44:21.017173 PCI: 00:1d.1: enabled 0
743 15:44:21.020530 PCI: 00:1d.2: enabled 0
744 15:44:21.020623 PCI: 00:1d.3: enabled 0
745 15:44:21.024055 PCI: 00:1d.4: enabled 0
746 15:44:21.026967 PCI: 00:1d.5: enabled 1
747 15:44:21.030397 PCI: 00:1e.0: enabled 1
748 15:44:21.030490 PCI: 00:1e.1: enabled 0
749 15:44:21.033769 PCI: 00:1e.2: enabled 1
750 15:44:21.037195 PCI: 00:1e.3: enabled 1
751 15:44:21.040115 PCI: 00:1f.0: enabled 1
752 15:44:21.040208 PCI: 00:1f.1: enabled 1
753 15:44:21.043849 PCI: 00:1f.2: enabled 1
754 15:44:21.047314 PCI: 00:1f.3: enabled 1
755 15:44:21.050361 PCI: 00:1f.4: enabled 1
756 15:44:21.050454 PCI: 00:1f.5: enabled 1
757 15:44:21.053718 PCI: 00:1f.6: enabled 0
758 15:44:21.056626 USB0 port 0: enabled 1
759 15:44:21.056720 I2C: 00:15: enabled 1
760 15:44:21.060130 I2C: 00:5d: enabled 1
761 15:44:21.063468 GENERIC: 0.0: enabled 1
762 15:44:21.063561 I2C: 00:1a: enabled 1
763 15:44:21.066838 I2C: 00:38: enabled 1
764 15:44:21.070205 I2C: 00:39: enabled 1
765 15:44:21.070298 I2C: 00:3a: enabled 1
766 15:44:21.073707 I2C: 00:3b: enabled 1
767 15:44:21.077250 PCI: 00:00.0: enabled 1
768 15:44:21.077342 SPI: 00: enabled 1
769 15:44:21.080509 SPI: 01: enabled 1
770 15:44:21.083371 PNP: 0c09.0: enabled 1
771 15:44:21.083465 USB2 port 0: enabled 1
772 15:44:21.086743 USB2 port 1: enabled 1
773 15:44:21.090341 USB2 port 2: enabled 0
774 15:44:21.093679 USB2 port 3: enabled 0
775 15:44:21.093775 USB2 port 5: enabled 0
776 15:44:21.096977 USB2 port 6: enabled 1
777 15:44:21.100482 USB2 port 9: enabled 1
778 15:44:21.100576 USB3 port 0: enabled 1
779 15:44:21.103973 USB3 port 1: enabled 1
780 15:44:21.106746 USB3 port 2: enabled 1
781 15:44:21.106839 USB3 port 3: enabled 1
782 15:44:21.110131 USB3 port 4: enabled 0
783 15:44:21.113444 APIC: 03: enabled 1
784 15:44:21.113529 APIC: 06: enabled 1
785 15:44:21.117176 APIC: 01: enabled 1
786 15:44:21.119991 APIC: 02: enabled 1
787 15:44:21.120077 APIC: 07: enabled 1
788 15:44:21.123532 APIC: 04: enabled 1
789 15:44:21.123614 APIC: 05: enabled 1
790 15:44:21.126959 Compare with tree...
791 15:44:21.130349 Root Device: enabled 1
792 15:44:21.133749 CPU_CLUSTER: 0: enabled 1
793 15:44:21.133910 APIC: 00: enabled 1
794 15:44:21.137205 APIC: 03: enabled 1
795 15:44:21.140099 APIC: 06: enabled 1
796 15:44:21.140202 APIC: 01: enabled 1
797 15:44:21.143630 APIC: 02: enabled 1
798 15:44:21.147126 APIC: 07: enabled 1
799 15:44:21.147260 APIC: 04: enabled 1
800 15:44:21.149886 APIC: 05: enabled 1
801 15:44:21.153633 DOMAIN: 0000: enabled 1
802 15:44:21.157042 PCI: 00:00.0: enabled 1
803 15:44:21.157144 PCI: 00:02.0: enabled 1
804 15:44:21.160216 PCI: 00:04.0: enabled 0
805 15:44:21.163751 PCI: 00:05.0: enabled 0
806 15:44:21.166746 PCI: 00:12.0: enabled 1
807 15:44:21.166830 PCI: 00:12.5: enabled 0
808 15:44:21.170466 PCI: 00:12.6: enabled 0
809 15:44:21.173222 PCI: 00:14.0: enabled 1
810 15:44:21.176710 USB0 port 0: enabled 1
811 15:44:21.180390 USB2 port 0: enabled 1
812 15:44:21.180501 USB2 port 1: enabled 1
813 15:44:21.183749 USB2 port 2: enabled 0
814 15:44:21.186642 USB2 port 3: enabled 0
815 15:44:21.190158 USB2 port 5: enabled 0
816 15:44:21.193571 USB2 port 6: enabled 1
817 15:44:21.197024 USB2 port 9: enabled 1
818 15:44:21.197132 USB3 port 0: enabled 1
819 15:44:21.200311 USB3 port 1: enabled 1
820 15:44:21.203524 USB3 port 2: enabled 1
821 15:44:21.206705 USB3 port 3: enabled 1
822 15:44:21.210007 USB3 port 4: enabled 0
823 15:44:21.210122 PCI: 00:14.1: enabled 0
824 15:44:21.213402 PCI: 00:14.3: enabled 1
825 15:44:21.216639 PCI: 00:14.5: enabled 0
826 15:44:21.220037 PCI: 00:15.0: enabled 1
827 15:44:21.223607 I2C: 00:15: enabled 1
828 15:44:21.223747 PCI: 00:15.1: enabled 1
829 15:44:21.226627 I2C: 00:5d: enabled 1
830 15:44:21.230124 GENERIC: 0.0: enabled 1
831 15:44:21.233587 PCI: 00:15.2: enabled 0
832 15:44:21.237026 PCI: 00:15.3: enabled 0
833 15:44:21.237137 PCI: 00:16.0: enabled 1
834 15:44:21.239940 PCI: 00:16.1: enabled 0
835 15:44:21.243290 PCI: 00:16.2: enabled 0
836 15:44:21.246906 PCI: 00:16.3: enabled 0
837 15:44:21.247060 PCI: 00:16.4: enabled 0
838 15:44:21.250300 PCI: 00:16.5: enabled 0
839 15:44:21.253654 PCI: 00:17.0: enabled 1
840 15:44:21.256938 PCI: 00:19.0: enabled 1
841 15:44:21.259833 I2C: 00:1a: enabled 1
842 15:44:21.259935 I2C: 00:38: enabled 1
843 15:44:21.263169 I2C: 00:39: enabled 1
844 15:44:21.266505 I2C: 00:3a: enabled 1
845 15:44:21.269974 I2C: 00:3b: enabled 1
846 15:44:21.270082 PCI: 00:19.1: enabled 0
847 15:44:21.273392 PCI: 00:19.2: enabled 0
848 15:44:21.276905 PCI: 00:1a.0: enabled 0
849 15:44:21.279816 PCI: 00:1c.0: enabled 0
850 15:44:21.283454 PCI: 00:1c.1: enabled 0
851 15:44:21.283567 PCI: 00:1c.2: enabled 0
852 15:44:21.286399 PCI: 00:1c.3: enabled 0
853 15:44:21.289812 PCI: 00:1c.4: enabled 0
854 15:44:21.293169 PCI: 00:1c.5: enabled 0
855 15:44:21.296574 PCI: 00:1c.6: enabled 0
856 15:44:21.296680 PCI: 00:1c.7: enabled 0
857 15:44:21.300035 PCI: 00:1d.0: enabled 1
858 15:44:21.303479 PCI: 00:1d.1: enabled 0
859 15:44:21.306410 PCI: 00:1d.2: enabled 0
860 15:44:21.309748 PCI: 00:1d.3: enabled 0
861 15:44:21.309848 PCI: 00:1d.4: enabled 0
862 15:44:21.313046 PCI: 00:1d.5: enabled 1
863 15:44:21.316326 PCI: 00:00.0: enabled 1
864 15:44:21.319607 PCI: 00:1e.0: enabled 1
865 15:44:21.322837 PCI: 00:1e.1: enabled 0
866 15:44:21.322980 PCI: 00:1e.2: enabled 1
867 15:44:21.326357 SPI: 00: enabled 1
868 15:44:21.329540 PCI: 00:1e.3: enabled 1
869 15:44:21.333047 SPI: 01: enabled 1
870 15:44:21.333141 PCI: 00:1f.0: enabled 1
871 15:44:21.336384 PNP: 0c09.0: enabled 1
872 15:44:21.339855 PCI: 00:1f.1: enabled 1
873 15:44:21.342793 PCI: 00:1f.2: enabled 1
874 15:44:21.342887 PCI: 00:1f.3: enabled 1
875 15:44:21.346315 PCI: 00:1f.4: enabled 1
876 15:44:21.349823 PCI: 00:1f.5: enabled 1
877 15:44:21.353209 PCI: 00:1f.6: enabled 0
878 15:44:21.356059 Root Device scanning...
879 15:44:21.359487 scan_static_bus for Root Device
880 15:44:21.359582 CPU_CLUSTER: 0 enabled
881 15:44:21.362746 DOMAIN: 0000 enabled
882 15:44:21.366207 DOMAIN: 0000 scanning...
883 15:44:21.369558 PCI: pci_scan_bus for bus 00
884 15:44:21.372883 PCI: 00:00.0 [8086/0000] ops
885 15:44:21.376395 PCI: 00:00.0 [8086/9b61] enabled
886 15:44:21.379749 PCI: 00:02.0 [8086/0000] bus ops
887 15:44:21.383175 PCI: 00:02.0 [8086/9b41] enabled
888 15:44:21.386081 PCI: 00:04.0 [8086/1903] disabled
889 15:44:21.389720 PCI: 00:08.0 [8086/1911] enabled
890 15:44:21.392725 PCI: 00:12.0 [8086/02f9] enabled
891 15:44:21.396082 PCI: 00:14.0 [8086/0000] bus ops
892 15:44:21.399719 PCI: 00:14.0 [8086/02ed] enabled
893 15:44:21.403023 PCI: 00:14.2 [8086/02ef] enabled
894 15:44:21.406440 PCI: 00:14.3 [8086/02f0] enabled
895 15:44:21.409754 PCI: 00:15.0 [8086/0000] bus ops
896 15:44:21.413162 PCI: 00:15.0 [8086/02e8] enabled
897 15:44:21.416005 PCI: 00:15.1 [8086/0000] bus ops
898 15:44:21.419533 PCI: 00:15.1 [8086/02e9] enabled
899 15:44:21.419671 PCI: 00:16.0 [8086/0000] ops
900 15:44:21.422979 PCI: 00:16.0 [8086/02e0] enabled
901 15:44:21.426318 PCI: 00:17.0 [8086/0000] ops
902 15:44:21.429472 PCI: 00:17.0 [8086/02d3] enabled
903 15:44:21.433179 PCI: 00:19.0 [8086/0000] bus ops
904 15:44:21.436171 PCI: 00:19.0 [8086/02c5] enabled
905 15:44:21.439612 PCI: 00:1d.0 [8086/0000] bus ops
906 15:44:21.443185 PCI: 00:1d.0 [8086/02b0] enabled
907 15:44:21.449459 PCI: Static device PCI: 00:1d.5 not found, disabling it.
908 15:44:21.452887 PCI: 00:1e.0 [8086/0000] ops
909 15:44:21.456395 PCI: 00:1e.0 [8086/02a8] enabled
910 15:44:21.459377 PCI: 00:1e.2 [8086/0000] bus ops
911 15:44:21.462778 PCI: 00:1e.2 [8086/02aa] enabled
912 15:44:21.466124 PCI: 00:1e.3 [8086/0000] bus ops
913 15:44:21.469603 PCI: 00:1e.3 [8086/02ab] enabled
914 15:44:21.473138 PCI: 00:1f.0 [8086/0000] bus ops
915 15:44:21.476555 PCI: 00:1f.0 [8086/0284] enabled
916 15:44:21.483379 PCI: Static device PCI: 00:1f.1 not found, disabling it.
917 15:44:21.486265 PCI: Static device PCI: 00:1f.2 not found, disabling it.
918 15:44:21.489791 PCI: 00:1f.3 [8086/0000] bus ops
919 15:44:21.493336 PCI: 00:1f.3 [8086/02c8] enabled
920 15:44:21.496268 PCI: 00:1f.4 [8086/0000] bus ops
921 15:44:21.499612 PCI: 00:1f.4 [8086/02a3] enabled
922 15:44:21.503033 PCI: 00:1f.5 [8086/0000] bus ops
923 15:44:21.506734 PCI: 00:1f.5 [8086/02a4] enabled
924 15:44:21.509732 PCI: Leftover static devices:
925 15:44:21.513055 PCI: 00:05.0
926 15:44:21.513155 PCI: 00:12.5
927 15:44:21.513229 PCI: 00:12.6
928 15:44:21.516472 PCI: 00:14.1
929 15:44:21.516567 PCI: 00:14.5
930 15:44:21.519446 PCI: 00:15.2
931 15:44:21.519566 PCI: 00:15.3
932 15:44:21.519672 PCI: 00:16.1
933 15:44:21.523213 PCI: 00:16.2
934 15:44:21.523324 PCI: 00:16.3
935 15:44:21.526073 PCI: 00:16.4
936 15:44:21.526174 PCI: 00:16.5
937 15:44:21.526250 PCI: 00:19.1
938 15:44:21.529396 PCI: 00:19.2
939 15:44:21.529497 PCI: 00:1a.0
940 15:44:21.533005 PCI: 00:1c.0
941 15:44:21.533108 PCI: 00:1c.1
942 15:44:21.536417 PCI: 00:1c.2
943 15:44:21.536516 PCI: 00:1c.3
944 15:44:21.536590 PCI: 00:1c.4
945 15:44:21.539837 PCI: 00:1c.5
946 15:44:21.539975 PCI: 00:1c.6
947 15:44:21.543119 PCI: 00:1c.7
948 15:44:21.543252 PCI: 00:1d.1
949 15:44:21.543340 PCI: 00:1d.2
950 15:44:21.545998 PCI: 00:1d.3
951 15:44:21.546132 PCI: 00:1d.4
952 15:44:21.549573 PCI: 00:1d.5
953 15:44:21.549697 PCI: 00:1e.1
954 15:44:21.552405 PCI: 00:1f.1
955 15:44:21.552541 PCI: 00:1f.2
956 15:44:21.552677 PCI: 00:1f.6
957 15:44:21.556284 PCI: Check your devicetree.cb.
958 15:44:21.559180 PCI: 00:02.0 scanning...
959 15:44:21.562741 scan_generic_bus for PCI: 00:02.0
960 15:44:21.566167 scan_generic_bus for PCI: 00:02.0 done
961 15:44:21.572831 scan_bus: scanning of bus PCI: 00:02.0 took 10192 usecs
962 15:44:21.576217 PCI: 00:14.0 scanning...
963 15:44:21.579212 scan_static_bus for PCI: 00:14.0
964 15:44:21.579345 USB0 port 0 enabled
965 15:44:21.582504 USB0 port 0 scanning...
966 15:44:21.585794 scan_static_bus for USB0 port 0
967 15:44:21.589304 USB2 port 0 enabled
968 15:44:21.589401 USB2 port 1 enabled
969 15:44:21.592641 USB2 port 2 disabled
970 15:44:21.595655 USB2 port 3 disabled
971 15:44:21.595821 USB2 port 5 disabled
972 15:44:21.599169 USB2 port 6 enabled
973 15:44:21.602714 USB2 port 9 enabled
974 15:44:21.602844 USB3 port 0 enabled
975 15:44:21.605638 USB3 port 1 enabled
976 15:44:21.605769 USB3 port 2 enabled
977 15:44:21.609010 USB3 port 3 enabled
978 15:44:21.612575 USB3 port 4 disabled
979 15:44:21.612699 USB2 port 0 scanning...
980 15:44:21.616397 scan_static_bus for USB2 port 0
981 15:44:21.622963 scan_static_bus for USB2 port 0 done
982 15:44:21.626331 scan_bus: scanning of bus USB2 port 0 took 9703 usecs
983 15:44:21.629201 USB2 port 1 scanning...
984 15:44:21.632534 scan_static_bus for USB2 port 1
985 15:44:21.636047 scan_static_bus for USB2 port 1 done
986 15:44:21.642944 scan_bus: scanning of bus USB2 port 1 took 9703 usecs
987 15:44:21.643134 USB2 port 6 scanning...
988 15:44:21.646377 scan_static_bus for USB2 port 6
989 15:44:21.652468 scan_static_bus for USB2 port 6 done
990 15:44:21.656156 scan_bus: scanning of bus USB2 port 6 took 9709 usecs
991 15:44:21.659355 USB2 port 9 scanning...
992 15:44:21.662575 scan_static_bus for USB2 port 9
993 15:44:21.665720 scan_static_bus for USB2 port 9 done
994 15:44:21.672384 scan_bus: scanning of bus USB2 port 9 took 9709 usecs
995 15:44:21.672529 USB3 port 0 scanning...
996 15:44:21.676345 scan_static_bus for USB3 port 0
997 15:44:21.682883 scan_static_bus for USB3 port 0 done
998 15:44:21.686337 scan_bus: scanning of bus USB3 port 0 took 9710 usecs
999 15:44:21.689129 USB3 port 1 scanning...
1000 15:44:21.692508 scan_static_bus for USB3 port 1
1001 15:44:21.696228 scan_static_bus for USB3 port 1 done
1002 15:44:21.702766 scan_bus: scanning of bus USB3 port 1 took 9691 usecs
1003 15:44:21.702886 USB3 port 2 scanning...
1004 15:44:21.706332 scan_static_bus for USB3 port 2
1005 15:44:21.712765 scan_static_bus for USB3 port 2 done
1006 15:44:21.716268 scan_bus: scanning of bus USB3 port 2 took 9707 usecs
1007 15:44:21.719759 USB3 port 3 scanning...
1008 15:44:21.722685 scan_static_bus for USB3 port 3
1009 15:44:21.725977 scan_static_bus for USB3 port 3 done
1010 15:44:21.732914 scan_bus: scanning of bus USB3 port 3 took 9710 usecs
1011 15:44:21.736202 scan_static_bus for USB0 port 0 done
1012 15:44:21.739448 scan_bus: scanning of bus USB0 port 0 took 155392 usecs
1013 15:44:21.745745 scan_static_bus for PCI: 00:14.0 done
1014 15:44:21.749163 scan_bus: scanning of bus PCI: 00:14.0 took 173001 usecs
1015 15:44:21.752619 PCI: 00:15.0 scanning...
1016 15:44:21.756088 scan_generic_bus for PCI: 00:15.0
1017 15:44:21.759765 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1018 15:44:21.765912 scan_generic_bus for PCI: 00:15.0 done
1019 15:44:21.769271 scan_bus: scanning of bus PCI: 00:15.0 took 14304 usecs
1020 15:44:21.772692 PCI: 00:15.1 scanning...
1021 15:44:21.776210 scan_generic_bus for PCI: 00:15.1
1022 15:44:21.779408 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1023 15:44:21.785950 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1024 15:44:21.789276 scan_generic_bus for PCI: 00:15.1 done
1025 15:44:21.792811 scan_bus: scanning of bus PCI: 00:15.1 took 18620 usecs
1026 15:44:21.795715 PCI: 00:19.0 scanning...
1027 15:44:21.799056 scan_generic_bus for PCI: 00:19.0
1028 15:44:21.805970 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1029 15:44:21.808893 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1030 15:44:21.812378 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1031 15:44:21.815979 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1032 15:44:21.822204 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1033 15:44:21.825738 scan_generic_bus for PCI: 00:19.0 done
1034 15:44:21.829239 scan_bus: scanning of bus PCI: 00:19.0 took 30730 usecs
1035 15:44:21.832488 PCI: 00:1d.0 scanning...
1036 15:44:21.835913 do_pci_scan_bridge for PCI: 00:1d.0
1037 15:44:21.839388 PCI: pci_scan_bus for bus 01
1038 15:44:21.842328 PCI: 01:00.0 [1c5c/1327] enabled
1039 15:44:21.845736 Enabling Common Clock Configuration
1040 15:44:21.852480 L1 Sub-State supported from root port 29
1041 15:44:21.852578 L1 Sub-State Support = 0xf
1042 15:44:21.855933 CommonModeRestoreTime = 0x28
1043 15:44:21.862468 Power On Value = 0x16, Power On Scale = 0x0
1044 15:44:21.862562 ASPM: Enabled L1
1045 15:44:21.869062 scan_bus: scanning of bus PCI: 00:1d.0 took 32798 usecs
1046 15:44:21.872366 PCI: 00:1e.2 scanning...
1047 15:44:21.875711 scan_generic_bus for PCI: 00:1e.2
1048 15:44:21.879070 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1049 15:44:21.882128 scan_generic_bus for PCI: 00:1e.2 done
1050 15:44:21.888995 scan_bus: scanning of bus PCI: 00:1e.2 took 14001 usecs
1051 15:44:21.889094 PCI: 00:1e.3 scanning...
1052 15:44:21.895745 scan_generic_bus for PCI: 00:1e.3
1053 15:44:21.899193 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1054 15:44:21.902503 scan_generic_bus for PCI: 00:1e.3 done
1055 15:44:21.909090 scan_bus: scanning of bus PCI: 00:1e.3 took 14008 usecs
1056 15:44:21.909186 PCI: 00:1f.0 scanning...
1057 15:44:21.912091 scan_static_bus for PCI: 00:1f.0
1058 15:44:21.915466 PNP: 0c09.0 enabled
1059 15:44:21.918992 scan_static_bus for PCI: 00:1f.0 done
1060 15:44:21.926032 scan_bus: scanning of bus PCI: 00:1f.0 took 12102 usecs
1061 15:44:21.928878 PCI: 00:1f.3 scanning...
1062 15:44:21.932263 scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs
1063 15:44:21.935754 PCI: 00:1f.4 scanning...
1064 15:44:21.938945 scan_generic_bus for PCI: 00:1f.4
1065 15:44:21.942310 scan_generic_bus for PCI: 00:1f.4 done
1066 15:44:21.949261 scan_bus: scanning of bus PCI: 00:1f.4 took 10198 usecs
1067 15:44:21.951963 PCI: 00:1f.5 scanning...
1068 15:44:21.955779 scan_generic_bus for PCI: 00:1f.5
1069 15:44:21.959162 scan_generic_bus for PCI: 00:1f.5 done
1070 15:44:21.965533 scan_bus: scanning of bus PCI: 00:1f.5 took 10197 usecs
1071 15:44:21.968802 scan_bus: scanning of bus DOMAIN: 0000 took 605142 usecs
1072 15:44:21.975708 scan_static_bus for Root Device done
1073 15:44:21.979242 scan_bus: scanning of bus Root Device took 625017 usecs
1074 15:44:21.979372 done
1075 15:44:21.982583 Chrome EC: UHEPI supported
1076 15:44:21.989408 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1077 15:44:21.996003 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1078 15:44:22.002249 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1079 15:44:22.009161 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1080 15:44:22.012363 SPI flash protection: WPSW=0 SRP0=0
1081 15:44:22.015886 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 15:44:22.022434 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1083 15:44:22.025576 found VGA at PCI: 00:02.0
1084 15:44:22.029025 Setting up VGA for PCI: 00:02.0
1085 15:44:22.032506 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 15:44:22.039073 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 15:44:22.042304 Allocating resources...
1088 15:44:22.042397 Reading resources...
1089 15:44:22.045785 Root Device read_resources bus 0 link: 0
1090 15:44:22.052465 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1091 15:44:22.055947 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1092 15:44:22.062228 DOMAIN: 0000 read_resources bus 0 link: 0
1093 15:44:22.068983 PCI: 00:14.0 read_resources bus 0 link: 0
1094 15:44:22.072309 USB0 port 0 read_resources bus 0 link: 0
1095 15:44:22.079711 USB0 port 0 read_resources bus 0 link: 0 done
1096 15:44:22.083199 PCI: 00:14.0 read_resources bus 0 link: 0 done
1097 15:44:22.090108 PCI: 00:15.0 read_resources bus 1 link: 0
1098 15:44:22.093562 PCI: 00:15.0 read_resources bus 1 link: 0 done
1099 15:44:22.100488 PCI: 00:15.1 read_resources bus 2 link: 0
1100 15:44:22.103904 PCI: 00:15.1 read_resources bus 2 link: 0 done
1101 15:44:22.110735 PCI: 00:19.0 read_resources bus 3 link: 0
1102 15:44:22.117655 PCI: 00:19.0 read_resources bus 3 link: 0 done
1103 15:44:22.121255 PCI: 00:1d.0 read_resources bus 1 link: 0
1104 15:44:22.127668 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1105 15:44:22.131284 PCI: 00:1e.2 read_resources bus 4 link: 0
1106 15:44:22.137621 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1107 15:44:22.140873 PCI: 00:1e.3 read_resources bus 5 link: 0
1108 15:44:22.148010 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1109 15:44:22.150889 PCI: 00:1f.0 read_resources bus 0 link: 0
1110 15:44:22.157615 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1111 15:44:22.161158 DOMAIN: 0000 read_resources bus 0 link: 0 done
1112 15:44:22.168129 Root Device read_resources bus 0 link: 0 done
1113 15:44:22.171059 Done reading resources.
1114 15:44:22.174369 Show resources in subtree (Root Device)...After reading.
1115 15:44:22.180879 Root Device child on link 0 CPU_CLUSTER: 0
1116 15:44:22.184288 CPU_CLUSTER: 0 child on link 0 APIC: 00
1117 15:44:22.184383 APIC: 00
1118 15:44:22.187775 APIC: 03
1119 15:44:22.187886 APIC: 06
1120 15:44:22.187960 APIC: 01
1121 15:44:22.191345 APIC: 02
1122 15:44:22.191437 APIC: 07
1123 15:44:22.194762 APIC: 04
1124 15:44:22.194854 APIC: 05
1125 15:44:22.197592 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1126 15:44:22.207906 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1127 15:44:22.217364 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1128 15:44:22.267577 PCI: 00:00.0
1129 15:44:22.267892 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1130 15:44:22.267989 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1131 15:44:22.268252 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1132 15:44:22.268540 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1133 15:44:22.268636 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1134 15:44:22.317522 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1135 15:44:22.317641 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1136 15:44:22.317918 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1137 15:44:22.317995 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1138 15:44:22.318077 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1139 15:44:22.331021 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1140 15:44:22.333954 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1141 15:44:22.340727 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1142 15:44:22.350981 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1143 15:44:22.360831 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1144 15:44:22.370854 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1145 15:44:22.370952 PCI: 00:02.0
1146 15:44:22.380702 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 15:44:22.390545 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 15:44:22.400425 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 15:44:22.400524 PCI: 00:04.0
1150 15:44:22.403939 PCI: 00:08.0
1151 15:44:22.413791 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 15:44:22.413886 PCI: 00:12.0
1153 15:44:22.423662 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 15:44:22.430130 PCI: 00:14.0 child on link 0 USB0 port 0
1155 15:44:22.440050 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 15:44:22.443641 USB0 port 0 child on link 0 USB2 port 0
1157 15:44:22.447124 USB2 port 0
1158 15:44:22.447253 USB2 port 1
1159 15:44:22.450474 USB2 port 2
1160 15:44:22.450565 USB2 port 3
1161 15:44:22.453758 USB2 port 5
1162 15:44:22.453849 USB2 port 6
1163 15:44:22.457135 USB2 port 9
1164 15:44:22.457263 USB3 port 0
1165 15:44:22.460422 USB3 port 1
1166 15:44:22.460515 USB3 port 2
1167 15:44:22.463790 USB3 port 3
1168 15:44:22.463881 USB3 port 4
1169 15:44:22.466792 PCI: 00:14.2
1170 15:44:22.477188 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1171 15:44:22.486567 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1172 15:44:22.486698 PCI: 00:14.3
1173 15:44:22.496837 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 15:44:22.503703 PCI: 00:15.0 child on link 0 I2C: 01:15
1175 15:44:22.513579 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 15:44:22.513702 I2C: 01:15
1177 15:44:22.516542 PCI: 00:15.1 child on link 0 I2C: 02:5d
1178 15:44:22.526583 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 15:44:22.530018 I2C: 02:5d
1180 15:44:22.530140 GENERIC: 0.0
1181 15:44:22.533532 PCI: 00:16.0
1182 15:44:22.543425 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 15:44:22.543555 PCI: 00:17.0
1184 15:44:22.553196 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1185 15:44:22.563379 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1186 15:44:22.569733 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1187 15:44:22.580102 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1188 15:44:22.586499 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1189 15:44:22.596286 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1190 15:44:22.599653 PCI: 00:19.0 child on link 0 I2C: 03:1a
1191 15:44:22.609608 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 15:44:22.613152 I2C: 03:1a
1193 15:44:22.613248 I2C: 03:38
1194 15:44:22.616504 I2C: 03:39
1195 15:44:22.616596 I2C: 03:3a
1196 15:44:22.619792 I2C: 03:3b
1197 15:44:22.622920 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1198 15:44:22.633005 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 15:44:22.639889 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 15:44:22.649714 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 15:44:22.652662 PCI: 01:00.0
1202 15:44:22.663215 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 15:44:22.663346 PCI: 00:1e.0
1204 15:44:22.676050 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1205 15:44:22.686342 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1206 15:44:22.689247 PCI: 00:1e.2 child on link 0 SPI: 00
1207 15:44:22.699134 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 15:44:22.699263 SPI: 00
1209 15:44:22.702592 PCI: 00:1e.3 child on link 0 SPI: 01
1210 15:44:22.712589 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 15:44:22.716280 SPI: 01
1212 15:44:22.719643 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 15:44:22.729441 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 15:44:22.736225 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 15:44:22.739486 PNP: 0c09.0
1216 15:44:22.746197 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 15:44:22.749239 PCI: 00:1f.3
1218 15:44:22.759064 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 15:44:22.769406 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 15:44:22.769502 PCI: 00:1f.4
1221 15:44:22.779017 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 15:44:22.789526 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1223 15:44:22.792683 PCI: 00:1f.5
1224 15:44:22.799091 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1225 15:44:22.806104 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1226 15:44:22.812796 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1227 15:44:22.819141 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1228 15:44:22.822496 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1229 15:44:22.825699 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1230 15:44:22.828991 PCI: 00:17.0 18 * [0x60 - 0x67] io
1231 15:44:22.835774 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1232 15:44:22.842726 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1233 15:44:22.848946 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1234 15:44:22.856048 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 15:44:22.865716 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 15:44:22.872163 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1237 15:44:22.875552 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1238 15:44:22.882105 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1239 15:44:22.889001 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1240 15:44:22.892325 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1241 15:44:22.895197 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1242 15:44:22.901892 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1243 15:44:22.905410 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1244 15:44:22.911738 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1245 15:44:22.915027 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1246 15:44:22.921888 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1247 15:44:22.925219 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1248 15:44:22.931960 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1249 15:44:22.935330 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1250 15:44:22.941950 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1251 15:44:22.945384 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1252 15:44:22.952233 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1253 15:44:22.955208 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1254 15:44:22.961975 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1255 15:44:22.965329 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1256 15:44:22.968216 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1257 15:44:22.975078 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1258 15:44:22.978582 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1259 15:44:22.985036 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1260 15:44:22.988463 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1261 15:44:22.995173 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1262 15:44:23.001720 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1263 15:44:23.005092 avoid_fixed_resources: DOMAIN: 0000
1264 15:44:23.011306 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1265 15:44:23.018333 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1266 15:44:23.024561 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1267 15:44:23.034532 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1268 15:44:23.041623 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1269 15:44:23.048102 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1270 15:44:23.058027 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1271 15:44:23.064430 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1272 15:44:23.071022 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1273 15:44:23.077983 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1274 15:44:23.087994 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1275 15:44:23.094204 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1276 15:44:23.097652 Setting resources...
1277 15:44:23.101114 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1278 15:44:23.107596 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1279 15:44:23.110780 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1280 15:44:23.114235 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1281 15:44:23.117565 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1282 15:44:23.124356 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1283 15:44:23.130582 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1284 15:44:23.137390 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1285 15:44:23.143987 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1286 15:44:23.150803 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1287 15:44:23.154270 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1288 15:44:23.160595 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1289 15:44:23.163796 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1290 15:44:23.170452 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1291 15:44:23.173988 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1292 15:44:23.180229 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1293 15:44:23.183554 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1294 15:44:23.190164 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1295 15:44:23.193511 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1296 15:44:23.200482 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1297 15:44:23.203373 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1298 15:44:23.206820 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1299 15:44:23.213595 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1300 15:44:23.216789 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1301 15:44:23.223500 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1302 15:44:23.226806 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1303 15:44:23.233704 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1304 15:44:23.237059 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1305 15:44:23.243427 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1306 15:44:23.246923 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1307 15:44:23.253190 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1308 15:44:23.256693 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1309 15:44:23.263157 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1310 15:44:23.273132 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1311 15:44:23.279626 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1312 15:44:23.286779 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1313 15:44:23.292927 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1314 15:44:23.299655 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1315 15:44:23.303135 Root Device assign_resources, bus 0 link: 0
1316 15:44:23.309400 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 15:44:23.315989 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1318 15:44:23.326111 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1319 15:44:23.332944 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1320 15:44:23.339750 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1321 15:44:23.349715 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1322 15:44:23.356271 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1323 15:44:23.362593 PCI: 00:14.0 assign_resources, bus 0 link: 0
1324 15:44:23.366173 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 15:44:23.376193 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1326 15:44:23.383024 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1327 15:44:23.392539 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1328 15:44:23.399327 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1329 15:44:23.406016 PCI: 00:15.0 assign_resources, bus 1 link: 0
1330 15:44:23.408982 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 15:44:23.415818 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1332 15:44:23.422253 PCI: 00:15.1 assign_resources, bus 2 link: 0
1333 15:44:23.425713 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 15:44:23.435783 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1335 15:44:23.442519 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1336 15:44:23.452152 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1337 15:44:23.458661 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1338 15:44:23.465332 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1339 15:44:23.475584 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1340 15:44:23.481797 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1341 15:44:23.488386 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1342 15:44:23.495562 PCI: 00:19.0 assign_resources, bus 3 link: 0
1343 15:44:23.498479 PCI: 00:19.0 assign_resources, bus 3 link: 0
1344 15:44:23.508737 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1345 15:44:23.515382 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1346 15:44:23.525071 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1347 15:44:23.528594 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1348 15:44:23.538061 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1349 15:44:23.541540 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1350 15:44:23.551715 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1351 15:44:23.558212 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1352 15:44:23.564576 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1353 15:44:23.568190 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1354 15:44:23.578085 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1355 15:44:23.581262 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1356 15:44:23.584764 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1357 15:44:23.591532 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1358 15:44:23.594846 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1359 15:44:23.601517 LPC: Trying to open IO window from 800 size 1ff
1360 15:44:23.607845 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1361 15:44:23.618156 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1362 15:44:23.624642 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1363 15:44:23.634409 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1364 15:44:23.638137 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 15:44:23.644557 Root Device assign_resources, bus 0 link: 0
1366 15:44:23.644679 Done setting resources.
1367 15:44:23.651359 Show resources in subtree (Root Device)...After assigning values.
1368 15:44:23.657908 Root Device child on link 0 CPU_CLUSTER: 0
1369 15:44:23.661364 CPU_CLUSTER: 0 child on link 0 APIC: 00
1370 15:44:23.661477 APIC: 00
1371 15:44:23.664281 APIC: 03
1372 15:44:23.664400 APIC: 06
1373 15:44:23.664505 APIC: 01
1374 15:44:23.667586 APIC: 02
1375 15:44:23.667665 APIC: 07
1376 15:44:23.667733 APIC: 04
1377 15:44:23.671136 APIC: 05
1378 15:44:23.674541 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1379 15:44:23.684104 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1380 15:44:23.694506 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1381 15:44:23.697746 PCI: 00:00.0
1382 15:44:23.707395 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1383 15:44:23.717559 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1384 15:44:23.727405 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1385 15:44:23.733974 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1386 15:44:23.744047 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1387 15:44:23.754011 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1388 15:44:23.763948 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1389 15:44:23.773607 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1390 15:44:23.780330 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1391 15:44:23.790184 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1392 15:44:23.800153 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1393 15:44:23.810051 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1394 15:44:23.820047 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1395 15:44:23.830047 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1396 15:44:23.839553 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1397 15:44:23.846639 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1398 15:44:23.849532 PCI: 00:02.0
1399 15:44:23.859512 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1400 15:44:23.870018 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1401 15:44:23.879267 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1402 15:44:23.879374 PCI: 00:04.0
1403 15:44:23.882778 PCI: 00:08.0
1404 15:44:23.892574 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1405 15:44:23.896376 PCI: 00:12.0
1406 15:44:23.906212 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1407 15:44:23.909166 PCI: 00:14.0 child on link 0 USB0 port 0
1408 15:44:23.919201 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1409 15:44:23.926136 USB0 port 0 child on link 0 USB2 port 0
1410 15:44:23.926258 USB2 port 0
1411 15:44:23.928993 USB2 port 1
1412 15:44:23.929115 USB2 port 2
1413 15:44:23.932463 USB2 port 3
1414 15:44:23.932554 USB2 port 5
1415 15:44:23.936094 USB2 port 6
1416 15:44:23.936185 USB2 port 9
1417 15:44:23.939602 USB3 port 0
1418 15:44:23.939693 USB3 port 1
1419 15:44:23.942265 USB3 port 2
1420 15:44:23.942356 USB3 port 3
1421 15:44:23.945576 USB3 port 4
1422 15:44:23.945666 PCI: 00:14.2
1423 15:44:23.955910 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1424 15:44:23.969078 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1425 15:44:23.969203 PCI: 00:14.3
1426 15:44:23.978707 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1427 15:44:23.985738 PCI: 00:15.0 child on link 0 I2C: 01:15
1428 15:44:23.995596 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1429 15:44:23.995695 I2C: 01:15
1430 15:44:23.998813 PCI: 00:15.1 child on link 0 I2C: 02:5d
1431 15:44:24.008788 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1432 15:44:24.012194 I2C: 02:5d
1433 15:44:24.012316 GENERIC: 0.0
1434 15:44:24.015169 PCI: 00:16.0
1435 15:44:24.025476 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1436 15:44:24.028746 PCI: 00:17.0
1437 15:44:24.038318 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1438 15:44:24.048278 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1439 15:44:24.055159 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1440 15:44:24.064950 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1441 15:44:24.075086 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1442 15:44:24.085036 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1443 15:44:24.087930 PCI: 00:19.0 child on link 0 I2C: 03:1a
1444 15:44:24.097889 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1445 15:44:24.101431 I2C: 03:1a
1446 15:44:24.101547 I2C: 03:38
1447 15:44:24.104746 I2C: 03:39
1448 15:44:24.104865 I2C: 03:3a
1449 15:44:24.107877 I2C: 03:3b
1450 15:44:24.111429 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1451 15:44:24.121225 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1452 15:44:24.131155 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1453 15:44:24.140858 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1454 15:44:24.144412 PCI: 01:00.0
1455 15:44:24.154302 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1456 15:44:24.154392 PCI: 00:1e.0
1457 15:44:24.167422 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 15:44:24.177204 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1459 15:44:24.180522 PCI: 00:1e.2 child on link 0 SPI: 00
1460 15:44:24.190558 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1461 15:44:24.194035 SPI: 00
1462 15:44:24.197501 PCI: 00:1e.3 child on link 0 SPI: 01
1463 15:44:24.207466 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1464 15:44:24.207564 SPI: 01
1465 15:44:24.213639 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 15:44:24.220652 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 15:44:24.230231 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 15:44:24.230349 PNP: 0c09.0
1469 15:44:24.240550 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1470 15:44:24.243508 PCI: 00:1f.3
1471 15:44:24.253481 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1472 15:44:24.263368 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1473 15:44:24.263476 PCI: 00:1f.4
1474 15:44:24.273128 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1475 15:44:24.283174 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1476 15:44:24.286357 PCI: 00:1f.5
1477 15:44:24.296484 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1478 15:44:24.300065 Done allocating resources.
1479 15:44:24.303392 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1480 15:44:24.306340 Enabling resources...
1481 15:44:24.309815 PCI: 00:00.0 subsystem <- 8086/9b61
1482 15:44:24.313293 PCI: 00:00.0 cmd <- 06
1483 15:44:24.316737 PCI: 00:02.0 subsystem <- 8086/9b41
1484 15:44:24.320013 PCI: 00:02.0 cmd <- 03
1485 15:44:24.322833 PCI: 00:08.0 cmd <- 06
1486 15:44:24.326222 PCI: 00:12.0 subsystem <- 8086/02f9
1487 15:44:24.329607 PCI: 00:12.0 cmd <- 02
1488 15:44:24.332835 PCI: 00:14.0 subsystem <- 8086/02ed
1489 15:44:24.336131 PCI: 00:14.0 cmd <- 02
1490 15:44:24.336224 PCI: 00:14.2 cmd <- 02
1491 15:44:24.342957 PCI: 00:14.3 subsystem <- 8086/02f0
1492 15:44:24.343048 PCI: 00:14.3 cmd <- 02
1493 15:44:24.346361 PCI: 00:15.0 subsystem <- 8086/02e8
1494 15:44:24.349779 PCI: 00:15.0 cmd <- 02
1495 15:44:24.353153 PCI: 00:15.1 subsystem <- 8086/02e9
1496 15:44:24.356024 PCI: 00:15.1 cmd <- 02
1497 15:44:24.359869 PCI: 00:16.0 subsystem <- 8086/02e0
1498 15:44:24.363294 PCI: 00:16.0 cmd <- 02
1499 15:44:24.366121 PCI: 00:17.0 subsystem <- 8086/02d3
1500 15:44:24.369705 PCI: 00:17.0 cmd <- 03
1501 15:44:24.373182 PCI: 00:19.0 subsystem <- 8086/02c5
1502 15:44:24.376121 PCI: 00:19.0 cmd <- 02
1503 15:44:24.379694 PCI: 00:1d.0 bridge ctrl <- 0013
1504 15:44:24.382590 PCI: 00:1d.0 subsystem <- 8086/02b0
1505 15:44:24.386145 PCI: 00:1d.0 cmd <- 06
1506 15:44:24.389488 PCI: 00:1e.0 subsystem <- 8086/02a8
1507 15:44:24.392563 PCI: 00:1e.0 cmd <- 06
1508 15:44:24.396020 PCI: 00:1e.2 subsystem <- 8086/02aa
1509 15:44:24.396113 PCI: 00:1e.2 cmd <- 06
1510 15:44:24.402690 PCI: 00:1e.3 subsystem <- 8086/02ab
1511 15:44:24.402782 PCI: 00:1e.3 cmd <- 02
1512 15:44:24.406260 PCI: 00:1f.0 subsystem <- 8086/0284
1513 15:44:24.409186 PCI: 00:1f.0 cmd <- 407
1514 15:44:24.412731 PCI: 00:1f.3 subsystem <- 8086/02c8
1515 15:44:24.416228 PCI: 00:1f.3 cmd <- 02
1516 15:44:24.419104 PCI: 00:1f.4 subsystem <- 8086/02a3
1517 15:44:24.422514 PCI: 00:1f.4 cmd <- 03
1518 15:44:24.425916 PCI: 00:1f.5 subsystem <- 8086/02a4
1519 15:44:24.429154 PCI: 00:1f.5 cmd <- 406
1520 15:44:24.437953 PCI: 01:00.0 cmd <- 02
1521 15:44:24.443079 done.
1522 15:44:24.454778 ME: Version: 14.0.39.1367
1523 15:44:24.461180 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1524 15:44:24.464561 Initializing devices...
1525 15:44:24.464653 Root Device init ...
1526 15:44:24.471454 Chrome EC: Set SMI mask to 0x0000000000000000
1527 15:44:24.474359 Chrome EC: clear events_b mask to 0x0000000000000000
1528 15:44:24.481401 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1529 15:44:24.487742 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1530 15:44:24.494647 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1531 15:44:24.497995 Chrome EC: Set WAKE mask to 0x0000000000000000
1532 15:44:24.501081 Root Device init finished in 35225 usecs
1533 15:44:24.504935 CPU_CLUSTER: 0 init ...
1534 15:44:24.511028 CPU_CLUSTER: 0 init finished in 2449 usecs
1535 15:44:24.515651 PCI: 00:00.0 init ...
1536 15:44:24.519129 CPU TDP: 15 Watts
1537 15:44:24.522460 CPU PL2 = 64 Watts
1538 15:44:24.525360 PCI: 00:00.0 init finished in 7080 usecs
1539 15:44:24.528946 PCI: 00:02.0 init ...
1540 15:44:24.532340 PCI: 00:02.0 init finished in 2254 usecs
1541 15:44:24.535605 PCI: 00:08.0 init ...
1542 15:44:24.538936 PCI: 00:08.0 init finished in 2252 usecs
1543 15:44:24.542242 PCI: 00:12.0 init ...
1544 15:44:24.545296 PCI: 00:12.0 init finished in 2244 usecs
1545 15:44:24.548761 PCI: 00:14.0 init ...
1546 15:44:24.552219 PCI: 00:14.0 init finished in 2252 usecs
1547 15:44:24.555103 PCI: 00:14.2 init ...
1548 15:44:24.558560 PCI: 00:14.2 init finished in 2251 usecs
1549 15:44:24.562065 PCI: 00:14.3 init ...
1550 15:44:24.565534 PCI: 00:14.3 init finished in 2263 usecs
1551 15:44:24.568901 PCI: 00:15.0 init ...
1552 15:44:24.571673 DW I2C bus 0 at 0xd121f000 (400 KHz)
1553 15:44:24.575381 PCI: 00:15.0 init finished in 5969 usecs
1554 15:44:24.578483 PCI: 00:15.1 init ...
1555 15:44:24.581879 DW I2C bus 1 at 0xd1220000 (400 KHz)
1556 15:44:24.584876 PCI: 00:15.1 init finished in 5975 usecs
1557 15:44:24.588735 PCI: 00:16.0 init ...
1558 15:44:24.592342 PCI: 00:16.0 init finished in 2252 usecs
1559 15:44:24.595736 PCI: 00:19.0 init ...
1560 15:44:24.599334 DW I2C bus 4 at 0xd1222000 (400 KHz)
1561 15:44:24.606158 PCI: 00:19.0 init finished in 5977 usecs
1562 15:44:24.606250 PCI: 00:1d.0 init ...
1563 15:44:24.608965 Initializing PCH PCIe bridge.
1564 15:44:24.612287 PCI: 00:1d.0 init finished in 5285 usecs
1565 15:44:24.617393 PCI: 00:1f.0 init ...
1566 15:44:24.620526 IOAPIC: Initializing IOAPIC at 0xfec00000
1567 15:44:24.627449 IOAPIC: Bootstrap Processor Local APIC = 0x00
1568 15:44:24.627543 IOAPIC: ID = 0x02
1569 15:44:24.631018 IOAPIC: Dumping registers
1570 15:44:24.634011 reg 0x0000: 0x02000000
1571 15:44:24.637466 reg 0x0001: 0x00770020
1572 15:44:24.637597 reg 0x0002: 0x00000000
1573 15:44:24.644326 PCI: 00:1f.0 init finished in 23529 usecs
1574 15:44:24.647766 PCI: 00:1f.4 init ...
1575 15:44:24.650517 PCI: 00:1f.4 init finished in 2262 usecs
1576 15:44:24.661644 PCI: 01:00.0 init ...
1577 15:44:24.665165 PCI: 01:00.0 init finished in 2252 usecs
1578 15:44:24.669209 PNP: 0c09.0 init ...
1579 15:44:24.672580 Google Chrome EC uptime: 11.055 seconds
1580 15:44:24.679096 Google Chrome AP resets since EC boot: 0
1581 15:44:24.682105 Google Chrome most recent AP reset causes:
1582 15:44:24.689188 Google Chrome EC reset flags at last EC boot: reset-pin
1583 15:44:24.692586 PNP: 0c09.0 init finished in 20573 usecs
1584 15:44:24.695800 Devices initialized
1585 15:44:24.695900 Show all devs... After init.
1586 15:44:24.698947 Root Device: enabled 1
1587 15:44:24.702208 CPU_CLUSTER: 0: enabled 1
1588 15:44:24.705369 DOMAIN: 0000: enabled 1
1589 15:44:24.705492 APIC: 00: enabled 1
1590 15:44:24.708601 PCI: 00:00.0: enabled 1
1591 15:44:24.711979 PCI: 00:02.0: enabled 1
1592 15:44:24.715575 PCI: 00:04.0: enabled 0
1593 15:44:24.715655 PCI: 00:05.0: enabled 0
1594 15:44:24.718371 PCI: 00:12.0: enabled 1
1595 15:44:24.721836 PCI: 00:12.5: enabled 0
1596 15:44:24.725397 PCI: 00:12.6: enabled 0
1597 15:44:24.725518 PCI: 00:14.0: enabled 1
1598 15:44:24.728276 PCI: 00:14.1: enabled 0
1599 15:44:24.731925 PCI: 00:14.3: enabled 1
1600 15:44:24.732045 PCI: 00:14.5: enabled 0
1601 15:44:24.734888 PCI: 00:15.0: enabled 1
1602 15:44:24.738207 PCI: 00:15.1: enabled 1
1603 15:44:24.741756 PCI: 00:15.2: enabled 0
1604 15:44:24.741875 PCI: 00:15.3: enabled 0
1605 15:44:24.745415 PCI: 00:16.0: enabled 1
1606 15:44:24.748397 PCI: 00:16.1: enabled 0
1607 15:44:24.752109 PCI: 00:16.2: enabled 0
1608 15:44:24.752206 PCI: 00:16.3: enabled 0
1609 15:44:24.755025 PCI: 00:16.4: enabled 0
1610 15:44:24.758468 PCI: 00:16.5: enabled 0
1611 15:44:24.761688 PCI: 00:17.0: enabled 1
1612 15:44:24.761784 PCI: 00:19.0: enabled 1
1613 15:44:24.764777 PCI: 00:19.1: enabled 0
1614 15:44:24.768036 PCI: 00:19.2: enabled 0
1615 15:44:24.771670 PCI: 00:1a.0: enabled 0
1616 15:44:24.771766 PCI: 00:1c.0: enabled 0
1617 15:44:24.775025 PCI: 00:1c.1: enabled 0
1618 15:44:24.777964 PCI: 00:1c.2: enabled 0
1619 15:44:24.778059 PCI: 00:1c.3: enabled 0
1620 15:44:24.781452 PCI: 00:1c.4: enabled 0
1621 15:44:24.784754 PCI: 00:1c.5: enabled 0
1622 15:44:24.788413 PCI: 00:1c.6: enabled 0
1623 15:44:24.788505 PCI: 00:1c.7: enabled 0
1624 15:44:24.791260 PCI: 00:1d.0: enabled 1
1625 15:44:24.794656 PCI: 00:1d.1: enabled 0
1626 15:44:24.797929 PCI: 00:1d.2: enabled 0
1627 15:44:24.798015 PCI: 00:1d.3: enabled 0
1628 15:44:24.801341 PCI: 00:1d.4: enabled 0
1629 15:44:24.804813 PCI: 00:1d.5: enabled 0
1630 15:44:24.808136 PCI: 00:1e.0: enabled 1
1631 15:44:24.808227 PCI: 00:1e.1: enabled 0
1632 15:44:24.811280 PCI: 00:1e.2: enabled 1
1633 15:44:24.814389 PCI: 00:1e.3: enabled 1
1634 15:44:24.814479 PCI: 00:1f.0: enabled 1
1635 15:44:24.818129 PCI: 00:1f.1: enabled 0
1636 15:44:24.821411 PCI: 00:1f.2: enabled 0
1637 15:44:24.824400 PCI: 00:1f.3: enabled 1
1638 15:44:24.824492 PCI: 00:1f.4: enabled 1
1639 15:44:24.828032 PCI: 00:1f.5: enabled 1
1640 15:44:24.831268 PCI: 00:1f.6: enabled 0
1641 15:44:24.834623 USB0 port 0: enabled 1
1642 15:44:24.834707 I2C: 01:15: enabled 1
1643 15:44:24.837486 I2C: 02:5d: enabled 1
1644 15:44:24.841040 GENERIC: 0.0: enabled 1
1645 15:44:24.841124 I2C: 03:1a: enabled 1
1646 15:44:24.844522 I2C: 03:38: enabled 1
1647 15:44:24.848029 I2C: 03:39: enabled 1
1648 15:44:24.848109 I2C: 03:3a: enabled 1
1649 15:44:24.850890 I2C: 03:3b: enabled 1
1650 15:44:24.854256 PCI: 00:00.0: enabled 1
1651 15:44:24.854334 SPI: 00: enabled 1
1652 15:44:24.857823 SPI: 01: enabled 1
1653 15:44:24.860739 PNP: 0c09.0: enabled 1
1654 15:44:24.860817 USB2 port 0: enabled 1
1655 15:44:24.864094 USB2 port 1: enabled 1
1656 15:44:24.867550 USB2 port 2: enabled 0
1657 15:44:24.870836 USB2 port 3: enabled 0
1658 15:44:24.870913 USB2 port 5: enabled 0
1659 15:44:24.874275 USB2 port 6: enabled 1
1660 15:44:24.877602 USB2 port 9: enabled 1
1661 15:44:24.877685 USB3 port 0: enabled 1
1662 15:44:24.881076 USB3 port 1: enabled 1
1663 15:44:24.884014 USB3 port 2: enabled 1
1664 15:44:24.884105 USB3 port 3: enabled 1
1665 15:44:24.887481 USB3 port 4: enabled 0
1666 15:44:24.890937 APIC: 03: enabled 1
1667 15:44:24.891048 APIC: 06: enabled 1
1668 15:44:24.893830 APIC: 01: enabled 1
1669 15:44:24.897386 APIC: 02: enabled 1
1670 15:44:24.897540 APIC: 07: enabled 1
1671 15:44:24.900745 APIC: 04: enabled 1
1672 15:44:24.904244 APIC: 05: enabled 1
1673 15:44:24.904409 PCI: 00:08.0: enabled 1
1674 15:44:24.907531 PCI: 00:14.2: enabled 1
1675 15:44:24.910386 PCI: 01:00.0: enabled 1
1676 15:44:24.914373 Disabling ACPI via APMC:
1677 15:44:24.917788 done.
1678 15:44:24.921136 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1679 15:44:24.924128 ELOG: NV offset 0xaf0000 size 0x4000
1680 15:44:24.931403 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1681 15:44:24.937897 ELOG: Event(17) added with size 13 at 2023-08-07 15:44:14 UTC
1682 15:44:24.944225 ELOG: Event(92) added with size 9 at 2023-08-07 15:44:14 UTC
1683 15:44:24.950863 ELOG: Event(16) added with size 11 at 2023-08-07 15:44:14 UTC
1684 15:44:24.954266 Erasing flash addr af0000 + 4 KiB
1685 15:44:25.017910 ELOG: Event(93) added with size 9 at 2023-08-07 15:44:14 UTC
1686 15:44:25.024691 ELOG: Event(9A) added with size 9 at 2023-08-07 15:44:14 UTC
1687 15:44:25.031074 ELOG: Event(9E) added with size 10 at 2023-08-07 15:44:14 UTC
1688 15:44:25.037794 ELOG: Event(9F) added with size 14 at 2023-08-07 15:44:14 UTC
1689 15:44:25.044246 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 55
1690 15:44:25.050920 ELOG: Event(A1) added with size 10 at 2023-08-07 15:44:14 UTC
1691 15:44:25.057378 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1692 15:44:25.064234 ELOG: Event(A0) added with size 9 at 2023-08-07 15:44:14 UTC
1693 15:44:25.067596 elog_add_boot_reason: Logged dev mode boot
1694 15:44:25.070954 Finalize devices...
1695 15:44:25.071047 PCI: 00:17.0 final
1696 15:44:25.074383 Devices finalized
1697 15:44:25.080777 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1698 15:44:25.084175 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1699 15:44:25.087019 ME: HFSTS1 : 0x90000245
1700 15:44:25.094166 ME: HFSTS2 : 0x3B850126
1701 15:44:25.097139 ME: HFSTS3 : 0x00000020
1702 15:44:25.100657 ME: HFSTS4 : 0x00004800
1703 15:44:25.104242 ME: HFSTS5 : 0x00000000
1704 15:44:25.110579 ME: HFSTS6 : 0x40400006
1705 15:44:25.114051 ME: Manufacturing Mode : NO
1706 15:44:25.116976 ME: FW Partition Table : OK
1707 15:44:25.120612 ME: Bringup Loader Failure : NO
1708 15:44:25.123647 ME: Firmware Init Complete : YES
1709 15:44:25.126959 ME: Boot Options Present : NO
1710 15:44:25.130327 ME: Update In Progress : NO
1711 15:44:25.133861 ME: D0i3 Support : YES
1712 15:44:25.136616 ME: Low Power State Enabled : NO
1713 15:44:25.139940 ME: CPU Replaced : NO
1714 15:44:25.143268 ME: CPU Replacement Valid : YES
1715 15:44:25.147002 ME: Current Working State : 5
1716 15:44:25.149923 ME: Current Operation State : 1
1717 15:44:25.153388 ME: Current Operation Mode : 0
1718 15:44:25.156827 ME: Error Code : 0
1719 15:44:25.160215 ME: CPU Debug Disabled : YES
1720 15:44:25.163550 ME: TXT Support : NO
1721 15:44:25.166781 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1722 15:44:25.173608 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1723 15:44:25.176677 CBFS @ c08000 size 3f8000
1724 15:44:25.179957 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1725 15:44:25.183159 CBFS: Locating 'fallback/dsdt.aml'
1726 15:44:25.190263 CBFS: Found @ offset 10bb80 size 3fa5
1727 15:44:25.193651 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1728 15:44:25.197106 CBFS @ c08000 size 3f8000
1729 15:44:25.203724 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1730 15:44:25.206613 CBFS: Locating 'fallback/slic'
1731 15:44:25.210144 CBFS: 'fallback/slic' not found.
1732 15:44:25.213599 ACPI: Writing ACPI tables at 99b3e000.
1733 15:44:25.216536 ACPI: * FACS
1734 15:44:25.216619 ACPI: * DSDT
1735 15:44:25.223306 Ramoops buffer: 0x100000@0x99a3d000.
1736 15:44:25.226356 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1737 15:44:25.230211 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1738 15:44:25.233462 Google Chrome EC: version:
1739 15:44:25.236948 ro: helios_v2.0.2659-56403530b
1740 15:44:25.240167 rw: helios_v2.0.2849-c41de27e7d
1741 15:44:25.243416 running image: 1
1742 15:44:25.246908 ACPI: * FADT
1743 15:44:25.247001 SCI is IRQ9
1744 15:44:25.250276 ACPI: added table 1/32, length now 40
1745 15:44:25.253524 ACPI: * SSDT
1746 15:44:25.256961 Found 1 CPU(s) with 8 core(s) each.
1747 15:44:25.259875 Error: Could not locate 'wifi_sar' in VPD.
1748 15:44:25.263377 Checking CBFS for default SAR values
1749 15:44:25.269676 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1750 15:44:25.273655 CBFS @ c08000 size 3f8000
1751 15:44:25.276630 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1752 15:44:25.283477 CBFS: Locating 'wifi_sar_defaults.hex'
1753 15:44:25.286952 CBFS: Found @ offset 5fac0 size 77
1754 15:44:25.289890 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1755 15:44:25.293448 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1756 15:44:25.299748 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1757 15:44:25.306459 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1758 15:44:25.309959 failed to find key in VPD: dsm_calib_r0_0
1759 15:44:25.316345 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1760 15:44:25.323127 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1761 15:44:25.326707 failed to find key in VPD: dsm_calib_r0_1
1762 15:44:25.336521 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1763 15:44:25.342780 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1764 15:44:25.346128 failed to find key in VPD: dsm_calib_r0_2
1765 15:44:25.355985 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1766 15:44:25.359192 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1767 15:44:25.362524 failed to find key in VPD: dsm_calib_r0_3
1768 15:44:25.372969 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1769 15:44:25.379590 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1770 15:44:25.382473 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1771 15:44:25.385971 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1772 15:44:25.389446 EC returned error result code 1
1773 15:44:25.393349 EC returned error result code 1
1774 15:44:25.397305 EC returned error result code 1
1775 15:44:25.403561 PS2K: Bad resp from EC. Vivaldi disabled!
1776 15:44:25.406725 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1777 15:44:25.413277 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1778 15:44:25.420012 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1779 15:44:25.423466 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1780 15:44:25.429915 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1781 15:44:25.436707 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1782 15:44:25.443509 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1783 15:44:25.446389 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1784 15:44:25.453879 ACPI: added table 2/32, length now 44
1785 15:44:25.453971 ACPI: * MCFG
1786 15:44:25.456538 ACPI: added table 3/32, length now 48
1787 15:44:25.459758 ACPI: * TPM2
1788 15:44:25.462992 TPM2 log created at 99a2d000
1789 15:44:25.466123 ACPI: added table 4/32, length now 52
1790 15:44:25.466218 ACPI: * MADT
1791 15:44:25.469820 SCI is IRQ9
1792 15:44:25.473160 ACPI: added table 5/32, length now 56
1793 15:44:25.473252 current = 99b43ac0
1794 15:44:25.476501 ACPI: * DMAR
1795 15:44:25.479938 ACPI: added table 6/32, length now 60
1796 15:44:25.483161 ACPI: * IGD OpRegion
1797 15:44:25.483277 GMA: Found VBT in CBFS
1798 15:44:25.486586 GMA: Found valid VBT in CBFS
1799 15:44:25.489374 ACPI: added table 7/32, length now 64
1800 15:44:25.492918 ACPI: * HPET
1801 15:44:25.496369 ACPI: added table 8/32, length now 68
1802 15:44:25.496463 ACPI: done.
1803 15:44:25.499749 ACPI tables: 31744 bytes.
1804 15:44:25.503202 smbios_write_tables: 99a2c000
1805 15:44:25.506623 EC returned error result code 3
1806 15:44:25.510071 Couldn't obtain OEM name from CBI
1807 15:44:25.513336 Create SMBIOS type 17
1808 15:44:25.516687 PCI: 00:00.0 (Intel Cannonlake)
1809 15:44:25.519766 PCI: 00:14.3 (Intel WiFi)
1810 15:44:25.523152 SMBIOS tables: 939 bytes.
1811 15:44:25.526501 Writing table forward entry at 0x00000500
1812 15:44:25.533407 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1813 15:44:25.536260 Writing coreboot table at 0x99b62000
1814 15:44:25.543162 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1815 15:44:25.546548 1. 0000000000001000-000000000009ffff: RAM
1816 15:44:25.549518 2. 00000000000a0000-00000000000fffff: RESERVED
1817 15:44:25.556436 3. 0000000000100000-0000000099a2bfff: RAM
1818 15:44:25.559823 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1819 15:44:25.566185 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1820 15:44:25.572764 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1821 15:44:25.576077 7. 000000009a000000-000000009f7fffff: RESERVED
1822 15:44:25.582759 8. 00000000e0000000-00000000efffffff: RESERVED
1823 15:44:25.586192 9. 00000000fc000000-00000000fc000fff: RESERVED
1824 15:44:25.589572 10. 00000000fe000000-00000000fe00ffff: RESERVED
1825 15:44:25.595958 11. 00000000fed10000-00000000fed17fff: RESERVED
1826 15:44:25.599377 12. 00000000fed80000-00000000fed83fff: RESERVED
1827 15:44:25.606263 13. 00000000fed90000-00000000fed91fff: RESERVED
1828 15:44:25.609436 14. 00000000feda0000-00000000feda1fff: RESERVED
1829 15:44:25.612728 15. 0000000100000000-000000045e7fffff: RAM
1830 15:44:25.618976 Graphics framebuffer located at 0xc0000000
1831 15:44:25.622519 Passing 5 GPIOs to payload:
1832 15:44:25.625902 NAME | PORT | POLARITY | VALUE
1833 15:44:25.632277 write protect | undefined | high | low
1834 15:44:25.636027 lid | undefined | high | high
1835 15:44:25.642280 power | undefined | high | low
1836 15:44:25.649383 oprom | undefined | high | low
1837 15:44:25.652368 EC in RW | 0x000000cb | high | low
1838 15:44:25.655684 Board ID: 4
1839 15:44:25.659129 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1840 15:44:25.662613 CBFS @ c08000 size 3f8000
1841 15:44:25.668996 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1842 15:44:25.672319 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1843 15:44:25.675566 coreboot table: 1492 bytes.
1844 15:44:25.678879 IMD ROOT 0. 99fff000 00001000
1845 15:44:25.682128 IMD SMALL 1. 99ffe000 00001000
1846 15:44:25.685512 FSP MEMORY 2. 99c4e000 003b0000
1847 15:44:25.688926 CONSOLE 3. 99c2e000 00020000
1848 15:44:25.692342 FMAP 4. 99c2d000 0000054e
1849 15:44:25.695686 TIME STAMP 5. 99c2c000 00000910
1850 15:44:25.699028 VBOOT WORK 6. 99c18000 00014000
1851 15:44:25.701931 MRC DATA 7. 99c16000 00001958
1852 15:44:25.705468 ROMSTG STCK 8. 99c15000 00001000
1853 15:44:25.708885 AFTER CAR 9. 99c0b000 0000a000
1854 15:44:25.712238 RAMSTAGE 10. 99baf000 0005c000
1855 15:44:25.715726 REFCODE 11. 99b7a000 00035000
1856 15:44:25.718647 SMM BACKUP 12. 99b6a000 00010000
1857 15:44:25.722305 COREBOOT 13. 99b62000 00008000
1858 15:44:25.725222 ACPI 14. 99b3e000 00024000
1859 15:44:25.728749 ACPI GNVS 15. 99b3d000 00001000
1860 15:44:25.732178 RAMOOPS 16. 99a3d000 00100000
1861 15:44:25.735541 TPM2 TCGLOG17. 99a2d000 00010000
1862 15:44:25.738940 SMBIOS 18. 99a2c000 00000800
1863 15:44:25.742333 IMD small region:
1864 15:44:25.745503 IMD ROOT 0. 99ffec00 00000400
1865 15:44:25.748692 FSP RUNTIME 1. 99ffebe0 00000004
1866 15:44:25.752248 EC HOSTEVENT 2. 99ffebc0 00000008
1867 15:44:25.755514 POWER STATE 3. 99ffeb80 00000040
1868 15:44:25.758904 ROMSTAGE 4. 99ffeb60 00000004
1869 15:44:25.761901 MEM INFO 5. 99ffe9a0 000001b9
1870 15:44:25.765501 VPD 6. 99ffe920 0000006c
1871 15:44:25.768394 MTRR: Physical address space:
1872 15:44:25.775249 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1873 15:44:25.781787 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1874 15:44:25.788705 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1875 15:44:25.795265 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1876 15:44:25.801623 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1877 15:44:25.805145 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1878 15:44:25.811897 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1879 15:44:25.818319 MTRR: Fixed MSR 0x250 0x0606060606060606
1880 15:44:25.821769 MTRR: Fixed MSR 0x258 0x0606060606060606
1881 15:44:25.824671 MTRR: Fixed MSR 0x259 0x0000000000000000
1882 15:44:25.828518 MTRR: Fixed MSR 0x268 0x0606060606060606
1883 15:44:25.835110 MTRR: Fixed MSR 0x269 0x0606060606060606
1884 15:44:25.838032 MTRR: Fixed MSR 0x26a 0x0606060606060606
1885 15:44:25.841359 MTRR: Fixed MSR 0x26b 0x0606060606060606
1886 15:44:25.844884 MTRR: Fixed MSR 0x26c 0x0606060606060606
1887 15:44:25.848421 MTRR: Fixed MSR 0x26d 0x0606060606060606
1888 15:44:25.854617 MTRR: Fixed MSR 0x26e 0x0606060606060606
1889 15:44:25.858165 MTRR: Fixed MSR 0x26f 0x0606060606060606
1890 15:44:25.861164 call enable_fixed_mtrr()
1891 15:44:25.864510 CPU physical address size: 39 bits
1892 15:44:25.867750 MTRR: default type WB/UC MTRR counts: 6/8.
1893 15:44:25.871357 MTRR: WB selected as default type.
1894 15:44:25.877758 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1895 15:44:25.884563 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1896 15:44:25.891351 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1897 15:44:25.897476 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1898 15:44:25.904037 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1899 15:44:25.911130 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1900 15:44:25.914039 MTRR: Fixed MSR 0x250 0x0606060606060606
1901 15:44:25.917402 MTRR: Fixed MSR 0x258 0x0606060606060606
1902 15:44:25.924310 MTRR: Fixed MSR 0x259 0x0000000000000000
1903 15:44:25.927666 MTRR: Fixed MSR 0x268 0x0606060606060606
1904 15:44:25.930659 MTRR: Fixed MSR 0x269 0x0606060606060606
1905 15:44:25.934050 MTRR: Fixed MSR 0x26a 0x0606060606060606
1906 15:44:25.940612 MTRR: Fixed MSR 0x26b 0x0606060606060606
1907 15:44:25.944104 MTRR: Fixed MSR 0x26c 0x0606060606060606
1908 15:44:25.947411 MTRR: Fixed MSR 0x26d 0x0606060606060606
1909 15:44:25.950928 MTRR: Fixed MSR 0x26e 0x0606060606060606
1910 15:44:25.957270 MTRR: Fixed MSR 0x26f 0x0606060606060606
1911 15:44:25.957359
1912 15:44:25.957431 MTRR check
1913 15:44:25.960766 Fixed MTRRs : Enabled
1914 15:44:25.964210 Variable MTRRs: Enabled
1915 15:44:25.964293
1916 15:44:25.964373 call enable_fixed_mtrr()
1917 15:44:25.970983 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1918 15:44:25.974188 CPU physical address size: 39 bits
1919 15:44:25.980205 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1920 15:44:25.980301 CBFS @ c08000 size 3f8000
1921 15:44:25.986727 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1922 15:44:25.990134 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 15:44:25.996943 MTRR: Fixed MSR 0x258 0x0606060606060606
1924 15:44:26.000433 MTRR: Fixed MSR 0x259 0x0000000000000000
1925 15:44:26.003753 MTRR: Fixed MSR 0x268 0x0606060606060606
1926 15:44:26.007196 MTRR: Fixed MSR 0x269 0x0606060606060606
1927 15:44:26.013469 MTRR: Fixed MSR 0x26a 0x0606060606060606
1928 15:44:26.016968 MTRR: Fixed MSR 0x26b 0x0606060606060606
1929 15:44:26.020171 MTRR: Fixed MSR 0x26c 0x0606060606060606
1930 15:44:26.023617 MTRR: Fixed MSR 0x26d 0x0606060606060606
1931 15:44:26.030018 MTRR: Fixed MSR 0x26e 0x0606060606060606
1932 15:44:26.033551 MTRR: Fixed MSR 0x26f 0x0606060606060606
1933 15:44:26.037088 MTRR: Fixed MSR 0x250 0x0606060606060606
1934 15:44:26.039869 call enable_fixed_mtrr()
1935 15:44:26.043403 MTRR: Fixed MSR 0x258 0x0606060606060606
1936 15:44:26.046625 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 15:44:26.053481 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 15:44:26.056448 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 15:44:26.059891 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 15:44:26.063342 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 15:44:26.069648 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 15:44:26.073154 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 15:44:26.076500 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 15:44:26.079958 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 15:44:26.083368 CPU physical address size: 39 bits
1946 15:44:26.086681 call enable_fixed_mtrr()
1947 15:44:26.092982 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 15:44:26.096387 MTRR: Fixed MSR 0x250 0x0606060606060606
1949 15:44:26.099488 MTRR: Fixed MSR 0x258 0x0606060606060606
1950 15:44:26.103153 MTRR: Fixed MSR 0x259 0x0000000000000000
1951 15:44:26.106211 MTRR: Fixed MSR 0x268 0x0606060606060606
1952 15:44:26.112835 MTRR: Fixed MSR 0x269 0x0606060606060606
1953 15:44:26.116226 MTRR: Fixed MSR 0x26a 0x0606060606060606
1954 15:44:26.119545 MTRR: Fixed MSR 0x26b 0x0606060606060606
1955 15:44:26.123027 MTRR: Fixed MSR 0x26c 0x0606060606060606
1956 15:44:26.129216 MTRR: Fixed MSR 0x26d 0x0606060606060606
1957 15:44:26.132622 MTRR: Fixed MSR 0x26e 0x0606060606060606
1958 15:44:26.136204 MTRR: Fixed MSR 0x26f 0x0606060606060606
1959 15:44:26.139650 MTRR: Fixed MSR 0x258 0x0606060606060606
1960 15:44:26.142581 call enable_fixed_mtrr()
1961 15:44:26.145986 MTRR: Fixed MSR 0x259 0x0000000000000000
1962 15:44:26.152649 MTRR: Fixed MSR 0x268 0x0606060606060606
1963 15:44:26.155785 MTRR: Fixed MSR 0x269 0x0606060606060606
1964 15:44:26.159235 MTRR: Fixed MSR 0x26a 0x0606060606060606
1965 15:44:26.162652 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 15:44:26.168923 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 15:44:26.172375 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 15:44:26.175932 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 15:44:26.178948 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 15:44:26.182424 CPU physical address size: 39 bits
1971 15:44:26.185927 call enable_fixed_mtrr()
1972 15:44:26.189379 CPU physical address size: 39 bits
1973 15:44:26.192673 CPU physical address size: 39 bits
1974 15:44:26.199081 MTRR: Fixed MSR 0x250 0x0606060606060606
1975 15:44:26.202426 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 15:44:26.205921 MTRR: Fixed MSR 0x258 0x0606060606060606
1977 15:44:26.209219 MTRR: Fixed MSR 0x259 0x0000000000000000
1978 15:44:26.215614 MTRR: Fixed MSR 0x268 0x0606060606060606
1979 15:44:26.218977 MTRR: Fixed MSR 0x269 0x0606060606060606
1980 15:44:26.222153 MTRR: Fixed MSR 0x26a 0x0606060606060606
1981 15:44:26.225610 MTRR: Fixed MSR 0x26b 0x0606060606060606
1982 15:44:26.229181 MTRR: Fixed MSR 0x26c 0x0606060606060606
1983 15:44:26.235560 MTRR: Fixed MSR 0x26d 0x0606060606060606
1984 15:44:26.238718 MTRR: Fixed MSR 0x26e 0x0606060606060606
1985 15:44:26.242473 MTRR: Fixed MSR 0x26f 0x0606060606060606
1986 15:44:26.245398 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 15:44:26.252262 MTRR: Fixed MSR 0x259 0x0000000000000000
1988 15:44:26.255867 MTRR: Fixed MSR 0x268 0x0606060606060606
1989 15:44:26.258631 MTRR: Fixed MSR 0x269 0x0606060606060606
1990 15:44:26.261956 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 15:44:26.268502 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 15:44:26.272030 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 15:44:26.275345 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 15:44:26.278739 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 15:44:26.285133 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 15:44:26.285261 call enable_fixed_mtrr()
1997 15:44:26.288558 call enable_fixed_mtrr()
1998 15:44:26.292116 CBFS: Locating 'fallback/payload'
1999 15:44:26.295060 CPU physical address size: 39 bits
2000 15:44:26.301872 CPU physical address size: 39 bits
2001 15:44:26.305246 CBFS: Found @ offset 1c96c0 size 3f798
2002 15:44:26.308096 Checking segment from ROM address 0xffdd16f8
2003 15:44:26.311617 Checking segment from ROM address 0xffdd1714
2004 15:44:26.318100 Loading segment from ROM address 0xffdd16f8
2005 15:44:26.318225 code (compression=0)
2006 15:44:26.328075 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2007 15:44:26.337935 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2008 15:44:26.338060 it's not compressed!
2009 15:44:26.431161 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2010 15:44:26.437443 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2011 15:44:26.440819 Loading segment from ROM address 0xffdd1714
2012 15:44:26.444061 Entry Point 0x30000000
2013 15:44:26.447561 Loaded segments
2014 15:44:26.453132 Finalizing chipset.
2015 15:44:26.456464 Finalizing SMM.
2016 15:44:26.459907 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2017 15:44:26.463190 mp_park_aps done after 0 msecs.
2018 15:44:26.469577 Jumping to boot code at 30000000(99b62000)
2019 15:44:26.476187 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2020 15:44:26.476318
2021 15:44:26.476425
2022 15:44:26.476527
2023 15:44:26.479405 Starting depthcharge on Helios...
2024 15:44:26.479514
2025 15:44:26.479900 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2026 15:44:26.480047 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2027 15:44:26.480174 Setting prompt string to ['hatch:']
2028 15:44:26.480309 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2029 15:44:26.489274 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2030 15:44:26.489393
2031 15:44:26.495941 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2032 15:44:26.496037
2033 15:44:26.502872 board_setup: Info: eMMC controller not present; skipping
2034 15:44:26.502995
2035 15:44:26.505785 New NVMe Controller 0x30053ac0 @ 00:1d:00
2036 15:44:26.505901
2037 15:44:26.512652 board_setup: Info: SDHCI controller not present; skipping
2038 15:44:26.512767
2039 15:44:26.519476 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2040 15:44:26.519575
2041 15:44:26.519647 Wipe memory regions:
2042 15:44:26.519714
2043 15:44:26.522374 [0x00000000001000, 0x000000000a0000)
2044 15:44:26.522481
2045 15:44:26.525817 [0x00000000100000, 0x00000030000000)
2046 15:44:26.592222
2047 15:44:26.595330 [0x00000030657430, 0x00000099a2c000)
2048 15:44:26.742503
2049 15:44:26.745361 [0x00000100000000, 0x0000045e800000)
2050 15:44:28.202350
2051 15:44:28.202535 R8152: Initializing
2052 15:44:28.202623
2053 15:44:28.205765 Version 9 (ocp_data = 6010)
2054 15:44:28.209917
2055 15:44:28.210033 R8152: Done initializing
2056 15:44:28.210148
2057 15:44:28.213370 Adding net device
2058 15:44:28.695748
2059 15:44:28.695928 R8152: Initializing
2060 15:44:28.696053
2061 15:44:28.699341 Version 6 (ocp_data = 5c30)
2062 15:44:28.699464
2063 15:44:28.702797 R8152: Done initializing
2064 15:44:28.702917
2065 15:44:28.705669 net_add_device: Attemp to include the same device
2066 15:44:28.709134
2067 15:44:28.716844 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2068 15:44:28.716944
2069 15:44:28.717018
2070 15:44:28.717085
2071 15:44:28.717380 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2073 15:44:28.817767 hatch: tftpboot 192.168.201.1 11224175/tftp-deploy-zthwsb0m/kernel/bzImage 11224175/tftp-deploy-zthwsb0m/kernel/cmdline 11224175/tftp-deploy-zthwsb0m/ramdisk/ramdisk.cpio.gz
2074 15:44:28.817934 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2075 15:44:28.818029 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2076 15:44:28.822534 tftpboot 192.168.201.1 11224175/tftp-deploy-zthwsb0m/kernel/bzImloy-zthwsb0m/kernel/cmdline 11224175/tftp-deploy-zthwsb0m/ramdisk/ramdisk.cpio.gz
2077 15:44:28.822633
2078 15:44:28.822706 Waiting for link
2079 15:44:29.023471
2080 15:44:29.023623 done.
2081 15:44:29.023729
2082 15:44:29.023842 MAC: 00:24:32:50:1a:59
2083 15:44:29.023953
2084 15:44:29.026412 Sending DHCP discover... done.
2085 15:44:29.026533
2086 15:44:29.029885 Waiting for reply... done.
2087 15:44:29.030004
2088 15:44:29.033490 Sending DHCP request... done.
2089 15:44:29.033618
2090 15:44:29.036333 Waiting for reply... done.
2091 15:44:29.036453
2092 15:44:29.039669 My ip is 192.168.201.14
2093 15:44:29.039765
2094 15:44:29.043067 The DHCP server ip is 192.168.201.1
2095 15:44:29.043184
2096 15:44:29.049579 TFTP server IP predefined by user: 192.168.201.1
2097 15:44:29.049696
2098 15:44:29.056453 Bootfile predefined by user: 11224175/tftp-deploy-zthwsb0m/kernel/bzImage
2099 15:44:29.056548
2100 15:44:29.059984 Sending tftp read request... done.
2101 15:44:29.060078
2102 15:44:29.062720 Waiting for the transfer...
2103 15:44:29.062813
2104 15:44:29.591627 00000000 ################################################################
2105 15:44:29.591777
2106 15:44:30.124664 00080000 ################################################################
2107 15:44:30.124828
2108 15:44:30.659670 00100000 ################################################################
2109 15:44:30.659879
2110 15:44:31.200288 00180000 ################################################################
2111 15:44:31.200474
2112 15:44:31.724341 00200000 ################################################################
2113 15:44:31.724512
2114 15:44:32.249715 00280000 ################################################################
2115 15:44:32.249886
2116 15:44:32.776897 00300000 ################################################################
2117 15:44:32.777076
2118 15:44:33.304545 00380000 ################################################################
2119 15:44:33.304707
2120 15:44:33.834099 00400000 ################################################################
2121 15:44:33.834280
2122 15:44:34.363908 00480000 ################################################################
2123 15:44:34.364073
2124 15:44:34.907068 00500000 ################################################################
2125 15:44:34.907266
2126 15:44:35.441582 00580000 ################################################################
2127 15:44:35.441747
2128 15:44:35.977614 00600000 ################################################################
2129 15:44:35.977777
2130 15:44:36.509593 00680000 ################################################################
2131 15:44:36.509758
2132 15:44:37.051975 00700000 ################################################################
2133 15:44:37.052123
2134 15:44:37.077060 00780000 ### done.
2135 15:44:37.077192
2136 15:44:37.080420 The bootfile was 7884688 bytes long.
2137 15:44:37.080513
2138 15:44:37.083877 Sending tftp read request... done.
2139 15:44:37.083969
2140 15:44:37.087391 Waiting for the transfer...
2141 15:44:37.087483
2142 15:44:37.621288 00000000 ################################################################
2143 15:44:37.621449
2144 15:44:38.159441 00080000 ################################################################
2145 15:44:38.159597
2146 15:44:38.715816 00100000 ################################################################
2147 15:44:38.715998
2148 15:44:39.283873 00180000 ################################################################
2149 15:44:39.284028
2150 15:44:39.814125 00200000 ################################################################
2151 15:44:39.814333
2152 15:44:40.338100 00280000 ################################################################
2153 15:44:40.338279
2154 15:44:40.880516 00300000 ################################################################
2155 15:44:40.880680
2156 15:44:41.458575 00380000 ################################################################
2157 15:44:41.458749
2158 15:44:42.044930 00400000 ################################################################
2159 15:44:42.045076
2160 15:44:42.586637 00480000 ################################################################
2161 15:44:42.586798
2162 15:44:43.149207 00500000 ############################################################### done.
2163 15:44:43.149372
2164 15:44:43.152689 Sending tftp read request... done.
2165 15:44:43.152789
2166 15:44:43.156296 Waiting for the transfer...
2167 15:44:43.156392
2168 15:44:43.156467 00000000 # done.
2169 15:44:43.156538
2170 15:44:43.165833 Command line loaded dynamically from TFTP file: 11224175/tftp-deploy-zthwsb0m/kernel/cmdline
2171 15:44:43.165939
2172 15:44:43.195412 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11224175/extract-nfsrootfs-yms1l8vd,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2173 15:44:43.195552
2174 15:44:43.198765 ec_init(0): CrosEC protocol v3 supported (256, 256)
2175 15:44:43.205012
2176 15:44:43.208294 Shutting down all USB controllers.
2177 15:44:43.208388
2178 15:44:43.208462 Removing current net device
2179 15:44:43.212252
2180 15:44:43.212349 Finalizing coreboot
2181 15:44:43.212425
2182 15:44:43.219091 Exiting depthcharge with code 4 at timestamp: 24123135
2183 15:44:43.219185
2184 15:44:43.219278
2185 15:44:43.219349 Starting kernel ...
2186 15:44:43.219416
2187 15:44:43.219480
2188 15:44:43.219857 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2189 15:44:43.219964 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2190 15:44:43.220047 Setting prompt string to ['Linux version [0-9]']
2191 15:44:43.220123 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2192 15:44:43.220198 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2194 15:49:08.220975 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2196 15:49:08.222036 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2198 15:49:08.222890 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2201 15:49:08.224446 end: 2 depthcharge-action (duration 00:05:00) [common]
2203 15:49:08.225637 Cleaning after the job
2204 15:49:08.226127 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224175/tftp-deploy-zthwsb0m/ramdisk
2205 15:49:08.230497 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224175/tftp-deploy-zthwsb0m/kernel
2206 15:49:08.236078 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224175/tftp-deploy-zthwsb0m/nfsrootfs
2207 15:49:08.358271 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224175/tftp-deploy-zthwsb0m/modules
2208 15:49:08.358805 start: 4.1 power-off (timeout 00:00:30) [common]
2209 15:49:08.359003 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2210 15:49:08.437992 >> Command sent successfully.
2211 15:49:08.440581 Returned 0 in 0 seconds
2212 15:49:08.541379 end: 4.1 power-off (duration 00:00:00) [common]
2214 15:49:08.543570 start: 4.2 read-feedback (timeout 00:10:00) [common]
2215 15:49:08.545021 Listened to connection for namespace 'common' for up to 1s
2217 15:49:08.546746 Listened to connection for namespace 'common' for up to 1s
2218 15:49:09.545467 Finalising connection for namespace 'common'
2219 15:49:09.545656 Disconnecting from shell: Finalise
2220 15:49:09.545743
2221 15:49:09.646105 end: 4.2 read-feedback (duration 00:00:01) [common]
2222 15:49:09.646268 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11224175
2223 15:49:10.274789 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11224175
2224 15:49:10.275000 JobError: Your job cannot terminate cleanly.