Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 15:43:15.803636 lava-dispatcher, installed at version: 2023.05.1
2 15:43:15.803855 start: 0 validate
3 15:43:15.803989 Start time: 2023-08-07 15:43:15.803981+00:00 (UTC)
4 15:43:15.804115 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:43:15.804246 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 15:43:16.066322 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:43:16.067125 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:43:19.068065 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:43:19.068283 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:43:19.327507 validate duration: 3.52
12 15:43:19.327801 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:43:19.327901 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:43:19.327988 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:43:19.328119 Not decompressing ramdisk as can be used compressed.
16 15:43:19.328205 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 15:43:19.328271 saving as /var/lib/lava/dispatcher/tmp/11224192/tftp-deploy-k9radlck/ramdisk/rootfs.cpio.gz
18 15:43:19.328333 total size: 8418130 (8MB)
19 15:43:19.841592 progress 0% (0MB)
20 15:43:19.853569 progress 5% (0MB)
21 15:43:19.865435 progress 10% (0MB)
22 15:43:19.873734 progress 15% (1MB)
23 15:43:19.876134 progress 20% (1MB)
24 15:43:19.878406 progress 25% (2MB)
25 15:43:19.880729 progress 30% (2MB)
26 15:43:19.882842 progress 35% (2MB)
27 15:43:19.885103 progress 40% (3MB)
28 15:43:19.887381 progress 45% (3MB)
29 15:43:19.889578 progress 50% (4MB)
30 15:43:19.891786 progress 55% (4MB)
31 15:43:19.893996 progress 60% (4MB)
32 15:43:19.896075 progress 65% (5MB)
33 15:43:19.898269 progress 70% (5MB)
34 15:43:19.900512 progress 75% (6MB)
35 15:43:19.902749 progress 80% (6MB)
36 15:43:19.904941 progress 85% (6MB)
37 15:43:19.907200 progress 90% (7MB)
38 15:43:19.909411 progress 95% (7MB)
39 15:43:19.911523 progress 100% (8MB)
40 15:43:19.911756 8MB downloaded in 0.58s (13.76MB/s)
41 15:43:19.911909 end: 1.1.1 http-download (duration 00:00:01) [common]
43 15:43:19.912146 end: 1.1 download-retry (duration 00:00:01) [common]
44 15:43:19.912234 start: 1.2 download-retry (timeout 00:09:59) [common]
45 15:43:19.912320 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 15:43:19.912458 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:43:19.912530 saving as /var/lib/lava/dispatcher/tmp/11224192/tftp-deploy-k9radlck/kernel/bzImage
48 15:43:19.912590 total size: 7884688 (7MB)
49 15:43:19.912649 No compression specified
50 15:43:19.913816 progress 0% (0MB)
51 15:43:19.915980 progress 5% (0MB)
52 15:43:19.918064 progress 10% (0MB)
53 15:43:19.920156 progress 15% (1MB)
54 15:43:19.922285 progress 20% (1MB)
55 15:43:19.924361 progress 25% (1MB)
56 15:43:19.926403 progress 30% (2MB)
57 15:43:19.928501 progress 35% (2MB)
58 15:43:19.930542 progress 40% (3MB)
59 15:43:19.932646 progress 45% (3MB)
60 15:43:19.934693 progress 50% (3MB)
61 15:43:19.936731 progress 55% (4MB)
62 15:43:19.938797 progress 60% (4MB)
63 15:43:19.940838 progress 65% (4MB)
64 15:43:19.942907 progress 70% (5MB)
65 15:43:19.944933 progress 75% (5MB)
66 15:43:19.947033 progress 80% (6MB)
67 15:43:19.949067 progress 85% (6MB)
68 15:43:19.951173 progress 90% (6MB)
69 15:43:19.953241 progress 95% (7MB)
70 15:43:19.955420 progress 100% (7MB)
71 15:43:19.955607 7MB downloaded in 0.04s (174.81MB/s)
72 15:43:19.955747 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:43:19.955974 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:43:19.956059 start: 1.3 download-retry (timeout 00:09:59) [common]
76 15:43:19.956142 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 15:43:19.956283 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:43:19.956351 saving as /var/lib/lava/dispatcher/tmp/11224192/tftp-deploy-k9radlck/modules/modules.tar
79 15:43:19.956411 total size: 250796 (0MB)
80 15:43:19.956471 Using unxz to decompress xz
81 15:43:19.960656 progress 13% (0MB)
82 15:43:19.961051 progress 26% (0MB)
83 15:43:19.961327 progress 39% (0MB)
84 15:43:19.962687 progress 52% (0MB)
85 15:43:19.964584 progress 65% (0MB)
86 15:43:19.966540 progress 78% (0MB)
87 15:43:19.968553 progress 91% (0MB)
88 15:43:19.970441 progress 100% (0MB)
89 15:43:19.976288 0MB downloaded in 0.02s (12.04MB/s)
90 15:43:19.976564 end: 1.3.1 http-download (duration 00:00:00) [common]
92 15:43:19.976840 end: 1.3 download-retry (duration 00:00:00) [common]
93 15:43:19.976939 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 15:43:19.977040 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 15:43:19.977123 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 15:43:19.977209 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 15:43:19.977434 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2
98 15:43:19.977578 makedir: /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin
99 15:43:19.977687 makedir: /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/tests
100 15:43:19.977794 makedir: /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/results
101 15:43:19.977911 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-add-keys
102 15:43:19.978054 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-add-sources
103 15:43:19.978184 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-background-process-start
104 15:43:19.978315 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-background-process-stop
105 15:43:19.978442 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-common-functions
106 15:43:19.978568 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-echo-ipv4
107 15:43:19.978742 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-install-packages
108 15:43:19.978874 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-installed-packages
109 15:43:19.978998 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-os-build
110 15:43:19.979123 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-probe-channel
111 15:43:19.979247 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-probe-ip
112 15:43:19.979371 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-target-ip
113 15:43:19.979496 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-target-mac
114 15:43:19.979619 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-target-storage
115 15:43:19.979747 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-test-case
116 15:43:19.979872 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-test-event
117 15:43:19.980000 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-test-feedback
118 15:43:19.980124 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-test-raise
119 15:43:19.980254 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-test-reference
120 15:43:19.980385 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-test-runner
121 15:43:19.980512 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-test-set
122 15:43:19.980641 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-test-shell
123 15:43:19.980769 Updating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-install-packages (oe)
124 15:43:19.980922 Updating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/bin/lava-installed-packages (oe)
125 15:43:19.981052 Creating /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/environment
126 15:43:19.981160 LAVA metadata
127 15:43:19.981236 - LAVA_JOB_ID=11224192
128 15:43:19.981302 - LAVA_DISPATCHER_IP=192.168.201.1
129 15:43:19.981403 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 15:43:19.981470 skipped lava-vland-overlay
131 15:43:19.981544 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 15:43:19.981626 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 15:43:19.981686 skipped lava-multinode-overlay
134 15:43:19.981757 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 15:43:19.981836 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 15:43:19.981914 Loading test definitions
137 15:43:19.982007 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 15:43:19.982079 Using /lava-11224192 at stage 0
139 15:43:19.982414 uuid=11224192_1.4.2.3.1 testdef=None
140 15:43:19.982522 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 15:43:19.982634 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 15:43:19.983218 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 15:43:19.983442 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 15:43:19.984081 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 15:43:19.984313 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 15:43:19.984945 runner path: /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/0/tests/0_dmesg test_uuid 11224192_1.4.2.3.1
149 15:43:19.985100 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 15:43:19.985329 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 15:43:19.985400 Using /lava-11224192 at stage 1
153 15:43:19.985710 uuid=11224192_1.4.2.3.5 testdef=None
154 15:43:19.985797 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 15:43:19.985880 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 15:43:19.986356 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 15:43:19.986576 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 15:43:19.987267 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 15:43:19.987493 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 15:43:19.988134 runner path: /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/1/tests/1_bootrr test_uuid 11224192_1.4.2.3.5
163 15:43:19.988291 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 15:43:19.988516 Creating lava-test-runner.conf files
166 15:43:19.988582 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/0 for stage 0
167 15:43:19.988674 - 0_dmesg
168 15:43:19.988754 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224192/lava-overlay-lckbwbt2/lava-11224192/1 for stage 1
169 15:43:19.988851 - 1_bootrr
170 15:43:19.988946 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 15:43:19.989031 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 15:43:19.997553 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 15:43:19.997661 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 15:43:19.997747 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 15:43:19.997830 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 15:43:19.997916 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 15:43:20.279368 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 15:43:20.279765 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 15:43:20.279890 extracting modules file /var/lib/lava/dispatcher/tmp/11224192/tftp-deploy-k9radlck/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224192/extract-overlay-ramdisk-_xssq5hy/ramdisk
180 15:43:20.293893 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 15:43:20.294055 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 15:43:20.294154 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224192/compress-overlay-v3e4rehh/overlay-1.4.2.4.tar.gz to ramdisk
183 15:43:20.294230 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224192/compress-overlay-v3e4rehh/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11224192/extract-overlay-ramdisk-_xssq5hy/ramdisk
184 15:43:20.303895 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 15:43:20.304053 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 15:43:20.304151 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 15:43:20.304241 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 15:43:20.304325 Building ramdisk /var/lib/lava/dispatcher/tmp/11224192/extract-overlay-ramdisk-_xssq5hy/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11224192/extract-overlay-ramdisk-_xssq5hy/ramdisk
189 15:43:20.438007 >> 49788 blocks
190 15:43:21.313956 rename /var/lib/lava/dispatcher/tmp/11224192/extract-overlay-ramdisk-_xssq5hy/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11224192/tftp-deploy-k9radlck/ramdisk/ramdisk.cpio.gz
191 15:43:21.314428 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 15:43:21.314551 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 15:43:21.314665 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 15:43:21.314767 No mkimage arch provided, not using FIT.
195 15:43:21.314860 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 15:43:21.314948 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 15:43:21.315060 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 15:43:21.315153 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 15:43:21.315237 No LXC device requested
200 15:43:21.315316 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 15:43:21.315404 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 15:43:21.315487 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 15:43:21.315560 Checking files for TFTP limit of 4294967296 bytes.
204 15:43:21.315970 end: 1 tftp-deploy (duration 00:00:02) [common]
205 15:43:21.316073 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 15:43:21.316163 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 15:43:21.316290 substitutions:
208 15:43:21.316360 - {DTB}: None
209 15:43:21.316423 - {INITRD}: 11224192/tftp-deploy-k9radlck/ramdisk/ramdisk.cpio.gz
210 15:43:21.316483 - {KERNEL}: 11224192/tftp-deploy-k9radlck/kernel/bzImage
211 15:43:21.316542 - {LAVA_MAC}: None
212 15:43:21.316599 - {PRESEED_CONFIG}: None
213 15:43:21.316656 - {PRESEED_LOCAL}: None
214 15:43:21.316712 - {RAMDISK}: 11224192/tftp-deploy-k9radlck/ramdisk/ramdisk.cpio.gz
215 15:43:21.316768 - {ROOT_PART}: None
216 15:43:21.316824 - {ROOT}: None
217 15:43:21.316878 - {SERVER_IP}: 192.168.201.1
218 15:43:21.316932 - {TEE}: None
219 15:43:21.316986 Parsed boot commands:
220 15:43:21.317041 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 15:43:21.317223 Parsed boot commands: tftpboot 192.168.201.1 11224192/tftp-deploy-k9radlck/kernel/bzImage 11224192/tftp-deploy-k9radlck/kernel/cmdline 11224192/tftp-deploy-k9radlck/ramdisk/ramdisk.cpio.gz
222 15:43:21.317312 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 15:43:21.317399 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 15:43:21.317492 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 15:43:21.317581 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 15:43:21.317652 Not connected, no need to disconnect.
227 15:43:21.317727 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 15:43:21.317809 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 15:43:21.317879 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-8'
230 15:43:21.321942 Setting prompt string to ['lava-test: # ']
231 15:43:21.322309 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 15:43:21.322419 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 15:43:21.322523 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 15:43:21.322630 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 15:43:21.322833 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=reboot'
236 15:43:26.458277 >> Command sent successfully.
237 15:43:26.461335 Returned 0 in 5 seconds
238 15:43:26.561769 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 15:43:26.562158 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 15:43:26.562309 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 15:43:26.562439 Setting prompt string to 'Starting depthcharge on Voema...'
243 15:43:26.562547 Changing prompt to 'Starting depthcharge on Voema...'
244 15:43:26.562645 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 15:43:26.562933 [Enter `^Ec?' for help]
246 15:43:28.162746
247 15:43:28.162919
248 15:43:28.172173 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 15:43:28.178779 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
250 15:43:28.182436 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 15:43:28.185730 CPU: AES supported, TXT NOT supported, VT supported
252 15:43:28.192567 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 15:43:28.199184 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 15:43:28.202086 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 15:43:28.205721 VBOOT: Loading verstage.
256 15:43:28.212174 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 15:43:28.215462 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 15:43:28.221790 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 15:43:28.228613 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 15:43:28.235465 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 15:43:28.238587
262 15:43:28.238717
263 15:43:28.248466 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 15:43:28.263243 Probing TPM: . done!
265 15:43:28.266422 TPM ready after 0 ms
266 15:43:28.269724 Connected to device vid:did:rid of 1ae0:0028:00
267 15:43:28.281069 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
268 15:43:28.287481 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 15:43:28.291316 Initialized TPM device CR50 revision 0
270 15:43:28.375738 tlcl_send_startup: Startup return code is 0
271 15:43:28.375860 TPM: setup succeeded
272 15:43:28.390959 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 15:43:28.404838 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 15:43:28.417760 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 15:43:28.427945 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 15:43:28.431841 Chrome EC: UHEPI supported
277 15:43:28.434939 Phase 1
278 15:43:28.438049 FMAP: area GBB found @ 1805000 (458752 bytes)
279 15:43:28.448003 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 15:43:28.454831 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 15:43:28.461076 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 15:43:28.467970 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 15:43:28.471099 Recovery requested (1009000e)
284 15:43:28.474234 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 15:43:28.486138 tlcl_extend: response is 0
286 15:43:28.492989 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 15:43:28.502561 tlcl_extend: response is 0
288 15:43:28.509429 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 15:43:28.515637 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 15:43:28.522199 BS: verstage times (exec / console): total (unknown) / 142 ms
291 15:43:28.522326
292 15:43:28.522422
293 15:43:28.535642 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 15:43:28.541962 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 15:43:28.545848 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 15:43:28.548888 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 15:43:28.555881 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 15:43:28.559020 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 15:43:28.562219 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 15:43:28.565325 TCO_STS: 0000 0000
301 15:43:28.568975 GEN_PMCON: d0015038 00002200
302 15:43:28.572113 GBLRST_CAUSE: 00000000 00000000
303 15:43:28.575375 HPR_CAUSE0: 00000000
304 15:43:28.575487 prev_sleep_state 5
305 15:43:28.578508 Boot Count incremented to 21633
306 15:43:28.585419 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 15:43:28.591537 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 15:43:28.602358 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 15:43:28.605690 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 15:43:28.611270 Chrome EC: UHEPI supported
311 15:43:28.618021 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 15:43:28.631079 Probing TPM: done!
313 15:43:28.637261 Connected to device vid:did:rid of 1ae0:0028:00
314 15:43:28.647349 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
315 15:43:28.651074 Initialized TPM device CR50 revision 0
316 15:43:28.668631 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 15:43:28.671860 MRC: Hash idx 0x100b comparison successful.
318 15:43:28.675496 MRC cache found, size faa8
319 15:43:28.675609 bootmode is set to: 2
320 15:43:28.678656 SPD index = 0
321 15:43:28.685731 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 15:43:28.688951 SPD: module type is LPDDR4X
323 15:43:28.692169 SPD: module part number is MT53E512M64D4NW-046
324 15:43:28.698558 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
325 15:43:28.705555 SPD: device width 16 bits, bus width 16 bits
326 15:43:28.708630 SPD: module size is 1024 MB (per channel)
327 15:43:29.141415 CBMEM:
328 15:43:29.144324 IMD: root @ 0x76fff000 254 entries.
329 15:43:29.148049 IMD: root @ 0x76ffec00 62 entries.
330 15:43:29.151174 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 15:43:29.157487 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 15:43:29.161317 External stage cache:
333 15:43:29.164487 IMD: root @ 0x7b3ff000 254 entries.
334 15:43:29.167714 IMD: root @ 0x7b3fec00 62 entries.
335 15:43:29.183932 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 15:43:29.190945 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 15:43:29.197243 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 15:43:29.210141 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 15:43:29.216718 cse_lite: Skip switching to RW in the recovery path
340 15:43:29.216844 8 DIMMs found
341 15:43:29.220464 SMM Memory Map
342 15:43:29.223575 SMRAM : 0x7b000000 0x800000
343 15:43:29.226688 Subregion 0: 0x7b000000 0x200000
344 15:43:29.229929 Subregion 1: 0x7b200000 0x200000
345 15:43:29.233755 Subregion 2: 0x7b400000 0x400000
346 15:43:29.233847 top_of_ram = 0x77000000
347 15:43:29.239983 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 15:43:29.247011 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 15:43:29.249819 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 15:43:29.256701 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 15:43:29.263000 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 15:43:29.269360 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 15:43:29.279880 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 15:43:29.286716 Processing 211 relocs. Offset value of 0x74c0b000
355 15:43:29.293071 BS: romstage times (exec / console): total (unknown) / 277 ms
356 15:43:29.299297
357 15:43:29.299423
358 15:43:29.309109 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 15:43:29.312869 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 15:43:29.322306 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 15:43:29.329182 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 15:43:29.335456 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 15:43:29.342396 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 15:43:29.390113 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 15:43:29.396601 Processing 5008 relocs. Offset value of 0x75d98000
366 15:43:29.399710 BS: postcar times (exec / console): total (unknown) / 59 ms
367 15:43:29.402819
368 15:43:29.402907
369 15:43:29.412732 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 15:43:29.412849 Normal boot
371 15:43:29.416450 FW_CONFIG value is 0x804c02
372 15:43:29.419590 PCI: 00:07.0 disabled by fw_config
373 15:43:29.422911 PCI: 00:07.1 disabled by fw_config
374 15:43:29.429449 PCI: 00:0d.2 disabled by fw_config
375 15:43:29.432441 PCI: 00:1c.7 disabled by fw_config
376 15:43:29.435811 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 15:43:29.443170 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 15:43:29.449186 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 15:43:29.452391 GENERIC: 0.0 disabled by fw_config
380 15:43:29.455746 GENERIC: 1.0 disabled by fw_config
381 15:43:29.458768 fw_config match found: DB_USB=USB3_ACTIVE
382 15:43:29.462327 fw_config match found: DB_USB=USB3_ACTIVE
383 15:43:29.465943 fw_config match found: DB_USB=USB3_ACTIVE
384 15:43:29.472215 fw_config match found: DB_USB=USB3_ACTIVE
385 15:43:29.475462 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 15:43:29.485669 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 15:43:29.492419 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 15:43:29.498712 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 15:43:29.505653 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 15:43:29.508750 microcode: Update skipped, already up-to-date
391 15:43:29.515550 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 15:43:29.543661 Detected 4 core, 8 thread CPU.
393 15:43:29.546424 Setting up SMI for CPU
394 15:43:29.549969 IED base = 0x7b400000
395 15:43:29.550061 IED size = 0x00400000
396 15:43:29.553660 Will perform SMM setup.
397 15:43:29.560036 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
398 15:43:29.566836 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 15:43:29.573503 Processing 16 relocs. Offset value of 0x00030000
400 15:43:29.576449 Attempting to start 7 APs
401 15:43:29.579848 Waiting for 10ms after sending INIT.
402 15:43:29.595222 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 15:43:29.599117 AP: slot 4 apic_id 5.
404 15:43:29.602377 AP: slot 5 apic_id 4.
405 15:43:29.602482 AP: slot 7 apic_id 6.
406 15:43:29.605576 AP: slot 6 apic_id 2.
407 15:43:29.608641 AP: slot 2 apic_id 3.
408 15:43:29.608751 done.
409 15:43:29.608847 AP: slot 3 apic_id 7.
410 15:43:29.615231 Waiting for 2nd SIPI to complete...done.
411 15:43:29.622086 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 15:43:29.628551 Processing 13 relocs. Offset value of 0x00038000
413 15:43:29.631814 Unable to locate Global NVS
414 15:43:29.638825 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 15:43:29.641988 Installing permanent SMM handler to 0x7b000000
416 15:43:29.651874 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 15:43:29.655322 Processing 794 relocs. Offset value of 0x7b010000
418 15:43:29.665269 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 15:43:29.668206 Processing 13 relocs. Offset value of 0x7b008000
420 15:43:29.675145 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 15:43:29.681786 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 15:43:29.684909 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 15:43:29.691844 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 15:43:29.697938 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 15:43:29.704892 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 15:43:29.711184 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 15:43:29.711283 Unable to locate Global NVS
428 15:43:29.721289 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 15:43:29.724905 Clearing SMI status registers
430 15:43:29.724993 SMI_STS: PM1
431 15:43:29.728031 PM1_STS: PWRBTN
432 15:43:29.734400 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 15:43:29.737688 In relocation handler: CPU 0
434 15:43:29.741358 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 15:43:29.747857 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 15:43:29.751065 Relocation complete.
437 15:43:29.757441 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 15:43:29.760565 In relocation handler: CPU 1
439 15:43:29.764203 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 15:43:29.764310 Relocation complete.
441 15:43:29.774322 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
442 15:43:29.777387 In relocation handler: CPU 4
443 15:43:29.780573 New SMBASE=0x7afff000 IEDBASE=0x7b400000
444 15:43:29.780683 Relocation complete.
445 15:43:29.790773 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
446 15:43:29.794125 In relocation handler: CPU 5
447 15:43:29.797626 New SMBASE=0x7affec00 IEDBASE=0x7b400000
448 15:43:29.800688 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 15:43:29.803688 Relocation complete.
450 15:43:29.810695 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
451 15:43:29.813821 In relocation handler: CPU 7
452 15:43:29.816734 New SMBASE=0x7affe400 IEDBASE=0x7b400000
453 15:43:29.823691 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 15:43:29.823784 Relocation complete.
455 15:43:29.833575 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
456 15:43:29.833661 In relocation handler: CPU 3
457 15:43:29.839960 New SMBASE=0x7afff400 IEDBASE=0x7b400000
458 15:43:29.840061 Relocation complete.
459 15:43:29.847728 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
460 15:43:29.850977 In relocation handler: CPU 6
461 15:43:29.854841 New SMBASE=0x7affe800 IEDBASE=0x7b400000
462 15:43:29.861246 Writing SMRR. base = 0x7b000006, mask=0xff800c00
463 15:43:29.861336 Relocation complete.
464 15:43:29.871302 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
465 15:43:29.871405 In relocation handler: CPU 2
466 15:43:29.878230 New SMBASE=0x7afff800 IEDBASE=0x7b400000
467 15:43:29.878322 Relocation complete.
468 15:43:29.880874 Initializing CPU #0
469 15:43:29.884449 CPU: vendor Intel device 806c1
470 15:43:29.887516 CPU: family 06, model 8c, stepping 01
471 15:43:29.890703 Clearing out pending MCEs
472 15:43:29.894462 Setting up local APIC...
473 15:43:29.897462 apic_id: 0x00 done.
474 15:43:29.897565 Turbo is available but hidden
475 15:43:29.900978 Turbo is available and visible
476 15:43:29.907459 microcode: Update skipped, already up-to-date
477 15:43:29.907562 CPU #0 initialized
478 15:43:29.910955 Initializing CPU #3
479 15:43:29.914212 Initializing CPU #7
480 15:43:29.917276 CPU: vendor Intel device 806c1
481 15:43:29.920409 CPU: family 06, model 8c, stepping 01
482 15:43:29.924091 CPU: vendor Intel device 806c1
483 15:43:29.927215 CPU: family 06, model 8c, stepping 01
484 15:43:29.930362 Clearing out pending MCEs
485 15:43:29.933545 Clearing out pending MCEs
486 15:43:29.933626 Initializing CPU #5
487 15:43:29.937147 Initializing CPU #4
488 15:43:29.940380 CPU: vendor Intel device 806c1
489 15:43:29.943603 CPU: family 06, model 8c, stepping 01
490 15:43:29.946798 CPU: vendor Intel device 806c1
491 15:43:29.949991 CPU: family 06, model 8c, stepping 01
492 15:43:29.953825 Clearing out pending MCEs
493 15:43:29.957146 Clearing out pending MCEs
494 15:43:29.957293 Setting up local APIC...
495 15:43:29.960127 Initializing CPU #2
496 15:43:29.963443 Initializing CPU #6
497 15:43:29.966740 CPU: vendor Intel device 806c1
498 15:43:29.969957 CPU: family 06, model 8c, stepping 01
499 15:43:29.973719 CPU: vendor Intel device 806c1
500 15:43:29.976914 CPU: family 06, model 8c, stepping 01
501 15:43:29.979870 Clearing out pending MCEs
502 15:43:29.980005 Clearing out pending MCEs
503 15:43:29.983500 Setting up local APIC...
504 15:43:29.986663 Setting up local APIC...
505 15:43:29.989670 apic_id: 0x07 done.
506 15:43:29.989820 Setting up local APIC...
507 15:43:29.993314 Setting up local APIC...
508 15:43:29.996448 Setting up local APIC...
509 15:43:29.999629 apic_id: 0x06 done.
510 15:43:30.003492 microcode: Update skipped, already up-to-date
511 15:43:30.006476 microcode: Update skipped, already up-to-date
512 15:43:30.009958 CPU #3 initialized
513 15:43:30.010051 CPU #7 initialized
514 15:43:30.012879 apic_id: 0x04 done.
515 15:43:30.016644 apic_id: 0x05 done.
516 15:43:30.019734 microcode: Update skipped, already up-to-date
517 15:43:30.026348 microcode: Update skipped, already up-to-date
518 15:43:30.026433 CPU #5 initialized
519 15:43:30.029434 CPU #4 initialized
520 15:43:30.029524 apic_id: 0x03 done.
521 15:43:30.032680 apic_id: 0x02 done.
522 15:43:30.035992 microcode: Update skipped, already up-to-date
523 15:43:30.042799 microcode: Update skipped, already up-to-date
524 15:43:30.042914 CPU #2 initialized
525 15:43:30.045989 Initializing CPU #1
526 15:43:30.049835 CPU #6 initialized
527 15:43:30.053002 CPU: vendor Intel device 806c1
528 15:43:30.056185 CPU: family 06, model 8c, stepping 01
529 15:43:30.056278 Clearing out pending MCEs
530 15:43:30.059341 Setting up local APIC...
531 15:43:30.062524 apic_id: 0x01 done.
532 15:43:30.066344 microcode: Update skipped, already up-to-date
533 15:43:30.069700 CPU #1 initialized
534 15:43:30.072815 bsp_do_flight_plan done after 455 msecs.
535 15:43:30.076091 CPU: frequency set to 4000 MHz
536 15:43:30.079214 Enabling SMIs.
537 15:43:30.086041 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 15:43:30.100611 SATAXPCIE1 indicates PCIe NVMe is present
539 15:43:30.103841 Probing TPM: done!
540 15:43:30.107751 Connected to device vid:did:rid of 1ae0:0028:00
541 15:43:30.118156 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
542 15:43:30.121207 Initialized TPM device CR50 revision 0
543 15:43:30.124355 Enabling S0i3.4
544 15:43:30.130875 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 15:43:30.134509 Found a VBT of 8704 bytes after decompression
546 15:43:30.141241 cse_lite: CSE RO boot. HybridStorageMode disabled
547 15:43:30.147856 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 15:43:30.223749 FSPS returned 0
549 15:43:30.227277 Executing Phase 1 of FspMultiPhaseSiInit
550 15:43:30.237385 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 15:43:30.240731 port C0 DISC req: usage 1 usb3 1 usb2 5
552 15:43:30.243943 Raw Buffer output 0 00000511
553 15:43:30.247059 Raw Buffer output 1 00000000
554 15:43:30.250842 pmc_send_ipc_cmd succeeded
555 15:43:30.257629 port C1 DISC req: usage 1 usb3 2 usb2 3
556 15:43:30.257722 Raw Buffer output 0 00000321
557 15:43:30.260520 Raw Buffer output 1 00000000
558 15:43:30.264919 pmc_send_ipc_cmd succeeded
559 15:43:30.270441 Detected 4 core, 8 thread CPU.
560 15:43:30.273697 Detected 4 core, 8 thread CPU.
561 15:43:30.507228 Display FSP Version Info HOB
562 15:43:30.510713 Reference Code - CPU = a.0.4c.31
563 15:43:30.514210 uCode Version = 0.0.0.86
564 15:43:30.517450 TXT ACM version = ff.ff.ff.ffff
565 15:43:30.520700 Reference Code - ME = a.0.4c.31
566 15:43:30.524127 MEBx version = 0.0.0.0
567 15:43:30.527022 ME Firmware Version = Consumer SKU
568 15:43:30.530601 Reference Code - PCH = a.0.4c.31
569 15:43:30.533699 PCH-CRID Status = Disabled
570 15:43:30.536854 PCH-CRID Original Value = ff.ff.ff.ffff
571 15:43:30.540628 PCH-CRID New Value = ff.ff.ff.ffff
572 15:43:30.543760 OPROM - RST - RAID = ff.ff.ff.ffff
573 15:43:30.546759 PCH Hsio Version = 4.0.0.0
574 15:43:30.550260 Reference Code - SA - System Agent = a.0.4c.31
575 15:43:30.553850 Reference Code - MRC = 2.0.0.1
576 15:43:30.557024 SA - PCIe Version = a.0.4c.31
577 15:43:30.560210 SA-CRID Status = Disabled
578 15:43:30.563387 SA-CRID Original Value = 0.0.0.1
579 15:43:30.566712 SA-CRID New Value = 0.0.0.1
580 15:43:30.569938 OPROM - VBIOS = ff.ff.ff.ffff
581 15:43:30.573003 IO Manageability Engine FW Version = 11.1.4.0
582 15:43:30.576884 PHY Build Version = 0.0.0.e0
583 15:43:30.579883 Thunderbolt(TM) FW Version = 0.0.0.0
584 15:43:30.586216 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 15:43:30.590008 ITSS IRQ Polarities Before:
586 15:43:30.590102 IPC0: 0xffffffff
587 15:43:30.593182 IPC1: 0xffffffff
588 15:43:30.593268 IPC2: 0xffffffff
589 15:43:30.596348 IPC3: 0xffffffff
590 15:43:30.599591 ITSS IRQ Polarities After:
591 15:43:30.599677 IPC0: 0xffffffff
592 15:43:30.602828 IPC1: 0xffffffff
593 15:43:30.602914 IPC2: 0xffffffff
594 15:43:30.605993 IPC3: 0xffffffff
595 15:43:30.609846 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 15:43:30.622713 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 15:43:30.632633 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 15:43:30.645963 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 15:43:30.652597 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
600 15:43:30.655647 Enumerating buses...
601 15:43:30.659146 Show all devs... Before device enumeration.
602 15:43:30.662234 Root Device: enabled 1
603 15:43:30.666335 DOMAIN: 0000: enabled 1
604 15:43:30.666793 CPU_CLUSTER: 0: enabled 1
605 15:43:30.669521 PCI: 00:00.0: enabled 1
606 15:43:30.672725 PCI: 00:02.0: enabled 1
607 15:43:30.675964 PCI: 00:04.0: enabled 1
608 15:43:30.676299 PCI: 00:05.0: enabled 1
609 15:43:30.679082 PCI: 00:06.0: enabled 0
610 15:43:30.682865 PCI: 00:07.0: enabled 0
611 15:43:30.686130 PCI: 00:07.1: enabled 0
612 15:43:30.686464 PCI: 00:07.2: enabled 0
613 15:43:30.689263 PCI: 00:07.3: enabled 0
614 15:43:30.692470 PCI: 00:08.0: enabled 1
615 15:43:30.692904 PCI: 00:09.0: enabled 0
616 15:43:30.695637 PCI: 00:0a.0: enabled 0
617 15:43:30.699030 PCI: 00:0d.0: enabled 1
618 15:43:30.702182 PCI: 00:0d.1: enabled 0
619 15:43:30.702518 PCI: 00:0d.2: enabled 0
620 15:43:30.705448 PCI: 00:0d.3: enabled 0
621 15:43:30.709370 PCI: 00:0e.0: enabled 0
622 15:43:30.712534 PCI: 00:10.2: enabled 1
623 15:43:30.712868 PCI: 00:10.6: enabled 0
624 15:43:30.715685 PCI: 00:10.7: enabled 0
625 15:43:30.719227 PCI: 00:12.0: enabled 0
626 15:43:30.722012 PCI: 00:12.6: enabled 0
627 15:43:30.722113 PCI: 00:13.0: enabled 0
628 15:43:30.725072 PCI: 00:14.0: enabled 1
629 15:43:30.728992 PCI: 00:14.1: enabled 0
630 15:43:30.732058 PCI: 00:14.2: enabled 1
631 15:43:30.732130 PCI: 00:14.3: enabled 1
632 15:43:30.735363 PCI: 00:15.0: enabled 1
633 15:43:30.738324 PCI: 00:15.1: enabled 1
634 15:43:30.738419 PCI: 00:15.2: enabled 1
635 15:43:30.741543 PCI: 00:15.3: enabled 1
636 15:43:30.745445 PCI: 00:16.0: enabled 1
637 15:43:30.748505 PCI: 00:16.1: enabled 0
638 15:43:30.748621 PCI: 00:16.2: enabled 0
639 15:43:30.752164 PCI: 00:16.3: enabled 0
640 15:43:30.755638 PCI: 00:16.4: enabled 0
641 15:43:30.758407 PCI: 00:16.5: enabled 0
642 15:43:30.758817 PCI: 00:17.0: enabled 1
643 15:43:30.761829 PCI: 00:19.0: enabled 0
644 15:43:30.765382 PCI: 00:19.1: enabled 1
645 15:43:30.769336 PCI: 00:19.2: enabled 0
646 15:43:30.769803 PCI: 00:1c.0: enabled 1
647 15:43:30.771651 PCI: 00:1c.1: enabled 0
648 15:43:30.775045 PCI: 00:1c.2: enabled 0
649 15:43:30.778802 PCI: 00:1c.3: enabled 0
650 15:43:30.779167 PCI: 00:1c.4: enabled 0
651 15:43:30.782231 PCI: 00:1c.5: enabled 0
652 15:43:30.785142 PCI: 00:1c.6: enabled 1
653 15:43:30.788311 PCI: 00:1c.7: enabled 0
654 15:43:30.788695 PCI: 00:1d.0: enabled 1
655 15:43:30.791488 PCI: 00:1d.1: enabled 0
656 15:43:30.795097 PCI: 00:1d.2: enabled 1
657 15:43:30.795473 PCI: 00:1d.3: enabled 0
658 15:43:30.798527 PCI: 00:1e.0: enabled 1
659 15:43:30.801709 PCI: 00:1e.1: enabled 0
660 15:43:30.804670 PCI: 00:1e.2: enabled 1
661 15:43:30.805151 PCI: 00:1e.3: enabled 1
662 15:43:30.808629 PCI: 00:1f.0: enabled 1
663 15:43:30.811833 PCI: 00:1f.1: enabled 0
664 15:43:30.814961 PCI: 00:1f.2: enabled 1
665 15:43:30.815339 PCI: 00:1f.3: enabled 1
666 15:43:30.818244 PCI: 00:1f.4: enabled 0
667 15:43:30.821529 PCI: 00:1f.5: enabled 1
668 15:43:30.824926 PCI: 00:1f.6: enabled 0
669 15:43:30.825305 PCI: 00:1f.7: enabled 0
670 15:43:30.828055 APIC: 00: enabled 1
671 15:43:30.831341 GENERIC: 0.0: enabled 1
672 15:43:30.831720 GENERIC: 0.0: enabled 1
673 15:43:30.834440 GENERIC: 1.0: enabled 1
674 15:43:30.838199 GENERIC: 0.0: enabled 1
675 15:43:30.841394 GENERIC: 1.0: enabled 1
676 15:43:30.841778 USB0 port 0: enabled 1
677 15:43:30.844555 GENERIC: 0.0: enabled 1
678 15:43:30.847604 USB0 port 0: enabled 1
679 15:43:30.850869 GENERIC: 0.0: enabled 1
680 15:43:30.851236 I2C: 00:1a: enabled 1
681 15:43:30.854105 I2C: 00:31: enabled 1
682 15:43:30.857272 I2C: 00:32: enabled 1
683 15:43:30.857638 I2C: 00:10: enabled 1
684 15:43:30.861107 I2C: 00:15: enabled 1
685 15:43:30.864417 GENERIC: 0.0: enabled 0
686 15:43:30.867475 GENERIC: 1.0: enabled 0
687 15:43:30.867840 GENERIC: 0.0: enabled 1
688 15:43:30.871088 SPI: 00: enabled 1
689 15:43:30.871467 SPI: 00: enabled 1
690 15:43:30.874271 PNP: 0c09.0: enabled 1
691 15:43:30.877325 GENERIC: 0.0: enabled 1
692 15:43:30.880688 USB3 port 0: enabled 1
693 15:43:30.881174 USB3 port 1: enabled 1
694 15:43:30.883787 USB3 port 2: enabled 0
695 15:43:30.887551 USB3 port 3: enabled 0
696 15:43:30.888061 USB2 port 0: enabled 0
697 15:43:30.890744 USB2 port 1: enabled 1
698 15:43:30.893941 USB2 port 2: enabled 1
699 15:43:30.897354 USB2 port 3: enabled 0
700 15:43:30.897722 USB2 port 4: enabled 1
701 15:43:30.900365 USB2 port 5: enabled 0
702 15:43:30.904227 USB2 port 6: enabled 0
703 15:43:30.904606 USB2 port 7: enabled 0
704 15:43:30.907419 USB2 port 8: enabled 0
705 15:43:30.910690 USB2 port 9: enabled 0
706 15:43:30.911058 USB3 port 0: enabled 0
707 15:43:30.914197 USB3 port 1: enabled 1
708 15:43:30.917137 USB3 port 2: enabled 0
709 15:43:30.920399 USB3 port 3: enabled 0
710 15:43:30.920766 GENERIC: 0.0: enabled 1
711 15:43:30.923656 GENERIC: 1.0: enabled 1
712 15:43:30.927425 APIC: 01: enabled 1
713 15:43:30.927793 APIC: 03: enabled 1
714 15:43:30.930683 APIC: 07: enabled 1
715 15:43:30.933673 APIC: 05: enabled 1
716 15:43:30.934040 APIC: 04: enabled 1
717 15:43:30.937004 APIC: 02: enabled 1
718 15:43:30.937499 APIC: 06: enabled 1
719 15:43:30.940619 Compare with tree...
720 15:43:30.943734 Root Device: enabled 1
721 15:43:30.946731 DOMAIN: 0000: enabled 1
722 15:43:30.947097 PCI: 00:00.0: enabled 1
723 15:43:30.950037 PCI: 00:02.0: enabled 1
724 15:43:30.953270 PCI: 00:04.0: enabled 1
725 15:43:30.957069 GENERIC: 0.0: enabled 1
726 15:43:30.960227 PCI: 00:05.0: enabled 1
727 15:43:30.960594 PCI: 00:06.0: enabled 0
728 15:43:30.963505 PCI: 00:07.0: enabled 0
729 15:43:30.966740 GENERIC: 0.0: enabled 1
730 15:43:30.969934 PCI: 00:07.1: enabled 0
731 15:43:30.973685 GENERIC: 1.0: enabled 1
732 15:43:30.974052 PCI: 00:07.2: enabled 0
733 15:43:30.976746 GENERIC: 0.0: enabled 1
734 15:43:30.980122 PCI: 00:07.3: enabled 0
735 15:43:30.983769 GENERIC: 1.0: enabled 1
736 15:43:30.986669 PCI: 00:08.0: enabled 1
737 15:43:30.987041 PCI: 00:09.0: enabled 0
738 15:43:30.989879 PCI: 00:0a.0: enabled 0
739 15:43:30.993528 PCI: 00:0d.0: enabled 1
740 15:43:30.996286 USB0 port 0: enabled 1
741 15:43:30.999887 USB3 port 0: enabled 1
742 15:43:31.003297 USB3 port 1: enabled 1
743 15:43:31.003665 USB3 port 2: enabled 0
744 15:43:31.006628 USB3 port 3: enabled 0
745 15:43:31.010010 PCI: 00:0d.1: enabled 0
746 15:43:31.013100 PCI: 00:0d.2: enabled 0
747 15:43:31.016452 GENERIC: 0.0: enabled 1
748 15:43:31.016821 PCI: 00:0d.3: enabled 0
749 15:43:31.019640 PCI: 00:0e.0: enabled 0
750 15:43:31.022896 PCI: 00:10.2: enabled 1
751 15:43:31.026103 PCI: 00:10.6: enabled 0
752 15:43:31.029306 PCI: 00:10.7: enabled 0
753 15:43:31.029672 PCI: 00:12.0: enabled 0
754 15:43:31.033029 PCI: 00:12.6: enabled 0
755 15:43:31.035962 PCI: 00:13.0: enabled 0
756 15:43:31.039249 PCI: 00:14.0: enabled 1
757 15:43:31.043118 USB0 port 0: enabled 1
758 15:43:31.043486 USB2 port 0: enabled 0
759 15:43:31.046017 USB2 port 1: enabled 1
760 15:43:31.049708 USB2 port 2: enabled 1
761 15:43:31.052718 USB2 port 3: enabled 0
762 15:43:31.056069 USB2 port 4: enabled 1
763 15:43:31.059161 USB2 port 5: enabled 0
764 15:43:31.059528 USB2 port 6: enabled 0
765 15:43:31.062356 USB2 port 7: enabled 0
766 15:43:31.065454 USB2 port 8: enabled 0
767 15:43:31.068754 USB2 port 9: enabled 0
768 15:43:31.072047 USB3 port 0: enabled 0
769 15:43:31.075727 USB3 port 1: enabled 1
770 15:43:31.076130 USB3 port 2: enabled 0
771 15:43:31.078984 USB3 port 3: enabled 0
772 15:43:31.082000 PCI: 00:14.1: enabled 0
773 15:43:31.085665 PCI: 00:14.2: enabled 1
774 15:43:31.088894 PCI: 00:14.3: enabled 1
775 15:43:31.089235 GENERIC: 0.0: enabled 1
776 15:43:31.092715 PCI: 00:15.0: enabled 1
777 15:43:31.096428 I2C: 00:1a: enabled 1
778 15:43:31.099566 I2C: 00:31: enabled 1
779 15:43:31.099944 I2C: 00:32: enabled 1
780 15:43:31.102673 PCI: 00:15.1: enabled 1
781 15:43:31.106090 I2C: 00:10: enabled 1
782 15:43:31.109756 PCI: 00:15.2: enabled 1
783 15:43:31.110149 PCI: 00:15.3: enabled 1
784 15:43:31.159464 PCI: 00:16.0: enabled 1
785 15:43:31.159703 PCI: 00:16.1: enabled 0
786 15:43:31.159851 PCI: 00:16.2: enabled 0
787 15:43:31.159982 PCI: 00:16.3: enabled 0
788 15:43:31.160321 PCI: 00:16.4: enabled 0
789 15:43:31.160419 PCI: 00:16.5: enabled 0
790 15:43:31.160519 PCI: 00:17.0: enabled 1
791 15:43:31.160618 PCI: 00:19.0: enabled 0
792 15:43:31.160705 PCI: 00:19.1: enabled 1
793 15:43:31.160782 I2C: 00:15: enabled 1
794 15:43:31.160858 PCI: 00:19.2: enabled 0
795 15:43:31.160934 PCI: 00:1d.0: enabled 1
796 15:43:31.161049 GENERIC: 0.0: enabled 1
797 15:43:31.161163 PCI: 00:1e.0: enabled 1
798 15:43:31.161307 PCI: 00:1e.1: enabled 0
799 15:43:31.161441 PCI: 00:1e.2: enabled 1
800 15:43:31.161563 SPI: 00: enabled 1
801 15:43:31.161676 PCI: 00:1e.3: enabled 1
802 15:43:31.161789 SPI: 00: enabled 1
803 15:43:31.196096 PCI: 00:1f.0: enabled 1
804 15:43:31.196250 PNP: 0c09.0: enabled 1
805 15:43:31.196324 PCI: 00:1f.1: enabled 0
806 15:43:31.196388 PCI: 00:1f.2: enabled 1
807 15:43:31.196448 GENERIC: 0.0: enabled 1
808 15:43:31.196705 GENERIC: 0.0: enabled 1
809 15:43:31.196775 GENERIC: 1.0: enabled 1
810 15:43:31.196837 PCI: 00:1f.3: enabled 1
811 15:43:31.196896 PCI: 00:1f.4: enabled 0
812 15:43:31.196952 PCI: 00:1f.5: enabled 1
813 15:43:31.197009 PCI: 00:1f.6: enabled 0
814 15:43:31.197066 PCI: 00:1f.7: enabled 0
815 15:43:31.199477 CPU_CLUSTER: 0: enabled 1
816 15:43:31.199565 APIC: 00: enabled 1
817 15:43:31.203206 APIC: 01: enabled 1
818 15:43:31.203296 APIC: 03: enabled 1
819 15:43:31.203370 APIC: 07: enabled 1
820 15:43:31.206341 APIC: 05: enabled 1
821 15:43:31.209472 APIC: 04: enabled 1
822 15:43:31.209549 APIC: 02: enabled 1
823 15:43:31.213074 APIC: 06: enabled 1
824 15:43:31.216269 Root Device scanning...
825 15:43:31.219765 scan_static_bus for Root Device
826 15:43:31.222974 DOMAIN: 0000 enabled
827 15:43:31.226140 CPU_CLUSTER: 0 enabled
828 15:43:31.226237 DOMAIN: 0000 scanning...
829 15:43:31.229384 PCI: pci_scan_bus for bus 00
830 15:43:31.232848 PCI: 00:00.0 [8086/0000] ops
831 15:43:31.236190 PCI: 00:00.0 [8086/9a12] enabled
832 15:43:31.239192 PCI: 00:02.0 [8086/0000] bus ops
833 15:43:31.242581 PCI: 00:02.0 [8086/9a40] enabled
834 15:43:31.245646 PCI: 00:04.0 [8086/0000] bus ops
835 15:43:31.249359 PCI: 00:04.0 [8086/9a03] enabled
836 15:43:31.252433 PCI: 00:05.0 [8086/9a19] enabled
837 15:43:31.256145 PCI: 00:07.0 [0000/0000] hidden
838 15:43:31.259322 PCI: 00:08.0 [8086/9a11] enabled
839 15:43:31.262273 PCI: 00:0a.0 [8086/9a0d] disabled
840 15:43:31.265633 PCI: 00:0d.0 [8086/0000] bus ops
841 15:43:31.268806 PCI: 00:0d.0 [8086/9a13] enabled
842 15:43:31.272045 PCI: 00:14.0 [8086/0000] bus ops
843 15:43:31.275888 PCI: 00:14.0 [8086/a0ed] enabled
844 15:43:31.279178 PCI: 00:14.2 [8086/a0ef] enabled
845 15:43:31.282154 PCI: 00:14.3 [8086/0000] bus ops
846 15:43:31.285377 PCI: 00:14.3 [8086/a0f0] enabled
847 15:43:31.288645 PCI: 00:15.0 [8086/0000] bus ops
848 15:43:31.292260 PCI: 00:15.0 [8086/a0e8] enabled
849 15:43:31.295395 PCI: 00:15.1 [8086/0000] bus ops
850 15:43:31.298336 PCI: 00:15.1 [8086/a0e9] enabled
851 15:43:31.301692 PCI: 00:15.2 [8086/0000] bus ops
852 15:43:31.305570 PCI: 00:15.2 [8086/a0ea] enabled
853 15:43:31.308827 PCI: 00:15.3 [8086/0000] bus ops
854 15:43:31.311927 PCI: 00:15.3 [8086/a0eb] enabled
855 15:43:31.315350 PCI: 00:16.0 [8086/0000] ops
856 15:43:31.318396 PCI: 00:16.0 [8086/a0e0] enabled
857 15:43:31.325173 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 15:43:31.328408 PCI: 00:19.0 [8086/0000] bus ops
859 15:43:31.331761 PCI: 00:19.0 [8086/a0c5] disabled
860 15:43:31.335057 PCI: 00:19.1 [8086/0000] bus ops
861 15:43:31.338249 PCI: 00:19.1 [8086/a0c6] enabled
862 15:43:31.341769 PCI: 00:1d.0 [8086/0000] bus ops
863 15:43:31.344881 PCI: 00:1d.0 [8086/a0b0] enabled
864 15:43:31.348417 PCI: 00:1e.0 [8086/0000] ops
865 15:43:31.351400 PCI: 00:1e.0 [8086/a0a8] enabled
866 15:43:31.354842 PCI: 00:1e.2 [8086/0000] bus ops
867 15:43:31.358397 PCI: 00:1e.2 [8086/a0aa] enabled
868 15:43:31.361801 PCI: 00:1e.3 [8086/0000] bus ops
869 15:43:31.364663 PCI: 00:1e.3 [8086/a0ab] enabled
870 15:43:31.367846 PCI: 00:1f.0 [8086/0000] bus ops
871 15:43:31.371578 PCI: 00:1f.0 [8086/a087] enabled
872 15:43:31.374907 RTC Init
873 15:43:31.378079 Set power on after power failure.
874 15:43:31.378168 Disabling Deep S3
875 15:43:31.381296 Disabling Deep S3
876 15:43:31.381385 Disabling Deep S4
877 15:43:31.384513 Disabling Deep S4
878 15:43:31.387716 Disabling Deep S5
879 15:43:31.387799 Disabling Deep S5
880 15:43:31.390780 PCI: 00:1f.2 [0000/0000] hidden
881 15:43:31.394583 PCI: 00:1f.3 [8086/0000] bus ops
882 15:43:31.397815 PCI: 00:1f.3 [8086/a0c8] enabled
883 15:43:31.400984 PCI: 00:1f.5 [8086/0000] bus ops
884 15:43:31.404063 PCI: 00:1f.5 [8086/a0a4] enabled
885 15:43:31.407338 PCI: Leftover static devices:
886 15:43:31.407429 PCI: 00:10.2
887 15:43:31.410470 PCI: 00:10.6
888 15:43:31.410582 PCI: 00:10.7
889 15:43:31.414389 PCI: 00:06.0
890 15:43:31.414489 PCI: 00:07.1
891 15:43:31.417564 PCI: 00:07.2
892 15:43:31.417648 PCI: 00:07.3
893 15:43:31.417716 PCI: 00:09.0
894 15:43:31.420827 PCI: 00:0d.1
895 15:43:31.420911 PCI: 00:0d.2
896 15:43:31.423814 PCI: 00:0d.3
897 15:43:31.423897 PCI: 00:0e.0
898 15:43:31.423964 PCI: 00:12.0
899 15:43:31.427175 PCI: 00:12.6
900 15:43:31.427264 PCI: 00:13.0
901 15:43:31.430643 PCI: 00:14.1
902 15:43:31.430732 PCI: 00:16.1
903 15:43:31.433809 PCI: 00:16.2
904 15:43:31.433938 PCI: 00:16.3
905 15:43:31.434051 PCI: 00:16.4
906 15:43:31.436973 PCI: 00:16.5
907 15:43:31.437077 PCI: 00:17.0
908 15:43:31.440400 PCI: 00:19.2
909 15:43:31.440523 PCI: 00:1e.1
910 15:43:31.440637 PCI: 00:1f.1
911 15:43:31.443319 PCI: 00:1f.4
912 15:43:31.443478 PCI: 00:1f.6
913 15:43:31.447116 PCI: 00:1f.7
914 15:43:31.450223 PCI: Check your devicetree.cb.
915 15:43:31.450395 PCI: 00:02.0 scanning...
916 15:43:31.457067 scan_generic_bus for PCI: 00:02.0
917 15:43:31.460046 scan_generic_bus for PCI: 00:02.0 done
918 15:43:31.463290 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 15:43:31.466765 PCI: 00:04.0 scanning...
920 15:43:31.470463 scan_generic_bus for PCI: 00:04.0
921 15:43:31.473742 GENERIC: 0.0 enabled
922 15:43:31.476914 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 15:43:31.483191 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 15:43:31.486340 PCI: 00:0d.0 scanning...
925 15:43:31.490235 scan_static_bus for PCI: 00:0d.0
926 15:43:31.490335 USB0 port 0 enabled
927 15:43:31.493313 USB0 port 0 scanning...
928 15:43:31.496539 scan_static_bus for USB0 port 0
929 15:43:31.499649 USB3 port 0 enabled
930 15:43:31.499749 USB3 port 1 enabled
931 15:43:31.503408 USB3 port 2 disabled
932 15:43:31.506464 USB3 port 3 disabled
933 15:43:31.506563 USB3 port 0 scanning...
934 15:43:31.509600 scan_static_bus for USB3 port 0
935 15:43:31.516637 scan_static_bus for USB3 port 0 done
936 15:43:31.519812 scan_bus: bus USB3 port 0 finished in 6 msecs
937 15:43:31.523152 USB3 port 1 scanning...
938 15:43:31.526273 scan_static_bus for USB3 port 1
939 15:43:31.530087 scan_static_bus for USB3 port 1 done
940 15:43:31.532975 scan_bus: bus USB3 port 1 finished in 6 msecs
941 15:43:31.536628 scan_static_bus for USB0 port 0 done
942 15:43:31.542984 scan_bus: bus USB0 port 0 finished in 43 msecs
943 15:43:31.546694 scan_static_bus for PCI: 00:0d.0 done
944 15:43:31.549836 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 15:43:31.552983 PCI: 00:14.0 scanning...
946 15:43:31.556687 scan_static_bus for PCI: 00:14.0
947 15:43:31.559798 USB0 port 0 enabled
948 15:43:31.562870 USB0 port 0 scanning...
949 15:43:31.566617 scan_static_bus for USB0 port 0
950 15:43:31.567108 USB2 port 0 disabled
951 15:43:31.569876 USB2 port 1 enabled
952 15:43:31.573034 USB2 port 2 enabled
953 15:43:31.573295 USB2 port 3 disabled
954 15:43:31.576090 USB2 port 4 enabled
955 15:43:31.576435 USB2 port 5 disabled
956 15:43:31.579132 USB2 port 6 disabled
957 15:43:31.582766 USB2 port 7 disabled
958 15:43:31.582940 USB2 port 8 disabled
959 15:43:31.586147 USB2 port 9 disabled
960 15:43:31.588958 USB3 port 0 disabled
961 15:43:31.589033 USB3 port 1 enabled
962 15:43:31.592487 USB3 port 2 disabled
963 15:43:31.595643 USB3 port 3 disabled
964 15:43:31.595717 USB2 port 1 scanning...
965 15:43:31.598755 scan_static_bus for USB2 port 1
966 15:43:31.605985 scan_static_bus for USB2 port 1 done
967 15:43:31.609035 scan_bus: bus USB2 port 1 finished in 6 msecs
968 15:43:31.612059 USB2 port 2 scanning...
969 15:43:31.615355 scan_static_bus for USB2 port 2
970 15:43:31.619250 scan_static_bus for USB2 port 2 done
971 15:43:31.622650 scan_bus: bus USB2 port 2 finished in 6 msecs
972 15:43:31.625903 USB2 port 4 scanning...
973 15:43:31.628931 scan_static_bus for USB2 port 4
974 15:43:31.632717 scan_static_bus for USB2 port 4 done
975 15:43:31.638982 scan_bus: bus USB2 port 4 finished in 6 msecs
976 15:43:31.639377 USB3 port 1 scanning...
977 15:43:31.642374 scan_static_bus for USB3 port 1
978 15:43:31.645250 scan_static_bus for USB3 port 1 done
979 15:43:31.651962 scan_bus: bus USB3 port 1 finished in 6 msecs
980 15:43:31.655474 scan_static_bus for USB0 port 0 done
981 15:43:31.658563 scan_bus: bus USB0 port 0 finished in 93 msecs
982 15:43:31.665403 scan_static_bus for PCI: 00:14.0 done
983 15:43:31.668587 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
984 15:43:31.671716 PCI: 00:14.3 scanning...
985 15:43:31.675423 scan_static_bus for PCI: 00:14.3
986 15:43:31.675556 GENERIC: 0.0 enabled
987 15:43:31.681887 scan_static_bus for PCI: 00:14.3 done
988 15:43:31.685035 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 15:43:31.688746 PCI: 00:15.0 scanning...
990 15:43:31.691805 scan_static_bus for PCI: 00:15.0
991 15:43:31.691907 I2C: 00:1a enabled
992 15:43:31.695003 I2C: 00:31 enabled
993 15:43:31.698421 I2C: 00:32 enabled
994 15:43:31.701994 scan_static_bus for PCI: 00:15.0 done
995 15:43:31.705347 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 15:43:31.708490 PCI: 00:15.1 scanning...
997 15:43:31.711721 scan_static_bus for PCI: 00:15.1
998 15:43:31.714702 I2C: 00:10 enabled
999 15:43:31.718782 scan_static_bus for PCI: 00:15.1 done
1000 15:43:31.721989 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 15:43:31.724590 PCI: 00:15.2 scanning...
1002 15:43:31.728362 scan_static_bus for PCI: 00:15.2
1003 15:43:31.731546 scan_static_bus for PCI: 00:15.2 done
1004 15:43:31.737972 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 15:43:31.738076 PCI: 00:15.3 scanning...
1006 15:43:31.741792 scan_static_bus for PCI: 00:15.3
1007 15:43:31.748170 scan_static_bus for PCI: 00:15.3 done
1008 15:43:31.751439 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 15:43:31.754676 PCI: 00:19.1 scanning...
1010 15:43:31.757901 scan_static_bus for PCI: 00:19.1
1011 15:43:31.761384 I2C: 00:15 enabled
1012 15:43:31.765054 scan_static_bus for PCI: 00:19.1 done
1013 15:43:31.768214 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 15:43:31.771319 PCI: 00:1d.0 scanning...
1015 15:43:31.774509 do_pci_scan_bridge for PCI: 00:1d.0
1016 15:43:31.777635 PCI: pci_scan_bus for bus 01
1017 15:43:31.781627 PCI: 01:00.0 [1c5c/174a] enabled
1018 15:43:31.784836 GENERIC: 0.0 enabled
1019 15:43:31.788037 Enabling Common Clock Configuration
1020 15:43:31.791207 L1 Sub-State supported from root port 29
1021 15:43:31.794368 L1 Sub-State Support = 0xf
1022 15:43:31.797427 CommonModeRestoreTime = 0x28
1023 15:43:31.800640 Power On Value = 0x16, Power On Scale = 0x0
1024 15:43:31.804329 ASPM: Enabled L1
1025 15:43:31.807389 PCIe: Max_Payload_Size adjusted to 128
1026 15:43:31.810473 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 15:43:31.814279 PCI: 00:1e.2 scanning...
1028 15:43:31.816880 scan_generic_bus for PCI: 00:1e.2
1029 15:43:31.820553 SPI: 00 enabled
1030 15:43:31.827090 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 15:43:31.830172 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 15:43:31.833963 PCI: 00:1e.3 scanning...
1033 15:43:31.837284 scan_generic_bus for PCI: 00:1e.3
1034 15:43:31.837428 SPI: 00 enabled
1035 15:43:31.843347 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 15:43:31.850388 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 15:43:31.850472 PCI: 00:1f.0 scanning...
1038 15:43:31.853538 scan_static_bus for PCI: 00:1f.0
1039 15:43:31.856762 PNP: 0c09.0 enabled
1040 15:43:31.860248 PNP: 0c09.0 scanning...
1041 15:43:31.863417 scan_static_bus for PNP: 0c09.0
1042 15:43:31.866757 scan_static_bus for PNP: 0c09.0 done
1043 15:43:31.870047 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 15:43:31.876636 scan_static_bus for PCI: 00:1f.0 done
1045 15:43:31.879978 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 15:43:31.883671 PCI: 00:1f.2 scanning...
1047 15:43:31.886851 scan_static_bus for PCI: 00:1f.2
1048 15:43:31.886959 GENERIC: 0.0 enabled
1049 15:43:31.889960 GENERIC: 0.0 scanning...
1050 15:43:31.893187 scan_static_bus for GENERIC: 0.0
1051 15:43:31.896517 GENERIC: 0.0 enabled
1052 15:43:31.900347 GENERIC: 1.0 enabled
1053 15:43:31.903437 scan_static_bus for GENERIC: 0.0 done
1054 15:43:31.906468 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 15:43:31.909765 scan_static_bus for PCI: 00:1f.2 done
1056 15:43:31.916660 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 15:43:31.919822 PCI: 00:1f.3 scanning...
1058 15:43:31.922988 scan_static_bus for PCI: 00:1f.3
1059 15:43:31.926509 scan_static_bus for PCI: 00:1f.3 done
1060 15:43:31.929526 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 15:43:31.933224 PCI: 00:1f.5 scanning...
1062 15:43:31.935888 scan_generic_bus for PCI: 00:1f.5
1063 15:43:31.939639 scan_generic_bus for PCI: 00:1f.5 done
1064 15:43:31.945883 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 15:43:31.949764 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1066 15:43:31.952887 scan_static_bus for Root Device done
1067 15:43:31.959268 scan_bus: bus Root Device finished in 736 msecs
1068 15:43:31.959371 done
1069 15:43:31.966172 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1070 15:43:31.969289 Chrome EC: UHEPI supported
1071 15:43:31.976089 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 15:43:31.982331 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 15:43:31.985849 SPI flash protection: WPSW=0 SRP0=0
1074 15:43:31.989158 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 15:43:31.995529 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 15:43:31.998740 found VGA at PCI: 00:02.0
1077 15:43:32.002654 Setting up VGA for PCI: 00:02.0
1078 15:43:32.005721 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 15:43:32.012044 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 15:43:32.012146 Allocating resources...
1081 15:43:32.015766 Reading resources...
1082 15:43:32.019031 Root Device read_resources bus 0 link: 0
1083 15:43:32.025371 DOMAIN: 0000 read_resources bus 0 link: 0
1084 15:43:32.029154 PCI: 00:04.0 read_resources bus 1 link: 0
1085 15:43:32.035265 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 15:43:32.038485 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 15:43:32.045215 USB0 port 0 read_resources bus 0 link: 0
1088 15:43:32.048881 USB0 port 0 read_resources bus 0 link: 0 done
1089 15:43:32.055267 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 15:43:32.058303 PCI: 00:14.0 read_resources bus 0 link: 0
1091 15:43:32.061485 USB0 port 0 read_resources bus 0 link: 0
1092 15:43:32.069019 USB0 port 0 read_resources bus 0 link: 0 done
1093 15:43:32.072168 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 15:43:32.079188 PCI: 00:14.3 read_resources bus 0 link: 0
1095 15:43:32.082330 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 15:43:32.089364 PCI: 00:15.0 read_resources bus 0 link: 0
1097 15:43:32.092204 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 15:43:32.099049 PCI: 00:15.1 read_resources bus 0 link: 0
1099 15:43:32.102290 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 15:43:32.109848 PCI: 00:19.1 read_resources bus 0 link: 0
1101 15:43:32.112959 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 15:43:32.119232 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 15:43:32.122563 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 15:43:32.129555 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 15:43:32.133260 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 15:43:32.140035 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 15:43:32.143168 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 15:43:32.149509 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 15:43:32.152616 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 15:43:32.159267 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 15:43:32.162408 GENERIC: 0.0 read_resources bus 0 link: 0
1112 15:43:32.168899 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 15:43:32.172671 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 15:43:32.179019 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 15:43:32.182217 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 15:43:32.188624 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 15:43:32.192398 Root Device read_resources bus 0 link: 0 done
1118 15:43:32.195492 Done reading resources.
1119 15:43:32.202185 Show resources in subtree (Root Device)...After reading.
1120 15:43:32.205566 Root Device child on link 0 DOMAIN: 0000
1121 15:43:32.208851 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 15:43:32.218904 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 15:43:32.228449 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 15:43:32.231723 PCI: 00:00.0
1125 15:43:32.241674 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 15:43:32.248611 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 15:43:32.258001 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 15:43:32.267752 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 15:43:32.277751 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 15:43:32.287829 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 15:43:32.297941 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 15:43:32.304162 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 15:43:32.314366 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 15:43:32.324057 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 15:43:32.334326 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 15:43:32.343743 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 15:43:32.353814 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 15:43:32.360219 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 15:43:32.370369 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 15:43:32.380342 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 15:43:32.389987 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 15:43:32.400234 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 15:43:32.410401 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 15:43:32.419789 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 15:43:32.419898 PCI: 00:02.0
1146 15:43:32.429916 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 15:43:32.440467 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 15:43:32.450098 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 15:43:32.453193 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 15:43:32.463189 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 15:43:32.466411 GENERIC: 0.0
1152 15:43:32.466804 PCI: 00:05.0
1153 15:43:32.476569 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 15:43:32.482648 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 15:43:32.482808 GENERIC: 0.0
1156 15:43:32.485874 PCI: 00:08.0
1157 15:43:32.495789 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 15:43:32.495924 PCI: 00:0a.0
1159 15:43:32.502661 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 15:43:32.512979 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 15:43:32.516152 USB0 port 0 child on link 0 USB3 port 0
1162 15:43:32.519592 USB3 port 0
1163 15:43:32.519975 USB3 port 1
1164 15:43:32.522539 USB3 port 2
1165 15:43:32.522975 USB3 port 3
1166 15:43:32.529492 PCI: 00:14.0 child on link 0 USB0 port 0
1167 15:43:32.539085 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 15:43:32.542022 USB0 port 0 child on link 0 USB2 port 0
1169 15:43:32.545450 USB2 port 0
1170 15:43:32.545676 USB2 port 1
1171 15:43:32.548634 USB2 port 2
1172 15:43:32.548806 USB2 port 3
1173 15:43:32.551874 USB2 port 4
1174 15:43:32.552048 USB2 port 5
1175 15:43:32.555609 USB2 port 6
1176 15:43:32.555874 USB2 port 7
1177 15:43:32.558364 USB2 port 8
1178 15:43:32.558451 USB2 port 9
1179 15:43:32.562148 USB3 port 0
1180 15:43:32.562230 USB3 port 1
1181 15:43:32.565366 USB3 port 2
1182 15:43:32.565447 USB3 port 3
1183 15:43:32.568682 PCI: 00:14.2
1184 15:43:32.579278 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 15:43:32.588860 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 15:43:32.592107 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 15:43:32.602079 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 15:43:32.604898 GENERIC: 0.0
1189 15:43:32.608317 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 15:43:32.617778 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 15:43:32.621489 I2C: 00:1a
1192 15:43:32.621633 I2C: 00:31
1193 15:43:32.624676 I2C: 00:32
1194 15:43:32.627732 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 15:43:32.637874 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 15:43:32.637968 I2C: 00:10
1197 15:43:32.640836 PCI: 00:15.2
1198 15:43:32.650869 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 15:43:32.650952 PCI: 00:15.3
1200 15:43:32.661267 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 15:43:32.664083 PCI: 00:16.0
1202 15:43:32.673780 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 15:43:32.673901 PCI: 00:19.0
1204 15:43:32.680885 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 15:43:32.690318 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 15:43:32.690432 I2C: 00:15
1207 15:43:32.697607 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 15:43:32.703915 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 15:43:32.713848 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 15:43:32.723398 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 15:43:32.726734 GENERIC: 0.0
1212 15:43:32.726844 PCI: 01:00.0
1213 15:43:32.736583 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 15:43:32.746626 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1215 15:43:32.756796 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1216 15:43:32.756884 PCI: 00:1e.0
1217 15:43:32.770027 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1218 15:43:32.773467 PCI: 00:1e.2 child on link 0 SPI: 00
1219 15:43:32.782987 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 15:43:32.783074 SPI: 00
1221 15:43:32.786729 PCI: 00:1e.3 child on link 0 SPI: 00
1222 15:43:32.796380 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 15:43:32.799638 SPI: 00
1224 15:43:32.802858 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1225 15:43:32.812776 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1226 15:43:32.812864 PNP: 0c09.0
1227 15:43:32.822537 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1228 15:43:32.825850 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1229 15:43:32.835828 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1230 15:43:32.845705 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1231 15:43:32.849328 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1232 15:43:32.852483 GENERIC: 0.0
1233 15:43:32.852567 GENERIC: 1.0
1234 15:43:32.855685 PCI: 00:1f.3
1235 15:43:32.865880 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 15:43:32.875638 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 15:43:32.875724 PCI: 00:1f.5
1238 15:43:32.885443 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1239 15:43:32.892001 CPU_CLUSTER: 0 child on link 0 APIC: 00
1240 15:43:32.892087 APIC: 00
1241 15:43:32.892154 APIC: 01
1242 15:43:32.895132 APIC: 03
1243 15:43:32.895230 APIC: 07
1244 15:43:32.895309 APIC: 05
1245 15:43:32.899063 APIC: 04
1246 15:43:32.899144 APIC: 02
1247 15:43:32.902161 APIC: 06
1248 15:43:32.908549 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1249 15:43:32.915452 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1250 15:43:32.921662 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1251 15:43:32.925303 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1252 15:43:32.931778 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1253 15:43:32.934826 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1254 15:43:32.938620 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1255 15:43:32.944834 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 15:43:32.954616 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1257 15:43:32.961310 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1258 15:43:32.968307 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1259 15:43:32.974597 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1260 15:43:32.981316 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1261 15:43:32.991300 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1262 15:43:32.997845 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1263 15:43:33.001412 DOMAIN: 0000: Resource ranges:
1264 15:43:33.004606 * Base: 1000, Size: 800, Tag: 100
1265 15:43:33.007717 * Base: 1900, Size: e700, Tag: 100
1266 15:43:33.014140 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1267 15:43:33.021048 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1268 15:43:33.027870 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1269 15:43:33.034336 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1270 15:43:33.040583 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1271 15:43:33.050600 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1272 15:43:33.057423 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1273 15:43:33.064069 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1274 15:43:33.073730 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1275 15:43:33.080222 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1276 15:43:33.086776 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1277 15:43:33.096698 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1278 15:43:33.103719 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1279 15:43:33.110242 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1280 15:43:33.120317 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1281 15:43:33.126622 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1282 15:43:33.133310 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1283 15:43:33.143587 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1284 15:43:33.150116 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1285 15:43:33.156975 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1286 15:43:33.166586 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1287 15:43:33.173228 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1288 15:43:33.179465 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1289 15:43:33.189478 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1290 15:43:33.196332 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1291 15:43:33.199280 DOMAIN: 0000: Resource ranges:
1292 15:43:33.202392 * Base: 7fc00000, Size: 40400000, Tag: 200
1293 15:43:33.209396 * Base: d0000000, Size: 28000000, Tag: 200
1294 15:43:33.212611 * Base: fa000000, Size: 1000000, Tag: 200
1295 15:43:33.215782 * Base: fb001000, Size: 2fff000, Tag: 200
1296 15:43:33.222600 * Base: fe010000, Size: 2e000, Tag: 200
1297 15:43:33.225863 * Base: fe03f000, Size: d41000, Tag: 200
1298 15:43:33.229117 * Base: fed88000, Size: 8000, Tag: 200
1299 15:43:33.232245 * Base: fed93000, Size: d000, Tag: 200
1300 15:43:33.238765 * Base: feda2000, Size: 1e000, Tag: 200
1301 15:43:33.242651 * Base: fede0000, Size: 1220000, Tag: 200
1302 15:43:33.245879 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1303 15:43:33.252032 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1304 15:43:33.258872 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1305 15:43:33.266030 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1306 15:43:33.272394 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1307 15:43:33.279200 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1308 15:43:33.285461 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1309 15:43:33.292146 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1310 15:43:33.298472 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1311 15:43:33.305602 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1312 15:43:33.314884 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1313 15:43:33.321725 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1314 15:43:33.328631 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1315 15:43:33.335103 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1316 15:43:33.341214 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1317 15:43:33.348008 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1318 15:43:33.354695 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1319 15:43:33.360879 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1320 15:43:33.367836 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1321 15:43:33.374201 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1322 15:43:33.381276 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1323 15:43:33.387565 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1324 15:43:33.394167 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1325 15:43:33.401049 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1326 15:43:33.407410 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1327 15:43:33.411098 PCI: 00:1d.0: Resource ranges:
1328 15:43:33.417450 * Base: 7fc00000, Size: 100000, Tag: 200
1329 15:43:33.423781 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1330 15:43:33.430507 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1331 15:43:33.436852 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1332 15:43:33.443659 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1333 15:43:33.450306 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1334 15:43:33.456569 Root Device assign_resources, bus 0 link: 0
1335 15:43:33.460162 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 15:43:33.470029 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1337 15:43:33.476632 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1338 15:43:33.486266 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1339 15:43:33.493166 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1340 15:43:33.496357 PCI: 00:04.0 assign_resources, bus 1 link: 0
1341 15:43:33.503169 PCI: 00:04.0 assign_resources, bus 1 link: 0
1342 15:43:33.509897 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1343 15:43:33.519837 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1344 15:43:33.526251 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1345 15:43:33.532948 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1346 15:43:33.535805 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1347 15:43:33.545787 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1348 15:43:33.549330 PCI: 00:14.0 assign_resources, bus 0 link: 0
1349 15:43:33.552287 PCI: 00:14.0 assign_resources, bus 0 link: 0
1350 15:43:33.563062 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1351 15:43:33.568980 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1352 15:43:33.579250 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1353 15:43:33.582444 PCI: 00:14.3 assign_resources, bus 0 link: 0
1354 15:43:33.588621 PCI: 00:14.3 assign_resources, bus 0 link: 0
1355 15:43:33.595619 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1356 15:43:33.598715 PCI: 00:15.0 assign_resources, bus 0 link: 0
1357 15:43:33.605560 PCI: 00:15.0 assign_resources, bus 0 link: 0
1358 15:43:33.612047 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1359 15:43:33.618314 PCI: 00:15.1 assign_resources, bus 0 link: 0
1360 15:43:33.621670 PCI: 00:15.1 assign_resources, bus 0 link: 0
1361 15:43:33.631928 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1362 15:43:33.638643 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1363 15:43:33.648865 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1364 15:43:33.654883 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1365 15:43:33.661761 PCI: 00:19.1 assign_resources, bus 0 link: 0
1366 15:43:33.664531 PCI: 00:19.1 assign_resources, bus 0 link: 0
1367 15:43:33.674502 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1368 15:43:33.684735 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1369 15:43:33.691560 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1370 15:43:33.697985 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 15:43:33.704081 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1372 15:43:33.711070 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1373 15:43:33.721011 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1374 15:43:33.724160 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 15:43:33.734149 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1376 15:43:33.737364 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1377 15:43:33.743461 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1378 15:43:33.750152 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1379 15:43:33.753742 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1380 15:43:33.760198 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1381 15:43:33.763974 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 15:43:33.769998 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1383 15:43:33.773605 LPC: Trying to open IO window from 800 size 1ff
1384 15:43:33.783747 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1385 15:43:33.790437 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1386 15:43:33.799968 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1387 15:43:33.803244 DOMAIN: 0000 assign_resources, bus 0 link: 0
1388 15:43:33.810004 Root Device assign_resources, bus 0 link: 0
1389 15:43:33.810092 Done setting resources.
1390 15:43:33.816240 Show resources in subtree (Root Device)...After assigning values.
1391 15:43:33.823084 Root Device child on link 0 DOMAIN: 0000
1392 15:43:33.826334 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1393 15:43:33.836549 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1394 15:43:33.846105 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1395 15:43:33.846209 PCI: 00:00.0
1396 15:43:33.855865 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1397 15:43:33.866523 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1398 15:43:33.875859 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1399 15:43:33.885694 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1400 15:43:33.895879 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1401 15:43:33.902153 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1402 15:43:33.912114 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1403 15:43:33.922430 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1404 15:43:33.931944 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1405 15:43:33.942025 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1406 15:43:33.951652 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1407 15:43:33.958572 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1408 15:43:33.968310 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1409 15:43:33.978308 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1410 15:43:33.988619 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1411 15:43:33.998523 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1412 15:43:34.007933 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1413 15:43:34.014720 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1414 15:43:34.025001 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1415 15:43:34.034855 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1416 15:43:34.037905 PCI: 00:02.0
1417 15:43:34.048015 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1418 15:43:34.057670 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1419 15:43:34.067890 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1420 15:43:34.071083 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1421 15:43:34.080867 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1422 15:43:34.084394 GENERIC: 0.0
1423 15:43:34.084479 PCI: 00:05.0
1424 15:43:34.097417 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1425 15:43:34.100697 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1426 15:43:34.104355 GENERIC: 0.0
1427 15:43:34.104465 PCI: 00:08.0
1428 15:43:34.113855 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1429 15:43:34.117220 PCI: 00:0a.0
1430 15:43:34.120457 PCI: 00:0d.0 child on link 0 USB0 port 0
1431 15:43:34.130584 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1432 15:43:34.137505 USB0 port 0 child on link 0 USB3 port 0
1433 15:43:34.137629 USB3 port 0
1434 15:43:34.140797 USB3 port 1
1435 15:43:34.140879 USB3 port 2
1436 15:43:34.144001 USB3 port 3
1437 15:43:34.147184 PCI: 00:14.0 child on link 0 USB0 port 0
1438 15:43:34.157055 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1439 15:43:34.163401 USB0 port 0 child on link 0 USB2 port 0
1440 15:43:34.163482 USB2 port 0
1441 15:43:34.166551 USB2 port 1
1442 15:43:34.166675 USB2 port 2
1443 15:43:34.170372 USB2 port 3
1444 15:43:34.170481 USB2 port 4
1445 15:43:34.173537 USB2 port 5
1446 15:43:34.173621 USB2 port 6
1447 15:43:34.176712 USB2 port 7
1448 15:43:34.176794 USB2 port 8
1449 15:43:34.179706 USB2 port 9
1450 15:43:34.179788 USB3 port 0
1451 15:43:34.183340 USB3 port 1
1452 15:43:34.183424 USB3 port 2
1453 15:43:34.186362 USB3 port 3
1454 15:43:34.190015 PCI: 00:14.2
1455 15:43:34.199762 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1456 15:43:34.209635 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1457 15:43:34.212865 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1458 15:43:34.223112 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1459 15:43:34.226372 GENERIC: 0.0
1460 15:43:34.229814 PCI: 00:15.0 child on link 0 I2C: 00:1a
1461 15:43:34.239446 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1462 15:43:34.243107 I2C: 00:1a
1463 15:43:34.243189 I2C: 00:31
1464 15:43:34.246179 I2C: 00:32
1465 15:43:34.249393 PCI: 00:15.1 child on link 0 I2C: 00:10
1466 15:43:34.259372 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1467 15:43:34.259457 I2C: 00:10
1468 15:43:34.262523 PCI: 00:15.2
1469 15:43:34.272692 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1470 15:43:34.275961 PCI: 00:15.3
1471 15:43:34.285636 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1472 15:43:34.285719 PCI: 00:16.0
1473 15:43:34.295832 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1474 15:43:34.299281 PCI: 00:19.0
1475 15:43:34.302496 PCI: 00:19.1 child on link 0 I2C: 00:15
1476 15:43:34.312221 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1477 15:43:34.315893 I2C: 00:15
1478 15:43:34.319115 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1479 15:43:34.328793 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1480 15:43:34.342066 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1481 15:43:34.351974 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1482 15:43:34.352059 GENERIC: 0.0
1483 15:43:34.355296 PCI: 01:00.0
1484 15:43:34.365273 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1485 15:43:34.374896 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1486 15:43:34.385042 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1487 15:43:34.388308 PCI: 00:1e.0
1488 15:43:34.398304 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1489 15:43:34.401826 PCI: 00:1e.2 child on link 0 SPI: 00
1490 15:43:34.411763 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1491 15:43:34.414950 SPI: 00
1492 15:43:34.418164 PCI: 00:1e.3 child on link 0 SPI: 00
1493 15:43:34.427831 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1494 15:43:34.431720 SPI: 00
1495 15:43:34.434893 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1496 15:43:34.441167 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1497 15:43:34.444978 PNP: 0c09.0
1498 15:43:34.454377 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 15:43:34.457927 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1500 15:43:34.467869 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1501 15:43:34.477458 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1502 15:43:34.480862 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1503 15:43:34.484567 GENERIC: 0.0
1504 15:43:34.484650 GENERIC: 1.0
1505 15:43:34.487800 PCI: 00:1f.3
1506 15:43:34.497226 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1507 15:43:34.507344 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1508 15:43:34.507432 PCI: 00:1f.5
1509 15:43:34.520983 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1510 15:43:34.524193 CPU_CLUSTER: 0 child on link 0 APIC: 00
1511 15:43:34.524297 APIC: 00
1512 15:43:34.527325 APIC: 01
1513 15:43:34.527415 APIC: 03
1514 15:43:34.527498 APIC: 07
1515 15:43:34.530381 APIC: 05
1516 15:43:34.530492 APIC: 04
1517 15:43:34.534068 APIC: 02
1518 15:43:34.534171 APIC: 06
1519 15:43:34.537044 Done allocating resources.
1520 15:43:34.543583 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1521 15:43:34.546886 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1522 15:43:34.553879 Configure GPIOs for I2S audio on UP4.
1523 15:43:34.560094 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1524 15:43:34.563612 Enabling resources...
1525 15:43:34.566561 PCI: 00:00.0 subsystem <- 8086/9a12
1526 15:43:34.566696 PCI: 00:00.0 cmd <- 06
1527 15:43:34.573591 PCI: 00:02.0 subsystem <- 8086/9a40
1528 15:43:34.573674 PCI: 00:02.0 cmd <- 03
1529 15:43:34.576727 PCI: 00:04.0 subsystem <- 8086/9a03
1530 15:43:34.580252 PCI: 00:04.0 cmd <- 02
1531 15:43:34.583186 PCI: 00:05.0 subsystem <- 8086/9a19
1532 15:43:34.586764 PCI: 00:05.0 cmd <- 02
1533 15:43:34.590033 PCI: 00:08.0 subsystem <- 8086/9a11
1534 15:43:34.593059 PCI: 00:08.0 cmd <- 06
1535 15:43:34.596269 PCI: 00:0d.0 subsystem <- 8086/9a13
1536 15:43:34.600057 PCI: 00:0d.0 cmd <- 02
1537 15:43:34.602683 PCI: 00:14.0 subsystem <- 8086/a0ed
1538 15:43:34.605962 PCI: 00:14.0 cmd <- 02
1539 15:43:34.609609 PCI: 00:14.2 subsystem <- 8086/a0ef
1540 15:43:34.612960 PCI: 00:14.2 cmd <- 02
1541 15:43:34.616164 PCI: 00:14.3 subsystem <- 8086/a0f0
1542 15:43:34.616241 PCI: 00:14.3 cmd <- 02
1543 15:43:34.622688 PCI: 00:15.0 subsystem <- 8086/a0e8
1544 15:43:34.622842 PCI: 00:15.0 cmd <- 02
1545 15:43:34.629590 PCI: 00:15.1 subsystem <- 8086/a0e9
1546 15:43:34.629679 PCI: 00:15.1 cmd <- 02
1547 15:43:34.632796 PCI: 00:15.2 subsystem <- 8086/a0ea
1548 15:43:34.635863 PCI: 00:15.2 cmd <- 02
1549 15:43:34.639017 PCI: 00:15.3 subsystem <- 8086/a0eb
1550 15:43:34.642617 PCI: 00:15.3 cmd <- 02
1551 15:43:34.645600 PCI: 00:16.0 subsystem <- 8086/a0e0
1552 15:43:34.649286 PCI: 00:16.0 cmd <- 02
1553 15:43:34.652665 PCI: 00:19.1 subsystem <- 8086/a0c6
1554 15:43:34.655923 PCI: 00:19.1 cmd <- 02
1555 15:43:34.658952 PCI: 00:1d.0 bridge ctrl <- 0013
1556 15:43:34.662071 PCI: 00:1d.0 subsystem <- 8086/a0b0
1557 15:43:34.665824 PCI: 00:1d.0 cmd <- 06
1558 15:43:34.668742 PCI: 00:1e.0 subsystem <- 8086/a0a8
1559 15:43:34.672363 PCI: 00:1e.0 cmd <- 06
1560 15:43:34.675429 PCI: 00:1e.2 subsystem <- 8086/a0aa
1561 15:43:34.675530 PCI: 00:1e.2 cmd <- 06
1562 15:43:34.682141 PCI: 00:1e.3 subsystem <- 8086/a0ab
1563 15:43:34.682246 PCI: 00:1e.3 cmd <- 02
1564 15:43:34.685370 PCI: 00:1f.0 subsystem <- 8086/a087
1565 15:43:34.688390 PCI: 00:1f.0 cmd <- 407
1566 15:43:34.692099 PCI: 00:1f.3 subsystem <- 8086/a0c8
1567 15:43:34.695185 PCI: 00:1f.3 cmd <- 02
1568 15:43:34.698419 PCI: 00:1f.5 subsystem <- 8086/a0a4
1569 15:43:34.701696 PCI: 00:1f.5 cmd <- 406
1570 15:43:34.706056 PCI: 01:00.0 cmd <- 02
1571 15:43:34.711051 done.
1572 15:43:34.714207 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1573 15:43:34.717366 Initializing devices...
1574 15:43:34.720582 Root Device init
1575 15:43:34.723742 Chrome EC: Set SMI mask to 0x0000000000000000
1576 15:43:34.730432 Chrome EC: clear events_b mask to 0x0000000000000000
1577 15:43:34.737433 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1578 15:43:34.743596 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1579 15:43:34.750210 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1580 15:43:34.753144 Chrome EC: Set WAKE mask to 0x0000000000000000
1581 15:43:34.761355 fw_config match found: DB_USB=USB3_ACTIVE
1582 15:43:34.765036 Configure Right Type-C port orientation for retimer
1583 15:43:34.768209 Root Device init finished in 46 msecs
1584 15:43:34.772443 PCI: 00:00.0 init
1585 15:43:34.775397 CPU TDP = 9 Watts
1586 15:43:34.775515 CPU PL1 = 9 Watts
1587 15:43:34.778963 CPU PL2 = 40 Watts
1588 15:43:34.782129 CPU PL4 = 83 Watts
1589 15:43:34.785260 PCI: 00:00.0 init finished in 8 msecs
1590 15:43:34.785362 PCI: 00:02.0 init
1591 15:43:34.788914 GMA: Found VBT in CBFS
1592 15:43:34.792079 GMA: Found valid VBT in CBFS
1593 15:43:34.798531 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1594 15:43:34.805313 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1595 15:43:34.808385 PCI: 00:02.0 init finished in 18 msecs
1596 15:43:34.812152 PCI: 00:05.0 init
1597 15:43:34.815269 PCI: 00:05.0 init finished in 0 msecs
1598 15:43:34.818421 PCI: 00:08.0 init
1599 15:43:34.821879 PCI: 00:08.0 init finished in 0 msecs
1600 15:43:34.824920 PCI: 00:14.0 init
1601 15:43:34.828845 PCI: 00:14.0 init finished in 0 msecs
1602 15:43:34.831986 PCI: 00:14.2 init
1603 15:43:34.835076 PCI: 00:14.2 init finished in 0 msecs
1604 15:43:34.838605 PCI: 00:15.0 init
1605 15:43:34.841692 I2C bus 0 version 0x3230302a
1606 15:43:34.844826 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1607 15:43:34.848701 PCI: 00:15.0 init finished in 6 msecs
1608 15:43:34.848784 PCI: 00:15.1 init
1609 15:43:34.851924 I2C bus 1 version 0x3230302a
1610 15:43:34.855017 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1611 15:43:34.861657 PCI: 00:15.1 init finished in 6 msecs
1612 15:43:34.861766 PCI: 00:15.2 init
1613 15:43:34.864757 I2C bus 2 version 0x3230302a
1614 15:43:34.868386 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1615 15:43:34.871556 PCI: 00:15.2 init finished in 6 msecs
1616 15:43:34.874791 PCI: 00:15.3 init
1617 15:43:34.878497 I2C bus 3 version 0x3230302a
1618 15:43:34.881411 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1619 15:43:34.884998 PCI: 00:15.3 init finished in 6 msecs
1620 15:43:34.887952 PCI: 00:16.0 init
1621 15:43:34.891711 PCI: 00:16.0 init finished in 0 msecs
1622 15:43:34.894831 PCI: 00:19.1 init
1623 15:43:34.897891 I2C bus 5 version 0x3230302a
1624 15:43:34.901132 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1625 15:43:34.905004 PCI: 00:19.1 init finished in 6 msecs
1626 15:43:34.908083 PCI: 00:1d.0 init
1627 15:43:34.911376 Initializing PCH PCIe bridge.
1628 15:43:34.914207 PCI: 00:1d.0 init finished in 3 msecs
1629 15:43:34.918039 PCI: 00:1f.0 init
1630 15:43:34.921112 IOAPIC: Initializing IOAPIC at 0xfec00000
1631 15:43:34.924327 IOAPIC: Bootstrap Processor Local APIC = 0x00
1632 15:43:34.927533 IOAPIC: ID = 0x02
1633 15:43:34.931316 IOAPIC: Dumping registers
1634 15:43:34.931396 reg 0x0000: 0x02000000
1635 15:43:34.934424 reg 0x0001: 0x00770020
1636 15:43:34.937744 reg 0x0002: 0x00000000
1637 15:43:34.940941 PCI: 00:1f.0 init finished in 21 msecs
1638 15:43:34.944530 PCI: 00:1f.2 init
1639 15:43:34.948049 Disabling ACPI via APMC.
1640 15:43:34.948130 APMC done.
1641 15:43:34.954237 PCI: 00:1f.2 init finished in 5 msecs
1642 15:43:34.965042 PCI: 01:00.0 init
1643 15:43:34.968009 PCI: 01:00.0 init finished in 0 msecs
1644 15:43:34.971689 PNP: 0c09.0 init
1645 15:43:34.974751 Google Chrome EC uptime: 8.441 seconds
1646 15:43:34.981750 Google Chrome AP resets since EC boot: 1
1647 15:43:34.984867 Google Chrome most recent AP reset causes:
1648 15:43:34.987906 0.350: 32775 shutdown: entering G3
1649 15:43:34.994461 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1650 15:43:34.998212 PNP: 0c09.0 init finished in 22 msecs
1651 15:43:35.003853 Devices initialized
1652 15:43:35.006992 Show all devs... After init.
1653 15:43:35.010102 Root Device: enabled 1
1654 15:43:35.010184 DOMAIN: 0000: enabled 1
1655 15:43:35.013734 CPU_CLUSTER: 0: enabled 1
1656 15:43:35.016913 PCI: 00:00.0: enabled 1
1657 15:43:35.020440 PCI: 00:02.0: enabled 1
1658 15:43:35.020552 PCI: 00:04.0: enabled 1
1659 15:43:35.023618 PCI: 00:05.0: enabled 1
1660 15:43:35.026764 PCI: 00:06.0: enabled 0
1661 15:43:35.030014 PCI: 00:07.0: enabled 0
1662 15:43:35.030129 PCI: 00:07.1: enabled 0
1663 15:43:35.033179 PCI: 00:07.2: enabled 0
1664 15:43:35.037197 PCI: 00:07.3: enabled 0
1665 15:43:35.040373 PCI: 00:08.0: enabled 1
1666 15:43:35.040455 PCI: 00:09.0: enabled 0
1667 15:43:35.043597 PCI: 00:0a.0: enabled 0
1668 15:43:35.046736 PCI: 00:0d.0: enabled 1
1669 15:43:35.049861 PCI: 00:0d.1: enabled 0
1670 15:43:35.049962 PCI: 00:0d.2: enabled 0
1671 15:43:35.053592 PCI: 00:0d.3: enabled 0
1672 15:43:35.056637 PCI: 00:0e.0: enabled 0
1673 15:43:35.060096 PCI: 00:10.2: enabled 1
1674 15:43:35.060179 PCI: 00:10.6: enabled 0
1675 15:43:35.063088 PCI: 00:10.7: enabled 0
1676 15:43:35.066257 PCI: 00:12.0: enabled 0
1677 15:43:35.066365 PCI: 00:12.6: enabled 0
1678 15:43:35.070027 PCI: 00:13.0: enabled 0
1679 15:43:35.073061 PCI: 00:14.0: enabled 1
1680 15:43:35.076152 PCI: 00:14.1: enabled 0
1681 15:43:35.076262 PCI: 00:14.2: enabled 1
1682 15:43:35.079764 PCI: 00:14.3: enabled 1
1683 15:43:35.083266 PCI: 00:15.0: enabled 1
1684 15:43:35.086266 PCI: 00:15.1: enabled 1
1685 15:43:35.086374 PCI: 00:15.2: enabled 1
1686 15:43:35.089860 PCI: 00:15.3: enabled 1
1687 15:43:35.092970 PCI: 00:16.0: enabled 1
1688 15:43:35.096202 PCI: 00:16.1: enabled 0
1689 15:43:35.096306 PCI: 00:16.2: enabled 0
1690 15:43:35.099550 PCI: 00:16.3: enabled 0
1691 15:43:35.103174 PCI: 00:16.4: enabled 0
1692 15:43:35.106278 PCI: 00:16.5: enabled 0
1693 15:43:35.106379 PCI: 00:17.0: enabled 0
1694 15:43:35.109527 PCI: 00:19.0: enabled 0
1695 15:43:35.112688 PCI: 00:19.1: enabled 1
1696 15:43:35.116391 PCI: 00:19.2: enabled 0
1697 15:43:35.116504 PCI: 00:1c.0: enabled 1
1698 15:43:35.119398 PCI: 00:1c.1: enabled 0
1699 15:43:35.122516 PCI: 00:1c.2: enabled 0
1700 15:43:35.122647 PCI: 00:1c.3: enabled 0
1701 15:43:35.126195 PCI: 00:1c.4: enabled 0
1702 15:43:35.129315 PCI: 00:1c.5: enabled 0
1703 15:43:35.132517 PCI: 00:1c.6: enabled 1
1704 15:43:35.132645 PCI: 00:1c.7: enabled 0
1705 15:43:35.135728 PCI: 00:1d.0: enabled 1
1706 15:43:35.139471 PCI: 00:1d.1: enabled 0
1707 15:43:35.142749 PCI: 00:1d.2: enabled 1
1708 15:43:35.142835 PCI: 00:1d.3: enabled 0
1709 15:43:35.146037 PCI: 00:1e.0: enabled 1
1710 15:43:35.149292 PCI: 00:1e.1: enabled 0
1711 15:43:35.152593 PCI: 00:1e.2: enabled 1
1712 15:43:35.152697 PCI: 00:1e.3: enabled 1
1713 15:43:35.155786 PCI: 00:1f.0: enabled 1
1714 15:43:35.158935 PCI: 00:1f.1: enabled 0
1715 15:43:35.162250 PCI: 00:1f.2: enabled 1
1716 15:43:35.162345 PCI: 00:1f.3: enabled 1
1717 15:43:35.165804 PCI: 00:1f.4: enabled 0
1718 15:43:35.168848 PCI: 00:1f.5: enabled 1
1719 15:43:35.168923 PCI: 00:1f.6: enabled 0
1720 15:43:35.172387 PCI: 00:1f.7: enabled 0
1721 15:43:35.175642 APIC: 00: enabled 1
1722 15:43:35.178843 GENERIC: 0.0: enabled 1
1723 15:43:35.178920 GENERIC: 0.0: enabled 1
1724 15:43:35.182492 GENERIC: 1.0: enabled 1
1725 15:43:35.185541 GENERIC: 0.0: enabled 1
1726 15:43:35.188959 GENERIC: 1.0: enabled 1
1727 15:43:35.189081 USB0 port 0: enabled 1
1728 15:43:35.191909 GENERIC: 0.0: enabled 1
1729 15:43:35.195685 USB0 port 0: enabled 1
1730 15:43:35.195764 GENERIC: 0.0: enabled 1
1731 15:43:35.199051 I2C: 00:1a: enabled 1
1732 15:43:35.201967 I2C: 00:31: enabled 1
1733 15:43:35.202122 I2C: 00:32: enabled 1
1734 15:43:35.205051 I2C: 00:10: enabled 1
1735 15:43:35.208700 I2C: 00:15: enabled 1
1736 15:43:35.211738 GENERIC: 0.0: enabled 0
1737 15:43:35.211812 GENERIC: 1.0: enabled 0
1738 15:43:35.215591 GENERIC: 0.0: enabled 1
1739 15:43:35.218835 SPI: 00: enabled 1
1740 15:43:35.218913 SPI: 00: enabled 1
1741 15:43:35.222010 PNP: 0c09.0: enabled 1
1742 15:43:35.225049 GENERIC: 0.0: enabled 1
1743 15:43:35.225159 USB3 port 0: enabled 1
1744 15:43:35.228317 USB3 port 1: enabled 1
1745 15:43:35.231635 USB3 port 2: enabled 0
1746 15:43:35.234702 USB3 port 3: enabled 0
1747 15:43:35.234785 USB2 port 0: enabled 0
1748 15:43:35.238474 USB2 port 1: enabled 1
1749 15:43:35.241699 USB2 port 2: enabled 1
1750 15:43:35.241802 USB2 port 3: enabled 0
1751 15:43:35.244943 USB2 port 4: enabled 1
1752 15:43:35.248266 USB2 port 5: enabled 0
1753 15:43:35.251442 USB2 port 6: enabled 0
1754 15:43:35.251514 USB2 port 7: enabled 0
1755 15:43:35.254659 USB2 port 8: enabled 0
1756 15:43:35.257831 USB2 port 9: enabled 0
1757 15:43:35.257901 USB3 port 0: enabled 0
1758 15:43:35.261117 USB3 port 1: enabled 1
1759 15:43:35.264825 USB3 port 2: enabled 0
1760 15:43:35.268017 USB3 port 3: enabled 0
1761 15:43:35.268103 GENERIC: 0.0: enabled 1
1762 15:43:35.271056 GENERIC: 1.0: enabled 1
1763 15:43:35.274219 APIC: 01: enabled 1
1764 15:43:35.274308 APIC: 03: enabled 1
1765 15:43:35.277816 APIC: 07: enabled 1
1766 15:43:35.277895 APIC: 05: enabled 1
1767 15:43:35.281304 APIC: 04: enabled 1
1768 15:43:35.284564 APIC: 02: enabled 1
1769 15:43:35.284637 APIC: 06: enabled 1
1770 15:43:35.287785 PCI: 01:00.0: enabled 1
1771 15:43:35.294244 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1772 15:43:35.297782 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1773 15:43:35.301022 ELOG: NV offset 0xf30000 size 0x1000
1774 15:43:35.309081 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1775 15:43:35.315697 ELOG: Event(17) added with size 13 at 2023-08-07 15:43:35 UTC
1776 15:43:35.321966 ELOG: Event(92) added with size 9 at 2023-08-07 15:43:35 UTC
1777 15:43:35.329039 ELOG: Event(93) added with size 9 at 2023-08-07 15:43:35 UTC
1778 15:43:35.335126 ELOG: Event(9E) added with size 10 at 2023-08-07 15:43:35 UTC
1779 15:43:35.342128 ELOG: Event(9F) added with size 14 at 2023-08-07 15:43:35 UTC
1780 15:43:35.348586 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1781 15:43:35.355050 ELOG: Event(A1) added with size 10 at 2023-08-07 15:43:35 UTC
1782 15:43:35.358167 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1783 15:43:35.364683 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1784 15:43:35.368430 Finalize devices...
1785 15:43:35.368527 Devices finalized
1786 15:43:35.374729 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1787 15:43:35.381133 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1788 15:43:35.384765 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1789 15:43:35.391408 ME: HFSTS1 : 0x80030055
1790 15:43:35.394555 ME: HFSTS2 : 0x30280116
1791 15:43:35.400851 ME: HFSTS3 : 0x00000050
1792 15:43:35.404488 ME: HFSTS4 : 0x00004000
1793 15:43:35.407936 ME: HFSTS5 : 0x00000000
1794 15:43:35.414761 ME: HFSTS6 : 0x00400006
1795 15:43:35.417520 ME: Manufacturing Mode : YES
1796 15:43:35.421002 ME: SPI Protection Mode Enabled : NO
1797 15:43:35.424412 ME: FW Partition Table : OK
1798 15:43:35.427736 ME: Bringup Loader Failure : NO
1799 15:43:35.430896 ME: Firmware Init Complete : NO
1800 15:43:35.434047 ME: Boot Options Present : NO
1801 15:43:35.437779 ME: Update In Progress : NO
1802 15:43:35.443982 ME: D0i3 Support : YES
1803 15:43:35.447775 ME: Low Power State Enabled : NO
1804 15:43:35.450750 ME: CPU Replaced : YES
1805 15:43:35.454459 ME: CPU Replacement Valid : YES
1806 15:43:35.457609 ME: Current Working State : 5
1807 15:43:35.460865 ME: Current Operation State : 1
1808 15:43:35.464076 ME: Current Operation Mode : 3
1809 15:43:35.467189 ME: Error Code : 0
1810 15:43:35.471053 ME: Enhanced Debug Mode : NO
1811 15:43:35.477282 ME: CPU Debug Disabled : YES
1812 15:43:35.480472 ME: TXT Support : NO
1813 15:43:35.487449 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1814 15:43:35.493706 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1815 15:43:35.497124 CBFS: 'fallback/slic' not found.
1816 15:43:35.500275 ACPI: Writing ACPI tables at 76b01000.
1817 15:43:35.504180 ACPI: * FACS
1818 15:43:35.504264 ACPI: * DSDT
1819 15:43:35.507384 Ramoops buffer: 0x100000@0x76a00000.
1820 15:43:35.513811 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1821 15:43:35.516828 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1822 15:43:35.520853 Google Chrome EC: version:
1823 15:43:35.524213 ro: voema_v2.0.7540-147f8d37d1
1824 15:43:35.527535 rw: voema_v2.0.7540-147f8d37d1
1825 15:43:35.530853 running image: 2
1826 15:43:35.537188 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1827 15:43:35.541085 ACPI: * FADT
1828 15:43:35.541163 SCI is IRQ9
1829 15:43:35.544317 ACPI: added table 1/32, length now 40
1830 15:43:35.547666 ACPI: * SSDT
1831 15:43:35.550849 Found 1 CPU(s) with 8 core(s) each.
1832 15:43:35.557210 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1833 15:43:35.560323 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1834 15:43:35.564317 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1835 15:43:35.567498 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1836 15:43:35.573875 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1837 15:43:35.580810 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1838 15:43:35.583979 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1839 15:43:35.590467 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1840 15:43:35.596946 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1841 15:43:35.600746 \_SB.PCI0.RP09: Added StorageD3Enable property
1842 15:43:35.603640 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1843 15:43:35.610177 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1844 15:43:35.616722 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1845 15:43:35.619908 PS2K: Passing 80 keymaps to kernel
1846 15:43:35.626739 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1847 15:43:35.633574 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1848 15:43:35.639847 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1849 15:43:35.646624 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1850 15:43:35.653432 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1851 15:43:35.659892 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1852 15:43:35.666668 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1853 15:43:35.672901 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1854 15:43:35.676775 ACPI: added table 2/32, length now 44
1855 15:43:35.676878 ACPI: * MCFG
1856 15:43:35.680028 ACPI: added table 3/32, length now 48
1857 15:43:35.682765 ACPI: * TPM2
1858 15:43:35.686478 TPM2 log created at 0x769f0000
1859 15:43:35.689739 ACPI: added table 4/32, length now 52
1860 15:43:35.689821 ACPI: * MADT
1861 15:43:35.692912 SCI is IRQ9
1862 15:43:35.696119 ACPI: added table 5/32, length now 56
1863 15:43:35.699366 current = 76b09850
1864 15:43:35.699463 ACPI: * DMAR
1865 15:43:35.702738 ACPI: added table 6/32, length now 60
1866 15:43:35.706453 ACPI: added table 7/32, length now 64
1867 15:43:35.709646 ACPI: * HPET
1868 15:43:35.712739 ACPI: added table 8/32, length now 68
1869 15:43:35.712815 ACPI: done.
1870 15:43:35.716171 ACPI tables: 35216 bytes.
1871 15:43:35.719202 smbios_write_tables: 769ef000
1872 15:43:35.722356 EC returned error result code 3
1873 15:43:35.725593 Couldn't obtain OEM name from CBI
1874 15:43:35.729387 Create SMBIOS type 16
1875 15:43:35.732545 Create SMBIOS type 17
1876 15:43:35.735723 GENERIC: 0.0 (WIFI Device)
1877 15:43:35.739428 SMBIOS tables: 1750 bytes.
1878 15:43:35.742629 Writing table forward entry at 0x00000500
1879 15:43:35.748896 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1880 15:43:35.752410 Writing coreboot table at 0x76b25000
1881 15:43:35.759183 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1882 15:43:35.762493 1. 0000000000001000-000000000009ffff: RAM
1883 15:43:35.765433 2. 00000000000a0000-00000000000fffff: RESERVED
1884 15:43:35.772209 3. 0000000000100000-00000000769eefff: RAM
1885 15:43:35.775445 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1886 15:43:35.781897 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1887 15:43:35.788803 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1888 15:43:35.792004 7. 0000000077000000-000000007fbfffff: RESERVED
1889 15:43:35.798916 8. 00000000c0000000-00000000cfffffff: RESERVED
1890 15:43:35.802091 9. 00000000f8000000-00000000f9ffffff: RESERVED
1891 15:43:35.805288 10. 00000000fb000000-00000000fb000fff: RESERVED
1892 15:43:35.811715 11. 00000000fe000000-00000000fe00ffff: RESERVED
1893 15:43:35.814874 12. 00000000fed80000-00000000fed87fff: RESERVED
1894 15:43:35.821810 13. 00000000fed90000-00000000fed92fff: RESERVED
1895 15:43:35.824790 14. 00000000feda0000-00000000feda1fff: RESERVED
1896 15:43:35.831689 15. 00000000fedc0000-00000000feddffff: RESERVED
1897 15:43:35.834560 16. 0000000100000000-00000002803fffff: RAM
1898 15:43:35.838369 Passing 4 GPIOs to payload:
1899 15:43:35.841454 NAME | PORT | POLARITY | VALUE
1900 15:43:35.848136 lid | undefined | high | high
1901 15:43:35.854509 power | undefined | high | low
1902 15:43:35.858119 oprom | undefined | high | low
1903 15:43:35.864536 EC in RW | 0x000000e5 | high | high
1904 15:43:35.871023 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 32b
1905 15:43:35.874382 coreboot table: 1576 bytes.
1906 15:43:35.877936 IMD ROOT 0. 0x76fff000 0x00001000
1907 15:43:35.880827 IMD SMALL 1. 0x76ffe000 0x00001000
1908 15:43:35.884466 FSP MEMORY 2. 0x76c4e000 0x003b0000
1909 15:43:35.887754 VPD 3. 0x76c4d000 0x00000367
1910 15:43:35.890833 RO MCACHE 4. 0x76c4c000 0x00000fdc
1911 15:43:35.894020 CONSOLE 5. 0x76c2c000 0x00020000
1912 15:43:35.900930 FMAP 6. 0x76c2b000 0x00000578
1913 15:43:35.904077 TIME STAMP 7. 0x76c2a000 0x00000910
1914 15:43:35.907283 VBOOT WORK 8. 0x76c16000 0x00014000
1915 15:43:35.910389 ROMSTG STCK 9. 0x76c15000 0x00001000
1916 15:43:35.913712 AFTER CAR 10. 0x76c0a000 0x0000b000
1917 15:43:35.917491 RAMSTAGE 11. 0x76b97000 0x00073000
1918 15:43:35.920728 REFCODE 12. 0x76b42000 0x00055000
1919 15:43:35.923893 SMM BACKUP 13. 0x76b32000 0x00010000
1920 15:43:35.930636 4f444749 14. 0x76b30000 0x00002000
1921 15:43:35.933830 EXT VBT15. 0x76b2d000 0x0000219f
1922 15:43:35.937310 COREBOOT 16. 0x76b25000 0x00008000
1923 15:43:35.940288 ACPI 17. 0x76b01000 0x00024000
1924 15:43:35.944067 ACPI GNVS 18. 0x76b00000 0x00001000
1925 15:43:35.947222 RAMOOPS 19. 0x76a00000 0x00100000
1926 15:43:35.950184 TPM2 TCGLOG20. 0x769f0000 0x00010000
1927 15:43:35.953776 SMBIOS 21. 0x769ef000 0x00000800
1928 15:43:35.956830 IMD small region:
1929 15:43:35.960018 IMD ROOT 0. 0x76ffec00 0x00000400
1930 15:43:35.963652 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1931 15:43:35.969833 POWER STATE 2. 0x76ffeb80 0x00000044
1932 15:43:35.973110 ROMSTAGE 3. 0x76ffeb60 0x00000004
1933 15:43:35.976802 MEM INFO 4. 0x76ffe980 0x000001e0
1934 15:43:35.983305 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1935 15:43:35.986256 MTRR: Physical address space:
1936 15:43:35.992893 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1937 15:43:35.996682 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1938 15:43:36.003074 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1939 15:43:36.009549 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1940 15:43:36.016517 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1941 15:43:36.022922 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1942 15:43:36.029348 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1943 15:43:36.033115 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 15:43:36.036348 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 15:43:36.042578 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 15:43:36.046179 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 15:43:36.049120 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 15:43:36.052956 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 15:43:36.058983 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 15:43:36.062809 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 15:43:36.065847 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 15:43:36.069360 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 15:43:36.075709 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 15:43:36.079064 call enable_fixed_mtrr()
1955 15:43:36.082228 CPU physical address size: 39 bits
1956 15:43:36.085257 MTRR: default type WB/UC MTRR counts: 6/6.
1957 15:43:36.089101 MTRR: UC selected as default type.
1958 15:43:36.095815 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1959 15:43:36.102547 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1960 15:43:36.108827 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1961 15:43:36.115323 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1962 15:43:36.121702 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1963 15:43:36.125491 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1964 15:43:36.133144 MTRR: Fixed MSR 0x250 0x0606060606060606
1965 15:43:36.136216 MTRR: Fixed MSR 0x258 0x0606060606060606
1966 15:43:36.139978 MTRR: Fixed MSR 0x259 0x0000000000000000
1967 15:43:36.143179 MTRR: Fixed MSR 0x268 0x0606060606060606
1968 15:43:36.149356 MTRR: Fixed MSR 0x269 0x0606060606060606
1969 15:43:36.153183 MTRR: Fixed MSR 0x26a 0x0606060606060606
1970 15:43:36.156073 MTRR: Fixed MSR 0x26b 0x0606060606060606
1971 15:43:36.159513 MTRR: Fixed MSR 0x26c 0x0606060606060606
1972 15:43:36.166238 MTRR: Fixed MSR 0x26d 0x0606060606060606
1973 15:43:36.169364 MTRR: Fixed MSR 0x26e 0x0606060606060606
1974 15:43:36.173059 MTRR: Fixed MSR 0x26f 0x0606060606060606
1975 15:43:36.178992 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 15:43:36.179073 call enable_fixed_mtrr()
1977 15:43:36.186012 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 15:43:36.189193 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 15:43:36.192366 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 15:43:36.196197 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 15:43:36.202282 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 15:43:36.206015 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 15:43:36.209093 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 15:43:36.212509 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 15:43:36.219300 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 15:43:36.222497 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 15:43:36.225734 CPU physical address size: 39 bits
1988 15:43:36.229557 call enable_fixed_mtrr()
1989 15:43:36.232806 MTRR: Fixed MSR 0x250 0x0606060606060606
1990 15:43:36.239165 MTRR: Fixed MSR 0x250 0x0606060606060606
1991 15:43:36.242290 MTRR: Fixed MSR 0x258 0x0606060606060606
1992 15:43:36.246113 MTRR: Fixed MSR 0x259 0x0000000000000000
1993 15:43:36.249251 MTRR: Fixed MSR 0x268 0x0606060606060606
1994 15:43:36.255668 MTRR: Fixed MSR 0x269 0x0606060606060606
1995 15:43:36.259413 MTRR: Fixed MSR 0x26a 0x0606060606060606
1996 15:43:36.262457 MTRR: Fixed MSR 0x26b 0x0606060606060606
1997 15:43:36.265958 MTRR: Fixed MSR 0x26c 0x0606060606060606
1998 15:43:36.272462 MTRR: Fixed MSR 0x26d 0x0606060606060606
1999 15:43:36.275892 MTRR: Fixed MSR 0x26e 0x0606060606060606
2000 15:43:36.278842 MTRR: Fixed MSR 0x26f 0x0606060606060606
2001 15:43:36.285809 MTRR: Fixed MSR 0x258 0x0606060606060606
2002 15:43:36.285892 call enable_fixed_mtrr()
2003 15:43:36.292224 MTRR: Fixed MSR 0x259 0x0000000000000000
2004 15:43:36.295938 MTRR: Fixed MSR 0x268 0x0606060606060606
2005 15:43:36.299074 MTRR: Fixed MSR 0x269 0x0606060606060606
2006 15:43:36.302253 MTRR: Fixed MSR 0x26a 0x0606060606060606
2007 15:43:36.309022 MTRR: Fixed MSR 0x26b 0x0606060606060606
2008 15:43:36.312245 MTRR: Fixed MSR 0x26c 0x0606060606060606
2009 15:43:36.315381 MTRR: Fixed MSR 0x26d 0x0606060606060606
2010 15:43:36.319188 MTRR: Fixed MSR 0x26e 0x0606060606060606
2011 15:43:36.322290 MTRR: Fixed MSR 0x26f 0x0606060606060606
2012 15:43:36.329102 CPU physical address size: 39 bits
2013 15:43:36.331816 call enable_fixed_mtrr()
2014 15:43:36.335602 CPU physical address size: 39 bits
2015 15:43:36.338887 MTRR: Fixed MSR 0x250 0x0606060606060606
2016 15:43:36.341936 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 15:43:36.348313 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 15:43:36.352093 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 15:43:36.355155 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 15:43:36.358429 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 15:43:36.364669 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 15:43:36.368517 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 15:43:36.371582 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 15:43:36.374532 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 15:43:36.381588 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 15:43:36.384692 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 15:43:36.391390 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 15:43:36.391471 call enable_fixed_mtrr()
2029 15:43:36.397455 MTRR: Fixed MSR 0x259 0x0000000000000000
2030 15:43:36.401169 MTRR: Fixed MSR 0x268 0x0606060606060606
2031 15:43:36.404214 MTRR: Fixed MSR 0x269 0x0606060606060606
2032 15:43:36.407317 MTRR: Fixed MSR 0x26a 0x0606060606060606
2033 15:43:36.414193 MTRR: Fixed MSR 0x26b 0x0606060606060606
2034 15:43:36.417349 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 15:43:36.420547 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 15:43:36.424345 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 15:43:36.430641 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 15:43:36.433598 CPU physical address size: 39 bits
2039 15:43:36.437445 call enable_fixed_mtrr()
2040 15:43:36.441193 MTRR: Fixed MSR 0x250 0x0606060606060606
2041 15:43:36.441273
2042 15:43:36.443734 MTRR check
2043 15:43:36.446845 MTRR: Fixed MSR 0x258 0x0606060606060606
2044 15:43:36.450380 MTRR: Fixed MSR 0x259 0x0000000000000000
2045 15:43:36.453673 MTRR: Fixed MSR 0x268 0x0606060606060606
2046 15:43:36.459908 MTRR: Fixed MSR 0x269 0x0606060606060606
2047 15:43:36.463081 MTRR: Fixed MSR 0x26a 0x0606060606060606
2048 15:43:36.466865 MTRR: Fixed MSR 0x26b 0x0606060606060606
2049 15:43:36.470084 MTRR: Fixed MSR 0x26c 0x0606060606060606
2050 15:43:36.476351 MTRR: Fixed MSR 0x26d 0x0606060606060606
2051 15:43:36.479470 MTRR: Fixed MSR 0x26e 0x0606060606060606
2052 15:43:36.482725 MTRR: Fixed MSR 0x26f 0x0606060606060606
2053 15:43:36.489800 Fixed MTRRs : call enable_fixed_mtrr()
2054 15:43:36.489883 Enabled
2055 15:43:36.492992 Variable MTRRs: Enabled
2056 15:43:36.493072
2057 15:43:36.496552 CPU physical address size: 39 bits
2058 15:43:36.502967 BS: BS_WRITE_TABLES exit times (exec / console): 359 / 151 ms
2059 15:43:36.506546 CPU physical address size: 39 bits
2060 15:43:36.509677 CPU physical address size: 39 bits
2061 15:43:36.512607 Checking cr50 for pending updates
2062 15:43:36.520209 Reading cr50 TPM mode
2063 15:43:36.531086 BS: BS_PAYLOAD_LOAD entry times (exec / console): 16 / 6 ms
2064 15:43:36.540336 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2065 15:43:36.544056 Checking segment from ROM address 0xffc02b38
2066 15:43:36.547371 Checking segment from ROM address 0xffc02b54
2067 15:43:36.553567 Loading segment from ROM address 0xffc02b38
2068 15:43:36.553673 code (compression=0)
2069 15:43:36.563891 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2070 15:43:36.573382 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2071 15:43:36.573463 it's not compressed!
2072 15:43:36.713416 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2073 15:43:36.719522 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2074 15:43:36.726599 Loading segment from ROM address 0xffc02b54
2075 15:43:36.729949 Entry Point 0x30000000
2076 15:43:36.730048 Loaded segments
2077 15:43:36.736008 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2078 15:43:36.779405 Finalizing chipset.
2079 15:43:36.782528 Finalizing SMM.
2080 15:43:36.782651 APMC done.
2081 15:43:36.789426 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2082 15:43:36.792676 mp_park_aps done after 0 msecs.
2083 15:43:36.795960 Jumping to boot code at 0x30000000(0x76b25000)
2084 15:43:36.805649 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2085 15:43:36.805773
2086 15:43:36.805870
2087 15:43:36.808673
2088 15:43:36.808776 Starting depthcharge on Voema...
2089 15:43:36.809197 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2090 15:43:36.809329 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2091 15:43:36.809440 Setting prompt string to ['volteer:']
2092 15:43:36.809552 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2093 15:43:36.812456
2094 15:43:36.818693 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2095 15:43:36.818799
2096 15:43:36.825614 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2097 15:43:36.825834
2098 15:43:36.831908 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2099 15:43:36.832012
2100 15:43:36.835246 Failed to find eMMC card reader
2101 15:43:36.835348
2102 15:43:36.835439 Wipe memory regions:
2103 15:43:36.838849
2104 15:43:36.841787 [0x00000000001000, 0x000000000a0000)
2105 15:43:36.841907
2106 15:43:36.845369 [0x00000000100000, 0x00000030000000)
2107 15:43:36.870468
2108 15:43:36.873708 [0x00000032662db0, 0x000000769ef000)
2109 15:43:36.909746
2110 15:43:36.912681 [0x00000100000000, 0x00000280400000)
2111 15:43:37.115240
2112 15:43:37.118439 ec_init: CrosEC protocol v3 supported (256, 256)
2113 15:43:37.118548
2114 15:43:37.125377 update_port_state: port C0 state: usb enable 1 mux conn 0
2115 15:43:37.125484
2116 15:43:37.135052 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2117 15:43:37.135159
2118 15:43:37.138069 pmc_check_ipc_sts: STS_BUSY done after 1561 us
2119 15:43:37.138174
2120 15:43:37.144437 send_conn_disc_msg: pmc_send_cmd succeeded
2121 15:43:37.574710
2122 15:43:37.574859 R8152: Initializing
2123 15:43:37.574930
2124 15:43:37.577923 Version 6 (ocp_data = 5c30)
2125 15:43:37.578030
2126 15:43:37.581077 R8152: Done initializing
2127 15:43:37.581162
2128 15:43:37.584858 Adding net device
2129 15:43:37.886363
2130 15:43:37.889132 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2131 15:43:37.889219
2132 15:43:37.889285
2133 15:43:37.889347
2134 15:43:37.892780 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2136 15:43:37.993159 volteer: tftpboot 192.168.201.1 11224192/tftp-deploy-k9radlck/kernel/bzImage 11224192/tftp-deploy-k9radlck/kernel/cmdline 11224192/tftp-deploy-k9radlck/ramdisk/ramdisk.cpio.gz
2137 15:43:37.993359 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2138 15:43:37.993506 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2139 15:43:37.997262 tftpboot 192.168.201.1 11224192/tftp-deploy-k9radlck/kernel/bzIploy-k9radlck/kernel/cmdline 11224192/tftp-deploy-k9radlck/ramdisk/ramdisk.cpio.gz
2140 15:43:37.997350
2141 15:43:37.997447 Waiting for link
2142 15:43:38.200575
2143 15:43:38.200721 done.
2144 15:43:38.200797
2145 15:43:38.200864 MAC: 00:24:32:30:79:42
2146 15:43:38.200925
2147 15:43:38.203592 Sending DHCP discover... done.
2148 15:43:38.203702
2149 15:43:38.206888 Waiting for reply... done.
2150 15:43:38.206973
2151 15:43:38.210007 Sending DHCP request... done.
2152 15:43:38.210087
2153 15:43:38.217121 Waiting for reply... done.
2154 15:43:38.217206
2155 15:43:38.217272 My ip is 192.168.201.13
2156 15:43:38.217334
2157 15:43:38.220037 The DHCP server ip is 192.168.201.1
2158 15:43:38.220119
2159 15:43:38.226536 TFTP server IP predefined by user: 192.168.201.1
2160 15:43:38.226676
2161 15:43:38.233855 Bootfile predefined by user: 11224192/tftp-deploy-k9radlck/kernel/bzImage
2162 15:43:38.233939
2163 15:43:38.237019 Sending tftp read request... done.
2164 15:43:38.237102
2165 15:43:38.240263 Waiting for the transfer...
2166 15:43:38.240347
2167 15:43:38.811543 00000000 ################################################################
2168 15:43:38.811691
2169 15:43:39.339814 00080000 ################################################################
2170 15:43:39.339979
2171 15:43:39.866838 00100000 ################################################################
2172 15:43:39.866979
2173 15:43:40.416323 00180000 ################################################################
2174 15:43:40.416501
2175 15:43:40.974455 00200000 ################################################################
2176 15:43:40.974647
2177 15:43:41.521918 00280000 ################################################################
2178 15:43:41.522067
2179 15:43:42.057825 00300000 ################################################################
2180 15:43:42.057975
2181 15:43:42.577101 00380000 ################################################################
2182 15:43:42.577286
2183 15:43:43.108490 00400000 ################################################################
2184 15:43:43.108649
2185 15:43:43.662989 00480000 ################################################################
2186 15:43:43.663146
2187 15:43:44.232245 00500000 ################################################################
2188 15:43:44.232411
2189 15:43:44.864313 00580000 ################################################################
2190 15:43:44.864463
2191 15:43:45.436488 00600000 ################################################################
2192 15:43:45.436639
2193 15:43:45.965511 00680000 ################################################################
2194 15:43:45.965660
2195 15:43:46.586820 00700000 ################################################################
2196 15:43:46.587508
2197 15:43:46.613494 00780000 ### done.
2198 15:43:46.614072
2199 15:43:46.616778 The bootfile was 7884688 bytes long.
2200 15:43:46.617448
2201 15:43:46.619889 Sending tftp read request... done.
2202 15:43:46.620406
2203 15:43:46.623164 Waiting for the transfer...
2204 15:43:46.623811
2205 15:43:47.247913 00000000 ################################################################
2206 15:43:47.248106
2207 15:43:47.808891 00080000 ################################################################
2208 15:43:47.809421
2209 15:43:48.398007 00100000 ################################################################
2210 15:43:48.398259
2211 15:43:49.030827 00180000 ################################################################
2212 15:43:49.031343
2213 15:43:49.684537 00200000 ################################################################
2214 15:43:49.685050
2215 15:43:50.341789 00280000 ################################################################
2216 15:43:50.342324
2217 15:43:51.037153 00300000 ################################################################
2218 15:43:51.037668
2219 15:43:51.681173 00380000 ################################################################
2220 15:43:51.681861
2221 15:43:52.344854 00400000 ################################################################
2222 15:43:52.345065
2223 15:43:52.990549 00480000 ################################################################
2224 15:43:52.991282
2225 15:43:53.605442 00500000 ################################################################
2226 15:43:53.605983
2227 15:43:54.229545 00580000 ################################################################
2228 15:43:54.229683
2229 15:43:54.807149 00600000 ################################################################
2230 15:43:54.807280
2231 15:43:55.382550 00680000 ################################################################
2232 15:43:55.382736
2233 15:43:55.954773 00700000 ################################################################
2234 15:43:55.954901
2235 15:43:56.561861 00780000 ################################################################
2236 15:43:56.561999
2237 15:43:57.070541 00800000 ####################################################### done.
2238 15:43:57.070702
2239 15:43:57.073770 Sending tftp read request... done.
2240 15:43:57.073875
2241 15:43:57.077246 Waiting for the transfer...
2242 15:43:57.077335
2243 15:43:57.080648 00000000 # done.
2244 15:43:57.080747
2245 15:43:57.090404 Command line loaded dynamically from TFTP file: 11224192/tftp-deploy-k9radlck/kernel/cmdline
2246 15:43:57.090573
2247 15:43:57.103503 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2248 15:43:57.109273
2249 15:43:57.112850 Shutting down all USB controllers.
2250 15:43:57.113025
2251 15:43:57.113163 Removing current net device
2252 15:43:57.113295
2253 15:43:57.115778 Finalizing coreboot
2254 15:43:57.115981
2255 15:43:57.122099 Exiting depthcharge with code 4 at timestamp: 28999097
2256 15:43:57.122343
2257 15:43:57.122538
2258 15:43:57.122775 Starting kernel ...
2259 15:43:57.122960
2260 15:43:57.123137
2261 15:43:57.123885 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2262 15:43:57.124230 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2263 15:43:57.124516 Setting prompt string to ['Linux version [0-9]']
2264 15:43:57.124770 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2265 15:43:57.125019 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2267 15:48:21.125118 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2269 15:48:21.126158 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2271 15:48:21.127074 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2274 15:48:21.128655 end: 2 depthcharge-action (duration 00:05:00) [common]
2276 15:48:21.129779 Cleaning after the job
2277 15:48:21.130269 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224192/tftp-deploy-k9radlck/ramdisk
2278 15:48:21.136495 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224192/tftp-deploy-k9radlck/kernel
2279 15:48:21.142927 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224192/tftp-deploy-k9radlck/modules
2280 15:48:21.144756 start: 5.1 power-off (timeout 00:00:30) [common]
2281 15:48:21.145533 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=off'
2282 15:48:21.260440 >> Command sent successfully.
2283 15:48:21.272033 Returned 0 in 0 seconds
2284 15:48:21.373292 end: 5.1 power-off (duration 00:00:00) [common]
2286 15:48:21.374782 start: 5.2 read-feedback (timeout 00:10:00) [common]
2287 15:48:21.376020 Listened to connection for namespace 'common' for up to 1s
2288 15:48:22.376608 Finalising connection for namespace 'common'
2289 15:48:22.376819 Disconnecting from shell: Finalise
2290 15:48:22.376938
2291 15:48:22.477557 end: 5.2 read-feedback (duration 00:00:01) [common]
2292 15:48:22.478289 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11224192
2293 15:48:22.526139 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11224192
2294 15:48:22.526325 JobError: Your job cannot terminate cleanly.