Boot log: dell-latitude-5400-8665U-sarien

    1 15:45:18.464961  lava-dispatcher, installed at version: 2023.05.1
    2 15:45:18.465174  start: 0 validate
    3 15:45:18.465301  Start time: 2023-08-07 15:45:18.465293+00:00 (UTC)
    4 15:45:18.465419  Using caching service: 'http://localhost/cache/?uri=%s'
    5 15:45:18.465546  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 15:45:18.739815  Using caching service: 'http://localhost/cache/?uri=%s'
    7 15:45:18.740656  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 15:45:19.011847  Using caching service: 'http://localhost/cache/?uri=%s'
    9 15:45:19.012577  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 15:45:19.288169  validate duration: 0.82
   12 15:45:19.289381  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 15:45:19.289886  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 15:45:19.290353  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 15:45:19.290926  Not decompressing ramdisk as can be used compressed.
   16 15:45:19.291355  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 15:45:19.291722  saving as /var/lib/lava/dispatcher/tmp/11224165/tftp-deploy-18c9myvk/ramdisk/rootfs.cpio.gz
   18 15:45:19.292031  total size: 8418130 (8MB)
   19 15:45:19.297489  progress   0% (0MB)
   20 15:45:19.311823  progress   5% (0MB)
   21 15:45:19.320191  progress  10% (0MB)
   22 15:45:19.325886  progress  15% (1MB)
   23 15:45:19.330585  progress  20% (1MB)
   24 15:45:19.334830  progress  25% (2MB)
   25 15:45:19.338517  progress  30% (2MB)
   26 15:45:19.341630  progress  35% (2MB)
   27 15:45:19.344883  progress  40% (3MB)
   28 15:45:19.347915  progress  45% (3MB)
   29 15:45:19.350681  progress  50% (4MB)
   30 15:45:19.353297  progress  55% (4MB)
   31 15:45:19.355811  progress  60% (4MB)
   32 15:45:19.358018  progress  65% (5MB)
   33 15:45:19.360445  progress  70% (5MB)
   34 15:45:19.362707  progress  75% (6MB)
   35 15:45:19.365137  progress  80% (6MB)
   36 15:45:19.367355  progress  85% (6MB)
   37 15:45:19.369662  progress  90% (7MB)
   38 15:45:19.371917  progress  95% (7MB)
   39 15:45:19.373985  progress 100% (8MB)
   40 15:45:19.374214  8MB downloaded in 0.08s (97.68MB/s)
   41 15:45:19.374363  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 15:45:19.374606  end: 1.1 download-retry (duration 00:00:00) [common]
   44 15:45:19.374691  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 15:45:19.374777  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 15:45:19.374910  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 15:45:19.374981  saving as /var/lib/lava/dispatcher/tmp/11224165/tftp-deploy-18c9myvk/kernel/bzImage
   48 15:45:19.375041  total size: 7884688 (7MB)
   49 15:45:19.375099  No compression specified
   50 15:45:19.376331  progress   0% (0MB)
   51 15:45:19.378748  progress   5% (0MB)
   52 15:45:19.380949  progress  10% (0MB)
   53 15:45:19.383041  progress  15% (1MB)
   54 15:45:19.385189  progress  20% (1MB)
   55 15:45:19.387335  progress  25% (1MB)
   56 15:45:19.389488  progress  30% (2MB)
   57 15:45:19.391679  progress  35% (2MB)
   58 15:45:19.393770  progress  40% (3MB)
   59 15:45:19.395898  progress  45% (3MB)
   60 15:45:19.397961  progress  50% (3MB)
   61 15:45:19.400049  progress  55% (4MB)
   62 15:45:19.402100  progress  60% (4MB)
   63 15:45:19.404246  progress  65% (4MB)
   64 15:45:19.406288  progress  70% (5MB)
   65 15:45:19.408365  progress  75% (5MB)
   66 15:45:19.410427  progress  80% (6MB)
   67 15:45:19.412516  progress  85% (6MB)
   68 15:45:19.414562  progress  90% (6MB)
   69 15:45:19.416615  progress  95% (7MB)
   70 15:45:19.418675  progress 100% (7MB)
   71 15:45:19.418862  7MB downloaded in 0.04s (171.61MB/s)
   72 15:45:19.419000  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 15:45:19.419226  end: 1.2 download-retry (duration 00:00:00) [common]
   75 15:45:19.419312  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 15:45:19.419404  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 15:45:19.419542  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 15:45:19.419610  saving as /var/lib/lava/dispatcher/tmp/11224165/tftp-deploy-18c9myvk/modules/modules.tar
   79 15:45:19.419671  total size: 250796 (0MB)
   80 15:45:19.419731  Using unxz to decompress xz
   81 15:45:19.424027  progress  13% (0MB)
   82 15:45:19.424431  progress  26% (0MB)
   83 15:45:19.424666  progress  39% (0MB)
   84 15:45:19.426260  progress  52% (0MB)
   85 15:45:19.428173  progress  65% (0MB)
   86 15:45:19.430040  progress  78% (0MB)
   87 15:45:19.431902  progress  91% (0MB)
   88 15:45:19.433639  progress 100% (0MB)
   89 15:45:19.439299  0MB downloaded in 0.02s (12.19MB/s)
   90 15:45:19.439640  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 15:45:19.439930  end: 1.3 download-retry (duration 00:00:00) [common]
   93 15:45:19.440028  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
   94 15:45:19.440124  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
   95 15:45:19.440206  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 15:45:19.440293  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
   97 15:45:19.440521  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4
   98 15:45:19.440657  makedir: /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin
   99 15:45:19.440766  makedir: /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/tests
  100 15:45:19.440867  makedir: /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/results
  101 15:45:19.440982  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-add-keys
  102 15:45:19.441133  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-add-sources
  103 15:45:19.441265  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-background-process-start
  104 15:45:19.441398  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-background-process-stop
  105 15:45:19.441532  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-common-functions
  106 15:45:19.441660  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-echo-ipv4
  107 15:45:19.441789  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-install-packages
  108 15:45:19.441922  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-installed-packages
  109 15:45:19.442053  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-os-build
  110 15:45:19.442180  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-probe-channel
  111 15:45:19.442306  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-probe-ip
  112 15:45:19.442435  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-target-ip
  113 15:45:19.442561  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-target-mac
  114 15:45:19.442695  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-target-storage
  115 15:45:19.442827  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-test-case
  116 15:45:19.442953  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-test-event
  117 15:45:19.443078  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-test-feedback
  118 15:45:19.443217  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-test-raise
  119 15:45:19.443387  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-test-reference
  120 15:45:19.443556  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-test-runner
  121 15:45:19.443683  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-test-set
  122 15:45:19.443821  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-test-shell
  123 15:45:19.443951  Updating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-install-packages (oe)
  124 15:45:19.444105  Updating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/bin/lava-installed-packages (oe)
  125 15:45:19.444230  Creating /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/environment
  126 15:45:19.444336  LAVA metadata
  127 15:45:19.444419  - LAVA_JOB_ID=11224165
  128 15:45:19.444487  - LAVA_DISPATCHER_IP=192.168.201.1
  129 15:45:19.444590  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  130 15:45:19.444659  skipped lava-vland-overlay
  131 15:45:19.444733  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 15:45:19.444819  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  133 15:45:19.444883  skipped lava-multinode-overlay
  134 15:45:19.444955  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 15:45:19.445036  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  136 15:45:19.445115  Loading test definitions
  137 15:45:19.445203  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  138 15:45:19.445281  Using /lava-11224165 at stage 0
  139 15:45:19.445619  uuid=11224165_1.4.2.3.1 testdef=None
  140 15:45:19.445707  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 15:45:19.445790  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  142 15:45:19.446513  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 15:45:19.446750  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  145 15:45:19.447504  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 15:45:19.447744  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  148 15:45:19.448364  runner path: /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/0/tests/0_dmesg test_uuid 11224165_1.4.2.3.1
  149 15:45:19.448521  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 15:45:19.448745  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  152 15:45:19.448825  Using /lava-11224165 at stage 1
  153 15:45:19.449126  uuid=11224165_1.4.2.3.5 testdef=None
  154 15:45:19.449213  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  155 15:45:19.449298  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  156 15:45:19.450001  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  158 15:45:19.450344  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  159 15:45:19.451103  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  161 15:45:19.451328  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  162 15:45:19.452000  runner path: /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/1/tests/1_bootrr test_uuid 11224165_1.4.2.3.5
  163 15:45:19.452153  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  165 15:45:19.452363  Creating lava-test-runner.conf files
  166 15:45:19.452425  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/0 for stage 0
  167 15:45:19.452515  - 0_dmesg
  168 15:45:19.452595  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224165/lava-overlay-pevzmcj4/lava-11224165/1 for stage 1
  169 15:45:19.452698  - 1_bootrr
  170 15:45:19.452793  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  171 15:45:19.452878  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  172 15:45:19.462105  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  173 15:45:19.462207  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  174 15:45:19.462291  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  175 15:45:19.462375  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  176 15:45:19.462460  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  177 15:45:19.721612  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  178 15:45:19.721999  start: 1.4.4 extract-modules (timeout 00:10:00) [common]
  179 15:45:19.722123  extracting modules file /var/lib/lava/dispatcher/tmp/11224165/tftp-deploy-18c9myvk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224165/extract-overlay-ramdisk-ru39oti2/ramdisk
  180 15:45:19.736350  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  181 15:45:19.736488  start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
  182 15:45:19.736584  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224165/compress-overlay-rqgup71r/overlay-1.4.2.4.tar.gz to ramdisk
  183 15:45:19.736657  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224165/compress-overlay-rqgup71r/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11224165/extract-overlay-ramdisk-ru39oti2/ramdisk
  184 15:45:19.749116  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  185 15:45:19.749272  start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
  186 15:45:19.749393  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  187 15:45:19.749513  start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
  188 15:45:19.749627  Building ramdisk /var/lib/lava/dispatcher/tmp/11224165/extract-overlay-ramdisk-ru39oti2/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11224165/extract-overlay-ramdisk-ru39oti2/ramdisk
  189 15:45:19.900655  >> 49788 blocks

  190 15:45:20.743862  rename /var/lib/lava/dispatcher/tmp/11224165/extract-overlay-ramdisk-ru39oti2/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11224165/tftp-deploy-18c9myvk/ramdisk/ramdisk.cpio.gz
  191 15:45:20.744303  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  192 15:45:20.744425  start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
  193 15:45:20.744526  start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
  194 15:45:20.744628  No mkimage arch provided, not using FIT.
  195 15:45:20.744718  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  196 15:45:20.744802  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  197 15:45:20.744907  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  198 15:45:20.744995  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
  199 15:45:20.745077  No LXC device requested
  200 15:45:20.745158  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  201 15:45:20.745245  start: 1.6 deploy-device-env (timeout 00:09:59) [common]
  202 15:45:20.745321  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  203 15:45:20.745392  Checking files for TFTP limit of 4294967296 bytes.
  204 15:45:20.745801  end: 1 tftp-deploy (duration 00:00:01) [common]
  205 15:45:20.745905  start: 2 depthcharge-action (timeout 00:05:00) [common]
  206 15:45:20.746004  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  207 15:45:20.746129  substitutions:
  208 15:45:20.746196  - {DTB}: None
  209 15:45:20.746261  - {INITRD}: 11224165/tftp-deploy-18c9myvk/ramdisk/ramdisk.cpio.gz
  210 15:45:20.746320  - {KERNEL}: 11224165/tftp-deploy-18c9myvk/kernel/bzImage
  211 15:45:20.746379  - {LAVA_MAC}: None
  212 15:45:20.746435  - {PRESEED_CONFIG}: None
  213 15:45:20.746491  - {PRESEED_LOCAL}: None
  214 15:45:20.746547  - {RAMDISK}: 11224165/tftp-deploy-18c9myvk/ramdisk/ramdisk.cpio.gz
  215 15:45:20.746602  - {ROOT_PART}: None
  216 15:45:20.746656  - {ROOT}: None
  217 15:45:20.746710  - {SERVER_IP}: 192.168.201.1
  218 15:45:20.746764  - {TEE}: None
  219 15:45:20.746818  Parsed boot commands:
  220 15:45:20.746872  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  221 15:45:20.747045  Parsed boot commands: tftpboot 192.168.201.1 11224165/tftp-deploy-18c9myvk/kernel/bzImage 11224165/tftp-deploy-18c9myvk/kernel/cmdline 11224165/tftp-deploy-18c9myvk/ramdisk/ramdisk.cpio.gz
  222 15:45:20.747131  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  223 15:45:20.747216  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  224 15:45:20.747307  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  225 15:45:20.747434  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  226 15:45:20.747510  Not connected, no need to disconnect.
  227 15:45:20.747654  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  228 15:45:20.747764  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  229 15:45:20.747848  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-8665U-sarien-cbg-4'
  230 15:45:20.751956  Setting prompt string to ['lava-test: # ']
  231 15:45:20.752312  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  232 15:45:20.752420  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  233 15:45:20.752525  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  234 15:45:20.752623  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  235 15:45:20.752827  Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-4' '--port=1' '--command=reboot'
  236 15:45:37.690928  >> Command sent successfully.

  237 15:45:37.704186  Returned 0 in 16 seconds
  238 15:45:37.805522  end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
  240 15:45:37.806991  end: 2.2.2 reset-device (duration 00:00:17) [common]
  241 15:45:37.807540  start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
  242 15:45:37.807998  Setting prompt string to 'Starting depthcharge on sarien...'
  243 15:45:37.808356  Changing prompt to 'Starting depthcharge on sarien...'
  244 15:45:37.808704  depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
  245 15:45:37.810071  [Enter `^Ec?' for help]

  246 15:45:37.810581  

  247 15:45:37.811164  

  248 15:45:37.811743  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...

  249 15:45:37.812216  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz

  250 15:45:37.812675  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7

  251 15:45:37.813037  CPU: AES supported, TXT supported, VT supported

  252 15:45:37.813378  MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)

  253 15:45:37.813779  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium

  254 15:45:37.814258  IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1

  255 15:45:37.814839  VBOOT: Loading verstage.

  256 15:45:37.815390  CBFS @ 1d00000 size 300000

  257 15:45:37.815772  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  258 15:45:37.816100  CBFS: Locating 'fallback/verstage'

  259 15:45:37.816474  CBFS: Found @ offset 10f6c0 size 1435c

  260 15:45:37.816888  

  261 15:45:37.817386  

  262 15:45:37.817865  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...

  263 15:45:37.818412  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)

  264 15:45:37.818876  done! DID_VID 0x00281ae0

  265 15:45:37.819358  TPM ready after 0 ms

  266 15:45:37.819798  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  267 15:45:37.820242  tlcl_send_startup: Startup return code is 0

  268 15:45:37.820676  TPM: setup succeeded

  269 15:45:37.821143  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0

  270 15:45:37.821631  Checking cr50 for recovery request

  271 15:45:37.822097  Phase 1

  272 15:45:37.822558  FMAP: Found "FLASH" version 1.1 at 1c10000.

  273 15:45:37.823027  FMAP: base = fe000000 size = 2000000 #areas = 37

  274 15:45:37.823604  FMAP: area GBB found @ 1c11000 (978944 bytes)

  275 15:45:37.823947  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  276 15:45:37.824358  Phase 2

  277 15:45:37.824787  Phase 3

  278 15:45:37.825258  FMAP: area GBB found @ 1c11000 (978944 bytes)

  279 15:45:37.825728  VB2:vb2_report_dev_firmware() This is developer signed firmware

  280 15:45:37.826258  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  281 15:45:37.826648  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  282 15:45:37.826968  VB2:vb2_verify_keyblock() Checking key block signature...

  283 15:45:37.827510  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  284 15:45:37.827961  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)

  285 15:45:37.828425  VB2:vb2_verify_fw_preamble() Verifying preamble.

  286 15:45:37.828892  Phase 4

  287 15:45:37.829388  FMAP: area FW_MAIN_B found @ 1960000 (2555840 bytes)

  288 15:45:37.829860  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  289 15:45:37.830347  VB2:vb2_rsa_verify_digest() Digest check failed!

  290 15:45:37.830756  VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7

  291 15:45:37.831305  Saving nvdata

  292 15:45:37.831731  Reboot requested (10020007)

  293 15:45:37.832108  board_reset() called!

  294 15:45:37.832643  full_reset() called!

  295 15:45:41.964181  

  296 15:45:41.964373  

  297 15:45:41.972978  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...

  298 15:45:41.977960  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz

  299 15:45:41.981855  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7

  300 15:45:41.987473  CPU: AES supported, TXT supported, VT supported

  301 15:45:41.992594  MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)

  302 15:45:41.997718  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium

  303 15:45:42.003177  IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1

  304 15:45:42.006798  VBOOT: Loading verstage.

  305 15:45:42.008679  CBFS @ 1d00000 size 300000

  306 15:45:42.014931  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  307 15:45:42.018869  CBFS: Locating 'fallback/verstage'

  308 15:45:42.023160  CBFS: Found @ offset 10f6c0 size 1435c

  309 15:45:42.036958  

  310 15:45:42.037319  

  311 15:45:42.045808  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...

  312 15:45:42.052743  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)

  313 15:45:42.173922  .done! DID_VID 0x00281ae0

  314 15:45:42.175945  TPM ready after 0 ms

  315 15:45:42.179503  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  316 15:45:42.253099  tlcl_send_startup: Startup return code is 0

  317 15:45:42.254311  TPM: setup succeeded

  318 15:45:42.273645  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0

  319 15:45:42.277002  Checking cr50 for recovery request

  320 15:45:42.287012  Phase 1

  321 15:45:42.291450  FMAP: Found "FLASH" version 1.1 at 1c10000.

  322 15:45:42.296651  FMAP: base = fe000000 size = 2000000 #areas = 37

  323 15:45:42.300748  FMAP: area GBB found @ 1c11000 (978944 bytes)

  324 15:45:42.308267  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  325 15:45:42.314365  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  326 15:45:42.317133  Recovery requested (1009000e)

  327 15:45:42.318401  Saving nvdata

  328 15:45:42.335257  tlcl_extend: response is 0

  329 15:45:42.349323  tlcl_extend: response is 0

  330 15:45:42.353670  CBFS @ 1d00000 size 300000

  331 15:45:42.359881  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  332 15:45:42.362582  CBFS: Locating 'fallback/romstage'

  333 15:45:42.366505  CBFS: Found @ offset 80 size 15b2c

  334 15:45:42.368170  

  335 15:45:42.368621  

  336 15:45:42.376740  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...

  337 15:45:42.381723  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  338 15:45:42.385910  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  339 15:45:42.390406  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  340 15:45:42.394621  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  341 15:45:42.399005  gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000

  342 15:45:42.400854  TCO_STS:   0000 0004

  343 15:45:42.403897  GEN_PMCON: d0015209 00002200

  344 15:45:42.407113  GBLRST_CAUSE: 00000000 00000000

  345 15:45:42.409055  prev_sleep_state 5

  346 15:45:42.413071  Boot Count incremented to 34109

  347 15:45:42.415896  CBFS @ 1d00000 size 300000

  348 15:45:42.421508  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  349 15:45:42.424839  CBFS: Locating 'fspm.bin'

  350 15:45:42.427908  CBFS: Found @ offset 60fc0 size 70000

  351 15:45:42.433628  FMAP: Found "FLASH" version 1.1 at 1c10000.

  352 15:45:42.438232  FMAP: base = fe000000 size = 2000000 #areas = 37

  353 15:45:42.444103  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)

  354 15:45:42.451078  Probing TPM I2C: done! DID_VID 0x00281ae0

  355 15:45:42.453519  Locality already claimed

  356 15:45:42.456230  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  357 15:45:42.476091  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  358 15:45:42.483312  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  359 15:45:42.485288  MRC cache found, size 18e0

  360 15:45:42.487759  bootmode is set to :2

  361 15:45:42.580668  CBMEM:

  362 15:45:42.583872  IMD: root @ 89fff000 254 entries.

  363 15:45:42.586914  IMD: root @ 89ffec00 62 entries.

  364 15:45:42.589906  External stage cache:

  365 15:45:42.593619  IMD: root @ 8abff000 254 entries.

  366 15:45:42.596453  IMD: root @ 8abfec00 62 entries.

  367 15:45:42.602605  VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...

  368 15:45:42.605671  creating vboot_handoff structure

  369 15:45:42.626575  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  370 15:45:42.641583  tlcl_write: response is 0

  371 15:45:42.661320  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  372 15:45:42.665445  MRC: TPM MRC hash updated successfully.

  373 15:45:42.666875  1 DIMMs found

  374 15:45:42.668934  top_of_ram = 0x8a000000

  375 15:45:42.675079  MTRR Range: Start=89000000 End=8a000000 (Size 1000000)

  376 15:45:42.679940  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  377 15:45:42.682567  CBFS @ 1d00000 size 300000

  378 15:45:42.688725  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  379 15:45:42.691795  CBFS: Locating 'fallback/postcar'

  380 15:45:42.695450  CBFS: Found @ offset 107000 size 41a4

  381 15:45:42.702003  Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)

  382 15:45:42.712795  Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210

  383 15:45:42.717622  Processing 126 relocs. Offset value of 0x87cdd000

  384 15:45:42.720331  

  385 15:45:42.720403  

  386 15:45:42.728775  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...

  387 15:45:42.731990  CBFS @ 1d00000 size 300000

  388 15:45:42.737431  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  389 15:45:42.741564  CBFS: Locating 'fallback/ramstage'

  390 15:45:42.745322  CBFS: Found @ offset 458c0 size 1a8a8

  391 15:45:42.752162  Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)

  392 15:45:42.780749  Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0

  393 15:45:42.785663  Processing 3754 relocs. Offset value of 0x88e81000

  394 15:45:42.792509  

  395 15:45:42.793231  

  396 15:45:42.800315  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...

  397 15:45:42.805483  FMAP: Found "FLASH" version 1.1 at 1c10000.

  398 15:45:42.810046  FMAP: base = fe000000 size = 2000000 #areas = 37

  399 15:45:42.815049  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)

  400 15:45:42.819081  WARNING: RO_VPD is uninitialized or empty.

  401 15:45:42.823933  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

  402 15:45:42.828225  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

  403 15:45:42.830287  Normal boot.

  404 15:45:42.836637  BS: BS_PRE_DEVICE times (us): entry 0 run 57 exit 1160

  405 15:45:42.839310  CBFS @ 1d00000 size 300000

  406 15:45:42.845931  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  407 15:45:42.849727  CBFS: Locating 'cpu_microcode_blob.bin'

  408 15:45:42.853389  CBFS: Found @ offset 15c40 size 2fc00

  409 15:45:42.857921  microcode: sig=0x806ec pf=0x80 revision=0xb7

  410 15:45:42.860482  Skip microcode update

  411 15:45:42.862984  CBFS @ 1d00000 size 300000

  412 15:45:42.869448  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  413 15:45:42.871988  CBFS: Locating 'fsps.bin'

  414 15:45:42.875745  CBFS: Found @ offset d1fc0 size 35000

  415 15:45:42.910459  Detected 4 core, 8 thread CPU.

  416 15:45:42.912362  Setting up SMI for CPU

  417 15:45:42.915593  IED base = 0x8ac00000

  418 15:45:42.917181  IED size = 0x00400000

  419 15:45:42.919725  Will perform SMM setup.

  420 15:45:42.924676  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.

  421 15:45:42.932553  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  422 15:45:42.937742  Processing 16 relocs. Offset value of 0x00030000

  423 15:45:42.940499  Attempting to start 7 APs

  424 15:45:42.944083  Waiting for 10ms after sending INIT.

  425 15:45:42.960186  Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.

  426 15:45:42.960785  done.

  427 15:45:42.963006  AP: slot 1 apic_id 3.

  428 15:45:42.964788  AP: slot 3 apic_id 2.

  429 15:45:42.967359  AP: slot 4 apic_id 6.

  430 15:45:42.969796  AP: slot 5 apic_id 7.

  431 15:45:42.973569  Waiting for 2nd SIPI to complete...done.

  432 15:45:42.976121  AP: slot 6 apic_id 4.

  433 15:45:42.978717  AP: slot 7 apic_id 5.

  434 15:45:42.986003  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  435 15:45:42.991153  Processing 13 relocs. Offset value of 0x00038000

  436 15:45:42.997732  SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)

  437 15:45:43.001448  Installing SMM handler to 0x8a000000

  438 15:45:43.008798  Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40

  439 15:45:43.014497  Processing 867 relocs. Offset value of 0x8a010000

  440 15:45:43.022576  Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8

  441 15:45:43.027708  Processing 13 relocs. Offset value of 0x8a008000

  442 15:45:43.032779  SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd

  443 15:45:43.038315  SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd

  444 15:45:43.044349  SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd

  445 15:45:43.050239  SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd

  446 15:45:43.055964  SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd

  447 15:45:43.061473  SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd

  448 15:45:43.067598  SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd

  449 15:45:43.074144  SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)

  450 15:45:43.077167  Clearing SMI status registers

  451 15:45:43.079006  SMI_STS: PM1 

  452 15:45:43.081562  PM1_STS: WAK PWRBTN 

  453 15:45:43.083801  TCO_STS: BOOT SECOND_TO 

  454 15:45:43.086040  GPE0 STD STS: eSPI 

  455 15:45:43.088067  New SMBASE 0x8a000000

  456 15:45:43.091111  In relocation handler: CPU 0

  457 15:45:43.094638  New SMBASE=0x8a000000 IEDBASE=0x8ac00000

  458 15:45:43.099875  Writing SMRR. base = 0x8a000006, mask=0xff000800

  459 15:45:43.102608  Relocation complete.

  460 15:45:43.104390  New SMBASE 0x89fff800

  461 15:45:43.107478  In relocation handler: CPU 2

  462 15:45:43.111838  New SMBASE=0x89fff800 IEDBASE=0x8ac00000

  463 15:45:43.116354  Writing SMRR. base = 0x8a000006, mask=0xff000800

  464 15:45:43.118776  Relocation complete.

  465 15:45:43.120589  New SMBASE 0x89ffec00

  466 15:45:43.123668  In relocation handler: CPU 5

  467 15:45:43.127898  New SMBASE=0x89ffec00 IEDBASE=0x8ac00000

  468 15:45:43.132163  Writing SMRR. base = 0x8a000006, mask=0xff000800

  469 15:45:43.134269  Relocation complete.

  470 15:45:43.137046  New SMBASE 0x89fff000

  471 15:45:43.139706  In relocation handler: CPU 4

  472 15:45:43.143878  New SMBASE=0x89fff000 IEDBASE=0x8ac00000

  473 15:45:43.149045  Writing SMRR. base = 0x8a000006, mask=0xff000800

  474 15:45:43.150501  Relocation complete.

  475 15:45:43.153381  New SMBASE 0x89ffe800

  476 15:45:43.156439  In relocation handler: CPU 6

  477 15:45:43.160084  New SMBASE=0x89ffe800 IEDBASE=0x8ac00000

  478 15:45:43.164758  Writing SMRR. base = 0x8a000006, mask=0xff000800

  479 15:45:43.167695  Relocation complete.

  480 15:45:43.168891  New SMBASE 0x89ffe400

  481 15:45:43.172768  In relocation handler: CPU 7

  482 15:45:43.176284  New SMBASE=0x89ffe400 IEDBASE=0x8ac00000

  483 15:45:43.181494  Writing SMRR. base = 0x8a000006, mask=0xff000800

  484 15:45:43.183285  Relocation complete.

  485 15:45:43.185789  New SMBASE 0x89fffc00

  486 15:45:43.188809  In relocation handler: CPU 1

  487 15:45:43.192300  New SMBASE=0x89fffc00 IEDBASE=0x8ac00000

  488 15:45:43.197662  Writing SMRR. base = 0x8a000006, mask=0xff000800

  489 15:45:43.199217  Relocation complete.

  490 15:45:43.201780  New SMBASE 0x89fff400

  491 15:45:43.205661  In relocation handler: CPU 3

  492 15:45:43.209425  New SMBASE=0x89fff400 IEDBASE=0x8ac00000

  493 15:45:43.214261  Writing SMRR. base = 0x8a000006, mask=0xff000800

  494 15:45:43.216038  Relocation complete.

  495 15:45:43.218656  Initializing CPU #0

  496 15:45:43.221819  CPU: vendor Intel device 806ec

  497 15:45:43.225615  CPU: family 06, model 8e, stepping 0c

  498 15:45:43.228120  Clearing out pending MCEs

  499 15:45:43.232889  Setting up local APIC... apic_id: 0x00 done.

  500 15:45:43.235420  Turbo is available but hidden

  501 15:45:43.237214  Turbo has been enabled

  502 15:45:43.239816  VMX status: enabled

  503 15:45:43.243652  IA32_FEATURE_CONTROL status: locked

  504 15:45:43.246201  Skip microcode update

  505 15:45:43.247957  CPU #0 initialized

  506 15:45:43.249869  Initializing CPU #2

  507 15:45:43.252317  Initializing CPU #5

  508 15:45:43.254009  Initializing CPU #4

  509 15:45:43.257034  CPU: vendor Intel device 806ec

  510 15:45:43.260244  CPU: family 06, model 8e, stepping 0c

  511 15:45:43.264456  CPU: vendor Intel device 806ec

  512 15:45:43.267170  CPU: family 06, model 8e, stepping 0c

  513 15:45:43.270583  Clearing out pending MCEs

  514 15:45:43.272987  Clearing out pending MCEs

  515 15:45:43.278256  Setting up local APIC...CPU: vendor Intel device 806ec

  516 15:45:43.282072  CPU: family 06, model 8e, stepping 0c

  517 15:45:43.284531  Initializing CPU #6

  518 15:45:43.286399  Initializing CPU #7

  519 15:45:43.289086  CPU: vendor Intel device 806ec

  520 15:45:43.293015  CPU: family 06, model 8e, stepping 0c

  521 15:45:43.296087  CPU: vendor Intel device 806ec

  522 15:45:43.299654  CPU: family 06, model 8e, stepping 0c

  523 15:45:43.302115  Clearing out pending MCEs

  524 15:45:43.304789  Clearing out pending MCEs

  525 15:45:43.310312  Setting up local APIC...Clearing out pending MCEs

  526 15:45:43.312617  Initializing CPU #1

  527 15:45:43.314302  Initializing CPU #3

  528 15:45:43.317597  CPU: vendor Intel device 806ec

  529 15:45:43.321293  CPU: family 06, model 8e, stepping 0c

  530 15:45:43.324288  CPU: vendor Intel device 806ec

  531 15:45:43.328037  CPU: family 06, model 8e, stepping 0c

  532 15:45:43.331201  Clearing out pending MCEs

  533 15:45:43.334115  Clearing out pending MCEs

  534 15:45:43.344838  Setting up local APIC...Setting up local APIC...Setting up local APIC...Setting up local APIC... apic_id: 0x06 done.

  535 15:45:43.347449   apic_id: 0x07 done.

  536 15:45:43.349315  VMX status: enabled

  537 15:45:43.351327  VMX status: enabled

  538 15:45:43.354662  IA32_FEATURE_CONTROL status: locked

  539 15:45:43.358161  IA32_FEATURE_CONTROL status: locked

  540 15:45:43.360537  Skip microcode update

  541 15:45:43.362550  Skip microcode update

  542 15:45:43.364768  CPU #4 initialized

  543 15:45:43.366184  CPU #5 initialized

  544 15:45:43.368645   apic_id: 0x05 done.

  545 15:45:43.370918   apic_id: 0x04 done.

  546 15:45:43.372957   apic_id: 0x03 done.

  547 15:45:43.377399  Setting up local APIC...VMX status: enabled

  548 15:45:43.379671  VMX status: enabled

  549 15:45:43.383385  IA32_FEATURE_CONTROL status: locked

  550 15:45:43.386647  IA32_FEATURE_CONTROL status: locked

  551 15:45:43.389155  Skip microcode update

  552 15:45:43.391604  Skip microcode update

  553 15:45:43.392478  CPU #7 initialized

  554 15:45:43.395497  CPU #6 initialized

  555 15:45:43.397299  VMX status: enabled

  556 15:45:43.399139   apic_id: 0x02 done.

  557 15:45:43.402478  IA32_FEATURE_CONTROL status: locked

  558 15:45:43.404654  VMX status: enabled

  559 15:45:43.406664  Skip microcode update

  560 15:45:43.410751  IA32_FEATURE_CONTROL status: locked

  561 15:45:43.412228  CPU #1 initialized

  562 15:45:43.414528  Skip microcode update

  563 15:45:43.416854   apic_id: 0x01 done.

  564 15:45:43.418710  CPU #3 initialized

  565 15:45:43.420882  VMX status: enabled

  566 15:45:43.424609  IA32_FEATURE_CONTROL status: locked

  567 15:45:43.426862  Skip microcode update

  568 15:45:43.429206  CPU #2 initialized

  569 15:45:43.432695  bsp_do_flight_plan done after 455 msecs.

  570 15:45:43.436123  CPU: frequency set to 4800 MHz

  571 15:45:43.437644  Enabling SMIs.

  572 15:45:43.439205  Locking SMM.

  573 15:45:43.442003  CBFS @ 1d00000 size 300000

  574 15:45:43.448855  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  575 15:45:43.451607  CBFS: Locating 'vbt.bin'

  576 15:45:43.455227  CBFS: Found @ offset 60a40 size 4a0

  577 15:45:43.459040  Found a VBT of 4608 bytes after decompression

  578 15:45:43.472511  FMAP: area GBB found @ 1c11000 (978944 bytes)

  579 15:45:43.533895  Detected 4 core, 8 thread CPU.

  580 15:45:43.536398  Detected 4 core, 8 thread CPU.

  581 15:45:43.764126  Display FSP Version Info HOB

  582 15:45:43.766564  Reference Code - CPU = 7.0.5e.40

  583 15:45:43.769854  uCode Version = 0.0.0.b8

  584 15:45:43.772276  Display FSP Version Info HOB

  585 15:45:43.775340  Reference Code - ME = 7.0.5e.40

  586 15:45:43.778415  MEBx version = 0.0.0.0

  587 15:45:43.782121  ME Firmware Version = Consumer SKU

  588 15:45:43.785213  Display FSP Version Info HOB

  589 15:45:43.788560  Reference Code - CNL PCH = 7.0.5e.40

  590 15:45:43.791355  PCH-CRID Status = Disabled

  591 15:45:43.794460  CNL PCH H A0 Hsio Version = 2.0.0.0

  592 15:45:43.798393  CNL PCH H Ax Hsio Version = 9.0.0.0

  593 15:45:43.801660  CNL PCH H Bx Hsio Version = a.0.0.0

  594 15:45:43.805676  CNL PCH LP B0 Hsio Version = 7.0.0.0

  595 15:45:43.809293  CNL PCH LP Bx Hsio Version = 6.0.0.0

  596 15:45:43.813183  CNL PCH LP Dx Hsio Version = 7.0.0.0

  597 15:45:43.816397  Display FSP Version Info HOB

  598 15:45:43.820698  Reference Code - SA - System Agent = 7.0.5e.40

  599 15:45:43.823934  Reference Code - MRC = 0.7.1.68

  600 15:45:43.826956  SA - PCIe Version = 7.0.5e.40

  601 15:45:43.829552  SA-CRID Status = Disabled

  602 15:45:43.833104  SA-CRID Original Value = 0.0.0.c

  603 15:45:43.835671  SA-CRID New Value = 0.0.0.c

  604 15:45:43.853563  RTC Init

  605 15:45:43.858323  Set power off after power failure.

  606 15:45:43.859546  Disabling Deep S3

  607 15:45:43.860961  Disabling Deep S3

  608 15:45:43.863272  Disabling Deep S4

  609 15:45:43.864823  Disabling Deep S4

  610 15:45:43.867164  Disabling Deep S5

  611 15:45:43.868623  Disabling Deep S5

  612 15:45:43.875295  BS: BS_DEV_INIT_CHIPS times (us): entry 602398 run 413274 exit 16222

  613 15:45:43.877774  Enumerating buses...

  614 15:45:43.882578  Show all devs... Before device enumeration.

  615 15:45:43.884555  Root Device: enabled 1

  616 15:45:43.886410  CPU_CLUSTER: 0: enabled 1

  617 15:45:43.889595  DOMAIN: 0000: enabled 1

  618 15:45:43.891612  APIC: 00: enabled 1

  619 15:45:43.894085  PCI: 00:00.0: enabled 1

  620 15:45:43.895825  PCI: 00:02.0: enabled 1

  621 15:45:43.898999  PCI: 00:04.0: enabled 1

  622 15:45:43.901660  PCI: 00:12.0: enabled 1

  623 15:45:43.904189  PCI: 00:12.5: enabled 0

  624 15:45:43.906558  PCI: 00:12.6: enabled 0

  625 15:45:43.907839  PCI: 00:13.0: enabled 0

  626 15:45:43.910957  PCI: 00:14.0: enabled 1

  627 15:45:43.912846  PCI: 00:14.1: enabled 0

  628 15:45:43.916204  PCI: 00:14.3: enabled 1

  629 15:45:43.917792  PCI: 00:14.5: enabled 0

  630 15:45:43.920536  PCI: 00:15.0: enabled 1

  631 15:45:43.923312  PCI: 00:15.1: enabled 1

  632 15:45:43.925555  PCI: 00:15.2: enabled 0

  633 15:45:43.927880  PCI: 00:15.3: enabled 0

  634 15:45:43.930544  PCI: 00:16.0: enabled 1

  635 15:45:43.933025  PCI: 00:16.1: enabled 0

  636 15:45:43.935526  PCI: 00:16.2: enabled 0

  637 15:45:43.937108  PCI: 00:16.3: enabled 0

  638 15:45:43.940559  PCI: 00:16.4: enabled 0

  639 15:45:43.943062  PCI: 00:16.5: enabled 0

  640 15:45:43.944464  PCI: 00:17.0: enabled 1

  641 15:45:43.947669  PCI: 00:19.0: enabled 1

  642 15:45:43.949988  PCI: 00:19.1: enabled 0

  643 15:45:43.952017  PCI: 00:19.2: enabled 1

  644 15:45:43.954636  PCI: 00:1a.0: enabled 0

  645 15:45:43.957550  PCI: 00:1c.0: enabled 1

  646 15:45:43.959485  PCI: 00:1c.1: enabled 0

  647 15:45:43.961450  PCI: 00:1c.2: enabled 0

  648 15:45:43.964500  PCI: 00:1c.3: enabled 0

  649 15:45:43.966929  PCI: 00:1c.4: enabled 0

  650 15:45:43.968864  PCI: 00:1c.5: enabled 0

  651 15:45:43.971164  PCI: 00:1c.6: enabled 0

  652 15:45:43.974008  PCI: 00:1c.7: enabled 1

  653 15:45:43.976143  PCI: 00:1d.0: enabled 1

  654 15:45:43.979353  PCI: 00:1d.1: enabled 1

  655 15:45:43.981204  PCI: 00:1d.2: enabled 0

  656 15:45:43.983189  PCI: 00:1d.3: enabled 0

  657 15:45:43.986051  PCI: 00:1d.4: enabled 1

  658 15:45:43.988663  PCI: 00:1e.0: enabled 0

  659 15:45:43.991544  PCI: 00:1e.1: enabled 0

  660 15:45:43.993405  PCI: 00:1e.2: enabled 0

  661 15:45:43.995961  PCI: 00:1e.3: enabled 0

  662 15:45:43.998461  PCI: 00:1f.0: enabled 1

  663 15:45:44.000481  PCI: 00:1f.1: enabled 1

  664 15:45:44.002861  PCI: 00:1f.2: enabled 1

  665 15:45:44.005443  PCI: 00:1f.3: enabled 1

  666 15:45:44.007544  PCI: 00:1f.4: enabled 1

  667 15:45:44.009946  PCI: 00:1f.5: enabled 1

  668 15:45:44.012482  PCI: 00:1f.6: enabled 1

  669 15:45:44.014926  USB0 port 0: enabled 1

  670 15:45:44.017352  I2C: 00:10: enabled 1

  671 15:45:44.019433  I2C: 00:10: enabled 1

  672 15:45:44.022280  I2C: 00:34: enabled 1

  673 15:45:44.023654  I2C: 00:2c: enabled 1

  674 15:45:44.026252  I2C: 00:50: enabled 1

  675 15:45:44.029035  PNP: 0c09.0: enabled 1

  676 15:45:44.031307  USB2 port 0: enabled 1

  677 15:45:44.033570  USB2 port 1: enabled 1

  678 15:45:44.035869  USB2 port 2: enabled 1

  679 15:45:44.038066  USB2 port 4: enabled 1

  680 15:45:44.040522  USB2 port 5: enabled 1

  681 15:45:44.042483  USB2 port 6: enabled 1

  682 15:45:44.045276  USB2 port 7: enabled 1

  683 15:45:44.047768  USB2 port 8: enabled 1

  684 15:45:44.049351  USB2 port 9: enabled 1

  685 15:45:44.051753  USB3 port 0: enabled 1

  686 15:45:44.054785  USB3 port 1: enabled 1

  687 15:45:44.056680  USB3 port 2: enabled 1

  688 15:45:44.059154  USB3 port 3: enabled 1

  689 15:45:44.060810  USB3 port 4: enabled 1

  690 15:45:44.063689  APIC: 03: enabled 1

  691 15:45:44.065530  APIC: 01: enabled 1

  692 15:45:44.067460  APIC: 02: enabled 1

  693 15:45:44.069527  APIC: 06: enabled 1

  694 15:45:44.071426  APIC: 07: enabled 1

  695 15:45:44.073251  APIC: 04: enabled 1

  696 15:45:44.075580  APIC: 05: enabled 1

  697 15:45:44.078066  Compare with tree...

  698 15:45:44.080482  Root Device: enabled 1

  699 15:45:44.083006   CPU_CLUSTER: 0: enabled 1

  700 15:45:44.084518    APIC: 00: enabled 1

  701 15:45:44.087723    APIC: 03: enabled 1

  702 15:45:44.089507    APIC: 01: enabled 1

  703 15:45:44.091897    APIC: 02: enabled 1

  704 15:45:44.093539    APIC: 06: enabled 1

  705 15:45:44.095760    APIC: 07: enabled 1

  706 15:45:44.098278    APIC: 04: enabled 1

  707 15:45:44.101269    APIC: 05: enabled 1

  708 15:45:44.103732   DOMAIN: 0000: enabled 1

  709 15:45:44.106322    PCI: 00:00.0: enabled 1

  710 15:45:44.108741    PCI: 00:02.0: enabled 1

  711 15:45:44.110733    PCI: 00:04.0: enabled 1

  712 15:45:44.113355    PCI: 00:12.0: enabled 1

  713 15:45:44.116488    PCI: 00:12.5: enabled 0

  714 15:45:44.119104    PCI: 00:12.6: enabled 0

  715 15:45:44.121501    PCI: 00:13.0: enabled 0

  716 15:45:44.124614    PCI: 00:14.0: enabled 1

  717 15:45:44.127063     USB0 port 0: enabled 1

  718 15:45:44.130102      USB2 port 0: enabled 1

  719 15:45:44.132650      USB2 port 1: enabled 1

  720 15:45:44.135126      USB2 port 2: enabled 1

  721 15:45:44.137432      USB2 port 4: enabled 1

  722 15:45:44.140675      USB2 port 5: enabled 1

  723 15:45:44.143492      USB2 port 6: enabled 1

  724 15:45:44.145763      USB2 port 7: enabled 1

  725 15:45:44.148297      USB2 port 8: enabled 1

  726 15:45:44.151572      USB2 port 9: enabled 1

  727 15:45:44.153885      USB3 port 0: enabled 1

  728 15:45:44.156412      USB3 port 1: enabled 1

  729 15:45:44.159542      USB3 port 2: enabled 1

  730 15:45:44.162627      USB3 port 3: enabled 1

  731 15:45:44.165172      USB3 port 4: enabled 1

  732 15:45:44.167658    PCI: 00:14.1: enabled 0

  733 15:45:44.170649    PCI: 00:14.3: enabled 1

  734 15:45:44.173041    PCI: 00:14.5: enabled 0

  735 15:45:44.175534    PCI: 00:15.0: enabled 1

  736 15:45:44.177713     I2C: 00:10: enabled 1

  737 15:45:44.180589     I2C: 00:10: enabled 1

  738 15:45:44.183102     I2C: 00:34: enabled 1

  739 15:45:44.185651    PCI: 00:15.1: enabled 1

  740 15:45:44.188091     I2C: 00:2c: enabled 1

  741 15:45:44.190698    PCI: 00:15.2: enabled 0

  742 15:45:44.194056    PCI: 00:15.3: enabled 0

  743 15:45:44.195764    PCI: 00:16.0: enabled 1

  744 15:45:44.198934    PCI: 00:16.1: enabled 0

  745 15:45:44.201216    PCI: 00:16.2: enabled 0

  746 15:45:44.203928    PCI: 00:16.3: enabled 0

  747 15:45:44.206446    PCI: 00:16.4: enabled 0

  748 15:45:44.208718    PCI: 00:16.5: enabled 0

  749 15:45:44.212027    PCI: 00:17.0: enabled 1

  750 15:45:44.213959    PCI: 00:19.0: enabled 1

  751 15:45:44.216952     I2C: 00:50: enabled 1

  752 15:45:44.219891    PCI: 00:19.1: enabled 0

  753 15:45:44.222204    PCI: 00:19.2: enabled 1

  754 15:45:44.224743    PCI: 00:1a.0: enabled 0

  755 15:45:44.227868    PCI: 00:1c.0: enabled 1

  756 15:45:44.229875    PCI: 00:1c.1: enabled 0

  757 15:45:44.232944    PCI: 00:1c.2: enabled 0

  758 15:45:44.235565    PCI: 00:1c.3: enabled 0

  759 15:45:44.237953    PCI: 00:1c.4: enabled 0

  760 15:45:44.240465    PCI: 00:1c.5: enabled 0

  761 15:45:44.243142    PCI: 00:1c.6: enabled 0

  762 15:45:44.246214    PCI: 00:1c.7: enabled 1

  763 15:45:44.248709    PCI: 00:1d.0: enabled 1

  764 15:45:44.250507    PCI: 00:1d.1: enabled 1

  765 15:45:44.253340    PCI: 00:1d.2: enabled 0

  766 15:45:44.256072    PCI: 00:1d.3: enabled 0

  767 15:45:44.259054    PCI: 00:1d.4: enabled 1

  768 15:45:44.261493    PCI: 00:1e.0: enabled 0

  769 15:45:44.263846    PCI: 00:1e.1: enabled 0

  770 15:45:44.266706    PCI: 00:1e.2: enabled 0

  771 15:45:44.269426    PCI: 00:1e.3: enabled 0

  772 15:45:44.271487    PCI: 00:1f.0: enabled 1

  773 15:45:44.274789     PNP: 0c09.0: enabled 1

  774 15:45:44.277671    PCI: 00:1f.1: enabled 1

  775 15:45:44.280178    PCI: 00:1f.2: enabled 1

  776 15:45:44.282666    PCI: 00:1f.3: enabled 1

  777 15:45:44.285176    PCI: 00:1f.4: enabled 1

  778 15:45:44.288134    PCI: 00:1f.5: enabled 1

  779 15:45:44.290233    PCI: 00:1f.6: enabled 1

  780 15:45:44.293368  Root Device scanning...

  781 15:45:44.296425  root_dev_scan_bus for Root Device

  782 15:45:44.298588  CPU_CLUSTER: 0 enabled

  783 15:45:44.301402  DOMAIN: 0000 enabled

  784 15:45:44.303785  DOMAIN: 0000 scanning...

  785 15:45:44.306407  PCI: pci_scan_bus for bus 00

  786 15:45:44.309932  PCI: 00:00.0 [8086/0000] ops

  787 15:45:44.312968  PCI: 00:00.0 [8086/3e34] enabled

  788 15:45:44.315943  PCI: 00:02.0 [8086/0000] ops

  789 15:45:44.319065  PCI: 00:02.0 [8086/3ea0] enabled

  790 15:45:44.322709  PCI: 00:04.0 [8086/1903] enabled

  791 15:45:44.325842  PCI: 00:08.0 [8086/1911] enabled

  792 15:45:44.329152  PCI: 00:12.0 [8086/9df9] enabled

  793 15:45:44.332615  PCI: 00:14.0 [8086/0000] bus ops

  794 15:45:44.336396  PCI: 00:14.0 [8086/9ded] enabled

  795 15:45:44.339046  PCI: 00:14.2 [8086/9def] enabled

  796 15:45:44.342749  PCI: 00:14.3 [8086/9df0] enabled

  797 15:45:44.345385  PCI: 00:15.0 [8086/0000] bus ops

  798 15:45:44.349177  PCI: 00:15.0 [8086/9de8] enabled

  799 15:45:44.352755  PCI: 00:15.1 [8086/0000] bus ops

  800 15:45:44.355903  PCI: 00:15.1 [8086/9de9] enabled

  801 15:45:44.358293  PCI: 00:16.0 [8086/0000] ops

  802 15:45:44.361751  PCI: 00:16.0 [8086/9de0] enabled

  803 15:45:44.365167  PCI: 00:17.0 [8086/0000] ops

  804 15:45:44.368315  PCI: 00:17.0 [8086/9dd3] enabled

  805 15:45:44.371697  PCI: 00:19.0 [8086/0000] bus ops

  806 15:45:44.375232  PCI: 00:19.0 [8086/9dc5] enabled

  807 15:45:44.377919  PCI: 00:19.2 [8086/0000] ops

  808 15:45:44.381586  PCI: 00:19.2 [8086/9dc7] enabled

  809 15:45:44.384643  PCI: 00:1c.0 [8086/0000] bus ops

  810 15:45:44.387872  PCI: 00:1c.0 [8086/9dbf] enabled

  811 15:45:44.393387  PCI: Static device PCI: 00:1c.7 not found, disabling it.

  812 15:45:44.399286  PCI: 00:1d.0 [8086/0000] bus ops

  813 15:45:44.400175  PCI: 00:1d.0 [8086/9db4] enabled

  814 15:45:44.405372  PCI: Static device PCI: 00:1d.1 not found, disabling it.

  815 15:45:44.411722  PCI: Static device PCI: 00:1d.4 not found, disabling it.

  816 15:45:44.414895  PCI: 00:1f.0 [8086/0000] bus ops

  817 15:45:44.417813  PCI: 00:1f.0 [8086/9d84] enabled

  818 15:45:44.423756  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  819 15:45:44.429535  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  820 15:45:44.432691  PCI: 00:1f.3 [8086/0000] bus ops

  821 15:45:44.436432  PCI: 00:1f.3 [8086/9dc8] enabled

  822 15:45:44.439357  PCI: 00:1f.4 [8086/0000] bus ops

  823 15:45:44.442903  PCI: 00:1f.4 [8086/9da3] enabled

  824 15:45:44.446505  PCI: 00:1f.5 [8086/0000] bus ops

  825 15:45:44.449573  PCI: 00:1f.5 [8086/9da4] enabled

  826 15:45:44.452744  PCI: 00:1f.6 [8086/15be] enabled

  827 15:45:44.455821  PCI: Leftover static devices:

  828 15:45:44.457074  PCI: 00:12.5

  829 15:45:44.458275  PCI: 00:12.6

  830 15:45:44.460158  PCI: 00:13.0

  831 15:45:44.461263  PCI: 00:14.1

  832 15:45:44.462094  PCI: 00:14.5

  833 15:45:44.463263  PCI: 00:15.2

  834 15:45:44.464942  PCI: 00:15.3

  835 15:45:44.466690  PCI: 00:16.1

  836 15:45:44.467597  PCI: 00:16.2

  837 15:45:44.469317  PCI: 00:16.3

  838 15:45:44.471126  PCI: 00:16.4

  839 15:45:44.472286  PCI: 00:16.5

  840 15:45:44.473434  PCI: 00:19.1

  841 15:45:44.474784  PCI: 00:1a.0

  842 15:45:44.476322  PCI: 00:1c.1

  843 15:45:44.477141  PCI: 00:1c.2

  844 15:45:44.479240  PCI: 00:1c.3

  845 15:45:44.479854  PCI: 00:1c.4

  846 15:45:44.481242  PCI: 00:1c.5

  847 15:45:44.483482  PCI: 00:1c.6

  848 15:45:44.484693  PCI: 00:1c.7

  849 15:45:44.485983  PCI: 00:1d.1

  850 15:45:44.487257  PCI: 00:1d.2

  851 15:45:44.488487  PCI: 00:1d.3

  852 15:45:44.489719  PCI: 00:1d.4

  853 15:45:44.491247  PCI: 00:1e.0

  854 15:45:44.491873  PCI: 00:1e.1

  855 15:45:44.493881  PCI: 00:1e.2

  856 15:45:44.495631  PCI: 00:1e.3

  857 15:45:44.496356  PCI: 00:1f.1

  858 15:45:44.498010  PCI: 00:1f.2

  859 15:45:44.501230  PCI: Check your devicetree.cb.

  860 15:45:44.503315  PCI: 00:14.0 scanning...

  861 15:45:44.506944  scan_usb_bus for PCI: 00:14.0

  862 15:45:44.509383  USB0 port 0 enabled

  863 15:45:44.511205  USB0 port 0 scanning...

  864 15:45:44.514940  scan_usb_bus for USB0 port 0

  865 15:45:44.516203  USB2 port 0 enabled

  866 15:45:44.518555  USB2 port 1 enabled

  867 15:45:44.520956  USB2 port 2 enabled

  868 15:45:44.523190  USB2 port 4 enabled

  869 15:45:44.524532  USB2 port 5 enabled

  870 15:45:44.527158  USB2 port 6 enabled

  871 15:45:44.528975  USB2 port 7 enabled

  872 15:45:44.530581  USB2 port 8 enabled

  873 15:45:44.533250  USB2 port 9 enabled

  874 15:45:44.535135  USB3 port 0 enabled

  875 15:45:44.536989  USB3 port 1 enabled

  876 15:45:44.539674  USB3 port 2 enabled

  877 15:45:44.541396  USB3 port 3 enabled

  878 15:45:44.543197  USB3 port 4 enabled

  879 15:45:44.545742  USB2 port 0 scanning...

  880 15:45:44.548898  scan_usb_bus for USB2 port 0

  881 15:45:44.552542  scan_usb_bus for USB2 port 0 done

  882 15:45:44.558011  scan_bus: scanning of bus USB2 port 0 took 9058 usecs

  883 15:45:44.559424  USB2 port 1 scanning...

  884 15:45:44.563205  scan_usb_bus for USB2 port 1

  885 15:45:44.566676  scan_usb_bus for USB2 port 1 done

  886 15:45:44.572356  scan_bus: scanning of bus USB2 port 1 took 9056 usecs

  887 15:45:44.574255  USB2 port 2 scanning...

  888 15:45:44.577887  scan_usb_bus for USB2 port 2

  889 15:45:44.580441  scan_usb_bus for USB2 port 2 done

  890 15:45:44.586296  scan_bus: scanning of bus USB2 port 2 took 9059 usecs

  891 15:45:44.588686  USB2 port 4 scanning...

  892 15:45:44.592499  scan_usb_bus for USB2 port 4

  893 15:45:44.595541  scan_usb_bus for USB2 port 4 done

  894 15:45:44.601360  scan_bus: scanning of bus USB2 port 4 took 9057 usecs

  895 15:45:44.602795  USB2 port 5 scanning...

  896 15:45:44.606369  scan_usb_bus for USB2 port 5

  897 15:45:44.610166  scan_usb_bus for USB2 port 5 done

  898 15:45:44.615237  scan_bus: scanning of bus USB2 port 5 took 9058 usecs

  899 15:45:44.617183  USB2 port 6 scanning...

  900 15:45:44.620812  scan_usb_bus for USB2 port 6

  901 15:45:44.624535  scan_usb_bus for USB2 port 6 done

  902 15:45:44.629570  scan_bus: scanning of bus USB2 port 6 took 9057 usecs

  903 15:45:44.631511  USB2 port 7 scanning...

  904 15:45:44.635428  scan_usb_bus for USB2 port 7

  905 15:45:44.638140  scan_usb_bus for USB2 port 7 done

  906 15:45:44.644273  scan_bus: scanning of bus USB2 port 7 took 9057 usecs

  907 15:45:44.646617  USB2 port 8 scanning...

  908 15:45:44.649765  scan_usb_bus for USB2 port 8

  909 15:45:44.652562  scan_usb_bus for USB2 port 8 done

  910 15:45:44.658407  scan_bus: scanning of bus USB2 port 8 took 9055 usecs

  911 15:45:44.660859  USB2 port 9 scanning...

  912 15:45:44.664364  scan_usb_bus for USB2 port 9

  913 15:45:44.667721  scan_usb_bus for USB2 port 9 done

  914 15:45:44.672753  scan_bus: scanning of bus USB2 port 9 took 9057 usecs

  915 15:45:44.674693  USB3 port 0 scanning...

  916 15:45:44.678566  scan_usb_bus for USB3 port 0

  917 15:45:44.681629  scan_usb_bus for USB3 port 0 done

  918 15:45:44.687115  scan_bus: scanning of bus USB3 port 0 took 9057 usecs

  919 15:45:44.689552  USB3 port 1 scanning...

  920 15:45:44.692684  scan_usb_bus for USB3 port 1

  921 15:45:44.696256  scan_usb_bus for USB3 port 1 done

  922 15:45:44.701531  scan_bus: scanning of bus USB3 port 1 took 9057 usecs

  923 15:45:44.703722  USB3 port 2 scanning...

  924 15:45:44.707161  scan_usb_bus for USB3 port 2

  925 15:45:44.710713  scan_usb_bus for USB3 port 2 done

  926 15:45:44.715709  scan_bus: scanning of bus USB3 port 2 took 9058 usecs

  927 15:45:44.718255  USB3 port 3 scanning...

  928 15:45:44.721551  scan_usb_bus for USB3 port 3

  929 15:45:44.725185  scan_usb_bus for USB3 port 3 done

  930 15:45:44.730908  scan_bus: scanning of bus USB3 port 3 took 9056 usecs

  931 15:45:44.732118  USB3 port 4 scanning...

  932 15:45:44.736457  scan_usb_bus for USB3 port 4

  933 15:45:44.739260  scan_usb_bus for USB3 port 4 done

  934 15:45:44.744473  scan_bus: scanning of bus USB3 port 4 took 9056 usecs

  935 15:45:44.748160  scan_usb_bus for USB0 port 0 done

  936 15:45:44.753580  scan_bus: scanning of bus USB0 port 0 took 239200 usecs

  937 15:45:44.756878  scan_usb_bus for PCI: 00:14.0 done

  938 15:45:44.762542  scan_bus: scanning of bus PCI: 00:14.0 took 256125 usecs

  939 15:45:44.765236  PCI: 00:15.0 scanning...

  940 15:45:44.769457  scan_generic_bus for PCI: 00:15.0

  941 15:45:44.773109  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled

  942 15:45:44.776960  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled

  943 15:45:44.781258  bus: PCI: 00:15.0[0]->I2C: 01:34 enabled

  944 15:45:44.785567  scan_generic_bus for PCI: 00:15.0 done

  945 15:45:44.790968  scan_bus: scanning of bus PCI: 00:15.0 took 22372 usecs

  946 15:45:44.793364  PCI: 00:15.1 scanning...

  947 15:45:44.797298  scan_generic_bus for PCI: 00:15.1

  948 15:45:44.800424  bus: PCI: 00:15.1[0]->I2C: 02:2c enabled

  949 15:45:44.805248  scan_generic_bus for PCI: 00:15.1 done

  950 15:45:44.810168  scan_bus: scanning of bus PCI: 00:15.1 took 14206 usecs

  951 15:45:44.813401  PCI: 00:19.0 scanning...

  952 15:45:44.817138  scan_generic_bus for PCI: 00:19.0

  953 15:45:44.820975  bus: PCI: 00:19.0[0]->I2C: 03:50 enabled

  954 15:45:44.824754  scan_generic_bus for PCI: 00:19.0 done

  955 15:45:44.830267  scan_bus: scanning of bus PCI: 00:19.0 took 14207 usecs

  956 15:45:44.832663  PCI: 00:1c.0 scanning...

  957 15:45:44.836374  do_pci_scan_bridge for PCI: 00:1c.0

  958 15:45:44.839965  PCI: pci_scan_bus for bus 01

  959 15:45:44.842522  PCI: 01:00.0 [10ec/525a] enabled

  960 15:45:44.846040  Capability: type 0x01 @ 0x80

  961 15:45:44.848738  Capability: type 0x05 @ 0x90

  962 15:45:44.851446  Capability: type 0x10 @ 0xb0

  963 15:45:44.854972  Capability: type 0x10 @ 0x40

  964 15:45:44.858224  Enabling Common Clock Configuration

  965 15:45:44.862705  L1 Sub-State supported from root port 28

  966 15:45:44.865426  L1 Sub-State Support = 0xf

  967 15:45:44.868472  CommonModeRestoreTime = 0x3c

  968 15:45:44.872517  Power On Value = 0x6, Power On Scale = 0x1

  969 15:45:44.874971  ASPM: Enabled L0s and L1

  970 15:45:44.877566  Capability: type 0x01 @ 0x80

  971 15:45:44.881372  Capability: type 0x05 @ 0x90

  972 15:45:44.883831  Capability: type 0x10 @ 0xb0

  973 15:45:44.889328  scan_bus: scanning of bus PCI: 00:1c.0 took 53632 usecs

  974 15:45:44.892427  PCI: 00:1d.0 scanning...

  975 15:45:44.895895  do_pci_scan_bridge for PCI: 00:1d.0

  976 15:45:44.898969  PCI: pci_scan_bus for bus 02

  977 15:45:44.902104  PCI: 02:00.0 [1217/8620] enabled

  978 15:45:44.905203  Capability: type 0x01 @ 0x6c

  979 15:45:44.908379  Capability: type 0x05 @ 0x48

  980 15:45:44.911332  Capability: type 0x10 @ 0x80

  981 15:45:44.913898  Capability: type 0x10 @ 0x40

  982 15:45:44.917721  L1 Sub-State supported from root port 29

  983 15:45:44.921239  L1 Sub-State Support = 0xf

  984 15:45:44.924155  CommonModeRestoreTime = 0x78

  985 15:45:44.928026  Power On Value = 0x16, Power On Scale = 0x0

  986 15:45:44.930093  ASPM: Enabled L1

  987 15:45:44.934588  Capability: type 0x01 @ 0x6c

  988 15:45:44.939689  Capability: type 0x05 @ 0x48

  989 15:45:44.943552  Capability: type 0x10 @ 0x80

  990 15:45:44.951000  scan_bus: scanning of bus PCI: 00:1d.0 took 56010 usecs

  991 15:45:44.953533  PCI: 00:1f.0 scanning...

  992 15:45:44.956460  scan_lpc_bus for PCI: 00:1f.0

  993 15:45:44.958797  PNP: 0c09.0 enabled

  994 15:45:44.962229  scan_lpc_bus for PCI: 00:1f.0 done

  995 15:45:44.967897  scan_bus: scanning of bus PCI: 00:1f.0 took 11390 usecs

  996 15:45:44.970380  PCI: 00:1f.3 scanning...

  997 15:45:44.976108  scan_bus: scanning of bus PCI: 00:1f.3 took 2839 usecs

  998 15:45:44.978215  PCI: 00:1f.4 scanning...

  999 15:45:44.982655  scan_generic_bus for PCI: 00:1f.4

 1000 15:45:44.986400  scan_generic_bus for PCI: 00:1f.4 done

 1001 15:45:44.992054  scan_bus: scanning of bus PCI: 00:1f.4 took 10127 usecs

 1002 15:45:44.994546  PCI: 00:1f.5 scanning...

 1003 15:45:44.998122  scan_generic_bus for PCI: 00:1f.5

 1004 15:45:45.001721  scan_generic_bus for PCI: 00:1f.5 done

 1005 15:45:45.008060  scan_bus: scanning of bus PCI: 00:1f.5 took 10128 usecs

 1006 15:45:45.013515  scan_bus: scanning of bus DOMAIN: 0000 took 706456 usecs

 1007 15:45:45.017275  root_dev_scan_bus for Root Device done

 1008 15:45:45.022169  scan_bus: scanning of bus Root Device took 726589 usecs

 1009 15:45:45.023018  done

 1010 15:45:45.029900  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)

 1011 15:45:45.035440  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1012 15:45:45.042780  SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000

 1013 15:45:45.049757  FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)

 1014 15:45:45.053673  SPI flash protection: WPSW=1 SRP0=1

 1015 15:45:45.060552  fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff

 1016 15:45:45.065742  MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.

 1017 15:45:45.072763  BS: BS_DEV_ENUMERATE times (us): entry 0 run 1148137 exit 42581

 1018 15:45:45.074755  found VGA at PCI: 00:02.0

 1019 15:45:45.078470  Setting up VGA for PCI: 00:02.0

 1020 15:45:45.082948  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1021 15:45:45.087785  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1022 15:45:45.090794  Allocating resources...

 1023 15:45:45.092694  Reading resources...

 1024 15:45:45.096697  Root Device read_resources bus 0 link: 0

 1025 15:45:45.101226  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1026 15:45:45.107213  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1027 15:45:45.111234  DOMAIN: 0000 read_resources bus 0 link: 0

 1028 15:45:45.118006  PCI: 00:14.0 read_resources bus 0 link: 0

 1029 15:45:45.121939  USB0 port 0 read_resources bus 0 link: 0

 1030 15:45:45.131275  USB0 port 0 read_resources bus 0 link: 0 done

 1031 15:45:45.136756  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1032 15:45:45.140965  PCI: 00:15.0 read_resources bus 1 link: 0

 1033 15:45:45.147135  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1034 15:45:45.151729  PCI: 00:15.1 read_resources bus 2 link: 0

 1035 15:45:45.156929  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1036 15:45:45.162021  PCI: 00:19.0 read_resources bus 3 link: 0

 1037 15:45:45.168125  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1038 15:45:45.172287  PCI: 00:1c.0 read_resources bus 1 link: 0

 1039 15:45:45.177533  PCI: 00:1c.0 read_resources bus 1 link: 0 done

 1040 15:45:45.183125  PCI: 00:1d.0 read_resources bus 2 link: 0

 1041 15:45:45.190011  PCI: 00:1d.0 read_resources bus 2 link: 0 done

 1042 15:45:45.194263  PCI: 00:1f.0 read_resources bus 0 link: 0

 1043 15:45:45.199344  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1044 15:45:45.205465  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1045 15:45:45.210676  Root Device read_resources bus 0 link: 0 done

 1046 15:45:45.213090  Done reading resources.

 1047 15:45:45.218860  Show resources in subtree (Root Device)...After reading.

 1048 15:45:45.222964   Root Device child on link 0 CPU_CLUSTER: 0

 1049 15:45:45.227306    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1050 15:45:45.229205     APIC: 00

 1051 15:45:45.230549     APIC: 03

 1052 15:45:45.231645     APIC: 01

 1053 15:45:45.232967     APIC: 02

 1054 15:45:45.233608     APIC: 06

 1055 15:45:45.235341     APIC: 07

 1056 15:45:45.236711     APIC: 04

 1057 15:45:45.237954     APIC: 05

 1058 15:45:45.241682    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1059 15:45:45.250717    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1060 15:45:45.260458    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1061 15:45:45.262223     PCI: 00:00.0

 1062 15:45:45.272355     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1063 15:45:45.281928     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1064 15:45:45.290777     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1065 15:45:45.300502     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1066 15:45:45.309799     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1067 15:45:45.318831     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1068 15:45:45.327801     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1069 15:45:45.336820     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7

 1070 15:45:45.346734     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8

 1071 15:45:45.355394     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a

 1072 15:45:45.365764     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b

 1073 15:45:45.375601     PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c

 1074 15:45:45.384085     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d

 1075 15:45:45.393808     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e

 1076 15:45:45.395738     PCI: 00:02.0

 1077 15:45:45.405639     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1078 15:45:45.415993     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1079 15:45:45.424658     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1080 15:45:45.426550     PCI: 00:04.0

 1081 15:45:45.436284     PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1082 15:45:45.437496     PCI: 00:08.0

 1083 15:45:45.448108     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1084 15:45:45.448535     PCI: 00:12.0

 1085 15:45:45.459172     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1086 15:45:45.462996     PCI: 00:14.0 child on link 0 USB0 port 0

 1087 15:45:45.473299     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1088 15:45:45.478362      USB0 port 0 child on link 0 USB2 port 0

 1089 15:45:45.479633       USB2 port 0

 1090 15:45:45.481452       USB2 port 1

 1091 15:45:45.482884       USB2 port 2

 1092 15:45:45.485096       USB2 port 4

 1093 15:45:45.486752       USB2 port 5

 1094 15:45:45.488483       USB2 port 6

 1095 15:45:45.490307       USB2 port 7

 1096 15:45:45.492242       USB2 port 8

 1097 15:45:45.493625       USB2 port 9

 1098 15:45:45.495268       USB3 port 0

 1099 15:45:45.497129       USB3 port 1

 1100 15:45:45.498832       USB3 port 2

 1101 15:45:45.500580       USB3 port 3

 1102 15:45:45.502371       USB3 port 4

 1103 15:45:45.504175     PCI: 00:14.2

 1104 15:45:45.514285     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1105 15:45:45.523887     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1106 15:45:45.525888     PCI: 00:14.3

 1107 15:45:45.535170     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1108 15:45:45.539152     PCI: 00:15.0 child on link 0 I2C: 01:10

 1109 15:45:45.549209     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1110 15:45:45.550760      I2C: 01:10

 1111 15:45:45.553051      I2C: 01:10

 1112 15:45:45.553772      I2C: 01:34

 1113 15:45:45.558609     PCI: 00:15.1 child on link 0 I2C: 02:2c

 1114 15:45:45.568480     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1115 15:45:45.570306      I2C: 02:2c

 1116 15:45:45.572066     PCI: 00:16.0

 1117 15:45:45.581908     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1118 15:45:45.583102     PCI: 00:17.0

 1119 15:45:45.592318     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1120 15:45:45.601640     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1121 15:45:45.609376     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1122 15:45:45.617183     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1123 15:45:45.626031     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1124 15:45:45.634830     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1125 15:45:45.638918     PCI: 00:19.0 child on link 0 I2C: 03:50

 1126 15:45:45.649697     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1127 15:45:45.659552     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1128 15:45:45.660193      I2C: 03:50

 1129 15:45:45.662549     PCI: 00:19.2

 1130 15:45:45.673943     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1131 15:45:45.683637     PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1132 15:45:45.687929     PCI: 00:1c.0 child on link 0 PCI: 01:00.0

 1133 15:45:45.696622     PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1134 15:45:45.706166     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1135 15:45:45.715260     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1136 15:45:45.717026      PCI: 01:00.0

 1137 15:45:45.726076      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14

 1138 15:45:45.731075     PCI: 00:1d.0 child on link 0 PCI: 02:00.0

 1139 15:45:45.739831     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1140 15:45:45.749167     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1141 15:45:45.758060     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1142 15:45:45.759982      PCI: 02:00.0

 1143 15:45:45.768929      PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1144 15:45:45.778359      PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14

 1145 15:45:45.782741     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1146 15:45:45.791979     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1147 15:45:45.800354     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1148 15:45:45.802140      PNP: 0c09.0

 1149 15:45:45.810736      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0

 1150 15:45:45.819173      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1

 1151 15:45:45.828141      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2

 1152 15:45:45.829412     PCI: 00:1f.3

 1153 15:45:45.839586     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1154 15:45:45.849564     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1155 15:45:45.851466     PCI: 00:1f.4

 1156 15:45:45.859725     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1157 15:45:45.869485     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1158 15:45:45.871925     PCI: 00:1f.5

 1159 15:45:45.881097     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1160 15:45:45.883058     PCI: 00:1f.6

 1161 15:45:45.891554     PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10

 1162 15:45:45.897681  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1163 15:45:45.904480  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1164 15:45:45.911280  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1165 15:45:45.917479  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1166 15:45:45.924182  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1167 15:45:45.927512  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1168 15:45:45.931009  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1169 15:45:45.935154  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1170 15:45:45.938813  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1171 15:45:45.945271  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1172 15:45:45.952115  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1173 15:45:45.960080  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1174 15:45:45.968570  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1175 15:45:45.974703  PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1176 15:45:45.979090  PCI: 01:00.0 14 *  [0x0 - 0xfff] mem

 1177 15:45:45.987484  PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1178 15:45:45.995323  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1179 15:45:46.003500  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1180 15:45:46.010282  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1181 15:45:46.014068  PCI: 02:00.0 10 *  [0x0 - 0xfff] mem

 1182 15:45:46.018327  PCI: 02:00.0 14 *  [0x1000 - 0x17ff] mem

 1183 15:45:46.026435  PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1184 15:45:46.030256  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1185 15:45:46.035032  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1186 15:45:46.040448  PCI: 00:1c.0 20 *  [0x11000000 - 0x110fffff] mem

 1187 15:45:46.045279  PCI: 00:1d.0 20 *  [0x11100000 - 0x111fffff] mem

 1188 15:45:46.049330  PCI: 00:1f.3 20 *  [0x11200000 - 0x112fffff] mem

 1189 15:45:46.054450  PCI: 00:1f.6 10 *  [0x11300000 - 0x1131ffff] mem

 1190 15:45:46.060287  PCI: 00:14.0 10 *  [0x11320000 - 0x1132ffff] mem

 1191 15:45:46.064487  PCI: 00:04.0 10 *  [0x11330000 - 0x11337fff] mem

 1192 15:45:46.069240  PCI: 00:14.3 10 *  [0x11338000 - 0x1133bfff] mem

 1193 15:45:46.074091  PCI: 00:1f.3 10 *  [0x1133c000 - 0x1133ffff] mem

 1194 15:45:46.079208  PCI: 00:14.2 10 *  [0x11340000 - 0x11341fff] mem

 1195 15:45:46.084420  PCI: 00:17.0 10 *  [0x11342000 - 0x11343fff] mem

 1196 15:45:46.088785  PCI: 00:08.0 10 *  [0x11344000 - 0x11344fff] mem

 1197 15:45:46.093564  PCI: 00:12.0 10 *  [0x11345000 - 0x11345fff] mem

 1198 15:45:46.098409  PCI: 00:14.2 18 *  [0x11346000 - 0x11346fff] mem

 1199 15:45:46.102825  PCI: 00:15.0 10 *  [0x11347000 - 0x11347fff] mem

 1200 15:45:46.108311  PCI: 00:15.1 10 *  [0x11348000 - 0x11348fff] mem

 1201 15:45:46.113334  PCI: 00:16.0 10 *  [0x11349000 - 0x11349fff] mem

 1202 15:45:46.117826  PCI: 00:19.0 10 *  [0x1134a000 - 0x1134afff] mem

 1203 15:45:46.122312  PCI: 00:19.0 18 *  [0x1134b000 - 0x1134bfff] mem

 1204 15:45:46.127113  PCI: 00:19.2 18 *  [0x1134c000 - 0x1134cfff] mem

 1205 15:45:46.132657  PCI: 00:1f.5 10 *  [0x1134d000 - 0x1134dfff] mem

 1206 15:45:46.136903  PCI: 00:17.0 24 *  [0x1134e000 - 0x1134e7ff] mem

 1207 15:45:46.142374  PCI: 00:17.0 14 *  [0x1134f000 - 0x1134f0ff] mem

 1208 15:45:46.146873  PCI: 00:1f.4 10 *  [0x11350000 - 0x113500ff] mem

 1209 15:45:46.155287  DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done

 1210 15:45:46.159523  avoid_fixed_resources: DOMAIN: 0000

 1211 15:45:46.165178  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1212 15:45:46.170581  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1213 15:45:46.178942  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1214 15:45:46.186240  constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)

 1215 15:45:46.193419  constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)

 1216 15:45:46.201474  constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)

 1217 15:45:46.209304  constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)

 1218 15:45:46.217104  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1219 15:45:46.224883  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1220 15:45:46.231851  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1221 15:45:46.239863  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1222 15:45:46.246628  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1223 15:45:46.248434  Setting resources...

 1224 15:45:46.255943  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1225 15:45:46.259450  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1226 15:45:46.263501  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1227 15:45:46.266805  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1228 15:45:46.271116  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1229 15:45:46.277411  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1230 15:45:46.283513  PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1231 15:45:46.289501  PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1232 15:45:46.296495  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1233 15:45:46.302898  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1234 15:45:46.310333  DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff

 1235 15:45:46.315581  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1236 15:45:46.320450  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1237 15:45:46.325294  PCI: 00:1c.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1238 15:45:46.329718  PCI: 00:1d.0 20 *  [0xd1100000 - 0xd11fffff] mem

 1239 15:45:46.335194  PCI: 00:1f.3 20 *  [0xd1200000 - 0xd12fffff] mem

 1240 15:45:46.339229  PCI: 00:1f.6 10 *  [0xd1300000 - 0xd131ffff] mem

 1241 15:45:46.344696  PCI: 00:14.0 10 *  [0xd1320000 - 0xd132ffff] mem

 1242 15:45:46.349429  PCI: 00:04.0 10 *  [0xd1330000 - 0xd1337fff] mem

 1243 15:45:46.353972  PCI: 00:14.3 10 *  [0xd1338000 - 0xd133bfff] mem

 1244 15:45:46.359606  PCI: 00:1f.3 10 *  [0xd133c000 - 0xd133ffff] mem

 1245 15:45:46.363956  PCI: 00:14.2 10 *  [0xd1340000 - 0xd1341fff] mem

 1246 15:45:46.368838  PCI: 00:17.0 10 *  [0xd1342000 - 0xd1343fff] mem

 1247 15:45:46.373384  PCI: 00:08.0 10 *  [0xd1344000 - 0xd1344fff] mem

 1248 15:45:46.378781  PCI: 00:12.0 10 *  [0xd1345000 - 0xd1345fff] mem

 1249 15:45:46.382895  PCI: 00:14.2 18 *  [0xd1346000 - 0xd1346fff] mem

 1250 15:45:46.387755  PCI: 00:15.0 10 *  [0xd1347000 - 0xd1347fff] mem

 1251 15:45:46.393411  PCI: 00:15.1 10 *  [0xd1348000 - 0xd1348fff] mem

 1252 15:45:46.398145  PCI: 00:16.0 10 *  [0xd1349000 - 0xd1349fff] mem

 1253 15:45:46.403001  PCI: 00:19.0 10 *  [0xd134a000 - 0xd134afff] mem

 1254 15:45:46.407585  PCI: 00:19.0 18 *  [0xd134b000 - 0xd134bfff] mem

 1255 15:45:46.412412  PCI: 00:19.2 18 *  [0xd134c000 - 0xd134cfff] mem

 1256 15:45:46.417024  PCI: 00:1f.5 10 *  [0xd134d000 - 0xd134dfff] mem

 1257 15:45:46.422262  PCI: 00:17.0 24 *  [0xd134e000 - 0xd134e7ff] mem

 1258 15:45:46.427097  PCI: 00:17.0 14 *  [0xd134f000 - 0xd134f0ff] mem

 1259 15:45:46.432070  PCI: 00:1f.4 10 *  [0xd1350000 - 0xd13500ff] mem

 1260 15:45:46.439346  DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done

 1261 15:45:46.446802  PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1262 15:45:46.454534  PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1263 15:45:46.461435  PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1264 15:45:46.466269  PCI: 01:00.0 14 *  [0xd1000000 - 0xd1000fff] mem

 1265 15:45:46.473892  PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done

 1266 15:45:46.481562  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1267 15:45:46.488297  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1268 15:45:46.496042  PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff

 1269 15:45:46.500635  PCI: 02:00.0 10 *  [0xd1100000 - 0xd1100fff] mem

 1270 15:45:46.505261  PCI: 02:00.0 14 *  [0xd1101000 - 0xd11017ff] mem

 1271 15:45:46.513069  PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done

 1272 15:45:46.517413  Root Device assign_resources, bus 0 link: 0

 1273 15:45:46.521875  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1274 15:45:46.530536  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1275 15:45:46.538853  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1276 15:45:46.547199  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1277 15:45:46.554783  PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64

 1278 15:45:46.563563  PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64

 1279 15:45:46.571768  PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64

 1280 15:45:46.580218  PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64

 1281 15:45:46.584413  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1282 15:45:46.589030  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1283 15:45:46.597660  PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64

 1284 15:45:46.605514  PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64

 1285 15:45:46.614167  PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64

 1286 15:45:46.622366  PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64

 1287 15:45:46.626758  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1288 15:45:46.631226  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1289 15:45:46.639937  PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64

 1290 15:45:46.644098  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1291 15:45:46.649136  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1292 15:45:46.656822  PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64

 1293 15:45:46.665124  PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem

 1294 15:45:46.673221  PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem

 1295 15:45:46.680687  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1296 15:45:46.688330  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1297 15:45:46.696418  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1298 15:45:46.703329  PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem

 1299 15:45:46.711639  PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64

 1300 15:45:46.719450  PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64

 1301 15:45:46.724636  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1302 15:45:46.729701  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1303 15:45:46.737847  PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64

 1304 15:45:46.746619  PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1305 15:45:46.755099  PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1306 15:45:46.763581  PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1307 15:45:46.767904  PCI: 00:1c.0 assign_resources, bus 1 link: 0

 1308 15:45:46.776064  PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem

 1309 15:45:46.780852  PCI: 00:1c.0 assign_resources, bus 1 link: 0

 1310 15:45:46.789637  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io

 1311 15:45:46.798189  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem

 1312 15:45:46.806692  PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem

 1313 15:45:46.811676  PCI: 00:1d.0 assign_resources, bus 2 link: 0

 1314 15:45:46.821050  PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem

 1315 15:45:46.830348  PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem

 1316 15:45:46.836483  PCI: 00:1d.0 assign_resources, bus 2 link: 0

 1317 15:45:46.842219  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1318 15:45:46.847286  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1319 15:45:46.851721  LPC: Trying to open IO window from 930 size 8

 1320 15:45:46.856127  LPC: Trying to open IO window from 940 size 8

 1321 15:45:46.860496  LPC: Trying to open IO window from 950 size 10

 1322 15:45:46.869402  PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64

 1323 15:45:46.876873  PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64

 1324 15:45:46.885627  PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64

 1325 15:45:46.892854  PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem

 1326 15:45:46.900843  PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem

 1327 15:45:46.906439  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1328 15:45:46.910803  Root Device assign_resources, bus 0 link: 0

 1329 15:45:46.913248  Done setting resources.

 1330 15:45:46.920148  Show resources in subtree (Root Device)...After assigning values.

 1331 15:45:46.924439   Root Device child on link 0 CPU_CLUSTER: 0

 1332 15:45:46.928469    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1333 15:45:46.929196     APIC: 00

 1334 15:45:46.930376     APIC: 03

 1335 15:45:46.932140     APIC: 01

 1336 15:45:46.933392     APIC: 02

 1337 15:45:46.934722     APIC: 06

 1338 15:45:46.935887     APIC: 07

 1339 15:45:46.937043     APIC: 04

 1340 15:45:46.938791     APIC: 05

 1341 15:45:46.942982    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1342 15:45:46.952701    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1343 15:45:46.963162    DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1344 15:45:46.965338     PCI: 00:00.0

 1345 15:45:46.975267     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1346 15:45:46.984754     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1347 15:45:46.993513     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1348 15:45:47.003252     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1349 15:45:47.012701     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1350 15:45:47.021563     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1351 15:45:47.030499     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1352 15:45:47.039337     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7

 1353 15:45:47.049146     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8

 1354 15:45:47.058239     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a

 1355 15:45:47.067835     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b

 1356 15:45:47.078066     PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c

 1357 15:45:47.087936     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d

 1358 15:45:47.096690     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e

 1359 15:45:47.098008     PCI: 00:02.0

 1360 15:45:47.108406     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1361 15:45:47.119556     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1362 15:45:47.128962     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1363 15:45:47.130156     PCI: 00:04.0

 1364 15:45:47.140672     PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10

 1365 15:45:47.142462     PCI: 00:08.0

 1366 15:45:47.152284     PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10

 1367 15:45:47.154628     PCI: 00:12.0

 1368 15:45:47.164699     PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10

 1369 15:45:47.169033     PCI: 00:14.0 child on link 0 USB0 port 0

 1370 15:45:47.179516     PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10

 1371 15:45:47.183990      USB0 port 0 child on link 0 USB2 port 0

 1372 15:45:47.185724       USB2 port 0

 1373 15:45:47.187078       USB2 port 1

 1374 15:45:47.189050       USB2 port 2

 1375 15:45:47.190894       USB2 port 4

 1376 15:45:47.192167       USB2 port 5

 1377 15:45:47.194066       USB2 port 6

 1378 15:45:47.195812       USB2 port 7

 1379 15:45:47.197195       USB2 port 8

 1380 15:45:47.199102       USB2 port 9

 1381 15:45:47.200493       USB3 port 0

 1382 15:45:47.202731       USB3 port 1

 1383 15:45:47.204571       USB3 port 2

 1384 15:45:47.206365       USB3 port 3

 1385 15:45:47.208240       USB3 port 4

 1386 15:45:47.210168     PCI: 00:14.2

 1387 15:45:47.219595     PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10

 1388 15:45:47.230741     PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18

 1389 15:45:47.232005     PCI: 00:14.3

 1390 15:45:47.242701     PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10

 1391 15:45:47.246826     PCI: 00:15.0 child on link 0 I2C: 01:10

 1392 15:45:47.256993     PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10

 1393 15:45:47.258338      I2C: 01:10

 1394 15:45:47.259685      I2C: 01:10

 1395 15:45:47.261499      I2C: 01:34

 1396 15:45:47.266227     PCI: 00:15.1 child on link 0 I2C: 02:2c

 1397 15:45:47.276189     PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10

 1398 15:45:47.277662      I2C: 02:2c

 1399 15:45:47.279247     PCI: 00:16.0

 1400 15:45:47.289767     PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10

 1401 15:45:47.291255     PCI: 00:17.0

 1402 15:45:47.301745     PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10

 1403 15:45:47.312004     PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14

 1404 15:45:47.320411     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1405 15:45:47.329843     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1406 15:45:47.339238     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1407 15:45:47.349182     PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24

 1408 15:45:47.353241     PCI: 00:19.0 child on link 0 I2C: 03:50

 1409 15:45:47.363518     PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10

 1410 15:45:47.374044     PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18

 1411 15:45:47.375737      I2C: 03:50

 1412 15:45:47.376610     PCI: 00:19.2

 1413 15:45:47.388588     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1414 15:45:47.398267     PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18

 1415 15:45:47.402518     PCI: 00:1c.0 child on link 0 PCI: 01:00.0

 1416 15:45:47.411839     PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1417 15:45:47.422550     PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1418 15:45:47.433054     PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1419 15:45:47.435066      PCI: 01:00.0

 1420 15:45:47.444334      PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14

 1421 15:45:47.449774     PCI: 00:1d.0 child on link 0 PCI: 02:00.0

 1422 15:45:47.458252     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1423 15:45:47.469012     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1424 15:45:47.479007     PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20

 1425 15:45:47.480824      PCI: 02:00.0

 1426 15:45:47.491099      PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10

 1427 15:45:47.501807      PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14

 1428 15:45:47.506067     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1429 15:45:47.514666     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1430 15:45:47.523623     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1431 15:45:47.525179      PNP: 0c09.0

 1432 15:45:47.533161      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0

 1433 15:45:47.542105      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1

 1434 15:45:47.550814      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2

 1435 15:45:47.552171     PCI: 00:1f.3

 1436 15:45:47.562988     PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10

 1437 15:45:47.573672     PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20

 1438 15:45:47.574459     PCI: 00:1f.4

 1439 15:45:47.583870     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1440 15:45:47.594549     PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10

 1441 15:45:47.595268     PCI: 00:1f.5

 1442 15:45:47.605721     PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10

 1443 15:45:47.608128     PCI: 00:1f.6

 1444 15:45:47.618569     PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10

 1445 15:45:47.621188  Done allocating resources.

 1446 15:45:47.627649  BS: BS_DEV_RESOURCES times (us): entry 0 run 2548469 exit 22

 1447 15:45:47.629833  Enabling resources...

 1448 15:45:47.633994  PCI: 00:00.0 subsystem <- 1028/3e34

 1449 15:45:47.637138  PCI: 00:00.0 cmd <- 06

 1450 15:45:47.640113  PCI: 00:02.0 subsystem <- 1028/3ea0

 1451 15:45:47.642629  PCI: 00:02.0 cmd <- 03

 1452 15:45:47.647084  PCI: 00:04.0 subsystem <- 1028/1903

 1453 15:45:47.649228  PCI: 00:04.0 cmd <- 02

 1454 15:45:47.651362  PCI: 00:08.0 cmd <- 06

 1455 15:45:47.655228  PCI: 00:12.0 subsystem <- 1028/9df9

 1456 15:45:47.657781  PCI: 00:12.0 cmd <- 02

 1457 15:45:47.662160  PCI: 00:14.0 subsystem <- 1028/9ded

 1458 15:45:47.664834  PCI: 00:14.0 cmd <- 02

 1459 15:45:47.666798  PCI: 00:14.2 cmd <- 02

 1460 15:45:47.670999  PCI: 00:14.3 subsystem <- 1028/9df0

 1461 15:45:47.672908  PCI: 00:14.3 cmd <- 02

 1462 15:45:47.677406  PCI: 00:15.0 subsystem <- 1028/9de8

 1463 15:45:47.679199  PCI: 00:15.0 cmd <- 02

 1464 15:45:47.683734  PCI: 00:15.1 subsystem <- 1028/9de9

 1465 15:45:47.685599  PCI: 00:15.1 cmd <- 02

 1466 15:45:47.689541  PCI: 00:16.0 subsystem <- 1028/9de0

 1467 15:45:47.691433  PCI: 00:16.0 cmd <- 02

 1468 15:45:47.695263  PCI: 00:17.0 subsystem <- 1028/9dd3

 1469 15:45:47.697827  PCI: 00:17.0 cmd <- 03

 1470 15:45:47.702055  PCI: 00:19.0 subsystem <- 1028/9dc5

 1471 15:45:47.704661  PCI: 00:19.0 cmd <- 06

 1472 15:45:47.708596  PCI: 00:19.2 subsystem <- 1028/9dc7

 1473 15:45:47.711078  PCI: 00:19.2 cmd <- 06

 1474 15:45:47.714185  PCI: 00:1c.0 bridge ctrl <- 0003

 1475 15:45:47.718051  PCI: 00:1c.0 subsystem <- 1028/9dbf

 1476 15:45:47.720840  Capability: type 0x10 @ 0x40

 1477 15:45:47.723753  Capability: type 0x05 @ 0x80

 1478 15:45:47.726269  Capability: type 0x0d @ 0x90

 1479 15:45:47.729186  PCI: 00:1c.0 cmd <- 06

 1480 15:45:47.732424  PCI: 00:1d.0 bridge ctrl <- 0003

 1481 15:45:47.736068  PCI: 00:1d.0 subsystem <- 1028/9db4

 1482 15:45:47.739200  Capability: type 0x10 @ 0x40

 1483 15:45:47.742011  Capability: type 0x05 @ 0x80

 1484 15:45:47.745188  Capability: type 0x0d @ 0x90

 1485 15:45:47.747738  PCI: 00:1d.0 cmd <- 06

 1486 15:45:47.750594  PCI: 00:1f.0 subsystem <- 1028/9d84

 1487 15:45:47.753083  PCI: 00:1f.0 cmd <- 407

 1488 15:45:47.757545  PCI: 00:1f.3 subsystem <- 1028/9dc8

 1489 15:45:47.759477  PCI: 00:1f.3 cmd <- 02

 1490 15:45:47.763549  PCI: 00:1f.4 subsystem <- 1028/9da3

 1491 15:45:47.766423  PCI: 00:1f.4 cmd <- 03

 1492 15:45:47.769972  PCI: 00:1f.5 subsystem <- 1028/9da4

 1493 15:45:47.772375  PCI: 00:1f.5 cmd <- 406

 1494 15:45:47.776135  PCI: 00:1f.6 subsystem <- 1028/15be

 1495 15:45:47.778212  PCI: 00:1f.6 cmd <- 02

 1496 15:45:47.789533  PCI: 01:00.0 cmd <- 02

 1497 15:45:47.794025  PCI: 02:00.0 cmd <- 06

 1498 15:45:47.797791  done.

 1499 15:45:47.803995  BS: BS_DEV_ENABLE times (us): entry 449 run 170462 exit 0

 1500 15:45:47.806361  Initializing devices...

 1501 15:45:47.807747  Root Device init ...

 1502 15:45:47.812004  Root Device init finished in 2139 usecs

 1503 15:45:47.815155  CPU_CLUSTER: 0 init ...

 1504 15:45:47.818990  CPU_CLUSTER: 0 init finished in 2430 usecs

 1505 15:45:47.825263  PCI: 00:00.0 init ...

 1506 15:45:47.828874  CPU TDP: 15 Watts

 1507 15:45:47.830665  CPU PL2 = 51 Watts

 1508 15:45:47.834178  PCI: 00:00.0 init finished in 7037 usecs

 1509 15:45:47.837029  PCI: 00:02.0 init ...

 1510 15:45:47.841252  PCI: 00:02.0 init finished in 2236 usecs

 1511 15:45:47.843412  PCI: 00:04.0 init ...

 1512 15:45:47.848101  PCI: 00:04.0 init finished in 2235 usecs

 1513 15:45:47.850419  PCI: 00:08.0 init ...

 1514 15:45:47.855090  PCI: 00:08.0 init finished in 2236 usecs

 1515 15:45:47.857595  PCI: 00:12.0 init ...

 1516 15:45:47.861443  PCI: 00:12.0 init finished in 2235 usecs

 1517 15:45:47.864092  PCI: 00:14.0 init ...

 1518 15:45:47.867884  PCI: 00:14.0 init finished in 2236 usecs

 1519 15:45:47.870751  PCI: 00:14.2 init ...

 1520 15:45:47.875043  PCI: 00:14.2 init finished in 2236 usecs

 1521 15:45:47.877197  PCI: 00:14.3 init ...

 1522 15:45:47.881288  PCI: 00:14.3 init finished in 2240 usecs

 1523 15:45:47.884657  PCI: 00:15.0 init ...

 1524 15:45:47.887735  DW I2C bus 0 at 0xd1347000 (400 KHz)

 1525 15:45:47.891535  PCI: 00:15.0 init finished in 5935 usecs

 1526 15:45:47.894396  PCI: 00:15.1 init ...

 1527 15:45:47.898398  DW I2C bus 1 at 0xd1348000 (400 KHz)

 1528 15:45:47.902919  PCI: 00:15.1 init finished in 5933 usecs

 1529 15:45:47.905498  PCI: 00:16.0 init ...

 1530 15:45:47.909227  PCI: 00:16.0 init finished in 2235 usecs

 1531 15:45:47.911746  PCI: 00:19.0 init ...

 1532 15:45:47.916132  DW I2C bus 4 at 0xd134a000 (400 KHz)

 1533 15:45:47.919403  PCI: 00:19.0 init finished in 5934 usecs

 1534 15:45:47.923206  PCI: 00:1c.0 init ...

 1535 15:45:47.926142  Initializing PCH PCIe bridge.

 1536 15:45:47.929697  PCI: 00:1c.0 init finished in 5249 usecs

 1537 15:45:47.933168  PCI: 00:1d.0 init ...

 1538 15:45:47.935784  Initializing PCH PCIe bridge.

 1539 15:45:47.940175  PCI: 00:1d.0 init finished in 5239 usecs

 1540 15:45:47.942285  PCI: 00:1f.0 init ...

 1541 15:45:47.947133  IOAPIC: Initializing IOAPIC at 0xfec00000

 1542 15:45:47.951473  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1543 15:45:47.953329  IOAPIC: ID = 0x02

 1544 15:45:47.955304  IOAPIC: Dumping registers

 1545 15:45:47.958755    reg 0x0000: 0x02000000

 1546 15:45:47.960978    reg 0x0001: 0x00770020

 1547 15:45:47.962847    reg 0x0002: 0x00000000

 1548 15:45:47.969070  PCI: 00:1f.0 init finished in 25015 usecs

 1549 15:45:47.971584  PCI: 00:1f.3 init ...

 1550 15:45:47.977156  HDA: codec_mask = 05

 1551 15:45:47.980545  HDA: Initializing codec #2

 1552 15:45:47.982953  HDA: codec viddid: 8086280b

 1553 15:45:47.986206  HDA: No verb table entry found

 1554 15:45:47.988577  HDA: Initializing codec #0

 1555 15:45:47.991802  HDA: codec viddid: 10ec0236

 1556 15:45:47.997886  HDA: verb loaded.

 1557 15:45:48.002643  PCI: 00:1f.3 init finished in 28825 usecs

 1558 15:45:48.005534  PCI: 00:1f.4 init ...

 1559 15:45:48.009333  PCI: 00:1f.4 init finished in 2245 usecs

 1560 15:45:48.013142  PCI: 00:1f.6 init ...

 1561 15:45:48.016905  PCI: 00:1f.6 init finished in 2236 usecs

 1562 15:45:48.027424  PCI: 01:00.0 init ...

 1563 15:45:48.031197  PCI: 01:00.0 init finished in 2236 usecs

 1564 15:45:48.033931  PCI: 02:00.0 init ...

 1565 15:45:48.038714  PCI: 02:00.0 init finished in 2227 usecs

 1566 15:45:48.041240  PNP: 0c09.0 init ...

 1567 15:45:48.044970  EC Label      : 00.00.20

 1568 15:45:48.048768  EC Revision   : 9ca674bba

 1569 15:45:48.051789  EC Model Num  : 08B9

 1570 15:45:48.055957  EC Build Date : 05/10/19

 1571 15:45:48.064511  PNP: 0c09.0 init finished in 21763 usecs

 1572 15:45:48.066991  Devices initialized

 1573 15:45:48.069404  Show all devs... After init.

 1574 15:45:48.071912  Root Device: enabled 1

 1575 15:45:48.074230  CPU_CLUSTER: 0: enabled 1

 1576 15:45:48.076969  DOMAIN: 0000: enabled 1

 1577 15:45:48.079448  APIC: 00: enabled 1

 1578 15:45:48.081754  PCI: 00:00.0: enabled 1

 1579 15:45:48.084638  PCI: 00:02.0: enabled 1

 1580 15:45:48.086973  PCI: 00:04.0: enabled 1

 1581 15:45:48.089305  PCI: 00:12.0: enabled 1

 1582 15:45:48.091872  PCI: 00:12.5: enabled 0

 1583 15:45:48.094409  PCI: 00:12.6: enabled 0

 1584 15:45:48.096293  PCI: 00:13.0: enabled 0

 1585 15:45:48.098762  PCI: 00:14.0: enabled 1

 1586 15:45:48.101165  PCI: 00:14.1: enabled 0

 1587 15:45:48.103564  PCI: 00:14.3: enabled 1

 1588 15:45:48.106547  PCI: 00:14.5: enabled 0

 1589 15:45:48.108479  PCI: 00:15.0: enabled 1

 1590 15:45:48.110431  PCI: 00:15.1: enabled 1

 1591 15:45:48.113447  PCI: 00:15.2: enabled 0

 1592 15:45:48.115958  PCI: 00:15.3: enabled 0

 1593 15:45:48.118347  PCI: 00:16.0: enabled 1

 1594 15:45:48.120340  PCI: 00:16.1: enabled 0

 1595 15:45:48.122969  PCI: 00:16.2: enabled 0

 1596 15:45:48.125133  PCI: 00:16.3: enabled 0

 1597 15:45:48.127479  PCI: 00:16.4: enabled 0

 1598 15:45:48.130016  PCI: 00:16.5: enabled 0

 1599 15:45:48.132922  PCI: 00:17.0: enabled 1

 1600 15:45:48.135411  PCI: 00:19.0: enabled 1

 1601 15:45:48.137257  PCI: 00:19.1: enabled 0

 1602 15:45:48.140560  PCI: 00:19.2: enabled 1

 1603 15:45:48.142544  PCI: 00:1a.0: enabled 0

 1604 15:45:48.145100  PCI: 00:1c.0: enabled 1

 1605 15:45:48.147225  PCI: 00:1c.1: enabled 0

 1606 15:45:48.150223  PCI: 00:1c.2: enabled 0

 1607 15:45:48.151768  PCI: 00:1c.3: enabled 0

 1608 15:45:48.155215  PCI: 00:1c.4: enabled 0

 1609 15:45:48.156641  PCI: 00:1c.5: enabled 0

 1610 15:45:48.159988  PCI: 00:1c.6: enabled 0

 1611 15:45:48.161697  PCI: 00:1c.7: enabled 0

 1612 15:45:48.164478  PCI: 00:1d.0: enabled 1

 1613 15:45:48.166570  PCI: 00:1d.1: enabled 0

 1614 15:45:48.169610  PCI: 00:1d.2: enabled 0

 1615 15:45:48.171824  PCI: 00:1d.3: enabled 0

 1616 15:45:48.173599  PCI: 00:1d.4: enabled 0

 1617 15:45:48.176243  PCI: 00:1e.0: enabled 0

 1618 15:45:48.179242  PCI: 00:1e.1: enabled 0

 1619 15:45:48.180944  PCI: 00:1e.2: enabled 0

 1620 15:45:48.183358  PCI: 00:1e.3: enabled 0

 1621 15:45:48.185832  PCI: 00:1f.0: enabled 1

 1622 15:45:48.188558  PCI: 00:1f.1: enabled 0

 1623 15:45:48.191234  PCI: 00:1f.2: enabled 0

 1624 15:45:48.193442  PCI: 00:1f.3: enabled 1

 1625 15:45:48.195625  PCI: 00:1f.4: enabled 1

 1626 15:45:48.198256  PCI: 00:1f.5: enabled 1

 1627 15:45:48.201182  PCI: 00:1f.6: enabled 1

 1628 15:45:48.203559  USB0 port 0: enabled 1

 1629 15:45:48.206040  I2C: 01:10: enabled 1

 1630 15:45:48.207832  I2C: 01:10: enabled 1

 1631 15:45:48.209718  I2C: 01:34: enabled 1

 1632 15:45:48.212545  I2C: 02:2c: enabled 1

 1633 15:45:48.214281  I2C: 03:50: enabled 1

 1634 15:45:48.216863  PNP: 0c09.0: enabled 1

 1635 15:45:48.219277  USB2 port 0: enabled 1

 1636 15:45:48.221780  USB2 port 1: enabled 1

 1637 15:45:48.224329  USB2 port 2: enabled 1

 1638 15:45:48.226199  USB2 port 4: enabled 1

 1639 15:45:48.228757  USB2 port 5: enabled 1

 1640 15:45:48.230728  USB2 port 6: enabled 1

 1641 15:45:48.232922  USB2 port 7: enabled 1

 1642 15:45:48.235145  USB2 port 8: enabled 1

 1643 15:45:48.237851  USB2 port 9: enabled 1

 1644 15:45:48.240114  USB3 port 0: enabled 1

 1645 15:45:48.241890  USB3 port 1: enabled 1

 1646 15:45:48.245019  USB3 port 2: enabled 1

 1647 15:45:48.247415  USB3 port 3: enabled 1

 1648 15:45:48.249903  USB3 port 4: enabled 1

 1649 15:45:48.251140  APIC: 03: enabled 1

 1650 15:45:48.253689  APIC: 01: enabled 1

 1651 15:45:48.254994  APIC: 02: enabled 1

 1652 15:45:48.257459  APIC: 06: enabled 1

 1653 15:45:48.259924  APIC: 07: enabled 1

 1654 15:45:48.261765  APIC: 04: enabled 1

 1655 15:45:48.263778  APIC: 05: enabled 1

 1656 15:45:48.265763  PCI: 00:08.0: enabled 1

 1657 15:45:48.268257  PCI: 00:14.2: enabled 1

 1658 15:45:48.270805  PCI: 01:00.0: enabled 1

 1659 15:45:48.273293  PCI: 02:00.0: enabled 1

 1660 15:45:48.278046  Disabling ACPI via APMC:

 1661 15:45:48.280737  done.

 1662 15:45:48.285611  FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)

 1663 15:45:48.289458  ELOG: NV offset 0x1bf0000 size 0x4000

 1664 15:45:48.297270  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1665 15:45:48.303962  ELOG: Event(17) added with size 13 at 2023-08-07 15:45:47 UTC

 1666 15:45:48.308449  POST: Unexpected post code in previous boot: 0x70

 1667 15:45:48.315008  ELOG: Event(A3) added with size 11 at 2023-08-07 15:45:47 UTC

 1668 15:45:48.320691  ELOG: Event(A6) added with size 13 at 2023-08-07 15:45:47 UTC

 1669 15:45:48.327412  ELOG: Event(92) added with size 9 at 2023-08-07 15:45:47 UTC

 1670 15:45:48.333179  ELOG: Event(93) added with size 9 at 2023-08-07 15:45:47 UTC

 1671 15:45:48.340162  ELOG: Event(9A) added with size 9 at 2023-08-07 15:45:47 UTC

 1672 15:45:48.345721  ELOG: Event(9E) added with size 10 at 2023-08-07 15:45:47 UTC

 1673 15:45:48.352806  ELOG: Event(9F) added with size 14 at 2023-08-07 15:45:47 UTC

 1674 15:45:48.359034  BS: BS_DEV_INIT times (us): entry 0 run 469770 exit 78800

 1675 15:45:48.365248  ELOG: Event(A1) added with size 10 at 2023-08-07 15:45:47 UTC

 1676 15:45:48.372804  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1677 15:45:48.378325  ELOG: Event(A0) added with size 9 at 2023-08-07 15:45:47 UTC

 1678 15:45:48.382490  elog_add_boot_reason: Logged dev mode boot

 1679 15:45:48.384751  Finalize devices...

 1680 15:45:48.387129  PCI: 00:17.0 final

 1681 15:45:48.389000  Devices finalized

 1682 15:45:48.394691  FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)

 1683 15:45:48.400852  BS: BS_POST_DEVICE times (us): entry 24765 run 5934 exit 5357

 1684 15:45:48.405668  BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0

 1685 15:45:48.414563  disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C

 1686 15:45:48.418522  disable_unused_touchscreen: Disable ACPI0C50

 1687 15:45:48.423696  disable_unused_touchscreen: Enable ELAN900C

 1688 15:45:48.426378  CBFS @ 1d00000 size 300000

 1689 15:45:48.432554  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1690 15:45:48.436417  CBFS: Locating 'fallback/dsdt.aml'

 1691 15:45:48.440082  CBFS: Found @ offset 10b200 size 4448

 1692 15:45:48.443119  CBFS @ 1d00000 size 300000

 1693 15:45:48.449441  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1694 15:45:48.452569  CBFS: Locating 'fallback/slic'

 1695 15:45:48.457984  CBFS: 'fallback/slic' not found.

 1696 15:45:48.461089  ACPI: Writing ACPI tables at 89c0f000.

 1697 15:45:48.462591  ACPI:    * FACS

 1698 15:45:48.465128  ACPI:    * DSDT

 1699 15:45:48.468174  Ramoops buffer: 0x100000@0x89b0e000.

 1700 15:45:48.472763  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)

 1701 15:45:48.477571  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

 1702 15:45:48.481761  ACPI:    * FADT

 1703 15:45:48.482594  SCI is IRQ9

 1704 15:45:48.486623  ACPI: added table 1/32, length now 40

 1705 15:45:48.488502  ACPI:     * SSDT

 1706 15:45:48.491864  Found 1 CPU(s) with 8 core(s) each.

 1707 15:45:48.496162  Error: Could not locate 'wifi_sar' in VPD.

 1708 15:45:48.500477  Error: failed from getting SAR limits!

 1709 15:45:48.504064  \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3

 1710 15:45:48.508592  dw_i2c: bad counts. hcnt = -14 lcnt = 30

 1711 15:45:48.512375  dw_i2c: bad counts. hcnt = -20 lcnt = 40

 1712 15:45:48.516757  dw_i2c: bad counts. hcnt = -18 lcnt = 48

 1713 15:45:48.521786  \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10

 1714 15:45:48.526460  \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34

 1715 15:45:48.531651  \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c

 1716 15:45:48.536048  \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50

 1717 15:45:48.541964  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1718 15:45:48.548135  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1

 1719 15:45:48.553233  \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2

 1720 15:45:48.559669  \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4

 1721 15:45:48.564720  \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5

 1722 15:45:48.568493  \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6

 1723 15:45:48.573402  \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7

 1724 15:45:48.578822  \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8

 1725 15:45:48.583632  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1726 15:45:48.588939  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1727 15:45:48.595523  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1

 1728 15:45:48.601390  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1729 15:45:48.607094  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3

 1730 15:45:48.611997  \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4

 1731 15:45:48.615809  ACPI: added table 2/32, length now 44

 1732 15:45:48.617636  ACPI:    * MCFG

 1733 15:45:48.621446  ACPI: added table 3/32, length now 48

 1734 15:45:48.622600  ACPI:    * TPM2

 1735 15:45:48.625758  TPM2 log created at 89afe000

 1736 15:45:48.629669  ACPI: added table 4/32, length now 52

 1737 15:45:48.631533  ACPI:    * MADT

 1738 15:45:48.632145  SCI is IRQ9

 1739 15:45:48.636489  ACPI: added table 5/32, length now 56

 1740 15:45:48.638194  current = 89c14bd0

 1741 15:45:48.640731  ACPI:    * IGD OpRegion

 1742 15:45:48.642654  GMA: Found VBT in CBFS

 1743 15:45:48.645764  GMA: Found valid VBT in CBFS

 1744 15:45:48.649743  ACPI: added table 6/32, length now 60

 1745 15:45:48.650938  ACPI:    * HPET

 1746 15:45:48.655057  ACPI: added table 7/32, length now 64

 1747 15:45:48.655675  ACPI: done.

 1748 15:45:48.658540  ACPI tables: 31872 bytes.

 1749 15:45:48.662230  smbios_write_tables: 89afd000

 1750 15:45:48.663661  recv_ec_data: 0x01

 1751 15:45:48.666676  Create SMBIOS type 17

 1752 15:45:48.669164  PCI: 00:14.3 (Intel WiFi)

 1753 15:45:48.671787  SMBIOS tables: 708 bytes.

 1754 15:45:48.676113  Writing table forward entry at 0x00000500

 1755 15:45:48.682380  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b

 1756 15:45:48.685436  Writing coreboot table at 0x89c33000

 1757 15:45:48.691280   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1758 15:45:48.695167   1. 0000000000001000-000000000009ffff: RAM

 1759 15:45:48.699817   2. 00000000000a0000-00000000000fffff: RESERVED

 1760 15:45:48.704174   3. 0000000000100000-0000000089afcfff: RAM

 1761 15:45:48.710368   4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES

 1762 15:45:48.714964   5. 0000000089c81000-0000000089cdbfff: RAMSTAGE

 1763 15:45:48.721748   6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES

 1764 15:45:48.725645   7. 000000008a000000-000000008f7fffff: RESERVED

 1765 15:45:48.731251   8. 00000000e0000000-00000000efffffff: RESERVED

 1766 15:45:48.735752   9. 00000000fc000000-00000000fc000fff: RESERVED

 1767 15:45:48.740004  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1768 15:45:48.745242  11. 00000000fed10000-00000000fed17fff: RESERVED

 1769 15:45:48.750217  12. 00000000fed80000-00000000fed83fff: RESERVED

 1770 15:45:48.754822  13. 00000000feda0000-00000000feda1fff: RESERVED

 1771 15:45:48.759194  14. 0000000100000000-000000026e7fffff: RAM

 1772 15:45:48.763338  Graphics framebuffer located at 0xc0000000

 1773 15:45:48.766226  Passing 6 GPIOs to payload:

 1774 15:45:48.771532              NAME |       PORT | POLARITY |     VALUE

 1775 15:45:48.776014     write protect | 0x000000dc |     high |      high

 1776 15:45:48.782117          recovery | 0x000000d5 |      low |      high

 1777 15:45:48.787193               lid |  undefined |     high |      high

 1778 15:45:48.792458             power |  undefined |     high |       low

 1779 15:45:48.798068             oprom |  undefined |     high |       low

 1780 15:45:48.802268          EC in RW |  undefined |     high |       low

 1781 15:45:48.805628  recv_ec_data: 0x01

 1782 15:45:48.806197  SKU ID: 3

 1783 15:45:48.809418  CBFS @ 1d00000 size 300000

 1784 15:45:48.815647  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1785 15:45:48.821149  Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum a38e

 1786 15:45:48.823994  coreboot table: 1484 bytes.

 1787 15:45:48.827532  IMD ROOT    0. 89fff000 00001000

 1788 15:45:48.830835  IMD SMALL   1. 89ffe000 00001000

 1789 15:45:48.833694  FSP MEMORY  2. 89d0e000 002f0000

 1790 15:45:48.836983  CONSOLE     3. 89cee000 00020000

 1791 15:45:48.840173  TIME STAMP  4. 89ced000 00000910

 1792 15:45:48.844014  VBOOT WORK  5. 89cea000 00003000

 1793 15:45:48.847189  VBOOT       6. 89ce9000 00000c0c

 1794 15:45:48.850267  MRC DATA    7. 89ce7000 000018f0

 1795 15:45:48.853949  ROMSTG STCK 8. 89ce6000 00000400

 1796 15:45:48.857096  AFTER CAR   9. 89cdc000 0000a000

 1797 15:45:48.861016  RAMSTAGE   10. 89c80000 0005c000

 1798 15:45:48.864157  REFCODE    11. 89c4b000 00035000

 1799 15:45:48.867283  SMM BACKUP 12. 89c3b000 00010000

 1800 15:45:48.870830  COREBOOT   13. 89c33000 00008000

 1801 15:45:48.873848  ACPI       14. 89c0f000 00024000

 1802 15:45:48.877217  ACPI GNVS  15. 89c0e000 00001000

 1803 15:45:48.879833  RAMOOPS    16. 89b0e000 00100000

 1804 15:45:48.883386  TPM2 TCGLOG17. 89afe000 00010000

 1805 15:45:48.887398  SMBIOS     18. 89afd000 00000800

 1806 15:45:48.889385  IMD small region:

 1807 15:45:48.892508    IMD ROOT    0. 89ffec00 00000400

 1808 15:45:48.896475    FSP RUNTIME 1. 89ffebe0 00000004

 1809 15:45:48.899611    POWER STATE 2. 89ffeba0 00000040

 1810 15:45:48.903496    ROMSTAGE    3. 89ffeb80 00000004

 1811 15:45:48.905861    MEM INFO    4. 89ffe9c0 000001a9

 1812 15:45:48.909746    VPD         5. 89ffe960 00000047

 1813 15:45:48.913590    COREBOOTFWD 6. 89ffe920 00000028

 1814 15:45:48.916717  MTRR: Physical address space:

 1815 15:45:48.922704  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1816 15:45:48.929321  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1817 15:45:48.935711  0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6

 1818 15:45:48.941856  0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0

 1819 15:45:48.947416  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1820 15:45:48.954169  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1821 15:45:48.960288  0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6

 1822 15:45:48.964196  MTRR: Fixed MSR 0x250 0x0606060606060606

 1823 15:45:48.968504  MTRR: Fixed MSR 0x258 0x0606060606060606

 1824 15:45:48.972815  MTRR: Fixed MSR 0x259 0x0000000000000000

 1825 15:45:48.977135  MTRR: Fixed MSR 0x268 0x0606060606060606

 1826 15:45:48.980707  MTRR: Fixed MSR 0x269 0x0606060606060606

 1827 15:45:48.984220  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1828 15:45:48.988979  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1829 15:45:48.993224  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1830 15:45:48.997055  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1831 15:45:49.000579  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1832 15:45:49.005565  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1833 15:45:49.008914  call enable_fixed_mtrr()

 1834 15:45:49.012414  CPU physical address size: 39 bits

 1835 15:45:49.016846  MTRR: default type WB/UC MTRR counts: 7/7.

 1836 15:45:49.020024  MTRR: UC selected as default type.

 1837 15:45:49.026215  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1838 15:45:49.031922  MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6

 1839 15:45:49.038766  MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6

 1840 15:45:49.045197  MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6

 1841 15:45:49.050377  MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1842 15:45:49.057164  MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1843 15:45:49.063022  MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 1844 15:45:49.064274  

 1845 15:45:49.065117  MTRR check

 1846 15:45:49.068062  Fixed MTRRs   : Enabled

 1847 15:45:49.069617  Variable MTRRs: Enabled

 1848 15:45:49.069886  

 1849 15:45:49.074343  MTRR: Fixed MSR 0x250 0x0606060606060606

 1850 15:45:49.078123  MTRR: Fixed MSR 0x258 0x0606060606060606

 1851 15:45:49.082259  MTRR: Fixed MSR 0x259 0x0000000000000000

 1852 15:45:49.086616  MTRR: Fixed MSR 0x268 0x0606060606060606

 1853 15:45:49.091006  MTRR: Fixed MSR 0x269 0x0606060606060606

 1854 15:45:49.094857  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1855 15:45:49.098998  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1856 15:45:49.103164  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1857 15:45:49.107209  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1858 15:45:49.111012  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1859 15:45:49.115014  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1860 15:45:49.122493  BS: BS_WRITE_TABLES times (us): entry 17190 run 490061 exit 157064

 1861 15:45:49.124240  call enable_fixed_mtrr()

 1862 15:45:49.127571  CBFS @ 1d00000 size 300000

 1863 15:45:49.133759  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1864 15:45:49.137516  CPU physical address size: 39 bits

 1865 15:45:49.141147  CBFS: Locating 'fallback/payload'

 1866 15:45:49.144894  MTRR: Fixed MSR 0x250 0x0606060606060606

 1867 15:45:49.149379  MTRR: Fixed MSR 0x250 0x0606060606060606

 1868 15:45:49.153116  MTRR: Fixed MSR 0x258 0x0606060606060606

 1869 15:45:49.157540  MTRR: Fixed MSR 0x259 0x0000000000000000

 1870 15:45:49.161806  MTRR: Fixed MSR 0x268 0x0606060606060606

 1871 15:45:49.165530  MTRR: Fixed MSR 0x269 0x0606060606060606

 1872 15:45:49.170089  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1873 15:45:49.173892  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1874 15:45:49.177685  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1875 15:45:49.182061  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1876 15:45:49.185693  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1877 15:45:49.189594  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1878 15:45:49.193892  MTRR: Fixed MSR 0x258 0x0606060606060606

 1879 15:45:49.197029  call enable_fixed_mtrr()

 1880 15:45:49.200368  MTRR: Fixed MSR 0x259 0x0000000000000000

 1881 15:45:49.204694  MTRR: Fixed MSR 0x268 0x0606060606060606

 1882 15:45:49.208923  MTRR: Fixed MSR 0x269 0x0606060606060606

 1883 15:45:49.213059  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1884 15:45:49.216943  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1885 15:45:49.221481  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1886 15:45:49.224945  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1887 15:45:49.229983  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1888 15:45:49.233596  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1889 15:45:49.237320  CPU physical address size: 39 bits

 1890 15:45:49.239773  call enable_fixed_mtrr()

 1891 15:45:49.244756  MTRR: Fixed MSR 0x250 0x0606060606060606

 1892 15:45:49.248563  MTRR: Fixed MSR 0x250 0x0606060606060606

 1893 15:45:49.252767  MTRR: Fixed MSR 0x258 0x0606060606060606

 1894 15:45:49.256604  MTRR: Fixed MSR 0x259 0x0000000000000000

 1895 15:45:49.261124  MTRR: Fixed MSR 0x268 0x0606060606060606

 1896 15:45:49.264882  MTRR: Fixed MSR 0x269 0x0606060606060606

 1897 15:45:49.268980  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1898 15:45:49.272686  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1899 15:45:49.277104  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1900 15:45:49.280964  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1901 15:45:49.285024  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1902 15:45:49.288747  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1903 15:45:49.292995  MTRR: Fixed MSR 0x258 0x0606060606060606

 1904 15:45:49.296121  call enable_fixed_mtrr()

 1905 15:45:49.300448  MTRR: Fixed MSR 0x259 0x0000000000000000

 1906 15:45:49.304664  MTRR: Fixed MSR 0x268 0x0606060606060606

 1907 15:45:49.307822  MTRR: Fixed MSR 0x269 0x0606060606060606

 1908 15:45:49.312091  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1909 15:45:49.316946  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1910 15:45:49.320505  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1911 15:45:49.324023  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1912 15:45:49.328159  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1913 15:45:49.332733  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1914 15:45:49.336308  CPU physical address size: 39 bits

 1915 15:45:49.339258  call enable_fixed_mtrr()

 1916 15:45:49.342854  CPU physical address size: 39 bits

 1917 15:45:49.346486  MTRR: Fixed MSR 0x250 0x0606060606060606

 1918 15:45:49.351270  MTRR: Fixed MSR 0x250 0x0606060606060606

 1919 15:45:49.355665  MTRR: Fixed MSR 0x258 0x0606060606060606

 1920 15:45:49.358818  MTRR: Fixed MSR 0x259 0x0000000000000000

 1921 15:45:49.363110  MTRR: Fixed MSR 0x268 0x0606060606060606

 1922 15:45:49.367773  MTRR: Fixed MSR 0x269 0x0606060606060606

 1923 15:45:49.371048  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1924 15:45:49.375815  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1925 15:45:49.379669  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1926 15:45:49.384031  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1927 15:45:49.387428  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1928 15:45:49.392181  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1929 15:45:49.399353  MTRR: Fixed MSR 0x258 0x0606060606060606

 1930 15:45:49.399470  call enable_fixed_mtrr()

 1931 15:45:49.402735  MTRR: Fixed MSR 0x259 0x0000000000000000

 1932 15:45:49.406986  MTRR: Fixed MSR 0x268 0x0606060606060606

 1933 15:45:49.411141  MTRR: Fixed MSR 0x269 0x0606060606060606

 1934 15:45:49.415425  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1935 15:45:49.419187  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1936 15:45:49.423490  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1937 15:45:49.427794  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1938 15:45:49.430836  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1939 15:45:49.435027  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1940 15:45:49.439544  CPU physical address size: 39 bits

 1941 15:45:49.442246  call enable_fixed_mtrr()

 1942 15:45:49.445909  CPU physical address size: 39 bits

 1943 15:45:49.449608  CPU physical address size: 39 bits

 1944 15:45:49.452987  CBFS: Found @ offset 1cf4c0 size 3a954

 1945 15:45:49.457416  Checking segment from ROM address 0xffecf4f8

 1946 15:45:49.461990  Checking segment from ROM address 0xffecf514

 1947 15:45:49.466134  Loading segment from ROM address 0xffecf4f8

 1948 15:45:49.468465    code (compression=0)

 1949 15:45:49.477491    New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c

 1950 15:45:49.485844  Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c

 1951 15:45:49.488302  it's not compressed!

 1952 15:45:49.569864  [ 0x30100018, 3013a934, 0x32751910) <- ffecf530

 1953 15:45:49.576056  Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc

 1954 15:45:49.584507  Loading segment from ROM address 0xffecf514

 1955 15:45:49.586919    Entry Point 0x30100018

 1956 15:45:49.588948  Loaded segments

 1957 15:45:49.598620  Finalizing chipset.

 1958 15:45:49.599774  Finalizing SMM.

 1959 15:45:49.605754  BS: BS_PAYLOAD_LOAD times (us): entry 1 run 466553 exit 11544

 1960 15:45:49.610054  mp_park_aps done after 0 msecs.

 1961 15:45:49.614385  Jumping to boot code at 30100018(89c33000)

 1962 15:45:49.622618  CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes

 1963 15:45:49.622912  

 1964 15:45:49.622982  

 1965 15:45:49.623043  

 1966 15:45:49.626674  Starting depthcharge on sarien...

 1967 15:45:49.626755  

 1968 15:45:49.627530  end: 2.2.3 depthcharge-start (duration 00:00:12) [common]
 1969 15:45:49.627662  start: 2.2.4 bootloader-commands (timeout 00:04:31) [common]
 1970 15:45:49.627757  Setting prompt string to ['sarien:']
 1971 15:45:49.627840  bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:31)
 1972 15:45:49.634223  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1973 15:45:49.634306  

 1974 15:45:49.641751  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1975 15:45:49.641834  

 1976 15:45:49.649635  WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!

 1977 15:45:49.649738  

 1978 15:45:49.651536  BIOS MMAP details:

 1979 15:45:49.652144  

 1980 15:45:49.654786  IFD Base Offset  : 0x1000000

 1981 15:45:49.654874  

 1982 15:45:49.657493  IFD End Offset   : 0x2000000

 1983 15:45:49.657566  

 1984 15:45:49.659984  MMAP Size        : 0x1000000

 1985 15:45:49.660055  

 1986 15:45:49.663265  MMAP Start       : 0xff000000

 1987 15:45:49.664469  

 1988 15:45:49.669352  Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff

 1989 15:45:49.673899  

 1990 15:45:49.678407  New NVMe Controller 0x3214e110 @ 00:1d:04

 1991 15:45:49.678501  

 1992 15:45:49.682266  New NVMe Controller 0x3214e1d8 @ 00:1d:00

 1993 15:45:49.682823  

 1994 15:45:49.688147  The GBB signature is at 0x30000014 and is:  24 47 42 42

 1995 15:45:49.692172  

 1996 15:45:49.694718  Wipe memory regions:

 1997 15:45:49.694822  

 1998 15:45:49.698003  	[0x00000000001000, 0x000000000a0000)

 1999 15:45:49.698108  

 2000 15:45:49.701765  	[0x00000000100000, 0x00000030000000)

 2001 15:45:49.784352  

 2002 15:45:49.788351  	[0x00000032751910, 0x00000089afd000)

 2003 15:45:49.937958  

 2004 15:45:49.942058  	[0x00000100000000, 0x0000026e800000)

 2005 15:45:50.952022  

 2006 15:45:50.954306  R8152: Initializing

 2007 15:45:50.954830  

 2008 15:45:50.957377  Version 6 (ocp_data = 5c30)

 2009 15:45:50.958126  

 2010 15:45:50.960618  R8152: Done initializing

 2011 15:45:50.961032  

 2012 15:45:50.962487  Adding net device

 2013 15:45:50.962907  

 2014 15:45:50.968244  [firmware-sarien-12200.B-collabora] Apr  9 2021 09:49:38

 2015 15:45:50.968970  

 2016 15:45:50.969322  

 2017 15:45:50.969636  

 2018 15:45:50.970448  Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2020 15:45:51.071588  sarien: tftpboot 192.168.201.1 11224165/tftp-deploy-18c9myvk/kernel/bzImage 11224165/tftp-deploy-18c9myvk/kernel/cmdline 11224165/tftp-deploy-18c9myvk/ramdisk/ramdisk.cpio.gz

 2021 15:45:51.072222  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2022 15:45:51.072814  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:30)
 2023 15:45:51.115864  tftpboot 192.168.201.1 11224165/tftp-deploy-18c9myvk/kernel/bzImage 11224165/tftp-deploy-18c9myvk/kernel/cmdline 11224165/tftp-deploy-18c9myvk/ramdisk/ramdisk.cpio.gz

 2024 15:45:51.116308  

 2025 15:45:51.116639  Waiting for link

 2026 15:45:51.275361  

 2027 15:45:51.276420  done.

 2028 15:45:51.276506  

 2029 15:45:51.278671  MAC: 00:24:32:30:79:bd

 2030 15:45:51.278753  

 2031 15:45:51.280974  Sending DHCP discover... done.

 2032 15:45:51.281259  

 2033 15:45:51.284401  Waiting for reply... done.

 2034 15:45:51.284520  

 2035 15:45:51.288785  Sending DHCP request... done.

 2036 15:45:51.288891  

 2037 15:45:51.291354  Waiting for reply... done.

 2038 15:45:51.291979  

 2039 15:45:51.293771  My ip is 192.168.201.166

 2040 15:45:51.294515  

 2041 15:45:51.297543  The DHCP server ip is 192.168.201.1

 2042 15:45:51.297642  

 2043 15:45:51.302708  TFTP server IP predefined by user: 192.168.201.1

 2044 15:45:51.302796  

 2045 15:45:51.309708  Bootfile predefined by user: 11224165/tftp-deploy-18c9myvk/kernel/bzImage

 2046 15:45:51.309789  

 2047 15:45:51.313067  Sending tftp read request... done.

 2048 15:45:51.313713  

 2049 15:45:51.316898  Waiting for the transfer... 

 2050 15:45:51.317519  

 2051 15:45:51.905440  00000000 ################################################################

 2052 15:45:51.906308  

 2053 15:45:52.490844  00080000 ################################################################

 2054 15:45:52.492062  

 2055 15:45:53.094563  00100000 ################################################################

 2056 15:45:53.095578  

 2057 15:45:53.680988  00180000 ################################################################

 2058 15:45:53.681432  

 2059 15:45:54.221902  00200000 ################################################################

 2060 15:45:54.223634  

 2061 15:45:54.788957  00280000 ################################################################

 2062 15:45:54.789374  

 2063 15:45:55.399946  00300000 ################################################################

 2064 15:45:55.401055  

 2065 15:45:56.052675  00380000 ################################################################

 2066 15:45:56.053772  

 2067 15:45:56.668331  00400000 ################################################################

 2068 15:45:56.668698  

 2069 15:45:57.284617  00480000 ################################################################

 2070 15:45:57.285125  

 2071 15:45:57.949330  00500000 ################################################################

 2072 15:45:57.950300  

 2073 15:45:58.529957  00580000 ################################################################

 2074 15:45:58.530550  

 2075 15:45:59.172819  00600000 ################################################################

 2076 15:45:59.173444  

 2077 15:45:59.718435  00680000 ################################################################

 2078 15:45:59.718588  

 2079 15:46:00.246766  00700000 ################################################################

 2080 15:46:00.247357  

 2081 15:46:00.268846  00780000 ### done.

 2082 15:46:00.269388  

 2083 15:46:00.272303  The bootfile was 7884688 bytes long.

 2084 15:46:00.272462  

 2085 15:46:00.276128  Sending tftp read request... done.

 2086 15:46:00.276631  

 2087 15:46:00.279228  Waiting for the transfer... 

 2088 15:46:00.279411  

 2089 15:46:00.805680  00000000 ################################################################

 2090 15:46:00.806302  

 2091 15:46:01.338770  00080000 ################################################################

 2092 15:46:01.338923  

 2093 15:46:01.878522  00100000 ################################################################

 2094 15:46:01.879135  

 2095 15:46:02.425639  00180000 ################################################################

 2096 15:46:02.426215  

 2097 15:46:02.944822  00200000 ################################################################

 2098 15:46:02.944968  

 2099 15:46:03.490744  00280000 ################################################################

 2100 15:46:03.491321  

 2101 15:46:04.033128  00300000 ################################################################

 2102 15:46:04.034240  

 2103 15:46:04.586245  00380000 ################################################################

 2104 15:46:04.586892  

 2105 15:46:05.127696  00400000 ################################################################

 2106 15:46:05.128257  

 2107 15:46:05.644115  00480000 ################################################################

 2108 15:46:05.644740  

 2109 15:46:06.169144  00500000 ################################################################

 2110 15:46:06.169814  

 2111 15:46:06.698675  00580000 ################################################################

 2112 15:46:06.698826  

 2113 15:46:07.225816  00600000 ################################################################

 2114 15:46:07.226794  

 2115 15:46:07.769357  00680000 ################################################################

 2116 15:46:07.769990  

 2117 15:46:08.301938  00700000 ################################################################

 2118 15:46:08.302589  

 2119 15:46:08.826548  00780000 ################################################################

 2120 15:46:08.827155  

 2121 15:46:09.258078  00800000 ##################################################### done.

 2122 15:46:09.258228  

 2123 15:46:09.261217  Sending tftp read request... done.

 2124 15:46:09.261301  

 2125 15:46:09.264411  Waiting for the transfer... 

 2126 15:46:09.264495  

 2127 15:46:09.265371  00000000 # done.

 2128 15:46:09.265455  

 2129 15:46:09.274554  Command line loaded dynamically from TFTP file: 11224165/tftp-deploy-18c9myvk/kernel/cmdline

 2130 15:46:09.275031  

 2131 15:46:09.295328  The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2132 15:46:09.298723  

 2133 15:46:09.301951  Shutting down all USB controllers.

 2134 15:46:09.302723  

 2135 15:46:09.305210  Removing current net device

 2136 15:46:09.308072  

 2137 15:46:09.310711  EC: exit firmware mode

 2138 15:46:09.311703  

 2139 15:46:09.313430  Finalizing coreboot

 2140 15:46:09.314731  

 2141 15:46:09.320392  Exiting depthcharge with code 4 at timestamp: 27375943

 2142 15:46:09.321264  

 2143 15:46:09.321539  

 2144 15:46:09.323955  end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
 2145 15:46:09.324443  start: 2.2.5 auto-login-action (timeout 00:04:11) [common]
 2146 15:46:09.324819  Setting prompt string to ['Linux version [0-9]']
 2147 15:46:09.325165  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2148 15:46:09.325507  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2149 15:46:09.326308  Starting kernel ...

 2150 15:46:09.326667  

 2151 15:46:09.326981  

 2153 15:50:20.325269  end: 2.2.5 auto-login-action (duration 00:04:11) [common]
 2155 15:50:20.326259  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 251 seconds'
 2157 15:50:20.327053  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2160 15:50:20.328414  end: 2 depthcharge-action (duration 00:05:00) [common]
 2162 15:50:20.329715  Cleaning after the job
 2163 15:50:20.330163  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224165/tftp-deploy-18c9myvk/ramdisk
 2164 15:50:20.336064  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224165/tftp-deploy-18c9myvk/kernel
 2165 15:50:20.342250  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224165/tftp-deploy-18c9myvk/modules
 2166 15:50:20.343957  start: 5.1 power-off (timeout 00:00:30) [common]
 2167 15:50:20.344780  Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-4' '--port=1' '--command=off'
 2168 15:50:25.522679  >> Command sent successfully.

 2169 15:50:25.533665  Returned 0 in 5 seconds
 2170 15:50:25.634875  end: 5.1 power-off (duration 00:00:05) [common]
 2172 15:50:25.636573  start: 5.2 read-feedback (timeout 00:09:55) [common]
 2173 15:50:25.637763  Listened to connection for namespace 'common' for up to 1s
 2174 15:50:26.638402  Finalising connection for namespace 'common'
 2175 15:50:26.639166  Disconnecting from shell: Finalise
 2176 15:50:26.639763  

 2177 15:50:26.740859  end: 5.2 read-feedback (duration 00:00:01) [common]
 2178 15:50:26.741416  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11224165
 2179 15:50:26.799207  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11224165
 2180 15:50:26.799504  JobError: Your job cannot terminate cleanly.