Boot log: hp-x360-14a-cb0001xx-zork

    1 15:43:18.474406  lava-dispatcher, installed at version: 2023.05.1
    2 15:43:18.474625  start: 0 validate
    3 15:43:18.474757  Start time: 2023-08-07 15:43:18.474750+00:00 (UTC)
    4 15:43:18.474875  Using caching service: 'http://localhost/cache/?uri=%s'
    5 15:43:18.475007  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 15:43:18.745400  Using caching service: 'http://localhost/cache/?uri=%s'
    7 15:43:18.745717  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 15:43:19.013988  Using caching service: 'http://localhost/cache/?uri=%s'
    9 15:43:19.014763  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1447-g64a295c810065%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 15:43:21.675439  validate duration: 3.20
   12 15:43:21.677162  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 15:43:21.677863  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 15:43:21.678502  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 15:43:21.679252  Not decompressing ramdisk as can be used compressed.
   16 15:43:21.679712  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 15:43:21.680107  saving as /var/lib/lava/dispatcher/tmp/11224155/tftp-deploy-8ura3dw0/ramdisk/rootfs.cpio.gz
   18 15:43:21.680427  total size: 8418130 (8MB)
   19 15:43:22.305815  progress   0% (0MB)
   20 15:43:22.308368  progress   5% (0MB)
   21 15:43:22.311001  progress  10% (0MB)
   22 15:43:22.313657  progress  15% (1MB)
   23 15:43:22.316183  progress  20% (1MB)
   24 15:43:22.318546  progress  25% (2MB)
   25 15:43:22.320989  progress  30% (2MB)
   26 15:43:22.323185  progress  35% (2MB)
   27 15:43:22.325538  progress  40% (3MB)
   28 15:43:22.327861  progress  45% (3MB)
   29 15:43:22.330149  progress  50% (4MB)
   30 15:43:22.332469  progress  55% (4MB)
   31 15:43:22.334953  progress  60% (4MB)
   32 15:43:22.337297  progress  65% (5MB)
   33 15:43:22.339653  progress  70% (5MB)
   34 15:43:22.342031  progress  75% (6MB)
   35 15:43:22.344333  progress  80% (6MB)
   36 15:43:22.346613  progress  85% (6MB)
   37 15:43:22.349031  progress  90% (7MB)
   38 15:43:22.351482  progress  95% (7MB)
   39 15:43:22.353641  progress 100% (8MB)
   40 15:43:22.353874  8MB downloaded in 0.67s (11.92MB/s)
   41 15:43:22.354027  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 15:43:22.354277  end: 1.1 download-retry (duration 00:00:01) [common]
   44 15:43:22.354363  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 15:43:22.354449  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 15:43:22.354584  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 15:43:22.354664  saving as /var/lib/lava/dispatcher/tmp/11224155/tftp-deploy-8ura3dw0/kernel/bzImage
   48 15:43:22.354725  total size: 7884688 (7MB)
   49 15:43:22.354790  No compression specified
   50 15:43:22.356016  progress   0% (0MB)
   51 15:43:22.358266  progress   5% (0MB)
   52 15:43:22.360437  progress  10% (0MB)
   53 15:43:22.362606  progress  15% (1MB)
   54 15:43:22.364938  progress  20% (1MB)
   55 15:43:22.367156  progress  25% (1MB)
   56 15:43:22.369603  progress  30% (2MB)
   57 15:43:22.371969  progress  35% (2MB)
   58 15:43:22.374192  progress  40% (3MB)
   59 15:43:22.376683  progress  45% (3MB)
   60 15:43:22.378993  progress  50% (3MB)
   61 15:43:22.381294  progress  55% (4MB)
   62 15:43:22.383695  progress  60% (4MB)
   63 15:43:22.386404  progress  65% (4MB)
   64 15:43:22.388670  progress  70% (5MB)
   65 15:43:22.391015  progress  75% (5MB)
   66 15:43:22.393348  progress  80% (6MB)
   67 15:43:22.395663  progress  85% (6MB)
   68 15:43:22.398261  progress  90% (6MB)
   69 15:43:22.400744  progress  95% (7MB)
   70 15:43:22.403516  progress 100% (7MB)
   71 15:43:22.403745  7MB downloaded in 0.05s (153.41MB/s)
   72 15:43:22.403999  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 15:43:22.404410  end: 1.2 download-retry (duration 00:00:00) [common]
   75 15:43:22.404539  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 15:43:22.404701  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 15:43:22.404879  downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1447-g64a295c810065/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 15:43:22.404976  saving as /var/lib/lava/dispatcher/tmp/11224155/tftp-deploy-8ura3dw0/modules/modules.tar
   79 15:43:22.405082  total size: 250796 (0MB)
   80 15:43:22.405172  Using unxz to decompress xz
   81 15:43:22.414650  progress  13% (0MB)
   82 15:43:22.415119  progress  26% (0MB)
   83 15:43:22.415457  progress  39% (0MB)
   84 15:43:22.417005  progress  52% (0MB)
   85 15:43:22.418917  progress  65% (0MB)
   86 15:43:22.420908  progress  78% (0MB)
   87 15:43:22.422835  progress  91% (0MB)
   88 15:43:22.424800  progress 100% (0MB)
   89 15:43:22.430621  0MB downloaded in 0.03s (9.37MB/s)
   90 15:43:22.430969  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 15:43:22.431410  end: 1.3 download-retry (duration 00:00:00) [common]
   93 15:43:22.431560  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   94 15:43:22.431690  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
   95 15:43:22.431820  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 15:43:22.431982  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
   97 15:43:22.432284  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp
   98 15:43:22.432471  makedir: /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin
   99 15:43:22.432631  makedir: /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/tests
  100 15:43:22.432773  makedir: /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/results
  101 15:43:22.432922  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-add-keys
  102 15:43:22.433119  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-add-sources
  103 15:43:22.433302  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-background-process-start
  104 15:43:22.433508  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-background-process-stop
  105 15:43:22.433702  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-common-functions
  106 15:43:22.433874  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-echo-ipv4
  107 15:43:22.434054  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-install-packages
  108 15:43:22.434236  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-installed-packages
  109 15:43:22.434399  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-os-build
  110 15:43:22.434572  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-probe-channel
  111 15:43:22.434740  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-probe-ip
  112 15:43:22.434915  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-target-ip
  113 15:43:22.435081  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-target-mac
  114 15:43:22.435245  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-target-storage
  115 15:43:22.435421  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-test-case
  116 15:43:22.435606  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-test-event
  117 15:43:22.435777  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-test-feedback
  118 15:43:22.435993  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-test-raise
  119 15:43:22.436166  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-test-reference
  120 15:43:22.436350  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-test-runner
  121 15:43:22.436529  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-test-set
  122 15:43:22.436706  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-test-shell
  123 15:43:22.436893  Updating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-install-packages (oe)
  124 15:43:22.437101  Updating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/bin/lava-installed-packages (oe)
  125 15:43:22.437273  Creating /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/environment
  126 15:43:22.437416  LAVA metadata
  127 15:43:22.437530  - LAVA_JOB_ID=11224155
  128 15:43:22.437629  - LAVA_DISPATCHER_IP=192.168.201.1
  129 15:43:22.437782  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  130 15:43:22.437892  skipped lava-vland-overlay
  131 15:43:22.438013  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 15:43:22.438129  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  133 15:43:22.438233  skipped lava-multinode-overlay
  134 15:43:22.438340  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 15:43:22.438466  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  136 15:43:22.438577  Loading test definitions
  137 15:43:22.438718  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  138 15:43:22.438822  Using /lava-11224155 at stage 0
  139 15:43:22.439331  uuid=11224155_1.4.2.3.1 testdef=None
  140 15:43:22.439459  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 15:43:22.439592  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  142 15:43:22.440417  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 15:43:22.440812  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  145 15:43:22.441817  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 15:43:22.442208  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  148 15:43:22.443184  runner path: /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/0/tests/0_dmesg test_uuid 11224155_1.4.2.3.1
  149 15:43:22.443398  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 15:43:22.443778  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  152 15:43:22.443893  Using /lava-11224155 at stage 1
  153 15:43:22.444386  uuid=11224155_1.4.2.3.5 testdef=None
  154 15:43:22.444517  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  155 15:43:22.444646  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  156 15:43:22.445403  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  158 15:43:22.445779  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  159 15:43:22.446825  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  161 15:43:22.447210  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  162 15:43:22.448249  runner path: /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/1/tests/1_bootrr test_uuid 11224155_1.4.2.3.5
  163 15:43:22.448452  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  165 15:43:22.448811  Creating lava-test-runner.conf files
  166 15:43:22.448914  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/0 for stage 0
  167 15:43:22.449044  - 0_dmesg
  168 15:43:22.449160  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11224155/lava-overlay-dp7a57zp/lava-11224155/1 for stage 1
  169 15:43:22.449298  - 1_bootrr
  170 15:43:22.449444  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  171 15:43:22.449571  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  172 15:43:22.460606  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  173 15:43:22.460752  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  174 15:43:22.460878  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  175 15:43:22.461000  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  176 15:43:22.461117  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  177 15:43:22.719491  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  178 15:43:22.719912  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  179 15:43:22.720076  extracting modules file /var/lib/lava/dispatcher/tmp/11224155/tftp-deploy-8ura3dw0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11224155/extract-overlay-ramdisk-n0bh9ipo/ramdisk
  180 15:43:22.736659  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  181 15:43:22.736786  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  182 15:43:22.736875  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224155/compress-overlay-5sx66ue7/overlay-1.4.2.4.tar.gz to ramdisk
  183 15:43:22.736946  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11224155/compress-overlay-5sx66ue7/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11224155/extract-overlay-ramdisk-n0bh9ipo/ramdisk
  184 15:43:22.746599  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  185 15:43:22.746714  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  186 15:43:22.746802  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  187 15:43:22.746892  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  188 15:43:22.746971  Building ramdisk /var/lib/lava/dispatcher/tmp/11224155/extract-overlay-ramdisk-n0bh9ipo/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11224155/extract-overlay-ramdisk-n0bh9ipo/ramdisk
  189 15:43:22.898516  >> 49788 blocks

  190 15:43:23.769593  rename /var/lib/lava/dispatcher/tmp/11224155/extract-overlay-ramdisk-n0bh9ipo/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11224155/tftp-deploy-8ura3dw0/ramdisk/ramdisk.cpio.gz
  191 15:43:23.770051  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  192 15:43:23.770177  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  193 15:43:23.770277  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  194 15:43:23.770374  No mkimage arch provided, not using FIT.
  195 15:43:23.770459  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  196 15:43:23.770541  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  197 15:43:23.770646  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  198 15:43:23.770736  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  199 15:43:23.770821  No LXC device requested
  200 15:43:23.770917  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  201 15:43:23.771003  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  202 15:43:23.771083  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  203 15:43:23.771151  Checking files for TFTP limit of 4294967296 bytes.
  204 15:43:23.771540  end: 1 tftp-deploy (duration 00:00:02) [common]
  205 15:43:23.771642  start: 2 depthcharge-action (timeout 00:05:00) [common]
  206 15:43:23.771726  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  207 15:43:23.771844  substitutions:
  208 15:43:23.771916  - {DTB}: None
  209 15:43:23.772016  - {INITRD}: 11224155/tftp-deploy-8ura3dw0/ramdisk/ramdisk.cpio.gz
  210 15:43:23.772073  - {KERNEL}: 11224155/tftp-deploy-8ura3dw0/kernel/bzImage
  211 15:43:23.772128  - {LAVA_MAC}: None
  212 15:43:23.772182  - {PRESEED_CONFIG}: None
  213 15:43:23.772236  - {PRESEED_LOCAL}: None
  214 15:43:23.772287  - {RAMDISK}: 11224155/tftp-deploy-8ura3dw0/ramdisk/ramdisk.cpio.gz
  215 15:43:23.772341  - {ROOT_PART}: None
  216 15:43:23.772393  - {ROOT}: None
  217 15:43:23.772445  - {SERVER_IP}: 192.168.201.1
  218 15:43:23.772496  - {TEE}: None
  219 15:43:23.772548  Parsed boot commands:
  220 15:43:23.772602  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  221 15:43:23.772775  Parsed boot commands: tftpboot 192.168.201.1 11224155/tftp-deploy-8ura3dw0/kernel/bzImage 11224155/tftp-deploy-8ura3dw0/kernel/cmdline 11224155/tftp-deploy-8ura3dw0/ramdisk/ramdisk.cpio.gz
  222 15:43:23.772873  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  223 15:43:23.772956  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  224 15:43:23.773046  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  225 15:43:23.773131  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  226 15:43:23.773202  Not connected, no need to disconnect.
  227 15:43:23.773276  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  228 15:43:23.773358  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  229 15:43:23.773426  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh hp-x360-14a-cb0001xx-zork-cbg-5'
  230 15:43:23.777675  Setting prompt string to ['lava-test: # ']
  231 15:43:23.778038  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  232 15:43:23.778145  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  233 15:43:23.778242  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  234 15:43:23.778332  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  235 15:43:23.778560  Calling: 'pduclient' '--daemon=localhost' '--hostname=hp-x360-14a-cb0001xx-zork-cbg-5' '--port=1' '--command=reboot'
  236 15:43:28.927167  >> Command sent successfully.

  237 15:43:28.937936  Returned 0 in 5 seconds
  238 15:43:29.039456  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  240 15:43:29.041204  end: 2.2.2 reset-device (duration 00:00:05) [common]
  241 15:43:29.041709  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  242 15:43:29.042152  Setting prompt string to 'Starting depthcharge on Gumboz...'
  243 15:43:29.042617  Changing prompt to 'Starting depthcharge on Gumboz...'
  244 15:43:29.043148  depthcharge-start: Wait for prompt Starting depthcharge on Gumboz... (timeout 00:05:00)
  245 15:43:29.044662  [Enter `^Ec?' for help]

  246 15:43:30.709117  

  247 15:43:30.709867  

  248 15:43:30.715799  coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 bootblock starting (log level: 8)...

  249 15:43:30.716746  Family_Model: 00820f01

  250 15:43:30.719044  PSP boot mode: Production

  251 15:43:30.722209  Silicon level: Production

  252 15:43:30.726040  PMxC0 STATUS: 0x800 BIT11 

  253 15:43:30.726637  I2C bus 3 version 0x3132322a

  254 15:43:30.729207  DW I2C bus 3 at 0xfedc5000 (400 KHz)

  255 15:43:30.735702  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

  256 15:43:30.739046  CBFS: Locating 'fallback/romstage'

  257 15:43:30.742204  CBFS: Found @ offset 80 size cc24

  258 15:43:30.751291  BS: bootblock times (exec / console): total (unknown) / 34 ms

  259 15:43:30.751696  

  260 15:43:30.752175  

  261 15:43:30.758374  coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 romstage starting (log level: 8)...

  262 15:43:30.761577  POST: 0x41

  263 15:43:30.761972  POST: 0x42

  264 15:43:30.765051  Family_Model: 00820f01

  265 15:43:30.771305  GPIO Control Switch: 0xef000000, Wake Stat 0: 0x00000000, Wake Stat 1: 0x00000000

  266 15:43:30.771647  POST: 0x43

  267 15:43:30.774548  Boot Count incremented to 3686

  268 15:43:30.778450  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

  269 15:43:30.781360  CBFS: Locating 'fspm.bin'

  270 15:43:30.785155  CBFS: Found @ offset 30000 size 18558

  271 15:43:30.824449  Spec version: v2.0

  272 15:43:30.827571  Revision: 0.0.0, Build Number 1

  273 15:43:30.827900  Type: release/test

  274 15:43:30.834516  image ID: AMD_PCS0, base 0x20c0000 + 0x4b000

  275 15:43:30.837829  	Config region        0x46f2c + 0x104

  276 15:43:30.838058  	Memory init offset   0x7b8

  277 15:43:30.841123  POST: 0x34

  278 15:43:30.841369  bootmode is set to: 0

  279 15:43:30.844470  POST: 0x36

  280 15:43:30.844749  Calling FspMemoryInit: 0x020c07b8

  281 15:43:30.848134  	0x02000dec: raminit_upd

  282 15:43:30.851201  	0x0204ccbc: &hob_list_ptr

  283 15:43:30.851573  POST: 0x92

  284 15:43:30.857701  POST: 0x98

  285 15:43:30.858124  CBMEM:

  286 15:43:30.860741  IMD: root @ 0xcb7ff000 254 entries.

  287 15:43:30.864459  IMD: root @ 0xcb7fec00 62 entries.

  288 15:43:30.867624  FMAP: area RO_VPD found @ 800000 (16384 bytes)

  289 15:43:30.870821  WARNING: RO_VPD is uninitialized or empty.

  290 15:43:30.877317  FMAP: area RW_VPD found @ 615000 (8192 bytes)

  291 15:43:30.877771  External stage cache:

  292 15:43:30.881142  IMD: root @ 0xcbfff000 254 entries.

  293 15:43:30.884424  IMD: root @ 0xcbffec00 62 entries.

  294 15:43:30.888268  FspMemoryInit returned 0x00000000

  295 15:43:30.891823  FMAP: area RW_MRC_CACHE found @ 0 (65536 bytes)

  296 15:43:30.895197  APOB RAM copy differs from flash

  297 15:43:30.902209  Copy APOB from RAM 0x0x02001000/0xa3a4 to flash 0x0/0x10000

  298 15:43:30.905305  spi_init: SPI BAR at 0xfec10000

  299 15:43:30.905743  Manufacturer: ef

  300 15:43:30.912202  SF: Detected ef 8018 with sector size 0x1000, total 0x1000000

  301 15:43:31.513681  SF: Successfully erased 65536 bytes @ 0x0

  302 15:43:31.713961  Updated APOB in flash

  303 15:43:31.714480  POST: 0x44

  304 15:43:31.720975  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

  305 15:43:31.724148  CBFS: Locating 'fallback/ramstage'

  306 15:43:31.727384  CBFS: Found @ offset f300 size 1c409

  307 15:43:31.731100  Decompressing stage fallback/ramstage @ 0xca6b5fc0 (1119536 bytes)

  308 15:43:31.787843  Loading module at 0xca6b6000 with entry 0xca6b6000. filesize: 0x40900 memsize: 0x1114f0

  309 15:43:31.790963  Processing 4362 relocs. Offset value of 0xba6b6000

  310 15:43:31.798088  BS: romstage times (exec / console): total (unknown) / 152 ms

  311 15:43:31.798521  

  312 15:43:31.798855  

  313 15:43:31.804635  coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 ramstage starting (log level: 8)...

  314 15:43:31.807773  POST: 0x39

  315 15:43:31.808232  POST: 0x80

  316 15:43:31.808569  Normal boot

  317 15:43:31.811131  POST: 0x70

  318 15:43:31.814902  BS: BS_PRE_DEVICE run times (exec / console): 0 / 1 ms

  319 15:43:31.818067  POST: 0x71

  320 15:43:31.818489  mainboard: EC init

  321 15:43:31.820940  Chrome EC: Set SMI mask to 0x0000000000000000

  322 15:43:31.824688  Chrome EC: UHEPI supported

  323 15:43:31.830959  Chrome EC: clear events_b mask to 0x0000000000000000

  324 15:43:31.834077  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

  325 15:43:31.841252  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001400101e

  326 15:43:31.844330  Chrome EC: Set WAKE mask to 0x0000000000000000

  327 15:43:31.847989  Board ID: 5

  328 15:43:31.854255  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

  329 15:43:31.854686  CBFS: Locating 'fsps.bin'

  330 15:43:31.857647  CBFS: Found @ offset 48fc0 size 16547

  331 15:43:31.898271  Spec version: v2.0

  332 15:43:31.901424  Revision: 0.0.0, Build Number 1

  333 15:43:31.901850  Type: release/test

  334 15:43:31.908735  image ID: AMD_PCS0, base 0xca677000 + 0x3e000

  335 15:43:31.912058  	Config region        0x3cf54 + 0x202

  336 15:43:31.912489  	Silicon init offset  0x3c2

  337 15:43:31.915258  	Notify phase offset  0x3b8

  338 15:43:31.918494  Calling FspSiliconInit: 0xca6773c2

  339 15:43:31.922109  	0xca7074f0: upd

  340 15:43:31.922533  POST: 0x93

  341 15:43:32.203960  POST: 0x99

  342 15:43:32.207640  FspSiliconInit returned 0x00000000

  343 15:43:32.210933  I2C bus 2 version 0x3132322a

  344 15:43:32.214182  DW I2C bus 2 at 0xfedc4000 (400 KHz)

  345 15:43:32.217434  FMAP: area RW_ELOG found @ 610000 (4096 bytes)

  346 15:43:32.220727  spi_init: SPI BAR at 0xfec10000

  347 15:43:32.220810  Manufacturer: ef

  348 15:43:32.227298  SF: Detected ef 8018 with sector size 0x1000, total 0x1000000

  349 15:43:32.230462  ELOG: NV offset 0x610000 size 0x1000

  350 15:43:32.241792  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

  351 15:43:32.248295  ELOG: Event(17) added with size 13 at 2023-08-07 15:43:31 UTC

  352 15:43:32.255119  ELOG: Event(9F) added with size 14 at 2023-08-07 15:43:31 UTC

  353 15:43:32.255203  PM1_STS: PWRBTN 

  354 15:43:32.261480  BS: BS_DEV_INIT_CHIPS run times (exec / console): 330 / 110 ms

  355 15:43:32.264988  EC returned error result code 3

  356 15:43:32.268157  FW_CONFIG value is 0x88900

  357 15:43:32.271461  fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_ALC5682

  358 15:43:32.275371  GENERIC: 1.0 disabled by fw_config

  359 15:43:32.281752  fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_ALC5682

  360 15:43:32.284950  GENERIC: 1.0 disabled by fw_config

  361 15:43:32.288757  BS: BS_DEV_ENUMERATE entry times (exec / console): 2 / 22 ms

  362 15:43:32.292053  POST: 0x72

  363 15:43:32.292135  Enumerating buses...

  364 15:43:32.295321  Show all devs... Before device enumeration.

  365 15:43:32.298489  Root Device: enabled 1

  366 15:43:32.302185  CPU_CLUSTER: 0: enabled 1

  367 15:43:32.302268  DOMAIN: 0000: enabled 1

  368 15:43:32.305271  MMIO: fedc5000: enabled 1

  369 15:43:32.308448  MMIO: fedca000: enabled 0

  370 15:43:32.312125  MMIO: fedce000: enabled 0

  371 15:43:32.312207  MMIO: fedcf000: enabled 0

  372 15:43:32.315322  MMIO: fedc4000: enabled 1

  373 15:43:32.318633  GENERIC: 0.1: enabled 1

  374 15:43:32.318715  APIC: 00: enabled 1

  375 15:43:32.321963  PCI: 00:00.0: enabled 1

  376 15:43:32.322045  PCI: 00:00.2: enabled 1

  377 15:43:32.325245  PCI: 00:01.0: enabled 1

  378 15:43:32.328405  PCI: 00:01.1: enabled 0

  379 15:43:32.328515  PCI: 00:01.2: enabled 1

  380 15:43:32.332311  PCI: 00:01.3: enabled 1

  381 15:43:32.335551  PCI: 00:01.4: enabled 0

  382 15:43:32.335633  PCI: 00:01.5: enabled 0

  383 15:43:32.338723  PCI: 00:08.0: enabled 1

  384 15:43:32.342035  PCI: 00:08.1: enabled 1

  385 15:43:32.342117  PCI: 00:08.2: enabled 0

  386 15:43:32.345301  PCI: 00:14.0: enabled 1

  387 15:43:32.349060  PCI: 00:14.3: enabled 1

  388 15:43:32.349142  PCI: 00:18.0: enabled 1

  389 15:43:32.352276  PCI: 00:18.1: enabled 1

  390 15:43:32.352358  PCI: 00:18.2: enabled 1

  391 15:43:32.355393  PCI: 00:18.3: enabled 1

  392 15:43:32.359046  PCI: 00:18.4: enabled 1

  393 15:43:32.359128  PCI: 00:18.5: enabled 1

  394 15:43:32.362180  PCI: 00:18.6: enabled 1

  395 15:43:32.365430  I2C: 00:50: enabled 1

  396 15:43:32.365513  I2C: 00:15: enabled 1

  397 15:43:32.369264  I2C: 00:10: enabled 1

  398 15:43:32.369346  I2C: 00:40: enabled 1

  399 15:43:32.372217  PCI: 00:00.0: enabled 1

  400 15:43:32.375799  PCI: 00:00.0: enabled 1

  401 15:43:32.375883  PCI: 00:00.1: enabled 1

  402 15:43:32.378944  PCI: 00:00.2: enabled 1

  403 15:43:32.382096  PCI: 00:00.3: enabled 1

  404 15:43:32.382179  PCI: 00:00.5: enabled 1

  405 15:43:32.385309  PCI: 00:00.6: enabled 0

  406 15:43:32.389083  PCI: 00:00.7: enabled 1

  407 15:43:32.389166  PCI: 00:00.0: enabled 0

  408 15:43:32.392145  PNP: 0c09.0: enabled 1

  409 15:43:32.395449  USB0 port 0: enabled 1

  410 15:43:32.395531  GENERIC: 0.0: enabled 1

  411 15:43:32.398820  GENERIC: 1.0: enabled 0

  412 15:43:32.402559  GENERIC: 0.0: enabled 1

  413 15:43:32.402641  GENERIC: 0.0: enabled 1

  414 15:43:32.405886  GENERIC: 1.0: enabled 0

  415 15:43:32.405969  USB2 port 0: enabled 1

  416 15:43:32.408949  USB2 port 1: enabled 1

  417 15:43:32.412810  USB2 port 2: enabled 1

  418 15:43:32.412893  USB2 port 3: enabled 1

  419 15:43:32.415859  USB2 port 4: enabled 1

  420 15:43:32.418993  USB2 port 5: enabled 1

  421 15:43:32.419076  USB3 port 0: enabled 1

  422 15:43:32.422673  USB3 port 1: enabled 1

  423 15:43:32.422756  USB3 port 2: enabled 1

  424 15:43:32.425788  USB3 port 3: enabled 1

  425 15:43:32.429678  I2C: 00:1a: enabled 1

  426 15:43:32.429760  I2C: 00:1a: enabled 1

  427 15:43:32.432933  Compare with tree...

  428 15:43:32.433015  Root Device: enabled 1

  429 15:43:32.436308   CPU_CLUSTER: 0: enabled 1

  430 15:43:32.439490    APIC: 00: enabled 1

  431 15:43:32.439572   DOMAIN: 0000: enabled 1

  432 15:43:32.442672    PCI: 00:00.0: enabled 1

  433 15:43:32.445913    PCI: 00:00.2: enabled 1

  434 15:43:32.449660    PCI: 00:01.0: enabled 1

  435 15:43:32.449742    PCI: 00:01.1: enabled 0

  436 15:43:32.452964    PCI: 00:01.2: enabled 1

  437 15:43:32.456236     PCI: 00:00.0: enabled 1

  438 15:43:32.456319    PCI: 00:01.3: enabled 1

  439 15:43:32.459552    PCI: 00:01.4: enabled 0

  440 15:43:32.462856    PCI: 00:01.5: enabled 0

  441 15:43:32.462938    PCI: 00:08.0: enabled 1

  442 15:43:32.466587    PCI: 00:08.1: enabled 1

  443 15:43:32.469530     PCI: 00:00.0: enabled 1

  444 15:43:32.472994     PCI: 00:00.1: enabled 1

  445 15:43:32.473076     PCI: 00:00.2: enabled 1

  446 15:43:32.476266     PCI: 00:00.3: enabled 1

  447 15:43:32.479922      USB0 port 0: enabled 1

  448 15:43:32.483043       USB2 port 0: enabled 1

  449 15:43:32.483146       USB2 port 1: enabled 1

  450 15:43:32.486768       USB2 port 2: enabled 1

  451 15:43:32.489919       USB2 port 3: enabled 1

  452 15:43:32.493147       USB2 port 4: enabled 1

  453 15:43:32.493260       USB2 port 5: enabled 1

  454 15:43:32.496375       USB3 port 0: enabled 1

  455 15:43:32.499412       USB3 port 1: enabled 1

  456 15:43:32.503343       USB3 port 2: enabled 1

  457 15:43:32.503525       USB3 port 3: enabled 1

  458 15:43:32.506381     PCI: 00:00.5: enabled 1

  459 15:43:32.509609      GENERIC: 0.0: enabled 1

  460 15:43:32.513118      GENERIC: 1.0: enabled 0

  461 15:43:32.513294     PCI: 00:00.6: enabled 0

  462 15:43:32.516215     PCI: 00:00.7: enabled 1

  463 15:43:32.519827    PCI: 00:08.2: enabled 0

  464 15:43:32.523226     PCI: 00:00.0: enabled 0

  465 15:43:32.523468    PCI: 00:14.0: enabled 1

  466 15:43:32.526322    PCI: 00:14.3: enabled 1

  467 15:43:32.530030     PNP: 0c09.0: enabled 1

  468 15:43:32.530497      GENERIC: 0.0: enabled 1

  469 15:43:32.533101       I2C: 00:1a: enabled 1

  470 15:43:32.536602      GENERIC: 0.0: enabled 1

  471 15:43:32.540315      GENERIC: 1.0: enabled 0

  472 15:43:32.540744       I2C: 00:1a: enabled 1

  473 15:43:32.543493    PCI: 00:18.0: enabled 1

  474 15:43:32.546596    PCI: 00:18.1: enabled 1

  475 15:43:32.549862    PCI: 00:18.2: enabled 1

  476 15:43:32.550289    PCI: 00:18.3: enabled 1

  477 15:43:32.553656    PCI: 00:18.4: enabled 1

  478 15:43:32.556938    PCI: 00:18.5: enabled 1

  479 15:43:32.557379    PCI: 00:18.6: enabled 1

  480 15:43:32.560064   MMIO: fedc5000: enabled 1

  481 15:43:32.563549    I2C: 00:50: enabled 1

  482 15:43:32.564121   MMIO: fedca000: enabled 0

  483 15:43:32.566642   MMIO: fedce000: enabled 0

  484 15:43:32.569856   MMIO: fedcf000: enabled 0

  485 15:43:32.573021   MMIO: fedc4000: enabled 1

  486 15:43:32.573446    I2C: 00:15: enabled 1

  487 15:43:32.576663    I2C: 00:10: enabled 1

  488 15:43:32.580166    I2C: 00:40: enabled 1

  489 15:43:32.580680   GENERIC: 0.1: enabled 1

  490 15:43:32.583395  Mainboard Gumboz Enable.

  491 15:43:32.586702  Root Device scanning...

  492 15:43:32.587124  scan_static_bus for Root Device

  493 15:43:32.590343  CPU_CLUSTER: 0 enabled

  494 15:43:32.593440  DOMAIN: 0000 enabled

  495 15:43:32.594004  MMIO: fedc5000 enabled

  496 15:43:32.596760  MMIO: fedca000 disabled

  497 15:43:32.599972  MMIO: fedce000 disabled

  498 15:43:32.600399  MMIO: fedcf000 disabled

  499 15:43:32.603630  MMIO: fedc4000 enabled

  500 15:43:32.604195  GENERIC: 0.1 enabled

  501 15:43:32.606733  DOMAIN: 0000 scanning...

  502 15:43:32.610703  PCI: pci_scan_bus for bus 00

  503 15:43:32.611229  POST: 0x24

  504 15:43:32.613978  PCI: 00:00.0 [1022/15d0] ops

  505 15:43:32.617345  PCI: 00:00.0 [1022/15d0] enabled

  506 15:43:32.620390  PCI: 00:00.2 [1022/0000] ops

  507 15:43:32.623409  PCI: 00:00.2 [1022/15d1] enabled

  508 15:43:32.623836  PCI: 00:01.0 [1022/1452] enabled

  509 15:43:32.627344  PCI: 00:01.2 [1022/15d3] bus ops

  510 15:43:32.630654  PCI: 00:01.2 [1022/15d3] enabled

  511 15:43:32.636601  PCI: Static device PCI: 00:01.3 not found, disabling it.

  512 15:43:32.640561  PCI: 00:08.0 [1022/1452] enabled

  513 15:43:32.643653  PCI: 00:08.1 [1022/0000] bus ops

  514 15:43:32.644346  PCI: 00:08.1 [1022/15db] enabled

  515 15:43:32.646824  PCI: 00:14.0 [1022/790b] bus ops

  516 15:43:32.650581  PCI: 00:14.0 [1022/790b] enabled

  517 15:43:32.653788  PCI: 00:14.3 [1022/0000] bus ops

  518 15:43:32.657502  PCI: 00:14.3 [1022/790e] enabled

  519 15:43:32.660916  PCI: 00:18.0 [1022/0000] ops

  520 15:43:32.664092  PCI: 00:18.0 [1022/15e8] enabled

  521 15:43:32.664582  PCI: 00:18.1 [1022/0000] ops

  522 15:43:32.667454  PCI: 00:18.1 [1022/15e9] enabled

  523 15:43:32.670721  PCI: 00:18.2 [1022/0000] ops

  524 15:43:32.673940  PCI: 00:18.2 [1022/15ea] enabled

  525 15:43:32.677083  PCI: 00:18.3 [1022/0000] ops

  526 15:43:32.680310  PCI: 00:18.3 [1022/15eb] enabled

  527 15:43:32.680763  PCI: 00:18.4 [1022/0000] ops

  528 15:43:32.683657  PCI: 00:18.4 [1022/15ec] enabled

  529 15:43:32.687429  PCI: 00:18.5 [1022/0000] ops

  530 15:43:32.732228  PCI: 00:18.5 [1022/15ed] enabled

  531 15:43:32.732854  PCI: 00:18.6 [1022/0000] ops

  532 15:43:32.733569  PCI: 00:18.6 [1022/15ee] enabled

  533 15:43:32.733926  PCI: 00:18.7 [1022/15ef] enabled

  534 15:43:32.734239  POST: 0x25

  535 15:43:32.734537  PCI: Leftover static devices:

  536 15:43:32.734831  PCI: 00:01.1

  537 15:43:32.735122  PCI: 00:01.3

  538 15:43:32.735405  PCI: 00:01.4

  539 15:43:32.735686  PCI: 00:01.5

  540 15:43:32.736005  PCI: 00:08.2

  541 15:43:32.736295  PCI: Check your devicetree.cb.

  542 15:43:32.736577  PCI: 00:01.2 scanning...

  543 15:43:32.736855  do_pci_scan_bridge for PCI: 00:01.2

  544 15:43:32.737126  PCI: pci_scan_bus for bus 01

  545 15:43:32.737617  POST: 0x24

  546 15:43:32.737984  PCI: 01:00.0 [10ec/c822] enabled

  547 15:43:32.738274  POST: 0x25

  548 15:43:32.738551  POST: 0x55

  549 15:43:32.738827  Enabling Common Clock Configuration

  550 15:43:32.739104  L1 Sub-State supported from root port 1

  551 15:43:32.777319  L1 Sub-State Support = 0xf

  552 15:43:32.777832  CommonModeRestoreTime = 0x1e

  553 15:43:32.778172  Power On Value = 0x1e, Power On Scale = 0x0

  554 15:43:32.778488  ASPM: Enabled L1

  555 15:43:32.778786  PCIe: Max_Payload_Size adjusted to 128

  556 15:43:32.779082  scan_bus: bus PCI: 00:01.2 finished in 33 msecs

  557 15:43:32.779370  PCI: 00:08.1 scanning...

  558 15:43:32.780040  do_pci_scan_bridge for PCI: 00:08.1

  559 15:43:32.780559  PCI: pci_scan_bus for bus 02

  560 15:43:32.781097  POST: 0x24

  561 15:43:32.781573  PCI: 02:00.0 [1002/0000] ops

  562 15:43:32.781892  PCI: 02:00.0 [1002/15d8] enabled

  563 15:43:32.782195  PCI: 02:00.1 [1002/15de] enabled

  564 15:43:32.782486  PCI: 02:00.2 [1022/15df] enabled

  565 15:43:32.782769  PCI: 02:00.3 [1022/0000] bus ops

  566 15:43:32.783050  PCI: 02:00.3 [1022/15e5] enabled

  567 15:43:32.783391  PCI: 02:00.5 [1022/15e2] bus ops

  568 15:43:32.784466  PCI: 02:00.5 [1022/15e2] enabled

  569 15:43:32.787649  PCI: 02:00.7 [1022/15e4] enabled

  570 15:43:32.788108  POST: 0x25

  571 15:43:32.791632  PCI: Leftover static devices:

  572 15:43:32.792101  PCI: 02:00.6

  573 15:43:32.794893  PCI: Check your devicetree.cb.

  574 15:43:32.798010  PCI: 02:00.3 scanning...

  575 15:43:32.801095  scan_static_bus for PCI: 02:00.3

  576 15:43:32.801528  USB0 port 0 enabled

  577 15:43:32.804453  USB0 port 0 scanning...

  578 15:43:32.808213  scan_static_bus for USB0 port 0

  579 15:43:32.808641  USB2 port 0 enabled

  580 15:43:32.811438  USB2 port 1 enabled

  581 15:43:32.811864  USB2 port 2 enabled

  582 15:43:32.814705  USB2 port 3 enabled

  583 15:43:32.815129  USB2 port 4 enabled

  584 15:43:32.817654  USB2 port 5 enabled

  585 15:43:32.818081  USB3 port 0 enabled

  586 15:43:32.821358  USB3 port 1 enabled

  587 15:43:32.824789  USB3 port 2 enabled

  588 15:43:32.825504  USB3 port 3 enabled

  589 15:43:32.828390  USB2 port 0 scanning...

  590 15:43:32.831342  scan_static_bus for USB2 port 0

  591 15:43:32.834911  scan_static_bus for USB2 port 0 done

  592 15:43:32.838067  scan_bus: bus USB2 port 0 finished in 6 msecs

  593 15:43:32.838512  USB2 port 1 scanning...

  594 15:43:32.841295  scan_static_bus for USB2 port 1

  595 15:43:32.844757  scan_static_bus for USB2 port 1 done

  596 15:43:32.851634  scan_bus: bus USB2 port 1 finished in 6 msecs

  597 15:43:32.852207  USB2 port 2 scanning...

  598 15:43:32.854680  scan_static_bus for USB2 port 2

  599 15:43:32.858667  scan_static_bus for USB2 port 2 done

  600 15:43:32.861753  scan_bus: bus USB2 port 2 finished in 6 msecs

  601 15:43:32.864914  USB2 port 3 scanning...

  602 15:43:32.868608  scan_static_bus for USB2 port 3

  603 15:43:32.871956  scan_static_bus for USB2 port 3 done

  604 15:43:32.875197  scan_bus: bus USB2 port 3 finished in 6 msecs

  605 15:43:32.878460  USB2 port 4 scanning...

  606 15:43:32.878951  scan_static_bus for USB2 port 4

  607 15:43:32.881864  scan_static_bus for USB2 port 4 done

  608 15:43:32.889030  scan_bus: bus USB2 port 4 finished in 6 msecs

  609 15:43:32.889456  USB2 port 5 scanning...

  610 15:43:32.892237  scan_static_bus for USB2 port 5

  611 15:43:32.895326  scan_static_bus for USB2 port 5 done

  612 15:43:32.898500  scan_bus: bus USB2 port 5 finished in 6 msecs

  613 15:43:32.902294  USB3 port 0 scanning...

  614 15:43:32.905499  scan_static_bus for USB3 port 0

  615 15:43:32.908928  scan_static_bus for USB3 port 0 done

  616 15:43:32.912005  scan_bus: bus USB3 port 0 finished in 6 msecs

  617 15:43:32.915472  USB3 port 1 scanning...

  618 15:43:32.918614  scan_static_bus for USB3 port 1

  619 15:43:32.922490  scan_static_bus for USB3 port 1 done

  620 15:43:32.925731  scan_bus: bus USB3 port 1 finished in 6 msecs

  621 15:43:32.926183  USB3 port 2 scanning...

  622 15:43:32.928870  scan_static_bus for USB3 port 2

  623 15:43:32.932420  scan_static_bus for USB3 port 2 done

  624 15:43:32.938600  scan_bus: bus USB3 port 2 finished in 6 msecs

  625 15:43:32.939126  USB3 port 3 scanning...

  626 15:43:32.942084  scan_static_bus for USB3 port 3

  627 15:43:32.945552  scan_static_bus for USB3 port 3 done

  628 15:43:32.948608  scan_bus: bus USB3 port 3 finished in 6 msecs

  629 15:43:32.952395  scan_static_bus for USB0 port 0 done

  630 15:43:32.958685  scan_bus: bus USB0 port 0 finished in 149 msecs

  631 15:43:32.962439  scan_static_bus for PCI: 02:00.3 done

  632 15:43:32.965588  scan_bus: bus PCI: 02:00.3 finished in 163 msecs

  633 15:43:32.968821  PCI: 02:00.5 scanning...

  634 15:43:32.969311  scan_static_bus for PCI: 02:00.5

  635 15:43:32.971995  GENERIC: 0.0 enabled

  636 15:43:32.975755  GENERIC: 1.0 disabled

  637 15:43:32.979105  scan_static_bus for PCI: 02:00.5 done

  638 15:43:32.982181  scan_bus: bus PCI: 02:00.5 finished in 10 msecs

  639 15:43:32.982470  POST: 0x55

  640 15:43:32.988946  scan_bus: bus PCI: 00:08.1 finished in 229 msecs

  641 15:43:32.989187  PCI: 00:14.0 scanning...

  642 15:43:32.992028  scan_generic_bus for PCI: 00:14.0

  643 15:43:32.995864  scan_generic_bus for PCI: 00:14.0 done

  644 15:43:32.999171  scan_bus: bus PCI: 00:14.0 finished in 6 msecs

  645 15:43:33.002329  PCI: 00:14.3 scanning...

  646 15:43:33.005594  scan_static_bus for PCI: 00:14.3

  647 15:43:33.008845  PNP: 0c09.0 enabled

  648 15:43:33.009125  PNP: 0c09.0 scanning...

  649 15:43:33.012082  scan_static_bus for PNP: 0c09.0

  650 15:43:33.015760  GENERIC: 0.0 enabled

  651 15:43:33.016166  GENERIC: 0.0 enabled

  652 15:43:33.019416  GENERIC: 1.0 disabled

  653 15:43:33.019778  GENERIC: 0.0 scanning...

  654 15:43:33.022688  scan_static_bus for GENERIC: 0.0

  655 15:43:33.025795  I2C: 00:1a enabled

  656 15:43:33.029060  scan_static_bus for GENERIC: 0.0 done

  657 15:43:33.032758  scan_bus: bus GENERIC: 0.0 finished in 8 msecs

  658 15:43:33.035898  GENERIC: 0.0 scanning...

  659 15:43:33.039054  scan_static_bus for GENERIC: 0.0

  660 15:43:33.042484  scan_static_bus for GENERIC: 0.0 done

  661 15:43:33.046165  scan_bus: bus GENERIC: 0.0 finished in 6 msecs

  662 15:43:33.049486  scan_static_bus for PNP: 0c09.0 done

  663 15:43:33.052492  scan_bus: bus PNP: 0c09.0 finished in 39 msecs

  664 15:43:33.055974  scan_static_bus for PCI: 00:14.3 done

  665 15:43:33.059616  scan_bus: bus PCI: 00:14.3 finished in 53 msecs

  666 15:43:33.062510  POST: 0x55

  667 15:43:33.066292  scan_bus: bus DOMAIN: 0000 finished in 453 msecs

  668 15:43:33.069276  MMIO: fedc5000 scanning...

  669 15:43:33.073269  scan_generic_bus for MMIO: fedc5000

  670 15:43:33.076411  bus: MMIO: fedc5000[0]->I2C: 01:50 enabled

  671 15:43:33.079597  scan_generic_bus for MMIO: fedc5000 done

  672 15:43:33.082772  scan_bus: bus MMIO: fedc5000 finished in 10 msecs

  673 15:43:33.085971  MMIO: fedc4000 scanning...

  674 15:43:33.089940  scan_generic_bus for MMIO: fedc4000

  675 15:43:33.093060  bus: MMIO: fedc4000[0]->I2C: 02:15 enabled

  676 15:43:33.096129  bus: MMIO: fedc4000[0]->I2C: 02:10 enabled

  677 15:43:33.099349  bus: MMIO: fedc4000[0]->I2C: 02:40 enabled

  678 15:43:33.106180  scan_generic_bus for MMIO: fedc4000 done

  679 15:43:33.109415  scan_bus: bus MMIO: fedc4000 finished in 18 msecs

  680 15:43:33.112836  scan_static_bus for Root Device done

  681 15:43:33.116091  scan_bus: bus Root Device finished in 526 msecs

  682 15:43:33.116175  done

  683 15:43:33.122462  BS: BS_DEV_ENUMERATE run times (exec / console): 2 / 824 ms

  684 15:43:33.122589  POST: 0x73

  685 15:43:33.126029  found VGA at PCI: 02:00.0

  686 15:43:33.129394  Setting up VGA for PCI: 02:00.0

  687 15:43:33.132609  Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:08.1

  688 15:43:33.136412  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

  689 15:43:33.142732  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

  690 15:43:33.142837  Allocating resources...

  691 15:43:33.146673  Reading resources...

  692 15:43:33.151191  Root Device read_resources bus 0 link: 0

  693 15:43:33.154340  CPU_CLUSTER: 0 read_resources bus 0 link: 0

  694 15:43:33.157495  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

  695 15:43:33.161206  DOMAIN: 0000 read_resources bus 0 link: 0

  696 15:43:33.167481  Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.

  697 15:43:33.171015  PCI: 00:01.2 read_resources bus 1 link: 0

  698 15:43:33.174125  PCI: 00:01.2 read_resources bus 1 link: 0 done

  699 15:43:33.181095  PCI: 00:08.1 read_resources bus 2 link: 0

  700 15:43:33.184318  PCI: 02:00.3 read_resources bus 0 link: 0

  701 15:43:33.187296  USB0 port 0 read_resources bus 0 link: 0

  702 15:43:33.191302  USB0 port 0 read_resources bus 0 link: 0 done

  703 15:43:33.197723  PCI: 02:00.3 read_resources bus 0 link: 0 done

  704 15:43:33.201033  PCI: 02:00.5 read_resources bus 0 link: 0

  705 15:43:33.204338  PCI: 02:00.5 read_resources bus 0 link: 0 done

  706 15:43:33.207587  PCI: 00:08.1 read_resources bus 2 link: 0 done

  707 15:43:33.211487  ACPI GNVS at 0xca676000

  708 15:43:33.214739  PCI: 00:14.3 read_resources bus 0 link: 0

  709 15:43:33.217950  PNP: 0c09.0 read_resources bus 0 link: 0

  710 15:43:33.221080  GENERIC: 0.0 read_resources bus 0 link: 0

  711 15:43:33.228228  GENERIC: 0.0 read_resources bus 0 link: 0 done

  712 15:43:33.231543  PNP: 0c09.0 read_resources bus 0 link: 0 done

  713 15:43:33.234527  PCI: 00:14.3 read_resources bus 0 link: 0 done

  714 15:43:33.238044  DOMAIN: 0000 read_resources bus 0 link: 0 done

  715 15:43:33.245026  MMIO: fedc5000 read_resources bus 1 link: 0

  716 15:43:33.248103  MMIO: fedc5000 read_resources bus 1 link: 0 done

  717 15:43:33.251427  MMIO: fedc4000 read_resources bus 2 link: 0

  718 15:43:33.254762  MMIO: fedc4000 read_resources bus 2 link: 0 done

  719 15:43:33.261889  Root Device read_resources bus 0 link: 0 done

  720 15:43:33.261973  Done reading resources.

  721 15:43:33.268569  Show resources in subtree (Root Device)...After reading.

  722 15:43:33.271694   Root Device child on link 0 CPU_CLUSTER: 0

  723 15:43:33.274755    CPU_CLUSTER: 0 child on link 0 APIC: 00

  724 15:43:33.274868     APIC: 00

  725 15:43:33.282008    DOMAIN: 0000 child on link 0 PCI: 00:00.0

  726 15:43:33.288605    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

  727 15:43:33.298470    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffffffff flags 40040200 index 10000100

  728 15:43:33.298556     PCI: 00:00.0

  729 15:43:33.305063     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0

  730 15:43:33.315875     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

  731 15:43:33.322538     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 2

  732 15:43:33.332774     PCI: 00:00.0 resource base 100000 size 1f00000 align 0 gran 0 limit 0 flags e0004200 index 3

  733 15:43:33.339106     PCI: 00:00.0 resource base 2000000 size 1c0000 align 0 gran 0 limit 0 flags f0004200 index 4

  734 15:43:33.347844     PCI: 00:00.0 resource base 21c0000 size c9640000 align 0 gran 0 limit 0 flags e0004200 index 5

  735 15:43:33.359731     PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058

  736 15:43:33.366378     PCI: 00:00.0 resource base cc000000 size 4000000 align 0 gran 0 limit 0 flags f0004200 index 6

  737 15:43:33.376594     PCI: 00:00.0 resource base 100000000 size 2f340000 align 0 gran 0 limit 0 flags e0004200 index 7

  738 15:43:33.382887     PCI: 00:00.0 resource base 12f340000 size cc0000 align 0 gran 0 limit 0 flags f0004200 index 8

  739 15:43:33.393530     PCI: 00:00.0 resource base cb800000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 9

  740 15:43:33.400010     PCI: 00:00.0 resource base cb7fe000 size 2000 align 0 gran 0 limit 0 flags f0004200 index a

  741 15:43:33.409733     PCI: 00:00.0 resource base ca7fe000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

  742 15:43:33.419780     PCI: 00:00.0 resource base fec01000 size 1000 align 0 gran 0 limit 0 flags c0000200 index fec01000

  743 15:43:33.420316     PCI: 00:00.2

  744 15:43:33.426375     PCI: 00:00.2 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 44

  745 15:43:33.430224     PCI: 00:01.0

  746 15:43:33.433903     PCI: 00:01.2 child on link 0 PCI: 01:00.0

  747 15:43:33.443375     PCI: 00:01.2 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c

  748 15:43:33.449953     PCI: 00:01.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

  749 15:43:33.460068     PCI: 00:01.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

  750 15:43:33.460612      PCI: 01:00.0

  751 15:43:33.466842      PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10

  752 15:43:33.476797      PCI: 01:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 18

  753 15:43:33.477325     PCI: 00:08.0

  754 15:43:33.483688     PCI: 00:08.1 child on link 0 PCI: 02:00.0

  755 15:43:33.490346     PCI: 00:08.1 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c

  756 15:43:33.500217     PCI: 00:08.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

  757 15:43:33.507260     PCI: 00:08.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

  758 15:43:33.510415      PCI: 02:00.0

  759 15:43:33.517022      PCI: 02:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 10

  760 15:43:33.527144      PCI: 02:00.0 resource base 0 size 200000 align 21 gran 21 limit ffffffffffffffff flags 1201 index 18

  761 15:43:33.533670      PCI: 02:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 20

  762 15:43:33.543834      PCI: 02:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 24

  763 15:43:33.543934      PCI: 02:00.1

  764 15:43:33.553656      PCI: 02:00.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10

  765 15:43:33.553760      PCI: 02:00.2

  766 15:43:33.563434      PCI: 02:00.2 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 18

  767 15:43:33.570401      PCI: 02:00.2 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 24

  768 15:43:33.576577      PCI: 02:00.3 child on link 0 USB0 port 0

  769 15:43:33.583832      PCI: 02:00.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 10

  770 15:43:33.586737       USB0 port 0 child on link 0 USB2 port 0

  771 15:43:33.590417        USB2 port 0

  772 15:43:33.590668        USB2 port 1

  773 15:43:33.593817        USB2 port 2

  774 15:43:33.594151        USB2 port 3

  775 15:43:33.596815        USB2 port 4

  776 15:43:33.597186        USB2 port 5

  777 15:43:33.600509        USB3 port 0

  778 15:43:33.600899        USB3 port 1

  779 15:43:33.603749        USB3 port 2

  780 15:43:33.604257        USB3 port 3

  781 15:43:33.610354      PCI: 02:00.5 child on link 0 GENERIC: 0.0

  782 15:43:33.617109      PCI: 02:00.5 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 10

  783 15:43:33.620396       GENERIC: 0.0

  784 15:43:33.620821       GENERIC: 1.0

  785 15:43:33.623616      PCI: 02:00.7

  786 15:43:33.630429      PCI: 02:00.7 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 18

  787 15:43:33.640974      PCI: 02:00.7 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 24

  788 15:43:33.641508     PCI: 00:14.0

  789 15:43:33.643883     PCI: 00:14.3 child on link 0 PNP: 0c09.0

  790 15:43:33.654404     PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000

  791 15:43:33.663729     PCI: 00:14.3 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100

  792 15:43:33.671112     PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2

  793 15:43:33.677492     PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3

  794 15:43:33.687384     PCI: 00:14.3 resource base fedc4000 size 2000 align 0 gran 0 limit 0 flags c0000200 index 4

  795 15:43:33.690909      PNP: 0c09.0 child on link 0 GENERIC: 0.0

  796 15:43:33.701092      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

  797 15:43:33.704109       GENERIC: 0.0 child on link 0 I2C: 00:1a

  798 15:43:33.704536        I2C: 00:1a

  799 15:43:33.707680       GENERIC: 0.0

  800 15:43:33.710718       GENERIC: 1.0 child on link 0 I2C: 00:1a

  801 15:43:33.711145        I2C: 00:1a

  802 15:43:33.714530     PCI: 00:18.0

  803 15:43:33.714952     PCI: 00:18.1

  804 15:43:33.717787     PCI: 00:18.2

  805 15:43:33.718211     PCI: 00:18.3

  806 15:43:33.721106     PCI: 00:18.4

  807 15:43:33.721581     PCI: 00:18.5

  808 15:43:33.721919     PCI: 00:18.6

  809 15:43:33.724470     PCI: 00:18.7

  810 15:43:33.727552    MMIO: fedc5000 child on link 0 I2C: 01:50

  811 15:43:33.728018     I2C: 01:50

  812 15:43:33.730941    MMIO: fedca000

  813 15:43:33.731362    MMIO: fedce000

  814 15:43:33.734643    MMIO: fedcf000

  815 15:43:33.737958    MMIO: fedc4000 child on link 0 I2C: 02:15

  816 15:43:33.738383     I2C: 02:15

  817 15:43:33.741103     I2C: 02:10

  818 15:43:33.741745     I2C: 02:40

  819 15:43:33.744319    GENERIC: 0.1

  820 15:43:33.751169  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

  821 15:43:33.754342   PCI: 00:01.2 io: size: 0 align: 12 gran: 12 limit: ffffffff

  822 15:43:33.758369    PCI: 01:00.0 10 *  [0x0 - 0xff] io

  823 15:43:33.764457   PCI: 00:01.2 io: size: 1000 align: 12 gran: 12 limit: ffff done

  824 15:43:33.771408   PCI: 00:01.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff

  825 15:43:33.774851    PCI: 01:00.0 18 *  [0x0 - 0xffff] mem

  826 15:43:33.781711   PCI: 00:01.2 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

  827 15:43:33.784793   PCI: 00:01.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

  828 15:43:33.794559   PCI: 00:01.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

  829 15:43:33.798388   PCI: 00:08.1 io: size: 0 align: 12 gran: 12 limit: ffffffff

  830 15:43:33.801580    PCI: 02:00.0 20 *  [0x0 - 0xff] io

  831 15:43:33.807901   PCI: 00:08.1 io: size: 1000 align: 12 gran: 12 limit: ffff done

  832 15:43:33.811527   PCI: 00:08.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff

  833 15:43:33.818170    PCI: 02:00.2 18 *  [0x0 - 0xfffff] mem

  834 15:43:33.821759    PCI: 02:00.3 10 *  [0x100000 - 0x1fffff] mem

  835 15:43:33.824950    PCI: 02:00.7 18 *  [0x200000 - 0x2fffff] mem

  836 15:43:33.828479    PCI: 02:00.0 24 *  [0x300000 - 0x37ffff] mem

  837 15:43:33.834752    PCI: 02:00.5 10 *  [0x380000 - 0x3bffff] mem

  838 15:43:33.838078    PCI: 02:00.1 10 *  [0x3c0000 - 0x3c3fff] mem

  839 15:43:33.841970    PCI: 02:00.2 24 *  [0x3c4000 - 0x3c5fff] mem

  840 15:43:33.845253    PCI: 02:00.7 24 *  [0x3c6000 - 0x3c7fff] mem

  841 15:43:33.851818   PCI: 00:08.1 mem: size: 400000 align: 20 gran: 20 limit: ffffffff done

  842 15:43:33.858828   PCI: 00:08.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

  843 15:43:33.862001    PCI: 02:00.0 10 *  [0x0 - 0xfffffff] prefmem

  844 15:43:33.868533    PCI: 02:00.0 18 *  [0x10000000 - 0x101fffff] prefmem

  845 15:43:33.875547   PCI: 00:08.1 prefmem: size: 10200000 align: 28 gran: 20 limit: ffffffffffffffff done

  846 15:43:33.882093  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

  847 15:43:33.888973  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

  848 15:43:33.895305   update_constraints: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed)

  849 15:43:33.902337   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

  850 15:43:33.905695   DOMAIN: 0000: Resource ranges:

  851 15:43:33.908681   * Base: 1000, Size: f000, Tag: 100

  852 15:43:33.911742    PCI: 00:01.2 1c *  [0x1000 - 0x1fff] limit: 1fff io

  853 15:43:33.915649    PCI: 00:08.1 1c *  [0x2000 - 0x2fff] limit: 2fff io

  854 15:43:33.921873  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

  855 15:43:33.928624  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffffffff

  856 15:43:33.935541   update_constraints: PCI: 00:00.0 00 base 00000000 limit 0009ffff mem (fixed)

  857 15:43:33.942033   update_constraints: PCI: 00:00.0 01 base 000a0000 limit 000bffff mem (fixed)

  858 15:43:33.948583   update_constraints: PCI: 00:00.0 02 base 000c0000 limit 000fffff mem (fixed)

  859 15:43:33.956363   update_constraints: PCI: 00:00.0 03 base 00100000 limit 01ffffff mem (fixed)

  860 15:43:33.963274   update_constraints: PCI: 00:00.0 04 base 02000000 limit 021bffff mem (fixed)

  861 15:43:33.969777   update_constraints: PCI: 00:00.0 05 base 021c0000 limit cb7fffff mem (fixed)

  862 15:43:33.976487   update_constraints: PCI: 00:00.0 c0010058 base f8000000 limit fbffffff mem (fixed)

  863 15:43:33.982862   update_constraints: PCI: 00:00.0 06 base cc000000 limit cfffffff mem (fixed)

  864 15:43:33.990037   update_constraints: PCI: 00:00.0 07 base 100000000 limit 12f33ffff mem (fixed)

  865 15:43:33.996774   update_constraints: PCI: 00:00.0 08 base 12f340000 limit 12fffffff mem (fixed)

  866 15:43:34.006930   update_constraints: PCI: 00:00.0 09 base cb800000 limit cbffffff mem (fixed)

  867 15:43:34.013891   update_constraints: PCI: 00:00.0 0a base cb7fe000 limit cb7fffff mem (fixed)

  868 15:43:34.020036   update_constraints: PCI: 00:00.0 0b base ca7fe000 limit cb7fdfff mem (fixed)

  869 15:43:34.027352   update_constraints: PCI: 00:00.0 fec01000 base fec01000 limit fec01fff mem (fixed)

  870 15:43:34.034079   update_constraints: PCI: 00:14.3 10000100 base ff000000 limit ffffffff mem (fixed)

  871 15:43:34.040623   update_constraints: PCI: 00:14.3 02 base fec10000 limit fec103ff mem (fixed)

  872 15:43:34.047277   update_constraints: PCI: 00:14.3 03 base fec00000 limit fec00fff mem (fixed)

  873 15:43:34.054123   update_constraints: PCI: 00:14.3 04 base fedc4000 limit fedc5fff mem (fixed)

  874 15:43:34.056885   DOMAIN: 0000: Resource ranges:

  875 15:43:34.060113   * Base: d0000000, Size: 28000000, Tag: 200

  876 15:43:34.064237   * Base: fc000000, Size: 2c00000, Tag: 200

  877 15:43:34.067335   * Base: fec02000, Size: e000, Tag: 200

  878 15:43:34.073991   * Base: fec11000, Size: 1b3000, Tag: 200

  879 15:43:34.077138   * Base: fedc6000, Size: 23a000, Tag: 200

  880 15:43:34.080420   * Base: 130000000, Size: fffed0000000, Tag: 100200

  881 15:43:34.087516    PCI: 00:08.1 24 *  [0xd0000000 - 0xe01fffff] limit: e01fffff prefmem

  882 15:43:34.093923    PCI: 00:08.1 20 *  [0xe0200000 - 0xe05fffff] limit: e05fffff mem

  883 15:43:34.097144    PCI: 00:01.2 20 *  [0xe0600000 - 0xe06fffff] limit: e06fffff mem

  884 15:43:34.103827    PCI: 00:00.2 44 *  [0xe0700000 - 0xe077ffff] limit: e077ffff mem

  885 15:43:34.110226  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffffffff done

  886 15:43:34.117467  PCI: 00:01.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: 1fff

  887 15:43:34.121194   PCI: 00:01.2: Resource ranges:

  888 15:43:34.124368   * Base: 1000, Size: 1000, Tag: 100

  889 15:43:34.127635    PCI: 01:00.0 10 *  [0x1000 - 0x10ff] limit: 10ff io

  890 15:43:34.134353  PCI: 00:01.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: 1fff done

  891 15:43:34.141016  PCI: 00:01.2 mem: base: e0600000 size: 100000 align: 20 gran: 20 limit: e06fffff

  892 15:43:34.143688   PCI: 00:01.2: Resource ranges:

  893 15:43:34.147228   * Base: e0600000, Size: 100000, Tag: 200

  894 15:43:34.154205    PCI: 01:00.0 18 *  [0xe0600000 - 0xe060ffff] limit: e060ffff mem

  895 15:43:34.160911  PCI: 00:01.2 mem: base: e0600000 size: 100000 align: 20 gran: 20 limit: e06fffff done

  896 15:43:34.167843  PCI: 00:08.1 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff

  897 15:43:34.171032   PCI: 00:08.1: Resource ranges:

  898 15:43:34.174476   * Base: 2000, Size: 1000, Tag: 100

  899 15:43:34.177558    PCI: 02:00.0 20 *  [0x2000 - 0x20ff] limit: 20ff io

  900 15:43:34.184084  PCI: 00:08.1 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done

  901 15:43:34.194389  PCI: 00:08.1 prefmem: base: d0000000 size: 10200000 align: 28 gran: 20 limit: e01fffff

  902 15:43:34.194470   PCI: 00:08.1: Resource ranges:

  903 15:43:34.200848   * Base: d0000000, Size: 10200000, Tag: 1200

  904 15:43:34.208126    PCI: 02:00.0 10 *  [0xd0000000 - 0xdfffffff] limit: dfffffff prefmem

  905 15:43:34.211208    PCI: 02:00.0 18 *  [0xe0000000 - 0xe01fffff] limit: e01fffff prefmem

  906 15:43:34.221637  PCI: 00:08.1 prefmem: base: d0000000 size: 10200000 align: 28 gran: 20 limit: e01fffff done

  907 15:43:34.227613  PCI: 00:08.1 mem: base: e0200000 size: 400000 align: 20 gran: 20 limit: e05fffff

  908 15:43:34.231171   PCI: 00:08.1: Resource ranges:

  909 15:43:34.234444   * Base: e0200000, Size: 400000, Tag: 200

  910 15:43:34.241141    PCI: 02:00.2 18 *  [0xe0200000 - 0xe02fffff] limit: e02fffff mem

  911 15:43:34.244778    PCI: 02:00.3 10 *  [0xe0300000 - 0xe03fffff] limit: e03fffff mem

  912 15:43:34.251929    PCI: 02:00.7 18 *  [0xe0400000 - 0xe04fffff] limit: e04fffff mem

  913 15:43:34.258221    PCI: 02:00.0 24 *  [0xe0500000 - 0xe057ffff] limit: e057ffff mem

  914 15:43:34.265637    PCI: 02:00.5 10 *  [0xe0580000 - 0xe05bffff] limit: e05bffff mem

  915 15:43:34.268550    PCI: 02:00.1 10 *  [0xe05c0000 - 0xe05c3fff] limit: e05c3fff mem

  916 15:43:34.274904    PCI: 02:00.2 24 *  [0xe05c4000 - 0xe05c5fff] limit: e05c5fff mem

  917 15:43:34.281469    PCI: 02:00.7 24 *  [0xe05c6000 - 0xe05c7fff] limit: e05c7fff mem

  918 15:43:34.288516  PCI: 00:08.1 mem: base: e0200000 size: 400000 align: 20 gran: 20 limit: e05fffff done

  919 15:43:34.295049  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

  920 15:43:34.298191  Root Device assign_resources, bus 0 link: 0

  921 15:43:34.302035  DOMAIN: 0000 assign_resources, bus 0 link: 0

  922 15:43:34.312342  PCI: 00:00.2 44 <- [0x00e0700000 - 0x00e077ffff] size 0x00080000 gran 0x13 mem

  923 15:43:34.318837  PCI: 00:01.2 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io

  924 15:43:34.325463  PCI: 00:01.2 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

  925 15:43:34.335633  PCI: 00:01.2 20 <- [0x00e0600000 - 0x00e06fffff] size 0x00100000 gran 0x14 bus 01 mem

  926 15:43:34.338717  PCI: 00:01.2 assign_resources, bus 1 link: 0

  927 15:43:34.345746  PCI: 01:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io

  928 15:43:34.352038  PCI: 01:00.0 18 <- [0x00e0600000 - 0x00e060ffff] size 0x00010000 gran 0x10 mem64

  929 15:43:34.355756  PCI: 00:01.2 assign_resources, bus 1 link: 0

  930 15:43:34.365554  PCI: 00:08.1 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 02 io

  931 15:43:34.372546  PCI: 00:08.1 24 <- [0x00d0000000 - 0x00e01fffff] size 0x10200000 gran 0x14 bus 02 prefmem

  932 15:43:34.379375  PCI: 00:08.1 20 <- [0x00e0200000 - 0x00e05fffff] size 0x00400000 gran 0x14 bus 02 mem

  933 15:43:34.382678  PCI: 00:08.1 assign_resources, bus 2 link: 0

  934 15:43:34.392607  PCI: 02:00.0 10 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64

  935 15:43:34.399255  PCI: 02:00.0 18 <- [0x00e0000000 - 0x00e01fffff] size 0x00200000 gran 0x15 prefmem64

  936 15:43:34.406376  PCI: 02:00.0 20 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io

  937 15:43:34.412802  PCI: 02:00.0 24 <- [0x00e0500000 - 0x00e057ffff] size 0x00080000 gran 0x13 mem

  938 15:43:34.419804  PCI: 02:00.1 10 <- [0x00e05c0000 - 0x00e05c3fff] size 0x00004000 gran 0x0e mem

  939 15:43:34.426570  PCI: 02:00.2 18 <- [0x00e0200000 - 0x00e02fffff] size 0x00100000 gran 0x14 mem

  940 15:43:34.433558  PCI: 02:00.2 24 <- [0x00e05c4000 - 0x00e05c5fff] size 0x00002000 gran 0x0d mem

  941 15:43:34.439942  PCI: 02:00.3 10 <- [0x00e0300000 - 0x00e03fffff] size 0x00100000 gran 0x14 mem64

  942 15:43:34.443159  PCI: 02:00.3 assign_resources, bus 0 link: 0

  943 15:43:34.449974  PCI: 02:00.3 assign_resources, bus 0 link: 0

  944 15:43:34.456535  PCI: 02:00.5 10 <- [0x00e0580000 - 0x00e05bffff] size 0x00040000 gran 0x12 mem

  945 15:43:34.459758  PCI: 02:00.5 assign_resources, bus 0 link: 0

  946 15:43:34.463488  PCI: 02:00.5 assign_resources, bus 0 link: 0

  947 15:43:34.470016  PCI: 02:00.7 18 <- [0x00e0400000 - 0x00e04fffff] size 0x00100000 gran 0x14 mem

  948 15:43:34.476965  PCI: 02:00.7 24 <- [0x00e05c6000 - 0x00e05c7fff] size 0x00002000 gran 0x0d mem

  949 15:43:34.480391  PCI: 00:08.1 assign_resources, bus 2 link: 0

  950 15:43:34.487511  PCI: 00:14.3 assign_resources, bus 0 link: 0

  951 15:43:34.490690  PCI: 00:14.3 assign_resources, bus 0 link: 0

  952 15:43:34.493934  DOMAIN: 0000 assign_resources, bus 0 link: 0

  953 15:43:34.497593  Root Device assign_resources, bus 0 link: 0

  954 15:43:34.500822  Done setting resources.

  955 15:43:34.507753  Show resources in subtree (Root Device)...After assigning values.

  956 15:43:34.510485   Root Device child on link 0 CPU_CLUSTER: 0

  957 15:43:34.514654    CPU_CLUSTER: 0 child on link 0 APIC: 00

  958 15:43:34.515180     APIC: 00

  959 15:43:34.517607    DOMAIN: 0000 child on link 0 PCI: 00:00.0

  960 15:43:34.527461    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

  961 15:43:34.537596    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffffffff flags 40040200 index 10000100

  962 15:43:34.538193     PCI: 00:00.0

  963 15:43:34.544104     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0

  964 15:43:34.553940     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

  965 15:43:34.560871     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 2

  966 15:43:34.571318     PCI: 00:00.0 resource base 100000 size 1f00000 align 0 gran 0 limit 0 flags e0004200 index 3

  967 15:43:34.577977     PCI: 00:00.0 resource base 2000000 size 1c0000 align 0 gran 0 limit 0 flags f0004200 index 4

  968 15:43:34.587482     PCI: 00:00.0 resource base 21c0000 size c9640000 align 0 gran 0 limit 0 flags e0004200 index 5

  969 15:43:34.597481     PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058

  970 15:43:34.604169     PCI: 00:00.0 resource base cc000000 size 4000000 align 0 gran 0 limit 0 flags f0004200 index 6

  971 15:43:34.614981     PCI: 00:00.0 resource base 100000000 size 2f340000 align 0 gran 0 limit 0 flags e0004200 index 7

  972 15:43:34.621239     PCI: 00:00.0 resource base 12f340000 size cc0000 align 0 gran 0 limit 0 flags f0004200 index 8

  973 15:43:34.631376     PCI: 00:00.0 resource base cb800000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 9

  974 15:43:34.637743     PCI: 00:00.0 resource base cb7fe000 size 2000 align 0 gran 0 limit 0 flags f0004200 index a

  975 15:43:34.647943     PCI: 00:00.0 resource base ca7fe000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

  976 15:43:34.657945     PCI: 00:00.0 resource base fec01000 size 1000 align 0 gran 0 limit 0 flags c0000200 index fec01000

  977 15:43:34.658455     PCI: 00:00.2

  978 15:43:34.667830     PCI: 00:00.2 resource base e0700000 size 80000 align 19 gran 19 limit e077ffff flags 60000200 index 44

  979 15:43:34.668293     PCI: 00:01.0

  980 15:43:34.671477     PCI: 00:01.2 child on link 0 PCI: 01:00.0

  981 15:43:34.681594     PCI: 00:01.2 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c

  982 15:43:34.691853     PCI: 00:01.2 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

  983 15:43:34.701476     PCI: 00:01.2 resource base e0600000 size 100000 align 20 gran 20 limit e06fffff flags 60080202 index 20

  984 15:43:34.701904      PCI: 01:00.0

  985 15:43:34.711408      PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 10

  986 15:43:34.721952      PCI: 01:00.0 resource base e0600000 size 10000 align 16 gran 16 limit e060ffff flags 60000201 index 18

  987 15:43:34.722476     PCI: 00:08.0

  988 15:43:34.725067     PCI: 00:08.1 child on link 0 PCI: 02:00.0

  989 15:43:34.734905     PCI: 00:08.1 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c

  990 15:43:34.745323     PCI: 00:08.1 resource base d0000000 size 10200000 align 28 gran 20 limit e01fffff flags 60081202 index 24

  991 15:43:34.751742     PCI: 00:08.1 resource base e0200000 size 400000 align 20 gran 20 limit e05fffff flags 60080202 index 20

  992 15:43:34.755079      PCI: 02:00.0

  993 15:43:34.765112      PCI: 02:00.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001201 index 10

  994 15:43:34.774968      PCI: 02:00.0 resource base e0000000 size 200000 align 21 gran 21 limit e01fffff flags 60001201 index 18

  995 15:43:34.781783      PCI: 02:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 20

  996 15:43:34.791983      PCI: 02:00.0 resource base e0500000 size 80000 align 19 gran 19 limit e057ffff flags 60000200 index 24

  997 15:43:34.792572      PCI: 02:00.1

  998 15:43:34.801833      PCI: 02:00.1 resource base e05c0000 size 4000 align 14 gran 14 limit e05c3fff flags 60000200 index 10

  999 15:43:34.805412      PCI: 02:00.2

 1000 15:43:34.811880      PCI: 02:00.2 resource base e0200000 size 100000 align 20 gran 20 limit e02fffff flags 60000200 index 18

 1001 15:43:34.822196      PCI: 02:00.2 resource base e05c4000 size 2000 align 13 gran 13 limit e05c5fff flags 60000200 index 24

 1002 15:43:34.825317      PCI: 02:00.3 child on link 0 USB0 port 0

 1003 15:43:34.835425      PCI: 02:00.3 resource base e0300000 size 100000 align 20 gran 20 limit e03fffff flags 60000201 index 10

 1004 15:43:34.838454       USB0 port 0 child on link 0 USB2 port 0

 1005 15:43:34.842064        USB2 port 0

 1006 15:43:34.842147        USB2 port 1

 1007 15:43:34.845304        USB2 port 2

 1008 15:43:34.845387        USB2 port 3

 1009 15:43:34.848507        USB2 port 4

 1010 15:43:34.848597        USB2 port 5

 1011 15:43:34.851755        USB3 port 0

 1012 15:43:34.851829        USB3 port 1

 1013 15:43:34.854919        USB3 port 2

 1014 15:43:34.855002        USB3 port 3

 1015 15:43:34.861952      PCI: 02:00.5 child on link 0 GENERIC: 0.0

 1016 15:43:34.868491      PCI: 02:00.5 resource base e0580000 size 40000 align 18 gran 18 limit e05bffff flags 60000200 index 10

 1017 15:43:34.871660       GENERIC: 0.0

 1018 15:43:34.871743       GENERIC: 1.0

 1019 15:43:34.875216      PCI: 02:00.7

 1020 15:43:34.885142      PCI: 02:00.7 resource base e0400000 size 100000 align 20 gran 20 limit e04fffff flags 60000200 index 18

 1021 15:43:34.895118      PCI: 02:00.7 resource base e05c6000 size 2000 align 13 gran 13 limit e05c7fff flags 60000200 index 24

 1022 15:43:34.895202     PCI: 00:14.0

 1023 15:43:34.898865     PCI: 00:14.3 child on link 0 PNP: 0c09.0

 1024 15:43:34.908966     PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000

 1025 15:43:34.915269     PCI: 00:14.3 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100

 1026 15:43:34.925391     PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2

 1027 15:43:34.932210     PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3

 1028 15:43:34.942427     PCI: 00:14.3 resource base fedc4000 size 2000 align 0 gran 0 limit 0 flags c0000200 index 4

 1029 15:43:34.945743      PNP: 0c09.0 child on link 0 GENERIC: 0.0

 1030 15:43:34.952199      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1031 15:43:34.959157       GENERIC: 0.0 child on link 0 I2C: 00:1a

 1032 15:43:34.959235        I2C: 00:1a

 1033 15:43:34.962352       GENERIC: 0.0

 1034 15:43:34.965572       GENERIC: 1.0 child on link 0 I2C: 00:1a

 1035 15:43:34.965646        I2C: 00:1a

 1036 15:43:34.968767     PCI: 00:18.0

 1037 15:43:34.968861     PCI: 00:18.1

 1038 15:43:34.972102     PCI: 00:18.2

 1039 15:43:34.972171     PCI: 00:18.3

 1040 15:43:34.972250     PCI: 00:18.4

 1041 15:43:34.976017     PCI: 00:18.5

 1042 15:43:34.976087     PCI: 00:18.6

 1043 15:43:34.979160     PCI: 00:18.7

 1044 15:43:34.982185    MMIO: fedc5000 child on link 0 I2C: 01:50

 1045 15:43:34.982258     I2C: 01:50

 1046 15:43:34.985848    MMIO: fedca000

 1047 15:43:34.985919    MMIO: fedce000

 1048 15:43:34.988917    MMIO: fedcf000

 1049 15:43:34.992578    MMIO: fedc4000 child on link 0 I2C: 02:15

 1050 15:43:34.992697     I2C: 02:15

 1051 15:43:34.996086     I2C: 02:10

 1052 15:43:34.996158     I2C: 02:40

 1053 15:43:34.998992    GENERIC: 0.1

 1054 15:43:34.999069  Done allocating resources.

 1055 15:43:35.005741  BS: BS_DEV_RESOURCES run times (exec / console): 4 / 1870 ms

 1056 15:43:35.008861  0x00000020: notify_params->phase

 1057 15:43:35.012771  Calling FspNotify: 0xca6773b8

 1058 15:43:35.012859  	0xca6fff7c: notify_params

 1059 15:43:35.015748  POST: 0x94

 1060 15:43:35.015818  POST: 0x94

 1061 15:43:35.018999  FspNotify returned 0x00000000

 1062 15:43:35.026253  PCI_INTR tables: Writing registers C00/C01 for PCI IRQ routing:

 1063 15:43:35.029442  PCI_INTR_INDEX	name		     PIC mode	APIC mode

 1064 15:43:35.032648  0x00		INTA#                0x06	0x1F

 1065 15:43:35.036239  0x01		INTB#                0x0D	0x1F

 1066 15:43:35.039246  0x02		INTC#                0x0E	0x1F

 1067 15:43:35.042419  0x03		INTD#                0x0F	0x1F

 1068 15:43:35.046169  0x04		INTE#                0x0F	0x1F

 1069 15:43:35.049422  0x05		INTF#/GENINT2        0x0E	0x1F

 1070 15:43:35.052800  0x06		INTG#                0x0D	0x1F

 1071 15:43:35.055800  0x07		INTH#                0x06	0x1F

 1072 15:43:35.059117  0x08		Misc                 0xFA	0x00

 1073 15:43:35.063060  0x09		Misc0                0xF1	0x00

 1074 15:43:35.066250  0x0A		Misc1                0x00	0x00

 1075 15:43:35.069436  0x0B		Misc2                0x00	0x00

 1076 15:43:35.072671  0x0C		Ser IRQ INTA         0x1F	0x1F

 1077 15:43:35.075976  0x0D		Ser IRQ INTB         0x1F	0x1F

 1078 15:43:35.079817  0x0E		Ser IRQ INTC         0x1F	0x1F

 1079 15:43:35.083060  0x0F		Ser IRQ INTD         0x1F	0x1F

 1080 15:43:35.086318  0x10		SCI                  0x09	0x09

 1081 15:43:35.089656  0x11		SMBUS                0x1F	0x1F

 1082 15:43:35.093180  0x12		ASF                  0x1F	0x1F

 1083 15:43:35.096088  0x16		PerMon               0x1F	0x1F

 1084 15:43:35.099636  0x17		SD                   0x1F	0x1F

 1085 15:43:35.103325  0x1A		SDIO                 0x1F	0x1F

 1086 15:43:35.106501  0x20		CIR                  0x1F	0x1F

 1087 15:43:35.109495  0x21		GPIOa                0x1F	0x1F

 1088 15:43:35.112931  0x22		GPIOb                0x1F	0x1F

 1089 15:43:35.116500  0x23		GPIOc                0x1F	0x1F

 1090 15:43:35.119539  0x41		SATA                 0x1F	0x1F

 1091 15:43:35.122801  0x43		eMMC                 0x05	0x05

 1092 15:43:35.125997  0x50		GPP0                 0x1F	0x1F

 1093 15:43:35.129836  0x51		GPP1                 0x1F	0x1F

 1094 15:43:35.133093  0x52		GPP2                 0x1F	0x1F

 1095 15:43:35.136328  0x53		GPP3                 0x1F	0x1F

 1096 15:43:35.139450  0x62		GPIO                 0x07	0x07

 1097 15:43:35.143155  0x70		I2C0                 0x1F	0x1F

 1098 15:43:35.146161  0x71		I2C1                 0x1F	0x1F

 1099 15:43:35.149844  0x72		I2C2                 0x0A	0x0A

 1100 15:43:35.152987  0x73		I2C3                 0x0B	0x0B

 1101 15:43:35.156227  0x74		UART0                0x04	0x04

 1102 15:43:35.159504  0x75		UART1                0x03	0x03

 1103 15:43:35.162635  0x76		I2C4                 0x1F	0x1F

 1104 15:43:35.165932  0x77		I2C5                 0x1F	0x1F

 1105 15:43:35.169141  0x78		UART2                0x1F	0x1F

 1106 15:43:35.173044  0x79		UART3                0x1F	0x1F

 1107 15:43:35.176358  PCI_CFG IRQ: Write PCI config space IRQ assignments

 1108 15:43:35.179540  PCI IRQ: Found device 0:00.02 using PIN A

 1109 15:43:35.182908  PCI Devfn (0x2) not found in pirq_data table

 1110 15:43:35.189177  PCI IRQ: Found device 0:08.01 using PIN A

 1111 15:43:35.193032  	Found this device in pirq_data table entry 7

 1112 15:43:35.196375  	Orig INT_PIN	: 1 (PIN A)

 1113 15:43:35.196449  	PCI_INTR idx	: 0x04 (INTE#)

 1114 15:43:35.199640  	INT_LINE	: 0xF (IRQ 15)

 1115 15:43:35.202878  PCI IRQ: Found device 1:00.00 using PIN A

 1116 15:43:35.205870  	With INT_PIN swizzled to PIN A

 1117 15:43:35.209492  	Attached to bridge device 0:01h.02h

 1118 15:43:35.213095  	Found this device in pirq_data table entry 1

 1119 15:43:35.215915  	Orig INT_PIN	: 1 (PIN A)

 1120 15:43:35.219239  	PCI_INTR idx	: 0x04 (INTE#)

 1121 15:43:35.219316  	INT_LINE	: 0xF (IRQ 15)

 1122 15:43:35.222872  PCI IRQ: Found device 2:00.00 using PIN A

 1123 15:43:35.226221  	With INT_PIN swizzled to PIN A

 1124 15:43:35.229585  	Attached to bridge device 0:08h.01h

 1125 15:43:35.236044  	Found this device in pirq_data table entry 7

 1126 15:43:35.236122  	Orig INT_PIN	: 1 (PIN A)

 1127 15:43:35.239293  	PCI_INTR idx	: 0x04 (INTE#)

 1128 15:43:35.243158  	INT_LINE	: 0xF (IRQ 15)

 1129 15:43:35.246406  PCI IRQ: Found device 2:00.01 using PIN B

 1130 15:43:35.249606  	With INT_PIN swizzled to PIN B

 1131 15:43:35.252924  	Attached to bridge device 0:08h.01h

 1132 15:43:35.256193  	Found this device in pirq_data table entry 7

 1133 15:43:35.260098  	Orig INT_PIN	: 2 (PIN B)

 1134 15:43:35.263183  	PCI_INTR idx	: 0x05 (INTF#/GENINT2)

 1135 15:43:35.263264  	INT_LINE	: 0xE (IRQ 14)

 1136 15:43:35.266351  PCI IRQ: Found device 2:00.02 using PIN C

 1137 15:43:35.269628  	With INT_PIN swizzled to PIN C

 1138 15:43:35.273421  	Attached to bridge device 0:08h.01h

 1139 15:43:35.276600  	Found this device in pirq_data table entry 7

 1140 15:43:35.279861  	Orig INT_PIN	: 3 (PIN C)

 1141 15:43:35.283249  	PCI_INTR idx	: 0x06 (INTG#)

 1142 15:43:35.286649  	INT_LINE	: 0xD (IRQ 13)

 1143 15:43:35.290282  PCI IRQ: Found device 2:00.03 using PIN D

 1144 15:43:35.293297  	With INT_PIN swizzled to PIN D

 1145 15:43:35.296532  	Attached to bridge device 0:08h.01h

 1146 15:43:35.300335  	Found this device in pirq_data table entry 7

 1147 15:43:35.300445  	Orig INT_PIN	: 4 (PIN D)

 1148 15:43:35.303682  	PCI_INTR idx	: 0x07 (INTH#)

 1149 15:43:35.306902  	INT_LINE	: 0x6 (IRQ 6)

 1150 15:43:35.310136  PCI IRQ: Found device 2:00.05 using PIN B

 1151 15:43:35.313221  	With INT_PIN swizzled to PIN B

 1152 15:43:35.316748  	Attached to bridge device 0:08h.01h

 1153 15:43:35.320861  	Found this device in pirq_data table entry 7

 1154 15:43:35.323875  	Orig INT_PIN	: 2 (PIN B)

 1155 15:43:35.327010  	PCI_INTR idx	: 0x05 (INTF#/GENINT2)

 1156 15:43:35.327421  	INT_LINE	: 0xE (IRQ 14)

 1157 15:43:35.333852  PCI IRQ: Found device 2:00.07 using PIN D

 1158 15:43:35.334119  	With INT_PIN swizzled to PIN D

 1159 15:43:35.336893  	Attached to bridge device 0:08h.01h

 1160 15:43:35.343871  	Found this device in pirq_data table entry 7

 1161 15:43:35.344479  	Orig INT_PIN	: 4 (PIN D)

 1162 15:43:35.347190  	PCI_INTR idx	: 0x07 (INTH#)

 1163 15:43:35.350427  	INT_LINE	: 0x6 (IRQ 6)

 1164 15:43:35.354344  PCI_CFG IRQ: Finished writing PCI config space IRQ assignments

 1165 15:43:35.360670  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 347 ms

 1166 15:43:35.361136  POST: 0x74

 1167 15:43:35.363740  Enabling resources...

 1168 15:43:35.364234  PCI: 00:00.0 cmd <- 00

 1169 15:43:35.367312  PCI: 00:00.2 subsystem <- 1022/1510

 1170 15:43:35.370876  PCI: 00:00.2 cmd <- 06

 1171 15:43:35.373982  PCI: 00:01.0 subsystem <- 1022/1510

 1172 15:43:35.377548  PCI: 00:01.0 cmd <- 00

 1173 15:43:35.380843  PCI: 00:01.2 bridge ctrl <- 0013

 1174 15:43:35.381259  PCI: 00:01.2 cmd <- 07

 1175 15:43:35.384018  PCI: 00:08.0 subsystem <- 1022/1510

 1176 15:43:35.387721  PCI: 00:08.0 cmd <- 00

 1177 15:43:35.391001  PCI: 00:08.1 bridge ctrl <- 001b

 1178 15:43:35.391425  PCI: 00:08.1 cmd <- 07

 1179 15:43:35.394343  PCI: 00:14.0 subsystem <- 1022/1510

 1180 15:43:35.397462  PCI: 00:14.0 cmd <- 403

 1181 15:43:35.400719  PCI: 00:14.3 subsystem <- 1022/1510

 1182 15:43:35.404508  PCI: 00:14.3 cmd <- 0f

 1183 15:43:35.404930  PCI: 00:18.7 cmd <- 00

 1184 15:43:35.407761  PCI: 01:00.0 subsystem <- 1022/1510

 1185 15:43:35.410919  PCI: 01:00.0 cmd <- 03

 1186 15:43:35.414294  PCI: 02:00.0 subsystem <- 1022/1510

 1187 15:43:35.414702  PCI: 02:00.0 cmd <- 07

 1188 15:43:35.417562  PCI: 02:00.1 subsystem <- 1022/1510

 1189 15:43:35.421206  PCI: 02:00.1 cmd <- 02

 1190 15:43:35.424321  PCI: 02:00.2 subsystem <- 1022/1510

 1191 15:43:35.427825  PCI: 02:00.2 cmd <- 02

 1192 15:43:35.431016  PCI: 02:00.3 subsystem <- 1022/1510

 1193 15:43:35.431430  PCI: 02:00.3 cmd <- 02

 1194 15:43:35.434726  PCI: 02:00.5 subsystem <- 1022/1510

 1195 15:43:35.437786  PCI: 02:00.5 cmd <- 02

 1196 15:43:35.441299  PCI: 02:00.7 subsystem <- 1022/1510

 1197 15:43:35.441819  PCI: 02:00.7 cmd <- 02

 1198 15:43:35.444949  done.

 1199 15:43:35.448166  BS: BS_DEV_ENABLE run times (exec / console): 1 / 82 ms

 1200 15:43:35.448538  POST: 0x75

 1201 15:43:35.451151  Initializing devices...

 1202 15:43:35.451581  POST: 0x75

 1203 15:43:35.454695  CPU_CLUSTER: 0 init

 1204 15:43:35.458015  MTRR: Physical address space:

 1205 15:43:35.461640  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1206 15:43:35.468233  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1207 15:43:35.474865  0x00000000000c0000 - 0x00000000d0000000 size 0xcff40000 type 6

 1208 15:43:35.478405  0x00000000d0000000 - 0x00000000e0200000 size 0x10200000 type 1

 1209 15:43:35.485156  0x00000000e0200000 - 0x0000000100000000 size 0x1fe00000 type 0

 1210 15:43:35.491419  0x0000000100000000 - 0x0000000130000000 size 0x30000000 type 6

 1211 15:43:35.494881  MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e

 1212 15:43:35.498098  MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e

 1213 15:43:35.501345  MTRR: Fixed MSR 0x259 0x0000000000000000

 1214 15:43:35.504489  MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e

 1215 15:43:35.508495  MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e

 1216 15:43:35.511663  MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e

 1217 15:43:35.515066  MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e

 1218 15:43:35.518127  MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e

 1219 15:43:35.524816  MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e

 1220 15:43:35.528446  MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e

 1221 15:43:35.531701  MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e

 1222 15:43:35.531860  call enable_fixed_mtrr()

 1223 15:43:35.535142  CPU physical address size: 48 bits

 1224 15:43:35.541667  MTRR: default type WB/UC MTRR counts: 10/5.

 1225 15:43:35.544805  MTRR: UC selected as default type.

 1226 15:43:35.548050  MTRR: 0 base 0x0000000000000000 mask 0x0000ffff80000000 type 6

 1227 15:43:35.555288  MTRR: 1 base 0x0000000080000000 mask 0x0000ffffc0000000 type 6

 1228 15:43:35.561793  MTRR: 2 base 0x00000000c0000000 mask 0x0000fffff0000000 type 6

 1229 15:43:35.564997  MTRR: 3 base 0x00000000d0000000 mask 0x0000fffff0000000 type 1

 1230 15:43:35.571525  MTRR: 4 base 0x00000000e0000000 mask 0x0000ffffffe00000 type 1

 1231 15:43:35.571981  

 1232 15:43:35.572402  MTRR check

 1233 15:43:35.575127  Fixed MTRRs   : Enabled

 1234 15:43:35.578342  Variable MTRRs: Enabled

 1235 15:43:35.578758  

 1236 15:43:35.579082  POST: 0x93

 1237 15:43:35.582253  Setting up SMI for CPU

 1238 15:43:35.582734  Will perform SMM setup.

 1239 15:43:35.588474  CPU: AMD 3015Ce with Radeon Graphics                .

 1240 15:43:35.595550  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

 1241 15:43:35.598657  Processing 16 relocs. Offset value of 0x00030000

 1242 15:43:35.602185  Attempting to start 3 APs

 1243 15:43:35.605127  Waiting for 10ms after sending INIT.

 1244 15:43:35.620031  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 3.

 1245 15:43:35.620447  done.

 1246 15:43:35.623210  AP: slot 2 apic_id 2.

 1247 15:43:35.623656  AP: slot 3 apic_id 1.

 1248 15:43:35.633483  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

 1249 15:43:35.636755  Processing 13 relocs. Offset value of 0x00038000

 1250 15:43:35.643131  SMM Module: stub loaded at 0x00038000. Will call 0xca6d31a3(0x00000000)

 1251 15:43:35.646460  Installing permanent SMM handler to 0xcb800000

 1252 15:43:35.653351  Loading module at 0xcb810000 with entry 0xcb8114d2. filesize: 0x6b10 memsize: 0xd3c8

 1253 15:43:35.659594  Processing 415 relocs. Offset value of 0xcb810000

 1254 15:43:35.666624  Loading module at 0xcb808000 with entry 0xcb808000. filesize: 0x1b8 memsize: 0x1b8

 1255 15:43:35.669785  Processing 13 relocs. Offset value of 0xcb808000

 1256 15:43:35.676210  SMM Module: placing jmp sequence at 0xcb807e00 rel16 0x01fd

 1257 15:43:35.679834  SMM Module: placing jmp sequence at 0xcb807c00 rel16 0x03fd

 1258 15:43:35.686739  SMM Module: placing jmp sequence at 0xcb807a00 rel16 0x05fd

 1259 15:43:35.693251  SMM Module: stub loaded at 0xcb808000. Will call 0xcb8114d2(0x00000000)

 1260 15:43:35.699891  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb7ffe00, cpu = 1

 1261 15:43:35.703282  Relocation complete.

 1262 15:43:35.707052  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb800000, cpu = 0

 1263 15:43:35.710438  Relocation complete.

 1264 15:43:35.717321  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb7ffa00, cpu = 3

 1265 15:43:35.717741  Relocation complete.

 1266 15:43:35.723832  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb7ffc00, cpu = 2

 1267 15:43:35.727156  Relocation complete.

 1268 15:43:35.727748  Initializing CPU #0

 1269 15:43:35.730282  CPU: vendor AMD device 820f01

 1270 15:43:35.733564  CPU: family 17, model 20, stepping 01

 1271 15:43:35.736798  Setting up local APIC...

 1272 15:43:35.740160   apic_id: 0x00 done.

 1273 15:43:35.743464  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1274 15:43:35.746764  CBFS: Locating 'cpu_microcode_blob.bin'

 1275 15:43:35.750760  CBFS: Found @ offset cd00 size 2580

 1276 15:43:35.754046  microcode: patch id to apply = 0x08200103

 1277 15:43:35.760147  microcode: being updated to patch id = 0x08200103 succeeded

 1278 15:43:35.760638  CPU #0 initialized

 1279 15:43:35.763252  Initializing CPU #1

 1280 15:43:35.767169  Initializing CPU #3

 1281 15:43:35.767661  CPU: vendor AMD device 820f01

 1282 15:43:35.770448  CPU: family 17, model 20, stepping 01

 1283 15:43:35.773853  CPU: vendor AMD device 820f01

 1284 15:43:35.777191  CPU: family 17, model 20, stepping 01

 1285 15:43:35.780308  Setting up local APIC...

 1286 15:43:35.783613  Setting up local APIC...

 1287 15:43:35.784275  Initializing CPU #2

 1288 15:43:35.787211   apic_id: 0x01 done.

 1289 15:43:35.787706   apic_id: 0x03 done.

 1290 15:43:35.793892  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1291 15:43:35.794315  CPU: vendor AMD device 820f01

 1292 15:43:35.797351  CPU: family 17, model 20, stepping 01

 1293 15:43:35.803694  CBFS: Locating 'cpu_microcode_blob.bin'

 1294 15:43:35.807546  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1295 15:43:35.810932  Setting up local APIC...

 1296 15:43:35.813908  CBFS: Found @ offset cd00 size 2580

 1297 15:43:35.817071  CBFS: Locating 'cpu_microcode_blob.bin'

 1298 15:43:35.820419  microcode: patch id to apply = 0x08200103

 1299 15:43:35.827302   apic_id: 0x02 microcode: being updated to patch id = 0x08200103 succeeded

 1300 15:43:35.830465  CBFS: Found @ offset cd00 size 2580

 1301 15:43:35.831037  CPU #3 initialized

 1302 15:43:35.833995  microcode: patch id to apply = 0x08200103

 1303 15:43:35.834429  done.

 1304 15:43:35.840486  microcode: being updated to patch id = 0x08200103 succeeded

 1305 15:43:35.844375  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1306 15:43:35.847588  CPU #1 initialized

 1307 15:43:35.850815  CBFS: Locating 'cpu_microcode_blob.bin'

 1308 15:43:35.854188  CBFS: Found @ offset cd00 size 2580

 1309 15:43:35.857429  microcode: patch id to apply = 0x08200103

 1310 15:43:35.863964  microcode: being updated to patch id = 0x08200103 succeeded

 1311 15:43:35.867799  CPU #2 initialized

 1312 15:43:35.870948  bsp_do_flight_plan done after 245 msecs.

 1313 15:43:35.871377  

 1314 15:43:35.871771  

 1315 15:43:35.877393  coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 smm starting (log level: 8)...

 1316 15:43:35.877950  

 1317 15:43:35.878457  SMI# #2

 1318 15:43:35.880476  spi_init: SPI BAR at 0xfec10000

 1319 15:43:35.883647  PSP: Notify SMM info... OK

 1320 15:43:35.887093  MTRR: TEMPORARY Physical address space:

 1321 15:43:35.891138  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1322 15:43:35.897338  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1323 15:43:35.904175  0x00000000000c0000 - 0x00000000d0000000 size 0xcff40000 type 6

 1324 15:43:35.907583  0x00000000d0000000 - 0x00000000ff000000 size 0x2f000000 type 0

 1325 15:43:35.913940  0x00000000ff000000 - 0x0000000100000000 size 0x01000000 type 5

 1326 15:43:35.921138  0x0000000100000000 - 0x0000000130000000 size 0x30000000 type 6

 1327 15:43:35.924113  MTRR: default type WB/UC MTRR counts: 7/5.

 1328 15:43:35.927255  MTRR: UC selected as default type.

 1329 15:43:35.934611  MTRR: 0 base 0x0000000000000000 mask 0x0000ffff80000000 type 6

 1330 15:43:35.937729  MTRR: 1 base 0x0000000080000000 mask 0x0000ffffc0000000 type 6

 1331 15:43:35.944308  MTRR: 2 base 0x00000000c0000000 mask 0x0000fffff0000000 type 6

 1332 15:43:35.947990  MTRR: 3 base 0x00000000ff000000 mask 0x0000ffffff000000 type 5

 1333 15:43:35.954941  MTRR: 4 base 0x0000000100000000 mask 0x0000ffffc0000000 type 6

 1334 15:43:35.957840  CPU_CLUSTER: 0 init finished in 499 msecs

 1335 15:43:35.961118  POST: 0x75

 1336 15:43:35.961534  POST: 0x75

 1337 15:43:35.961860  POST: 0x75

 1338 15:43:35.964422  POST: 0x75

 1339 15:43:35.964838  POST: 0x75

 1340 15:43:35.965220  POST: 0x75

 1341 15:43:35.967664  POST: 0x75

 1342 15:43:35.968177  POST: 0x75

 1343 15:43:35.968652  POST: 0x75

 1344 15:43:35.970798  POST: 0x75

 1345 15:43:35.971344  POST: 0x75

 1346 15:43:35.971825  POST: 0x75

 1347 15:43:35.974523  PCI: 00:00.0 init

 1348 15:43:35.977476  IOAPIC: Initializing IOAPIC at 0xfec01000

 1349 15:43:35.981466  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1350 15:43:35.984735  IOAPIC: ID = 0x09

 1351 15:43:35.985200  IOAPIC: Dumping registers

 1352 15:43:35.987892    reg 0x0000: 0x09000000

 1353 15:43:35.991222    reg 0x0001: 0x001f8021

 1354 15:43:35.991638    reg 0x0002: 0x00000000

 1355 15:43:35.994412  IOAPIC: 32 interrupts

 1356 15:43:35.997613  IOAPIC: Enabling interrupts on FSB

 1357 15:43:36.001713  IOAPIC: reg 0x00000000 value 0x00000000 0x00000700

 1358 15:43:36.007877  IOAPIC: reg 0x00000001 value 0x00000000 0x00010000

 1359 15:43:36.011305  IOAPIC: reg 0x00000002 value 0x00000000 0x00010000

 1360 15:43:36.014867  IOAPIC: reg 0x00000003 value 0x00000000 0x00010000

 1361 15:43:36.021141  IOAPIC: reg 0x00000004 value 0x00000000 0x00010000

 1362 15:43:36.024729  IOAPIC: reg 0x00000005 value 0x00000000 0x00010000

 1363 15:43:36.027971  IOAPIC: reg 0x00000006 value 0x00000000 0x00010000

 1364 15:43:36.034654  IOAPIC: reg 0x00000007 value 0x00000000 0x00010000

 1365 15:43:36.037924  IOAPIC: reg 0x00000008 value 0x00000000 0x00010000

 1366 15:43:36.041769  IOAPIC: reg 0x00000009 value 0x00000000 0x00010000

 1367 15:43:36.048310  IOAPIC: reg 0x0000000a value 0x00000000 0x00010000

 1368 15:43:36.051748  IOAPIC: reg 0x0000000b value 0x00000000 0x00010000

 1369 15:43:36.055077  IOAPIC: reg 0x0000000c value 0x00000000 0x00010000

 1370 15:43:36.061360  IOAPIC: reg 0x0000000d value 0x00000000 0x00010000

 1371 15:43:36.064746  IOAPIC: reg 0x0000000e value 0x00000000 0x00010000

 1372 15:43:36.068156  IOAPIC: reg 0x0000000f value 0x00000000 0x00010000

 1373 15:43:36.074908  IOAPIC: reg 0x00000010 value 0x00000000 0x00010000

 1374 15:43:36.078443  IOAPIC: reg 0x00000011 value 0x00000000 0x00010000

 1375 15:43:36.085115  IOAPIC: reg 0x00000012 value 0x00000000 0x00010000

 1376 15:43:36.088294  IOAPIC: reg 0x00000013 value 0x00000000 0x00010000

 1377 15:43:36.091632  IOAPIC: reg 0x00000014 value 0x00000000 0x00010000

 1378 15:43:36.098702  IOAPIC: reg 0x00000015 value 0x00000000 0x00010000

 1379 15:43:36.101868  IOAPIC: reg 0x00000016 value 0x00000000 0x00010000

 1380 15:43:36.105157  IOAPIC: reg 0x00000017 value 0x00000000 0x00010000

 1381 15:43:36.111604  IOAPIC: reg 0x00000018 value 0x00000000 0x00010000

 1382 15:43:36.115419  IOAPIC: reg 0x00000019 value 0x00000000 0x00010000

 1383 15:43:36.118790  IOAPIC: reg 0x0000001a value 0x00000000 0x00010000

 1384 15:43:36.124926  IOAPIC: reg 0x0000001b value 0x00000000 0x00010000

 1385 15:43:36.128677  IOAPIC: reg 0x0000001c value 0x00000000 0x00010000

 1386 15:43:36.131725  IOAPIC: reg 0x0000001d value 0x00000000 0x00010000

 1387 15:43:36.138348  IOAPIC: reg 0x0000001e value 0x00000000 0x00010000

 1388 15:43:36.142160  IOAPIC: reg 0x0000001f value 0x00000000 0x00010000

 1389 15:43:36.145345  PCI: 00:00.0 init finished in 168 msecs

 1390 15:43:36.145965  POST: 0x75

 1391 15:43:36.148915  POST: 0x75

 1392 15:43:36.149467  PCI: 00:01.0 init

 1393 15:43:36.152027  PCI: 00:01.0 init finished in 0 msecs

 1394 15:43:36.154901  POST: 0x75

 1395 15:43:36.155473  POST: 0x75

 1396 15:43:36.156003  PCI: 00:08.0 init

 1397 15:43:36.158846  PCI: 00:08.0 init finished in 0 msecs

 1398 15:43:36.162301  POST: 0x75

 1399 15:43:36.162878  POST: 0x75

 1400 15:43:36.165379  PCI: 00:14.0 init

 1401 15:43:36.168586  IOAPIC: Initializing IOAPIC at 0xfec00000

 1402 15:43:36.171817  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1403 15:43:36.172347  IOAPIC: ID = 0x08

 1404 15:43:36.175709  IOAPIC: Dumping registers

 1405 15:43:36.178865    reg 0x0000: 0x08000000

 1406 15:43:36.182006    reg 0x0001: 0x00178021

 1407 15:43:36.182564    reg 0x0002: 0x08000000

 1408 15:43:36.185532  IOAPIC: 24 interrupts

 1409 15:43:36.188816  IOAPIC: Enabling interrupts on FSB

 1410 15:43:36.192022  IOAPIC: reg 0x00000000 value 0x00000000 0x00000700

 1411 15:43:36.195343  IOAPIC: reg 0x00000001 value 0x00000000 0x00010000

 1412 15:43:36.202251  IOAPIC: reg 0x00000002 value 0x00000000 0x00010000

 1413 15:43:36.205472  IOAPIC: reg 0x00000003 value 0x00000000 0x00010000

 1414 15:43:36.211775  IOAPIC: reg 0x00000004 value 0x00000000 0x00010000

 1415 15:43:36.215086  IOAPIC: reg 0x00000005 value 0x00000000 0x00010000

 1416 15:43:36.218419  IOAPIC: reg 0x00000006 value 0x00000000 0x00010000

 1417 15:43:36.225460  IOAPIC: reg 0x00000007 value 0x00000000 0x00010000

 1418 15:43:36.228645  IOAPIC: reg 0x00000008 value 0x00000000 0x00010000

 1419 15:43:36.232113  IOAPIC: reg 0x00000009 value 0x00000000 0x00010000

 1420 15:43:36.238819  IOAPIC: reg 0x0000000a value 0x00000000 0x00010000

 1421 15:43:36.242081  IOAPIC: reg 0x0000000b value 0x00000000 0x00010000

 1422 15:43:36.244996  IOAPIC: reg 0x0000000c value 0x00000000 0x00010000

 1423 15:43:36.251392  IOAPIC: reg 0x0000000d value 0x00000000 0x00010000

 1424 15:43:36.255131  IOAPIC: reg 0x0000000e value 0x00000000 0x00010000

 1425 15:43:36.258126  IOAPIC: reg 0x0000000f value 0x00000000 0x00010000

 1426 15:43:36.264768  IOAPIC: reg 0x00000010 value 0x00000000 0x00010000

 1427 15:43:36.268693  IOAPIC: reg 0x00000011 value 0x00000000 0x00010000

 1428 15:43:36.275054  IOAPIC: reg 0x00000012 value 0x00000000 0x00010000

 1429 15:43:36.278334  IOAPIC: reg 0x00000013 value 0x00000000 0x00010000

 1430 15:43:36.281551  IOAPIC: reg 0x00000014 value 0x00000000 0x00010000

 1431 15:43:36.288679  IOAPIC: reg 0x00000015 value 0x00000000 0x00010000

 1432 15:43:36.291899  IOAPIC: reg 0x00000016 value 0x00000000 0x00010000

 1433 15:43:36.294958  IOAPIC: reg 0x00000017 value 0x00000000 0x00010000

 1434 15:43:36.298245  PCI: 00:14.0 init finished in 132 msecs

 1435 15:43:36.302046  POST: 0x75

 1436 15:43:36.302140  PCI: 00:14.3 init

 1437 15:43:36.302228  RTC Init

 1438 15:43:36.305096  PCI: 00:14.3 init finished in 0 msecs

 1439 15:43:36.308751  POST: 0x75

 1440 15:43:36.308847  POST: 0x75

 1441 15:43:36.308933  POST: 0x75

 1442 15:43:36.311713  POST: 0x75

 1443 15:43:36.311803  POST: 0x75

 1444 15:43:36.311888  POST: 0x75

 1445 15:43:36.314993  POST: 0x75

 1446 15:43:36.315092  POST: 0x75

 1447 15:43:36.318721  PCI: 00:18.7 init

 1448 15:43:36.321476  PCI: 00:18.7 init finished in 0 msecs

 1449 15:43:36.321580  POST: 0x75

 1450 15:43:36.321672  PCI: 01:00.0 init

 1451 15:43:36.328484  PCI: 01:00.0 init finished in 0 msecs

 1452 15:43:36.328584  POST: 0x75

 1453 15:43:36.328676  PCI: 02:00.0 init

 1454 15:43:36.335240  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1455 15:43:36.338828  CBFS: Locating 'pci1002,15d8,ea.rom'

 1456 15:43:36.341871  CBFS: 'pci1002,15d8,ea.rom' not found.

 1457 15:43:36.341969  Using RV2 VBIOS.

 1458 15:43:36.348756  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1459 15:43:36.352018  CBFS: Locating 'pci1002,15dd,c4.rom'

 1460 15:43:36.355230  CBFS: Found @ offset 6c9c0 size d400

 1461 15:43:36.358453  In CBFS, ROM address for PCI: 02:00.0 = 0xff8e19f8

 1462 15:43:36.365011  PCI expansion ROM, signature 0xaa55, INIT size 0xd400, data ptr 0x01b0

 1463 15:43:36.368924  PCI ROM image, vendor ID 1002, device ID 15dd,

 1464 15:43:36.372015  PCI ROM image, Class Code 030000, Code Type 00

 1465 15:43:36.378526  Copying VGA ROM Image from 0xff8e19f8 to 0xc0000, 0xd400 bytes

 1466 15:43:36.385780  Real mode stub @0x00000600: 889 bytes

 1467 15:43:36.389033  Calling Option ROM...

 1468 15:43:36.413520  ... Option ROM returned.

 1469 15:43:36.416797  VBE: Getting information about VESA mode 41d4

 1470 15:43:36.420896  VBE: resolution:  1366x768@32

 1471 15:43:36.423761  VBE: framebuffer: 0xd0000000

 1472 15:43:36.426797  VBE: Setting VESA mode 41d4

 1473 15:43:36.450819  fb_add_framebuffer_info_ex: channel bit mask=24 and BPP=32 don't match. This is a driver bug.

 1474 15:43:36.454635  framebuffer_info: bytes_per_line: 5632, bits_per_pixel: 32

 1475 15:43:36.460961                     x_res x y_res: 1366 x 768, size: 4325376 at 0xd0000000

 1476 15:43:36.464933  VGA Option ROM was run

 1477 15:43:36.468098  PCI: 02:00.0 init finished in 134 msecs

 1478 15:43:36.468167  POST: 0x75

 1479 15:43:36.471195  PCI: 02:00.1 init

 1480 15:43:36.474453  PCI: 02:00.1 init finished in 0 msecs

 1481 15:43:36.474520  POST: 0x75

 1482 15:43:36.478298  PCI: 02:00.2 init

 1483 15:43:36.481425  PCI: 02:00.2 init finished in 0 msecs

 1484 15:43:36.481512  POST: 0x75

 1485 15:43:36.485046  PCI: 02:00.3 init

 1486 15:43:36.487849  PCI: 02:00.3 init finished in 0 msecs

 1487 15:43:36.487975  POST: 0x75

 1488 15:43:36.488056  PCI: 02:00.5 init

 1489 15:43:36.491709  PCI: 02:00.5 init finished in 0 msecs

 1490 15:43:36.495021  POST: 0x75

 1491 15:43:36.495165  PCI: 02:00.7 init

 1492 15:43:36.498256  PCI: 02:00.7 init finished in 0 msecs

 1493 15:43:36.501379  POST: 0x75

 1494 15:43:36.501448  POST: 0x75

 1495 15:43:36.501514  POST: 0x75

 1496 15:43:36.505197  POST: 0x75

 1497 15:43:36.505264  POST: 0x75

 1498 15:43:36.505324  POST: 0x75

 1499 15:43:36.508481  POST: 0x75

 1500 15:43:36.508545  POST: 0x75

 1501 15:43:36.508602  POST: 0x75

 1502 15:43:36.511789  POST: 0x75

 1503 15:43:36.511855  POST: 0x75

 1504 15:43:36.511951  POST: 0x75

 1505 15:43:36.514887  POST: 0x75

 1506 15:43:36.514955  POST: 0x75

 1507 15:43:36.515011  PNP: 0c09.0 init

 1508 15:43:36.521386  Google Chrome EC uptime: 7.529 seconds

 1509 15:43:36.524756  Google Chrome AP resets since EC boot: 0

 1510 15:43:36.528589  Google Chrome most recent AP reset causes:

 1511 15:43:36.535060  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1512 15:43:36.538140  PNP: 0c09.0 init finished in 17 msecs

 1513 15:43:36.538265  POST: 0x75

 1514 15:43:36.538372  POST: 0x75

 1515 15:43:36.542004  POST: 0x75

 1516 15:43:36.542107  POST: 0x75

 1517 15:43:36.542187  POST: 0x75

 1518 15:43:36.545130  POST: 0x75

 1519 15:43:36.545234  POST: 0x75

 1520 15:43:36.545315  POST: 0x75

 1521 15:43:36.548133  POST: 0x75

 1522 15:43:36.548246  Devices initialized

 1523 15:43:36.551770  Show all devs... After init.

 1524 15:43:36.551876  Root Device: enabled 1

 1525 15:43:36.554925  CPU_CLUSTER: 0: enabled 1

 1526 15:43:36.558581  DOMAIN: 0000: enabled 1

 1527 15:43:36.561567  MMIO: fedc5000: enabled 1

 1528 15:43:36.561681  MMIO: fedca000: enabled 0

 1529 15:43:36.565216  MMIO: fedce000: enabled 0

 1530 15:43:36.568656  MMIO: fedcf000: enabled 0

 1531 15:43:36.568760  MMIO: fedc4000: enabled 1

 1532 15:43:36.571793  GENERIC: 0.1: enabled 1

 1533 15:43:36.575247  APIC: 00: enabled 1

 1534 15:43:36.575361  PCI: 00:00.0: enabled 1

 1535 15:43:36.578391  PCI: 00:00.2: enabled 1

 1536 15:43:36.578492  PCI: 00:01.0: enabled 1

 1537 15:43:36.581791  PCI: 00:01.1: enabled 0

 1538 15:43:36.585496  PCI: 00:01.2: enabled 1

 1539 15:43:36.585598  PCI: 00:01.3: enabled 0

 1540 15:43:36.588760  PCI: 00:01.4: enabled 0

 1541 15:43:36.592046  PCI: 00:01.5: enabled 0

 1542 15:43:36.592126  PCI: 00:08.0: enabled 1

 1543 15:43:36.595556  PCI: 00:08.1: enabled 1

 1544 15:43:36.598546  PCI: 00:08.2: enabled 0

 1545 15:43:36.598655  PCI: 00:14.0: enabled 1

 1546 15:43:36.602130  PCI: 00:14.3: enabled 1

 1547 15:43:36.605278  PCI: 00:18.0: enabled 1

 1548 15:43:36.605380  PCI: 00:18.1: enabled 1

 1549 15:43:36.608569  PCI: 00:18.2: enabled 1

 1550 15:43:36.611888  PCI: 00:18.3: enabled 1

 1551 15:43:36.612015  PCI: 00:18.4: enabled 1

 1552 15:43:36.615726  PCI: 00:18.5: enabled 1

 1553 15:43:36.619110  PCI: 00:18.6: enabled 1

 1554 15:43:36.619191  I2C: 01:50: enabled 1

 1555 15:43:36.622289  I2C: 02:15: enabled 1

 1556 15:43:36.622395  I2C: 02:10: enabled 1

 1557 15:43:36.625563  I2C: 02:40: enabled 1

 1558 15:43:36.628825  PCI: 01:00.0: enabled 1

 1559 15:43:36.628932  PCI: 02:00.0: enabled 1

 1560 15:43:36.632551  PCI: 02:00.1: enabled 1

 1561 15:43:36.635756  PCI: 02:00.2: enabled 1

 1562 15:43:36.635877  PCI: 02:00.3: enabled 1

 1563 15:43:36.638988  PCI: 02:00.5: enabled 1

 1564 15:43:36.639095  PCI: 02:00.6: enabled 0

 1565 15:43:36.642266  PCI: 02:00.7: enabled 1

 1566 15:43:36.645443  PCI: 00:00.0: enabled 0

 1567 15:43:36.645523  PNP: 0c09.0: enabled 1

 1568 15:43:36.648769  USB0 port 0: enabled 1

 1569 15:43:36.652457  GENERIC: 0.0: enabled 1

 1570 15:43:36.652563  GENERIC: 1.0: enabled 0

 1571 15:43:36.655682  GENERIC: 0.0: enabled 1

 1572 15:43:36.658730  GENERIC: 0.0: enabled 1

 1573 15:43:36.658836  GENERIC: 1.0: enabled 0

 1574 15:43:36.662495  USB2 port 0: enabled 1

 1575 15:43:36.665629  USB2 port 1: enabled 1

 1576 15:43:36.665710  USB2 port 2: enabled 1

 1577 15:43:36.669422  USB2 port 3: enabled 1

 1578 15:43:36.669502  USB2 port 4: enabled 1

 1579 15:43:36.672572  USB2 port 5: enabled 1

 1580 15:43:36.676164  USB3 port 0: enabled 1

 1581 15:43:36.676234  USB3 port 1: enabled 1

 1582 15:43:36.679215  USB3 port 2: enabled 1

 1583 15:43:36.679304  USB3 port 3: enabled 1

 1584 15:43:36.682876  I2C: 00:1a: enabled 1

 1585 15:43:36.686266  I2C: 00:1a: enabled 1

 1586 15:43:36.686359  PCI: 00:18.7: enabled 1

 1587 15:43:36.689632  APIC: 03: enabled 1

 1588 15:43:36.689731  APIC: 02: enabled 1

 1589 15:43:36.692971  APIC: 01: enabled 1

 1590 15:43:36.699559  BS: BS_DEV_INIT run times (exec / console): 210 / 1032 ms

 1591 15:43:36.702823  SCIMAP 56 maps to GPE 31 (active high, edge trigger)

 1592 15:43:36.709441  ELOG: Event(A1) added with size 10 at 2023-08-07 15:43:36 UTC

 1593 15:43:36.715841  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x01

 1594 15:43:36.719028  ELOG: Event(A0) added with size 9 at 2023-08-07 15:43:36 UTC

 1595 15:43:36.722888  elog_add_boot_reason: Logged dev mode boot

 1596 15:43:36.729455  BS: BS_POST_DEVICE entry times (exec / console): 0 / 26 ms

 1597 15:43:36.729529  POST: 0x76

 1598 15:43:36.732606  Finalize devices...

 1599 15:43:36.732706  Devices finalized

 1600 15:43:36.740065  BS: BS_POST_DEVICE run times (exec / console): 0 / 5 ms

 1601 15:43:36.743219  FMAP: area RW_NVRAM found @ 617000 (20480 bytes)

 1602 15:43:36.749565  BS: BS_POST_DEVICE exit times (exec / console): 1 / 4 ms

 1603 15:43:36.749660  POST: 0x77

 1604 15:43:36.756470  BS: BS_OS_RESUME_CHECK run times (exec / console): 0 / 1 ms

 1605 15:43:36.759603  Saving dimm info for smbios type 17

 1606 15:43:36.759712  AMD_FSP_DMI_HOB found

 1607 15:43:36.763525  AGESA TYPE 17 DMI INFO:

 1608 15:43:36.763645    Handle: 1

 1609 15:43:36.766510    TotalWidth: 64

 1610 15:43:36.766649    DataWidth: 64

 1611 15:43:36.770147    MemorySize: 4096

 1612 15:43:36.770283    DeviceSet: 0

 1613 15:43:36.770389    Speed: 1333

 1614 15:43:36.773536    ManufacturerIdCode: 0

 1615 15:43:36.776778    Attributes: 1

 1616 15:43:36.776950    ExtSize: 0

 1617 15:43:36.777084    ConfigSpeed: 800

 1618 15:43:36.780056    MemoryType: 0x1a

 1619 15:43:36.780226    FormFactor: 0xd

 1620 15:43:36.783778    DeviceLocator:   DIMM 0

 1621 15:43:36.787079    BankLocator: P0 CHANNEL A

 1622 15:43:36.790145    SerialNumber(8):  00000000

 1623 15:43:36.793845    PartNumber(0):                    

 1624 15:43:36.794152  CBMEM_ID_MEMINFO:

 1625 15:43:36.796808    dimm_size: 4096

 1626 15:43:36.797174    ddr_type: 0x1a

 1627 15:43:36.800445    ddr_frequency: 0

 1628 15:43:36.800824    rank_per_dimm: 1

 1629 15:43:36.803650    channel_num: 0

 1630 15:43:36.804184    dimm_num: 0

 1631 15:43:36.804524    bank_locator: 0

 1632 15:43:36.807429    mod_id: 0

 1633 15:43:36.807845    mod_type: 0x4

 1634 15:43:36.810585    bus_width: 3

 1635 15:43:36.811001    serial: 00000000

 1636 15:43:36.813825    module_part_number(15): K4A8G165WC-BCTD

 1637 15:43:36.820637  BS: BS_WRITE_TABLES entry times (exec / console): 0 / 59 ms

 1638 15:43:36.821056  POST: 0x79

 1639 15:43:36.823624  POST: 0x9c

 1640 15:43:36.827228  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1641 15:43:36.830770  CBFS: Locating 'fallback/dsdt.aml'

 1642 15:43:36.833960  CBFS: Found @ offset 2be40 size 417b

 1643 15:43:36.837125  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1644 15:43:36.840495  CBFS: Locating 'fallback/slic'

 1645 15:43:36.843692  CBFS: 'fallback/slic' not found.

 1646 15:43:36.847521  ACPI: Writing ACPI tables at ca63a000.

 1647 15:43:36.847981  ACPI:    * FACS

 1648 15:43:36.850734  ACPI:    * DSDT

 1649 15:43:36.853928  Ramoops buffer: 0x100000@0xca53a000.

 1650 15:43:36.857115  FMAP: area RO_VPD found @ 800000 (16384 bytes)

 1651 15:43:36.860279  FMAP: area RW_VPD found @ 615000 (8192 bytes)

 1652 15:43:36.865080  ACPI:    * FADT

 1653 15:43:36.865524  pm_base: 0x0400

 1654 15:43:36.868342  ACPI: added table 1/32, length now 40

 1655 15:43:36.872044  ACPI:     * SSDT

 1656 15:43:36.874676  PSS: 1200MHz power 1461 control 0x0 status 0x0

 1657 15:43:36.878454  PSS: 800MHz power 760 control 0x1 status 0x1

 1658 15:43:36.881619  PSS: 400MHz power 364 control 0x2 status 0x2

 1659 15:43:36.888018  PSS: 1200MHz power 1461 control 0x0 status 0x0

 1660 15:43:36.891812  PSS: 800MHz power 760 control 0x1 status 0x1

 1661 15:43:36.895207  PSS: 400MHz power 364 control 0x2 status 0x2

 1662 15:43:36.898310  PSS: 1200MHz power 1461 control 0x0 status 0x0

 1663 15:43:36.905221  PSS: 800MHz power 760 control 0x1 status 0x1

 1664 15:43:36.908524  PSS: 400MHz power 364 control 0x2 status 0x2

 1665 15:43:36.911610  PSS: 1200MHz power 1461 control 0x0 status 0x0

 1666 15:43:36.915221  PSS: 800MHz power 760 control 0x1 status 0x1

 1667 15:43:36.918443  PSS: 400MHz power 364 control 0x2 status 0x2

 1668 15:43:36.925151  \_SB.MAXM: Maxim Integrated 98357A Amplifier

 1669 15:43:36.928366  \_SB.I2C3.TPMI: I2C TPM at I2C: 01:50

 1670 15:43:36.931751  \_SB.I2C2.D015: ELAN Touchpad at I2C: 02:15

 1671 15:43:36.935290  \_SB.I2C2.D010: ELAN Touchscreen at I2C: 02:10

 1672 15:43:36.938306  \_SB.I2C2.H040: G2TOUCH Touchscreen at I2C: 02:40

 1673 15:43:36.945422  \_SB.PCI0.PBR1.WF00.WF00: WIFI Device PCI: 01:00.0

 1674 15:43:36.948533  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1675 15:43:36.951898  CBFS: Locating 'pci1002,15d8,ea.rom'

 1676 15:43:36.955200  CBFS: 'pci1002,15d8,ea.rom' not found.

 1677 15:43:36.958470  Using RV2 VBIOS.

 1678 15:43:36.962215  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1679 15:43:36.965548  CBFS: Locating 'pci1002,15dd,c4.rom'

 1680 15:43:36.968678  CBFS: Found @ offset 6c9c0 size d400

 1681 15:43:36.972479  In CBFS, ROM address for PCI: 02:00.0 = 0xff8e19f8

 1682 15:43:36.979025  PCI expansion ROM, signature 0xaa55, INIT size 0xd400, data ptr 0x01b0

 1683 15:43:36.982295  PCI ROM image, vendor ID 1002, device ID 15dd,

 1684 15:43:36.988864  PCI ROM image, Class Code 030000, Code Type 00

 1685 15:43:36.989305  xHCI SSDT generation

 1686 15:43:36.991974  xhci_fill_ssdt: Got GPE 31 for PCI: 02:00.3

 1687 15:43:36.995278  xHCI Supported Protocol:

 1688 15:43:36.999383    Major: 0x2, Minor: 0x0, Protocol: 'USB '

 1689 15:43:37.002521    Port Offset: 1, Port Count: 6

 1690 15:43:37.006144  xHCI Supported Protocol:

 1691 15:43:37.009079    Major: 0x3, Minor: 0x10, Protocol: 'USB '

 1692 15:43:37.012766    Port Offset: 7, Port Count: 1

 1693 15:43:37.013190  xHCI Supported Protocol:

 1694 15:43:37.015860    Major: 0x3, Minor: 0x10, Protocol: 'USB '

 1695 15:43:37.019209    Port Offset: 8, Port Count: 1

 1696 15:43:37.022953  xHCI Supported Protocol:

 1697 15:43:37.026436    Major: 0x3, Minor: 0x10, Protocol: 'USB '

 1698 15:43:37.029515    Port Offset: 9, Port Count: 1

 1699 15:43:37.032804  xHCI Supported Protocol:

 1700 15:43:37.036017    Major: 0x3, Minor: 0x10, Protocol: 'USB '

 1701 15:43:37.039335    Port Offset: 10, Port Count: 1

 1702 15:43:37.042537  EC returned error result code 1

 1703 15:43:37.045745  PS2K: Bad resp from EC. Vivaldi disabled!

 1704 15:43:37.052766  \_SB.PCI0.PBRA.ACPD.I2S0: I2S machine driver at GENERIC: 0.0

 1705 15:43:37.055755  \_SB.PCI0.PBRA.ACPD.I2S1: I2S machine driver at GENERIC: 1.0

 1706 15:43:37.062442  \_SB.PCI0.LPCB.EC0.CREC.TUN0: Cros EC I2C Tunnel at GENERIC: 0.0

 1707 15:43:37.069552  \_SB.PCI0.LPCB.EC0.CREC.ECA0: Cros EC audio codec at GENERIC: 0.0

 1708 15:43:37.072600  \_SB.PCI0.PBRA.XHC0.RHUB.HS01: Left Type-C Port at USB2 port 0

 1709 15:43:37.079663  \_SB.PCI0.PBRA.XHC0.RHUB.HS02: Right Type-C Port at USB2 port 1

 1710 15:43:37.086646  \_SB.PCI0.PBRA.XHC0.RHUB.HS03: Left Type-A Port at USB2 port 2

 1711 15:43:37.089763  \_SB.PCI0.PBRA.XHC0.RHUB.HS04: Right Type-A Port at USB2 port 3

 1712 15:43:37.095987  \_SB.PCI0.PBRA.XHC0.RHUB.HS05: User-Facing Camera at USB2 port 4

 1713 15:43:37.102715  \_SB.PCI0.PBRA.XHC0.RHUB.HS06: Bluetooth at USB2 port 5

 1714 15:43:37.106297  \_SB.PCI0.PBRA.XHC0.RHUB.SS01: Left Type-C Port at USB3 port 0

 1715 15:43:37.112642  \_SB.PCI0.PBRA.XHC0.RHUB.SS02: Right Type-C Port at USB3 port 1

 1716 15:43:37.119856  \_SB.PCI0.PBRA.XHC0.RHUB.SS03: Left Type-A Port at USB3 port 2

 1717 15:43:37.122996  \_SB.PCI0.PBRA.XHC0.RHUB.SS04: Right Type-A Port at USB3 port 3

 1718 15:43:37.129636  \_SB.PCI0.LPCB.EC0.CREC.TUN0.RT58: Realtek RT5682 at I2C: 00:1a

 1719 15:43:37.133492  ACPI: added table 2/32, length now 44

 1720 15:43:37.133996  ACPI:    * MCFG

 1721 15:43:37.136514  ACPI: added table 3/32, length now 48

 1722 15:43:37.139699  ACPI:    * TPM2

 1723 15:43:37.143029  TPM2 log created at 0xca51c000

 1724 15:43:37.146364  ACPI: added table 4/32, length now 52

 1725 15:43:37.146839  ACPI:    * MADT

 1726 15:43:37.150257  ACPI: added table 5/32, length now 56

 1727 15:43:37.153448  current = ca640a60

 1728 15:43:37.156666  ACPI: added table 6/32, length now 60

 1729 15:43:37.157225  ACPI:    * ALIB (AGESA).

 1730 15:43:37.159999  ACPI: added table 7/32, length now 64

 1731 15:43:37.166793  ACPI: added table 8/32, length now 68

 1732 15:43:37.167238  ACPI:    * HPET

 1733 15:43:37.169859  ACPI: added table 9/32, length now 72

 1734 15:43:37.176767             Copying initialized VBIOS image from 0x000c0000

 1735 15:43:37.177169  ACPI:    * VFCT at ca6464c0

 1736 15:43:37.180100  ACPI: added table 10/32, length now 76

 1737 15:43:37.183460  ACPI: done.

 1738 15:43:37.184012  ACPI tables: 104752 bytes.

 1739 15:43:37.186686  smbios_write_tables: ca51b000

 1740 15:43:37.190611  Create SMBIOS type 16

 1741 15:43:37.193886  Create SMBIOS type 17

 1742 15:43:37.194307  PCI: 01:00.0 (WIFI Device)

 1743 15:43:37.196710  SMBIOS tables: 854 bytes.

 1744 15:43:37.200124  Writing table forward entry at 0x00000500

 1745 15:43:37.206850  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 5578

 1746 15:43:37.210263  Writing coreboot table at 0xca65e000

 1747 15:43:37.213383   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1748 15:43:37.217411   1. 0000000000001000-000000000009ffff: RAM

 1749 15:43:37.223720   2. 00000000000a0000-00000000000fffff: RESERVED

 1750 15:43:37.226966   3. 0000000000100000-0000000001ffffff: RAM

 1751 15:43:37.230900   4. 0000000002000000-00000000021bffff: RESERVED

 1752 15:43:37.233805   5. 00000000021c0000-00000000ca51afff: RAM

 1753 15:43:37.240488   6. 00000000ca51b000-00000000ca6b5fff: CONFIGURATION TABLES

 1754 15:43:37.244438   7. 00000000ca6b6000-00000000ca7c7fff: RAMSTAGE

 1755 15:43:37.250911   8. 00000000ca7c8000-00000000cb7fffff: CONFIGURATION TABLES

 1756 15:43:37.254352   9. 00000000cb800000-00000000cfffffff: RESERVED

 1757 15:43:37.257445  10. 00000000f8000000-00000000fbffffff: RESERVED

 1758 15:43:37.260509  11. 0000000100000000-000000012f33ffff: RAM

 1759 15:43:37.267606  12. 000000012f340000-000000012fffffff: RESERVED

 1760 15:43:37.268081  Passing 3 GPIOs to payload:

 1761 15:43:37.274108              NAME |       PORT | POLARITY |     VALUE

 1762 15:43:37.277828               lid |  undefined |     high |      high

 1763 15:43:37.284296             power |  undefined |     high |       low

 1764 15:43:37.287568          EC in RW | 0x0000000b |     high |      high

 1765 15:43:37.290673  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1766 15:43:37.297842  Wrote coreboot table at: 0xca65e000, 0x528 bytes, checksum 5dd6

 1767 15:43:37.300919  coreboot table: 1344 bytes.

 1768 15:43:37.304580  IMD ROOT    0. 0xcb7ff000 0x00001000

 1769 15:43:37.307583  IMD SMALL   1. 0xcb7fe000 0x00001000

 1770 15:43:37.311245  FSP MEMORY  2. 0xca7fe000 0x01000000

 1771 15:43:37.314309  CONSOLE     3. 0xca7de000 0x00020000

 1772 15:43:37.318154  FMAP        4. 0xca7dd000 0x00000452

 1773 15:43:37.321145  TIME STAMP  5. 0xca7dc000 0x00000910

 1774 15:43:37.324918  VBOOT WORK  6. 0xca7c8000 0x00014000

 1775 15:43:37.327986  RAMSTAGE    7. 0xca6b5000 0x00113000

 1776 15:43:37.331371  REFCODE     8. 0xca677000 0x0003e000

 1777 15:43:37.334531  ACPI GNVS   9. 0xca676000 0x00001000

 1778 15:43:37.337623  SMM BACKUP 10. 0xca666000 0x00010000

 1779 15:43:37.341195  COREBOOT   11. 0xca65e000 0x00008000

 1780 15:43:37.344478  ACPI       12. 0xca63a000 0x00024000

 1781 15:43:37.347713  RAMOOPS    13. 0xca53a000 0x00100000

 1782 15:43:37.351676  VGA ROM #0 14. 0xca52c000 0x0000d400

 1783 15:43:37.354865  TPM2 TCGLOG15. 0xca51c000 0x00010000

 1784 15:43:37.358106  SMBIOS     16. 0xca51b000 0x00000800

 1785 15:43:37.358527  IMD small region:

 1786 15:43:37.361289    IMD ROOT    0. 0xcb7fec00 0x00000400

 1787 15:43:37.365056    FSP RUNTIME 1. 0xcb7febe0 0x00000004

 1788 15:43:37.368231    VPD         2. 0xcb7feb80 0x00000047

 1789 15:43:37.371579    POWER STATE 3. 0xcb7feb40 0x00000030

 1790 15:43:37.374738    ROMSTAGE    4. 0xcb7feb20 0x00000004

 1791 15:43:37.381726    EARLY DRAM USAGE 5. 0xcb7feb00 0x00000008

 1792 15:43:37.384646    MEM INFO    6. 0xcb7fe920 0x000001e0

 1793 15:43:37.388141  BS: BS_WRITE_TABLES run times (exec / console): 4 / 559 ms

 1794 15:43:37.391630  Probing TPM I2C: done! DID_VID 0x00281ae0

 1795 15:43:37.394720  Locality already claimed

 1796 15:43:37.398166  cr50 TPM 2.0 (i2c 3:0x50 id 0x28)

 1797 15:43:37.401462  Checking cr50 for pending updates

 1798 15:43:37.412630  Reading cr50 TPM mode

 1799 15:43:37.426440  BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 14 ms

 1800 15:43:37.426980  POST: 0x7a

 1801 15:43:37.433203  FMAP: area COREBOOT found @ 875000 (7909376 bytes)

 1802 15:43:37.436427  CBFS: Locating 'fallback/payload'

 1803 15:43:37.439669  CBFS: Found @ offset 53b780 size 23354

 1804 15:43:37.442831  Checking segment from ROM address 0xffdb07b8

 1805 15:43:37.446628  Checking segment from ROM address 0xffdb07d4

 1806 15:43:37.449640  Loading segment from ROM address 0xffdb07b8

 1807 15:43:37.453526    code (compression=1)

 1808 15:43:37.459880    New segment dstaddr 0x30000000 memsize 0x10651f0 srcaddr 0xffdb07f0 filesize 0x2331c

 1809 15:43:37.469610  Loading Segment: addr: 0x30000000 memsz: 0x00000000010651f0 filesz: 0x000000000002331c

 1810 15:43:37.470159  using LZMA

 1811 15:43:37.509025  [ 0x30000000, 3004d29c, 0x310651f0) <- ffdb07f0

 1812 15:43:37.516279  Clearing Segment: addr: 0x000000003004d29c memsz: 0x0000000001017f54

 1813 15:43:37.522831  Loading segment from ROM address 0xffdb07d4

 1814 15:43:37.523292    Entry Point 0x30000000

 1815 15:43:37.526448  Loaded segments

 1816 15:43:37.529461  BS: BS_PAYLOAD_LOAD run times (exec / console): 39 / 60 ms

 1817 15:43:37.533139  0x00000040: notify_params->phase

 1818 15:43:37.536312  Calling FspNotify: 0xca6773b8

 1819 15:43:37.539254  	0xca6fff6c: notify_params

 1820 15:43:37.539726  POST: 0x95

 1821 15:43:37.544426  POST: 0x95

 1822 15:43:37.547714  FspNotify returned 0x00000000

 1823 15:43:37.550964  0x000000f0: notify_params->phase

 1824 15:43:37.551387  Calling FspNotify: 0xca6773b8

 1825 15:43:37.554772  	0xca6fff7c: notify_params

 1826 15:43:37.555294  POST: 0x88

 1827 15:43:37.557814  POST: 0x89

 1828 15:43:37.560986  FspNotify returned 0x00000000

 1829 15:43:37.561407  Lock SMM configuration

 1830 15:43:37.561736  POST: 0xfe

 1831 15:43:37.567759  BS: BS_PAYLOAD_LOAD exit times (exec / console): 3 / 29 ms

 1832 15:43:37.570879  PSP: Notify that POST is finishing... OK

 1833 15:43:37.577406  BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 4 ms

 1834 15:43:37.577883  POST: 0x7b

 1835 15:43:37.581300  mp_park_aps done after 0 msecs.

 1836 15:43:37.584564  Jumping to boot code at 0x30000000(0xca65e000)

 1837 15:43:37.584982  POST: 0xf8

 1838 15:43:37.594249  CPU0: stack: 0xca6ff000 - 0xca700000, lowest used address 0xca6ff92c, stack used: 1748 bytes

 1839 15:43:37.594668  

 1840 15:43:37.594993  

 1841 15:43:37.595293  

 1842 15:43:37.598006  Starting depthcharge on Gumboz...

 1843 15:43:37.598420  

 1844 15:43:37.599388  end: 2.2.3 depthcharge-start (duration 00:00:09) [common]
 1845 15:43:37.599878  start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
 1846 15:43:37.600325  Setting prompt string to ['zork:']
 1847 15:43:37.600722  bootloader-commands: Wait for prompt ['zork:'] (timeout 00:04:46)
 1848 15:43:37.604440  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1849 15:43:37.604861  

 1850 15:43:37.611452  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1851 15:43:37.611873  

 1852 15:43:37.614582  new_rt5682_codec: chip = 0x1A

 1853 15:43:37.619573  

 1854 15:43:37.620014  Failed to find SD card reader

 1855 15:43:37.620350  

 1856 15:43:37.626143  Looking for NVMe Controller 0x300616d8 @ 00:01:07

 1857 15:43:37.626621  

 1858 15:43:37.626955  Wipe memory regions:

 1859 15:43:37.627261  

 1860 15:43:37.629178  	[0x00000000001000, 0x000000000a0000)

 1861 15:43:37.629594  

 1862 15:43:37.632622  	[0x00000000100000, 0x00000002000000)

 1863 15:43:37.641014  

 1864 15:43:37.641471  	[0x000000021c0000, 0x00000030000000)

 1865 15:43:37.793716  

 1866 15:43:37.794284  	[0x000000310651f0, 0x000000ca51b000)

 1867 15:43:38.290271  

 1868 15:43:38.290427  	[0x00000100000000, 0x0000012f340000)

 1869 15:43:38.958798  

 1870 15:43:38.959346  R8152: Initializing

 1871 15:43:38.959723  

 1872 15:43:38.961807  Version 6 (ocp_data = 5c30)

 1873 15:43:38.962236  

 1874 15:43:38.965268  R8152: Done initializing

 1875 15:43:38.965688  

 1876 15:43:38.966006  Adding net device

 1877 15:43:39.268405  

 1878 15:43:39.271810  [firmware-zork-13434.B-collabora] Nov  9 2022 15:18:25

 1879 15:43:39.272536  

 1880 15:43:39.273072  

 1881 15:43:39.273472  

 1882 15:43:39.274406  Setting prompt string to ['zork:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1884 15:43:39.375845  zork: tftpboot 192.168.201.1 11224155/tftp-deploy-8ura3dw0/kernel/bzImage 11224155/tftp-deploy-8ura3dw0/kernel/cmdline 11224155/tftp-deploy-8ura3dw0/ramdisk/ramdisk.cpio.gz

 1885 15:43:39.376485  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1886 15:43:39.376990  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:44)
 1887 15:43:39.381315  tftpboot 192.168.201.1 11224155/tftp-deploy-8ura3dw0/kernel/bzImagedw0/kernel/cmdline 11224155/tftp-deploy-8ura3dw0/ramdisk/ramdisk.cpio.gz

 1888 15:43:39.381780  

 1889 15:43:39.382110  Waiting for link

 1890 15:43:39.583949  

 1891 15:43:39.584496  done.

 1892 15:43:39.584877  

 1893 15:43:39.585414  MAC: 00:24:32:50:19:16

 1894 15:43:39.585902  

 1895 15:43:39.587243  Sending DHCP discover... done.

 1896 15:43:39.587664  

 1897 15:43:39.590318  Waiting for reply... done.

 1898 15:43:39.590927  

 1899 15:43:39.593582  Sending DHCP request... done.

 1900 15:43:39.594123  

 1901 15:43:39.594598  Waiting for reply... done.

 1902 15:43:39.596746  

 1903 15:43:39.597179  My ip is 192.168.201.15

 1904 15:43:39.597522  

 1905 15:43:39.600568  The DHCP server ip is 192.168.201.1

 1906 15:43:39.600989  

 1907 15:43:39.603627  TFTP server IP predefined by user: 192.168.201.1

 1908 15:43:39.604095  

 1909 15:43:39.610257  Bootfile predefined by user: 11224155/tftp-deploy-8ura3dw0/kernel/bzImage

 1910 15:43:39.610749  

 1911 15:43:39.613399  Sending tftp read request... done.

 1912 15:43:39.613898  

 1913 15:43:39.622379  Waiting for the transfer... 

 1914 15:43:39.622885  

 1915 15:43:40.229813  00000000 ################################################################

 1916 15:43:40.230408  

 1917 15:43:40.893508  00080000 ################################################################

 1918 15:43:40.893658  

 1919 15:43:41.443127  00100000 ################################################################

 1920 15:43:41.443330  

 1921 15:43:41.977184  00180000 ################################################################

 1922 15:43:41.977355  

 1923 15:43:42.537416  00200000 ################################################################

 1924 15:43:42.537564  

 1925 15:43:43.203092  00280000 ################################################################

 1926 15:43:43.203611  

 1927 15:43:43.804677  00300000 ################################################################

 1928 15:43:43.804850  

 1929 15:43:44.411366  00380000 ################################################################

 1930 15:43:44.411547  

 1931 15:43:45.030295  00400000 ################################################################

 1932 15:43:45.030464  

 1933 15:43:45.609322  00480000 ################################################################

 1934 15:43:45.609903  

 1935 15:43:46.188739  00500000 ################################################################

 1936 15:43:46.188892  

 1937 15:43:46.804381  00580000 ################################################################

 1938 15:43:46.804555  

 1939 15:43:47.415481  00600000 ################################################################

 1940 15:43:47.415642  

 1941 15:43:48.080331  00680000 ################################################################

 1942 15:43:48.080982  

 1943 15:43:48.743899  00700000 ################################################################

 1944 15:43:48.744739  

 1945 15:43:48.766431  00780000 ### done.

 1946 15:43:48.766544  

 1947 15:43:48.769647  The bootfile was 7884688 bytes long.

 1948 15:43:48.769787  

 1949 15:43:48.773410  Sending tftp read request... done.

 1950 15:43:48.773512  

 1951 15:43:48.773613  Waiting for the transfer... 

 1952 15:43:48.773708  

 1953 15:43:49.327912  00000000 ################################################################

 1954 15:43:49.328094  

 1955 15:43:49.876238  00080000 ################################################################

 1956 15:43:49.876393  

 1957 15:43:50.490195  00100000 ################################################################

 1958 15:43:50.490372  

 1959 15:43:51.049812  00180000 ################################################################

 1960 15:43:51.049953  

 1961 15:43:51.620648  00200000 ################################################################

 1962 15:43:51.620825  

 1963 15:43:52.165597  00280000 ################################################################

 1964 15:43:52.165747  

 1965 15:43:52.698831  00300000 ################################################################

 1966 15:43:52.698980  

 1967 15:43:53.267782  00380000 ################################################################

 1968 15:43:53.268001  

 1969 15:43:53.825943  00400000 ################################################################

 1970 15:43:53.826088  

 1971 15:43:54.392161  00480000 ################################################################

 1972 15:43:54.392310  

 1973 15:43:54.952568  00500000 ################################################################

 1974 15:43:54.952740  

 1975 15:43:55.505600  00580000 ################################################################

 1976 15:43:55.506127  

 1977 15:43:56.120940  00600000 ################################################################

 1978 15:43:56.121090  

 1979 15:43:56.686380  00680000 ################################################################

 1980 15:43:56.686519  

 1981 15:43:57.218169  00700000 ################################################################

 1982 15:43:57.218349  

 1983 15:43:57.753211  00780000 ################################################################

 1984 15:43:57.753389  

 1985 15:43:58.227278  00800000 ###################################################### done.

 1986 15:43:58.227453  

 1987 15:43:58.230503  Sending tftp read request... done.

 1988 15:43:58.230613  

 1989 15:43:58.233771  Waiting for the transfer... 

 1990 15:43:58.233873  

 1991 15:43:58.233969  00000000 # done.

 1992 15:43:58.234060  

 1993 15:43:58.244130  Command line loaded dynamically from TFTP file: 11224155/tftp-deploy-8ura3dw0/kernel/cmdline

 1994 15:43:58.244213  

 1995 15:43:58.257478  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 1996 15:43:58.257570  

 1997 15:43:58.260430  ec_init: CrosEC protocol v3 supported (256, 256)

 1998 15:43:58.267722  

 1999 15:43:58.267829  Shutting down all USB controllers.

 2000 15:43:58.267957  

 2001 15:43:58.271328  Removing current net device

 2002 15:43:58.271440  

 2003 15:43:58.274387  Finalizing coreboot

 2004 15:43:58.274468  

 2005 15:43:58.274531  

 2006 15:43:58.274593  

 2007 15:43:58.281356  coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 smm starting (log level: 8)...

 2008 15:43:58.281438  

 2009 15:43:58.281501  SMI# #0

 2010 15:43:58.288271  Exiting depthcharge with code 4 at timestamp: 28559025

 2011 15:43:58.288352  

 2012 15:43:58.288415  

 2013 15:43:58.288473  Starting kernel ...

 2014 15:43:58.288530  

 2015 15:43:58.288584  

 2016 15:43:58.288944  end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
 2017 15:43:58.289041  start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
 2018 15:43:58.289124  Setting prompt string to ['Linux version [0-9]']
 2019 15:43:58.289191  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2020 15:43:58.289256  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2021 15:43:58.607999  

 2022 15:43:58.608556  

 2023 15:43:58.608886  

 2024 15:43:58.614272  coreboot-e6103af7 Mon Sep 12 14:38:59 UTC 2022 smm starting (log level: 8)...

 2025 15:43:58.614854  

 2026 15:43:58.615199  SMI# #0

 2027 15:43:58.617819  Chrome EC: Set SMI mask to 0x0000000000000000

 2028 15:43:58.621407  Chrome EC: UHEPI supported

 2029 15:43:58.627828  Clearing pending EC events. Error code EC_RES_UNAVAILABLE(9) is expected.

 2030 15:43:58.631071  EC returned error result code 9

 2031 15:43:58.634423  Chrome EC: Set SCI mask to 0x00000000142609fb

 2033 15:48:23.289304  end: 2.2.5 auto-login-action (duration 00:04:25) [common]
 2035 15:48:23.289506  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
 2037 15:48:23.289673  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2040 15:48:23.289921  end: 2 depthcharge-action (duration 00:05:00) [common]
 2042 15:48:23.290200  Cleaning after the job
 2043 15:48:23.290296  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224155/tftp-deploy-8ura3dw0/ramdisk
 2044 15:48:23.291852  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224155/tftp-deploy-8ura3dw0/kernel
 2045 15:48:23.293183  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11224155/tftp-deploy-8ura3dw0/modules
 2046 15:48:23.293553  start: 5.1 power-off (timeout 00:00:30) [common]
 2047 15:48:23.293717  Calling: 'pduclient' '--daemon=localhost' '--hostname=hp-x360-14a-cb0001xx-zork-cbg-5' '--port=1' '--command=off'
 2048 15:48:23.372990  >> Command sent successfully.

 2049 15:48:23.375388  Returned 0 in 0 seconds
 2050 15:48:23.475783  end: 5.1 power-off (duration 00:00:00) [common]
 2052 15:48:23.476155  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2053 15:48:23.476456  Listened to connection for namespace 'common' for up to 1s
 2054 15:48:23.476749  Listened to connection for namespace 'common' for up to 1s
 2055 15:48:24.477384  Finalising connection for namespace 'common'
 2056 15:48:24.477595  Disconnecting from shell: Finalise
 2057 15:48:24.477677  
 2058 15:48:24.578026  end: 5.2 read-feedback (duration 00:00:01) [common]
 2059 15:48:24.578191  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11224155
 2060 15:48:24.595745  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11224155
 2061 15:48:24.596123  JobError: Your job cannot terminate cleanly.