Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
- Kernel Warnings: 0
1 15:57:23.210751 lava-dispatcher, installed at version: 2023.06
2 15:57:23.210971 start: 0 validate
3 15:57:23.211103 Start time: 2023-09-06 15:57:23.211093+00:00 (UTC)
4 15:57:23.211236 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:57:23.211388 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 15:57:23.481990 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:57:23.482934 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1638-gdc4a7f7fb55c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:57:23.753764 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:57:23.753933 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:58:09.925144 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:58:09.925333 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1638-gdc4a7f7fb55c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:58:10.196401 validate duration: 46.99
14 15:58:10.196676 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:58:10.196776 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:58:10.196868 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:58:10.196993 Not decompressing ramdisk as can be used compressed.
18 15:58:10.197082 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 15:58:10.197148 saving as /var/lib/lava/dispatcher/tmp/11447431/tftp-deploy-r_v47lj7/ramdisk/initrd.cpio.gz
20 15:58:10.197213 total size: 5432690 (5 MB)
21 15:58:12.320363 progress 0 % (0 MB)
22 15:58:12.322101 progress 5 % (0 MB)
23 15:58:12.323550 progress 10 % (0 MB)
24 15:58:12.325012 progress 15 % (0 MB)
25 15:58:12.326661 progress 20 % (1 MB)
26 15:58:12.328168 progress 25 % (1 MB)
27 15:58:12.329613 progress 30 % (1 MB)
28 15:58:12.331172 progress 35 % (1 MB)
29 15:58:12.332618 progress 40 % (2 MB)
30 15:58:12.334144 progress 45 % (2 MB)
31 15:58:12.335565 progress 50 % (2 MB)
32 15:58:12.337149 progress 55 % (2 MB)
33 15:58:12.338532 progress 60 % (3 MB)
34 15:58:12.339989 progress 65 % (3 MB)
35 15:58:12.341657 progress 70 % (3 MB)
36 15:58:12.343047 progress 75 % (3 MB)
37 15:58:12.344472 progress 80 % (4 MB)
38 15:58:12.345876 progress 85 % (4 MB)
39 15:58:12.347420 progress 90 % (4 MB)
40 15:58:12.348866 progress 95 % (4 MB)
41 15:58:12.350279 progress 100 % (5 MB)
42 15:58:12.350494 5 MB downloaded in 2.15 s (2.41 MB/s)
43 15:58:12.350652 end: 1.1.1 http-download (duration 00:00:02) [common]
45 15:58:12.350891 end: 1.1 download-retry (duration 00:00:02) [common]
46 15:58:12.350978 start: 1.2 download-retry (timeout 00:09:58) [common]
47 15:58:12.351063 start: 1.2.1 http-download (timeout 00:09:58) [common]
48 15:58:12.351198 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1638-gdc4a7f7fb55c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:58:12.351278 saving as /var/lib/lava/dispatcher/tmp/11447431/tftp-deploy-r_v47lj7/kernel/bzImage
50 15:58:12.351341 total size: 8490896 (8 MB)
51 15:58:12.351402 No compression specified
52 15:58:12.352603 progress 0 % (0 MB)
53 15:58:12.355039 progress 5 % (0 MB)
54 15:58:12.357386 progress 10 % (0 MB)
55 15:58:12.359673 progress 15 % (1 MB)
56 15:58:12.361966 progress 20 % (1 MB)
57 15:58:12.364264 progress 25 % (2 MB)
58 15:58:12.366511 progress 30 % (2 MB)
59 15:58:12.368773 progress 35 % (2 MB)
60 15:58:12.371028 progress 40 % (3 MB)
61 15:58:12.373317 progress 45 % (3 MB)
62 15:58:12.375567 progress 50 % (4 MB)
63 15:58:12.377950 progress 55 % (4 MB)
64 15:58:12.380284 progress 60 % (4 MB)
65 15:58:12.382530 progress 65 % (5 MB)
66 15:58:12.384837 progress 70 % (5 MB)
67 15:58:12.387062 progress 75 % (6 MB)
68 15:58:12.389374 progress 80 % (6 MB)
69 15:58:12.391570 progress 85 % (6 MB)
70 15:58:12.393848 progress 90 % (7 MB)
71 15:58:12.396209 progress 95 % (7 MB)
72 15:58:12.398440 progress 100 % (8 MB)
73 15:58:12.398561 8 MB downloaded in 0.05 s (171.49 MB/s)
74 15:58:12.398728 end: 1.2.1 http-download (duration 00:00:00) [common]
76 15:58:12.398972 end: 1.2 download-retry (duration 00:00:00) [common]
77 15:58:12.399076 start: 1.3 download-retry (timeout 00:09:58) [common]
78 15:58:12.399166 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 15:58:12.399302 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 15:58:12.399371 saving as /var/lib/lava/dispatcher/tmp/11447431/tftp-deploy-r_v47lj7/nfsrootfs/full.rootfs.tar
81 15:58:12.399444 total size: 133380384 (127 MB)
82 15:58:12.399522 Using unxz to decompress xz
83 15:58:12.403702 progress 0 % (0 MB)
84 15:58:12.770667 progress 5 % (6 MB)
85 15:58:13.138234 progress 10 % (12 MB)
86 15:58:13.448182 progress 15 % (19 MB)
87 15:58:13.646316 progress 20 % (25 MB)
88 15:58:13.910099 progress 25 % (31 MB)
89 15:58:14.287002 progress 30 % (38 MB)
90 15:58:14.658692 progress 35 % (44 MB)
91 15:58:15.093241 progress 40 % (50 MB)
92 15:58:15.500938 progress 45 % (57 MB)
93 15:58:15.870417 progress 50 % (63 MB)
94 15:58:16.258363 progress 55 % (69 MB)
95 15:58:16.636779 progress 60 % (76 MB)
96 15:58:17.016892 progress 65 % (82 MB)
97 15:58:17.398714 progress 70 % (89 MB)
98 15:58:17.790951 progress 75 % (95 MB)
99 15:58:18.252077 progress 80 % (101 MB)
100 15:58:18.703822 progress 85 % (108 MB)
101 15:58:18.975262 progress 90 % (114 MB)
102 15:58:19.329415 progress 95 % (120 MB)
103 15:58:19.728161 progress 100 % (127 MB)
104 15:58:19.733620 127 MB downloaded in 7.33 s (17.34 MB/s)
105 15:58:19.733872 end: 1.3.1 http-download (duration 00:00:07) [common]
107 15:58:19.734137 end: 1.3 download-retry (duration 00:00:07) [common]
108 15:58:19.734230 start: 1.4 download-retry (timeout 00:09:50) [common]
109 15:58:19.734318 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 15:58:19.734486 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1638-gdc4a7f7fb55c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:58:19.734561 saving as /var/lib/lava/dispatcher/tmp/11447431/tftp-deploy-r_v47lj7/modules/modules.tar
112 15:58:19.734623 total size: 250824 (0 MB)
113 15:58:19.734688 Using unxz to decompress xz
114 15:58:19.738622 progress 13 % (0 MB)
115 15:58:19.739023 progress 26 % (0 MB)
116 15:58:19.739257 progress 39 % (0 MB)
117 15:58:19.740922 progress 52 % (0 MB)
118 15:58:19.742753 progress 65 % (0 MB)
119 15:58:19.744717 progress 78 % (0 MB)
120 15:58:19.746563 progress 91 % (0 MB)
121 15:58:19.748335 progress 100 % (0 MB)
122 15:58:19.753928 0 MB downloaded in 0.02 s (12.39 MB/s)
123 15:58:19.754170 end: 1.4.1 http-download (duration 00:00:00) [common]
125 15:58:19.754426 end: 1.4 download-retry (duration 00:00:00) [common]
126 15:58:19.754520 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
127 15:58:19.754616 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
128 15:58:21.937158 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11447431/extract-nfsrootfs-muz9b83m
129 15:58:21.937366 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 15:58:21.937466 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
131 15:58:21.937632 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb
132 15:58:21.937767 makedir: /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin
133 15:58:21.937873 makedir: /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/tests
134 15:58:21.937974 makedir: /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/results
135 15:58:21.938077 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-add-keys
136 15:58:21.938221 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-add-sources
137 15:58:21.938352 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-background-process-start
138 15:58:21.938485 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-background-process-stop
139 15:58:21.938652 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-common-functions
140 15:58:21.938779 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-echo-ipv4
141 15:58:21.938905 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-install-packages
142 15:58:21.939031 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-installed-packages
143 15:58:21.939155 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-os-build
144 15:58:21.939283 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-probe-channel
145 15:58:21.939411 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-probe-ip
146 15:58:21.939537 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-target-ip
147 15:58:21.939798 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-target-mac
148 15:58:21.939929 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-target-storage
149 15:58:21.940057 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-test-case
150 15:58:21.940185 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-test-event
151 15:58:21.940311 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-test-feedback
152 15:58:21.940437 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-test-raise
153 15:58:21.940603 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-test-reference
154 15:58:21.940730 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-test-runner
155 15:58:21.940860 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-test-set
156 15:58:21.940986 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-test-shell
157 15:58:21.941113 Updating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-install-packages (oe)
158 15:58:21.941269 Updating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/bin/lava-installed-packages (oe)
159 15:58:21.941408 Creating /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/environment
160 15:58:21.941560 LAVA metadata
161 15:58:21.941634 - LAVA_JOB_ID=11447431
162 15:58:21.941698 - LAVA_DISPATCHER_IP=192.168.201.1
163 15:58:21.941802 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
164 15:58:21.941868 skipped lava-vland-overlay
165 15:58:21.941943 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 15:58:21.942021 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
167 15:58:21.942082 skipped lava-multinode-overlay
168 15:58:21.942155 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 15:58:21.942233 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
170 15:58:21.942307 Loading test definitions
171 15:58:21.942393 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
172 15:58:21.942461 Using /lava-11447431 at stage 0
173 15:58:21.942777 uuid=11447431_1.5.2.3.1 testdef=None
174 15:58:21.942866 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 15:58:21.942951 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
176 15:58:21.943463 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 15:58:21.943725 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
179 15:58:21.944387 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 15:58:21.944619 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
182 15:58:21.945248 runner path: /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/0/tests/0_dmesg test_uuid 11447431_1.5.2.3.1
183 15:58:21.945405 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 15:58:21.945628 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:48) [common]
186 15:58:21.945699 Using /lava-11447431 at stage 1
187 15:58:21.946011 uuid=11447431_1.5.2.3.5 testdef=None
188 15:58:21.946100 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 15:58:21.946185 start: 1.5.2.3.6 test-overlay (timeout 00:09:48) [common]
190 15:58:21.946659 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 15:58:21.946877 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:48) [common]
193 15:58:21.947526 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 15:58:21.947804 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:48) [common]
196 15:58:21.948442 runner path: /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/1/tests/1_bootrr test_uuid 11447431_1.5.2.3.5
197 15:58:21.948596 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 15:58:21.948800 Creating lava-test-runner.conf files
200 15:58:21.948863 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/0 for stage 0
201 15:58:21.948953 - 0_dmesg
202 15:58:21.949032 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11447431/lava-overlay-vv8ufihb/lava-11447431/1 for stage 1
203 15:58:21.949124 - 1_bootrr
204 15:58:21.949220 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 15:58:21.949307 start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
206 15:58:21.956797 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 15:58:21.956901 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:48) [common]
208 15:58:21.956986 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 15:58:21.957073 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 15:58:21.957156 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:48) [common]
211 15:58:22.094864 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 15:58:22.095253 start: 1.5.4 extract-modules (timeout 00:09:48) [common]
213 15:58:22.095374 extracting modules file /var/lib/lava/dispatcher/tmp/11447431/tftp-deploy-r_v47lj7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11447431/extract-nfsrootfs-muz9b83m
214 15:58:22.108855 extracting modules file /var/lib/lava/dispatcher/tmp/11447431/tftp-deploy-r_v47lj7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11447431/extract-overlay-ramdisk-b0vm1c1k/ramdisk
215 15:58:22.122174 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 15:58:22.122297 start: 1.5.5 apply-overlay-tftp (timeout 00:09:48) [common]
217 15:58:22.122384 [common] Applying overlay to NFS
218 15:58:22.122455 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11447431/compress-overlay-b_32vg08/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11447431/extract-nfsrootfs-muz9b83m
219 15:58:22.130660 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 15:58:22.130773 start: 1.5.6 configure-preseed-file (timeout 00:09:48) [common]
221 15:58:22.130861 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 15:58:22.130946 start: 1.5.7 compress-ramdisk (timeout 00:09:48) [common]
223 15:58:22.131023 Building ramdisk /var/lib/lava/dispatcher/tmp/11447431/extract-overlay-ramdisk-b0vm1c1k/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11447431/extract-overlay-ramdisk-b0vm1c1k/ramdisk
224 15:58:22.199822 >> 26159 blocks
225 15:58:22.735499 rename /var/lib/lava/dispatcher/tmp/11447431/extract-overlay-ramdisk-b0vm1c1k/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11447431/tftp-deploy-r_v47lj7/ramdisk/ramdisk.cpio.gz
226 15:58:22.735956 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 15:58:22.736077 start: 1.5.8 prepare-kernel (timeout 00:09:47) [common]
228 15:58:22.736176 start: 1.5.8.1 prepare-fit (timeout 00:09:47) [common]
229 15:58:22.736279 No mkimage arch provided, not using FIT.
230 15:58:22.736374 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 15:58:22.736462 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 15:58:22.736566 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 15:58:22.736661 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:47) [common]
234 15:58:22.736739 No LXC device requested
235 15:58:22.736815 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 15:58:22.736902 start: 1.7 deploy-device-env (timeout 00:09:47) [common]
237 15:58:22.736980 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 15:58:22.737048 Checking files for TFTP limit of 4294967296 bytes.
239 15:58:22.737452 end: 1 tftp-deploy (duration 00:00:13) [common]
240 15:58:22.737556 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 15:58:22.737649 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 15:58:22.737770 substitutions:
243 15:58:22.737835 - {DTB}: None
244 15:58:22.737898 - {INITRD}: 11447431/tftp-deploy-r_v47lj7/ramdisk/ramdisk.cpio.gz
245 15:58:22.737956 - {KERNEL}: 11447431/tftp-deploy-r_v47lj7/kernel/bzImage
246 15:58:22.738014 - {LAVA_MAC}: None
247 15:58:22.738070 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11447431/extract-nfsrootfs-muz9b83m
248 15:58:22.738126 - {NFS_SERVER_IP}: 192.168.201.1
249 15:58:22.738181 - {PRESEED_CONFIG}: None
250 15:58:22.738236 - {PRESEED_LOCAL}: None
251 15:58:22.738289 - {RAMDISK}: 11447431/tftp-deploy-r_v47lj7/ramdisk/ramdisk.cpio.gz
252 15:58:22.738343 - {ROOT_PART}: None
253 15:58:22.738397 - {ROOT}: None
254 15:58:22.738451 - {SERVER_IP}: 192.168.201.1
255 15:58:22.738505 - {TEE}: None
256 15:58:22.738561 Parsed boot commands:
257 15:58:22.738616 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 15:58:22.738792 Parsed boot commands: tftpboot 192.168.201.1 11447431/tftp-deploy-r_v47lj7/kernel/bzImage 11447431/tftp-deploy-r_v47lj7/kernel/cmdline 11447431/tftp-deploy-r_v47lj7/ramdisk/ramdisk.cpio.gz
259 15:58:22.738883 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 15:58:22.738969 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 15:58:22.739059 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 15:58:22.739144 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 15:58:22.739214 Not connected, no need to disconnect.
264 15:58:22.739289 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 15:58:22.739372 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 15:58:22.739443 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
267 15:58:22.743239 Setting prompt string to ['lava-test: # ']
268 15:58:22.743606 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 15:58:22.743755 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 15:58:22.743856 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 15:58:22.743947 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 15:58:22.744200 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
273 15:58:27.890760 >> Command sent successfully.
274 15:58:27.902077 Returned 0 in 5 seconds
275 15:58:28.003472 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 15:58:28.005195 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 15:58:28.005753 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 15:58:28.006217 Setting prompt string to 'Starting depthcharge on Helios...'
280 15:58:28.006585 Changing prompt to 'Starting depthcharge on Helios...'
281 15:58:28.006936 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 15:58:28.008369 [Enter `^Ec?' for help]
283 15:58:28.615413
284 15:58:28.615811
285 15:58:28.625362 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 15:58:28.628644 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 15:58:28.635056 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 15:58:28.638372 CPU: AES supported, TXT NOT supported, VT supported
289 15:58:28.644932 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 15:58:28.648376 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 15:58:28.655116 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 15:58:28.658482 VBOOT: Loading verstage.
293 15:58:28.661689 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 15:58:28.668185 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 15:58:28.671840 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 15:58:28.674848 CBFS @ c08000 size 3f8000
297 15:58:28.681448 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 15:58:28.684670 CBFS: Locating 'fallback/verstage'
299 15:58:28.688251 CBFS: Found @ offset 10fb80 size 1072c
300 15:58:28.692282
301 15:58:28.692585
302 15:58:28.701740 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 15:58:28.716467 Probing TPM: . done!
304 15:58:28.719869 TPM ready after 0 ms
305 15:58:28.722964 Connected to device vid:did:rid of 1ae0:0028:00
306 15:58:28.733297 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
307 15:58:28.736733 Initialized TPM device CR50 revision 0
308 15:58:28.783591 tlcl_send_startup: Startup return code is 0
309 15:58:28.784126 TPM: setup succeeded
310 15:58:28.796277 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 15:58:28.800222 Chrome EC: UHEPI supported
312 15:58:28.803365 Phase 1
313 15:58:28.806774 FMAP: area GBB found @ c05000 (12288 bytes)
314 15:58:28.813844 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 15:58:28.814296 Phase 2
316 15:58:28.817257 Phase 3
317 15:58:28.820458 FMAP: area GBB found @ c05000 (12288 bytes)
318 15:58:28.826922 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 15:58:28.833372 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
320 15:58:28.837067 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
321 15:58:28.843734 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 15:58:28.859111 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
323 15:58:28.862483 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
324 15:58:28.868963 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 15:58:28.873152 Phase 4
326 15:58:28.876529 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
327 15:58:28.882857 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 15:58:29.062843 VB2:vb2_rsa_verify_digest() Digest check failed!
329 15:58:29.066008 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 15:58:29.069479 Saving nvdata
331 15:58:29.072743 Reboot requested (10020007)
332 15:58:29.075958 board_reset() called!
333 15:58:29.076621 full_reset() called!
334 15:58:33.581866
335 15:58:33.582039
336 15:58:33.592024 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
337 15:58:33.595359 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
338 15:58:33.601797 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
339 15:58:33.605112 CPU: AES supported, TXT NOT supported, VT supported
340 15:58:33.611608 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
341 15:58:33.614962 PCH: device id 0284 (rev 00) is Cometlake-U Premium
342 15:58:33.621655 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
343 15:58:33.624861 VBOOT: Loading verstage.
344 15:58:33.628683 FMAP: Found "FLASH" version 1.1 at 0xc04000.
345 15:58:33.635283 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
346 15:58:33.638158 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
347 15:58:33.641791 CBFS @ c08000 size 3f8000
348 15:58:33.648392 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
349 15:58:33.651609 CBFS: Locating 'fallback/verstage'
350 15:58:33.655085 CBFS: Found @ offset 10fb80 size 1072c
351 15:58:33.658294
352 15:58:33.658415
353 15:58:33.668331 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
354 15:58:33.682692 Probing TPM: . done!
355 15:58:33.686237 TPM ready after 0 ms
356 15:58:33.689311 Connected to device vid:did:rid of 1ae0:0028:00
357 15:58:33.699691 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
358 15:58:33.703310 Initialized TPM device CR50 revision 0
359 15:58:33.750054 tlcl_send_startup: Startup return code is 0
360 15:58:33.750205 TPM: setup succeeded
361 15:58:33.762788 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
362 15:58:33.766689 Chrome EC: UHEPI supported
363 15:58:33.769932 Phase 1
364 15:58:33.773423 FMAP: area GBB found @ c05000 (12288 bytes)
365 15:58:33.780139 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
366 15:58:33.786763 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
367 15:58:33.789935 Recovery requested (1009000e)
368 15:58:33.795588 Saving nvdata
369 15:58:33.801151 tlcl_extend: response is 0
370 15:58:33.810522 tlcl_extend: response is 0
371 15:58:33.817693 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 15:58:33.821064 CBFS @ c08000 size 3f8000
373 15:58:33.827731 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 15:58:33.830978 CBFS: Locating 'fallback/romstage'
375 15:58:33.833842 CBFS: Found @ offset 80 size 145fc
376 15:58:33.837196 Accumulated console time in verstage 98 ms
377 15:58:33.837284
378 15:58:33.837351
379 15:58:33.850286 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
380 15:58:33.857240 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
381 15:58:33.860455 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 15:58:33.863993 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 15:58:33.870573 gpe0_sts[1]: 00300000 gpe0_en[1]: 00000000
384 15:58:33.873859 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 15:58:33.877244 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
386 15:58:33.880455 TCO_STS: 0000 0000
387 15:58:33.883490 GEN_PMCON: e0015238 00000200
388 15:58:33.886922 GBLRST_CAUSE: 00000000 00000000
389 15:58:33.887007 prev_sleep_state 5
390 15:58:33.890265 Boot Count incremented to 68993
391 15:58:33.897001 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 15:58:33.900555 CBFS @ c08000 size 3f8000
393 15:58:33.906895 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 15:58:33.906977 CBFS: Locating 'fspm.bin'
395 15:58:33.913416 CBFS: Found @ offset 5ffc0 size 71000
396 15:58:33.916620 Chrome EC: UHEPI supported
397 15:58:33.923826 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
398 15:58:33.926973 Probing TPM: done!
399 15:58:33.933601 Connected to device vid:did:rid of 1ae0:0028:00
400 15:58:33.943551 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
401 15:58:33.949568 Initialized TPM device CR50 revision 0
402 15:58:33.958498 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
403 15:58:33.965442 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
404 15:58:33.968641 MRC cache found, size 1948
405 15:58:33.971641 bootmode is set to: 2
406 15:58:33.975255 PRMRR disabled by config.
407 15:58:33.975359 SPD INDEX = 1
408 15:58:33.981888 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
409 15:58:33.985116 CBFS @ c08000 size 3f8000
410 15:58:33.991628 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
411 15:58:33.991735 CBFS: Locating 'spd.bin'
412 15:58:33.994840 CBFS: Found @ offset 5fb80 size 400
413 15:58:33.998203 SPD: module type is LPDDR3
414 15:58:34.001948 SPD: module part is
415 15:58:34.008216 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
416 15:58:34.011480 SPD: device width 4 bits, bus width 8 bits
417 15:58:34.014691 SPD: module size is 4096 MB (per channel)
418 15:58:34.018295 memory slot: 0 configuration done.
419 15:58:34.021652 memory slot: 2 configuration done.
420 15:58:34.073076 CBMEM:
421 15:58:34.076749 IMD: root @ 99fff000 254 entries.
422 15:58:34.079771 IMD: root @ 99ffec00 62 entries.
423 15:58:34.082964 External stage cache:
424 15:58:34.086333 IMD: root @ 9abff000 254 entries.
425 15:58:34.089841 IMD: root @ 9abfec00 62 entries.
426 15:58:34.096496 Chrome EC: clear events_b mask to 0x0000000020004000
427 15:58:34.109300 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 15:58:34.122880 tlcl_write: response is 0
429 15:58:34.131625 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
430 15:58:34.138580 MRC: TPM MRC hash updated successfully.
431 15:58:34.138680 2 DIMMs found
432 15:58:34.141831 SMM Memory Map
433 15:58:34.145221 SMRAM : 0x9a000000 0x1000000
434 15:58:34.148536 Subregion 0: 0x9a000000 0xa00000
435 15:58:34.151718 Subregion 1: 0x9aa00000 0x200000
436 15:58:34.155113 Subregion 2: 0x9ac00000 0x400000
437 15:58:34.158325 top_of_ram = 0x9a000000
438 15:58:34.161724 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
439 15:58:34.168628 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
440 15:58:34.171573 MTRR Range: Start=ff000000 End=0 (Size 1000000)
441 15:58:34.178191 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 15:58:34.181916 CBFS @ c08000 size 3f8000
443 15:58:34.185029 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 15:58:34.188734 CBFS: Locating 'fallback/postcar'
445 15:58:34.191772 CBFS: Found @ offset 107000 size 4b44
446 15:58:34.197978 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
447 15:58:34.210693 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
448 15:58:34.213889 Processing 180 relocs. Offset value of 0x97c0c000
449 15:58:34.222589 Accumulated console time in romstage 286 ms
450 15:58:34.222669
451 15:58:34.222735
452 15:58:34.232312 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
453 15:58:34.238828 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 15:58:34.242608 CBFS @ c08000 size 3f8000
455 15:58:34.245441 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 15:58:34.252551 CBFS: Locating 'fallback/ramstage'
457 15:58:34.255911 CBFS: Found @ offset 43380 size 1b9e8
458 15:58:34.262523 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 15:58:34.294040 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 15:58:34.297182 Processing 3976 relocs. Offset value of 0x98db0000
461 15:58:34.303919 Accumulated console time in postcar 52 ms
462 15:58:34.304004
463 15:58:34.304083
464 15:58:34.314172 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 15:58:34.321002 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 15:58:34.324298 WARNING: RO_VPD is uninitialized or empty.
467 15:58:34.327573 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 15:58:34.334178 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 15:58:34.334301 Normal boot.
470 15:58:34.340648 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 15:58:34.344194 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 15:58:34.347256 CBFS @ c08000 size 3f8000
473 15:58:34.353842 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 15:58:34.357221 CBFS: Locating 'cpu_microcode_blob.bin'
475 15:58:34.360482 CBFS: Found @ offset 14700 size 2ec00
476 15:58:34.363860 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 15:58:34.366958 Skip microcode update
478 15:58:34.370443 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 15:58:34.373729 CBFS @ c08000 size 3f8000
480 15:58:34.380296 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 15:58:34.383811 CBFS: Locating 'fsps.bin'
482 15:58:34.386919 CBFS: Found @ offset d1fc0 size 35000
483 15:58:34.412218 Detected 4 core, 8 thread CPU.
484 15:58:34.415809 Setting up SMI for CPU
485 15:58:34.419070 IED base = 0x9ac00000
486 15:58:34.419152 IED size = 0x00400000
487 15:58:34.422410 Will perform SMM setup.
488 15:58:34.428840 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 15:58:34.435336 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 15:58:34.438582 Processing 16 relocs. Offset value of 0x00030000
491 15:58:34.442348 Attempting to start 7 APs
492 15:58:34.445521 Waiting for 10ms after sending INIT.
493 15:58:34.461742 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
494 15:58:34.461831 done.
495 15:58:34.465539 AP: slot 5 apic_id 7.
496 15:58:34.468952 AP: slot 4 apic_id 6.
497 15:58:34.469025 AP: slot 3 apic_id 3.
498 15:58:34.472197 AP: slot 1 apic_id 2.
499 15:58:34.475401 AP: slot 6 apic_id 5.
500 15:58:34.475475 AP: slot 7 apic_id 4.
501 15:58:34.481974 Waiting for 2nd SIPI to complete...done.
502 15:58:34.488495 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 15:58:34.491747 Processing 13 relocs. Offset value of 0x00038000
504 15:58:34.498909 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
505 15:58:34.505186 Installing SMM handler to 0x9a000000
506 15:58:34.511823 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
507 15:58:34.514972 Processing 658 relocs. Offset value of 0x9a010000
508 15:58:34.524784 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
509 15:58:34.528081 Processing 13 relocs. Offset value of 0x9a008000
510 15:58:34.535098 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
511 15:58:34.541374 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
512 15:58:34.548324 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
513 15:58:34.551439 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
514 15:58:34.557798 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
515 15:58:34.564455 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
516 15:58:34.567847 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
517 15:58:34.574390 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
518 15:58:34.578177 Clearing SMI status registers
519 15:58:34.581417 SMI_STS: PM1
520 15:58:34.581501 PM1_STS: PWRBTN
521 15:58:34.584816 TCO_STS: SECOND_TO
522 15:58:34.588011 New SMBASE 0x9a000000
523 15:58:34.591272 In relocation handler: CPU 0
524 15:58:34.594542 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 15:58:34.598223 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 15:58:34.601680 Relocation complete.
527 15:58:34.604875 New SMBASE 0x99fff800
528 15:58:34.604959 In relocation handler: CPU 2
529 15:58:34.611654 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
530 15:58:34.615028 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 15:58:34.618314 Relocation complete.
532 15:58:34.618398 New SMBASE 0x99fff000
533 15:58:34.621508 In relocation handler: CPU 4
534 15:58:34.628076 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
535 15:58:34.631314 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 15:58:34.634940 Relocation complete.
537 15:58:34.635023 New SMBASE 0x99ffec00
538 15:58:34.638153 In relocation handler: CPU 5
539 15:58:34.644677 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
540 15:58:34.647939 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 15:58:34.651141 Relocation complete.
542 15:58:34.651242 New SMBASE 0x99ffe400
543 15:58:34.654473 In relocation handler: CPU 7
544 15:58:34.658154 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
545 15:58:34.664759 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 15:58:34.668008 Relocation complete.
547 15:58:34.668092 New SMBASE 0x99ffe800
548 15:58:34.671229 In relocation handler: CPU 6
549 15:58:34.674603 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
550 15:58:34.681030 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 15:58:34.681114 Relocation complete.
552 15:58:34.684406 New SMBASE 0x99fffc00
553 15:58:34.687764 In relocation handler: CPU 1
554 15:58:34.691003 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
555 15:58:34.697989 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 15:58:34.698078 Relocation complete.
557 15:58:34.701187 New SMBASE 0x99fff400
558 15:58:34.704471 In relocation handler: CPU 3
559 15:58:34.707928 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
560 15:58:34.714435 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 15:58:34.714519 Relocation complete.
562 15:58:34.718142 Initializing CPU #0
563 15:58:34.721510 CPU: vendor Intel device 806ec
564 15:58:34.724834 CPU: family 06, model 8e, stepping 0c
565 15:58:34.728068 Clearing out pending MCEs
566 15:58:34.731358 Setting up local APIC...
567 15:58:34.731470 apic_id: 0x00 done.
568 15:58:34.734350 Turbo is available but hidden
569 15:58:34.738235 Turbo is available and visible
570 15:58:34.741441 VMX status: enabled
571 15:58:34.744652 IA32_FEATURE_CONTROL status: locked
572 15:58:34.744735 Skip microcode update
573 15:58:34.747848 CPU #0 initialized
574 15:58:34.751175 Initializing CPU #2
575 15:58:34.751258 Initializing CPU #4
576 15:58:34.754811 Initializing CPU #5
577 15:58:34.757869 CPU: vendor Intel device 806ec
578 15:58:34.761094 CPU: family 06, model 8e, stepping 0c
579 15:58:34.764617 CPU: vendor Intel device 806ec
580 15:58:34.768000 CPU: family 06, model 8e, stepping 0c
581 15:58:34.771089 Clearing out pending MCEs
582 15:58:34.774265 Clearing out pending MCEs
583 15:58:34.774349 Setting up local APIC...
584 15:58:34.778007 Initializing CPU #1
585 15:58:34.781022 Initializing CPU #3
586 15:58:34.784713 CPU: vendor Intel device 806ec
587 15:58:34.787468 CPU: family 06, model 8e, stepping 0c
588 15:58:34.790828 CPU: vendor Intel device 806ec
589 15:58:34.794217 CPU: family 06, model 8e, stepping 0c
590 15:58:34.797887 Clearing out pending MCEs
591 15:58:34.798022 Clearing out pending MCEs
592 15:58:34.801173 Setting up local APIC...
593 15:58:34.804414 Initializing CPU #7
594 15:58:34.804498 Initializing CPU #6
595 15:58:34.807567 CPU: vendor Intel device 806ec
596 15:58:34.814257 CPU: family 06, model 8e, stepping 0c
597 15:58:34.814341 Setting up local APIC...
598 15:58:34.817382 CPU: vendor Intel device 806ec
599 15:58:34.820593 CPU: family 06, model 8e, stepping 0c
600 15:58:34.824517 Clearing out pending MCEs
601 15:58:34.827315 Clearing out pending MCEs
602 15:58:34.830836 CPU: vendor Intel device 806ec
603 15:58:34.834142 CPU: family 06, model 8e, stepping 0c
604 15:58:34.837458 Setting up local APIC...
605 15:58:34.840628 Setting up local APIC...
606 15:58:34.840711 Clearing out pending MCEs
607 15:58:34.843966 apic_id: 0x04 done.
608 15:58:34.847191 Setting up local APIC...
609 15:58:34.850882 Setting up local APIC...
610 15:58:34.850966 apic_id: 0x03 done.
611 15:58:34.854143 apic_id: 0x02 done.
612 15:58:34.854226 VMX status: enabled
613 15:58:34.857297 VMX status: enabled
614 15:58:34.860637 IA32_FEATURE_CONTROL status: locked
615 15:58:34.863996 IA32_FEATURE_CONTROL status: locked
616 15:58:34.867267 Skip microcode update
617 15:58:34.870601 Skip microcode update
618 15:58:34.870685 CPU #3 initialized
619 15:58:34.873854 CPU #1 initialized
620 15:58:34.873937 apic_id: 0x01 done.
621 15:58:34.877514 apic_id: 0x05 done.
622 15:58:34.880524 VMX status: enabled
623 15:58:34.880601 VMX status: enabled
624 15:58:34.883923 IA32_FEATURE_CONTROL status: locked
625 15:58:34.887216 IA32_FEATURE_CONTROL status: locked
626 15:58:34.890447 Skip microcode update
627 15:58:34.893801 Skip microcode update
628 15:58:34.893886 CPU #7 initialized
629 15:58:34.897436 CPU #6 initialized
630 15:58:34.900494 apic_id: 0x06 done.
631 15:58:34.900582 apic_id: 0x07 done.
632 15:58:34.903877 VMX status: enabled
633 15:58:34.903951 VMX status: enabled
634 15:58:34.910314 IA32_FEATURE_CONTROL status: locked
635 15:58:34.913571 IA32_FEATURE_CONTROL status: locked
636 15:58:34.913645 Skip microcode update
637 15:58:34.916931 VMX status: enabled
638 15:58:34.920157 Skip microcode update
639 15:58:34.920229 CPU #4 initialized
640 15:58:34.923458 CPU #5 initialized
641 15:58:34.926861 IA32_FEATURE_CONTROL status: locked
642 15:58:34.930525 Skip microcode update
643 15:58:34.930597 CPU #2 initialized
644 15:58:34.933883 bsp_do_flight_plan done after 452 msecs.
645 15:58:34.937145 CPU: frequency set to 4200 MHz
646 15:58:34.940396 Enabling SMIs.
647 15:58:34.940469 Locking SMM.
648 15:58:34.956259 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 15:58:34.959493 CBFS @ c08000 size 3f8000
650 15:58:34.966192 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 15:58:34.966269 CBFS: Locating 'vbt.bin'
652 15:58:34.969087 CBFS: Found @ offset 5f5c0 size 499
653 15:58:34.976141 Found a VBT of 4608 bytes after decompression
654 15:58:35.162145 Display FSP Version Info HOB
655 15:58:35.165230 Reference Code - CPU = 9.0.1e.30
656 15:58:35.168801 uCode Version = 0.0.0.ca
657 15:58:35.172060 TXT ACM version = ff.ff.ff.ffff
658 15:58:35.175236 Display FSP Version Info HOB
659 15:58:35.178633 Reference Code - ME = 9.0.1e.30
660 15:58:35.181831 MEBx version = 0.0.0.0
661 15:58:35.185129 ME Firmware Version = Consumer SKU
662 15:58:35.188365 Display FSP Version Info HOB
663 15:58:35.191731 Reference Code - CML PCH = 9.0.1e.30
664 15:58:35.194759 PCH-CRID Status = Disabled
665 15:58:35.198595 PCH-CRID Original Value = ff.ff.ff.ffff
666 15:58:35.201872 PCH-CRID New Value = ff.ff.ff.ffff
667 15:58:35.204983 OPROM - RST - RAID = ff.ff.ff.ffff
668 15:58:35.208126 ChipsetInit Base Version = ff.ff.ff.ffff
669 15:58:35.211564 ChipsetInit Oem Version = ff.ff.ff.ffff
670 15:58:35.214763 Display FSP Version Info HOB
671 15:58:35.221531 Reference Code - SA - System Agent = 9.0.1e.30
672 15:58:35.225331 Reference Code - MRC = 0.7.1.6c
673 15:58:35.225415 SA - PCIe Version = 9.0.1e.30
674 15:58:35.228288 SA-CRID Status = Disabled
675 15:58:35.231767 SA-CRID Original Value = 0.0.0.c
676 15:58:35.235049 SA-CRID New Value = 0.0.0.c
677 15:58:35.238354 OPROM - VBIOS = ff.ff.ff.ffff
678 15:58:35.241588 RTC Init
679 15:58:35.244898 Set power on after power failure.
680 15:58:35.244981 Disabling Deep S3
681 15:58:35.248232 Disabling Deep S3
682 15:58:35.248316 Disabling Deep S4
683 15:58:35.251255 Disabling Deep S4
684 15:58:35.251328 Disabling Deep S5
685 15:58:35.254860 Disabling Deep S5
686 15:58:35.261266 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
687 15:58:35.261350 Enumerating buses...
688 15:58:35.268117 Show all devs... Before device enumeration.
689 15:58:35.268202 Root Device: enabled 1
690 15:58:35.271396 CPU_CLUSTER: 0: enabled 1
691 15:58:35.274713 DOMAIN: 0000: enabled 1
692 15:58:35.277992 APIC: 00: enabled 1
693 15:58:35.278069 PCI: 00:00.0: enabled 1
694 15:58:35.281298 PCI: 00:02.0: enabled 1
695 15:58:35.284660 PCI: 00:04.0: enabled 0
696 15:58:35.287998 PCI: 00:05.0: enabled 0
697 15:58:35.288075 PCI: 00:12.0: enabled 1
698 15:58:35.291352 PCI: 00:12.5: enabled 0
699 15:58:35.294636 PCI: 00:12.6: enabled 0
700 15:58:35.294710 PCI: 00:14.0: enabled 1
701 15:58:35.297773 PCI: 00:14.1: enabled 0
702 15:58:35.301073 PCI: 00:14.3: enabled 1
703 15:58:35.304257 PCI: 00:14.5: enabled 0
704 15:58:35.304341 PCI: 00:15.0: enabled 1
705 15:58:35.307495 PCI: 00:15.1: enabled 1
706 15:58:35.311169 PCI: 00:15.2: enabled 0
707 15:58:35.314475 PCI: 00:15.3: enabled 0
708 15:58:35.314559 PCI: 00:16.0: enabled 1
709 15:58:35.317820 PCI: 00:16.1: enabled 0
710 15:58:35.320974 PCI: 00:16.2: enabled 0
711 15:58:35.324137 PCI: 00:16.3: enabled 0
712 15:58:35.324221 PCI: 00:16.4: enabled 0
713 15:58:35.327704 PCI: 00:16.5: enabled 0
714 15:58:35.330710 PCI: 00:17.0: enabled 1
715 15:58:35.330793 PCI: 00:19.0: enabled 1
716 15:58:35.334589 PCI: 00:19.1: enabled 0
717 15:58:35.337689 PCI: 00:19.2: enabled 0
718 15:58:35.340772 PCI: 00:1a.0: enabled 0
719 15:58:35.340855 PCI: 00:1c.0: enabled 0
720 15:58:35.344103 PCI: 00:1c.1: enabled 0
721 15:58:35.347330 PCI: 00:1c.2: enabled 0
722 15:58:35.350642 PCI: 00:1c.3: enabled 0
723 15:58:35.350739 PCI: 00:1c.4: enabled 0
724 15:58:35.353924 PCI: 00:1c.5: enabled 0
725 15:58:35.357621 PCI: 00:1c.6: enabled 0
726 15:58:35.360653 PCI: 00:1c.7: enabled 0
727 15:58:35.360737 PCI: 00:1d.0: enabled 1
728 15:58:35.364280 PCI: 00:1d.1: enabled 0
729 15:58:35.367381 PCI: 00:1d.2: enabled 0
730 15:58:35.367472 PCI: 00:1d.3: enabled 0
731 15:58:35.370656 PCI: 00:1d.4: enabled 0
732 15:58:35.374460 PCI: 00:1d.5: enabled 1
733 15:58:35.377726 PCI: 00:1e.0: enabled 1
734 15:58:35.377803 PCI: 00:1e.1: enabled 0
735 15:58:35.380890 PCI: 00:1e.2: enabled 1
736 15:58:35.384274 PCI: 00:1e.3: enabled 1
737 15:58:35.387677 PCI: 00:1f.0: enabled 1
738 15:58:35.387756 PCI: 00:1f.1: enabled 1
739 15:58:35.390921 PCI: 00:1f.2: enabled 1
740 15:58:35.394192 PCI: 00:1f.3: enabled 1
741 15:58:35.397350 PCI: 00:1f.4: enabled 1
742 15:58:35.397459 PCI: 00:1f.5: enabled 1
743 15:58:35.400581 PCI: 00:1f.6: enabled 0
744 15:58:35.404276 USB0 port 0: enabled 1
745 15:58:35.404358 I2C: 00:15: enabled 1
746 15:58:35.407500 I2C: 00:5d: enabled 1
747 15:58:35.410812 GENERIC: 0.0: enabled 1
748 15:58:35.410888 I2C: 00:1a: enabled 1
749 15:58:35.413865 I2C: 00:38: enabled 1
750 15:58:35.417251 I2C: 00:39: enabled 1
751 15:58:35.417327 I2C: 00:3a: enabled 1
752 15:58:35.420485 I2C: 00:3b: enabled 1
753 15:58:35.424162 PCI: 00:00.0: enabled 1
754 15:58:35.424235 SPI: 00: enabled 1
755 15:58:35.427319 SPI: 01: enabled 1
756 15:58:35.430465 PNP: 0c09.0: enabled 1
757 15:58:35.430538 USB2 port 0: enabled 1
758 15:58:35.434350 USB2 port 1: enabled 1
759 15:58:35.437422 USB2 port 2: enabled 0
760 15:58:35.440751 USB2 port 3: enabled 0
761 15:58:35.440833 USB2 port 5: enabled 0
762 15:58:35.443832 USB2 port 6: enabled 1
763 15:58:35.447394 USB2 port 9: enabled 1
764 15:58:35.447479 USB3 port 0: enabled 1
765 15:58:35.450526 USB3 port 1: enabled 1
766 15:58:35.453849 USB3 port 2: enabled 1
767 15:58:35.457218 USB3 port 3: enabled 1
768 15:58:35.457301 USB3 port 4: enabled 0
769 15:58:35.460360 APIC: 02: enabled 1
770 15:58:35.460443 APIC: 01: enabled 1
771 15:58:35.464231 APIC: 03: enabled 1
772 15:58:35.467417 APIC: 06: enabled 1
773 15:58:35.467500 APIC: 07: enabled 1
774 15:58:35.470596 APIC: 05: enabled 1
775 15:58:35.473703 APIC: 04: enabled 1
776 15:58:35.473787 Compare with tree...
777 15:58:35.477258 Root Device: enabled 1
778 15:58:35.480574 CPU_CLUSTER: 0: enabled 1
779 15:58:35.480658 APIC: 00: enabled 1
780 15:58:35.483723 APIC: 02: enabled 1
781 15:58:35.486977 APIC: 01: enabled 1
782 15:58:35.487073 APIC: 03: enabled 1
783 15:58:35.490388 APIC: 06: enabled 1
784 15:58:35.493770 APIC: 07: enabled 1
785 15:58:35.493846 APIC: 05: enabled 1
786 15:58:35.497139 APIC: 04: enabled 1
787 15:58:35.500240 DOMAIN: 0000: enabled 1
788 15:58:35.503506 PCI: 00:00.0: enabled 1
789 15:58:35.503584 PCI: 00:02.0: enabled 1
790 15:58:35.507200 PCI: 00:04.0: enabled 0
791 15:58:35.510558 PCI: 00:05.0: enabled 0
792 15:58:35.513813 PCI: 00:12.0: enabled 1
793 15:58:35.517089 PCI: 00:12.5: enabled 0
794 15:58:35.517160 PCI: 00:12.6: enabled 0
795 15:58:35.520154 PCI: 00:14.0: enabled 1
796 15:58:35.523324 USB0 port 0: enabled 1
797 15:58:35.526631 USB2 port 0: enabled 1
798 15:58:35.530331 USB2 port 1: enabled 1
799 15:58:35.530414 USB2 port 2: enabled 0
800 15:58:35.533382 USB2 port 3: enabled 0
801 15:58:35.537103 USB2 port 5: enabled 0
802 15:58:35.540353 USB2 port 6: enabled 1
803 15:58:35.543617 USB2 port 9: enabled 1
804 15:58:35.547004 USB3 port 0: enabled 1
805 15:58:35.547160 USB3 port 1: enabled 1
806 15:58:35.550243 USB3 port 2: enabled 1
807 15:58:35.553405 USB3 port 3: enabled 1
808 15:58:35.557097 USB3 port 4: enabled 0
809 15:58:35.560007 PCI: 00:14.1: enabled 0
810 15:58:35.560093 PCI: 00:14.3: enabled 1
811 15:58:35.563572 PCI: 00:14.5: enabled 0
812 15:58:35.566836 PCI: 00:15.0: enabled 1
813 15:58:35.570333 I2C: 00:15: enabled 1
814 15:58:35.573494 PCI: 00:15.1: enabled 1
815 15:58:35.573572 I2C: 00:5d: enabled 1
816 15:58:35.576730 GENERIC: 0.0: enabled 1
817 15:58:35.580075 PCI: 00:15.2: enabled 0
818 15:58:35.583217 PCI: 00:15.3: enabled 0
819 15:58:35.586601 PCI: 00:16.0: enabled 1
820 15:58:35.586679 PCI: 00:16.1: enabled 0
821 15:58:35.590377 PCI: 00:16.2: enabled 0
822 15:58:35.593262 PCI: 00:16.3: enabled 0
823 15:58:35.596721 PCI: 00:16.4: enabled 0
824 15:58:35.596799 PCI: 00:16.5: enabled 0
825 15:58:35.600073 PCI: 00:17.0: enabled 1
826 15:58:35.603249 PCI: 00:19.0: enabled 1
827 15:58:35.606579 I2C: 00:1a: enabled 1
828 15:58:35.609848 I2C: 00:38: enabled 1
829 15:58:35.609934 I2C: 00:39: enabled 1
830 15:58:35.613101 I2C: 00:3a: enabled 1
831 15:58:35.616338 I2C: 00:3b: enabled 1
832 15:58:35.620075 PCI: 00:19.1: enabled 0
833 15:58:35.620155 PCI: 00:19.2: enabled 0
834 15:58:35.623405 PCI: 00:1a.0: enabled 0
835 15:58:35.626846 PCI: 00:1c.0: enabled 0
836 15:58:35.630151 PCI: 00:1c.1: enabled 0
837 15:58:35.633335 PCI: 00:1c.2: enabled 0
838 15:58:35.633409 PCI: 00:1c.3: enabled 0
839 15:58:35.636486 PCI: 00:1c.4: enabled 0
840 15:58:35.639853 PCI: 00:1c.5: enabled 0
841 15:58:35.643406 PCI: 00:1c.6: enabled 0
842 15:58:35.646833 PCI: 00:1c.7: enabled 0
843 15:58:35.646909 PCI: 00:1d.0: enabled 1
844 15:58:35.650009 PCI: 00:1d.1: enabled 0
845 15:58:35.653396 PCI: 00:1d.2: enabled 0
846 15:58:35.656193 PCI: 00:1d.3: enabled 0
847 15:58:35.659565 PCI: 00:1d.4: enabled 0
848 15:58:35.659690 PCI: 00:1d.5: enabled 1
849 15:58:35.663024 PCI: 00:00.0: enabled 1
850 15:58:35.666233 PCI: 00:1e.0: enabled 1
851 15:58:35.669341 PCI: 00:1e.1: enabled 0
852 15:58:35.672825 PCI: 00:1e.2: enabled 1
853 15:58:35.672908 SPI: 00: enabled 1
854 15:58:35.676545 PCI: 00:1e.3: enabled 1
855 15:58:35.679728 SPI: 01: enabled 1
856 15:58:35.679812 PCI: 00:1f.0: enabled 1
857 15:58:35.683087 PNP: 0c09.0: enabled 1
858 15:58:35.686445 PCI: 00:1f.1: enabled 1
859 15:58:35.689677 PCI: 00:1f.2: enabled 1
860 15:58:35.693258 PCI: 00:1f.3: enabled 1
861 15:58:35.693337 PCI: 00:1f.4: enabled 1
862 15:58:35.696344 PCI: 00:1f.5: enabled 1
863 15:58:35.699385 PCI: 00:1f.6: enabled 0
864 15:58:35.702811 Root Device scanning...
865 15:58:35.706104 scan_static_bus for Root Device
866 15:58:35.709348 CPU_CLUSTER: 0 enabled
867 15:58:35.709446 DOMAIN: 0000 enabled
868 15:58:35.712698 DOMAIN: 0000 scanning...
869 15:58:35.715851 PCI: pci_scan_bus for bus 00
870 15:58:35.719555 PCI: 00:00.0 [8086/0000] ops
871 15:58:35.722920 PCI: 00:00.0 [8086/9b61] enabled
872 15:58:35.726123 PCI: 00:02.0 [8086/0000] bus ops
873 15:58:35.729206 PCI: 00:02.0 [8086/9b41] enabled
874 15:58:35.732490 PCI: 00:04.0 [8086/1903] disabled
875 15:58:35.736192 PCI: 00:08.0 [8086/1911] enabled
876 15:58:35.739591 PCI: 00:12.0 [8086/02f9] enabled
877 15:58:35.742700 PCI: 00:14.0 [8086/0000] bus ops
878 15:58:35.745762 PCI: 00:14.0 [8086/02ed] enabled
879 15:58:35.749474 PCI: 00:14.2 [8086/02ef] enabled
880 15:58:35.752663 PCI: 00:14.3 [8086/02f0] enabled
881 15:58:35.756213 PCI: 00:15.0 [8086/0000] bus ops
882 15:58:35.759482 PCI: 00:15.0 [8086/02e8] enabled
883 15:58:35.762766 PCI: 00:15.1 [8086/0000] bus ops
884 15:58:35.765910 PCI: 00:15.1 [8086/02e9] enabled
885 15:58:35.769111 PCI: 00:16.0 [8086/0000] ops
886 15:58:35.772839 PCI: 00:16.0 [8086/02e0] enabled
887 15:58:35.776175 PCI: 00:17.0 [8086/0000] ops
888 15:58:35.779452 PCI: 00:17.0 [8086/02d3] enabled
889 15:58:35.782773 PCI: 00:19.0 [8086/0000] bus ops
890 15:58:35.786040 PCI: 00:19.0 [8086/02c5] enabled
891 15:58:35.789291 PCI: 00:1d.0 [8086/0000] bus ops
892 15:58:35.792531 PCI: 00:1d.0 [8086/02b0] enabled
893 15:58:35.795846 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 15:58:35.799018 PCI: 00:1e.0 [8086/0000] ops
895 15:58:35.802612 PCI: 00:1e.0 [8086/02a8] enabled
896 15:58:35.805860 PCI: 00:1e.2 [8086/0000] bus ops
897 15:58:35.808902 PCI: 00:1e.2 [8086/02aa] enabled
898 15:58:35.812595 PCI: 00:1e.3 [8086/0000] bus ops
899 15:58:35.815603 PCI: 00:1e.3 [8086/02ab] enabled
900 15:58:35.818731 PCI: 00:1f.0 [8086/0000] bus ops
901 15:58:35.821957 PCI: 00:1f.0 [8086/0284] enabled
902 15:58:35.828738 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 15:58:35.835610 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 15:58:35.838864 PCI: 00:1f.3 [8086/0000] bus ops
905 15:58:35.842257 PCI: 00:1f.3 [8086/02c8] enabled
906 15:58:35.845404 PCI: 00:1f.4 [8086/0000] bus ops
907 15:58:35.848685 PCI: 00:1f.4 [8086/02a3] enabled
908 15:58:35.851870 PCI: 00:1f.5 [8086/0000] bus ops
909 15:58:35.855483 PCI: 00:1f.5 [8086/02a4] enabled
910 15:58:35.858763 PCI: Leftover static devices:
911 15:58:35.858844 PCI: 00:05.0
912 15:58:35.858910 PCI: 00:12.5
913 15:58:35.862085 PCI: 00:12.6
914 15:58:35.862159 PCI: 00:14.1
915 15:58:35.865294 PCI: 00:14.5
916 15:58:35.865369 PCI: 00:15.2
917 15:58:35.865430 PCI: 00:15.3
918 15:58:35.868604 PCI: 00:16.1
919 15:58:35.868686 PCI: 00:16.2
920 15:58:35.872129 PCI: 00:16.3
921 15:58:35.872213 PCI: 00:16.4
922 15:58:35.875342 PCI: 00:16.5
923 15:58:35.875428 PCI: 00:19.1
924 15:58:35.875494 PCI: 00:19.2
925 15:58:35.878473 PCI: 00:1a.0
926 15:58:35.878557 PCI: 00:1c.0
927 15:58:35.881698 PCI: 00:1c.1
928 15:58:35.881776 PCI: 00:1c.2
929 15:58:35.881840 PCI: 00:1c.3
930 15:58:35.885099 PCI: 00:1c.4
931 15:58:35.885185 PCI: 00:1c.5
932 15:58:35.888392 PCI: 00:1c.6
933 15:58:35.888490 PCI: 00:1c.7
934 15:58:35.888557 PCI: 00:1d.1
935 15:58:35.891864 PCI: 00:1d.2
936 15:58:35.891946 PCI: 00:1d.3
937 15:58:35.895109 PCI: 00:1d.4
938 15:58:35.895182 PCI: 00:1d.5
939 15:58:35.898464 PCI: 00:1e.1
940 15:58:35.898538 PCI: 00:1f.1
941 15:58:35.898599 PCI: 00:1f.2
942 15:58:35.901731 PCI: 00:1f.6
943 15:58:35.905073 PCI: Check your devicetree.cb.
944 15:58:35.905166 PCI: 00:02.0 scanning...
945 15:58:35.912192 scan_generic_bus for PCI: 00:02.0
946 15:58:35.915519 scan_generic_bus for PCI: 00:02.0 done
947 15:58:35.918381 scan_bus: scanning of bus PCI: 00:02.0 took 10197 usecs
948 15:58:35.921767 PCI: 00:14.0 scanning...
949 15:58:35.925349 scan_static_bus for PCI: 00:14.0
950 15:58:35.928448 USB0 port 0 enabled
951 15:58:35.931813 USB0 port 0 scanning...
952 15:58:35.935204 scan_static_bus for USB0 port 0
953 15:58:35.935298 USB2 port 0 enabled
954 15:58:35.938243 USB2 port 1 enabled
955 15:58:35.941503 USB2 port 2 disabled
956 15:58:35.941586 USB2 port 3 disabled
957 15:58:35.945213 USB2 port 5 disabled
958 15:58:35.945284 USB2 port 6 enabled
959 15:58:35.948463 USB2 port 9 enabled
960 15:58:35.951701 USB3 port 0 enabled
961 15:58:35.951772 USB3 port 1 enabled
962 15:58:35.954846 USB3 port 2 enabled
963 15:58:35.958225 USB3 port 3 enabled
964 15:58:35.958296 USB3 port 4 disabled
965 15:58:35.961450 USB2 port 0 scanning...
966 15:58:35.965067 scan_static_bus for USB2 port 0
967 15:58:35.968026 scan_static_bus for USB2 port 0 done
968 15:58:35.975094 scan_bus: scanning of bus USB2 port 0 took 9693 usecs
969 15:58:35.975178 USB2 port 1 scanning...
970 15:58:35.978156 scan_static_bus for USB2 port 1
971 15:58:35.984923 scan_static_bus for USB2 port 1 done
972 15:58:35.988146 scan_bus: scanning of bus USB2 port 1 took 9708 usecs
973 15:58:35.991399 USB2 port 6 scanning...
974 15:58:35.994692 scan_static_bus for USB2 port 6
975 15:58:35.998037 scan_static_bus for USB2 port 6 done
976 15:58:36.004513 scan_bus: scanning of bus USB2 port 6 took 9707 usecs
977 15:58:36.004605 USB2 port 9 scanning...
978 15:58:36.008429 scan_static_bus for USB2 port 9
979 15:58:36.015138 scan_static_bus for USB2 port 9 done
980 15:58:36.018325 scan_bus: scanning of bus USB2 port 9 took 9708 usecs
981 15:58:36.021751 USB3 port 0 scanning...
982 15:58:36.024996 scan_static_bus for USB3 port 0
983 15:58:36.028254 scan_static_bus for USB3 port 0 done
984 15:58:36.035387 scan_bus: scanning of bus USB3 port 0 took 9710 usecs
985 15:58:36.035466 USB3 port 1 scanning...
986 15:58:36.038367 scan_static_bus for USB3 port 1
987 15:58:36.044980 scan_static_bus for USB3 port 1 done
988 15:58:36.048073 scan_bus: scanning of bus USB3 port 1 took 9711 usecs
989 15:58:36.051358 USB3 port 2 scanning...
990 15:58:36.054841 scan_static_bus for USB3 port 2
991 15:58:36.058147 scan_static_bus for USB3 port 2 done
992 15:58:36.064946 scan_bus: scanning of bus USB3 port 2 took 9700 usecs
993 15:58:36.065030 USB3 port 3 scanning...
994 15:58:36.068529 scan_static_bus for USB3 port 3
995 15:58:36.075111 scan_static_bus for USB3 port 3 done
996 15:58:36.078483 scan_bus: scanning of bus USB3 port 3 took 9701 usecs
997 15:58:36.081728 scan_static_bus for USB0 port 0 done
998 15:58:36.088273 scan_bus: scanning of bus USB0 port 0 took 155392 usecs
999 15:58:36.091363 scan_static_bus for PCI: 00:14.0 done
1000 15:58:36.098089 scan_bus: scanning of bus PCI: 00:14.0 took 173025 usecs
1001 15:58:36.101229 PCI: 00:15.0 scanning...
1002 15:58:36.104446 scan_generic_bus for PCI: 00:15.0
1003 15:58:36.107763 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 15:58:36.111252 scan_generic_bus for PCI: 00:15.0 done
1005 15:58:36.117724 scan_bus: scanning of bus PCI: 00:15.0 took 14294 usecs
1006 15:58:36.121158 PCI: 00:15.1 scanning...
1007 15:58:36.124335 scan_generic_bus for PCI: 00:15.1
1008 15:58:36.127735 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 15:58:36.131599 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 15:58:36.134806 scan_generic_bus for PCI: 00:15.1 done
1011 15:58:36.141318 scan_bus: scanning of bus PCI: 00:15.1 took 18593 usecs
1012 15:58:36.144418 PCI: 00:19.0 scanning...
1013 15:58:36.147536 scan_generic_bus for PCI: 00:19.0
1014 15:58:36.151275 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 15:58:36.154160 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 15:58:36.161148 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 15:58:36.164028 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 15:58:36.167764 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 15:58:36.170831 scan_generic_bus for PCI: 00:19.0 done
1020 15:58:36.177493 scan_bus: scanning of bus PCI: 00:19.0 took 30739 usecs
1021 15:58:36.180637 PCI: 00:1d.0 scanning...
1022 15:58:36.183955 do_pci_scan_bridge for PCI: 00:1d.0
1023 15:58:36.187699 PCI: pci_scan_bus for bus 01
1024 15:58:36.190875 PCI: 01:00.0 [1c5c/1327] enabled
1025 15:58:36.194360 Enabling Common Clock Configuration
1026 15:58:36.197427 L1 Sub-State supported from root port 29
1027 15:58:36.200843 L1 Sub-State Support = 0xf
1028 15:58:36.204140 CommonModeRestoreTime = 0x28
1029 15:58:36.207436 Power On Value = 0x16, Power On Scale = 0x0
1030 15:58:36.210848 ASPM: Enabled L1
1031 15:58:36.214106 scan_bus: scanning of bus PCI: 00:1d.0 took 32788 usecs
1032 15:58:36.217342 PCI: 00:1e.2 scanning...
1033 15:58:36.220622 scan_generic_bus for PCI: 00:1e.2
1034 15:58:36.223913 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1035 15:58:36.230999 scan_generic_bus for PCI: 00:1e.2 done
1036 15:58:36.233883 scan_bus: scanning of bus PCI: 00:1e.2 took 14007 usecs
1037 15:58:36.237182 PCI: 00:1e.3 scanning...
1038 15:58:36.240538 scan_generic_bus for PCI: 00:1e.3
1039 15:58:36.244253 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1040 15:58:36.247552 scan_generic_bus for PCI: 00:1e.3 done
1041 15:58:36.253914 scan_bus: scanning of bus PCI: 00:1e.3 took 14015 usecs
1042 15:58:36.257273 PCI: 00:1f.0 scanning...
1043 15:58:36.260470 scan_static_bus for PCI: 00:1f.0
1044 15:58:36.264290 PNP: 0c09.0 enabled
1045 15:58:36.267390 scan_static_bus for PCI: 00:1f.0 done
1046 15:58:36.270715 scan_bus: scanning of bus PCI: 00:1f.0 took 12059 usecs
1047 15:58:36.274025 PCI: 00:1f.3 scanning...
1048 15:58:36.280396 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1049 15:58:36.283851 PCI: 00:1f.4 scanning...
1050 15:58:36.287244 scan_generic_bus for PCI: 00:1f.4
1051 15:58:36.290406 scan_generic_bus for PCI: 00:1f.4 done
1052 15:58:36.297356 scan_bus: scanning of bus PCI: 00:1f.4 took 10198 usecs
1053 15:58:36.297441 PCI: 00:1f.5 scanning...
1054 15:58:36.304315 scan_generic_bus for PCI: 00:1f.5
1055 15:58:36.307317 scan_generic_bus for PCI: 00:1f.5 done
1056 15:58:36.310514 scan_bus: scanning of bus PCI: 00:1f.5 took 10198 usecs
1057 15:58:36.317083 scan_bus: scanning of bus DOMAIN: 0000 took 605134 usecs
1058 15:58:36.320453 scan_static_bus for Root Device done
1059 15:58:36.326997 scan_bus: scanning of bus Root Device took 625003 usecs
1060 15:58:36.327080 done
1061 15:58:36.330400 Chrome EC: UHEPI supported
1062 15:58:36.337023 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1063 15:58:36.343811 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1064 15:58:36.350428 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1065 15:58:36.356746 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1066 15:58:36.360408 SPI flash protection: WPSW=1 SRP0=0
1067 15:58:36.363643 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 15:58:36.370206 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1069 15:58:36.373447 found VGA at PCI: 00:02.0
1070 15:58:36.376762 Setting up VGA for PCI: 00:02.0
1071 15:58:36.379981 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 15:58:36.386834 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 15:58:36.386936 Allocating resources...
1074 15:58:36.390002 Reading resources...
1075 15:58:36.393622 Root Device read_resources bus 0 link: 0
1076 15:58:36.400626 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 15:58:36.403518 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 15:58:36.410147 DOMAIN: 0000 read_resources bus 0 link: 0
1079 15:58:36.413436 PCI: 00:14.0 read_resources bus 0 link: 0
1080 15:58:36.420016 USB0 port 0 read_resources bus 0 link: 0
1081 15:58:36.426936 USB0 port 0 read_resources bus 0 link: 0 done
1082 15:58:36.430280 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 15:58:36.437796 PCI: 00:15.0 read_resources bus 1 link: 0
1084 15:58:36.441093 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 15:58:36.447295 PCI: 00:15.1 read_resources bus 2 link: 0
1086 15:58:36.450768 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 15:58:36.458550 PCI: 00:19.0 read_resources bus 3 link: 0
1088 15:58:36.464971 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 15:58:36.468269 PCI: 00:1d.0 read_resources bus 1 link: 0
1090 15:58:36.474869 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1091 15:58:36.478154 PCI: 00:1e.2 read_resources bus 4 link: 0
1092 15:58:36.484773 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1093 15:58:36.488063 PCI: 00:1e.3 read_resources bus 5 link: 0
1094 15:58:36.495034 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1095 15:58:36.498171 PCI: 00:1f.0 read_resources bus 0 link: 0
1096 15:58:36.504643 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1097 15:58:36.511358 DOMAIN: 0000 read_resources bus 0 link: 0 done
1098 15:58:36.514966 Root Device read_resources bus 0 link: 0 done
1099 15:58:36.518200 Done reading resources.
1100 15:58:36.521403 Show resources in subtree (Root Device)...After reading.
1101 15:58:36.528118 Root Device child on link 0 CPU_CLUSTER: 0
1102 15:58:36.531363 CPU_CLUSTER: 0 child on link 0 APIC: 00
1103 15:58:36.531438 APIC: 00
1104 15:58:36.534863 APIC: 02
1105 15:58:36.534939 APIC: 01
1106 15:58:36.538481 APIC: 03
1107 15:58:36.538557 APIC: 06
1108 15:58:36.538619 APIC: 07
1109 15:58:36.541782 APIC: 05
1110 15:58:36.541854 APIC: 04
1111 15:58:36.545143 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 15:58:36.555039 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 15:58:36.604749 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1114 15:58:36.604853 PCI: 00:00.0
1115 15:58:36.604931 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 15:58:36.605003 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 15:58:36.605660 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 15:58:36.605730 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 15:58:36.618616 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 15:58:36.621960 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 15:58:36.631972 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 15:58:36.642188 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 15:58:36.651801 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 15:58:36.658324 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1125 15:58:36.668232 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1126 15:58:36.678576 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1127 15:58:36.688674 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1128 15:58:36.698407 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1129 15:58:36.708037 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1130 15:58:36.718379 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1131 15:58:36.718480 PCI: 00:02.0
1132 15:58:36.727981 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1133 15:58:36.738370 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1134 15:58:36.748386 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1135 15:58:36.748467 PCI: 00:04.0
1136 15:58:36.751340 PCI: 00:08.0
1137 15:58:36.761183 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 15:58:36.761264 PCI: 00:12.0
1139 15:58:36.771064 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 15:58:36.778003 PCI: 00:14.0 child on link 0 USB0 port 0
1141 15:58:36.787932 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1142 15:58:36.791316 USB0 port 0 child on link 0 USB2 port 0
1143 15:58:36.791401 USB2 port 0
1144 15:58:36.794670 USB2 port 1
1145 15:58:36.794753 USB2 port 2
1146 15:58:36.797955 USB2 port 3
1147 15:58:36.801139 USB2 port 5
1148 15:58:36.801224 USB2 port 6
1149 15:58:36.804321 USB2 port 9
1150 15:58:36.804407 USB3 port 0
1151 15:58:36.807617 USB3 port 1
1152 15:58:36.807723 USB3 port 2
1153 15:58:36.810917 USB3 port 3
1154 15:58:36.811002 USB3 port 4
1155 15:58:36.814606 PCI: 00:14.2
1156 15:58:36.824479 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 15:58:36.834341 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 15:58:36.834428 PCI: 00:14.3
1159 15:58:36.844252 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 15:58:36.847547 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 15:58:36.857705 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 15:58:36.860830 I2C: 01:15
1163 15:58:36.864238 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 15:58:36.874460 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 15:58:36.877759 I2C: 02:5d
1166 15:58:36.877846 GENERIC: 0.0
1167 15:58:36.880916 PCI: 00:16.0
1168 15:58:36.890899 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 15:58:36.890988 PCI: 00:17.0
1170 15:58:36.900792 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 15:58:36.910347 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 15:58:36.917337 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 15:58:36.926899 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 15:58:36.933840 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 15:58:36.943795 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 15:58:36.947123 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 15:58:36.957119 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 15:58:36.960257 I2C: 03:1a
1179 15:58:36.960332 I2C: 03:38
1180 15:58:36.963363 I2C: 03:39
1181 15:58:36.963438 I2C: 03:3a
1182 15:58:36.966854 I2C: 03:3b
1183 15:58:36.970509 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 15:58:36.980276 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 15:58:36.987092 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 15:58:36.997009 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 15:58:37.000458 PCI: 01:00.0
1188 15:58:37.009996 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 15:58:37.010076 PCI: 00:1e.0
1190 15:58:37.023135 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 15:58:37.033450 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 15:58:37.036628 PCI: 00:1e.2 child on link 0 SPI: 00
1193 15:58:37.046620 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 15:58:37.046727 SPI: 00
1195 15:58:37.049950 PCI: 00:1e.3 child on link 0 SPI: 01
1196 15:58:37.059600 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 15:58:37.063166 SPI: 01
1198 15:58:37.066515 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 15:58:37.076239 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 15:58:37.082935 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1201 15:58:37.086084 PNP: 0c09.0
1202 15:58:37.093081 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1203 15:58:37.096381 PCI: 00:1f.3
1204 15:58:37.106149 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 15:58:37.116304 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1206 15:58:37.119554 PCI: 00:1f.4
1207 15:58:37.126025 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1208 15:58:37.135900 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1209 15:58:37.139555 PCI: 00:1f.5
1210 15:58:37.146271 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1211 15:58:37.152811 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 15:58:37.159329 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 15:58:37.165870 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 15:58:37.169172 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1215 15:58:37.172718 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1216 15:58:37.179252 PCI: 00:17.0 18 * [0x60 - 0x67] io
1217 15:58:37.182229 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1218 15:58:37.188797 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1219 15:58:37.195435 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1220 15:58:37.202105 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1221 15:58:37.212520 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1222 15:58:37.218828 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1223 15:58:37.222223 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1224 15:58:37.228844 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1225 15:58:37.235616 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1226 15:58:37.238838 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1227 15:58:37.245300 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1228 15:58:37.248598 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1229 15:58:37.252039 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1230 15:58:37.258592 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1231 15:58:37.261969 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1232 15:58:37.268464 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1233 15:58:37.271791 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1234 15:58:37.278282 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1235 15:58:37.281877 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1236 15:58:37.288491 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1237 15:58:37.291604 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1238 15:58:37.298269 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1239 15:58:37.302106 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1240 15:58:37.308521 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1241 15:58:37.311421 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1242 15:58:37.318229 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1243 15:58:37.321400 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1244 15:58:37.325241 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1245 15:58:37.331890 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1246 15:58:37.335235 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1247 15:58:37.342176 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1248 15:58:37.348666 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1249 15:58:37.354769 avoid_fixed_resources: DOMAIN: 0000
1250 15:58:37.358113 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1251 15:58:37.364709 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1252 15:58:37.371499 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1253 15:58:37.381601 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1254 15:58:37.387875 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1255 15:58:37.394765 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1256 15:58:37.404990 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1257 15:58:37.411836 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 15:58:37.418188 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1259 15:58:37.427786 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1260 15:58:37.434519 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1261 15:58:37.441465 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1262 15:58:37.444821 Setting resources...
1263 15:58:37.448040 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1264 15:58:37.454459 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1265 15:58:37.457793 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1266 15:58:37.461145 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1267 15:58:37.464342 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1268 15:58:37.470955 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1269 15:58:37.477903 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 15:58:37.484504 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 15:58:37.490655 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1272 15:58:37.497555 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 15:58:37.500660 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 15:58:37.507450 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 15:58:37.510796 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1276 15:58:37.517463 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1277 15:58:37.520390 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1278 15:58:37.527114 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1279 15:58:37.530593 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1280 15:58:37.537355 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1281 15:58:37.540534 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1282 15:58:37.546978 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1283 15:58:37.550419 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1284 15:58:37.553562 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1285 15:58:37.560599 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1286 15:58:37.563927 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1287 15:58:37.570524 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1288 15:58:37.573746 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1289 15:58:37.580261 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1290 15:58:37.583604 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1291 15:58:37.590834 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1292 15:58:37.594039 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1293 15:58:37.600654 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1294 15:58:37.603862 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1295 15:58:37.610473 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1296 15:58:37.620248 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1297 15:58:37.626775 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1298 15:58:37.633437 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1299 15:58:37.637093 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1300 15:58:37.646659 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1301 15:58:37.650404 Root Device assign_resources, bus 0 link: 0
1302 15:58:37.653703 DOMAIN: 0000 assign_resources, bus 0 link: 0
1303 15:58:37.664094 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1304 15:58:37.670618 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1305 15:58:37.680563 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1306 15:58:37.687198 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1307 15:58:37.697312 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1308 15:58:37.703473 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1309 15:58:37.710089 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 15:58:37.713531 PCI: 00:14.0 assign_resources, bus 0 link: 0
1311 15:58:37.723037 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1312 15:58:37.729679 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1313 15:58:37.739590 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1314 15:58:37.746630 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1315 15:58:37.749834 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 15:58:37.756525 PCI: 00:15.0 assign_resources, bus 1 link: 0
1317 15:58:37.762928 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1318 15:58:37.769596 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 15:58:37.772979 PCI: 00:15.1 assign_resources, bus 2 link: 0
1320 15:58:37.782808 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1321 15:58:37.789354 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1322 15:58:37.795907 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1323 15:58:37.806203 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1324 15:58:37.812726 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1325 15:58:37.819301 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1326 15:58:37.829034 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1327 15:58:37.835552 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1328 15:58:37.842213 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 15:58:37.845769 PCI: 00:19.0 assign_resources, bus 3 link: 0
1330 15:58:37.855331 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1331 15:58:37.861953 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1332 15:58:37.871871 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1333 15:58:37.875233 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 15:58:37.885273 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1335 15:58:37.888621 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1336 15:58:37.898329 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1337 15:58:37.905168 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1338 15:58:37.911757 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 15:58:37.915093 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1340 15:58:37.924848 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1341 15:58:37.928808 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 15:58:37.931850 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1343 15:58:37.938397 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 15:58:37.941520 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1345 15:58:37.948043 LPC: Trying to open IO window from 800 size 1ff
1346 15:58:37.954703 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1347 15:58:37.964742 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1348 15:58:37.971344 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1349 15:58:37.981361 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1350 15:58:37.984642 DOMAIN: 0000 assign_resources, bus 0 link: 0
1351 15:58:37.991162 Root Device assign_resources, bus 0 link: 0
1352 15:58:37.991244 Done setting resources.
1353 15:58:37.998110 Show resources in subtree (Root Device)...After assigning values.
1354 15:58:38.004823 Root Device child on link 0 CPU_CLUSTER: 0
1355 15:58:38.008078 CPU_CLUSTER: 0 child on link 0 APIC: 00
1356 15:58:38.008159 APIC: 00
1357 15:58:38.011356 APIC: 02
1358 15:58:38.011433 APIC: 01
1359 15:58:38.011494 APIC: 03
1360 15:58:38.014646 APIC: 06
1361 15:58:38.014719 APIC: 07
1362 15:58:38.014782 APIC: 05
1363 15:58:38.017811 APIC: 04
1364 15:58:38.021089 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1365 15:58:38.031444 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1366 15:58:38.040899 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1367 15:58:38.044233 PCI: 00:00.0
1368 15:58:38.054398 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1369 15:58:38.064179 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1370 15:58:38.073916 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1371 15:58:38.080826 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1372 15:58:38.090499 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1373 15:58:38.100356 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1374 15:58:38.110168 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1375 15:58:38.119951 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1376 15:58:38.127061 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1377 15:58:38.136532 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1378 15:58:38.146604 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1379 15:58:38.156841 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1380 15:58:38.166591 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1381 15:58:38.176343 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1382 15:58:38.186111 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1383 15:58:38.192802 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1384 15:58:38.196445 PCI: 00:02.0
1385 15:58:38.206139 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1386 15:58:38.216267 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1387 15:58:38.226053 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1388 15:58:38.229257 PCI: 00:04.0
1389 15:58:38.229330 PCI: 00:08.0
1390 15:58:38.239136 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1391 15:58:38.242384 PCI: 00:12.0
1392 15:58:38.252285 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1393 15:58:38.255524 PCI: 00:14.0 child on link 0 USB0 port 0
1394 15:58:38.265757 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1395 15:58:38.272378 USB0 port 0 child on link 0 USB2 port 0
1396 15:58:38.272464 USB2 port 0
1397 15:58:38.275556 USB2 port 1
1398 15:58:38.275705 USB2 port 2
1399 15:58:38.278741 USB2 port 3
1400 15:58:38.278811 USB2 port 5
1401 15:58:38.282225 USB2 port 6
1402 15:58:38.282328 USB2 port 9
1403 15:58:38.285594 USB3 port 0
1404 15:58:38.285693 USB3 port 1
1405 15:58:38.288801 USB3 port 2
1406 15:58:38.288884 USB3 port 3
1407 15:58:38.292299 USB3 port 4
1408 15:58:38.292389 PCI: 00:14.2
1409 15:58:38.305284 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1410 15:58:38.315251 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1411 15:58:38.315331 PCI: 00:14.3
1412 15:58:38.325032 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1413 15:58:38.331524 PCI: 00:15.0 child on link 0 I2C: 01:15
1414 15:58:38.341826 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1415 15:58:38.341909 I2C: 01:15
1416 15:58:38.345239 PCI: 00:15.1 child on link 0 I2C: 02:5d
1417 15:58:38.358318 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1418 15:58:38.358398 I2C: 02:5d
1419 15:58:38.361608 GENERIC: 0.0
1420 15:58:38.361680 PCI: 00:16.0
1421 15:58:38.371868 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1422 15:58:38.374905 PCI: 00:17.0
1423 15:58:38.384761 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1424 15:58:38.394754 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1425 15:58:38.404565 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1426 15:58:38.411254 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1427 15:58:38.420923 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1428 15:58:38.431202 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1429 15:58:38.434166 PCI: 00:19.0 child on link 0 I2C: 03:1a
1430 15:58:38.447421 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1431 15:58:38.447500 I2C: 03:1a
1432 15:58:38.450669 I2C: 03:38
1433 15:58:38.450741 I2C: 03:39
1434 15:58:38.450803 I2C: 03:3a
1435 15:58:38.454031 I2C: 03:3b
1436 15:58:38.457223 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1437 15:58:38.467087 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1438 15:58:38.477412 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1439 15:58:38.487142 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1440 15:58:38.490250 PCI: 01:00.0
1441 15:58:38.500090 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1442 15:58:38.500174 PCI: 00:1e.0
1443 15:58:38.513623 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1444 15:58:38.523249 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1445 15:58:38.527057 PCI: 00:1e.2 child on link 0 SPI: 00
1446 15:58:38.536804 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1447 15:58:38.540303 SPI: 00
1448 15:58:38.543405 PCI: 00:1e.3 child on link 0 SPI: 01
1449 15:58:38.553287 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1450 15:58:38.553364 SPI: 01
1451 15:58:38.559893 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1452 15:58:38.566531 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1453 15:58:38.576286 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1454 15:58:38.579916 PNP: 0c09.0
1455 15:58:38.586203 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1456 15:58:38.589412 PCI: 00:1f.3
1457 15:58:38.599502 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1458 15:58:38.609289 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1459 15:58:38.609372 PCI: 00:1f.4
1460 15:58:38.619296 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1461 15:58:38.629601 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1462 15:58:38.632449 PCI: 00:1f.5
1463 15:58:38.642682 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1464 15:58:38.645806 Done allocating resources.
1465 15:58:38.649291 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1466 15:58:38.652452 Enabling resources...
1467 15:58:38.659085 PCI: 00:00.0 subsystem <- 8086/9b61
1468 15:58:38.659184 PCI: 00:00.0 cmd <- 06
1469 15:58:38.662341 PCI: 00:02.0 subsystem <- 8086/9b41
1470 15:58:38.665698 PCI: 00:02.0 cmd <- 03
1471 15:58:38.668921 PCI: 00:08.0 cmd <- 06
1472 15:58:38.672313 PCI: 00:12.0 subsystem <- 8086/02f9
1473 15:58:38.675750 PCI: 00:12.0 cmd <- 02
1474 15:58:38.678866 PCI: 00:14.0 subsystem <- 8086/02ed
1475 15:58:38.682180 PCI: 00:14.0 cmd <- 02
1476 15:58:38.685924 PCI: 00:14.2 cmd <- 02
1477 15:58:38.688628 PCI: 00:14.3 subsystem <- 8086/02f0
1478 15:58:38.688745 PCI: 00:14.3 cmd <- 02
1479 15:58:38.695880 PCI: 00:15.0 subsystem <- 8086/02e8
1480 15:58:38.695982 PCI: 00:15.0 cmd <- 02
1481 15:58:38.698887 PCI: 00:15.1 subsystem <- 8086/02e9
1482 15:58:38.702236 PCI: 00:15.1 cmd <- 02
1483 15:58:38.705544 PCI: 00:16.0 subsystem <- 8086/02e0
1484 15:58:38.708782 PCI: 00:16.0 cmd <- 02
1485 15:58:38.712067 PCI: 00:17.0 subsystem <- 8086/02d3
1486 15:58:38.715361 PCI: 00:17.0 cmd <- 03
1487 15:58:38.718645 PCI: 00:19.0 subsystem <- 8086/02c5
1488 15:58:38.722213 PCI: 00:19.0 cmd <- 02
1489 15:58:38.725313 PCI: 00:1d.0 bridge ctrl <- 0013
1490 15:58:38.728688 PCI: 00:1d.0 subsystem <- 8086/02b0
1491 15:58:38.732352 PCI: 00:1d.0 cmd <- 06
1492 15:58:38.735676 PCI: 00:1e.0 subsystem <- 8086/02a8
1493 15:58:38.738959 PCI: 00:1e.0 cmd <- 06
1494 15:58:38.742068 PCI: 00:1e.2 subsystem <- 8086/02aa
1495 15:58:38.745495 PCI: 00:1e.2 cmd <- 06
1496 15:58:38.748521 PCI: 00:1e.3 subsystem <- 8086/02ab
1497 15:58:38.748644 PCI: 00:1e.3 cmd <- 02
1498 15:58:38.755122 PCI: 00:1f.0 subsystem <- 8086/0284
1499 15:58:38.755233 PCI: 00:1f.0 cmd <- 407
1500 15:58:38.761927 PCI: 00:1f.3 subsystem <- 8086/02c8
1501 15:58:38.762042 PCI: 00:1f.3 cmd <- 02
1502 15:58:38.765194 PCI: 00:1f.4 subsystem <- 8086/02a3
1503 15:58:38.768485 PCI: 00:1f.4 cmd <- 03
1504 15:58:38.771824 PCI: 00:1f.5 subsystem <- 8086/02a4
1505 15:58:38.774889 PCI: 00:1f.5 cmd <- 406
1506 15:58:38.784347 PCI: 01:00.0 cmd <- 02
1507 15:58:38.789229 done.
1508 15:58:38.801239 ME: Version: 14.0.39.1367
1509 15:58:38.807540 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1510 15:58:38.811066 Initializing devices...
1511 15:58:38.811148 Root Device init ...
1512 15:58:38.817729 Chrome EC: Set SMI mask to 0x0000000000000000
1513 15:58:38.820905 Chrome EC: clear events_b mask to 0x0000000000000000
1514 15:58:38.827550 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1515 15:58:38.834489 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1516 15:58:38.841066 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1517 15:58:38.844340 Chrome EC: Set WAKE mask to 0x0000000000000000
1518 15:58:38.847594 Root Device init finished in 35165 usecs
1519 15:58:38.851208 CPU_CLUSTER: 0 init ...
1520 15:58:38.857522 CPU_CLUSTER: 0 init finished in 2446 usecs
1521 15:58:38.861662 PCI: 00:00.0 init ...
1522 15:58:38.865154 CPU TDP: 15 Watts
1523 15:58:38.868139 CPU PL2 = 64 Watts
1524 15:58:38.871825 PCI: 00:00.0 init finished in 7080 usecs
1525 15:58:38.875066 PCI: 00:02.0 init ...
1526 15:58:38.878337 PCI: 00:02.0 init finished in 2254 usecs
1527 15:58:38.881691 PCI: 00:08.0 init ...
1528 15:58:38.885023 PCI: 00:08.0 init finished in 2253 usecs
1529 15:58:38.888265 PCI: 00:12.0 init ...
1530 15:58:38.891449 PCI: 00:12.0 init finished in 2251 usecs
1531 15:58:38.894687 PCI: 00:14.0 init ...
1532 15:58:38.898492 PCI: 00:14.0 init finished in 2251 usecs
1533 15:58:38.901299 PCI: 00:14.2 init ...
1534 15:58:38.905037 PCI: 00:14.2 init finished in 2252 usecs
1535 15:58:38.908392 PCI: 00:14.3 init ...
1536 15:58:38.911566 PCI: 00:14.3 init finished in 2259 usecs
1537 15:58:38.914802 PCI: 00:15.0 init ...
1538 15:58:38.918157 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 15:58:38.921316 PCI: 00:15.0 init finished in 5967 usecs
1540 15:58:38.924674 PCI: 00:15.1 init ...
1541 15:58:38.928057 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 15:58:38.931249 PCI: 00:15.1 init finished in 5966 usecs
1543 15:58:38.934927 PCI: 00:16.0 init ...
1544 15:58:38.938640 PCI: 00:16.0 init finished in 2243 usecs
1545 15:58:38.942398 PCI: 00:19.0 init ...
1546 15:58:38.945537 DW I2C bus 4 at 0xd1222000 (400 KHz)
1547 15:58:38.951896 PCI: 00:19.0 init finished in 5976 usecs
1548 15:58:38.951984 PCI: 00:1d.0 init ...
1549 15:58:38.955215 Initializing PCH PCIe bridge.
1550 15:58:38.958752 PCI: 00:1d.0 init finished in 5275 usecs
1551 15:58:38.963748 PCI: 00:1f.0 init ...
1552 15:58:38.966818 IOAPIC: Initializing IOAPIC at 0xfec00000
1553 15:58:38.973947 IOAPIC: Bootstrap Processor Local APIC = 0x00
1554 15:58:38.974053 IOAPIC: ID = 0x02
1555 15:58:38.976960 IOAPIC: Dumping registers
1556 15:58:38.980301 reg 0x0000: 0x02000000
1557 15:58:38.983550 reg 0x0001: 0x00770020
1558 15:58:38.983653 reg 0x0002: 0x00000000
1559 15:58:38.990230 PCI: 00:1f.0 init finished in 23530 usecs
1560 15:58:38.993550 PCI: 00:1f.4 init ...
1561 15:58:38.996939 PCI: 00:1f.4 init finished in 2263 usecs
1562 15:58:39.007907 PCI: 01:00.0 init ...
1563 15:58:39.011216 PCI: 01:00.0 init finished in 2252 usecs
1564 15:58:39.015593 PNP: 0c09.0 init ...
1565 15:58:39.018776 Google Chrome EC uptime: 11.094 seconds
1566 15:58:39.025523 Google Chrome AP resets since EC boot: 0
1567 15:58:39.028712 Google Chrome most recent AP reset causes:
1568 15:58:39.035174 Google Chrome EC reset flags at last EC boot: reset-pin
1569 15:58:39.038351 PNP: 0c09.0 init finished in 20620 usecs
1570 15:58:39.041914 Devices initialized
1571 15:58:39.045006 Show all devs... After init.
1572 15:58:39.045108 Root Device: enabled 1
1573 15:58:39.048540 CPU_CLUSTER: 0: enabled 1
1574 15:58:39.051829 DOMAIN: 0000: enabled 1
1575 15:58:39.051919 APIC: 00: enabled 1
1576 15:58:39.055082 PCI: 00:00.0: enabled 1
1577 15:58:39.058247 PCI: 00:02.0: enabled 1
1578 15:58:39.061854 PCI: 00:04.0: enabled 0
1579 15:58:39.061930 PCI: 00:05.0: enabled 0
1580 15:58:39.064987 PCI: 00:12.0: enabled 1
1581 15:58:39.068460 PCI: 00:12.5: enabled 0
1582 15:58:39.071530 PCI: 00:12.6: enabled 0
1583 15:58:39.071638 PCI: 00:14.0: enabled 1
1584 15:58:39.075066 PCI: 00:14.1: enabled 0
1585 15:58:39.078315 PCI: 00:14.3: enabled 1
1586 15:58:39.078390 PCI: 00:14.5: enabled 0
1587 15:58:39.081548 PCI: 00:15.0: enabled 1
1588 15:58:39.084783 PCI: 00:15.1: enabled 1
1589 15:58:39.088068 PCI: 00:15.2: enabled 0
1590 15:58:39.088139 PCI: 00:15.3: enabled 0
1591 15:58:39.091509 PCI: 00:16.0: enabled 1
1592 15:58:39.094815 PCI: 00:16.1: enabled 0
1593 15:58:39.097838 PCI: 00:16.2: enabled 0
1594 15:58:39.097910 PCI: 00:16.3: enabled 0
1595 15:58:39.101264 PCI: 00:16.4: enabled 0
1596 15:58:39.104513 PCI: 00:16.5: enabled 0
1597 15:58:39.107855 PCI: 00:17.0: enabled 1
1598 15:58:39.107933 PCI: 00:19.0: enabled 1
1599 15:58:39.111558 PCI: 00:19.1: enabled 0
1600 15:58:39.114441 PCI: 00:19.2: enabled 0
1601 15:58:39.114547 PCI: 00:1a.0: enabled 0
1602 15:58:39.118169 PCI: 00:1c.0: enabled 0
1603 15:58:39.121050 PCI: 00:1c.1: enabled 0
1604 15:58:39.124894 PCI: 00:1c.2: enabled 0
1605 15:58:39.124964 PCI: 00:1c.3: enabled 0
1606 15:58:39.128217 PCI: 00:1c.4: enabled 0
1607 15:58:39.131269 PCI: 00:1c.5: enabled 0
1608 15:58:39.134597 PCI: 00:1c.6: enabled 0
1609 15:58:39.134701 PCI: 00:1c.7: enabled 0
1610 15:58:39.137812 PCI: 00:1d.0: enabled 1
1611 15:58:39.141083 PCI: 00:1d.1: enabled 0
1612 15:58:39.144466 PCI: 00:1d.2: enabled 0
1613 15:58:39.144567 PCI: 00:1d.3: enabled 0
1614 15:58:39.147703 PCI: 00:1d.4: enabled 0
1615 15:58:39.150801 PCI: 00:1d.5: enabled 0
1616 15:58:39.154253 PCI: 00:1e.0: enabled 1
1617 15:58:39.154332 PCI: 00:1e.1: enabled 0
1618 15:58:39.157744 PCI: 00:1e.2: enabled 1
1619 15:58:39.160739 PCI: 00:1e.3: enabled 1
1620 15:58:39.160834 PCI: 00:1f.0: enabled 1
1621 15:58:39.164317 PCI: 00:1f.1: enabled 0
1622 15:58:39.167726 PCI: 00:1f.2: enabled 0
1623 15:58:39.171019 PCI: 00:1f.3: enabled 1
1624 15:58:39.171119 PCI: 00:1f.4: enabled 1
1625 15:58:39.174266 PCI: 00:1f.5: enabled 1
1626 15:58:39.177640 PCI: 00:1f.6: enabled 0
1627 15:58:39.180643 USB0 port 0: enabled 1
1628 15:58:39.180719 I2C: 01:15: enabled 1
1629 15:58:39.183892 I2C: 02:5d: enabled 1
1630 15:58:39.187534 GENERIC: 0.0: enabled 1
1631 15:58:39.187606 I2C: 03:1a: enabled 1
1632 15:58:39.190663 I2C: 03:38: enabled 1
1633 15:58:39.193910 I2C: 03:39: enabled 1
1634 15:58:39.194013 I2C: 03:3a: enabled 1
1635 15:58:39.197285 I2C: 03:3b: enabled 1
1636 15:58:39.200615 PCI: 00:00.0: enabled 1
1637 15:58:39.200686 SPI: 00: enabled 1
1638 15:58:39.203799 SPI: 01: enabled 1
1639 15:58:39.207100 PNP: 0c09.0: enabled 1
1640 15:58:39.207185 USB2 port 0: enabled 1
1641 15:58:39.210336 USB2 port 1: enabled 1
1642 15:58:39.213647 USB2 port 2: enabled 0
1643 15:58:39.216998 USB2 port 3: enabled 0
1644 15:58:39.217080 USB2 port 5: enabled 0
1645 15:58:39.220273 USB2 port 6: enabled 1
1646 15:58:39.223675 USB2 port 9: enabled 1
1647 15:58:39.223757 USB3 port 0: enabled 1
1648 15:58:39.226935 USB3 port 1: enabled 1
1649 15:58:39.230247 USB3 port 2: enabled 1
1650 15:58:39.230328 USB3 port 3: enabled 1
1651 15:58:39.233493 USB3 port 4: enabled 0
1652 15:58:39.236617 APIC: 02: enabled 1
1653 15:58:39.236700 APIC: 01: enabled 1
1654 15:58:39.240220 APIC: 03: enabled 1
1655 15:58:39.243564 APIC: 06: enabled 1
1656 15:58:39.243692 APIC: 07: enabled 1
1657 15:58:39.246825 APIC: 05: enabled 1
1658 15:58:39.250047 APIC: 04: enabled 1
1659 15:58:39.250129 PCI: 00:08.0: enabled 1
1660 15:58:39.253327 PCI: 00:14.2: enabled 1
1661 15:58:39.256536 PCI: 01:00.0: enabled 1
1662 15:58:39.260140 Disabling ACPI via APMC:
1663 15:58:39.263552 done.
1664 15:58:39.266934 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 15:58:39.270193 ELOG: NV offset 0xaf0000 size 0x4000
1666 15:58:39.277089 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 15:58:39.283642 ELOG: Event(17) added with size 13 at 2023-09-06 15:58:39 UTC
1668 15:58:39.290584 ELOG: Event(92) added with size 9 at 2023-09-06 15:58:39 UTC
1669 15:58:39.297182 ELOG: Event(93) added with size 9 at 2023-09-06 15:58:39 UTC
1670 15:58:39.303825 ELOG: Event(9A) added with size 9 at 2023-09-06 15:58:39 UTC
1671 15:58:39.310429 ELOG: Event(9E) added with size 10 at 2023-09-06 15:58:39 UTC
1672 15:58:39.317137 ELOG: Event(9F) added with size 14 at 2023-09-06 15:58:39 UTC
1673 15:58:39.320316 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1674 15:58:39.327955 ELOG: Event(A1) added with size 10 at 2023-09-06 15:58:39 UTC
1675 15:58:39.337789 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 15:58:39.344406 ELOG: Event(A0) added with size 9 at 2023-09-06 15:58:39 UTC
1677 15:58:39.347436 elog_add_boot_reason: Logged dev mode boot
1678 15:58:39.350835 Finalize devices...
1679 15:58:39.350918 PCI: 00:17.0 final
1680 15:58:39.354090 Devices finalized
1681 15:58:39.357299 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1682 15:58:39.363964 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
1683 15:58:39.367269 ME: HFSTS1 : 0x90000245
1684 15:58:39.370938 ME: HFSTS2 : 0x3B850126
1685 15:58:39.377164 ME: HFSTS3 : 0x00000020
1686 15:58:39.380921 ME: HFSTS4 : 0x00004800
1687 15:58:39.384315 ME: HFSTS5 : 0x00000000
1688 15:58:39.387216 ME: HFSTS6 : 0x40400006
1689 15:58:39.390658 ME: Manufacturing Mode : NO
1690 15:58:39.393987 ME: FW Partition Table : OK
1691 15:58:39.397253 ME: Bringup Loader Failure : NO
1692 15:58:39.400509 ME: Firmware Init Complete : YES
1693 15:58:39.403958 ME: Boot Options Present : NO
1694 15:58:39.407113 ME: Update In Progress : NO
1695 15:58:39.410404 ME: D0i3 Support : YES
1696 15:58:39.413851 ME: Low Power State Enabled : NO
1697 15:58:39.416973 ME: CPU Replaced : NO
1698 15:58:39.420286 ME: CPU Replacement Valid : YES
1699 15:58:39.423543 ME: Current Working State : 5
1700 15:58:39.426970 ME: Current Operation State : 1
1701 15:58:39.430449 ME: Current Operation Mode : 0
1702 15:58:39.433693 ME: Error Code : 0
1703 15:58:39.436992 ME: CPU Debug Disabled : YES
1704 15:58:39.440271 ME: TXT Support : NO
1705 15:58:39.446696 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1706 15:58:39.453364 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 15:58:39.453441 CBFS @ c08000 size 3f8000
1708 15:58:39.460184 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 15:58:39.463489 CBFS: Locating 'fallback/dsdt.aml'
1710 15:58:39.466883 CBFS: Found @ offset 10bb80 size 3fa5
1711 15:58:39.473699 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1712 15:58:39.476784 CBFS @ c08000 size 3f8000
1713 15:58:39.479784 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1714 15:58:39.483090 CBFS: Locating 'fallback/slic'
1715 15:58:39.488306 CBFS: 'fallback/slic' not found.
1716 15:58:39.495142 ACPI: Writing ACPI tables at 99b3e000.
1717 15:58:39.495225 ACPI: * FACS
1718 15:58:39.498127 ACPI: * DSDT
1719 15:58:39.501125 Ramoops buffer: 0x100000@0x99a3d000.
1720 15:58:39.504825 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1721 15:58:39.511173 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1722 15:58:39.514689 Google Chrome EC: version:
1723 15:58:39.517944 ro: helios_v2.0.2659-56403530b
1724 15:58:39.521277 rw: helios_v2.0.2849-c41de27e7d
1725 15:58:39.521351 running image: 1
1726 15:58:39.525692 ACPI: * FADT
1727 15:58:39.525766 SCI is IRQ9
1728 15:58:39.532413 ACPI: added table 1/32, length now 40
1729 15:58:39.532497 ACPI: * SSDT
1730 15:58:39.535789 Found 1 CPU(s) with 8 core(s) each.
1731 15:58:39.538979 Error: Could not locate 'wifi_sar' in VPD.
1732 15:58:39.545661 Checking CBFS for default SAR values
1733 15:58:39.549002 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1734 15:58:39.552285 CBFS @ c08000 size 3f8000
1735 15:58:39.559087 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1736 15:58:39.562267 CBFS: Locating 'wifi_sar_defaults.hex'
1737 15:58:39.565212 CBFS: Found @ offset 5fac0 size 77
1738 15:58:39.568618 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1739 15:58:39.575308 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1740 15:58:39.578674 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1741 15:58:39.585093 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1742 15:58:39.588781 failed to find key in VPD: dsm_calib_r0_0
1743 15:58:39.598517 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1744 15:58:39.601960 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1745 15:58:39.605150 failed to find key in VPD: dsm_calib_r0_1
1746 15:58:39.614835 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1747 15:58:39.621270 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1748 15:58:39.624737 failed to find key in VPD: dsm_calib_r0_2
1749 15:58:39.634709 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1750 15:58:39.638019 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1751 15:58:39.644564 failed to find key in VPD: dsm_calib_r0_3
1752 15:58:39.651248 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1753 15:58:39.657907 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1754 15:58:39.661066 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1755 15:58:39.664336 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1756 15:58:39.668742 EC returned error result code 1
1757 15:58:39.672483 EC returned error result code 1
1758 15:58:39.675741 EC returned error result code 1
1759 15:58:39.682312 PS2K: Bad resp from EC. Vivaldi disabled!
1760 15:58:39.685617 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1761 15:58:39.692112 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1762 15:58:39.699252 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1763 15:58:39.702368 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1764 15:58:39.708812 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1765 15:58:39.715168 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1766 15:58:39.722004 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1767 15:58:39.725215 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1768 15:58:39.732333 ACPI: added table 2/32, length now 44
1769 15:58:39.732428 ACPI: * MCFG
1770 15:58:39.735394 ACPI: added table 3/32, length now 48
1771 15:58:39.738261 ACPI: * TPM2
1772 15:58:39.741730 TPM2 log created at 99a2d000
1773 15:58:39.744985 ACPI: added table 4/32, length now 52
1774 15:58:39.745066 ACPI: * MADT
1775 15:58:39.748369 SCI is IRQ9
1776 15:58:39.752013 ACPI: added table 5/32, length now 56
1777 15:58:39.752085 current = 99b43ac0
1778 15:58:39.755383 ACPI: * DMAR
1779 15:58:39.758083 ACPI: added table 6/32, length now 60
1780 15:58:39.761855 ACPI: * IGD OpRegion
1781 15:58:39.761927 GMA: Found VBT in CBFS
1782 15:58:39.765237 GMA: Found valid VBT in CBFS
1783 15:58:39.771737 ACPI: added table 7/32, length now 64
1784 15:58:39.771813 ACPI: * HPET
1785 15:58:39.775022 ACPI: added table 8/32, length now 68
1786 15:58:39.778066 ACPI: done.
1787 15:58:39.778139 ACPI tables: 31744 bytes.
1788 15:58:39.782013 smbios_write_tables: 99a2c000
1789 15:58:39.785106 EC returned error result code 3
1790 15:58:39.788400 Couldn't obtain OEM name from CBI
1791 15:58:39.791794 Create SMBIOS type 17
1792 15:58:39.795139 PCI: 00:00.0 (Intel Cannonlake)
1793 15:58:39.798346 PCI: 00:14.3 (Intel WiFi)
1794 15:58:39.802001 SMBIOS tables: 939 bytes.
1795 15:58:39.805324 Writing table forward entry at 0x00000500
1796 15:58:39.811531 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1797 15:58:39.815205 Writing coreboot table at 0x99b62000
1798 15:58:39.821595 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1799 15:58:39.824692 1. 0000000000001000-000000000009ffff: RAM
1800 15:58:39.827975 2. 00000000000a0000-00000000000fffff: RESERVED
1801 15:58:39.834990 3. 0000000000100000-0000000099a2bfff: RAM
1802 15:58:39.841449 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1803 15:58:39.844680 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1804 15:58:39.851251 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1805 15:58:39.854332 7. 000000009a000000-000000009f7fffff: RESERVED
1806 15:58:39.861116 8. 00000000e0000000-00000000efffffff: RESERVED
1807 15:58:39.864450 9. 00000000fc000000-00000000fc000fff: RESERVED
1808 15:58:39.871223 10. 00000000fe000000-00000000fe00ffff: RESERVED
1809 15:58:39.874446 11. 00000000fed10000-00000000fed17fff: RESERVED
1810 15:58:39.877734 12. 00000000fed80000-00000000fed83fff: RESERVED
1811 15:58:39.884140 13. 00000000fed90000-00000000fed91fff: RESERVED
1812 15:58:39.887595 14. 00000000feda0000-00000000feda1fff: RESERVED
1813 15:58:39.894296 15. 0000000100000000-000000045e7fffff: RAM
1814 15:58:39.897626 Graphics framebuffer located at 0xc0000000
1815 15:58:39.900936 Passing 5 GPIOs to payload:
1816 15:58:39.904169 NAME | PORT | POLARITY | VALUE
1817 15:58:39.911071 write protect | undefined | high | high
1818 15:58:39.917641 lid | undefined | high | high
1819 15:58:39.920920 power | undefined | high | low
1820 15:58:39.927446 oprom | undefined | high | low
1821 15:58:39.930916 EC in RW | 0x000000cb | high | low
1822 15:58:39.934296 Board ID: 4
1823 15:58:39.937394 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1824 15:58:39.940721 CBFS @ c08000 size 3f8000
1825 15:58:39.947250 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1826 15:58:39.954128 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6ba9
1827 15:58:39.954203 coreboot table: 1492 bytes.
1828 15:58:39.957097 IMD ROOT 0. 99fff000 00001000
1829 15:58:39.960748 IMD SMALL 1. 99ffe000 00001000
1830 15:58:39.963601 FSP MEMORY 2. 99c4e000 003b0000
1831 15:58:39.967146 CONSOLE 3. 99c2e000 00020000
1832 15:58:39.970367 FMAP 4. 99c2d000 0000054e
1833 15:58:39.973725 TIME STAMP 5. 99c2c000 00000910
1834 15:58:39.976993 VBOOT WORK 6. 99c18000 00014000
1835 15:58:39.980322 MRC DATA 7. 99c16000 00001958
1836 15:58:39.983618 ROMSTG STCK 8. 99c15000 00001000
1837 15:58:39.986966 AFTER CAR 9. 99c0b000 0000a000
1838 15:58:39.990213 RAMSTAGE 10. 99baf000 0005c000
1839 15:58:39.993930 REFCODE 11. 99b7a000 00035000
1840 15:58:39.997058 SMM BACKUP 12. 99b6a000 00010000
1841 15:58:40.000555 COREBOOT 13. 99b62000 00008000
1842 15:58:40.003752 ACPI 14. 99b3e000 00024000
1843 15:58:40.007167 ACPI GNVS 15. 99b3d000 00001000
1844 15:58:40.010373 RAMOOPS 16. 99a3d000 00100000
1845 15:58:40.013621 TPM2 TCGLOG17. 99a2d000 00010000
1846 15:58:40.016847 SMBIOS 18. 99a2c000 00000800
1847 15:58:40.020694 IMD small region:
1848 15:58:40.023864 IMD ROOT 0. 99ffec00 00000400
1849 15:58:40.027136 FSP RUNTIME 1. 99ffebe0 00000004
1850 15:58:40.030442 EC HOSTEVENT 2. 99ffebc0 00000008
1851 15:58:40.033424 POWER STATE 3. 99ffeb80 00000040
1852 15:58:40.037276 ROMSTAGE 4. 99ffeb60 00000004
1853 15:58:40.040464 MEM INFO 5. 99ffe9a0 000001b9
1854 15:58:40.043831 VPD 6. 99ffe920 0000006c
1855 15:58:40.046953 MTRR: Physical address space:
1856 15:58:40.053809 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1857 15:58:40.060309 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1858 15:58:40.066904 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1859 15:58:40.073397 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1860 15:58:40.080075 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1861 15:58:40.086807 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1862 15:58:40.093243 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1863 15:58:40.096456 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 15:58:40.099615 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 15:58:40.103266 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 15:58:40.110099 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 15:58:40.112917 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 15:58:40.116741 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 15:58:40.119893 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 15:58:40.123263 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 15:58:40.129493 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 15:58:40.133243 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 15:58:40.135993 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 15:58:40.139788 call enable_fixed_mtrr()
1875 15:58:40.142895 CPU physical address size: 39 bits
1876 15:58:40.149637 MTRR: default type WB/UC MTRR counts: 6/8.
1877 15:58:40.152513 MTRR: WB selected as default type.
1878 15:58:40.159242 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1879 15:58:40.162617 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1880 15:58:40.169163 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1881 15:58:40.175799 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1882 15:58:40.182612 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1883 15:58:40.189082 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1884 15:58:40.192397 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 15:58:40.199325 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 15:58:40.202045 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 15:58:40.205795 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 15:58:40.208983 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 15:58:40.215543 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 15:58:40.218852 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 15:58:40.222155 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 15:58:40.225282 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 15:58:40.232392 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 15:58:40.235459 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 15:58:40.238775 MTRR: Fixed MSR 0x250 0x0606060606060606
1896 15:58:40.242019 call enable_fixed_mtrr()
1897 15:58:40.245166 MTRR: Fixed MSR 0x258 0x0606060606060606
1898 15:58:40.248724 MTRR: Fixed MSR 0x259 0x0000000000000000
1899 15:58:40.255347 MTRR: Fixed MSR 0x268 0x0606060606060606
1900 15:58:40.258673 MTRR: Fixed MSR 0x269 0x0606060606060606
1901 15:58:40.262119 MTRR: Fixed MSR 0x26a 0x0606060606060606
1902 15:58:40.265456 MTRR: Fixed MSR 0x26b 0x0606060606060606
1903 15:58:40.271932 MTRR: Fixed MSR 0x26c 0x0606060606060606
1904 15:58:40.275197 MTRR: Fixed MSR 0x26d 0x0606060606060606
1905 15:58:40.278537 MTRR: Fixed MSR 0x26e 0x0606060606060606
1906 15:58:40.281831 MTRR: Fixed MSR 0x26f 0x0606060606060606
1907 15:58:40.285386 CPU physical address size: 39 bits
1908 15:58:40.288312 call enable_fixed_mtrr()
1909 15:58:40.291628 MTRR: Fixed MSR 0x250 0x0606060606060606
1910 15:58:40.298465 MTRR: Fixed MSR 0x250 0x0606060606060606
1911 15:58:40.301623 MTRR: Fixed MSR 0x258 0x0606060606060606
1912 15:58:40.304768 MTRR: Fixed MSR 0x259 0x0000000000000000
1913 15:58:40.308544 MTRR: Fixed MSR 0x268 0x0606060606060606
1914 15:58:40.314695 MTRR: Fixed MSR 0x269 0x0606060606060606
1915 15:58:40.318202 MTRR: Fixed MSR 0x26a 0x0606060606060606
1916 15:58:40.321510 MTRR: Fixed MSR 0x26b 0x0606060606060606
1917 15:58:40.324859 MTRR: Fixed MSR 0x26c 0x0606060606060606
1918 15:58:40.331486 MTRR: Fixed MSR 0x26d 0x0606060606060606
1919 15:58:40.334763 MTRR: Fixed MSR 0x26e 0x0606060606060606
1920 15:58:40.337885 MTRR: Fixed MSR 0x26f 0x0606060606060606
1921 15:58:40.341318 MTRR: Fixed MSR 0x258 0x0606060606060606
1922 15:58:40.344608 call enable_fixed_mtrr()
1923 15:58:40.348157 MTRR: Fixed MSR 0x259 0x0000000000000000
1924 15:58:40.354393 MTRR: Fixed MSR 0x268 0x0606060606060606
1925 15:58:40.357711 MTRR: Fixed MSR 0x269 0x0606060606060606
1926 15:58:40.361106 MTRR: Fixed MSR 0x26a 0x0606060606060606
1927 15:58:40.364416 MTRR: Fixed MSR 0x26b 0x0606060606060606
1928 15:58:40.371105 MTRR: Fixed MSR 0x26c 0x0606060606060606
1929 15:58:40.374508 MTRR: Fixed MSR 0x26d 0x0606060606060606
1930 15:58:40.377841 MTRR: Fixed MSR 0x26e 0x0606060606060606
1931 15:58:40.381062 MTRR: Fixed MSR 0x26f 0x0606060606060606
1932 15:58:40.384415 CPU physical address size: 39 bits
1933 15:58:40.387625 call enable_fixed_mtrr()
1934 15:58:40.391527 CPU physical address size: 39 bits
1935 15:58:40.394297 CPU physical address size: 39 bits
1936 15:58:40.401292 MTRR: Fixed MSR 0x250 0x0606060606060606
1937 15:58:40.404629 MTRR: Fixed MSR 0x250 0x0606060606060606
1938 15:58:40.404728
1939 15:58:40.404836 MTRR check
1940 15:58:40.407619 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 15:58:40.414511 MTRR: Fixed MSR 0x258 0x0606060606060606
1942 15:58:40.417817 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 15:58:40.421329 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 15:58:40.424260 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 15:58:40.430876 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 15:58:40.434280 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 15:58:40.437483 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 15:58:40.440681 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 15:58:40.447628 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 15:58:40.450784 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 15:58:40.454114 Fixed MTRRs : Enabled
1952 15:58:40.454200 Variable MTRRs: Enabled
1953 15:58:40.454262
1954 15:58:40.457366 call enable_fixed_mtrr()
1955 15:58:40.464379 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1956 15:58:40.467737 CPU physical address size: 39 bits
1957 15:58:40.473662 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1958 15:58:40.477547 MTRR: Fixed MSR 0x258 0x0606060606060606
1959 15:58:40.480428 MTRR: Fixed MSR 0x258 0x0606060606060606
1960 15:58:40.483794 MTRR: Fixed MSR 0x259 0x0000000000000000
1961 15:58:40.486883 MTRR: Fixed MSR 0x268 0x0606060606060606
1962 15:58:40.493528 MTRR: Fixed MSR 0x269 0x0606060606060606
1963 15:58:40.497387 MTRR: Fixed MSR 0x26a 0x0606060606060606
1964 15:58:40.500627 MTRR: Fixed MSR 0x26b 0x0606060606060606
1965 15:58:40.503568 MTRR: Fixed MSR 0x26c 0x0606060606060606
1966 15:58:40.510501 MTRR: Fixed MSR 0x26d 0x0606060606060606
1967 15:58:40.513560 MTRR: Fixed MSR 0x26e 0x0606060606060606
1968 15:58:40.516630 MTRR: Fixed MSR 0x26f 0x0606060606060606
1969 15:58:40.523575 MTRR: Fixed MSR 0x259 0x0000000000000000
1970 15:58:40.526521 MTRR: Fixed MSR 0x268 0x0606060606060606
1971 15:58:40.530202 MTRR: Fixed MSR 0x269 0x0606060606060606
1972 15:58:40.533149 MTRR: Fixed MSR 0x26a 0x0606060606060606
1973 15:58:40.536658 MTRR: Fixed MSR 0x26b 0x0606060606060606
1974 15:58:40.543106 MTRR: Fixed MSR 0x26c 0x0606060606060606
1975 15:58:40.546422 MTRR: Fixed MSR 0x26d 0x0606060606060606
1976 15:58:40.549769 MTRR: Fixed MSR 0x26e 0x0606060606060606
1977 15:58:40.552897 MTRR: Fixed MSR 0x26f 0x0606060606060606
1978 15:58:40.556348 call enable_fixed_mtrr()
1979 15:58:40.559578 call enable_fixed_mtrr()
1980 15:58:40.563154 CBFS @ c08000 size 3f8000
1981 15:58:40.569527 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1982 15:58:40.572880 CBFS: Locating 'fallback/payload'
1983 15:58:40.576433 CPU physical address size: 39 bits
1984 15:58:40.579507 CPU physical address size: 39 bits
1985 15:58:40.582682 CBFS: Found @ offset 1c96c0 size 3f798
1986 15:58:40.585838 Checking segment from ROM address 0xffdd16f8
1987 15:58:40.593029 Checking segment from ROM address 0xffdd1714
1988 15:58:40.596342 Loading segment from ROM address 0xffdd16f8
1989 15:58:40.599583 code (compression=0)
1990 15:58:40.606180 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1991 15:58:40.616210 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1992 15:58:40.619325 it's not compressed!
1993 15:58:40.710002 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1994 15:58:40.716846 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1995 15:58:40.720178 Loading segment from ROM address 0xffdd1714
1996 15:58:40.723394 Entry Point 0x30000000
1997 15:58:40.726537 Loaded segments
1998 15:58:40.732751 Finalizing chipset.
1999 15:58:40.735415 Finalizing SMM.
2000 15:58:40.739180 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2001 15:58:40.742150 mp_park_aps done after 0 msecs.
2002 15:58:40.748620 Jumping to boot code at 30000000(99b62000)
2003 15:58:40.755823 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2004 15:58:40.755907
2005 15:58:40.755972
2006 15:58:40.756032
2007 15:58:40.758729 Starting depthcharge on Helios...
2008 15:58:40.758811
2009 15:58:40.759156 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2010 15:58:40.759261 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2011 15:58:40.759345 Setting prompt string to ['hatch:']
2012 15:58:40.759424 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2013 15:58:40.768825 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2014 15:58:40.768910
2015 15:58:40.775809 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2016 15:58:40.775892
2017 15:58:40.781990 board_setup: Info: eMMC controller not present; skipping
2018 15:58:40.782073
2019 15:58:40.785234 New NVMe Controller 0x30053aa8 @ 00:1d:00
2020 15:58:40.785342
2021 15:58:40.791816 board_setup: Info: SDHCI controller not present; skipping
2022 15:58:40.791899
2023 15:58:40.798476 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2024 15:58:40.798562
2025 15:58:40.798627 Wipe memory regions:
2026 15:58:40.798688
2027 15:58:40.801712 [0x00000000001000, 0x000000000a0000)
2028 15:58:40.801794
2029 15:58:40.805122 [0x00000000100000, 0x00000030000000)
2030 15:58:40.871047
2031 15:58:40.874587 [0x00000030657430, 0x00000099a2c000)
2032 15:58:41.011581
2033 15:58:41.015083 [0x00000100000000, 0x0000045e800000)
2034 15:58:42.397696
2035 15:58:42.397877 R8152: Initializing
2036 15:58:42.397946
2037 15:58:42.400696 Version 9 (ocp_data = 6010)
2038 15:58:42.405073
2039 15:58:42.405161 R8152: Done initializing
2040 15:58:42.405242
2041 15:58:42.408162 Adding net device
2042 15:58:43.018118
2043 15:58:43.018283 R8152: Initializing
2044 15:58:43.018357
2045 15:58:43.021290 Version 6 (ocp_data = 5c30)
2046 15:58:43.021368
2047 15:58:43.024191 R8152: Done initializing
2048 15:58:43.024275
2049 15:58:43.027975 net_add_device: Attemp to include the same device
2050 15:58:43.031155
2051 15:58:43.037670 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2052 15:58:43.037755
2053 15:58:43.037820
2054 15:58:43.037884
2055 15:58:43.038167 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 15:58:43.138495 hatch: tftpboot 192.168.201.1 11447431/tftp-deploy-r_v47lj7/kernel/bzImage 11447431/tftp-deploy-r_v47lj7/kernel/cmdline 11447431/tftp-deploy-r_v47lj7/ramdisk/ramdisk.cpio.gz
2058 15:58:43.138661 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 15:58:43.138757 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2060 15:58:43.142808 tftpboot 192.168.201.1 11447431/tftp-deploy-r_v47lj7/kernel/bzIploy-r_v47lj7/kernel/cmdline 11447431/tftp-deploy-r_v47lj7/ramdisk/ramdisk.cpio.gz
2061 15:58:43.142893
2062 15:58:43.142958 Waiting for link
2063 15:58:43.343261
2064 15:58:43.343420 done.
2065 15:58:43.343494
2066 15:58:43.343556 MAC: 00:24:32:50:1a:5f
2067 15:58:43.343616
2068 15:58:43.346726 Sending DHCP discover... done.
2069 15:58:43.346808
2070 15:58:43.349909 Waiting for reply... done.
2071 15:58:43.349979
2072 15:58:43.353159 Sending DHCP request... done.
2073 15:58:43.353236
2074 15:58:43.356552 Waiting for reply... done.
2075 15:58:43.359875
2076 15:58:43.359953 My ip is 192.168.201.21
2077 15:58:43.360019
2078 15:58:43.363131 The DHCP server ip is 192.168.201.1
2079 15:58:43.363210
2080 15:58:43.369659 TFTP server IP predefined by user: 192.168.201.1
2081 15:58:43.369748
2082 15:58:43.376256 Bootfile predefined by user: 11447431/tftp-deploy-r_v47lj7/kernel/bzImage
2083 15:58:43.376350
2084 15:58:43.379536 Sending tftp read request... done.
2085 15:58:43.379609
2086 15:58:43.382787 Waiting for the transfer...
2087 15:58:43.382855
2088 15:58:43.915454 00000000 ################################################################
2089 15:58:43.915605
2090 15:58:44.438283 00080000 ################################################################
2091 15:58:44.438459
2092 15:58:44.977013 00100000 ################################################################
2093 15:58:44.977143
2094 15:58:45.524462 00180000 ################################################################
2095 15:58:45.524597
2096 15:58:46.066084 00200000 ################################################################
2097 15:58:46.066254
2098 15:58:46.623089 00280000 ################################################################
2099 15:58:46.623245
2100 15:58:47.172052 00300000 ################################################################
2101 15:58:47.172188
2102 15:58:47.702087 00380000 ################################################################
2103 15:58:47.702224
2104 15:58:48.235835 00400000 ################################################################
2105 15:58:48.235974
2106 15:58:48.767181 00480000 ################################################################
2107 15:58:48.767482
2108 15:58:49.299779 00500000 ################################################################
2109 15:58:49.299931
2110 15:58:49.847283 00580000 ################################################################
2111 15:58:49.847460
2112 15:58:50.394366 00600000 ################################################################
2113 15:58:50.394537
2114 15:58:50.953439 00680000 ################################################################
2115 15:58:50.953611
2116 15:58:51.493721 00700000 ################################################################
2117 15:58:51.493875
2118 15:58:52.040641 00780000 ################################################################
2119 15:58:52.040791
2120 15:58:52.148060 00800000 ############# done.
2121 15:58:52.148208
2122 15:58:52.151312 The bootfile was 8490896 bytes long.
2123 15:58:52.151395
2124 15:58:52.154590 Sending tftp read request... done.
2125 15:58:52.154674
2126 15:58:52.157853 Waiting for the transfer...
2127 15:58:52.157935
2128 15:58:52.692215 00000000 ################################################################
2129 15:58:52.692379
2130 15:58:53.224084 00080000 ################################################################
2131 15:58:53.224252
2132 15:58:53.761291 00100000 ################################################################
2133 15:58:53.761487
2134 15:58:54.296368 00180000 ################################################################
2135 15:58:54.296536
2136 15:58:54.827879 00200000 ################################################################
2137 15:58:54.828016
2138 15:58:55.356841 00280000 ################################################################
2139 15:58:55.357034
2140 15:58:55.890954 00300000 ################################################################
2141 15:58:55.891107
2142 15:58:56.419469 00380000 ################################################################
2143 15:58:56.419673
2144 15:58:56.947613 00400000 ################################################################
2145 15:58:56.947823
2146 15:58:57.489890 00480000 ################################################################
2147 15:58:57.490092
2148 15:58:58.013592 00500000 ############################################################### done.
2149 15:58:58.013768
2150 15:58:58.016665 Sending tftp read request... done.
2151 15:58:58.016776
2152 15:58:58.020001 Waiting for the transfer...
2153 15:58:58.020090
2154 15:58:58.020183 00000000 # done.
2155 15:58:58.020269
2156 15:58:58.030258 Command line loaded dynamically from TFTP file: 11447431/tftp-deploy-r_v47lj7/kernel/cmdline
2157 15:58:58.030380
2158 15:58:58.059620 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11447431/extract-nfsrootfs-muz9b83m,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2159 15:58:58.059737
2160 15:58:58.062744 ec_init(0): CrosEC protocol v3 supported (256, 256)
2161 15:58:58.069406
2162 15:58:58.072212 Shutting down all USB controllers.
2163 15:58:58.072329
2164 15:58:58.072438 Removing current net device
2165 15:58:58.080336
2166 15:58:58.080449 Finalizing coreboot
2167 15:58:58.080545
2168 15:58:58.086429 Exiting depthcharge with code 4 at timestamp: 24658559
2169 15:58:58.086551
2170 15:58:58.086656
2171 15:58:58.086749 Starting kernel ...
2172 15:58:58.086854
2173 15:58:58.087468 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2174 15:58:58.087609 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2175 15:58:58.087729 Setting prompt string to ['Linux version [0-9]']
2176 15:58:58.087831 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2177 15:58:58.087941 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2178 15:58:58.090139
2180 16:03:23.088447 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2182 16:03:23.089547 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2184 16:03:23.090444 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2187 16:03:23.092063 end: 2 depthcharge-action (duration 00:05:00) [common]
2189 16:03:23.093299 Cleaning after the job
2190 16:03:23.093898 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11447431/tftp-deploy-r_v47lj7/ramdisk
2191 16:03:23.098233 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11447431/tftp-deploy-r_v47lj7/kernel
2192 16:03:23.103903 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11447431/tftp-deploy-r_v47lj7/nfsrootfs
2193 16:03:23.197918 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11447431/tftp-deploy-r_v47lj7/modules
2194 16:03:23.198525 start: 5.1 power-off (timeout 00:00:30) [common]
2195 16:03:23.198696 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2196 16:03:23.277022 >> Command sent successfully.
2197 16:03:23.282127 Returned 0 in 0 seconds
2198 16:03:23.383128 end: 5.1 power-off (duration 00:00:00) [common]
2200 16:03:23.384857 start: 5.2 read-feedback (timeout 00:10:00) [common]
2201 16:03:23.386199 Listened to connection for namespace 'common' for up to 1s
2203 16:03:23.387613 Listened to connection for namespace 'common' for up to 1s
2204 16:03:24.386749 Finalising connection for namespace 'common'
2205 16:03:24.387398 Disconnecting from shell: Finalise
2206 16:03:24.387815
2207 16:03:24.488784 end: 5.2 read-feedback (duration 00:00:01) [common]
2208 16:03:24.489305 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11447431
2209 16:03:24.834955 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11447431
2210 16:03:24.835145 JobError: Your job cannot terminate cleanly.