Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
- Kernel Warnings: 0
1 15:57:15.153412 lava-dispatcher, installed at version: 2023.06
2 15:57:15.153619 start: 0 validate
3 15:57:15.153755 Start time: 2023-09-06 15:57:15.153748+00:00 (UTC)
4 15:57:15.153897 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:57:15.154047 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 15:57:15.435857 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:57:15.436039 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1638-gdc4a7f7fb55c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:57:15.701269 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:57:15.701434 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:57:15.966581 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:57:15.966749 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1638-gdc4a7f7fb55c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:57:16.242088 validate duration: 1.09
14 15:57:16.242356 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:57:16.242458 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:57:16.242548 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:57:16.242677 Not decompressing ramdisk as can be used compressed.
18 15:57:16.242767 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 15:57:16.242835 saving as /var/lib/lava/dispatcher/tmp/11447427/tftp-deploy-mccxfu7d/ramdisk/initrd.cpio.gz
20 15:57:16.242901 total size: 5432690 (5 MB)
21 15:57:16.244191 progress 0 % (0 MB)
22 15:57:16.245901 progress 5 % (0 MB)
23 15:57:16.247425 progress 10 % (0 MB)
24 15:57:16.248942 progress 15 % (0 MB)
25 15:57:16.250595 progress 20 % (1 MB)
26 15:57:16.252066 progress 25 % (1 MB)
27 15:57:16.253525 progress 30 % (1 MB)
28 15:57:16.255078 progress 35 % (1 MB)
29 15:57:16.256528 progress 40 % (2 MB)
30 15:57:16.257979 progress 45 % (2 MB)
31 15:57:16.259409 progress 50 % (2 MB)
32 15:57:16.261049 progress 55 % (2 MB)
33 15:57:16.262471 progress 60 % (3 MB)
34 15:57:16.263980 progress 65 % (3 MB)
35 15:57:16.265596 progress 70 % (3 MB)
36 15:57:16.267044 progress 75 % (3 MB)
37 15:57:16.268523 progress 80 % (4 MB)
38 15:57:16.270020 progress 85 % (4 MB)
39 15:57:16.271680 progress 90 % (4 MB)
40 15:57:16.273194 progress 95 % (4 MB)
41 15:57:16.274691 progress 100 % (5 MB)
42 15:57:16.274938 5 MB downloaded in 0.03 s (161.73 MB/s)
43 15:57:16.275154 end: 1.1.1 http-download (duration 00:00:00) [common]
45 15:57:16.275546 end: 1.1 download-retry (duration 00:00:00) [common]
46 15:57:16.275675 start: 1.2 download-retry (timeout 00:10:00) [common]
47 15:57:16.275797 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 15:57:16.275967 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1638-gdc4a7f7fb55c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:57:16.276071 saving as /var/lib/lava/dispatcher/tmp/11447427/tftp-deploy-mccxfu7d/kernel/bzImage
50 15:57:16.276165 total size: 8490896 (8 MB)
51 15:57:16.276266 No compression specified
52 15:57:16.277896 progress 0 % (0 MB)
53 15:57:16.280155 progress 5 % (0 MB)
54 15:57:16.282530 progress 10 % (0 MB)
55 15:57:16.284936 progress 15 % (1 MB)
56 15:57:16.287326 progress 20 % (1 MB)
57 15:57:16.289730 progress 25 % (2 MB)
58 15:57:16.292101 progress 30 % (2 MB)
59 15:57:16.294500 progress 35 % (2 MB)
60 15:57:16.296913 progress 40 % (3 MB)
61 15:57:16.299335 progress 45 % (3 MB)
62 15:57:16.301775 progress 50 % (4 MB)
63 15:57:16.304127 progress 55 % (4 MB)
64 15:57:16.306460 progress 60 % (4 MB)
65 15:57:16.308845 progress 65 % (5 MB)
66 15:57:16.311186 progress 70 % (5 MB)
67 15:57:16.313544 progress 75 % (6 MB)
68 15:57:16.315915 progress 80 % (6 MB)
69 15:57:16.318293 progress 85 % (6 MB)
70 15:57:16.320611 progress 90 % (7 MB)
71 15:57:16.322929 progress 95 % (7 MB)
72 15:57:16.325264 progress 100 % (8 MB)
73 15:57:16.325414 8 MB downloaded in 0.05 s (164.44 MB/s)
74 15:57:16.325612 end: 1.2.1 http-download (duration 00:00:00) [common]
76 15:57:16.325993 end: 1.2 download-retry (duration 00:00:00) [common]
77 15:57:16.326114 start: 1.3 download-retry (timeout 00:10:00) [common]
78 15:57:16.326237 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 15:57:16.326406 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 15:57:16.326505 saving as /var/lib/lava/dispatcher/tmp/11447427/tftp-deploy-mccxfu7d/nfsrootfs/full.rootfs.tar
81 15:57:16.326599 total size: 133380384 (127 MB)
82 15:57:16.326694 Using unxz to decompress xz
83 15:57:16.330511 progress 0 % (0 MB)
84 15:57:16.687024 progress 5 % (6 MB)
85 15:57:17.057470 progress 10 % (12 MB)
86 15:57:17.363512 progress 15 % (19 MB)
87 15:57:17.557445 progress 20 % (25 MB)
88 15:57:17.813084 progress 25 % (31 MB)
89 15:57:18.179373 progress 30 % (38 MB)
90 15:57:18.545077 progress 35 % (44 MB)
91 15:57:18.987278 progress 40 % (50 MB)
92 15:57:19.429282 progress 45 % (57 MB)
93 15:57:19.819791 progress 50 % (63 MB)
94 15:57:20.228240 progress 55 % (69 MB)
95 15:57:20.628227 progress 60 % (76 MB)
96 15:57:21.024634 progress 65 % (82 MB)
97 15:57:21.427891 progress 70 % (89 MB)
98 15:57:21.826685 progress 75 % (95 MB)
99 15:57:22.309933 progress 80 % (101 MB)
100 15:57:22.780538 progress 85 % (108 MB)
101 15:57:23.075789 progress 90 % (114 MB)
102 15:57:23.456482 progress 95 % (120 MB)
103 15:57:23.879766 progress 100 % (127 MB)
104 15:57:23.885592 127 MB downloaded in 7.56 s (16.83 MB/s)
105 15:57:23.885927 end: 1.3.1 http-download (duration 00:00:08) [common]
107 15:57:23.886341 end: 1.3 download-retry (duration 00:00:08) [common]
108 15:57:23.886469 start: 1.4 download-retry (timeout 00:09:52) [common]
109 15:57:23.886594 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 15:57:23.886778 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1638-gdc4a7f7fb55c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:57:23.886881 saving as /var/lib/lava/dispatcher/tmp/11447427/tftp-deploy-mccxfu7d/modules/modules.tar
112 15:57:23.886976 total size: 250824 (0 MB)
113 15:57:23.887074 Using unxz to decompress xz
114 15:57:23.890738 progress 13 % (0 MB)
115 15:57:23.891177 progress 26 % (0 MB)
116 15:57:23.891452 progress 39 % (0 MB)
117 15:57:23.893286 progress 52 % (0 MB)
118 15:57:23.895802 progress 65 % (0 MB)
119 15:57:23.898208 progress 78 % (0 MB)
120 15:57:23.900229 progress 91 % (0 MB)
121 15:57:23.902124 progress 100 % (0 MB)
122 15:57:23.908114 0 MB downloaded in 0.02 s (11.32 MB/s)
123 15:57:23.908452 end: 1.4.1 http-download (duration 00:00:00) [common]
125 15:57:23.908874 end: 1.4 download-retry (duration 00:00:00) [common]
126 15:57:23.909003 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 15:57:23.909134 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 15:57:25.987780 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11447427/extract-nfsrootfs-42oveg24
129 15:57:25.987971 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 15:57:25.988080 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 15:57:25.988258 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f
132 15:57:25.988388 makedir: /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin
133 15:57:25.988490 makedir: /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/tests
134 15:57:25.988588 makedir: /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/results
135 15:57:25.988691 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-add-keys
136 15:57:25.988851 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-add-sources
137 15:57:25.988997 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-background-process-start
138 15:57:25.989165 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-background-process-stop
139 15:57:25.989331 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-common-functions
140 15:57:25.989463 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-echo-ipv4
141 15:57:25.989588 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-install-packages
142 15:57:25.989709 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-installed-packages
143 15:57:25.989828 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-os-build
144 15:57:25.989948 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-probe-channel
145 15:57:25.990074 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-probe-ip
146 15:57:25.990194 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-target-ip
147 15:57:25.990319 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-target-mac
148 15:57:25.990443 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-target-storage
149 15:57:25.990563 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-test-case
150 15:57:25.990686 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-test-event
151 15:57:25.990816 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-test-feedback
152 15:57:25.990971 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-test-raise
153 15:57:25.991126 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-test-reference
154 15:57:25.991280 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-test-runner
155 15:57:25.991439 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-test-set
156 15:57:25.991595 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-test-shell
157 15:57:25.991755 Updating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-install-packages (oe)
158 15:57:26.281031 Updating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/bin/lava-installed-packages (oe)
159 15:57:26.281401 Creating /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/environment
160 15:57:26.281600 LAVA metadata
161 15:57:26.281733 - LAVA_JOB_ID=11447427
162 15:57:26.281861 - LAVA_DISPATCHER_IP=192.168.201.1
163 15:57:26.282055 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 15:57:26.282182 skipped lava-vland-overlay
165 15:57:26.282327 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 15:57:26.282475 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 15:57:26.282595 skipped lava-multinode-overlay
168 15:57:26.282752 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 15:57:26.282906 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 15:57:26.283062 Loading test definitions
171 15:57:26.283263 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 15:57:26.283450 Using /lava-11447427 at stage 0
173 15:57:26.284078 uuid=11447427_1.5.2.3.1 testdef=None
174 15:57:26.284242 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 15:57:26.284437 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 15:57:26.285427 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 15:57:26.285917 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 15:57:26.287274 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 15:57:26.287878 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 15:57:27.594291 runner path: /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/0/tests/0_dmesg test_uuid 11447427_1.5.2.3.1
183 15:57:27.594631 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:01) [common]
185 15:57:27.595230 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
186 15:57:27.595377 Using /lava-11447427 at stage 1
187 15:57:27.596138 uuid=11447427_1.5.2.3.5 testdef=None
188 15:57:27.596337 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 15:57:27.596544 start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
190 15:57:27.597533 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 15:57:27.598072 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
193 15:57:27.599625 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 15:57:27.600221 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
196 15:57:28.921965 runner path: /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/1/tests/1_bootrr test_uuid 11447427_1.5.2.3.5
197 15:57:28.922294 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:01) [common]
199 15:57:28.922823 Creating lava-test-runner.conf files
200 15:57:28.922968 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/0 for stage 0
201 15:57:28.923162 - 0_dmesg
202 15:57:28.923320 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11447427/lava-overlay-1qhlxn3f/lava-11447427/1 for stage 1
203 15:57:28.923526 - 1_bootrr
204 15:57:28.923733 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
205 15:57:28.923939 start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
206 15:57:28.938000 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 15:57:28.938262 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:47) [common]
208 15:57:28.938474 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 15:57:28.938665 end: 1.5.2 lava-overlay (duration 00:00:03) [common]
210 15:57:28.938846 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:47) [common]
211 15:57:29.075647 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 15:57:29.076009 start: 1.5.4 extract-modules (timeout 00:09:47) [common]
213 15:57:29.076131 extracting modules file /var/lib/lava/dispatcher/tmp/11447427/tftp-deploy-mccxfu7d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11447427/extract-nfsrootfs-42oveg24
214 15:57:29.089321 extracting modules file /var/lib/lava/dispatcher/tmp/11447427/tftp-deploy-mccxfu7d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11447427/extract-overlay-ramdisk-j8tpqpo9/ramdisk
215 15:57:29.103185 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 15:57:29.103327 start: 1.5.5 apply-overlay-tftp (timeout 00:09:47) [common]
217 15:57:29.103431 [common] Applying overlay to NFS
218 15:57:29.103508 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11447427/compress-overlay-_4pmisno/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11447427/extract-nfsrootfs-42oveg24
219 15:57:29.112483 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 15:57:29.112638 start: 1.5.6 configure-preseed-file (timeout 00:09:47) [common]
221 15:57:29.112774 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 15:57:29.112869 start: 1.5.7 compress-ramdisk (timeout 00:09:47) [common]
223 15:57:29.112951 Building ramdisk /var/lib/lava/dispatcher/tmp/11447427/extract-overlay-ramdisk-j8tpqpo9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11447427/extract-overlay-ramdisk-j8tpqpo9/ramdisk
224 15:57:29.788712 >> 26159 blocks
225 15:57:30.376823 rename /var/lib/lava/dispatcher/tmp/11447427/extract-overlay-ramdisk-j8tpqpo9/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11447427/tftp-deploy-mccxfu7d/ramdisk/ramdisk.cpio.gz
226 15:57:30.377348 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 15:57:30.377533 start: 1.5.8 prepare-kernel (timeout 00:09:46) [common]
228 15:57:30.377703 start: 1.5.8.1 prepare-fit (timeout 00:09:46) [common]
229 15:57:30.377859 No mkimage arch provided, not using FIT.
230 15:57:30.378013 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 15:57:30.378159 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 15:57:30.378322 end: 1.5 prepare-tftp-overlay (duration 00:00:06) [common]
233 15:57:30.378478 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:46) [common]
234 15:57:30.378613 No LXC device requested
235 15:57:30.378756 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 15:57:30.378914 start: 1.7 deploy-device-env (timeout 00:09:46) [common]
237 15:57:30.379058 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 15:57:30.379178 Checking files for TFTP limit of 4294967296 bytes.
239 15:57:30.379790 end: 1 tftp-deploy (duration 00:00:14) [common]
240 15:57:30.379949 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 15:57:30.380097 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 15:57:30.380292 substitutions:
243 15:57:30.380419 - {DTB}: None
244 15:57:30.380531 - {INITRD}: 11447427/tftp-deploy-mccxfu7d/ramdisk/ramdisk.cpio.gz
245 15:57:30.380646 - {KERNEL}: 11447427/tftp-deploy-mccxfu7d/kernel/bzImage
246 15:57:30.380765 - {LAVA_MAC}: None
247 15:57:30.380874 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11447427/extract-nfsrootfs-42oveg24
248 15:57:30.380987 - {NFS_SERVER_IP}: 192.168.201.1
249 15:57:30.381098 - {PRESEED_CONFIG}: None
250 15:57:30.381204 - {PRESEED_LOCAL}: None
251 15:57:30.381304 - {RAMDISK}: 11447427/tftp-deploy-mccxfu7d/ramdisk/ramdisk.cpio.gz
252 15:57:30.381407 - {ROOT_PART}: None
253 15:57:30.381522 - {ROOT}: None
254 15:57:30.381623 - {SERVER_IP}: 192.168.201.1
255 15:57:30.381723 - {TEE}: None
256 15:57:30.381829 Parsed boot commands:
257 15:57:30.381931 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 15:57:30.382206 Parsed boot commands: tftpboot 192.168.201.1 11447427/tftp-deploy-mccxfu7d/kernel/bzImage 11447427/tftp-deploy-mccxfu7d/kernel/cmdline 11447427/tftp-deploy-mccxfu7d/ramdisk/ramdisk.cpio.gz
259 15:57:30.382362 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 15:57:30.382511 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 15:57:30.382675 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 15:57:30.382826 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 15:57:30.382957 Not connected, no need to disconnect.
264 15:57:30.383095 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 15:57:30.383250 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 15:57:30.383373 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-1'
267 15:57:30.386864 Setting prompt string to ['lava-test: # ']
268 15:57:30.387297 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 15:57:30.387474 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 15:57:30.387636 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 15:57:30.387795 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 15:57:30.388126 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=reboot'
273 15:57:35.524155 >> Command sent successfully.
274 15:57:35.526592 Returned 0 in 5 seconds
275 15:57:35.627001 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 15:57:35.627488 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 15:57:35.627653 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 15:57:35.627801 Setting prompt string to 'Starting depthcharge on Voema...'
280 15:57:35.627926 Changing prompt to 'Starting depthcharge on Voema...'
281 15:57:35.628052 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 15:57:35.628457 [Enter `^Ec?' for help]
283 15:57:37.261920
284 15:57:37.262068
285 15:57:37.271509 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 15:57:37.274886 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
287 15:57:37.281624 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 15:57:37.285060 CPU: AES supported, TXT NOT supported, VT supported
289 15:57:37.291194 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 15:57:37.297886 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 15:57:37.301412 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 15:57:37.304847 VBOOT: Loading verstage.
293 15:57:37.308147 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 15:57:37.314658 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 15:57:37.318122 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 15:57:37.328445 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 15:57:37.335348 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 15:57:37.335477
299 15:57:37.335580
300 15:57:37.348714 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 15:57:37.362080 Probing TPM: . done!
302 15:57:37.365423 TPM ready after 0 ms
303 15:57:37.368823 Connected to device vid:did:rid of 1ae0:0028:00
304 15:57:37.379911 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
305 15:57:37.386997 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 15:57:37.389989 Initialized TPM device CR50 revision 0
307 15:57:37.534754 tlcl_send_startup: Startup return code is 0
308 15:57:37.534890 TPM: setup succeeded
309 15:57:37.550303 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 15:57:37.564428 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 15:57:37.577278 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 15:57:37.587525 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 15:57:37.591084 Chrome EC: UHEPI supported
314 15:57:37.594516 Phase 1
315 15:57:37.597864 FMAP: area GBB found @ 1805000 (458752 bytes)
316 15:57:37.604321 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 15:57:37.614280 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 15:57:37.620947 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 15:57:37.627875 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 15:57:37.630649 Recovery requested (1009000e)
321 15:57:37.634578 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 15:57:37.645873 tlcl_extend: response is 0
323 15:57:37.652267 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 15:57:37.662300 tlcl_extend: response is 0
325 15:57:37.668635 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 15:57:37.675769 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 15:57:37.682213 BS: verstage times (exec / console): total (unknown) / 142 ms
328 15:57:37.682299
329 15:57:37.682367
330 15:57:37.696022 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 15:57:37.699231 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 15:57:37.706426 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 15:57:37.709625 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 15:57:37.713135 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 15:57:37.719674 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 15:57:37.723025 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
337 15:57:37.726437 TCO_STS: 0000 0000
338 15:57:37.729857 GEN_PMCON: d0015038 00002200
339 15:57:37.729998 GBLRST_CAUSE: 00000000 00000000
340 15:57:37.733168 HPR_CAUSE0: 00000000
341 15:57:37.736136 prev_sleep_state 5
342 15:57:37.739575 Boot Count incremented to 25591
343 15:57:37.746400 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 15:57:37.752740 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 15:57:37.759822 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 15:57:37.766430 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 15:57:37.769809 Chrome EC: UHEPI supported
348 15:57:37.776234 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 15:57:37.789157 Probing TPM: done!
350 15:57:37.796060 Connected to device vid:did:rid of 1ae0:0028:00
351 15:57:37.806010 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
352 15:57:37.809646 Initialized TPM device CR50 revision 0
353 15:57:37.824039 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 15:57:37.830766 MRC: Hash idx 0x100b comparison successful.
355 15:57:37.834072 MRC cache found, size faa8
356 15:57:37.834184 bootmode is set to: 2
357 15:57:37.837379 SPD index = 0
358 15:57:37.844128 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 15:57:37.847147 SPD: module type is LPDDR4X
360 15:57:37.850632 SPD: module part number is MT53E512M64D4NW-046
361 15:57:37.857488 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
362 15:57:37.860396 SPD: device width 16 bits, bus width 16 bits
363 15:57:37.867205 SPD: module size is 1024 MB (per channel)
364 15:57:38.298247 CBMEM:
365 15:57:38.301593 IMD: root @ 0x76fff000 254 entries.
366 15:57:38.305042 IMD: root @ 0x76ffec00 62 entries.
367 15:57:38.308507 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 15:57:38.314954 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 15:57:38.318361 External stage cache:
370 15:57:38.321808 IMD: root @ 0x7b3ff000 254 entries.
371 15:57:38.325135 IMD: root @ 0x7b3fec00 62 entries.
372 15:57:38.340152 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 15:57:38.347006 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 15:57:38.353646 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 15:57:38.367204 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 15:57:38.374296 cse_lite: Skip switching to RW in the recovery path
377 15:57:38.374427 8 DIMMs found
378 15:57:38.374533 SMM Memory Map
379 15:57:38.377430 SMRAM : 0x7b000000 0x800000
380 15:57:38.384240 Subregion 0: 0x7b000000 0x200000
381 15:57:38.387628 Subregion 1: 0x7b200000 0x200000
382 15:57:38.390683 Subregion 2: 0x7b400000 0x400000
383 15:57:38.390777 top_of_ram = 0x77000000
384 15:57:38.397329 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 15:57:38.404142 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 15:57:38.407193 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 15:57:38.414156 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 15:57:38.420373 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 15:57:38.426832 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 15:57:38.437357 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 15:57:38.443692 Processing 211 relocs. Offset value of 0x74c0b000
392 15:57:38.450232 BS: romstage times (exec / console): total (unknown) / 277 ms
393 15:57:38.456172
394 15:57:38.456271
395 15:57:38.466395 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 15:57:38.469637 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 15:57:38.480240 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 15:57:38.486370 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 15:57:38.493264 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 15:57:38.499902 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 15:57:38.546429 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 15:57:38.552686 Processing 5008 relocs. Offset value of 0x75d98000
403 15:57:38.556183 BS: postcar times (exec / console): total (unknown) / 59 ms
404 15:57:38.559599
405 15:57:38.559685
406 15:57:38.569383 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 15:57:38.569470 Normal boot
408 15:57:38.572832 FW_CONFIG value is 0x804c02
409 15:57:38.576197 PCI: 00:07.0 disabled by fw_config
410 15:57:38.579514 PCI: 00:07.1 disabled by fw_config
411 15:57:38.582745 PCI: 00:0d.2 disabled by fw_config
412 15:57:38.585891 PCI: 00:1c.7 disabled by fw_config
413 15:57:38.592507 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 15:57:38.599279 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 15:57:38.602503 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 15:57:38.606168 GENERIC: 0.0 disabled by fw_config
417 15:57:38.612760 GENERIC: 1.0 disabled by fw_config
418 15:57:38.616162 fw_config match found: DB_USB=USB3_ACTIVE
419 15:57:38.619221 fw_config match found: DB_USB=USB3_ACTIVE
420 15:57:38.622781 fw_config match found: DB_USB=USB3_ACTIVE
421 15:57:38.629225 fw_config match found: DB_USB=USB3_ACTIVE
422 15:57:38.632622 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 15:57:38.639034 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 15:57:38.649306 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 15:57:38.655762 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 15:57:38.659381 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 15:57:38.665892 microcode: Update skipped, already up-to-date
428 15:57:38.672228 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 15:57:38.699815 Detected 4 core, 8 thread CPU.
430 15:57:38.703175 Setting up SMI for CPU
431 15:57:38.706440 IED base = 0x7b400000
432 15:57:38.706555 IED size = 0x00400000
433 15:57:38.709815 Will perform SMM setup.
434 15:57:38.716326 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
435 15:57:38.723109 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 15:57:38.729468 Processing 16 relocs. Offset value of 0x00030000
437 15:57:38.732926 Attempting to start 7 APs
438 15:57:38.736297 Waiting for 10ms after sending INIT.
439 15:57:38.751564 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
440 15:57:38.751688 done.
441 15:57:38.755105 AP: slot 7 apic_id 6.
442 15:57:38.758548 AP: slot 6 apic_id 2.
443 15:57:38.762064 Waiting for 2nd SIPI to complete...done.
444 15:57:38.765422 AP: slot 3 apic_id 7.
445 15:57:38.765502 AP: slot 2 apic_id 3.
446 15:57:38.768662 AP: slot 4 apic_id 5.
447 15:57:38.771633 AP: slot 5 apic_id 4.
448 15:57:38.778417 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 15:57:38.785048 Processing 13 relocs. Offset value of 0x00038000
450 15:57:38.785163 Unable to locate Global NVS
451 15:57:38.795201 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 15:57:38.798139 Installing permanent SMM handler to 0x7b000000
453 15:57:38.808262 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 15:57:38.811448 Processing 794 relocs. Offset value of 0x7b010000
455 15:57:38.821363 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 15:57:38.824763 Processing 13 relocs. Offset value of 0x7b008000
457 15:57:38.831333 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 15:57:38.838294 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 15:57:38.841641 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 15:57:38.848480 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 15:57:38.854797 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 15:57:38.861207 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 15:57:38.867792 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 15:57:38.867900 Unable to locate Global NVS
465 15:57:38.878167 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 15:57:38.881458 Clearing SMI status registers
467 15:57:38.881571 SMI_STS: PM1
468 15:57:38.884861 PM1_STS: PWRBTN
469 15:57:38.891219 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 15:57:38.894402 In relocation handler: CPU 0
471 15:57:38.897943 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 15:57:38.904640 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 15:57:38.904780 Relocation complete.
474 15:57:38.914314 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 15:57:38.914428 In relocation handler: CPU 1
476 15:57:38.921352 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 15:57:38.921440 Relocation complete.
478 15:57:38.931284 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
479 15:57:38.931373 In relocation handler: CPU 7
480 15:57:38.938029 New SMBASE=0x7affe400 IEDBASE=0x7b400000
481 15:57:38.941974 Writing SMRR. base = 0x7b000006, mask=0xff800c00
482 15:57:38.942076 Relocation complete.
483 15:57:38.949384 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
484 15:57:38.952658 In relocation handler: CPU 3
485 15:57:38.959565 New SMBASE=0x7afff400 IEDBASE=0x7b400000
486 15:57:38.959709 Relocation complete.
487 15:57:38.965969 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
488 15:57:38.969237 In relocation handler: CPU 5
489 15:57:38.972615 New SMBASE=0x7affec00 IEDBASE=0x7b400000
490 15:57:38.979641 Writing SMRR. base = 0x7b000006, mask=0xff800c00
491 15:57:38.982955 Relocation complete.
492 15:57:38.989391 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
493 15:57:38.992914 In relocation handler: CPU 4
494 15:57:38.996194 New SMBASE=0x7afff000 IEDBASE=0x7b400000
495 15:57:38.999367 Relocation complete.
496 15:57:39.006210 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
497 15:57:39.009493 In relocation handler: CPU 2
498 15:57:39.012885 New SMBASE=0x7afff800 IEDBASE=0x7b400000
499 15:57:39.012973 Relocation complete.
500 15:57:39.022943 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
501 15:57:39.023031 In relocation handler: CPU 6
502 15:57:39.029754 New SMBASE=0x7affe800 IEDBASE=0x7b400000
503 15:57:39.032899 Writing SMRR. base = 0x7b000006, mask=0xff800c00
504 15:57:39.036120 Relocation complete.
505 15:57:39.036206 Initializing CPU #0
506 15:57:39.039960 CPU: vendor Intel device 806c1
507 15:57:39.046262 CPU: family 06, model 8c, stepping 01
508 15:57:39.046348 Clearing out pending MCEs
509 15:57:39.049668 Setting up local APIC...
510 15:57:39.053001 apic_id: 0x00 done.
511 15:57:39.056204 Turbo is available but hidden
512 15:57:39.059631 Turbo is available and visible
513 15:57:39.062674 microcode: Update skipped, already up-to-date
514 15:57:39.066050 CPU #0 initialized
515 15:57:39.066129 Initializing CPU #1
516 15:57:39.069501 Initializing CPU #7
517 15:57:39.072878 Initializing CPU #3
518 15:57:39.072957 Initializing CPU #5
519 15:57:39.076324 Initializing CPU #4
520 15:57:39.079402 CPU: vendor Intel device 806c1
521 15:57:39.082885 CPU: family 06, model 8c, stepping 01
522 15:57:39.086231 CPU: vendor Intel device 806c1
523 15:57:39.089597 CPU: family 06, model 8c, stepping 01
524 15:57:39.092938 Clearing out pending MCEs
525 15:57:39.095861 Clearing out pending MCEs
526 15:57:39.095938 Setting up local APIC...
527 15:57:39.099395 CPU: vendor Intel device 806c1
528 15:57:39.102720 CPU: family 06, model 8c, stepping 01
529 15:57:39.105983 CPU: vendor Intel device 806c1
530 15:57:39.112843 CPU: family 06, model 8c, stepping 01
531 15:57:39.112929 Clearing out pending MCEs
532 15:57:39.116105 Setting up local APIC...
533 15:57:39.119370 Clearing out pending MCEs
534 15:57:39.122673 Setting up local APIC...
535 15:57:39.122775 apic_id: 0x05 done.
536 15:57:39.126083 apic_id: 0x04 done.
537 15:57:39.129134 microcode: Update skipped, already up-to-date
538 15:57:39.135782 microcode: Update skipped, already up-to-date
539 15:57:39.138940 CPU: vendor Intel device 806c1
540 15:57:39.142328 CPU: family 06, model 8c, stepping 01
541 15:57:39.145791 Setting up local APIC...
542 15:57:39.145883 apic_id: 0x06 done.
543 15:57:39.149216 apic_id: 0x07 done.
544 15:57:39.152492 microcode: Update skipped, already up-to-date
545 15:57:39.158936 microcode: Update skipped, already up-to-date
546 15:57:39.159025 CPU #7 initialized
547 15:57:39.162321 CPU #3 initialized
548 15:57:39.162439 Initializing CPU #2
549 15:57:39.165998 Initializing CPU #6
550 15:57:39.168983 CPU: vendor Intel device 806c1
551 15:57:39.172319 CPU: family 06, model 8c, stepping 01
552 15:57:39.175781 CPU #5 initialized
553 15:57:39.175870 CPU #4 initialized
554 15:57:39.179182 CPU: vendor Intel device 806c1
555 15:57:39.182605 CPU: family 06, model 8c, stepping 01
556 15:57:39.185664 Clearing out pending MCEs
557 15:57:39.188943 Clearing out pending MCEs
558 15:57:39.192222 Setting up local APIC...
559 15:57:39.195630 Clearing out pending MCEs
560 15:57:39.195710 Setting up local APIC...
561 15:57:39.199195 apic_id: 0x03 done.
562 15:57:39.202191 apic_id: 0x02 done.
563 15:57:39.202280 Setting up local APIC...
564 15:57:39.209215 microcode: Update skipped, already up-to-date
565 15:57:39.212170 microcode: Update skipped, already up-to-date
566 15:57:39.215617 CPU #6 initialized
567 15:57:39.215755 apic_id: 0x01 done.
568 15:57:39.218997 CPU #2 initialized
569 15:57:39.222335 microcode: Update skipped, already up-to-date
570 15:57:39.225860 CPU #1 initialized
571 15:57:39.229076 bsp_do_flight_plan done after 464 msecs.
572 15:57:39.232275 CPU: frequency set to 4000 MHz
573 15:57:39.235681 Enabling SMIs.
574 15:57:39.242147 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
575 15:57:39.256699 SATAXPCIE1 indicates PCIe NVMe is present
576 15:57:39.259949 Probing TPM: done!
577 15:57:39.264007 Connected to device vid:did:rid of 1ae0:0028:00
578 15:57:39.274146 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
579 15:57:39.277499 Initialized TPM device CR50 revision 0
580 15:57:39.280924 Enabling S0i3.4
581 15:57:39.287281 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 15:57:39.290658 Found a VBT of 8704 bytes after decompression
583 15:57:39.297275 cse_lite: CSE RO boot. HybridStorageMode disabled
584 15:57:39.303794 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 15:57:39.379981 FSPS returned 0
586 15:57:39.383504 Executing Phase 1 of FspMultiPhaseSiInit
587 15:57:39.393313 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 15:57:39.396634 port C0 DISC req: usage 1 usb3 1 usb2 5
589 15:57:39.399975 Raw Buffer output 0 00000511
590 15:57:39.403224 Raw Buffer output 1 00000000
591 15:57:39.407102 pmc_send_ipc_cmd succeeded
592 15:57:39.413904 port C1 DISC req: usage 1 usb3 2 usb2 3
593 15:57:39.413986 Raw Buffer output 0 00000321
594 15:57:39.417093 Raw Buffer output 1 00000000
595 15:57:39.420972 pmc_send_ipc_cmd succeeded
596 15:57:39.426319 Detected 4 core, 8 thread CPU.
597 15:57:39.429580 Detected 4 core, 8 thread CPU.
598 15:57:40.613207 Display FSP Version Info HOB
599 15:57:40.613663 Reference Code - CPU = a.0.4c.31
600 15:57:40.613806 uCode Version = 0.0.0.86
601 15:57:40.613912 TXT ACM version = ff.ff.ff.ffff
602 15:57:40.614028 Reference Code - ME = a.0.4c.31
603 15:57:40.614136 MEBx version = 0.0.0.0
604 15:57:40.614237 ME Firmware Version = Consumer SKU
605 15:57:40.614332 Reference Code - PCH = a.0.4c.31
606 15:57:40.614423 PCH-CRID Status = Disabled
607 15:57:40.614513 PCH-CRID Original Value = ff.ff.ff.ffff
608 15:57:40.614601 PCH-CRID New Value = ff.ff.ff.ffff
609 15:57:40.614693 OPROM - RST - RAID = ff.ff.ff.ffff
610 15:57:40.614783 PCH Hsio Version = 4.0.0.0
611 15:57:40.614875 Reference Code - SA - System Agent = a.0.4c.31
612 15:57:40.614966 Reference Code - MRC = 2.0.0.1
613 15:57:40.615064 SA - PCIe Version = a.0.4c.31
614 15:57:40.615156 SA-CRID Status = Disabled
615 15:57:40.615244 SA-CRID Original Value = 0.0.0.1
616 15:57:40.615333 SA-CRID New Value = 0.0.0.1
617 15:57:40.615421 OPROM - VBIOS = ff.ff.ff.ffff
618 15:57:40.615509 IO Manageability Engine FW Version = 11.1.4.0
619 15:57:40.615597 PHY Build Version = 0.0.0.e0
620 15:57:40.615685 Thunderbolt(TM) FW Version = 0.0.0.0
621 15:57:40.615773 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
622 15:57:40.615859 ITSS IRQ Polarities Before:
623 15:57:40.615944 IPC0: 0xffffffff
624 15:57:40.616030 IPC1: 0xffffffff
625 15:57:40.616115 IPC2: 0xffffffff
626 15:57:40.616217 IPC3: 0xffffffff
627 15:57:40.616306 ITSS IRQ Polarities After:
628 15:57:40.616392 IPC0: 0xffffffff
629 15:57:40.616477 IPC1: 0xffffffff
630 15:57:40.616561 IPC2: 0xffffffff
631 15:57:40.616646 IPC3: 0xffffffff
632 15:57:40.616732 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 15:57:40.616810 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 15:57:40.616870 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 15:57:40.616927 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 15:57:40.617007 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
637 15:57:40.617066 Enumerating buses...
638 15:57:40.617124 Show all devs... Before device enumeration.
639 15:57:40.617189 Root Device: enabled 1
640 15:57:40.617255 DOMAIN: 0000: enabled 1
641 15:57:40.617320 CPU_CLUSTER: 0: enabled 1
642 15:57:40.617375 PCI: 00:00.0: enabled 1
643 15:57:40.617429 PCI: 00:02.0: enabled 1
644 15:57:40.617482 PCI: 00:04.0: enabled 1
645 15:57:40.617535 PCI: 00:05.0: enabled 1
646 15:57:40.617589 PCI: 00:06.0: enabled 0
647 15:57:40.617641 PCI: 00:07.0: enabled 0
648 15:57:40.617694 PCI: 00:07.1: enabled 0
649 15:57:40.617747 PCI: 00:07.2: enabled 0
650 15:57:40.617799 PCI: 00:07.3: enabled 0
651 15:57:40.617874 PCI: 00:08.0: enabled 1
652 15:57:40.617932 PCI: 00:09.0: enabled 0
653 15:57:40.617989 PCI: 00:0a.0: enabled 0
654 15:57:40.618045 PCI: 00:0d.0: enabled 1
655 15:57:40.618097 PCI: 00:0d.1: enabled 0
656 15:57:40.618150 PCI: 00:0d.2: enabled 0
657 15:57:40.618202 PCI: 00:0d.3: enabled 0
658 15:57:40.618255 PCI: 00:0e.0: enabled 0
659 15:57:40.618307 PCI: 00:10.2: enabled 1
660 15:57:40.618359 PCI: 00:10.6: enabled 0
661 15:57:40.618411 PCI: 00:10.7: enabled 0
662 15:57:40.618464 PCI: 00:12.0: enabled 0
663 15:57:40.618517 PCI: 00:12.6: enabled 0
664 15:57:40.618570 PCI: 00:13.0: enabled 0
665 15:57:40.618622 PCI: 00:14.0: enabled 1
666 15:57:40.618675 PCI: 00:14.1: enabled 0
667 15:57:40.618728 PCI: 00:14.2: enabled 1
668 15:57:40.618780 PCI: 00:14.3: enabled 1
669 15:57:40.618833 PCI: 00:15.0: enabled 1
670 15:57:40.618886 PCI: 00:15.1: enabled 1
671 15:57:40.618938 PCI: 00:15.2: enabled 1
672 15:57:40.618990 PCI: 00:15.3: enabled 1
673 15:57:40.619042 PCI: 00:16.0: enabled 1
674 15:57:40.619094 PCI: 00:16.1: enabled 0
675 15:57:40.619145 PCI: 00:16.2: enabled 0
676 15:57:40.619197 PCI: 00:16.3: enabled 0
677 15:57:40.619249 PCI: 00:16.4: enabled 0
678 15:57:40.619301 PCI: 00:16.5: enabled 0
679 15:57:40.619355 PCI: 00:17.0: enabled 1
680 15:57:40.619407 PCI: 00:19.0: enabled 0
681 15:57:40.619477 PCI: 00:19.1: enabled 1
682 15:57:40.619601 PCI: 00:19.2: enabled 0
683 15:57:40.619685 PCI: 00:1c.0: enabled 1
684 15:57:40.619768 PCI: 00:1c.1: enabled 0
685 15:57:40.619851 PCI: 00:1c.2: enabled 0
686 15:57:40.619935 PCI: 00:1c.3: enabled 0
687 15:57:40.620018 PCI: 00:1c.4: enabled 0
688 15:57:40.620101 PCI: 00:1c.5: enabled 0
689 15:57:40.620184 PCI: 00:1c.6: enabled 1
690 15:57:40.620267 PCI: 00:1c.7: enabled 0
691 15:57:40.620350 PCI: 00:1d.0: enabled 1
692 15:57:40.620433 PCI: 00:1d.1: enabled 0
693 15:57:40.620516 PCI: 00:1d.2: enabled 1
694 15:57:40.620599 PCI: 00:1d.3: enabled 0
695 15:57:40.620682 PCI: 00:1e.0: enabled 1
696 15:57:40.620787 PCI: 00:1e.1: enabled 0
697 15:57:40.620857 PCI: 00:1e.2: enabled 1
698 15:57:40.620911 PCI: 00:1e.3: enabled 1
699 15:57:40.620964 PCI: 00:1f.0: enabled 1
700 15:57:40.621017 PCI: 00:1f.1: enabled 0
701 15:57:40.621069 PCI: 00:1f.2: enabled 1
702 15:57:40.621123 PCI: 00:1f.3: enabled 1
703 15:57:40.621174 PCI: 00:1f.4: enabled 0
704 15:57:40.621227 PCI: 00:1f.5: enabled 1
705 15:57:40.621280 PCI: 00:1f.6: enabled 0
706 15:57:40.621332 PCI: 00:1f.7: enabled 0
707 15:57:40.621384 APIC: 00: enabled 1
708 15:57:40.621437 GENERIC: 0.0: enabled 1
709 15:57:40.621489 GENERIC: 0.0: enabled 1
710 15:57:40.621542 GENERIC: 1.0: enabled 1
711 15:57:40.621594 GENERIC: 0.0: enabled 1
712 15:57:40.621646 GENERIC: 1.0: enabled 1
713 15:57:40.621699 USB0 port 0: enabled 1
714 15:57:40.621766 GENERIC: 0.0: enabled 1
715 15:57:40.621822 USB0 port 0: enabled 1
716 15:57:40.621876 GENERIC: 0.0: enabled 1
717 15:57:40.621934 I2C: 00:1a: enabled 1
718 15:57:40.622048 I2C: 00:31: enabled 1
719 15:57:40.622106 I2C: 00:32: enabled 1
720 15:57:40.622161 I2C: 00:10: enabled 1
721 15:57:40.622217 I2C: 00:15: enabled 1
722 15:57:40.622276 GENERIC: 0.0: enabled 0
723 15:57:40.622331 GENERIC: 1.0: enabled 0
724 15:57:40.622387 GENERIC: 0.0: enabled 1
725 15:57:40.622442 SPI: 00: enabled 1
726 15:57:40.622506 SPI: 00: enabled 1
727 15:57:40.622568 PNP: 0c09.0: enabled 1
728 15:57:40.622624 GENERIC: 0.0: enabled 1
729 15:57:40.622685 USB3 port 0: enabled 1
730 15:57:40.622741 USB3 port 1: enabled 1
731 15:57:40.622825 USB3 port 2: enabled 0
732 15:57:40.622924 USB3 port 3: enabled 0
733 15:57:40.623021 USB2 port 0: enabled 0
734 15:57:40.623080 USB2 port 1: enabled 1
735 15:57:40.623134 USB2 port 2: enabled 1
736 15:57:40.623190 USB2 port 3: enabled 0
737 15:57:40.623312 USB2 port 4: enabled 1
738 15:57:40.623370 USB2 port 5: enabled 0
739 15:57:40.623425 USB2 port 6: enabled 0
740 15:57:40.623523 USB2 port 7: enabled 0
741 15:57:40.623612 USB2 port 8: enabled 0
742 15:57:40.623896 USB2 port 9: enabled 0
743 15:57:40.623987 USB3 port 0: enabled 0
744 15:57:40.624075 USB3 port 1: enabled 1
745 15:57:40.624162 USB3 port 2: enabled 0
746 15:57:40.624247 USB3 port 3: enabled 0
747 15:57:40.624334 GENERIC: 0.0: enabled 1
748 15:57:40.624421 GENERIC: 1.0: enabled 1
749 15:57:40.624509 APIC: 01: enabled 1
750 15:57:40.624594 APIC: 03: enabled 1
751 15:57:40.624691 APIC: 07: enabled 1
752 15:57:40.624814 APIC: 05: enabled 1
753 15:57:40.624871 APIC: 04: enabled 1
754 15:57:40.624935 APIC: 02: enabled 1
755 15:57:40.624995 APIC: 06: enabled 1
756 15:57:40.625050 Compare with tree...
757 15:57:40.625107 Root Device: enabled 1
758 15:57:40.625162 DOMAIN: 0000: enabled 1
759 15:57:40.625217 PCI: 00:00.0: enabled 1
760 15:57:40.625270 PCI: 00:02.0: enabled 1
761 15:57:40.625325 PCI: 00:04.0: enabled 1
762 15:57:40.625381 GENERIC: 0.0: enabled 1
763 15:57:40.625436 PCI: 00:05.0: enabled 1
764 15:57:40.625491 PCI: 00:06.0: enabled 0
765 15:57:40.625548 PCI: 00:07.0: enabled 0
766 15:57:40.625602 GENERIC: 0.0: enabled 1
767 15:57:40.625655 PCI: 00:07.1: enabled 0
768 15:57:40.625710 GENERIC: 1.0: enabled 1
769 15:57:40.625765 PCI: 00:07.2: enabled 0
770 15:57:40.625818 GENERIC: 0.0: enabled 1
771 15:57:40.625873 PCI: 00:07.3: enabled 0
772 15:57:40.625927 GENERIC: 1.0: enabled 1
773 15:57:40.625985 PCI: 00:08.0: enabled 1
774 15:57:40.626038 PCI: 00:09.0: enabled 0
775 15:57:40.626094 PCI: 00:0a.0: enabled 0
776 15:57:40.626149 PCI: 00:0d.0: enabled 1
777 15:57:40.626204 USB0 port 0: enabled 1
778 15:57:40.626276 USB3 port 0: enabled 1
779 15:57:40.626404 USB3 port 1: enabled 1
780 15:57:40.626482 USB3 port 2: enabled 0
781 15:57:40.626541 USB3 port 3: enabled 0
782 15:57:40.626595 PCI: 00:0d.1: enabled 0
783 15:57:40.626664 PCI: 00:0d.2: enabled 0
784 15:57:40.626729 GENERIC: 0.0: enabled 1
785 15:57:40.626807 PCI: 00:0d.3: enabled 0
786 15:57:40.626863 PCI: 00:0e.0: enabled 0
787 15:57:40.626919 PCI: 00:10.2: enabled 1
788 15:57:40.626974 PCI: 00:10.6: enabled 0
789 15:57:40.627027 PCI: 00:10.7: enabled 0
790 15:57:40.627080 PCI: 00:12.0: enabled 0
791 15:57:40.627133 PCI: 00:12.6: enabled 0
792 15:57:40.627186 PCI: 00:13.0: enabled 0
793 15:57:40.627239 PCI: 00:14.0: enabled 1
794 15:57:40.627292 USB0 port 0: enabled 1
795 15:57:40.627345 USB2 port 0: enabled 0
796 15:57:40.627401 USB2 port 1: enabled 1
797 15:57:40.627456 USB2 port 2: enabled 1
798 15:57:40.627508 USB2 port 3: enabled 0
799 15:57:40.627561 USB2 port 4: enabled 1
800 15:57:40.627613 USB2 port 5: enabled 0
801 15:57:40.627665 USB2 port 6: enabled 0
802 15:57:40.627717 USB2 port 7: enabled 0
803 15:57:40.627771 USB2 port 8: enabled 0
804 15:57:40.627823 USB2 port 9: enabled 0
805 15:57:40.627875 USB3 port 0: enabled 0
806 15:57:40.627927 USB3 port 1: enabled 1
807 15:57:40.627980 USB3 port 2: enabled 0
808 15:57:40.628033 USB3 port 3: enabled 0
809 15:57:40.628085 PCI: 00:14.1: enabled 0
810 15:57:40.628137 PCI: 00:14.2: enabled 1
811 15:57:40.628190 PCI: 00:14.3: enabled 1
812 15:57:40.628242 GENERIC: 0.0: enabled 1
813 15:57:40.628294 PCI: 00:15.0: enabled 1
814 15:57:40.628369 I2C: 00:1a: enabled 1
815 15:57:40.628428 I2C: 00:31: enabled 1
816 15:57:40.628483 I2C: 00:32: enabled 1
817 15:57:40.628536 PCI: 00:15.1: enabled 1
818 15:57:40.628589 I2C: 00:10: enabled 1
819 15:57:40.628654 PCI: 00:15.2: enabled 1
820 15:57:40.628750 PCI: 00:15.3: enabled 1
821 15:57:40.628912 PCI: 00:16.0: enabled 1
822 15:57:40.628998 PCI: 00:16.1: enabled 0
823 15:57:40.629055 PCI: 00:16.2: enabled 0
824 15:57:40.629108 PCI: 00:16.3: enabled 0
825 15:57:40.629161 PCI: 00:16.4: enabled 0
826 15:57:40.629214 PCI: 00:16.5: enabled 0
827 15:57:40.629267 PCI: 00:17.0: enabled 1
828 15:57:40.629320 PCI: 00:19.0: enabled 0
829 15:57:40.629372 PCI: 00:19.1: enabled 1
830 15:57:40.629424 I2C: 00:15: enabled 1
831 15:57:40.629477 PCI: 00:19.2: enabled 0
832 15:57:40.629529 PCI: 00:1d.0: enabled 1
833 15:57:40.629582 GENERIC: 0.0: enabled 1
834 15:57:40.629634 PCI: 00:1e.0: enabled 1
835 15:57:40.629690 PCI: 00:1e.1: enabled 0
836 15:57:40.629745 PCI: 00:1e.2: enabled 1
837 15:57:40.629858 SPI: 00: enabled 1
838 15:57:40.629932 PCI: 00:1e.3: enabled 1
839 15:57:40.629995 SPI: 00: enabled 1
840 15:57:40.630052 PCI: 00:1f.0: enabled 1
841 15:57:40.630108 PNP: 0c09.0: enabled 1
842 15:57:40.630164 PCI: 00:1f.1: enabled 0
843 15:57:40.630219 PCI: 00:1f.2: enabled 1
844 15:57:40.630272 GENERIC: 0.0: enabled 1
845 15:57:40.630325 GENERIC: 0.0: enabled 1
846 15:57:40.630442 GENERIC: 1.0: enabled 1
847 15:57:40.630506 PCI: 00:1f.3: enabled 1
848 15:57:40.630563 PCI: 00:1f.4: enabled 0
849 15:57:40.630619 PCI: 00:1f.5: enabled 1
850 15:57:40.630672 PCI: 00:1f.6: enabled 0
851 15:57:40.630725 PCI: 00:1f.7: enabled 0
852 15:57:40.630777 CPU_CLUSTER: 0: enabled 1
853 15:57:40.630829 APIC: 00: enabled 1
854 15:57:40.630882 APIC: 01: enabled 1
855 15:57:40.630935 APIC: 03: enabled 1
856 15:57:40.630990 APIC: 07: enabled 1
857 15:57:40.631055 APIC: 05: enabled 1
858 15:57:40.631114 APIC: 04: enabled 1
859 15:57:40.631167 APIC: 02: enabled 1
860 15:57:40.631220 APIC: 06: enabled 1
861 15:57:40.631282 Root Device scanning...
862 15:57:40.631344 scan_static_bus for Root Device
863 15:57:40.631407 DOMAIN: 0000 enabled
864 15:57:40.631464 CPU_CLUSTER: 0 enabled
865 15:57:40.631518 DOMAIN: 0000 scanning...
866 15:57:40.631574 PCI: pci_scan_bus for bus 00
867 15:57:40.631630 PCI: 00:00.0 [8086/0000] ops
868 15:57:40.631686 PCI: 00:00.0 [8086/9a12] enabled
869 15:57:40.631741 PCI: 00:02.0 [8086/0000] bus ops
870 15:57:40.631797 PCI: 00:02.0 [8086/9a40] enabled
871 15:57:40.631852 PCI: 00:04.0 [8086/0000] bus ops
872 15:57:40.631908 PCI: 00:04.0 [8086/9a03] enabled
873 15:57:40.631962 PCI: 00:05.0 [8086/9a19] enabled
874 15:57:40.632019 PCI: 00:07.0 [0000/0000] hidden
875 15:57:40.632074 PCI: 00:08.0 [8086/9a11] enabled
876 15:57:40.632129 PCI: 00:0a.0 [8086/9a0d] disabled
877 15:57:40.632185 PCI: 00:0d.0 [8086/0000] bus ops
878 15:57:40.632238 PCI: 00:0d.0 [8086/9a13] enabled
879 15:57:40.632293 PCI: 00:14.0 [8086/0000] bus ops
880 15:57:40.632350 PCI: 00:14.0 [8086/a0ed] enabled
881 15:57:40.632410 PCI: 00:14.2 [8086/a0ef] enabled
882 15:57:40.632467 PCI: 00:14.3 [8086/0000] bus ops
883 15:57:40.632523 PCI: 00:14.3 [8086/a0f0] enabled
884 15:57:40.632576 PCI: 00:15.0 [8086/0000] bus ops
885 15:57:40.632631 PCI: 00:15.0 [8086/a0e8] enabled
886 15:57:40.632741 PCI: 00:15.1 [8086/0000] bus ops
887 15:57:40.632826 PCI: 00:15.1 [8086/a0e9] enabled
888 15:57:40.632884 PCI: 00:15.2 [8086/0000] bus ops
889 15:57:40.632941 PCI: 00:15.2 [8086/a0ea] enabled
890 15:57:40.632999 PCI: 00:15.3 [8086/0000] bus ops
891 15:57:40.633243 PCI: 00:15.3 [8086/a0eb] enabled
892 15:57:40.633319 PCI: 00:16.0 [8086/0000] ops
893 15:57:40.633378 PCI: 00:16.0 [8086/a0e0] enabled
894 15:57:40.633436 PCI: Static device PCI: 00:17.0 not found, disabling it.
895 15:57:40.633494 PCI: 00:19.0 [8086/0000] bus ops
896 15:57:40.633550 PCI: 00:19.0 [8086/a0c5] disabled
897 15:57:40.633604 PCI: 00:19.1 [8086/0000] bus ops
898 15:57:40.633697 PCI: 00:19.1 [8086/a0c6] enabled
899 15:57:40.633754 PCI: 00:1d.0 [8086/0000] bus ops
900 15:57:40.633808 PCI: 00:1d.0 [8086/a0b0] enabled
901 15:57:40.633866 PCI: 00:1e.0 [8086/0000] ops
902 15:57:40.633921 PCI: 00:1e.0 [8086/a0a8] enabled
903 15:57:40.633974 PCI: 00:1e.2 [8086/0000] bus ops
904 15:57:40.634028 PCI: 00:1e.2 [8086/a0aa] enabled
905 15:57:40.634085 PCI: 00:1e.3 [8086/0000] bus ops
906 15:57:40.634137 PCI: 00:1e.3 [8086/a0ab] enabled
907 15:57:40.634203 PCI: 00:1f.0 [8086/0000] bus ops
908 15:57:40.634258 PCI: 00:1f.0 [8086/a087] enabled
909 15:57:40.634314 RTC Init
910 15:57:40.634369 Set power on after power failure.
911 15:57:40.634424 Disabling Deep S3
912 15:57:40.634478 Disabling Deep S3
913 15:57:40.634535 Disabling Deep S4
914 15:57:40.634600 Disabling Deep S4
915 15:57:40.634664 Disabling Deep S5
916 15:57:40.634738 Disabling Deep S5
917 15:57:40.634805 PCI: 00:1f.2 [0000/0000] hidden
918 15:57:40.634867 PCI: 00:1f.3 [8086/0000] bus ops
919 15:57:40.634922 PCI: 00:1f.3 [8086/a0c8] enabled
920 15:57:40.635077 PCI: 00:1f.5 [8086/0000] bus ops
921 15:57:40.635164 PCI: 00:1f.5 [8086/a0a4] enabled
922 15:57:40.635226 PCI: Leftover static devices:
923 15:57:40.635292 PCI: 00:10.2
924 15:57:40.635350 PCI: 00:10.6
925 15:57:40.635412 PCI: 00:10.7
926 15:57:40.635485 PCI: 00:06.0
927 15:57:40.635556 PCI: 00:07.1
928 15:57:40.635609 PCI: 00:07.2
929 15:57:40.635662 PCI: 00:07.3
930 15:57:40.635717 PCI: 00:09.0
931 15:57:40.635773 PCI: 00:0d.1
932 15:57:40.635829 PCI: 00:0d.2
933 15:57:40.635883 PCI: 00:0d.3
934 15:57:40.635959 PCI: 00:0e.0
935 15:57:40.636028 PCI: 00:12.0
936 15:57:40.636084 PCI: 00:12.6
937 15:57:40.636186 PCI: 00:13.0
938 15:57:40.636240 PCI: 00:14.1
939 15:57:40.636293 PCI: 00:16.1
940 15:57:40.636347 PCI: 00:16.2
941 15:57:40.636402 PCI: 00:16.3
942 15:57:40.636454 PCI: 00:16.4
943 15:57:40.636510 PCI: 00:16.5
944 15:57:40.636563 PCI: 00:17.0
945 15:57:40.636618 PCI: 00:19.2
946 15:57:40.636672 PCI: 00:1e.1
947 15:57:40.636727 PCI: 00:1f.1
948 15:57:40.636821 PCI: 00:1f.4
949 15:57:40.636926 PCI: 00:1f.6
950 15:57:40.636984 PCI: 00:1f.7
951 15:57:40.637046 PCI: Check your devicetree.cb.
952 15:57:40.637100 PCI: 00:02.0 scanning...
953 15:57:40.637154 scan_generic_bus for PCI: 00:02.0
954 15:57:40.637207 scan_generic_bus for PCI: 00:02.0 done
955 15:57:40.637260 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
956 15:57:40.637313 PCI: 00:04.0 scanning...
957 15:57:40.637366 scan_generic_bus for PCI: 00:04.0
958 15:57:40.637419 GENERIC: 0.0 enabled
959 15:57:40.637492 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
960 15:57:40.639442 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
961 15:57:40.642837 PCI: 00:0d.0 scanning...
962 15:57:40.646097 scan_static_bus for PCI: 00:0d.0
963 15:57:40.646237 USB0 port 0 enabled
964 15:57:40.649335 USB0 port 0 scanning...
965 15:57:40.652566 scan_static_bus for USB0 port 0
966 15:57:40.656354 USB3 port 0 enabled
967 15:57:40.656466 USB3 port 1 enabled
968 15:57:40.659300 USB3 port 2 disabled
969 15:57:40.662693 USB3 port 3 disabled
970 15:57:40.662800 USB3 port 0 scanning...
971 15:57:40.666147 scan_static_bus for USB3 port 0
972 15:57:40.672625 scan_static_bus for USB3 port 0 done
973 15:57:40.675935 scan_bus: bus USB3 port 0 finished in 6 msecs
974 15:57:40.679283 USB3 port 1 scanning...
975 15:57:40.682637 scan_static_bus for USB3 port 1
976 15:57:40.686006 scan_static_bus for USB3 port 1 done
977 15:57:40.689343 scan_bus: bus USB3 port 1 finished in 6 msecs
978 15:57:40.692871 scan_static_bus for USB0 port 0 done
979 15:57:40.699594 scan_bus: bus USB0 port 0 finished in 43 msecs
980 15:57:40.702885 scan_static_bus for PCI: 00:0d.0 done
981 15:57:40.705805 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
982 15:57:40.709284 PCI: 00:14.0 scanning...
983 15:57:40.712620 scan_static_bus for PCI: 00:14.0
984 15:57:40.716234 USB0 port 0 enabled
985 15:57:40.716355 USB0 port 0 scanning...
986 15:57:40.719668 scan_static_bus for USB0 port 0
987 15:57:40.722627 USB2 port 0 disabled
988 15:57:40.726096 USB2 port 1 enabled
989 15:57:40.726196 USB2 port 2 enabled
990 15:57:40.729523 USB2 port 3 disabled
991 15:57:40.732900 USB2 port 4 enabled
992 15:57:40.733000 USB2 port 5 disabled
993 15:57:40.735889 USB2 port 6 disabled
994 15:57:40.739356 USB2 port 7 disabled
995 15:57:40.739440 USB2 port 8 disabled
996 15:57:40.742832 USB2 port 9 disabled
997 15:57:40.742965 USB3 port 0 disabled
998 15:57:40.746011 USB3 port 1 enabled
999 15:57:40.749487 USB3 port 2 disabled
1000 15:57:40.749609 USB3 port 3 disabled
1001 15:57:40.752881 USB2 port 1 scanning...
1002 15:57:40.756140 scan_static_bus for USB2 port 1
1003 15:57:40.760243 scan_static_bus for USB2 port 1 done
1004 15:57:40.763369 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 15:57:40.766814 USB2 port 2 scanning...
1006 15:57:40.770152 scan_static_bus for USB2 port 2
1007 15:57:40.773641 scan_static_bus for USB2 port 2 done
1008 15:57:40.780093 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 15:57:40.780220 USB2 port 4 scanning...
1010 15:57:40.783463 scan_static_bus for USB2 port 4
1011 15:57:40.790204 scan_static_bus for USB2 port 4 done
1012 15:57:40.793514 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 15:57:40.797046 USB3 port 1 scanning...
1014 15:57:40.800182 scan_static_bus for USB3 port 1
1015 15:57:40.803540 scan_static_bus for USB3 port 1 done
1016 15:57:40.806572 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 15:57:40.810031 scan_static_bus for USB0 port 0 done
1018 15:57:40.816907 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 15:57:40.820243 scan_static_bus for PCI: 00:14.0 done
1020 15:57:40.823239 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1021 15:57:40.826659 PCI: 00:14.3 scanning...
1022 15:57:40.830044 scan_static_bus for PCI: 00:14.3
1023 15:57:40.833680 GENERIC: 0.0 enabled
1024 15:57:40.837051 scan_static_bus for PCI: 00:14.3 done
1025 15:57:40.839891 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1026 15:57:40.843164 PCI: 00:15.0 scanning...
1027 15:57:40.846553 scan_static_bus for PCI: 00:15.0
1028 15:57:40.850100 I2C: 00:1a enabled
1029 15:57:40.850184 I2C: 00:31 enabled
1030 15:57:40.853657 I2C: 00:32 enabled
1031 15:57:40.856417 scan_static_bus for PCI: 00:15.0 done
1032 15:57:40.863382 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1033 15:57:40.863533 PCI: 00:15.1 scanning...
1034 15:57:40.866759 scan_static_bus for PCI: 00:15.1
1035 15:57:40.869926 I2C: 00:10 enabled
1036 15:57:40.873511 scan_static_bus for PCI: 00:15.1 done
1037 15:57:40.880109 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1038 15:57:40.880194 PCI: 00:15.2 scanning...
1039 15:57:40.883503 scan_static_bus for PCI: 00:15.2
1040 15:57:40.886842 scan_static_bus for PCI: 00:15.2 done
1041 15:57:40.893552 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1042 15:57:40.896883 PCI: 00:15.3 scanning...
1043 15:57:40.899830 scan_static_bus for PCI: 00:15.3
1044 15:57:40.903465 scan_static_bus for PCI: 00:15.3 done
1045 15:57:40.906824 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1046 15:57:40.910222 PCI: 00:19.1 scanning...
1047 15:57:40.913336 scan_static_bus for PCI: 00:19.1
1048 15:57:40.916607 I2C: 00:15 enabled
1049 15:57:40.920072 scan_static_bus for PCI: 00:19.1 done
1050 15:57:40.923072 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1051 15:57:40.926602 PCI: 00:1d.0 scanning...
1052 15:57:40.930016 do_pci_scan_bridge for PCI: 00:1d.0
1053 15:57:40.933320 PCI: pci_scan_bus for bus 01
1054 15:57:40.936629 PCI: 01:00.0 [1c5c/174a] enabled
1055 15:57:40.939672 GENERIC: 0.0 enabled
1056 15:57:40.943235 Enabling Common Clock Configuration
1057 15:57:40.946570 L1 Sub-State supported from root port 29
1058 15:57:40.950001 L1 Sub-State Support = 0xf
1059 15:57:40.953243 CommonModeRestoreTime = 0x28
1060 15:57:40.956610 Power On Value = 0x16, Power On Scale = 0x0
1061 15:57:40.960109 ASPM: Enabled L1
1062 15:57:40.963111 PCIe: Max_Payload_Size adjusted to 128
1063 15:57:40.966466 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1064 15:57:40.969743 PCI: 00:1e.2 scanning...
1065 15:57:40.973118 scan_generic_bus for PCI: 00:1e.2
1066 15:57:40.976414 SPI: 00 enabled
1067 15:57:40.983470 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1068 15:57:40.986783 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1069 15:57:40.990000 PCI: 00:1e.3 scanning...
1070 15:57:40.992968 scan_generic_bus for PCI: 00:1e.3
1071 15:57:40.993052 SPI: 00 enabled
1072 15:57:41.000039 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1073 15:57:41.006383 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1074 15:57:41.006468 PCI: 00:1f.0 scanning...
1075 15:57:41.010084 scan_static_bus for PCI: 00:1f.0
1076 15:57:41.013097 PNP: 0c09.0 enabled
1077 15:57:41.016541 PNP: 0c09.0 scanning...
1078 15:57:41.019969 scan_static_bus for PNP: 0c09.0
1079 15:57:41.023341 scan_static_bus for PNP: 0c09.0 done
1080 15:57:41.026463 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1081 15:57:41.029886 scan_static_bus for PCI: 00:1f.0 done
1082 15:57:41.036251 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1083 15:57:41.039723 PCI: 00:1f.2 scanning...
1084 15:57:41.043214 scan_static_bus for PCI: 00:1f.2
1085 15:57:41.043296 GENERIC: 0.0 enabled
1086 15:57:41.046701 GENERIC: 0.0 scanning...
1087 15:57:41.050067 scan_static_bus for GENERIC: 0.0
1088 15:57:41.053437 GENERIC: 0.0 enabled
1089 15:57:41.053522 GENERIC: 1.0 enabled
1090 15:57:41.060040 scan_static_bus for GENERIC: 0.0 done
1091 15:57:41.063418 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1092 15:57:41.066463 scan_static_bus for PCI: 00:1f.2 done
1093 15:57:41.072937 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1094 15:57:41.073022 PCI: 00:1f.3 scanning...
1095 15:57:41.076119 scan_static_bus for PCI: 00:1f.3
1096 15:57:41.083204 scan_static_bus for PCI: 00:1f.3 done
1097 15:57:41.086538 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1098 15:57:41.089682 PCI: 00:1f.5 scanning...
1099 15:57:41.092812 scan_generic_bus for PCI: 00:1f.5
1100 15:57:41.096355 scan_generic_bus for PCI: 00:1f.5 done
1101 15:57:41.099918 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1102 15:57:41.106215 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1103 15:57:41.109645 scan_static_bus for Root Device done
1104 15:57:41.116446 scan_bus: bus Root Device finished in 736 msecs
1105 15:57:41.116534 done
1106 15:57:41.122929 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1107 15:57:41.126430 Chrome EC: UHEPI supported
1108 15:57:41.132811 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1109 15:57:41.136343 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1110 15:57:41.142876 SPI flash protection: WPSW=1 SRP0=0
1111 15:57:41.146232 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1112 15:57:41.152608 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1113 15:57:41.156002 found VGA at PCI: 00:02.0
1114 15:57:41.159420 Setting up VGA for PCI: 00:02.0
1115 15:57:41.162817 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1116 15:57:41.169262 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1117 15:57:41.169346 Allocating resources...
1118 15:57:41.172653 Reading resources...
1119 15:57:41.176254 Root Device read_resources bus 0 link: 0
1120 15:57:41.182442 DOMAIN: 0000 read_resources bus 0 link: 0
1121 15:57:41.186021 PCI: 00:04.0 read_resources bus 1 link: 0
1122 15:57:41.192511 PCI: 00:04.0 read_resources bus 1 link: 0 done
1123 15:57:41.195854 PCI: 00:0d.0 read_resources bus 0 link: 0
1124 15:57:41.199117 USB0 port 0 read_resources bus 0 link: 0
1125 15:57:41.206593 USB0 port 0 read_resources bus 0 link: 0 done
1126 15:57:41.209882 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1127 15:57:41.216293 PCI: 00:14.0 read_resources bus 0 link: 0
1128 15:57:41.219881 USB0 port 0 read_resources bus 0 link: 0
1129 15:57:41.226353 USB0 port 0 read_resources bus 0 link: 0 done
1130 15:57:41.229753 PCI: 00:14.0 read_resources bus 0 link: 0 done
1131 15:57:41.236231 PCI: 00:14.3 read_resources bus 0 link: 0
1132 15:57:41.239740 PCI: 00:14.3 read_resources bus 0 link: 0 done
1133 15:57:41.246264 PCI: 00:15.0 read_resources bus 0 link: 0
1134 15:57:41.249806 PCI: 00:15.0 read_resources bus 0 link: 0 done
1135 15:57:41.256287 PCI: 00:15.1 read_resources bus 0 link: 0
1136 15:57:41.259836 PCI: 00:15.1 read_resources bus 0 link: 0 done
1137 15:57:41.266790 PCI: 00:19.1 read_resources bus 0 link: 0
1138 15:57:41.269811 PCI: 00:19.1 read_resources bus 0 link: 0 done
1139 15:57:41.276257 PCI: 00:1d.0 read_resources bus 1 link: 0
1140 15:57:41.279759 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1141 15:57:41.286699 PCI: 00:1e.2 read_resources bus 2 link: 0
1142 15:57:41.289971 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1143 15:57:41.296366 PCI: 00:1e.3 read_resources bus 3 link: 0
1144 15:57:41.300148 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1145 15:57:41.306564 PCI: 00:1f.0 read_resources bus 0 link: 0
1146 15:57:41.310068 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1147 15:57:41.312924 PCI: 00:1f.2 read_resources bus 0 link: 0
1148 15:57:41.320153 GENERIC: 0.0 read_resources bus 0 link: 0
1149 15:57:41.323283 GENERIC: 0.0 read_resources bus 0 link: 0 done
1150 15:57:41.329785 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1151 15:57:41.336677 DOMAIN: 0000 read_resources bus 0 link: 0 done
1152 15:57:41.339665 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1153 15:57:41.343140 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1154 15:57:41.350149 Root Device read_resources bus 0 link: 0 done
1155 15:57:41.353157 Done reading resources.
1156 15:57:41.356532 Show resources in subtree (Root Device)...After reading.
1157 15:57:41.363321 Root Device child on link 0 DOMAIN: 0000
1158 15:57:41.366946 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1159 15:57:41.376837 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1160 15:57:41.386691 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1161 15:57:41.386775 PCI: 00:00.0
1162 15:57:41.396407 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1163 15:57:41.406246 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1164 15:57:41.416566 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1165 15:57:41.426566 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1166 15:57:41.432912 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1167 15:57:41.442774 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1168 15:57:41.453070 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1169 15:57:41.462775 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1170 15:57:41.472985 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1171 15:57:41.482654 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1172 15:57:41.489602 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1173 15:57:41.499382 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1174 15:57:41.509216 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1175 15:57:41.519326 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1176 15:57:41.525643 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1177 15:57:41.535964 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1178 15:57:41.545875 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1179 15:57:41.555894 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1180 15:57:41.565595 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1181 15:57:41.575336 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1182 15:57:41.575466 PCI: 00:02.0
1183 15:57:41.588697 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1184 15:57:41.598973 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1185 15:57:41.605461 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1186 15:57:41.612071 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 15:57:41.622449 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1188 15:57:41.622535 GENERIC: 0.0
1189 15:57:41.625564 PCI: 00:05.0
1190 15:57:41.635453 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 15:57:41.638862 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1192 15:57:41.641904 GENERIC: 0.0
1193 15:57:41.641988 PCI: 00:08.0
1194 15:57:41.652324 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 15:57:41.655269 PCI: 00:0a.0
1196 15:57:41.658774 PCI: 00:0d.0 child on link 0 USB0 port 0
1197 15:57:41.668565 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1198 15:57:41.671983 USB0 port 0 child on link 0 USB3 port 0
1199 15:57:41.675448 USB3 port 0
1200 15:57:41.675532 USB3 port 1
1201 15:57:41.678816 USB3 port 2
1202 15:57:41.678900 USB3 port 3
1203 15:57:41.685253 PCI: 00:14.0 child on link 0 USB0 port 0
1204 15:57:41.694980 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 15:57:41.698433 USB0 port 0 child on link 0 USB2 port 0
1206 15:57:41.701656 USB2 port 0
1207 15:57:41.701739 USB2 port 1
1208 15:57:41.705182 USB2 port 2
1209 15:57:41.705265 USB2 port 3
1210 15:57:41.708535 USB2 port 4
1211 15:57:41.708647 USB2 port 5
1212 15:57:41.711985 USB2 port 6
1213 15:57:41.712095 USB2 port 7
1214 15:57:41.715383 USB2 port 8
1215 15:57:41.715493 USB2 port 9
1216 15:57:41.718737 USB3 port 0
1217 15:57:41.718820 USB3 port 1
1218 15:57:41.722205 USB3 port 2
1219 15:57:41.722288 USB3 port 3
1220 15:57:41.725363 PCI: 00:14.2
1221 15:57:41.735066 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 15:57:41.745040 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 15:57:41.748484 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1224 15:57:41.758369 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 15:57:41.761777 GENERIC: 0.0
1226 15:57:41.765154 PCI: 00:15.0 child on link 0 I2C: 00:1a
1227 15:57:41.774917 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 15:57:41.778350 I2C: 00:1a
1229 15:57:41.778433 I2C: 00:31
1230 15:57:41.781747 I2C: 00:32
1231 15:57:41.785105 PCI: 00:15.1 child on link 0 I2C: 00:10
1232 15:57:41.794795 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 15:57:41.794879 I2C: 00:10
1234 15:57:41.798236 PCI: 00:15.2
1235 15:57:41.807905 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 15:57:41.808026 PCI: 00:15.3
1237 15:57:41.818273 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 15:57:41.821650 PCI: 00:16.0
1239 15:57:41.831653 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 15:57:41.831778 PCI: 00:19.0
1241 15:57:41.838217 PCI: 00:19.1 child on link 0 I2C: 00:15
1242 15:57:41.848049 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 15:57:41.848150 I2C: 00:15
1244 15:57:41.851653 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1245 15:57:41.861560 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1246 15:57:41.871448 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1247 15:57:41.881530 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1248 15:57:41.881633 GENERIC: 0.0
1249 15:57:41.884915 PCI: 01:00.0
1250 15:57:41.894965 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 15:57:41.904951 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1252 15:57:41.911220 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1253 15:57:41.914819 PCI: 00:1e.0
1254 15:57:41.924709 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 15:57:41.928168 PCI: 00:1e.2 child on link 0 SPI: 00
1256 15:57:41.937973 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 15:57:41.941457 SPI: 00
1258 15:57:41.944621 PCI: 00:1e.3 child on link 0 SPI: 00
1259 15:57:41.954446 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 15:57:41.954570 SPI: 00
1261 15:57:41.961228 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1262 15:57:41.967759 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1263 15:57:41.971141 PNP: 0c09.0
1264 15:57:41.977955 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1265 15:57:41.984312 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1266 15:57:41.994401 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1267 15:57:42.001189 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1268 15:57:42.007992 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1269 15:57:42.008079 GENERIC: 0.0
1270 15:57:42.011337 GENERIC: 1.0
1271 15:57:42.011423 PCI: 00:1f.3
1272 15:57:42.021350 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1273 15:57:42.031294 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1274 15:57:42.034361 PCI: 00:1f.5
1275 15:57:42.044449 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1276 15:57:42.047823 CPU_CLUSTER: 0 child on link 0 APIC: 00
1277 15:57:42.047911 APIC: 00
1278 15:57:42.051007 APIC: 01
1279 15:57:42.051091 APIC: 03
1280 15:57:42.051158 APIC: 07
1281 15:57:42.054346 APIC: 05
1282 15:57:42.054430 APIC: 04
1283 15:57:42.057750 APIC: 02
1284 15:57:42.057835 APIC: 06
1285 15:57:42.064575 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1286 15:57:42.070875 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1287 15:57:42.077737 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1288 15:57:42.084508 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1289 15:57:42.087513 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1290 15:57:42.090868 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1291 15:57:42.097806 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1292 15:57:42.104150 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1293 15:57:42.110654 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1294 15:57:42.117632 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1295 15:57:42.124180 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1296 15:57:42.130652 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1297 15:57:42.140632 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1298 15:57:42.147314 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1299 15:57:42.154066 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1300 15:57:42.157369 DOMAIN: 0000: Resource ranges:
1301 15:57:42.160479 * Base: 1000, Size: 800, Tag: 100
1302 15:57:42.163924 * Base: 1900, Size: e700, Tag: 100
1303 15:57:42.171010 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1304 15:57:42.177191 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1305 15:57:42.183885 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1306 15:57:42.190737 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1307 15:57:42.197533 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1308 15:57:42.207005 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1309 15:57:42.213786 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1310 15:57:42.220528 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1311 15:57:42.230476 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1312 15:57:42.236967 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1313 15:57:42.244054 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1314 15:57:42.253545 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1315 15:57:42.260387 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1316 15:57:42.267127 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1317 15:57:42.276995 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1318 15:57:42.283583 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1319 15:57:42.290303 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1320 15:57:42.300604 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1321 15:57:42.306964 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1322 15:57:42.313545 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1323 15:57:42.323846 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1324 15:57:42.330328 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1325 15:57:42.336797 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1326 15:57:42.346751 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1327 15:57:42.353563 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1328 15:57:42.356899 DOMAIN: 0000: Resource ranges:
1329 15:57:42.360320 * Base: 7fc00000, Size: 40400000, Tag: 200
1330 15:57:42.366703 * Base: d0000000, Size: 28000000, Tag: 200
1331 15:57:42.370071 * Base: fa000000, Size: 1000000, Tag: 200
1332 15:57:42.373350 * Base: fb001000, Size: 2fff000, Tag: 200
1333 15:57:42.377035 * Base: fe010000, Size: 2e000, Tag: 200
1334 15:57:42.383409 * Base: fe03f000, Size: d41000, Tag: 200
1335 15:57:42.386731 * Base: fed88000, Size: 8000, Tag: 200
1336 15:57:42.389924 * Base: fed93000, Size: d000, Tag: 200
1337 15:57:42.393545 * Base: feda2000, Size: 1e000, Tag: 200
1338 15:57:42.399902 * Base: fede0000, Size: 1220000, Tag: 200
1339 15:57:42.403441 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1340 15:57:42.409919 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1341 15:57:42.416449 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1342 15:57:42.423309 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1343 15:57:42.430158 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1344 15:57:42.436622 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1345 15:57:42.443135 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1346 15:57:42.450041 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1347 15:57:42.456654 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1348 15:57:42.463358 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1349 15:57:42.469881 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1350 15:57:42.476590 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1351 15:57:42.483144 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1352 15:57:42.489636 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1353 15:57:42.496531 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1354 15:57:42.503138 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1355 15:57:42.509822 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1356 15:57:42.516088 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1357 15:57:42.523048 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1358 15:57:42.529854 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1359 15:57:42.536398 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1360 15:57:42.542877 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1361 15:57:42.549798 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1362 15:57:42.556122 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1363 15:57:42.566326 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1364 15:57:42.569168 PCI: 00:1d.0: Resource ranges:
1365 15:57:42.572570 * Base: 7fc00000, Size: 100000, Tag: 200
1366 15:57:42.579582 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1367 15:57:42.586287 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1368 15:57:42.592597 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1369 15:57:42.599506 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1370 15:57:42.609316 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1371 15:57:42.612483 Root Device assign_resources, bus 0 link: 0
1372 15:57:42.615818 DOMAIN: 0000 assign_resources, bus 0 link: 0
1373 15:57:42.625865 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1374 15:57:42.632720 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1375 15:57:42.642450 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1376 15:57:42.649364 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1377 15:57:42.655818 PCI: 00:04.0 assign_resources, bus 1 link: 0
1378 15:57:42.659155 PCI: 00:04.0 assign_resources, bus 1 link: 0
1379 15:57:42.665665 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1380 15:57:42.675956 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1381 15:57:42.682868 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1382 15:57:42.689345 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1383 15:57:42.692743 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1384 15:57:42.702618 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1385 15:57:42.705822 PCI: 00:14.0 assign_resources, bus 0 link: 0
1386 15:57:42.709513 PCI: 00:14.0 assign_resources, bus 0 link: 0
1387 15:57:42.719172 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1388 15:57:42.725770 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1389 15:57:42.735792 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1390 15:57:42.739131 PCI: 00:14.3 assign_resources, bus 0 link: 0
1391 15:57:42.742639 PCI: 00:14.3 assign_resources, bus 0 link: 0
1392 15:57:42.753126 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1393 15:57:42.756126 PCI: 00:15.0 assign_resources, bus 0 link: 0
1394 15:57:42.762942 PCI: 00:15.0 assign_resources, bus 0 link: 0
1395 15:57:42.769757 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1396 15:57:42.775937 PCI: 00:15.1 assign_resources, bus 0 link: 0
1397 15:57:42.779305 PCI: 00:15.1 assign_resources, bus 0 link: 0
1398 15:57:42.785761 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1399 15:57:42.796144 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1400 15:57:42.802683 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1401 15:57:42.812558 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1402 15:57:42.815840 PCI: 00:19.1 assign_resources, bus 0 link: 0
1403 15:57:42.822787 PCI: 00:19.1 assign_resources, bus 0 link: 0
1404 15:57:42.829348 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1405 15:57:42.839562 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1406 15:57:42.849474 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1407 15:57:42.852859 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1408 15:57:42.862748 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1409 15:57:42.869150 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1410 15:57:42.875915 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1411 15:57:42.882769 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1412 15:57:42.889253 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1413 15:57:42.896085 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1414 15:57:42.899165 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1415 15:57:42.908974 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1416 15:57:42.912440 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1417 15:57:42.915887 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1418 15:57:42.922523 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1419 15:57:42.925721 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1420 15:57:42.932202 LPC: Trying to open IO window from 800 size 1ff
1421 15:57:42.939025 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1422 15:57:42.948770 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1423 15:57:42.955586 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1424 15:57:42.959147 DOMAIN: 0000 assign_resources, bus 0 link: 0
1425 15:57:42.965896 Root Device assign_resources, bus 0 link: 0
1426 15:57:42.969375 Done setting resources.
1427 15:57:42.975748 Show resources in subtree (Root Device)...After assigning values.
1428 15:57:42.979313 Root Device child on link 0 DOMAIN: 0000
1429 15:57:42.982799 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1430 15:57:42.992625 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1431 15:57:43.002401 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1432 15:57:43.002530 PCI: 00:00.0
1433 15:57:43.012077 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1434 15:57:43.022212 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1435 15:57:43.032152 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1436 15:57:43.042071 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1437 15:57:43.052139 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1438 15:57:43.062102 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1439 15:57:43.068413 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1440 15:57:43.078435 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1441 15:57:43.088608 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1442 15:57:43.098530 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1443 15:57:43.108670 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1444 15:57:43.115237 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1445 15:57:43.125236 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1446 15:57:43.135338 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1447 15:57:43.144974 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1448 15:57:43.155071 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1449 15:57:43.164874 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1450 15:57:43.171646 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1451 15:57:43.181571 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1452 15:57:43.191965 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1453 15:57:43.194846 PCI: 00:02.0
1454 15:57:43.205238 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1455 15:57:43.215130 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1456 15:57:43.225005 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1457 15:57:43.228321 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1458 15:57:43.238416 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1459 15:57:43.241694 GENERIC: 0.0
1460 15:57:43.241825 PCI: 00:05.0
1461 15:57:43.251875 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1462 15:57:43.258247 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1463 15:57:43.258378 GENERIC: 0.0
1464 15:57:43.261564 PCI: 00:08.0
1465 15:57:43.271522 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1466 15:57:43.271651 PCI: 00:0a.0
1467 15:57:43.278456 PCI: 00:0d.0 child on link 0 USB0 port 0
1468 15:57:43.288274 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1469 15:57:43.291810 USB0 port 0 child on link 0 USB3 port 0
1470 15:57:43.295116 USB3 port 0
1471 15:57:43.295244 USB3 port 1
1472 15:57:43.298581 USB3 port 2
1473 15:57:43.298705 USB3 port 3
1474 15:57:43.305148 PCI: 00:14.0 child on link 0 USB0 port 0
1475 15:57:43.314672 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1476 15:57:43.318254 USB0 port 0 child on link 0 USB2 port 0
1477 15:57:43.321716 USB2 port 0
1478 15:57:43.321846 USB2 port 1
1479 15:57:43.324625 USB2 port 2
1480 15:57:43.324772 USB2 port 3
1481 15:57:43.328067 USB2 port 4
1482 15:57:43.328209 USB2 port 5
1483 15:57:43.331512 USB2 port 6
1484 15:57:43.331652 USB2 port 7
1485 15:57:43.334979 USB2 port 8
1486 15:57:43.335111 USB2 port 9
1487 15:57:43.338199 USB3 port 0
1488 15:57:43.338330 USB3 port 1
1489 15:57:43.341803 USB3 port 2
1490 15:57:43.345108 USB3 port 3
1491 15:57:43.345252 PCI: 00:14.2
1492 15:57:43.355003 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1493 15:57:43.364618 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1494 15:57:43.371359 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1495 15:57:43.381313 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1496 15:57:43.381444 GENERIC: 0.0
1497 15:57:43.388159 PCI: 00:15.0 child on link 0 I2C: 00:1a
1498 15:57:43.397904 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1499 15:57:43.398034 I2C: 00:1a
1500 15:57:43.401322 I2C: 00:31
1501 15:57:43.401449 I2C: 00:32
1502 15:57:43.404655 PCI: 00:15.1 child on link 0 I2C: 00:10
1503 15:57:43.414940 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1504 15:57:43.417941 I2C: 00:10
1505 15:57:43.418075 PCI: 00:15.2
1506 15:57:43.431348 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1507 15:57:43.431494 PCI: 00:15.3
1508 15:57:43.441037 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1509 15:57:43.444323 PCI: 00:16.0
1510 15:57:43.454456 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1511 15:57:43.454582 PCI: 00:19.0
1512 15:57:43.460982 PCI: 00:19.1 child on link 0 I2C: 00:15
1513 15:57:43.471177 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1514 15:57:43.471311 I2C: 00:15
1515 15:57:43.477763 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1516 15:57:43.484564 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1517 15:57:43.497922 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1518 15:57:43.507772 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1519 15:57:43.510830 GENERIC: 0.0
1520 15:57:43.510951 PCI: 01:00.0
1521 15:57:43.520743 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1522 15:57:43.531177 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1523 15:57:43.541018 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1524 15:57:43.543985 PCI: 00:1e.0
1525 15:57:43.554526 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1526 15:57:43.560780 PCI: 00:1e.2 child on link 0 SPI: 00
1527 15:57:43.571032 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1528 15:57:43.571120 SPI: 00
1529 15:57:43.574180 PCI: 00:1e.3 child on link 0 SPI: 00
1530 15:57:43.584042 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1531 15:57:43.587470 SPI: 00
1532 15:57:43.591001 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1533 15:57:43.600909 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1534 15:57:43.600996 PNP: 0c09.0
1535 15:57:43.610933 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1536 15:57:43.614352 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1537 15:57:43.624247 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1538 15:57:43.634099 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1539 15:57:43.637512 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1540 15:57:43.640986 GENERIC: 0.0
1541 15:57:43.641073 GENERIC: 1.0
1542 15:57:43.644331 PCI: 00:1f.3
1543 15:57:43.654523 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1544 15:57:43.664564 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1545 15:57:43.664650 PCI: 00:1f.5
1546 15:57:43.677414 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1547 15:57:43.680935 CPU_CLUSTER: 0 child on link 0 APIC: 00
1548 15:57:43.681037 APIC: 00
1549 15:57:43.684512 APIC: 01
1550 15:57:43.684629 APIC: 03
1551 15:57:43.684697 APIC: 07
1552 15:57:43.687687 APIC: 05
1553 15:57:43.687820 APIC: 04
1554 15:57:43.687936 APIC: 02
1555 15:57:43.690750 APIC: 06
1556 15:57:43.694262 Done allocating resources.
1557 15:57:43.700611 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1558 15:57:43.704197 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1559 15:57:43.707652 Configure GPIOs for I2S audio on UP4.
1560 15:57:43.715312 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1561 15:57:43.718628 Enabling resources...
1562 15:57:43.722212 PCI: 00:00.0 subsystem <- 8086/9a12
1563 15:57:43.725584 PCI: 00:00.0 cmd <- 06
1564 15:57:43.728529 PCI: 00:02.0 subsystem <- 8086/9a40
1565 15:57:43.731936 PCI: 00:02.0 cmd <- 03
1566 15:57:43.735378 PCI: 00:04.0 subsystem <- 8086/9a03
1567 15:57:43.738798 PCI: 00:04.0 cmd <- 02
1568 15:57:43.742151 PCI: 00:05.0 subsystem <- 8086/9a19
1569 15:57:43.742275 PCI: 00:05.0 cmd <- 02
1570 15:57:43.748587 PCI: 00:08.0 subsystem <- 8086/9a11
1571 15:57:43.748710 PCI: 00:08.0 cmd <- 06
1572 15:57:43.752061 PCI: 00:0d.0 subsystem <- 8086/9a13
1573 15:57:43.754989 PCI: 00:0d.0 cmd <- 02
1574 15:57:43.758341 PCI: 00:14.0 subsystem <- 8086/a0ed
1575 15:57:43.761890 PCI: 00:14.0 cmd <- 02
1576 15:57:43.765257 PCI: 00:14.2 subsystem <- 8086/a0ef
1577 15:57:43.768305 PCI: 00:14.2 cmd <- 02
1578 15:57:43.771821 PCI: 00:14.3 subsystem <- 8086/a0f0
1579 15:57:43.775071 PCI: 00:14.3 cmd <- 02
1580 15:57:43.778286 PCI: 00:15.0 subsystem <- 8086/a0e8
1581 15:57:43.781970 PCI: 00:15.0 cmd <- 02
1582 15:57:43.785207 PCI: 00:15.1 subsystem <- 8086/a0e9
1583 15:57:43.788212 PCI: 00:15.1 cmd <- 02
1584 15:57:43.791789 PCI: 00:15.2 subsystem <- 8086/a0ea
1585 15:57:43.791915 PCI: 00:15.2 cmd <- 02
1586 15:57:43.798177 PCI: 00:15.3 subsystem <- 8086/a0eb
1587 15:57:43.798304 PCI: 00:15.3 cmd <- 02
1588 15:57:43.801654 PCI: 00:16.0 subsystem <- 8086/a0e0
1589 15:57:43.805174 PCI: 00:16.0 cmd <- 02
1590 15:57:43.808614 PCI: 00:19.1 subsystem <- 8086/a0c6
1591 15:57:43.811984 PCI: 00:19.1 cmd <- 02
1592 15:57:43.814956 PCI: 00:1d.0 bridge ctrl <- 0013
1593 15:57:43.818246 PCI: 00:1d.0 subsystem <- 8086/a0b0
1594 15:57:43.821622 PCI: 00:1d.0 cmd <- 06
1595 15:57:43.825117 PCI: 00:1e.0 subsystem <- 8086/a0a8
1596 15:57:43.828478 PCI: 00:1e.0 cmd <- 06
1597 15:57:43.832042 PCI: 00:1e.2 subsystem <- 8086/a0aa
1598 15:57:43.834978 PCI: 00:1e.2 cmd <- 06
1599 15:57:43.838375 PCI: 00:1e.3 subsystem <- 8086/a0ab
1600 15:57:43.838457 PCI: 00:1e.3 cmd <- 02
1601 15:57:43.845186 PCI: 00:1f.0 subsystem <- 8086/a087
1602 15:57:43.845268 PCI: 00:1f.0 cmd <- 407
1603 15:57:43.848186 PCI: 00:1f.3 subsystem <- 8086/a0c8
1604 15:57:43.851633 PCI: 00:1f.3 cmd <- 02
1605 15:57:43.855031 PCI: 00:1f.5 subsystem <- 8086/a0a4
1606 15:57:43.858564 PCI: 00:1f.5 cmd <- 406
1607 15:57:43.862951 PCI: 01:00.0 cmd <- 02
1608 15:57:43.867323 done.
1609 15:57:43.870733 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1610 15:57:43.874101 Initializing devices...
1611 15:57:43.877227 Root Device init
1612 15:57:43.880824 Chrome EC: Set SMI mask to 0x0000000000000000
1613 15:57:43.887657 Chrome EC: clear events_b mask to 0x0000000000000000
1614 15:57:43.894001 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1615 15:57:43.901172 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1616 15:57:43.903878 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1617 15:57:43.910914 Chrome EC: Set WAKE mask to 0x0000000000000000
1618 15:57:43.913825 fw_config match found: DB_USB=USB3_ACTIVE
1619 15:57:43.920663 Configure Right Type-C port orientation for retimer
1620 15:57:43.924121 Root Device init finished in 44 msecs
1621 15:57:43.927514 PCI: 00:00.0 init
1622 15:57:43.930901 CPU TDP = 9 Watts
1623 15:57:43.930983 CPU PL1 = 9 Watts
1624 15:57:43.933987 CPU PL2 = 40 Watts
1625 15:57:43.937403 CPU PL4 = 83 Watts
1626 15:57:43.940893 PCI: 00:00.0 init finished in 8 msecs
1627 15:57:43.940976 PCI: 00:02.0 init
1628 15:57:43.944199 GMA: Found VBT in CBFS
1629 15:57:43.947637 GMA: Found valid VBT in CBFS
1630 15:57:43.953874 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1631 15:57:43.960793 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1632 15:57:43.964187 PCI: 00:02.0 init finished in 18 msecs
1633 15:57:43.967216 PCI: 00:05.0 init
1634 15:57:43.970609 PCI: 00:05.0 init finished in 0 msecs
1635 15:57:43.974032 PCI: 00:08.0 init
1636 15:57:43.977375 PCI: 00:08.0 init finished in 0 msecs
1637 15:57:43.980795 PCI: 00:14.0 init
1638 15:57:43.983670 PCI: 00:14.0 init finished in 0 msecs
1639 15:57:43.987431 PCI: 00:14.2 init
1640 15:57:43.990631 PCI: 00:14.2 init finished in 0 msecs
1641 15:57:43.990713 PCI: 00:15.0 init
1642 15:57:43.993781 I2C bus 0 version 0x3230302a
1643 15:57:43.997275 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1644 15:57:44.003586 PCI: 00:15.0 init finished in 6 msecs
1645 15:57:44.003668 PCI: 00:15.1 init
1646 15:57:44.007047 I2C bus 1 version 0x3230302a
1647 15:57:44.010255 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1648 15:57:44.013659 PCI: 00:15.1 init finished in 6 msecs
1649 15:57:44.017209 PCI: 00:15.2 init
1650 15:57:44.020678 I2C bus 2 version 0x3230302a
1651 15:57:44.024084 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1652 15:57:44.027457 PCI: 00:15.2 init finished in 6 msecs
1653 15:57:44.030491 PCI: 00:15.3 init
1654 15:57:44.033935 I2C bus 3 version 0x3230302a
1655 15:57:44.037483 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1656 15:57:44.040810 PCI: 00:15.3 init finished in 6 msecs
1657 15:57:44.044140 PCI: 00:16.0 init
1658 15:57:44.047468 PCI: 00:16.0 init finished in 0 msecs
1659 15:57:44.047551 PCI: 00:19.1 init
1660 15:57:44.050419 I2C bus 5 version 0x3230302a
1661 15:57:44.057333 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1662 15:57:44.060303 PCI: 00:19.1 init finished in 6 msecs
1663 15:57:44.060389 PCI: 00:1d.0 init
1664 15:57:44.063762 Initializing PCH PCIe bridge.
1665 15:57:44.067154 PCI: 00:1d.0 init finished in 3 msecs
1666 15:57:44.071126 PCI: 00:1f.0 init
1667 15:57:44.074687 IOAPIC: Initializing IOAPIC at 0xfec00000
1668 15:57:44.081201 IOAPIC: Bootstrap Processor Local APIC = 0x00
1669 15:57:44.081284 IOAPIC: ID = 0x02
1670 15:57:44.084607 IOAPIC: Dumping registers
1671 15:57:44.088170 reg 0x0000: 0x02000000
1672 15:57:44.091359 reg 0x0001: 0x00770020
1673 15:57:44.091460 reg 0x0002: 0x00000000
1674 15:57:44.098049 PCI: 00:1f.0 init finished in 21 msecs
1675 15:57:44.098133 PCI: 00:1f.2 init
1676 15:57:44.101336 Disabling ACPI via APMC.
1677 15:57:44.104782 APMC done.
1678 15:57:44.107979 PCI: 00:1f.2 init finished in 5 msecs
1679 15:57:44.119898 PCI: 01:00.0 init
1680 15:57:44.122877 PCI: 01:00.0 init finished in 0 msecs
1681 15:57:44.126312 PNP: 0c09.0 init
1682 15:57:44.129635 Google Chrome EC uptime: 8.552 seconds
1683 15:57:44.136312 Google Chrome AP resets since EC boot: 1
1684 15:57:44.139832 Google Chrome most recent AP reset causes:
1685 15:57:44.142911 0.380: 32775 shutdown: entering G3
1686 15:57:44.149732 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1687 15:57:44.153085 PNP: 0c09.0 init finished in 22 msecs
1688 15:57:44.158612 Devices initialized
1689 15:57:44.162032 Show all devs... After init.
1690 15:57:44.165437 Root Device: enabled 1
1691 15:57:44.165525 DOMAIN: 0000: enabled 1
1692 15:57:44.168503 CPU_CLUSTER: 0: enabled 1
1693 15:57:44.171935 PCI: 00:00.0: enabled 1
1694 15:57:44.175200 PCI: 00:02.0: enabled 1
1695 15:57:44.175285 PCI: 00:04.0: enabled 1
1696 15:57:44.178692 PCI: 00:05.0: enabled 1
1697 15:57:44.182098 PCI: 00:06.0: enabled 0
1698 15:57:44.185169 PCI: 00:07.0: enabled 0
1699 15:57:44.185254 PCI: 00:07.1: enabled 0
1700 15:57:44.188582 PCI: 00:07.2: enabled 0
1701 15:57:44.192109 PCI: 00:07.3: enabled 0
1702 15:57:44.195050 PCI: 00:08.0: enabled 1
1703 15:57:44.195135 PCI: 00:09.0: enabled 0
1704 15:57:44.198381 PCI: 00:0a.0: enabled 0
1705 15:57:44.201806 PCI: 00:0d.0: enabled 1
1706 15:57:44.205259 PCI: 00:0d.1: enabled 0
1707 15:57:44.205344 PCI: 00:0d.2: enabled 0
1708 15:57:44.208514 PCI: 00:0d.3: enabled 0
1709 15:57:44.211616 PCI: 00:0e.0: enabled 0
1710 15:57:44.211738 PCI: 00:10.2: enabled 1
1711 15:57:44.215112 PCI: 00:10.6: enabled 0
1712 15:57:44.218187 PCI: 00:10.7: enabled 0
1713 15:57:44.221626 PCI: 00:12.0: enabled 0
1714 15:57:44.221752 PCI: 00:12.6: enabled 0
1715 15:57:44.225032 PCI: 00:13.0: enabled 0
1716 15:57:44.228153 PCI: 00:14.0: enabled 1
1717 15:57:44.231830 PCI: 00:14.1: enabled 0
1718 15:57:44.231909 PCI: 00:14.2: enabled 1
1719 15:57:44.235153 PCI: 00:14.3: enabled 1
1720 15:57:44.238613 PCI: 00:15.0: enabled 1
1721 15:57:44.241549 PCI: 00:15.1: enabled 1
1722 15:57:44.241634 PCI: 00:15.2: enabled 1
1723 15:57:44.245014 PCI: 00:15.3: enabled 1
1724 15:57:44.248359 PCI: 00:16.0: enabled 1
1725 15:57:44.248444 PCI: 00:16.1: enabled 0
1726 15:57:44.251811 PCI: 00:16.2: enabled 0
1727 15:57:44.255310 PCI: 00:16.3: enabled 0
1728 15:57:44.258206 PCI: 00:16.4: enabled 0
1729 15:57:44.258291 PCI: 00:16.5: enabled 0
1730 15:57:44.261785 PCI: 00:17.0: enabled 0
1731 15:57:44.264724 PCI: 00:19.0: enabled 0
1732 15:57:44.268140 PCI: 00:19.1: enabled 1
1733 15:57:44.268268 PCI: 00:19.2: enabled 0
1734 15:57:44.271687 PCI: 00:1c.0: enabled 1
1735 15:57:44.274721 PCI: 00:1c.1: enabled 0
1736 15:57:44.278239 PCI: 00:1c.2: enabled 0
1737 15:57:44.278324 PCI: 00:1c.3: enabled 0
1738 15:57:44.895525 PCI: 00:1c.4: enabled 0
1739 15:57:44.895932 PCI: 00:1c.5: enabled 0
1740 15:57:44.896107 PCI: 00:1c.6: enabled 1
1741 15:57:44.896174 PCI: 00:1c.7: enabled 0
1742 15:57:44.896237 PCI: 00:1d.0: enabled 1
1743 15:57:44.896299 PCI: 00:1d.1: enabled 0
1744 15:57:44.896360 PCI: 00:1d.2: enabled 1
1745 15:57:44.896426 PCI: 00:1d.3: enabled 0
1746 15:57:44.896493 PCI: 00:1e.0: enabled 1
1747 15:57:44.896576 PCI: 00:1e.1: enabled 0
1748 15:57:44.896649 PCI: 00:1e.2: enabled 1
1749 15:57:44.896706 PCI: 00:1e.3: enabled 1
1750 15:57:44.896805 PCI: 00:1f.0: enabled 1
1751 15:57:44.896862 PCI: 00:1f.1: enabled 0
1752 15:57:44.896917 PCI: 00:1f.2: enabled 1
1753 15:57:44.896973 PCI: 00:1f.3: enabled 1
1754 15:57:44.897029 PCI: 00:1f.4: enabled 0
1755 15:57:44.897092 PCI: 00:1f.5: enabled 1
1756 15:57:44.897149 PCI: 00:1f.6: enabled 0
1757 15:57:44.897214 PCI: 00:1f.7: enabled 0
1758 15:57:44.897270 APIC: 00: enabled 1
1759 15:57:44.897326 GENERIC: 0.0: enabled 1
1760 15:57:44.897381 GENERIC: 0.0: enabled 1
1761 15:57:44.897437 GENERIC: 1.0: enabled 1
1762 15:57:44.897491 GENERIC: 0.0: enabled 1
1763 15:57:44.897546 GENERIC: 1.0: enabled 1
1764 15:57:44.897614 USB0 port 0: enabled 1
1765 15:57:44.897669 GENERIC: 0.0: enabled 1
1766 15:57:44.897741 USB0 port 0: enabled 1
1767 15:57:44.897809 GENERIC: 0.0: enabled 1
1768 15:57:44.897864 I2C: 00:1a: enabled 1
1769 15:57:44.897919 I2C: 00:31: enabled 1
1770 15:57:44.898012 I2C: 00:32: enabled 1
1771 15:57:44.898075 I2C: 00:10: enabled 1
1772 15:57:44.898130 I2C: 00:15: enabled 1
1773 15:57:44.898209 GENERIC: 0.0: enabled 0
1774 15:57:44.898280 GENERIC: 1.0: enabled 0
1775 15:57:44.898365 GENERIC: 0.0: enabled 1
1776 15:57:44.898435 SPI: 00: enabled 1
1777 15:57:44.898505 SPI: 00: enabled 1
1778 15:57:44.898567 PNP: 0c09.0: enabled 1
1779 15:57:44.898637 GENERIC: 0.0: enabled 1
1780 15:57:44.898703 USB3 port 0: enabled 1
1781 15:57:44.898761 USB3 port 1: enabled 1
1782 15:57:44.898823 USB3 port 2: enabled 0
1783 15:57:44.898889 USB3 port 3: enabled 0
1784 15:57:44.898951 USB2 port 0: enabled 0
1785 15:57:44.899008 USB2 port 1: enabled 1
1786 15:57:44.899072 USB2 port 2: enabled 1
1787 15:57:44.899135 USB2 port 3: enabled 0
1788 15:57:44.899197 USB2 port 4: enabled 1
1789 15:57:44.899252 USB2 port 5: enabled 0
1790 15:57:44.899359 USB2 port 6: enabled 0
1791 15:57:44.899418 USB2 port 7: enabled 0
1792 15:57:44.899481 USB2 port 8: enabled 0
1793 15:57:44.899545 USB2 port 9: enabled 0
1794 15:57:44.899607 USB3 port 0: enabled 0
1795 15:57:44.899663 USB3 port 1: enabled 1
1796 15:57:44.899727 USB3 port 2: enabled 0
1797 15:57:44.899791 USB3 port 3: enabled 0
1798 15:57:44.899853 GENERIC: 0.0: enabled 1
1799 15:57:44.899916 GENERIC: 1.0: enabled 1
1800 15:57:44.899979 APIC: 01: enabled 1
1801 15:57:44.900036 APIC: 03: enabled 1
1802 15:57:44.900098 APIC: 07: enabled 1
1803 15:57:44.900164 APIC: 05: enabled 1
1804 15:57:44.900220 APIC: 04: enabled 1
1805 15:57:44.900274 APIC: 02: enabled 1
1806 15:57:44.900376 APIC: 06: enabled 1
1807 15:57:44.900455 PCI: 01:00.0: enabled 1
1808 15:57:44.900527 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1809 15:57:44.900583 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1810 15:57:44.900649 ELOG: NV offset 0xf30000 size 0x1000
1811 15:57:44.900705 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1812 15:57:44.900786 ELOG: Event(17) added with size 13 at 2023-09-06 15:57:37 UTC
1813 15:57:44.900874 ELOG: Event(92) added with size 9 at 2023-09-06 15:57:37 UTC
1814 15:57:44.900930 ELOG: Event(93) added with size 9 at 2023-09-06 15:57:37 UTC
1815 15:57:44.900994 ELOG: Event(9E) added with size 10 at 2023-09-06 15:57:37 UTC
1816 15:57:44.901058 ELOG: Event(9F) added with size 14 at 2023-09-06 15:57:37 UTC
1817 15:57:44.901123 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1818 15:57:44.901216 ELOG: Event(A1) added with size 10 at 2023-09-06 15:57:37 UTC
1819 15:57:44.901281 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1820 15:57:44.901338 ELOG: Event(A0) added with size 9 at 2023-09-06 15:57:37 UTC
1821 15:57:44.901401 elog_add_boot_reason: Logged dev mode boot
1822 15:57:44.901466 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1823 15:57:44.901523 Finalize devices...
1824 15:57:44.901592 Devices finalized
1825 15:57:44.901660 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1826 15:57:44.901716 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1827 15:57:44.901784 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1828 15:57:44.901846 ME: HFSTS1 : 0x80030055
1829 15:57:44.901910 ME: HFSTS2 : 0x30280116
1830 15:57:44.901966 ME: HFSTS3 : 0x00000050
1831 15:57:44.902029 ME: HFSTS4 : 0x00004000
1832 15:57:44.902086 ME: HFSTS5 : 0x00000000
1833 15:57:44.902149 ME: HFSTS6 : 0x00400006
1834 15:57:44.902212 ME: Manufacturing Mode : YES
1835 15:57:44.902268 ME: SPI Protection Mode Enabled : NO
1836 15:57:44.902322 ME: FW Partition Table : OK
1837 15:57:44.902403 ME: Bringup Loader Failure : NO
1838 15:57:44.902482 ME: Firmware Init Complete : NO
1839 15:57:44.902548 ME: Boot Options Present : NO
1840 15:57:44.902604 ME: Update In Progress : NO
1841 15:57:44.902668 ME: D0i3 Support : YES
1842 15:57:44.902734 ME: Low Power State Enabled : NO
1843 15:57:44.902802 ME: CPU Replaced : YES
1844 15:57:44.902860 ME: CPU Replacement Valid : YES
1845 15:57:44.902915 ME: Current Working State : 5
1846 15:57:44.902985 ME: Current Operation State : 1
1847 15:57:44.903041 ME: Current Operation Mode : 3
1848 15:57:44.903105 ME: Error Code : 0
1849 15:57:44.903161 ME: Enhanced Debug Mode : NO
1850 15:57:44.903225 ME: CPU Debug Disabled : YES
1851 15:57:44.903305 ME: TXT Support : NO
1852 15:57:44.903382 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1853 15:57:44.903447 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1854 15:57:44.903504 CBFS: 'fallback/slic' not found.
1855 15:57:44.903559 ACPI: Writing ACPI tables at 76b01000.
1856 15:57:44.903628 ACPI: * FACS
1857 15:57:44.903685 ACPI: * DSDT
1858 15:57:44.903740 Ramoops buffer: 0x100000@0x76a00000.
1859 15:57:44.903803 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1860 15:57:44.903866 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1861 15:57:44.904146 Google Chrome EC: version:
1862 15:57:44.904222 ro: voema_v2.0.7540-147f8d37d1
1863 15:57:44.904295 rw: voema_v2.0.7540-147f8d37d1
1864 15:57:44.904359 running image: 2
1865 15:57:44.904422 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1866 15:57:44.904488 ACPI: * FADT
1867 15:57:44.904545 SCI is IRQ9
1868 15:57:44.904615 ACPI: added table 1/32, length now 40
1869 15:57:44.904673 ACPI: * SSDT
1870 15:57:44.904737 Found 1 CPU(s) with 8 core(s) each.
1871 15:57:44.904869 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1872 15:57:44.904952 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1873 15:57:44.905011 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1874 15:57:44.905067 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1875 15:57:44.905133 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1876 15:57:44.905189 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1877 15:57:44.905268 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1878 15:57:44.905340 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1879 15:57:44.905404 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1880 15:57:44.905460 \_SB.PCI0.RP09: Added StorageD3Enable property
1881 15:57:44.905525 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1882 15:57:44.905582 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1883 15:57:44.905645 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1884 15:57:44.905701 PS2K: Passing 80 keymaps to kernel
1885 15:57:44.905756 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1886 15:57:44.905825 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1887 15:57:44.905883 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1888 15:57:44.905945 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1889 15:57:44.906009 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1890 15:57:44.906066 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1891 15:57:44.906122 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1892 15:57:44.906187 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1893 15:57:44.906258 ACPI: added table 2/32, length now 44
1894 15:57:44.906354 ACPI: * MCFG
1895 15:57:44.906437 ACPI: added table 3/32, length now 48
1896 15:57:44.906500 ACPI: * TPM2
1897 15:57:44.906557 TPM2 log created at 0x769f0000
1898 15:57:44.906621 ACPI: added table 4/32, length now 52
1899 15:57:44.906684 ACPI: * MADT
1900 15:57:44.906747 SCI is IRQ9
1901 15:57:44.906810 ACPI: added table 5/32, length now 56
1902 15:57:44.906903 current = 76b09850
1903 15:57:44.906959 ACPI: * DMAR
1904 15:57:44.907040 ACPI: added table 6/32, length now 60
1905 15:57:44.907118 ACPI: added table 7/32, length now 64
1906 15:57:44.907181 ACPI: * HPET
1907 15:57:44.907237 ACPI: added table 8/32, length now 68
1908 15:57:44.907301 ACPI: done.
1909 15:57:44.907364 ACPI tables: 35216 bytes.
1910 15:57:44.907433 smbios_write_tables: 769ef000
1911 15:57:44.907505 EC returned error result code 3
1912 15:57:44.907567 Couldn't obtain OEM name from CBI
1913 15:57:44.907646 Create SMBIOS type 16
1914 15:57:44.907715 Create SMBIOS type 17
1915 15:57:44.907780 GENERIC: 0.0 (WIFI Device)
1916 15:57:44.907843 SMBIOS tables: 1750 bytes.
1917 15:57:44.910604 Writing table forward entry at 0x00000500
1918 15:57:44.917324 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1919 15:57:44.920283 Writing coreboot table at 0x76b25000
1920 15:57:44.927239 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1921 15:57:44.930717 1. 0000000000001000-000000000009ffff: RAM
1922 15:57:44.934099 2. 00000000000a0000-00000000000fffff: RESERVED
1923 15:57:44.940472 3. 0000000000100000-00000000769eefff: RAM
1924 15:57:44.943696 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1925 15:57:44.950275 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1926 15:57:44.957328 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1927 15:57:44.960576 7. 0000000077000000-000000007fbfffff: RESERVED
1928 15:57:44.963546 8. 00000000c0000000-00000000cfffffff: RESERVED
1929 15:57:44.970405 9. 00000000f8000000-00000000f9ffffff: RESERVED
1930 15:57:44.973713 10. 00000000fb000000-00000000fb000fff: RESERVED
1931 15:57:44.980104 11. 00000000fe000000-00000000fe00ffff: RESERVED
1932 15:57:44.983631 12. 00000000fed80000-00000000fed87fff: RESERVED
1933 15:57:44.990449 13. 00000000fed90000-00000000fed92fff: RESERVED
1934 15:57:44.993964 14. 00000000feda0000-00000000feda1fff: RESERVED
1935 15:57:45.000063 15. 00000000fedc0000-00000000feddffff: RESERVED
1936 15:57:45.003558 16. 0000000100000000-00000002803fffff: RAM
1937 15:57:45.007009 Passing 4 GPIOs to payload:
1938 15:57:45.010359 NAME | PORT | POLARITY | VALUE
1939 15:57:45.017151 lid | undefined | high | high
1940 15:57:45.020093 power | undefined | high | low
1941 15:57:45.026606 oprom | undefined | high | low
1942 15:57:45.033438 EC in RW | 0x000000e5 | high | high
1943 15:57:45.040332 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 954d
1944 15:57:45.040416 coreboot table: 1576 bytes.
1945 15:57:45.046987 IMD ROOT 0. 0x76fff000 0x00001000
1946 15:57:45.050276 IMD SMALL 1. 0x76ffe000 0x00001000
1947 15:57:45.053390 FSP MEMORY 2. 0x76c4e000 0x003b0000
1948 15:57:45.056640 VPD 3. 0x76c4d000 0x00000367
1949 15:57:45.060258 RO MCACHE 4. 0x76c4c000 0x00000fdc
1950 15:57:45.063613 CONSOLE 5. 0x76c2c000 0x00020000
1951 15:57:45.066907 FMAP 6. 0x76c2b000 0x00000578
1952 15:57:45.069974 TIME STAMP 7. 0x76c2a000 0x00000910
1953 15:57:45.073376 VBOOT WORK 8. 0x76c16000 0x00014000
1954 15:57:45.080120 ROMSTG STCK 9. 0x76c15000 0x00001000
1955 15:57:45.083591 AFTER CAR 10. 0x76c0a000 0x0000b000
1956 15:57:45.086954 RAMSTAGE 11. 0x76b97000 0x00073000
1957 15:57:45.090346 REFCODE 12. 0x76b42000 0x00055000
1958 15:57:45.093837 SMM BACKUP 13. 0x76b32000 0x00010000
1959 15:57:45.096634 4f444749 14. 0x76b30000 0x00002000
1960 15:57:45.100221 EXT VBT15. 0x76b2d000 0x0000219f
1961 15:57:45.103556 COREBOOT 16. 0x76b25000 0x00008000
1962 15:57:45.106987 ACPI 17. 0x76b01000 0x00024000
1963 15:57:45.113413 ACPI GNVS 18. 0x76b00000 0x00001000
1964 15:57:45.116757 RAMOOPS 19. 0x76a00000 0x00100000
1965 15:57:45.120217 TPM2 TCGLOG20. 0x769f0000 0x00010000
1966 15:57:45.123656 SMBIOS 21. 0x769ef000 0x00000800
1967 15:57:45.123743 IMD small region:
1968 15:57:45.130087 IMD ROOT 0. 0x76ffec00 0x00000400
1969 15:57:45.133587 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1970 15:57:45.136988 POWER STATE 2. 0x76ffeb80 0x00000044
1971 15:57:45.140335 ROMSTAGE 3. 0x76ffeb60 0x00000004
1972 15:57:45.143277 MEM INFO 4. 0x76ffe980 0x000001e0
1973 15:57:45.150061 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1974 15:57:45.153722 MTRR: Physical address space:
1975 15:57:45.160142 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1976 15:57:45.166911 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1977 15:57:45.173608 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1978 15:57:45.176521 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1979 15:57:45.183333 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1980 15:57:45.190096 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1981 15:57:45.196704 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1982 15:57:45.199870 MTRR: Fixed MSR 0x250 0x0606060606060606
1983 15:57:45.206713 MTRR: Fixed MSR 0x258 0x0606060606060606
1984 15:57:45.209894 MTRR: Fixed MSR 0x259 0x0000000000000000
1985 15:57:45.213246 MTRR: Fixed MSR 0x268 0x0606060606060606
1986 15:57:45.216662 MTRR: Fixed MSR 0x269 0x0606060606060606
1987 15:57:45.223054 MTRR: Fixed MSR 0x26a 0x0606060606060606
1988 15:57:45.226414 MTRR: Fixed MSR 0x26b 0x0606060606060606
1989 15:57:45.229743 MTRR: Fixed MSR 0x26c 0x0606060606060606
1990 15:57:45.233162 MTRR: Fixed MSR 0x26d 0x0606060606060606
1991 15:57:45.236575 MTRR: Fixed MSR 0x26e 0x0606060606060606
1992 15:57:45.242974 MTRR: Fixed MSR 0x26f 0x0606060606060606
1993 15:57:45.246469 call enable_fixed_mtrr()
1994 15:57:45.249956 CPU physical address size: 39 bits
1995 15:57:45.253319 MTRR: default type WB/UC MTRR counts: 6/6.
1996 15:57:45.256538 MTRR: UC selected as default type.
1997 15:57:45.262901 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1998 15:57:45.269730 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1999 15:57:45.276364 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2000 15:57:45.282865 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2001 15:57:45.289486 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2002 15:57:45.296149 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2003 15:57:45.296286
2004 15:57:45.296407 MTRR check
2005 15:57:45.299645 Fixed MTRRs : Enabled
2006 15:57:45.303002 Variable MTRRs: Enabled
2007 15:57:45.303131
2008 15:57:45.306255 MTRR: Fixed MSR 0x250 0x0606060606060606
2009 15:57:45.309571 MTRR: Fixed MSR 0x258 0x0606060606060606
2010 15:57:45.316118 MTRR: Fixed MSR 0x259 0x0000000000000000
2011 15:57:45.319426 MTRR: Fixed MSR 0x268 0x0606060606060606
2012 15:57:45.322814 MTRR: Fixed MSR 0x269 0x0606060606060606
2013 15:57:45.326263 MTRR: Fixed MSR 0x26a 0x0606060606060606
2014 15:57:45.333001 MTRR: Fixed MSR 0x26b 0x0606060606060606
2015 15:57:45.335991 MTRR: Fixed MSR 0x26c 0x0606060606060606
2016 15:57:45.339432 MTRR: Fixed MSR 0x26d 0x0606060606060606
2017 15:57:45.342888 MTRR: Fixed MSR 0x26e 0x0606060606060606
2018 15:57:45.349352 MTRR: Fixed MSR 0x26f 0x0606060606060606
2019 15:57:45.356227 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2020 15:57:45.356341 call enable_fixed_mtrr()
2021 15:57:45.360045 Checking cr50 for pending updates
2022 15:57:45.363188 CPU physical address size: 39 bits
2023 15:57:45.370262 MTRR: Fixed MSR 0x250 0x0606060606060606
2024 15:57:45.373269 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 15:57:45.376594 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 15:57:45.380109 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 15:57:45.383523 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 15:57:45.389896 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 15:57:45.393162 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 15:57:45.396429 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 15:57:45.399832 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 15:57:45.406652 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 15:57:45.409865 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 15:57:45.413027 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 15:57:45.419937 MTRR: Fixed MSR 0x258 0x0606060606060606
2036 15:57:45.420043 call enable_fixed_mtrr()
2037 15:57:45.426478 MTRR: Fixed MSR 0x259 0x0000000000000000
2038 15:57:45.429860 MTRR: Fixed MSR 0x268 0x0606060606060606
2039 15:57:45.433307 MTRR: Fixed MSR 0x269 0x0606060606060606
2040 15:57:45.436778 MTRR: Fixed MSR 0x26a 0x0606060606060606
2041 15:57:45.443254 MTRR: Fixed MSR 0x26b 0x0606060606060606
2042 15:57:45.446877 MTRR: Fixed MSR 0x26c 0x0606060606060606
2043 15:57:45.449732 MTRR: Fixed MSR 0x26d 0x0606060606060606
2044 15:57:45.453153 MTRR: Fixed MSR 0x26e 0x0606060606060606
2045 15:57:45.456598 MTRR: Fixed MSR 0x26f 0x0606060606060606
2046 15:57:45.462962 CPU physical address size: 39 bits
2047 15:57:45.466269 call enable_fixed_mtrr()
2048 15:57:45.469614 MTRR: Fixed MSR 0x250 0x0606060606060606
2049 15:57:45.473141 MTRR: Fixed MSR 0x250 0x0606060606060606
2050 15:57:45.479840 MTRR: Fixed MSR 0x258 0x0606060606060606
2051 15:57:45.483147 MTRR: Fixed MSR 0x259 0x0000000000000000
2052 15:57:45.486395 MTRR: Fixed MSR 0x268 0x0606060606060606
2053 15:57:45.489968 MTRR: Fixed MSR 0x269 0x0606060606060606
2054 15:57:45.496331 MTRR: Fixed MSR 0x26a 0x0606060606060606
2055 15:57:45.499618 MTRR: Fixed MSR 0x26b 0x0606060606060606
2056 15:57:45.502914 MTRR: Fixed MSR 0x26c 0x0606060606060606
2057 15:57:45.506457 MTRR: Fixed MSR 0x26d 0x0606060606060606
2058 15:57:45.509824 MTRR: Fixed MSR 0x26e 0x0606060606060606
2059 15:57:45.516163 MTRR: Fixed MSR 0x26f 0x0606060606060606
2060 15:57:45.519615 MTRR: Fixed MSR 0x258 0x0606060606060606
2061 15:57:45.523008 call enable_fixed_mtrr()
2062 15:57:45.526684 MTRR: Fixed MSR 0x259 0x0000000000000000
2063 15:57:45.529651 MTRR: Fixed MSR 0x268 0x0606060606060606
2064 15:57:45.535996 MTRR: Fixed MSR 0x269 0x0606060606060606
2065 15:57:45.539478 MTRR: Fixed MSR 0x26a 0x0606060606060606
2066 15:57:45.543006 MTRR: Fixed MSR 0x26b 0x0606060606060606
2067 15:57:45.546518 MTRR: Fixed MSR 0x26c 0x0606060606060606
2068 15:57:45.552823 MTRR: Fixed MSR 0x26d 0x0606060606060606
2069 15:57:45.556228 MTRR: Fixed MSR 0x26e 0x0606060606060606
2070 15:57:45.559681 MTRR: Fixed MSR 0x26f 0x0606060606060606
2071 15:57:45.562737 CPU physical address size: 39 bits
2072 15:57:45.570333 call enable_fixed_mtrr()
2073 15:57:45.570422 Reading cr50 TPM mode
2074 15:57:45.574093 MTRR: Fixed MSR 0x250 0x0606060606060606
2075 15:57:45.577523 MTRR: Fixed MSR 0x250 0x0606060606060606
2076 15:57:45.584334 MTRR: Fixed MSR 0x258 0x0606060606060606
2077 15:57:45.587451 MTRR: Fixed MSR 0x259 0x0000000000000000
2078 15:57:45.590885 MTRR: Fixed MSR 0x268 0x0606060606060606
2079 15:57:45.594345 MTRR: Fixed MSR 0x269 0x0606060606060606
2080 15:57:45.597317 MTRR: Fixed MSR 0x26a 0x0606060606060606
2081 15:57:45.603802 MTRR: Fixed MSR 0x26b 0x0606060606060606
2082 15:57:45.607443 MTRR: Fixed MSR 0x26c 0x0606060606060606
2083 15:57:45.610800 MTRR: Fixed MSR 0x26d 0x0606060606060606
2084 15:57:45.613736 MTRR: Fixed MSR 0x26e 0x0606060606060606
2085 15:57:45.620583 MTRR: Fixed MSR 0x26f 0x0606060606060606
2086 15:57:45.623982 MTRR: Fixed MSR 0x258 0x0606060606060606
2087 15:57:45.627271 call enable_fixed_mtrr()
2088 15:57:45.630475 MTRR: Fixed MSR 0x259 0x0000000000000000
2089 15:57:45.633925 MTRR: Fixed MSR 0x268 0x0606060606060606
2090 15:57:45.640433 MTRR: Fixed MSR 0x269 0x0606060606060606
2091 15:57:45.644050 MTRR: Fixed MSR 0x26a 0x0606060606060606
2092 15:57:45.647475 MTRR: Fixed MSR 0x26b 0x0606060606060606
2093 15:57:45.650602 MTRR: Fixed MSR 0x26c 0x0606060606060606
2094 15:57:45.657248 MTRR: Fixed MSR 0x26d 0x0606060606060606
2095 15:57:45.660640 MTRR: Fixed MSR 0x26e 0x0606060606060606
2096 15:57:45.664197 MTRR: Fixed MSR 0x26f 0x0606060606060606
2097 15:57:45.667172 CPU physical address size: 39 bits
2098 15:57:45.671566 call enable_fixed_mtrr()
2099 15:57:45.674876 CPU physical address size: 39 bits
2100 15:57:45.678223 CPU physical address size: 39 bits
2101 15:57:45.681626 CPU physical address size: 39 bits
2102 15:57:45.688133 BS: BS_PAYLOAD_LOAD entry times (exec / console): 214 / 6 ms
2103 15:57:45.694831 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2104 15:57:45.701198 Checking segment from ROM address 0xffc02b38
2105 15:57:45.705194 Checking segment from ROM address 0xffc02b54
2106 15:57:45.711224 Loading segment from ROM address 0xffc02b38
2107 15:57:45.711343 code (compression=0)
2108 15:57:45.721286 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2109 15:57:45.728068 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2110 15:57:45.731022 it's not compressed!
2111 15:57:45.870659 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2112 15:57:45.876896 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2113 15:57:45.883434 Loading segment from ROM address 0xffc02b54
2114 15:57:45.883534 Entry Point 0x30000000
2115 15:57:45.886984 Loaded segments
2116 15:57:45.893866 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2117 15:57:45.936309 Finalizing chipset.
2118 15:57:45.939757 Finalizing SMM.
2119 15:57:45.939897 APMC done.
2120 15:57:45.946515 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2121 15:57:45.949739 mp_park_aps done after 0 msecs.
2122 15:57:45.953028 Jumping to boot code at 0x30000000(0x76b25000)
2123 15:57:45.962795 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2124 15:57:45.962907
2125 15:57:45.963024
2126 15:57:45.963135
2127 15:57:45.966148 Starting depthcharge on Voema...
2128 15:57:45.966227
2129 15:57:45.966582 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2130 15:57:45.966681 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2131 15:57:45.966765 Setting prompt string to ['volteer:']
2132 15:57:45.966846 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2133 15:57:45.976299 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2134 15:57:45.976383
2135 15:57:45.982814 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2136 15:57:45.982938
2137 15:57:45.989485 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2138 15:57:45.989568
2139 15:57:45.992921 Failed to find eMMC card reader
2140 15:57:45.993034
2141 15:57:45.993110 Wipe memory regions:
2142 15:57:45.993174
2143 15:57:45.999232 [0x00000000001000, 0x000000000a0000)
2144 15:57:45.999353
2145 15:57:46.002408 [0x00000000100000, 0x00000030000000)
2146 15:57:46.028149
2147 15:57:46.031120 [0x00000032662db0, 0x000000769ef000)
2148 15:57:46.067714
2149 15:57:46.071000 [0x00000100000000, 0x00000280400000)
2150 15:57:46.273065
2151 15:57:46.276477 ec_init: CrosEC protocol v3 supported (256, 256)
2152 15:57:46.276632
2153 15:57:46.282806 update_port_state: port C0 state: usb enable 1 mux conn 0
2154 15:57:46.282938
2155 15:57:46.292807 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2156 15:57:46.292949
2157 15:57:46.299393 pmc_check_ipc_sts: STS_BUSY done after 1661 us
2158 15:57:46.299537
2159 15:57:46.302845 send_conn_disc_msg: pmc_send_cmd succeeded
2160 15:57:46.734622
2161 15:57:46.734780 R8152: Initializing
2162 15:57:46.734872
2163 15:57:46.737805 Version 6 (ocp_data = 5c30)
2164 15:57:46.737892
2165 15:57:46.741265 R8152: Done initializing
2166 15:57:46.741362
2167 15:57:46.744767 Adding net device
2168 15:57:47.045996
2169 15:57:47.049332 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2170 15:57:47.049419
2171 15:57:47.049488
2172 15:57:47.049552
2173 15:57:47.052918 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 15:57:47.153263 volteer: tftpboot 192.168.201.1 11447427/tftp-deploy-mccxfu7d/kernel/bzImage 11447427/tftp-deploy-mccxfu7d/kernel/cmdline 11447427/tftp-deploy-mccxfu7d/ramdisk/ramdisk.cpio.gz
2176 15:57:47.153424 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2177 15:57:47.153522 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2178 15:57:47.157416 tftpboot 192.168.201.1 11447427/tftp-deploy-mccxfu7d/kernel/bzIploy-mccxfu7d/kernel/cmdline 11447427/tftp-deploy-mccxfu7d/ramdisk/ramdisk.cpio.gz
2179 15:57:47.157503
2180 15:57:47.157572 Waiting for link
2181 15:57:47.362669
2182 15:57:47.362847 done.
2183 15:57:47.362951
2184 15:57:47.363056 MAC: 00:24:32:30:78:74
2185 15:57:47.363166
2186 15:57:47.365595 Sending DHCP discover... done.
2187 15:57:47.365678
2188 15:57:47.369157 Waiting for reply... done.
2189 15:57:47.369239
2190 15:57:47.372343 Sending DHCP request... done.
2191 15:57:47.372427
2192 15:57:47.381372 Waiting for reply... done.
2193 15:57:47.381466
2194 15:57:47.381535 My ip is 192.168.201.14
2195 15:57:47.381599
2196 15:57:47.384665 The DHCP server ip is 192.168.201.1
2197 15:57:47.387779
2198 15:57:47.391063 TFTP server IP predefined by user: 192.168.201.1
2199 15:57:47.391150
2200 15:57:47.397950 Bootfile predefined by user: 11447427/tftp-deploy-mccxfu7d/kernel/bzImage
2201 15:57:47.398038
2202 15:57:47.400819 Sending tftp read request... done.
2203 15:57:47.400905
2204 15:57:47.404240 Waiting for the transfer...
2205 15:57:47.404376
2206 15:57:47.948965 00000000 ################################################################
2207 15:57:47.949132
2208 15:57:48.484006 00080000 ################################################################
2209 15:57:48.484199
2210 15:57:49.017179 00100000 ################################################################
2211 15:57:49.017340
2212 15:57:49.551633 00180000 ################################################################
2213 15:57:49.551807
2214 15:57:50.068359 00200000 ################################################################
2215 15:57:50.068525
2216 15:57:50.595534 00280000 ################################################################
2217 15:57:50.595692
2218 15:57:51.121079 00300000 ################################################################
2219 15:57:51.121297
2220 15:57:51.644003 00380000 ################################################################
2221 15:57:51.644144
2222 15:57:52.182304 00400000 ################################################################
2223 15:57:52.182443
2224 15:57:52.718536 00480000 ################################################################
2225 15:57:52.718775
2226 15:57:53.247851 00500000 ################################################################
2227 15:57:53.248057
2228 15:57:53.780862 00580000 ################################################################
2229 15:57:53.781010
2230 15:57:54.334539 00600000 ################################################################
2231 15:57:54.334728
2232 15:57:54.846340 00680000 ################################################################
2233 15:57:54.846501
2234 15:57:55.388711 00700000 ################################################################
2235 15:57:55.389003
2236 15:57:55.936050 00780000 ################################################################
2237 15:57:55.936258
2238 15:57:56.042482 00800000 ############# done.
2239 15:57:56.042680
2240 15:57:56.045877 The bootfile was 8490896 bytes long.
2241 15:57:56.046052
2242 15:57:56.049166 Sending tftp read request... done.
2243 15:57:56.049270
2244 15:57:56.052662 Waiting for the transfer...
2245 15:57:56.052794
2246 15:57:56.594370 00000000 ################################################################
2247 15:57:56.594544
2248 15:57:57.128783 00080000 ################################################################
2249 15:57:57.129016
2250 15:57:57.677738 00100000 ################################################################
2251 15:57:57.677953
2252 15:57:58.214067 00180000 ################################################################
2253 15:57:58.214203
2254 15:57:58.765304 00200000 ################################################################
2255 15:57:58.765457
2256 15:57:59.303054 00280000 ################################################################
2257 15:57:59.303193
2258 15:57:59.850871 00300000 ################################################################
2259 15:57:59.851086
2260 15:58:00.405868 00380000 ################################################################
2261 15:58:00.406009
2262 15:58:00.942964 00400000 ################################################################
2263 15:58:00.943104
2264 15:58:01.498124 00480000 ################################################################
2265 15:58:01.498266
2266 15:58:02.046239 00500000 ############################################################### done.
2267 15:58:02.046413
2268 15:58:02.049727 Sending tftp read request... done.
2269 15:58:02.049815
2270 15:58:02.052661 Waiting for the transfer...
2271 15:58:02.052748
2272 15:58:02.052827 00000000 # done.
2273 15:58:02.052894
2274 15:58:02.062823 Command line loaded dynamically from TFTP file: 11447427/tftp-deploy-mccxfu7d/kernel/cmdline
2275 15:58:02.062911
2276 15:58:02.085769 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11447427/extract-nfsrootfs-42oveg24,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2277 15:58:02.092002
2278 15:58:02.094937 Shutting down all USB controllers.
2279 15:58:02.095050
2280 15:58:02.095148 Removing current net device
2281 15:58:02.095241
2282 15:58:02.098326 Finalizing coreboot
2283 15:58:02.098413
2284 15:58:02.105102 Exiting depthcharge with code 4 at timestamp: 24881012
2285 15:58:02.105195
2286 15:58:02.105264
2287 15:58:02.105328 Starting kernel ...
2288 15:58:02.105389
2289 15:58:02.105447
2290 15:58:02.105809 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2291 15:58:02.105909 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2292 15:58:02.105988 Setting prompt string to ['Linux version [0-9]']
2293 15:58:02.106059 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2294 15:58:02.106129 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2296 16:02:30.106190 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2298 16:02:30.106399 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2300 16:02:30.106559 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2303 16:02:30.106814 end: 2 depthcharge-action (duration 00:05:00) [common]
2305 16:02:30.107033 Cleaning after the job
2306 16:02:30.107126 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11447427/tftp-deploy-mccxfu7d/ramdisk
2307 16:02:30.107892 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11447427/tftp-deploy-mccxfu7d/kernel
2308 16:02:30.108872 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11447427/tftp-deploy-mccxfu7d/nfsrootfs
2309 16:02:30.164954 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11447427/tftp-deploy-mccxfu7d/modules
2310 16:02:30.165407 start: 5.1 power-off (timeout 00:00:30) [common]
2311 16:02:30.165579 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=off'
2312 16:02:30.247094 >> Command sent successfully.
2313 16:02:30.249883 Returned 0 in 0 seconds
2314 16:02:30.350279 end: 5.1 power-off (duration 00:00:00) [common]
2316 16:02:30.350632 start: 5.2 read-feedback (timeout 00:10:00) [common]
2317 16:02:30.350892 Listened to connection for namespace 'common' for up to 1s
2318 16:02:31.351391 Finalising connection for namespace 'common'
2319 16:02:31.351583 Disconnecting from shell: Finalise
2320 16:02:31.351666
2321 16:02:31.452095 end: 5.2 read-feedback (duration 00:00:01) [common]
2322 16:02:31.452313 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11447427
2323 16:02:31.710629 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11447427
2324 16:02:31.710858 JobError: Your job cannot terminate cleanly.