Boot log: acer-cb317-1h-c3z6-dedede
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:54:48.854708 lava-dispatcher, installed at version: 2023.08
2 17:54:48.854918 start: 0 validate
3 17:54:48.855048 Start time: 2023-10-09 17:54:48.855039+00:00 (UTC)
4 17:54:48.855175 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:54:48.855305 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 17:54:49.122736 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:54:49.122897 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:54:49.388561 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:54:49.388785 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1778-g3b01feff09495%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:54:49.657383 validate duration: 0.80
12 17:54:49.657792 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:54:49.657912 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:54:49.658023 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:54:49.658163 Not decompressing ramdisk as can be used compressed.
16 17:54:49.658261 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 17:54:49.658344 saving as /var/lib/lava/dispatcher/tmp/11712600/tftp-deploy-ewwgwv7j/ramdisk/rootfs.cpio.gz
18 17:54:49.658441 total size: 8418130 (8 MB)
19 17:54:49.659897 progress 0 % (0 MB)
20 17:54:49.662329 progress 5 % (0 MB)
21 17:54:49.664804 progress 10 % (0 MB)
22 17:54:49.667415 progress 15 % (1 MB)
23 17:54:49.669953 progress 20 % (1 MB)
24 17:54:49.672452 progress 25 % (2 MB)
25 17:54:49.674948 progress 30 % (2 MB)
26 17:54:49.677258 progress 35 % (2 MB)
27 17:54:49.679759 progress 40 % (3 MB)
28 17:54:49.682271 progress 45 % (3 MB)
29 17:54:49.684701 progress 50 % (4 MB)
30 17:54:49.687139 progress 55 % (4 MB)
31 17:54:49.689570 progress 60 % (4 MB)
32 17:54:49.691780 progress 65 % (5 MB)
33 17:54:49.694148 progress 70 % (5 MB)
34 17:54:49.696560 progress 75 % (6 MB)
35 17:54:49.698926 progress 80 % (6 MB)
36 17:54:49.701331 progress 85 % (6 MB)
37 17:54:49.703667 progress 90 % (7 MB)
38 17:54:49.705972 progress 95 % (7 MB)
39 17:54:49.708137 progress 100 % (8 MB)
40 17:54:49.708414 8 MB downloaded in 0.05 s (160.66 MB/s)
41 17:54:49.708627 end: 1.1.1 http-download (duration 00:00:00) [common]
43 17:54:49.709018 end: 1.1 download-retry (duration 00:00:00) [common]
44 17:54:49.709139 start: 1.2 download-retry (timeout 00:10:00) [common]
45 17:54:49.709261 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 17:54:49.709442 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:54:49.709547 saving as /var/lib/lava/dispatcher/tmp/11712600/tftp-deploy-ewwgwv7j/kernel/bzImage
48 17:54:49.709640 total size: 8490896 (8 MB)
49 17:54:49.709733 No compression specified
50 17:54:49.710930 progress 0 % (0 MB)
51 17:54:49.713222 progress 5 % (0 MB)
52 17:54:49.715610 progress 10 % (0 MB)
53 17:54:49.717963 progress 15 % (1 MB)
54 17:54:49.720407 progress 20 % (1 MB)
55 17:54:49.722877 progress 25 % (2 MB)
56 17:54:49.725345 progress 30 % (2 MB)
57 17:54:49.727840 progress 35 % (2 MB)
58 17:54:49.730297 progress 40 % (3 MB)
59 17:54:49.732690 progress 45 % (3 MB)
60 17:54:49.735151 progress 50 % (4 MB)
61 17:54:49.737552 progress 55 % (4 MB)
62 17:54:49.739972 progress 60 % (4 MB)
63 17:54:49.742340 progress 65 % (5 MB)
64 17:54:49.744609 progress 70 % (5 MB)
65 17:54:49.746998 progress 75 % (6 MB)
66 17:54:49.749394 progress 80 % (6 MB)
67 17:54:49.751706 progress 85 % (6 MB)
68 17:54:49.754001 progress 90 % (7 MB)
69 17:54:49.756266 progress 95 % (7 MB)
70 17:54:49.758561 progress 100 % (8 MB)
71 17:54:49.758686 8 MB downloaded in 0.05 s (165.11 MB/s)
72 17:54:49.758839 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:54:49.759073 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:54:49.759161 start: 1.3 download-retry (timeout 00:10:00) [common]
76 17:54:49.759248 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 17:54:49.759397 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1778-g3b01feff09495/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:54:49.759473 saving as /var/lib/lava/dispatcher/tmp/11712600/tftp-deploy-ewwgwv7j/modules/modules.tar
79 17:54:49.759535 total size: 250928 (0 MB)
80 17:54:49.759599 Using unxz to decompress xz
81 17:54:49.763916 progress 13 % (0 MB)
82 17:54:49.764373 progress 26 % (0 MB)
83 17:54:49.764629 progress 39 % (0 MB)
84 17:54:49.766249 progress 52 % (0 MB)
85 17:54:49.768175 progress 65 % (0 MB)
86 17:54:49.770151 progress 78 % (0 MB)
87 17:54:49.772069 progress 91 % (0 MB)
88 17:54:49.773850 progress 100 % (0 MB)
89 17:54:49.779624 0 MB downloaded in 0.02 s (11.92 MB/s)
90 17:54:49.779900 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:54:49.780297 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:54:49.780428 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 17:54:49.780558 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 17:54:49.780654 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:54:49.780784 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 17:54:49.781068 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf
98 17:54:49.781224 makedir: /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin
99 17:54:49.781369 makedir: /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/tests
100 17:54:49.781508 makedir: /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/results
101 17:54:49.781658 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-add-keys
102 17:54:49.781850 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-add-sources
103 17:54:49.781989 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-background-process-start
104 17:54:49.782135 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-background-process-stop
105 17:54:49.782267 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-common-functions
106 17:54:49.782397 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-echo-ipv4
107 17:54:49.782527 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-install-packages
108 17:54:49.782661 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-installed-packages
109 17:54:49.782790 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-os-build
110 17:54:49.782919 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-probe-channel
111 17:54:49.783047 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-probe-ip
112 17:54:49.783176 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-target-ip
113 17:54:49.783304 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-target-mac
114 17:54:49.783430 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-target-storage
115 17:54:49.783561 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-test-case
116 17:54:49.783707 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-test-event
117 17:54:49.783840 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-test-feedback
118 17:54:49.783971 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-test-raise
119 17:54:49.784105 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-test-reference
120 17:54:49.784237 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-test-runner
121 17:54:49.784376 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-test-set
122 17:54:49.784543 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-test-shell
123 17:54:49.784710 Updating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-install-packages (oe)
124 17:54:49.784902 Updating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/bin/lava-installed-packages (oe)
125 17:54:49.785067 Creating /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/environment
126 17:54:49.785193 LAVA metadata
127 17:54:49.785300 - LAVA_JOB_ID=11712600
128 17:54:49.785398 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:54:49.785546 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 17:54:49.785643 skipped lava-vland-overlay
131 17:54:49.785756 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:54:49.785889 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 17:54:49.785971 skipped lava-multinode-overlay
134 17:54:49.786060 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:54:49.786179 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 17:54:49.786289 Loading test definitions
137 17:54:49.786424 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 17:54:49.786536 Using /lava-11712600 at stage 0
139 17:54:49.787004 uuid=11712600_1.4.2.3.1 testdef=None
140 17:54:49.787127 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:54:49.787249 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 17:54:49.787906 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:54:49.788134 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 17:54:49.788969 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:54:49.789280 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 17:54:49.790249 runner path: /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/0/tests/0_dmesg test_uuid 11712600_1.4.2.3.1
149 17:54:49.790449 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:54:49.790818 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 17:54:49.790922 Using /lava-11712600 at stage 1
153 17:54:49.791371 uuid=11712600_1.4.2.3.5 testdef=None
154 17:54:49.791494 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 17:54:49.791610 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 17:54:49.792331 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 17:54:49.792682 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 17:54:49.793661 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 17:54:49.793932 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 17:54:49.794597 runner path: /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/1/tests/1_bootrr test_uuid 11712600_1.4.2.3.5
163 17:54:49.794754 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 17:54:49.794974 Creating lava-test-runner.conf files
166 17:54:49.795044 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/0 for stage 0
167 17:54:49.795171 - 0_dmesg
168 17:54:49.795284 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11712600/lava-overlay-ztjt69xf/lava-11712600/1 for stage 1
169 17:54:49.795408 - 1_bootrr
170 17:54:49.795537 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 17:54:49.795654 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 17:54:49.804709 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 17:54:49.804854 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 17:54:49.804949 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 17:54:49.805039 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 17:54:49.805127 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 17:54:50.062689 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 17:54:50.063080 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 17:54:50.063211 extracting modules file /var/lib/lava/dispatcher/tmp/11712600/tftp-deploy-ewwgwv7j/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11712600/extract-overlay-ramdisk-o02m7wyg/ramdisk
180 17:54:50.078495 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 17:54:50.078666 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 17:54:50.078770 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712600/compress-overlay-xbcubn69/overlay-1.4.2.4.tar.gz to ramdisk
183 17:54:50.078844 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11712600/compress-overlay-xbcubn69/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11712600/extract-overlay-ramdisk-o02m7wyg/ramdisk
184 17:54:50.088743 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 17:54:50.088930 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 17:54:50.089062 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 17:54:50.089183 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 17:54:50.089297 Building ramdisk /var/lib/lava/dispatcher/tmp/11712600/extract-overlay-ramdisk-o02m7wyg/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11712600/extract-overlay-ramdisk-o02m7wyg/ramdisk
189 17:54:50.216997 >> 49788 blocks
190 17:54:51.082007 rename /var/lib/lava/dispatcher/tmp/11712600/extract-overlay-ramdisk-o02m7wyg/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11712600/tftp-deploy-ewwgwv7j/ramdisk/ramdisk.cpio.gz
191 17:54:51.082441 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 17:54:51.082567 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 17:54:51.082667 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 17:54:51.082764 No mkimage arch provided, not using FIT.
195 17:54:51.082853 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 17:54:51.082935 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 17:54:51.083040 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 17:54:51.083135 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 17:54:51.083216 No LXC device requested
200 17:54:51.083296 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 17:54:51.083379 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 17:54:51.083460 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 17:54:51.083533 Checking files for TFTP limit of 4294967296 bytes.
204 17:54:51.083946 end: 1 tftp-deploy (duration 00:00:01) [common]
205 17:54:51.084049 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 17:54:51.084169 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 17:54:51.084306 substitutions:
208 17:54:51.084374 - {DTB}: None
209 17:54:51.084437 - {INITRD}: 11712600/tftp-deploy-ewwgwv7j/ramdisk/ramdisk.cpio.gz
210 17:54:51.084498 - {KERNEL}: 11712600/tftp-deploy-ewwgwv7j/kernel/bzImage
211 17:54:51.084554 - {LAVA_MAC}: None
212 17:54:51.084610 - {PRESEED_CONFIG}: None
213 17:54:51.084665 - {PRESEED_LOCAL}: None
214 17:54:51.084719 - {RAMDISK}: 11712600/tftp-deploy-ewwgwv7j/ramdisk/ramdisk.cpio.gz
215 17:54:51.084773 - {ROOT_PART}: None
216 17:54:51.084836 - {ROOT}: None
217 17:54:51.084889 - {SERVER_IP}: 192.168.201.1
218 17:54:51.084965 - {TEE}: None
219 17:54:51.085049 Parsed boot commands:
220 17:54:51.085127 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 17:54:51.085325 Parsed boot commands: tftpboot 192.168.201.1 11712600/tftp-deploy-ewwgwv7j/kernel/bzImage 11712600/tftp-deploy-ewwgwv7j/kernel/cmdline 11712600/tftp-deploy-ewwgwv7j/ramdisk/ramdisk.cpio.gz
222 17:54:51.085461 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 17:54:51.085629 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 17:54:51.085751 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 17:54:51.085882 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 17:54:51.085954 Not connected, no need to disconnect.
227 17:54:51.086028 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 17:54:51.086118 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 17:54:51.086221 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-9'
230 17:54:51.090565 Setting prompt string to ['lava-test: # ']
231 17:54:51.091042 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 17:54:51.091192 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 17:54:51.091348 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 17:54:51.091484 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 17:54:51.091792 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-9' '--port=1' '--command=reboot'
236 17:54:56.226150 >> Command sent successfully.
237 17:54:56.228640 Returned 0 in 5 seconds
238 17:54:56.329039 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 17:54:56.329378 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 17:54:56.329480 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 17:54:56.329570 Setting prompt string to 'Starting depthcharge on Magolor...'
243 17:54:56.329639 Changing prompt to 'Starting depthcharge on Magolor...'
244 17:54:56.329707 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
245 17:54:56.330013 [Enter `^Ec?' for help]
246 17:54:57.475191
247 17:54:57.475344
248 17:54:57.482552 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
249 17:54:57.490097 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
250 17:54:57.494235 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
251 17:54:57.497462 CPU: AES supported, TXT NOT supported, VT supported
252 17:54:57.503788 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
253 17:54:57.507340 PCH: device id 4d87 (rev 01) is Jasperlake Super
254 17:54:57.513908 IGD: device id 4e55 (rev 01) is Jasperlake GT4
255 17:54:57.517298 VBOOT: Loading verstage.
256 17:54:57.520627 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 17:54:57.526989 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 17:54:57.531094 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 17:54:57.538239 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
260 17:54:57.538320
261 17:54:57.538386
262 17:54:57.547891 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
263 17:54:57.563018 Probing TPM: . done!
264 17:54:57.566607 TPM ready after 0 ms
265 17:54:57.569956 Connected to device vid:did:rid of 1ae0:0028:00
266 17:54:57.581595 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
267 17:54:57.588826 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
268 17:54:57.636343 Initialized TPM device CR50 revision 0
269 17:54:57.645885 tlcl_send_startup: Startup return code is 0
270 17:54:57.645976 TPM: setup succeeded
271 17:54:57.664603 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 17:54:57.678454 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 17:54:57.691763 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 17:54:57.703565 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 17:54:57.707315 Chrome EC: UHEPI supported
276 17:54:57.707393 Phase 1
277 17:54:57.710899 FMAP: area GBB found @ c05000 (12288 bytes)
278 17:54:57.720812 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 17:54:57.724270 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 17:54:57.727430 Recovery requested (1009000e)
281 17:54:57.734305 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 17:54:57.744182 tlcl_extend: response is 0
283 17:54:57.751005 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 17:54:57.760271 tlcl_extend: response is 0
285 17:54:57.766864 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 17:54:57.770395 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
287 17:54:57.776821 BS: verstage times (exec / console): total (unknown) / 124 ms
288 17:54:57.776905
289 17:54:57.780427
290 17:54:57.790100 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
291 17:54:57.796756 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
292 17:54:57.799961 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
293 17:54:57.803663 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
294 17:54:57.810160 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
295 17:54:57.813390 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
296 17:54:57.816665 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
297 17:54:57.819843 TCO_STS: 0000 0001
298 17:54:57.823102 GEN_PMCON: d0015038 00002200
299 17:54:57.826557 GBLRST_CAUSE: 00000000 00000000
300 17:54:57.826650 prev_sleep_state 5
301 17:54:57.830018 Boot Count incremented to 5709
302 17:54:57.836974 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 17:54:57.840179 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
304 17:54:57.844392 Chrome EC: UHEPI supported
305 17:54:57.850874 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
306 17:54:57.857408 Probing TPM: done!
307 17:54:57.864034 Connected to device vid:did:rid of 1ae0:0028:00
308 17:54:57.873675 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
309 17:54:57.885092 Initialized TPM device CR50 revision 0
310 17:54:57.895205 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 17:54:57.902052 MRC: Hash idx 0x100b comparison successful.
312 17:54:57.905381 MRC cache found, size 5458
313 17:54:57.905464 bootmode is set to: 2
314 17:54:57.908444 SPD INDEX = 0
315 17:54:57.911728 CBFS: Found 'spd.bin' @0x40c40 size 0x600
316 17:54:57.915234 SPD: module type is LPDDR4X
317 17:54:57.921718 SPD: module part number is MT53E512M32D2NP-046 WT:E
318 17:54:57.928198 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
319 17:54:57.931534 SPD: device width 16 bits, bus width 32 bits
320 17:54:57.935129 SPD: module size is 4096 MB (per channel)
321 17:54:57.938321 meminit_channels: DRAM half-populated
322 17:54:58.021958 CBMEM:
323 17:54:58.025146 IMD: root @ 0x76fff000 254 entries.
324 17:54:58.028557 IMD: root @ 0x76ffec00 62 entries.
325 17:54:58.031749 FMAP: area RO_VPD found @ c00000 (16384 bytes)
326 17:54:58.038347 WARNING: RO_VPD is uninitialized or empty.
327 17:54:58.041523 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
328 17:54:58.045358 External stage cache:
329 17:54:58.048548 IMD: root @ 0x7b3ff000 254 entries.
330 17:54:58.051844 IMD: root @ 0x7b3fec00 62 entries.
331 17:54:58.061823 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
332 17:54:58.068309 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 17:54:58.075099 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
334 17:54:58.083556 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 17:54:58.090192 cse_lite: Skip switching to RW in the recovery path
336 17:54:58.090291 1 DIMMs found
337 17:54:58.090360 SMM Memory Map
338 17:54:58.093430 SMRAM : 0x7b000000 0x800000
339 17:54:58.099889 Subregion 0: 0x7b000000 0x200000
340 17:54:58.103346 Subregion 1: 0x7b200000 0x200000
341 17:54:58.106416 Subregion 2: 0x7b400000 0x400000
342 17:54:58.106498 top_of_ram = 0x77000000
343 17:54:58.113049 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 17:54:58.119817 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 17:54:58.122958 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 17:54:58.129485 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
347 17:54:58.135967 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
348 17:54:58.146082 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
349 17:54:58.149275 Processing 188 relocs. Offset value of 0x74c0e000
350 17:54:58.158564 BS: romstage times (exec / console): total (unknown) / 255 ms
351 17:54:58.163180
352 17:54:58.163263
353 17:54:58.172968 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
354 17:54:58.179635 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 17:54:58.182783 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
356 17:54:58.189663 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
357 17:54:58.245739 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
358 17:54:58.252524 Processing 4805 relocs. Offset value of 0x75da8000
359 17:54:58.255863 BS: postcar times (exec / console): total (unknown) / 42 ms
360 17:54:58.259028
361 17:54:58.259111
362 17:54:58.269009 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
363 17:54:58.269093 Normal boot
364 17:54:58.272882 EC returned error result code 3
365 17:54:58.276124 FW_CONFIG value is 0x204
366 17:54:58.279307 GENERIC: 0.0 disabled by fw_config
367 17:54:58.286247 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 17:54:58.289423 I2C: 00:10 disabled by fw_config
369 17:54:58.292785 I2C: 00:10 disabled by fw_config
370 17:54:58.296040 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 17:54:58.302371 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 17:54:58.305695 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 17:54:58.312584 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 17:54:58.315865 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
375 17:54:58.319841 I2C: 00:10 disabled by fw_config
376 17:54:58.326824 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
377 17:54:58.333660 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
378 17:54:58.336786 I2C: 00:1a disabled by fw_config
379 17:54:58.340183 I2C: 00:1a disabled by fw_config
380 17:54:58.343409 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 17:54:58.350008 fw_config match found: AUDIO_AMP=UNPROVISIONED
382 17:54:58.353227 GENERIC: 0.0 disabled by fw_config
383 17:54:58.356822 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 17:54:58.363181 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
385 17:54:58.369731 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
386 17:54:58.372918 microcode: Update skipped, already up-to-date
387 17:54:58.376225 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
388 17:54:58.404647 Detected 2 core, 2 thread CPU.
389 17:54:58.407957 Setting up SMI for CPU
390 17:54:58.411148 IED base = 0x7b400000
391 17:54:58.411231 IED size = 0x00400000
392 17:54:58.414449 Will perform SMM setup.
393 17:54:58.417820 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
394 17:54:58.427946 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 17:54:58.431098 Processing 16 relocs. Offset value of 0x00030000
396 17:54:58.434907 Attempting to start 1 APs
397 17:54:58.438114 Waiting for 10ms after sending INIT.
398 17:54:58.454546 Waiting for 1st SIPI to complete...done.
399 17:54:58.454631 AP: slot 1 apic_id 2.
400 17:54:58.460889 Waiting for 2nd SIPI to complete...done.
401 17:54:58.467777 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 17:54:58.474284 Processing 13 relocs. Offset value of 0x00038000
403 17:54:58.474368 Unable to locate Global NVS
404 17:54:58.484237 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
405 17:54:58.487668 Installing permanent SMM handler to 0x7b000000
406 17:54:58.497245 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
407 17:54:58.500529 Processing 704 relocs. Offset value of 0x7b010000
408 17:54:58.510761 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 17:54:58.513787 Processing 13 relocs. Offset value of 0x7b008000
410 17:54:58.520575 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 17:54:58.523819 Unable to locate Global NVS
412 17:54:58.530170 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
413 17:54:58.533711 Clearing SMI status registers
414 17:54:58.533867 SMI_STS: PM1
415 17:54:58.537194 PM1_STS: PWRBTN
416 17:54:58.537319 TCO_STS: INTRD_DET
417 17:54:58.540445 GPE0 STD STS:
418 17:54:58.546901 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
419 17:54:58.550186 In relocation handler: CPU 0
420 17:54:58.553484 New SMBASE=0x7b000000 IEDBASE=0x7b400000
421 17:54:58.560413 Writing SMRR. base = 0x7b000006, mask=0xff800800
422 17:54:58.560568 Relocation complete.
423 17:54:58.566734 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
424 17:54:58.570332 In relocation handler: CPU 1
425 17:54:58.576981 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
426 17:54:58.580366 Writing SMRR. base = 0x7b000006, mask=0xff800800
427 17:54:58.583520 Relocation complete.
428 17:54:58.583667 Initializing CPU #0
429 17:54:58.586738 CPU: vendor Intel device 906c0
430 17:54:58.593365 CPU: family 06, model 9c, stepping 00
431 17:54:58.593467 Clearing out pending MCEs
432 17:54:58.596570 Setting up local APIC...
433 17:54:58.599767 apic_id: 0x00 done.
434 17:54:58.603013 Turbo is available but hidden
435 17:54:58.606382 Turbo is available and visible
436 17:54:58.609923 microcode: Update skipped, already up-to-date
437 17:54:58.613250 CPU #0 initialized
438 17:54:58.613377 Initializing CPU #1
439 17:54:58.616418 CPU: vendor Intel device 906c0
440 17:54:58.619544 CPU: family 06, model 9c, stepping 00
441 17:54:58.622952 Clearing out pending MCEs
442 17:54:58.626092 Setting up local APIC...
443 17:54:58.629721 apic_id: 0x02 done.
444 17:54:58.632678 microcode: Update skipped, already up-to-date
445 17:54:58.636297 CPU #1 initialized
446 17:54:58.639559 bsp_do_flight_plan done after 175 msecs.
447 17:54:58.642693 CPU: frequency set to 2800 MHz
448 17:54:58.642779 Enabling SMIs.
449 17:54:58.649266 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 85 / 289 ms
450 17:54:58.660233 Probing TPM: done!
451 17:54:58.666717 Connected to device vid:did:rid of 1ae0:0028:00
452 17:54:58.676607 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
453 17:54:58.680007 Initialized TPM device CR50 revision 0
454 17:54:58.683564 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
455 17:54:58.690747 Found a VBT of 7680 bytes after decompression
456 17:54:58.697127 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
457 17:54:58.732771 Detected 2 core, 2 thread CPU.
458 17:54:58.735778 Detected 2 core, 2 thread CPU.
459 17:54:59.099144 Display FSP Version Info HOB
460 17:54:59.102183 Reference Code - CPU = 8.7.22.30
461 17:54:59.105520 uCode Version = 24.0.0.1f
462 17:54:59.108862 TXT ACM version = ff.ff.ff.ffff
463 17:54:59.112179 Reference Code - ME = 8.7.22.30
464 17:54:59.115482 MEBx version = 0.0.0.0
465 17:54:59.118736 ME Firmware Version = Consumer SKU
466 17:54:59.122048 Reference Code - PCH = 8.7.22.30
467 17:54:59.125207 PCH-CRID Status = Disabled
468 17:54:59.128924 PCH-CRID Original Value = ff.ff.ff.ffff
469 17:54:59.131878 PCH-CRID New Value = ff.ff.ff.ffff
470 17:54:59.135255 OPROM - RST - RAID = ff.ff.ff.ffff
471 17:54:59.138502 PCH Hsio Version = 4.0.0.0
472 17:54:59.141900 Reference Code - SA - System Agent = 8.7.22.30
473 17:54:59.145096 Reference Code - MRC = 0.0.4.68
474 17:54:59.148474 SA - PCIe Version = 8.7.22.30
475 17:54:59.151776 SA-CRID Status = Disabled
476 17:54:59.155058 SA-CRID Original Value = 0.0.0.0
477 17:54:59.158458 SA-CRID New Value = 0.0.0.0
478 17:54:59.161844 OPROM - VBIOS = ff.ff.ff.ffff
479 17:54:59.165028 IO Manageability Engine FW Version = ff.ff.ff.ffff
480 17:54:59.168293 PHY Build Version = ff.ff.ff.ffff
481 17:54:59.174928 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
482 17:54:59.178278 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
483 17:54:59.181455 ITSS IRQ Polarities Before:
484 17:54:59.185040 IPC0: 0xffffffff
485 17:54:59.185124 IPC1: 0xffffffff
486 17:54:59.188357 IPC2: 0xffffffff
487 17:54:59.188440 IPC3: 0xffffffff
488 17:54:59.191797 ITSS IRQ Polarities After:
489 17:54:59.194956 IPC0: 0xffffffff
490 17:54:59.195040 IPC1: 0xffffffff
491 17:54:59.198242 IPC2: 0xffffffff
492 17:54:59.198325 IPC3: 0xffffffff
493 17:54:59.211357 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
494 17:54:59.218095 BS: BS_DEV_INIT_CHIPS run times (exec / console): 405 / 156 ms
495 17:54:59.218180 Enumerating buses...
496 17:54:59.224519 Show all devs... Before device enumeration.
497 17:54:59.227708 Root Device: enabled 1
498 17:54:59.227791 CPU_CLUSTER: 0: enabled 1
499 17:54:59.231126 DOMAIN: 0000: enabled 1
500 17:54:59.234332 PCI: 00:00.0: enabled 1
501 17:54:59.237724 PCI: 00:02.0: enabled 1
502 17:54:59.237834 PCI: 00:04.0: enabled 1
503 17:54:59.241162 PCI: 00:05.0: enabled 1
504 17:54:59.244368 PCI: 00:09.0: enabled 0
505 17:54:59.244451 PCI: 00:12.6: enabled 0
506 17:54:59.247690 PCI: 00:14.0: enabled 1
507 17:54:59.250981 PCI: 00:14.1: enabled 0
508 17:54:59.254313 PCI: 00:14.2: enabled 0
509 17:54:59.254395 PCI: 00:14.3: enabled 1
510 17:54:59.257710 PCI: 00:14.5: enabled 1
511 17:54:59.261043 PCI: 00:15.0: enabled 1
512 17:54:59.264206 PCI: 00:15.1: enabled 1
513 17:54:59.264290 PCI: 00:15.2: enabled 1
514 17:54:59.267549 PCI: 00:15.3: enabled 1
515 17:54:59.270882 PCI: 00:16.0: enabled 1
516 17:54:59.274035 PCI: 00:16.1: enabled 0
517 17:54:59.274120 PCI: 00:16.4: enabled 0
518 17:54:59.277342 PCI: 00:16.5: enabled 0
519 17:54:59.280862 PCI: 00:17.0: enabled 0
520 17:54:59.283844 PCI: 00:19.0: enabled 1
521 17:54:59.283927 PCI: 00:19.1: enabled 0
522 17:54:59.287288 PCI: 00:19.2: enabled 1
523 17:54:59.290474 PCI: 00:1a.0: enabled 1
524 17:54:59.290558 PCI: 00:1c.0: enabled 0
525 17:54:59.293785 PCI: 00:1c.1: enabled 0
526 17:54:59.297223 PCI: 00:1c.2: enabled 0
527 17:54:59.300414 PCI: 00:1c.3: enabled 0
528 17:54:59.300497 PCI: 00:1c.4: enabled 0
529 17:54:59.303654 PCI: 00:1c.5: enabled 0
530 17:54:59.307278 PCI: 00:1c.6: enabled 0
531 17:54:59.310389 PCI: 00:1c.7: enabled 1
532 17:54:59.310472 PCI: 00:1e.0: enabled 0
533 17:54:59.313607 PCI: 00:1e.1: enabled 0
534 17:54:59.317272 PCI: 00:1e.2: enabled 1
535 17:54:59.320471 PCI: 00:1e.3: enabled 0
536 17:54:59.320554 PCI: 00:1f.0: enabled 1
537 17:54:59.323547 PCI: 00:1f.1: enabled 1
538 17:54:59.326827 PCI: 00:1f.2: enabled 1
539 17:54:59.330286 PCI: 00:1f.3: enabled 1
540 17:54:59.330374 PCI: 00:1f.4: enabled 0
541 17:54:59.333568 PCI: 00:1f.5: enabled 1
542 17:54:59.336971 PCI: 00:1f.7: enabled 0
543 17:54:59.337054 GENERIC: 0.0: enabled 1
544 17:54:59.340092 GENERIC: 0.0: enabled 1
545 17:54:59.343658 USB0 port 0: enabled 1
546 17:54:59.347052 GENERIC: 0.0: enabled 1
547 17:54:59.347135 I2C: 00:2c: enabled 1
548 17:54:59.350256 I2C: 00:15: enabled 1
549 17:54:59.353552 GENERIC: 0.0: enabled 0
550 17:54:59.353635 I2C: 00:15: enabled 1
551 17:54:59.356762 I2C: 00:10: enabled 0
552 17:54:59.359968 I2C: 00:10: enabled 0
553 17:54:59.360051 I2C: 00:2c: enabled 1
554 17:54:59.363430 I2C: 00:40: enabled 1
555 17:54:59.366564 I2C: 00:10: enabled 1
556 17:54:59.366647 I2C: 00:39: enabled 1
557 17:54:59.369882 I2C: 00:36: enabled 1
558 17:54:59.373374 I2C: 00:10: enabled 0
559 17:54:59.373456 I2C: 00:0c: enabled 1
560 17:54:59.376580 I2C: 00:50: enabled 1
561 17:54:59.379845 I2C: 00:1a: enabled 1
562 17:54:59.383269 I2C: 00:1a: enabled 0
563 17:54:59.383352 I2C: 00:1a: enabled 0
564 17:54:59.386421 I2C: 00:28: enabled 1
565 17:54:59.389926 I2C: 00:29: enabled 1
566 17:54:59.390009 PCI: 00:00.0: enabled 1
567 17:54:59.393125 SPI: 00: enabled 1
568 17:54:59.396458 PNP: 0c09.0: enabled 1
569 17:54:59.396574 GENERIC: 0.0: enabled 0
570 17:54:59.399705 USB2 port 0: enabled 1
571 17:54:59.403011 USB2 port 1: enabled 1
572 17:54:59.403094 USB2 port 2: enabled 1
573 17:54:59.406242 USB2 port 3: enabled 1
574 17:54:59.409599 USB2 port 4: enabled 0
575 17:54:59.412894 USB2 port 5: enabled 1
576 17:54:59.412977 USB2 port 6: enabled 0
577 17:54:59.416182 USB2 port 7: enabled 1
578 17:54:59.419363 USB3 port 0: enabled 1
579 17:54:59.419445 USB3 port 1: enabled 1
580 17:54:59.422904 USB3 port 2: enabled 1
581 17:54:59.426164 USB3 port 3: enabled 1
582 17:54:59.426264 APIC: 00: enabled 1
583 17:54:59.429289 APIC: 02: enabled 1
584 17:54:59.432750 Compare with tree...
585 17:54:59.432833 Root Device: enabled 1
586 17:54:59.436165 CPU_CLUSTER: 0: enabled 1
587 17:54:59.439259 APIC: 00: enabled 1
588 17:54:59.442517 APIC: 02: enabled 1
589 17:54:59.442600 DOMAIN: 0000: enabled 1
590 17:54:59.446037 PCI: 00:00.0: enabled 1
591 17:54:59.449298 PCI: 00:02.0: enabled 1
592 17:54:59.452578 PCI: 00:04.0: enabled 1
593 17:54:59.455743 GENERIC: 0.0: enabled 1
594 17:54:59.455827 PCI: 00:05.0: enabled 1
595 17:54:59.459258 GENERIC: 0.0: enabled 1
596 17:54:59.462475 PCI: 00:09.0: enabled 0
597 17:54:59.465611 PCI: 00:12.6: enabled 0
598 17:54:59.468878 PCI: 00:14.0: enabled 1
599 17:54:59.468961 USB0 port 0: enabled 1
600 17:54:59.472537 USB2 port 0: enabled 1
601 17:54:59.475706 USB2 port 1: enabled 1
602 17:54:59.478928 USB2 port 2: enabled 1
603 17:54:59.482476 USB2 port 3: enabled 1
604 17:54:59.482560 USB2 port 4: enabled 0
605 17:54:59.485636 USB2 port 5: enabled 1
606 17:54:59.488829 USB2 port 6: enabled 0
607 17:54:59.492221 USB2 port 7: enabled 1
608 17:54:59.495682 USB3 port 0: enabled 1
609 17:54:59.498907 USB3 port 1: enabled 1
610 17:54:59.498990 USB3 port 2: enabled 1
611 17:54:59.502220 USB3 port 3: enabled 1
612 17:54:59.505270 PCI: 00:14.1: enabled 0
613 17:54:59.508565 PCI: 00:14.2: enabled 0
614 17:54:59.512117 PCI: 00:14.3: enabled 1
615 17:54:59.512228 GENERIC: 0.0: enabled 1
616 17:54:59.515229 PCI: 00:14.5: enabled 1
617 17:54:59.518578 PCI: 00:15.0: enabled 1
618 17:54:59.521946 I2C: 00:2c: enabled 1
619 17:54:59.522028 I2C: 00:15: enabled 1
620 17:54:59.525470 PCI: 00:15.1: enabled 1
621 17:54:59.528706 PCI: 00:15.2: enabled 1
622 17:54:59.531981 GENERIC: 0.0: enabled 0
623 17:54:59.535376 I2C: 00:15: enabled 1
624 17:54:59.535459 I2C: 00:10: enabled 0
625 17:54:59.538501 I2C: 00:10: enabled 0
626 17:54:59.541946 I2C: 00:2c: enabled 1
627 17:54:59.545084 I2C: 00:40: enabled 1
628 17:54:59.545167 I2C: 00:10: enabled 1
629 17:54:59.548353 I2C: 00:39: enabled 1
630 17:54:59.551912 PCI: 00:15.3: enabled 1
631 17:54:59.555160 I2C: 00:36: enabled 1
632 17:54:59.558331 I2C: 00:10: enabled 0
633 17:54:59.558413 I2C: 00:0c: enabled 1
634 17:54:59.561534 I2C: 00:50: enabled 1
635 17:54:59.565094 PCI: 00:16.0: enabled 1
636 17:54:59.568150 PCI: 00:16.1: enabled 0
637 17:54:59.568233 PCI: 00:16.4: enabled 0
638 17:54:59.571710 PCI: 00:16.5: enabled 0
639 17:54:59.574930 PCI: 00:17.0: enabled 0
640 17:54:59.578054 PCI: 00:19.0: enabled 1
641 17:54:59.581450 I2C: 00:1a: enabled 1
642 17:54:59.581546 I2C: 00:1a: enabled 0
643 17:54:59.585331 I2C: 00:1a: enabled 0
644 17:54:59.588469 I2C: 00:28: enabled 1
645 17:54:59.592367 I2C: 00:29: enabled 1
646 17:54:59.592450 PCI: 00:19.1: enabled 0
647 17:54:59.595597 PCI: 00:19.2: enabled 1
648 17:54:59.599046 PCI: 00:1a.0: enabled 1
649 17:54:59.602231 PCI: 00:1e.0: enabled 0
650 17:54:59.602313 PCI: 00:1e.1: enabled 0
651 17:54:59.605532 PCI: 00:1e.2: enabled 1
652 17:54:59.608969 SPI: 00: enabled 1
653 17:54:59.612279 PCI: 00:1e.3: enabled 0
654 17:54:59.612362 PCI: 00:1f.0: enabled 1
655 17:54:59.615707 PNP: 0c09.0: enabled 1
656 17:54:59.618914 PCI: 00:1f.1: enabled 1
657 17:54:59.622163 PCI: 00:1f.2: enabled 1
658 17:54:59.625394 PCI: 00:1f.3: enabled 1
659 17:54:59.625487 GENERIC: 0.0: enabled 0
660 17:54:59.629025 PCI: 00:1f.4: enabled 0
661 17:54:59.632207 PCI: 00:1f.5: enabled 1
662 17:54:59.635462 PCI: 00:1f.7: enabled 0
663 17:54:59.638641 Root Device scanning...
664 17:54:59.641808 scan_static_bus for Root Device
665 17:54:59.641891 CPU_CLUSTER: 0 enabled
666 17:54:59.645315 DOMAIN: 0000 enabled
667 17:54:59.648705 DOMAIN: 0000 scanning...
668 17:54:59.651980 PCI: pci_scan_bus for bus 00
669 17:54:59.655369 PCI: 00:00.0 [8086/0000] ops
670 17:54:59.658652 PCI: 00:00.0 [8086/4e22] enabled
671 17:54:59.661892 PCI: 00:02.0 [8086/0000] bus ops
672 17:54:59.665086 PCI: 00:02.0 [8086/4e55] enabled
673 17:54:59.668376 PCI: 00:04.0 [8086/0000] bus ops
674 17:54:59.671876 PCI: 00:04.0 [8086/4e03] enabled
675 17:54:59.675027 PCI: 00:05.0 [8086/0000] bus ops
676 17:54:59.678319 PCI: 00:05.0 [8086/4e19] enabled
677 17:54:59.681692 PCI: 00:08.0 [8086/4e11] enabled
678 17:54:59.684940 PCI: 00:14.0 [8086/0000] bus ops
679 17:54:59.688319 PCI: 00:14.0 [8086/4ded] enabled
680 17:54:59.691520 PCI: 00:14.2 [8086/4def] disabled
681 17:54:59.695026 PCI: 00:14.3 [8086/0000] bus ops
682 17:54:59.698241 PCI: 00:14.3 [8086/4df0] enabled
683 17:54:59.698325 PCI: 00:14.5 [8086/0000] ops
684 17:54:59.701757 PCI: 00:14.5 [8086/4df8] enabled
685 17:54:59.704895 PCI: 00:15.0 [8086/0000] bus ops
686 17:54:59.708328 PCI: 00:15.0 [8086/4de8] enabled
687 17:54:59.711765 PCI: 00:15.1 [8086/0000] bus ops
688 17:54:59.715089 PCI: 00:15.1 [8086/4de9] enabled
689 17:54:59.718468 PCI: 00:15.2 [8086/0000] bus ops
690 17:54:59.721421 PCI: 00:15.2 [8086/4dea] enabled
691 17:54:59.724737 PCI: 00:15.3 [8086/0000] bus ops
692 17:54:59.728359 PCI: 00:15.3 [8086/4deb] enabled
693 17:54:59.731702 PCI: 00:16.0 [8086/0000] ops
694 17:54:59.734939 PCI: 00:16.0 [8086/4de0] enabled
695 17:54:59.738075 PCI: 00:19.0 [8086/0000] bus ops
696 17:54:59.741412 PCI: 00:19.0 [8086/4dc5] enabled
697 17:54:59.745010 PCI: 00:19.2 [8086/0000] ops
698 17:54:59.748220 PCI: 00:19.2 [8086/4dc7] enabled
699 17:54:59.751525 PCI: 00:1a.0 [8086/0000] ops
700 17:54:59.754848 PCI: 00:1a.0 [8086/4dc4] enabled
701 17:54:59.758101 PCI: 00:1e.0 [8086/0000] ops
702 17:54:59.761352 PCI: 00:1e.0 [8086/4da8] disabled
703 17:54:59.764565 PCI: 00:1e.2 [8086/0000] bus ops
704 17:54:59.768142 PCI: 00:1e.2 [8086/4daa] enabled
705 17:54:59.771283 PCI: 00:1f.0 [8086/0000] bus ops
706 17:54:59.774470 PCI: 00:1f.0 [8086/4d87] enabled
707 17:54:59.781338 PCI: Static device PCI: 00:1f.1 not found, disabling it.
708 17:54:59.781422 RTC Init
709 17:54:59.784563 Set power on after power failure.
710 17:54:59.787738 Disabling Deep S3
711 17:54:59.787820 Disabling Deep S3
712 17:54:59.791333 Disabling Deep S4
713 17:54:59.791415 Disabling Deep S4
714 17:54:59.794514 Disabling Deep S5
715 17:54:59.794596 Disabling Deep S5
716 17:54:59.797789 PCI: 00:1f.2 [0000/0000] hidden
717 17:54:59.801025 PCI: 00:1f.3 [8086/0000] bus ops
718 17:54:59.804610 PCI: 00:1f.3 [8086/4dc8] enabled
719 17:54:59.807858 PCI: 00:1f.5 [8086/0000] bus ops
720 17:54:59.810809 PCI: 00:1f.5 [8086/4da4] enabled
721 17:54:59.814391 PCI: Leftover static devices:
722 17:54:59.817397 PCI: 00:12.6
723 17:54:59.817479 PCI: 00:09.0
724 17:54:59.820603 PCI: 00:14.1
725 17:54:59.820685 PCI: 00:16.1
726 17:54:59.820751 PCI: 00:16.4
727 17:54:59.824231 PCI: 00:16.5
728 17:54:59.824314 PCI: 00:17.0
729 17:54:59.827609 PCI: 00:19.1
730 17:54:59.827691 PCI: 00:1e.1
731 17:54:59.830909 PCI: 00:1e.3
732 17:54:59.830992 PCI: 00:1f.1
733 17:54:59.831069 PCI: 00:1f.4
734 17:54:59.834057 PCI: 00:1f.7
735 17:54:59.837126 PCI: Check your devicetree.cb.
736 17:54:59.837207 PCI: 00:02.0 scanning...
737 17:54:59.843794 scan_generic_bus for PCI: 00:02.0
738 17:54:59.847232 scan_generic_bus for PCI: 00:02.0 done
739 17:54:59.850421 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
740 17:54:59.853702 PCI: 00:04.0 scanning...
741 17:54:59.857201 scan_generic_bus for PCI: 00:04.0
742 17:54:59.860512 GENERIC: 0.0 enabled
743 17:54:59.863685 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
744 17:54:59.870329 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
745 17:54:59.873527 PCI: 00:05.0 scanning...
746 17:54:59.876737 scan_generic_bus for PCI: 00:05.0
747 17:54:59.876820 GENERIC: 0.0 enabled
748 17:54:59.883572 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
749 17:54:59.889887 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
750 17:54:59.889972 PCI: 00:14.0 scanning...
751 17:54:59.893313 scan_static_bus for PCI: 00:14.0
752 17:54:59.896591 USB0 port 0 enabled
753 17:54:59.899831 USB0 port 0 scanning...
754 17:54:59.903479 scan_static_bus for USB0 port 0
755 17:54:59.903576 USB2 port 0 enabled
756 17:54:59.906569 USB2 port 1 enabled
757 17:54:59.909721 USB2 port 2 enabled
758 17:54:59.909841 USB2 port 3 enabled
759 17:54:59.913089 USB2 port 4 disabled
760 17:54:59.916650 USB2 port 5 enabled
761 17:54:59.916732 USB2 port 6 disabled
762 17:54:59.919845 USB2 port 7 enabled
763 17:54:59.923185 USB3 port 0 enabled
764 17:54:59.923268 USB3 port 1 enabled
765 17:54:59.926554 USB3 port 2 enabled
766 17:54:59.926637 USB3 port 3 enabled
767 17:54:59.929657 USB2 port 0 scanning...
768 17:54:59.932951 scan_static_bus for USB2 port 0
769 17:54:59.936404 scan_static_bus for USB2 port 0 done
770 17:54:59.942882 scan_bus: bus USB2 port 0 finished in 6 msecs
771 17:54:59.942966 USB2 port 1 scanning...
772 17:54:59.946069 scan_static_bus for USB2 port 1
773 17:54:59.952828 scan_static_bus for USB2 port 1 done
774 17:54:59.955982 scan_bus: bus USB2 port 1 finished in 6 msecs
775 17:54:59.959195 USB2 port 2 scanning...
776 17:54:59.962714 scan_static_bus for USB2 port 2
777 17:54:59.965778 scan_static_bus for USB2 port 2 done
778 17:54:59.969289 scan_bus: bus USB2 port 2 finished in 6 msecs
779 17:54:59.972494 USB2 port 3 scanning...
780 17:54:59.975873 scan_static_bus for USB2 port 3
781 17:54:59.979278 scan_static_bus for USB2 port 3 done
782 17:54:59.982552 scan_bus: bus USB2 port 3 finished in 6 msecs
783 17:54:59.985723 USB2 port 5 scanning...
784 17:54:59.989346 scan_static_bus for USB2 port 5
785 17:54:59.992551 scan_static_bus for USB2 port 5 done
786 17:54:59.999151 scan_bus: bus USB2 port 5 finished in 6 msecs
787 17:54:59.999237 USB2 port 7 scanning...
788 17:55:00.002376 scan_static_bus for USB2 port 7
789 17:55:00.009080 scan_static_bus for USB2 port 7 done
790 17:55:00.012404 scan_bus: bus USB2 port 7 finished in 6 msecs
791 17:55:00.015562 USB3 port 0 scanning...
792 17:55:00.018810 scan_static_bus for USB3 port 0
793 17:55:00.022211 scan_static_bus for USB3 port 0 done
794 17:55:00.025471 scan_bus: bus USB3 port 0 finished in 6 msecs
795 17:55:00.028656 USB3 port 1 scanning...
796 17:55:00.032074 scan_static_bus for USB3 port 1
797 17:55:00.035574 scan_static_bus for USB3 port 1 done
798 17:55:00.038609 scan_bus: bus USB3 port 1 finished in 6 msecs
799 17:55:00.041839 USB3 port 2 scanning...
800 17:55:00.045357 scan_static_bus for USB3 port 2
801 17:55:00.048796 scan_static_bus for USB3 port 2 done
802 17:55:00.055247 scan_bus: bus USB3 port 2 finished in 6 msecs
803 17:55:00.055338 USB3 port 3 scanning...
804 17:55:00.058436 scan_static_bus for USB3 port 3
805 17:55:00.065224 scan_static_bus for USB3 port 3 done
806 17:55:00.068526 scan_bus: bus USB3 port 3 finished in 6 msecs
807 17:55:00.071851 scan_static_bus for USB0 port 0 done
808 17:55:00.078556 scan_bus: bus USB0 port 0 finished in 172 msecs
809 17:55:00.081690 scan_static_bus for PCI: 00:14.0 done
810 17:55:00.085062 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
811 17:55:00.088130 PCI: 00:14.3 scanning...
812 17:55:00.091788 scan_static_bus for PCI: 00:14.3
813 17:55:00.095132 GENERIC: 0.0 enabled
814 17:55:00.098280 scan_static_bus for PCI: 00:14.3 done
815 17:55:00.101679 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
816 17:55:00.104755 PCI: 00:15.0 scanning...
817 17:55:00.108093 scan_static_bus for PCI: 00:15.0
818 17:55:00.111545 I2C: 00:2c enabled
819 17:55:00.111620 I2C: 00:15 enabled
820 17:55:00.114806 scan_static_bus for PCI: 00:15.0 done
821 17:55:00.121380 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
822 17:55:00.124848 PCI: 00:15.1 scanning...
823 17:55:00.127931 scan_static_bus for PCI: 00:15.1
824 17:55:00.131376 scan_static_bus for PCI: 00:15.1 done
825 17:55:00.134671 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
826 17:55:00.138063 PCI: 00:15.2 scanning...
827 17:55:00.141122 scan_static_bus for PCI: 00:15.2
828 17:55:00.144534 GENERIC: 0.0 disabled
829 17:55:00.144617 I2C: 00:15 enabled
830 17:55:00.147762 I2C: 00:10 disabled
831 17:55:00.147853 I2C: 00:10 disabled
832 17:55:00.150967 I2C: 00:2c enabled
833 17:55:00.154611 I2C: 00:40 enabled
834 17:55:00.154697 I2C: 00:10 enabled
835 17:55:00.157610 I2C: 00:39 enabled
836 17:55:00.161245 scan_static_bus for PCI: 00:15.2 done
837 17:55:00.164454 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
838 17:55:00.168129 PCI: 00:15.3 scanning...
839 17:55:00.171644 scan_static_bus for PCI: 00:15.3
840 17:55:00.175353 I2C: 00:36 enabled
841 17:55:00.175429 I2C: 00:10 disabled
842 17:55:00.178729 I2C: 00:0c enabled
843 17:55:00.178804 I2C: 00:50 enabled
844 17:55:00.182009 scan_static_bus for PCI: 00:15.3 done
845 17:55:00.189014 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
846 17:55:00.189099 PCI: 00:19.0 scanning...
847 17:55:00.192540 scan_static_bus for PCI: 00:19.0
848 17:55:00.195958 I2C: 00:1a enabled
849 17:55:00.199169 I2C: 00:1a disabled
850 17:55:00.199252 I2C: 00:1a disabled
851 17:55:00.202404 I2C: 00:28 enabled
852 17:55:00.202488 I2C: 00:29 enabled
853 17:55:00.209061 scan_static_bus for PCI: 00:19.0 done
854 17:55:00.212570 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
855 17:55:00.215849 PCI: 00:1e.2 scanning...
856 17:55:00.218934 scan_generic_bus for PCI: 00:1e.2
857 17:55:00.219018 SPI: 00 enabled
858 17:55:00.225732 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
859 17:55:00.232301 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
860 17:55:00.232385 PCI: 00:1f.0 scanning...
861 17:55:00.235436 scan_static_bus for PCI: 00:1f.0
862 17:55:00.239157 PNP: 0c09.0 enabled
863 17:55:00.242282 PNP: 0c09.0 scanning...
864 17:55:00.245484 scan_static_bus for PNP: 0c09.0
865 17:55:00.248890 scan_static_bus for PNP: 0c09.0 done
866 17:55:00.252224 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
867 17:55:00.255759 scan_static_bus for PCI: 00:1f.0 done
868 17:55:00.262304 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
869 17:55:00.265529 PCI: 00:1f.3 scanning...
870 17:55:00.268765 scan_static_bus for PCI: 00:1f.3
871 17:55:00.268848 GENERIC: 0.0 disabled
872 17:55:00.275523 scan_static_bus for PCI: 00:1f.3 done
873 17:55:00.278480 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
874 17:55:00.281684 PCI: 00:1f.5 scanning...
875 17:55:00.285273 scan_generic_bus for PCI: 00:1f.5
876 17:55:00.288480 scan_generic_bus for PCI: 00:1f.5 done
877 17:55:00.291792 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
878 17:55:00.298492 scan_bus: bus DOMAIN: 0000 finished in 645 msecs
879 17:55:00.301830 scan_static_bus for Root Device done
880 17:55:00.308331 scan_bus: bus Root Device finished in 664 msecs
881 17:55:00.308416 done
882 17:55:00.314926 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1084 ms
883 17:55:00.318189 Chrome EC: UHEPI supported
884 17:55:00.321569 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
885 17:55:00.327962 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
886 17:55:00.331581 SPI flash protection: WPSW=0 SRP0=0
887 17:55:00.337870 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
888 17:55:00.344624 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
889 17:55:00.344709 found VGA at PCI: 00:02.0
890 17:55:00.347742 Setting up VGA for PCI: 00:02.0
891 17:55:00.354425 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
892 17:55:00.357870 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
893 17:55:00.361167 Allocating resources...
894 17:55:00.364514 Reading resources...
895 17:55:00.367793 Root Device read_resources bus 0 link: 0
896 17:55:00.371014 CPU_CLUSTER: 0 read_resources bus 0 link: 0
897 17:55:00.377491 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
898 17:55:00.380679 DOMAIN: 0000 read_resources bus 0 link: 0
899 17:55:00.387944 PCI: 00:04.0 read_resources bus 1 link: 0
900 17:55:00.391134 PCI: 00:04.0 read_resources bus 1 link: 0 done
901 17:55:00.397626 PCI: 00:05.0 read_resources bus 2 link: 0
902 17:55:00.401036 PCI: 00:05.0 read_resources bus 2 link: 0 done
903 17:55:00.407759 PCI: 00:14.0 read_resources bus 0 link: 0
904 17:55:00.410912 USB0 port 0 read_resources bus 0 link: 0
905 17:55:00.417502 USB0 port 0 read_resources bus 0 link: 0 done
906 17:55:00.420938 PCI: 00:14.0 read_resources bus 0 link: 0 done
907 17:55:00.480457 PCI: 00:14.3 read_resources bus 0 link: 0
908 17:55:00.480613 PCI: 00:14.3 read_resources bus 0 link: 0 done
909 17:55:00.480933 PCI: 00:15.0 read_resources bus 0 link: 0
910 17:55:00.481007 PCI: 00:15.0 read_resources bus 0 link: 0 done
911 17:55:00.481072 PCI: 00:15.2 read_resources bus 0 link: 0
912 17:55:00.481165 PCI: 00:15.2 read_resources bus 0 link: 0 done
913 17:55:00.481521 PCI: 00:15.3 read_resources bus 0 link: 0
914 17:55:00.481820 PCI: 00:15.3 read_resources bus 0 link: 0 done
915 17:55:00.481892 PCI: 00:19.0 read_resources bus 0 link: 0
916 17:55:00.481955 PCI: 00:19.0 read_resources bus 0 link: 0 done
917 17:55:00.482027 PCI: 00:1e.2 read_resources bus 3 link: 0
918 17:55:00.482088 PCI: 00:1e.2 read_resources bus 3 link: 0 done
919 17:55:00.500139 PCI: 00:1f.0 read_resources bus 0 link: 0
920 17:55:00.500270 PCI: 00:1f.0 read_resources bus 0 link: 0 done
921 17:55:00.503810 PCI: 00:1f.3 read_resources bus 0 link: 0
922 17:55:00.503887 PCI: 00:1f.3 read_resources bus 0 link: 0 done
923 17:55:00.507507 DOMAIN: 0000 read_resources bus 0 link: 0 done
924 17:55:00.510590 Root Device read_resources bus 0 link: 0 done
925 17:55:00.514042 Done reading resources.
926 17:55:00.517301 Show resources in subtree (Root Device)...After reading.
927 17:55:00.523915 Root Device child on link 0 CPU_CLUSTER: 0
928 17:55:00.527171 CPU_CLUSTER: 0 child on link 0 APIC: 00
929 17:55:00.527245 APIC: 00
930 17:55:00.530670 APIC: 02
931 17:55:00.533906 DOMAIN: 0000 child on link 0 PCI: 00:00.0
932 17:55:00.543898 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
933 17:55:00.553611 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
934 17:55:00.553720 PCI: 00:00.0
935 17:55:00.563653 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
936 17:55:00.573425 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
937 17:55:00.583654 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
938 17:55:00.593482 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
939 17:55:00.600101 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
940 17:55:00.609951 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
941 17:55:00.619794 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
942 17:55:00.629593 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
943 17:55:00.639540 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
944 17:55:00.649279 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
945 17:55:00.656078 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
946 17:55:00.665815 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
947 17:55:00.675758 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
948 17:55:00.685649 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
949 17:55:00.695687 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
950 17:55:00.702323 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
951 17:55:00.712204 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
952 17:55:00.722064 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
953 17:55:00.731797 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
954 17:55:00.735370 PCI: 00:02.0
955 17:55:00.745084 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
956 17:55:00.755146 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
957 17:55:00.761523 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
958 17:55:00.768148 PCI: 00:04.0 child on link 0 GENERIC: 0.0
959 17:55:00.778100 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
960 17:55:00.778185 GENERIC: 0.0
961 17:55:00.784832 PCI: 00:05.0 child on link 0 GENERIC: 0.0
962 17:55:00.794567 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
963 17:55:00.794652 GENERIC: 0.0
964 17:55:00.798188 PCI: 00:08.0
965 17:55:00.807827 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
966 17:55:00.811239 PCI: 00:14.0 child on link 0 USB0 port 0
967 17:55:00.821069 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
968 17:55:00.824542 USB0 port 0 child on link 0 USB2 port 0
969 17:55:00.827863 USB2 port 0
970 17:55:00.827962 USB2 port 1
971 17:55:00.830925 USB2 port 2
972 17:55:00.831008 USB2 port 3
973 17:55:00.834255 USB2 port 4
974 17:55:00.837540 USB2 port 5
975 17:55:00.837622 USB2 port 6
976 17:55:00.840794 USB2 port 7
977 17:55:00.840877 USB3 port 0
978 17:55:00.844333 USB3 port 1
979 17:55:00.844415 USB3 port 2
980 17:55:00.847596 USB3 port 3
981 17:55:00.847678 PCI: 00:14.2
982 17:55:00.855184 PCI: 00:14.3 child on link 0 GENERIC: 0.0
983 17:55:00.862026 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
984 17:55:00.865275 GENERIC: 0.0
985 17:55:00.865357 PCI: 00:14.5
986 17:55:00.875411 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
987 17:55:00.878660 PCI: 00:15.0 child on link 0 I2C: 00:2c
988 17:55:00.888509 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
989 17:55:00.891671 I2C: 00:2c
990 17:55:00.891754 I2C: 00:15
991 17:55:00.895213 PCI: 00:15.1
992 17:55:00.905151 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 17:55:00.908409 PCI: 00:15.2 child on link 0 GENERIC: 0.0
994 17:55:00.918312 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 17:55:00.921498 GENERIC: 0.0
996 17:55:00.921581 I2C: 00:15
997 17:55:00.924744 I2C: 00:10
998 17:55:00.924835 I2C: 00:10
999 17:55:00.928424 I2C: 00:2c
1000 17:55:00.928506 I2C: 00:40
1001 17:55:00.931368 I2C: 00:10
1002 17:55:00.931450 I2C: 00:39
1003 17:55:00.934710 PCI: 00:15.3 child on link 0 I2C: 00:36
1004 17:55:00.944754 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1005 17:55:00.948092 I2C: 00:36
1006 17:55:00.948174 I2C: 00:10
1007 17:55:00.951324 I2C: 00:0c
1008 17:55:00.951406 I2C: 00:50
1009 17:55:00.954590 PCI: 00:16.0
1010 17:55:00.964767 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 17:55:00.967923 PCI: 00:19.0 child on link 0 I2C: 00:1a
1012 17:55:00.977756 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1013 17:55:00.981213 I2C: 00:1a
1014 17:55:00.981295 I2C: 00:1a
1015 17:55:00.981360 I2C: 00:1a
1016 17:55:00.984494 I2C: 00:28
1017 17:55:00.984576 I2C: 00:29
1018 17:55:00.987735 PCI: 00:19.2
1019 17:55:00.997747 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1020 17:55:01.007702 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1021 17:55:01.010889 PCI: 00:1a.0
1022 17:55:01.020857 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1023 17:55:01.020940 PCI: 00:1e.0
1024 17:55:01.024008 PCI: 00:1e.2 child on link 0 SPI: 00
1025 17:55:01.033946 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1026 17:55:01.037179 SPI: 00
1027 17:55:01.040853 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1028 17:55:01.050504 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1029 17:55:01.050640 PNP: 0c09.0
1030 17:55:01.060500 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1031 17:55:01.060637 PCI: 00:1f.2
1032 17:55:01.070146 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1033 17:55:01.080223 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1034 17:55:01.083358 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1035 17:55:01.093250 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1036 17:55:01.103199 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1037 17:55:01.106500 GENERIC: 0.0
1038 17:55:01.110059 PCI: 00:1f.5
1039 17:55:01.116572 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1040 17:55:01.126250 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1041 17:55:01.133098 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1042 17:55:01.139812 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1043 17:55:01.146302 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1044 17:55:01.152911 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1045 17:55:01.159697 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1046 17:55:01.162779 DOMAIN: 0000: Resource ranges:
1047 17:55:01.169445 * Base: 1000, Size: 800, Tag: 100
1048 17:55:01.172744 * Base: 1900, Size: e700, Tag: 100
1049 17:55:01.175843 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1050 17:55:01.182725 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1051 17:55:01.189112 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1052 17:55:01.199008 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1053 17:55:01.205690 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1054 17:55:01.212155 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1055 17:55:01.222171 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1056 17:55:01.228690 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1057 17:55:01.235548 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1058 17:55:01.245160 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1059 17:55:01.251806 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1060 17:55:01.258320 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1061 17:55:01.268412 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1062 17:55:01.274999 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1063 17:55:01.281397 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1064 17:55:01.288220 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1065 17:55:01.297934 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1066 17:55:01.304527 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1067 17:55:01.311315 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1068 17:55:01.321211 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1069 17:55:01.327840 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1070 17:55:01.334399 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1071 17:55:01.344143 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1072 17:55:01.350858 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1073 17:55:01.354128 DOMAIN: 0000: Resource ranges:
1074 17:55:01.357347 * Base: 7fc00000, Size: 40400000, Tag: 200
1075 17:55:01.363949 * Base: d0000000, Size: 2b000000, Tag: 200
1076 17:55:01.367484 * Base: fb001000, Size: 2fff000, Tag: 200
1077 17:55:01.370669 * Base: fe010000, Size: 22000, Tag: 200
1078 17:55:01.377347 * Base: fe033000, Size: a4d000, Tag: 200
1079 17:55:01.380497 * Base: fea88000, Size: 2f8000, Tag: 200
1080 17:55:01.384073 * Base: fed88000, Size: 8000, Tag: 200
1081 17:55:01.387070 * Base: fed93000, Size: d000, Tag: 200
1082 17:55:01.393617 * Base: feda2000, Size: 125e000, Tag: 200
1083 17:55:01.396998 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1084 17:55:01.403591 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1085 17:55:01.410421 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1086 17:55:01.416858 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1087 17:55:01.423648 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1088 17:55:01.430141 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1089 17:55:01.437247 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1090 17:55:01.444097 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1091 17:55:01.450509 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1092 17:55:01.457304 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1093 17:55:01.463893 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1094 17:55:01.470311 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1095 17:55:01.476876 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1096 17:55:01.483633 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1097 17:55:01.490242 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1098 17:55:01.496815 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1099 17:55:01.503748 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1100 17:55:01.510233 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1101 17:55:01.516795 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1102 17:55:01.523325 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1103 17:55:01.529935 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1104 17:55:01.536552 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1105 17:55:01.543447 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1106 17:55:01.549933 Root Device assign_resources, bus 0 link: 0
1107 17:55:01.553079 DOMAIN: 0000 assign_resources, bus 0 link: 0
1108 17:55:01.562924 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1109 17:55:01.569436 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1110 17:55:01.576182 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1111 17:55:01.585895 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1112 17:55:01.589412 PCI: 00:04.0 assign_resources, bus 1 link: 0
1113 17:55:01.595877 PCI: 00:04.0 assign_resources, bus 1 link: 0
1114 17:55:01.602604 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1115 17:55:01.605985 PCI: 00:05.0 assign_resources, bus 2 link: 0
1116 17:55:01.612781 PCI: 00:05.0 assign_resources, bus 2 link: 0
1117 17:55:01.619271 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1118 17:55:01.628866 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1119 17:55:01.632225 PCI: 00:14.0 assign_resources, bus 0 link: 0
1120 17:55:01.638921 PCI: 00:14.0 assign_resources, bus 0 link: 0
1121 17:55:01.645720 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1122 17:55:01.648917 PCI: 00:14.3 assign_resources, bus 0 link: 0
1123 17:55:01.655182 PCI: 00:14.3 assign_resources, bus 0 link: 0
1124 17:55:01.662052 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1125 17:55:01.671798 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1126 17:55:01.675193 PCI: 00:15.0 assign_resources, bus 0 link: 0
1127 17:55:01.681733 PCI: 00:15.0 assign_resources, bus 0 link: 0
1128 17:55:01.688104 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1129 17:55:01.695142 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1130 17:55:01.701624 PCI: 00:15.2 assign_resources, bus 0 link: 0
1131 17:55:01.704912 PCI: 00:15.2 assign_resources, bus 0 link: 0
1132 17:55:01.714864 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1133 17:55:01.717989 PCI: 00:15.3 assign_resources, bus 0 link: 0
1134 17:55:01.724562 PCI: 00:15.3 assign_resources, bus 0 link: 0
1135 17:55:01.731292 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1136 17:55:01.737700 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1137 17:55:01.744372 PCI: 00:19.0 assign_resources, bus 0 link: 0
1138 17:55:01.747621 PCI: 00:19.0 assign_resources, bus 0 link: 0
1139 17:55:01.757668 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1140 17:55:01.764332 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1141 17:55:01.774016 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1142 17:55:01.777563 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1143 17:55:01.780797 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1144 17:55:01.787141 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1145 17:55:01.790699 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1146 17:55:01.797232 LPC: Trying to open IO window from 800 size 1ff
1147 17:55:01.803568 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1148 17:55:01.813696 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1149 17:55:01.817032 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1150 17:55:01.820245 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1151 17:55:01.830119 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1152 17:55:01.833503 DOMAIN: 0000 assign_resources, bus 0 link: 0
1153 17:55:01.840250 Root Device assign_resources, bus 0 link: 0
1154 17:55:01.840336 Done setting resources.
1155 17:55:01.846800 Show resources in subtree (Root Device)...After assigning values.
1156 17:55:01.853298 Root Device child on link 0 CPU_CLUSTER: 0
1157 17:55:01.856666 CPU_CLUSTER: 0 child on link 0 APIC: 00
1158 17:55:01.856753 APIC: 00
1159 17:55:01.859865 APIC: 02
1160 17:55:01.862992 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1161 17:55:01.872988 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1162 17:55:01.883126 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1163 17:55:01.883215 PCI: 00:00.0
1164 17:55:01.892736 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1165 17:55:01.902775 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1166 17:55:01.912868 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1167 17:55:01.922610 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1168 17:55:01.932624 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1169 17:55:01.939138 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1170 17:55:01.948939 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1171 17:55:01.958919 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1172 17:55:01.968830 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1173 17:55:01.978834 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1174 17:55:01.985356 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1175 17:55:01.995232 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1176 17:55:02.005115 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1177 17:55:02.015076 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1178 17:55:02.025255 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1179 17:55:02.031590 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1180 17:55:02.041572 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1181 17:55:02.051610 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1182 17:55:02.061500 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1183 17:55:02.064755 PCI: 00:02.0
1184 17:55:02.074416 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1185 17:55:02.084621 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1186 17:55:02.094472 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1187 17:55:02.097893 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1188 17:55:02.107467 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1189 17:55:02.110978 GENERIC: 0.0
1190 17:55:02.114295 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1191 17:55:02.124263 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1192 17:55:02.127612 GENERIC: 0.0
1193 17:55:02.127696 PCI: 00:08.0
1194 17:55:02.137380 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1195 17:55:02.143890 PCI: 00:14.0 child on link 0 USB0 port 0
1196 17:55:02.154010 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1197 17:55:02.157426 USB0 port 0 child on link 0 USB2 port 0
1198 17:55:02.160669 USB2 port 0
1199 17:55:02.160800 USB2 port 1
1200 17:55:02.163850 USB2 port 2
1201 17:55:02.163936 USB2 port 3
1202 17:55:02.167454 USB2 port 4
1203 17:55:02.167538 USB2 port 5
1204 17:55:02.170720 USB2 port 6
1205 17:55:02.173831 USB2 port 7
1206 17:55:02.173920 USB3 port 0
1207 17:55:02.177111 USB3 port 1
1208 17:55:02.177198 USB3 port 2
1209 17:55:02.180380 USB3 port 3
1210 17:55:02.180472 PCI: 00:14.2
1211 17:55:02.183941 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1212 17:55:02.196805 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1213 17:55:02.196937 GENERIC: 0.0
1214 17:55:02.200142 PCI: 00:14.5
1215 17:55:02.210351 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1216 17:55:02.213659 PCI: 00:15.0 child on link 0 I2C: 00:2c
1217 17:55:02.223539 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1218 17:55:02.226633 I2C: 00:2c
1219 17:55:02.226718 I2C: 00:15
1220 17:55:02.230022 PCI: 00:15.1
1221 17:55:02.239741 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1222 17:55:02.243170 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1223 17:55:02.253218 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1224 17:55:02.256534 GENERIC: 0.0
1225 17:55:02.256616 I2C: 00:15
1226 17:55:02.259959 I2C: 00:10
1227 17:55:02.260042 I2C: 00:10
1228 17:55:02.263228 I2C: 00:2c
1229 17:55:02.263306 I2C: 00:40
1230 17:55:02.266384 I2C: 00:10
1231 17:55:02.266457 I2C: 00:39
1232 17:55:02.269628 PCI: 00:15.3 child on link 0 I2C: 00:36
1233 17:55:02.279778 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1234 17:55:02.283015 I2C: 00:36
1235 17:55:02.283099 I2C: 00:10
1236 17:55:02.286178 I2C: 00:0c
1237 17:55:02.286260 I2C: 00:50
1238 17:55:02.289646 PCI: 00:16.0
1239 17:55:02.299514 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1240 17:55:02.302833 PCI: 00:19.0 child on link 0 I2C: 00:1a
1241 17:55:02.312572 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1242 17:55:02.315874 I2C: 00:1a
1243 17:55:02.315961 I2C: 00:1a
1244 17:55:02.319258 I2C: 00:1a
1245 17:55:02.319340 I2C: 00:28
1246 17:55:02.322595 I2C: 00:29
1247 17:55:02.322677 PCI: 00:19.2
1248 17:55:02.335974 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1249 17:55:02.345773 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1250 17:55:02.345889 PCI: 00:1a.0
1251 17:55:02.355571 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1252 17:55:02.358715 PCI: 00:1e.0
1253 17:55:02.362045 PCI: 00:1e.2 child on link 0 SPI: 00
1254 17:55:02.372166 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1255 17:55:02.372284 SPI: 00
1256 17:55:02.378641 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1257 17:55:02.385438 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1258 17:55:02.388571 PNP: 0c09.0
1259 17:55:02.398691 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1260 17:55:02.398793 PCI: 00:1f.2
1261 17:55:02.408258 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1262 17:55:02.418152 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1263 17:55:02.421594 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1264 17:55:02.431331 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1265 17:55:02.441622 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1266 17:55:02.444921 GENERIC: 0.0
1267 17:55:02.445003 PCI: 00:1f.5
1268 17:55:02.454913 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1269 17:55:02.458070 Done allocating resources.
1270 17:55:02.464805 BS: BS_DEV_RESOURCES run times (exec / console): 20 / 2096 ms
1271 17:55:02.468055 Enabling resources...
1272 17:55:02.471301 PCI: 00:00.0 subsystem <- 8086/4e22
1273 17:55:02.474576 PCI: 00:00.0 cmd <- 06
1274 17:55:02.477781 PCI: 00:02.0 subsystem <- 8086/4e55
1275 17:55:02.481157 PCI: 00:02.0 cmd <- 03
1276 17:55:02.484368 PCI: 00:04.0 subsystem <- 8086/4e03
1277 17:55:02.487612 PCI: 00:04.0 cmd <- 02
1278 17:55:02.491163 PCI: 00:05.0 bridge ctrl <- 0003
1279 17:55:02.494507 PCI: 00:05.0 subsystem <- 8086/4e19
1280 17:55:02.494590 PCI: 00:05.0 cmd <- 02
1281 17:55:02.497595 PCI: 00:08.0 cmd <- 06
1282 17:55:02.500913 PCI: 00:14.0 subsystem <- 8086/4ded
1283 17:55:02.504191 PCI: 00:14.0 cmd <- 02
1284 17:55:02.507392 PCI: 00:14.3 subsystem <- 8086/4df0
1285 17:55:02.510645 PCI: 00:14.3 cmd <- 02
1286 17:55:02.514068 PCI: 00:14.5 subsystem <- 8086/4df8
1287 17:55:02.517394 PCI: 00:14.5 cmd <- 06
1288 17:55:02.520697 PCI: 00:15.0 subsystem <- 8086/4de8
1289 17:55:02.523902 PCI: 00:15.0 cmd <- 02
1290 17:55:02.527265 PCI: 00:15.1 subsystem <- 8086/4de9
1291 17:55:02.530683 PCI: 00:15.1 cmd <- 02
1292 17:55:02.533759 PCI: 00:15.2 subsystem <- 8086/4dea
1293 17:55:02.533882 PCI: 00:15.2 cmd <- 02
1294 17:55:02.537307 PCI: 00:15.3 subsystem <- 8086/4deb
1295 17:55:02.540358 PCI: 00:15.3 cmd <- 02
1296 17:55:02.543560 PCI: 00:16.0 subsystem <- 8086/4de0
1297 17:55:02.546859 PCI: 00:16.0 cmd <- 02
1298 17:55:02.550443 PCI: 00:19.0 subsystem <- 8086/4dc5
1299 17:55:02.553564 PCI: 00:19.0 cmd <- 02
1300 17:55:02.556808 PCI: 00:19.2 subsystem <- 8086/4dc7
1301 17:55:02.560148 PCI: 00:19.2 cmd <- 06
1302 17:55:02.563688 PCI: 00:1a.0 subsystem <- 8086/4dc4
1303 17:55:02.567022 PCI: 00:1a.0 cmd <- 06
1304 17:55:02.570057 PCI: 00:1e.2 subsystem <- 8086/4daa
1305 17:55:02.570139 PCI: 00:1e.2 cmd <- 06
1306 17:55:02.576945 PCI: 00:1f.0 subsystem <- 8086/4d87
1307 17:55:02.577028 PCI: 00:1f.0 cmd <- 407
1308 17:55:02.580106 PCI: 00:1f.3 subsystem <- 8086/4dc8
1309 17:55:02.583306 PCI: 00:1f.3 cmd <- 02
1310 17:55:02.586707 PCI: 00:1f.5 subsystem <- 8086/4da4
1311 17:55:02.589886 PCI: 00:1f.5 cmd <- 406
1312 17:55:02.594325 done.
1313 17:55:02.597898 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1314 17:55:02.600944 Initializing devices...
1315 17:55:02.604165 Root Device init
1316 17:55:02.604247 mainboard: EC init
1317 17:55:02.611088 Chrome EC: Set SMI mask to 0x0000000000000000
1318 17:55:02.617712 Chrome EC: clear events_b mask to 0x0000000000000000
1319 17:55:02.620994 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1320 17:55:02.627882 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1321 17:55:02.634328 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1322 17:55:02.637341 Chrome EC: Set WAKE mask to 0x0000000000000000
1323 17:55:02.645124 Root Device init finished in 36 msecs
1324 17:55:02.648305 PCI: 00:00.0 init
1325 17:55:02.648390 CPU TDP = 6 Watts
1326 17:55:02.651816 CPU PL1 = 7 Watts
1327 17:55:02.655058 CPU PL2 = 12 Watts
1328 17:55:02.658530 PCI: 00:00.0 init finished in 6 msecs
1329 17:55:02.658614 PCI: 00:02.0 init
1330 17:55:02.661676 GMA: Found VBT in CBFS
1331 17:55:02.665235 GMA: Found valid VBT in CBFS
1332 17:55:02.671770 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1333 17:55:02.678447 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1334 17:55:02.681902 PCI: 00:02.0 init finished in 18 msecs
1335 17:55:02.685011 PCI: 00:08.0 init
1336 17:55:02.688484 PCI: 00:08.0 init finished in 0 msecs
1337 17:55:02.691717 PCI: 00:14.0 init
1338 17:55:02.694985 XHCI: Updated LFPS sampling OFF time to 9 ms
1339 17:55:02.698309 PCI: 00:14.0 init finished in 4 msecs
1340 17:55:02.701667 PCI: 00:15.0 init
1341 17:55:02.704950 I2C bus 0 version 0x3230302a
1342 17:55:02.708090 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1343 17:55:02.711558 PCI: 00:15.0 init finished in 6 msecs
1344 17:55:02.714882 PCI: 00:15.1 init
1345 17:55:02.718028 I2C bus 1 version 0x3230302a
1346 17:55:02.721623 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1347 17:55:02.724864 PCI: 00:15.1 init finished in 6 msecs
1348 17:55:02.728042 PCI: 00:15.2 init
1349 17:55:02.728115 I2C bus 2 version 0x3230302a
1350 17:55:02.734720 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1351 17:55:02.737807 PCI: 00:15.2 init finished in 6 msecs
1352 17:55:02.737903 PCI: 00:15.3 init
1353 17:55:02.741053 I2C bus 3 version 0x3230302a
1354 17:55:02.744528 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1355 17:55:02.751038 PCI: 00:15.3 init finished in 6 msecs
1356 17:55:02.751121 PCI: 00:16.0 init
1357 17:55:02.754523 PCI: 00:16.0 init finished in 0 msecs
1358 17:55:02.757727 PCI: 00:19.0 init
1359 17:55:02.760901 I2C bus 4 version 0x3230302a
1360 17:55:02.764380 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1361 17:55:02.767541 PCI: 00:19.0 init finished in 6 msecs
1362 17:55:02.770935 PCI: 00:1a.0 init
1363 17:55:02.773995 PCI: 00:1a.0 init finished in 0 msecs
1364 17:55:02.777499 PCI: 00:1f.0 init
1365 17:55:02.780507 IOAPIC: Initializing IOAPIC at 0xfec00000
1366 17:55:02.783962 IOAPIC: Bootstrap Processor Local APIC = 0x00
1367 17:55:02.787453 IOAPIC: ID = 0x02
1368 17:55:02.790558 IOAPIC: Dumping registers
1369 17:55:02.794022 reg 0x0000: 0x02000000
1370 17:55:02.794110 reg 0x0001: 0x00770020
1371 17:55:02.797467 reg 0x0002: 0x00000000
1372 17:55:02.800565 PCI: 00:1f.0 init finished in 21 msecs
1373 17:55:02.803748 PCI: 00:1f.2 init
1374 17:55:02.807125 Disabling ACPI via APMC.
1375 17:55:02.810627 APMC done.
1376 17:55:02.814039 PCI: 00:1f.2 init finished in 6 msecs
1377 17:55:02.825148 PNP: 0c09.0 init
1378 17:55:02.831495 Google Chrome EC uptime: 6.502 seconds
1379 17:55:02.835073 Google Chrome AP resets since EC boot: 0
1380 17:55:02.838367 Google Chrome most recent AP reset causes:
1381 17:55:02.844770 Google Chrome EC reset flags at last EC boot: reset-pin
1382 17:55:02.848056 PNP: 0c09.0 init finished in 19 msecs
1383 17:55:02.851554 Devices initialized
1384 17:55:02.854957 Show all devs... After init.
1385 17:55:02.855042 Root Device: enabled 1
1386 17:55:02.858192 CPU_CLUSTER: 0: enabled 1
1387 17:55:02.861271 DOMAIN: 0000: enabled 1
1388 17:55:02.864606 PCI: 00:00.0: enabled 1
1389 17:55:02.864690 PCI: 00:02.0: enabled 1
1390 17:55:02.868135 PCI: 00:04.0: enabled 1
1391 17:55:02.871357 PCI: 00:05.0: enabled 1
1392 17:55:02.871441 PCI: 00:09.0: enabled 0
1393 17:55:02.874588 PCI: 00:12.6: enabled 0
1394 17:55:02.877764 PCI: 00:14.0: enabled 1
1395 17:55:02.881032 PCI: 00:14.1: enabled 0
1396 17:55:02.881117 PCI: 00:14.2: enabled 0
1397 17:55:02.884652 PCI: 00:14.3: enabled 1
1398 17:55:02.887805 PCI: 00:14.5: enabled 1
1399 17:55:02.891110 PCI: 00:15.0: enabled 1
1400 17:55:02.891197 PCI: 00:15.1: enabled 1
1401 17:55:02.894550 PCI: 00:15.2: enabled 1
1402 17:55:02.897586 PCI: 00:15.3: enabled 1
1403 17:55:02.900981 PCI: 00:16.0: enabled 1
1404 17:55:02.901064 PCI: 00:16.1: enabled 0
1405 17:55:02.904320 PCI: 00:16.4: enabled 0
1406 17:55:02.907521 PCI: 00:16.5: enabled 0
1407 17:55:02.910880 PCI: 00:17.0: enabled 0
1408 17:55:02.910965 PCI: 00:19.0: enabled 1
1409 17:55:02.914351 PCI: 00:19.1: enabled 0
1410 17:55:02.917728 PCI: 00:19.2: enabled 1
1411 17:55:02.917837 PCI: 00:1a.0: enabled 1
1412 17:55:02.920745 PCI: 00:1c.0: enabled 0
1413 17:55:02.924091 PCI: 00:1c.1: enabled 0
1414 17:55:02.927396 PCI: 00:1c.2: enabled 0
1415 17:55:02.927483 PCI: 00:1c.3: enabled 0
1416 17:55:02.930773 PCI: 00:1c.4: enabled 0
1417 17:55:02.933848 PCI: 00:1c.5: enabled 0
1418 17:55:02.937155 PCI: 00:1c.6: enabled 0
1419 17:55:02.937257 PCI: 00:1c.7: enabled 1
1420 17:55:02.940829 PCI: 00:1e.0: enabled 0
1421 17:55:02.944026 PCI: 00:1e.1: enabled 0
1422 17:55:02.947381 PCI: 00:1e.2: enabled 1
1423 17:55:02.947465 PCI: 00:1e.3: enabled 0
1424 17:55:02.950554 PCI: 00:1f.0: enabled 1
1425 17:55:02.953798 PCI: 00:1f.1: enabled 0
1426 17:55:02.953896 PCI: 00:1f.2: enabled 1
1427 17:55:02.957058 PCI: 00:1f.3: enabled 1
1428 17:55:02.960646 PCI: 00:1f.4: enabled 0
1429 17:55:02.963827 PCI: 00:1f.5: enabled 1
1430 17:55:02.963941 PCI: 00:1f.7: enabled 0
1431 17:55:02.967190 GENERIC: 0.0: enabled 1
1432 17:55:02.970526 GENERIC: 0.0: enabled 1
1433 17:55:02.973788 USB0 port 0: enabled 1
1434 17:55:02.973886 GENERIC: 0.0: enabled 1
1435 17:55:02.977007 I2C: 00:2c: enabled 1
1436 17:55:02.980271 I2C: 00:15: enabled 1
1437 17:55:02.980356 GENERIC: 0.0: enabled 0
1438 17:55:02.983693 I2C: 00:15: enabled 1
1439 17:55:02.986933 I2C: 00:10: enabled 0
1440 17:55:02.987018 I2C: 00:10: enabled 0
1441 17:55:02.990194 I2C: 00:2c: enabled 1
1442 17:55:02.993567 I2C: 00:40: enabled 1
1443 17:55:02.993653 I2C: 00:10: enabled 1
1444 17:55:02.996808 I2C: 00:39: enabled 1
1445 17:55:03.000333 I2C: 00:36: enabled 1
1446 17:55:03.003637 I2C: 00:10: enabled 0
1447 17:55:03.003722 I2C: 00:0c: enabled 1
1448 17:55:03.006794 I2C: 00:50: enabled 1
1449 17:55:03.009971 I2C: 00:1a: enabled 1
1450 17:55:03.010055 I2C: 00:1a: enabled 0
1451 17:55:03.013400 I2C: 00:1a: enabled 0
1452 17:55:03.016799 I2C: 00:28: enabled 1
1453 17:55:03.016883 I2C: 00:29: enabled 1
1454 17:55:03.020048 PCI: 00:00.0: enabled 1
1455 17:55:03.023092 SPI: 00: enabled 1
1456 17:55:03.023177 PNP: 0c09.0: enabled 1
1457 17:55:03.026623 GENERIC: 0.0: enabled 0
1458 17:55:03.029896 USB2 port 0: enabled 1
1459 17:55:03.030031 USB2 port 1: enabled 1
1460 17:55:03.033008 USB2 port 2: enabled 1
1461 17:55:03.036383 USB2 port 3: enabled 1
1462 17:55:03.039805 USB2 port 4: enabled 0
1463 17:55:03.039947 USB2 port 5: enabled 1
1464 17:55:03.043280 USB2 port 6: enabled 0
1465 17:55:03.046274 USB2 port 7: enabled 1
1466 17:55:03.046376 USB3 port 0: enabled 1
1467 17:55:03.049654 USB3 port 1: enabled 1
1468 17:55:03.052958 USB3 port 2: enabled 1
1469 17:55:03.053040 USB3 port 3: enabled 1
1470 17:55:03.056109 APIC: 00: enabled 1
1471 17:55:03.059755 APIC: 02: enabled 1
1472 17:55:03.059834 PCI: 00:08.0: enabled 1
1473 17:55:03.066139 BS: BS_DEV_INIT run times (exec / console): 25 / 437 ms
1474 17:55:03.073104 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1475 17:55:03.076219 ELOG: NV offset 0xbfa000 size 0x1000
1476 17:55:03.082608 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1477 17:55:03.089051 ELOG: Event(17) added with size 13 at 2023-10-09 17:55:02 UTC
1478 17:55:03.096061 ELOG: Event(92) added with size 9 at 2023-10-09 17:55:02 UTC
1479 17:55:03.102332 ELOG: Event(93) added with size 9 at 2023-10-09 17:55:02 UTC
1480 17:55:03.109158 ELOG: Event(9E) added with size 10 at 2023-10-09 17:55:03 UTC
1481 17:55:03.115580 ELOG: Event(9F) added with size 14 at 2023-10-09 17:55:03 UTC
1482 17:55:03.119141 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1483 17:55:03.125647 ELOG: Event(A1) added with size 10 at 2023-10-09 17:55:03 UTC
1484 17:55:03.132157 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1485 17:55:03.139009 ELOG: Event(A0) added with size 9 at 2023-10-09 17:55:03 UTC
1486 17:55:03.145724 elog_add_boot_reason: Logged dev mode boot
1487 17:55:03.149059 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1488 17:55:03.152222 Finalize devices...
1489 17:55:03.155673 Devices finalized
1490 17:55:03.158913 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1491 17:55:03.165534 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1492 17:55:03.168808 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1493 17:55:03.175332 ME: HFSTS1 : 0x80030045
1494 17:55:03.178675 ME: HFSTS2 : 0x30280136
1495 17:55:03.181992 ME: HFSTS3 : 0x00000050
1496 17:55:03.185220 ME: HFSTS4 : 0x00004000
1497 17:55:03.191951 ME: HFSTS5 : 0x00000000
1498 17:55:03.195141 ME: HFSTS6 : 0x40400006
1499 17:55:03.198750 ME: Manufacturing Mode : NO
1500 17:55:03.201980 ME: FW Partition Table : OK
1501 17:55:03.205200 ME: Bringup Loader Failure : NO
1502 17:55:03.208504 ME: Firmware Init Complete : NO
1503 17:55:03.211825 ME: Boot Options Present : NO
1504 17:55:03.215063 ME: Update In Progress : NO
1505 17:55:03.218292 ME: D0i3 Support : YES
1506 17:55:03.221562 ME: Low Power State Enabled : NO
1507 17:55:03.224907 ME: CPU Replaced : YES
1508 17:55:03.228419 ME: CPU Replacement Valid : YES
1509 17:55:03.231522 ME: Current Working State : 5
1510 17:55:03.234858 ME: Current Operation State : 1
1511 17:55:03.238246 ME: Current Operation Mode : 3
1512 17:55:03.241326 ME: Error Code : 0
1513 17:55:03.244943 ME: CPU Debug Disabled : YES
1514 17:55:03.247824 ME: TXT Support : NO
1515 17:55:03.254795 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1516 17:55:03.257851 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1517 17:55:03.264592 ACPI: Writing ACPI tables at 76b27000.
1518 17:55:03.264676 ACPI: * FACS
1519 17:55:03.267998 ACPI: * DSDT
1520 17:55:03.271280 Ramoops buffer: 0x100000@0x76a26000.
1521 17:55:03.274453 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1522 17:55:03.281089 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1523 17:55:03.284340 Google Chrome EC: version:
1524 17:55:03.287951 ro: magolor_1.1.9999-103b6f9
1525 17:55:03.291160 rw: magolor_1.1.9999-103b6f9
1526 17:55:03.291249 running image: 1
1527 17:55:03.297455 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1528 17:55:03.301631 ACPI: * FADT
1529 17:55:03.301719 SCI is IRQ9
1530 17:55:03.308475 ACPI: added table 1/32, length now 40
1531 17:55:03.308566 ACPI: * SSDT
1532 17:55:03.311597 Found 1 CPU(s) with 2 core(s) each.
1533 17:55:03.315047 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1534 17:55:03.321672 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1535 17:55:03.324777 Could not locate 'wifi_sar' in VPD.
1536 17:55:03.328077 Checking CBFS for default SAR values
1537 17:55:03.334749 wifi_sar_defaults.hex has bad len in CBFS
1538 17:55:03.338060 failed from getting SAR limits!
1539 17:55:03.341574 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1540 17:55:03.348156 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1541 17:55:03.351388 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1542 17:55:03.358089 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1543 17:55:03.361235 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1544 17:55:03.367784 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1545 17:55:03.371466 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1546 17:55:03.378108 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1547 17:55:03.384612 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1548 17:55:03.391063 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1549 17:55:03.394285 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1550 17:55:03.401195 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1551 17:55:03.407754 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1552 17:55:03.410991 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1553 17:55:03.414246 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1554 17:55:03.421985 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1555 17:55:03.424953 PS2K: Passing 101 keymaps to kernel
1556 17:55:03.431766 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1557 17:55:03.438199 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1558 17:55:03.441534 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1559 17:55:03.448095 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1560 17:55:03.454985 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1561 17:55:03.458186 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1562 17:55:03.464789 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1563 17:55:03.471602 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1564 17:55:03.474813 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1565 17:55:03.481358 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1566 17:55:03.484674 ACPI: added table 2/32, length now 44
1567 17:55:03.488141 ACPI: * MCFG
1568 17:55:03.491282 ACPI: added table 3/32, length now 48
1569 17:55:03.491361 ACPI: * TPM2
1570 17:55:03.494776 TPM2 log created at 0x76a16000
1571 17:55:03.497737 ACPI: added table 4/32, length now 52
1572 17:55:03.501043 ACPI: * MADT
1573 17:55:03.501128 SCI is IRQ9
1574 17:55:03.504698 ACPI: added table 5/32, length now 56
1575 17:55:03.507944 current = 76b2d580
1576 17:55:03.511172 ACPI: * DMAR
1577 17:55:03.514463 ACPI: added table 6/32, length now 60
1578 17:55:03.518027 ACPI: added table 7/32, length now 64
1579 17:55:03.518109 ACPI: * HPET
1580 17:55:03.521248 ACPI: added table 8/32, length now 68
1581 17:55:03.524507 ACPI: done.
1582 17:55:03.527878 ACPI tables: 26304 bytes.
1583 17:55:03.531196 smbios_write_tables: 76a15000
1584 17:55:03.534596 EC returned error result code 3
1585 17:55:03.537819 Couldn't obtain OEM name from CBI
1586 17:55:03.541125 Create SMBIOS type 16
1587 17:55:03.541207 Create SMBIOS type 17
1588 17:55:03.544312 GENERIC: 0.0 (WIFI Device)
1589 17:55:03.547688 SMBIOS tables: 913 bytes.
1590 17:55:03.551286 Writing table forward entry at 0x00000500
1591 17:55:03.557667 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1592 17:55:03.560850 Writing coreboot table at 0x76b4b000
1593 17:55:03.567554 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1594 17:55:03.570728 1. 0000000000001000-000000000009ffff: RAM
1595 17:55:03.577402 2. 00000000000a0000-00000000000fffff: RESERVED
1596 17:55:03.580839 3. 0000000000100000-0000000076a14fff: RAM
1597 17:55:03.587347 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1598 17:55:03.590608 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1599 17:55:03.597001 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1600 17:55:03.600261 7. 0000000077000000-000000007fbfffff: RESERVED
1601 17:55:03.606874 8. 00000000c0000000-00000000cfffffff: RESERVED
1602 17:55:03.610968 9. 00000000fb000000-00000000fb000fff: RESERVED
1603 17:55:03.617052 10. 00000000fe000000-00000000fe00ffff: RESERVED
1604 17:55:03.620360 11. 00000000fea80000-00000000fea87fff: RESERVED
1605 17:55:03.626785 12. 00000000fed80000-00000000fed87fff: RESERVED
1606 17:55:03.629708 13. 00000000fed90000-00000000fed92fff: RESERVED
1607 17:55:03.636621 14. 00000000feda0000-00000000feda1fff: RESERVED
1608 17:55:03.639882 15. 0000000100000000-00000001803fffff: RAM
1609 17:55:03.643285 Passing 4 GPIOs to payload:
1610 17:55:03.646582 NAME | PORT | POLARITY | VALUE
1611 17:55:03.653117 lid | undefined | high | high
1612 17:55:03.656327 power | undefined | high | low
1613 17:55:03.662948 oprom | undefined | high | low
1614 17:55:03.669549 EC in RW | 0x000000b9 | high | low
1615 17:55:03.676112 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 659a
1616 17:55:03.676193 coreboot table: 1504 bytes.
1617 17:55:03.682526 IMD ROOT 0. 0x76fff000 0x00001000
1618 17:55:03.686140 IMD SMALL 1. 0x76ffe000 0x00001000
1619 17:55:03.689215 FSP MEMORY 2. 0x76c4e000 0x003b0000
1620 17:55:03.692360 CONSOLE 3. 0x76c2e000 0x00020000
1621 17:55:03.695886 FMAP 4. 0x76c2d000 0x00000578
1622 17:55:03.699079 TIME STAMP 5. 0x76c2c000 0x00000910
1623 17:55:03.702318 VBOOT WORK 6. 0x76c18000 0x00014000
1624 17:55:03.705660 ROMSTG STCK 7. 0x76c17000 0x00001000
1625 17:55:03.712518 AFTER CAR 8. 0x76c0d000 0x0000a000
1626 17:55:03.715527 RAMSTAGE 9. 0x76ba7000 0x00066000
1627 17:55:03.719085 REFCODE 10. 0x76b67000 0x00040000
1628 17:55:03.722287 SMM BACKUP 11. 0x76b57000 0x00010000
1629 17:55:03.725506 4f444749 12. 0x76b55000 0x00002000
1630 17:55:03.728775 EXT VBT13. 0x76b53000 0x00001c43
1631 17:55:03.732043 COREBOOT 14. 0x76b4b000 0x00008000
1632 17:55:03.735634 ACPI 15. 0x76b27000 0x00024000
1633 17:55:03.738723 ACPI GNVS 16. 0x76b26000 0x00001000
1634 17:55:03.745325 RAMOOPS 17. 0x76a26000 0x00100000
1635 17:55:03.748598 TPM2 TCGLOG18. 0x76a16000 0x00010000
1636 17:55:03.752031 SMBIOS 19. 0x76a15000 0x00000800
1637 17:55:03.752106 IMD small region:
1638 17:55:03.758585 IMD ROOT 0. 0x76ffec00 0x00000400
1639 17:55:03.761845 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1640 17:55:03.765197 VPD 2. 0x76ffeb80 0x00000058
1641 17:55:03.768410 POWER STATE 3. 0x76ffeb40 0x00000040
1642 17:55:03.771687 ROMSTAGE 4. 0x76ffeb20 0x00000004
1643 17:55:03.775316 MEM INFO 5. 0x76ffe940 0x000001e0
1644 17:55:03.781983 BS: BS_WRITE_TABLES run times (exec / console): 7 / 516 ms
1645 17:55:03.785178 MTRR: Physical address space:
1646 17:55:03.791603 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1647 17:55:03.798450 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1648 17:55:03.805115 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1649 17:55:03.811443 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1650 17:55:03.814685 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1651 17:55:03.821353 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1652 17:55:03.827938 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1653 17:55:03.831325 MTRR: Fixed MSR 0x250 0x0606060606060606
1654 17:55:03.837962 MTRR: Fixed MSR 0x258 0x0606060606060606
1655 17:55:03.841405 MTRR: Fixed MSR 0x259 0x0000000000000000
1656 17:55:03.844836 MTRR: Fixed MSR 0x268 0x0606060606060606
1657 17:55:03.847812 MTRR: Fixed MSR 0x269 0x0606060606060606
1658 17:55:03.854516 MTRR: Fixed MSR 0x26a 0x0606060606060606
1659 17:55:03.857902 MTRR: Fixed MSR 0x26b 0x0606060606060606
1660 17:55:03.861102 MTRR: Fixed MSR 0x26c 0x0606060606060606
1661 17:55:03.864565 MTRR: Fixed MSR 0x26d 0x0606060606060606
1662 17:55:03.871121 MTRR: Fixed MSR 0x26e 0x0606060606060606
1663 17:55:03.874282 MTRR: Fixed MSR 0x26f 0x0606060606060606
1664 17:55:03.877521 call enable_fixed_mtrr()
1665 17:55:03.880819 CPU physical address size: 39 bits
1666 17:55:03.884149 MTRR: default type WB/UC MTRR counts: 6/5.
1667 17:55:03.887780 MTRR: UC selected as default type.
1668 17:55:03.894272 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1669 17:55:03.900808 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1670 17:55:03.907406 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1671 17:55:03.913680 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1672 17:55:03.920557 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1673 17:55:03.920666
1674 17:55:03.920771 MTRR check
1675 17:55:03.923790 Fixed MTRRs : Enabled
1676 17:55:03.927090 Variable MTRRs: Enabled
1677 17:55:03.927172
1678 17:55:03.930260 MTRR: Fixed MSR 0x250 0x0606060606060606
1679 17:55:03.933736 MTRR: Fixed MSR 0x258 0x0606060606060606
1680 17:55:03.937038 MTRR: Fixed MSR 0x259 0x0000000000000000
1681 17:55:03.943517 MTRR: Fixed MSR 0x268 0x0606060606060606
1682 17:55:03.947055 MTRR: Fixed MSR 0x269 0x0606060606060606
1683 17:55:03.950165 MTRR: Fixed MSR 0x26a 0x0606060606060606
1684 17:55:03.953690 MTRR: Fixed MSR 0x26b 0x0606060606060606
1685 17:55:03.960039 MTRR: Fixed MSR 0x26c 0x0606060606060606
1686 17:55:03.963278 MTRR: Fixed MSR 0x26d 0x0606060606060606
1687 17:55:03.966734 MTRR: Fixed MSR 0x26e 0x0606060606060606
1688 17:55:03.970009 MTRR: Fixed MSR 0x26f 0x0606060606060606
1689 17:55:03.976554 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1690 17:55:03.979810 call enable_fixed_mtrr()
1691 17:55:03.983011 Checking cr50 for pending updates
1692 17:55:03.986924 CPU physical address size: 39 bits
1693 17:55:03.990182 Reading cr50 TPM mode
1694 17:55:03.999695 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1695 17:55:04.007078 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1696 17:55:04.010599 Checking segment from ROM address 0xfff9d5b8
1697 17:55:04.016939 Checking segment from ROM address 0xfff9d5d4
1698 17:55:04.020405 Loading segment from ROM address 0xfff9d5b8
1699 17:55:04.023527 code (compression=0)
1700 17:55:04.030261 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1701 17:55:04.040331 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1702 17:55:04.043429 it's not compressed!
1703 17:55:04.168613 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1704 17:55:04.175243 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1705 17:55:04.182594 Loading segment from ROM address 0xfff9d5d4
1706 17:55:04.185735 Entry Point 0x30000000
1707 17:55:04.185848 Loaded segments
1708 17:55:04.192329 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1709 17:55:04.208968 Finalizing chipset.
1710 17:55:04.212232 Finalizing SMM.
1711 17:55:04.212359 APMC done.
1712 17:55:04.218846 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1713 17:55:04.222145 mp_park_aps done after 0 msecs.
1714 17:55:04.225377 Jumping to boot code at 0x30000000(0x76b4b000)
1715 17:55:04.235451 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1716 17:55:04.235601
1717 17:55:04.235671
1718 17:55:04.235731
1719 17:55:04.238714 Starting depthcharge on Magolor...
1720 17:55:04.238813
1721 17:55:04.239158 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1722 17:55:04.239255 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1723 17:55:04.239369 Setting prompt string to ['dedede:']
1724 17:55:04.239492 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1725 17:55:04.248568 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1726 17:55:04.248669
1727 17:55:04.254971 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1728 17:55:04.255102
1729 17:55:04.258149 fw_config match found: AUDIO_AMP=UNPROVISIONED
1730 17:55:04.261699
1731 17:55:04.261823 Wipe memory regions:
1732 17:55:04.261947
1733 17:55:04.265081 [0x00000000001000, 0x000000000a0000)
1734 17:55:04.265194
1735 17:55:04.268251 [0x00000000100000, 0x00000030000000)
1736 17:55:04.397423
1737 17:55:04.400597 [0x00000031062170, 0x00000076a15000)
1738 17:55:04.569800
1739 17:55:04.572956 [0x00000100000000, 0x00000180400000)
1740 17:55:05.635337
1741 17:55:05.635492 R8152: Initializing
1742 17:55:05.635562
1743 17:55:05.638380 Version 9 (ocp_data = 6010)
1744 17:55:05.638472
1745 17:55:05.641693 R8152: Done initializing
1746 17:55:05.641837
1747 17:55:05.645084 Adding net device
1748 17:55:05.645173
1749 17:55:05.648115 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1750 17:55:05.648203
1751 17:55:05.651561
1752 17:55:05.651680
1753 17:55:05.652002 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1755 17:55:05.752464 dedede: tftpboot 192.168.201.1 11712600/tftp-deploy-ewwgwv7j/kernel/bzImage 11712600/tftp-deploy-ewwgwv7j/kernel/cmdline 11712600/tftp-deploy-ewwgwv7j/ramdisk/ramdisk.cpio.gz
1756 17:55:05.752645 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1757 17:55:05.752772 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1758 17:55:05.756780 tftpboot 192.168.201.1 11712600/tftp-deploy-ewwgwv7j/kernel/bzImloy-ewwgwv7j/kernel/cmdline 11712600/tftp-deploy-ewwgwv7j/ramdisk/ramdisk.cpio.gz
1759 17:55:05.756874
1760 17:55:05.756940 Waiting for link
1761 17:55:05.958690
1762 17:55:05.958845 done.
1763 17:55:05.958916
1764 17:55:05.958978 MAC: 00:e0:4c:72:3d:b7
1765 17:55:05.959038
1766 17:55:05.962196 Sending DHCP discover... done.
1767 17:55:05.962283
1768 17:55:05.965432 Waiting for reply... done.
1769 17:55:05.965520
1770 17:55:05.968607 Sending DHCP request... done.
1771 17:55:05.968704
1772 17:55:05.984210 Waiting for reply... done.
1773 17:55:05.984367
1774 17:55:05.984439 My ip is 192.168.201.22
1775 17:55:05.984500
1776 17:55:05.987820 The DHCP server ip is 192.168.201.1
1777 17:55:05.990830
1778 17:55:05.994154 TFTP server IP predefined by user: 192.168.201.1
1779 17:55:05.994245
1780 17:55:06.000856 Bootfile predefined by user: 11712600/tftp-deploy-ewwgwv7j/kernel/bzImage
1781 17:55:06.000991
1782 17:55:06.003975 Sending tftp read request... done.
1783 17:55:06.004089
1784 17:55:06.007212 Waiting for the transfer...
1785 17:55:06.007305
1786 17:55:06.259121 00000000 ################################################################
1787 17:55:06.259307
1788 17:55:06.515339 00080000 ################################################################
1789 17:55:06.515513
1790 17:55:06.767415 00100000 ################################################################
1791 17:55:06.767578
1792 17:55:07.022891 00180000 ################################################################
1793 17:55:07.023038
1794 17:55:07.270527 00200000 ################################################################
1795 17:55:07.270774
1796 17:55:07.518777 00280000 ################################################################
1797 17:55:07.519006
1798 17:55:07.831759 00300000 ################################################################
1799 17:55:07.831936
1800 17:55:08.122212 00380000 ################################################################
1801 17:55:08.122361
1802 17:55:08.397091 00400000 ################################################################
1803 17:55:08.397247
1804 17:55:08.693030 00480000 ################################################################
1805 17:55:08.693181
1806 17:55:08.979715 00500000 ################################################################
1807 17:55:08.979865
1808 17:55:09.239292 00580000 ################################################################
1809 17:55:09.239440
1810 17:55:09.494919 00600000 ################################################################
1811 17:55:09.495067
1812 17:55:09.758272 00680000 ################################################################
1813 17:55:09.758423
1814 17:55:10.051478 00700000 ################################################################
1815 17:55:10.051654
1816 17:55:10.332168 00780000 ################################################################
1817 17:55:10.332311
1818 17:55:10.381216 00800000 ############# done.
1819 17:55:10.381311
1820 17:55:10.384599 The bootfile was 8490896 bytes long.
1821 17:55:10.384682
1822 17:55:10.387856 Sending tftp read request... done.
1823 17:55:10.387945
1824 17:55:10.391135 Waiting for the transfer...
1825 17:55:10.391223
1826 17:55:10.654585 00000000 ################################################################
1827 17:55:10.654736
1828 17:55:10.919859 00080000 ################################################################
1829 17:55:10.920011
1830 17:55:11.217343 00100000 ################################################################
1831 17:55:11.217494
1832 17:55:11.524572 00180000 ################################################################
1833 17:55:11.524747
1834 17:55:11.780814 00200000 ################################################################
1835 17:55:11.780973
1836 17:55:12.035794 00280000 ################################################################
1837 17:55:12.035938
1838 17:55:12.296681 00300000 ################################################################
1839 17:55:12.296859
1840 17:55:12.546195 00380000 ################################################################
1841 17:55:12.546333
1842 17:55:12.795458 00400000 ################################################################
1843 17:55:12.795610
1844 17:55:13.099625 00480000 ################################################################
1845 17:55:13.099798
1846 17:55:13.350484 00500000 ################################################################
1847 17:55:13.350636
1848 17:55:13.600386 00580000 ################################################################
1849 17:55:13.600563
1850 17:55:13.855400 00600000 ################################################################
1851 17:55:13.855546
1852 17:55:14.111999 00680000 ################################################################
1853 17:55:14.112174
1854 17:55:14.401565 00700000 ################################################################
1855 17:55:14.401772
1856 17:55:14.682267 00780000 ################################################################
1857 17:55:14.682429
1858 17:55:14.908244 00800000 ##################################################### done.
1859 17:55:14.908406
1860 17:55:14.911563 Sending tftp read request... done.
1861 17:55:14.911654
1862 17:55:14.914856 Waiting for the transfer...
1863 17:55:14.914944
1864 17:55:14.915011 00000000 # done.
1865 17:55:14.918086
1866 17:55:14.924656 Command line loaded dynamically from TFTP file: 11712600/tftp-deploy-ewwgwv7j/kernel/cmdline
1867 17:55:14.924742
1868 17:55:14.941309 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1869 17:55:14.941402
1870 17:55:14.944450 ec_init: CrosEC protocol v3 supported (256, 256)
1871 17:55:14.952972
1872 17:55:14.956187 Shutting down all USB controllers.
1873 17:55:14.956272
1874 17:55:14.956339 Removing current net device
1875 17:55:14.956401
1876 17:55:14.959369 Finalizing coreboot
1877 17:55:14.959492
1878 17:55:14.965942 Exiting depthcharge with code 4 at timestamp: 17528763
1879 17:55:14.966027
1880 17:55:14.966094
1881 17:55:14.966157 Starting kernel ...
1882 17:55:14.966217
1883 17:55:14.966276
1884 17:55:14.966646 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
1885 17:55:14.966745 start: 2.2.5 auto-login-action (timeout 00:04:36) [common]
1886 17:55:14.966823 Setting prompt string to ['Linux version [0-9]']
1887 17:55:14.966893 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1888 17:55:14.966980 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1890 17:59:50.966986 end: 2.2.5 auto-login-action (duration 00:04:36) [common]
1892 17:59:50.967244 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 276 seconds'
1894 17:59:50.967411 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1897 17:59:50.967657 end: 2 depthcharge-action (duration 00:05:00) [common]
1899 17:59:50.967883 Cleaning after the job
1900 17:59:50.967975 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712600/tftp-deploy-ewwgwv7j/ramdisk
1901 17:59:50.969407 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712600/tftp-deploy-ewwgwv7j/kernel
1902 17:59:50.970932 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11712600/tftp-deploy-ewwgwv7j/modules
1903 17:59:50.971321 start: 5.1 power-off (timeout 00:00:30) [common]
1904 17:59:50.971647 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-9' '--port=1' '--command=off'
1905 17:59:51.047657 >> Command sent successfully.
1906 17:59:51.050433 Returned 0 in 0 seconds
1907 17:59:51.150816 end: 5.1 power-off (duration 00:00:00) [common]
1909 17:59:51.151167 start: 5.2 read-feedback (timeout 00:10:00) [common]
1910 17:59:51.151440 Listened to connection for namespace 'common' for up to 1s
1912 17:59:51.151825 Listened to connection for namespace 'common' for up to 1s
1913 17:59:52.152525 Finalising connection for namespace 'common'
1914 17:59:52.153201 Disconnecting from shell: Finalise
1915 17:59:52.153576
1916 17:59:52.254725 end: 5.2 read-feedback (duration 00:00:01) [common]
1917 17:59:52.255283 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11712600
1918 17:59:52.304988 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11712600
1919 17:59:52.305210 JobError: Your job cannot terminate cleanly.